/* Things the lguest guest needs to know.  Note: like all lguest interfaces,
 * this is subject to wild and random change between versions. */
#ifndef _LINUX_LGUEST_H
#define _LINUX_LGUEST_H

#ifndef __ASSEMBLY__
#include <linux/time.h>
#include <asm/irq.h>
#include <asm/lguest_hcall.h>

#define LG_CLOCK_MIN_DELTA	100UL
#define LG_CLOCK_MAX_DELTA	ULONG_MAX

/*G:032 The second method of communicating with the Host is to via "struct
 * lguest_data".  Once the Guest's initialization hypercall tells the Host where
 * this is, the Guest and Host both publish information in it. :*/
struct lguest_data
{
	/* 512 == enabled (same as eflags in normal hardware).  The Guest
	 * changes interrupts so often that a hypercall is too slow. */
	unsigned int irq_enabled;
	/* Fine-grained interrupt disabling by the Guest */
	DECLARE_BITMAP(blocked_interrupts, LGUEST_IRQS);

	/* The Host writes the virtual address of the last page fault here,
	 * which saves the Guest a hypercall.  CR2 is the native register where
	 * this address would normally be found. */
	unsigned long cr2;

	/* Wallclock time set by the Host. */
	struct timespec time;

	/* Async hypercall ring.  Instead of directly making hypercalls, we can
	 * place them in here for processing the next time the Host wants.
	 * This batching can be quite efficient. */

	/* 0xFF == done (set by Host), 0 == pending (set by Guest). */
	u8 hcall_status[LHCALL_RING_SIZE];
	/* The actual registers for the hypercalls. */
	struct hcall_args hcalls[LHCALL_RING_SIZE];

/* Fields initialized by the Host at boot: */
	/* Memory not to try to access */
	unsigned long reserve_mem;
	/* KHz for the TSC clock. */
	u32 tsc_khz;
	/* Page where the top-level pagetable is */
	unsigned long pgdir;

/* Fields initialized by the Guest at boot: */
	/* Instruction range to suppress interrupts even if enabled */
	unsigned long noirq_start, noirq_end;
	/* Address above which page tables are all identical. */
	unsigned long kernel_address;
	/* The vector to try to use for system calls (0x40 or 0x80). */
	unsigned int syscall_vec;
};
extern struct lguest_data lguest_data;
#endif /* __ASSEMBLY__ */
#endif	/* _LINUX_LGUEST_H */
nput type='hidden' name='id' value='527c465a3c8716d93201ae34b7fc52679610596d'/><select name='qt'>
<option value='grep'>log msg</option>
<option value='author'>author</option>
<option value='committer'>committer</option>
<option value='range'>range</option>
</select>
<input class='txt' type='search' size='10' name='q' value=''/>
<input type='submit' value='search'/>
</form>
</td></tr></table>
<div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='id' value='527c465a3c8716d93201ae34b7fc52679610596d'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><table summary='commit info' class='commit-info'>
<tr><th>author</th><td>Takashi Iwai &lt;tiwai@suse.de&gt;</td><td class='right'>2015-07-27 14:43:29 +0200</td></tr>
<tr><th>committer</th><td>Takashi Iwai &lt;tiwai@suse.de&gt;</td><td class='right'>2015-07-27 14:43:29 +0200</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/drm-misc/commit/?id=527c465a3c8716d93201ae34b7fc52679610596d'>527c465a3c8716d93201ae34b7fc52679610596d</a> (<a href='/drm-misc/patch/?id=527c465a3c8716d93201ae34b7fc52679610596d'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/drm-misc/tree/?id=527c465a3c8716d93201ae34b7fc52679610596d'>e436b076df094caba9809b9c622374d396e84435</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/drm-misc/commit/?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>fbce23a0b95763dfc4961ce6240e055c39f497ed</a> (<a href='/drm-misc/diff/?id=527c465a3c8716d93201ae34b7fc52679610596d&amp;id2=fbce23a0b95763dfc4961ce6240e055c39f497ed'>diff</a>)</td></tr><tr><th>parent</th><td colspan='2' class='oid'><a href='/drm-misc/commit/?id=5ce000b297a1c1bb126a14b02acb40318b88a903'>5ce000b297a1c1bb126a14b02acb40318b88a903</a> (<a href='/drm-misc/diff/?id=527c465a3c8716d93201ae34b7fc52679610596d&amp;id2=5ce000b297a1c1bb126a14b02acb40318b88a903'>diff</a>)</td></tr></table>
<div class='commit-subject'>Merge branch 'for-linus' into for-next</div><div class='commit-msg'>... to make easier developing HDA ext code.
</div><div class='diffstat-header'><a href='/drm-misc/diff/?id=527c465a3c8716d93201ae34b7fc52679610596d'>Diffstat</a></div><table summary='diffstat' class='diffstat'><tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/.mailmap?id=527c465a3c8716d93201ae34b7fc52679610596d'>.mailmap</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/CREDITS?id=527c465a3c8716d93201ae34b7fc52679610596d'>CREDITS</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ABI/stable/sysfs-bus-w1?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/stable/sysfs-bus-w1</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ABI/stable/sysfs-driver-w1_ds28ea00?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/stable/sysfs-driver-w1_ds28ea00</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/configfs-spear-pcie-gadget?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/configfs-spear-pcie-gadget</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/dev-kmsg?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/dev-kmsg</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/ima_policy?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/ima_policy</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-ata?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-ata</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-fcoe?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-fcoe</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-iio?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-iio</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-iio-vf610?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-iio-vf610</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-mei?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-mei</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-bus-usb-lvstest?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-usb-lvstest</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ABI/testing/sysfs-class-cxl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-cxl</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/crypto-API.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/crypto-API.tmpl</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/drm.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/drm.tmpl</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/kernel-hacking.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/kernel-hacking.tmpl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/Makefile</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/audio.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/audio.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/ca.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/ca.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/demux.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/demux.xml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/dvbapi.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/dvbapi.xml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/dvbproperty.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/dvbproperty.xml</a></td><td class='right'>1117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/examples.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/examples.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-get-info.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-get-info.xml</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-get-property.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-get-property.xml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-read-status.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-read-status.xml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-set-tone.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-tone.xml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/fe-set-voltage.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-voltage.xml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/frontend.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/frontend.xml</a></td><td class='right'>1747</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/frontend_legacy_api.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/frontend_legacy_api.xml</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/intro.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/intro.xml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/kdapi.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/kdapi.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/net.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/net.xml</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/dvb/video.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/video.xml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/typical_media_device.svg?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/typical_media_device.svg</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/controls.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/controls.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/io.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/io.xml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/media-func-open.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/media-func-open.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/pixfmt-y16-be.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/pixfmt-y16-be.xml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/pixfmt.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/pixfmt.xml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/remote_controllers.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/remote_controllers.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-formats.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/subdev-formats.xml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-dqevent.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-dqevent.xml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-expbuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-expbuf.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-edid.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-edid.xml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-selection.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-selection.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-qbuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-qbuf.xml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-querybuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-querybuf.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media_api.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media_api.tmpl</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/scsi.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/scsi.tmpl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/RTFP.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/RTFP.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/arrayRCU.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/arrayRCU.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/lockdep.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/lockdep.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/rcu_dereference.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/rcu_dereference.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/whatisRCU.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/whatisRCU.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/SubmittingPatches?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/SubmittingPatches</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/acpi/enumeration.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/acpi/enumeration.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/CCN.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/CCN.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/SPEAr/overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/SPEAr/overview.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/arm/Samsung/Bootloader-interface.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/Samsung/Bootloader-interface.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/arm/stm32/overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/stm32/overview.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/arm/stm32/stm32f429-overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/stm32/stm32f429-overview.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/sunxi/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/sunxi/README</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/vlocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/vlocks.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm64/booting.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm64/booting.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/blackfin/gptimers-example.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/blackfin/gptimers-example.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/blockdev/zram.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/blockdev/zram.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cgroups/blkio-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/blkio-controller.txt</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cgroups/memory.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/memory.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cgroups/unified-hierarchy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/unified-hierarchy.txt</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/clk.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/clk.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cpu-freq/governors.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/governors.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cpu-freq/intel-pstate.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/intel-pstate.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cpu-freq/user-guide.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/user-guide.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cputopology.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cputopology.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/debugging-via-ohci1394.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/debugging-via-ohci1394.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/cache-policies.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/cache-policies.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/cache.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/cache.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/dm-raid.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/dm-raid.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/statistics.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/statistics.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/thin-provisioning.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/thin-provisioning.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arc/archs-idu-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/archs-idu-intc.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arc/archs-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/archs-intc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arc/axs101.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/axs101.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arc/axs103.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/axs103.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/arm-boards?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/arm-boards</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/armv7m_systick.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/armv7m_systick.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/atmel-at91.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/atmel-at91.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/cci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/cci.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/coresight.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/coresight.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/cpus.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/cpus.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/exynos/power_domain.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/exynos/power_domain.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/fsl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/fsl.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/l2cc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/l2cc.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/marvell,berlin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/marvell,berlin.txt</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/scu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/scu.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/sunxi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/sunxi.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/ux500/boards.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/ux500/boards.txt</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/zte.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/zte.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/ata/ahci-ceva.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/ahci-ceva.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/ata/ahci-platform.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/ahci-platform.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/at91-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/at91-clock.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/clock-bindings.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/csr,atlas7-car.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/csr,atlas7-car.txt</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/emev2-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/emev2-clock.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/hi6220-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/hi6220-clock.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/imx7d-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/imx7d-clock.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/ingenic,cgu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/ingenic,cgu.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/keystone-pll.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/keystone-pll.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/lpc1850-ccu.txt</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/lpc1850-cgu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/lpc1850-cgu.txt</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/marvell,berlin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/marvell,berlin.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/marvell,pxa1928.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/marvell,pxa1928.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/qca,ath79-pll.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/st,stm32-rcc.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/sunxi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/sunxi.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/ti,cdce925.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/ti,cdce925.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/clock/zx296702-clk.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/zx296702-clk.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/crypto/fsl-sec2.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/fsl-sec2.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/crypto/marvell-cesa.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/marvell-cesa.txt</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/crypto/mv_cesa.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/mv_cesa.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/dma.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/mv-xor.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/mv-xor.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/sirfsoc-dma.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/sun6i-dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/sun6i-dma.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/msm/dsi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/dsi.txt</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/msm/edp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/edp.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/msm/hdmi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/hdmi.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/tilcdc/slave.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/tilcdc/slave.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/edac/apm-xgene-edac.txt</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-ath79.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-ath79.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-atlas7.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-atlas7.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-xlp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-xlp.txt</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-zynq.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-zynq.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/h8300/cpu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/h8300/cpu.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/hwlock/hwlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/hwlock.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-at91.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-at91.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-mt6577.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/trivial-devices.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/trivial-devices.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/vf610-adc.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/st-sensors.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/st-sensors.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iio/temperature/mlx90614.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/temperature/mlx90614.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/input/ti,drv2665.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/input/ti,drv2665.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/leds/leds-aat1290.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-aat1290.txt</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/leds/leds-bcm6328.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-bcm6328.txt</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/leds/leds-bcm6358.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-bcm6358.txt</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/leds/leds-ktd2692.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-ktd2692.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-tlc591xx.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mailbox/mailbox.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mailbox/mailbox.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/media/i2c/adp1653.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/media/i2c/adp1653.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/media/st,stih4xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/media/st,stih4xx.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/ti/emif.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/arizona.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/arizona.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/axp20x.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/axp20x.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/cros-ec.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/cros-ec.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/da9063.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/da9063.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/max77686.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/max77686.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/max77693.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/max77693.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/mfd.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/mfd.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--<span class='modechange'>[-rwxr-xr-x]</span></td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/tps6507x.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/tps6507x.txt</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mips/ath79-soc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mips/ath79-soc.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/arasan,sdhci.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mmc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mmc.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mtk-sd.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mtk-sd.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/renesas,mmcif.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/amd-xgbe-phy.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/amd-xgbe.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/amd-xgbe.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/ezchip_enet.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ezchip_enet.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/ipq806x-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ipq806x-dwmac.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/macb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/macb.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/nfc/st-nci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/st-nci.txt</a> (renamed from Documentation/devicetree/bindings/net/nfc/st21nfcb.txt)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/nfc/trf7970a.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/trf7970a.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/phy.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/renesas,ravb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/renesas,ravb.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/rockchip-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/rockchip-dwmac.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/ti,dp83867.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ti,dp83867.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/panel/lg,lb070wv8.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/panel/lg,lb070wv8.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pci/xgene-pci-msi.txt</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pci/xilinx-pcie.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pci/xilinx-pcie.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-falcon.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-falcon.txt</a> (renamed from Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt</a> (renamed from Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power/bq24257.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/bq24257.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power/bq25890.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/bq25890.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power/opp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/opp.txt</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power/rt9455_charger.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/rt9455_charger.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power/twl-charger.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/twl-charger.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/power_supply/max17042_battery.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power_supply/max17042_battery.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/powerpc/fsl/fman.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/powerpc/fsl/fman.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/powerpc/fsl/guts.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/powerpc/fsl/guts.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/max8973-regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/max8973-regulator.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/regulator.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/reset/berlin,reset.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/reset/berlin,reset.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/rtc/s3c-rtc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/s3c-rtc.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/ingenic,uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/ingenic,uart.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/mtk-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/mtk-uart.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/pl011.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/pl011.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/renesas,sci-serial.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/sirf-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/sirf-uart.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/serial/uniphier-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/uniphier-uart.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/soc/fsl/qman-portals.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/soc/sunxi/sram.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/soc/sunxi/sram.txt</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/mt8173-max98090.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/sound/mt8173-max98090.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/sh-msiof.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/sh-msiof.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi-ath79.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-ath79.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi-orion.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-orion.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi-sirf.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-sirf.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi_atmel.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi_atmel.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/spi/spi_pl022.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi_pl022.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/thermal/thermal.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/thermal.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/renesas,tpu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,tpu.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/timer/st,stm32-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/st,stm32-timer.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/atmel-usb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/dwc3-st.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/dwc3.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/dwc3.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/msm-hsusb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/msm-hsusb.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/renesas_usbhs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/renesas_usbhs.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/twlxxxx-usb.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/usb-ehci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/usb-ehci.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/vendor-prefixes.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/vendor-prefixes.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/video/exynos-mic.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/video/exynos-mic.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/features/time/context-tracking/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/context-tracking/arch-support.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/features/vm/ELF-ASLR/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/ELF-ASLR/arch-support.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/features/vm/pmdp_splitting_flush/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/pmdp_splitting_flush/arch-support.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/features/vm/pte_special/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/pte_special/arch-support.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/Locking?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/Locking</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/automount-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/automount-support.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/caching/backend-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/caching/backend-api.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/dax.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/dax.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/nfs/knfsd-stats.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/nfs/knfsd-stats.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/laptops/00-INDEX?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/laptops/00-INDEX</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/laptops/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/laptops/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/leds/leds-class-flash.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-class-flash.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/leds/leds-class.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-class.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/leds/leds-lp5523.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-lp5523.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/lockup-watchdogs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/lockup-watchdogs.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/magic-number.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/magic-number.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/md.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/md.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/memory-barriers.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/memory-barriers.txt</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/mic/mic_overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mic_overview.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/mic/mpssd/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mpssd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/Documentation/mic/mpssd/mpss?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mpssd/mpss</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/mic/scif_overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/scif_overview.txt</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/misc-devices/spear-pcie-gadget.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/misc-devices/spear-pcie-gadget.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/bonding.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/bonding.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/can.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/can.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/dctcp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/dctcp.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/fore200e.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/fore200e.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/ieee802154.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/ieee802154.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/ip-sysctl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/ip-sysctl.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/netconsole.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/netconsole.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/pktgen.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/pktgen.txt</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/switchdev.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/switchdev.txt</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/tc-actions-env-rules.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/tc-actions-env-rules.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/timestamping/txtimestamp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/timestamping/txtimestamp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/nfc/nfc-hci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nfc/nfc-hci.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/ntb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ntb.txt</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/nvdimm/btt.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nvdimm/btt.txt</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/nvdimm/nvdimm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nvdimm/nvdimm.txt</a></td><td class='right'>808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/phy.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/pinctrl.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/runtime_pm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/power/runtime_pm.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/swsusp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/power/swsusp.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/powerpc/00-INDEX?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/00-INDEX</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/powerpc/cxl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/cxl.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/powerpc/dscr.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/dscr.txt</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/powerpc/transactional_memory.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/transactional_memory.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/pps/pps.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/pps/pps.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/prctl/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/prctl/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/preempt-locking.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/preempt-locking.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/remoteproc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/remoteproc.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/s390/qeth.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/s390/qeth.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scheduler/sched-deadline.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scheduler/sched-deadline.txt</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/scsi_mid_low_api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scsi/scsi_mid_low_api.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/st.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scsi/st.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/security/Smack.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/security/Smack.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/serial/serial-rs485.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/serial/serial-rs485.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/serial/tty.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/serial/tty.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/stable_kernel_rules.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/stable_kernel_rules.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sysctl/kernel.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/sysctl/kernel.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/Documentation/target/tcm_mod_builder.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcm_mod_builder.py</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/target/tcm_mod_builder.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcm_mod_builder.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/target/tcmu-design.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcmu-design.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/thermal/cpu-cooling-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/cpu-cooling-api.txt</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/thermal/power_allocator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/power_allocator.txt</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/thermal/sysfs-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/sysfs-api.txt</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/trace/ftrace.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/trace/ftrace.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/usb/gadget-testing.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/usb/gadget-testing.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/usb/usb-serial.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/usb/usb-serial.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vDSO/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vDSO/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vfio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vfio.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/CARDLIST.cx23885?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.cx23885</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/CARDLIST.em28xx?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.em28xx</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/CARDLIST.saa7134?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.saa7134</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/CARDLIST.saa7164?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.saa7164</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/v4l2-framework.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/v4l2-framework.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/v4l2-pci-skeleton.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/v4l2-pci-skeleton.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/vivid.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/vivid.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/kvm/api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/virtual/kvm/api.txt</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/kvm/mmu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/virtual/kvm/mmu.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vm/unevictable-lru.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vm/unevictable-lru.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vm/zswap.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vm/zswap.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vme_api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vme_api.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/w1/slaves/w1_therm?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/w1/slaves/w1_therm</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/w1/w1.generic?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/w1/w1.generic</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/watchdog/watchdog-kernel-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/watchdog/watchdog-kernel-api.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/watchdog/watchdog-parameters.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/watchdog/watchdog-parameters.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/workqueue.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/workqueue.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/x86/boot.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/boot.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/x86/entry_64.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/entry_64.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/x86/kernel-stacks?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/kernel-stacks</a> (renamed from Documentation/x86/x86_64/kernel-stacks)</td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/x86/mtrr.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/mtrr.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/x86/pat.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/pat.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/x86/x86_64/boot-options.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/x86_64/boot-options.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/zh_CN/gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/zh_CN/gpio.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/zh_CN/magic-number.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/zh_CN/magic-number.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>Kbuild</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/MAINTAINERS?id=527c465a3c8716d93201ae34b7fc52679610596d'>MAINTAINERS</a></td><td class='right'>605</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/pci.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/serial.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/core_irongate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/core_irongate.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/sys_eiger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/sys_eiger.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/sys_nautilus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/sys_nautilus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/mm/fault.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/Kconfig</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axc001.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc001.dtsi</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axc003.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc003.dtsi</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axc003_idu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc003_idu.dtsi</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axs101.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs101.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axs103.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs103.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axs103_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs103_idu.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/axs10x_mb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs10x_mb.dtsi</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arc/boot/dts/nsim_700.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_700.dts</a> (renamed from arch/arc/boot/dts/angel4.dts)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/nsim_hs.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_hs.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/nsim_hs_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_hs_idu.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/nsimosci_hs.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsimosci_hs.dts</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/nsimosci_hs_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsimosci_hs_idu.dts</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/vdk_axc003.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axc003.dtsi</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/vdk_axc003_idu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axc003_idu.dtsi</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/vdk_axs10x_mb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axs10x_mb.dtsi</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/vdk_hs38.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_hs38.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/boot/dts/vdk_hs38_smp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_hs38_smp.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/axs101_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs101_defconfig</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/axs103_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs103_defconfig</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/axs103_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs103_smp_defconfig</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/configs/nsim_700_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_700_defconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/nsim_hs_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_hs_defconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/nsim_hs_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_hs_smp_defconfig</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/configs/nsimosci_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/nsimosci_hs_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_hs_defconfig</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/nsimosci_hs_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_hs_smp_defconfig</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/configs/tb10x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/tb10x_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/vdk_hs38_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/vdk_hs38_defconfig</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/configs/vdk_hs38_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/vdk_hs38_smp_defconfig</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/arcregs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/arcregs.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/atomic.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/barrier.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/bitops.h</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cache.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cacheflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cmpxchg.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/delay.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/delay.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/dma-mapping.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/elf.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/entry-arcv2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry-arcv2.h</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/entry-compact.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry-compact.h</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/entry.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry.h</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/futex.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/io.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irq.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/irqflags-arcv2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags-arcv2.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/irqflags-compact.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags-compact.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags.h</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/include/asm/mcip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/mcip.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/mmu.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/pgtable.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/processor.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/ptrace.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/spinlock.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/thread_info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/uaccess.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/include/uapi/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/uapi/asm/page.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/asm-offsets.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/devtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/devtree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/kernel/entry-arcv2.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry-arcv2.S</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/kernel/entry-compact.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry-compact.S</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry.S</a></td><td class='right'>527</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/head.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/kernel/intc-arcv2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/intc-arcv2.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/kernel/intc-compact.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/intc-compact.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/irq.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/kernel/mcip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/mcip.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/perf_event.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/process.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/ptrace.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/setup.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/signal.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/smp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/stacktrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/stacktrace.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/time.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/kernel/troubleshoot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/troubleshoot.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/lib/memcmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memcmp.S</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/lib/memcpy-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memcpy-archs.S</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/lib/memset-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memset-archs.S</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/lib/strcmp-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/strcmp-archs.S</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arc/mm/cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/cache.c</a> (renamed from arch/arc/mm/cache_arc700.c)</td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/mm/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/dma.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/mm/tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/tlb.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arc/mm/tlbex.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/tlbex.S</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arc/plat-arcfpga/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-arcfpga/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arc/plat-arcfpga/include/plat/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-arcfpga/include/plat/smp.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arc/plat-arcfpga/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-arcfpga/smp.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/plat-axs10x/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/plat-axs10x/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/plat-axs10x/axs10x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/axs10x.c</a></td><td class='right'>484</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arc/plat-sim/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arc/plat-sim/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/Makefile</a> (renamed from arch/arc/plat-arcfpga/Makefile)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arc/plat-sim/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/platform.c</a> (renamed from arch/arc/plat-arcfpga/platform.c)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Kconfig</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Kconfig.debug</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/compressed/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/head.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/compressed/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/libfdt_env.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/Makefile</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-baltos-ir5221.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-baltos-ir5221.dts</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-bone-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-bone-common.dtsi</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-boneblack.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-boneblack.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-evm.dts</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-pepper.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-pepper.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/am335x-sl50.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-sl50.dts</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am3517.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am3517.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am4372.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am4372.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am437x-gp-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am437x-gp-evm.dts</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/am57xx-beagle-x15.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am57xx-beagle-x15.dts</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/arm-realview-pb1176.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/arm-realview-pb1176.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-370-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-370-dlink-dns327l.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-dlink-dns327l.dts</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-370-synology-ds213j.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-synology-ds213j.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-370-xp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-xp.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-370.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-375-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-375-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-375.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-375.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-385-db-ap.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-db-ap.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-385-linksys-caiman.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys-caiman.dts</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-385-linksys-cobra.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys-cobra.dts</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-385-linksys.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys.dtsi</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-388-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-388-gp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-gp.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-388-rd.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-rd.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-38x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-38x.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-398-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-398-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-39x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-39x.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-axpwifiap.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-axpwifiap.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-gp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-gp.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-mv78260.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-mv78260.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-mv78460.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-mv78460.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp-synology-ds414.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-synology-ds414.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armada-xp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/armv7-m.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armv7-m.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-ariettag25.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-ariettag25.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-kizbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizbox.dts</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-kizbox2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizbox2.dts</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-kizboxmini.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizboxmini.dts</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-sama5d3_xplained.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d3_xplained.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-sama5d4_xplained.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d4_xplained.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91-sama5d4ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d4ek.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91rm9200.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91rm9200.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91rm9200ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91rm9200ek.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9260.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9260.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9261.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9261.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9261ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9261ek.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9263.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9263.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9263ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9263ek.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g20ek_common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9g20ek_common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g45.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9g45.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9m10g45ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9m10g45ek.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9n12.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9n12.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9n12ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9n12ek.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9rl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9rl.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9rlek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9rlek.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9x5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9x5.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9x5ek.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9x5ek.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/atlas7.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/atlas7.dtsi</a></td><td class='right'>1057</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/axp209.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/axp209.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm-cygnus.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm-cygnus.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi-b-plus.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm2835-rpi-b.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi-b.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm2835-rpi.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm2835.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-netgear-r6250.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-netgear-r6250.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm4709-netgear-r8000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-netgear-r8000.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm5301x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm5301x.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm63138.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm63138.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm7445-bcm97445svmb.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm7445.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm7445.dtsi</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm958300k.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm958300k.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/bcm963138dvt.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm963138dvt.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2.dtsi</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2cd-google-chromecast.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2cd-google-chromecast.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2cd.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2cd.dtsi</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2q-marvell-dmp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2q-marvell-dmp.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/berlin2q.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2q.dtsi</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/cros-ec-keyboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cros-ec-keyboard.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/cx92755.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cx92755.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/cx92755_equinox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cx92755_equinox.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/boot/dts/dove-cm-a510.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove-cm-a510.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/dove-cm-a510.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove-cm-a510.dtsi</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/dove-sbc-a510.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove-sbc-a510.dts</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dove.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra7-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7-evm.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra7.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra72-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra72-evm.dts</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra72x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra72x.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra74x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra74x.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/dra7xx-clocks.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7xx-clocks.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/emev2-kzm9d.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/emev2-kzm9d.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos3250-monk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250-monk.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos3250-rinato.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250-rinato.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos3250.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250.dtsi</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4.dtsi</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4210-origen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-origen.dts</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4210-smdkv310.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-smdkv310.dts</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4210-trats.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-trats.dts</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4210.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210.dtsi</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4212.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4212.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-odroid-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-odroid-common.dtsi</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-odroidx.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-odroidx.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-origen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-origen.dts</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-smdk4412.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-smdk4412.dts</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-tiny4412.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-tiny4412.dts</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412-trats2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-trats2.dts</a></td><td class='right'>1339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4412.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4415.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4415.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4x12-pinctrl.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos4x12.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4x12.dtsi</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5250-snow.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250-snow.dts</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5250.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250.dtsi</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5260-xyref5260.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5260-xyref5260.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5420-arndale-octa.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-arndale-octa.dts</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5420-peach-pit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-peach-pit.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5420-smdk5420.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-smdk5420.dts</a></td><td class='right'>645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5420.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420.dtsi</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5422-odroidxu3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3.dts</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5440-sd5v1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440-sd5v1.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5440-ssdk5440.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440-ssdk5440.dts</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5440.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5800-peach-pi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5800-peach-pi.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx23-olinuxino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx23-olinuxino.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx23.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx23.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx27.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx27.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx28-cfa10036.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx28-cfa10036.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53-qsb-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx53-qsb-common.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-apf6dev.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-apf6dev.dts</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-aristainetos2_4.dts</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-aristainetos2_7.dts</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-cubox-i.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-cubox-i.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-gw551x.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-gw551x.dts</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl-hummingboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-hummingboard.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6dl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-apf6dev.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-apf6dev.dts</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-cubox-i.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-cubox-i.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-gw551x.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-gw551x.dts</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-hummingboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-hummingboard.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-apf6.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-apf6.dtsi</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-apf6dev.dtsi</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-cubox-i.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-gw551x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-gw551x.dtsi</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-hummingboard.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-microsom.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-microsom.dtsi</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-sabrelite.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6qdl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6sl-warp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6sl-warp.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx7d-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d-pinfunc.h</a></td><td class='right'>1038</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx7d-sdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d-sdb.dts</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx7d.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d.dtsi</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/integrator.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/integrator.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2e-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/k2e-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e-netcp.dtsi</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2e.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2hk-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/k2hk-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk-netcp.dtsi</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2hk.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2l-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/k2l-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l-netcp.dtsi</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/k2l.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/keystone.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/keystone.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-b3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-b3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-cloudbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-cloudbox.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-dir665.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-dir665.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-dreamplug.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-dreamplug.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-lsxl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-lsxl.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-netxbig.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-netxbig.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-ns2-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-ns2-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-rd88f6192.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-rd88f6192.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-synology.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-synology.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-t5325.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-t5325.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-ts219.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-ts219.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/boot/dts/kizbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kizbox.dts</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/logicpd-torpedo-som.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/logicpd-torpedo-som.dtsi</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc18xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc18xx.dtsi</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc4350-hitex-eval.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4350-hitex-eval.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc4350.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4350.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4357-ea4357-devkit.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc4357.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4357.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/mt8127.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8127.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/mt8135-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8135-pinfunc.h</a></td><td class='right'>1302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/mt8135.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8135.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-cm-t3517.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-cm-t3517.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-devkit8000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-devkit8000.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-evm-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-evm-common.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-gta04.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-gta04.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-ldp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-ldp.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap4.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap5-uevm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap5-uevm.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap5.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa27x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa27x.dtsi</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa2xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa2xx.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa3xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa3xx.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064-ifc6410.dts</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-apq8064.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064.dtsi</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-msm8660.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-msm8660.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-pm8841.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pm8841.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-pm8941.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pm8941.dtsi</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/qcom-pma8084.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pma8084.dtsi</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a73a4-ape6evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a73a4-ape6evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a73a4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a73a4.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7740-armadillo800eva.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7740-armadillo800eva.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7740.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7740.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7778-bockw-reference.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778-bockw-reference.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7778-bockw.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778-bockw.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7778.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7779-marzen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7779-marzen.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7779.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7779.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7790-lager.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7790-lager.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7790.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7790.dtsi</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7791-henninger.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791-henninger.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7791-koelsch.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791-koelsch.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7791.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791.dtsi</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7794.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7794.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3066a-bqcurie2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3066a-bqcurie2.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3066a.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3066a.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3188-radxarock.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3188-radxarock.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3188.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3188.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-evb-act8846.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb-act8846.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-evb-rk808.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb-rk808.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-evb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-firefly.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-firefly.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-popmetal.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-popmetal.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288-thermal.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-thermal.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3288.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/rk3xxx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3xxx.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/s3c2416-smdk2416.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/s3c2416-smdk2416.dts</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/s3c2416.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/s3c2416.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sama5d3.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d3.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sama5d3xcm.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d3xcm.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sama5d4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d4.dtsi</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sh73a0-kzm9g.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sh73a0-kzm9g.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sh73a0.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sh73a0.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga_arria10.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10.dtsi</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--<span class='modechange'>[-rwxr-xr-x]</span></td><td class='mov'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10_socdk.dtsi</a> (renamed from arch/arm/boot/dts/socfpga_arria10_socdk.dts)</td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts</a> (renamed from include/linux/platform_data/irq-renesas-irqc.h)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_cyclone5_sockit.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_cyclone5_socrates.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1310-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1310-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1310.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1310.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1340-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1340-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1340.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1340.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear13xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear13xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear300-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear300-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear300.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear300.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear310-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear310-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear310.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear310.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear320-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear320-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear320.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear320.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear3xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear3xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-ccu8540.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-ccu8540.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-ccu9540.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-ccu9540.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-dbx5x0.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-dbx5x0.dtsi</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-href-stuib.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href-stuib.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-href-tvk1281618.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href-tvk1281618.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-href.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefprev60-stuib.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60-stuib.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefprev60-tvk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60-tvk.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefprev60.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus-stuib.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus-tvk.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-hrefv60plus.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-nomadik-stn8815.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/ste-snowball.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-snowball.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih407-b2120.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-b2120.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih407-family.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-family.dtsi</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih407-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-pinctrl.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih407.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih410-b2120.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih410-b2120.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih416-b2020e.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416-b2020e.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih416-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416-pinctrl.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih416.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416.dtsi</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stih418-b2199.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih418-b2199.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/stihxxx-b2120.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stihxxx-b2120.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/stm32f429-disco.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stm32f429-disco.dts</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/stm32f429.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stm32f429.dtsi</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-a1000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-a1000.dts</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-cubieboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-cubieboard.dts</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-gemei-g9.dts</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-hackberry.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-hackberry.dts</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-inet97fv2.dts</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-marsboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-marsboard.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mini-xplus.dts</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-mk802.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mk802.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-mk802ii.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mk802ii.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10-pcduino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-pcduino.dts</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun4i-a10.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10.dtsi</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a10s-mk802.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-mk802.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a10s.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s.dtsi</a></td><td class='right'>651</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-hsg-h702.dts</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a13-olinuxino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-olinuxino.dts</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-utoo-p66.dts</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i-a13.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13.dtsi</a></td><td class='right'>608</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun5i.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i.dtsi</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-app4-evb1.dts</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-colombus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-colombus.dts</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-hummingbird.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-hummingbird.dts</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-i7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-i7.dts</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-m9.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-m9.dts</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31.dtsi</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31s-cs908.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31s-cs908.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun6i-a31s.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31s.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-bananapi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-bananapi.dts</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-bananapro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-bananapro.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-cubieboard2.dts</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-cubietruck.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-cubietruck.dts</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-hummingbird.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-hummingbird.dts</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-m3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-m3.dts</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-mk808c.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-mk808c.dts</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-orangepi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-orangepi.dts</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-pcduino3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-pcduino3.dts</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun7i-a20.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20.dtsi</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a23-a33.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-a33.dtsi</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a23-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-evb.dts</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a23.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23.dtsi</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun8i-a33.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33.dtsi</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80-cubieboard4.dts</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun9i-a80-optimus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80-optimus.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sun9i-a80.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80.dtsi</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/sunxi-common-regulators.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sunxi-common-regulators.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra124-jetson-tk1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124-jetson-tk1.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra124-venice2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124-venice2.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra124.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra20-seaboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra20-seaboard.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra20.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra20.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra30-cardhu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra30-cardhu.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra30.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra30.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-ld4.dtsi</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-pro4.dtsi</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld3.dtsi</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld8.dtsi</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/uniphier-support-card.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-support-card.dtsi</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vf-colibri.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf-colibri.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vf610-cosmic.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-cosmic.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vf610-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-pinfunc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vf610-twr.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-twr.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/vf610m4-colibri.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610m4-colibri.dts</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/vf610m4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610m4.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/zx296702-ad1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zx296702-ad1.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/zx296702.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zx296702.dtsi</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-7000.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-7000.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-parallella.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-parallella.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-zc702.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zc702.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-zc706.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zc706.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-zed.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zed.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/zynq-zybo.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zybo.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/edma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/edma.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/mcpm_entry.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/mcpm_entry.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/mcpm_head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/mcpm_head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/sa1111.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/sa1111.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/at91_dt_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/at91_dt_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/efm32_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/efm32_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/exynos_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/exynos_defconfig</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/hisi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/hisi_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/imx_v6_v7_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/imx_v6_v7_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/keystone_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/keystone_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/lpc18xx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/lpc18xx_defconfig</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/multi_v7_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/multi_v7_defconfig</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/omap2plus_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/omap2plus_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/qcom_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/qcom_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/sama5_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/sama5_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/shmobile_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/shmobile_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/stm32_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/stm32_defconfig</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/sunxi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/sunxi_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/tegra_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/tegra_defconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/u8500_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/u8500_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/vf610m4_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/vf610m4_defconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/zx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/zx_defconfig</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/crypto/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/crypto/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/crypto/aes-ce-core.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/aes-ce-core.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/crypto/sha512-armv4.pl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-armv4.pl</a></td><td class='right'>649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/crypto/sha512-armv7-neon.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-armv7-neon.S</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/crypto/sha512-core.S_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-core.S_shipped</a></td><td class='right'>1861</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/crypto/sha512-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-glue.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/crypto/sha512-neon-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-neon-glue.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/crypto/sha512.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/crypto/sha512_neon_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512_neon_glue.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/assembler.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/assembler.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/cacheflush.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/cmpxchg.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/dma.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/edac.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/entry-macro-multi.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/entry-macro-multi.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/firmware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/firmware.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/futex.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/io.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/irqflags.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/kvm_asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/kvm_asm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/kvm_host.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mach/arch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/mach/arch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mcpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/mcpm.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/memory.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/memory.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/module.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/module.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pci.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/perf_event.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/pgtable-2level.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pgtable-2level.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/pmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pmu.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/proc-fns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/proc-fns.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/smp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/suspend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/suspend.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/system_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/system_info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/unified.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/unified.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/vfp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/vfp.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/xen/hypervisor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/xen/hypervisor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/xen/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/xen/page.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/debug/8250.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/8250.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/debug/efm32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/efm32.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/debug/imx-uart.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/imx-uart.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/debug/pl01x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/pl01x.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/armksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/armksyms.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/debug.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/debug.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-armv.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-armv.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-common.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-common.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-ftrace.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-ftrace.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-v7m.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-v7m.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/head-nommu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/head-nommu.S</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/head.S</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/kernel/module-plts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module-plts.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/kernel/module.lds?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module.lds</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_cpu.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_v6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_v6.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_v7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_v7.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_xscale.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_xscale.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/reboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/reboot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/setup.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/sleep.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/sleep.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/smp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/tcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/tcm.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/traps.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/arm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/arm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/interrupts.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/interrupts.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/interrupts_head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/interrupts_head.S</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/mmu.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kvm/psci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/psci.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/lib/call_with_stack.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/call_with_stack.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/lib/lib1funcs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/lib1funcs.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/lib/memcpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/memcpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/lib/memset.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/memset.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/Makefile.boot</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91_ramc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/include/mach/at91_ramc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91rm9200_mc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/include/mach/at91rm9200_mc.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9_smc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/include/mach/at91sam9_smc.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm_suspend.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm_suspend.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/sam9_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/sam9_smc.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-at91/sam9_smc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/sam9_smc.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-bcm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-bcm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-bcm/bcm63xx_headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_headsmp.S</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-bcm/bcm63xx_pmb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_pmb.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-bcm/bcm63xx_smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_smp.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-bcm/bcm63xx_smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_smp.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-bcm/bcm_5301x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm_5301x.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-bcm/board_bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/board_bcm2835.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-bcm/brcmstb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/brcmstb.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-bcm/headsmp-brcmstb.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/headsmp-brcmstb.S</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-bcm/platsmp-brcmstb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/platsmp-brcmstb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-berlin/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-berlin/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/headsmp.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-berlin/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/platsmp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/da850.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/da850.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/da8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/include/mach/da8xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/pm_domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/pm_domain.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-dove/include/mach/irqs.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-dove/irq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/simone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ep93xx/simone.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/exynos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/exynos.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/firmware.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/firmware.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/platsmp.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pm.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pm_domains.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pm_domains.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pmu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/suspend.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-footbridge/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-gemini/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-gemini/gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-hisi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-hisi/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-hisi/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/headsmp.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-hisi/platmcpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/platmcpm.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-hisi/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/platsmp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Kconfig</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Makefile</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Makefile.boot</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/anatop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/anatop.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/common.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/cpuidle-imx6q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6q.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/cpuidle-imx6sl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6sl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/cpuidle-imx6sx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6sx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/gpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/gpc.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/hardware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/hardware.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/headsmp.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/iomux-imx31.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/iomux-imx31.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-cpuimx35.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-cpuimx35.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx6q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6q.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx6sl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6sl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx6sx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6sx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx7d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx7d.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-vf610.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-vf610.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mmdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mmdc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mx27.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mx27.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mx3x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mx3x.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mxc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mxc.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/pm-imx5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/pm-imx5.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/pm-imx6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/pm-imx6.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/suspend-imx53.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/suspend-imx53.S</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/time.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/integrator_ap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-integrator/integrator_ap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop13xx/include/mach/time.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-iop13xx/include/mach/time.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/include/mach/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ixp4xx/include/mach/platform.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-keystone/keystone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/keystone.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-keystone/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/platsmp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-keystone/pm_domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/pm_domain.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ks8695/include/mach/hardware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ks8695/include/mach/hardware.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-lpc18xx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-lpc18xx/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/Makefile.boot</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-lpc18xx/board-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/board-dt.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc32xx/clock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc32xx/irq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mvebu/headsmp-a9.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/headsmp-a9.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mvebu/platsmp-a9.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/platsmp-a9.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mvebu/pm-board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/pm-board.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-nspire/nspire.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-nspire/nspire.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/ams-delta-fiq-handler.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/ams-delta-fiq-handler.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-ams-delta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-ams-delta.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-fsample.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-fsample.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-generic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-h2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-h3-mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h3-mmc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-h3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h3.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-htcherald.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-htcherald.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-innovator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-innovator.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-nokia770.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-nokia770.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-osk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-osk.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmte.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmte.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmtt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmtt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmz71.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmz71.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-perseus2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-perseus2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-sx1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-sx1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-voiceblue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-voiceblue.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/gpio16xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/gpio16xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/gpio7xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/gpio7xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-omap1/include/mach/entry-macro.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/entry-macro.S</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/irqs.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/include/mach/memory.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/memory.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/include/mach/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/serial.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/include/mach/soc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/soc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/irq.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/mux.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/pm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/pm_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/pm_bus.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/serial.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-cm-t35.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/board-cm-t35.c</a></td><td class='right'>769</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3beagle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/board-omap3beagle.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-overo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/board-overo.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/control.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/control.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/control.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/control.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/devices.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/devices.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/display.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/dma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/fb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/gpmc-onenand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/gpmc-onenand.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/hsmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/hsmmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-omap2/hwspinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/hwspinlock.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap-wakeupgen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap-wakeupgen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_device.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_33xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_data.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_43xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_43xx_data.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_7xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_7xx_data.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_81xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_81xx_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/opp2430_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/opp2430_data.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pdata-quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/pdata-quirks.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/prcm43xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/prcm43xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/sdrc2xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sdrc2xxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/serial.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/sram242x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sram242x.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/sram243x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sram243x.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/headsmp.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/rtciobrg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/rtciobrg.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/capc7117.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/capc7117.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-pxa/clock-pxa2xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/clock-pxa2xx.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-pxa/clock-pxa3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/clock-pxa3xx.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-pxa/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/clock.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-pxa/clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/clock.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/cm-x2xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/cm-x2xx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/cm-x300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/cm-x300.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/colibri-pxa270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/colibri-pxa270.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/em-x270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/em-x270.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/eseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/eseries.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/generic.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/generic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/icontrol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/icontrol.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/lubbock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/lubbock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/mp900.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/mp900.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pxa25x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa25x.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pxa27x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa27x.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pxa300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa300.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pxa320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa320.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pxa3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa3xx.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/raumfeld.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/raumfeld.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/tosa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/tosa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/trizeps4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/trizeps4.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/vpac270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/vpac270.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/zeus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/zeus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-realview/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-realview/core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-rockchip/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-rockchip/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/headsmp.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-rockchip/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/platsmp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/generic.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/neponset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/neponset.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/headsmp-scu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/headsmp-scu.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/headsmp.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/platsmp-apmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/platsmp-apmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-r8a7740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/setup-r8a7740.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/core.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/headsmp.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/platsmp.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-socfpga/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/pm.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-socfpga/self-refresh.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/self-refresh.S</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-socfpga/socfpga.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/socfpga.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/generic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/irqs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/include/mach/misc_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/misc_regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/include/mach/spear.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/spear.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/include/mach/uncompress.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/uncompress.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/pl080.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/pl080.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/pl080.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/pl080.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/restart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/restart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear1310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear1310.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear1340.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear1340.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear13xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear13xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear300.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear310.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear320.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear/spear3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear3xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sti/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sti/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-stm32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-stm32/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/Makefile.boot</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-stm32/board-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/board-dt.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sunxi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sunxi/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/platsmp.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sunxi/sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/sunxi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/cpuidle-tegra20.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/cpuidle-tegra20.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/headsmp.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/reset-handler.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset-handler.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/reset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/sleep-tegra20.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep-tegra20.S</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/sleep-tegra30.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep-tegra30.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/sleep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/tegra.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-uniphier/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-uniphier/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-uniphier/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/platsmp.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-uniphier/uniphier.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/uniphier.c</a> (renamed from arch/ia64/kernel/paravirt_patchlist.h)</td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cache-l2x0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cache-l2x0.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpu-db8500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cpu-db8500.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cpu.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/id.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/id.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/platsmp.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/pm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/setup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/setup.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-versatile/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-versatile/core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-vexpress/spc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-vexpress/spc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/core.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/headsmp.S</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/platsmp.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-zx/zx296702.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/zx296702.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-zynq/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/common.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-zynq/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-zynq/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/headsmp.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-zynq/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/platsmp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-zynq/slcr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/slcr.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-l2x0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/cache-l2x0.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/dma-mapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/dma-mapping.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/highmem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/ioremap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/ioremap.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/mmu.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/nommu.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-v7-2level.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7-2level.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-v7-3level.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7-3level.S</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-v7.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7.S</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-v7m.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7m.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mm/pv-fixup-asm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/pv-fixup-asm.S</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/net/bpf_jit_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/net/bpf_jit_32.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-omap/dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-orion/common.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-samsung/adc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vdso/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/vdso/vdsomunge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vdso/vdsomunge.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/vfp/vfpmodule.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vfp/vfpmodule.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/xen/enlighten.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/enlighten.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/xen/mm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/mm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/xen/p2m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/p2m.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/apm/apm-mustang.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/apm/apm-mustang.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/apm/apm-storm.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/juno-base.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/juno-clocks.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-clocks.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/juno-motherboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-motherboard.dtsi</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/juno-r1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-r1.dts</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/juno.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno.dts</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/hisilicon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/mediatek/mt8173.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/msm8916.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/boot/dts/qcom/pm8916.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/pm8916.dtsi</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm64/boot/dts/skeleton.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/skeleton.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/configs/defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/configs/defconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/crypto/aes-ce-ccm-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/crypto/aes-ce-ccm-glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/acpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/acpi.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm64/include/asm/alternative-asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/alternative-asm.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/alternative.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/alternative.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm64/include/asm/boot.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/boot.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cacheflush.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/cpu_ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpu_ops.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/cpufeature.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpufeature.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/cpuidle.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpuidle.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/dma-mapping.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/fixmap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/fixmap.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/futex.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/insn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/insn.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/io.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/kvm_asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/kvm_asm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/kvm_host.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/mmu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/perf_event.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/proc-fns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/proc-fns.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/processor.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/psci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/psci.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/smp_plat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/smp_plat.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/suspend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/suspend.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/system_misc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/system_misc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/tlbflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/tlbflush.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/acpi.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/alternative.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/alternative.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/cpu_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpu_ops.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/cpufeature.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpufeature.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/cpuidle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpuidle.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/efi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/entry.S</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/entry32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/entry32.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/fpsimd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/fpsimd.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/head.S</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/hw_breakpoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/hw_breakpoint.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/insn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/insn.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/perf_event.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/process.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/psci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/psci.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/setup.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/signal32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/signal32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/sleep.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/sleep.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/smp.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/smp_spin_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/smp_spin_table.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/suspend.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/traps.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/vdso/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/vmlinux.lds.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kvm/hyp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/hyp.S</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kvm/vgic-v2-switch.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/vgic-v2-switch.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/kvm/vgic-v3-switch.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/vgic-v3-switch.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/cache.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/cache.S</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/context.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/context.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/dma-mapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/dma-mapping.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/fault.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/flush.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/flush.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/hugetlbpage.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/mmu.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/mm/proc.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/proc.S</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/net/bpf_jit.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm64/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/net/bpf_jit_comp.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/dma-mapping.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/uaccess.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/mach-at32ap/extint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/mach-at32ap/extint.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/bfin_serial.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/kernel/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/c6x/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/drivers/eeprom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v10/drivers/eeprom.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/drivers/sync_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v32/drivers/sync_serial.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/mm/intmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v32/mm/intmem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/dma-mapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/mm/fault.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/dma-mapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/io.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/pci.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/sections.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/sections.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/mb93090-mb00/flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/flash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/mb93090-mb00/pci-dma-nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/pci-dma-nommu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/mb93090-mb00/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/pci-dma.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mm/highmem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Kconfig</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/Kconfig.cpu?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Kconfig.cpu</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Makefile</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/compressed/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/Makefile</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/head.S</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/compressed/misc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/misc.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/compressed/vmlinux.lds?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/vmlinux.lds</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/compressed/vmlinux.scr?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/vmlinux.scr</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/dts/edosk2674.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/edosk2674.dts</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/dts/h8300h_sim.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/h8300h_sim.dts</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/boot/dts/h8s_sim.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/h8s_sim.dts</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/configs/edosk2674_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/edosk2674_defconfig</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/configs/h8300h-sim_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/h8300h-sim_defconfig</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/configs/h8s-sim_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/h8s-sim_defconfig</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/Kbuild</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/atomic.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bitops.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/bitsperlong.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bitsperlong.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/bug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bug.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/byteorder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/byteorder.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/cache.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/cmpxchg.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/dma-mapping.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/elf.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/flat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/flat.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/io.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/irq.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/irqflags.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/mc146818rtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/mc146818rtc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/mutex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/mutex.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/page.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/page_offset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/page_offset.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/pci.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/pgtable.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/processor.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/ptrace.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/segment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/segment.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/signal.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/smp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/string.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/string.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/switch_to.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/switch_to.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/syscall.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/syscall.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/thread_info.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/tlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/tlb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/traps.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/user.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/Kbuild</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/byteorder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/byteorder.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/ptrace.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/sigcontext.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/signal.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/uapi/asm/unistd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/unistd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/asm-offsets.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/dma.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/entry.S</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/h8300_ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/h8300_ksyms.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/head_ram.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/head_ram.S</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/head_rom.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/head_rom.S</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/irq.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/module.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/process.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/ptrace_h.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace_h.c</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/ptrace_s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace_s.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/setup.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/signal.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/sim-console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/sim-console.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/syscalls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/syscalls.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/traps.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/vmlinux.lds.S</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/abs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/abs.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/ashldi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ashldi3.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/ashrdi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ashrdi3.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/delay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/delay.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/libgcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/libgcc.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/lshrdi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/lshrdi3.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/memcpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/memcpy.S</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/memset.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/memset.S</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/moddivsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/moddivsi3.S</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/modsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/modsi3.S</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/muldi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/muldi3.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/mulsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/mulsi3.S</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/strncpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/strncpy.S</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/ucmpdi2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ucmpdi2.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/lib/udivsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/udivsi3.S</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/fault.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/init.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/mm/memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/memory.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/cmpxchg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/uaccess.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/hp/sim/simscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/hp/sim/simscsi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/barrier.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/hw_irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/hw_irq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/intrinsics.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/intrinsics.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/iosapic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/iosapic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/irq_remapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/irq_remapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/module.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/module.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/native/inst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/native/inst.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/include/asm/native/pvchk_inst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/native/pvchk_inst.h</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/include/asm/paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/paravirt.h</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/include/asm/paravirt_patch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/paravirt_patch.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/include/asm/paravirt_privop.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/paravirt_privop.h</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/pci.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/uapi/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/uapi/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/efi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/entry.S</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/fsys.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/fsys.S</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/gate.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/gate.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/gate.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/gate.lds.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/head.S</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/ia64_ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/ia64_ksyms.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/ivt.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/ivt.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/mca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/mca.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/minstate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/minstate.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/module.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/msi_ia64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/msi_ia64.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/kernel/paravirt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/paravirt.c</a></td><td class='right'>902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/kernel/paravirt_inst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/paravirt_inst.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/kernel/paravirt_patch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/paravirt_patch.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/kernel/paravirt_patchlist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/paravirt_patchlist.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/kernel/paravirtentry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/paravirtentry.S</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/patch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/patch.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/setup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/smpboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/smpboot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/time.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/vmlinux.lds.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/init.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/mm/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/numa.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/ia64/scripts/pvcheck.sed?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/scripts/pvcheck.sed</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/sn/kernel/mca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/sn/kernel/mca.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/uaccess.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/mm/fault.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/68000/m68EZ328.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68000/m68EZ328.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/68000/m68VZ328.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68000/m68VZ328.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/68360/config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68360/config.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/Kconfig.cpu?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/Kconfig.cpu</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/amiga_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/amiga_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/apollo_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/apollo_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/atari_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/atari_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/bvme6000_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/bvme6000_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/hp300_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/hp300_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5208evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5208evb_defconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5249evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5249evb_defconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5272c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5272c3_defconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5275evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5275evb_defconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5307c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5307c3_defconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5407c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5407c3_defconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/m5475evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5475evb_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/mac_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mac_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/multi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/multi_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/mvme147_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mvme147_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/mvme16x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mvme16x_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/q40_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/q40_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/sun3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/sun3_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/configs/sun3x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/sun3x_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/cmpxchg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/coldfire.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/coldfire.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/io_mm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/io_mm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/io_no.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/io_no.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/irqflags.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/serial.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/kernel/dma.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/mac/psc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/mac/psc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/dma-mapping.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/io.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/highmem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/metag/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/pci.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/uaccess.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/cpu/cpuinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/cpu/cpuinfo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/dma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/kgdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/kgdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/mm/fault.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/mm/highmem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Kbuild.platforms?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Kbuild.platforms</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Kconfig</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/alchemy/common/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/alchemy/common/clock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath25/ar2315.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/ar2315.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath25/ar5312.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/ar5312.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath25/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/board.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/clock.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/common.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/dev-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/dev-common.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/gpio.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/irq.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/machtypes.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/machtypes.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/setup.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/board.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/buttons.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/buttons.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/leds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/leds.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/prom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/sprom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/sprom.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bmips/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bmips/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bmips/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bmips/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/head.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/compressed/ld.script?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/ld.script</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/compressed/uart-16550.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/uart-16550.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm7346.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm7358.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7358.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm7360.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm7362.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm7435.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7435.dtsi</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97346dbsmb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm97358svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97358svmb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm97360svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97360svmb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm97362svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97362svmb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/brcm/bcm97435svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97435svmb.dts</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/ingenic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/ingenic/ci20.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/ci20.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/ingenic/jz4740.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/jz4740.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/ingenic/jz4780.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/jz4780.dtsi</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/ingenic/qi_lb60.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/qi_lb60.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/boot/dts/mti/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/mti/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/mti/malta.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/mti/malta.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/qca/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/qca/ar9132.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/ar9132.dtsi</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cavium-octeon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cavium-octeon/octeon-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/octeon-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cobalt/mtd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cobalt/mtd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/configs/ci20_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/ci20_defconfig</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/fuloong2e_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/fuloong2e_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/lemote2f_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/lemote2f_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/loongson3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/loongson3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/ls1b_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/ls1b_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/maltasmvp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/maltasmvp_defconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/pistachio_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/pistachio_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/qi_lb60_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/qi_lb60_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/asmmacro.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/asmmacro.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/barrier.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/bitops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/bmips-spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/bmips-spaces.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/cpu-features.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu-features.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/cpu-type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu-type.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/dma-mapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/edac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/fpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/fpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/hazards.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/hazards.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/i8259.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/i8259.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/irqflags.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/kgdb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/kgdb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/kvm_host.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/ath79.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ath79.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ath79_spi_platform.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bcm63xx/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm63xx/spaces.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bmips/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bmips/spaces.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-dec/cpu-feature-overrides.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-generic/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-generic/irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-generic/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-generic/spaces.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-jz4740/clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/clock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-jz4740/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/irq.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-jz4740/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/platform.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson/workarounds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson/workarounds.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/cpufreq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/cpufreq.h</a> (renamed from arch/mips/include/asm/mach-loongson1/cpufreq.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/irq.h</a> (renamed from arch/mips/include/asm/mach-loongson1/irq.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/loongson1.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/loongson1.h</a> (renamed from arch/mips/include/asm/mach-loongson1/loongson1.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/platform.h</a> (renamed from arch/mips/include/asm/mach-loongson1/platform.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/prom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/prom.h</a> (renamed from arch/mips/include/asm/mach-loongson1/prom.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/regs-clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-clk.h</a> (renamed from arch/mips/include/asm/mach-loongson1/regs-clk.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/regs-mux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-mux.h</a> (renamed from arch/mips/include/asm/mach-loongson1/regs-mux.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/regs-pwm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-pwm.h</a> (renamed from arch/mips/include/asm/mach-loongson1/regs-pwm.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson32/regs-wdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-wdt.h</a> (renamed from arch/mips/include/asm/mach-loongson1/regs-wdt.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/boot_param.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/boot_param.h</a> (renamed from arch/mips/include/asm/mach-loongson/boot_param.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h</a> (renamed from arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h</a> (renamed from arch/mips/include/asm/mach-loongson/cs5536/cs5536.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_mfgpt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_mfgpt.h</a> (renamed from arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_pci.h</a> (renamed from arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_vsm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_vsm.h</a> (renamed from arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/dma-coherence.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/dma-coherence.h</a> (renamed from arch/mips/include/asm/mach-loongson/dma-coherence.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/gpio.h</a> (renamed from arch/mips/include/asm/mach-loongson/gpio.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/irq.h</a> (renamed from arch/mips/include/asm/mach-loongson/irq.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/kernel-entry-init.h</a> (renamed from arch/mips/include/asm/mach-loongson/kernel-entry-init.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/loongson.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/loongson.h</a> (renamed from arch/mips/include/asm/mach-loongson/loongson.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/loongson_hwmon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/loongson_hwmon.h</a> (renamed from arch/mips/include/asm/mach-loongson/loongson_hwmon.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/machine.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/machine.h</a> (renamed from arch/mips/include/asm/mach-loongson/machine.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/mc146818rtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mc146818rtc.h</a> (renamed from arch/mips/include/asm/mach-loongson/mc146818rtc.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/mem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mem.h</a> (renamed from arch/mips/include/asm/mach-loongson/mem.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/mmzone.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mmzone.h</a> (renamed from arch/mips/include/asm/mach-loongson/mmzone.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/pci.h</a> (renamed from arch/mips/include/asm/mach-loongson/pci.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/spaces.h</a> (renamed from arch/mips/include/asm/mach-loongson/spaces.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/topology.h</a> (renamed from arch/mips/include/asm/mach-loongson/topology.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-loongson64/workarounds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/workarounds.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-sibyte/war.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-sibyte/war.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mips-cm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mips-cm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mipsregs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mipsregs.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pci.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/pgtable-32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pgtable-32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pgtable.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/prom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/prom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/smp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/spinlock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/txx9irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/txx9irq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/uaccess.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/xtalk/xwidget.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/xtalk/xwidget.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/uapi/asm/sigcontext.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Platform</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/board-qi_lb60.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/board-qi_lb60.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/clock-debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/clock-debugfs.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/clock.c</a></td><td class='right'>924</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/clock.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/gpio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/irq.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/platform.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/pm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/prom.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/reset.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/serial.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/jz4740/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/serial.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/setup.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/time.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/asm-offsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/branch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/branch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/cps-vec.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/cps-vec.S</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/cpu-probe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/cpu-probe.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/head.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/i8259.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/irq.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/kgdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/kgdb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/prom.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/scall32-o32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/scall32-o32.S</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/scall64-o32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/scall64-o32.S</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/setup.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/signal-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/signal-common.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/smp-cps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/smp-cps.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/smp.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/kernel/sysrq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/sysrq.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/traps.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/vmlinux.lds.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kvm/mips.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kvm/mips.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lib/dump_tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/lib/dump_tlb.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lib/r3k_dump_tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/lib/r3k_dump_tlb.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Kconfig</a> (renamed from arch/mips/loongson1/Kconfig)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Makefile</a> (renamed from arch/mips/loongson1/Makefile)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Platform</a> (renamed from arch/mips/loongson1/Platform)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/Makefile</a> (renamed from arch/mips/loongson1/common/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/irq.c</a> (renamed from arch/mips/loongson1/common/irq.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/platform.c</a> (renamed from arch/mips/loongson1/common/platform.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/prom.c</a> (renamed from arch/mips/loongson1/common/prom.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/reset.c</a> (renamed from arch/mips/loongson1/common/reset.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/setup.c</a> (renamed from arch/mips/loongson1/common/setup.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/common/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/time.c</a> (renamed from arch/mips/loongson1/common/time.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/ls1b/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/ls1b/Makefile</a> (renamed from arch/mips/loongson1/ls1b/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson32/ls1b/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/ls1b/board.c</a> (renamed from arch/mips/loongson1/ls1b/board.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Kconfig</a> (renamed from arch/mips/loongson/Kconfig)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Makefile</a> (renamed from arch/mips/loongson/Makefile)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Platform</a> (renamed from arch/mips/loongson/Platform)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/Makefile</a> (renamed from arch/mips/loongson/common/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/bonito-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/bonito-irq.c</a> (renamed from arch/mips/loongson/common/bonito-irq.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cmdline.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cmdline.c</a> (renamed from arch/mips/loongson/common/cmdline.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/Makefile</a> (renamed from arch/mips/loongson/common/cs5536/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_acc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_acc.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_acc.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_ehci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ehci.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_ehci.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_ide.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ide.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_ide.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_isa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_isa.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_isa.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_mfgpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_mfgpt.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_mfgpt.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_ohci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ohci.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_ohci.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/cs5536/cs5536_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_pci.c</a> (renamed from arch/mips/loongson/common/cs5536/cs5536_pci.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/dma-swiotlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/dma-swiotlb.c</a> (renamed from arch/mips/loongson/common/dma-swiotlb.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/early_printk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/early_printk.c</a> (renamed from arch/mips/loongson/common/early_printk.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/env.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/env.c</a> (renamed from arch/mips/loongson/common/env.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/init.c</a> (renamed from arch/mips/loongson/common/init.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/irq.c</a> (renamed from arch/mips/loongson/common/irq.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/machtype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/machtype.c</a> (renamed from arch/mips/loongson/common/machtype.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/mem.c</a> (renamed from arch/mips/loongson/common/mem.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/pci.c</a> (renamed from arch/mips/loongson/common/pci.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/platform.c</a> (renamed from arch/mips/loongson/common/platform.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/pm.c</a> (renamed from arch/mips/loongson/common/pm.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/reset.c</a> (renamed from arch/mips/loongson/common/reset.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/rtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/rtc.c</a> (renamed from arch/mips/loongson/common/rtc.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/serial.c</a> (renamed from arch/mips/loongson/common/serial.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/setup.c</a> (renamed from arch/mips/loongson/common/setup.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/time.c</a> (renamed from arch/mips/loongson/common/time.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/common/uart_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/uart_base.c</a> (renamed from arch/mips/loongson/common/uart_base.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/fuloong-2e/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/Makefile</a> (renamed from arch/mips/loongson/fuloong-2e/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/fuloong-2e/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/irq.c</a> (renamed from arch/mips/loongson/fuloong-2e/irq.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/fuloong-2e/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/reset.c</a> (renamed from arch/mips/loongson/fuloong-2e/reset.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/Makefile</a> (renamed from arch/mips/loongson/lemote-2f/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/clock.c</a> (renamed from arch/mips/loongson/lemote-2f/clock.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/ec_kb3310b.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/ec_kb3310b.c</a> (renamed from arch/mips/loongson/lemote-2f/ec_kb3310b.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/ec_kb3310b.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/ec_kb3310b.h</a> (renamed from arch/mips/loongson/lemote-2f/ec_kb3310b.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/irq.c</a> (renamed from arch/mips/loongson/lemote-2f/irq.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/machtype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/machtype.c</a> (renamed from arch/mips/loongson/lemote-2f/machtype.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/pm.c</a> (renamed from arch/mips/loongson/lemote-2f/pm.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/lemote-2f/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/reset.c</a> (renamed from arch/mips/loongson/lemote-2f/reset.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/Makefile</a> (renamed from arch/mips/loongson/loongson-3/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/cop2-ex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/cop2-ex.c</a> (renamed from arch/mips/loongson/loongson-3/cop2-ex.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/hpet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/hpet.c</a> (renamed from arch/mips/loongson/loongson-3/hpet.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/irq.c</a> (renamed from arch/mips/loongson/loongson-3/irq.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/numa.c</a> (renamed from arch/mips/loongson/loongson-3/numa.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/platform.c</a> (renamed from arch/mips/loongson/loongson-3/platform.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/smp.c</a> (renamed from arch/mips/loongson/loongson-3/smp.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/mips/loongson64/loongson-3/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/smp.h</a> (renamed from arch/mips/loongson/loongson-3/smp.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/math-emu/cp1emu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/math-emu/cp1emu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/c-r4k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/c-r4k.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/c-tx39.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/c-tx39.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/dma-default.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/dma-default.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/highmem.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/tlb-r3k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlb-r3k.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/tlb-r4k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlb-r4k.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/tlbex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlbex.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mti-malta/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/mti-malta/malta-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-dt.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mti-malta/malta-setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mti-malta/malta-time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-time.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mti-sead3/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-sead3/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/net/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/net/bpf_jit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/net/bpf_jit_asm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit_asm.S</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/netlogic/xlr/platform-flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/netlogic/xlr/platform-flash.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/fixup-cobalt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/fixup-cobalt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/ops-mace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/ops-mace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-ar2315.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar2315.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-ar71xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar71xx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-ar724x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar724x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-lantiq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-lantiq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-rt3883.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-rt3883.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pistachio/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pistachio/init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pistachio/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pistachio/time.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ralink/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ralink/irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sgi-ip27/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sgi-ip27/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/sgi-ip27/ip27-irqno.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sgi-ip27/ip27-irqno.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sibyte/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sibyte/common/bus_watcher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/common/bus_watcher.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sibyte/sb1250/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/sb1250/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/txx9/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/txx9/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/vr41xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/vr41xx/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/highmem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/highmem.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/pci.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/serial.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/kernel/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/unit-asb2303/flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/unit-asb2303/flash.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/nios2/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/nios2/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/nios2/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/kernel/time.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/nios2/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/openrisc/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/openrisc/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/cacheflush.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/dma-mapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pci.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/pgalloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pgalloc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pgtable.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/tlbflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/tlbflush.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/cache.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/entry.S</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/pci-dma.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/pdc_cons.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/pdc_cons.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/perf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/perf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/traps.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Kconfig.debug</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Makefile</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/b4qds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/b4qds.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4420si-post.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4860si-post.dtsi</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/b4si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4si-post.dtsi</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p1023si-post.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p2041si-post.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p3041si-post.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p4080si-post.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p5020si-post.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p5040si-post.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1023si-post.dtsi</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1024si-post.dtsi</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1040si-post.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t2081si-post.dtsi</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t4240si-post.dtsi</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/kmcoge4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/kmcoge4.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/oca4080.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/oca4080.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p1023rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p1023rdb.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p2041rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p2041rdb.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p3041ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p3041ds.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p4080ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p4080ds.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p5020ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p5020ds.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/p5040ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p5040ds.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t1023rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1023rdb.dts</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t1024qds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1024qds.dts</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t1024rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1024rdb.dts</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t104xqds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t104xqds.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t104xrdb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t104xrdb.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t208xqds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t208xqds.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t208xrdb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t208xrdb.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t4240qds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t4240qds.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/t4240rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t4240rdb.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/libfdt_env.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/of.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/of.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/configs/le.config?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/le.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/ppc64_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/ppc64_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/pseries_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/pseries_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/powerpc/configs/pseries_le_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/pseries_le_defconfig</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/crypto/md5-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/crypto/md5-glue.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/barrier.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cmpxchg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/cputable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cputable.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/cputhreads.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cputhreads.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/device.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/edac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/eeh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/eeh.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/hugetlb.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/asm/icswx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/icswx.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/iommu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/iommu.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_book3s_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_book3s_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_host.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_ppc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_ppc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/machdep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/machdep.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/asm/mm-arch-hooks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mm-arch-hooks.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/mmu-8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu-8xx.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/mmu-hash64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu-hash64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/mmu_context.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu_context.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/opal-api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/opal-api.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/opal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/opal.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/page.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pci-bridge.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pci-bridge.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pci.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pgtable-ppc32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pgtable-ppc32.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pgtable-ppc64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pgtable-ppc64.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pnv-pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pnv-pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/ppc-opcode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/ppc-opcode.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/processor.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pte-8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-8xx.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pte-book3e.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-book3e.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pte-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pte-hash64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-hash64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/systbl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/systbl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/trace.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/uaccess.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/vio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/vio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/uapi/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/uapi/asm/cputable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/cputable.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/uapi/asm/eeh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/eeh.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/uapi/asm/opal-prd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/opal-prd.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/uapi/asm/tm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/tm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/asm-offsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/cputable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/cputable.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/dma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/eeh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/eeh_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh_cache.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/eeh_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh_driver.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/entry_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/entry_64.S</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/exceptions-64s.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/exceptions-64s.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/head_8xx.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/head_8xx.S</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/idle_e500.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/idle_e500.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/idle_power7.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/idle_power7.S</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/iommu.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/msi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/pci-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/pci-common.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/pci-hotplug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/pci-hotplug.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/process.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/prom.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/prom_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/prom_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/setup_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/setup_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/sysfs.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/time.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/tm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/tm.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/traps.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/vdso.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/vdso.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/vio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/vio.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_hv.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_pr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_pr.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/booke.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/booke.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/powerpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/powerpc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/vmx-helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/lib/vmx-helper.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/copro_fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/copro_fault.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/fault.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/hash_native_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hash_native_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/hash_utils_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hash_utils_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/highmem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hugetlbpage.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/mmu_context_hash64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mmu_context_hash64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/mm/mmu_context_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mmu_context_iommu.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/pgtable_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/pgtable_64.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/tlb_low_64e.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/tlb_low_64e.S</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/tlb_nohash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/tlb_nohash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/perf/core-book3s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/perf/core-book3s.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/perf/hv-24x7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/perf/hv-24x7.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/52xx/mpc52xx_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/52xx/mpc52xx_pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/83xx/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/83xx/suspend.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/85xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/85xx/corenet_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/corenet_generic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/85xx/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/smp.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/85xx/twr_p102x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/twr_p102x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/Kconfig.cputype?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/Kconfig.cputype</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/axon_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/axon_msi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/iommu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/spufs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/spufs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pasemi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pasemi/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/iommu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/powerpc/platforms/pasemi/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/msi.c</a> (renamed from arch/powerpc/sysdev/mpic_pasemi_msi.c)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/eeh-powernv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/eeh-powernv.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/idle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/idle.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-async.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-async.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-dump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-dump.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-elog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-elog.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-hmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-hmi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-irqchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-memory-errors.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-memory-errors.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-prd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-prd.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-sensor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-sensor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-sysparam.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-sysparam.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal-wrappers.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-wrappers.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/opal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/pci-ioda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci-ioda.c</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/pci-p5ioc2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci-p5ioc2.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/powernv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/powernv.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powernv/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/setup.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/ps3/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/ps3/time.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/dlpar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/dlpar.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/eeh_pseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/eeh_pseries.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/iommu.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/msi.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/dart_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/dart_iommu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/fsl_lbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/fsl_lbc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/fsl_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/fsl_msi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/i8259.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/ipic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ipic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mpc8xx_pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpc8xx_pic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mpic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mpic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mpic_u3msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic_u3msi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mv64x60_pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mv64x60_pic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/ppc4xx_hsta_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ppc4xx_hsta_msi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/ppc4xx_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ppc4xx_msi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/qe_lib/qe_ic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/qe_lib/qe_ic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/tsi108_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/tsi108_pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/uic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/uic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/xics/icp-native.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xics/icp-native.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/xics/xics-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xics/xics-common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/xilinx_intc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xilinx_intc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/configs/default_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/default_defconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/configs/gcov_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/gcov_defconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/configs/performance_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/performance_defconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/defconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/hypfs/hypfs_sprp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/hypfs/hypfs_sprp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/hypfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/hypfs/inode.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/cpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/ctl_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/ctl_reg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/hugetlb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/ipl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/ipl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/kvm_host.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/perf_event.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/pgtable.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/sclp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/sclp.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/timex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/timex.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/topology.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/uaccess.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/base.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/base.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/compat_wrapper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/compat_wrapper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/crash_dump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/crash_dump.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/debug.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/entry.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/nmi.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/perf_cpum_sf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/perf_cpum_sf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/sclp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/sclp.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/setup.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/smp.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/suspend.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/time.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/intercept.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/intercept.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/interrupt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/interrupt.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/kvm-s390.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/kvm-s390.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/kvm-s390.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/kvm-s390.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/priv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/priv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/hugetlbpage.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/mem_detect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/mem_detect.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/net/bpf_jit.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/net/bpf_jit_comp.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/oprofile/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/oprofile/init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/pci/pci_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/pci/pci_event.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/uaccess.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/mm/fault.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-highlander/psw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/boards/mach-highlander/psw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-landisk/psw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/boards/mach-landisk/psw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/ops-sh5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/drivers/pci/ops-sh5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/pci-sh5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/drivers/pci/pci-sh5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/hugetlb.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/pci.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-sh7734.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7734.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-sh7757.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7757.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-sh7785.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7785.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-sh7786.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7786.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-shx3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-shx3.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/mm/fault.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/crypto/md5_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/crypto/md5_glue.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/barrier_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/barrier_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cmpxchg_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/cmpxchg_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cmpxchg_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/cmpxchg_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/io_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/io_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/io_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/io_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pci_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pci_32.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pci_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pci_64.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pgtable_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pgtable_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/topology_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/topology_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/uaccess_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/uaccess_64.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/iommu_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/iommu_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/ldc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/ldc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/perf_event.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/time_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/time_32.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/time_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/time_64.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/fault_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/fault_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/fault_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/fault_64.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/highmem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/init_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/init_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/atomic_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/atomic_64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/tile/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/edac.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/hugetlb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/irq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/pgtable.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/processor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/spinlock_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/spinlock_32.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/spinlock_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/spinlock_64.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/stack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/stack.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/thread_info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/traps.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/uaccess.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/include/asm/word-at-a-time.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/word-at-a-time.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/hv/hypervisor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/hv/hypervisor.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/entry.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/hvglue.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/hvglue.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/hvglue_trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/hvglue_trace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/intvec_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/intvec_64.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/process.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/stack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/stack.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/traps.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/vdso/vgettimeofday.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/vdso/vgettimeofday.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/exports.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/exports.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/memcpy_user_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/memcpy_user_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/spinlock_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/spinlock_32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/spinlock_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/spinlock_64.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/usercopy_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/usercopy_32.S</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/usercopy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/usercopy_64.S</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/elf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/elf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/fault.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/highmem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/hugetlbpage.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/Kconfig.um?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/Kconfig.um</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/harddog_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/harddog_user.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/hostaudio_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/hostaudio_kern.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/mconsole.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/mconsole.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/net_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/net_user.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/slip_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/slip_user.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/slirp_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/slirp_user.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/ptrace-generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/ptrace-generic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/um/include/asm/sections.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/sections.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/thread_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/uaccess.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/shared/init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/init.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/shared/os.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/os.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/shared/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/user.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/ksyms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/physmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/physmem.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/ptrace.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/skas/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/mmu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/skas/syscall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/syscall.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/skas/uaccess.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/uaccess.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/trap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/trap.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/um_arch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/um_arch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/drivers/ethertap_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/drivers/ethertap_user.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/drivers/tuntap_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/drivers/tuntap_user.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/signal.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/skas/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/skas/mem.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/skas/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/skas/process.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/include/asm/pci.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/kernel/fpu-ucf64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/kernel/fpu-ucf64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kbuild</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kconfig</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kconfig.debug</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/compressed/eboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/boot/compressed/eboot.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/configs/xen.config?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/configs/xen.config</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/aesni-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/aesni-intel_glue.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/camellia_aesni_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/camellia_aesni_avx_glue.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/cast5_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/cast5_avx_glue.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/cast6_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/cast6_avx_glue.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/crc32-pclmul_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crc32-pclmul_glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/crc32c-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crc32c-intel_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/crct10dif-pclmul_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crct10dif-pclmul_glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/fpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/fpu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/serpent_avx2_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/serpent_avx2_glue.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/serpent_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/serpent_avx_glue.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/sha-mb/sha1_mb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha-mb/sha1_mb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/sha1_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha1_ssse3_glue.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/sha256_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha256_ssse3_glue.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/sha512_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha512_ssse3_glue.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/twofish_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/twofish_avx_glue.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/entry/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/calling.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/calling.h</a> (renamed from arch/x86/include/asm/calling.h)</td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/entry/entry_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_32.S</a></td><td class='right'>1248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/entry_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_64.S</a> (renamed from arch/x86/kernel/entry_64.S)</td><td class='right'>1386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/entry/entry_64_compat.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_64_compat.S</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscall_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscall_32.c</a> (renamed from arch/x86/kernel/syscall_32.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscall_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscall_64.c</a> (renamed from arch/x86/kernel/syscall_64.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscalls/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/Makefile</a> (renamed from arch/x86/syscalls/Makefile)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscalls/syscall_32.tbl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscall_32.tbl</a> (renamed from arch/x86/syscalls/syscall_32.tbl)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscalls/syscall_64.tbl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscall_64.tbl</a> (renamed from arch/x86/syscalls/syscall_64.tbl)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscalls/syscallhdr.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscallhdr.sh</a> (renamed from arch/x86/syscalls/syscallhdr.sh)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/syscalls/syscalltbl.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscalltbl.sh</a> (renamed from arch/x86/syscalls/syscalltbl.sh)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/thunk_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/thunk_32.S</a> (renamed from arch/x86/lib/thunk_32.S)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/thunk_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/thunk_64.S</a> (renamed from arch/x86/lib/thunk_64.S)</td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/.gitignore</a> (renamed from arch/x86/vdso/.gitignore)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/Makefile</a> (renamed from arch/x86/vdso/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/checkundef.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/checkundef.sh</a> (renamed from arch/x86/vdso/checkundef.sh)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vclock_gettime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vclock_gettime.c</a> (renamed from arch/x86/vdso/vclock_gettime.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso-layout.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso-layout.lds.S</a> (renamed from arch/x86/vdso/vdso-layout.lds.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso-note.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso-note.S</a> (renamed from arch/x86/vdso/vdso-note.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso.lds.S</a> (renamed from arch/x86/vdso/vdso.lds.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso2c.c</a> (renamed from arch/x86/vdso/vdso2c.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso2c.h</a> (renamed from arch/x86/vdso/vdso2c.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32-setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32-setup.c</a> (renamed from arch/x86/vdso/vdso32-setup.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/.gitignore</a> (renamed from arch/x86/vdso/vdso32/.gitignore)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/int80.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/int80.S</a> (renamed from arch/x86/vdso/vdso32/int80.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/note.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/note.S</a> (renamed from arch/x86/vdso/vdso32/note.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/sigreturn.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/sigreturn.S</a> (renamed from arch/x86/vdso/vdso32/sigreturn.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/syscall.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/syscall.S</a> (renamed from arch/x86/vdso/vdso32/syscall.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/sysenter.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/sysenter.S</a> (renamed from arch/x86/vdso/vdso32/sysenter.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/vclock_gettime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vclock_gettime.c</a> (renamed from arch/x86/vdso/vdso32/vclock_gettime.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/vdso-fakesections.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vdso-fakesections.c</a> (renamed from arch/x86/vdso/vdso32/vdso-fakesections.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdso32/vdso32.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vdso32.lds.S</a> (renamed from arch/x86/vdso/vdso32/vdso32.lds.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vdsox32.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdsox32.lds.S</a> (renamed from arch/x86/vdso/vdsox32.lds.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vgetcpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vgetcpu.c</a> (renamed from arch/x86/vdso/vgetcpu.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vdso/vma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vma.c</a> (renamed from arch/x86/vdso/vma.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/entry/vsyscall/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vsyscall/vsyscall_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_64.c</a> (renamed from arch/x86/kernel/vsyscall_64.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vsyscall/vsyscall_emu_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_emu_64.S</a> (renamed from arch/x86/kernel/vsyscall_emu_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vsyscall/vsyscall_gtod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_gtod.c</a> (renamed from arch/x86/kernel/vsyscall_gtod.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/entry/vsyscall/vsyscall_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_trace.h</a> (renamed from arch/x86/kernel/vsyscall_trace.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/ia32/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/ia32_signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/ia32/ia32_signal.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/ia32/ia32entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/ia32/ia32entry.S</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/alternative-asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/alternative-asm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/alternative.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/alternative.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/amd_nb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/amd_nb.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/apic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/apic.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/asm.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/atomic.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/atomic64_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/atomic64_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/barrier.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/cacheflush.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/crypto/glue_helper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/crypto/glue_helper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/dma-mapping.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/dwarf2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/dwarf2.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/edac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/efi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/efi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/entry_arch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/entry_arch.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/espfix.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/espfix.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/fpu-internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu-internal.h</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/api.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/internal.h</a></td><td class='right'>694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/regset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/regset.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/signal.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/types.h</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/fpu/xstate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/xstate.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/frame.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/frame.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/hardirq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hardirq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/hpet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hpet.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hugetlb.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/hw_irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hw_irq.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/i387.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/i387.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/intel_pmc_ipc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/intel_pmc_ipc.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/io.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/io_apic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/io_apic.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/irq_remapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq_remapping.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/irq_vectors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq_vectors.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/irqdomain.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irqdomain.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kasan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kasan.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kvm_emulate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kvm_emulate.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kvm_host.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/livepatch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/livepatch.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mce.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mce.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/microcode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/microcode_amd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode_amd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/microcode_intel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode_intel.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mmu_context.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mmu_context.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mpx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mpx.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/msi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/include/asm/msr-index.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msr-index.h</a> (renamed from arch/x86/include/uapi/asm/msr-index.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/msr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msr.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mtrr.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/paravirt.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/paravirt_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/paravirt_types.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pat.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pci.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pgtable.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pgtable_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pgtable_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/preempt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/preempt.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/processor.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/proto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/proto.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pvclock-abi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pvclock-abi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pvclock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pvclock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/qspinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/qspinlock.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/qspinlock_paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/qspinlock_paravirt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/serial.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/setup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/setup.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/simd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/simd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/smp.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/special_insns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/special_insns.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/spinlock.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/spinlock_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/spinlock_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/stackprotector.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/stackprotector.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/suspend_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/suspend_32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/suspend_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/suspend_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/thread_info.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/topology.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/trace/irq_vectors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/trace/irq_vectors.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/trace/mpx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/trace/mpx.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/traps.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/uaccess.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uaccess_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/uaccess_32.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/user.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/x86_init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/x86_init.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/xcr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xcr.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xor_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor_32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xor_avx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor_avx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/xsave.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xsave.h</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/e820.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/e820.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/hyperv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/hyperv.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/kvm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/kvm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/msr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/msr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/mtrr.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/sigcontext.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/boot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/boot.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/wakeup_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/wakeup_32.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/wakeup_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/wakeup_64.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/alternative.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/alternative.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/amd_nb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/amd_nb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apb_timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apb_timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/aperture_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/aperture_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/htirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/htirq.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/io_apic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/io_apic.c</a></td><td class='right'>1303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/msi.c</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/vector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/vector.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/x2apic_phys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/x2apic_phys.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/asm-offsets_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets_32.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/asm-offsets_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets_64.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/bootflag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/bootflag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/check.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/check.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/amd.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/bugs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/bugs.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/common.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/intel_cacheinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/intel_cacheinfo.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce_intel.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/amd_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/amd_early.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/core.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/core_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/core_early.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/intel_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel_early.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/microcode/intel_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel_lib.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mshyperv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mshyperv.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mtrr/cleanup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/cleanup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mtrr/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/generic.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mtrr/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/main.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mtrr/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/mtrr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_bts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_bts.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_cqm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_cqm.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_lbr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_lbr.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_pt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_pt.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_rapl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_rapl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_uncore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_uncore.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/proc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/crash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/crash.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/devicetree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/devicetree.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/e820.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/e820.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/early-quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/early-quirks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/early_printk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/early_printk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/entry_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/entry_32.S</a></td><td class='right'>1401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/espfix_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/espfix_64.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/bugs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/bugs.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/core.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/init.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/regset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/regset.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/signal.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/fpu/xstate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/xstate.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head64.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head_32.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head_64.S</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/hpet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/hpet.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/i386_ksyms_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/i386_ksyms_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/i387.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/i387.c</a></td><td class='right'>671</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/i8259.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irq_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irq_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irq_work.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_work.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irqinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irqinit.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kexec-bzimage64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kexec-bzimage64.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kvm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kvm.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kvmclock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kvmclock.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/machine_kexec_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/machine_kexec_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/mpparse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/mpparse.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/nmi.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/paravirt-spinlocks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt-spinlocks.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/paravirt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/paravirt_patch_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt_patch_32.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/paravirt_patch_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt_patch_64.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pci-dma.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pci-swiotlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pci-swiotlb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pmem.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process_32.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process_64.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/ptrace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/setup.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/signal.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/smp.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/smpboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/smpboot.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/traps.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/tsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/tsc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/tsc_sync.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/tsc_sync.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/uprobes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/uprobes.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/vsmp_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/vsmp_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/x8664_ksyms_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/x8664_ksyms_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/x86_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/x86_init.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/xsave.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/xsave.c</a></td><td class='right'>724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/cpuid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/cpuid.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/cpuid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/cpuid.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/emulate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/emulate.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/i8254.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/i8254.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/ioapic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/ioapic.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/iommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/irq_comm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/irq_comm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/kvm_cache_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/kvm_cache_regs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/lapic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/lapic.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/lapic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/lapic.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu.c</a></td><td class='right'>688</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmu_audit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu_audit.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmutrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmutrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kvm/mtrr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mtrr.c</a></td><td class='right'>699</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/paging_tmpl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/paging_tmpl.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu.c</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kvm/pmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kvm/pmu_amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu_amd.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kvm/pmu_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu_intel.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/svm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/svm.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/trace.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/vmx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/vmx.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/x86.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/x86.c</a></td><td class='right'>988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/x86.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/x86.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lguest/boot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lguest/boot.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/atomic64_386_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/atomic64_386_32.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/atomic64_cx8_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/atomic64_cx8_32.S</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/checksum_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/checksum_32.S</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/clear_page_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/clear_page_64.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/cmpxchg16b_emu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/cmpxchg16b_emu.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/cmpxchg8b_emu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/cmpxchg8b_emu.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/copy_page_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/copy_page_64.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/copy_user_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/copy_user_64.S</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/lib/copy_user_nocache_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/copy_user_nocache_64.S</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/csum-copy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/csum-copy_64.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/getuser.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/getuser.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/iomap_copy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/iomap_copy_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/memcpy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memcpy_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/memmove_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memmove_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/memset_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memset_64.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/mmx_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/mmx_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/msr-reg.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/msr-reg.S</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/putuser.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/putuser.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/rwsem.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/rwsem.S</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/usercopy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/usercopy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/usercopy_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/usercopy_32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/math-emu/fpu_aux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_aux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/math-emu/fpu_entry.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_entry.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/math-emu/fpu_system.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_system.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/fault.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/highmem_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/highmem_32.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/init.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/init_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/init_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/iomap_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/iomap_32.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/ioremap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/ioremap.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/kasan_init_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/kasan_init_64.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/mpx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/mpx.c</a></td><td class='right'>519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pageattr-test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pageattr-test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pageattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pageattr.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pat_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat_internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pat_rbtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat_rbtree.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pgtable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pgtable.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/net/bpf_jit.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/net/bpf_jit.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/net/bpf_jit_comp.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/acpi.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/i386.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/i386.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/intel_mid_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/intel_mid_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/irq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/platform/atom/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/atom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/platform/atom/punit_atom_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/atom/punit_atom_debug.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/efi/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/efi/efi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/intel-mid/device_libs/platform_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/device_libs/platform_wdt.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/intel-mid/intel-mid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/intel-mid.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/intel-mid/intel_mid_vrtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/intel_mid_vrtc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/intel-mid/sfi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/sfi.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/sfi/sfi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/sfi/sfi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/uv/uv_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/uv/uv_irq.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/uv/uv_nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/uv/uv_nmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/power/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/power/cpu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/power/hibernate_asm_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/power/hibernate_asm_64.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/barrier.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/checksum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/checksum.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/elf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/processor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/segment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/segment.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/ldt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ldt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/mem_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/mem_32.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/mem_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/mem_64.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/ptrace_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ptrace_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/ptrace_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ptrace_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/shared/sysdep/tls.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/shared/sysdep/tls.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/signal.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/syscalls_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/syscalls_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/tls_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/tls_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/tls_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/tls_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/vdso/vma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/vdso/vma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/enlighten.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/enlighten.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/p2m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/p2m.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/spinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/spinlock.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/xen-asm_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/xen-asm_64.S</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/xen-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/xen-ops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/dma-mapping.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/mm/highmem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/platforms/iss/network.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/platforms/iss/network.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/bio-integrity.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bio-integrity.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/bio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bio.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-cgroup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-cgroup.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-core.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-exec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-exec.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-integrity.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-integrity.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-merge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-merge.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-mq-cpumap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-cpumap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-mq-tag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-tag.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-mq-tag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-tag.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-mq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-sysfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-throttle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-throttle.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/bounce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bounce.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/cfq-iosched.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/cfq-iosched.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/elevator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/elevator.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/genhd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/genhd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/ioctl.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/scsi_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/scsi_ioctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/842.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/842.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/Kconfig</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/ablkcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ablkcipher.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/aead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/aead.c</a></td><td class='right'>684</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/af_alg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/af_alg.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/akcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/akcipher.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/algapi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algapi.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/algif_aead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algif_aead.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/algif_rng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algif_rng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/ansi_cprng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ansi_cprng.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/asymmetric_keys/asymmetric_keys.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/asymmetric_keys.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/asymmetric_keys/asymmetric_type.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/asymmetric_type.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/asymmetric_keys/pkcs7_key_type.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/pkcs7_key_type.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/asymmetric_keys/rsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/rsa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/asymmetric_keys/x509_public_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/x509_public_key.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/authenc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/authenc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/authencesn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/authencesn.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/blkcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/blkcipher.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/ccm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ccm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/chacha20_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chacha20_generic.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/chacha20poly1305.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chacha20poly1305.c</a></td><td class='right'>695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/chainiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chainiv.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/cryptd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/cryptd.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/crypto_null.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/crypto_null.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/crypto_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/crypto_user.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/drbg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/drbg.c</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/echainiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/echainiv.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/eseqiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/eseqiv.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/fips.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/fips.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/gcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/gcm.c</a></td><td class='right'>940</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/jitterentropy-kcapi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/jitterentropy-kcapi.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/jitterentropy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/jitterentropy.c</a></td><td class='right'>787</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/crypto/krng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/krng.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/md5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/md5.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/pcompress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/pcompress.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/pcrypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/pcrypt.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/poly1305_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/poly1305_generic.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/proc.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/rng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rng.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/rsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsa.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/rsa_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsa_helper.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/crypto/rsakey.asn1?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsakey.asn1</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/scatterwalk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/scatterwalk.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/seqiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/seqiv.c</a></td><td class='right'>587</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/shash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/shash.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/tcrypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/tcrypt.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/tcrypt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/tcrypt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/testmgr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/testmgr.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/testmgr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/testmgr.h</a></td><td class='right'>2443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/zlib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/zlib.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/Kconfig</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/ac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/ac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpi_lpss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpi_lpss.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpi_pad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpi_pad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpi_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpi_platform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpi_processor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpi_processor.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/acpi/acpi_video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpi_video.c</a> (renamed from drivers/acpi/video.c)</td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/accommon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/accommon.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acdebug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acdebug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acglobal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acglobal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acinterp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acinterp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/aclocal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/aclocal.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acnamesp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acnamesp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acobject.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acobject.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acparser.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acparser.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acpredef.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acpredef.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acstruct.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acstruct.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/acutils.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/acutils.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dsfield.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dsfield.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dsinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dsinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dsmethod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dsmethod.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dsobject.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dsobject.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dsutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dsutils.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/dswload.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/dswload.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/evgpeinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/evgpeinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exconfig.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exconfig.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exconvrt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exconvrt.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exdebug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exdebug.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exdump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exdump.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exfield.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exfield.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exfldio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exfldio.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exmisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exmisc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exnames.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exnames.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exoparg2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exoparg2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exoparg3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exoparg3.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exregion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exregion.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exstorob.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exstorob.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/exutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/exutils.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/hwpci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/hwpci.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/hwxfsleep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/hwxfsleep.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsaccess.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsaccess.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsconvert.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsconvert.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsdump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsdump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nseval.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nseval.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsinit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsparse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsparse.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsprepkg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsprepkg.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsrepair.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsrepair.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsrepair2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsrepair2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nssearch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nssearch.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsutils.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsxfeval.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsxfeval.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/nsxfname.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/nsxfname.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/psopinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/psopinfo.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/psutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/psutils.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/rscreate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/rscreate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/rsmisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/rsmisc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/rsutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/rsutils.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/rsxface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/rsxface.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbdata.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbdata.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbfadt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbfadt.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbfind.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbfind.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbinstal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbinstal.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbprint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbprint.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbutils.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbxface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbxface.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/tbxfload.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/tbxfload.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utalloc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utbuffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utbuffer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utcache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utcache.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utcopy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utcopy.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utdebug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utdebug.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utfileio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utfileio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utglobal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utglobal.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/uthex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/uthex.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utids.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utids.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utmisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utmisc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utosi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utosi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utpredef.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utpredef.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utprint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utprint.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utstring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utstring.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/uttrack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/uttrack.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utxface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utxface.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utxferror.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utxferror.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/acpica/utxfinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/acpica/utxfinit.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/apei/erst.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/apei/erst.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/apei/ghes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/apei/ghes.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/battery.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/battery.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/blacklist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/blacklist.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/bus.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/device_pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/device_pm.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/ec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/ec.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/fan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/fan.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/glue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/hed.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/hed.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/internal.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/acpi/nfit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/nfit.c</a></td><td class='right'>1693</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/acpi/nfit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/nfit.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/numa.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/osl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/osl.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/pci_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/pci_irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/power.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/power.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/processor_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/processor_core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/processor_idle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/processor_idle.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/processor_pdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/processor_pdc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/property.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/property.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/resource.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/resource.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/scan.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/thermal.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/utils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/utils.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/video_detect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/acpi/video_detect.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/acard-ahci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/acard-ahci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ata/ahci_brcmstb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci_brcmstb.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ata/ahci_ceva.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci_ceva.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci_mvebu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci_mvebu.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci_platform.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci_xgene.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/ahci_xgene.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libahci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/libahci.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libahci_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/libahci_platform.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/libata-core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-eh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/libata-eh.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/libata-transport.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/pata_arasan_cf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/pata_arasan_cf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/pata_at91.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/pata_at91.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/pata_hpt366.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/pata_hpt366.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/pata_samsung_cf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/pata_samsung_cf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/sata_highbank.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/sata_highbank.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/sata_nv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ata/sata_nv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/he.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/atm/he.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/idt77105.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/atm/idt77105.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/iphase.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/atm/iphase.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/base.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/base.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/bus.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/cacheinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/cacheinfo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/cpu.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/dd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/dd.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/firmware_class.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/firmware_class.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/node.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/node.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/platform.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/clock_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/clock_ops.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/domain.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/power.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/power.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/runtime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/runtime.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/base/power/wakeirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/wakeirq.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/wakeup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/power/wakeup.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/property.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/property.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/regmap/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regcache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/regmap/regcache.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/regmap/regmap-irq.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/regmap/regmap.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/topology.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/base/topology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bcma/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/driver_gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bcma/driver_gpio.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/cciss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/cciss.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/cciss_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/cciss_scsi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/drbd/drbd_debugfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_int.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/drbd/drbd_int.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/drbd/drbd_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_receiver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/drbd/drbd_receiver.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/loop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/loop.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/loop.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/loop.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/mtip32xx/mtip32xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/mtip32xx/mtip32xx.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/mtip32xx/mtip32xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/mtip32xx/mtip32xx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/nbd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/nbd.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/null_blk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/null_blk.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/nvme-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/nvme-core.c</a></td><td class='right'>928</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/nvme-scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/nvme-scsi.c</a></td><td class='right'>1230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/paride.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/paride.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/paride.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/paride.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/pcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/pcd.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/pd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/pd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/pf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/pf.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/pg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/pg.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/paride/pt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/paride/pt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/pktcdvd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/pktcdvd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/ps3vram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/ps3vram.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/rbd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/rbd.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/sx8.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/sx8.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/virtio_blk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/virtio_blk.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/xen-blkback/blkback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/xen-blkback/blkback.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/xen-blkback/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/xen-blkback/common.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/xen-blkback/xenbus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/xen-blkback/xenbus.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/xen-blkfront.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/xen-blkfront.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/zram/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/zram/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/zram/zcomp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/zram/zcomp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/zram/zcomp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/zram/zcomp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/zram/zram_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/zram/zram_drv.c</a></td><td class='right'>959</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/zram/zram_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/block/zram/zram_drv.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/ath3k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/ath3k.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/bt3c_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/bt3c_cs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btbcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btbcm.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btbcm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btbcm.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btintel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btintel.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btmrvl_sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btmrvl_sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/bluetooth/btrtl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btrtl.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/bluetooth/btrtl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btrtl.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btusb.c</a></td><td class='right'>572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btwilink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/btwilink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_ath.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_ath.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_bcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_bcm.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_bcsp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_bcsp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_h4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_h4.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_ldisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_ldisc.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_uart.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_uart.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_vhci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bluetooth/hci_vhci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/arm-cci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/arm-cci.c</a></td><td class='right'>905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/arm-ccn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/arm-ccn.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/brcmstb_gisb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/brcmstb_gisb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/mvebu-mbus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/mvebu-mbus.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bus/omap_l3_noc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/bus/omap_l3_noc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/intel-gtt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/agp/intel-gtt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/hw_random/via-rng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/hw_random/via-rng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/ipmi/ipmi_powernv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/ipmi/ipmi_powernv.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/ipmi/ipmi_watchdog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/ipmi/ipmi_watchdog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/misc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/misc.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/char/msm_smd_pkt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/msm_smd_pkt.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/pcmcia/cm4040_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/pcmcia/cm4040_cs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/pcmcia/synclink_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/pcmcia/synclink_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/random.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/random.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/raw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/raw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/snsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/snsc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/tpm/tpm-chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/tpm/tpm-chip.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/tpm/tpm_crb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/tpm/tpm_crb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/tpm/tpm_ibmvtpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/tpm/tpm_ibmvtpm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/tpm/tpm_of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/tpm/tpm_of.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/virtio_console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/virtio_console.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/xilinx_hwicap/buffer_icap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/xilinx_hwicap/buffer_icap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/xillybus/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/char/xillybus/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-h32mx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-h32mx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-master.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-master.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-peripheral.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-peripheral.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-pll.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-programmable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-programmable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-slow.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-slow.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-smd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-smd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-system.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-system.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/clk-utmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/clk-utmi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/pmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/pmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/at91/pmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/at91/pmc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/bcm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/bcm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/bcm/clk-cygnus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-cygnus.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/bcm/clk-iproc-armpll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-iproc-armpll.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/bcm/clk-iproc-asiu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-iproc-asiu.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/bcm/clk-iproc-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-iproc-pll.c</a></td><td class='right'>711</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/bcm/clk-iproc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-iproc.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/bcm/clk-kona-setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-kona-setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/bcm/clk-kona.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-kona.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/bcm/clk-kona.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/bcm/clk-kona.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/berlin/berlin2-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/berlin/berlin2-pll.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/berlin/bg2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/berlin/bg2.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/berlin/bg2q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/berlin/bg2q.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-asm9260.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-asm9260.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-axm5516.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-axm5516.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-cdce706.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-cdce706.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/clk-cdce925.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-cdce925.c</a></td><td class='right'>749</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-composite.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-composite.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-conf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-conf.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-divider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-divider.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-fixed-factor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-fixed-factor.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-fixed-rate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-fixed-rate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-fractional-divider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-fractional-divider.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-gate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-gate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-gpio-gate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-gpio-gate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-ls1x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-ls1x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-max-gen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-max-gen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-max77686.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-max77686.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-max77802.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-max77802.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-moxart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-moxart.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-mux.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-nomadik.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-nomadik.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-s2mps11.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-s2mps11.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-si5351.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-si5351.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/clk-stm32f4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-stm32f4.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-u300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-u300.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-xgene.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk-xgene.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clk.c</a></td><td class='right'>1618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clkdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/clkdev.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/h8300/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/h8300/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/h8300/clk-div.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/h8300/clk-div.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/h8300/clk-h8s2678.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/h8300/clk-h8s2678.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/hisilicon/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/hisilicon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/hisilicon/clk-hi3620.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clk-hi3620.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/hisilicon/clk-hi6220.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clk-hi6220.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/hisilicon/clk-hix5hd2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clk-hix5hd2.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/hisilicon/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clk.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/hisilicon/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clk.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/hisilicon/clkdivider-hi6220.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/hisilicon/clkdivider-hi6220.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/imx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-busy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-busy.c</a> (renamed from arch/arm/mach-imx/clk-busy.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-cpu.c</a> (renamed from arch/arm/mach-imx/clk-cpu.c)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-fixup-div.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-fixup-div.c</a> (renamed from arch/arm/mach-imx/clk-fixup-div.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-fixup-mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-fixup-mux.c</a> (renamed from arch/arm/mach-imx/clk-fixup-mux.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-gate-exclusive.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-gate-exclusive.c</a> (renamed from arch/arm/mach-imx/clk-gate-exclusive.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-gate2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-gate2.c</a> (renamed from arch/arm/mach-imx/clk-gate2.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx1.c</a> (renamed from arch/arm/mach-imx/clk-imx1.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx21.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx21.c</a> (renamed from arch/arm/mach-imx/clk-imx21.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx25.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx25.c</a> (renamed from arch/arm/mach-imx/clk-imx25.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx27.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx27.c</a> (renamed from arch/arm/mach-imx/clk-imx27.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx31.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx31.c</a> (renamed from arch/arm/mach-imx/clk-imx31.c)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx35.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx35.c</a> (renamed from arch/arm/mach-imx/clk-imx35.c)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx51-imx53.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx51-imx53.c</a> (renamed from arch/arm/mach-imx/clk-imx51-imx53.c)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx6q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx6q.c</a> (renamed from arch/arm/mach-imx/clk-imx6q.c)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx6sl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx6sl.c</a> (renamed from arch/arm/mach-imx/clk-imx6sl.c)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx6sx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx6sx.c</a> (renamed from arch/arm/mach-imx/clk-imx6sx.c)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/imx/clk-imx7d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-imx7d.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-pfd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-pfd.c</a> (renamed from arch/arm/mach-imx/clk-pfd.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-pllv1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-pllv1.c</a> (renamed from arch/arm/mach-imx/clk-pllv1.c)</td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-pllv2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-pllv2.c</a> (renamed from arch/arm/mach-imx/clk-pllv2.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-pllv3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-pllv3.c</a> (renamed from arch/arm/mach-imx/clk-pllv3.c)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk-vf610.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk-vf610.c</a> (renamed from arch/arm/mach-imx/clk-vf610.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk.c</a> (renamed from arch/arm/mach-imx/clk.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clk/imx/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/imx/clk.h</a> (renamed from arch/arm/mach-imx/clk.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/ingenic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ingenic/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/ingenic/cgu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ingenic/cgu.c</a></td><td class='right'>711</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/ingenic/cgu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ingenic/cgu.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/ingenic/jz4740-cgu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ingenic/jz4740-cgu.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/ingenic/jz4780-cgu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ingenic/jz4780-cgu.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/keystone/pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/keystone/pll.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-gate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-gate.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-gate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-gate.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-mt8135.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-mt8135.c</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-mt8173.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-mt8173.c</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-mtk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-mtk.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-mtk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-mtk.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/clk-pll.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mediatek/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mediatek/reset.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/clk-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/clk-cpu.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/clk-pll.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/clkc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/clkc.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/clkc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/clkc.h</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/meson/meson8b-clkc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/meson/meson8b-clkc.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-apbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-apbc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-apmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-apmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-mmp2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-mmp2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-of-mmp2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-of-mmp2.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-of-pxa168.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-of-pxa168.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mmp/clk-of-pxa1928.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-of-pxa1928.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mmp/clk-of-pxa910.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mmp/clk-of-pxa910.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mvebu/armada-370.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mvebu/armada-370.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mxs/clk-imx23.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mxs/clk-imx23.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mxs/clk-imx28.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mxs/clk-imx28.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/mxs/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/mxs/clk.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/nxp/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/nxp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/nxp/clk-lpc18xx-ccu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/nxp/clk-lpc18xx-ccu.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/nxp/clk-lpc18xx-cgu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/nxp/clk-lpc18xx-cgu.c</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/pistachio/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/pistachio/clk-pll.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/pxa/clk-pxa.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/pxa/clk-pxa.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/pxa/clk-pxa27x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/pxa/clk-pxa27x.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/qcom/clk-rcg2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/qcom/clk-rcg2.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/qcom/gcc-ipq806x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/qcom/gcc-ipq806x.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk-cpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk-mmc-phase.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk-mmc-phase.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk-pll.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk-rk3188.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk-rk3188.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk-rk3288.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk-rk3288.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/rockchip/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/rockchip/clk.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/samsung/clk-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-cpu.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/samsung/clk-cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-cpu.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-exynos4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-exynos4.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-exynos5260.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-exynos5260.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-exynos5420.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-exynos5420.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-exynos5433.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-exynos5433.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-pll.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-s3c2410-dclk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-s3c2410-dclk.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk-s5pv210.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk-s5pv210.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/samsung/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/samsung/clk.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/shmobile/clk-emev2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/shmobile/clk-emev2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sirf/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sirf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/sirf/clk-atlas7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sirf/clk-atlas7.c</a></td><td class='right'>1632</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sirf/clk-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sirf/clk-common.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-gate-a10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-gate-a10.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-gate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-gate.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-periph-a10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-periph-a10.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-periph.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-periph.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-pll-a10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-pll-a10.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk-pll.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/socfpga/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/socfpga/clk.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk-aux-synth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk-aux-synth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk-frac-synth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk-frac-synth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk-gpt-synth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk-gpt-synth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk-vco-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk-vco-pll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/clk.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/spear1310_clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/spear1310_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/spear1340_clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/spear1340_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/spear3xx_clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/spear3xx_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/spear/spear6xx_clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/spear/spear6xx_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/st/clk-flexgen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/st/clk-flexgen.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/st/clkgen-fsyn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/st/clkgen-fsyn.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/st/clkgen-mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/st/clkgen-mux.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/st/clkgen-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/st/clkgen-pll.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sunxi/clk-mod0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sunxi/clk-mod0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sunxi/clk-sun9i-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sunxi/clk-sun9i-core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sunxi/clk-sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sunxi/clk-sunxi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/sunxi/clk-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/sunxi/clk-usb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/tegra/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/tegra/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/tegra/clk-emc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/clk-emc.c</a></td><td class='right'>538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/tegra/clk-tegra124.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/clk-tegra124.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/tegra/clk-tegra30.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/clk-tegra30.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/tegra/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/tegra/clk.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/clk-7xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/clk-7xx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/clk-dra7-atl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/clk-dra7-atl.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/clk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/clockdomain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/clockdomain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/dpll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/dpll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ti/fapll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ti/fapll.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ux500/u8500_clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ux500/u8500_clk.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/ux500/u8500_of_clk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/ux500/u8500_of_clk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/versatile/clk-sp810.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/versatile/clk-sp810.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/zte/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/zte/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/zte/clk-pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/zte/clk-pll.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/zte/clk-zx296702.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/zte/clk-zx296702.c</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/zte/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/zte/clk.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/zynq/clkc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clk/zynq/clkc.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/armv7m_systick.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/armv7m_systick.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/asm9260_timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/asm9260_timer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/exynos_mct.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/exynos_mct.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/h8300_timer16.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/h8300_timer16.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/h8300_timer8.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/h8300_timer8.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/h8300_tpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/h8300_tpu.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/qcom-timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/qcom-timer.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/time-lpc32xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/time-lpc32xx.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/timer-imx-gpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-imx-gpt.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/timer-integrator-ap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-integrator-ap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clocksource/timer-sp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-sp.h</a> (renamed from arch/arm/include/asm/hardware/arm_timer.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/clocksource/timer-sp804.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-sp804.c</a> (renamed from arch/arm/common/timer-sp.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/timer-stm32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-stm32.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/timer-sun5i.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/clocksource/timer-sun5i.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/Kconfig.arm?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/Kconfig.arm</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/acpi-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/acpi-cpufreq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/arm_big_little.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/arm_big_little.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq-dt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq-nforce2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq-nforce2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq.c</a></td><td class='right'>581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq_conservative.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq_conservative.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq_governor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq_governor.c</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq_governor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq_governor.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/cpufreq_ondemand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/cpufreq_ondemand.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/exynos-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/exynos-cpufreq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/exynos-cpufreq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/exynos-cpufreq.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/cpufreq/exynos4210-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/exynos4210-cpufreq.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/freq_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/freq_table.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/gx-suspmod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/gx-suspmod.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/intel_pstate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/intel_pstate.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/loongson2_cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/loongson2_cpufreq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/ls1x-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/ls1x-cpufreq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/p4-clockmod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/p4-clockmod.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/powernow-k8.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/powernow-k8.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/pxa2xx-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/pxa2xx-cpufreq.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/qoriq-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/qoriq-cpufreq.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/s5pv210-cpufreq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/s5pv210-cpufreq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/speedstep-ich.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpufreq/speedstep-ich.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-at91.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-at91.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-big_little.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-big_little.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-calxeda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-calxeda.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-powernv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-powernv.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-pseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-pseries.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle-zynq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle-zynq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/cpuidle.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/governors/menu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/cpuidle/governors/menu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/Kconfig</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/caamalg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/caamalg.c</a></td><td class='right'>1371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/caamhash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/caamhash.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/caamrng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/caamrng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/compat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/compat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/ctrl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/ctrl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/regs.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/sg_sw_sec4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/caam/sg_sw_sec4.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/ccp/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/ccp/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/ccp/ccp-ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/ccp/ccp-ops.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/ccp/ccp-platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/ccp/ccp-platform.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/ixp4xx_crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/ixp4xx_crypto.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/cesa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/cesa.c</a></td><td class='right'>547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/cesa.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/cesa.h</a></td><td class='right'>791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/cipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/cipher.c</a></td><td class='right'>797</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/hash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/hash.c</a></td><td class='right'>1441</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/marvell/tdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/marvell/tdma.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/mv_cesa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/mv_cesa.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/n2_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/n2_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/Kconfig</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842-crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842-crypto.c</a></td><td class='right'>580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842-platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842-platform.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842-powernv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842-powernv.c</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842-pseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842-pseries.c</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842.c</a></td><td class='right'>1610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-842.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-842.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-ccm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-aes-ccm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-ctr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-aes-ctr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-gcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-aes-gcm.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-xcbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-aes-xcbc.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-sha256.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-sha256.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx-sha512.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx-sha512.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/nx/nx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/nx/nx.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/omap-des.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/omap-des.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/omap-sham.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/omap-sham.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/padlock-aes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/padlock-aes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/padlock-sha.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/padlock-sha.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/picoxcell_crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/picoxcell_crypto.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_accel_devices.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_accel_devices.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_accel_engine.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_accel_engine.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_cfg_user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_cfg_user.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_common_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_common_drv.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_ctl_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_ctl_drv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/adf_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/adf_transport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_common/qat_algs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_common/qat_algs.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/qat/qat_dh895xcc/adf_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/qat/qat_dh895xcc/adf_drv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/sahara.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/sahara.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/talitos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/talitos.c</a></td><td class='right'>743</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/talitos.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/talitos.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/ux500/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/ux500/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/aes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/aes.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/aes_cbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/aes_cbc.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/aes_ctr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/aes_ctr.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/aesp8-ppc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/aesp8-ppc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/ghash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/ghash.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/vmx/vmx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/crypto/vmx/vmx.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma-buf/dma-buf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma-buf/dma-buf.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma-buf/reservation.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma-buf/reservation.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma-buf/seqno-fence.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma-buf/seqno-fence.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/amba-pl08x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/amba-pl08x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/at_hdmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/at_hdmac.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/at_hdmac_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/at_hdmac_regs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/at_xdmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/at_xdmac.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/dmaengine.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/dmaengine.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/dmatest.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/dmatest.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/dw/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/dw/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/edma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/edma.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/ep93xx_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/ep93xx_dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/fsl-edma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/fsl-edma.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/imx-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/imx-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/imx-sdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/imx-sdma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mic_x100_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/mic_x100_dma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mmp_tdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/mmp_tdma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mv_xor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/mv_xor.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mv_xor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/mv_xor.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mxs-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/mxs-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/nbpfaxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/nbpfaxi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/of-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/of-dma.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/omap-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/omap-dma.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/pl330.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/pl330.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/dma/pxa_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/pxa_dma.c</a></td><td class='right'>1467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/s3c24xx-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/s3c24xx-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/sh/rcar-dmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/sh/rcar-dmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/sh/shdma-r8a73a4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/sh/shdma-r8a73a4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/sirf-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/sirf-dma.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/sun6i-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/sun6i-dma.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/dma/ti-dma-crossbar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/ti-dma-crossbar.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/virt-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/virt-dma.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/virt-dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/virt-dma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--<span class='modechange'>[-rwxr-xr-x]</span></td><td class='upd'><a href='/drm-misc/diff/drivers/dma/xgene-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/dma/xgene-dma.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/altera_edac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/altera_edac.c</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/edac/altera_edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/altera_edac.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/amd64_edac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/amd64_edac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_mc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/edac_mc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_mc_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/edac_mc_sysfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_stub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/edac_stub.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mce_amd_inj.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/mce_amd_inj.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mpc85xx_edac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/mpc85xx_edac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mpc85xx_edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/mpc85xx_edac.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/octeon_edac-l2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/octeon_edac-l2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/octeon_edac-lmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/octeon_edac-lmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/octeon_edac-pc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/octeon_edac-pc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/sb_edac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/sb_edac.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/edac/xgene_edac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/edac/xgene_edac.c</a></td><td class='right'>1215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-adc-jack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-adc-jack.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-arizona.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-arizona.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/extcon/extcon-axp288.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-axp288.c</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-gpio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-max14577.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-max14577.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-max77693.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-max77693.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-max77843.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-max77843.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-max8997.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-max8997.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-palmas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-palmas.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-rt8973a.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-rt8973a.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-sm5502.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-sm5502.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon-usb-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon-usb-gpio.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/extcon/extcon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/extcon/extcon.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/sbp2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firewire/sbp2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/firmware/broadcom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/broadcom/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/firmware/broadcom/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/broadcom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/firmware/broadcom/bcm47xx_nvram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/broadcom/bcm47xx_nvram.c</a> (renamed from arch/mips/bcm47xx/nvram.c)</td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/dmi-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/dmi-sysfs.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/dmi_scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/dmi_scan.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efi/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/efi.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efi/efivars.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/efivars.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/firmware/efi/esrt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/esrt.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efi/libstub/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/efi/libstub/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/memmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/memmap.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/firmware/qcom_scm-32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/qcom_scm-32.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/qcom_scm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/qcom_scm.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/firmware/qcom_scm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/firmware/qcom_scm.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-altera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-altera.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-bcm-kona.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-bcm-kona.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-brcmstb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-brcmstb.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-crystalcove.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-crystalcove.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-davinci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-davinci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-dln2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-dln2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-dwapb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-dwapb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-em.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-em.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-etraxfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-etraxfs.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-f7188x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-f7188x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-generic.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-grgpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-grgpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-it8761e.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-it8761e.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-lpc18xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-lpc18xx.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-lynxpoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-lynxpoint.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-max732x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-max732x.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-moxart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-moxart.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mpc8xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-mpc8xxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-msic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-msic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mxc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-mxc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mxs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-mxs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-omap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-omap.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-pca953x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-pca953x.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-pcf857x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-pcf857x.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-rcar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-rcar.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-sa1100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-sa1100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-sodaville.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-sodaville.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-stp-xway.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-stp-xway.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-tb10x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-tb10x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-tegra.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-ts5500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-ts5500.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-xgene-sb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-xgene-sb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-xilinx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-xilinx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-xlp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-xlp.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-zynq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpio-zynq.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib-acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpiolib-acpi.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib-of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpiolib-of.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpiolib-sysfs.c</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpiolib.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpio/gpiolib.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/Makefile</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/ObjectID.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/ObjectID.h</a></td><td class='right'>736</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a></td><td class='right'>2337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.h</a></td><td class='right'>445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c</a></td><td class='right'>1598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c</a></td><td class='right'>572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c</a></td><td class='right'>1907</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c</a></td><td class='right'>878</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a></td><td class='right'>2015</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_display.c</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c</a></td><td class='right'>955</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_family.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_family.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c</a></td><td class='right'>1168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a></td><td class='right'>697</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.h</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c</a></td><td class='right'>807</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_semaphore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_semaphore.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_test.c</a></td><td class='right'>552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a></td><td class='right'>1215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c</a></td><td class='right'>984</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c</a></td><td class='right'>827</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a></td><td class='right'>1273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atom-bits.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atom-bits.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atom-names.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atom-names.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atom-types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atom-types.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atom.c</a></td><td class='right'>1408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atom.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios.h</a></td><td class='right'>8555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_crtc.c</a></td><td class='right'>807</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_crtc.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_dp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_dp.c</a></td><td class='right'>775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_dp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_dp.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_encoders.c</a></td><td class='right'>2066</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_encoders.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_encoders.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_i2c.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/atombios_i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/atombios_i2c.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/ci_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/ci_dpm.c</a></td><td class='right'>6699</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/ci_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/ci_dpm.h</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/ci_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/ci_smc.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik.c</a></td><td class='right'>2509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik_dpm.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik_ih.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik_ih.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik_ih.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik_ih.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a></td><td class='right'>1407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cik_sdma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cik_sdma.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cikd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cikd.h</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/clearstate_ci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/clearstate_ci.h</a></td><td class='right'>944</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/clearstate_defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/clearstate_defs.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/clearstate_vi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/clearstate_vi.h</a></td><td class='right'>944</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_dpm.c</a></td><td class='right'>1949</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_dpm.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_ih.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_ih.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_ih.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_ih.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_ppsmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_ppsmc.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_smc.c</a></td><td class='right'>962</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/cz_smumgr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/cz_smumgr.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a></td><td class='right'>3808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a></td><td class='right'>3807</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a></td><td class='right'>3763</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a></td><td class='right'>5686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a></td><td class='right'>4379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a></td><td class='right'>1339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c</a></td><td class='right'>1301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/gmc_v8_0.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_dpm.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_ih.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_ih.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_ih.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_ih.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h</a></td><td class='right'>2167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_smc.c</a></td><td class='right'>675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/iceland_smumgr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/iceland_smumgr.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/kv_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/kv_dpm.c</a></td><td class='right'>3343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/kv_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/kv_dpm.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/kv_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/kv_smc.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/ppsmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/ppsmc.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/pptable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/pptable.h</a></td><td class='right'>698</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c</a></td><td class='right'>1417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/sdma_v2_4.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c</a></td><td class='right'>1511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/sdma_v3_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu7.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu7.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu7_discrete.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu7_discrete.h</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu7_fusion.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu7_fusion.h</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu8.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu8.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu8_fusion.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu8_fusion.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_cz.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_cz.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_vi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_vi.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_dpm.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_ih.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_ih.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_ih.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_ih.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_ppsmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_ppsmc.h</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h</a></td><td class='right'>2240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_smc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_smc.c</a></td><td class='right'>852</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/tonga_smumgr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/tonga_smumgr.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c</a></td><td class='right'>905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v4_2.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c</a></td><td class='right'>844</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v5_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c</a></td><td class='right'>824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/uvd_v6_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vce_v2_0.c</a></td><td class='right'>663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vce_v2_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vce_v2_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vce_v3_0.c</a></td><td class='right'>573</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vce_v3_0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vce_v3_0.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vi.c</a></td><td class='right'>1404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vi.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vi_dpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vi_dpm.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdgpu/vid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdgpu/vid.h</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/cik_int.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/cik_int.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/cik_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/cik_regs.h</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_chardev.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c</a></td><td class='right'>886</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.h</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_events.c</a></td><td class='right'>969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_events.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_events.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_module.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_diq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_diq.h</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_priv.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/amd_shared.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/amd_shared.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h</a></td><td class='right'>921</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h</a></td><td class='right'>10250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h</a></td><td class='right'>1198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h</a></td><td class='right'>11494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 34.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 65.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h</a></td><td class='right'>3577</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h</a></td><td class='right'>33080</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 100.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h</a></td><td class='right'>7350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h</a></td><td class='right'>1773</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h</a></td><td class='right'>16647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 50.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 49.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h</a></td><td class='right'>7648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h</a></td><td class='right'>6129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h</a></td><td class='right'>17557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 53.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 46.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h</a></td><td class='right'>5703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h</a></td><td class='right'>13109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 39.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 60.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h</a></td><td class='right'>2532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h</a></td><td class='right'>2557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h</a></td><td class='right'>6274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h</a></td><td class='right'>18444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 55.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 44.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h</a></td><td class='right'>2811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h</a></td><td class='right'>6858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h</a></td><td class='right'>20776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 62.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 37.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_d.h</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h</a></td><td class='right'>6116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h</a></td><td class='right'>1464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h</a></td><td class='right'>14416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 43.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 56.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h</a></td><td class='right'>1708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h</a></td><td class='right'>1198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h</a></td><td class='right'>15682</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 47.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 52.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h</a></td><td class='right'>910</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h</a></td><td class='right'>7850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h</a></td><td class='right'>2476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h</a></td><td class='right'>1340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h</a></td><td class='right'>2544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h</a></td><td class='right'>593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h</a></td><td class='right'>1464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h</a></td><td class='right'>3558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h</a></td><td class='right'>688</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h</a></td><td class='right'>1497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h</a></td><td class='right'>3660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_d.h</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h</a></td><td class='right'>3842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h</a></td><td class='right'>1314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h</a></td><td class='right'>5456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h</a></td><td class='right'>1344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h</a></td><td class='right'>1191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h</a></td><td class='right'>5648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h</a></td><td class='right'>1123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h</a></td><td class='right'>1205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h</a></td><td class='right'>4864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h</a></td><td class='right'>1273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h</a></td><td class='right'>1246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h</a></td><td class='right'>5834</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_d.h</a></td><td class='right'>671</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h</a></td><td class='right'>1072</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_sh_mask.h</a></td><td class='right'>2964</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h</a></td><td class='right'>800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h</a></td><td class='right'>1211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h</a></td><td class='right'>1046</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h</a></td><td class='right'>1081</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h</a></td><td class='right'>1034</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/vce/vce_2_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/vce/vce_2_0_d.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/vce/vce_2_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/vce/vce_2_0_sh_mask.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/vce/vce_3_0_d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/vce/vce_3_0_d.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/asic_reg/vce/vce_3_0_sh_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/asic_reg/vce/vce_3_0_sh_mask.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/amd/include/kgd_kfd_interface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/amd/include/kgd_kfd_interface.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_crtc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_drm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_drv.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_gem.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_output.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_output.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_output.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/armada/armada_overlay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/armada/armada_overlay.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/bridge/dw_hdmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/bridge/dw_hdmi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/bridge/ps8622.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/bridge/ps8622.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/bridge/ptn3460.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/bridge/ptn3460.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_atomic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_atomic.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_atomic_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_atomic_helper.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_auth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_auth.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_bridge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_bridge.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_cache.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_crtc.c</a></td><td class='right'>659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_crtc_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_crtc_helper.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_dp_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_dp_helper.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_dp_mst_topology.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_dp_mst_topology.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_drv.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_edid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_edid.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_edid_load.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_edid_load.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_flip_work.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_flip_work.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_fops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_fops.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_gem_cma_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_gem_cma_helper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_ioc32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_ioc32.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_ioctl.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_irq.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_mm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_mm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_modes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_modes.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_modeset_lock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_modeset_lock.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_prime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_prime.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_probe_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_probe_helper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/drm_sysfs.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos5433_drm_decon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos5433_drm_decon.c</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos7_drm_decon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos7_drm_decon.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_dp_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_dp_core.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_crtc.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_dpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_dpi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_drv.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_drv.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_dsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_dsi.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_encoder.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_fb.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_fbdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_fbdev.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_fimd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_fimd.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_gem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_gem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_iommu.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_iommu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_iommu.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_ipp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_ipp.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_mic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_mic.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_plane.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_plane.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_plane.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_vidi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_drm_vidi.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_hdmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_hdmi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_mixer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/exynos/exynos_mixer.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i2c/adv7511.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i2c/adv7511.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i2c/tda998x_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i2c/tda998x_drv.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/dvo_ivch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/dvo_ivch.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/dvo_ns2501.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/dvo_ns2501.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_cmd_parser.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_cmd_parser.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_debugfs.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_dma.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_drv.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_drv.h</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem.c</a></td><td class='right'>1023</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_batch_pool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_batch_pool.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_batch_pool.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_batch_pool.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_context.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_context.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_debug.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_dmabuf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_dmabuf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_execbuffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_execbuffer.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_gtt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_gtt.c</a></td><td class='right'>1142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_gtt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_gtt.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_shrinker.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_shrinker.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_stolen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_stolen.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_tiling.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_tiling.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_userptr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gem_userptr.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gpu_error.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_gpu_error.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_ioc32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_ioc32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_irq.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_params.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_params.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_reg.h</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/i915_trace.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_atomic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_atomic.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_atomic_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_atomic_plane.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_audio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_audio.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_bios.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_bios.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_bios.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_bios.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_crt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_crt.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_csr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_csr.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ddi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_ddi.c</a></td><td class='right'>912</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_display.c</a></td><td class='right'>3440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dp.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dp_mst.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dp_mst.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_drv.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dsi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dsi_panel_vbt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dsi_pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dsi_pll.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dvo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_dvo.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_fbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_fbc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_fbdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_fbdev.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_frontbuffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_frontbuffer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_hdmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_hdmi.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_i2c.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_lrc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_lrc.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_lrc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_lrc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_lvds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_lvds.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_opregion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_opregion.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_overlay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_overlay.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_panel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_panel.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_pm.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_psr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_psr.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ringbuffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_ringbuffer.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ringbuffer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_ringbuffer.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_runtime_pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_runtime_pm.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sdvo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_sdvo.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sideband.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_sideband.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sprite.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_sprite.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_uncore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/i915/intel_uncore.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/imx/imx-tve.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/imx/imx-tve.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/imx/parallel-display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/imx/parallel-display.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_mode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/a2xx.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/a2xx.xml.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/a3xx.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/a3xx.xml.h</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/a3xx_gpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/a3xx_gpu.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/a4xx.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/a4xx.xml.h</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/a4xx_gpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/a4xx_gpu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/adreno_common.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/adreno_common.xml.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/adreno_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/adreno_device.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/adreno_gpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/adreno_gpu.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/adreno_gpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/adreno_gpu.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi.xml.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi_host.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi_host.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi_manager.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/dsi_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/dsi_phy.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/mmss_cc.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/mmss_cc.xml.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/pll/dsi_pll.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/pll/dsi_pll.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/dsi/sfpb.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/dsi/sfpb.xml.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/edp/edp.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/edp/edp.xml.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/edp/edp_aux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/edp/edp_aux.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/edp/edp_ctrl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/edp/edp_ctrl.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/hdmi/hdmi.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/hdmi/hdmi.xml.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/hdmi/hdmi_connector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/hdmi/hdmi_connector.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/hdmi/qfprom.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/hdmi/qfprom.xml.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4.xml.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp_common.xml.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp_common.xml.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp_format.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp_format.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/mdp/mdp_kms.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/mdp/mdp_kms.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_atomic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_atomic.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_drv.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_drv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_gem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_gem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_gem.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_gem_submit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_gem_submit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_gpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_gpu.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_gpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_gpu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/msm/msm_kms.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/msm/msm_kms.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_drm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/nouveau/nouveau_drm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/nouveau/nouveau_gem.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_connector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_connector.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_crtc.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_dmm_tiler.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_drv.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_drv.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_encoder.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_fb.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_fbdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_fbdev.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_gem.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_irq.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/omapdrm/omap_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/omapdrm/omap_plane.c</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/panel/panel-ld9040.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/panel/panel-ld9040.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/panel/panel-s6e8aa0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/panel/panel-s6e8aa0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/panel/panel-simple.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/panel/panel-simple.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_cmd.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_display.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_fb.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_gem.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_ioctl.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_object.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/qxl/qxl_release.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/qxl/qxl_release.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/atombios.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/atombios.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/atombios_dp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/atombios_dp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/ci_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/ci_dpm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/cik.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/cik.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/cik_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/cik_reg.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/cik_sdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/cik_sdma.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/cikd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/cikd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/evergreen.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/ni.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/ni.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/nid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/nid.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/r100.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/r300.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/r600.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_cp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/r600_cp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon.h</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_asic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_asic.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_asic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_asic.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_audio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_audio.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_audio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_audio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_cursor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_cursor.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_device.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_dp_mst.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_dp_mst.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_drv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_gart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_gart.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_gem.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_irq_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_irq_kms.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_kfd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_kfd.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_kms.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_mode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_mode.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_object.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_ttm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_ttm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_vce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_vce.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_vm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/radeon_vm.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/si.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/si.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/si_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/si_dpm.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/sid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/sid.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/trinity_dpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/trinity_dpm.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/vce_v1_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/vce_v1_0.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/vce_v2_0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/radeon/vce_v2_0.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_crtc.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_crtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_crtc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_drv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_group.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_group.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_group.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_group.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_kms.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_plane.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rcar-du/rcar_du_plane.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rcar-du/rcar_du_plane.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rockchip/rockchip_drm_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rockchip/rockchip_drm_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rockchip/rockchip_drm_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rockchip/rockchip_drm_fb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rockchip/rockchip_drm_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rockchip/rockchip_drm_gem.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/rockchip/rockchip_drm_vop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/rockchip/rockchip_drm_vop.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/sti/sti_dvo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/sti/sti_dvo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/sti/sti_hdmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/sti/sti_hdmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/sti/sti_vtg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/sti/sti_vtg.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tegra/dpaux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tegra/dpaux.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tegra/drm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tegra/drm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tegra/gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tegra/gem.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_crtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_crtc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_drv.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_drv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_external.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_external.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_external.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_external.h</a> (renamed from drivers/gpu/drm/tilcdc/tilcdc_slave.h)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_slave.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_slave.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/tilcdc/tilcdc_slave_compat.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/ttm/ttm_page_alloc_dma.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/vgem/vgem_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/vgem/vgem_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_debugfs.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_display.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_drm_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_drm_bus.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_drv.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_drv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_drv.h</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_fb.c</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_fence.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_fence.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_gem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_gem.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_kms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_kms.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_object.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_plane.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_plane.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_ttm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_ttm.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/virtio/virtgpu_vq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/drm/virtio/virtgpu_vq.c</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/ipu-v3/ipu-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/gpu/ipu-v3/ipu-common.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-core.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-cypress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-cypress.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-ids.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-ids.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-input.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lenovo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-lenovo.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-lg.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg4ff.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-lg4ff.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg4ff.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-lg4ff.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-logitech-hidpp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-logitech-hidpp.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-microsoft.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-microsoft.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-plantronics.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-plantronics.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-prodikeys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-prodikeys.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-rmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-rmi.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-sjoy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-sjoy.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-sony.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/hid-sony.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/i2c-hid/i2c-hid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/i2c-hid/i2c-hid.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/hid-quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/usbhid/hid-quirks.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/wacom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/wacom.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/wacom_sys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/wacom_sys.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/wacom_wac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/wacom_wac.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/wacom_wac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hid/wacom_wac.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hsi/clients/cmt_speech.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hsi/clients/cmt_speech.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hsi/clients/nokia-modem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hsi/clients/nokia-modem.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hsi/controllers/omap_ssi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hsi/controllers/omap_ssi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/channel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/channel.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/channel_mgmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/channel_mgmt.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/connection.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/connection.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_balloon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_balloon.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_fcopy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_fcopy.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_kvp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_kvp.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_snapshot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_snapshot.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hv/hv_utils_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_utils_transport.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hv/hv_utils_transport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hv_utils_transport.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hyperv_vmbus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/hyperv_vmbus.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/vmbus_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hv/vmbus_drv.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/atxp1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/atxp1.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/coretemp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/coretemp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/hwmon/dell-smm-hwmon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/dell-smm-hwmon.c</a> (renamed from drivers/char/i8k.c)</td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/max197.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/max197.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/mcp3021.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/mcp3021.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/nct7802.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/nct7802.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/ntc_thermistor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/ntc_thermistor.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/sht15.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/sht15.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwmon/tc74.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/tc74.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/w83627ehf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/w83627ehf.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/w83792d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwmon/w83792d.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwspinlock/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwspinlock/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwspinlock/hwspinlock_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/hwspinlock_core.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwspinlock/omap_hwspinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/omap_hwspinlock.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwspinlock/qcom_hwspinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/qcom_hwspinlock.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwspinlock/sirf_hwspinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwspinlock/sirf_hwspinlock.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-etb10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-etb10.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-etm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-etm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-etm3x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-etm3x.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-etm4x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-etm4x.c</a></td><td class='right'>2702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-etm4x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-etm4x.h</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-funnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-funnel.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-replicator-qcom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-replicator-qcom.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-replicator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-replicator.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-tmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-tmc.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/coresight-tpiu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/coresight-tpiu.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwtracing/coresight/of_coresight.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/hwtracing/coresight/of_coresight.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/algos/i2c-algo-pca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/algos/i2c-algo-pca.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-at91.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-at91.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-axxia.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-axxia.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-bcm-iproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-bcm-iproc.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-bcm2835.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-brcmstb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-brcmstb.c</a></td><td class='right'>694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-cros-ec-tunnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-cros-ec-tunnel.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-davinci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-davinci.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-designware-platdrv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-designware-platdrv.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-imx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-jz4780.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-jz4780.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-mt65xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-mt65xx.c</a></td><td class='right'>731</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-mxs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-mxs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-octeon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-octeon.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-omap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-omap.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-parport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-parport.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-piix4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-piix4.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-rcar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-rcar.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-rk3x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-rk3x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-s3c2410.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-s3c2410.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-sh_mobile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-sh_mobile.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-tegra.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-xgene-slimpro.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-xgene-slimpro.c</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-xiic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/busses/i2c-xiic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/i2c-core.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/i2c-mux.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-smbus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/i2c-smbus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/muxes/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/muxes/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-pca9541.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/muxes/i2c-mux-pca9541.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-pca954x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/i2c/muxes/i2c-mux-pca954x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-atapi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-atapi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-cd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-cd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-cd_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-cd_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-devsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-devsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-eh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-eh.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-floppy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-floppy.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-io.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-ioctls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-ioctls.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-park.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-park.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-pm.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-tape.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-tape.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide-taskfile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide-taskfile.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ide/ide.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ide/ide.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/bmc150-accel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/bmc150-accel.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/hid-sensor-accel-3d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/hid-sensor-accel-3d.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/kxcjk-1013.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/kxcjk-1013.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/mma8452.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/mma8452.c</a></td><td class='right'>555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/mma9551_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/mma9551_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/mma9551_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/mma9551_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/mma9553.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/mma9553.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/st_accel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/st_accel.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/st_accel_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/st_accel_core.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/accel/st_accel_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/st_accel_i2c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/accel/stk8312.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/stk8312.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/accel/stk8ba50.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/accel/stk8ba50.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/at91_adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/at91_adc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/axp288_adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/axp288_adc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/adc/berlin2-adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/berlin2-adc.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/rockchip_saradc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/rockchip_saradc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/ti-adc128s052.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/ti-adc128s052.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/ti_am335x_adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/ti_am335x_adc.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/twl4030-madc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/twl4030-madc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/adc/vf610_adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/adc/vf610_adc.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/buffer_cb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/buffer_cb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/common/hid-sensors/hid-sensor-trigger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/common/hid-sensors/hid-sensor-trigger.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/common/st_sensors/st_sensors_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/common/st_sensors/st_sensors_core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/common/st_sensors/st_sensors_trigger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/common/st_sensors/st_sensors_trigger.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/dac/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/dac/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/dac/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/dac/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/dac/ad5624r_spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/dac/ad5624r_spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/dac/m62332.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/dac/m62332.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/gyro/bmg160.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/gyro/bmg160.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/gyro/hid-sensor-gyro-3d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/gyro/hid-sensor-gyro-3d.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/humidity/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/humidity/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/imu/inv_mpu6050/inv_mpu_core.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/industrialio-buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/industrialio-buffer.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/industrialio-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/industrialio-core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/industrialio-event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/industrialio-event.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/kfifo_buf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/kfifo_buf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/light/acpi-als.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/acpi-als.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/light/bh1750.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/bh1750.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/cm3323.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/cm3323.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/hid-sensor-als.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/hid-sensor-als.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/hid-sensor-prox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/hid-sensor-prox.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/ltr501.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/ltr501.c</a></td><td class='right'>1284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/light/stk3310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/stk3310.c</a></td><td class='right'>703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/tcs3414.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/tcs3414.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/tsl2563.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/tsl2563.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/light/tsl4531.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/light/tsl4531.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/magnetometer/bmc150_magn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/bmc150_magn.c</a></td><td class='right'>1109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/hid-sensor-magn-3d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/hid-sensor-magn-3d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/magnetometer/mmc35240.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/mmc35240.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/st_magn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/st_magn.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/st_magn_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/st_magn_core.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/magnetometer/st_magn_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/magnetometer/st_magn_i2c.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/orientation/hid-sensor-incl-3d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/orientation/hid-sensor-incl-3d.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/orientation/hid-sensor-rotation.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/orientation/hid-sensor-rotation.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/pressure/hid-sensor-press.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/pressure/hid-sensor-press.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/proximity/sx9500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/proximity/sx9500.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/temperature/mlx90614.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/temperature/mlx90614.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iio/temperature/tmp006.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iio/temperature/tmp006.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/addr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/addr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/agent.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/agent.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/agent.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/agent.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/cache.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/cm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/cm.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/cma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/cma.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/device.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/iwpm_msg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/iwpm_msg.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/iwpm_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/iwpm_util.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/iwpm_util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/iwpm_util.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/mad.c</a></td><td class='right'>650</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/mad_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/mad_priv.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/mad_rmpp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/mad_rmpp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/multicast.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/multicast.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/core/opa_smi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/opa_smi.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/sa_query.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/sa_query.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/smi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/smi.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/smi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/smi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/sysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/ucm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/ucm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/ucma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/ucma.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/user_mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/user_mad.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/uverbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/uverbs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/uverbs_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/uverbs_cmd.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/uverbs_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/uverbs_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/core/verbs.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/amso1100/c2_provider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/amso1100/c2_provider.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb3/iwch_provider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb3/iwch_provider.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/cq.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/device.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/iw_cxgb4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/iw_cxgb4.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/provider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/provider.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/qp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/qp.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/t4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/cxgb4/t4.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ehca_cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ehca_cq.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ehca_hca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ehca_hca.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ehca_iverbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ehca_iverbs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ehca_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ehca_main.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ehca_sqp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ehca_sqp.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ehca/ipz_pt_fn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ehca/ipz_pt_fn.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_cq.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_driver.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_kernel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_kernel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_mad.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_verbs.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_verbs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_wc_x86_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ipath/ipath_wc_x86_64.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/alias_GUID.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/alias_GUID.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/cq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/mad.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/main.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/mlx4_ib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/mlx4_ib.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/qp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx4/qp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/cq.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/mad.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/main.c</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/mlx5_ib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/mlx5_ib.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/mr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/mr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/odp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/odp.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/qp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/qp.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx5/srq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mlx5/srq.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_cmd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_cmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_cmd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_dev.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_mad.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_profile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_profile.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mthca/mthca_provider.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/mthca/mthca_provider.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/nes/nes_cm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/nes/nes_cm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/nes/nes_cm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/nes/nes_cm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/nes/nes_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/nes/nes_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/nes/nes_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/nes/nes_verbs.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_ah.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ocrdma/ocrdma_ah.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_ah.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ocrdma/ocrdma_ah.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ocrdma/ocrdma_main.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_cq.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_iba7322.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_iba7322.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_mad.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_verbs.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/qib/qib_verbs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/usnic/usnic_ib_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/usnic/usnic_ib_main.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/usnic/usnic_ib_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/usnic/usnic_ib_verbs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/usnic/usnic_ib_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/usnic/usnic_ib_verbs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/usnic/usnic_uiom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/hw/usnic/usnic_uiom.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/ipoib/ipoib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/ipoib/ipoib.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/ipoib/ipoib_cm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/ipoib/ipoib_cm.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/ipoib/ipoib_ib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/ipoib/ipoib_ib.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/ipoib/ipoib_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/ipoib/ipoib_main.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/ipoib/ipoib_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/ipoib/ipoib_verbs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/iser/iser_verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/iser/iser_verbs.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/isert/ib_isert.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/isert/ib_isert.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/srp/ib_srp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/srp/ib_srp.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/srp/ib_srp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/srp/ib_srp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/srpt/ib_srpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/srpt/ib_srpt.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/srpt/ib_srpt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/infiniband/ulp/srpt/ib_srpt.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/evdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/evdev.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/ff-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/ff-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/input-leds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/input-leds.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/input.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/xpad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/joystick/xpad.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/adp5589-keys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/adp5589-keys.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/clps711x-keypad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/clps711x-keypad.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/cros_ec_keyb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/cros_ec_keyb.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/imx_keypad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/imx_keypad.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/max7359_keypad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/max7359_keypad.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/samsung-keypad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/samsung-keypad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/spear-keyboard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/keyboard/spear-keyboard.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/adxl34x-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/adxl34x-i2c.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/ati_remote2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/ati_remote2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/axp20x-pek.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/axp20x-pek.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/misc/da9063_onkey.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/da9063_onkey.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/drv260x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/drv260x.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/misc/drv2665.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/drv2665.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/gpio-beeper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/gpio-beeper.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/retu-pwrbutton.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/retu-pwrbutton.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/soc_button_array.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/soc_button_array.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/twl4030-pwrbutton.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/twl4030-pwrbutton.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/twl6040-vibra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/twl6040-vibra.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/wm831x-on.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/misc/wm831x-on.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/alps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/alps.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/alps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/alps.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/cyapa_gen3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/cyapa_gen3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/cyapa_gen5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/cyapa_gen5.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/elan_i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/elan_i2c.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/elan_i2c_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/elan_i2c_core.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/elan_i2c_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/elan_i2c_i2c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/elan_i2c_smbus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/elan_i2c_smbus.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/focaltech.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/focaltech.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/psmouse-base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/psmouse-base.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/sentelic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/sentelic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/synaptics.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/synaptics.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/synaptics_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/mouse/synaptics_i2c.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/serio/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/serport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/serio/serport.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/atmel_mxt_ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/atmel_mxt_ts.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/cyttsp4_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/cyttsp4_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/edt-ft5x06.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/edt-ft5x06.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/goodix.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/goodix.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/of_touchscreen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/of_touchscreen.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/pixcir_i2c_ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/pixcir_i2c_ts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/s3c2410_ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/s3c2410_ts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/stmpe-ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/stmpe-ts.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/sur40.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/sur40.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/tsc2005.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/tsc2005.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/touchscreen/wdt87xx_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/wdt87xx_i2c.c</a></td><td class='right'>1149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/zforce_ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/input/touchscreen/zforce_ts.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/amd_iommu.c</a></td><td class='right'>1092</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/amd_iommu_init.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu_proto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/amd_iommu_proto.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/amd_iommu_types.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iommu/arm-smmu-v3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/arm-smmu-v3.c</a></td><td class='right'>2669</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/arm-smmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/arm-smmu.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/dmar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/dmar.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/exynos-iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/exynos-iommu.c</a></td><td class='right'>527</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/intel-iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/intel-iommu.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/intel_irq_remapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/intel_irq_remapping.c</a></td><td class='right'>880</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/iommu.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/iova.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/iova.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/irq_remapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/irq_remapping.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/irq_remapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/irq_remapping.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/rockchip-iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/rockchip-iommu.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/tegra-smmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/iommu/tegra-smmu.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/exynos-combiner.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/exynos-combiner.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-armada-370-xp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-armada-370-xp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-atmel-aic5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-atmel-aic5.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-bcm2835.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-gic-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-gic-common.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-gic-v3-its.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-gic-v3-its.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-gic-v3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-gic-v3.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-gic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-gic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-hip04.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-hip04.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/irqchip/irq-ingenic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-ingenic.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-keystone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-keystone.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/irqchip/irq-mips-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-mips-cpu.c</a> (renamed from arch/mips/kernel/irq_cpu.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-mips-gic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-mips-gic.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-mtk-sysirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-mtk-sysirq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-mxs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-mxs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-nvic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-nvic.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/irqchip/irq-renesas-h8300h.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-renesas-h8300h.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/irqchip/irq-renesas-h8s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-renesas-h8s.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-renesas-intc-irqpin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-renesas-intc-irqpin.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-renesas-irqc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-renesas-irqc.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-s3c24xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-s3c24xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/irqchip/irq-sa11x0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-sa11x0.c</a> (renamed from arch/arm/mach-sa1100/irq.c)</td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-sun4i.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-sun4i.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-versatile-fpga.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-versatile-fpga.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-vf610-mscm-ir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-vf610-mscm-ir.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-vic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-vic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irq-vt8500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irq-vt8500.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/irqchip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/irqchip.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/irqchip/spear-shirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/irqchip/spear-shirq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/capi/capidrv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/isdn/capi/capidrv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hisax/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/isdn/hisax/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hisax/st5481_usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/isdn/hisax/st5481_usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/i4l/isdn_net.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/isdn/i4l/isdn_net.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/isdn/mISDN/socket.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/Kconfig</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/led-class.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/led-class.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/led-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/led-core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-aat1290.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-aat1290.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-bcm6328.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-bcm6328.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-bcm6358.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-bcm6358.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-cobalt-raq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-cobalt-raq.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-gpio.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-ktd2692.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-ktd2692.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-lp5523.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-lp5523.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-lp55xx-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-lp55xx-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-max77693.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-max77693.c</a></td><td class='right'>1097</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-syscon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-syscon.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-tlc591xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds-tlc591xx.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/leds/leds.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/lguest/interrupts_and_traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/lguest/interrupts_and_traps.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/lguest/x86/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/lguest/x86/core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/macintosh/nvram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/macintosh/nvram.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/arm_mhu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/arm_mhu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mailbox/bcm2835-mailbox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/bcm2835-mailbox.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/mailbox-altera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/mailbox-altera.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/mailbox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/mailbox.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/omap-mailbox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/omap-mailbox.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/pcc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/pcc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mailbox/pl320-ipc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mailbox/pl320-ipc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/closure.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/closure.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/io.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/journal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/journal.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/request.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/super.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bcache/util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bcache/util.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bitmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/bitmap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-bio-prison.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-bio-prison.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-bio-prison.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-bio-prison.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-metadata.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-metadata.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-metadata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-metadata.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-policy-cleaner.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-policy-cleaner.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-policy-internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-policy-internal.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-policy-mq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-policy-mq.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/md/dm-cache-policy-smq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-policy-smq.c</a></td><td class='right'>1791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-policy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-policy.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-cache-target.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-cache-target.c</a></td><td class='right'>866</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-crypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-crypt.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-log-writes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-log-writes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-raid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-raid.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-raid1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-raid1.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-snap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-snap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-stats.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-stats.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-stats.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-stats.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-stripe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-stripe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin-metadata.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-thin-metadata.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin-metadata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-thin-metadata.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-thin.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-verity.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm-verity.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/dm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/md.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/md.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/md.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/md.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-block-manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-block-manager.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-block-manager.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-block-manager.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-btree-remove.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-btree-remove.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-btree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-btree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-btree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-btree.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-space-map-metadata.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/persistent-data/dm-space-map-metadata.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/raid1.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/raid10.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/raid5.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid5.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/md/raid5.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/flexcop-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/flexcop-common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/flexcop-fe-tuner.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/flexcop-fe-tuner.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/flexcop-hw-filter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/flexcop-hw-filter.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/flexcop-misc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/flexcop-misc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/b2c2/flexcop-reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/b2c2/flexcop-reg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/siano/smscoreapi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/siano/smscoreapi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/siano/smsdvb-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/siano/smsdvb-main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/siano/smsdvb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/siano/smsdvb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/siano/smsir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/common/siano/smsir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-core/dvb_frontend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-core/dvb_frontend.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-core/dvb_frontend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-core/dvb_frontend.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/a8293.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/a8293.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/a8293.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/a8293.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/af9013.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/af9013.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/af9033.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/af9033.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/as102_fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/as102_fe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/atbm8830.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/atbm8830.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/au8522_dig.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/au8522_dig.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/au8522_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/au8522_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/bcm3510.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/bcm3510.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx22700.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx22700.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx22702.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx22702.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24110.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24110.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24116.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24116.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24117.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24117.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24120.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24120.c</a></td><td class='right'>1595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24120.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24120.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24123.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24123.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cx24123.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cx24123.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cxd2820r_c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cxd2820r_c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cxd2820r_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cxd2820r_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cxd2820r_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cxd2820r_priv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cxd2820r_t.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cxd2820r_t.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/cxd2820r_t2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/cxd2820r_t2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib0070.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib0070.c</a></td><td class='right'>575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib0090.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib0090.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib3000mb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib3000mb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib3000mc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib3000mc.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib7000m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib7000m.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib7000p.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib7000p.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib8000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib8000.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib8000.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib8000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dib9000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dib9000.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/drx39xyj/drxj.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/drx39xyj/drxj.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/drxd_hard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/drxd_hard.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/drxk_hard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/drxk_hard.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/drxk_hard.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/drxk_hard.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ds3000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ds3000.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/dvb_dummy_fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/dvb_dummy_fe.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ec100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ec100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/hd29l2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/hd29l2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/hd29l2_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/hd29l2_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/isl6405.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/isl6405.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/isl6421.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/isl6421.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/l64781.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/l64781.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lg2160.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lg2160.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lgdt3305.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lgdt3305.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lgdt3306a.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lgdt3306a.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lgdt330x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lgdt330x.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lgs8gl5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lgs8gl5.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lgs8gxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lgs8gxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lnbp21.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lnbp21.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/lnbp22.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/lnbp22.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/m88ds3103.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/m88ds3103.c</a></td><td class='right'>1275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/m88ds3103.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/m88ds3103.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/m88ds3103_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/m88ds3103_priv.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/m88rs2000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/m88rs2000.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mb86a16.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mb86a16.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mb86a16.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mb86a16.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mb86a20s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mb86a20s.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mb86a20s.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mb86a20s.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mt312.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mt312.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/mt352.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/mt352.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/nxt200x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/nxt200x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/nxt6000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/nxt6000.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/or51132.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/or51132.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/or51211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/or51211.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2830.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2830.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2830_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2830_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2832.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2832.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2832.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2832.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2832_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2832_priv.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2832_sdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2832_sdr.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/rtl2832_sdr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/rtl2832_sdr.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s5h1409.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s5h1409.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s5h1411.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s5h1411.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s5h1420.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s5h1420.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s5h1432.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s5h1432.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s921.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s921.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/s921.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/s921.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/si2165.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/si2165.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/si2168.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/si2168.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/si2168.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/si2168.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/si2168_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/si2168_priv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/si21xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/si21xx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/sp8870.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/sp8870.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/sp887x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/sp887x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stb0899_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stb0899_drv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0288.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0288.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0297.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0297.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0299.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0299.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0367.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0367.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0367_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0367_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0900_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0900_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv0900_sw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv0900_sw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv090x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv090x.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/stv6110.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/stv6110.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tc90522.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tc90522.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10021.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10021.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10023.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10023.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10048.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10048.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda1004x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda1004x.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10071.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10071.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10071.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10071.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10071_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10071_priv.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda10086.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda10086.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/tda8083.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/tda8083.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ts2020.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ts2020.c</a></td><td class='right'>591</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ts2020.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ts2020.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ves1820.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ves1820.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/ves1x93.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/ves1x93.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb-frontends/zl10353.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/dvb-frontends/zl10353.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/firewire/firedtv-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/firewire/firedtv-fe.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/firewire/firedtv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/firewire/firedtv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adp1653.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adp1653.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7170.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7170.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7175.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7175.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7183.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7183.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7511.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7511.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7604.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7604.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/adv7842.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/adv7842.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/ak881x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/ak881x.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/cx25840/cx25840-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/cx25840/cx25840-core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/ml86v7667.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/ml86v7667.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/mt9v011.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/mt9v011.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/ov2659.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/ov2659.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/ov7670.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/ov7670.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/s5c73m3/s5c73m3-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/s5c73m3/s5c73m3-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/s5k5baf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/s5k5baf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/s5k6aa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/s5k6aa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/saa6752hs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/saa6752hs.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/saa7115.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/saa7115.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/saa717x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/saa717x.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/smiapp/smiapp-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/smiapp/smiapp-core.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/imx074.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/imx074.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/mt9m001.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/mt9m001.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/mt9m111.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/mt9m111.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/mt9t031.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/mt9t031.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/mt9t112.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/mt9t112.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/mt9v022.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/mt9v022.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov2640.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov2640.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov5642.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov5642.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov6650.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov6650.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov772x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov772x.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov9640.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov9640.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/ov9740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/ov9740.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/rj54n1cb0c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/rj54n1cb0c.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/soc_camera/tw9910.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/soc_camera/tw9910.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/sr030pc30.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/sr030pc30.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/tvaudio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/tvaudio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/tvp514x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/tvp514x.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/tvp5150.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/tvp5150.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/tvp7002.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/tvp7002.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/i2c/vs6624.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/i2c/vs6624.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/bt8xx/bttv-audio-hook.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/bt8xx/bttv-audio-hook.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/bt8xx/bttv-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/bt8xx/bttv-driver.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/bt8xx/dst.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/bt8xx/dst.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/bt8xx/dst_ca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/bt8xx/dst_ca.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/bt8xx/dst_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/bt8xx/dst_common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-alsa-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-alsa-main.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-alsa-pcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-alsa-pcm.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-alsa-pcm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-alsa-pcm.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-alsa.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-alsa.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-cpld.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-cpld.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-cpld.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-cpld.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-driver.c</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-driver.h</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-flash.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-flash.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-flash.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-i2c.c</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-i2c.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-irq.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-irq.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-omnitek.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-omnitek.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-omnitek.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-omnitek.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-v4l2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-v4l2.c</a></td><td class='right'>1272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/cobalt-v4l2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/cobalt-v4l2.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00233_video_measure_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00233_video_measure_memmap_package.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00235_fdma_packer_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00235_fdma_packer_memmap_package.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00389_cvi_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00389_cvi_memmap_package.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00460_evcnt_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00460_evcnt_memmap_package.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00473_freewheel_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00473_freewheel_memmap_package.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00479_clk_loss_detector_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00479_clk_loss_detector_memmap_package.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/cobalt/m00514_syncgen_flow_evcnt_memmap_package.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cobalt/m00514_syncgen_flow_evcnt_memmap_package.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx18/cx18-av-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx18/cx18-av-core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx18/cx18-controls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx18/cx18-controls.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx18/cx18-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx18/cx18-driver.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx18/cx18-ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx18/cx18-ioctl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx18/cx18-streams.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx18/cx18-streams.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/altera-ci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/altera-ci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/cx23885-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/cx23885-dvb.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/cx23885-f300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/cx23885-f300.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/cx23885-f300.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/cx23885-f300.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/cx23885-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/cx23885-video.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx23885/cx23885.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx23885/cx23885.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx25821/cx25821-medusa-reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx25821/cx25821-medusa-reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88-dvb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88-mpeg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88-mpeg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88-vbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88-vbi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88-video.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/cx88/cx88.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/cx88/cx88.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ddbridge/ddbridge-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ddbridge/ddbridge-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/dm1105/dm1105.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/dm1105/dm1105.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/dt3155/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/dt3155/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/dt3155/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/dt3155/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/dt3155/dt3155.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/dt3155/dt3155.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/media/pci/dt3155/dt3155.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/dt3155/dt3155.h</a> (renamed from drivers/staging/media/dt3155v4l/dt3155v4l.h)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/ivtv-controls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/ivtv-controls.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/ivtv-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/ivtv-driver.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/ivtv-driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/ivtv-driver.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/ivtv-ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/ivtv-ioctl.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ivtv/ivtvfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ivtv/ivtvfb.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/hopper_cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/hopper_cards.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_cards.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_common.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_dma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_i2c.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_input.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_input.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_input.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_pcmcia.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_pcmcia.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_uart.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_vp1034.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_vp1034.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/mantis/mantis_vp1034.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/mantis/mantis_vp1034.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ngene/ngene-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ngene/ngene-core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ngene/ngene.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ngene/ngene.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/pt1/pt1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/pt1/pt1.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/pt1/va1j5jf8007s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/pt1/va1j5jf8007s.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/pt1/va1j5jf8007t.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/pt1/va1j5jf8007t.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/pt3/pt3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/pt3/pt3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-alsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-alsa.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-cards.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-core.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-dvb.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-empress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-empress.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-go7007.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-go7007.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-i2c.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-input.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-ts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-ts.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-tvaudio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-tvaudio.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-vbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-vbi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134-video.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7134/saa7134.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7134/saa7134.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-api.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-buffer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-bus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-cards.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-core.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-dvb.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-encoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-encoder.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-i2c.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164-vbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164-vbi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/saa7164/saa7164.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/saa7164/saa7164.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/smipcie/smipcie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/smipcie/smipcie.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/sta2x11/sta2x11_vip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/sta2x11/sta2x11_vip.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/av7110.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/av7110.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/av7110.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/av7110.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/budget-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/budget-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/budget-patch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/budget-patch.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/budget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/budget.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/ttpci/budget.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/ttpci/budget.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/pci/zoran/zoran_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/pci/zoran/zoran_device.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/am437x/am437x-vpfe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/am437x/am437x-vpfe.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/blackfin/bfin_capture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/blackfin/bfin_capture.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/coda/coda-bit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/coda/coda-bit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/coda/coda-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/coda/coda-common.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/coda/coda.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/coda/coda.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/coda/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/coda/trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/davinci/vpbe_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/davinci/vpbe_display.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/davinci/vpfe_capture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/davinci/vpfe_capture.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/exynos-gsc/gsc-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/exynos-gsc/gsc-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/exynos4-is/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/exynos4-is/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/exynos4-is/media-dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/exynos4-is/media-dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/fsl-viu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/fsl-viu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/m2m-deinterlace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/m2m-deinterlace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/marvell-ccic/cafe-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/marvell-ccic/cafe-driver.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/marvell-ccic/mcam-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/marvell-ccic/mcam-core.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/marvell-ccic/mcam-core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/marvell-ccic/mcam-core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/marvell-ccic/mmp-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/marvell-ccic/mmp-driver.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/omap/omap_vout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/omap/omap_vout.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/omap3isp/isppreview.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/omap3isp/isppreview.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s3c-camif/camif-capture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s3c-camif/camif-capture.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s3c-camif/camif-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s3c-camif/camif-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-g2d/g2d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-g2d/g2d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-mfc/s5p_mfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-mfc/s5p_mfc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-tv/hdmi_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-tv/hdmi_drv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-tv/mixer_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-tv/mixer_drv.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/s5p-tv/sdo_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/s5p-tv/sdo_drv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/sh_vou.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sh_vou.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/atmel-isi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/atmel-isi.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/mx2_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/mx2_camera.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/mx3_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/mx3_camera.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/omap1_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/omap1_camera.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/pxa_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/pxa_camera.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/rcar_vin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/rcar_vin.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/sh_mobile_csi2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/sh_mobile_csi2.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/soc_camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/soc_camera.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/soc_camera_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/soc_camera_platform.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/soc_camera/soc_scale_crop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/soc_camera/soc_scale_crop.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp-debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp-debug.c</a></td><td class='right'>679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp-filter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp-filter.h</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp-hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp-hw.c</a></td><td class='right'>823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp-reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp-reg.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp-v4l2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp-v4l2.c</a></td><td class='right'>1416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/platform/sti/bdisp/bdisp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/sti/bdisp/bdisp.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/via-camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/via-camera.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vim2m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vim2m.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-core.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-ctrls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-ctrls.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-radio-rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-radio-rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-sdr-cap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-sdr-cap.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-sdr-cap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-sdr-cap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-tpg-colors.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-tpg-colors.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-tpg-colors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-tpg-colors.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-tpg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-tpg.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-tpg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-tpg.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-vid-cap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-vid-cap.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-vid-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-vid-common.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/vivid/vivid-vid-out.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/vivid/vivid-vid-out.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/xilinx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/xilinx/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/platform/xilinx/xilinx-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/platform/xilinx/xilinx-dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-si476x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/radio-si476x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-timb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/radio-timb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/si470x/radio-si470x-i2c.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/si470x/radio-si470x-usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/si470x/radio-si470x.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si4713/si4713.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/si4713/si4713.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/wl128x/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/wl128x/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/wl128x/fmdrv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/radio/wl128x/fmdrv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/fintek-cir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/fintek-cir.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/gpio-ir-recv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/gpio-ir-recv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-hix5hd2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/ir-hix5hd2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-rc5-decoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/ir-rc5-decoder.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-rc6-decoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/ir-rc6-decoder.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-sony-decoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/ir-sony-decoder.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/keymaps/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/keymaps/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-technisat-ts35.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/keymaps/rc-technisat-ts35.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-terratec-cinergy-c-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/keymaps/rc-terratec-cinergy-c-pci.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-terratec-cinergy-s2-hd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/keymaps/rc-terratec-cinergy-s2-hd.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-twinhan-dtv-cab-ci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/keymaps/rc-twinhan-dtv-cab-ci.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/nuvoton-cir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/nuvoton-cir.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/nuvoton-cir.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/nuvoton-cir.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/rc-core-priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/rc-core-priv.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/rc-ir-raw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/rc-ir-raw.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/rc-loopback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/rc-loopback.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/rc-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/rc-main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/redrat3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/redrat3.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/st_rc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/st_rc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/streamzap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/rc/streamzap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/e4000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/e4000.c</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/e4000.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/e4000.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/e4000_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/e4000_priv.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/fc0013.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/fc0013.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/fc2580.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/fc2580.c</a></td><td class='right'>781</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/fc2580.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/fc2580.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/fc2580_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/fc2580_priv.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/msi001.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/msi001.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/qt1010.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/qt1010.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/r820t.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/r820t.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/si2157.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/si2157.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/si2157.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/si2157.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/si2157_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/si2157_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/tua9001.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/tua9001.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/tua9001.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/tua9001.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/tua9001_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/tua9001_priv.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/tuner-i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/tuner-i2c.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/tuners/tuner-xc2028.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/tuners/tuner-xc2028.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/as102/as102_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/as102/as102_drv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/au0828/au0828-cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/au0828/au0828-cards.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/au0828/au0828-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/au0828/au0828-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-417.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-417.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-avcore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-avcore.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-cards.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-cards.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-core.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-dvb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-vbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-vbi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx-video.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/cx231xx/cx231xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/cx231xx/cx231xx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/af9015.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/af9015.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/af9015.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/af9015.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/af9035.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/af9035.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/dvbsky.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/dvbsky.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/lmedm04.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/lmedm04.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/mxl111sf-demod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/mxl111sf-demod.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/rtl28xxu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/rtl28xxu.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb-v2/rtl28xxu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb-v2/rtl28xxu.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/af9005-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/af9005-fe.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/az6027.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/az6027.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/cinergyT2-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/cinergyT2-fe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/cxusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/cxusb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/dib0700.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/dib0700.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/dib0700_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/dib0700_core.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/dib0700_devices.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/dib0700_devices.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/dtt200u-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/dtt200u-fe.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/dw2102.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/dw2102.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/friio-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/friio-fe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/gp8psk-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/gp8psk-fe.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/opera1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/opera1.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/technisat-usb2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/technisat-usb2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/vp702x-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/vp702x-fe.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/vp702x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/vp702x.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/dvb-usb/vp7045-fe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/dvb-usb/vp7045-fe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/em28xx/em28xx-camera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/em28xx/em28xx-camera.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/em28xx/em28xx-dvb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/em28xx/em28xx-dvb.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/em28xx/em28xx-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/em28xx/em28xx-video.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/go7007/go7007-driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/go7007/go7007-driver.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/go7007/go7007-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/go7007/go7007-usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/go7007/go7007-v4l2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/go7007/go7007-v4l2.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/go7007/s2250-board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/go7007/s2250-board.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/benq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/benq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/sn9c2028.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/sn9c2028.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/sn9c2028.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/sn9c2028.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/sonixj.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/sonixj.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/stk014.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/stk014.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/xirlink_cit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/xirlink_cit.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/gspca/zc3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/gspca/zc3xx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/msi2500/msi2500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/msi2500/msi2500.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/pvrusb2/pvrusb2-context.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/pvrusb2/pvrusb2-context.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/pvrusb2/pvrusb2-hdw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/pvrusb2/pvrusb2-hdw.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/pvrusb2/pvrusb2-io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/pvrusb2/pvrusb2-io.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/pvrusb2/pvrusb2-ioread.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/pvrusb2/pvrusb2-ioread.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/stk1160/stk1160-v4l.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/stk1160/stk1160-v4l.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/tm6000/tm6000-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/tm6000/tm6000-video.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/ttusb-dec/ttusb_dec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/ttusb-dec/ttusb_dec.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/ttusb-dec/ttusbdecfe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/ttusb-dec/ttusbdecfe.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/usbtv/usbtv-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/usbtv/usbtv-video.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/usbvision/usbvision-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/usbvision/usbvision-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/usbvision/usbvision-video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/usbvision/usbvision-video.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/uvc/uvc_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/uvc/uvc_driver.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/uvc/uvc_queue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/uvc/uvc_queue.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/uvc/uvc_v4l2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/uvc/uvc_v4l2.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/uvc/uvc_video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/uvc/uvc_video.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/uvc/uvcvideo.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/uvc/uvcvideo.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/usb/zr364xx/zr364xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/usb/zr364xx/zr364xx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-async.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-async.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-dv-timings.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-dv-timings.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-flash-led-class.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-flash-led-class.c</a></td><td class='right'>710</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-ioctl.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-mem2mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-mem2mem.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/v4l2-of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/v4l2-of.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/videobuf2-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/videobuf2-core.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/videobuf2-dma-contig.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/videobuf2-dma-contig.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/videobuf2-dma-sg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/videobuf2-dma-sg.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/v4l2-core/videobuf2-vmalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/media/v4l2-core/videobuf2-vmalloc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/omap-gpmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/omap-gpmc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/mc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/mc.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/mc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/mc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/tegra114.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/tegra114.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/tegra/tegra124-emc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/tegra124-emc.c</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/tegra124.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/tegra124.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memory/tegra/tegra30.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memory/tegra/tegra30.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memstick/host/jmb38x_ms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memstick/host/jmb38x_ms.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/memstick/host/r592.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/memstick/host/r592.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptbase.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/message/fusion/mptbase.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptbase.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/message/fusion/mptbase.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptsas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/message/fusion/mptsas.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/88pm860x-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/88pm860x-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/ab8500-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/ab8500-debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-gpadc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/ab8500-gpadc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/arizona-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/arizona-core.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/arizona-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/arizona-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/asic3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/asic3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/axp20x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/axp20x.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/cros_ec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/cros_ec.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/cros_ec_i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/cros_ec_i2c.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/cros_ec_spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/cros_ec_spi.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9052-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/da9052-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9055-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/da9055-core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9063-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/da9063-core.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9063-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/da9063-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9150-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/da9150-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/db8500-prcmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/db8500-prcmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/htc-i2cpld.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/htc-i2cpld.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/intel_soc_pmic_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/intel_soc_pmic_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/intel_soc_pmic_crc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/intel_soc_pmic_crc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/janz-cmodio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/janz-cmodio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/lp8788-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/lp8788-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/lpc_ich.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/lpc_ich.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/max8925-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/max8925-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/max8997-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/max8997-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/max8998-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/max8998-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/mc13xxx-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/mc13xxx-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/mfd-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/mfd-core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/mt6397-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/mt6397-core.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/si476x-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/si476x-i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/stmpe-i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/stmpe-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/stmpe-spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/stmpe-spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/stmpe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/stmpe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tc3589x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/tc3589x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps6586x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/tps6586x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl4030-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/twl4030-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl4030-power.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/twl4030-power.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl6030-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/twl6030-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ucb1x00-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/ucb1x00-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm831x-auxadc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/wm831x-auxadc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm831x-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/wm831x-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8350-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/wm8350-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8994-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mfd/wm8994-irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/altera-stapl/altera.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/altera-stapl/altera.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/misc/carma/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/carma/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/misc/carma/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/carma/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/misc/carma/carma-fpga-program.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/carma/carma-fpga-program.c</a></td><td class='right'>1182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/misc/carma/carma-fpga.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/carma/carma-fpga.c</a></td><td class='right'>1507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/cxl/api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/api.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/context.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/context.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/cxl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/cxl.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/fault.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/file.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/irq.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/native.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/native.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/pci.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/cxl/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/sysfs.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/cxl/vphb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/cxl/vphb.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/kgdbts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/kgdbts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/lis3lv02d/lis3lv02d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/lis3lv02d/lis3lv02d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/amthif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/amthif.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/bus.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/client.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/client.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/client.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/debugfs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/hbm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/hbm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/hw-me.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/hw-me.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/hw-txe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/hw-txe.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/init.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/interrupt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/interrupt.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/main.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/mei_dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/mei_dev.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/nfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/nfc.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/pci-txe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/pci-txe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mei/wd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mei/wd.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/bus/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/bus/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/bus/scif_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/bus/scif_bus.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/bus/scif_bus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/bus/scif_bus.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/card/mic_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/card/mic_device.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/card/mic_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/card/mic_device.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/card/mic_x100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/card/mic_x100.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/card/mic_x100.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/card/mic_x100.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/common/mic_dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/common/mic_dev.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_boot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_boot.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_debugfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_device.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_intr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_intr.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_smpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_smpt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_smpt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_smpt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_virtio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_virtio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/mic/host/mic_x100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/host/mic_x100.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_api.c</a></td><td class='right'>1276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_debugfs.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_epd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_epd.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_epd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_epd.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_fd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_fd.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_main.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_main.h</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_map.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_map.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_nm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_nm.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_nodeqp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_nodeqp.c</a></td><td class='right'>1312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_nodeqp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_nodeqp.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_peer_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_peer_bus.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_peer_bus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_peer_bus.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_ports.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_ports.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_rb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_rb.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/mic/scif/scif_rb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/mic/scif/scif_rb.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/spear13xx_pcie_gadget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/spear13xx_pcie_gadget.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/sram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/sram.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/ti-st/st_kim.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/misc/ti-st/st_kim.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/block.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/card/block.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/mmc_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/card/mmc_test.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/queue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/card/queue.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/queue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/card/queue.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/core.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/host.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/host.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/host.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/mmc.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/mmc_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/mmc_ops.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/mmc_ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/mmc_ops.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/sd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/sd.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/sdio.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/sdio_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/core/sdio_bus.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/android-goldfish.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/android-goldfish.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/davinci_mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/davinci_mmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc-exynos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/dw_mmc-exynos.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc-k3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/dw_mmc-k3.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc-rockchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/dw_mmc-rockchip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/dw_mmc.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/dw_mmc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mmc/host/mtk-sd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/mtk-sd.c</a></td><td class='right'>1462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mxcmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/mxcmmc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mxs-mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/mxs-mmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/omap_hsmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/omap_hsmmc.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/rtsx_pci_sdmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/rtsx_pci_sdmmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/rtsx_usb_sdmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/rtsx_usb_sdmmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/s3cmci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/s3cmci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-bcm2835.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-esdhc-imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-esdhc-imx.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-of-arasan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-of-arasan.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-of-esdhc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-of-esdhc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pci-data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-pci-data.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-pci.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-pci.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pxav2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-pxav2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pxav3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-pxav3.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-s3c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-s3c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-sirf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-sirf.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-spear.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-spear.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-st.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci-st.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci_f_sdh30.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sdhci_f_sdh30.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sh_mmcif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/sh_mmcif.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/tmio_mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/tmio_mmc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/tmio_mmc_pio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mmc/host/tmio_mmc_pio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/chips/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/chips/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/chips/cfi_cmdset_0002.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/chips/cfi_cmdset_0002.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/chips/cfi_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/chips/cfi_util.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/block2mtd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/block2mtd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/docg3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/docg3.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/m25p80.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/m25p80.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/devices/powernv_flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/powernv_flash.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/spear_smi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/devices/spear_smi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/amd76xrom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/amd76xrom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/dc21285.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/dc21285.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/esb2rom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/esb2rom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/ichxrom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/ichxrom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/lantiq-flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/lantiq-flash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/physmap_of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/maps/physmap_of.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/mtd_blkdevs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/mtd_blkdevs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/mtdcore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/mtdcore.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/bcm63138_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/bcm63138_nand.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/brcmnand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/brcmnand.c</a></td><td class='right'>2246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/brcmnand.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/brcmnand.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/brcmstb_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/brcmstb_nand.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mtd/nand/brcmnand/iproc_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/brcmnand/iproc_nand.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/cs553x_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/cs553x_nand.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/diskonchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/diskonchip.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/fsmc_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/fsmc_nand.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/mpc5121_nfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/mpc5121_nfc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/mxc_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/mxc_nand.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/nand_base.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_bbt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/nand_bbt.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_ids.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/nand_ids.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nandsim.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/nandsim.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/ndfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/ndfc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/plat_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/plat_nand.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/pxa3xx_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/pxa3xx_nand.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/r852.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/r852.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/s3c2410.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/s3c2410.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/xway_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/nand/xway_nand.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/onenand/samsung.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/onenand/samsung.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/spi-nor/fsl-quadspi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/spi-nor/fsl-quadspi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/spi-nor/spi-nor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/spi-nor/spi-nor.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/block.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/block.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/build.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/build.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/fastmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/fastmap.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/ubi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/ubi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/vmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/vmt.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/vtbl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/vtbl.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/wl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/mtd/ubi/wl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/arcnet/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/arcnet/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_3ad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_3ad.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_main.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_netlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_netlink.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_options.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_options.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_procfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_procfs.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_sysfs.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_sysfs_slave.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/bonding/bond_sysfs_slave.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/c_can/c_can.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/c_can/c_can.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/flexcan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/flexcan.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/janz-ican3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/janz-ican3.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/rcar_can.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/rcar_can.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/slcan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/slcan.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/spi/mcp251x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/can/spi/mcp251x.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/bcm_sf2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/bcm_sf2.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6123_61_65.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6123_61_65.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6131.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6131.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6171.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6171.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6352.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6352.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6xxx.c</a></td><td class='right'>980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/dsa/mv88e6xxx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/dsa/mv88e6xxx.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/3com/3c59x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/3com/3c59x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/3com/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/3com/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/8390/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/8390/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/adaptec/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/adaptec/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/adi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/adi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/agere/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/agere/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/allwinner/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/allwinner/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/alteon/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/alteon/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></td><td class='right'>1332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/xgbe/xgbe.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_main.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_main.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/apple/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/apple/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/arc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/arc/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/atheros/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/b44.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/b44.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bcmsysport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bcmsysport.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bcmsysport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bcmsysport.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bgmac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bgmac.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/genet/bcmmii.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/sb1250-mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/sb1250-mac.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/tg3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_cee.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_cee.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_cs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_cs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_defs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_defs_cna.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_defs_cna.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_defs_mfg_comm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_defs_mfg_comm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_ioc.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_msgq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfa_msgq.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfi.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfi_cna.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfi_cna.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfi_enet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bfi_enet.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bna.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bna.h</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bna_enet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bna_enet.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bna_hw_defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bna_hw_defs.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bna_tx_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bna_tx_rx.c</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bna_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bna_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bnad.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bnad_debugfs.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/cna.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/cna.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/cna_fwimg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/brocade/bna/cna_fwimg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cadence/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/macb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cadence/macb.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/macb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cadence/macb.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/Kconfig</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn66xx_device.c</a></td><td class='right'>796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn66xx_device.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn68xx_device.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn68xx_device.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/cn68xx_regs.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/lio_ethtool.c</a></td><td class='right'>1217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/lio_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/lio_main.c</a></td><td class='right'>3668</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/liquidio_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/liquidio_common.h</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/liquidio_image.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/liquidio_image.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_config.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_config.h</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_console.c</a></td><td class='right'>723</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_device.c</a></td><td class='right'>1304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_device.h</a></td><td class='right'>649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_droq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_droq.c</a></td><td class='right'>987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_droq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_droq.h</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_iq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_iq.h</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_main.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_network.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_network.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_nic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_nic.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/octeon_nic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/octeon_nic.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/request_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/request_manager.c</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/response_manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/response_manager.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/liquidio/response_manager.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/liquidio/response_manager.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nic.h</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nic_main.c</a></td><td class='right'>932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nic_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nic_reg.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nicvf_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a></td><td class='right'>1341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a></td><td class='right'>1545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/nicvf_queues.h</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/q_struct.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/q_struct.h</a></td><td class='right'>701</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a></td><td class='right'>966</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cavium/thunder/thunder_bgx.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></td><td class='right'>2222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_msg.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_regs.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_values.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4_values.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4vf/sge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4vf/sge.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cirrus/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cirrus/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cisco/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/enic_clsf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cisco/enic/enic_clsf.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/enic_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cisco/enic/enic_ethtool.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/enic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/vnic_rq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/cisco/enic/vnic_rq.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dec/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dec/tulip/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/de4x5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dec/tulip/de4x5.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/uli526x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dec/tulip/uli526x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dlink/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dlink/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dlink/dl2k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/dlink/dl2k.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_cmds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_cmds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_hw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_main.c</a></td><td class='right'>502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_roce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_roce.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_roce.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/emulex/benet/be_roce.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/ezchip/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ezchip/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/ezchip/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ezchip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/ezchip/nps_enet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ezchip/nps_enet.c</a></td><td class='right'>658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/ezchip/nps_enet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ezchip/nps_enet.h</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/faraday/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/faraday/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fec.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/fec.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fec_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/fec_main.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fec_ptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/fec_ptp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/gianfar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/fujitsu/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/fujitsu/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/hisilicon/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/hisilicon/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/hisilicon/hip04_eth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/hisilicon/hip04_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/hisilicon/hix5hd2_gmac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/hp/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/hp/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/i825xx/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ibm/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/emac/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ibm/emac/core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/ibmveth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ibm/ibmveth.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/ibmveth.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ibm/ibmveth.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/icplus/ipg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/icplus/ipg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/icplus/ipg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/icplus/ipg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e100.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e100.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000/e1000_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/80003es2lan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/80003es2lan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/80003es2lan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/80003es2lan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/82571.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/82571.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/82571.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/82571.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/defines.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/defines.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/e1000.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/e1000.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/hw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ich8lan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/ich8lan.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/mac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/manage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/manage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/manage.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/manage.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/nvm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/nvm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/nvm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/nvm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/param.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/param.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/ptp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/e1000e/regs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_iov.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_iov.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_main.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_mbx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_mbx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_netdev.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_pf.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_pf.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_ptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_ptp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/fm10k/fm10k_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/fm10k/fm10k_type.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_fcoe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_fcoe.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_main.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_type.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40e_txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40e_txrx.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40e_txrx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40e_txrx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40e_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40e_type.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40evf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40evf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/i40evf/i40evf_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/i40evf/i40evf_main.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_82575.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_defines.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/igb/e1000_defines.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/igb_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a></td><td class='right'>896</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/marvell/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/mv643xx_eth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/mvneta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/marvell/mvneta.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/cmd.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/cq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_cq.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_port.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_port.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_resources.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_resources.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/eq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/eq.c</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/intf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/intf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/main.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_stats.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/mlx4_stats.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/profile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/profile.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/qp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/qp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx4/resource_tracker.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/alloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/alloc.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/cq.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></td><td class='right'>679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_flow_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_flow_table.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></td><td class='right'>1915</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/eq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/flow_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/flow_table.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/mad.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/mad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/mcg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/mcg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/port.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/port.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/qp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/qp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/srq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/srq.c</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/transobj.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/transobj.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/transobj.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/transobj.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/uar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/uar.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/wq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/wq.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx5/core/wq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/mellanox/mlx5/core/wq.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/micrel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/micrel/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/micrel/ksz884x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/micrel/ksz884x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/microchip/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/microchip/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/moxa/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/moxa/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/moxa/moxart_ether.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/moxa/moxart_ether.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/myricom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/myricom/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/natsemi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/natsemi/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/neterion/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/s2io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/neterion/s2io.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/vxge/vxge-traffic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/neterion/vxge/vxge-traffic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/nuvoton/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/nuvoton/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/nvidia/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/nvidia/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/oki-semi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/oki-semi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/packetengines/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/packetengines/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/pasemi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/pasemi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qlogic/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qlogic/qlcnic/qlcnic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlge/qlge_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qlogic/qlge/qlge_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qualcomm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qualcomm/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qualcomm/qca_spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/qualcomm/qca_spi.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/rdc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/rdc/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/realtek/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/realtek/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/renesas/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/renesas/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/ravb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/renesas/ravb.h</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/ravb_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/renesas/ravb_main.c</a></td><td class='right'>1824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/ravb_ptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/renesas/ravb_ptp.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/rocker/rocker.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/rocker/rocker.c</a></td><td class='right'>1615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/rocker/rocker.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/rocker/rocker.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/seeq/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/seeq/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ef10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/ef10.c</a></td><td class='right'>1265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ef10_sriov.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/ef10_sriov.c</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ef10_sriov.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/ef10_sriov.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/efx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/efx.c</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/efx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/efx.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/enum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/enum.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/ethtool.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/falcon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/falcon.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/farch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/farch.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/mcdi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/mcdi.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/mcdi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/mcdi.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/mcdi_pcol.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/mcdi_pcol.h</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/mcdi_port.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/mcdi_port.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/net_driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/net_driver.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/nic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/nic.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/ptp.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/siena.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/siena.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/siena_sriov.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/siena_sriov.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/siena_sriov.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/siena_sriov.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/sriov.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/sriov.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/sriov.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/sriov.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sfc/tx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sgi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sgi/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/silan/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/silan/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sis/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sis/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sis/sis900.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sis/sis900.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/smsc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/smsc/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/descs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/descs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/enh_desc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/enh_desc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/mmc_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/mmc_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/norm_desc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/norm_desc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sun/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/cassini.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/sun/cassini.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/tehuti/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/tehuti/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ti/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/cpsw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ti/cpsw.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/cpsw_ale.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ti/cpsw_ale.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/cpsw_ale.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ti/cpsw_ale.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/netcp_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/ti/netcp_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/tile/tilepro.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/tile/tilepro.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/toshiba/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/toshiba/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/toshiba/ps3_gelic_net.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/toshiba/ps3_gelic_net.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/toshiba/spider_net.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/toshiba/spider_net.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/tundra/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/tundra/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/via/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/via/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/via/via-rhine.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/via/via-rhine.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/wiznet/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/wiznet/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xilinx/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/ll_temac_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/xilinx_axienet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xircom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xircom/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ethernet/xscale/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/fddi/skfp/srf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/fddi/skfp/srf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/geneve.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/geneve.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hamradio/bpqether.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/hamradio/bpqether.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/hyperv_net.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/hyperv/hyperv_net.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/netvsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/hyperv/netvsc.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/netvsc_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/rndis_filter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/hyperv/rndis_filter.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/at86rf230.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/at86rf230.c</a></td><td class='right'>488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ieee802154/at86rf230.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/at86rf230.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ieee802154/atusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/atusb.c</a></td><td class='right'>762</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ieee802154/atusb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/atusb.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/cc2520.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/cc2520.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/fakelb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/fakelb.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ieee802154/mrf24j40.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ieee802154/mrf24j40.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ipvlan/ipvlan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ipvlan/ipvlan.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ipvlan/ipvlan_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ipvlan/ipvlan_core.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ipvlan/ipvlan_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ipvlan/ipvlan_main.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/irda-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/irda/irda-usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/macvtap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/macvtap.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/netconsole.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/netconsole.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ntb_netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ntb_netdev.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/phy/amd-xgbe-phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/amd-xgbe-phy.c</a></td><td class='right'>1901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/bcm7xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/bcm7xxx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/davicom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/davicom.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/phy/dp83867.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/dp83867.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/icplus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/icplus.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/marvell.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/marvell.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/mdio-bcm-unimac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/mdio-bcm-unimac.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/mdio-bitbang.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/mdio-bitbang.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/mdio-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/mdio-gpio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/mdio-mux-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/mdio-mux-gpio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/micrel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/micrel.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/phy.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/phy_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/phy_device.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/realtek.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/realtek.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/vitesse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/phy/vitesse.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/pppoe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ppp/pppoe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/pppox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ppp/pppox.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/pptp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/ppp/pptp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/team.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/team/team.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/tun.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/tun.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_ether.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/usb/cdc_ether.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_mbim.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/usb/cdc_mbim.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_ncm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/usb/cdc_ncm.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/huawei_cdc_ncm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/usb/huawei_cdc_ncm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/r8152.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/usb/r8152.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/vmxnet3/vmxnet3_defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/vmxnet3/vmxnet3_defs.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/vmxnet3/vmxnet3_drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/vmxnet3/vmxnet3_drv.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/vmxnet3/vmxnet3_int.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/vmxnet3/vmxnet3_int.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/vxlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/vxlan.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/cosa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wan/cosa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/dscc4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wan/dscc4.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/lapbether.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wan/lapbether.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/z85230.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wan/z85230.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/adm8211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/adm8211.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/at76c50x-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/at76c50x-usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/at76c50x-usb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/at76c50x-usb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ar5523/ar5523.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ar5523/ar5523.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/core.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/core.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/debug.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/debug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/htc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/htc.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/htt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/htt.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/htt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/htt.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/htt_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/htt_rx.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/htt_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/htt_tx.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/hw.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/hw.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/mac.c</a></td><td class='right'>2840</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/mac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/mac.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/p2p.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/p2p.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/p2p.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/p2p.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/pci.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/pci.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/rx_desc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/rx_desc.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/spectral.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/spectral.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/thermal.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/thermal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/thermal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/trace.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/txrx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wmi-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wmi-ops.h</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wmi-tlv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wmi-tlv.c</a></td><td class='right'>582</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wmi-tlv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wmi-tlv.h</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wmi.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wmi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wmi.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wow.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wow.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath10k/wow.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath10k/wow.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/ath5k.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath5k/ath5k.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath5k/base.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/led.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath5k/led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/wmi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath6kl/wmi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar5008_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/ar5008_phy.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9002_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/ar9002_phy.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/common-spectral.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/common-spectral.c</a></td><td class='right'>740</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/common-spectral.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/common-spectral.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/htc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/htc_drv_beacon.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_drv_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/htc_drv_init.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_drv_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/htc_drv_main.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/htc_drv_txrx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/hw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/init.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/main.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/recv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/ath9k/recv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/carl9170/fw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/led.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/carl9170/led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/carl9170/main.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/carl9170/usb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/dfs_pattern_detector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/dfs_pattern_detector.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/dfs_pattern_detector.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/dfs_pattern_detector.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/dfs_pri_detector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/dfs_pri_detector.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wcn36xx/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wcn36xx/main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wcn36xx/smd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wcn36xx/smd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/cfg80211.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/debugfs.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/main.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/netdev.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/pcie_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/pcie_bus.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/pmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/pmc.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/pmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/pmc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/txrx.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/txrx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/txrx.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/wil6210.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/wil6210.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/wil_platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/wil_platform.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/wil_platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/wil_platform.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/wmi.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/wil6210/wmi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ath/wil6210/wmi.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/b43/main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43legacy/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/b43legacy/main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/chip.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/commonring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/commonring.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/commonring.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/commonring.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/debug.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/feature.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/feature.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/feature.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/feature.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/firmware.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/firmware.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/firmware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/firmware.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/flowring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/flowring.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/flowring.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/flowring.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/msgbuf.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/of.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/p2p.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/p2p.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/pcie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/pcie.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/sdio.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmfmac/usb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/brcmsmac/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/brcm80211/include/brcm_hw_ids.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/cw1200/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/cw1200/main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/cw1200/sta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/cw1200/sta.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/3945-mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlegacy/3945-mac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/4965-mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlegacy/4965-mac.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/dvm/mac80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/dvm/mac80211.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-7000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-7000.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-8000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-8000.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-config.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-config.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-iwlwifi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-devtrace-iwlwifi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-drv.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-fh.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fw-error-dump.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-fw-error-dump.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fw-file.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-fw-file.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-fw.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-prph.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-prph.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-trans.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/iwl-trans.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/coex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/coex.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/d3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/d3.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/debugfs-vif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/debugfs-vif.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/debugfs.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/fw-api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/fw-api.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/fw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/mac80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/mac80211.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/mvm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/mvm.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/nvm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/nvm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/ops.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/rs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/rs.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/rs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/rs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/rx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/scan.c</a></td><td class='right'>1418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/sta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/sta.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/time-event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/time-event.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/tt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/tt.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/tx.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/mvm/utils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/mvm/utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/pcie/drv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/pcie/drv.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/pcie/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/pcie/internal.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/pcie/rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/pcie/rx.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/pcie/trans.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/pcie/trans.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/pcie/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/iwlwifi/pcie/tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/cfg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas/cfg.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/cfg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas/cfg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/cmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas/cmd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/cmdresp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas/cmdresp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas_tf/if_usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas_tf/if_usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas_tf/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/libertas_tf/main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mac80211_hwsim.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mac80211_hwsim.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/core.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/debugfs.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/dma.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/dma.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/eeprom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/eeprom.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/eeprom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/eeprom.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/init.c</a></td><td class='right'>628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/initvals.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/initvals.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/initvals_phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/initvals_phy.h</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/mac.c</a></td><td class='right'>573</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/mac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/mac.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/main.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/mcu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/mcu.c</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/mcu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/mcu.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/mt7601u.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/mt7601u.h</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/phy.c</a></td><td class='right'>1251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/regs.h</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/trace.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/trace.h</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/tx.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/usb.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/usb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/usb.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/util.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mediatek/mt7601u/util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mediatek/mt7601u/util.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11h.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/11h.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11n.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/11n.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11n_aggr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/11n_aggr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11n_rxreorder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/11n_rxreorder.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/README</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/cfg80211.c</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cfp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/cfp.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cmdevt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/cmdevt.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/debugfs.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/decl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/decl.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/ethtool.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/fw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/fw.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/ie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/ie.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/init.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/ioctl.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/join.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/join.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/main.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/main.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/pcie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/pcie.c</a></td><td class='right'>589</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/scan.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sdio.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_cmd.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_cmdresp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_cmdresp.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_event.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_ioctl.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_rx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/sta_tx.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/tdls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/tdls.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/txrx.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/uap_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/uap_cmd.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/uap_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/uap_event.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/uap_txrx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/uap_txrx.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/usb.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/util.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/wmm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwifiex/wmm.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwl8k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/mwl8k.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/fwio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/p54/fwio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/led.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/p54/led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/p54/main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ray_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ray_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rndis_wlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rndis_wlan.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rsi/rsi_91x_mac80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rsi/rsi_91x_mac80211.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2400pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2400pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2500pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2500pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2500usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2500usb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800lib.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800lib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800lib.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800soc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800soc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2800usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt2x00mac.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt61pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt61pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt73usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rt2x00/rt73usb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtl818x/rtl8180/dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtl818x/rtl8180/dev.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtl818x/rtl8187/dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtl818x/rtl8187/dev.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/base.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/regd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/regd.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/regd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/regd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8188ee/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8188ee/dm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8188ee/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8188ee/hw.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/hw.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/phy.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/rf.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192cu/trx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192de/dm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ee/fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192ee/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ee/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192ee/hw.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8192se/dm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8723ae/hw.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8723be/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8723be/dm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8723be/fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8723be/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8723be/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8723be/hw.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8821ae/dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8821ae/dm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8821ae/hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/rtl8821ae/hw.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/wifi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/rtlwifi/wifi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/acx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ti/wl1251/acx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ti/wl1251/main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl18xx/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ti/wl18xx/main.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl18xx/reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ti/wl18xx/reg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/ti/wlcore/main.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/zd1211rw/zd_mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/wireless/zd1211rw/zd_mac.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/xen-netback/netback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/xen-netback/netback.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/xen-netback/xenbus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/xen-netback/xenbus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/xen-netfront.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/net/xen-netfront.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/mei_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/mei_phy.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/mei_phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/mei_phy.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/microread/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/microread/i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/microread/mei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/microread/mei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/main.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/nfcmrvl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/nfcmrvl.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/uart.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nfcmrvl/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nfcmrvl/usb.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nxp-nci/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nxp-nci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/nxp-nci/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/nxp-nci/i2c.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/pn544/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/pn544/i2c.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/pn544/mei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/pn544/mei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/st-nci/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/st-nci/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/st-nci/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/core.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nfc/st-nci/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/i2c.c</a> (renamed from drivers/nfc/st21nfcb/i2c.c)</td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nfc/st-nci/ndlc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/ndlc.c</a> (renamed from drivers/nfc/st21nfcb/ndlc.c)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nfc/st-nci/ndlc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/ndlc.h</a> (renamed from drivers/nfc/st21nfcb/ndlc.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nfc/st-nci/st-nci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/st-nci.h</a> (renamed from drivers/nfc/st21nfcb/st21nfcb.h)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nfc/st-nci/st-nci_se.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/st-nci_se.c</a> (renamed from drivers/nfc/st21nfcb/st21nfcb_se.c)</td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/st-nci/st-nci_se.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st-nci/st-nci_se.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/nfc/st21nfcb/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st21nfcb/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/nfc/st21nfcb/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st21nfcb/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/nfc/st21nfcb/st21nfcb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st21nfcb/st21nfcb.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/nfc/st21nfcb/st21nfcb_se.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/st21nfcb/st21nfcb_se.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/trf7970a.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nfc/trf7970a.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ntb/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ntb/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/intel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/intel/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/intel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/intel/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/intel/ntb_hw_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/intel/ntb_hw_intel.c</a></td><td class='right'>2274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/hw/intel/ntb_hw_intel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/hw/intel/ntb_hw_intel.h</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/ntb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/ntb.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/ntb/ntb_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/ntb_hw.c</a></td><td class='right'>1897</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/ntb/ntb_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/ntb_hw.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/ntb/ntb_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/ntb_regs.h</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ntb/ntb_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/ntb_transport.c</a></td><td class='right'>1029</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/test/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/test/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/test/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/test/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/test/ntb_pingpong.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/test/ntb_pingpong.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ntb/test/ntb_tool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/ntb/test/ntb_tool.c</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/Kconfig</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/blk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/blk.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/btt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/btt.c</a></td><td class='right'>1479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/btt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/btt.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/btt_devs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/btt_devs.c</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/bus.c</a></td><td class='right'>725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/core.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/dimm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/dimm.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/dimm_devs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/dimm_devs.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/label.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/label.c</a></td><td class='right'>927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/label.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/label.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/namespace_devs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/namespace_devs.c</a></td><td class='right'>1870</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/nd-core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/nd-core.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/nd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/nd.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/nvdimm/pmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/pmem.c</a> (renamed from drivers/block/pmem.c)</td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/region.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/region.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nvdimm/region_devs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/nvdimm/region_devs.c</a></td><td class='right'>787</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/address.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/address.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/base.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/device.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/fdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/fdt.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/irq.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/of_mdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/of_mdio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/overlay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/overlay.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/of/platform.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_pc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/parport/parport_pc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/procfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/parport/procfs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/share.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/parport/share.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/bus.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-dra7xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-dra7xx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-exynos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-exynos.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-imx6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-imx6.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-keystone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-keystone.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-layerscape.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-layerscape.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-mvebu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-mvebu.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-tegra.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pci/host/pci-xgene-msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-xgene-msi.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pci-xgene.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pci-xgene.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pcie-designware.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-designware.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pci/host/pcie-iproc-bcma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-iproc-bcma.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pcie-iproc-platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-iproc-platform.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pcie-iproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-iproc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pcie-iproc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-iproc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/host/pcie-spear13xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/host/pcie-spear13xx.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/acpiphp_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/acpiphp_glue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/pciehp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/pciehp.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/pci/hotplug/pciehp_acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/pciehp_acpi.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/pciehp_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/pciehp_core.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/pciehp_ctrl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/pciehp_ctrl.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/hotplug/pciehp_hpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/hotplug/pciehp_hpc.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/htirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/htirq.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/msi.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci-acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/pci-acpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/pci.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/pci.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pcie/aer/aerdrv_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/pcie/aer/aerdrv_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pcie/aspm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/pcie/aspm.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/probe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/probe.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/quirks.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/vc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/vc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/xen-pcifront.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pci/xen-pcifront.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/at91_cf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/at91_cf.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/cistpl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/cistpl.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/cs.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/ds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/ds.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/electra_cf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/electra_cf.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/i82365.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/i82365.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/m32r_cfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/m32r_cfc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/m32r_pcc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/m32r_pcc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/pcmcia_cis.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/pcmcia_cis.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/pcmcia_resource.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/pcmcia_resource.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/rsrc_nonstatic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/rsrc_nonstatic.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/ti113x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/ti113x.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/topic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/topic.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/vrc4171_card.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/vrc4171_card.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/xxs1500_ss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/xxs1500_ss.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/yenta_socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pcmcia/yenta_socket.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/phy-brcmstb-sata.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-brcmstb-sata.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-core.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-miphy28lp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-miphy28lp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-miphy365x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-miphy365x.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/phy-pistachio-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-pistachio-usb.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/phy-pxa-28nm-hsic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-pxa-28nm-hsic.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/phy-pxa-28nm-usb2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-pxa-28nm-usb2.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-rcar-gen2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-rcar-gen2.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-spear1310-miphy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-spear1310-miphy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-spear1340-miphy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-spear1340-miphy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-sun4i-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-sun4i-usb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/phy-tusb1210.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-tusb1210.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/phy/phy-twl4030-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/phy-twl4030-usb.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/phy/ulpi_phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/phy/ulpi_phy.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/bcm/pinctrl-bcm281xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/bcm/pinctrl-bcm281xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/bcm/pinctrl-bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/bcm/pinctrl-bcm2835.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/bcm/pinctrl-cygnus-mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/bcm/pinctrl-cygnus-mux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/berlin/berlin-bg2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/berlin/berlin-bg2.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/berlin/berlin-bg2cd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/berlin/berlin-bg2cd.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/berlin/berlin-bg2q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/berlin/berlin-bg2q.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/berlin/berlin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/berlin/berlin.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/core.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/freescale/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/freescale/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/freescale/pinctrl-imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/pinctrl-imx.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/freescale/pinctrl-imx1-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/pinctrl-imx1-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/freescale/pinctrl-imx7d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/pinctrl-imx7d.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/freescale/pinctrl-mxs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/freescale/pinctrl-mxs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/intel/pinctrl-cherryview.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/intel/pinctrl-cherryview.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/intel/pinctrl-intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/intel/pinctrl-intel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/intel/pinctrl-sunrisepoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/intel/pinctrl-sunrisepoint.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mt6397.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mt6397.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mt8127.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mt8127.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mt8135.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mt8135.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mt8173.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mt8173.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mtk-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mtk-common.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mtk-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mtk-common.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mtk-mt6397.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mtk-mt6397.h</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/mediatek/pinctrl-mtk-mt8127.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mediatek/pinctrl-mtk-mt8127.h</a></td><td class='right'>1318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/meson/pinctrl-meson.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/meson/pinctrl-meson.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-armada-370.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-armada-370.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-armada-375.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-armada-375.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-armada-38x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-armada-38x.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-armada-39x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-armada-39x.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-armada-xp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-armada-xp.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/mvebu/pinctrl-mvebu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/mvebu/pinctrl-mvebu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/nomadik/pinctrl-ab8505.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/nomadik/pinctrl-ab8505.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/nomadik/pinctrl-abx500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/nomadik/pinctrl-abx500.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/nomadik/pinctrl-nomadik.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/nomadik/pinctrl-nomadik.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-adi2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-adi2.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-amd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-as3722.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-as3722.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-at91.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-at91.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-lantiq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-lantiq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-lpc18xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-lpc18xx.c</a></td><td class='right'>1220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-palmas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-palmas.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-pistachio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-pistachio.c</a></td><td class='right'>1504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-rockchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-rockchip.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-single.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-single.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-st.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-st.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tb10x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-tb10x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra-xusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-tegra-xusb.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-tegra.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tz1090-pdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-tz1090-pdc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tz1090.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-tz1090.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-u300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-u300.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-zynq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinctrl-zynq.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinmux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/pinmux.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/qcom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/qcom/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/qcom/pinctrl-msm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/pinctrl-msm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/qcom/pinctrl-msm8660.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/pinctrl-msm8660.c</a></td><td class='right'>984</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/pinctrl-spmi-gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/qcom/pinctrl-spmi-mpp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/samsung/pinctrl-exynos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/samsung/pinctrl-exynos.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/samsung/pinctrl-exynos5440.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/samsung/pinctrl-exynos5440.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/samsung/pinctrl-s3c24xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/samsung/pinctrl-s3c24xx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/samsung/pinctrl-s3c64xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/samsung/pinctrl-s3c64xx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/samsung/pinctrl-samsung.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/samsung/pinctrl-samsung.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pfc-r8a73a4.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pfc-r8a7740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pfc-r8a7740.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pfc-r8a7790.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pfc-r8a7790.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pfc-r8a7791.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pfc-r8a7791.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pfc-r8a7794.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pfc-r8a7794.c</a></td><td class='right'>4207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sh-pfc/pinctrl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sh-pfc/pinctrl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sirf/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sirf/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/sirf/pinctrl-atlas7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sirf/pinctrl-atlas7.c</a></td><td class='right'>4637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sirf/pinctrl-sirf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sirf/pinctrl-sirf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear1310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear1310.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear1340.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear1340.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear300.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear310.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear320.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear3xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear3xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/spear/pinctrl-spear3xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sunxi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sunxi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sunxi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sunxi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c</a></td><td class='right'>513</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/sunxi/pinctrl-sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/sunxi/pinctrl-sunxi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/vt8500/pinctrl-wmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pinctrl/vt8500/pinctrl-wmt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_dev.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_dev.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_lightbar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_lightbar.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_lpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_lpc.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_proto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_proto.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/chrome/cros_ec_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/chrome/cros_ec_sysfs.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/goldfish/goldfish_pipe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/goldfish/goldfish_pipe.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/goldfish/pdev_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/goldfish/pdev_bus.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/Kconfig</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/acer-wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/acer-wmi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/acerhdf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/acerhdf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/apple-gmux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/apple-gmux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/asus-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/asus-laptop.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/asus-wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/asus-wmi.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/compal-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/compal-laptop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/dell-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/dell-laptop.c</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/platform/x86/dell-rbtn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/dell-rbtn.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/platform/x86/dell-rbtn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/dell-rbtn.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/dell-wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/dell-wmi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/eeepc-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/eeepc-laptop.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/fujitsu-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/fujitsu-laptop.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/ideapad-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/ideapad-laptop.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/intel_oaktrail.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/intel_oaktrail.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/platform/x86/intel_pmc_ipc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/intel_pmc_ipc.c</a></td><td class='right'>780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/intel_scu_ipc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/intel_scu_ipc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/msi-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/msi-laptop.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/msi-wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/msi-wmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/pvpanic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/pvpanic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/samsung-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/samsung-laptop.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/sony-laptop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/sony-laptop.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/tc1100-wmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/tc1100-wmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/thinkpad_acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/thinkpad_acpi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/toshiba_acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/toshiba_acpi.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/toshiba_bluetooth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/toshiba_bluetooth.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/toshiba_haps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/platform/x86/toshiba_haps.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pnp/pnpacpi/rsparser.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pnp/pnpacpi/rsparser.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/88pm860x_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/88pm860x_charger.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/power/axp288_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/axp288_charger.c</a></td><td class='right'>941</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/axp288_fuel_gauge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/axp288_fuel_gauge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/bq2415x_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/bq2415x_charger.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/bq24190_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/bq24190_charger.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/power/bq24257_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/bq24257_charger.c</a></td><td class='right'>858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/power/bq25890_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/bq25890_charger.c</a></td><td class='right'>994</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/charger-manager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/charger-manager.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/max17042_battery.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/max17042_battery.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/power_supply_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/power_supply_core.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/power_supply_leds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/power_supply_leds.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/power_supply_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/power_supply_sysfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/reset/at91-reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/reset/at91-reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/reset/gpio-poweroff.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/reset/gpio-poweroff.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/reset/gpio-restart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/reset/gpio-restart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/reset/ltc2952-poweroff.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/reset/ltc2952-poweroff.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/reset/syscon-reboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/reset/syscon-reboot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/power/rt9455_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/rt9455_charger.c</a></td><td class='right'>1752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/sbs-battery.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/sbs-battery.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/test_power.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/test_power.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/twl4030_charger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/twl4030_charger.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/wm831x_power.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/power/wm831x_power.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/powercap/intel_rapl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/powercap/intel_rapl.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pwm/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pwm/core.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pwm/pwm-atmel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pwm/pwm-atmel.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pwm/pwm-bcm-kona.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pwm/pwm-bcm-kona.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pwm/pwm-lpss-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pwm/pwm-lpss-pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pwm/pwm-samsung.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/pwm/pwm-samsung.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/rio-scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rapidio/rio-scan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/88pm8607.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/88pm8607.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/arizona-ldo1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/arizona-ldo1.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/axp20x-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/axp20x-regulator.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/core.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/regulator/da9062-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/da9062-regulator.c</a></td><td class='right'>842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/da9063-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/da9063-regulator.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/fan53555.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/fan53555.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/helpers.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/helpers.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/lp8755.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/lp8755.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max14577.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max14577.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max77686.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max77686.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max77693.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max77693.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max77802.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max77802.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max77843.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max77843.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8973-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/max8973-regulator.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/of_regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/of_regulator.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/pwm-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/pwm-regulator.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/regulator/qcom_spmi-regulator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/qcom_spmi-regulator.c</a></td><td class='right'>1435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/s2mps11.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/s2mps11.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-dcdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/wm831x-dcdc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-isink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/wm831x-isink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-ldo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/regulator/wm831x-ldo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/da8xx_remoteproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/da8xx_remoteproc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/remoteproc_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/remoteproc_core.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/remoteproc_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/remoteproc_internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/ste_modem_rproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/ste_modem_rproc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/remoteproc/wkup_m3_rproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/remoteproc/wkup_m3_rproc.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/reset/reset-berlin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/reset/reset-berlin.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/Kconfig</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/Makefile</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/interface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/interface.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ab8500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ab8500.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-armada38x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-armada38x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-at32ap700x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-at32ap700x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ds1216.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ds1216.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ds1286.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ds1286.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ds1307.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ds1307.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ds1672.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ds1672.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-efi.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ep93xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ep93xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/rtc/rtc-gemini.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-gemini.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-hid-sensor-time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-hid-sensor-time.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-hym8563.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-hym8563.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-imxdi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-imxdi.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-isl1208.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-isl1208.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ls1x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-ls1x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-max6900.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-max6900.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-max77686.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-max77686.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-max77802.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-max77802.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-max8998.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-max8998.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-mc13xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-mc13xxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/rtc/rtc-mt6397.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-mt6397.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-mv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-mv.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-mxc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-mxc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-palmas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-palmas.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-pcf8563.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-pcf8563.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-s3c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-s3c.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-snvs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-snvs.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-spear.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-spear.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/rtc/rtc-st-lpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-st-lpc.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-sunxi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-v3020.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/rtc-v3020.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/systohc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/rtc/systohc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/block/dasd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/block/dasd.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/block/dasd_alias.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/block/dasd_alias.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/block/dasd_genhd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/block/dasd_genhd.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/keyboard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/keyboard.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/sclp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/sclp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/sclp_cmd.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/sclp_early.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_sdias.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/sclp_sdias.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/zcore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/char/zcore.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/ap_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/crypto/ap_bus.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/ap_bus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/crypto/ap_bus.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/crypto/zcrypt_api.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_cex4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/crypto/zcrypt_cex4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_pcicc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/crypto/zcrypt_pcicc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/kvm/kvm_virtio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/kvm/kvm_virtio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/kvm/virtio_ccw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/kvm/virtio_ccw.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/lcs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/lcs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_core_main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_mpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_core_mpc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_mpc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_core_mpc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l2_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_l2_main.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l2_sys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_l2_sys.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l3_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/net/qeth_l3_main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/scsi/zfcp_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/s390/scsi/zfcp_scsi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/NCR53c406a.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/NCR53c406a.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/a100u2w.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/a100u2w.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aacraid/src.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aacraid/src.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/advansys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/advansys.c</a></td><td class='right'>1474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aha152x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aha152x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aha1542.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aha1542.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aha1740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aha1740.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aha1740.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aha1740.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aic94xx/aic94xx_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/aic94xx/aic94xx_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/arm/arxescsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/arm/arxescsi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/arm/cumana_2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/arm/cumana_2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/arm/eesox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/arm/eesox.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/atp870u.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/atp870u.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/atp870u.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/atp870u.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_cmds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_cmds.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_cmds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_cmds.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_main.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_main.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_mgmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_mgmt.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_mgmt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/be2iscsi/be_mgmt.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i_iscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/bnx2i/bnx2i_iscsi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/csiostor/csio_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/csiostor/csio_hw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/cxgb3i/cxgb3i.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/cxgb3i/cxgb3i.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/cxgb3i/cxgb3i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/cxgb3i/cxgb3i.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/cxgb4i/cxgb4i.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/cxgb4i/cxgb4i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/cxgb4i/cxgb4i.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/libcxgbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/libcxgbi.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/cxgbi/libcxgbi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/cxgbi/libcxgbi.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/dpt_i2o.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/dpt_i2o.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fdomain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/fdomain.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fnic/fnic_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/fnic/fnic_debugfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fnic/fnic_trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/fnic/fnic_trace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/hpsa.c</a></td><td class='right'>2780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/hpsa.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa_cmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/hpsa_cmd.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ibmvscsi/ibmvscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ibmvscsi/ibmvscsi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/imm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/imm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/initio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/initio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ipr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ipr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ips.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ips.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/isci/init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_crtn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_crtn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_debugfs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_disc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_disc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_els.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_els.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hbadisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_hbadisc.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_hw.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hw4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_hw4.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_init.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_mbox.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_mbox.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_nportdisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_nportdisc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_scsi.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_scsi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_scsi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_sli.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_sli.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_sli4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_sli4.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_version.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_vport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/lpfc/lpfc_vport.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mac53c94.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/mac53c94.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/megaraid/megaraid_sas.h</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/megaraid/megaraid_sas_base.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_fp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/megaraid/megaraid_sas_fp.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_fusion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_fusion.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/megaraid/megaraid_sas_fusion.h</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mvsas/mv_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/mvsas/mv_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/nsp32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/nsp32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pcmcia/nsp_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/pcmcia/nsp_cs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pcmcia/qlogic_stub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/pcmcia/qlogic_stub.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pcmcia/sym53c500_cs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/pcmcia/sym53c500_cs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pm8001/pm8001_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/pm8001/pm8001_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ppa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ppa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ps3rom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ps3rom.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla1280.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla1280.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_iocb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_iocb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_isr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_isr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_nx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_nx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_nx2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_nx2.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_os.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_os.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_target.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_target.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_target.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/qla_target.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/tcm_qla2xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/tcm_qla2xxx.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/tcm_qla2xxx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla2xxx/tcm_qla2xxx.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_83xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla4xxx/ql4_83xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_bsg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla4xxx/ql4_bsg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_def.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qla4xxx/ql4_def.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qlogicfas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qlogicfas.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qlogicpti.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/qlogicpti.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/scsi_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_common.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_debug.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_error.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_error.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_scan.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_transport_iscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_transport_iscsi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_transport_srp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/scsi_transport_srp.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/sd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/sd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/cq_desc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/cq_desc.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/cq_enet_desc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/cq_enet_desc.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic.h</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_attrs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_attrs.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_ctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_ctl.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_debugfs.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_disc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_disc.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_disc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_disc.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_fwint.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_fwint.h</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_io.c</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_io.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_isr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_isr.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_main.c</a></td><td class='right'>1044</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_res.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_res.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_res.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_res.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_scsi.c</a></td><td class='right'>2632</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_stats.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_stats.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_trc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_trc.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/snic_trc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/snic_trc.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_cq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_cq.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_cq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_cq.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_cq_fw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_cq_fw.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_dev.c</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_dev.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_devcmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_devcmd.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_intr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_intr.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_intr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_intr.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_resource.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_resource.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_snic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_snic.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_stats.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_stats.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_wq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_wq.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/vnic_wq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/vnic_wq.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/snic/wq_enet_desc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/snic/wq_enet_desc.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/st.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/st.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/st.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/st.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/sym53c416.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/sym53c416.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/ufs-qcom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/ufs-qcom.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/ufshcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/ufshcd.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/ufshcd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/ufshcd.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/ufshci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/ufshci.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/unipro.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/ufs/unipro.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/virtio_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/virtio_scsi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/wd719x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/wd719x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/wd719x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/scsi/wd719x.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/sh/intc/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/sh/intc/core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/sh/intc/virq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/sh/intc/virq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/sh/pm_runtime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/sh/pm_runtime.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/qcom/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/qcom/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/qcom/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/qcom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/soc/qcom/spm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/qcom/spm.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/soc/sunxi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/sunxi/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/soc/sunxi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/sunxi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/soc/sunxi/sunxi_sram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/sunxi/sunxi_sram.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/tegra/fuse/fuse-tegra20.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/tegra/fuse/fuse-tegra20.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/tegra/fuse/tegra-apbmisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/tegra/fuse/tegra-apbmisc.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/tegra/pmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/tegra/pmc.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/soc/versatile/soc-realview.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/soc/versatile/soc-realview.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-ath79.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-ath79.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-atmel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-atmel.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-bcm2835.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-davinci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-davinci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-fsl-dspi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-fsl-dspi.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-fsl-espi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-fsl-espi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-imx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-omap2-mcspi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-omap2-mcspi.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-orion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-orion.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-pxa2xx-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-pxa2xx-pci.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/spi/spi-pxa2xx-pxadma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-pxa2xx-pxadma.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-pxa2xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-pxa2xx.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-pxa2xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-pxa2xx.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/spi/spi-rb4xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-rb4xx.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-rspi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-rspi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-s3c64xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-s3c64xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-sh-msiof.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-sh-msiof.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-sirf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-sirf.c</a></td><td class='right'>877</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/spi/spi-zynqmp-gqspi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi-zynqmp-gqspi.c</a></td><td class='right'>1122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spi.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spidev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spi/spidev.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spmi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/spmi/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ion/ion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/ion/ion.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ion/ion_chunk_heap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/ion/ion_chunk_heap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ion/ion_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/ion/ion_priv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ion/ion_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/ion/ion_test.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ion/tegra/tegra_ion.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/ion/tegra/tegra_ion.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/lowmemorykiller.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/lowmemorykiller.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/uapi/ion.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/android/uapi/ion.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/board/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/board/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/board/armadillo800eva.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/armadillo800eva.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/board/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/board.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/board/board.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/board.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/board/kzm9d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/board/kzm9d.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/comedi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedi_fops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/comedi_fops.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedi_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/comedi_internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedidev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/comedidev.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/8255.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/8255.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/8255.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/8255.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi_apci_1516.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/addi_apci_1516.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi_apci_3120.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/addi_apci_3120.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi_watchdog.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/addi_watchdog.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adv_pci1724.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/adv_pci1724.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adv_pci_dio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/adv_pci_dio.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_dio200.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_dio200.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_dio200.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_dio200.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_dio200_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_dio200_common.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_dio200_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_dio200_pci.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pc236_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_pc236_common.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pci224.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_pci224.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pci230.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/amplc_pci230.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/cb_pcidas.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidas64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/cb_pcidas64.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/cb_pcidda.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcimdas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/cb_pcimdas.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcimdda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/cb_pcimdda.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_8254.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/comedi_8254.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_8255.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/comedi_8255.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_bond.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/comedi_bond.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_isadma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/comedi_isadma.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/daqboard2000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/daqboard2000.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das08.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das08.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das08.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das08.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das08_isa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das08_isa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das16m1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das16m1.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das1800.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das1800.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das800.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/das800.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt3000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/dt3000.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/gsc_hpdi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/gsc_hpdi.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/me4000.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/me4000.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/me_daq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/me_daq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/mite.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/mite.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/mite.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/mite.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_670x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_670x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_at_a2150.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_at_a2150.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_atmio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_atmio.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_mio_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_mio_common.c</a></td><td class='right'>2408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_pcimio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_pcimio.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_stc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/ni_stc.h</a></td><td class='right'>2237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl812.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/pcl812.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl816.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/pcl816.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/serial2002.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/serial2002.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/vmk80xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/comedi/drivers/vmk80xx.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgap/dgap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgap/dgap.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgap/dgap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgap/dgap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/TODO?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/TODO</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_cls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_cls.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_driver.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_driver.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_neo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_neo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_sysfs.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/dgnc_tty.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/dgnc_tty.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/dgnc/digi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/dgnc/digi.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/emxx_udc/emxx_udc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/emxx_udc/emxx_udc.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/emxx_udc/emxx_udc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/emxx_udc/emxx_udc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_agm1264k-fl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_agm1264k-fl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_hx8357d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_hx8357d.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_hx8357d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_hx8357d.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_ili9320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_ili9320.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_ra8875.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_ra8875.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_st7735r.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_st7735r.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_tinylcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_tinylcd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fb_tls8204.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fb_tls8204.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fbtft-bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fbtft-bus.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fbtft-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fbtft-core.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fbtft.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fbtft.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/fbtft_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/fbtft_device.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/flexfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/flexfb.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fbtft/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fbtft/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fsl-mc/bus/mc-bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fsl-mc/bus/mc-bus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ft1000/ft1000-usb/ft1000_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/ft1000/ft1000-usb/ft1000_debug.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ft1000/ft1000-usb/ft1000_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/ft1000/ft1000-usb/ft1000_hw.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/ft1000/ft1000-usb/ft1000_usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fwserial/dma_fifo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fwserial/dma_fifo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fwserial/fwserial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fwserial/fwserial.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/fwserial/fwserial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/fwserial/fwserial.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/gdm724x/gdm_endian.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/gdm724x/gdm_endian.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/gdm724x/gdm_endian.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/gdm724x/gdm_endian.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_wimax.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/gdm72xx/gdm_wimax.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/gdm72xx/netlink_k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/gdm72xx/netlink_k.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/goldfish/goldfish_audio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/goldfish/goldfish_audio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/goldfish/goldfish_nand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/goldfish/goldfish_nand.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/Kconfig</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/README</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/README.ioctl?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/README.ioctl</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/bus-osm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/bus-osm.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/config-osm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/config-osm.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/core.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/debug.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/device.c</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/driver.c</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/exec-osm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/exec-osm.c</a></td><td class='right'>612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o.h</a></td><td class='right'>988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o_block.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o_block.c</a></td><td class='right'>1228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o_block.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o_block.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o_config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o_config.c</a></td><td class='right'>1162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o_proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o_proc.c</a></td><td class='right'>2049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/i2o_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/i2o_scsi.c</a></td><td class='right'>814</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/iop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/iop.c</a></td><td class='right'>1255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/memory.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/i2o/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/i2o/pci.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/device.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/Documentation/device.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/accel/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/sca3000_ring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/accel/sca3000_ring.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/adc/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7606_par.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/adc/ad7606_par.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/addac/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/addac/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_dummy_evgen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/iio_dummy_evgen.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_dummy_evgen.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/iio_dummy_evgen.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/iio_simple_dummy.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/iio_simple_dummy.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy_events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/iio_simple_dummy_events.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/isl29018.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/light/isl29018.c</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/resolver/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/iio/resolver/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/TODO?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/TODO</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/libcfs/libcfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/libcfs/libcfs.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/libcfs/libcfs_ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/libcfs/libcfs_ioctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/libcfs/libcfs_private.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/libcfs/libcfs_private.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/libcfs/linux/libcfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/libcfs/linux/libcfs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/api-support.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/api-support.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/api.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lib-lnet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lib-lnet.h</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lib-types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lib-types.h</a></td><td class='right'>667</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/linux/api-support.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/linux/api-support.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/linux/lib-lnet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/linux/lib-lnet.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/linux/lib-types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/linux/lib-types.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/linux/lnet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/linux/lnet.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lnet-sysctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lnet-sysctl.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lnet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lnet.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lnetctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lnetctl.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/lnetst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/lnetst.h</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/nidstr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/nidstr.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/ptllnd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/ptllnd.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/ptllnd_wire.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/ptllnd_wire.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/socklnd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/socklnd.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/include/linux/lnet/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/include/linux/lnet/types.h</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd.h</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_cb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_cb.c</a></td><td class='right'>484</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_modparams.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_modparams.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c</a></td><td class='right'>485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd.h</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd_cb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd_cb.c</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd_lib-linux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd_lib-linux.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd_lib.c</a> (renamed from drivers/staging/lustre/lnet/klnds/socklnd/socklnd_lib-linux.c)</td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd_modparams.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd_modparams.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/klnds/socklnd/socklnd_proto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/klnds/socklnd/socklnd_proto.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/acceptor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/acceptor.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/api-ni.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/api-ni.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/config.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-eq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-eq.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-md.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-md.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-me.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-me.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-move.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-move.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-msg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-msg.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-ptl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-ptl.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lib-socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lib-socket.c</a> (renamed from drivers/staging/lustre/lustre/libcfs/linux/linux-tcpip.c)</td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/lo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/lo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/module.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/peer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/peer.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/router.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/router.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/lnet/router_proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/lnet/router_proc.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/brw_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/brw_test.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/conctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/conctl.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/conrpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/conrpc.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/conrpc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/conrpc.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/console.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/console.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/console.h</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/framework.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/framework.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/module.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/ping_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/ping_test.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/rpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/rpc.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/rpc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/rpc.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/selftest.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/selftest.h</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/timer.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lnet/selftest/timer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lnet/selftest/timer.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fid/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fid/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fid/fid_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fid/fid_internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fid/fid_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fid/fid_request.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fid/lproc_fid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fid/lproc_fid.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fld/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fld/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fld/fld_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fld/fld_cache.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fld/fld_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fld/fld_internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fld/fld_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fld/fld_request.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/fld/lproc_fld.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/fld/lproc_fld.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/dt_object.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/dt_object.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/linux/lustre_compat25.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/linux/lustre_compat25.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/linux/lustre_lite.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/linux/lustre_lite.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/linux/lustre_patchless_compat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/linux/lustre_patchless_compat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/linux/obd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/linux/obd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lprocfs_status.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lprocfs_status.h</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lu_object.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lu_object.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre/lustre_idl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre/lustre_idl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre/lustre_user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre/lustre_user.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_dlm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_dlm.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_dlm_flags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_dlm_flags.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_export.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_export.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_fid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_fid.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_fld.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_fld.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_lib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_lib.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_net.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_net.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_quota.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_quota.h</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/lustre_sec.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/lustre_sec.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/obd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/obd.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/obd_class.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/obd_class.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/include/obd_support.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/include/obd_support.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lclient/lcommon_cl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lclient/lcommon_cl.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_internal.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_lib.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_lock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_lock.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_lockd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_lockd.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_pool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_pool.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_request.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ldlm/ldlm_resource.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ldlm/ldlm_resource.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/fail.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/fail.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/hash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/hash.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/linux/linux-cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/linux/linux-cpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/linux/linux-mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/linux/linux-mem.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/linux/linux-tracefile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/linux/linux-tracefile.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/module.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/libcfs/tracefile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/libcfs/tracefile.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/dcache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/dcache.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/dir.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/file.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_capa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_capa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_close.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_close.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_internal.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_lib.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_nfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_nfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/llite_rmtacl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/llite_rmtacl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/lloop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/lloop.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/lproc_llite.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/lproc_llite.c</a></td><td class='right'>713</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/rw26.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/rw26.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/statahead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/statahead.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/super25.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/super25.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/symlink.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/vvp_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/vvp_dev.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/xattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/xattr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/llite/xattr_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/llite/xattr_cache.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lmv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lmv/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lmv/lmv_intent.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lmv/lmv_intent.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lmv/lmv_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lmv/lmv_internal.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lmv/lmv_obd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lmv/lmv_obd.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lmv/lproc_lmv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lmv/lproc_lmv.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_dev.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_ea.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_ea.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_internal.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_io.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_lock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_lock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_obd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_obd.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_object.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_pack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_pack.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_pool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_pool.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lov_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lov_request.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lovsub_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lovsub_dev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/lov/lproc_lov.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/lov/lproc_lov.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mdc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mdc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mdc/lproc_mdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mdc/lproc_mdc.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mdc/mdc_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mdc/mdc_internal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mdc/mdc_locks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mdc/mdc_locks.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mdc/mdc_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mdc/mdc_request.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mgc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mgc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mgc/lproc_mgc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mgc/lproc_mgc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mgc/mgc_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mgc/mgc_internal.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/mgc/mgc_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/mgc/mgc_request.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/acl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/acl.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/capa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/capa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/cl_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/cl_io.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/cl_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/cl_object.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/cl_page.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/cl_page.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/class_obd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/class_obd.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/dt_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/dt_object.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/genops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/genops.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/linux/linux-module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/linux/linux-module.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/linux/linux-sysctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/linux/linux-sysctl.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/llog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/llog.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/llog_cat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/llog_cat.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/llog_obd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/llog_obd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/lprocfs_status.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/lprocfs_status.c</a></td><td class='right'>625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/lu_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/lu_object.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/lustre_handles.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/lustre_handles.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/lustre_peer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/lustre_peer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/obd_config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/obd_config.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdclass/obd_mount.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdclass/obd_mount.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdecho/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdecho/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdecho/echo_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdecho/echo_client.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/obdecho/lproc_echo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/obdecho/lproc_echo.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/lproc_osc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/lproc_osc.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_cache.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_dev.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_internal.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_io.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_lock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_lock.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_object.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_page.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_page.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_quota.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_quota.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/osc/osc_request.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/osc/osc_request.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/client.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/connection.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/connection.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/events.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/import.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/import.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/layout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/layout.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/llog_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/llog_client.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/lproc_ptlrpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/lproc_ptlrpc.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/niobuf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/niobuf.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/nrs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/nrs.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/nrs_fifo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/nrs_fifo.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/pack_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/pack_generic.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/pinger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/pinger.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/ptlrpc_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/ptlrpc_internal.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/ptlrpcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/ptlrpcd.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_bulk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_bulk.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_config.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_gc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_gc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_lproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_lproc.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_null.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_null.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/sec_plain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/sec_plain.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/lustre/lustre/ptlrpc/service.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/lustre/ptlrpc/service.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/lustre/sysfs-fs-lustre?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/lustre/sysfs-fs-lustre</a></td><td class='right'>543</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/bcm2048/radio-bcm2048.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/bcm2048/radio-bcm2048.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/davinci_vpfe/dm365_resizer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/davinci_vpfe/dm365_resizer.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/davinci_vpfe/vpfe_video.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/davinci_vpfe/vpfe_video.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/media/dt3155v4l/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/dt3155v4l/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/media/dt3155v4l/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/dt3155v4l/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/media/dt3155v4l/dt3155v4l.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/dt3155v4l/dt3155v4l.c</a></td><td class='right'>981</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/lirc/lirc_imon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/lirc/lirc_imon.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/lirc/lirc_sir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/lirc/lirc_sir.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/mn88472/mn88472.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/mn88472/mn88472.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/mn88472/mn88472_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/mn88472/mn88472_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/mn88473/mn88473.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/mn88473/mn88473.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/mn88473/mn88473_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/mn88473/mn88473_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/omap4iss/iss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/omap4iss/iss.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/omap4iss/iss_csi2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/omap4iss/iss_csi2.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/omap4iss/iss_ipipe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/omap4iss/iss_ipipe.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/omap4iss/iss_ipipeif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/omap4iss/iss_ipipeif.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/omap4iss/iss_resizer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/media/omap4iss/iss_resizer.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/nvec/nvec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/nvec/nvec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/nvec/nvec_ps2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/nvec/nvec_ps2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon-usb/octeon-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon-usb/octeon-hcd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon-usb/octeon-hcd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon-usb/octeon-hcd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-defines.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-defines.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-mdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-mdio.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-mdio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-mdio.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-mem.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-mem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-mem.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-rgmii.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-rgmii.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-rx.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-rx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-rx.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-sgmii.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-sgmii.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-spi.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-tx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-tx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-tx.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-util.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-xaui.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet-xaui.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/ethernet.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/octeon-ethernet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/octeon/octeon-ethernet.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozusbsvc1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/ozwpan/ozusbsvc1.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/panel/panel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/panel/panel.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_ap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_ap.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_efuse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_efuse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_ioctl_set.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_led.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_mlme.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_mlme.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_mlme_ext.c</a></td><td class='right'>3379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_recv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_recv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_sta_mgt.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/core/rtw_wlan_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/core/rtw_wlan_util.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/hal_intf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/hal_intf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/phy.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/pwrseqcmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/pwrseqcmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/rtl8188e_dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/rtl8188e_dm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/hal/usb_halinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/hal/usb_halinit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/drv_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/drv_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/ieee80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/ieee80211.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/odm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/odm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/odm_HWConfig.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/odm_HWConfig.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/osdep_intf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/osdep_intf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/osdep_service.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/osdep_service.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/recv_osdep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/recv_osdep.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtl8188e_hal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtl8188e_hal.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_ap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_ap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_ioctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_led.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_led.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_mlme.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_mlme.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_mlme_ext.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/rtw_security.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/rtw_security.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/include/wifi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/include/wifi.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/ioctl_linux.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/mlme_linux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/mlme_linux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/os_intfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/os_intfs.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/osdep_service.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/osdep_service.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/rtw_android.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/rtw_android.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8188eu/os_dep/usb_intf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8188eu/os_dep/usb_intf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/dot11d.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/dot11d.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8190P_def.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h</a></td><td class='right'>1496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h</a></td><td class='right'>908</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_cam.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_cam.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_core.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_core.h</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_crypto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_crypto.h</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_dm.c</a></td><td class='right'>1188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_dm.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_pci.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_pm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_ps.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_wx.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_wx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl8192e/rtl_wx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_BAProc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_BAProc.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_HT.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_HT.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_HTProc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_HTProc.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_Qos.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_Qos.h</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_TS.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_TS.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_TSProc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtl819x_TSProc.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib.h</a></td><td class='right'>645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_crypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_crypt.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_crypt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_crypt.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_crypt_ccmp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_crypt_tkip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_crypt_tkip.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_debug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_debug.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_module.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_rx.c</a></td><td class='right'>1016</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_softmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_softmac.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_softmac_wx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_softmac_wx.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_tx.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_wx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192e/rtllib_wx.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/r8192U_core.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_dm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/r8192U_dm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_firmware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8192u/r819xU_firmware.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/ieee80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/ieee80211.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/os_intfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/os_intfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/recv_linux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/recv_linux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_recv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/rtl8712_recv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_xmit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/rtl8712_xmit.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_ioctl_linux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/rtl871x_ioctl_linux.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_sta_mgt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8712/rtl871x_sta_mgt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/core/rtw_ap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/core/rtw_ap.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/core/rtw_mlme_ext.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/core/rtw_mlme_ext.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/core/rtw_wlan_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/core/rtw_wlan_util.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/odm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/odm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/rtl8723a_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/rtl8723a_cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/rtl8723au_xmit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/rtl8723au_xmit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/hal/usb_halinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/hal/usb_halinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/odm_debug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/odm_debug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/rtl8723a_hal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/rtl8723a_hal.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/rtw_cmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/rtw_cmd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/rtw_mlme.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/rtw_mlme.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/rtw_mlme_ext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/rtw_mlme_ext.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/include/sta_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/include/sta_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/os_dep/ioctl_cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/os_dep/ioctl_cfg80211.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8723au/os_dep/os_intfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rtl8723au/os_dep/os_intfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5208/rtsx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rts5208/rtsx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5208/rtsx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rts5208/rtsx.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5208/rtsx_chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rts5208/rtsx_chip.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5208/rtsx_scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rts5208/rtsx_scsi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5208/xd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/rts5208/xd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/skein/skein_api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/skein/skein_api.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/slicoss/TODO?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/slicoss/TODO</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/slicoss/slic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/slicoss/slic.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/slicoss/slicoss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/slicoss/slicoss.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/TODO?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/TODO</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_chip.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_chip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_chip.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_display.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_dvi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_dvi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_dvi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_dvi.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_help.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_help.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_help.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_help.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_hwi2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_hwi2c.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_mode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_mode.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_mode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_mode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_power.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_power.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_power.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_power.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_reg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_sii164.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_sii164.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_swi2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_swi2c.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/ddk750_swi2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/ddk750_swi2c.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/modedb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/modedb.h</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/readme?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/readme</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_accel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_accel.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_accel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_accel.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_cursor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_cursor.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_cursor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_cursor.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_help.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_help.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_hw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_hw.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm750fb/sm750_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm750fb/sm750_hw.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm7xxfb/sm7xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm7xxfb/sm7xx.h</a></td><td class='right'>664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm7xxfb/sm7xxfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/sm7xxfb/sm7xxfb.c</a></td><td class='right'>1074</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/speakup/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/speakup/main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/unisys/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/unisys/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/common-spar/include/channels/controlframework.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/common-spar/include/channels/controlframework.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/common-spar/include/channels/diagchannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/common-spar/include/channels/diagchannel.h</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/common-spar/include/diagnostics/appos_subsystems.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/common-spar/include/diagnostics/appos_subsystems.h</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/include/channel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/channel.h</a> (renamed from drivers/staging/unisys/common-spar/include/channels/channel.h)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/include/channel_guid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/channel_guid.h</a> (renamed from drivers/staging/unisys/common-spar/include/channels/channel_guid.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/include/diagchannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/diagchannel.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/unisys/include/guestlinuxdebug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/guestlinuxdebug.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/include/iochannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/iochannel.h</a> (renamed from drivers/staging/unisys/common-spar/include/channels/iochannel.h)</td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/unisys/include/periodic_work.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/periodic_work.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/procobjecttree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/procobjecttree.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/sparstop.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/sparstop.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/timskmod.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/timskmod.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/uisqueue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/uisqueue.h</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/uisthread.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/uisthread.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/include/uisutils.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/uisutils.h</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/unisys/include/vbushelper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/vbushelper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/include/version.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/version.h</a> (renamed from drivers/staging/unisys/common-spar/include/version.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/include/visorbus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/include/visorbus.h</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/uislib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/uislib.c</a></td><td class='right'>1372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/uisqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/uisqueue.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/uisthread.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/uisthread.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/uislib/uisutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/uislib/uisutils.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virthba/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virthba/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virthba/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virthba/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virthba/virthba.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virthba/virthba.c</a></td><td class='right'>1572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virthba/virthba.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virthba/virthba.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virtpci/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virtpci/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virtpci/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virtpci/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virtpci/virtpci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virtpci/virtpci.c</a></td><td class='right'>1394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/virtpci/virtpci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/virtpci/virtpci.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/controlvmchannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/controlvmchannel.h</a> (renamed from drivers/staging/unisys/common-spar/include/channels/controlvmchannel.h)</td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/controlvmcompletionstatus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/controlvmcompletionstatus.h</a> (renamed from drivers/staging/unisys/common-spar/include/controlvmcompletionstatus.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/iovmcall_gnuc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/iovmcall_gnuc.h</a> (renamed from drivers/staging/unisys/common-spar/include/iovmcall_gnuc.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/periodic_work.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/periodic_work.c</a> (renamed from drivers/staging/unisys/visorutil/periodic_work.c)</td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/vbuschannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/vbuschannel.h</a> (renamed from drivers/staging/unisys/common-spar/include/channels/vbuschannel.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/vbusdeviceinfo.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/vbusdeviceinfo.h</a> (renamed from drivers/staging/unisys/common-spar/include/vbusdeviceinfo.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/visorbus_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/visorbus_main.c</a></td><td class='right'>1518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/visorbus_private.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/visorbus_private.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/visorchannel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/visorchannel.c</a> (renamed from drivers/staging/unisys/visorchannel/visorchannel_funcs.c)</td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/visorchipset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/visorchipset.c</a> (renamed from drivers/staging/unisys/visorchipset/visorchipset_main.c)</td><td class='right'>1552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/unisys/visorbus/vmcallinterface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorbus/vmcallinterface.h</a> (renamed from drivers/staging/unisys/common-spar/include/vmcallinterface.h)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchannel/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchannel/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchannel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchannel/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchannel/globals.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchannel/globals.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchannel/visorchannel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchannel/visorchannel.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchannel/visorchannel_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchannel/visorchannel_main.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/file.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/file.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/file.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/globals.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/globals.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/parser.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/parser.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/parser.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/parser.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/visorchipset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/visorchipset.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorchipset/visorchipset_umode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorchipset/visorchipset_umode.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visornic/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visornic/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visornic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visornic/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/unisys/visornic/visornic_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visornic/visornic_main.c</a></td><td class='right'>2140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/charqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/charqueue.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/charqueue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/charqueue.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/memregion.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/memregion.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/memregion_direct.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/memregion_direct.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/unisys/visorutil/visorkmodutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/unisys/visorutil/visorkmodutils.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/vme_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vme/devices/vme_user.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/device.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/device_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/device_main.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/mac.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/vt6655/mib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/mib.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/vt6655/mib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/mib.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/power.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/power.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/rxtx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6655/rxtx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/card.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6656/card.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6656/device.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/main_usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6656/main_usb.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/rxtx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6656/rxtx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/usbpipe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/vt6656/usbpipe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/Kconfig</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/TODO?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/TODO</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/coreconfigsimulator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/coreconfigsimulator.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/coreconfigurator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/coreconfigurator.c</a></td><td class='right'>2156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/coreconfigurator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/coreconfigurator.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/fifo_buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/fifo_buffer.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/fifo_buffer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/fifo_buffer.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/host_interface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/host_interface.c</a></td><td class='right'>7963</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/host_interface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/host_interface.h</a></td><td class='right'>1281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_mon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_mon.c</a></td><td class='right'>598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan.c</a></td><td class='right'>2783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan_common.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan_sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan_sdio.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan_sdio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan_sdio.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan_spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan_spi.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/linux_wlan_spi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/linux_wlan_spi.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_debugfs.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_errorsupport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_errorsupport.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_exported_buf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_exported_buf.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_log.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_log.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_memory.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_memory.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_memory.h</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_msgqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_msgqueue.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_msgqueue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_msgqueue.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_osconfig.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_osconfig.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_oswrapper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_oswrapper.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_platform.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_sdio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_sdio.c</a></td><td class='right'>1254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_sleep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_sleep.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_sleep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_sleep.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_spi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_spi.c</a></td><td class='right'>1406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_strutils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_strutils.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_strutils.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_strutils.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_timer.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_timer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_timer.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_type.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wfi_cfgoperations.c</a></td><td class='right'>3957</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wfi_cfgoperations.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wfi_netdevice.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wfi_netdevice.c</a></td><td class='right'>951</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wfi_netdevice.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wfi_netdevice.h</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wlan.c</a></td><td class='right'>2332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wlan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wlan.h</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wlan_cfg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wlan_cfg.c</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wlan_cfg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wlan_cfg.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/wilc1000/wilc_wlan_if.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wilc1000/wilc_wlan_if.h</a></td><td class='right'>969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wlan-ng/cfg80211.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/p80211conv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wlan-ng/p80211conv.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/p80211wep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wlan-ng/p80211wep.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/prism2fw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wlan-ng/prism2fw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/prism2sta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/wlan-ng/prism2sta.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/XGI_main_26.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/xgifb/XGI_main_26.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vb_setmode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/staging/xgifb/vb_setmode.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_configfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_configfs.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_device.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_erl0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_erl0.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_erl0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_erl0.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_login.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_login.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_login.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_login.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_parameters.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_parameters.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_parameters.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_parameters.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_tmr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_tmr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_tpg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_tpg.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_util.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/iscsi/iscsi_target_util.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/loopback/tcm_loop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/loopback/tcm_loop.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/loopback/tcm_loop.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/loopback/tcm_loop.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/sbp/sbp_target.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/sbp/sbp_target.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/sbp/sbp_target.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/sbp/sbp_target.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_alua.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_alua.c</a></td><td class='right'>466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_alua.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_alua.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_configfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_configfs.c</a></td><td class='right'>758</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_device.c</a></td><td class='right'>1293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_fabric_configfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_fabric_configfs.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_fabric_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_fabric_lib.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_file.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_file.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_file.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_hba.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_hba.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_iblock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_iblock.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_internal.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_pr.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_pr.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_pscsi.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pscsi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_pscsi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_rd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_rd.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_sbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_sbc.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_spc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_spc.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_stat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_stat.c</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_tmr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_tmr.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_tpg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_tpg.c</a></td><td class='right'>577</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_transport.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_ua.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_ua.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_ua.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_ua.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_user.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_xcopy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/target_core_xcopy.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tcm_fc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/tcm_fc/tcm_fc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/tcm_fc/tfc_cmd.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_conf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/tcm_fc/tfc_conf.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/tcm_fc/tfc_io.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_sess.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/target/tcm_fc/tfc_sess.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/Kconfig</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/cpu_cooling.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/cpu_cooling.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/db8500_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/db8500_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/fair_share.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/fair_share.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/hisi_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/hisi_thermal.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/imx_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/imx_thermal.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/int340x_thermal/processor_thermal_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/int340x_thermal/processor_thermal_device.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/intel_powerclamp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/intel_powerclamp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/intel_quark_dts_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/intel_quark_dts_thermal.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/intel_soc_dts_iosf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/intel_soc_dts_iosf.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/intel_soc_dts_iosf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/intel_soc_dts_iosf.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/intel_soc_dts_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/intel_soc_dts_thermal.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/of-thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/of-thermal.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/power_allocator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/power_allocator.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/thermal/qcom-spmi-temp-alarm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/qcom-spmi-temp-alarm.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/samsung/exynos_tmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/samsung/exynos_tmu.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/samsung/exynos_tmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/samsung/exynos_tmu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/thermal_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/thermal_core.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/thermal_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/thermal_core.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/ti-soc-thermal/ti-bandgap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/ti-soc-thermal/ti-bandgap.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/ti-soc-thermal/ti-thermal-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/ti-soc-thermal/ti-thermal-common.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/thermal/x86_pkg_temp_thermal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/thermal/x86_pkg_temp_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/amiserial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/amiserial.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/cyclades.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/cyclades.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/goldfish.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/goldfish.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_beat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_beat.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_console.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_iucv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_iucv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_opal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_opal.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_tile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_tile.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_xen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvc_xen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvcs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/hvc/hvcs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/metag_da.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/metag_da.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/n_gsm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/n_gsm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/n_tty.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/n_tty.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/nozomi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/nozomi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/rocket.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/rocket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/68328serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/68328serial.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_dw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_dw.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_early.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_ingenic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_ingenic.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_lpc18xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_lpc18xx.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_mtk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_mtk.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_omap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_omap.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_pci.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_uniphier.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/8250_uniphier.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/8250/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/Kconfig</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/altera_jtaguart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/altera_jtaguart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/altera_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/altera_uart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/amba-pl011.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/amba-pl011.c</a></td><td class='right'>651</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/atmel_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/atmel_serial.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/bfin_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/bfin_uart.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/crisv10.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/crisv10.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/earlycon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/earlycon.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/icom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/icom.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/ifx6x60.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/ifx6x60.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/imx.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/ioc3_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/ioc3_serial.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/ioc4_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/ioc4_serial.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/kgdb_nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/kgdb_nmi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/mcf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/mcf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/meson_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/meson_uart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/mpc52xx_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/mpc52xx_uart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/mpsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/mpsc.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/tty/serial/msm_smd_tty.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/msm_smd_tty.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/mxs-auart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/mxs-auart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/of_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/of_serial.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/omap-serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/omap-serial.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/samsung.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/samsung.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sc16is7xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sc16is7xx.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/serial-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/serial-tegra.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/serial_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/serial_core.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/serial_ks8695.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/serial_ks8695.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/serial_mctrl_gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/serial_mctrl_gpio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sh-sci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sh-sci.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sh-sci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sh-sci.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sirfsoc_uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sirfsoc_uart.c</a></td><td class='right'>622</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sirfsoc_uart.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sirfsoc_uart.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sprd_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/sprd_serial.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/tty/serial/stm32-usart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/stm32-usart.c</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/xilinx_uartps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/serial/xilinx_uartps.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/synclink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/synclink.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/synclink_gt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/synclink_gt.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/synclinkmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/synclinkmp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/sysrq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/sysrq.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/tty_buffer.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/tty_io.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/tty_ioctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_ldisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/tty_ldisc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_ldsem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/tty_ldsem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/consolemap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/vt/consolemap.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/keyboard.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/vt/keyboard.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/vt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/tty/vt/vt.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/uio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/uio/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/uio/uio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/uio/uio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/uio/uio_pruss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/uio/uio_pruss.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/speedtch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/atm/speedtch.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/ueagle-atm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/atm/ueagle-atm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/usbatm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/atm/usbatm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/xusbatm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/atm/xusbatm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/chipidea/ci_hdrc_usb2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/chipidea/ci_hdrc_usb2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/chipidea/host.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/chipidea/host.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/chipidea/usbmisc_imx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/chipidea/usbmisc_imx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/cdc-acm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/class/cdc-acm.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/cdc-acm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/class/cdc-acm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/usblp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/class/usblp.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/usbtmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/class/usbtmc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/common/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/common/ulpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/common/ulpi.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/core/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/core/buffer.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/devio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/core/devio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/core/hcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/hub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/core/hub.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/core.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/core.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/core_intr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/core_intr.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/dwc2/debug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/debug.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/dwc2/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/debugfs.c</a></td><td class='right'>771</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/gadget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/gadget.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/hcd.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/hcd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/hcd.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/hcd_intr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/hcd_intr.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/hcd_queue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/hcd_queue.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc2/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc2/platform.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/core.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/core.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/dwc3-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/dwc3-pci.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/gadget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/gadget.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/platform_data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/platform_data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/dwc3/ulpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/dwc3/ulpi.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/composite.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/composite.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/configfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/configfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/epautoconf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/epautoconf.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/f_fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/f_fs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/f_mass_storage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/f_mass_storage.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/f_midi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/f_midi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/f_rndis.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/f_rndis.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/rndis.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/rndis.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/rndis.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/rndis.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/storage_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/storage_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/u_rndis.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/u_rndis.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/function/uvc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/function/uvc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/legacy/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/legacy/inode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/legacy/tcm_usb_gadget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/legacy/tcm_usb_gadget.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/legacy/tcm_usb_gadget.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/legacy/tcm_usb_gadget.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/udc/atmel_usba_udc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/udc/atmel_usba_udc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/udc/fotg210-udc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/udc/fotg210-udc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/udc/net2280.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/udc/net2280.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/udc/s3c2410_udc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/gadget/udc/s3c2410_udc.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-dbg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-dbg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-fsl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-fsl.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-hcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-hub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-hub.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-platform.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci-tegra.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ehci.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/fsl-mph-dr-of.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/fsl-mph-dr-of.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/fusbh200-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/fusbh200-hcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/isp116x-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/isp116x-hcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-dbg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ohci-dbg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ohci-hcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ohci-platform.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ohci-q.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ssb-hcd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/ssb-hcd.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-hub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci-hub.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci-pci.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-plat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci-plat.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-ring.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci-ring.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/host/xhci.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/image/microtek.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/image/microtek.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/isp1760/isp1760-udc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/isp1760/isp1760-udc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/ldusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/misc/ldusb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/lvstest.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/misc/lvstest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/sisusbvga/sisusb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/misc/sisusbvga/sisusb.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/sisusbvga/sisusb_con.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/misc/sisusbvga/sisusb_con.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/uss720.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/misc/uss720.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/mon/mon_bin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/mon/mon_bin.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/mon/mon_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/mon/mon_main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/mon/mon_stat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/mon/mon_stat.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/am35x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/am35x.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/blackfin.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/blackfin.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/cppi_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/cppi_dma.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/da8xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/da8xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/davinci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/davinci.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/jz4740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/jz4740.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_core.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_core.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_cppi41.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_cppi41.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_debugfs.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_dma.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_dsps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_dsps.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_gadget.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_gadget.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_host.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_host.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_regs.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_virthub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musb_virthub.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musbhsdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/musbhsdma.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/omap2430.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/omap2430.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/tusb6010.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/tusb6010.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/tusb6010.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/tusb6010.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/tusb6010_omap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/tusb6010_omap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/ux500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/ux500.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/ux500_dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/musb/ux500_dma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/phy-ab8500-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy-ab8500-usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/phy-msm-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy-msm-usb.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/phy-mxs-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy-mxs-usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/phy/phy-rcar-gen2-usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy-rcar-gen2-usb.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/phy-tahvo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy-tahvo.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/phy/phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/phy/phy.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/renesas_usbhs/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/renesas_usbhs/common.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/renesas_usbhs/fifo.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/renesas_usbhs/fifo.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/renesas_usbhs/mod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/renesas_usbhs/mod.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/cp210x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/cp210x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/mos7720.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/mos7720.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/mos7840.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/mos7840.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/option.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/option.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/usb-serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/serial/usb-serial.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/alauda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/alauda.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/cypress_atacb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/cypress_atacb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/datafab.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/datafab.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/ene_ub6250.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/ene_ub6250.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/freecom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/freecom.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/isd200.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/isd200.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/jumpshot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/jumpshot.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/karma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/karma.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/onetouch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/onetouch.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/realtek_cr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/realtek_cr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/scsiglue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/scsiglue.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/scsiglue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/scsiglue.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/sddr09.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/sddr09.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/sddr55.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/sddr55.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/shuttle_usbat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/shuttle_usbat.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/uas.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/uas.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/usb.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/usb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/usb/storage/usb.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/pci/vfio_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/pci/vfio_pci.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/platform/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/platform/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/vfio/platform/reset/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/reset/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/vfio/platform/reset/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/reset/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/platform/vfio_platform_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/vfio_platform_common.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/platform/vfio_platform_private.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/platform/vfio_platform_private.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/vfio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/vfio.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/vfio_iommu_spapr_tce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/vfio_iommu_spapr_tce.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vfio/vfio_spapr_eeh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vfio/vfio_spapr_eeh.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vhost/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/scsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vhost/scsi.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/vhost.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vhost/vhost.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/vhost.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vhost/vhost.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/backlight/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/da9052_bl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/backlight/da9052_bl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/gpio_backlight.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/backlight/gpio_backlight.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/lp855x_bl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/backlight/lp855x_bl.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/pwm_bl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/backlight/pwm_bl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/console/fbcon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/console/fbcon.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/console/fbcon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/console/fbcon.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/console/newport_con.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/console/newport_con.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/amifb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/amifb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/atafb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/atafb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/atmel_lcdfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/atmel_lcdfb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/aty/aty128fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/aty/aty128fb.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/aty/radeon_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/aty/radeon_base.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/aty/radeonfb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/aty/radeonfb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/core/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/core/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/core/fb_defio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/core/fb_defio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/core/fbmon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/core/fbmon.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/gbefb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/gbefb.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/geode/gxfb_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/geode/gxfb_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/hpfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/hpfb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/i810/i810.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/i810/i810.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/i810/i810_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/i810/i810_main.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/i810/i810_main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/i810/i810_main.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/imxfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/imxfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/intelfb/intelfb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/intelfb/intelfb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/intelfb/intelfbdrv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/intelfb/intelfbdrv.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/matrox/matroxfb_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/matrox/matroxfb_base.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/matrox/matroxfb_base.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/matrox/matroxfb_base.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mddi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mddi.c</a></td><td class='right'>821</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mddi_client_dummy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mddi_client_dummy.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mddi_client_nt35399.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mddi_client_nt35399.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mddi_client_toshiba.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mddi_client_toshiba.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mddi_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mddi_hw.h</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp_csc_table.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp_csc_table.h</a></td><td class='right'>582</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp_hw.h</a></td><td class='right'>627</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp_ppp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp_ppp.c</a></td><td class='right'>731</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp_scale_tables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp_scale_tables.c</a></td><td class='right'>766</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/mdp_scale_tables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/mdp_scale_tables.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/video/fbdev/msm/msm_fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/msm/msm_fb.c</a></td><td class='right'>659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/mxsfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/mxsfb.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/neofb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/neofb.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/nvidia/nv_type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/nvidia/nv_type.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/nvidia/nvidia.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/nvidia/nvidia.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/displays-new/encoder-opa362.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/displays-new/encoder-opa362.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/displays-new/panel-dpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/displays-new/panel-dpi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/core.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/dispc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/dispc.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/display-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/display-sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/dpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/dpi.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/dsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/dsi.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/dss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/dss.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/dss.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/dss.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/hdmi4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/hdmi4.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/hdmi4_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/hdmi4_core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/hdmi5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/hdmi5.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/hdmi5_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/hdmi5_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/hdmi_wp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/hdmi_wp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/rfbi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/rfbi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/sdi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/sdi.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/omap2/dss/venc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/omap2/dss/venc.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/pm2fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/pm2fb.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/pm3fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/pm3fb.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/riva/fbdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/riva/fbdev.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/riva/rivafb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/riva/rivafb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/savage/savagefb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/savage/savagefb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/savage/savagefb_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/savage/savagefb_driver.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/sis/sis.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/sis/sis.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/sis/sis_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/sis/sis_main.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/ssd1307fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/ssd1307fb.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/stifb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/stifb.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/tdfxfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/tdfxfb.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/uvesafb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/uvesafb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/vesafb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/vesafb.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbdev/vt8623fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/video/fbdev/vt8623fb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_mmio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/virtio/virtio_mmio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_pci_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/virtio/virtio_pci_common.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_pci_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/virtio/virtio_pci_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_pci_legacy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/virtio/virtio_pci_legacy.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_pci_modern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/virtio/virtio_pci_modern.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vme/bridges/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vme/bridges/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vme/bridges/vme_ca91cx42.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vme/bridges/vme_ca91cx42.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vme/bridges/vme_ca91cx42.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vme/bridges/vme_ca91cx42.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vme/bridges/vme_tsi148.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vme/bridges/vme_tsi148.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vme/vme.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/vme/vme.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/masters/ds2482.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/w1/masters/ds2482.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/slaves/w1_therm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/w1/slaves/w1_therm.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/w1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/w1/w1.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/at91sam9_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/at91sam9_wdt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/bcm2835_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/bcm2835_wdt.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/watchdog/da9062_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/da9062_wdt.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/watchdog/digicolor_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/digicolor_wdt.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/dw_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/dw_wdt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/gpio_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/gpio_wdt.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/hpwdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/hpwdt.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/imgpdc_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/imgpdc_wdt.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/imx2_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/imx2_wdt.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/max63xx_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/max63xx_wdt.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/mena21_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/mena21_wdt.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/omap_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/omap_wdt.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/omap_wdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/omap_wdt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/sp805_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/sp805_wdt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/watchdog/st_lpc_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/st_lpc_wdt.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/watchdog_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/watchdog/watchdog_core.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/events/events_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/events/events_base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/events/events_fifo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/events/events_fifo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/gntdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/gntdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/grant-table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/grant-table.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/manage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/manage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/tmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/tmem.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xen-acpi-cpuhotplug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/xen-acpi-cpuhotplug.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xen-scsiback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/xen-scsiback.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xenbus/xenbus_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/xenbus/xenbus_client.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xenbus/xenbus_probe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>drivers/xen/xenbus/xenbus_probe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/firmware/README.AddingFirmware?id=527c465a3c8716d93201ae34b7fc52679610596d'>firmware/README.AddingFirmware</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/v9fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/9p/v9fs.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/v9fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/9p/v9fs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/vfs_inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/9p/vfs_inode.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/vfs_inode_dotl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/9p/vfs_inode_dotl.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/vfs_super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/9p/vfs_super.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/adfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/adfs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/affs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/affs/affs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/amigaffs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/affs/amigaffs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/affs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/affs/symlink.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/afs/rxrpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/afs/rxrpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/autofs4/autofs_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/autofs4/autofs_i.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/autofs4/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/autofs4/symlink.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/befs/befs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/befs/befs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/befs/btree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/befs/btree.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/befs/linuxvfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/befs/linuxvfs.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/binfmt_elf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/binfmt_elf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/block_dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/block_dev.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/async-thread.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/async-thread.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/async-thread.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/async-thread.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/backref.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/backref.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/btrfs_inode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/btrfs_inode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ctree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ctree.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ctree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ctree.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/delayed-ref.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/delayed-ref.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/delayed-ref.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/delayed-ref.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/dev-replace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/dev-replace.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/disk-io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/disk-io.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/extent-tree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/extent-tree.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/btrfs/extent-tree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/extent-tree.h</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/extent_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/extent_io.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/file.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/free-space-cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/free-space-cache.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/inode-map.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/inode-map.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/inode.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ioctl.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ordered-data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ordered-data.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ordered-data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ordered-data.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/qgroup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/qgroup.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/qgroup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/qgroup.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/relocation.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/relocation.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/scrub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/scrub.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/send.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/send.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/super.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/sysfs.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/sysfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/sysfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/tests/qgroup-tests.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/tests/qgroup-tests.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/transaction.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/transaction.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/transaction.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/transaction.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/tree-defrag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/tree-defrag.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/tree-log.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/tree-log.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ulist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ulist.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ulist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/ulist.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/volumes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/volumes.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/volumes.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/btrfs/volumes.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/buffer.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cachefiles/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cachefiles/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cachefiles/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cachefiles/namei.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/acl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/acl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/addr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/addr.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/caps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/caps.c</a></td><td class='right'>836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/dir.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/file.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/inode.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/mds_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/mds_client.c</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/mds_client.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/mds_client.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/snap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/snap.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/super.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/super.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/super.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/xattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ceph/xattr.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/cifsfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsglob.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/cifsglob.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifspdu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/cifspdu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifssmb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/cifssmb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/connect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/connect.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/ioctl.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/link.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/link.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/smb2ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/smb2ops.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/smb2pdu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/smb2pdu.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/smb2pdu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/smb2pdu.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/smbfsctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/cifs/smbfsctl.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/coda/coda_linux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/coda/coda_linux.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/compat_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/compat_ioctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/configfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/configfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/configfs/item.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/configfs/item.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/configfs/mount.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/configfs/mount.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/configfs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/configfs/symlink.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/coredump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/coredump.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dax.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/dax.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dcache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/dcache.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/debugfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/debugfs/file.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/debugfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/debugfs/inode.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/devpts/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/devpts/inode.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/lowcomms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/dlm/lowcomms.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ecryptfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ecryptfs/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ecryptfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ecryptfs/inode.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/efs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/efs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/dir.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/exofs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/exofs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/inode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/namei.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/exofs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/exofs/symlink.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/inode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/namei.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/super.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext2/symlink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext3/inode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext3/namei.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext3/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext3/symlink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/balloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/balloc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/crypto.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/crypto_fname.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/crypto_fname.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/crypto_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/crypto_key.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/crypto_policy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/crypto_policy.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/dir.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/ext4.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4_crypto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/ext4_crypto.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/extents.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/extents.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/file.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ialloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/ialloc.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/indirect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/indirect.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/inline.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/inline.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/inode.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/ioctl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/mballoc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/mballoc.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/migrate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/migrate.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/move_extent.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/move_extent.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/namei.c</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/page-io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/page-io.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/readpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/readpage.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/super.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ext4/symlink.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/acl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/acl.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/checkpoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/checkpoint.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/f2fs/crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/crypto.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/f2fs/crypto_fname.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/crypto_fname.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/f2fs/crypto_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/crypto_key.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/f2fs/crypto_policy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/crypto_policy.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/data.c</a></td><td class='right'>593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/debug.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/dir.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/f2fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/f2fs.h</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/f2fs/f2fs_crypto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/f2fs_crypto.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/file.c</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/gc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/gc.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/hash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/hash.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/inline.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/inline.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/inode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/namei.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/node.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/node.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/node.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/node.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/recovery.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/recovery.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/segment.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/segment.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/segment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/segment.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/super.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/trace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/trace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/xattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/xattr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/f2fs/xattr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/f2fs/xattr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fat/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fat/inode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/file.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/file_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/file_table.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/freevxfs/vxfs_extern.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/freevxfs/vxfs_extern.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/freevxfs/vxfs_immed.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/freevxfs/vxfs_immed.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/freevxfs/vxfs_inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/freevxfs/vxfs_inode.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/freevxfs/vxfs_lookup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/freevxfs/vxfs_lookup.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fs-writeback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fs-writeback.c</a></td><td class='right'>1167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/cookie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/cookie.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/internal.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/object.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/object.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/operation.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/operation.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/page.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/page.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fscache/stats.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fscache/stats.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/cuse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/cuse.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/dev.c</a></td><td class='right'>825</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/dir.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/file.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/fuse_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/fuse_i.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/fuse/inode.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/aops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/aops.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/glock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/glock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/glops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/glops.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/incore.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/incore.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/inode.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/ops_fstype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/ops_fstype.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/quota.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/quota.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/rgrp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/rgrp.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/rgrp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/rgrp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/sys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/gfs2/sys.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfs/hfs_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hfs/hfs_fs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hfs/super.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfsplus/hfsplus_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hfsplus/hfsplus_fs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfsplus/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hfsplus/super.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hostfs/hostfs_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hostfs/hostfs_kern.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/alloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hpfs/alloc.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hpfs/dir.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hpfs/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/hpfs_fn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hpfs/hpfs_fn.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hpfs/super.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/hppfs/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hppfs/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/hppfs/hppfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hppfs/hppfs.c</a></td><td class='right'>766</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hugetlbfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/hugetlbfs/inode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/inode.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/checkpoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jbd2/checkpoint.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/journal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jbd2/journal.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/revoke.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jbd2/revoke.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/transaction.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jbd2/transaction.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jffs2/dir.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jffs2/fs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/os-linux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jffs2/os-linux.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/readinode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jffs2/readinode.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jffs2/symlink.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/inode.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/ioctl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/jfs_incore.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/jfs_incore.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/namei.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/jfs/symlink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/kernfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/kernfs/dir.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/kernfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/kernfs/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/kernfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/kernfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/kernfs/kernfs-internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/kernfs/kernfs-internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/kernfs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/kernfs/symlink.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/libfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/libfs.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/locks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/locks.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/logfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/logfs/dir.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/minix/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/minix/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/minix/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/minix/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/minix/minix.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/minix/minix.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/mount.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/mount.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/mpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/mpage.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/namei.c</a></td><td class='right'>1455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/namespace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/namespace.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ncpfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ncpfs/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/callback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/callback.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/callback_proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/callback_proc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/callback_xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/callback_xdr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/client.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/file.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/filelayout/filelayout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/filelayout/filelayout.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/flexfilelayout/flexfilelayout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/flexfilelayout/flexfilelayout.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/flexfilelayout/flexfilelayout.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/flexfilelayout/flexfilelayout.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/flexfilelayout/flexfilelayoutdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/flexfilelayout/flexfilelayoutdev.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/inode.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs3xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs3xdr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs42.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs42.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs42proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs42proc.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs42xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs42xdr.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4_fs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4client.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4getroot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4getroot.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4idmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4idmap.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4proc.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4state.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4state.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/nfs4xdr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pagelist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/pagelist.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pnfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/pnfs.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pnfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/pnfs.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/symlink.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/write.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfs/write.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs3xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs3xdr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4acl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs4acl.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4callback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs4callback.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs4proc.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4state.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs4state.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4xdr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfs4xdr.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfsproc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/nfsproc.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/state.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/state.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/vfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/vfs.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/vfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/vfs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/xdr4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nfsd/xdr4.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nilfs2/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nilfs2/inode.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nilfs2/ioctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nilfs2/namei.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/segbuf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/nilfs2/segbuf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/notify/inotify/inotify_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/notify/inotify/inotify_user.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/notify/mark.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/notify/mark.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ntfs/file.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/inode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ntfs/inode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/malloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ntfs/malloc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ntfs/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/alloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/alloc.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/aops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/aops.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/aops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/aops.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/cluster/masklog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/cluster/masklog.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/cluster/masklog.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/cluster/masklog.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/cluster/tcp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/cluster/tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/dir.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dlm/dlmcommon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/dlm/dlmcommon.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/file.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/ioctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/journal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/journal.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/namei.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/namei.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/namei.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/ocfs2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/ocfs2.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/refcounttree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/refcounttree.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/xattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ocfs2/xattr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/open.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/open.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/overlayfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/overlayfs/inode.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/overlayfs/overlayfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/overlayfs/overlayfs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/overlayfs/readdir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/overlayfs/readdir.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/overlayfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/overlayfs/super.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/posix_acl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/posix_acl.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/array.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/array.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/base.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/generic.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/inode.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/kcore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/kcore.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/namespaces.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/namespaces.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/nommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/proc_sysctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/proc_sysctl.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/root.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/root.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/self.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/self.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/task_mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/task_mmu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/task_nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/task_nommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/thread_self.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc/thread_self.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc_namespace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/proc_namespace.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/pstore/inode.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/pstore/platform.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/ram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/pstore/ram.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/qnx6/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/qnx6/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/reiserfs/super.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/select.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/select.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/seq_file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/seq_file.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/splice.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/splice.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/squashfs/squashfs_fs_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/squashfs/squashfs_fs_i.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysfs/dir.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysfs/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/group.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysfs/group.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/mount.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysfs/mount.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysv/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysv/dir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysv/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysv/inode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/sysv/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysv/symlink.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysv/sysv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/sysv/sysv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/tracefs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/tracefs/inode.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ubifs/dir.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ubifs/file.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ubifs/super.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/namei.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/super.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/symlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/udf_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/udf_i.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/unicode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/udf/unicode.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/balloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/balloc.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/dir.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/dir.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/ialloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/ialloc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/inode.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/namei.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/namei.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/super.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/symlink.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/ufs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/ufs/ufs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xattr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_alloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_alloc.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_alloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_alloc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_attr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_attr.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_bmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_bmap.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_format.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_format.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_fs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_ialloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_ialloc.c</a></td><td class='right'>542</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_ialloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_ialloc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_ialloc_btree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_ialloc_btree.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_ialloc_btree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_ialloc_btree.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_inode_buf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_inode_buf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_sb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_sb.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_shared.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_shared.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_trans_resv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_trans_resv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/libxfs/xfs_trans_space.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/libxfs/xfs_trans_space.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_aops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_aops.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_aops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_aops.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_attr_inactive.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_attr_inactive.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_bmap_util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_bmap_util.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_buf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_buf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_buf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_buf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dquot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_dquot.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_error.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_error.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_error.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_error.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_extfree_item.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_extfree_item.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_file.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_filestream.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_filestream.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_fsops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_fsops.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_inode.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_ioctl.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_iomap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_iomap.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_iops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_iops.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_itable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_itable.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_linux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_linux.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_log.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_log.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_cil.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_log_cil.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_log_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_recover.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_log_recover.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_mount.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_mount.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_mount.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_mount.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_pnfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_pnfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_qm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_qm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_qm_syscalls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_qm_syscalls.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_quota.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_quota.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_rtalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_rtalloc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_super.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_super.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_symlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_symlink.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trace.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trans.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trans.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_ail.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trans_ail.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_dquot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trans_dquot.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_priv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>fs/xfs/xfs_trans_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acnames.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acnames.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acoutput.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acoutput.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acpi_bus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acpi_bus.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acpiosxf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acpiosxf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acpixf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acpixf.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actbl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/actbl.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actbl1.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/actbl1.h</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actbl2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/actbl2.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actbl3.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/actbl3.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actypes.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/actypes.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/acpi/acuuid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/acuuid.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/platform/acenv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/platform/acenv.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/platform/acenvex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/platform/acenvex.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/platform/acgcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/platform/acgcc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/video.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/acpi/video.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/asm-offsets.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/asm-offsets.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/barrier.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/cmpxchg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/futex.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/gpio.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/io.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/iomap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/iomap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/mm-arch-hooks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/mm-arch-hooks.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/pci.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/pgtable.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/preempt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/preempt.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/qspinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/qspinlock.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/qspinlock_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/qspinlock_types.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/asm-generic/scatterlist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/asm-generic/scatterlist.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/clocksource/timer-sp804.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/clocksource/timer-sp804.h</a> (renamed from arch/arm/include/asm/hardware/timer-sp.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/aead.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/aead.h</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/crypto/akcipher.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/akcipher.h</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/algapi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/algapi.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/compress.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/compress.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/cryptd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/cryptd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/drbg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/drbg.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/hash.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/hash.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/internal/aead.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/internal/aead.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/crypto/internal/akcipher.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/internal/akcipher.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/crypto/internal/geniv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/internal/geniv.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/internal/rng.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/internal/rng.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/crypto/internal/rsa.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/internal/rsa.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/md5.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/md5.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/null.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/null.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/rng.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/rng.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/crypto/scatterwalk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/crypto/scatterwalk.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/drm/bridge/ptn3460.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/bridge/ptn3460.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drmP.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drmP.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_atomic.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_atomic_helper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_atomic_helper.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_crtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_crtc.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_dp_helper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_dp_helper.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_dp_mst_helper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_dp_mst_helper.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_mem_util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_mem_util.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_modes.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/drm_modes.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/i915_pciids.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/drm/i915_pciids.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/bcm-cygnus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/bcm-cygnus.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/hi6220-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/hi6220-clock.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/imx7d-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/imx7d-clock.h</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/jz4740-cgu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/jz4740-cgu.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/jz4780-cgu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/jz4780-cgu.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/lpc18xx-ccu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/lpc18xx-ccu.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/lpc18xx-cgu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/lpc18xx-cgu.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/marvell,mmp2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/marvell,mmp2.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/marvell,pxa168.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/marvell,pxa168.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/marvell,pxa1928.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/marvell,pxa1928.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/marvell,pxa910.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/marvell,pxa910.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/meson8b-clkc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/meson8b-clkc.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/mt8135-clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/mt8135-clk.h</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/mt8173-clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/mt8173-clk.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/qcom,gcc-ipq806x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/qcom,gcc-ipq806x.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/r8a73a4-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/r8a73a4-clock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/r8a7790-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/r8a7790-clock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/r8a7791-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/r8a7791-clock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/r8a7794-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/r8a7794-clock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/samsung,s2mps11.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/samsung,s2mps11.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/clock/vf610-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/vf610-clock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/clock/zx296702-clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/clock/zx296702-clock.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/mfd/arizona.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/mfd/arizona.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/mfd/st-lpc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/mfd/st-lpc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/net/ti-dp83867.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/net/ti-dp83867.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/phy/phy-pistachio-usb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/phy/phy-pistachio-usb.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/pinctrl/am43xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/pinctrl/am43xx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/pinctrl/bcm2835.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/pinctrl/bcm2835.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/pinctrl/mt6397-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/pinctrl/mt6397-pinfunc.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/reset-controller/mt8135-resets.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/reset-controller/mt8135-resets.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/dt-bindings/reset-controller/mt8173-resets.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/reset-controller/mt8173-resets.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/dt-bindings/reset/qcom,gcc-ipq806x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/dt-bindings/reset/qcom,gcc-ipq806x.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/acpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/acpi.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/alarmtimer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/alarmtimer.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/amba/sp810.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/amba/sp810.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ata.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/backing-dev-defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/backing-dev-defs.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/backing-dev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/backing-dev.h</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/backlight.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/backlight.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/basic_mmio_gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/basic_mmio_gpio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bcm47xx_nvram.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bcm47xx_nvram.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bcma/bcma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bcma/bcma.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bcma/bcma_driver_pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bcma/bcma_driver_pci.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bio.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/blk-cgroup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/blk-cgroup.h</a> (renamed from block/blk-cgroup.h)</td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/blk-mq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/blk-mq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/blk_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/blk_types.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/blkdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/blkdev.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bootmem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bootmem.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bottom_half.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bottom_half.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bpf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/bpf.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/brcmphy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/brcmphy.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/buffer_head.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/buffer_head.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cacheinfo.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cacheinfo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/can/skb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/can/skb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/libceph.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ceph/libceph.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/messenger.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ceph/messenger.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/osd_client.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ceph/osd_client.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/cgroup-defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cgroup-defs.h</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cgroup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cgroup.h</a></td><td class='right'>994</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clk-provider.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/clk-provider.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/clk.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clkdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/clkdev.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clockchips.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/clockchips.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clocksource.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/clocksource.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/compat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/compiler-gcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler-gcc.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/compiler-gcc3.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler-gcc3.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/compiler-gcc4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler-gcc4.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/compiler-gcc5.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler-gcc5.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/compiler-intel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler-intel.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/compiler.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/compiler.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/configfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/configfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/console.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/console.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/console_struct.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/console_struct.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/context_tracking.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/context_tracking.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/context_tracking_state.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/context_tracking_state.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cpu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cpu_cooling.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cpu_cooling.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cpufreq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cpufreq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cpuidle.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/cpuidle.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crc-itu-t.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crc-itu-t.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crc-t10dif.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crc-t10dif.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crush/crush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crush/crush.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crush/hash.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crush/hash.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crush/mapper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crush/mapper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crypto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/crypto.h</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dcache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dcache.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/debugfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/debugfs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/device.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dma-buf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dma-buf.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/dma/pxa-dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dma/pxa-dma.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmaengine.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dmaengine.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmapool.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dmapool.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmar.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dmar.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/dmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/efi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/efi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/elevator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/elevator.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/etherdevice.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/etherdevice.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/extcon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/extcon.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/extcon/extcon-adc-jack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/extcon/extcon-adc-jack.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/f2fs_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/f2fs_fs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fdtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/fdtable.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/filter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/filter.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/frontswap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/frontswap.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/fs.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fscache-cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/fscache-cache.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fsl_devices.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/fsl_devices.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fsnotify_backend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/fsnotify_backend.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/genalloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/genalloc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gfp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/gfp.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/goldfish.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/goldfish.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/gpio.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gpio/consumer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/gpio/consumer.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gpio/driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/gpio/driver.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hardirq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hardirq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hid-sensor-hub.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hid-sensor-hub.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hid.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/highmem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/highmem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hrtimer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hrtimer.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/htirq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/htirq.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hugetlb.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hwspinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hwspinlock.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hyperv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/hyperv.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c/twl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/i2c/twl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ide.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ide.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ieee802154.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ieee802154.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_link.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/if_link.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_macvlan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/if_macvlan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_pppox.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/if_pppox.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_vlan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/if_vlan.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/igmp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/igmp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iio/buffer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/iio/buffer.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iio/iio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/iio/iio.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iio/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/iio/types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/inet_diag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/inet_diag.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/inetdevice.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/inetdevice.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/init.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/init_task.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/init_task.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/input/touchscreen.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/input/touchscreen.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/intel-iommu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/intel-iommu.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/interrupt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/interrupt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/io-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/io-mapping.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/io.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iommu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/iommu.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irq.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irqchip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqchip.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/irqchip/ingenic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqchip/ingenic.h</a> (renamed from arch/mips/jz4740/irq.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/irqchip/irq-sa11x0.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqchip/irq-sa11x0.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irqdesc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqdesc.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irqdomain.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqdomain.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irqnr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/irqnr.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/jbd2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/jbd2.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/jiffies.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/jiffies.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kernel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kernel.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kernfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kernfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kmemleak.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kmemleak.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kobject.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kobject.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kvm_host.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kvm_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/kvm_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/leds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/leds.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lglock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/lglock.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/libata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/libata.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/libfdt_env.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/libnvdimm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/libnvdimm.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/livepatch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/livepatch.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lockdep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/lockdep.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/lsm_hooks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/lsm_hooks.h</a></td><td class='right'>1888</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mailbox_client.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mailbox_client.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mailbox_controller.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mailbox_controller.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mbus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mbus.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mdio-gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mdio-gpio.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mei_cl_bus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mei_cl_bus.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/memblock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/memblock.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/memcontrol.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/memcontrol.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/arizona/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/arizona/core.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/arizona/pdata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/arizona/pdata.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/arizona/registers.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/arizona/registers.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/axp20x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/axp20x.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/cros_ec.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/cros_ec.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/cros_ec_commands.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/cros_ec_commands.h</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/da9055/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/da9055/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/da9063/pdata.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/da9063/pdata.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/max77686.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/max77686.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/stmpe.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/stmpe.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/syscon/atmel-mc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mfd/syscon/atmel-mc.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx4/cmd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx4/cmd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx4/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx4/device.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx5/cq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/cq.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx5/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/device.h</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx5/driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/driver.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mlx5/flow_table.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/flow_table.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx5/mlx5_ifc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/mlx5_ifc.h</a></td><td class='right'>6584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 80.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx5/qp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/qp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mlx5/vport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mlx5/vport.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mm-arch-hooks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mm-arch-hooks.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mm.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mm_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mm_types.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/card.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/card.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/dw_mmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/dw_mmc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/host.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/mmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/mmc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/sdhci-pci-data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmc/sdhci-pci-data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmiotrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmiotrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmu_notifier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmu_notifier.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmzone.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mmzone.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mod_devicetable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mod_devicetable.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/module.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/module.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/moduleparam.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/moduleparam.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mpi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/cfi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mtd/cfi.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/nand.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/mtd/nand.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/namei.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/namei.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/nd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nd.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/net.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/net.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netdev_features.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netdev_features.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netdevice.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netdevice.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter/ipset/ip_set.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set_comment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter/ipset/ip_set_comment.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set_timeout.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter/ipset/ip_set_timeout.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/x_tables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter/x_tables.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_bridge.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter_bridge.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_bridge/ebtables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter_bridge/ebtables.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/netfilter_defs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter_defs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/netfilter_ingress.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter_ingress.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_ipv6.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netfilter_ipv6.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netlink.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/netlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nfs4.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nfs_fs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_fs_sb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nfs_fs_sb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nfs_page.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_xdr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nfs_xdr.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nmi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nmi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ntb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ntb.h</a></td><td class='right'>970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/ntb_transport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ntb_transport.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nvme.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nvme.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/nx842.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/nx842.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/of.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/of_device.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/of_dma.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_fdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/of_fdt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_graph.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/of_graph.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/oom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/oom.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/osq_lock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/osq_lock.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/page_owner.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/page_owner.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pagemap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pagemap.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/parport.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/parport.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pata_arasan_cf_data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pata_arasan_cf_data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pci.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pci_ids.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pci_ids.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/perf_event.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/phy.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/phy/phy-sun4i-usb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/phy/phy-sun4i-usb.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/phy/phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/phy/phy.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/consumer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pinctrl/consumer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinctrl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pinctrl/pinctrl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinmux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pinctrl/pinmux.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/platform_data/dma-rcar-audmapp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/dma-rcar-audmapp.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/gpio-ath79.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/gpio-ath79.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/platform_data/gpio-omap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/gpio-omap.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/platform_data/keyboard-spear.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/keyboard-spear.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/nfcmrvl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/nfcmrvl.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/platform_data/ntc_thermistor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/ntc_thermistor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/platform_data/st-nci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/st-nci.h</a> (renamed from include/linux/platform_data/st21nfcb.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/st_nci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/st_nci.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/platform_data/usb-rcar-gen2-phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/usb-rcar-gen2-phy.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/platform_data/video-msm_fb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/video-msm_fb.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/wkup_m3.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_data/wkup_m3.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/platform_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/platform_device.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm_clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pm_clock.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/pm_wakeirq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pm_wakeirq.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm_wakeup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pm_wakeup.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/pmem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pmem.h</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/power/max17042_battery.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/power/max17042_battery.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/power_supply.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/power_supply.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/preempt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/preempt.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/preempt_mask.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/preempt_mask.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/printk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/printk.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/property.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/property.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pwm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pwm.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pxa2xx_ssp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/pxa2xx_ssp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/qcom_scm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/qcom_scm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/random.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/random.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rbtree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rbtree.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rbtree_augmented.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rbtree_augmented.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/rbtree_latch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rbtree_latch.h</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rculist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rculist.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcupdate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rcupdate.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcutiny.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rcutiny.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcutree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rcutree.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regmap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/regmap.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/regulator/driver.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/machine.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/regulator/machine.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/max8973-regulator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/regulator/max8973-regulator.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/remoteproc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/remoteproc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/reset/bcm63xx_pmb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/reset/bcm63xx_pmb.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rtc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rtc/sirfsoc_rtciobrg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rtc/sirfsoc_rtciobrg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rtnetlink.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/rtnetlink.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/scatterlist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/scatterlist.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sched.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sched/sysctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sched/sysctl.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/scif.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/scif.h</a></td><td class='right'>993</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/security.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/security.h</a></td><td class='right'>1628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/seq_file.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/seq_file.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/seqlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/seqlock.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_8250.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/serial_8250.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/serial_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_sci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/serial_sci.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/skbuff.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/skbuff.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/slab.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/slab.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/smpboot.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/smpboot.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/soc/sunxi/sunxi_sram.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/soc/sunxi/sunxi_sram.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sock_diag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sock_diag.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/spi/cc2520.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/spi/cc2520.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/spinlock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ssb/ssb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ssb/ssb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/stddef.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/stddef.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/stmmac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/stmmac.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/string.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/string.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/bc_xprt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/bc_xprt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/clnt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/clnt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/sched.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/svc_rdma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/svc_rdma.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/xprt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/xprt.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/xprtrdma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sunrpc/xprtrdma.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/sw842.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sw842.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/swap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/swap.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/syscalls.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/syscalls.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sysctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sysctl.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sysfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/sysfs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/syslog.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/syslog.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tcp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/tcp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/thermal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/thermal.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tick.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/tick.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/time64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/time64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/timekeeper_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/timekeeper_internal.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/timekeeping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/timekeeping.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/timer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/timer.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/timerqueue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/timerqueue.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/topology.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/trace_events.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/trace_events.h</a> (renamed from include/linux/ftrace_event.h)</td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tty.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/tty.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/types.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/u64_stats_sync.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/u64_stats_sync.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/uaccess.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/ulpi/driver.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ulpi/driver.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/ulpi/interface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ulpi/interface.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/ulpi/regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/ulpi/regs.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/cdc_ncm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/cdc_ncm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/hcd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/hcd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/msm_hsusb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/msm_hsusb.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/msm_hsusb_hw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/msm_hsusb_hw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/net2280.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/net2280.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/phy.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/phy.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/renesas_usbhs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/renesas_usbhs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/ulpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/ulpi.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/usb338x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/usb/usb338x.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/virtio_byteorder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/virtio_byteorder.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/virtio_config.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/virtio_config.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/vme.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/vme.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/vringh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/vringh.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/wait.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/wait.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/watchdog.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/watchdog.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/workqueue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/workqueue.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/writeback.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/writeback.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/zpool.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/linux/zpool.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/adp1653.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/adp1653.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/adv7511.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/adv7511.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/adv7604.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/adv7604.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/adv7842.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/adv7842.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/rc-core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/rc-core.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/rc-map.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/rc-map.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-dv-timings.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-dv-timings.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/media/v4l2-flash-led-class.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-flash-led-class.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-mediabus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-mediabus.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-mem2mem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-mem2mem.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-of.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-of.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-subdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/v4l2-subdev.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/videobuf2-core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/media/videobuf2-core.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/misc/cxl-base.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/misc/cxl-base.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/misc/cxl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/misc/cxl.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/addrconf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/addrconf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/af_unix.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/af_unix.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/af_vsock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/af_vsock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ax25.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ax25.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/bluetooth.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/bluetooth/bluetooth.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/hci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/bluetooth/hci.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/hci_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/bluetooth/hci_core.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bond_options.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/bond_options.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bonding.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/bonding.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/cfg80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/cfg80211.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/cfg802154.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/cfg802154.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/checksum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/checksum.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/codel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/codel.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/dst.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/fib_rules.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/fib_rules.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/net/flow_dissector.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/flow_dissector.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/net/flow_keys.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/flow_keys.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/geneve.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/geneve.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ieee802154_netdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ieee802154_netdev.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/inet_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_frag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/inet_frag.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_hashtables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/inet_hashtables.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_sock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/inet_sock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ip.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip6_fib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ip6_fib.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip6_route.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ip6_route.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip_fib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ip_fib.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ipv6.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/ipv6.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/llc_conn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/llc_conn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/mac80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/mac80211.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/mac802154.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/mac802154.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/net_namespace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/net_namespace.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/br_netfilter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netfilter/br_netfilter.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/nf_queue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netfilter/nf_queue.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/nf_tables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netfilter/nf_tables.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/ipv4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/ipv4.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/ipv6.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/ipv6.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/netfilter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/netfilter.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/nftables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/nftables.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/sctp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/sctp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/x_tables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/netns/x_tables.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nfc/hci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/nfc/hci.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nfc/nci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/nfc/nci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nfc/nci_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/nfc/nci_core.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nfc/nfc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/nfc/nfc.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nl802154.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/nl802154.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/request_sock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/request_sock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sch_generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/sch_generic.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sctp/structs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/sctp/structs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/sock.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/switchdev.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/switchdev.h</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/tcp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/tcp.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/xfrm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/net/xfrm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/ras/ras_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/ras/ras_event.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_addr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/ib_addr.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/ib_cache.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_mad.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/ib_mad.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/ib_verbs.h</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/iw_cm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/iw_cm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/rdma/opa_smi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/opa_smi.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/rdma_cm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/rdma/rdma_cm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/scsi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi.h</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/scsi/scsi_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi_common.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/scsi_device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi_device.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/scsi_eh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi_eh.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/scsi/scsi_proto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi_proto.h</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/scsi_transport_srp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/scsi_transport_srp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/srp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/scsi/srp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/soc/at91/at91rm9200_sdramc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/at91/at91rm9200_sdramc.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/soc/imx/revision.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/imx/revision.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/soc/imx/timer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/imx/timer.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/soc/sa1100/pwer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/sa1100/pwer.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/soc/tegra/emc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/tegra/emc.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/soc/tegra/fuse.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/tegra/fuse.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/soc/tegra/mc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/tegra/mc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/soc/tegra/pmc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/soc/tegra/pmc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/iscsi/iscsi_target_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/iscsi/iscsi_target_core.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_backend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/target_core_backend.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/target/target_core_backend_configfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/target_core_backend_configfs.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_base.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/target_core_base.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/target/target_core_configfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/target_core_configfs.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_fabric.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/target/target_core_fabric.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/define_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/define_trace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/btrfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/btrfs.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/ext4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/ext4.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/f2fs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/f2fs.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/power.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/power.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/sched.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/target.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/target.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/thermal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/thermal.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/trace/events/thermal_power_allocator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/thermal_power_allocator.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/timer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/timer.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/v4l2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/v4l2.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/writeback.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/events/writeback.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/trace/perf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/perf.h</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/syscall.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/syscall.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/trace/trace_events.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/trace/trace_events.h</a> (renamed from include/trace/ftrace.h)</td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/uapi/drm/amdgpu_drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/amdgpu_drm.h</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/drm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/drm_fourcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/drm_fourcc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/drm_mode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/drm_mode.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/i915_drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/i915_drm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/msm_drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/msm_drm.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/drm/radeon_drm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/drm/radeon_drm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/bpf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/bpf.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/can.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/can.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/can/gw.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/can/gw.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/uapi/linux/cryptouser.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/cryptouser.h</a> (renamed from include/linux/cryptouser.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/dcbnl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/dcbnl.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/dm-ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/dm-ioctl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/dvb/dmx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/dvb/dmx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/dvb/frontend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/dvb/frontend.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/elf-em.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/elf-em.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/ethtool.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/ethtool.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/fuse.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/fuse.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/uapi/linux/gsmmux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/gsmmux.h</a> (renamed from include/linux/gsmmux.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/hsi/cs-protocol.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/hsi/cs-protocol.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/hyperv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/hyperv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/i2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/i2c.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/if_link.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/if_link.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/if_packet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/if_packet.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/if_tun.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/if_tun.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/iio/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/iio/types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/in.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/in.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/inet_diag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/inet_diag.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/ip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/ip.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/ipv6_route.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/ipv6_route.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/kfd_ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/kfd_ioctl.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/kvm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/kvm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/libc-compat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/libc-compat.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/mic_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/mic_common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/nbd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/nbd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/uapi/linux/ndctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/ndctl.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netconf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netconf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter/ipset/ip_set.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter/ipset/ip_set.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter/nf_tables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter/nf_tables.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter/nfnetlink_queue.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter/nfnetlink_queue.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter/xt_socket.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter/xt_socket.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netfilter_bridge/ebtables.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netfilter_bridge/ebtables.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/netlink.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/netlink.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/nfc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/nfc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/nfs4.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/nfs4.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/nl80211.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/nl80211.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/nvme.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/nvme.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/openvswitch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/openvswitch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/perf_event.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/pkt_cls.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/pkt_cls.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/pkt_sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/pkt_sched.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/rds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/rds.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/rtnetlink.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/rtnetlink.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/uapi/linux/scif_ioctl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/scif_ioctl.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/serial_core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/serial_core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/serial_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/serial_reg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/snmp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/snmp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/sock_diag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/sock_diag.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/tcp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/tcp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/tty.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/tty.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/tty_flags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/tty_flags.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/v4l2-mediabus.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/v4l2-mediabus.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/vfio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/vfio.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/vhost.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/vhost.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/videodev2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/videodev2.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/uapi/linux/virtio_gpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/virtio_gpu.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/linux/virtio_ids.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/linux/virtio_ids.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/misc/cxl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/misc/cxl.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/rdma/ib_user_verbs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/rdma/ib_user_verbs.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/uapi/sound/asoc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/uapi/sound/asoc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/video/exynos5433_decon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/video/exynos5433_decon.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/neomagic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/video/neomagic.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/tdfx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>include/video/tdfx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>init/Kconfig</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/do_mounts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>init/do_mounts.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>init/main.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/mqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/mqueue.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/msg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/msg.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/sem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/sem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/shm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/shm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/util.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>ipc/util.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/Kconfig.locks?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/Kconfig.locks</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/audit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/audit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/auditsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/auditsc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/bpf/arraymap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/bpf/arraymap.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/bpf/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/bpf/core.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/bpf/helpers.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/bpf/helpers.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/bpf/syscall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/bpf/syscall.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/bpf/verifier.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/bpf/verifier.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cgroup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/cgroup.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/configs/xen.config?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/configs/xen.config</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/context_tracking.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/context_tracking.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/cpu.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/events/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/events/core.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/events/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/events/internal.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/events/ring_buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/events/ring_buffer.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/exit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/exit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/fork.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/fork.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/futex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/futex.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/gcov/base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/gcov/base.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/gcov/gcc_4_7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/gcov/gcc_4_7.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/chip.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/devres.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/devres.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/dummychip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/dummychip.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/generic-chip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/generic-chip.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/internals.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/internals.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/irqdesc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/irqdesc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/irqdomain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/irqdomain.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/manage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/manage.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/migration.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/migration.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/resend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/irq/resend.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/jump_label.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/jump_label.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/kexec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/kexec.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/livepatch/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/livepatch/core.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/lglock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/lglock.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/lockdep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/lockdep.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/locktorture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/locktorture.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/mcs_spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/mcs_spinlock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/qrwlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/qrwlock.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/locking/qspinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/qspinlock.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/locking/qspinlock_paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/qspinlock_paravirt.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/rtmutex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/rtmutex.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/rtmutex_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/rtmutex_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/locking/rwsem-xadd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/locking/rwsem-xadd.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/module.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/panic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/panic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/params.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/params.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/kernel/power/block_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/block_io.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/hibernate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/hibernate.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/power.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/power.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/suspend.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/swap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/power/swap.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/printk/printk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/printk/printk.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/rcutorture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/rcutorture.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/srcu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/srcu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tiny.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tiny.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tiny_plugin.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tiny_plugin.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tree.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tree.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tree_plugin.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tree_plugin.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/tree_trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/tree_trace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcu/update.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/rcu/update.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/relay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/relay.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/auto_group.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/auto_group.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/auto_group.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/auto_group.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/core.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/cputime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/cputime.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/deadline.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/deadline.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/debug.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/fair.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/fair.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/idle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/idle.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/kernel/sched/loadavg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/loadavg.c</a> (renamed from kernel/sched/proc.c)</td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/rt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/rt.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/sched.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/stats.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/stats.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/wait.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sched/wait.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/seccomp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/seccomp.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/signal.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/smpboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/smpboot.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/stop_machine.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/stop_machine.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sys.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sysctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/sysctl.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/alarmtimer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/alarmtimer.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/clockevents.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/clockevents.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/clocksource.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/clocksource.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/hrtimer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/hrtimer.c</a></td><td class='right'>699</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/ntp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/ntp.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/ntp_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/ntp_internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/posix-cpu-timers.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/posix-cpu-timers.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/posix-timers.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/posix-timers.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-broadcast-hrtimer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-broadcast-hrtimer.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-broadcast.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-broadcast.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-common.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-internal.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-oneshot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-oneshot.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-sched.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-sched.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-sched.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/tick-sched.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/time.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timeconst.bc?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timeconst.bc</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timekeeping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timekeeping.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timekeeping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timekeeping.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timer.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timer_list.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timer_list.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timer_stats.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/time/timer_stats.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/torture.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/torture.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/blktrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/blktrace.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/bpf_trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/bpf_trace.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/ring_buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/ring_buffer.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/ring_buffer_benchmark.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/ring_buffer_benchmark.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_branch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_branch.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_clock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_event_perf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_event_perf.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_events.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_events_filter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_events_filter.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_events_trigger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_events_trigger.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_export.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_export.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_functions_graph.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_functions_graph.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_kprobe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_kprobe.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_mmiotrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_mmiotrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_output.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_output.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_output.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_probe.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_probe.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_sched_wakeup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_sched_wakeup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_syscalls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_syscalls.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_uprobe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/trace/trace_uprobe.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/watchdog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/watchdog.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/workqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>kernel/workqueue.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/842/842.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/842/842.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/842/842_compress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/842/842_compress.c</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/842/842_debugfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/842/842_debugfs.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/842/842_decompress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/842/842_decompress.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/842/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/842/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/Kconfig.debug</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Kconfig.kasan?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/Kconfig.kasan</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/bitmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/bitmap.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/bug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/bug.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/cpu_rmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/cpu_rmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/cpumask.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/cpumask.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/crc-itu-t.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/crc-itu-t.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/crc-t10dif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/crc-t10dif.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/debug_info.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/debug_info.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/decompress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/decompress.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/dma-debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/dma-debug.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/dynamic_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/dynamic_debug.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/genalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/genalloc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/hexdump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/hexdump.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/kobject.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/kobject.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/list_sort.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/list_sort.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/lz4/lz4_decompress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/lz4/lz4_decompress.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/mpi/mpicoder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/mpi/mpicoder.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/mpi/mpiutil.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/mpi/mpiutil.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/radix-tree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/radix-tree.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/raid6/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/x86.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/raid6/x86.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/rbtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/rbtree.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/rhashtable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/rhashtable.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/scatterlist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/scatterlist.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/sort.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/sort.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/string.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/string.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/strnlen_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/strnlen_user.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/swiotlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/swiotlb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/test-hexdump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/test-hexdump.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/test_bpf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/test_bpf.c</a></td><td class='right'>2664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/test_rhashtable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/test_rhashtable.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/timerqueue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>lib/timerqueue.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/backing-dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/backing-dev.c</a></td><td class='right'>647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/bootmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/bootmem.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/cma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/cma.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/cma_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/cma_debug.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/fadvise.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/fadvise.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/filemap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/filemap.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/frontswap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/frontswap.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/huge_memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/huge_memory.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/hugetlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/hugetlb.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/hwpoison-inject.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/hwpoison-inject.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/internal.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/kasan/kasan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/kasan/kasan.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/kmemleak.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/kmemleak.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/madvise.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/madvise.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memblock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memblock.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memcontrol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memcontrol.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory-failure.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memory-failure.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memory.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory_hotplug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memory_hotplug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mempolicy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/mempolicy.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memtest.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/memtest.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/migrate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/migrate.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mm_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/mm_init.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/mmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mprotect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/mprotect.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mremap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/mremap.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/nobootmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/nobootmem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/nommu.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/oom_kill.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/oom_kill.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page-writeback.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/page-writeback.c</a></td><td class='right'>1231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_alloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/page_alloc.c</a></td><td class='right'>725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_io.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/page_io.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_owner.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/page_owner.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/percpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/percpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/pgtable-generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/pgtable-generic.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/readahead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/readahead.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/rmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/rmap.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/shmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/shmem.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/slab.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/slab.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/slab.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/slab.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/slab_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/slab_common.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/slub.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/slub.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/swap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/swap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/swapfile.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/swapfile.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/truncate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/truncate.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/vmscan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/vmscan.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/zbud.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/zbud.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/zpool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/zpool.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/zsmalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/zsmalloc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/zswap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>mm/zswap.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/8021q/vlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/8021q/vlan.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/9p/client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/9p/client.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/9p/trans_rdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/9p/trans_rdma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/appletalk/ddp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/appletalk/ddp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/atm/common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/atm/common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/pvc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/atm/pvc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/svc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/atm/svc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/af_ax25.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ax25/af_ax25.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_in.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ax25/ax25_in.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_ip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ax25/ax25_ip.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_out.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ax25/ax25_out.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_uid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ax25/ax25_uid.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bat_algo.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bat_algo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bat_iv_ogm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bat_iv_ogm.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bitarray.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bitarray.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bitarray.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bitarray.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bridge_loop_avoidance.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bridge_loop_avoidance.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bridge_loop_avoidance.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/bridge_loop_avoidance.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/debugfs.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/debugfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/debugfs.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/distributed-arp-table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/distributed-arp-table.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/distributed-arp-table.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/distributed-arp-table.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/fragmentation.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/fragmentation.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/fragmentation.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/fragmentation.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/gateway_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/gateway_client.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/gateway_client.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/gateway_client.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/gateway_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/gateway_common.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/gateway_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/gateway_common.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/hard-interface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/hard-interface.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/hard-interface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/hard-interface.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/hash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/hash.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/hash.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/hash.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/icmp_socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/icmp_socket.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/icmp_socket.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/icmp_socket.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/main.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/main.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/main.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/multicast.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/multicast.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/multicast.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/multicast.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/network-coding.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/network-coding.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/network-coding.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/network-coding.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/originator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/originator.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/originator.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/originator.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/packet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/packet.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/routing.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/routing.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/routing.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/routing.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/send.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/send.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/send.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/send.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/soft-interface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/soft-interface.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/soft-interface.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/soft-interface.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/sysfs.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/sysfs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/sysfs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/translation-table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/translation-table.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/translation-table.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/translation-table.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/batman-adv/types.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/6lowpan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/6lowpan.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/bnep/sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/bnep/sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/cmtp/sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/cmtp/sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_conn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hci_conn.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hci_core.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hci_event.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hci_sock.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hidp/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hidp/core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hidp/sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/hidp/sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/l2cap_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/l2cap_core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/l2cap_sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/l2cap_sock.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/mgmt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/mgmt.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/rfcomm/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/rfcomm/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/rfcomm/sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/rfcomm/sock.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/sco.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/sco.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bluetooth/smp.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_fdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_fdb.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_forward.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_forward.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_if.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_if.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_mdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_mdb.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_multicast.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_multicast.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/net/bridge/br_netfilter_hooks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_netfilter_hooks.c</a> (renamed from net/bridge/br_netfilter.c)</td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/bridge/br_netfilter_ipv6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_netfilter_ipv6.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_netlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_netlink.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_private.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_private.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_stp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp_if.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_stp_if.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_sysfs_if.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_sysfs_if.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_vlan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/br_vlan.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/netfilter/ebt_stp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/netfilter/ebt_stp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/netfilter/ebtables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/bridge/netfilter/ebtables.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/caif_socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/caif/caif_socket.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/can/af_can.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/can/af_can.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/can/bcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/can/bcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/can/gw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/can/gw.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/can/raw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/can/raw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/ceph_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/ceph_common.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/crush.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/crush/crush.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/crush_ln_table.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/crush/crush_ln_table.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/hash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/crush/hash.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/mapper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/crush/mapper.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/messenger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/messenger.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/mon_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/mon_client.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/osd_client.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/osd_client.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/osdmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/osdmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/pagevec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ceph/pagevec.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/dev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/dev.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/ethtool.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/filter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/filter.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/flow_dissector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/flow_dissector.c</a></td><td class='right'>658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/gen_estimator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/gen_estimator.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/neighbour.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/neighbour.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/net-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/net-sysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/net_namespace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/net_namespace.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/netevent.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/netevent.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/pktgen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/pktgen.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/rtnetlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/rtnetlink.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/secure_seq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/secure_seq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/skbuff.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/skbuff.c</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/sock.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/sock_diag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/sock_diag.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/stream.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/stream.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/utils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/core/utils.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/diag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/dccp/diag.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/af_decnet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/decnet/af_decnet.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dsa/dsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/dsa/dsa.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dsa/slave.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/dsa/slave.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ethernet/eth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ethernet/eth.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/6lowpan/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/6lowpan/core.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/6lowpan/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/6lowpan/tx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/nl-mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/nl-mac.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/nl-phy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/nl-phy.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/nl802154.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/nl802154.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/rdev-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/rdev-ops.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/socket.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ieee802154/trace.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/af_inet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/af_inet.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/devinet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/devinet.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/esp4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/esp4.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_frontend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/fib_frontend.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_rules.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/fib_rules.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_semantics.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/fib_semantics.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_trie.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/fib_trie.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/net/ipv4/geneve_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/geneve_core.c</a> (renamed from net/ipv4/geneve.c)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/igmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/igmp.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_connection_sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/inet_connection_sock.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_diag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/inet_diag.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_hashtables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/inet_hashtables.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_timewait_sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/inet_timewait_sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_forward.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_forward.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_fragment.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_fragment.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_output.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_sockglue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_sockglue.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_tunnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_tunnel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_tunnel_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ip_tunnel_core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ipip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/ipip.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/arp_tables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/arp_tables.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ip_tables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/ip_tables.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ipt_CLUSTERIP.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/ipt_CLUSTERIP.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ipt_SYNPROXY.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/ipt_SYNPROXY.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ipt_rpfilter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/netfilter/ipt_rpfilter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/route.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/route.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/syncookies.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/syncookies.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/sysctl_net_ipv4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/sysctl_net_ipv4.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/ipv4/tcp_cdg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_cdg.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_dctcp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_dctcp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_diag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_diag.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_fastopen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_fastopen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_input.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_ipv4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_ipv4.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_minisocks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_minisocks.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_offload.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_offload.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_output.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/tcp_timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/udp_diag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/udp_diag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/udp_tunnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv4/udp_tunnel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/addrconf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/addrconf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/af_inet6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/af_inet6.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/datagram.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/datagram.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/esp6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/esp6.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/icmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/icmp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/inet6_hashtables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/inet6_hashtables.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_fib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_fib.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_flowlabel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_flowlabel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_input.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_output.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_tunnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_tunnel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_udp_tunnel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ip6_udp_tunnel.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/ipv6/mcast_snoop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/mcast_snoop.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ndisc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/ndisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/netfilter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/netfilter/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6_tables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/netfilter/ip6_tables.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/output_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/output_core.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/raw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/raw.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/route.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/route.c</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/syncookies.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/syncookies.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/sysctl_net_ipv6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/sysctl_net_ipv6.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/tcp_ipv6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/tcp_ipv6.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/xfrm6_policy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipv6/xfrm6_policy.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipx/af_ipx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/ipx/af_ipx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/irda/af_irda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/irda/af_irda.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/irda/timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/irda/timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/iucv/af_iucv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/iucv/af_iucv.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/key/af_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/key/af_key.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/l2tp/l2tp_core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_ppp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/l2tp/l2tp_ppp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/af_llc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/llc/af_llc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/llc_conn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/llc/llc_conn.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/aes_ccm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/aes_ccm.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/aes_gcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/aes_gcm.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/aes_gmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/aes_gmac.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/agg-tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/agg-tx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/cfg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/cfg.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/chan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/chan.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/debugfs.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/debugfs_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/debugfs_key.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/debugfs_sta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/debugfs_sta.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/driver-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/driver-ops.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ethtool.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/ethtool.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ibss.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/ibss.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ieee80211_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/ieee80211_i.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/iface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/iface.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/key.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/key.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/key.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/led.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/led.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/led.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/led.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/main.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/mesh.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh_hwmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/mesh_hwmp.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh_plink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/mesh_plink.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mlme.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/mlme.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/offchannel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/offchannel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/rate.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/rate.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rc80211_minstrel_ht.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/rc80211_minstrel_ht.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/rx.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/scan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/scan.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/sta_info.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/sta_info.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/sta_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/sta_info.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/status.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/status.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/tdls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/tdls.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/trace.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/tx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/tx.c</a></td><td class='right'>549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/util.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/wpa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac80211/wpa.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/cfg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/cfg.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/driver-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/driver-ops.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/ieee802154_i.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/ieee802154_i.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/iface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/iface.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/llsec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/llsec.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/mac_cmd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/mac_cmd.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/main.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/mib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/mib.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/rx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/rx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/trace.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/trace.h</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac802154/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mac802154/util.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mpls/mpls_gso.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/mpls/mpls_gso.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/core.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_gen.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_bitmap_gen.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_ip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_bitmap_ip.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_ipmac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_bitmap_ipmac.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_port.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_bitmap_port.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_core.c</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_getport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_getport.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_gen.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_gen.h</a></td><td class='right'>736</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_ip.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipmark.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_ipmark.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_ipport.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipportip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_ipportip.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipportnet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_ipportnet.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_mac.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_mac.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_net.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_net.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netiface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_netiface.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netnet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_netnet.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_netport.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netportnet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_hash_netportnet.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_list_set.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/ip_set_list_set.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/pfxlen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipset/pfxlen.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_sync.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipvs/ip_vs_sync.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_xmit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/ipvs/ip_vs_xmit.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_h323_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_conntrack_h323_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_conntrack_proto_generic.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_internals.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_internals.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_queue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_queue.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_synproxy_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_synproxy_core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_tables_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_tables_api.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_tables_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_tables_core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/netfilter/nf_tables_netdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nf_tables_netdev.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nfnetlink.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_log.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nfnetlink_log.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_queue_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nfnetlink_queue_core.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nft_compat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/nft_compat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/x_tables.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/x_tables.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_TCPMSS.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_TCPMSS.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_TEE.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_TEE.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_addrtype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_addrtype.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_mark.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_mark.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_set.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_set.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netfilter/xt_socket.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netlink/af_netlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netlink/af_netlink.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netrom/af_netrom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netrom/af_netrom.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netrom/nr_route.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/netrom/nr_route.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/af_nfc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/af_nfc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/llcp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp_core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/llcp_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp_sock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/llcp_sock.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/core.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/hci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/hci.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/ntf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/ntf.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/rsp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/rsp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/nci/uart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nci/uart.c</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/netlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/netlink.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nfc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/nfc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/rawsock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/nfc/rawsock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/actions.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/actions.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/datapath.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/datapath.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/datapath.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/datapath.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/flow.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/flow.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/flow_netlink.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/flow_netlink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/vport-geneve.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/openvswitch/vport-geneve.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/packet/af_packet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/packet/af_packet.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/packet/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/packet/internal.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/af_phonet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/phonet/af_phonet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/pep.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/phonet/pep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/af_rds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/af_rds.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/bind.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/bind.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/ib.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib_cm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/ib_cm.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib_rdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/ib_rdma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib_recv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/ib_recv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib_send.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/ib_send.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/iw_cm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/iw_cm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/iw_send.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/iw_send.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/rdma_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/rdma_transport.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/rds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/rds.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rds/transport.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rfkill/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rfkill/core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rfkill/rfkill-gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rfkill/rfkill-gpio.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/af_rose.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rose/af_rose.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/rose_link.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rose/rose_link.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/rose_route.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rose/rose_route.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/af_rxrpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rxrpc/af_rxrpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-local.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/rxrpc/ar-local.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/act_api.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_bpf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/act_bpf.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_mirred.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/act_mirred.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_pedit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/act_pedit.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_bpf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/cls_bpf.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_flow.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/cls_flow.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/sched/cls_flower.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/cls_flower.c</a></td><td class='right'>691</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/em_ipset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/em_ipset.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_api.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_choke.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_choke.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_codel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_codel.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_fq_codel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_fq_codel.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_gred.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_gred.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_hhf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_hhf.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_ingress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_ingress.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_netem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_netem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_qfq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_qfq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_sfb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_sfb.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_sfq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sched/sch_sfq.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/ipv6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sctp/ipv6.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sctp/output.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/protocol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sctp/protocol.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sctp/socket.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/socket.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/auth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_gss/gss_krb5_crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/auth_gss/gss_krb5_crypto.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/backchannel_rqst.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/backchannel_rqst.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/sunrpc/bc_svc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/bc_svc.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/clnt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/clnt.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/debugfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/debugfs.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/svc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/svc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/fmr_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/fmr_ops.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/frwr_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/frwr_ops.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/module.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/physical_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/physical_ops.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/rpc_rdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/rpc_rdma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/svc_rdma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/svc_rdma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/svc_rdma_marshal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/svc_rdma_marshal.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/svc_rdma_recvfrom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/svc_rdma_recvfrom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/svc_rdma_sendto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/svc_rdma_sendto.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/svc_rdma_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/svc_rdma_transport.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/transport.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/verbs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/verbs.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtrdma/xprt_rdma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtrdma/xprt_rdma.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprtsock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/sunrpc/xprtsock.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/switchdev/switchdev.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/switchdev/switchdev.c</a></td><td class='right'>955</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/addr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/addr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/addr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/addr.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bcast.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/bcast.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bcast.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/bcast.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bearer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/bearer.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bearer.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/bearer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/core.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/link.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/link.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/link.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/link.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/msg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/msg.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/msg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/msg.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/name_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/name_table.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/net.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/net.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/netlink_compat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/netlink_compat.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/node.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/node.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/server.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/server.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/socket.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/socket.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/subscr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/subscr.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/subscr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/tipc/subscr.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/unix/af_unix.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/unix/af_unix.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/vmw_vsock/af_vsock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/vmw_vsock/af_vsock.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/vmw_vsock/vmci_transport.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/vmw_vsock/vmci_transport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/chan.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/chan.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/nl80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/nl80211.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/reg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/reg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/sme.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/sme.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/sysfs.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/wireless/util.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/x25/af_x25.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/x25/af_x25.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_algo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_algo.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_input.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_input.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_output.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_policy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_policy.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_state.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_state.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>net/xfrm/xfrm_user.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/bpf_helpers.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/bpf_helpers.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/bpf_load.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/bpf_load.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/lathist_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/lathist_kern.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/lathist_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/lathist_user.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/sockex3_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/sockex3_kern.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/sockex3_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/sockex3_user.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/tcbpf1_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/tcbpf1_kern.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/test_verifier.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/test_verifier.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/tracex2_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/tracex2_kern.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/samples/bpf/tracex2_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/tracex2_user.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/tracex5_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/tracex5_kern.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/bpf/tracex5_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/bpf/tracex5_user.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/README.rst?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/README.rst</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/functions.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/functions.sh</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/parameters.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/parameters.sh</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/drm-misc/diff/samples/pktgen/pktgen.conf-1-1?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen.conf-1-1</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/drm-misc/diff/samples/pktgen/pktgen.conf-2-1?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen.conf-2-1</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/drm-misc/diff/samples/pktgen/pktgen.conf-2-2?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen.conf-2-2</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/pktgen_bench_xmit_mode_netif_receive.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen_bench_xmit_mode_netif_receive.sh</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/pktgen_sample01_simple.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen_sample01_simple.sh</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/pktgen_sample02_multiqueue.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen_sample02_multiqueue.sh</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/samples/pktgen/pktgen_sample03_burst_single_flow.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>samples/pktgen/pktgen_sample03_burst_single_flow.sh</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/checkkconfigsymbols.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/checkkconfigsymbols.py</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/checkpatch.pl?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/checkpatch.pl</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/checksyscalls.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/checksyscalls.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/checks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/checks.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/data.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc-lexer.l?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc-lexer.l</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc-lexer.lex.c_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc-lexer.lex.c_shipped</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc-parser.tab.c_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc-parser.tab.c_shipped</a></td><td class='right'>1773</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc-parser.tab.h_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc-parser.tab.h_shipped</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc-parser.y?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc-parser.y</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/dtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/dtc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/flattree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/flattree.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/fstree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/fstree.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/Makefile.libfdt?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/Makefile.libfdt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt_empty_tree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt_empty_tree.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt_ro.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt_ro.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt_rw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt_rw.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt_sw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt_sw.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/fdt_wip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/fdt_wip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/libfdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/libfdt.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/libfdt_env.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/libfdt/libfdt_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/libfdt/libfdt_internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/livetree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/livetree.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/srcpos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/srcpos.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/srcpos.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/srcpos.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/treesource.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/treesource.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/update-dtc-source.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/update-dtc-source.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/util.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/util.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/dtc/version_gen.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/dtc/version_gen.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/gdb/linux/dmesg.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/linux/dmesg.py</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/gdb/linux/lists.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/linux/lists.py</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/gdb/linux/symbols.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/linux/symbols.py</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/gdb/linux/tasks.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/linux/tasks.py</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/gdb/linux/utils.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/linux/utils.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/gdb/vmlinux-gdb.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/gdb/vmlinux-gdb.py</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/get_maintainer.pl?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/get_maintainer.pl</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/expr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/expr.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/expr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/expr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/symbol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/symbol.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/zconf.l?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/zconf.l</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/zconf.lex.c_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/zconf.lex.c_shipped</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/zconf.tab.c_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/zconf.tab.c_shipped</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/zconf.y?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/kconfig/zconf.y</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/link-vmlinux.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/link-vmlinux.sh</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/mksysmap?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/mksysmap</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/mod/devicetable-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/mod/devicetable-offsets.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/mod/file2alias.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/mod/file2alias.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/mod/modpost.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/mod/modpost.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/sortextable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/sortextable.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/tags.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>scripts/tags.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/apparmor/domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/apparmor/domain.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/apparmor/lsm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/apparmor/lsm.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/security/capability.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/capability.c</a></td><td class='right'>1158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/commoncap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/commoncap.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/inode.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/digsig.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/digsig.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/evm/evm_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/evm/evm_main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/iint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/iint.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_api.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_api.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_appraise.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_appraise.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_crypto.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_crypto.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_fs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_fs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_init.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_policy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_policy.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_template_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_template_lib.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/ima/ima_template_lib.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/ima/ima_template_lib.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/integrity/integrity.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/integrity/integrity.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/lsm_audit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/lsm_audit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/security.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/security.c</a></td><td class='right'>960</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/avc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/avc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/hooks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/hooks.c</a></td><td class='right'>588</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/include/avc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/include/avc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/include/classmap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/include/classmap.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/include/security.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/include/security.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/selinuxfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/selinuxfs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/ss/ebitmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/ss/ebitmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/xfrm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/selinux/xfrm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/smack/smack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/smack/smack.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/smack/smack_access.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/smack/smack_access.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/smack/smack_lsm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/smack/smack_lsm.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/smack/smackfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/smack/smackfs.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/tomoyo/tomoyo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/tomoyo/tomoyo.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/yama/yama_lsm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>security/yama/yama_lsm.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/hrtimer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/core/hrtimer.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/memalloc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/core/memalloc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/pcm_native.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/core/pcm_native.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/drivers/pcsp/pcsp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/drivers/pcsp/pcsp.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/fireworks/fireworks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/firewire/fireworks/fireworks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/fireworks/fireworks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/firewire/fireworks/fireworks.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/fireworks/fireworks_stream.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/firewire/fireworks/fireworks_stream.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/hda/hdac_i915.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/hda/hdac_i915.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/asihpi/hpioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/asihpi/hpioctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/hda/hda_intel.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_cirrus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/hda/patch_cirrus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_hdmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/hda/patch_hdmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_realtek.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/hda/patch_realtek.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_sigmatel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/pci/hda/patch_sigmatel.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/pcm1681.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/codecs/pcm1681.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/rt5645.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/codecs/rt5645.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/sgtl5000.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/codecs/sgtl5000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ssm4567.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/codecs/ssm4567.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/fsl_ssi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/fsl/fsl_ssi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/intel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/intel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/intel/atom/sst/sst_drv_interface.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/intel/atom/sst/sst_drv_interface.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/intel/boards/cht_bsw_max98090_ti.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/intel/boards/cht_bsw_max98090_ti.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mediatek/mt8173-max98090.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/mediatek/mt8173-max98090.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mediatek/mt8173-rt5650-rt5676.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/mediatek/mt8173-rt5650-rt5676.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mediatek/mtk-afe-pcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/mediatek/mtk-afe-pcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-hdmi-audio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/omap/omap-hdmi-audio.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/sh/migor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/sh/migor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/soc-core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-dapm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/soc-dapm.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-topology.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/soc-topology.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/zte/zx296702-i2s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/zte/zx296702-i2s.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/zte/zx296702-spdif.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/soc/zte/zx296702-spdif.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/sparc/amd7930.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/sparc/amd7930.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/line6/pcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>sound/usb/line6/pcm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/Makefile</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/alpha/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/alpha/include/asm/barrier.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/arm/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/arm/include/asm/barrier.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/arm64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/arm64/include/asm/barrier.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/ia64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/ia64/include/asm/barrier.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/mips/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/mips/include/asm/barrier.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/powerpc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/powerpc/include/asm/barrier.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/s390/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/s390/include/asm/barrier.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/sh/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/sh/include/asm/barrier.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/sparc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/sparc/include/asm/barrier.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/sparc/include/asm/barrier_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/sparc/include/asm/barrier_32.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/sparc/include/asm/barrier_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/sparc/include/asm/barrier_64.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/tile/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/tile/include/asm/barrier.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/x86/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/x86/include/asm/atomic.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/x86/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/x86/include/asm/barrier.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/x86/include/asm/rmwcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/x86/include/asm/rmwcc.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/arch/xtensa/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/arch/xtensa/include/asm/barrier.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/build/Makefile.build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/build/Makefile.build</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/build/Makefile.feature?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/build/Makefile.feature</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/build/tests/ex/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/build/tests/ex/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/build/tests/ex/empty2/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/build/tests/ex/empty2/README</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/hv/hv_fcopy_daemon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/hv/hv_fcopy_daemon.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/hv/hv_kvp_daemon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/hv/hv_kvp_daemon.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/hv/hv_vss_daemon.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/hv/hv_vss_daemon.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/generic_buffer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/generic_buffer.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/iio_event_monitor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/iio_event_monitor.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/iio_utils.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/iio_utils.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/iio_utils.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/iio_utils.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/iio/lsiio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/iio/lsiio.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/asm-generic/atomic-gcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/asm-generic/atomic-gcc.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/asm-generic/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/asm-generic/barrier.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/asm/atomic.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/asm/barrier.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/linux/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/atomic.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/include/linux/compiler.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/compiler.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/tools/include/linux/export.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/export.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/include/linux/kernel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/kernel.h</a> (renamed from tools/perf/util/include/linux/kernel.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/include/linux/list.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/list.h</a> (renamed from tools/perf/util/include/linux/list.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/linux/poison.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/poison.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/linux/rbtree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/rbtree.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/include/linux/rbtree_augmented.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/rbtree_augmented.h</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/include/linux/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/include/linux/types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/laptop/freefall/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/laptop/freefall/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/laptop/freefall/freefall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/laptop/freefall/freefall.c</a> (renamed from Documentation/laptops/freefall.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/api/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/api/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/hweight.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/hweight.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/rbtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/rbtree.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/traceevent/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/traceevent/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/traceevent/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/traceevent/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/traceevent/event-parse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/traceevent/event-parse.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/traceevent/event-parse.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/traceevent/event-parse.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/lib/traceevent/plugin_cfg80211.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/lib/traceevent/plugin_cfg80211.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/Documentation/callchain-overhead-calculation.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/callchain-overhead-calculation.txt</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-bench.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-bench.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-inject.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-inject.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-kmem.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-kmem.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-kvm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-kvm.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-probe.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-probe.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-record.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-record.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-report.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-report.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-script.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-script.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-stat.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-stat.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-top.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-top.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-trace.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Documentation/perf-trace.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/MANIFEST?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/MANIFEST</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Makefile.perf?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/Makefile.perf</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/arch/arm64/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/arm64/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/arch/arm64/include/perf_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/arm64/include/perf_regs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/arch/arm64/tests/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/arm64/tests/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/arch/arm64/tests/dwarf-unwind.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/arm64/tests/dwarf-unwind.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/arch/arm64/tests/regs_load.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/arm64/tests/regs_load.S</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/arch/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/arch/powerpc/util/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/powerpc/util/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/arch/powerpc/util/sym-handling.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/arch/powerpc/util/sym-handling.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/bench/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/bench/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/bench/bench.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/bench/bench.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/bench/futex-wake-parallel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/bench/futex-wake-parallel.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/bench/futex-wake.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/bench/futex-wake.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/bench/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/bench/numa.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-annotate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-annotate.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-bench.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-bench.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-buildid-list.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-buildid-list.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-diff.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-diff.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-inject.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-inject.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-kmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-kmem.c</a></td><td class='right'>990</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-kvm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-kvm.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-lock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-lock.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-mem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-probe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-probe.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-record.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-record.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-report.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-report.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-sched.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-sched.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-script.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-script.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-stat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-stat.c</a></td><td class='right'>884</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-timechart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-timechart.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-top.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-top.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/builtin-trace.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/config/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/config/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/config/utilities.mak?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/config/utilities.mak</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/perf-sys.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/perf-sys.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/perf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/perf.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/Build</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/builtin-test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/builtin-test.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/code-reading.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/code-reading.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/dso-data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/dso-data.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/dwarf-unwind.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/dwarf-unwind.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/evsel-roundtrip-name.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/evsel-roundtrip-name.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/hists_common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/hists_common.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/hists_cumulate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/hists_cumulate.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/hists_filter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/hists_filter.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/hists_link.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/hists_link.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/hists_output.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/hists_output.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/keep-tracking.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/keep-tracking.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/kmod-path.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/kmod-path.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/make?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/make</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/mmap-basic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/mmap-basic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/mmap-thread-lookup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/mmap-thread-lookup.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/tests/openat-syscall-all-cpus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/openat-syscall-all-cpus.c</a> (renamed from tools/perf/tests/open-syscall-all-cpus.c)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/tests/openat-syscall-tp-fields.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/openat-syscall-tp-fields.c</a> (renamed from tools/perf/tests/open-syscall-tp-fields.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/tests/openat-syscall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/openat-syscall.c</a> (renamed from tools/perf/tests/open-syscall.c)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/parse-events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/parse-events.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/perf-time-to-tsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/perf-time-to-tsc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/switch-tracking.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/switch-tracking.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/tests.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/tests.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/tests/thread-map.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/thread-map.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/thread-mg-share.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/thread-mg-share.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/tests/vmlinux-kallsyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/tests/vmlinux-kallsyms.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/ui/browsers/annotate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/ui/browsers/annotate.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/ui/browsers/hists.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/ui/browsers/hists.c</a></td><td class='right'>663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/ui/tui/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/ui/tui/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/Build?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/Build</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/annotate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/annotate.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/annotate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/annotate.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/auxtrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/auxtrace.c</a></td><td class='right'>1359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/auxtrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/auxtrace.h</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/build-id.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/build-id.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cache.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/callchain.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/callchain.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cgroup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cgroup.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cgroup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cgroup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cloexec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cloexec.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/comm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/comm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cpumap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cpumap.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cpumap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/cpumap.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/data-convert-bt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/data-convert-bt.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/db-export.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/db-export.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/dso.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/dso.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/dso.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/dso.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/dwarf-aux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/dwarf-aux.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/dwarf-aux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/dwarf-aux.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/environment.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/environment.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/event.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/event.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evlist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/evlist.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evlist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/evlist.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evsel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/evsel.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evsel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/evsel.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/header.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/header.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/header.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/header.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/hist.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/hist.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/hist.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/hist.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/tools/perf/util/include/linux/poison.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/include/linux/poison.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/tools/perf/util/include/linux/rbtree.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/include/linux/rbtree.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/tools/perf/util/include/linux/rbtree_augmented.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/include/linux/rbtree_augmented.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/machine.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/machine.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/machine.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/machine.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/map.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/map.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/map.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/map.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pager.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/pager.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/parse-branch-options.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-branch-options.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/parse-branch-options.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-branch-options.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-events.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-events.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.l?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-events.l</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.y?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-events.y</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-options.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/parse-options.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/pmu.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/pmu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/probe-event.c</a></td><td class='right'>666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/probe-event.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-finder.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/probe-finder.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-finder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/probe-finder.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pstack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/pstack.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pstack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/pstack.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/python-ext-sources?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/python-ext-sources</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/python.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/python.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/record.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/record.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/scripting-engines/trace-event-perl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/scripting-engines/trace-event-perl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/scripting-engines/trace-event-python.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/scripting-engines/trace-event-python.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/session.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/session.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/session.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/session.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/sort.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/sort.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/sort.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/sort.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/stat-shadow.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/stat-shadow.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/stat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/stat.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/stat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/stat.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/strfilter.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/strfilter.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/strfilter.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/strfilter.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/svghelper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/svghelper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/symbol-elf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/symbol-elf.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/symbol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/symbol.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/symbol.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/symbol.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread-stack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread-stack.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread-stack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread-stack.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread_map.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread_map.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread_map.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/thread_map.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/tool.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/tool.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/trace-event-parse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/trace-event-parse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/unwind-libunwind.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/unwind-libunwind.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/util.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/util.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/util.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/util.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/vdso.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/vdso.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/vdso.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/vdso.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/xyarray.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/xyarray.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/xyarray.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/perf/util/xyarray.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/common/getopt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/common/getopt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/man/acpidump.8?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/man/acpidump.8</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/os_specific/service_layers/oslinuxtbl.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/os_specific/service_layers/osunixmap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/os_specific/service_layers/osunixmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/tools/acpidump/acpidump.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/tools/acpidump/acpidump.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/tools/acpidump/apdump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/tools/acpidump/apdump.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/tools/acpidump/apfiles.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/tools/acpidump/apfiles.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/acpi/tools/acpidump/apmain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/acpi/tools/acpidump/apmain.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/cpupower/utils/idle_monitor/mperf_monitor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/cpupower/utils/idle_monitor/mperf_monitor.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/x86/turbostat/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/power/x86/turbostat/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/Kbuild</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/config_check.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/config_check.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/test/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/test/Kbuild</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/test/iomap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/test/iomap.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/test/nfit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/test/nfit.c</a></td><td class='right'>1162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/nvdimm/test/nfit_test.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/nvdimm/test/nfit_test.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/exec/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/exec/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/ftrace/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/ftrace/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/README</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/.gitignore</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_requeue_pi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_requeue_pi.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_requeue_pi_mismatched_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_requeue_pi_mismatched_ops.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_requeue_pi_signal_restart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_requeue_pi_signal_restart.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_wait_private_mapped_file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_wait_private_mapped_file.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_wait_timeout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_wait_timeout.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_wait_uninitialized_heap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_wait_uninitialized_heap.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/futex_wait_wouldblock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/futex_wait_wouldblock.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/functional/run.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/functional/run.sh</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/include/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/include/atomic.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/include/futextest.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/include/futextest.h</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/include/logging.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/include/logging.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/futex/run.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/futex/run.sh</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/kselftest.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/kselftest.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/lib.mk?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/lib.mk</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/mount/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/mount/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/net/psock_fanout.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/net/psock_fanout.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/.gitignore</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_default_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_default_test.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/dscr/dscr_user_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/dscr/dscr_user_test.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/switch_endian/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/switch_endian/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/tm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/tm/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/tm/tm-syscall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/tm/tm-syscall.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/powerpc/vphn/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/powerpc/vphn/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/bin/configinit.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/bin/configinit.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/bin/kvm-recheck.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/bin/kvm-recheck.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/bin/kvm.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/bin/kvm.sh</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/CFcommon?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/CFcommon</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/SRCU-N?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/SRCU-N</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/SRCU-P?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/SRCU-P</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/SRCU-P.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/SRCU-P.boot</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TASKS01?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TASKS01</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TASKS02?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TASKS02</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TASKS03?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TASKS03</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TINY02?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TINY02</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TINY02.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TINY02.boot</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE01?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE01</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE02?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE02</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE02-T?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE02-T</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE03?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE03</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE03.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE03.boot</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE04?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE04</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE05?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE05</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE06?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE06</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE06.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE06.boot</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE07?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE07</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE08?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE08</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE08-T?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE08-T</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE08-T.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE08-T.boot</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE08.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE08.boot</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE09?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/configs/rcu/TREE09</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/rcutorture/doc/TREE_RCU-kconfig.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/rcutorture/doc/TREE_RCU-kconfig.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/seccomp/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/seccomp/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/seccomp/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/seccomp/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/seccomp/seccomp_bpf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/seccomp/seccomp_bpf.c</a></td><td class='right'>2109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/seccomp/test_harness.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/seccomp/test_harness.h</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/timers/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/timers/.gitignore</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/timers/alarmtimer-suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/timers/alarmtimer-suspend.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/timers/leap-a-day.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/timers/leap-a-day.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/vm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/vm/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/vm/compaction_test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/vm/compaction_test.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/vm/run_vmtests?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/vm/run_vmtests</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/x86/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/x86/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/x86/sysret_ss_attrs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/x86/sysret_ss_attrs.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/x86/thunks.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/x86/thunks.S</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/x86/trivial_64bit_program.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>tools/testing/selftests/x86/trivial_64bit_program.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/arm/vgic-v3-emul.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/arm/vgic-v3-emul.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/arm/vgic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/arm/vgic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/async_pf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/async_pf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/coalesced_mmio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/coalesced_mmio.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/irqchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/irqchip.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/kvm_main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/kvm_main.c</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/vfio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>virt/kvm/vfio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>10021 files changed, 1014347 insertions, 231325 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/.mailmap b/.mailmap<br/>index 6287004040e7..b4091b7a78fe 100644<br/>--- a/<a href='/drm-misc/tree/.mailmap?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>.mailmap</a><br/>+++ b/<a href='/drm-misc/tree/.mailmap?id=527c465a3c8716d93201ae34b7fc52679610596d'>.mailmap</a></div><div class='hunk'>@@ -84,6 +84,7 @@ Mayuresh Janorkar &lt;mayur@ti.com&gt;</div><div class='ctx'> Michael Buesch &lt;m@bues.ch&gt;</div><div class='ctx'> Michel Dänzer &lt;michel@tungstengraphics.com&gt;</div><div class='ctx'> Mitesh shah &lt;mshah@teja.com&gt;</div><div class='add'>+Mohit Kumar &lt;mohit.kumar@st.com&gt; &lt;mohit.kumar.dhaka@gmail.com&gt;</div><div class='ctx'> Morten Welinder &lt;terra@gnome.org&gt;</div><div class='ctx'> Morten Welinder &lt;welinder@anemone.rentec.com&gt;</div><div class='ctx'> Morten Welinder &lt;welinder@darter.rentec.com&gt;</div><div class='hunk'>@@ -95,10 +96,12 @@ Patrick Mochel &lt;mochel@digitalimplant.org&gt;</div><div class='ctx'> Peter A Jonsson &lt;pj@ludd.ltu.se&gt;</div><div class='ctx'> Peter Oruba &lt;peter@oruba.de&gt;</div><div class='ctx'> Peter Oruba &lt;peter.oruba@amd.com&gt;</div><div class='add'>+Pratyush Anand &lt;pratyush.anand@gmail.com&gt; &lt;pratyush.anand@st.com&gt;</div><div class='ctx'> Praveen BP &lt;praveenbp@ti.com&gt;</div><div class='ctx'> Rajesh Shah &lt;rajesh.shah@intel.com&gt;</div><div class='ctx'> Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='ctx'> Ralf Wildenhues &lt;Ralf.Wildenhues@gmx.de&gt;</div><div class='add'>+Randy Dunlap &lt;rdunlap@infradead.org&gt; &lt;rdunlap@xenotime.net&gt;</div><div class='ctx'> Rémi Denis-Courmont &lt;rdenis@simphalempin.com&gt;</div><div class='ctx'> Ricardo Ribalda Delgado &lt;ricardo.ribalda@gmail.com&gt;</div><div class='ctx'> Rudolf Marek &lt;R.Marek@sh.cvut.cz&gt;</div><div class='hunk'>@@ -113,6 +116,7 @@ Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt; &lt;shiraz.hashim@st.com&gt;</div><div class='ctx'> Simon Kelley &lt;simon@thekelleys.org.uk&gt;</div><div class='ctx'> Stéphane Witzmann &lt;stephane.witzmann@ubpmes.univ-bpclermont.fr&gt;</div><div class='ctx'> Stephen Hemminger &lt;shemminger@osdl.org&gt;</div><div class='add'>+Sudeep Holla &lt;sudeep.holla@arm.com&gt; Sudeep KarkadaNagesha &lt;sudeep.karkadanagesha@arm.com&gt;</div><div class='ctx'> Sumit Semwal &lt;sumit.semwal@ti.com&gt;</div><div class='ctx'> Tejun Heo &lt;htejun@gmail.com&gt;</div><div class='ctx'> Thomas Graf &lt;tgraf@suug.ch&gt;</div><div class='hunk'>@@ -122,7 +126,9 @@ Uwe Kleine-König &lt;ukleinek@informatik.uni-freiburg.de&gt;</div><div class='ctx'> Uwe Kleine-König &lt;ukl@pengutronix.de&gt;</div><div class='ctx'> Uwe Kleine-König &lt;Uwe.Kleine-Koenig@digi.com&gt;</div><div class='ctx'> Valdis Kletnieks &lt;Valdis.Kletnieks@vt.edu&gt;</div><div class='del'>-Viresh Kumar &lt;viresh.linux@gmail.com&gt; &lt;viresh.kumar@st.com&gt;</div><div class='add'>+Viresh Kumar &lt;vireshk@kernel.org&gt; &lt;viresh.kumar@st.com&gt;</div><div class='add'>+Viresh Kumar &lt;vireshk@kernel.org&gt; &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+Viresh Kumar &lt;vireshk@kernel.org&gt; &lt;viresh.kumar2@arm.com&gt;</div><div class='ctx'> Takashi YOSHII &lt;takashi.yoshii.zj@renesas.com&gt;</div><div class='ctx'> Yusuke Goda &lt;goda.yusuke@renesas.com&gt;</div><div class='ctx'> Gustavo Padovan &lt;gustavo@las.ic.unicamp.br&gt;</div><div class='head'>diff --git a/CREDITS b/CREDITS<br/>index ec7e6c7fdd1b..1d616640bbf6 100644<br/>--- a/<a href='/drm-misc/tree/CREDITS?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>CREDITS</a><br/>+++ b/<a href='/drm-misc/tree/CREDITS?id=527c465a3c8716d93201ae34b7fc52679610596d'>CREDITS</a></div><div class='hunk'>@@ -2740,6 +2740,10 @@ S: C/ Mieses 20, 9-B</div><div class='ctx'> S: Valladolid 47009</div><div class='ctx'> S: Spain</div><div class='ctx'> </div><div class='add'>+N: Jens Osterkamp</div><div class='add'>+E: jens@de.ibm.com</div><div class='add'>+D: Maintainer of Spidernet network driver for Cell</div><div class='add'>+</div><div class='ctx'> N: Gadi Oxman</div><div class='ctx'> E: gadio@netvision.net.il</div><div class='ctx'> D: Original author and maintainer of IDE/ATAPI floppy/tape drivers</div><div class='hunk'>@@ -3219,11 +3223,6 @@ N: Dipankar Sarma</div><div class='ctx'> E: dipankar@in.ibm.com</div><div class='ctx'> D: RCU</div><div class='ctx'> </div><div class='del'>-N: Yoshinori Sato</div><div class='del'>-E: ysato@users.sourceforge.jp</div><div class='del'>-D: uClinux for Renesas H8/300 (H8300)</div><div class='del'>-D: http://uclinux-h8.sourceforge.jp/</div><div class='del'>-</div><div class='ctx'> N: Hannu Savolainen</div><div class='ctx'> E: hannu@opensound.com</div><div class='ctx'> D: Maintainer of the sound drivers until 2.1.x days.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-bus-w1 b/Documentation/ABI/stable/sysfs-bus-w1<br/>new file mode 100644<br/>index 000000000000..140d85b4ae92<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/stable/sysfs-bus-w1?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/stable/sysfs-bus-w1</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+What:		/sys/bus/w1/devices/.../w1_master_timeout_us</div><div class='add'>+Date:		April 2015</div><div class='add'>+Contact:	Dmitry Khromov &lt;dk@icelogic.net&gt;</div><div class='add'>+Description:	Bus scanning interval, microseconds component.</div><div class='add'>+		Some of 1-Wire devices commonly associated with physical access</div><div class='add'>+		control systems are attached/generate presence for as short as</div><div class='add'>+		100 ms - hence the tens-to-hundreds milliseconds scan intervals</div><div class='add'>+		are required.</div><div class='add'>+		see Documentation/w1/w1.generic for detailed information.</div><div class='add'>+Users:		any user space application which wants to know bus scanning</div><div class='add'>+		interval</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-driver-w1_ds28ea00 b/Documentation/ABI/stable/sysfs-driver-w1_ds28ea00<br/>new file mode 100644<br/>index 000000000000..e928def14f28<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/stable/sysfs-driver-w1_ds28ea00?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/stable/sysfs-driver-w1_ds28ea00</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+What:		/sys/bus/w1/devices/.../w1_seq</div><div class='add'>+Date:		Apr 2015</div><div class='add'>+Contact:	Matt Campbell &lt;mattrcampbell@gmail.com&gt;</div><div class='add'>+Description:	Support for the DS28EA00 chain sequence function</div><div class='add'>+		see Documentation/w1/slaves/w1_therm for detailed information</div><div class='add'>+Users:		any user space application which wants to communicate with DS28EA00</div><div class='head'>diff --git a/Documentation/ABI/testing/configfs-spear-pcie-gadget b/Documentation/ABI/testing/configfs-spear-pcie-gadget<br/>index 875988146a63..840c324ef34d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/configfs-spear-pcie-gadget?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/configfs-spear-pcie-gadget</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/configfs-spear-pcie-gadget?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/configfs-spear-pcie-gadget</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> What:		/config/pcie-gadget</div><div class='ctx'> Date:		Feb 2011</div><div class='ctx'> KernelVersion:	2.6.37</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> </div><div class='ctx'> 	Interface is used to configure selected dual mode PCIe controller</div><div class='head'>diff --git a/Documentation/ABI/testing/dev-kmsg b/Documentation/ABI/testing/dev-kmsg<br/>index bb820be48179..fff817efa508 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/dev-kmsg?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/dev-kmsg</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/dev-kmsg?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/dev-kmsg</a></div><div class='hunk'>@@ -98,4 +98,13 @@ Description:	The /dev/kmsg character device node provides userspace access</div><div class='ctx'> 		logic is used internally when messages are printed to the</div><div class='ctx'> 		console, /proc/kmsg or the syslog() syscall.</div><div class='ctx'> </div><div class='add'>+		By default, kernel tries to avoid fragments by concatenating</div><div class='add'>+		when it can and fragments are rare; however, when extended</div><div class='add'>+		console support is enabled, the in-kernel concatenation is</div><div class='add'>+		disabled and /dev/kmsg output will contain more fragments. If</div><div class='add'>+		the log consumer performs concatenation, the end result</div><div class='add'>+		should be the same. In the future, the in-kernel concatenation</div><div class='add'>+		may be removed entirely and /dev/kmsg users are recommended to</div><div class='add'>+		implement fragment handling.</div><div class='add'>+</div><div class='ctx'> Users:		dmesg(1), userspace kernel log consumers</div><div class='head'>diff --git a/Documentation/ABI/testing/ima_policy b/Documentation/ABI/testing/ima_policy<br/>index d0d0c578324c..0a378a88217a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/ima_policy?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/ima_policy</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/ima_policy?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/ima_policy</a></div><div class='hunk'>@@ -20,17 +20,19 @@ Description:</div><div class='ctx'> 		action: measure | dont_measure | appraise | dont_appraise | audit</div><div class='ctx'> 		condition:= base | lsm  [option]</div><div class='ctx'> 			base:	[[func=] [mask=] [fsmagic=] [fsuuid=] [uid=]</div><div class='del'>-				 [fowner]]</div><div class='add'>+				[euid=] [fowner=]]</div><div class='ctx'> 			lsm:	[[subj_user=] [subj_role=] [subj_type=]</div><div class='ctx'> 				 [obj_user=] [obj_role=] [obj_type=]]</div><div class='ctx'> 			option:	[[appraise_type=]] [permit_directio]</div><div class='ctx'> </div><div class='ctx'> 		base: 	func:= [BPRM_CHECK][MMAP_CHECK][FILE_CHECK][MODULE_CHECK]</div><div class='ctx'> 				[FIRMWARE_CHECK]</div><div class='del'>-			mask:= [MAY_READ] [MAY_WRITE] [MAY_APPEND] [MAY_EXEC]</div><div class='add'>+			mask:= [[^]MAY_READ] [[^]MAY_WRITE] [[^]MAY_APPEND]</div><div class='add'>+			       [[^]MAY_EXEC]</div><div class='ctx'> 			fsmagic:= hex value</div><div class='ctx'> 			fsuuid:= file system UUID (e.g 8bcbe394-4f13-4144-be8e-5aa9ea2ce2f6)</div><div class='ctx'> 			uid:= decimal value</div><div class='add'>+			euid:= decimal value</div><div class='ctx'> 			fowner:=decimal value</div><div class='ctx'> 		lsm:  	are LSM specific</div><div class='ctx'> 		option:	appraise_type:= [imasig]</div><div class='hunk'>@@ -49,11 +51,25 @@ Description:</div><div class='ctx'> 			dont_measure fsmagic=0x01021994</div><div class='ctx'> 			dont_appraise fsmagic=0x01021994</div><div class='ctx'> 			# RAMFS_MAGIC</div><div class='del'>-			dont_measure fsmagic=0x858458f6</div><div class='ctx'> 			dont_appraise fsmagic=0x858458f6</div><div class='add'>+			# DEVPTS_SUPER_MAGIC</div><div class='add'>+			dont_measure fsmagic=0x1cd1</div><div class='add'>+			dont_appraise fsmagic=0x1cd1</div><div class='add'>+			# BINFMTFS_MAGIC</div><div class='add'>+			dont_measure fsmagic=0x42494e4d</div><div class='add'>+			dont_appraise fsmagic=0x42494e4d</div><div class='ctx'> 			# SECURITYFS_MAGIC</div><div class='ctx'> 			dont_measure fsmagic=0x73636673</div><div class='ctx'> 			dont_appraise fsmagic=0x73636673</div><div class='add'>+			# SELINUX_MAGIC</div><div class='add'>+			dont_measure fsmagic=0xf97cff8c</div><div class='add'>+			dont_appraise fsmagic=0xf97cff8c</div><div class='add'>+			# CGROUP_SUPER_MAGIC</div><div class='add'>+			dont_measure fsmagic=0x27e0eb</div><div class='add'>+			dont_appraise fsmagic=0x27e0eb</div><div class='add'>+			# NSFS_MAGIC</div><div class='add'>+			dont_measure fsmagic=0x6e736673</div><div class='add'>+			dont_appraise fsmagic=0x6e736673</div><div class='ctx'> </div><div class='ctx'> 			measure func=BPRM_CHECK</div><div class='ctx'> 			measure func=FILE_MMAP mask=MAY_EXEC</div><div class='hunk'>@@ -70,10 +86,6 @@ Description:</div><div class='ctx'> 		Examples of LSM specific definitions:</div><div class='ctx'> </div><div class='ctx'> 		SELinux:</div><div class='del'>-			# SELINUX_MAGIC</div><div class='del'>-			dont_measure fsmagic=0xf97cff8c</div><div class='del'>-			dont_appraise fsmagic=0xf97cff8c</div><div class='del'>-</div><div class='ctx'> 			dont_measure obj_type=var_log_t</div><div class='ctx'> 			dont_appraise obj_type=var_log_t</div><div class='ctx'> 			dont_measure obj_type=auditd_log_t</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-ata b/Documentation/ABI/testing/sysfs-ata<br/>index 0a932155cbba..aa4296498859 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-ata?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-ata</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-ata?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-ata</a></div><div class='hunk'>@@ -90,6 +90,17 @@ gscr</div><div class='ctx'> 	130:	SATA_PMP_GSCR_SII_GPIO</div><div class='ctx'> 	Only valid if the device is a PM.</div><div class='ctx'> </div><div class='add'>+trim</div><div class='add'>+</div><div class='add'>+	Shows the DSM TRIM mode currently used by the device. Valid</div><div class='add'>+	values are:</div><div class='add'>+	unsupported:		Drive does not support DSM TRIM</div><div class='add'>+	unqueued:		Drive supports unqueued DSM TRIM only</div><div class='add'>+	queued:			Drive supports queued DSM TRIM</div><div class='add'>+	forced_unqueued:	Drive's queued DSM support is known to be</div><div class='add'>+				buggy and only unqueued TRIM commands</div><div class='add'>+				are sent</div><div class='add'>+</div><div class='ctx'> spdn_cnt</div><div class='ctx'> </div><div class='ctx'> 	Number of time libata decided to lower the speed of link due to errors.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x<br/>new file mode 100644<br/>index 000000000000..2fe2e3dae487<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x</a></div><div class='hunk'>@@ -0,0 +1,450 @@</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/enable_source</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:  4.01</div><div class='add'>+Contact:        Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Enable/disable tracing on this specific trace entiry.</div><div class='add'>+		Enabling a source implies the source has been configured</div><div class='add'>+		properly and a sink has been identidifed for it.  The path</div><div class='add'>+		of coresight components linking the source to the sink is</div><div class='add'>+		configured and managed automatically by the coresight framework.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cpu</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) The CPU this tracing entity is associated with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_pe_cmp</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of PE comparator inputs that are</div><div class='add'>+		available for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_addr_cmp</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of address comparator pairs that are</div><div class='add'>+		available for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_cntr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of counters that are available for</div><div class='add'>+		tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_ext_inp</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates how many external inputs are implemented.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/numcidc</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of Context ID comparators that are</div><div class='add'>+		available for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/numvmidc</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of VMID comparators that are available</div><div class='add'>+		for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nrseqstate</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of sequencer states that are</div><div class='add'>+		implemented.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_resource</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of resource selection pairs that are</div><div class='add'>+		available for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/nr_ss_cmp</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Indicates the number of single-shot comparator controls that</div><div class='add'>+		are available for tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/reset</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(W) Cancels all configuration on a trace unit and set it back</div><div class='add'>+		to its boot configuration.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mode</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls various modes supported by this ETM, for example</div><div class='add'>+		P0 instruction tracing, branch broadcast, cycle counting and</div><div class='add'>+		context ID tracing.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/pe</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls which PE to trace.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/event</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls the tracing of arbitrary events from bank 0 to 3.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/event_instren</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls the behavior of the events in bank 0 to 3.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/event_ts</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls the insertion of global timestamps in the trace</div><div class='add'>+		streams.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/syncfreq</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls how often trace synchronization requests occur.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cyc_threshold</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Sets the threshold value for cycle counting.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/bb_ctrl</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls which regions in the memory map are enabled to</div><div class='add'>+		use branch broadcasting.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/event_vinst</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls instruction trace filtering.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/s_exlevel_vinst</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) In Secure state, each bit controls whether instruction</div><div class='add'>+		tracing is enabled for the corresponding exception level.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/ns_exlevel_vinst</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) In non-secure state, each bit controls whether instruction</div><div class='add'>+		tracing is enabled for the corresponding exception level.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/addr_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Select which address comparator or pair (of comparators) to</div><div class='add'>+		work with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/addr_instdatatype</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls what type of comparison the trace unit performs.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/addr_single</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Used to setup single address comparator values.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/addr_range</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Used to setup address range comparator values.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/seq_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Select which sequensor.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/seq_state</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Use this to set, or read, the sequencer state.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/seq_event</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Moves the sequencer state to a specific state.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/seq_reset_event</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Moves the sequencer to state 0 when a programmed event</div><div class='add'>+		occurs.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cntr_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Select which counter unit to work with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cntrldvr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) This sets or returns the reload count value of the</div><div class='add'>+		specific counter.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cntr_val</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) This sets or returns the current count value of the</div><div class='add'>+                specific counter.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/cntr_ctrl</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls the operation of the selected counter.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/res_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Select which resource selection unit to work with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/res_ctrl</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description: 	(RW) Controls the selection of the resources in the trace unit.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/ctxid_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Select which context ID comparator to work with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/ctxid_val</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Get/Set the context ID comparator value to trigger on.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/ctxid_masks</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Mask for all 8 context ID comparator value</div><div class='add'>+		registers (if implemented).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/vmid_idx</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Select which virtual machine ID comparator to work with.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/vmid_val</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Get/Set the virtual machine ID comparator value to</div><div class='add'>+		trigger on.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/vmid_masks</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(RW) Mask for all 8 virtual machine ID comparator value</div><div class='add'>+		registers (if implemented).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcoslsr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the OS Lock Status Register (0x304).</div><div class='add'>+		The value it taken directly  from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpdcr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Power Down Control Register</div><div class='add'>+		(0x310).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpdsr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Power Down Status Register</div><div class='add'>+		(0x314).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trclsr</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the SW Lock Status Register</div><div class='add'>+		(0xFB4).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcauthstatus</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Authentication Status Register</div><div class='add'>+		(0xFB8).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcdevid</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Device ID Register</div><div class='add'>+		(0xFC8).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcdevtype</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Device Type Register</div><div class='add'>+		(0xFCC).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpidr0</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Peripheral ID0 Register</div><div class='add'>+		(0xFE0).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpidr1</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Peripheral ID1 Register</div><div class='add'>+		(0xFE4).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpidr2</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Peripheral ID2 Register</div><div class='add'>+		(0xFE8).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/mgmt/trcpidr3</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Print the content of the Peripheral ID3 Register</div><div class='add'>+		(0xFEC).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr0</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the tracing capabilities of the trace unit (0x1E0).</div><div class='add'>+		The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr1</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the tracing capabilities of the trace unit (0x1E4).</div><div class='add'>+		The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr2</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the maximum size of the data value, data address,</div><div class='add'>+		VMID, context ID and instuction address in the trace unit</div><div class='add'>+		(0x1E8).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr3</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the value associated with various resources</div><div class='add'>+		available to the trace unit.  See the Trace Macrocell</div><div class='add'>+		architecture specification for more details (0x1E8).</div><div class='add'>+		The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr4</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns how many resources the trace unit supports (0x1F0).</div><div class='add'>+		The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr5</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns how many resources the trace unit supports (0x1F4).</div><div class='add'>+		The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr8</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the maximum speculation depth of the instruction</div><div class='add'>+		trace stream. (0x180).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr9</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the number of P0 right-hand keys that the trace unit</div><div class='add'>+		can use (0x184).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr10</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the number of P1 right-hand keys that the trace unit</div><div class='add'>+		can use (0x188).  The value is taken directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr11</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the number of special P1 right-hand keys that the</div><div class='add'>+		trace unit can use (0x18C).  The value is taken directly from</div><div class='add'>+		the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr12</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the number of conditional P1 right-hand keys that</div><div class='add'>+		the trace unit can use (0x190).  The value is taken directly</div><div class='add'>+		from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.etm/trcidr/trcidr13</div><div class='add'>+Date:		April 2015</div><div class='add'>+KernelVersion:	4.01</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+Description:	(R) Returns the number of special conditional P1 right-hand keys</div><div class='add'>+		that the trace unit can use (0x194).  The value is taken</div><div class='add'>+		directly from the HW.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-fcoe b/Documentation/ABI/testing/sysfs-bus-fcoe<br/>index 21640eaad371..657df13b100d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-fcoe?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-bus-fcoe</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-fcoe?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-fcoe</a></div><div class='hunk'>@@ -32,7 +32,7 @@ Description:	'FCoE Controller' instances on the fcoe bus.</div><div class='ctx'> </div><div class='ctx'> Attributes:</div><div class='ctx'> </div><div class='del'>-	fcf_dev_loss_tmo: Device loss timeout peroid (see below). Changing</div><div class='add'>+	fcf_dev_loss_tmo: Device loss timeout period (see below). Changing</div><div class='ctx'> 			  this value will change the dev_loss_tmo for all</div><div class='ctx'> 			  FCFs discovered by this controller.</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +61,7 @@ Attributes:</div><div class='ctx'> 	lesb/err_block:   Link Error Status Block (LESB) block error count.</div><div class='ctx'> </div><div class='ctx'> 	lesb/fcs_error:   Link Error Status Block (LESB) Fibre Channel</div><div class='del'>-			  Serivces error count.</div><div class='add'>+			  Services error count.</div><div class='ctx'> </div><div class='ctx'> Notes: ctlr_X (global increment starting at 0)</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +85,7 @@ Attributes:</div><div class='ctx'> 		     fabric.</div><div class='ctx'> </div><div class='ctx'> 	selected:    1 indicates that the switch has been selected for use;</div><div class='del'>-		     0 indicates that the swich will not be used.</div><div class='add'>+		     0 indicates that the switch will not be used.</div><div class='ctx'> </div><div class='ctx'> 	fc_map:      The Fibre Channel MAP</div><div class='ctx'> </div><div class='hunk'>@@ -93,7 +93,7 @@ Attributes:</div><div class='ctx'> </div><div class='ctx'> 	mac:         The FCF's MAC address</div><div class='ctx'> </div><div class='del'>-	fka_peroid:  The FIP Keep-Alive peroid</div><div class='add'>+	fka_period:  The FIP Keep-Alive period</div><div class='ctx'> </div><div class='ctx'> 	fabric_state: The internal kernel state</div><div class='ctx'> 		      "Unknown" - Initialization value</div><div class='hunk'>@@ -101,9 +101,9 @@ Attributes:</div><div class='ctx'> 		      "Connected" - Host is connected to the FCF</div><div class='ctx'> 		      "Deleted" - FCF is being removed from the system</div><div class='ctx'> </div><div class='del'>-	dev_loss_tmo: The device loss timeout peroid for this FCF.</div><div class='add'>+	dev_loss_tmo: The device loss timeout period for this FCF.</div><div class='ctx'> </div><div class='del'>-Notes: A device loss infrastructre similar to the FC Transport's</div><div class='add'>+Notes: A device loss infrastructure similar to the FC Transport's</div><div class='ctx'>        is present in fcoe_sysfs. It is nice to have so that a</div><div class='ctx'>        link flapping adapter doesn't continually advance the count</div><div class='ctx'>        used to identify the discovered FCF. FCFs will exist in a</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio<br/>index 3befcb19f414..70c9b1ac66db 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-iio?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-bus-iio</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-iio?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-iio</a></div><div class='hunk'>@@ -71,6 +71,8 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_raw</div><div class='ctx'> KernelVersion:	2.6.35</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -81,6 +83,11 @@ Description:</div><div class='ctx'> 		unique to allow association with event codes. Units after</div><div class='ctx'> 		application of scale and offset are millivolts.</div><div class='ctx'> </div><div class='add'>+		Channels with 'i' and 'q' modifiers always exist in pairs and both</div><div class='add'>+		channels refer to the same signal. The 'i' channel contains the in-phase</div><div class='add'>+		component of the signal while the 'q' channel contains the quadrature</div><div class='add'>+		component.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw</div><div class='ctx'> KernelVersion:	2.6.35</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -246,8 +253,16 @@ What:		/sys/bus/iio/devices/iio:deviceX/in_accel_y_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_accel_z_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_q_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_i_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_current_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_i_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_q_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_current_q_offset</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_current_i_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_tempY_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_temp_offset</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_pressureY_offset</div><div class='hunk'>@@ -273,14 +288,22 @@ Description:</div><div class='ctx'> 		to the _raw output.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_i_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_q_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/out_altvoltageY_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_supply_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_current_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_i_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentY_q_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_current_i_scale</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_current_q_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_accel_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_accel_peak_scale</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_scale</div><div class='hunk'>@@ -328,6 +351,10 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale</div><div class='add'>+What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_calibscale</div><div class='add'>+What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_calibscale</div><div class='add'>+What		/sys/bus/iio/devices/iio:deviceX/in_voltage_i_calibscale</div><div class='add'>+What		/sys/bus/iio/devices/iio:deviceX/in_voltage_q_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale</div><div class='hunk'>@@ -420,6 +447,16 @@ Description:</div><div class='ctx'> 		to the underlying data channel, then this parameter</div><div class='ctx'> 		gives the 3dB frequency of the filter in Hz.</div><div class='ctx'> </div><div class='add'>+What:		/sys/.../in_accel_filter_high_pass_3db_frequency</div><div class='add'>+What:		/sys/.../in_anglvel_filter_high_pass_3db_frequency</div><div class='add'>+What:		/sys/.../in_magn_filter_high_pass_3db_frequency</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		If a known or controllable high pass filter is applied</div><div class='add'>+		to the underlying data channel, then this parameter</div><div class='add'>+		gives the 3dB frequency of the filter in Hz.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/out_altvoltageY_raw</div><div class='ctx'> KernelVersion:	2.6.37</div><div class='hunk'>@@ -880,6 +917,26 @@ Description:</div><div class='ctx'> 		met before an event is generated. If direction is not</div><div class='ctx'> 		specified then this period applies to both directions.</div><div class='ctx'> </div><div class='add'>+What:		/sys/.../events/in_accel_thresh_rising_low_pass_filter_3db</div><div class='add'>+What:		/sys/.../events/in_anglvel_thresh_rising_low_pass_filter_3db</div><div class='add'>+What:		/sys/.../events/in_magn_thresh_rising_low_pass_filter_3db</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		If a low pass filter can be applied to the event generation</div><div class='add'>+		this property gives its 3db frequency in Hz.</div><div class='add'>+		A value of zero disables the filter.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_thresh_rising_high_pass_filter_3db</div><div class='add'>+What:		/sys/.../events/in_anglvel_thresh_rising_high_pass_filter_3db</div><div class='add'>+What:		/sys/.../events/in_magn_thresh_rising_high_pass_filter_3db</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		If a high pass filter can be applied to the event generation</div><div class='add'>+		this property gives its 3db frequency in Hz.</div><div class='add'>+		A value of zero disables the filter.</div><div class='add'>+</div><div class='ctx'> What:		/sys/.../events/in_activity_still_thresh_rising_en</div><div class='ctx'> What:		/sys/.../events/in_activity_still_thresh_falling_en</div><div class='ctx'> What:		/sys/.../events/in_activity_walking_thresh_rising_en</div><div class='hunk'>@@ -1016,6 +1073,10 @@ What:		/sys/.../iio:deviceX/scan_elements/in_timestamp_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_supply_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY-voltageZ_en</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_i_en</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_q_en</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_i_en</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_q_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_incli_x_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_incli_y_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_pressureY_en</div><div class='hunk'>@@ -1034,6 +1095,10 @@ What:		/sys/.../iio:deviceX/scan_elements/in_incli_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltage_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_supply_type</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_i_type</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_q_type</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_i_type</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_q_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_timestamp_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_pressureY_type</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_pressure_type</div><div class='hunk'>@@ -1071,6 +1136,10 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_index</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_supply_index</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_i_index</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltageY_q_index</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_i_index</div><div class='add'>+What:		/sys/.../iio:deviceX/scan_elements/in_voltage_q_index</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_accel_x_index</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_accel_y_index</div><div class='ctx'> What:		/sys/.../iio:deviceX/scan_elements/in_accel_z_index</div><div class='hunk'>@@ -1165,10 +1234,8 @@ Description:</div><div class='ctx'> 		object is near the sensor, usually be observing</div><div class='ctx'> 		reflectivity of infrared or ultrasound emitted.</div><div class='ctx'> 		Often these sensors are unit less and as such conversion</div><div class='del'>-		to SI units is not possible.  Where it is, the units should</div><div class='del'>-		be meters.  If such a conversion is not possible, the reported</div><div class='del'>-		values should behave in the same way as a distance, i.e. lower</div><div class='del'>-		values indicate something is closer to the sensor.</div><div class='add'>+		to SI units is not possible. Higher proximity measurements</div><div class='add'>+		indicate closer objects, and vice versa.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/.../iio:deviceX/in_illuminance_input</div><div class='ctx'> What:		/sys/.../iio:deviceX/in_illuminance_raw</div><div class='hunk'>@@ -1230,6 +1297,8 @@ Description:</div><div class='ctx'> 		or without compensation from tilt sensors.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_currentX_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentX_i_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentX_q_raw</div><div class='ctx'> KernelVersion:	3.18</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -1238,6 +1307,11 @@ Description:</div><div class='ctx'> 		present, output should be considered as processed with the</div><div class='ctx'> 		unit in milliamps.</div><div class='ctx'> </div><div class='add'>+		Channels with 'i' and 'q' modifiers always exist in pairs and both</div><div class='add'>+		channels refer to the same signal. The 'i' channel contains the in-phase</div><div class='add'>+		component of the signal while the 'q' channel contains the quadrature</div><div class='add'>+		component.</div><div class='add'>+</div><div class='ctx'> What:		/sys/.../iio:deviceX/in_energy_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/in_distance_en</div><div class='ctx'> What:		/sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en</div><div class='hunk'>@@ -1364,3 +1438,26 @@ Description:</div><div class='ctx'> 		hwfifo_watermak_min but not equal to any of the values in this</div><div class='ctx'> 		list, the driver will chose an appropriate value for the</div><div class='ctx'> 		hardware fifo watermark level.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_temp_calibemissivity</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_tempX_calibemissivity</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_temp_object_calibemissivity</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_tempX_object_calibemissivity</div><div class='add'>+KernelVersion:	4.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		The emissivity ratio of the surface in the field of view of the</div><div class='add'>+		contactless temperature sensor.  Emissivity varies from 0 to 1,</div><div class='add'>+		with 1 being the emissivity of a black body.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_magn_x_oversampling_ratio</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_magn_y_oversampling_ratio</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_magn_z_oversampling_ratio</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Hardware applied number of measurements for acquiring one</div><div class='add'>+		data point. The HW will do &lt;type&gt;[_name]_oversampling_ratio</div><div class='add'>+		measurements and return the average value as output data. Each</div><div class='add'>+		value resulted from &lt;type&gt;[_name]_oversampling_ratio measurements</div><div class='add'>+		is considered as one sample for &lt;type&gt;[_name]_sampling_frequency.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-vf610 b/Documentation/ABI/testing/sysfs-bus-iio-vf610<br/>new file mode 100644<br/>index 000000000000..ecbc1f4af921<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-iio-vf610?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-iio-vf610</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/conversion_mode</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Specifies the hardware conversion mode used. The three</div><div class='add'>+		available modes are "normal", "high-speed" and "low-power",</div><div class='add'>+		where the last is the default mode.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-mei b/Documentation/ABI/testing/sysfs-bus-mei<br/>index 2066f0bbd453..20e4d1638bac 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-mei?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-bus-mei</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-mei?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-mei</a></div><div class='hunk'>@@ -4,4 +4,18 @@ KernelVersion:	3.10</div><div class='ctx'> Contact:	Samuel Ortiz &lt;sameo@linux.intel.com&gt;</div><div class='ctx'> 		linux-mei@linux.intel.com</div><div class='ctx'> Description:	Stores the same MODALIAS value emitted by uevent</div><div class='del'>-		Format: mei:&lt;mei device name&gt;</div><div class='add'>+		Format: mei:&lt;mei device name&gt;:&lt;device uuid&gt;:</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/mei/devices/.../name</div><div class='add'>+Date:		May 2015</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	Tomas Winkler &lt;tomas.winkler@intel.com&gt;</div><div class='add'>+Description:	Stores mei client device name</div><div class='add'>+		Format: string</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/mei/devices/.../uuid</div><div class='add'>+Date:		May 2015</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	Tomas Winkler &lt;tomas.winkler@intel.com&gt;</div><div class='add'>+Description:	Stores mei client device uuid</div><div class='add'>+		Format: xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio b/Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio<br/>new file mode 100644<br/>index 000000000000..4d08f28dc871<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-pci-drivers-janz-cmodio</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+What:		/sys/bus/pci/drivers/janz-cmodio/.../modulbus_number</div><div class='add'>+Date:		May 2010</div><div class='add'>+KernelVersion:	2.6.35</div><div class='add'>+Contact:	Ira W. Snyder &lt;ira.snyder@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Value representing the HEX switch S2 of the janz carrier board CMOD-IO or CAN-PCI2</div><div class='add'>+</div><div class='add'>+		Read-only: value of the configuration switch (0..15)</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-usb-lvstest b/Documentation/ABI/testing/sysfs-bus-usb-lvstest<br/>index aae68fc2d842..5151290cf8e7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-usb-lvstest?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-bus-usb-lvstest</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-usb-lvstest?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-bus-usb-lvstest</a></div><div class='hunk'>@@ -4,14 +4,14 @@ driver is bound with root hub device.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../get_dev_desc</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Write to this node to issue "Get Device Descriptor"</div><div class='ctx'> 		for Link Layer Validation device. It is needed for TD.7.06.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../u1_timeout</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Set "U1 timeout" for the downstream port where Link Layer</div><div class='ctx'> 		Validation device is connected. Timeout value must be between 0</div><div class='hunk'>@@ -19,7 +19,7 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../u2_timeout</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Set "U2 timeout" for the downstream port where Link Layer</div><div class='ctx'> 		Validation device is connected. Timeout value must be between 0</div><div class='hunk'>@@ -27,21 +27,21 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../hot_reset</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Write to this node to issue "Reset" for Link Layer Validation</div><div class='ctx'> 		device. It is needed for TD.7.29, TD.7.31, TD.7.34 and TD.7.35.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../u3_entry</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Write to this node to issue "U3 entry" for Link Layer</div><div class='ctx'> 		Validation device. It is needed for TD.7.35 and TD.7.36.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/.../u3_exit</div><div class='ctx'> Date:		March 2014</div><div class='del'>-Contact:	Pratyush Anand &lt;pratyush.anand@st.com&gt;</div><div class='add'>+Contact:	Pratyush Anand &lt;pratyush.anand@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Write to this node to issue "U3 exit" for Link Layer</div><div class='ctx'> 		Validation device. It is needed for TD.7.36.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl<br/>index d46bba801aac..acfe9df83139 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-cxl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-class-cxl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-cxl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-cxl</a></div><div class='hunk'>@@ -6,6 +6,17 @@ Example: The real path of the attribute /sys/class/cxl/afu0.0s/irqs_max is</div><div class='ctx'> </div><div class='ctx'> Slave contexts (eg. /sys/class/cxl/afu0.0s):</div><div class='ctx'> </div><div class='add'>+What:           /sys/class/cxl/&lt;afu&gt;/afu_err_buf</div><div class='add'>+Date:           September 2014</div><div class='add'>+Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='add'>+Description:    read only</div><div class='add'>+                AFU Error Buffer contents. The contents of this file are</div><div class='add'>+		application specific and depends on the AFU being used.</div><div class='add'>+		Applications interacting with the AFU can use this attribute</div><div class='add'>+		to know about the current error condition and take appropriate</div><div class='add'>+		action like logging the event etc.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/irqs_max</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='hunk'>@@ -15,6 +26,7 @@ Description:    read/write</div><div class='ctx'>                 that hardware can support (eg. 2037). Write values will limit</div><div class='ctx'>                 userspace applications to that many userspace interrupts. Must</div><div class='ctx'>                 be &gt;= irqs_min.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/irqs_min</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -24,6 +36,7 @@ Description:    read only</div><div class='ctx'>                 userspace must request on a CXL_START_WORK ioctl. Userspace may</div><div class='ctx'>                 omit the num_interrupts field in the START_WORK IOCTL to get</div><div class='ctx'>                 this minimum automatically.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/mmio_size</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -31,6 +44,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the size of the MMIO space that may be mmaped</div><div class='ctx'>                 by userspace.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/modes_supported</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -38,6 +52,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 List of the modes this AFU supports. One per line.</div><div class='ctx'>                 Valid entries are: "dedicated_process" and "afu_directed"</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/mode</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -46,6 +61,7 @@ Description:    read/write</div><div class='ctx'>                 The current mode the AFU is using. Will be one of the modes</div><div class='ctx'>                 given in modes_supported. Writing will change the mode</div><div class='ctx'>                 provided that no user contexts are attached.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/prefault_mode</div><div class='hunk'>@@ -59,6 +75,7 @@ Description:    read/write</div><div class='ctx'>                                  descriptor as an effective address and</div><div class='ctx'>                                  prefault what it points to.</div><div class='ctx'>                         all: all segments process calling START_WORK maps.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/reset</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -66,12 +83,14 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    write only</div><div class='ctx'>                 Writing 1 here will reset the AFU provided there are not</div><div class='ctx'>                 contexts active on the AFU.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/api_version</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the current version of the kernel/user API.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/api_version_compatible</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -79,6 +98,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the the lowest version of the userspace API</div><div class='ctx'>                 this this kernel supports.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> AFU configuration records (eg. /sys/class/cxl/afu0.0/cr0):</div><div class='hunk'>@@ -92,6 +112,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'> 		Hexadecimal value of the vendor ID found in this AFU</div><div class='ctx'> 		configuration record.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/cr&lt;config num&gt;/device</div><div class='ctx'> Date:           February 2015</div><div class='hunk'>@@ -99,6 +120,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'> 		Hexadecimal value of the device ID found in this AFU</div><div class='ctx'> 		configuration record.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/cr&lt;config num&gt;/class</div><div class='ctx'> Date:           February 2015</div><div class='hunk'>@@ -106,6 +128,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'> 		Hexadecimal value of the class code found in this AFU</div><div class='ctx'> 		configuration record.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;/cr&lt;config num&gt;/config</div><div class='ctx'> Date:           February 2015</div><div class='hunk'>@@ -115,6 +138,7 @@ Description:    read only</div><div class='ctx'> 		record. The format is expected to match the either the standard</div><div class='ctx'> 		or extended configuration space defined by the PCIe</div><div class='ctx'> 		specification.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -126,18 +150,21 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the size of the MMIO space that may be mmaped</div><div class='ctx'>                 by userspace. This includes all slave contexts space also.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;m/pp_mmio_len</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the Per Process MMIO space length.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;afu&gt;m/pp_mmio_off</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Decimal value of the Per Process MMIO space offset.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Card info (eg. /sys/class/cxl/card0)</div><div class='hunk'>@@ -147,12 +174,14 @@ Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Identifies the CAIA Version the card implements.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;card&gt;/psl_revision</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Identifies the revision level of the PSL.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;card&gt;/base_image</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -162,6 +191,7 @@ Description:    read only</div><div class='ctx'>                 that support loadable PSLs. For FPGAs this field identifies</div><div class='ctx'>                 the image contained in the on-adapter flash which is loaded</div><div class='ctx'>                 during the initial program load.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;card&gt;/image_loaded</div><div class='ctx'> Date:           September 2014</div><div class='hunk'>@@ -169,6 +199,7 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='ctx'>                 Will return "user" or "factory" depending on the image loaded</div><div class='ctx'>                 onto the card.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;card&gt;/load_image_on_perst</div><div class='ctx'> Date:           December 2014</div><div class='hunk'>@@ -183,6 +214,7 @@ Description:    read/write</div><div class='ctx'>                 user or factory image to be loaded.</div><div class='ctx'>                 Default is to reload on PERST whichever image the card has</div><div class='ctx'>                 loaded.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/cxl/&lt;card&gt;/reset</div><div class='ctx'> Date:           October 2014</div><div class='hunk'>@@ -190,3 +222,4 @@ Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    write only</div><div class='ctx'>                 Writing 1 will issue a PERST to card which may cause the card</div><div class='ctx'>                 to reload the FPGA depending on load_image_on_perst.</div><div class='add'>+Users:		https://github.com/ibm-capi/libcxl</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-net b/Documentation/ABI/testing/sysfs-class-net<br/>index 5ecfd72ba684..668604fc8e06 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-net?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-class-net</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-net?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-net</a></div><div class='hunk'>@@ -39,6 +39,25 @@ Description:</div><div class='ctx'> 		Format is a string, e.g: 00:11:22:33:44:55 for an Ethernet MAC</div><div class='ctx'> 		address.</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/net/&lt;bridge iface&gt;/bridge/group_fwd_mask</div><div class='add'>+Date:		January 2012</div><div class='add'>+KernelVersion:	3.2</div><div class='add'>+Contact:	netdev@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Bitmask to allow forwarding of link local frames with address</div><div class='add'>+		01-80-C2-00-00-0X on a bridge device. Only values that set bits</div><div class='add'>+		not matching BR_GROUPFWD_RESTRICTED in net/bridge/br_private.h</div><div class='add'>+		allowed.</div><div class='add'>+		Default value 0 does not forward any link local frames.</div><div class='add'>+</div><div class='add'>+		Restricted bits:</div><div class='add'>+		0: 01-80-C2-00-00-00 Bridge Group Address used for STP</div><div class='add'>+		1: 01-80-C2-00-00-01 (MAC Control) 802.3 used for MAC PAUSE</div><div class='add'>+		2: 01-80-C2-00-00-02 (Link Aggregation) 802.3ad</div><div class='add'>+</div><div class='add'>+		Any values not setting these bits can be used. Take special</div><div class='add'>+		care when forwarding control frames e.g. 802.1X-PAE or LLDP.</div><div class='add'>+</div><div class='ctx'> What:		/sys/class/net/&lt;iface&gt;/broadcast</div><div class='ctx'> Date:		April 2005</div><div class='ctx'> KernelVersion:	2.6.12</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-net-janz-ican3 b/Documentation/ABI/testing/sysfs-class-net-janz-ican3<br/>new file mode 100644<br/>index 000000000000..fdbc03a2b8f8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-net-janz-ican3?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-net-janz-ican3</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+What:		/sys/class/net/&lt;iface&gt;/termination</div><div class='add'>+Date:		May 2010</div><div class='add'>+KernelVersion:	2.6.35</div><div class='add'>+Contact:	Ira W. Snyder &lt;ira.snyder@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Value representing the can bus termination</div><div class='add'>+</div><div class='add'>+		Default: 1 (termination active)</div><div class='add'>+		Reading: get actual termination state</div><div class='add'>+		Writing: set actual termination state (0=no termination, 1=termination active)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/net/&lt;iface&gt;/fwinfo</div><div class='add'>+Date:		May 2015</div><div class='add'>+KernelVersion:	3.19</div><div class='add'>+Contact:	Andreas Gröger &lt;andreas24groeger@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Firmware stamp of ican3 module</div><div class='add'>+		Read-only: 32 byte string identification of the ICAN3 module</div><div class='add'>+		(known values: "JANZ-ICAN3 ICANOS 1.xx", "JANZ-ICAN3 CAL/CANopen 1.xx")</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-scsi_tape b/Documentation/ABI/testing/sysfs-class-scsi_tape<br/>new file mode 100644<br/>index 000000000000..9be398b87ee9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-scsi_tape?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-scsi_tape</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/in_flight</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Show the number of I/Os currently in-flight between the st</div><div class='add'>+		module and the SCSI mid-layer.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/io_ns</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total amount of time spent waiting for all I/O</div><div class='add'>+                to and from the tape drive to complete. This includes all</div><div class='add'>+                reads, writes, and other SCSI commands issued to the tape</div><div class='add'>+                drive. An example of other SCSI commands would be tape</div><div class='add'>+                movement such as a rewind when a rewind tape device is</div><div class='add'>+                closed. This item is measured in nanoseconds.</div><div class='add'>+</div><div class='add'>+                To determine the amount of time spent waiting for other I/O</div><div class='add'>+                to complete subtract read_ns and write_ns from this value.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/other_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The number of I/O requests issued to the tape drive other</div><div class='add'>+		than SCSI read/write requests.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/read_byte_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total number of bytes requested from the tape drive.</div><div class='add'>+		This value is presented in bytes because tape drives support</div><div class='add'>+		variable length block sizes.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/read_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total number of read requests issued to the tape</div><div class='add'>+		drive.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/read_ns</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total amount of time in nanoseconds waiting for</div><div class='add'>+		read I/O requests to complete.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/write_byte_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total number of bytes written to the tape drive.</div><div class='add'>+		This value is presented in bytes because tape drives support</div><div class='add'>+		variable length block sizes.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/write_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total number of write requests issued to the tape</div><div class='add'>+		drive.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/write_ms</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the total amount of time in nanoseconds waiting for</div><div class='add'>+		write I/O requests to complete.</div><div class='add'>+Users:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:           /sys/class/scsi_tape/*/stats/resid_cnt</div><div class='add'>+Date:           Apr 2015</div><div class='add'>+KernelVersion:  4.2</div><div class='add'>+Contact:        Shane Seymour &lt;shane.seymour@hp.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the number of times we found that a residual &gt;0</div><div class='add'>+		was found when the SCSI midlayer indicated that there was</div><div class='add'>+		an error. For reads this may be a case of someone issuing</div><div class='add'>+		reads greater than the block size.</div><div class='add'>+Users:</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-zram b/Documentation/ABI/testing/sysfs-class-zram<br/>new file mode 100644<br/>index 000000000000..48ddacbe0e69<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-zram?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-class-zram</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+What:		/sys/class/zram-control/</div><div class='add'>+Date:		August 2015</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	Sergey Senozhatsky &lt;sergey.senozhatsky@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The zram-control/ class sub-directory belongs to zram</div><div class='add'>+		device class</div><div class='add'>+</div><div class='add'>+What:		/sys/class/zram-control/hot_add</div><div class='add'>+Date:		August 2015</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	Sergey Senozhatsky &lt;sergey.senozhatsky@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		RO attribute. Read operation will cause zram to add a new</div><div class='add'>+		device and return its device id back to user (so one can</div><div class='add'>+		use /dev/zram&lt;id&gt;), or error code.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/zram-control/hot_remove</div><div class='add'>+Date:		August 2015</div><div class='add'>+KernelVersion:	4.2</div><div class='add'>+Contact:	Sergey Senozhatsky &lt;sergey.senozhatsky@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		WO attribute. Remove a specific /dev/zramX device, where X</div><div class='add'>+		is a device_id provided by user.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu<br/>index da95513571ea..b683e8ee69ec 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-devices-system-cpu</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></div><div class='hunk'>@@ -243,7 +243,7 @@ Description:	Parameters for the CPU cache attributes</div><div class='ctx'> 		coherency_line_size: the minimum amount of data in bytes that gets</div><div class='ctx'> 				     transferred from memory to cache</div><div class='ctx'> </div><div class='del'>-		level: the cache hierarcy in the multi-level cache configuration</div><div class='add'>+		level: the cache hierarchy in the multi-level cache configuration</div><div class='ctx'> </div><div class='ctx'> 		number_of_sets: total number of sets in the cache, a set is a</div><div class='ctx'> 				collection of cache lines with the same cache index</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff b/Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff<br/>index b3f6a2ac5007..db197a879580 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-driver-hid-logitech-lg4ff</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='del'>-What:		/sys/module/hid_logitech/drivers/hid:logitech/&lt;dev&gt;/range.</div><div class='add'>+What:		/sys/bus/hid/drivers/logitech/&lt;dev&gt;/range</div><div class='ctx'> Date:		July 2011</div><div class='ctx'> KernelVersion:	3.2</div><div class='del'>-Contact:	Michal Malý &lt;madcatxster@gmail.com&gt;</div><div class='add'>+Contact:	Michal Malý &lt;madcatxster@devoid-pointer.net&gt;</div><div class='ctx'> Description:	Display minimum, maximum and current range of the steering</div><div class='ctx'> 		wheel. Writing a value within min and max boundaries sets the</div><div class='ctx'> 		range of the wheel.</div><div class='hunk'>@@ -9,7 +9,7 @@ Description:	Display minimum, maximum and current range of the steering</div><div class='ctx'> What:		/sys/bus/hid/drivers/logitech/&lt;dev&gt;/alternate_modes</div><div class='ctx'> Date:		Feb 2015</div><div class='ctx'> KernelVersion:	4.1</div><div class='del'>-Contact:	Michal Malý &lt;madcatxster@gmail.com&gt;</div><div class='add'>+Contact:	Michal Malý &lt;madcatxster@devoid-pointer.net&gt;</div><div class='ctx'> Description:	Displays a set of alternate modes supported by a wheel. Each</div><div class='ctx'> 		mode is listed as follows:</div><div class='ctx'> 		  Tag: Mode Name</div><div class='hunk'>@@ -45,7 +45,7 @@ Description:	Displays a set of alternate modes supported by a wheel. Each</div><div class='ctx'> What:		/sys/bus/hid/drivers/logitech/&lt;dev&gt;/real_id</div><div class='ctx'> Date:		Feb 2015</div><div class='ctx'> KernelVersion:	4.1</div><div class='del'>-Contact:	Michal Malý &lt;madcatxster@gmail.com&gt;</div><div class='add'>+Contact:	Michal Malý &lt;madcatxster@devoid-pointer.net&gt;</div><div class='ctx'> Description:	Displays the real model of the wheel regardless of any</div><div class='ctx'> 		alternate mode the wheel might be switched to.</div><div class='ctx'> 		It is a read-only value.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-toshiba_haps b/Documentation/ABI/testing/sysfs-driver-toshiba_haps<br/>new file mode 100644<br/>index 000000000000..a662370b4dbf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-driver-toshiba_haps?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-driver-toshiba_haps</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+What:		/sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS620A:00/protection_level</div><div class='add'>+Date:		August 16, 2014</div><div class='add'>+KernelVersion:	3.17</div><div class='add'>+Contact:	Azael Avalos &lt;coproscefalo@gmail.com&gt;</div><div class='add'>+Description:	This file controls the built-in accelerometer protection level,</div><div class='add'>+		valid values are:</div><div class='add'>+			* 0 -&gt; Disabled</div><div class='add'>+			* 1 -&gt; Low</div><div class='add'>+			* 2 -&gt; Medium</div><div class='add'>+			* 3 -&gt; High</div><div class='add'>+		The default potection value is set to 2 (Medium).</div><div class='add'>+Users:		KToshiba</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS620A:00/reset_protection</div><div class='add'>+Date:		August 16, 2014</div><div class='add'>+KernelVersion:	3.17</div><div class='add'>+Contact:	Azael Avalos &lt;coproscefalo@gmail.com&gt;</div><div class='add'>+Description:	This file turns off the built-in accelerometer for a few</div><div class='add'>+		seconds and then restore normal operation. Accepting 1 as the</div><div class='add'>+		only parameter.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-dmi b/Documentation/ABI/testing/sysfs-firmware-dmi-entries<br/>index c78f9ab01e56..210ad44b95a5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-dmi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-firmware-dmi</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-dmi-entries?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-firmware-dmi-entries</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-What:		/sys/firmware/dmi/</div><div class='add'>+What:		/sys/firmware/dmi/entries/</div><div class='ctx'> Date:		February 2011</div><div class='ctx'> Contact:	Mike Waychison &lt;mikew@google.com&gt;</div><div class='ctx'> Description:</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-dmi-tables b/Documentation/ABI/testing/sysfs-firmware-dmi-tables<br/>new file mode 100644<br/>index 000000000000..ff3cac8ed0bd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-dmi-tables?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-firmware-dmi-tables</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+What:		/sys/firmware/dmi/tables/</div><div class='add'>+Date:		April 2015</div><div class='add'>+Contact:	Ivan Khoronzhuk &lt;ivan.khoronzhuk@globallogic.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The firmware provides DMI structures as a packed list of</div><div class='add'>+		data referenced by a SMBIOS table entry point. The SMBIOS</div><div class='add'>+		entry point contains general information, like SMBIOS</div><div class='add'>+		version, DMI table size, etc. The structure, content and</div><div class='add'>+		size of SMBIOS entry point is dependent on SMBIOS version.</div><div class='add'>+		The format of SMBIOS entry point and DMI structures</div><div class='add'>+		can be read in SMBIOS specification.</div><div class='add'>+</div><div class='add'>+		The dmi/tables provides raw SMBIOS entry point and DMI tables</div><div class='add'>+		through sysfs as an alternative to utilities reading them</div><div class='add'>+		from /dev/mem. The raw SMBIOS entry point and DMI table are</div><div class='add'>+		presented as binary attributes and are accessible via:</div><div class='add'>+</div><div class='add'>+		/sys/firmware/dmi/tables/smbios_entry_point</div><div class='add'>+		/sys/firmware/dmi/tables/DMI</div><div class='add'>+</div><div class='add'>+		The complete DMI information can be obtained using these two</div><div class='add'>+		tables.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-efi b/Documentation/ABI/testing/sysfs-firmware-efi<br/>index 05874da7ce80..e794eac32a90 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-efi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ABI/testing/sysfs-firmware-efi</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-efi?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-firmware-efi</a></div><div class='hunk'>@@ -18,3 +18,13 @@ Contact:	Dave Young &lt;dyoung@redhat.com&gt;</div><div class='ctx'> Description:	It shows the physical address of config table entry in the EFI</div><div class='ctx'> 		system table.</div><div class='ctx'> Users:		Kexec</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/systab</div><div class='add'>+Date:		April 2005</div><div class='add'>+Contact:	linux-efi@vger.kernel.org</div><div class='add'>+Description:	Displays the physical addresses of all EFI Configuration</div><div class='add'>+		Tables found via the EFI System Table. The order in</div><div class='add'>+		which the tables are printed forms an ABI and newer</div><div class='add'>+		versions are always printed first, i.e. ACPI20 comes</div><div class='add'>+		before ACPI.</div><div class='add'>+Users:		dmidecode</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-efi-esrt b/Documentation/ABI/testing/sysfs-firmware-efi-esrt<br/>new file mode 100644<br/>index 000000000000..6e431d1a4e79<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-firmware-efi-esrt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-firmware-efi-esrt</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+What:		/sys/firmware/efi/esrt/</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	Provides userland access to read the EFI System Resource Table</div><div class='add'>+		(ESRT), a catalog of firmware for which can be updated with</div><div class='add'>+		the UEFI UpdateCapsule mechanism described in section 7.5 of</div><div class='add'>+		the UEFI Standard.</div><div class='add'>+Users:		fwupdate - https://github.com/rhinstaller/fwupdate</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/fw_resource_count</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The number of entries in the ESRT</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/fw_resource_count_max</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The maximum number of entries that /could/ be registered</div><div class='add'>+		in the allocation the table is currently in.  This is</div><div class='add'>+		really only useful to the system firmware itself.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/fw_resource_version</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The version of the ESRT structure provided by the firmware.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	Each ESRT entry is identified by a GUID, and each gets a</div><div class='add'>+		subdirectory under entries/ .</div><div class='add'>+		example: /sys/firmware/efi/esrt/entries/entry0/</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/fw_type</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	What kind of firmware entry this is:</div><div class='add'>+		0 - Unknown</div><div class='add'>+		1 - System Firmware</div><div class='add'>+		2 - Device Firmware</div><div class='add'>+		3 - UEFI Driver</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/fw_class</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	This is the entry's guid, and will match the directory name.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/fw_version</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The version of the firmware currently installed.  This is a</div><div class='add'>+		32-bit unsigned integer.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/lowest_supported_fw_version</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The lowest version of the firmware that can be installed.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/capsule_flags</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	Flags that must be passed to UpdateCapsule()</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/last_attempt_version</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The last firmware version for which an update was attempted.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/efi/esrt/entries/entry$N/last_attempt_status</div><div class='add'>+Date:		February 2015</div><div class='add'>+Contact:	Peter Jones &lt;pjones@redhat.com&gt;</div><div class='add'>+Description:	The result of the last firmware update attempt for the</div><div class='add'>+		firmware resource entry.</div><div class='add'>+		0 - Success</div><div class='add'>+		1 - Insufficient resources</div><div class='add'>+		2 - Incorrect version</div><div class='add'>+		3 - Invalid format</div><div class='add'>+		4 - Authentication error</div><div class='add'>+		5 - AC power event</div><div class='add'>+		6 - Battery power event</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-twl4030-usb b/Documentation/ABI/testing/sysfs-platform-twl4030-usb<br/>new file mode 100644<br/>index 000000000000..512c51be64ae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-platform-twl4030-usb?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ABI/testing/sysfs-platform-twl4030-usb</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+What: /sys/bus/platform/devices/*twl4030-usb/vbus</div><div class='add'>+Description:</div><div class='add'>+	Read-only status reporting if VBUS (approx 5V)</div><div class='add'>+	is being supplied by the USB bus.</div><div class='add'>+</div><div class='add'>+	Possible values: "on", "off".</div><div class='add'>+</div><div class='add'>+	Changes are notified via select/poll.</div><div class='head'>diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle<br/>index f4b78eafd92a..b713c35f8543 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/CodingStyle?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/CodingStyle</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/CodingStyle?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/CodingStyle</a></div><div class='hunk'>@@ -670,7 +670,7 @@ functions:</div><div class='ctx'> 	typeof(x) ret;			\</div><div class='ctx'> 	ret = calc_ret(x);		\</div><div class='ctx'> 	(ret);				\</div><div class='del'>-)}</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> ret is a common name for a local variable - __foo_ret is less likely</div><div class='ctx'> to collide with an existing variable.</div><div class='head'>diff --git a/Documentation/DMA-API-HOWTO.txt b/Documentation/DMA-API-HOWTO.txt<br/>index 0f7afb2bb442..55b70b903ead 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DMA-API-HOWTO.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DMA-API-HOWTO.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DMA-API-HOWTO.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DMA-API-HOWTO.txt</a></div><div class='hunk'>@@ -25,13 +25,18 @@ physical addresses.  These are the addresses in /proc/iomem.  The physical</div><div class='ctx'> address is not directly useful to a driver; it must use ioremap() to map</div><div class='ctx'> the space and produce a virtual address.</div><div class='ctx'> </div><div class='del'>-I/O devices use a third kind of address: a "bus address" or "DMA address".</div><div class='del'>-If a device has registers at an MMIO address, or if it performs DMA to read</div><div class='del'>-or write system memory, the addresses used by the device are bus addresses.</div><div class='del'>-In some systems, bus addresses are identical to CPU physical addresses, but</div><div class='del'>-in general they are not.  IOMMUs and host bridges can produce arbitrary</div><div class='add'>+I/O devices use a third kind of address: a "bus address".  If a device has</div><div class='add'>+registers at an MMIO address, or if it performs DMA to read or write system</div><div class='add'>+memory, the addresses used by the device are bus addresses.  In some</div><div class='add'>+systems, bus addresses are identical to CPU physical addresses, but in</div><div class='add'>+general they are not.  IOMMUs and host bridges can produce arbitrary</div><div class='ctx'> mappings between physical and bus addresses.</div><div class='ctx'> </div><div class='add'>+From a device's point of view, DMA uses the bus address space, but it may</div><div class='add'>+be restricted to a subset of that space.  For example, even if a system</div><div class='add'>+supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU</div><div class='add'>+so devices only need to use 32-bit DMA addresses.</div><div class='add'>+</div><div class='ctx'> Here's a picture and some examples:</div><div class='ctx'> </div><div class='ctx'>                CPU                  CPU                  Bus</div><div class='hunk'>@@ -72,11 +77,11 @@ can use virtual address X to access the buffer, but the device itself</div><div class='ctx'> cannot because DMA doesn't go through the CPU virtual memory system.</div><div class='ctx'> </div><div class='ctx'> In some simple systems, the device can do DMA directly to physical address</div><div class='del'>-Y.  But in many others, there is IOMMU hardware that translates bus</div><div class='add'>+Y.  But in many others, there is IOMMU hardware that translates DMA</div><div class='ctx'> addresses to physical addresses, e.g., it translates Z to Y.  This is part</div><div class='ctx'> of the reason for the DMA API: the driver can give a virtual address X to</div><div class='ctx'> an interface like dma_map_single(), which sets up any required IOMMU</div><div class='del'>-mapping and returns the bus address Z.  The driver then tells the device to</div><div class='add'>+mapping and returns the DMA address Z.  The driver then tells the device to</div><div class='ctx'> do DMA to Z, and the IOMMU maps it to the buffer at address Y in system</div><div class='ctx'> RAM.</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +103,7 @@ First of all, you should make sure</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> </div><div class='ctx'> is in your driver, which provides the definition of dma_addr_t.  This type</div><div class='del'>-can hold any valid DMA or bus address for the platform and should be used</div><div class='add'>+can hold any valid DMA address for the platform and should be used</div><div class='ctx'> everywhere you hold a DMA address returned from the DMA mapping functions.</div><div class='ctx'> </div><div class='ctx'> 			 What memory is DMA'able?</div><div class='hunk'>@@ -240,7 +245,7 @@ the case would look like this:</div><div class='ctx'> </div><div class='ctx'> 	if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {</div><div class='ctx'> 		using_dac = 1;</div><div class='del'>-	   	consistent_using_dac = 1;</div><div class='add'>+		consistent_using_dac = 1;</div><div class='ctx'> 	} else if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {</div><div class='ctx'> 		using_dac = 0;</div><div class='ctx'> 		consistent_using_dac = 0;</div><div class='hunk'>@@ -316,7 +321,7 @@ There are two types of DMA mappings:</div><div class='ctx'>   Think of "consistent" as "synchronous" or "coherent".</div><div class='ctx'> </div><div class='ctx'>   The current default is to return consistent memory in the low 32</div><div class='del'>-  bits of the bus space.  However, for future compatibility you should</div><div class='add'>+  bits of the DMA space.  However, for future compatibility you should</div><div class='ctx'>   set the consistent mask even if this default is fine for your</div><div class='ctx'>   driver.</div><div class='ctx'> </div><div class='hunk'>@@ -353,7 +358,7 @@ There are two types of DMA mappings:</div><div class='ctx'>   transfer, unmapped right after it (unless you use dma_sync_* below)</div><div class='ctx'>   and for which hardware can optimize for sequential accesses.</div><div class='ctx'> </div><div class='del'>-  This of "streaming" as "asynchronous" or "outside the coherency</div><div class='add'>+  Think of "streaming" as "asynchronous" or "outside the coherency</div><div class='ctx'>   domain".</div><div class='ctx'> </div><div class='ctx'>   Good examples of what to use streaming mappings for are:</div><div class='hunk'>@@ -403,7 +408,7 @@ dma_alloc_coherent() returns two values: the virtual address which you</div><div class='ctx'> can use to access it from the CPU and dma_handle which you pass to the</div><div class='ctx'> card.</div><div class='ctx'> </div><div class='del'>-The CPU virtual address and the DMA bus address are both</div><div class='add'>+The CPU virtual address and the DMA address are both</div><div class='ctx'> guaranteed to be aligned to the smallest PAGE_SIZE order which</div><div class='ctx'> is greater than or equal to the requested size.  This invariant</div><div class='ctx'> exists (for example) to guarantee that if you allocate a chunk</div><div class='hunk'>@@ -645,8 +650,8 @@ PLEASE NOTE:  The 'nents' argument to the dma_unmap_sg call must be</div><div class='ctx'>               dma_map_sg call.</div><div class='ctx'> </div><div class='ctx'> Every dma_map_{single,sg}() call should have its dma_unmap_{single,sg}()</div><div class='del'>-counterpart, because the bus address space is a shared resource and</div><div class='del'>-you could render the machine unusable by consuming all bus addresses.</div><div class='add'>+counterpart, because the DMA address space is a shared resource and</div><div class='add'>+you could render the machine unusable by consuming all DMA addresses.</div><div class='ctx'> </div><div class='ctx'> If you need to use the same streaming DMA region multiple times and touch</div><div class='ctx'> the data in between the DMA transfers, the buffer needs to be synced</div><div class='head'>diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt<br/>index 52088408668a..7eba542eff7c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DMA-API.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DMA-API.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DMA-API.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DMA-API.txt</a></div><div class='hunk'>@@ -18,10 +18,10 @@ Part I - dma_ API</div><div class='ctx'> To get the dma_ API, you must #include &lt;linux/dma-mapping.h&gt;.  This</div><div class='ctx'> provides dma_addr_t and the interfaces described below.</div><div class='ctx'> </div><div class='del'>-A dma_addr_t can hold any valid DMA or bus address for the platform.  It</div><div class='del'>-can be given to a device to use as a DMA source or target.  A CPU cannot</div><div class='del'>-reference a dma_addr_t directly because there may be translation between</div><div class='del'>-its physical address space and the bus address space.</div><div class='add'>+A dma_addr_t can hold any valid DMA address for the platform.  It can be</div><div class='add'>+given to a device to use as a DMA source or target.  A CPU cannot reference</div><div class='add'>+a dma_addr_t directly because there may be translation between its physical</div><div class='add'>+address space and the DMA address space.</div><div class='ctx'> </div><div class='ctx'> Part Ia - Using large DMA-coherent buffers</div><div class='ctx'> ------------------------------------------</div><div class='hunk'>@@ -42,7 +42,7 @@ It returns a pointer to the allocated region (in the processor's virtual</div><div class='ctx'> address space) or NULL if the allocation failed.</div><div class='ctx'> </div><div class='ctx'> It also returns a &lt;dma_handle&gt; which may be cast to an unsigned integer the</div><div class='del'>-same width as the bus and given to the device as the bus address base of</div><div class='add'>+same width as the bus and given to the device as the DMA address base of</div><div class='ctx'> the region.</div><div class='ctx'> </div><div class='ctx'> Note: consistent memory can be expensive on some platforms, and the</div><div class='hunk'>@@ -193,7 +193,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size,</div><div class='ctx'> 		      enum dma_data_direction direction)</div><div class='ctx'> </div><div class='ctx'> Maps a piece of processor virtual memory so it can be accessed by the</div><div class='del'>-device and returns the bus address of the memory.</div><div class='add'>+device and returns the DMA address of the memory.</div><div class='ctx'> </div><div class='ctx'> The direction for both APIs may be converted freely by casting.</div><div class='ctx'> However the dma_ API uses a strongly typed enumerator for its</div><div class='hunk'>@@ -212,20 +212,20 @@ contiguous piece of memory.  For this reason, memory to be mapped by</div><div class='ctx'> this API should be obtained from sources which guarantee it to be</div><div class='ctx'> physically contiguous (like kmalloc).</div><div class='ctx'> </div><div class='del'>-Further, the bus address of the memory must be within the</div><div class='add'>+Further, the DMA address of the memory must be within the</div><div class='ctx'> dma_mask of the device (the dma_mask is a bit mask of the</div><div class='del'>-addressable region for the device, i.e., if the bus address of</div><div class='del'>-the memory ANDed with the dma_mask is still equal to the bus</div><div class='add'>+addressable region for the device, i.e., if the DMA address of</div><div class='add'>+the memory ANDed with the dma_mask is still equal to the DMA</div><div class='ctx'> address, then the device can perform DMA to the memory).  To</div><div class='ctx'> ensure that the memory allocated by kmalloc is within the dma_mask,</div><div class='ctx'> the driver may specify various platform-dependent flags to restrict</div><div class='del'>-the bus address range of the allocation (e.g., on x86, GFP_DMA</div><div class='del'>-guarantees to be within the first 16MB of available bus addresses,</div><div class='add'>+the DMA address range of the allocation (e.g., on x86, GFP_DMA</div><div class='add'>+guarantees to be within the first 16MB of available DMA addresses,</div><div class='ctx'> as required by ISA devices).</div><div class='ctx'> </div><div class='ctx'> Note also that the above constraints on physical contiguity and</div><div class='ctx'> dma_mask may not apply if the platform has an IOMMU (a device which</div><div class='del'>-maps an I/O bus address to a physical memory address).  However, to be</div><div class='add'>+maps an I/O DMA address to a physical memory address).  However, to be</div><div class='ctx'> portable, device driver writers may *not* assume that such an IOMMU</div><div class='ctx'> exists.</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +296,7 @@ reduce current DMA mapping usage or delay and try again later).</div><div class='ctx'> 	dma_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> 		int nents, enum dma_data_direction direction)</div><div class='ctx'> </div><div class='del'>-Returns: the number of bus address segments mapped (this may be shorter</div><div class='add'>+Returns: the number of DMA address segments mapped (this may be shorter</div><div class='ctx'> than &lt;nents&gt; passed in if some elements of the scatter/gather list are</div><div class='ctx'> physically or virtually adjacent and an IOMMU maps them with a single</div><div class='ctx'> entry).</div><div class='hunk'>@@ -340,7 +340,7 @@ must be the same as those and passed in to the scatter/gather mapping</div><div class='ctx'> API.</div><div class='ctx'> </div><div class='ctx'> Note: &lt;nents&gt; must be the number you passed in, *not* the number of</div><div class='del'>-bus address entries returned.</div><div class='add'>+DMA address entries returned.</div><div class='ctx'> </div><div class='ctx'> void</div><div class='ctx'> dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,</div><div class='hunk'>@@ -507,7 +507,7 @@ it's asked for coherent memory for this device.</div><div class='ctx'> phys_addr is the CPU physical address to which the memory is currently</div><div class='ctx'> assigned (this will be ioremapped so the CPU can access the region).</div><div class='ctx'> </div><div class='del'>-device_addr is the bus address the device needs to be programmed</div><div class='add'>+device_addr is the DMA address the device needs to be programmed</div><div class='ctx'> with to actually address this memory (this will be handed out as the</div><div class='ctx'> dma_addr_t in dma_alloc_coherent()).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/DocBook/crypto-API.tmpl b/Documentation/DocBook/crypto-API.tmpl<br/>index efc8d90a9a3f..0992531ffefb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/crypto-API.tmpl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/crypto-API.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/crypto-API.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/crypto-API.tmpl</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> </div><div class='ctx'>     &lt;para&gt;</div><div class='ctx'>      Note: The terms "transformation" and cipher algorithm are used</div><div class='del'>-     interchangably.</div><div class='add'>+     interchangeably.</div><div class='ctx'>     &lt;/para&gt;</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -536,8 +536,8 @@</div><div class='ctx'> </div><div class='ctx'>      &lt;para&gt;</div><div class='ctx'>       For other use cases of AEAD ciphers, the ASCII art applies as</div><div class='del'>-      well, but the caller may not use the GIVCIPHER interface. In</div><div class='del'>-      this case, the caller must generate the IV.</div><div class='add'>+      well, but the caller may not use the AEAD cipher with a separate</div><div class='add'>+      IV generator. In this case, the caller must generate the IV.</div><div class='ctx'>      &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>      &lt;para&gt;</div><div class='hunk'>@@ -584,8 +584,8 @@ kernel crypto API                                |   IPSEC Layer</div><div class='ctx'>                                                  |</div><div class='ctx'> +-----------+                                    |</div><div class='ctx'> |           |            (1)</div><div class='del'>-| givcipher | &lt;-----------------------------------  esp_output</div><div class='del'>-|  (seqiv)  | ---+</div><div class='add'>+|   aead    | &lt;-----------------------------------  esp_output</div><div class='add'>+| (seqniv)  | ---+</div><div class='ctx'> +-----------+    |</div><div class='ctx'>                  | (2)</div><div class='ctx'> +-----------+    |</div><div class='hunk'>@@ -620,8 +620,8 @@ kernel crypto API                                |   IPSEC Layer</div><div class='ctx'>      &lt;orderedlist&gt;</div><div class='ctx'>       &lt;listitem&gt;</div><div class='ctx'>        &lt;para&gt;</div><div class='del'>-        esp_output() invokes crypto_aead_givencrypt() to trigger an encryption</div><div class='del'>-        operation of the GIVCIPHER implementation.</div><div class='add'>+        esp_output() invokes crypto_aead_encrypt() to trigger an encryption</div><div class='add'>+        operation of the AEAD cipher with IV generator.</div><div class='ctx'>        &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>        &lt;para&gt;</div><div class='hunk'>@@ -1563,7 +1563,7 @@ struct sockaddr_alg sa = {</div><div class='ctx'> </div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Zero-Copy Interface&lt;/title&gt;</div><div class='ctx'>     &lt;para&gt;</div><div class='del'>-     In addition to the send/write/read/recv system call familty, the AF_ALG</div><div class='add'>+     In addition to the send/write/read/recv system call family, the AF_ALG</div><div class='ctx'>      interface can be accessed with the zero-copy interface of splice/vmsplice.</div><div class='ctx'>      As the name indicates, the kernel tries to avoid a copy operation into</div><div class='ctx'>      kernel space.</div><div class='hunk'>@@ -1669,9 +1669,19 @@ read(opfd, out, outlen);</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;chapter id="API"&gt;&lt;title&gt;Programming Interface&lt;/title&gt;</div><div class='add'>+   &lt;para&gt;</div><div class='add'>+    Please note that the kernel crypto API contains the AEAD givcrypt</div><div class='add'>+    API (crypto_aead_giv* and aead_givcrypt_* function calls in</div><div class='add'>+    include/crypto/aead.h). This API is obsolete and will be removed</div><div class='add'>+    in the future. To obtain the functionality of an AEAD cipher with</div><div class='add'>+    internal IV generation, use the IV generator as a regular cipher.</div><div class='add'>+    For example, rfc4106(gcm(aes)) is the AEAD cipher with external</div><div class='add'>+    IV generation and seqniv(rfc4106(gcm(aes))) implies that the kernel</div><div class='add'>+    crypto API generates the IV. Different IV generators are available.</div><div class='add'>+   &lt;/para&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Block Cipher Context Data Structures&lt;/title&gt;</div><div class='ctx'> !Pinclude/linux/crypto.h Block Cipher Context Data Structures</div><div class='del'>-!Finclude/linux/crypto.h aead_request</div><div class='add'>+!Finclude/crypto/aead.h aead_request</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Block Cipher Algorithm Definitions&lt;/title&gt;</div><div class='ctx'> !Pinclude/linux/crypto.h Block Cipher Algorithm Definitions</div><div class='hunk'>@@ -1680,7 +1690,7 @@ read(opfd, out, outlen);</div><div class='ctx'> !Finclude/linux/crypto.h aead_alg</div><div class='ctx'> !Finclude/linux/crypto.h blkcipher_alg</div><div class='ctx'> !Finclude/linux/crypto.h cipher_alg</div><div class='del'>-!Finclude/linux/crypto.h rng_alg</div><div class='add'>+!Finclude/crypto/rng.h rng_alg</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Asynchronous Block Cipher API&lt;/title&gt;</div><div class='ctx'> !Pinclude/linux/crypto.h Asynchronous Block Cipher API</div><div class='hunk'>@@ -1704,26 +1714,27 @@ read(opfd, out, outlen);</div><div class='ctx'> !Finclude/linux/crypto.h ablkcipher_request_set_crypt</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Authenticated Encryption With Associated Data (AEAD) Cipher API&lt;/title&gt;</div><div class='del'>-!Pinclude/linux/crypto.h Authenticated Encryption With Associated Data (AEAD) Cipher API</div><div class='del'>-!Finclude/linux/crypto.h crypto_alloc_aead</div><div class='del'>-!Finclude/linux/crypto.h crypto_free_aead</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_ivsize</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_authsize</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_blocksize</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_setkey</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_setauthsize</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_encrypt</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_decrypt</div><div class='add'>+!Pinclude/crypto/aead.h Authenticated Encryption With Associated Data (AEAD) Cipher API</div><div class='add'>+!Finclude/crypto/aead.h crypto_alloc_aead</div><div class='add'>+!Finclude/crypto/aead.h crypto_free_aead</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_ivsize</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_authsize</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_blocksize</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_setkey</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_setauthsize</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_encrypt</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_decrypt</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Asynchronous AEAD Request Handle&lt;/title&gt;</div><div class='del'>-!Pinclude/linux/crypto.h Asynchronous AEAD Request Handle</div><div class='del'>-!Finclude/linux/crypto.h crypto_aead_reqsize</div><div class='del'>-!Finclude/linux/crypto.h aead_request_set_tfm</div><div class='del'>-!Finclude/linux/crypto.h aead_request_alloc</div><div class='del'>-!Finclude/linux/crypto.h aead_request_free</div><div class='del'>-!Finclude/linux/crypto.h aead_request_set_callback</div><div class='del'>-!Finclude/linux/crypto.h aead_request_set_crypt</div><div class='del'>-!Finclude/linux/crypto.h aead_request_set_assoc</div><div class='add'>+!Pinclude/crypto/aead.h Asynchronous AEAD Request Handle</div><div class='add'>+!Finclude/crypto/aead.h crypto_aead_reqsize</div><div class='add'>+!Finclude/crypto/aead.h aead_request_set_tfm</div><div class='add'>+!Finclude/crypto/aead.h aead_request_alloc</div><div class='add'>+!Finclude/crypto/aead.h aead_request_free</div><div class='add'>+!Finclude/crypto/aead.h aead_request_set_callback</div><div class='add'>+!Finclude/crypto/aead.h aead_request_set_crypt</div><div class='add'>+!Finclude/crypto/aead.h aead_request_set_assoc</div><div class='add'>+!Finclude/crypto/aead.h aead_request_set_ad</div><div class='ctx'>    &lt;/sect1&gt;</div><div class='ctx'>    &lt;sect1&gt;&lt;title&gt;Synchronous Block Cipher API&lt;/title&gt;</div><div class='ctx'> !Pinclude/linux/crypto.h Synchronous Block Cipher API</div><div class='head'>diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl<br/>index 9765a4c0829d..2fb9a5457522 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/drm.tmpl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/drm.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/drm.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/drm.tmpl</a></div><div class='hunk'>@@ -2439,6 +2439,18 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	  &lt;title&gt;Tile group&lt;/title&gt;</div><div class='ctx'> !Pdrivers/gpu/drm/drm_crtc.c Tile group</div><div class='ctx'>     &lt;/sect2&gt;</div><div class='add'>+    &lt;sect2&gt;</div><div class='add'>+	&lt;title&gt;Bridges&lt;/title&gt;</div><div class='add'>+      &lt;sect3&gt;</div><div class='add'>+	 &lt;title&gt;Overview&lt;/title&gt;</div><div class='add'>+!Pdrivers/gpu/drm/drm_bridge.c overview</div><div class='add'>+      &lt;/sect3&gt;</div><div class='add'>+      &lt;sect3&gt;</div><div class='add'>+	 &lt;title&gt;Default bridge callback sequence&lt;/title&gt;</div><div class='add'>+!Pdrivers/gpu/drm/drm_bridge.c bridge callbacks</div><div class='add'>+      &lt;/sect3&gt;</div><div class='add'>+!Edrivers/gpu/drm/drm_bridge.c</div><div class='add'>+    &lt;/sect2&gt;</div><div class='ctx'>   &lt;/sect1&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;!-- Internals: kms properties --&gt;</div><div class='hunk'>@@ -2573,7 +2585,22 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	&lt;td valign="top" &gt;Description/Restrictions&lt;/td&gt;</div><div class='ctx'> 	&lt;/tr&gt;</div><div class='ctx'> 	&lt;tr&gt;</div><div class='del'>-	&lt;td rowspan="36" valign="top" &gt;DRM&lt;/td&gt;</div><div class='add'>+	&lt;td rowspan="37" valign="top" &gt;DRM&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;Generic&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;“rotation�&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;BITMASK&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;{ 0, "rotate-0" },</div><div class='add'>+	{ 1, "rotate-90" },</div><div class='add'>+	{ 2, "rotate-180" },</div><div class='add'>+	{ 3, "rotate-270" },</div><div class='add'>+	{ 4, "reflect-x" },</div><div class='add'>+	{ 5, "reflect-y" }&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;CRTC, Plane&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;rotate-(degrees) rotates the image by the specified amount in degrees</div><div class='add'>+	in counter clockwise direction. reflect-x and reflect-y reflects the</div><div class='add'>+	image along the specified axis prior to rotation&lt;/td&gt;</div><div class='add'>+	&lt;/tr&gt;</div><div class='add'>+	&lt;tr&gt;</div><div class='ctx'> 	&lt;td rowspan="5" valign="top" &gt;Connector&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;“EDID�&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;BLOB | IMMUTABLE&lt;/td&gt;</div><div class='hunk'>@@ -2834,7 +2861,7 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	&lt;td valign="top" &gt;TBD&lt;/td&gt;</div><div class='ctx'> 	&lt;/tr&gt;</div><div class='ctx'> 	&lt;tr&gt;</div><div class='del'>-	&lt;td rowspan="21" valign="top" &gt;i915&lt;/td&gt;</div><div class='add'>+	&lt;td rowspan="20" valign="top" &gt;i915&lt;/td&gt;</div><div class='ctx'> 	&lt;td rowspan="2" valign="top" &gt;Generic&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;"Broadcast RGB"&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;ENUM&lt;/td&gt;</div><div class='hunk'>@@ -2850,14 +2877,6 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	&lt;td valign="top" &gt;TBD&lt;/td&gt;</div><div class='ctx'> 	&lt;/tr&gt;</div><div class='ctx'> 	&lt;tr&gt;</div><div class='del'>-	&lt;td rowspan="1" valign="top" &gt;Plane&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;“rotation�&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;BITMASK&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;{ 0, "rotate-0" }, { 2, "rotate-180" }&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;Plane&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;TBD&lt;/td&gt;</div><div class='del'>-	&lt;/tr&gt;</div><div class='del'>-	&lt;tr&gt;</div><div class='ctx'> 	&lt;td rowspan="17" valign="top" &gt;SDVO-TV&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;“mode�&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;ENUM&lt;/td&gt;</div><div class='hunk'>@@ -3364,20 +3383,8 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	&lt;td valign="top" &gt;TBD&lt;/td&gt;</div><div class='ctx'> 	&lt;/tr&gt;</div><div class='ctx'> 	&lt;tr&gt;</div><div class='del'>-	&lt;td rowspan="2" valign="top" &gt;omap&lt;/td&gt;</div><div class='del'>-	&lt;td rowspan="2" valign="top" &gt;Generic&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;“rotation�&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;BITMASK&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;{ 0, "rotate-0" },</div><div class='del'>-	{ 1, "rotate-90" },</div><div class='del'>-	{ 2, "rotate-180" },</div><div class='del'>-	{ 3, "rotate-270" },</div><div class='del'>-	{ 4, "reflect-x" },</div><div class='del'>-	{ 5, "reflect-y" }&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;CRTC, Plane&lt;/td&gt;</div><div class='del'>-	&lt;td valign="top" &gt;TBD&lt;/td&gt;</div><div class='del'>-	&lt;/tr&gt;</div><div class='del'>-	&lt;tr&gt;</div><div class='add'>+	&lt;td valign="top" &gt;omap&lt;/td&gt;</div><div class='add'>+	&lt;td valign="top" &gt;Generic&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;“zorder�&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;RANGE&lt;/td&gt;</div><div class='ctx'> 	&lt;td valign="top" &gt;Min=0, Max=3&lt;/td&gt;</div><div class='hunk'>@@ -4067,7 +4074,7 @@ int num_ioctls;&lt;/synopsis&gt;</div><div class='ctx'>         &lt;title&gt;DPIO&lt;/title&gt;</div><div class='ctx'> !Pdrivers/gpu/drm/i915/i915_reg.h DPIO</div><div class='ctx'> 	&lt;table id="dpiox2"&gt;</div><div class='del'>-	  &lt;title&gt;Dual channel PHY (VLV/CHV)&lt;/title&gt;</div><div class='add'>+	  &lt;title&gt;Dual channel PHY (VLV/CHV/BXT)&lt;/title&gt;</div><div class='ctx'> 	  &lt;tgroup cols="8"&gt;</div><div class='ctx'> 	    &lt;colspec colname="c0" /&gt;</div><div class='ctx'> 	    &lt;colspec colname="c1" /&gt;</div><div class='hunk'>@@ -4118,7 +4125,7 @@ int num_ioctls;&lt;/synopsis&gt;</div><div class='ctx'> 	  &lt;/tgroup&gt;</div><div class='ctx'> 	&lt;/table&gt;</div><div class='ctx'> 	&lt;table id="dpiox1"&gt;</div><div class='del'>-	  &lt;title&gt;Single channel PHY (CHV)&lt;/title&gt;</div><div class='add'>+	  &lt;title&gt;Single channel PHY (CHV/BXT)&lt;/title&gt;</div><div class='ctx'> 	  &lt;tgroup cols="4"&gt;</div><div class='ctx'> 	    &lt;colspec colname="c0" /&gt;</div><div class='ctx'> 	    &lt;colspec colname="c1" /&gt;</div><div class='hunk'>@@ -4153,6 +4160,12 @@ int num_ioctls;&lt;/synopsis&gt;</div><div class='ctx'> 	  &lt;/tgroup&gt;</div><div class='ctx'> 	&lt;/table&gt;</div><div class='ctx'>       &lt;/sect2&gt;</div><div class='add'>+</div><div class='add'>+      &lt;sect2&gt;</div><div class='add'>+       &lt;title&gt;CSR firmware support for DMC&lt;/title&gt;</div><div class='add'>+!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc</div><div class='add'>+!Idrivers/gpu/drm/i915/intel_csr.c</div><div class='add'>+      &lt;/sect2&gt;</div><div class='ctx'>     &lt;/sect1&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;sect1&gt;</div><div class='hunk'>@@ -4204,7 +4217,6 @@ int num_ioctls;&lt;/synopsis&gt;</div><div class='ctx'> !Idrivers/gpu/drm/i915/i915_gem_shrinker.c</div><div class='ctx'>       &lt;/sect2&gt;</div><div class='ctx'>     &lt;/sect1&gt;</div><div class='del'>-</div><div class='ctx'>     &lt;sect1&gt;</div><div class='ctx'>       &lt;title&gt; Tracing &lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;</div><div class='head'>diff --git a/Documentation/DocBook/kernel-hacking.tmpl b/Documentation/DocBook/kernel-hacking.tmpl<br/>index e84f09467cd7..589b40cc5eb5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/kernel-hacking.tmpl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/kernel-hacking.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/kernel-hacking.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/kernel-hacking.tmpl</a></div><div class='hunk'>@@ -954,6 +954,8 @@ printk(KERN_INFO "my ip: %pI4\n", &amp;amp;ipaddress);</div><div class='ctx'>     &lt;function&gt;MODULE_LICENSE()&lt;/function&gt; that specifies a GPL</div><div class='ctx'>     compatible license.  It implies that the function is considered</div><div class='ctx'>     an internal implementation issue, and not really an interface.</div><div class='add'>+    Some maintainers and developers may however</div><div class='add'>+    require EXPORT_SYMBOL_GPL() when adding any new APIs or functionality.</div><div class='ctx'>    &lt;/para&gt;</div><div class='ctx'>   &lt;/sect1&gt;</div><div class='ctx'>  &lt;/chapter&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/.gitignore b/Documentation/DocBook/media/.gitignore<br/>new file mode 100644<br/>index 000000000000..e461c585fde8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+!*.svg</div><div class='head'>diff --git a/Documentation/DocBook/media/Makefile b/Documentation/DocBook/media/Makefile<br/>index 8bf7c6191296..23996f88cd58 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/Makefile</a></div><div class='hunk'>@@ -65,29 +65,31 @@ IOCTLS = \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/uapi/linux/dvb/video.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/uapi/linux/media.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/uapi/linux/v4l2-subdev.h) \</div><div class='del'>-	VIDIOC_SUBDEV_G_FRAME_INTERVAL \</div><div class='del'>-	VIDIOC_SUBDEV_S_FRAME_INTERVAL \</div><div class='del'>-	VIDIOC_SUBDEV_ENUM_MBUS_CODE \</div><div class='del'>-	VIDIOC_SUBDEV_ENUM_FRAME_SIZE \</div><div class='del'>-	VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \</div><div class='del'>-	VIDIOC_SUBDEV_G_SELECTION \</div><div class='del'>-	VIDIOC_SUBDEV_S_SELECTION \</div><div class='add'>+</div><div class='add'>+DEFINES = \</div><div class='add'>+	$(shell perl -ne 'print "$$1 " if /\#define\s+(DTV_[^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/frontend.h) \</div><div class='ctx'> </div><div class='ctx'> TYPES = \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/uapi/linux/videodev2.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^}\s+([a-z0-9_]+_t)/' $(srctree)/include/uapi/linux/dvb/frontend.h)</div><div class='add'>+	$(shell perl -ne 'print "$$1 " if /^typedef\s+.*\s+(\S+)\;/' $(srctree)/include/uapi/linux/videodev2.h) \</div><div class='add'>+	$(shell perl -ne 'print "$$1 " if /^typedef\s+.*\s+(\S+)\;/' $(srctree)/include/uapi/linux/dvb/frontend.h)</div><div class='ctx'> </div><div class='ctx'> ENUMS = \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/videodev2.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/audio.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/ca.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/dmx.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/frontend.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/net.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/dvb/video.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/media.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/v4l2-mediabus.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/v4l2-subdev.h)</div><div class='add'>+	$(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' \</div><div class='add'>+		$(srctree)/include/uapi/linux/videodev2.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/audio.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/ca.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/dmx.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/frontend.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/net.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/video.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/media.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/v4l2-mediabus.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/v4l2-subdev.h)</div><div class='add'>+</div><div class='add'>+ENUM_DEFS = \</div><div class='add'>+	$(shell perl -e 'open IN,"cat @ARGV| cpp -fpreprocessed |"; while (&lt;IN&gt;) { if ($$enum) {print "$$1\n" if (/\s*([A-Z]\S+)\b/); } $$enum = 0 if ($$enum &amp;&amp; /^\}/); $$enum = 1 if(/^\s*enum\s/); }; close IN;' \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/dmx.h \</div><div class='add'>+		$(srctree)/include/uapi/linux/dvb/frontend.h)</div><div class='ctx'> </div><div class='ctx'> STRUCTS = \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/videodev2.h) \</div><div class='hunk'>@@ -95,7 +97,7 @@ STRUCTS = \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/uapi/linux/dvb/ca.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/uapi/linux/dvb/dmx.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if (!/dtv\_cmds\_h/ &amp;&amp; /^struct\s+([^\s]+)\s+/)' $(srctree)/include/uapi/linux/dvb/frontend.h) \</div><div class='del'>-	$(shell perl -ne 'print "$$1 " if (/^struct\s+([A-Z][^\s]+)\s+/)' $(srctree)/include/uapi/linux/dvb/net.h) \</div><div class='add'>+	$(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/ &amp;&amp; !/_old/)' $(srctree)/include/uapi/linux/dvb/net.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/uapi/linux/dvb/video.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/media.h) \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/uapi/linux/v4l2-subdev.h) \</div><div class='hunk'>@@ -179,7 +181,6 @@ DOCUMENTED = \</div><div class='ctx'> 	-e "s/v4l2\-mpeg\-vbi\-ITV0/v4l2-mpeg-vbi-itv0-1/g"</div><div class='ctx'> </div><div class='ctx'> DVB_DOCUMENTED = \</div><div class='del'>-	-e "s/\(linkend\=\"\)FE_SET_PROPERTY/\1FE_GET_PROPERTY/g" \</div><div class='ctx'> 	-e "s,\(struct\s\+\)\([a-z0-9_]\+\)\(\s\+{\),\1\&lt;link linkend=\"\2\"&gt;\2\&lt;\/link\&gt;\3,g" \</div><div class='ctx'> 	-e "s,\(}\s\+\)\([a-z0-9_]\+_t\+\),\1\&lt;link linkend=\"\2\"&gt;\2\&lt;\/link\&gt;,g" \</div><div class='ctx'> 	-e "s,\(define\s\+\)\(DTV_[A-Z0-9_]\+\)\(\s\+[0-9]\+\),\1\&lt;link linkend=\"\2\"&gt;\2\&lt;\/link\&gt;\3,g" \</div><div class='hunk'>@@ -188,14 +189,17 @@ DVB_DOCUMENTED = \</div><div class='ctx'> 	-e "s,\(audio-mixer\|audio-karaoke\|audio-status\|ca-slot-info\|ca-descr-info\|ca-caps\|ca-msg\|ca-descr\|ca-pid\|dmx-filter\|dmx-caps\|video-system\|video-highlight\|video-spu\|video-spu-palette\|video-navi-pack\)-t,\1,g" \</div><div class='ctx'> 	-e "s,DTV-ISDBT-LAYER[A-C],DTV-ISDBT-LAYER,g" \</div><div class='ctx'> 	-e "s,\(define\s\+\)\([A-Z0-9_]\+\)\(\s\+_IO\),\1\&lt;link linkend=\"\2\"&gt;\2\&lt;\/link\&gt;\3,g" \</div><div class='add'>+	-e "s,\(define\s\+\)\(DTV_[A-Z0-9_]\+\)\(\s\+\),\1\&lt;link linkend=\"\2\"&gt;\2\&lt;\/link\&gt;\3,g" \</div><div class='ctx'> 	-e "s,&lt;link\s\+linkend=\".*\"&gt;\(__.*_OLD\)&lt;\/link&gt;,\1,g" \</div><div class='add'>+	-e "s/\(linkend\=\"\)FE_SET_PROPERTY/\1FE_GET_PROPERTY/g" \</div><div class='add'>+	-e "s,&lt;link\s\+linkend=\".*\"&gt;\(DTV_ISDBS_TS_ID_LEGACY\|DTV_MAX_COMMAND\|DTV_IOCTL_MAX_MSGS\)&lt;\/link&gt;,\1,g" \</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Media targets and dependencies</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> install_media_images = \</div><div class='del'>-	$(Q)-cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api</div><div class='add'>+	$(Q)-cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/*.svg $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api</div><div class='ctx'> </div><div class='ctx'> $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64</div><div class='ctx'> 	$(Q)base64 -d $&lt; &gt;$@</div><div class='hunk'>@@ -243,9 +247,14 @@ $(MEDIA_OBJ_DIR)/dmx.h.xml: $(srctree)/include/uapi/linux/dvb/dmx.h $(MEDIA_OBJ_</div><div class='ctx'> 	@(					\</div><div class='ctx'> 	echo "&lt;programlisting&gt;") &gt; $@</div><div class='ctx'> 	@(					\</div><div class='add'>+	for ident in $(ENUM_DEFS) ; do		\</div><div class='add'>+	  entity=`echo $$ident | tr _ -` ;	\</div><div class='add'>+	  r="$$r s/([^\w\-])$$ident([^\w\-])/\1\&amp;$$entity\;\2/g;";\</div><div class='add'>+	done;					\</div><div class='ctx'> 	expand --tabs=8 &lt; $&lt; |			\</div><div class='ctx'> 	  sed $(ESCAPE) $(DVB_DOCUMENTED) |	\</div><div class='del'>-	  sed 's/i\.e\./&amp;ie;/') &gt;&gt; $@</div><div class='add'>+	  sed 's/i\.e\./&amp;ie;/' |		\</div><div class='add'>+	  perl -ne "$$r print $$_;") &gt;&gt; $@</div><div class='ctx'> 	@(					\</div><div class='ctx'> 	echo "&lt;/programlisting&gt;") &gt;&gt; $@</div><div class='ctx'> </div><div class='hunk'>@@ -254,9 +263,14 @@ $(MEDIA_OBJ_DIR)/frontend.h.xml: $(srctree)/include/uapi/linux/dvb/frontend.h $(</div><div class='ctx'> 	@(					\</div><div class='ctx'> 	echo "&lt;programlisting&gt;") &gt; $@</div><div class='ctx'> 	@(					\</div><div class='add'>+	for ident in $(ENUM_DEFS) ; do		\</div><div class='add'>+	  entity=`echo $$ident | tr _ -` ;	\</div><div class='add'>+	  r="$$r s/([^\w\-])$$ident([^\w\-])/\1\&amp;$$entity\;\2/g;";\</div><div class='add'>+	done;					\</div><div class='ctx'> 	expand --tabs=8 &lt; $&lt; |			\</div><div class='ctx'> 	  sed $(ESCAPE) $(DVB_DOCUMENTED) |	\</div><div class='del'>-	  sed 's/i\.e\./&amp;ie;/') &gt;&gt; $@</div><div class='add'>+	  sed 's/i\.e\./&amp;ie;/' |		\</div><div class='add'>+	  perl -ne "$$r print $$_;") &gt;&gt; $@</div><div class='ctx'> 	@(					\</div><div class='ctx'> 	echo "&lt;/programlisting&gt;") &gt;&gt; $@</div><div class='ctx'> </div><div class='hunk'>@@ -298,11 +312,22 @@ $(MEDIA_OBJ_DIR)/media-entities.tmpl: $(MEDIA_OBJ_DIR)/v4l2.xml</div><div class='ctx'> 	@(								\</div><div class='ctx'> 	echo -e "\n&lt;!-- Ioctls --&gt;") &gt;&gt;$@</div><div class='ctx'> 	@(								\</div><div class='del'>-	for ident in $(IOCTLS) ; do					\</div><div class='add'>+	for ident in `echo $(IOCTLS) | sed -e "s,VIDIOC_RESERVED,,"`; do\</div><div class='ctx'> 	  entity=`echo $$ident | tr _ -` ;				\</div><div class='del'>-	  id=`grep "&lt;refname&gt;$$ident" $(MEDIA_OBJ_DIR)/vidioc-*.xml $(MEDIA_OBJ_DIR)/media-ioc-*.xml | sed -r s,"^.*/(.*).xml.*","\1",` ; \</div><div class='del'>-	  echo "&lt;!ENTITY $$entity \"&lt;link"				\</div><div class='add'>+	  id=`grep -e "&lt;refname&gt;$$ident" -e "&lt;section id=\"$$ident\"" $$(find $(MEDIA_SRC_DIR) -name *.xml -type f)| sed -r s,"^.*/(.*).xml.*","\1",` ; \</div><div class='add'>+	  if [ "$$id" != "" ]; then echo "&lt;!ENTITY $$entity \"&lt;link"	\</div><div class='ctx'> 	    "linkend='$$id'&gt;&lt;constant&gt;$$ident&lt;/constant&gt;&lt;/link&gt;\"&gt;"	\</div><div class='add'>+	  &gt;&gt;$@ ; else							\</div><div class='add'>+		echo "Warning: undocumented ioctl: $$ident. Please document it at the media DocBook!" &gt;&amp;2;	\</div><div class='add'>+	  fi;								\</div><div class='add'>+	done)</div><div class='add'>+	@(								\</div><div class='add'>+	echo -e "\n&lt;!-- Defines --&gt;") &gt;&gt;$@</div><div class='add'>+	@(								\</div><div class='add'>+	for ident in $(DEFINES) ; do					\</div><div class='add'>+	  entity=`echo $$ident | tr _ -` ;				\</div><div class='add'>+	  echo "&lt;!ENTITY $$entity \"&lt;link"				\</div><div class='add'>+	    "linkend='$$entity'&gt;&lt;constant&gt;$$ident&lt;/constant&gt;&lt;/link&gt;\"&gt;"	\</div><div class='ctx'> 	  &gt;&gt;$@ ;							\</div><div class='ctx'> 	done)</div><div class='ctx'> 	@(								\</div><div class='hunk'>@@ -322,6 +347,15 @@ $(MEDIA_OBJ_DIR)/media-entities.tmpl: $(MEDIA_OBJ_DIR)/v4l2.xml</div><div class='ctx'> 	    "linkend='$$entity'&gt;$$ident&lt;/link&gt;\"&gt;" &gt;&gt;$@ ;		\</div><div class='ctx'> 	done)</div><div class='ctx'> 	@(								\</div><div class='add'>+	echo -e "\n&lt;!-- Enum definitions --&gt;") &gt;&gt;$@</div><div class='add'>+	@(								\</div><div class='add'>+	for ident in $(ENUM_DEFS) ; do					\</div><div class='add'>+	  entity=`echo $$ident | tr _ -` ;				\</div><div class='add'>+	  echo "&lt;!ENTITY $$entity \"&lt;link"				\</div><div class='add'>+	    "linkend='$$entity'&gt;&lt;constant&gt;$$ident&lt;/constant&gt;&lt;/link&gt;\"&gt;"	\</div><div class='add'>+	  &gt;&gt;$@ ;							\</div><div class='add'>+	done)</div><div class='add'>+	@(								\</div><div class='ctx'> 	echo -e "\n&lt;!-- Structures --&gt;") &gt;&gt;$@</div><div class='ctx'> 	@(								\</div><div class='ctx'> 	for ident in $(STRUCTS) ; do					\</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/audio.xml b/Documentation/DocBook/media/dvb/audio.xml<br/>index a7ea56c71a27..ea56743ddbe7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/audio.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/audio.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/audio.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/audio.xml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> &lt;title&gt;DVB Audio Device&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;The DVB audio device controls the MPEG2 audio decoder of the DVB hardware. It</div><div class='del'>-can be accessed through &lt;emphasis role="tt"&gt;/dev/dvb/adapter0/audio0&lt;/emphasis&gt;. Data types and and</div><div class='del'>-ioctl definitions can be accessed by including &lt;emphasis role="tt"&gt;linux/dvb/audio.h&lt;/emphasis&gt; in your</div><div class='add'>+can be accessed through &lt;constant&gt;/dev/dvb/adapter?/audio?&lt;/constant&gt;. Data types and and</div><div class='add'>+ioctl definitions can be accessed by including &lt;constant&gt;linux/dvb/audio.h&lt;/constant&gt; in your</div><div class='ctx'> application.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;para&gt;Please note that some DVB cards don&amp;#8217;t have their own MPEG decoder, which results in</div><div class='hunk'>@@ -32,7 +32,7 @@ typedef enum {</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;para&gt;AUDIO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the</div><div class='ctx'> DVR device) as the source of the video stream. If AUDIO_SOURCE_MEMORY</div><div class='del'>-is selected the stream comes from the application through the &lt;emphasis role="tt"&gt;write()&lt;/emphasis&gt; system</div><div class='add'>+is selected the stream comes from the application through the &lt;constant&gt;write()&lt;/constant&gt; system</div><div class='ctx'> call.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/ca.xml b/Documentation/DocBook/media/dvb/ca.xml<br/>index 85eaf4fe2931..d0b07e763908 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/ca.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/ca.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/ca.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/ca.xml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> &lt;title&gt;DVB CA Device&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;The DVB CA device controls the conditional access hardware. It can be accessed through</div><div class='del'>-&lt;emphasis role="tt"&gt;/dev/dvb/adapter0/ca0&lt;/emphasis&gt;. Data types and and ioctl definitions can be accessed by</div><div class='del'>-including &lt;emphasis role="tt"&gt;linux/dvb/ca.h&lt;/emphasis&gt; in your application.</div><div class='add'>+&lt;constant&gt;/dev/dvb/adapter?/ca?&lt;/constant&gt;. Data types and and ioctl definitions can be accessed by</div><div class='add'>+including &lt;constant&gt;linux/dvb/ca.h&lt;/constant&gt; in your application.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="ca_data_types"&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/demux.xml b/Documentation/DocBook/media/dvb/demux.xml<br/>index c8683d66f059..34f2fb1cd601 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/demux.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/demux.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/demux.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/demux.xml</a></div><div class='hunk'>@@ -1,33 +1,50 @@</div><div class='ctx'> &lt;title&gt;DVB Demux Device&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;para&gt;The DVB demux device controls the filters of the DVB hardware/software. It can be</div><div class='del'>-accessed through &lt;emphasis role="tt"&gt;/dev/adapter0/demux0&lt;/emphasis&gt;. Data types and and ioctl definitions can be</div><div class='del'>-accessed by including &lt;emphasis role="tt"&gt;linux/dvb/dmx.h&lt;/emphasis&gt; in your application.</div><div class='add'>+accessed through &lt;constant&gt;/dev/adapter?/demux?&lt;/constant&gt;. Data types and and ioctl definitions can be</div><div class='add'>+accessed by including &lt;constant&gt;linux/dvb/dmx.h&lt;/constant&gt; in your application.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;section id="dmx_types"&gt;</div><div class='ctx'> &lt;title&gt;Demux Data Types&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="dmx-output-t"&gt;</div><div class='del'>-&lt;title&gt;dmx_output_t&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum</div><div class='del'>-{</div><div class='del'>-	DMX_OUT_DECODER, /&amp;#x22C6; Streaming directly to decoder. &amp;#x22C6;/</div><div class='del'>-	DMX_OUT_TAP,     /&amp;#x22C6; Output going to a memory buffer &amp;#x22C6;/</div><div class='del'>-			 /&amp;#x22C6; (to be retrieved via the read command).&amp;#x22C6;/</div><div class='del'>-	DMX_OUT_TS_TAP,  /&amp;#x22C6; Output multiplexed into a new TS  &amp;#x22C6;/</div><div class='del'>-			 /&amp;#x22C6; (to be retrieved by reading from the &amp;#x22C6;/</div><div class='del'>-			 /&amp;#x22C6; logical DVR device).                 &amp;#x22C6;/</div><div class='del'>-	DMX_OUT_TSDEMUX_TAP /&amp;#x22C6; Like TS_TAP but retrieved from the DMX device &amp;#x22C6;/</div><div class='del'>-} dmx_output_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;DMX_OUT_TAP&lt;/emphasis&gt; delivers the stream output to the demux device on which the ioctl is</div><div class='del'>-called.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;DMX_OUT_TS_TAP&lt;/emphasis&gt; routes output to the logical DVR device &lt;emphasis role="tt"&gt;/dev/dvb/adapter0/dvr0&lt;/emphasis&gt;,</div><div class='del'>-which delivers a TS multiplexed from all filters for which &lt;emphasis role="tt"&gt;DMX_OUT_TS_TAP&lt;/emphasis&gt; was</div><div class='del'>-specified.</div><div class='del'>-&lt;/para&gt;</div><div class='add'>+&lt;title&gt;Output for the demux&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="dmx-output"&gt;</div><div class='add'>+    &lt;title&gt;enum dmx_output&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+		&lt;entry align="char" id="DMX-OUT-DECODER"&gt;DMX_OUT_DECODER&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Streaming directly to decoder.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry align="char" id="DMX-OUT-TAP"&gt;DMX_OUT_TAP&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Output going to a memory buffer (to be retrieved via the</div><div class='add'>+		    read command). Delivers the stream output to the demux</div><div class='add'>+		    device on which the ioctl is called.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry align="char" id="DMX-OUT-TS-TAP"&gt;DMX_OUT_TS_TAP&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Output multiplexed into a new TS (to be retrieved by</div><div class='add'>+		    reading from the logical DVR device). Routes output to the</div><div class='add'>+		    logical DVR device &lt;constant&gt;/dev/dvb/adapter?/dvr?&lt;/constant&gt;,</div><div class='add'>+		    which delivers a TS multiplexed from all filters for which</div><div class='add'>+		    &lt;constant&gt;DMX_OUT_TS_TAP&lt;/constant&gt; was specified.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry align="char" id="DMX-OUT-TSDEMUX-TAP"&gt;DMX_OUT_TSDEMUX_TAP&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Like &amp;DMX-OUT-TS-TAP; but retrieved from the DMX</div><div class='add'>+		    device.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="dmx-input-t"&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/dvbapi.xml b/Documentation/DocBook/media/dvb/dvbapi.xml<br/>index 4c15396c67e5..858fd7d17104 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbapi.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/dvbapi.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbapi.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/dvbapi.xml</a></div><div class='hunk'>@@ -28,13 +28,23 @@</div><div class='ctx'> 	&lt;holder&gt;Convergence GmbH&lt;/holder&gt;</div><div class='ctx'> &lt;/copyright&gt;</div><div class='ctx'> &lt;copyright&gt;</div><div class='del'>-	&lt;year&gt;2009-2014&lt;/year&gt;</div><div class='add'>+	&lt;year&gt;2009-2015&lt;/year&gt;</div><div class='ctx'> 	&lt;holder&gt;Mauro Carvalho Chehab&lt;/holder&gt;</div><div class='ctx'> &lt;/copyright&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;revhistory&gt;</div><div class='ctx'> &lt;!-- Put document revisions here, newest first. --&gt;</div><div class='ctx'> &lt;revision&gt;</div><div class='add'>+	&lt;revnumber&gt;2.1.0&lt;/revnumber&gt;</div><div class='add'>+	&lt;date&gt;2015-05-29&lt;/date&gt;</div><div class='add'>+	&lt;authorinitials&gt;mcc&lt;/authorinitials&gt;</div><div class='add'>+	&lt;revremark&gt;</div><div class='add'>+		DocBook improvements and cleanups, in order to document the</div><div class='add'>+		system calls on a more standard way and provide more description</div><div class='add'>+		about the current DVB API.</div><div class='add'>+	&lt;/revremark&gt;</div><div class='add'>+&lt;/revision&gt;</div><div class='add'>+&lt;revision&gt;</div><div class='ctx'> 	&lt;revnumber&gt;2.0.4&lt;/revnumber&gt;</div><div class='ctx'> 	&lt;date&gt;2011-05-06&lt;/date&gt;</div><div class='ctx'> 	&lt;authorinitials&gt;mcc&lt;/authorinitials&gt;</div><div class='hunk'>@@ -95,18 +105,26 @@ Added ISDB-T test originally written by Patrick Boettcher</div><div class='ctx'>   &lt;chapter id="dvb_demux"&gt;</div><div class='ctx'>     &amp;sub-demux;</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='del'>-  &lt;chapter id="dvb_video"&gt;</div><div class='del'>-    &amp;sub-video;</div><div class='del'>-  &lt;/chapter&gt;</div><div class='del'>-  &lt;chapter id="dvb_audio"&gt;</div><div class='del'>-    &amp;sub-audio;</div><div class='del'>-  &lt;/chapter&gt;</div><div class='ctx'>   &lt;chapter id="dvb_ca"&gt;</div><div class='ctx'>     &amp;sub-ca;</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='del'>-  &lt;chapter id="dvb_net"&gt;</div><div class='add'>+  &lt;chapter id="net"&gt;</div><div class='ctx'>     &amp;sub-net;</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='add'>+  &lt;chapter id="legacy_dvb_apis"&gt;</div><div class='add'>+  &lt;title&gt;DVB Deprecated APIs&lt;/title&gt;</div><div class='add'>+  &lt;para&gt;The APIs described here are kept only for historical reasons. There's</div><div class='add'>+      just one driver for a very legacy hardware that uses this API. No</div><div class='add'>+      modern drivers should use it. Instead, audio and video should be using</div><div class='add'>+      the V4L2 and ALSA APIs, and the pipelines should be set using the</div><div class='add'>+      Media Controller API&lt;/para&gt;</div><div class='add'>+    &lt;section id="dvb_video"&gt;</div><div class='add'>+	&amp;sub-video;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+    &lt;section id="dvb_audio"&gt;</div><div class='add'>+	&amp;sub-audio;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+  &lt;/chapter&gt;</div><div class='ctx'>   &lt;chapter id="dvb_kdapi"&gt;</div><div class='ctx'>     &amp;sub-kdapi;</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/dvbproperty.xml b/Documentation/DocBook/media/dvb/dvbproperty.xml<br/>index 3018564ddfd9..08227d4e9150 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbproperty.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/dvbproperty.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbproperty.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/dvbproperty.xml</a></div><div class='hunk'>@@ -1,14 +1,88 @@</div><div class='del'>-&lt;section id="FE_GET_SET_PROPERTY"&gt;</div><div class='del'>-&lt;title&gt;&lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-&lt;para&gt;This section describes the DVB version 5 extension of the DVB-API, also</div><div class='del'>-called "S2API", as this API were added to provide support for DVB-S2. It was</div><div class='del'>-designed to be able to replace the old frontend API. Yet, the DISEQC and</div><div class='del'>-the capability ioctls weren't implemented yet via the new way.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;The typical usage for the &lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;</div><div class='del'>-API is to replace the ioctl's were the &lt;link linkend="dvb-frontend-parameters"&gt;</div><div class='del'>-struct &lt;constant&gt;dvb_frontend_parameters&lt;/constant&gt;&lt;/link&gt; were used.&lt;/para&gt;</div><div class='add'>+&lt;section id="frontend-properties"&gt;</div><div class='add'>+&lt;title&gt;DVB Frontend properties&lt;/title&gt;</div><div class='add'>+&lt;para&gt;Tuning into a Digital TV physical channel and starting decoding it</div><div class='add'>+    requires changing a set of parameters, in order to control the</div><div class='add'>+    tuner, the demodulator, the Linear Low-noise Amplifier (LNA) and to set the</div><div class='add'>+    antenna subsystem via Satellite Equipment Control (SEC), on satellite</div><div class='add'>+    systems. The actual parameters are specific to each particular digital</div><div class='add'>+    TV standards, and may change as the digital TV specs evolves.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;In the past, the strategy used was to have a union with the parameters</div><div class='add'>+    needed to tune for DVB-S, DVB-C, DVB-T and ATSC delivery systems grouped</div><div class='add'>+    there. The problem is that, as the second generation standards appeared,</div><div class='add'>+    those structs were not big enough to contain the additional parameters.</div><div class='add'>+    Also, the union didn't have any space left to be expanded without breaking</div><div class='add'>+    userspace. So, the decision was to deprecate the legacy union/struct based</div><div class='add'>+    approach, in favor of a properties set approach.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;NOTE: on Linux DVB API version 3, setting a frontend were done via</div><div class='add'>+    &lt;link linkend="dvb-frontend-parameters"&gt;struct  &lt;constant&gt;dvb_frontend_parameters&lt;/constant&gt;&lt;/link&gt;.</div><div class='add'>+    This got replaced on version 5 (also called "S2API", as this API were</div><div class='add'>+    added originally_enabled to provide support for DVB-S2), because the old</div><div class='add'>+    API has a very limited support to new standards and new hardware. This</div><div class='add'>+    section describes the new and recommended way to set the frontend, with</div><div class='add'>+    suppports all digital TV delivery systems.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Example: with the properties based approach, in order to set the tuner</div><div class='add'>+    to a DVB-C channel at 651 kHz, modulated with 256-QAM, FEC 3/4 and symbol</div><div class='add'>+    rate of 5.217 Mbauds, those properties should be sent to</div><div class='add'>+    &lt;link linkend="FE_GET_PROPERTY"&gt;&lt;constant&gt;FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt; ioctl:&lt;/para&gt;</div><div class='add'>+    &lt;itemizedlist&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-DELIVERY-SYSTEM; = SYS_DVBC_ANNEX_A&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-FREQUENCY; = 651000000&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-MODULATION; = QAM_256&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-INVERSION; = INVERSION_AUTO&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-SYMBOL-RATE; = 5217000&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-INNER-FEC; = FEC_3_4&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;&lt;para&gt;&amp;DTV-TUNE;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;/itemizedlist&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;The code that would do the above is:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+#include &amp;lt;stdio.h&amp;gt;</div><div class='add'>+#include &amp;lt;fcntl.h&amp;gt;</div><div class='add'>+#include &amp;lt;sys/ioctl.h&amp;gt;</div><div class='add'>+#include &amp;lt;linux/dvb/frontend.h&amp;gt;</div><div class='add'>+</div><div class='add'>+static struct dtv_property props[] = {</div><div class='add'>+	{ .cmd = DTV_DELIVERY_SYSTEM, .u.data = SYS_DVBC_ANNEX_A },</div><div class='add'>+	{ .cmd = DTV_FREQUENCY,       .u.data = 651000000 },</div><div class='add'>+	{ .cmd = DTV_MODULATION,      .u.data = QAM_256 },</div><div class='add'>+	{ .cmd = DTV_INVERSION,       .u.data = INVERSION_AUTO },</div><div class='add'>+	{ .cmd = DTV_SYMBOL_RATE,     .u.data = 5217000 },</div><div class='add'>+	{ .cmd = DTV_INNER_FEC,       .u.data = FEC_3_4 },</div><div class='add'>+	{ .cmd = DTV_TUNE }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dtv_properties dtv_prop = {</div><div class='add'>+	.num = 6, .props = props</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int main(void)</div><div class='add'>+{</div><div class='add'>+	int fd = open("/dev/dvb/adapter0/frontend0", O_RDWR);</div><div class='add'>+</div><div class='add'>+	if (!fd) {</div><div class='add'>+	    perror ("open");</div><div class='add'>+	    return -1;</div><div class='add'>+	}</div><div class='add'>+	if (ioctl(fd, FE_SET_PROPERTY, &amp;amp;dtv_prop) == -1) {</div><div class='add'>+		perror("ioctl");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	printf("Frontend set\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;NOTE: While it is possible to directly call the Kernel code like the</div><div class='add'>+    above example, it is strongly recommended to use</div><div class='add'>+    &lt;ulink url="http://linuxtv.org/docs/libdvbv5/index.html"&gt;libdvbv5&lt;/ulink&gt;,</div><div class='add'>+    as it provides abstraction to work with the supported digital TV standards</div><div class='add'>+    and provides methods for usual operations like program scanning and to</div><div class='add'>+    read/write channel descriptor files.&lt;/para&gt;</div><div class='add'>+</div><div class='ctx'> &lt;section id="dtv-stats"&gt;</div><div class='del'>-&lt;title&gt;DTV stats type&lt;/title&gt;</div><div class='add'>+&lt;title&gt;struct &lt;structname&gt;dtv_stats&lt;/structname&gt;&lt;/title&gt;</div><div class='ctx'> &lt;programlisting&gt;</div><div class='ctx'> struct dtv_stats {</div><div class='ctx'> 	__u8 scale;	/* enum fecap_scale_params type */</div><div class='hunk'>@@ -20,19 +94,19 @@ struct dtv_stats {</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> &lt;section id="dtv-fe-stats"&gt;</div><div class='del'>-&lt;title&gt;DTV stats type&lt;/title&gt;</div><div class='add'>+&lt;title&gt;struct &lt;structname&gt;dtv_fe_stats&lt;/structname&gt;&lt;/title&gt;</div><div class='ctx'> &lt;programlisting&gt;</div><div class='ctx'> #define MAX_DTV_STATS   4</div><div class='ctx'> </div><div class='ctx'> struct dtv_fe_stats {</div><div class='ctx'> 	__u8 len;</div><div class='del'>-	struct dtv_stats stat[MAX_DTV_STATS];</div><div class='add'>+	&amp;dtv-stats; stat[MAX_DTV_STATS];</div><div class='ctx'> } __packed;</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="dtv-property"&gt;</div><div class='del'>-&lt;title&gt;DTV property type&lt;/title&gt;</div><div class='add'>+&lt;title&gt;struct &lt;structname&gt;dtv_property&lt;/structname&gt;&lt;/title&gt;</div><div class='ctx'> &lt;programlisting&gt;</div><div class='ctx'> /* Reserved fields should be set to 0 */</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +115,7 @@ struct dtv_property {</div><div class='ctx'> 	__u32 reserved[3];</div><div class='ctx'> 	union {</div><div class='ctx'> 		__u32 data;</div><div class='del'>-		struct dtv_fe_stats st;</div><div class='add'>+		&amp;dtv-fe-stats; st;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			__u8 data[32];</div><div class='ctx'> 			__u32 len;</div><div class='hunk'>@@ -57,115 +131,19 @@ struct dtv_property {</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> &lt;section id="dtv-properties"&gt;</div><div class='del'>-&lt;title&gt;DTV properties type&lt;/title&gt;</div><div class='add'>+&lt;title&gt;struct &lt;structname&gt;dtv_properties&lt;/structname&gt;&lt;/title&gt;</div><div class='ctx'> &lt;programlisting&gt;</div><div class='ctx'> struct dtv_properties {</div><div class='ctx'> 	__u32 num;</div><div class='del'>-	struct dtv_property *props;</div><div class='add'>+	&amp;dtv-property; *props;</div><div class='ctx'> };</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="FE_GET_PROPERTY"&gt;</div><div class='del'>-&lt;title&gt;FE_GET_PROPERTY&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns one or more frontend properties. This call only</div><div class='del'>- requires read-only access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_GET_PROPERTY"&gt;FE_GET_PROPERTY&lt;/link&gt;,</div><div class='del'>- dtv_properties &amp;#x22C6;props);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int num&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_GET_PROPERTY"&gt;FE_GET_PROPERTY&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct dtv_property *props&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to the location where the front-end property commands are stored.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-  &lt;entry align="char"&gt;&lt;para&gt;EOPNOTSUPP&lt;/para&gt;&lt;/entry&gt;</div><div class='del'>-  &lt;entry align="char"&gt;&lt;para&gt;Property type not supported.&lt;/para&gt;&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_SET_PROPERTY"&gt;</div><div class='del'>-&lt;title&gt;FE_SET_PROPERTY&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call sets one or more frontend properties. This call</div><div class='del'>- requires read/write access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_SET_PROPERTY"&gt;FE_SET_PROPERTY&lt;/link&gt;,</div><div class='del'>- dtv_properties &amp;#x22C6;props);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int num&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_PROPERTY"&gt;FE_SET_PROPERTY&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct dtv_property *props&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to the location where the front-end property commands are stored.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-  &lt;entry align="char"&gt;&lt;para&gt;EOPNOTSUPP&lt;/para&gt;&lt;/entry&gt;</div><div class='del'>-  &lt;entry align="char"&gt;&lt;para&gt;Property type not supported.&lt;/para&gt;&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='ctx'> &lt;section&gt;</div><div class='ctx'> 	&lt;title&gt;Property types&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;</div><div class='del'>-On &lt;link linkend="FE_GET_PROPERTY"&gt;FE_GET_PROPERTY&lt;/link&gt;/&lt;link linkend="FE_SET_PROPERTY"&gt;FE_SET_PROPERTY&lt;/link&gt;,</div><div class='add'>+On &lt;link linkend="FE_GET_PROPERTY"&gt;FE_GET_PROPERTY and FE_SET_PROPERTY&lt;/link&gt;,</div><div class='ctx'> the actual action is determined by the dtv_property cmd/data pairs. With one single ioctl, is possible to</div><div class='ctx'> get/set up to 64 properties. The actual meaning of each property is described on the next sections.</div><div class='ctx'> &lt;/para&gt;</div><div class='hunk'>@@ -193,7 +171,7 @@ get/set up to 64 properties. The actual meaning of each property is described on</div><div class='ctx'> 		&lt;para&gt;Central frequency of the channel.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> 		&lt;para&gt;Notes:&lt;/para&gt;</div><div class='del'>-		&lt;para&gt;1)For satellital delivery systems, it is measured in kHz.</div><div class='add'>+		&lt;para&gt;1)For satellite delivery systems, it is measured in kHz.</div><div class='ctx'> 			For the other ones, it is measured in Hz.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;2)For ISDB-T, the channels are usually transmitted with an offset of 143kHz.</div><div class='ctx'> 			E.g. a valid frequency could be 474143 kHz. The stepping is bound to the bandwidth of</div><div class='hunk'>@@ -205,25 +183,78 @@ get/set up to 64 properties. The actual meaning of each property is described on</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-MODULATION"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_MODULATION&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-&lt;para&gt;Specifies the frontend modulation type for cable and satellite types. The modulation can be one of the types bellow:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>- typedef enum fe_modulation {</div><div class='del'>-	QPSK,</div><div class='del'>-	QAM_16,</div><div class='del'>-	QAM_32,</div><div class='del'>-	QAM_64,</div><div class='del'>-	QAM_128,</div><div class='del'>-	QAM_256,</div><div class='del'>-	QAM_AUTO,</div><div class='del'>-	VSB_8,</div><div class='del'>-	VSB_16,</div><div class='del'>-	PSK_8,</div><div class='del'>-	APSK_16,</div><div class='del'>-	APSK_32,</div><div class='del'>-	DQPSK,</div><div class='del'>-	QAM_4_NR,</div><div class='del'>- } fe_modulation_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+&lt;para&gt;Specifies the frontend modulation type for delivery systems that supports</div><div class='add'>+    more than one modulation type. The modulation can be one of the types</div><div class='add'>+    defined by &amp;fe-modulation;.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-modulation-t"&gt;</div><div class='add'>+&lt;title&gt;Modulation property&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Most of the digital TV standards currently offers more than one possible</div><div class='add'>+    modulation (sometimes called as "constellation" on some standards). This</div><div class='add'>+    enum contains the values used by the Kernel. Please note that not all</div><div class='add'>+    modulations are supported by a given standard.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-modulation"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_modulation&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QPSK"&gt;&lt;constant&gt;QPSK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;QPSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-16"&gt;&lt;constant&gt;QAM_16&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;16-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-32"&gt;&lt;constant&gt;QAM_32&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;32-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-64"&gt;&lt;constant&gt;QAM_64&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;64-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-128"&gt;&lt;constant&gt;QAM_128&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;128-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-256"&gt;&lt;constant&gt;QAM_256&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;256-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-AUTO"&gt;&lt;constant&gt;QAM_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="VSB-8"&gt;&lt;constant&gt;VSB_8&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;8-VSB modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="VSB-16"&gt;&lt;constant&gt;VSB_16&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;16-VSB modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="PSK-8"&gt;&lt;constant&gt;PSK_8&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;8-PSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="APSK-16"&gt;&lt;constant&gt;APSK_16&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;16-APSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="APSK-32"&gt;&lt;constant&gt;APSK_32&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;32-APSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="DQPSK"&gt;&lt;constant&gt;DQPSK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;DQPSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="QAM-4-NR"&gt;&lt;constant&gt;QAM_4_NR&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;4-QAM-NR modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-BANDWIDTH-HZ"&gt;</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_BANDWIDTH_HZ&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -253,19 +284,45 @@ get/set up to 64 properties. The actual meaning of each property is described on</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-INVERSION"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_INVERSION&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-	&lt;para&gt;The Inversion field can take one of these values:</div><div class='del'>-	&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-	typedef enum fe_spectral_inversion {</div><div class='del'>-		INVERSION_OFF,</div><div class='del'>-		INVERSION_ON,</div><div class='del'>-		INVERSION_AUTO</div><div class='del'>-	} fe_spectral_inversion_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='del'>-	&lt;para&gt;It indicates if spectral inversion should be presumed or not. In the automatic setting</div><div class='del'>-	(&lt;constant&gt;INVERSION_AUTO&lt;/constant&gt;) the hardware will try to figure out the correct setting by</div><div class='del'>-	itself.</div><div class='del'>-	&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;Specifies if the frontend should do spectral inversion or not.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-spectral-inversion-t"&gt;</div><div class='add'>+&lt;title&gt;enum fe_modulation: Frontend spectral inversion&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;This parameter indicates if spectral inversion should be presumed or not.</div><div class='add'>+    In the automatic setting (&lt;constant&gt;INVERSION_AUTO&lt;/constant&gt;) the hardware</div><div class='add'>+    will try to figure out the correct setting by itself. If the hardware</div><div class='add'>+    doesn't support, the DVB core will try to lock at the carrier first with</div><div class='add'>+    inversion off. If it fails, it will try to enable inversion.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-spectral-inversion"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_modulation&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INVERSION-OFF"&gt;&lt;constant&gt;INVERSION_OFF&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Don't do spectral band inversion.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INVERSION-ON"&gt;&lt;constant&gt;INVERSION_ON&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Do spectral band inversion.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INVERSION-AUTO"&gt;&lt;constant&gt;INVERSION_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect spectral band inversion.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-DISEQC-MASTER"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_DISEQC_MASTER&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -279,25 +336,64 @@ get/set up to 64 properties. The actual meaning of each property is described on</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_INNER_FEC&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 	&lt;para&gt;Used cable/satellite transmissions. The acceptable values are:</div><div class='ctx'> 	&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_code_rate {</div><div class='del'>-	FEC_NONE = 0,</div><div class='del'>-	FEC_1_2,</div><div class='del'>-	FEC_2_3,</div><div class='del'>-	FEC_3_4,</div><div class='del'>-	FEC_4_5,</div><div class='del'>-	FEC_5_6,</div><div class='del'>-	FEC_6_7,</div><div class='del'>-	FEC_7_8,</div><div class='del'>-	FEC_8_9,</div><div class='del'>-	FEC_AUTO,</div><div class='del'>-	FEC_3_5,</div><div class='del'>-	FEC_9_10,</div><div class='del'>-	FEC_2_5,</div><div class='del'>-} fe_code_rate_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='del'>-	&lt;para&gt;which correspond to error correction rates of 1/2, 2/3, etc.,</div><div class='del'>-	no error correction or auto detection.&lt;/para&gt;</div><div class='add'>+&lt;section id="fe-code-rate-t"&gt;</div><div class='add'>+&lt;title&gt;enum fe_code_rate: type of the Forward Error Correction.&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-code-rate"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_code_rate&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-NONE"&gt;&lt;constant&gt;FEC_NONE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;No Forward Error Correction Code&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-AUTO"&gt;&lt;constant&gt;FEC_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect Error Correction Code&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-1-2"&gt;&lt;constant&gt;FEC_1_2&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 1/2&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-2-3"&gt;&lt;constant&gt;FEC_2_3&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 2/3&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-3-4"&gt;&lt;constant&gt;FEC_3_4&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 3/4&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-4-5"&gt;&lt;constant&gt;FEC_4_5&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 4/5&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-5-6"&gt;&lt;constant&gt;FEC_5_6&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 5/6&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-6-7"&gt;&lt;constant&gt;FEC_6_7&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 6/7&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-7-8"&gt;&lt;constant&gt;FEC_7_8&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 7/8&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-8-9"&gt;&lt;constant&gt;FEC_8_9&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 8/9&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-9-10"&gt;&lt;constant&gt;FEC_9_10&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 9/10&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-2-5"&gt;&lt;constant&gt;FEC_2_5&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 2/5&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="FEC-3-5"&gt;&lt;constant&gt;FEC_3_5&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Forward Error Correction Code 3/5&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-VOLTAGE"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_VOLTAGE&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -305,12 +401,31 @@ typedef enum fe_code_rate {</div><div class='ctx'> 	the polarzation (horizontal/vertical). When using DiSEqC epuipment this</div><div class='ctx'> 	voltage has to be switched consistently to the DiSEqC commands as</div><div class='ctx'> 	described in the DiSEqC spec.&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-		typedef enum fe_sec_voltage {</div><div class='del'>-		SEC_VOLTAGE_13,</div><div class='del'>-		SEC_VOLTAGE_18</div><div class='del'>-		} fe_sec_voltage_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-sec-voltage"&gt;</div><div class='add'>+    &lt;title id="fe-sec-voltage-t"&gt;enum fe_sec_voltage&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-VOLTAGE-13"&gt;&lt;constant&gt;SEC_VOLTAGE_13&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Set DC voltage level to 13V&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-VOLTAGE-18"&gt;&lt;constant&gt;SEC_VOLTAGE_18&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Set DC voltage level to 18V&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-VOLTAGE-OFF"&gt;&lt;constant&gt;SEC_VOLTAGE_OFF&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Don't send any voltage to the antenna&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-TONE"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_TONE&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -321,13 +436,30 @@ typedef enum fe_code_rate {</div><div class='ctx'> 	&lt;para&gt;Sets DVB-S2 pilot&lt;/para&gt;</div><div class='ctx'> 	&lt;section id="fe-pilot-t"&gt;</div><div class='ctx'> 		&lt;title&gt;fe_pilot type&lt;/title&gt;</div><div class='del'>-		&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_pilot {</div><div class='del'>-	PILOT_ON,</div><div class='del'>-	PILOT_OFF,</div><div class='del'>-	PILOT_AUTO,</div><div class='del'>-} fe_pilot_t;</div><div class='del'>-		&lt;/programlisting&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-pilot"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_pilot&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="PILOT-ON"&gt;&lt;constant&gt;PILOT_ON&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Pilot tones enabled&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="PILOT-OFF"&gt;&lt;constant&gt;PILOT_OFF&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Pilot tones disabled&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="PILOT-AUTO"&gt;&lt;constant&gt;PILOT_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Autodetect pilot tones&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-ROLLOFF"&gt;</div><div class='hunk'>@@ -336,14 +468,33 @@ typedef enum fe_pilot {</div><div class='ctx'> </div><div class='ctx'> 	&lt;section id="fe-rolloff-t"&gt;</div><div class='ctx'> 		&lt;title&gt;fe_rolloff type&lt;/title&gt;</div><div class='del'>-		&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_rolloff {</div><div class='del'>-	ROLLOFF_35, /* Implied value in DVB-S, default for DVB-S2 */</div><div class='del'>-	ROLLOFF_20,</div><div class='del'>-	ROLLOFF_25,</div><div class='del'>-	ROLLOFF_AUTO,</div><div class='del'>-} fe_rolloff_t;</div><div class='del'>-		&lt;/programlisting&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-rolloff"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_rolloff&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="ROLLOFF-35"&gt;&lt;constant&gt;ROLLOFF_35&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Roloff factor: &amp;alpha;=35%&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="ROLLOFF-20"&gt;&lt;constant&gt;ROLLOFF_20&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Roloff factor: &amp;alpha;=20%&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="ROLLOFF-25"&gt;&lt;constant&gt;ROLLOFF_25&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Roloff factor: &amp;alpha;=25%&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="ROLLOFF-AUTO"&gt;&lt;constant&gt;ROLLOFF_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Auto-detect the roloff factor.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-DISEQC-SLAVE-REPLY"&gt;</div><div class='hunk'>@@ -364,31 +515,82 @@ typedef enum fe_rolloff {</div><div class='ctx'> 		&lt;section id="fe-delivery-system-t"&gt;</div><div class='ctx'> 		&lt;title&gt;fe_delivery_system type&lt;/title&gt;</div><div class='ctx'> 		&lt;para&gt;Possible values: &lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='ctx'> </div><div class='del'>-typedef enum fe_delivery_system {</div><div class='del'>-	SYS_UNDEFINED,</div><div class='del'>-	SYS_DVBC_ANNEX_A,</div><div class='del'>-	SYS_DVBC_ANNEX_B,</div><div class='del'>-	SYS_DVBT,</div><div class='del'>-	SYS_DSS,</div><div class='del'>-	SYS_DVBS,</div><div class='del'>-	SYS_DVBS2,</div><div class='del'>-	SYS_DVBH,</div><div class='del'>-	SYS_ISDBT,</div><div class='del'>-	SYS_ISDBS,</div><div class='del'>-	SYS_ISDBC,</div><div class='del'>-	SYS_ATSC,</div><div class='del'>-	SYS_ATSCMH,</div><div class='del'>-	SYS_DTMB,</div><div class='del'>-	SYS_CMMB,</div><div class='del'>-	SYS_DAB,</div><div class='del'>-	SYS_DVBT2,</div><div class='del'>-	SYS_TURBO,</div><div class='del'>-	SYS_DVBC_ANNEX_C,</div><div class='del'>-} fe_delivery_system_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		&lt;/section&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-delivery-system"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_delivery_system&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-UNDEFINED"&gt;&lt;constant&gt;SYS_UNDEFINED&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Undefined standard. Generally, indicates an error&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBC-ANNEX-A"&gt;&lt;constant&gt;SYS_DVBC_ANNEX_A&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Cable TV: DVB-C following ITU-T J.83 Annex A spec&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBC-ANNEX-B"&gt;&lt;constant&gt;SYS_DVBC_ANNEX_B&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Cable TV: DVB-C following ITU-T J.83 Annex B spec (ClearQAM)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBC-ANNEX-C"&gt;&lt;constant&gt;SYS_DVBC_ANNEX_C&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Cable TV: DVB-C following ITU-T J.83 Annex C spec&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-ISDBC"&gt;&lt;constant&gt;SYS_ISDBC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Cable TV: ISDB-C (no drivers yet)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBT"&gt;&lt;constant&gt;SYS_DVBT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV: DVB-T&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBT2"&gt;&lt;constant&gt;SYS_DVBT2&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV: DVB-T2&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-ISDBT"&gt;&lt;constant&gt;SYS_ISDBT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV: ISDB-T&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-ATSC"&gt;&lt;constant&gt;SYS_ATSC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV: ATSC&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-ATSCMH"&gt;&lt;constant&gt;SYS_ATSCMH&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV (mobile): ATSC-M/H&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DTMB"&gt;&lt;constant&gt;SYS_DTMB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestrial TV: DTMB&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBS"&gt;&lt;constant&gt;SYS_DVBS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Satellite TV: DVB-S&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBS2"&gt;&lt;constant&gt;SYS_DVBS2&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Satellite TV: DVB-S2&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-TURBO"&gt;&lt;constant&gt;SYS_TURBO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Satellite TV: DVB-S Turbo&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-ISDBS"&gt;&lt;constant&gt;SYS_ISDBS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Satellite TV: ISDB-S&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DAB"&gt;&lt;constant&gt;SYS_DAB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Digital audio: DAB (not fully supported)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DSS"&gt;&lt;constant&gt;SYS_DSS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Satellite TV:"DSS (not fully supported)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-CMMB"&gt;&lt;constant&gt;SYS_CMMB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV (mobile):CMMB (not fully supported)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+		&lt;entry id="SYS-DVBH"&gt;&lt;constant&gt;SYS_DVBH&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;entry&gt;Terrestral TV (mobile): DVB-H (standard deprecated)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-ISDBT-PARTIAL-RECEPTION"&gt;</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_ISDBT_PARTIAL_RECEPTION&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -630,114 +832,177 @@ typedef enum fe_delivery_system {</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-RS-FRAME-MODE"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_MODE&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-			&lt;para&gt;RS frame mode.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Reed Solomon (RS) frame mode.&lt;/para&gt;</div><div class='ctx'> 			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-		  &lt;para id="atscmh-rs-frame-mode"&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_rs_frame_mode {</div><div class='del'>-	ATSCMH_RSFRAME_PRI_ONLY  = 0,</div><div class='del'>-	ATSCMH_RSFRAME_PRI_SEC   = 1,</div><div class='del'>-} atscmh_rs_frame_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		  &lt;/para&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="atscmh-rs-frame-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum atscmh_rs_frame_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSFRAME-PRI-ONLY"&gt;&lt;constant&gt;ATSCMH_RSFRAME_PRI_ONLY&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Single Frame: There is only a primary RS Frame for all</div><div class='add'>+		Group Regions.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSFRAME-PRI-SEC"&gt;&lt;constant&gt;ATSCMH_RSFRAME_PRI_SEC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Dual Frame: There are two separate RS Frames: Primary RS</div><div class='add'>+		Frame for Group Region A and B and Secondary RS Frame for Group</div><div class='add'>+		Region C and D.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-RS-FRAME-ENSEMBLE"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_ENSEMBLE&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-			&lt;para&gt;RS frame ensemble.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Reed Solomon(RS) frame ensemble.&lt;/para&gt;</div><div class='ctx'> 			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-		  &lt;para id="atscmh-rs-frame-ensemble"&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_rs_frame_ensemble {</div><div class='del'>-	ATSCMH_RSFRAME_ENS_PRI   = 0,</div><div class='del'>-	ATSCMH_RSFRAME_ENS_SEC   = 1,</div><div class='del'>-} atscmh_rs_frame_ensemble_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		  &lt;/para&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="atscmh-rs-frame-ensemble"&gt;</div><div class='add'>+    &lt;title&gt;enum atscmh_rs_frame_ensemble&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSFRAME-ENS-PRI"&gt;&lt;constant&gt;ATSCMH_RSFRAME_ENS_PRI&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Primary Ensemble.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSFRAME-ENS-SEC"&gt;&lt;constant&gt;AATSCMH_RSFRAME_PRI_SEC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Secondary Ensemble.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSFRAME-RES"&gt;&lt;constant&gt;AATSCMH_RSFRAME_RES&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved. Shouldn't be used.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-RS-CODE-MODE-PRI"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_CODE_MODE_PRI&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-			&lt;para&gt;RS code mode (primary).&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Reed Solomon (RS) code mode (primary).&lt;/para&gt;</div><div class='ctx'> 			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-		  &lt;para id="atscmh-rs-code-mode"&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_rs_code_mode {</div><div class='del'>-	ATSCMH_RSCODE_211_187    = 0,</div><div class='del'>-	ATSCMH_RSCODE_223_187    = 1,</div><div class='del'>-	ATSCMH_RSCODE_235_187    = 2,</div><div class='del'>-} atscmh_rs_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		  &lt;/para&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="atscmh-rs-code-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum atscmh_rs_code_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSCODE-211-187"&gt;&lt;constant&gt;ATSCMH_RSCODE_211_187&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reed Solomon code (211,187).&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSCODE-223-187"&gt;&lt;constant&gt;ATSCMH_RSCODE_223_187&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reed Solomon code (223,187).&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSCODE-235-187"&gt;&lt;constant&gt;ATSCMH_RSCODE_235_187&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reed Solomon code (235,187).&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-RSCODE-RES"&gt;&lt;constant&gt;ATSCMH_RSCODE_RES&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved. Shouldn't be used.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-RS-CODE-MODE-SEC"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_CODE_MODE_SEC&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-			&lt;para&gt;RS code mode (secondary).&lt;/para&gt;</div><div class='del'>-			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_rs_code_mode {</div><div class='del'>-	ATSCMH_RSCODE_211_187    = 0,</div><div class='del'>-	ATSCMH_RSCODE_223_187    = 1,</div><div class='del'>-	ATSCMH_RSCODE_235_187    = 2,</div><div class='del'>-} atscmh_rs_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+			&lt;para&gt;Reed Solomon (RS) code mode (secondary).&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are the same as documented on</div><div class='add'>+			    &amp;atscmh-rs-code-mode;:&lt;/para&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-SCCC-BLOCK-MODE"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_BLOCK_MODE&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 			&lt;para&gt;Series Concatenated Convolutional Code Block Mode.&lt;/para&gt;</div><div class='ctx'> 			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-		  &lt;para id="atscmh-sccc-block-mode"&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_sccc_block_mode {</div><div class='del'>-	ATSCMH_SCCC_BLK_SEP      = 0,</div><div class='del'>-	ATSCMH_SCCC_BLK_COMB     = 1,</div><div class='del'>-} atscmh_sccc_block_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		  &lt;/para&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="atscmh-sccc-block-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum atscmh_scc_block_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-BLK-SEP"&gt;&lt;constant&gt;ATSCMH_SCCC_BLK_SEP&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Separate SCCC: the SCCC outer code mode shall be set independently</div><div class='add'>+		for each Group Region (A, B, C, D)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-BLK-COMB"&gt;&lt;constant&gt;ATSCMH_SCCC_BLK_COMB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Combined SCCC: all four Regions shall have the same SCCC outer</div><div class='add'>+		code mode.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-BLK-RES"&gt;&lt;constant&gt;ATSCMH_SCCC_BLK_RES&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved. Shouldn't be used.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-A"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_A&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='ctx'> 			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-		  &lt;para id="atscmh-sccc-code-mode"&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_sccc_code_mode {</div><div class='del'>-	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='del'>-	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='del'>-} atscmh_sccc_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-		  &lt;/para&gt;</div><div class='add'>+&lt;table pgwide="1" frame="none" id="atscmh-sccc-code-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum atscmh_sccc_code_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-CODE-HLF"&gt;&lt;constant&gt;ATSCMH_SCCC_CODE_HLF&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The outer code rate of a SCCC Block is 1/2 rate.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-CODE-QTR"&gt;&lt;constant&gt;ATSCMH_SCCC_CODE_QTR&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The outer code rate of a SCCC Block is 1/4 rate.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="ATSCMH-SCCC-CODE-RES"&gt;&lt;constant&gt;ATSCMH_SCCC_CODE_RES&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;to be documented.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-B"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_B&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='del'>-			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_sccc_code_mode {</div><div class='del'>-	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='del'>-	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='del'>-} atscmh_sccc_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+			&lt;para&gt;Possible values are the same as documented on</div><div class='add'>+			    &amp;atscmh-sccc-code-mode;.&lt;/para&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-C"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_C&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='del'>-			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_sccc_code_mode {</div><div class='del'>-	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='del'>-	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='del'>-} atscmh_sccc_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+			&lt;para&gt;Possible values are the same as documented on</div><div class='add'>+			    &amp;atscmh-sccc-code-mode;.&lt;/para&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-D"&gt;</div><div class='ctx'> 			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_D&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='del'>-			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum atscmh_sccc_code_mode {</div><div class='del'>-	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='del'>-	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='del'>-} atscmh_sccc_code_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+			&lt;para&gt;Possible values are the same as documented on</div><div class='add'>+			    &amp;atscmh-sccc-code-mode;.&lt;/para&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-API-VERSION"&gt;</div><div class='hunk'>@@ -746,65 +1011,74 @@ typedef enum atscmh_sccc_code_mode {</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-CODE-RATE-HP"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_CODE_RATE_HP&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-	&lt;para&gt;Used on terrestrial transmissions. The acceptable values are:</div><div class='add'>+	&lt;para&gt;Used on terrestrial transmissions.  The acceptable values are</div><div class='add'>+	    the ones described at &amp;fe-transmit-mode-t;.</div><div class='ctx'> 	&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_code_rate {</div><div class='del'>-	FEC_NONE = 0,</div><div class='del'>-	FEC_1_2,</div><div class='del'>-	FEC_2_3,</div><div class='del'>-	FEC_3_4,</div><div class='del'>-	FEC_4_5,</div><div class='del'>-	FEC_5_6,</div><div class='del'>-	FEC_6_7,</div><div class='del'>-	FEC_7_8,</div><div class='del'>-	FEC_8_9,</div><div class='del'>-	FEC_AUTO,</div><div class='del'>-	FEC_3_5,</div><div class='del'>-	FEC_9_10,</div><div class='del'>-} fe_code_rate_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-CODE-RATE-LP"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_CODE_RATE_LP&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-	&lt;para&gt;Used on terrestrial transmissions. The acceptable values are:</div><div class='add'>+	&lt;para&gt;Used on terrestrial transmissions. The acceptable values are</div><div class='add'>+	    the ones described at &amp;fe-transmit-mode-t;.</div><div class='ctx'> 	&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_code_rate {</div><div class='del'>-	FEC_NONE = 0,</div><div class='del'>-	FEC_1_2,</div><div class='del'>-	FEC_2_3,</div><div class='del'>-	FEC_3_4,</div><div class='del'>-	FEC_4_5,</div><div class='del'>-	FEC_5_6,</div><div class='del'>-	FEC_6_7,</div><div class='del'>-	FEC_7_8,</div><div class='del'>-	FEC_8_9,</div><div class='del'>-	FEC_AUTO,</div><div class='del'>-	FEC_3_5,</div><div class='del'>-	FEC_9_10,</div><div class='del'>-} fe_code_rate_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/section&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;section id="DTV-GUARD-INTERVAL"&gt;</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_GUARD_INTERVAL&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'> 		&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_guard_interval {</div><div class='del'>-	GUARD_INTERVAL_1_32,</div><div class='del'>-	GUARD_INTERVAL_1_16,</div><div class='del'>-	GUARD_INTERVAL_1_8,</div><div class='del'>-	GUARD_INTERVAL_1_4,</div><div class='del'>-	GUARD_INTERVAL_AUTO,</div><div class='del'>-	GUARD_INTERVAL_1_128,</div><div class='del'>-	GUARD_INTERVAL_19_128,</div><div class='del'>-	GUARD_INTERVAL_19_256,</div><div class='del'>-	GUARD_INTERVAL_PN420,</div><div class='del'>-	GUARD_INTERVAL_PN595,</div><div class='del'>-	GUARD_INTERVAL_PN945,</div><div class='del'>-} fe_guard_interval_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-guard-interval-t"&gt;</div><div class='add'>+&lt;title&gt;Modulation guard interval&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-guard-interval"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_guard_interval&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-AUTO"&gt;&lt;constant&gt;GUARD_INTERVAL_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect the guard interval&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-1-128"&gt;&lt;constant&gt;GUARD_INTERVAL_1_128&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 1/128&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-1-32"&gt;&lt;constant&gt;GUARD_INTERVAL_1_32&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 1/32&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-1-16"&gt;&lt;constant&gt;GUARD_INTERVAL_1_16&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 1/16&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-1-8"&gt;&lt;constant&gt;GUARD_INTERVAL_1_8&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 1/8&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-1-4"&gt;&lt;constant&gt;GUARD_INTERVAL_1_4&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 1/4&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-19-128"&gt;&lt;constant&gt;GUARD_INTERVAL_19_128&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 19/128&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-19-256"&gt;&lt;constant&gt;GUARD_INTERVAL_19_256&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Guard interval 19/256&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-PN420"&gt;&lt;constant&gt;GUARD_INTERVAL_PN420&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;PN length 420 (1/4)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-PN595"&gt;&lt;constant&gt;GUARD_INTERVAL_PN595&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;PN length 595 (1/6)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="GUARD-INTERVAL-PN945"&gt;&lt;constant&gt;GUARD_INTERVAL_PN945&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;PN length 945 (1/9)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='ctx'> </div><div class='ctx'> 		&lt;para&gt;Notes:&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;1) If &lt;constant&gt;DTV_GUARD_INTERVAL&lt;/constant&gt; is set the &lt;constant&gt;GUARD_INTERVAL_AUTO&lt;/constant&gt; the hardware will</div><div class='hunk'>@@ -812,26 +1086,64 @@ typedef enum fe_guard_interval {</div><div class='ctx'> 			in the missing parameters.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;2) Intervals 1/128, 19/128 and 19/256 are used only for DVB-T2 at present&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;3) DTMB specifies PN420, PN595 and PN945.&lt;/para&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-TRANSMISSION-MODE"&gt;</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_TRANSMISSION_MODE&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> </div><div class='del'>-		&lt;para&gt;Specifies the number of carriers used by the standard&lt;/para&gt;</div><div class='add'>+		&lt;para&gt;Specifies the number of carriers used by the standard.</div><div class='add'>+		    This is used only on OFTM-based standards, e. g.</div><div class='add'>+		    DVB-T/T2, ISDB-T, DTMB&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-transmit-mode-t"&gt;</div><div class='add'>+&lt;title&gt;enum fe_transmit_mode: Number of carriers per channel&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-transmit-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_transmit_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-AUTO"&gt;&lt;constant&gt;TRANSMISSION_MODE_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect transmission mode. The hardware will try to find</div><div class='add'>+		the correct FFT-size (if capable) to fill in the missing</div><div class='add'>+		parameters.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-1K"&gt;&lt;constant&gt;TRANSMISSION_MODE_1K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 1K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-2K"&gt;&lt;constant&gt;TRANSMISSION_MODE_2K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 2K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-8K"&gt;&lt;constant&gt;TRANSMISSION_MODE_8K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 8K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-4K"&gt;&lt;constant&gt;TRANSMISSION_MODE_4K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 4K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-16K"&gt;&lt;constant&gt;TRANSMISSION_MODE_16K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 16K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-32K"&gt;&lt;constant&gt;TRANSMISSION_MODE_32K&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Transmission mode 32K&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-C1"&gt;&lt;constant&gt;TRANSMISSION_MODE_C1&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Single Carrier (C=1) transmission mode (DTMB)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="TRANSMISSION-MODE-C3780"&gt;&lt;constant&gt;TRANSMISSION_MODE_C3780&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Multi Carrier (C=3780) transmission mode (DTMB)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='ctx'> </div><div class='del'>-		&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_transmit_mode {</div><div class='del'>-	TRANSMISSION_MODE_2K,</div><div class='del'>-	TRANSMISSION_MODE_8K,</div><div class='del'>-	TRANSMISSION_MODE_AUTO,</div><div class='del'>-	TRANSMISSION_MODE_4K,</div><div class='del'>-	TRANSMISSION_MODE_1K,</div><div class='del'>-	TRANSMISSION_MODE_16K,</div><div class='del'>-	TRANSMISSION_MODE_32K,</div><div class='del'>-	TRANSMISSION_MODE_C1,</div><div class='del'>-	TRANSMISSION_MODE_C3780,</div><div class='del'>-} fe_transmit_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='ctx'> 		&lt;para&gt;Notes:&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;1) ISDB-T supports three carrier/symbol-size: 8K, 4K, 2K. It is called</div><div class='ctx'> 			'mode' in the standard: Mode 1 is 2K, mode 2 is 4K, mode 3 is 8K&lt;/para&gt;</div><div class='hunk'>@@ -842,19 +1154,48 @@ typedef enum fe_transmit_mode {</div><div class='ctx'> 		&lt;para&gt;3) DVB-T specifies 2K and 8K as valid sizes.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;4) DVB-T2 specifies 1K, 2K, 4K, 8K, 16K and 32K.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;5) DTMB specifies C1 and C3780.&lt;/para&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-HIERARCHY"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_HIERARCHY&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 	&lt;para&gt;Frontend hierarchy&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_hierarchy {</div><div class='del'>-	 HIERARCHY_NONE,</div><div class='del'>-	 HIERARCHY_1,</div><div class='del'>-	 HIERARCHY_2,</div><div class='del'>-	 HIERARCHY_4,</div><div class='del'>-	 HIERARCHY_AUTO</div><div class='del'>- } fe_hierarchy_t;</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-hierarchy-t"&gt;</div><div class='add'>+&lt;title&gt;Frontend hierarchy&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-hierarchy"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_hierarchy&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	     &lt;entry id="HIERARCHY-NONE"&gt;&lt;constant&gt;HIERARCHY_NONE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;No hierarchy&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	     &lt;entry id="HIERARCHY-AUTO"&gt;&lt;constant&gt;HIERARCHY_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect hierarchy (if supported)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	     &lt;entry id="HIERARCHY-1"&gt;&lt;constant&gt;HIERARCHY_1&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Hierarchy 1&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	     &lt;entry id="HIERARCHY-2"&gt;&lt;constant&gt;HIERARCHY_2&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Hierarchy 2&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	     &lt;entry id="HIERARCHY-4"&gt;&lt;constant&gt;HIERARCHY_4&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Hierarchy 4&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-STREAM-ID"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_STREAM_ID&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -891,15 +1232,37 @@ typedef enum fe_hierarchy {</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-INTERLEAVING"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_INTERLEAVING&lt;/constant&gt;&lt;/title&gt;</div><div class='del'>-	&lt;para id="fe-interleaving"&gt;Interleaving mode&lt;/para&gt;</div><div class='del'>-	&lt;programlisting&gt;</div><div class='del'>-enum fe_interleaving {</div><div class='del'>-	INTERLEAVING_NONE,</div><div class='del'>-	INTERLEAVING_AUTO,</div><div class='del'>-	INTERLEAVING_240,</div><div class='del'>-	INTERLEAVING_720,</div><div class='del'>-};</div><div class='del'>-	&lt;/programlisting&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Time interleaving to be used. Currently, used only on DTMB.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-interleaving"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_interleaving&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INTERLEAVING-NONE"&gt;&lt;constant&gt;INTERLEAVING_NONE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;No interleaving.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INTERLEAVING-AUTO"&gt;&lt;constant&gt;INTERLEAVING_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Auto-detect interleaving.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INTERLEAVING-240"&gt;&lt;constant&gt;INTERLEAVING_240&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Interleaving of 240 symbols.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="INTERLEAVING-720"&gt;&lt;constant&gt;INTERLEAVING_720&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Interleaving of 720 symbols.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-LNA"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_LNA&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -921,7 +1284,7 @@ enum fe_interleaving {</div><div class='ctx'> 	&lt;para&gt;For most delivery systems, &lt;constant&gt;dtv_property.stat.len&lt;/constant&gt;</div><div class='ctx'> 	      will be 1 if the stats is supported, and the properties will</div><div class='ctx'> 	      return a single value for each parameter.&lt;/para&gt;</div><div class='del'>-	&lt;para&gt;It should be noticed, however, that new OFDM delivery systems</div><div class='add'>+	&lt;para&gt;It should be noted, however, that new OFDM delivery systems</div><div class='ctx'> 	      like ISDB can use different modulation types for each group of</div><div class='ctx'> 	      carriers. On such standards, up to 3 groups of statistics can be</div><div class='ctx'> 	      provided, and &lt;constant&gt;dtv_property.stat.len&lt;/constant&gt; is updated</div><div class='hunk'>@@ -940,10 +1303,10 @@ enum fe_interleaving {</div><div class='ctx'> 			and &lt;constant&gt;uvalue&lt;/constant&gt; is for unsigned values (counters, relative scale)&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 		&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;scale&lt;/constant&gt; - Scale for the value. It can be:&lt;/para&gt;</div><div class='ctx'> 			&lt;itemizedlist mark='bullet' id="fecap-scale-params"&gt;</div><div class='del'>-				&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_NOT_AVAILABLE&lt;/constant&gt; - The parameter is supported by the frontend, but it was not possible to collect it (could be a transitory or permanent condition)&lt;/para&gt;&lt;/listitem&gt;</div><div class='del'>-				&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - parameter is a signed value, measured in 1/1000 dB&lt;/para&gt;&lt;/listitem&gt;</div><div class='del'>-				&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_RELATIVE&lt;/constant&gt; - parameter is a unsigned value, where 0 means 0% and 65535 means 100%.&lt;/para&gt;&lt;/listitem&gt;</div><div class='del'>-				&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_COUNTER&lt;/constant&gt; - parameter is a unsigned value that counts the occurrence of an event, like bit error, block error, or lapsed time.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem id="FE-SCALE-NOT-AVAILABLE"&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_NOT_AVAILABLE&lt;/constant&gt; - The parameter is supported by the frontend, but it was not possible to collect it (could be a transitory or permanent condition)&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem id="FE-SCALE-DECIBEL"&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - parameter is a signed value, measured in 1/1000 dB&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem id="FE-SCALE-RELATIVE"&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_RELATIVE&lt;/constant&gt; - parameter is a unsigned value, where 0 means 0% and 65535 means 100%.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem id="FE-SCALE-COUNTER"&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_COUNTER&lt;/constant&gt; - parameter is a unsigned value that counts the occurrence of an event, like bit error, block error, or lapsed time.&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 			&lt;/itemizedlist&gt;</div><div class='ctx'> 		&lt;/listitem&gt;</div><div class='ctx'> 	&lt;/itemizedlist&gt;</div><div class='hunk'>@@ -953,7 +1316,7 @@ enum fe_interleaving {</div><div class='ctx'> 		&lt;para&gt;Possible scales for this metric are:&lt;/para&gt;</div><div class='ctx'> 		&lt;itemizedlist mark='bullet'&gt;</div><div class='ctx'> 			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_NOT_AVAILABLE&lt;/constant&gt; - it failed to measure it, or the measurement was not complete yet.&lt;/para&gt;&lt;/listitem&gt;</div><div class='del'>-			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - signal strength is in 0.0001 dBm units, power measured in miliwatts. This value is generally negative.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - signal strength is in 0.001 dBm units, power measured in miliwatts. This value is generally negative.&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_RELATIVE&lt;/constant&gt; - The frontend provides a 0% to 100% measurement for power (actually, 0 to 65535).&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 		&lt;/itemizedlist&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='hunk'>@@ -963,7 +1326,7 @@ enum fe_interleaving {</div><div class='ctx'> 		&lt;para&gt;Possible scales for this metric are:&lt;/para&gt;</div><div class='ctx'> 		&lt;itemizedlist mark='bullet'&gt;</div><div class='ctx'> 			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_NOT_AVAILABLE&lt;/constant&gt; - it failed to measure it, or the measurement was not complete yet.&lt;/para&gt;&lt;/listitem&gt;</div><div class='del'>-			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - Signal/Noise ratio is in 0.0001 dB units.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_DECIBEL&lt;/constant&gt; - Signal/Noise ratio is in 0.001 dB units.&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 			&lt;listitem&gt;&lt;para&gt;&lt;constant&gt;FE_SCALE_RELATIVE&lt;/constant&gt; - The frontend provides a 0% to 100% measurement for Signal/Noise (actually, 0 to 65535).&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 		&lt;/itemizedlist&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='hunk'>@@ -985,7 +1348,7 @@ enum fe_interleaving {</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_STAT_PRE_TOTAL_BIT_COUNT&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 		&lt;para&gt;Measures the amount of bits received before the inner code block, during the same period as</div><div class='ctx'> 		&lt;link linkend="DTV-STAT-PRE-ERROR-BIT-COUNT"&gt;&lt;constant&gt;DTV_STAT_PRE_ERROR_BIT_COUNT&lt;/constant&gt;&lt;/link&gt; measurement was taken.&lt;/para&gt;</div><div class='del'>-		&lt;para&gt;It should be noticed that this measurement can be smaller than the total amount of bits on the transport stream,</div><div class='add'>+		&lt;para&gt;It should be noted that this measurement can be smaller than the total amount of bits on the transport stream,</div><div class='ctx'> 		      as the frontend may need to manually restart the measurement, losing some data between each measurement interval.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;This measurement is monotonically increased, as the frontend gets more bit count measurements.</div><div class='ctx'> 		      The frontend may reset it when a channel/transponder is tuned.&lt;/para&gt;</div><div class='hunk'>@@ -1014,7 +1377,7 @@ enum fe_interleaving {</div><div class='ctx'> 		&lt;title&gt;&lt;constant&gt;DTV_STAT_POST_TOTAL_BIT_COUNT&lt;/constant&gt;&lt;/title&gt;</div><div class='ctx'> 		&lt;para&gt;Measures the amount of bits received after the inner coding, during the same period as</div><div class='ctx'> 		&lt;link linkend="DTV-STAT-POST-ERROR-BIT-COUNT"&gt;&lt;constant&gt;DTV_STAT_POST_ERROR_BIT_COUNT&lt;/constant&gt;&lt;/link&gt; measurement was taken.&lt;/para&gt;</div><div class='del'>-		&lt;para&gt;It should be noticed that this measurement can be smaller than the total amount of bits on the transport stream,</div><div class='add'>+		&lt;para&gt;It should be noted that this measurement can be smaller than the total amount of bits on the transport stream,</div><div class='ctx'> 		      as the frontend may need to manually restart the measurement, losing some data between each measurement interval.&lt;/para&gt;</div><div class='ctx'> 		&lt;para&gt;This measurement is monotonically increased, as the frontend gets more bit count measurements.</div><div class='ctx'> 		      The frontend may reset it when a channel/transponder is tuned.&lt;/para&gt;</div><div class='hunk'>@@ -1255,8 +1618,8 @@ enum fe_interleaving {</div><div class='ctx'> 		&lt;para&gt;In addition, the &lt;link linkend="frontend-stat-properties"&gt;DTV QoS statistics&lt;/link&gt; are also valid.&lt;/para&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='del'>-	&lt;section id="frontend-property-satellital-systems"&gt;</div><div class='del'>-	&lt;title&gt;Properties used on satellital delivery systems&lt;/title&gt;</div><div class='add'>+	&lt;section id="frontend-property-satellite-systems"&gt;</div><div class='add'>+	&lt;title&gt;Properties used on satellite delivery systems&lt;/title&gt;</div><div class='ctx'> 	&lt;section id="dvbs-params"&gt;</div><div class='ctx'> 		&lt;title&gt;DVB-S delivery system&lt;/title&gt;</div><div class='ctx'> 		&lt;para&gt;The following parameters are valid for DVB-S:&lt;/para&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/examples.xml b/Documentation/DocBook/media/dvb/examples.xml<br/>index f037e568eb6e..c9f68c7183cc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/examples.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/examples.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/examples.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/examples.xml</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> &lt;title&gt;Examples&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;In this section we would like to present some examples for using the DVB API.</div><div class='ctx'> &lt;/para&gt;</div><div class='del'>-&lt;para&gt;Maintainer note: This section is out of date. Please refer to the sample programs packaged</div><div class='del'>-with the driver distribution from &lt;ulink url="http://linuxtv.org/hg/dvb-apps" /&gt;.</div><div class='add'>+&lt;para&gt;NOTE: This section is out of date, and the code below won't even</div><div class='add'>+    compile. Please refer to the</div><div class='add'>+    &lt;ulink url="http://linuxtv.org/docs/libdvbv5/index.html"&gt;libdvbv5&lt;/ulink&gt;</div><div class='add'>+    for updated/recommended examples.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="tuning"&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml b/Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml<br/>new file mode 100644<br/>index 000000000000..4595dbfff208<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-recv-slave-reply.xml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+&lt;refentry id="FE_DISEQC_RECV_SLAVE_REPLY"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_DISEQC_RECV_SLAVE_REPLY&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_DISEQC_RECV_SLAVE_REPLY&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Receives reply from a DiSEqC 2.0 command&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dvb_diseqc_slave_reply *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_DISEQC_RECV_SLAVE_REPLY&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;pointer to &amp;dvb-diseqc-slave-reply;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;Receives reply from a DiSEqC 2.0 command.&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="dvb-diseqc-slave-reply"&gt;</div><div class='add'>+    &lt;title&gt;struct &lt;structname&gt;dvb_diseqc_slave_reply&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="3"&gt;</div><div class='add'>+    &amp;cs-str;</div><div class='add'>+    &lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry&gt;uint8_t&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;msg[4]&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;DiSEqC message (framing, data[3])&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	&lt;entry&gt;uint8_t&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;msg_len&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;Length of the DiSEqC message. Valid values are 0 to 4,</div><div class='add'>+	    where 0 means no msg&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	&lt;entry&gt;int&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;timeout&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;Return from ioctl after timeout ms with errorcode when no</div><div class='add'>+	    message was received&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+    &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml b/Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml<br/>new file mode 100644<br/>index 000000000000..c104df77ecd0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-reset-overload.xml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+&lt;refentry id="FE_DISEQC_RESET_OVERLOAD"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_DISEQC_RESET_OVERLOAD&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_DISEQC_RESET_OVERLOAD&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Restores the power to the antenna subsystem, if it was powered</div><div class='add'>+	off due to power overload.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;NULL&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_DISEQC_RESET_OVERLOAD&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;If the bus has been automatically powered off due to power overload, this ioctl</div><div class='add'>+ call restores the power to the bus. The call requires read/write access to the</div><div class='add'>+ device. This call has no effect if the device is manually powered off. Not all</div><div class='add'>+ DVB adapters support this ioctl.&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml b/Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml<br/>new file mode 100644<br/>index 000000000000..9f6a68f32de3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-send-burst.xml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+&lt;refentry id="FE_DISEQC_SEND_BURST"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_DISEQC_SEND_BURST&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_DISEQC_SEND_BURST&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Sends a 22KHz tone burst for 2x1 mini DiSEqC satellite selection.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;enum fe_sec_mini_cmd *&lt;parameter&gt;tone&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_DISEQC_SEND_BURST&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;tone&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;pointer to &amp;fe-sec-mini-cmd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;This ioctl is used to set the generation of a 22kHz tone burst for mini</div><div class='add'>+    DiSEqC satellite</div><div class='add'>+    selection for 2x1 switches.</div><div class='add'>+    This call requires read/write permissions.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;It provides support for what's specified at</div><div class='add'>+    &lt;ulink url="http://www.eutelsat.com/files/contributed/satellites/pdf/Diseqc/associated%20docs/simple_tone_burst_detec.pdf"&gt;Digital Satellite Equipment Control</div><div class='add'>+	(DiSEqC) - Simple "ToneBurst" Detection Circuit specification.&lt;/ulink&gt;</div><div class='add'>+    &lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;refsect1 id="fe-sec-mini-cmd-t"&gt;</div><div class='add'>+&lt;title&gt;enum fe_sec_mini_cmd&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-sec-mini-cmd"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_sec_mini_cmd&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-MINI-A"&gt;&lt;constant&gt;SEC_MINI_A&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Sends a mini-DiSEqC 22kHz '0' Tone Burst to</div><div class='add'>+		select satellite-A&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-MINI-B"&gt;&lt;constant&gt;SEC_MINI_B&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Sends a mini-DiSEqC 22kHz '1' Data Burst to</div><div class='add'>+		select satellite-B&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml b/Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml<br/>new file mode 100644<br/>index 000000000000..38cf313e121b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-diseqc-send-master-cmd.xml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+&lt;refentry id="FE_DISEQC_SEND_MASTER_CMD"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_DISEQC_SEND_MASTER_CMD&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_DISEQC_SEND_MASTER_CMD&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Sends a DiSEqC command&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dvb_diseqc_master_cmd *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_DISEQC_SEND_MASTER_CMD&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;pointer to &amp;dvb-diseqc-master-cmd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;Sends a DiSEqC command to the antenna subsystem.&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="dvb-diseqc-master-cmd"&gt;</div><div class='add'>+    &lt;title&gt;struct &lt;structname&gt;dvb_diseqc_master_cmd&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="3"&gt;</div><div class='add'>+    &amp;cs-str;</div><div class='add'>+    &lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry&gt;uint8_t&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;msg[6]&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;DiSEqC message (framing, address, command, data[3])&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	&lt;entry&gt;uint8_t&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;msg_len&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;Length of the DiSEqC message. Valid values are 3 to 6&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+    &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml b/Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml<br/>new file mode 100644<br/>index 000000000000..c11890b184ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-enable-high-lnb-voltage.xml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+&lt;refentry id="FE_ENABLE_HIGH_LNB_VOLTAGE"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_ENABLE_HIGH_LNB_VOLTAGE&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_ENABLE_HIGH_LNB_VOLTAGE&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Select output DC level between normal LNBf voltages or higher</div><div class='add'>+	LNBf voltages.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;unsigned int &lt;parameter&gt;high&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_ENABLE_HIGH_LNB_VOLTAGE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;high&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;Valid flags:&lt;/para&gt;</div><div class='add'>+	    &lt;itemizedlist&gt;</div><div class='add'>+		&lt;listitem&gt;&lt;para&gt;0 - normal 13V and 18V.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+		&lt;listitem&gt;&lt;para&gt;&amp;gt;0 - enables slightly higher voltages instead of</div><div class='add'>+		    13/18V, in order to compensate for long antenna cables.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	    &lt;/itemizedlist&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;Select output DC level between normal LNBf voltages or higher</div><div class='add'>+	LNBf voltages between 0 (normal) or a value grater than 0 for higher</div><div class='add'>+	voltages.&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-get-info.xml b/Documentation/DocBook/media/dvb/fe-get-info.xml<br/>new file mode 100644<br/>index 000000000000..ed0eeb29dd65<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-get-info.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-get-info.xml</a></div><div class='hunk'>@@ -0,0 +1,266 @@</div><div class='add'>+&lt;refentry id="FE_GET_INFO"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_GET_INFO&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_GET_INFO&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Query DVB frontend capabilities and returns information about</div><div class='add'>+	the front-end. This call only requires read-only access to the device&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dvb_frontend_info *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_GET_INFO&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;pointer to struct &amp;dvb-frontend-info;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;All DVB frontend devices support the</div><div class='add'>+&lt;constant&gt;FE_GET_INFO&lt;/constant&gt; ioctl. It is used to identify</div><div class='add'>+kernel devices compatible with this specification and to obtain</div><div class='add'>+information about driver and hardware capabilities. The ioctl takes a</div><div class='add'>+pointer to dvb_frontend_info which is filled by the driver. When the</div><div class='add'>+driver is not compatible with this specification the ioctl returns an error.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="dvb-frontend-info"&gt;</div><div class='add'>+      &lt;title&gt;struct &lt;structname&gt;dvb_frontend_info&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;char&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;name[128]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Name of the frontend&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;fe_type_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;type&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;emphasis role="bold"&gt;DEPRECATED&lt;/emphasis&gt;. DVBv3 type. Should not be used on modern programs, as a</div><div class='add'>+		frontend may have more than one type. So, the DVBv5 API should</div><div class='add'>+		be used instead to enumerate and select the frontend type.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;frequency_min&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Minimal frequency supported by the frontend&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;frequency_max&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximal frequency supported by the frontend&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;frequency_stepsize&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Frequency step - all frequencies are multiple of this value&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;frequency_tolerance&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Tolerance of the frequency&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;symbol_rate_min&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Minimal symbol rate (for Cable/Satellite systems), in bauds&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;symbol_rate_max&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximal symbol rate (for Cable/Satellite systems), in bauds&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;symbol_rate_tolerance&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximal symbol rate tolerance, in ppm&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;uint32_t&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;notifier_delay&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;emphasis role="bold"&gt;DEPRECATED&lt;/emphasis&gt;. Not used by any driver.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&amp;fe-caps;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;caps&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Capabilities supported by the frontend&lt;/entry&gt;</div><div class='add'>+          &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+  &lt;para&gt;NOTE: The frequencies are specified in Hz for Terrestrial and Cable</div><div class='add'>+      systems. They're specified in kHz for Satellite systems&lt;/para&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;refsect1 id="fe-caps-t"&gt;</div><div class='add'>+&lt;title&gt;frontend capabilities&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Capabilities describe what a frontend can do. Some capabilities are</div><div class='add'>+    supported only on some specific frontend types.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-caps"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_caps&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-IS-STUPID"&gt;&lt;constant&gt;FE_IS_STUPID&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;There's something wrong at the frontend, and it can't</div><div class='add'>+	    report its capabilities&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-INVERSION-AUTO"&gt;&lt;constant&gt;FE_CAN_INVERSION_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend is capable of auto-detecting inversion&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-1-2"&gt;&lt;constant&gt;FE_CAN_FEC_1_2&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 1/2&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-2-3"&gt;&lt;constant&gt;FE_CAN_FEC_2_3&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 2/3&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-3-4"&gt;&lt;constant&gt;FE_CAN_FEC_3_4&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 3/4&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-4-5"&gt;&lt;constant&gt;FE_CAN_FEC_4_5&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 4/5&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-5-6"&gt;&lt;constant&gt;FE_CAN_FEC_5_6&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 5/6&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-6-7"&gt;&lt;constant&gt;FE_CAN_FEC_6_7&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 6/7&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-7-8"&gt;&lt;constant&gt;FE_CAN_FEC_7_8&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 7/8&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-8-9"&gt;&lt;constant&gt;FE_CAN_FEC_8_9&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports FEC 8/9&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-FEC-AUTO"&gt;&lt;constant&gt;FE_CAN_FEC_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect FEC.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QPSK"&gt;&lt;constant&gt;FE_CAN_QPSK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports QPSK modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-16"&gt;&lt;constant&gt;FE_CAN_QAM_16&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 16-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-32"&gt;&lt;constant&gt;FE_CAN_QAM_32&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 32-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-64"&gt;&lt;constant&gt;FE_CAN_QAM_64&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 64-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-128"&gt;&lt;constant&gt;FE_CAN_QAM_128&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 128-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-256"&gt;&lt;constant&gt;FE_CAN_QAM_256&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 256-QAM modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-QAM-AUTO"&gt;&lt;constant&gt;FE_CAN_QAM_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-TRANSMISSION-MODE-AUTO"&gt;&lt;constant&gt;FE_CAN_TRANSMISSION_MODE_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect the transmission mode&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-BANDWIDTH-AUTO"&gt;&lt;constant&gt;FE_CAN_BANDWIDTH_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect the bandwidth&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-GUARD-INTERVAL-AUTO"&gt;&lt;constant&gt;FE_CAN_GUARD_INTERVAL_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect the guard interval&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-HIERARCHY-AUTO"&gt;&lt;constant&gt;FE_CAN_HIERARCHY_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can autodetect hierarch&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-8VSB"&gt;&lt;constant&gt;FE_CAN_8VSB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 8-VSB modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-16VSB"&gt;&lt;constant&gt;FE_CAN_16VSB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports 16-VSB modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-HAS-EXTENDED-CAPS"&gt;&lt;constant&gt;FE_HAS_EXTENDED_CAPS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;Currently, unused&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-MULTISTREAM"&gt;&lt;constant&gt;FE_CAN_MULTISTREAM&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports multistream filtering&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-TURBO-FEC"&gt;&lt;constant&gt;FE_CAN_TURBO_FEC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports turbo FEC modulation&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-2G-MODULATION"&gt;&lt;constant&gt;FE_CAN_2G_MODULATION&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend supports "2nd generation modulation" (DVB-S2/T2)&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-NEEDS-BENDING"&gt;&lt;constant&gt;FE_NEEDS_BENDING&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;Not supported anymore, don't use it&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-RECOVER"&gt;&lt;constant&gt;FE_CAN_RECOVER&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can recover from a cable unplug automatically&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	&lt;entry id="FE-CAN-MUTE-TS"&gt;&lt;constant&gt;FE_CAN_MUTE_TS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	&lt;entry&gt;The frontend can stop spurious TS data output&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-get-property.xml b/Documentation/DocBook/media/dvb/fe-get-property.xml<br/>new file mode 100644<br/>index 000000000000..53a170ed3bd1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-get-property.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-get-property.xml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+&lt;refentry id="FE_GET_PROPERTY"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_SET_PROPERTY, FE_GET_PROPERTY&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+      &lt;refname&gt;FE_SET_PROPERTY&lt;/refname&gt;</div><div class='add'>+      &lt;refname&gt;FE_GET_PROPERTY&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;FE_SET_PROPERTY sets one or more frontend properties.</div><div class='add'>+	FE_GET_PROPERTY returns one or more frontend properties.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dtv_properties *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_PROPERTY, FE_GET_PROPERTY&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;pointer to &amp;dtv-properties;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;All DVB frontend devices support the</div><div class='add'>+&lt;constant&gt;FE_SET_PROPERTY&lt;/constant&gt; and &lt;constant&gt;FE_GET_PROPERTY&lt;/constant&gt;</div><div class='add'>+ioctls. The supported properties and statistics depends on the delivery system</div><div class='add'>+and on the device:&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+&lt;listitem&gt;</div><div class='add'>+    &lt;para&gt;&lt;constant&gt;FE_SET_PROPERTY:&lt;/constant&gt;&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;This ioctl is used to set one or more</div><div class='add'>+	frontend properties.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;This is the basic command to request the frontend to tune into some</div><div class='add'>+    frequency and to start decoding the digital TV signal.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;This call requires read/write access to the device.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;At return, the values are updated to reflect the</div><div class='add'>+    actual parameters used.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;</div><div class='add'>+    &lt;para&gt;&lt;constant&gt;FE_GET_PROPERTY:&lt;/constant&gt;&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;This ioctl is used to get properties and</div><div class='add'>+statistics from the frontend.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;No properties are changed, and statistics aren't reset.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;listitem&gt;&lt;para&gt;This call only requires read-only access to the device.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-read-status.xml b/Documentation/DocBook/media/dvb/fe-read-status.xml<br/>new file mode 100644<br/>index 000000000000..bc0dc2a55f19<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-read-status.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-read-status.xml</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+&lt;refentry id="FE_READ_STATUS"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_READ_STATUS&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_READ_STATUS&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Returns status information about the front-end. This call only</div><div class='add'>+ requires read-only access to the device&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;unsigned int *&lt;parameter&gt;status&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_READ_STATUS&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;status&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;pointer to a bitmask integer filled with the values defined by</div><div class='add'>+		&amp;fe-status;.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;All DVB frontend devices support the</div><div class='add'>+&lt;constant&gt;FE_READ_STATUS&lt;/constant&gt; ioctl. It is used to check about the</div><div class='add'>+locking status of the frontend after being tuned. The ioctl takes a</div><div class='add'>+pointer to an integer where the status will be written.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;para&gt;NOTE: the size of status is actually sizeof(enum fe_status), with varies</div><div class='add'>+    according with the architecture. This needs to be fixed in the future.&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;refsect1 id="fe-status-t"&gt;</div><div class='add'>+&lt;title&gt;int fe_status&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;The fe_status parameter is used to indicate the current state</div><div class='add'>+    and/or state changes of the frontend hardware. It is produced using</div><div class='add'>+    the &amp;fe-status; values on a bitmask&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-status"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_status&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-HAS-SIGNAL"&gt;&lt;constant&gt;FE_HAS_SIGNAL&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;The frontend has found something above the noise level&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-HAS-CARRIER"&gt;&lt;constant&gt;FE_HAS_CARRIER&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;The frontend has found a DVB signal&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-HAS-VITERBI"&gt;&lt;constant&gt;FE_HAS_VITERBI&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;The frontend FEC inner coding (Viterbi, LDPC or other inner code) is stable&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-HAS-SYNC"&gt;&lt;constant&gt;FE_HAS_SYNC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Synchronization bytes was found&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-HAS-LOCK"&gt;&lt;constant&gt;FE_HAS_LOCK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;The DVB were locked and everything is working&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-TIMEDOUT"&gt;&lt;constant&gt;FE_TIMEDOUT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;no lock within the last about 2 seconds&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="FE-REINIT"&gt;&lt;constant&gt;FE_REINIT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;The frontend was reinitialized, application is</div><div class='add'>+	    recommended to reset DiSEqC, tone and parameters&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml b/Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml<br/>new file mode 100644<br/>index 000000000000..99fa8a015c7a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-frontend-tune-mode.xml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+&lt;refentry id="FE_SET_FRONTEND_TUNE_MODE"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_SET_FRONTEND_TUNE_MODE&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_SET_FRONTEND_TUNE_MODE&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Allow setting tuner mode flags to the frontend.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;unsigned int &lt;parameter&gt;flags&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_FRONTEND_TUNE_MODE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;flags&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	    &lt;para&gt;Valid flags:&lt;/para&gt;</div><div class='add'>+	    &lt;itemizedlist&gt;</div><div class='add'>+		&lt;listitem&gt;&lt;para&gt;0 - normal tune mode&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+		&lt;listitem&gt;&lt;para&gt;FE_TUNE_MODE_ONESHOT - When set, this flag will</div><div class='add'>+		    disable any zigzagging or other "normal" tuning behaviour.</div><div class='add'>+		    Additionally, there will be no automatic monitoring of the</div><div class='add'>+		    lock status, and hence no frontend events will be</div><div class='add'>+		    generated. If a frontend device is closed, this flag will</div><div class='add'>+		    be automatically turned off when the device is reopened</div><div class='add'>+		    read-write.&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+	    &lt;/itemizedlist&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;Allow setting tuner mode flags to the frontend, between 0 (normal)</div><div class='add'>+	or FE_TUNE_MODE_ONESHOT mode&lt;/para&gt;</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-set-tone.xml b/Documentation/DocBook/media/dvb/fe-set-tone.xml<br/>new file mode 100644<br/>index 000000000000..62d44e4ccc39<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-set-tone.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-tone.xml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+&lt;refentry id="FE_SET_TONE"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_SET_TONE&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_SET_TONE&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Sets/resets the generation of the continuous 22kHz tone.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;enum fe_sec_tone_mode *&lt;parameter&gt;tone&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_TONE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;tone&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;pointer to &amp;fe-sec-tone-mode;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;This ioctl is used to set the generation of the continuous 22kHz tone.</div><div class='add'>+    This call requires read/write permissions.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;Usually, satellite antenna subsystems require that the digital TV</div><div class='add'>+    device to send a 22kHz tone in order to select between high/low band on</div><div class='add'>+    some dual-band LNBf. It is also used to send signals to DiSEqC equipment,</div><div class='add'>+    but this is done using the DiSEqC ioctls.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;NOTE: if more than one device is connected to the same antenna,</div><div class='add'>+    setting a tone may interfere on other devices, as they may lose</div><div class='add'>+    the capability of selecting the band. So, it is recommended that</div><div class='add'>+    applications would change to SEC_TONE_OFF when the device is not used.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;refsect1 id="fe-sec-tone-mode-t"&gt;</div><div class='add'>+&lt;title&gt;enum fe_sec_tone_mode&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-sec-tone-mode"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_sec_tone_mode&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-TONE-ON"&gt;&lt;constant&gt;SEC_TONE_ON&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Sends a 22kHz tone burst to the antenna&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char" id="SEC-TONE-OFF"&gt;&lt;constant&gt;SEC_TONE_OFF&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Don't send a 22kHz tone to the antenna</div><div class='add'>+		(except if the FE_DISEQC_* ioctls are called)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/fe-set-voltage.xml b/Documentation/DocBook/media/dvb/fe-set-voltage.xml<br/>new file mode 100644<br/>index 000000000000..c89a6f79b5af<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/fe-set-voltage.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/fe-set-voltage.xml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+&lt;refentry id="FE_SET_VOLTAGE"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl FE_SET_VOLTAGE&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;FE_SET_VOLTAGE&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Allow setting the DC level sent to the antenna subsystem.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;enum fe_sec_voltage *&lt;parameter&gt;voltage&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_VOLTAGE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;voltage&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;pointer to &amp;fe-sec-voltage;&lt;/para&gt;</div><div class='add'>+	  &lt;para&gt;Valid values are described at &amp;fe-sec-voltage;.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;This ioctl allows to set the DC voltage level sent through the antenna</div><div class='add'>+    cable to 13V, 18V or off.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;Usually, a satellite antenna subsystems require that the digital TV</div><div class='add'>+    device to send a DC voltage to feed power to the LNBf. Depending on the</div><div class='add'>+    LNBf type, the polarization or the intermediate frequency (IF) of the LNBf</div><div class='add'>+    can controlled by the voltage level. Other devices (for example, the ones</div><div class='add'>+    that implement DISEqC and multipoint LNBf's don't need to control the</div><div class='add'>+    voltage level, provided that either 13V or 18V is sent to power up the</div><div class='add'>+    LNBf.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;NOTE: if more than one device is connected to the same antenna,</div><div class='add'>+    setting a voltage level may interfere on other devices, as they may lose</div><div class='add'>+    the capability of setting polarization or IF. So, on those</div><div class='add'>+    cases, setting the voltage to SEC_VOLTAGE_OFF while the device is not is</div><div class='add'>+    used is recommended.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/frontend.xml b/Documentation/DocBook/media/dvb/frontend.xml<br/>index 8a6a6ff27af5..01210b33c130 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/frontend.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/frontend.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/frontend.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/frontend.xml</a></div><div class='hunk'>@@ -1,485 +1,112 @@</div><div class='ctx'> &lt;title&gt;DVB Frontend API&lt;/title&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;The DVB frontend device controls the tuner and DVB demodulator</div><div class='del'>-hardware. It can be accessed through &lt;emphasis</div><div class='del'>-role="tt"&gt;/dev/dvb/adapter0/frontend0&lt;/emphasis&gt;. Data types and and</div><div class='del'>-ioctl definitions can be accessed by including &lt;emphasis</div><div class='del'>-role="tt"&gt;linux/dvb/frontend.h&lt;/emphasis&gt; in your application.&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;DVB frontends come in three varieties: DVB-S (satellite), DVB-C</div><div class='del'>-(cable) and DVB-T (terrestrial). Transmission via the internet (DVB-IP)</div><div class='del'>-is not yet handled by this API but a future extension is possible. For</div><div class='del'>-DVB-S the frontend device also supports satellite equipment control</div><div class='del'>-(SEC) via DiSEqC and V-SEC protocols. The DiSEqC (digital SEC)</div><div class='del'>-specification is available from</div><div class='add'>+&lt;para&gt;The DVB frontend API was designed to support three types of delivery systems:&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Terrestrial systems: DVB-T, DVB-T2, ATSC, ATSC M/H, ISDB-T, DVB-H, DTMB, CMMB&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Cable systems: DVB-C Annex A/C, ClearQAM (DVB-C Annex B), ISDB-C&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Satellite systems: DVB-S, DVB-S2, DVB Turbo, ISDB-S, DSS&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+&lt;para&gt;The DVB frontend controls several sub-devices including:&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Tuner&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Digital TV demodulator&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Low noise amplifier (LNA)&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;Satellite Equipment Control (SEC) hardware (only for Satellite).&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+&lt;para&gt;The frontend can be accessed through</div><div class='add'>+    &lt;constant&gt;/dev/dvb/adapter?/frontend?&lt;/constant&gt;. Data types and</div><div class='add'>+    ioctl definitions can be accessed by including</div><div class='add'>+    &lt;constant&gt;linux/dvb/frontend.h&lt;/constant&gt; in your application.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;NOTE: Transmission via the internet (DVB-IP)</div><div class='add'>+    is not yet handled by this API but a future extension is possible.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;On Satellite systems, the API support for the Satellite Equipment Control</div><div class='add'>+    (SEC) allows to power control and to send/receive signals to control the</div><div class='add'>+    antenna subsystem, selecting the polarization and choosing the Intermediate</div><div class='add'>+    Frequency IF) of the Low Noise Block Converter Feed Horn (LNBf). It</div><div class='add'>+    supports the DiSEqC and V-SEC protocols. The DiSEqC (digital SEC)</div><div class='add'>+specification is available at</div><div class='ctx'> &lt;ulink url="http://www.eutelsat.com/satellites/4_5_5.html"&gt;Eutelsat&lt;/ulink&gt;.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;Note that the DVB API may also be used for MPEG decoder-only PCI</div><div class='del'>-cards, in which case there exists no frontend device.&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="frontend_types"&gt;</div><div class='del'>-&lt;title&gt;Frontend Data Types&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="fe-type-t"&gt;</div><div class='del'>-&lt;title&gt;Frontend type&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;For historical reasons, frontend types are named by the type of modulation used in</div><div class='del'>-transmission. The fontend types are given by fe_type_t type, defined as:&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;table pgwide="1" frame="none" id="fe-type"&gt;</div><div class='del'>-&lt;title&gt;Frontend types&lt;/title&gt;</div><div class='del'>-&lt;tgroup cols="3"&gt;</div><div class='del'>-   &amp;cs-def;</div><div class='del'>-   &lt;thead&gt;</div><div class='del'>-     &lt;row&gt;</div><div class='del'>-       &lt;entry&gt;fe_type&lt;/entry&gt;</div><div class='del'>-       &lt;entry&gt;Description&lt;/entry&gt;</div><div class='del'>-       &lt;entry&gt;&lt;link linkend="DTV-DELIVERY-SYSTEM"&gt;DTV_DELIVERY_SYSTEM&lt;/link&gt; equivalent type&lt;/entry&gt;</div><div class='del'>-     &lt;/row&gt;</div><div class='del'>-  &lt;/thead&gt;</div><div class='del'>-  &lt;tbody valign="top"&gt;</div><div class='del'>-  &lt;row&gt;</div><div class='del'>-     &lt;entry id="FE_QPSK"&gt;&lt;constant&gt;FE_QPSK&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;For DVB-S standard&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;&lt;constant&gt;SYS_DVBS&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-  &lt;/row&gt;</div><div class='del'>-  &lt;row&gt;</div><div class='del'>-     &lt;entry id="FE_QAM"&gt;&lt;constant&gt;FE_QAM&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;For DVB-C annex A standard&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;&lt;constant&gt;SYS_DVBC_ANNEX_A&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-  &lt;/row&gt;</div><div class='del'>-  &lt;row&gt;</div><div class='del'>-     &lt;entry id="FE_OFDM"&gt;&lt;constant&gt;FE_OFDM&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;For DVB-T standard&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;&lt;constant&gt;SYS_DVBT&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-  &lt;/row&gt;</div><div class='del'>-  &lt;row&gt;</div><div class='del'>-     &lt;entry id="FE_ATSC"&gt;&lt;constant&gt;FE_ATSC&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;For ATSC standard (terrestrial) or for DVB-C Annex B (cable) used in US.&lt;/entry&gt;</div><div class='del'>-     &lt;entry&gt;&lt;constant&gt;SYS_ATSC&lt;/constant&gt; (terrestrial) or &lt;constant&gt;SYS_DVBC_ANNEX_B&lt;/constant&gt; (cable)&lt;/entry&gt;</div><div class='del'>-  &lt;/row&gt;</div><div class='del'>-&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/table&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;Newer formats like DVB-S2, ISDB-T, ISDB-S and DVB-T2 are not described at the above, as they're</div><div class='del'>-supported via the new &lt;link linkend="FE_GET_SET_PROPERTY"&gt;FE_GET_PROPERTY/FE_GET_SET_PROPERTY&lt;/link&gt; ioctl's, using the &lt;link linkend="DTV-DELIVERY-SYSTEM"&gt;DTV_DELIVERY_SYSTEM&lt;/link&gt; parameter.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;The usage of this field is deprecated, as it doesn't report all supported standards, and</div><div class='del'>-will provide an incomplete information for frontends that support multiple delivery systems.</div><div class='del'>-Please use &lt;link linkend="DTV-ENUM-DELSYS"&gt;DTV_ENUM_DELSYS&lt;/link&gt; instead.&lt;/para&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="fe-caps-t"&gt;</div><div class='del'>-&lt;title&gt;frontend capabilities&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;Capabilities describe what a frontend can do. Some capabilities can only be supported for</div><div class='del'>-a specific frontend type.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	typedef enum fe_caps {</div><div class='del'>-	FE_IS_STUPID                  = 0,</div><div class='del'>-	FE_CAN_INVERSION_AUTO         = 0x1,</div><div class='del'>-	FE_CAN_FEC_1_2                = 0x2,</div><div class='del'>-	FE_CAN_FEC_2_3                = 0x4,</div><div class='del'>-	FE_CAN_FEC_3_4                = 0x8,</div><div class='del'>-	FE_CAN_FEC_4_5                = 0x10,</div><div class='del'>-	FE_CAN_FEC_5_6                = 0x20,</div><div class='del'>-	FE_CAN_FEC_6_7                = 0x40,</div><div class='del'>-	FE_CAN_FEC_7_8                = 0x80,</div><div class='del'>-	FE_CAN_FEC_8_9                = 0x100,</div><div class='del'>-	FE_CAN_FEC_AUTO               = 0x200,</div><div class='del'>-	FE_CAN_QPSK                   = 0x400,</div><div class='del'>-	FE_CAN_QAM_16                 = 0x800,</div><div class='del'>-	FE_CAN_QAM_32                 = 0x1000,</div><div class='del'>-	FE_CAN_QAM_64                 = 0x2000,</div><div class='del'>-	FE_CAN_QAM_128                = 0x4000,</div><div class='del'>-	FE_CAN_QAM_256                = 0x8000,</div><div class='del'>-	FE_CAN_QAM_AUTO               = 0x10000,</div><div class='del'>-	FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000,</div><div class='del'>-	FE_CAN_BANDWIDTH_AUTO         = 0x40000,</div><div class='del'>-	FE_CAN_GUARD_INTERVAL_AUTO    = 0x80000,</div><div class='del'>-	FE_CAN_HIERARCHY_AUTO         = 0x100000,</div><div class='del'>-	FE_CAN_8VSB                   = 0x200000,</div><div class='del'>-	FE_CAN_16VSB                  = 0x400000,</div><div class='del'>-	FE_HAS_EXTENDED_CAPS          = 0x800000,</div><div class='del'>-	FE_CAN_MULTISTREAM            = 0x4000000,</div><div class='del'>-	FE_CAN_TURBO_FEC              = 0x8000000,</div><div class='del'>-	FE_CAN_2G_MODULATION          = 0x10000000,</div><div class='del'>-	FE_NEEDS_BENDING              = 0x20000000,</div><div class='del'>-	FE_CAN_RECOVER                = 0x40000000,</div><div class='del'>-	FE_CAN_MUTE_TS                = 0x80000000</div><div class='del'>-	} fe_caps_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="dvb-frontend-info"&gt;</div><div class='del'>-&lt;title&gt;frontend information&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;Information about the frontend ca be queried with</div><div class='del'>-	&lt;link linkend="FE_GET_INFO"&gt;FE_GET_INFO&lt;/link&gt;.&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	struct dvb_frontend_info {</div><div class='del'>-	char       name[128];</div><div class='del'>-	fe_type_t  type;</div><div class='del'>-	uint32_t   frequency_min;</div><div class='del'>-	uint32_t   frequency_max;</div><div class='del'>-	uint32_t   frequency_stepsize;</div><div class='del'>-	uint32_t   frequency_tolerance;</div><div class='del'>-	uint32_t   symbol_rate_min;</div><div class='del'>-	uint32_t   symbol_rate_max;</div><div class='del'>-	uint32_t   symbol_rate_tolerance;     /&amp;#x22C6; ppm &amp;#x22C6;/</div><div class='del'>-	uint32_t   notifier_delay;            /&amp;#x22C6; ms &amp;#x22C6;/</div><div class='del'>-	fe_caps_t  caps;</div><div class='del'>-	};</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="dvb-diseqc-master-cmd"&gt;</div><div class='del'>-&lt;title&gt;diseqc master command&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;A message sent from the frontend to DiSEqC capable equipment.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	struct dvb_diseqc_master_cmd {</div><div class='del'>-	uint8_t msg [6]; /&amp;#x22C6;  { framing, address, command, data[3] } &amp;#x22C6;/</div><div class='del'>-	uint8_t msg_len; /&amp;#x22C6;  valid values are 3...6  &amp;#x22C6;/</div><div class='del'>-	};</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section role="subsection" id="dvb-diseqc-slave-reply"&gt;</div><div class='del'>-&lt;title&gt;diseqc slave reply&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;A reply to the frontend from DiSEqC 2.0 capable equipment.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	struct dvb_diseqc_slave_reply {</div><div class='del'>-	uint8_t msg [4]; /&amp;#x22C6;  { framing, data [3] } &amp;#x22C6;/</div><div class='del'>-	uint8_t msg_len; /&amp;#x22C6;  valid values are 0...4, 0 means no msg  &amp;#x22C6;/</div><div class='del'>-	int     timeout; /&amp;#x22C6;  return from ioctl after timeout ms with &amp;#x22C6;/</div><div class='del'>-	};                       /&amp;#x22C6;  errorcode when no message was received  &amp;#x22C6;/</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="fe-sec-voltage-t"&gt;</div><div class='del'>-&lt;title&gt;diseqc slave reply&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The voltage is usually used with non-DiSEqC capable LNBs to switch the polarzation</div><div class='del'>-(horizontal/vertical). When using DiSEqC epuipment this voltage has to be switched</div><div class='del'>-consistently to the DiSEqC commands as described in the DiSEqC spec.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	typedef enum fe_sec_voltage {</div><div class='del'>-	SEC_VOLTAGE_13,</div><div class='del'>-	SEC_VOLTAGE_18</div><div class='del'>-	} fe_sec_voltage_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="fe-sec-tone-mode-t"&gt;</div><div class='del'>-&lt;title&gt;SEC continuous tone&lt;/title&gt;</div><div class='add'>+&lt;section id="query-dvb-frontend-info"&gt;</div><div class='add'>+&lt;title&gt;Querying frontend information&lt;/title&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;The continuous 22KHz tone is usually used with non-DiSEqC capable LNBs to switch the</div><div class='del'>-high/low band of a dual-band LNB. When using DiSEqC epuipment this voltage has to</div><div class='del'>-be switched consistently to the DiSEqC commands as described in the DiSEqC</div><div class='del'>-spec.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	typedef enum fe_sec_tone_mode {</div><div class='del'>-	SEC_TONE_ON,</div><div class='del'>-	SEC_TONE_OFF</div><div class='del'>-	} fe_sec_tone_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='add'>+&lt;para&gt;Usually, the first thing to do when the frontend is opened is to</div><div class='add'>+    check the frontend capabilities. This is done using &lt;link linkend="FE_GET_INFO"&gt;FE_GET_INFO&lt;/link&gt;. This ioctl will enumerate</div><div class='add'>+    the DVB API version and other characteristics about the frontend, and</div><div class='add'>+    can be opened either in read only or read/write mode.&lt;/para&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="fe-sec-mini-cmd-t"&gt;</div><div class='del'>-&lt;title&gt;SEC tone burst&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;The 22KHz tone burst is usually used with non-DiSEqC capable switches to select</div><div class='del'>-between two connected LNBs/satellites. When using DiSEqC epuipment this voltage has to</div><div class='del'>-be switched consistently to the DiSEqC commands as described in the DiSEqC</div><div class='del'>-spec.&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-	typedef enum fe_sec_mini_cmd {</div><div class='del'>-	SEC_MINI_A,</div><div class='del'>-	SEC_MINI_B</div><div class='del'>-	} fe_sec_mini_cmd_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;&lt;/para&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="fe-status-t"&gt;</div><div class='del'>-&lt;title&gt;frontend status&lt;/title&gt;</div><div class='del'>-&lt;para&gt;Several functions of the frontend device use the fe_status data type defined</div><div class='del'>-by&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_status {</div><div class='del'>-	FE_HAS_SIGNAL		= 0x01,</div><div class='del'>-	FE_HAS_CARRIER		= 0x02,</div><div class='del'>-	FE_HAS_VITERBI		= 0x04,</div><div class='del'>-	FE_HAS_SYNC		= 0x08,</div><div class='del'>-	FE_HAS_LOCK		= 0x10,</div><div class='del'>-	FE_TIMEDOUT		= 0x20,</div><div class='del'>-	FE_REINIT		= 0x40,</div><div class='del'>-} fe_status_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;para&gt;to indicate the current state and/or state changes of the frontend hardware:</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;</div><div class='del'>-&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_HAS_SIGNAL&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;The frontend has found something above the noise level&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_HAS_CARRIER&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;The frontend has found a DVB signal&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_HAS_VITERBI&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;The frontend FEC inner coding (Viterbi, LDPC or other inner code) is stable&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_HAS_SYNC&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;Synchronization bytes was found&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_HAS_LOCK&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;The DVB were locked and everything is working&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_TIMEDOUT&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;no lock within the last about 2 seconds&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;FE_REINIT&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;The frontend was reinitialized, application is</div><div class='del'>-recommended to reset DiSEqC, tone and parameters&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;</div><div class='del'>-&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;section id="dvb-fe-read-status"&gt;</div><div class='add'>+&lt;title&gt;Querying frontend status and statistics&lt;/title&gt;</div><div class='ctx'> </div><div class='add'>+&lt;para&gt;Once &lt;link linkend="FE_GET_PROPERTY"&gt;&lt;constant&gt;FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt;</div><div class='add'>+    is called, the frontend will run a kernel thread that will periodically</div><div class='add'>+    check for the tuner lock status and provide statistics about the quality</div><div class='add'>+    of the signal.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;The information about the frontend tuner locking status can be queried</div><div class='add'>+    using &lt;link linkend="FE_READ_STATUS"&gt;FE_READ_STATUS&lt;/link&gt;.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;Signal statistics are provided via &lt;link linkend="FE_GET_PROPERTY"&gt;&lt;constant&gt;FE_GET_PROPERTY&lt;/constant&gt;&lt;/link&gt;.</div><div class='add'>+    Please note that several statistics require the demodulator to be fully</div><div class='add'>+    locked (e. g. with FE_HAS_LOCK bit set). See</div><div class='add'>+    &lt;link linkend="frontend-stat-properties"&gt;Frontend statistics indicators&lt;/link&gt;</div><div class='add'>+    for more details.&lt;/para&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="dvb-frontend-parameters"&gt;</div><div class='del'>-&lt;title&gt;frontend parameters&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The kind of parameters passed to the frontend device for tuning depend on</div><div class='del'>-the kind of hardware you are using.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;The struct &lt;constant&gt;dvb_frontend_parameters&lt;/constant&gt; uses an</div><div class='del'>-union with specific per-system parameters. However, as newer delivery systems</div><div class='del'>-required more data, the structure size weren't enough to fit, and just</div><div class='del'>-extending its size would break the existing applications. So, those parameters</div><div class='del'>-were replaced by the usage of &lt;link linkend="FE_GET_SET_PROPERTY"&gt;</div><div class='del'>-&lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt; ioctl's. The</div><div class='del'>-new API is flexible enough to add new parameters to existing delivery systems,</div><div class='del'>-and to add newer delivery systems.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;So, newer applications should use &lt;link linkend="FE_GET_SET_PROPERTY"&gt;</div><div class='del'>-&lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt; instead, in</div><div class='del'>-order to be able to support the newer System Delivery like  DVB-S2, DVB-T2,</div><div class='del'>-DVB-C2, ISDB, etc.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;All kinds of parameters are combined as an union in the FrontendParameters structure:</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-struct dvb_frontend_parameters {</div><div class='del'>-	uint32_t frequency;     /&amp;#x22C6; (absolute) frequency in Hz for QAM/OFDM &amp;#x22C6;/</div><div class='del'>-				/&amp;#x22C6; intermediate frequency in kHz for QPSK &amp;#x22C6;/</div><div class='del'>-	fe_spectral_inversion_t inversion;</div><div class='del'>-	union {</div><div class='del'>-		struct dvb_qpsk_parameters qpsk;</div><div class='del'>-		struct dvb_qam_parameters  qam;</div><div class='del'>-		struct dvb_ofdm_parameters ofdm;</div><div class='del'>-		struct dvb_vsb_parameters  vsb;</div><div class='del'>-	} u;</div><div class='del'>-};</div><div class='del'>-&lt;/programlisting&gt;&lt;/para&gt;</div><div class='del'>-&lt;para&gt;In the case of QPSK frontends the &lt;constant&gt;frequency&lt;/constant&gt; field specifies the intermediate</div><div class='del'>-frequency, i.e. the offset which is effectively added to the local oscillator frequency (LOF) of</div><div class='del'>-the LNB. The intermediate frequency has to be specified in units of kHz. For QAM and</div><div class='del'>-OFDM frontends the &lt;constant&gt;frequency&lt;/constant&gt; specifies the absolute frequency and is given in Hz.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="dvb-qpsk-parameters"&gt;</div><div class='del'>-&lt;title&gt;QPSK parameters&lt;/title&gt;</div><div class='del'>-&lt;para&gt;For satellite QPSK frontends you have to use the &lt;constant&gt;dvb_qpsk_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>- struct dvb_qpsk_parameters {</div><div class='del'>-	 uint32_t        symbol_rate;  /&amp;#x22C6; symbol rate in Symbols per second &amp;#x22C6;/</div><div class='del'>-	 fe_code_rate_t  fec_inner;    /&amp;#x22C6; forward error correction (see above) &amp;#x22C6;/</div><div class='del'>- };</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="dvb-qam-parameters"&gt;</div><div class='del'>-&lt;title&gt;QAM parameters&lt;/title&gt;</div><div class='del'>-&lt;para&gt;for cable QAM frontend you use the &lt;constant&gt;dvb_qam_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>- struct dvb_qam_parameters {</div><div class='del'>-	 uint32_t         symbol_rate; /&amp;#x22C6; symbol rate in Symbols per second &amp;#x22C6;/</div><div class='del'>-	 fe_code_rate_t   fec_inner;   /&amp;#x22C6; forward error correction (see above) &amp;#x22C6;/</div><div class='del'>-	 fe_modulation_t  modulation;  /&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='del'>- };</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="dvb-vsb-parameters"&gt;</div><div class='del'>-&lt;title&gt;VSB parameters&lt;/title&gt;</div><div class='del'>-&lt;para&gt;ATSC frontends are supported by the &lt;constant&gt;dvb_vsb_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-struct dvb_vsb_parameters {</div><div class='del'>-	fe_modulation_t modulation;	/&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='del'>-};</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="dvb-ofdm-parameters"&gt;</div><div class='del'>-&lt;title&gt;OFDM parameters&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DVB-T frontends are supported by the &lt;constant&gt;dvb_ofdm_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>- struct dvb_ofdm_parameters {</div><div class='del'>-	 fe_bandwidth_t      bandwidth;</div><div class='del'>-	 fe_code_rate_t      code_rate_HP;  /&amp;#x22C6; high priority stream code rate &amp;#x22C6;/</div><div class='del'>-	 fe_code_rate_t      code_rate_LP;  /&amp;#x22C6; low priority stream code rate &amp;#x22C6;/</div><div class='del'>-	 fe_modulation_t     constellation; /&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='del'>-	 fe_transmit_mode_t  transmission_mode;</div><div class='del'>-	 fe_guard_interval_t guard_interval;</div><div class='del'>-	 fe_hierarchy_t      hierarchy_information;</div><div class='del'>- };</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-spectral-inversion-t"&gt;</div><div class='del'>-&lt;title&gt;frontend spectral inversion&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The Inversion field can take one of these values:</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_spectral_inversion {</div><div class='del'>-	INVERSION_OFF,</div><div class='del'>-	INVERSION_ON,</div><div class='del'>-	INVERSION_AUTO</div><div class='del'>-} fe_spectral_inversion_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;para&gt;It indicates if spectral inversion should be presumed or not. In the automatic setting</div><div class='del'>-(&lt;constant&gt;INVERSION_AUTO&lt;/constant&gt;) the hardware will try to figure out the correct setting by</div><div class='del'>-itself.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-code-rate-t"&gt;</div><div class='del'>-&lt;title&gt;frontend code rate&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The possible values for the &lt;constant&gt;fec_inner&lt;/constant&gt; field used on</div><div class='del'>-&lt;link linkend="dvb-qpsk-parameters"&gt;&lt;constant&gt;struct dvb_qpsk_parameters&lt;/constant&gt;&lt;/link&gt; and</div><div class='del'>-&lt;link linkend="dvb-qam-parameters"&gt;&lt;constant&gt;struct dvb_qam_parameters&lt;/constant&gt;&lt;/link&gt; are:</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_code_rate {</div><div class='del'>-	FEC_NONE = 0,</div><div class='del'>-	FEC_1_2,</div><div class='del'>-	FEC_2_3,</div><div class='del'>-	FEC_3_4,</div><div class='del'>-	FEC_4_5,</div><div class='del'>-	FEC_5_6,</div><div class='del'>-	FEC_6_7,</div><div class='del'>-	FEC_7_8,</div><div class='del'>-	FEC_8_9,</div><div class='del'>-	FEC_AUTO,</div><div class='del'>-	FEC_3_5,</div><div class='del'>-	FEC_9_10,</div><div class='del'>-} fe_code_rate_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;para&gt;which correspond to error correction rates of 1/2, 2/3, etc., no error correction or auto</div><div class='del'>-detection.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-modulation-t"&gt;</div><div class='del'>-&lt;title&gt;frontend modulation type for QAM, OFDM and VSB&lt;/title&gt;</div><div class='del'>-&lt;para&gt;For cable and terrestrial frontends, e. g. for</div><div class='del'>-&lt;link linkend="dvb-qam-parameters"&gt;&lt;constant&gt;struct dvb_qpsk_parameters&lt;/constant&gt;&lt;/link&gt;,</div><div class='del'>-&lt;link linkend="dvb-ofdm-parameters"&gt;&lt;constant&gt;struct dvb_qam_parameters&lt;/constant&gt;&lt;/link&gt; and</div><div class='del'>-&lt;link linkend="dvb-vsb-parameters"&gt;&lt;constant&gt;struct dvb_qam_parameters&lt;/constant&gt;&lt;/link&gt;,</div><div class='del'>-it needs to specify the quadrature modulation mode which can be one of the following:</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>- typedef enum fe_modulation {</div><div class='del'>-	QPSK,</div><div class='del'>-	QAM_16,</div><div class='del'>-	QAM_32,</div><div class='del'>-	QAM_64,</div><div class='del'>-	QAM_128,</div><div class='del'>-	QAM_256,</div><div class='del'>-	QAM_AUTO,</div><div class='del'>-	VSB_8,</div><div class='del'>-	VSB_16,</div><div class='del'>-	PSK_8,</div><div class='del'>-	APSK_16,</div><div class='del'>-	APSK_32,</div><div class='del'>-	DQPSK,</div><div class='del'>- } fe_modulation_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section&gt;</div><div class='del'>-&lt;title&gt;More OFDM parameters&lt;/title&gt;</div><div class='del'>-&lt;section id="fe-transmit-mode-t"&gt;</div><div class='del'>-&lt;title&gt;Number of carriers per channel&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_transmit_mode {</div><div class='del'>-	TRANSMISSION_MODE_2K,</div><div class='del'>-	TRANSMISSION_MODE_8K,</div><div class='del'>-	TRANSMISSION_MODE_AUTO,</div><div class='del'>-	TRANSMISSION_MODE_4K,</div><div class='del'>-	TRANSMISSION_MODE_1K,</div><div class='del'>-	TRANSMISSION_MODE_16K,</div><div class='del'>-	TRANSMISSION_MODE_32K,</div><div class='del'>- } fe_transmit_mode_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-bandwidth-t"&gt;</div><div class='del'>-&lt;title&gt;frontend bandwidth&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_bandwidth {</div><div class='del'>-	BANDWIDTH_8_MHZ,</div><div class='del'>-	BANDWIDTH_7_MHZ,</div><div class='del'>-	BANDWIDTH_6_MHZ,</div><div class='del'>-	BANDWIDTH_AUTO,</div><div class='del'>-	BANDWIDTH_5_MHZ,</div><div class='del'>-	BANDWIDTH_10_MHZ,</div><div class='del'>-	BANDWIDTH_1_712_MHZ,</div><div class='del'>-} fe_bandwidth_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-guard-interval-t"&gt;</div><div class='del'>-&lt;title&gt;frontend guard inverval&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_guard_interval {</div><div class='del'>-	GUARD_INTERVAL_1_32,</div><div class='del'>-	GUARD_INTERVAL_1_16,</div><div class='del'>-	GUARD_INTERVAL_1_8,</div><div class='del'>-	GUARD_INTERVAL_1_4,</div><div class='del'>-	GUARD_INTERVAL_AUTO,</div><div class='del'>-	GUARD_INTERVAL_1_128,</div><div class='del'>-	GUARD_INTERVAL_19_128,</div><div class='del'>-	GUARD_INTERVAL_19_256,</div><div class='del'>-} fe_guard_interval_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;section id="fe-hierarchy-t"&gt;</div><div class='del'>-&lt;title&gt;frontend hierarchy&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-typedef enum fe_hierarchy {</div><div class='del'>-	 HIERARCHY_NONE,</div><div class='del'>-	 HIERARCHY_1,</div><div class='del'>-	 HIERARCHY_2,</div><div class='del'>-	 HIERARCHY_4,</div><div class='del'>-	 HIERARCHY_AUTO</div><div class='del'>- } fe_hierarchy_t;</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="dvb-frontend-event"&gt;</div><div class='del'>-&lt;title&gt;frontend events&lt;/title&gt;</div><div class='del'>- &lt;programlisting&gt;</div><div class='del'>- struct dvb_frontend_event {</div><div class='del'>-	 fe_status_t status;</div><div class='del'>-	 struct dvb_frontend_parameters parameters;</div><div class='del'>- };</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>- &lt;/section&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='add'>+&amp;sub-dvbproperty;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="frontend_fcalls"&gt;</div><div class='ctx'> &lt;title&gt;Frontend Function Calls&lt;/title&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="frontend_f_open"&gt;</div><div class='del'>-&lt;title&gt;open()&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;This system call opens a named frontend device (/dev/dvb/adapter0/frontend0)</div><div class='add'>+&lt;refentry id="frontend_f_open"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;DVB frontend open()&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;fe-open&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Open a frontend device&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcsynopsisinfo&gt;#include &amp;lt;fcntl.h&amp;gt;&lt;/funcsynopsisinfo&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;open&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;const char *&lt;parameter&gt;device_name&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;flags&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;device_name&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Device to be opened.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;flags&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Open flags. Access can either be</div><div class='add'>+              &lt;constant&gt;O_RDWR&lt;/constant&gt; or &lt;constant&gt;O_RDONLY&lt;/constant&gt;.&lt;/para&gt;</div><div class='add'>+          &lt;para&gt;Multiple opens are allowed with &lt;constant&gt;O_RDONLY&lt;/constant&gt;. In this mode, only query and read ioctls are allowed.&lt;/para&gt;</div><div class='add'>+          &lt;para&gt;Only one open is allowed in &lt;constant&gt;O_RDWR&lt;/constant&gt;. In this mode, all ioctls are allowed.&lt;/para&gt;</div><div class='add'>+	  &lt;para&gt;When the &lt;constant&gt;O_NONBLOCK&lt;/constant&gt; flag is given, the system calls may return &amp;EAGAIN; when no data is available or when the device driver is temporarily busy.&lt;/para&gt;</div><div class='add'>+         &lt;para&gt;Other flags have no effect.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+    &lt;para&gt;This system call opens a named frontend device (&lt;constant&gt;/dev/dvb/adapter?/frontend?&lt;/constant&gt;)</div><div class='ctx'>  for subsequent use. Usually the first thing to do after a successful open is to</div><div class='ctx'>  find out the frontend type with &lt;link linkend="FE_GET_INFO"&gt;FE_GET_INFO&lt;/link&gt;.&lt;/para&gt;</div><div class='ctx'> &lt;para&gt;The device can be opened in read-only mode, which only allows monitoring of</div><div class='hunk'>@@ -497,1052 +124,146 @@ typedef enum fe_hierarchy {</div><div class='ctx'>  for use in the specified mode. This implies that the corresponding hardware is</div><div class='ctx'>  powered up, and that other front-ends may have been powered down to make</div><div class='ctx'>  that possible.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int open(const char &amp;#x22C6;deviceName, int flags);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;const char</div><div class='del'>- *deviceName&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Name of specific video device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int flags&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;A bit-wise OR of the following flags:&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;O_RDONLY read-only access&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;O_RDWR read/write access&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;O_NONBLOCK open in non-blocking mode&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;(blocking mode is the default)&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;RETURN VALUE&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;ENODEV&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Device driver not loaded/available.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EINTERNAL&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Internal error.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EBUSY&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Device or resource busy.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EINVAL&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Invalid argument.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="frontend_f_close"&gt;</div><div class='del'>-&lt;title&gt;close()&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Return Value&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;On success &lt;function&gt;open&lt;/function&gt; returns the new file</div><div class='add'>+descriptor. On error -1 is returned, and the &lt;varname&gt;errno&lt;/varname&gt;</div><div class='add'>+variable is set appropriately. Possible error codes are:&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EACCES&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The caller has no permission to access the</div><div class='add'>+device.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EBUSY&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The the device driver is already in use.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENXIO&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;No device corresponding to this device special file</div><div class='add'>+exists.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENOMEM&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Not enough kernel memory was available to complete the</div><div class='add'>+request.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EMFILE&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The  process  already  has  the  maximum number of</div><div class='add'>+files open.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENFILE&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The limit on the total number of files open on the</div><div class='add'>+system has been reached.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENODEV&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The device got removed.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+&lt;refentry id="frontend_f_close"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;DVB frontend close()&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;fe-close&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Close a frontend device&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcsynopsisinfo&gt;#include &amp;lt;unistd.h&amp;gt;&lt;/funcsynopsisinfo&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;close&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;This system call closes a previously opened front-end device. After closing</div><div class='ctx'>  a front-end device, its corresponding hardware might be powered down</div><div class='ctx'>  automatically.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int close(int fd);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;RETURN VALUE&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EBADF&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;fd is not a valid open file descriptor.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_READ_STATUS"&gt;</div><div class='del'>-&lt;title&gt;FE_READ_STATUS&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns status information about the front-end. This call only</div><div class='del'>- requires read-only access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_READ_STATUS"&gt;FE_READ_STATUS&lt;/link&gt;,</div><div class='del'>- fe_status_t &amp;#x22C6;status);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_READ_STATUS"&gt;FE_READ_STATUS&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct fe_status_t</div><div class='del'>- *status&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to the location where the front-end status word is</div><div class='del'>- to be stored.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;RETURN VALUE&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EBADF&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;fd is not a valid open file descriptor.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EFAULT&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;status points to invalid address.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_READ_BER"&gt;</div><div class='del'>-&lt;title&gt;FE_READ_BER&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns the bit error rate for the signal currently</div><div class='del'>- received/demodulated by the front-end. For this command, read-only access to</div><div class='del'>- the device is sufficient.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_READ_BER"&gt;FE_READ_BER&lt;/link&gt;,</div><div class='del'>- uint32_t &amp;#x22C6;ber);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_READ_BER"&gt;FE_READ_BER&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;uint32_t *ber&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The bit error rate is stored into *ber.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_READ_SNR"&gt;</div><div class='del'>-&lt;title&gt;FE_READ_SNR&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns the signal-to-noise ratio for the signal currently received</div><div class='del'>- by the front-end. For this command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_READ_SNR"&gt;FE_READ_SNR&lt;/link&gt;, uint16_t</div><div class='del'>- &amp;#x22C6;snr);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_READ_SNR"&gt;FE_READ_SNR&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;uint16_t *snr&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The signal-to-noise ratio is stored into *snr.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_READ_SIGNAL_STRENGTH"&gt;</div><div class='del'>-&lt;title&gt;FE_READ_SIGNAL_STRENGTH&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns the signal strength value for the signal currently received</div><div class='del'>- by the front-end. For this command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl( int fd, int request =</div><div class='del'>- &lt;link linkend="FE_READ_SIGNAL_STRENGTH"&gt;FE_READ_SIGNAL_STRENGTH&lt;/link&gt;, uint16_t &amp;#x22C6;strength);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_READ_SIGNAL_STRENGTH"&gt;FE_READ_SIGNAL_STRENGTH&lt;/link&gt; for this</div><div class='del'>- command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;uint16_t *strength&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The signal strength value is stored into *strength.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_READ_UNCORRECTED_BLOCKS"&gt;</div><div class='del'>-&lt;title&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns the number of uncorrected blocks detected by the device</div><div class='del'>- driver during its lifetime. For meaningful measurements, the increment in block</div><div class='del'>- count during a specific time interval should be calculated. For this command,</div><div class='del'>- read-only access to the device is sufficient.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Note that the counter will wrap to zero after its maximum count has been</div><div class='del'>- reached.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl( int fd, int request =</div><div class='del'>- &lt;link linkend="FE_READ_UNCORRECTED_BLOCKS"&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/link&gt;, uint32_t &amp;#x22C6;ublocks);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_READ_UNCORRECTED_BLOCKS"&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/link&gt; for this</div><div class='del'>- command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;uint32_t *ublocks&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The total number of uncorrected blocks seen by the driver</div><div class='del'>- so far.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_SET_FRONTEND"&gt;</div><div class='del'>-&lt;title&gt;FE_SET_FRONTEND&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call starts a tuning operation using specified parameters. The result</div><div class='del'>- of this call will be successful if the parameters were valid and the tuning could</div><div class='del'>- be initiated. The result of the tuning operation in itself, however, will arrive</div><div class='del'>- asynchronously as an event (see documentation for &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt; and</div><div class='del'>- FrontendEvent.) If a new &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; operation is initiated before</div><div class='del'>- the previous one was completed, the previous operation will be aborted in favor</div><div class='del'>- of the new one. This command requires read/write access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt;,</div><div class='del'>- struct dvb_frontend_parameters &amp;#x22C6;p);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_frontend_parameters</div><div class='del'>- *p&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to parameters for tuning operation.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EINVAL&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Maximum supported symbol rate reached.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_GET_FRONTEND"&gt;</div><div class='del'>-&lt;title&gt;FE_GET_FRONTEND&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call queries the currently effective frontend parameters. For this</div><div class='del'>- command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_GET_FRONTEND"&gt;FE_GET_FRONTEND&lt;/link&gt;,</div><div class='del'>- struct dvb_frontend_parameters &amp;#x22C6;p);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_frontend_parameters</div><div class='del'>- *p&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to parameters for tuning operation.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EINVAL&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Maximum supported symbol rate reached.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_GET_EVENT"&gt;</div><div class='del'>-&lt;title&gt;FE_GET_EVENT&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns a frontend event if available. If an event is not</div><div class='del'>- available, the behavior depends on whether the device is in blocking or</div><div class='del'>- non-blocking mode. In the latter case, the call fails immediately with errno</div><div class='del'>- set to EWOULDBLOCK. In the former case, the call blocks until an event</div><div class='del'>- becomes available.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The standard Linux poll() and/or select() system calls can be used with the</div><div class='del'>- device file descriptor to watch for new events. For select(), the file descriptor</div><div class='del'>- should be included in the exceptfds argument, and for poll(), POLLPRI should</div><div class='del'>- be specified as the wake-up condition. Since the event queue allocated is</div><div class='del'>- rather small (room for 8 events), the queue must be serviced regularly to avoid</div><div class='del'>- overflow. If an overflow happens, the oldest event is discarded from the queue,</div><div class='del'>- and an error (EOVERFLOW) occurs the next time the queue is read. After</div><div class='del'>- reporting the error condition in this fashion, subsequent</div><div class='del'>- &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt;</div><div class='del'>- calls will return events from the queue as usual.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;For the sake of implementation simplicity, this command requires read/write</div><div class='del'>- access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = QPSK_GET_EVENT,</div><div class='del'>- struct dvb_frontend_event &amp;#x22C6;ev);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_frontend_event</div><div class='del'>- *ev&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to the location where the event,&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;if any, is to be stored.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EWOULDBLOCK&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;There is no event pending, and the device is in</div><div class='del'>- non-blocking mode.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;EOVERFLOW&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Overflow in event queue - one or more events were lost.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_GET_INFO"&gt;</div><div class='del'>-&lt;title&gt;FE_GET_INFO&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call returns information about the front-end. This call only requires</div><div class='del'>- read-only access to the device.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt; int ioctl(int fd, int request = &lt;link linkend="FE_GET_INFO"&gt;FE_GET_INFO&lt;/link&gt;, struct</div><div class='del'>- dvb_frontend_info &amp;#x22C6;info);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_GET_INFO"&gt;FE_GET_INFO&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_frontend_info</div><div class='del'>- *info&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Points to the location where the front-end information is</div><div class='del'>- to be stored.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_DISEQC_RESET_OVERLOAD"&gt;</div><div class='del'>-&lt;title&gt;FE_DISEQC_RESET_OVERLOAD&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;If the bus has been automatically powered off due to power overload, this ioctl</div><div class='del'>- call restores the power to the bus. The call requires read/write access to the</div><div class='del'>- device. This call has no effect if the device is manually powered off. Not all</div><div class='del'>- DVB adapters support this ioctl.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>- &lt;link linkend="FE_DISEQC_RESET_OVERLOAD"&gt;FE_DISEQC_RESET_OVERLOAD&lt;/link&gt;);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_DISEQC_RESET_OVERLOAD"&gt;FE_DISEQC_RESET_OVERLOAD&lt;/link&gt; for this</div><div class='del'>- command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_DISEQC_SEND_MASTER_CMD"&gt;</div><div class='del'>-&lt;title&gt;FE_DISEQC_SEND_MASTER_CMD&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call is used to send a a DiSEqC command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>- &lt;link linkend="FE_DISEQC_SEND_MASTER_CMD"&gt;FE_DISEQC_SEND_MASTER_CMD&lt;/link&gt;, struct</div><div class='del'>- dvb_diseqc_master_cmd &amp;#x22C6;cmd);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_DISEQC_SEND_MASTER_CMD"&gt;FE_DISEQC_SEND_MASTER_CMD&lt;/link&gt; for this</div><div class='del'>- command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_diseqc_master_cmd</div><div class='del'>- *cmd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Pointer to the command to be transmitted.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Return Value&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;The function returns &lt;returnvalue&gt;0&lt;/returnvalue&gt; on</div><div class='add'>+success, &lt;returnvalue&gt;-1&lt;/returnvalue&gt; on failure and the</div><div class='add'>+&lt;varname&gt;errno&lt;/varname&gt; is set appropriately. Possible error</div><div class='add'>+codes:&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EBADF&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;parameter&gt;fd&lt;/parameter&gt; is not a valid open file</div><div class='add'>+descriptor.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+&amp;sub-fe-get-info;</div><div class='add'>+&amp;sub-fe-read-status;</div><div class='add'>+&amp;sub-fe-get-property;</div><div class='add'>+&amp;sub-fe-diseqc-reset-overload;</div><div class='add'>+&amp;sub-fe-diseqc-send-master-cmd;</div><div class='add'>+&amp;sub-fe-diseqc-recv-slave-reply;</div><div class='add'>+&amp;sub-fe-diseqc-send-burst;</div><div class='add'>+&amp;sub-fe-set-tone;</div><div class='add'>+&amp;sub-fe-set-voltage;</div><div class='add'>+&amp;sub-fe-enable-high-lnb-voltage;</div><div class='add'>+&amp;sub-fe-set-frontend-tune-mode;</div><div class='add'>+</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="frontend_legacy_dvbv3_api"&gt;</div><div class='add'>+&lt;title&gt;DVB Frontend legacy API (a. k. a. DVBv3)&lt;/title&gt;</div><div class='add'>+&lt;para&gt;The usage of this API is deprecated, as it doesn't support all digital</div><div class='add'>+    TV standards, doesn't provide good statistics measurements and provides</div><div class='add'>+    incomplete information. This is kept only to support legacy applications.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&amp;sub-frontend_legacy_api;</div><div class='ctx'> &lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_DISEQC_RECV_SLAVE_REPLY"&gt;</div><div class='del'>-&lt;title&gt;FE_DISEQC_RECV_SLAVE_REPLY&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call is used to receive reply to a DiSEqC 2.0 command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>- &lt;link linkend="FE_DISEQC_RECV_SLAVE_REPLY"&gt;FE_DISEQC_RECV_SLAVE_REPLY&lt;/link&gt;, struct</div><div class='del'>- dvb_diseqc_slave_reply &amp;#x22C6;reply);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_DISEQC_RECV_SLAVE_REPLY"&gt;FE_DISEQC_RECV_SLAVE_REPLY&lt;/link&gt; for this</div><div class='del'>- command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct</div><div class='del'>- dvb_diseqc_slave_reply</div><div class='del'>- *reply&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Pointer to the command to be received.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_DISEQC_SEND_BURST"&gt;</div><div class='del'>-&lt;title&gt;FE_DISEQC_SEND_BURST&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl call is used to send a 22KHz tone burst.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>- &lt;link linkend="FE_DISEQC_SEND_BURST"&gt;FE_DISEQC_SEND_BURST&lt;/link&gt;, fe_sec_mini_cmd_t burst);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_DISEQC_SEND_BURST"&gt;FE_DISEQC_SEND_BURST&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;fe_sec_mini_cmd_t</div><div class='del'>- burst&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;burst A or B.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_SET_TONE"&gt;</div><div class='del'>-&lt;title&gt;FE_SET_TONE&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This call is used to set the generation of the continuous 22kHz tone. This call</div><div class='del'>- requires read/write permissions.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_SET_TONE"&gt;FE_SET_TONE&lt;/link&gt;,</div><div class='del'>- fe_sec_tone_mode_t tone);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_TONE"&gt;FE_SET_TONE&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;fe_sec_tone_mode_t</div><div class='del'>- tone&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The requested tone generation mode (on/off).&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_SET_VOLTAGE"&gt;</div><div class='del'>-&lt;title&gt;FE_SET_VOLTAGE&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This call is used to set the bus voltage. This call requires read/write</div><div class='del'>- permissions.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_SET_VOLTAGE"&gt;FE_SET_VOLTAGE&lt;/link&gt;,</div><div class='del'>- fe_sec_voltage_t voltage);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_VOLTAGE"&gt;FE_SET_VOLTAGE&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;fe_sec_voltage_t</div><div class='del'>- voltage&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The requested bus voltage.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_ENABLE_HIGH_LNB_VOLTAGE"&gt;</div><div class='del'>-&lt;title&gt;FE_ENABLE_HIGH_LNB_VOLTAGE&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;If high != 0 enables slightly higher voltages instead of 13/18V (to compensate</div><div class='del'>- for long cables). This call requires read/write permissions. Not all DVB</div><div class='del'>- adapters support this ioctl.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>- &lt;link linkend="FE_ENABLE_HIGH_LNB_VOLTAGE"&gt;FE_ENABLE_HIGH_LNB_VOLTAGE&lt;/link&gt;, int high);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals &lt;link linkend="FE_SET_VOLTAGE"&gt;FE_SET_VOLTAGE&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int high&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;The requested bus voltage.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_SET_FRONTEND_TUNE_MODE"&gt;</div><div class='del'>-&lt;title&gt;FE_SET_FRONTEND_TUNE_MODE&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;Allow setting tuner mode flags to the frontend.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>-&lt;link linkend="FE_SET_FRONTEND_TUNE_MODE"&gt;FE_SET_FRONTEND_TUNE_MODE&lt;/link&gt;, unsigned int flags);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-	&lt;para&gt;unsigned int flags&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;</div><div class='del'>-FE_TUNE_MODE_ONESHOT When set, this flag will disable any zigzagging or other "normal" tuning behaviour. Additionally, there will be no automatic monitoring of the lock status, and hence no frontend events will be generated. If a frontend device is closed, this flag will be automatically turned off when the device is reopened read-write.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="FE_DISHNETWORK_SEND_LEGACY_CMD"&gt;</div><div class='del'>-	&lt;title&gt;FE_DISHNETWORK_SEND_LEGACY_CMD&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;WARNING: This is a very obscure legacy command, used only at stv0299 driver. Should not be used on newer drivers.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;It provides a non-standard method for selecting Diseqc voltage on the frontend, for Dish Network legacy switches.&lt;/para&gt;</div><div class='del'>-&lt;para&gt;As support for this ioctl were added in 2004, this means that such dishes were already legacy in 2004.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;SYNOPSIS&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(int fd, int request =</div><div class='del'>-	&lt;link linkend="FE_DISHNETWORK_SEND_LEGACY_CMD"&gt;FE_DISHNETWORK_SEND_LEGACY_CMD&lt;/link&gt;, unsigned long cmd);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&lt;para&gt;PARAMETERS&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-	&lt;para&gt;unsigned long cmd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>-&lt;entry align="char"&gt;</div><div class='del'>-&lt;para&gt;</div><div class='del'>-sends the specified raw cmd to the dish via DISEqC.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-</div><div class='del'>-&amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&lt;/section&gt;</div><div class='del'>-</div><div class='del'>-&amp;sub-dvbproperty;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/frontend_legacy_api.xml b/Documentation/DocBook/media/dvb/frontend_legacy_api.xml<br/>new file mode 100644<br/>index 000000000000..8fadf3a4ba44<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/frontend_legacy_api.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/frontend_legacy_api.xml</a></div><div class='hunk'>@@ -0,0 +1,654 @@</div><div class='add'>+&lt;section id="frontend_legacy_types"&gt;</div><div class='add'>+&lt;title&gt;Frontend Legacy Data Types&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-type-t"&gt;</div><div class='add'>+&lt;title&gt;Frontend type&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;For historical reasons, frontend types are named by the type of modulation</div><div class='add'>+    used in transmission. The fontend types are given by fe_type_t type, defined as:&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-type"&gt;</div><div class='add'>+&lt;title&gt;Frontend types&lt;/title&gt;</div><div class='add'>+&lt;tgroup cols="3"&gt;</div><div class='add'>+   &amp;cs-def;</div><div class='add'>+   &lt;thead&gt;</div><div class='add'>+     &lt;row&gt;</div><div class='add'>+       &lt;entry&gt;fe_type&lt;/entry&gt;</div><div class='add'>+       &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+       &lt;entry&gt;&lt;link linkend="DTV-DELIVERY-SYSTEM"&gt;DTV_DELIVERY_SYSTEM&lt;/link&gt; equivalent type&lt;/entry&gt;</div><div class='add'>+     &lt;/row&gt;</div><div class='add'>+  &lt;/thead&gt;</div><div class='add'>+  &lt;tbody valign="top"&gt;</div><div class='add'>+  &lt;row&gt;</div><div class='add'>+     &lt;entry id="FE-QPSK"&gt;&lt;constant&gt;FE_QPSK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;For DVB-S standard&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;&lt;constant&gt;SYS_DVBS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+  &lt;/row&gt;</div><div class='add'>+  &lt;row&gt;</div><div class='add'>+     &lt;entry id="FE-QAM"&gt;&lt;constant&gt;FE_QAM&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;For DVB-C annex A standard&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;&lt;constant&gt;SYS_DVBC_ANNEX_A&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+  &lt;/row&gt;</div><div class='add'>+  &lt;row&gt;</div><div class='add'>+     &lt;entry id="FE-OFDM"&gt;&lt;constant&gt;FE_OFDM&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;For DVB-T standard&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;&lt;constant&gt;SYS_DVBT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+  &lt;/row&gt;</div><div class='add'>+  &lt;row&gt;</div><div class='add'>+     &lt;entry id="FE-ATSC"&gt;&lt;constant&gt;FE_ATSC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;For ATSC standard (terrestrial) or for DVB-C Annex B (cable) used in US.&lt;/entry&gt;</div><div class='add'>+     &lt;entry&gt;&lt;constant&gt;SYS_ATSC&lt;/constant&gt; (terrestrial) or &lt;constant&gt;SYS_DVBC_ANNEX_B&lt;/constant&gt; (cable)&lt;/entry&gt;</div><div class='add'>+  &lt;/row&gt;</div><div class='add'>+&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/table&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Newer formats like DVB-S2, ISDB-T, ISDB-S and DVB-T2 are not described at the above, as they're</div><div class='add'>+supported via the new &lt;link linkend="FE_GET_PROPERTY"&gt;FE_GET_PROPERTY/FE_GET_SET_PROPERTY&lt;/link&gt; ioctl's, using the &lt;link linkend="DTV-DELIVERY-SYSTEM"&gt;DTV_DELIVERY_SYSTEM&lt;/link&gt; parameter.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;In the old days, &amp;dvb-frontend-info; used to contain</div><div class='add'>+    &lt;constant&gt;fe_type_t&lt;/constant&gt; field to indicate the delivery systems,</div><div class='add'>+    filled with either FE_QPSK, FE_QAM, FE_OFDM or FE_ATSC. While this is</div><div class='add'>+    still filled to keep backward compatibility, the usage of this</div><div class='add'>+    field is deprecated, as it can report just one delivery system, but some</div><div class='add'>+    devices support multiple delivery systems. Please use</div><div class='add'>+    &lt;link linkend="DTV-ENUM-DELSYS"&gt;DTV_ENUM_DELSYS&lt;/link&gt; instead.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;para&gt;On devices that support multiple delivery systems,</div><div class='add'>+    &amp;dvb-frontend-info;::&lt;constant&gt;fe_type_t&lt;/constant&gt; is filled with the</div><div class='add'>+    currently standard, as selected by the last call to</div><div class='add'>+    &lt;link linkend="FE_GET_PROPERTY"&gt;FE_SET_PROPERTY&lt;/link&gt;</div><div class='add'>+    using the &amp;DTV-DELIVERY-SYSTEM; property.&lt;/para&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="fe-bandwidth-t"&gt;</div><div class='add'>+&lt;title&gt;Frontend bandwidth&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="fe-bandwidth"&gt;</div><div class='add'>+    &lt;title&gt;enum fe_bandwidth&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-AUTO"&gt;&lt;constant&gt;BANDWIDTH_AUTO&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Autodetect bandwidth (if supported)&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-1-712-MHZ"&gt;&lt;constant&gt;BANDWIDTH_1_712_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;1.712 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-5-MHZ"&gt;&lt;constant&gt;BANDWIDTH_5_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;5 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-6-MHZ"&gt;&lt;constant&gt;BANDWIDTH_6_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;6 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-7-MHZ"&gt;&lt;constant&gt;BANDWIDTH_7_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;7 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-8-MHZ"&gt;&lt;constant&gt;BANDWIDTH_8_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;8 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry id="BANDWIDTH-10-MHZ"&gt;&lt;constant&gt;BANDWIDTH_10_MHZ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;10 MHz&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-frontend-parameters"&gt;</div><div class='add'>+&lt;title&gt;frontend parameters&lt;/title&gt;</div><div class='add'>+&lt;para&gt;The kind of parameters passed to the frontend device for tuning depend on</div><div class='add'>+the kind of hardware you are using.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;The struct &lt;constant&gt;dvb_frontend_parameters&lt;/constant&gt; uses an</div><div class='add'>+union with specific per-system parameters. However, as newer delivery systems</div><div class='add'>+required more data, the structure size weren't enough to fit, and just</div><div class='add'>+extending its size would break the existing applications. So, those parameters</div><div class='add'>+were replaced by the usage of &lt;link linkend="FE_GET_PROPERTY"&gt;</div><div class='add'>+&lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt; ioctl's. The</div><div class='add'>+new API is flexible enough to add new parameters to existing delivery systems,</div><div class='add'>+and to add newer delivery systems.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;So, newer applications should use &lt;link linkend="FE_GET_PROPERTY"&gt;</div><div class='add'>+&lt;constant&gt;FE_GET_PROPERTY/FE_SET_PROPERTY&lt;/constant&gt;&lt;/link&gt; instead, in</div><div class='add'>+order to be able to support the newer System Delivery like  DVB-S2, DVB-T2,</div><div class='add'>+DVB-C2, ISDB, etc.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;All kinds of parameters are combined as an union in the FrontendParameters structure:</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+struct dvb_frontend_parameters {</div><div class='add'>+	uint32_t frequency;     /&amp;#x22C6; (absolute) frequency in Hz for QAM/OFDM &amp;#x22C6;/</div><div class='add'>+				/&amp;#x22C6; intermediate frequency in kHz for QPSK &amp;#x22C6;/</div><div class='add'>+	&amp;fe-spectral-inversion-t; inversion;</div><div class='add'>+	union {</div><div class='add'>+		struct dvb_qpsk_parameters qpsk;</div><div class='add'>+		struct dvb_qam_parameters  qam;</div><div class='add'>+		struct dvb_ofdm_parameters ofdm;</div><div class='add'>+		struct dvb_vsb_parameters  vsb;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+&lt;/programlisting&gt;&lt;/para&gt;</div><div class='add'>+&lt;para&gt;In the case of QPSK frontends the &lt;constant&gt;frequency&lt;/constant&gt; field specifies the intermediate</div><div class='add'>+frequency, i.e. the offset which is effectively added to the local oscillator frequency (LOF) of</div><div class='add'>+the LNB. The intermediate frequency has to be specified in units of kHz. For QAM and</div><div class='add'>+OFDM frontends the &lt;constant&gt;frequency&lt;/constant&gt; specifies the absolute frequency and is given in Hz.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-qpsk-parameters"&gt;</div><div class='add'>+&lt;title&gt;QPSK parameters&lt;/title&gt;</div><div class='add'>+&lt;para&gt;For satellite QPSK frontends you have to use the &lt;constant&gt;dvb_qpsk_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+ struct dvb_qpsk_parameters {</div><div class='add'>+	 uint32_t        symbol_rate;  /&amp;#x22C6; symbol rate in Symbols per second &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-code-rate-t;  fec_inner;    /&amp;#x22C6; forward error correction (see above) &amp;#x22C6;/</div><div class='add'>+ };</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-qam-parameters"&gt;</div><div class='add'>+&lt;title&gt;QAM parameters&lt;/title&gt;</div><div class='add'>+&lt;para&gt;for cable QAM frontend you use the &lt;constant&gt;dvb_qam_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+ struct dvb_qam_parameters {</div><div class='add'>+	 uint32_t         symbol_rate; /&amp;#x22C6; symbol rate in Symbols per second &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-code-rate-t;   fec_inner;   /&amp;#x22C6; forward error correction (see above) &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-modulation-t;  modulation;  /&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='add'>+ };</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-vsb-parameters"&gt;</div><div class='add'>+&lt;title&gt;VSB parameters&lt;/title&gt;</div><div class='add'>+&lt;para&gt;ATSC frontends are supported by the &lt;constant&gt;dvb_vsb_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+struct dvb_vsb_parameters {</div><div class='add'>+	&amp;fe-modulation-t; modulation;	/&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='add'>+};</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-ofdm-parameters"&gt;</div><div class='add'>+&lt;title&gt;OFDM parameters&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DVB-T frontends are supported by the &lt;constant&gt;dvb_ofdm_parameters&lt;/constant&gt; structure:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+ struct dvb_ofdm_parameters {</div><div class='add'>+	 &amp;fe-bandwidth-t;      bandwidth;</div><div class='add'>+	 &amp;fe-code-rate-t;      code_rate_HP;  /&amp;#x22C6; high priority stream code rate &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-code-rate-t;      code_rate_LP;  /&amp;#x22C6; low priority stream code rate &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-modulation-t;     constellation; /&amp;#x22C6; modulation type (see above) &amp;#x22C6;/</div><div class='add'>+	 &amp;fe-transmit-mode-t;  transmission_mode;</div><div class='add'>+	 &amp;fe-guard-interval-t; guard_interval;</div><div class='add'>+	 &amp;fe-hierarchy-t;      hierarchy_information;</div><div class='add'>+ };</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="dvb-frontend-event"&gt;</div><div class='add'>+&lt;title&gt;frontend events&lt;/title&gt;</div><div class='add'>+ &lt;programlisting&gt;</div><div class='add'>+ struct dvb_frontend_event {</div><div class='add'>+	 fe_status_t status;</div><div class='add'>+	 struct dvb_frontend_parameters parameters;</div><div class='add'>+ };</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+ &lt;/section&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="frontend_legacy_fcalls"&gt;</div><div class='add'>+&lt;title&gt;Frontend Legacy Function Calls&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;Those functions are defined at DVB version 3. The support is kept in</div><div class='add'>+    the kernel due to compatibility issues only. Their usage is strongly</div><div class='add'>+    not recommended&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_READ_BER"&gt;</div><div class='add'>+&lt;title&gt;FE_READ_BER&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call returns the bit error rate for the signal currently</div><div class='add'>+ received/demodulated by the front-end. For this command, read-only access to</div><div class='add'>+ the device is sufficient.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_READ_BER"&gt;FE_READ_BER&lt;/link&gt;,</div><div class='add'>+ uint32_t &amp;#x22C6;ber);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_READ_BER"&gt;FE_READ_BER&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;uint32_t *ber&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;The bit error rate is stored into *ber.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_READ_SNR"&gt;</div><div class='add'>+&lt;title&gt;FE_READ_SNR&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call returns the signal-to-noise ratio for the signal currently received</div><div class='add'>+ by the front-end. For this command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_READ_SNR"&gt;FE_READ_SNR&lt;/link&gt;, uint16_t</div><div class='add'>+ &amp;#x22C6;snr);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_READ_SNR"&gt;FE_READ_SNR&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;uint16_t *snr&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;The signal-to-noise ratio is stored into *snr.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_READ_SIGNAL_STRENGTH"&gt;</div><div class='add'>+&lt;title&gt;FE_READ_SIGNAL_STRENGTH&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call returns the signal strength value for the signal currently received</div><div class='add'>+ by the front-end. For this command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl( int fd, int request =</div><div class='add'>+ &lt;link linkend="FE_READ_SIGNAL_STRENGTH"&gt;FE_READ_SIGNAL_STRENGTH&lt;/link&gt;, uint16_t &amp;#x22C6;strength);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_READ_SIGNAL_STRENGTH"&gt;FE_READ_SIGNAL_STRENGTH&lt;/link&gt; for this</div><div class='add'>+ command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;uint16_t *strength&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;The signal strength value is stored into *strength.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_READ_UNCORRECTED_BLOCKS"&gt;</div><div class='add'>+&lt;title&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call returns the number of uncorrected blocks detected by the device</div><div class='add'>+ driver during its lifetime. For meaningful measurements, the increment in block</div><div class='add'>+ count during a specific time interval should be calculated. For this command,</div><div class='add'>+ read-only access to the device is sufficient.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Note that the counter will wrap to zero after its maximum count has been</div><div class='add'>+ reached.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl( int fd, int request =</div><div class='add'>+ &lt;link linkend="FE_READ_UNCORRECTED_BLOCKS"&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/link&gt;, uint32_t &amp;#x22C6;ublocks);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_READ_UNCORRECTED_BLOCKS"&gt;FE_READ_UNCORRECTED_BLOCKS&lt;/link&gt; for this</div><div class='add'>+ command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;uint32_t *ublocks&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;The total number of uncorrected blocks seen by the driver</div><div class='add'>+ so far.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_SET_FRONTEND"&gt;</div><div class='add'>+&lt;title&gt;FE_SET_FRONTEND&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call starts a tuning operation using specified parameters. The result</div><div class='add'>+ of this call will be successful if the parameters were valid and the tuning could</div><div class='add'>+ be initiated. The result of the tuning operation in itself, however, will arrive</div><div class='add'>+ asynchronously as an event (see documentation for &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt; and</div><div class='add'>+ FrontendEvent.) If a new &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; operation is initiated before</div><div class='add'>+ the previous one was completed, the previous operation will be aborted in favor</div><div class='add'>+ of the new one. This command requires read/write access to the device.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt;,</div><div class='add'>+ struct dvb_frontend_parameters &amp;#x22C6;p);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;struct</div><div class='add'>+ dvb_frontend_parameters</div><div class='add'>+ *p&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Points to parameters for tuning operation.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;EINVAL&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Maximum supported symbol rate reached.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_GET_FRONTEND"&gt;</div><div class='add'>+&lt;title&gt;FE_GET_FRONTEND&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call queries the currently effective frontend parameters. For this</div><div class='add'>+ command, read-only access to the device is sufficient.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request = &lt;link linkend="FE_GET_FRONTEND"&gt;FE_GET_FRONTEND&lt;/link&gt;,</div><div class='add'>+ struct dvb_frontend_parameters &amp;#x22C6;p);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_SET_FRONTEND"&gt;FE_SET_FRONTEND&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;struct</div><div class='add'>+ dvb_frontend_parameters</div><div class='add'>+ *p&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Points to parameters for tuning operation.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;EINVAL&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Maximum supported symbol rate reached.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_GET_EVENT"&gt;</div><div class='add'>+&lt;title&gt;FE_GET_EVENT&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;This ioctl call returns a frontend event if available. If an event is not</div><div class='add'>+ available, the behavior depends on whether the device is in blocking or</div><div class='add'>+ non-blocking mode. In the latter case, the call fails immediately with errno</div><div class='add'>+ set to EWOULDBLOCK. In the former case, the call blocks until an event</div><div class='add'>+ becomes available.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;The standard Linux poll() and/or select() system calls can be used with the</div><div class='add'>+ device file descriptor to watch for new events. For select(), the file descriptor</div><div class='add'>+ should be included in the exceptfds argument, and for poll(), POLLPRI should</div><div class='add'>+ be specified as the wake-up condition. Since the event queue allocated is</div><div class='add'>+ rather small (room for 8 events), the queue must be serviced regularly to avoid</div><div class='add'>+ overflow. If an overflow happens, the oldest event is discarded from the queue,</div><div class='add'>+ and an error (EOVERFLOW) occurs the next time the queue is read. After</div><div class='add'>+ reporting the error condition in this fashion, subsequent</div><div class='add'>+ &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt;</div><div class='add'>+ calls will return events from the queue as usual.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;For the sake of implementation simplicity, this command requires read/write</div><div class='add'>+ access to the device.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;SYNOPSIS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request = QPSK_GET_EVENT,</div><div class='add'>+ struct dvb_frontend_event &amp;#x22C6;ev);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;PARAMETERS</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int fd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;int request&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Equals &lt;link linkend="FE_GET_EVENT"&gt;FE_GET_EVENT&lt;/link&gt; for this command.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;struct</div><div class='add'>+ dvb_frontend_event</div><div class='add'>+ *ev&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Points to the location where the event,&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;if any, is to be stored.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;EWOULDBLOCK&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;There is no event pending, and the device is in</div><div class='add'>+ non-blocking mode.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;EOVERFLOW&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;&lt;entry</div><div class='add'>+ align="char"&gt;</div><div class='add'>+&lt;para&gt;Overflow in event queue - one or more events were lost.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;section id="FE_DISHNETWORK_SEND_LEGACY_CMD"&gt;</div><div class='add'>+	&lt;title&gt;FE_DISHNETWORK_SEND_LEGACY_CMD&lt;/title&gt;</div><div class='add'>+&lt;para&gt;DESCRIPTION&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='add'>+&lt;entry align="char"&gt;</div><div class='add'>+&lt;para&gt;WARNING: This is a very obscure legacy command, used only at stv0299 driver. Should not be used on newer drivers.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;It provides a non-standard method for selecting Diseqc voltage on the frontend, for Dish Network legacy switches.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;As support for this ioctl were added in 2004, this means that such dishes were already legacy in 2004.&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;SYNOPSIS&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='add'>+&lt;entry align="char"&gt;</div><div class='add'>+&lt;para&gt;int ioctl(int fd, int request =</div><div class='add'>+	&lt;link linkend="FE_DISHNETWORK_SEND_LEGACY_CMD"&gt;FE_DISHNETWORK_SEND_LEGACY_CMD&lt;/link&gt;, unsigned long cmd);&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+&lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;PARAMETERS&lt;/para&gt;</div><div class='add'>+&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;</div><div class='add'>+&lt;entry align="char"&gt;</div><div class='add'>+	&lt;para&gt;unsigned long cmd&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+&lt;entry align="char"&gt;</div><div class='add'>+&lt;para&gt;</div><div class='add'>+sends the specified raw cmd to the dish via DISEqC.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+ &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+&amp;return-value-dvb;</div><div class='add'>+&lt;/section&gt;</div><div class='add'>+</div><div class='add'>+&lt;/section&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/intro.xml b/Documentation/DocBook/media/dvb/intro.xml<br/>index 2048b53d19b9..bcc72c216402 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/intro.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/intro.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/intro.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/intro.xml</a></div><div class='hunk'>@@ -129,41 +129,41 @@ hardware. It can depend on the individual security requirements of the</div><div class='ctx'> platform, if and how many of the CA functions are made available to the</div><div class='ctx'> application through this device.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;All devices can be found in the &lt;emphasis role="tt"&gt;/dev&lt;/emphasis&gt;</div><div class='del'>-tree under &lt;emphasis role="tt"&gt;/dev/dvb&lt;/emphasis&gt;. The individual devices</div><div class='add'>+&lt;para&gt;All devices can be found in the &lt;constant&gt;/dev&lt;/constant&gt;</div><div class='add'>+tree under &lt;constant&gt;/dev/dvb&lt;/constant&gt;. The individual devices</div><div class='ctx'> are called:&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;itemizedlist&gt;</div><div class='ctx'> &lt;listitem&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/audioM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/audioM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'> &lt;listitem&gt;</div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/videoM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/videoM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'> &lt;listitem&gt;</div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/frontendM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/frontendM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'>  &lt;listitem&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/netM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/netM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'>  &lt;listitem&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/demuxM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/demuxM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'>  &lt;listitem&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/dvrM&lt;/emphasis&gt;,&lt;/para&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/dvrM&lt;/constant&gt;,&lt;/para&gt;</div><div class='ctx'> &lt;/listitem&gt;</div><div class='ctx'>  &lt;listitem&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;&lt;emphasis role="tt"&gt;/dev/dvb/adapterN/caM&lt;/emphasis&gt;,&lt;/para&gt;&lt;/listitem&gt;&lt;/itemizedlist&gt;</div><div class='add'>+&lt;para&gt;&lt;constant&gt;/dev/dvb/adapterN/caM&lt;/constant&gt;,&lt;/para&gt;&lt;/listitem&gt;&lt;/itemizedlist&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;para&gt;where N enumerates the DVB PCI cards in a system starting</div><div class='ctx'> from&amp;#x00A0;0, and M enumerates the devices of each type within each</div><div class='del'>-adapter, starting from&amp;#x00A0;0, too. We will omit the &amp;#8220;&lt;emphasis</div><div class='del'>-role="tt"&gt;/dev/dvb/adapterN/&lt;/emphasis&gt;&amp;#8221; in the further dicussion</div><div class='add'>+adapter, starting from&amp;#x00A0;0, too. We will omit the &amp;#8220;</div><div class='add'>+&lt;constant&gt;/dev/dvb/adapterN/&lt;/constant&gt;&amp;#8221; in the further dicussion</div><div class='ctx'> of these devices. The naming scheme for the devices is the same wheter</div><div class='ctx'> devfs is used or not.&lt;/para&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -202,10 +202,10 @@ a partial path like:&lt;/para&gt;</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;para&gt;To enable applications to support different API version, an</div><div class='del'>-additional include file &lt;emphasis</div><div class='del'>-role="tt"&gt;linux/dvb/version.h&lt;/emphasis&gt; exists, which defines the</div><div class='del'>-constant &lt;emphasis role="tt"&gt;DVB_API_VERSION&lt;/emphasis&gt;. This document</div><div class='del'>-describes &lt;emphasis role="tt"&gt;DVB_API_VERSION 5.8&lt;/emphasis&gt;.</div><div class='add'>+additional include file</div><div class='add'>+&lt;constant&gt;linux/dvb/version.h&lt;/constant&gt; exists, which defines the</div><div class='add'>+constant &lt;constant&gt;DVB_API_VERSION&lt;/constant&gt;. This document</div><div class='add'>+describes &lt;constant&gt;DVB_API_VERSION 5.10&lt;/constant&gt;.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;/section&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/kdapi.xml b/Documentation/DocBook/media/dvb/kdapi.xml<br/>index 6c11ec52cbee..68bcd33a82c3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/kdapi.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/kdapi.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/kdapi.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/kdapi.xml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> &lt;title&gt;Kernel Demux API&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;The kernel demux API defines a driver-internal interface for registering low-level,</div><div class='ctx'> hardware specific driver to a hardware independent demux layer. It is only of interest for</div><div class='del'>-DVB device driver writers. The header file for this API is named &lt;emphasis role="tt"&gt;demux.h&lt;/emphasis&gt; and located in</div><div class='del'>-&lt;emphasis role="tt"&gt;drivers/media/dvb-core&lt;/emphasis&gt;.</div><div class='add'>+DVB device driver writers. The header file for this API is named &lt;constant&gt;demux.h&lt;/constant&gt; and located in</div><div class='add'>+&lt;constant&gt;"&gt;drivers/media/dvb-core&lt;/constant&gt;.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;para&gt;Maintainer note: This section must be reviewed. It is probably out of date.</div><div class='ctx'> &lt;/para&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/net.xml b/Documentation/DocBook/media/dvb/net.xml<br/>index a193e86941b5..d2e44b7e07df 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/net.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/net.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/net.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/net.xml</a></div><div class='hunk'>@@ -1,156 +1,238 @@</div><div class='ctx'> &lt;title&gt;DVB Network API&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The DVB net device enables feeding of MPE (multi protocol encapsulation) packets</div><div class='del'>-received via DVB into the Linux network protocol stack, e.g. for internet via satellite</div><div class='del'>-applications. It can be accessed through &lt;emphasis role="tt"&gt;/dev/dvb/adapter0/net0&lt;/emphasis&gt;. Data types and</div><div class='del'>-and ioctl definitions can be accessed by including &lt;emphasis role="tt"&gt;linux/dvb/net.h&lt;/emphasis&gt; in your</div><div class='del'>-application.</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;section id="dvb_net_types"&gt;</div><div class='del'>-&lt;title&gt;DVB Net Data Types&lt;/title&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="dvb-net-if"&gt;</div><div class='del'>-&lt;title&gt;struct dvb_net_if&lt;/title&gt;</div><div class='del'>-&lt;programlisting&gt;</div><div class='del'>-struct dvb_net_if {</div><div class='del'>-	__u16 pid;</div><div class='del'>-	__u16 if_num;</div><div class='del'>-	__u8  feedtype;</div><div class='del'>-#define DVB_NET_FEEDTYPE_MPE 0	/&amp;#x22C6; multi protocol encapsulation &amp;#x22C6;/</div><div class='del'>-#define DVB_NET_FEEDTYPE_ULE 1	/&amp;#x22C6; ultra lightweight encapsulation &amp;#x22C6;/</div><div class='del'>-};</div><div class='del'>-&lt;/programlisting&gt;</div><div class='del'>-&lt;/section&gt;</div><div class='add'>+&lt;para&gt;The DVB net device controls the mapping of data packages that are</div><div class='add'>+    part of a transport stream to be mapped into a virtual network interface,</div><div class='add'>+    visible through the standard Linux network protocol stack.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;Currently, two encapsulations are supported:&lt;/para&gt;</div><div class='add'>+&lt;itemizedlist&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;&lt;ulink url="http://en.wikipedia.org/wiki/Multiprotocol_Encapsulation"&gt;</div><div class='add'>+	Multi Protocol Encapsulation (MPE)&lt;/ulink&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+    &lt;listitem&gt;&lt;para&gt;&lt;ulink url="http://en.wikipedia.org/wiki/Unidirectional_Lightweight_Encapsulation"&gt;</div><div class='add'>+	Ultra Lightweight Encapsulation (ULE)&lt;/ulink&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+&lt;/itemizedlist&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;In order to create the Linux virtual network interfaces, an application</div><div class='add'>+    needs to tell to the Kernel what are the PIDs and the encapsulation types</div><div class='add'>+    that are present on the transport stream. This is done through</div><div class='add'>+    &lt;constant&gt;/dev/dvb/adapter?/net?&lt;/constant&gt; device node.</div><div class='add'>+    The data will be available via virtual &lt;constant&gt;dvb?_?&lt;/constant&gt;</div><div class='add'>+    network interfaces, and will be controled/routed via the standard</div><div class='add'>+    ip tools (like ip, route, netstat, ifconfig, etc).&lt;/para&gt;</div><div class='add'>+&lt;para&gt; Data types and and ioctl definitions are defined via</div><div class='add'>+    &lt;constant&gt;linux/dvb/net.h&lt;/constant&gt; header.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-&lt;/section&gt;</div><div class='ctx'> &lt;section id="net_fcalls"&gt;</div><div class='ctx'> &lt;title&gt;DVB net Function Calls&lt;/title&gt;</div><div class='del'>-&lt;para&gt;To be written&amp;#x2026;</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-&lt;section id="NET_ADD_IF"</div><div class='del'>-role="subsection"&gt;&lt;title&gt;NET_ADD_IF&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl is undocumented. Documentation is welcome.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(fd, int request = NET_ADD_IF,</div><div class='del'>- struct dvb_net_if *if);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals NET_ADD_IF for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct dvb_net_if *if</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Undocumented.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&lt;refentry id="NET_ADD_IF"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl NET_ADD_IF&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;NET_ADD_IF&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Creates a new network interface for a given Packet ID.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dvb_net_if *&lt;parameter&gt;net_if&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_TONE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;net_if&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;pointer to &amp;dvb-net-if;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;The NET_ADD_IF ioctl system call selects the Packet ID (PID) that</div><div class='add'>+    contains a TCP/IP traffic, the type of encapsulation to be used (MPE or ULE)</div><div class='add'>+    and the interface number for the new interface to be created. When the</div><div class='add'>+    system call successfully returns, a new virtual network interface is  created.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;The &amp;dvb-net-if;::ifnum field will be filled with the number of the</div><div class='add'>+    created interface.&lt;/para&gt;</div><div class='add'>+</div><div class='ctx'> &amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+&lt;refsect1 id="dvb-net-if-t"&gt;</div><div class='add'>+&lt;title&gt;struct &lt;structname&gt;dvb_net_if&lt;/structname&gt; description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;table pgwide="1" frame="none" id="dvb-net-if"&gt;</div><div class='add'>+    &lt;title&gt;struct &lt;structname&gt;dvb_net_if&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+    &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;pid&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Packet ID (PID) of the MPEG-TS that contains</div><div class='add'>+		data&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;ifnum&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;number of the DVB interface.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;&lt;row&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;feedtype&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="char"&gt;Encapsulation type of the feed. It can be:</div><div class='add'>+		&lt;constant&gt;DVB_NET_FEEDTYPE_MPE&lt;/constant&gt; for MPE encoding</div><div class='add'>+		or</div><div class='add'>+		&lt;constant&gt;DVB_NET_FEEDTYPE_ULE&lt;/constant&gt; for ULE encoding.</div><div class='add'>+		&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+        &lt;/tbody&gt;</div><div class='add'>+    &lt;/tgroup&gt;</div><div class='add'>+&lt;/table&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+&lt;refentry id="NET_REMOVE_IF"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl NET_REMOVE_IF&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;NET_REMOVE_IF&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Removes a network interface.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;ifnum&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_TONE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;net_if&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;number of the interface to be removed&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;The NET_REMOVE_IF ioctl deletes an interface previously created</div><div class='add'>+    via &amp;NET-ADD-IF;.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="NET_REMOVE_IF"</div><div class='del'>-role="subsection"&gt;&lt;title&gt;NET_REMOVE_IF&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl is undocumented. Documentation is welcome.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(fd, int request = NET_REMOVE_IF);</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals NET_REMOVE_IF for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='ctx'> &amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&lt;refentry id="NET_GET_IF"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl NET_GET_IF&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;NET_GET_IF&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Read the configuration data of an interface created via</div><div class='add'>+	&amp;NET-ADD-IF;.&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct dvb_net_if *&lt;parameter&gt;net_if&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+        &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fe_fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;FE_SET_TONE&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;net_if&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;pointer to &amp;dvb-net-if;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+&lt;para&gt;The NET_GET_IF ioctl uses the interface number given by the</div><div class='add'>+    &amp;dvb-net-if;::ifnum field and fills the content of &amp;dvb-net-if; with</div><div class='add'>+    the packet ID and encapsulation type used on such interface. If the</div><div class='add'>+    interface was not created yet with &amp;NET-ADD-IF;, it will return -1 and</div><div class='add'>+    fill the &lt;constant&gt;errno&lt;/constant&gt; with &lt;constant&gt;EINVAL&lt;/constant&gt;</div><div class='add'>+    error code.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-&lt;section id="NET_GET_IF"</div><div class='del'>-role="subsection"&gt;&lt;title&gt;NET_GET_IF&lt;/title&gt;</div><div class='del'>-&lt;para&gt;DESCRIPTION</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;This ioctl is undocumented. Documentation is welcome.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;SYNOPSIS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="1"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int ioctl(fd, int request = NET_GET_IF,</div><div class='del'>- struct dvb_net_if *if);&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='del'>-&lt;para&gt;PARAMETERS</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;informaltable&gt;&lt;tgroup cols="2"&gt;&lt;tbody&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int fd&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;File descriptor returned by a previous call to open().&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;int request&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Equals NET_GET_IF for this command.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;row&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;struct dvb_net_if *if</div><div class='del'>-&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;&lt;entry</div><div class='del'>- align="char"&gt;</div><div class='del'>-&lt;para&gt;Undocumented.&lt;/para&gt;</div><div class='del'>-&lt;/entry&gt;</div><div class='del'>- &lt;/row&gt;&lt;/tbody&gt;&lt;/tgroup&gt;&lt;/informaltable&gt;</div><div class='ctx'> &amp;return-value-dvb;</div><div class='del'>-&lt;/section&gt;</div><div class='add'>+&lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/video.xml b/Documentation/DocBook/media/dvb/video.xml<br/>index 3ea1ca7e785e..71547fcd7ba0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/video.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/dvb/video.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/video.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/dvb/video.xml</a></div><div class='hunk'>@@ -1,12 +1,12 @@</div><div class='ctx'> &lt;title&gt;DVB Video Device&lt;/title&gt;</div><div class='ctx'> &lt;para&gt;The DVB video device controls the MPEG2 video decoder of the DVB hardware. It</div><div class='del'>-can be accessed through &lt;emphasis role="tt"&gt;/dev/dvb/adapter0/video0&lt;/emphasis&gt;. Data types and and</div><div class='del'>-ioctl definitions can be accessed by including &lt;emphasis role="tt"&gt;linux/dvb/video.h&lt;/emphasis&gt; in your</div><div class='add'>+can be accessed through &lt;emphasis role="bold"&gt;/dev/dvb/adapter0/video0&lt;/emphasis&gt;. Data types and and</div><div class='add'>+ioctl definitions can be accessed by including &lt;emphasis role="bold"&gt;linux/dvb/video.h&lt;/emphasis&gt; in your</div><div class='ctx'> application.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;para&gt;Note that the DVB video device only controls decoding of the MPEG video stream, not</div><div class='ctx'> its presentation on the TV or computer screen. On PCs this is typically handled by an</div><div class='del'>-associated video4linux device, e.g. &lt;emphasis role="tt"&gt;/dev/video&lt;/emphasis&gt;, which allows scaling and defining output</div><div class='add'>+associated video4linux device, e.g. &lt;emphasis role="bold"&gt;/dev/video&lt;/emphasis&gt;, which allows scaling and defining output</div><div class='ctx'> windows.</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;para&gt;Some DVB cards don&amp;#8217;t have their own MPEG decoder, which results in the omission of</div><div class='hunk'>@@ -24,7 +24,7 @@ have been created to replace that functionality.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;section id="video-format-t"&gt;</div><div class='ctx'> &lt;title&gt;video_format_t&lt;/title&gt;</div><div class='del'>-&lt;para&gt;The &lt;emphasis role="tt"&gt;video_format_t&lt;/emphasis&gt; data type defined by</div><div class='add'>+&lt;para&gt;The &lt;constant&gt;video_format_t&lt;/constant&gt; data type defined by</div><div class='ctx'> &lt;/para&gt;</div><div class='ctx'> &lt;programlisting&gt;</div><div class='ctx'> typedef enum {</div><div class='hunk'>@@ -74,7 +74,7 @@ typedef enum {</div><div class='ctx'> &lt;/programlisting&gt;</div><div class='ctx'> &lt;para&gt;VIDEO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the</div><div class='ctx'> DVR device) as the source of the video stream. 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class="TextShape"&gt;&lt;tspan font-size="635px" font-family="&amp;apos;Times New Roman&amp;apos;, serif" font-weight="400" class="TextParagraph"&gt;&lt;tspan y="14420.677" x="12035.335" class="TextPosition"&gt;&lt;tspan fill="#000000"&gt; DMA&lt;/tspan&gt;&lt;/tspan&gt;&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+&lt;/g&gt;&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml<br/>index 4e9462f1ab4c..6e1667b5f3eb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/controls.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/controls.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/controls.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/controls.xml</a></div><div class='hunk'>@@ -4863,7 +4863,7 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'>       &lt;/note&gt;</div><div class='ctx'> </div><div class='ctx'>       &lt;para&gt;</div><div class='del'>-	The Image Source control class is intended for low-level control of</div><div class='add'>+	The Image Process control class is intended for low-level control of</div><div class='ctx'> 	image processing functions. Unlike</div><div class='ctx'> 	&lt;constant&gt;V4L2_CID_IMAGE_SOURCE_CLASS&lt;/constant&gt;, the controls in</div><div class='ctx'> 	this class affect processing the image, and do not control capturing</div><div class='hunk'>@@ -4871,7 +4871,7 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'>       &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>       &lt;table pgwide="1" frame="none" id="image-process-control-id"&gt;</div><div class='del'>-      &lt;title&gt;Image Source Control IDs&lt;/title&gt;</div><div class='add'>+      &lt;title&gt;Image Process Control IDs&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'>       &lt;tgroup cols="4"&gt;</div><div class='ctx'> 	&lt;colspec colname="c1" colwidth="1*" /&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/io.xml b/Documentation/DocBook/media/v4l/io.xml<br/>index 1c17f802b471..7bbc2a48911e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/io.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/io.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/io.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/io.xml</a></div><div class='hunk'>@@ -841,15 +841,15 @@ is the file descriptor associated with a DMABUF buffer.&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved2&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;A place holder for future extensions. Applications</div><div class='del'>-should set this to 0.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;A place holder for future extensions. Drivers and applications</div><div class='add'>+must set this to 0.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;A place holder for future extensions. Applications</div><div class='del'>-should set this to 0.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;A place holder for future extensions. Drivers and applications</div><div class='add'>+must set this to 0.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='hunk'>@@ -930,8 +930,8 @@ should set this to 0.&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved[11]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Reserved for future use. Should be zeroed by an</div><div class='del'>-	    application.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved for future use. Should be zeroed by drivers and</div><div class='add'>+	    applications.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='hunk'>@@ -1129,6 +1129,18 @@ in this buffer has not been created by the CPU but by some DMA-capable unit,</div><div class='ctx'> in which case caches have not been used.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x00100000&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Last buffer produced by the hardware. mem2mem codec drivers</div><div class='add'>+set this flag on the capture queue for the last buffer when the</div><div class='add'>+&lt;link linkend="vidioc-querybuf"&gt;VIDIOC_QUERYBUF&lt;/link&gt; or</div><div class='add'>+&lt;link linkend="vidioc-qbuf"&gt;VIDIOC_DQBUF&lt;/link&gt; ioctl is called. Due to hardware</div><div class='add'>+limitations, the last buffer may be empty. In this case the driver will set the</div><div class='add'>+&lt;structfield&gt;bytesused&lt;/structfield&gt; field to 0, regardless of the format. Any</div><div class='add'>+Any subsequent call to the &lt;link linkend="vidioc-qbuf"&gt;VIDIOC_DQBUF&lt;/link&gt; ioctl</div><div class='add'>+will not block anymore, but return an &amp;EPIPE;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_BUF_FLAG_TIMESTAMP_MASK&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;0x0000e000&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Mask for timestamp types below. To test the</div><div class='hunk'>@@ -1155,7 +1167,7 @@ in which case caches have not been used.&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;The buffer timestamp has been taken from the</div><div class='ctx'> 	    &lt;constant&gt;CLOCK_MONOTONIC&lt;/constant&gt; clock. To access the</div><div class='ctx'> 	    same clock outside V4L2, use</div><div class='del'>-	    &lt;function&gt;clock_gettime(2)&lt;/function&gt; .&lt;/entry&gt;</div><div class='add'>+	    &lt;function&gt;clock_gettime(2)&lt;/function&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_BUF_FLAG_TIMESTAMP_COPY&lt;/constant&gt;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/media-func-open.xml b/Documentation/DocBook/media/v4l/media-func-open.xml<br/>index f7df034dc9ed..122374a3e894 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/media-func-open.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/media-func-open.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/media-func-open.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/media-func-open.xml</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'>     &lt;para&gt;To open a media device applications call &lt;function&gt;open()&lt;/function&gt;</div><div class='ctx'>     with the desired device name. The function has no side effects; the device</div><div class='ctx'>     configuration remain unchanged.&lt;/para&gt;</div><div class='del'>-    &lt;para&gt;When the device is opened in read-only mode, attemps to modify its</div><div class='add'>+    &lt;para&gt;When the device is opened in read-only mode, attempts to modify its</div><div class='ctx'>     configuration will result in an error, and &lt;varname&gt;errno&lt;/varname&gt; will be</div><div class='ctx'>     set to &lt;errorcode&gt;EBADF&lt;/errorcode&gt;.&lt;/para&gt;</div><div class='ctx'>   &lt;/refsect1&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/pixfmt-y16-be.xml b/Documentation/DocBook/media/v4l/pixfmt-y16-be.xml<br/>new file mode 100644<br/>index 000000000000..cea53e1eaa43<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt-y16-be.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/pixfmt-y16-be.xml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+&lt;refentry id="V4L2-PIX-FMT-Y16-BE"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;V4L2_PIX_FMT_Y16_BE ('Y16 ' | (1 &amp;lt;&amp;lt; 31))&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;&lt;constant&gt;V4L2_PIX_FMT_Y16_BE&lt;/constant&gt;&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Grey-scale image&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;This is a grey-scale image with a depth of 16 bits per</div><div class='add'>+pixel. The most significant byte is stored at lower memory addresses</div><div class='add'>+(big-endian). Note the actual sampling precision may be lower than</div><div class='add'>+16 bits, for example 10 bits per pixel with values in range 0 to</div><div class='add'>+1023.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;example&gt;</div><div class='add'>+      &lt;title&gt;&lt;constant&gt;V4L2_PIX_FMT_Y16_BE&lt;/constant&gt; 4 &amp;times; 4</div><div class='add'>+pixel image&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;formalpara&gt;</div><div class='add'>+	&lt;title&gt;Byte Order.&lt;/title&gt;</div><div class='add'>+	&lt;para&gt;Each cell is one byte.</div><div class='add'>+	  &lt;informaltable frame="none"&gt;</div><div class='add'>+	    &lt;tgroup cols="9" align="center"&gt;</div><div class='add'>+	      &lt;colspec align="left" colwidth="2*" /&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;start&amp;nbsp;+&amp;nbsp;0:&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;00high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;00low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;01high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;01low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;02high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;02low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;03high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;03low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;start&amp;nbsp;+&amp;nbsp;8:&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;10high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;10low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;11high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;11low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;12high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;12low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;13high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;13low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;start&amp;nbsp;+&amp;nbsp;16:&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;20high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;20low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;21high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;21low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;22high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;22low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;23high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;23low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;start&amp;nbsp;+&amp;nbsp;24:&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;30high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;30low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;31high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;31low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;32high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;32low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;33high&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Y'&lt;subscript&gt;33low&lt;/subscript&gt;&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/tgroup&gt;</div><div class='add'>+	  &lt;/informaltable&gt;</div><div class='add'>+	&lt;/para&gt;</div><div class='add'>+      &lt;/formalpara&gt;</div><div class='add'>+    &lt;/example&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml<br/>index fcde4e20205e..965ea916784a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/pixfmt.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/pixfmt.xml</a></div><div class='hunk'>@@ -157,6 +157,14 @@ see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'> capture streams and by the application for output streams,</div><div class='ctx'> see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	  &lt;entry&gt;&amp;v4l2-xfer-func;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;structfield&gt;xfer_func&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;This information supplements the</div><div class='add'>+&lt;structfield&gt;colorspace&lt;/structfield&gt; and must be set by the driver for</div><div class='add'>+capture streams and by the application for output streams,</div><div class='add'>+see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='ctx'>       &lt;/tbody&gt;</div><div class='ctx'>     &lt;/tgroup&gt;</div><div class='ctx'>   &lt;/table&gt;</div><div class='hunk'>@@ -190,8 +198,8 @@ see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'>         &lt;row&gt;</div><div class='ctx'>           &lt;entry&gt;__u16&lt;/entry&gt;</div><div class='ctx'>           &lt;entry&gt;&lt;structfield&gt;reserved[6]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-          &lt;entry&gt;Reserved for future extensions. Should be zeroed by the</div><div class='del'>-           application.&lt;/entry&gt;</div><div class='add'>+          &lt;entry&gt;Reserved for future extensions. Should be zeroed by drivers and</div><div class='add'>+           applications.&lt;/entry&gt;</div><div class='ctx'>         &lt;/row&gt;</div><div class='ctx'>       &lt;/tbody&gt;</div><div class='ctx'>     &lt;/tgroup&gt;</div><div class='hunk'>@@ -264,11 +272,19 @@ see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'> capture streams and by the application for output streams,</div><div class='ctx'> see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	  &lt;entry&gt;&amp;v4l2-xfer-func;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;structfield&gt;xfer_func&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;This information supplements the</div><div class='add'>+&lt;structfield&gt;colorspace&lt;/structfield&gt; and must be set by the driver for</div><div class='add'>+capture streams and by the application for output streams,</div><div class='add'>+see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='ctx'>         &lt;row&gt;</div><div class='ctx'>           &lt;entry&gt;__u8&lt;/entry&gt;</div><div class='del'>-          &lt;entry&gt;&lt;structfield&gt;reserved[8]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-          &lt;entry&gt;Reserved for future extensions. Should be zeroed by the</div><div class='del'>-           application.&lt;/entry&gt;</div><div class='add'>+          &lt;entry&gt;&lt;structfield&gt;reserved[7]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+          &lt;entry&gt;Reserved for future extensions. Should be zeroed by drivers</div><div class='add'>+           and applications.&lt;/entry&gt;</div><div class='ctx'>         &lt;/row&gt;</div><div class='ctx'>       &lt;/tbody&gt;</div><div class='ctx'>     &lt;/tgroup&gt;</div><div class='hunk'>@@ -476,15 +492,16 @@ is also very useful.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;section&gt;</div><div class='ctx'>     &lt;title&gt;Defining Colorspaces in V4L2&lt;/title&gt;</div><div class='del'>-    &lt;para&gt;In V4L2 colorspaces are defined by three values. The first is the colorspace</div><div class='del'>-identifier (&amp;v4l2-colorspace;) which defines the chromaticities, the transfer</div><div class='add'>+    &lt;para&gt;In V4L2 colorspaces are defined by four values. The first is the colorspace</div><div class='add'>+identifier (&amp;v4l2-colorspace;) which defines the chromaticities, the default transfer</div><div class='ctx'> function, the default Y'CbCr encoding and the default quantization method. The second</div><div class='del'>-is the Y'CbCr encoding identifier (&amp;v4l2-ycbcr-encoding;) to specify non-standard</div><div class='del'>-Y'CbCr encodings and the third is the quantization identifier (&amp;v4l2-quantization;)</div><div class='del'>-to specify non-standard quantization methods. Most of the time only the colorspace</div><div class='del'>-field of &amp;v4l2-pix-format; or &amp;v4l2-pix-format-mplane; needs to be filled in. Note</div><div class='del'>-that the default R'G'B' quantization is full range for all colorspaces except for</div><div class='del'>-BT.2020 which uses limited range R'G'B' quantization.&lt;/para&gt;</div><div class='add'>+is the transfer function identifier (&amp;v4l2-xfer-func;) to specify non-standard</div><div class='add'>+transfer functions. The third is the Y'CbCr encoding identifier (&amp;v4l2-ycbcr-encoding;)</div><div class='add'>+to specify non-standard Y'CbCr encodings and the fourth is the quantization identifier</div><div class='add'>+(&amp;v4l2-quantization;) to specify non-standard quantization methods. Most of the time</div><div class='add'>+only the colorspace field of &amp;v4l2-pix-format; or &amp;v4l2-pix-format-mplane; needs to</div><div class='add'>+be filled in. Note that the default R'G'B' quantization is full range for all</div><div class='add'>+colorspaces except for BT.2020 which uses limited range R'G'B' quantization.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;table pgwide="1" frame="none" id="v4l2-colorspace"&gt;</div><div class='ctx'>       &lt;title&gt;V4L2 Colorspaces&lt;/title&gt;</div><div class='hunk'>@@ -498,6 +515,11 @@ BT.2020 which uses limited range R'G'B' quantization.&lt;/para&gt;</div><div class='ctx'> 	&lt;/thead&gt;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_COLORSPACE_DEFAULT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The default colorspace. This can be used by applications to let the</div><div class='add'>+	    driver fill in the colorspace.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_COLORSPACE_SMPTE170M&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;See &lt;xref linkend="col-smpte-170m" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='hunk'>@@ -533,6 +555,52 @@ BT.2020 which uses limited range R'G'B' quantization.&lt;/para&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_COLORSPACE_JPEG&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;See &lt;xref linkend="col-jpeg" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_COLORSPACE_RAW&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The raw colorspace. This is used for raw image capture where</div><div class='add'>+	    the image is minimally processed and is using the internal colorspace</div><div class='add'>+	    of the device. The software that processes an image using this</div><div class='add'>+	    'colorspace' will have to know the internals of the capture device.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-xfer-func"&gt;</div><div class='add'>+      &lt;title&gt;V4L2 Transfer Function&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="2" align="left"&gt;</div><div class='add'>+	&amp;cs-def;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;Identifier&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Details&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_DEFAULT&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Use the default transfer function as defined by the colorspace.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Use the Rec. 709 transfer function.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_SRGB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Use the sRGB transfer function.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_ADOBERGB&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Use the AdobeRGB transfer function.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_SMPTE240M&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Use the SMPTE 240M transfer function.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_XFER_FUNC_NONE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Do not use a transfer function (i.e. use linear RGB values).&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='ctx'>     &lt;/table&gt;</div><div class='hunk'>@@ -624,7 +692,8 @@ is mapped to [16&amp;hellip;235]. Cb and Cr are mapped from [-0.5&amp;hellip;0.5] to [16</div><div class='ctx'>     &lt;section id="col-smpte-170m"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace SMPTE 170M (&lt;constant&gt;V4L2_COLORSPACE_SMPTE170M&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;The &lt;xref linkend="smpte170m" /&gt; standard defines the colorspace used by NTSC and PAL and by SDTV</div><div class='del'>-in general. The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;.</div><div class='add'>+in general. The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;.</div><div class='ctx'> The default Y'CbCr quantization is limited range. The chromaticities of the primary colors and</div><div class='ctx'> the white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='hunk'>@@ -706,7 +775,8 @@ rarely seen.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;section id="col-rec709"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace Rec. 709 (&lt;constant&gt;V4L2_COLORSPACE_REC709&lt;/constant&gt;)&lt;/title&gt;</div><div class='del'>-      &lt;para&gt;The &lt;xref linkend="itu709" /&gt; standard defines the colorspace used by HDTV in general. The default</div><div class='add'>+      &lt;para&gt;The &lt;xref linkend="itu709" /&gt; standard defines the colorspace used by HDTV in general.</div><div class='add'>+The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;. The default</div><div class='ctx'> Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_709&lt;/constant&gt;. The default Y'CbCr quantization is</div><div class='ctx'> limited range. The chromaticities of the primary colors and the white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='hunk'>@@ -817,9 +887,11 @@ The xvYCC encodings always use full range quantization.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;section id="col-srgb"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace sRGB (&lt;constant&gt;V4L2_COLORSPACE_SRGB&lt;/constant&gt;)&lt;/title&gt;</div><div class='del'>-      &lt;para&gt;The &lt;xref linkend="srgb" /&gt; standard defines the colorspace used by most webcams and computer graphics. The</div><div class='del'>-default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_SYCC&lt;/constant&gt;. The default Y'CbCr quantization</div><div class='del'>-is full range. The chromaticities of the primary colors and the white reference are:&lt;/para&gt;</div><div class='add'>+      &lt;para&gt;The &lt;xref linkend="srgb" /&gt; standard defines the colorspace used by most webcams</div><div class='add'>+and computer graphics. The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_SRGB&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_SYCC&lt;/constant&gt;. The default Y'CbCr</div><div class='add'>+quantization is full range. The chromaticities of the primary colors and the white</div><div class='add'>+reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='ctx'>         &lt;title&gt;sRGB Chromaticities&lt;/title&gt;</div><div class='ctx'>         &lt;tgroup cols="3" align="left"&gt;</div><div class='hunk'>@@ -896,6 +968,7 @@ values before quantization, but this encoding does not do that.&lt;/para&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace Adobe RGB (&lt;constant&gt;V4L2_COLORSPACE_ADOBERGB&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;The &lt;xref linkend="adobergb" /&gt; standard defines the colorspace used by computer graphics</div><div class='ctx'> that use the AdobeRGB colorspace. This is also known as the &lt;xref linkend="oprgb" /&gt; standard.</div><div class='add'>+The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_ADOBERGB&lt;/constant&gt;.</div><div class='ctx'> The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;. The default Y'CbCr</div><div class='ctx'> quantization is limited range. The chromaticities of the primary colors and the white reference</div><div class='ctx'> are:&lt;/para&gt;</div><div class='hunk'>@@ -967,7 +1040,8 @@ SMPTE 170M/BT.601. The Y'CbCr quantization is limited range.&lt;/para&gt;</div><div class='ctx'>     &lt;section id="col-bt2020"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace BT.2020 (&lt;constant&gt;V4L2_COLORSPACE_BT2020&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;The &lt;xref linkend="itu2020" /&gt; standard defines the colorspace used by Ultra-high definition</div><div class='del'>-television (UHDTV). The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_BT2020&lt;/constant&gt;.</div><div class='add'>+television (UHDTV). The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_BT2020&lt;/constant&gt;.</div><div class='ctx'> The default R'G'B' quantization is limited range (!), and so is the default Y'CbCr quantization.</div><div class='ctx'> The chromaticities of the primary colors and the white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='hunk'>@@ -1082,8 +1156,10 @@ clamped to the range [-0.5&amp;hellip;0.5]. The Yc'CbcCrc quantization is limited ra</div><div class='ctx'> </div><div class='ctx'>     &lt;section id="col-smpte-240m"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace SMPTE 240M (&lt;constant&gt;V4L2_COLORSPACE_SMPTE240M&lt;/constant&gt;)&lt;/title&gt;</div><div class='del'>-      &lt;para&gt;The &lt;xref linkend="smpte240m" /&gt; standard was an interim standard used during the early days of HDTV (1988-1998).</div><div class='del'>-It has been superseded by Rec. 709. The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_SMPTE240M&lt;/constant&gt;.</div><div class='add'>+      &lt;para&gt;The &lt;xref linkend="smpte240m" /&gt; standard was an interim standard used during</div><div class='add'>+the early days of HDTV (1988-1998).  It has been superseded by Rec. 709.</div><div class='add'>+The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_SMPTE240M&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_SMPTE240M&lt;/constant&gt;.</div><div class='ctx'> The default Y'CbCr quantization is limited range. The chromaticities of the primary colors and the</div><div class='ctx'> white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='hunk'>@@ -1156,8 +1232,10 @@ clamped to the range [-0.5&amp;hellip;0.5]. The Y'CbCr quantization is limited range</div><div class='ctx'>     &lt;section id="col-sysm"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace NTSC 1953 (&lt;constant&gt;V4L2_COLORSPACE_470_SYSTEM_M&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;This standard defines the colorspace used by NTSC in 1953. In practice this</div><div class='del'>-colorspace is obsolete and SMPTE 170M should be used instead. The default Y'CbCr encoding</div><div class='del'>-is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;. The default Y'CbCr quantization is limited range.</div><div class='add'>+colorspace is obsolete and SMPTE 170M should be used instead.</div><div class='add'>+The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr quantization is limited range.</div><div class='ctx'> The chromaticities of the primary colors and the white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='ctx'>         &lt;title&gt;NTSC 1953 Chromaticities&lt;/title&gt;</div><div class='hunk'>@@ -1234,8 +1312,10 @@ This transform is identical to one defined in SMPTE 170M/BT.601.&lt;/para&gt;</div><div class='ctx'>     &lt;section id="col-sysbg"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace EBU Tech. 3213 (&lt;constant&gt;V4L2_COLORSPACE_470_SYSTEM_BG&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;The &lt;xref linkend="tech3213" /&gt; standard defines the colorspace used by PAL/SECAM in 1975. In practice this</div><div class='del'>-colorspace is obsolete and SMPTE 170M should be used instead. The default Y'CbCr encoding</div><div class='del'>-is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;. The default Y'CbCr quantization is limited range.</div><div class='add'>+colorspace is obsolete and SMPTE 170M should be used instead.</div><div class='add'>+The default transfer function is &lt;constant&gt;V4L2_XFER_FUNC_709&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr encoding is &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt;.</div><div class='add'>+The default Y'CbCr quantization is limited range.</div><div class='ctx'> The chromaticities of the primary colors and the white reference are:&lt;/para&gt;</div><div class='ctx'>       &lt;table frame="none"&gt;</div><div class='ctx'>         &lt;title&gt;EBU Tech. 3213 Chromaticities&lt;/title&gt;</div><div class='hunk'>@@ -1308,7 +1388,8 @@ This transform is identical to one defined in SMPTE 170M/BT.601.&lt;/para&gt;</div><div class='ctx'>     &lt;section id="col-jpeg"&gt;</div><div class='ctx'>       &lt;title&gt;Colorspace JPEG (&lt;constant&gt;V4L2_COLORSPACE_JPEG&lt;/constant&gt;)&lt;/title&gt;</div><div class='ctx'>       &lt;para&gt;This colorspace defines the colorspace used by most (Motion-)JPEG formats. The chromaticities</div><div class='del'>-of the primary colors and the white reference are identical to sRGB. The Y'CbCr encoding is</div><div class='add'>+of the primary colors and the white reference are identical to sRGB. The transfer</div><div class='add'>+function use is &lt;constant&gt;V4L2_XFER_FUNC_SRGB&lt;/constant&gt;. The Y'CbCr encoding is</div><div class='ctx'> &lt;constant&gt;V4L2_YCBCR_ENC_601&lt;/constant&gt; with full range quantization where</div><div class='ctx'> Y' is scaled to [0&amp;hellip;255] and Cb/Cr are scaled to [-128&amp;hellip;128] and</div><div class='ctx'> then clipped to [-128&amp;hellip;127].&lt;/para&gt;</div><div class='hunk'>@@ -1429,6 +1510,7 @@ information.&lt;/para&gt;</div><div class='ctx'>     &amp;sub-y12;</div><div class='ctx'>     &amp;sub-y10b;</div><div class='ctx'>     &amp;sub-y16;</div><div class='add'>+    &amp;sub-y16-be;</div><div class='ctx'>     &amp;sub-uv8;</div><div class='ctx'>     &amp;sub-yuyv;</div><div class='ctx'>     &amp;sub-uyvy;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/remote_controllers.xml b/Documentation/DocBook/media/v4l/remote_controllers.xml<br/>index 5124a6c4daa8..b86844e80257 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/remote_controllers.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/remote_controllers.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/remote_controllers.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/remote_controllers.xml</a></div><div class='hunk'>@@ -284,7 +284,7 @@ different IR's. Due to that, V4L2 API now specifies a standard for mapping Media</div><div class='ctx'> &lt;/tgroup&gt;</div><div class='ctx'> &lt;/table&gt;</div><div class='ctx'> </div><div class='del'>-&lt;para&gt;It should be noticed that, sometimes, there some fundamental missing keys at some cheaper IR's. Due to that, it is recommended to:&lt;/para&gt;</div><div class='add'>+&lt;para&gt;It should be noted that, sometimes, there some fundamental missing keys at some cheaper IR's. Due to that, it is recommended to:&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;table pgwide="1" frame="none" id="rc_keymap_notes"&gt;</div><div class='ctx'> &lt;title&gt;Notes&lt;/title&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml<br/>index 2588ad781242..4e73345e3eab 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/subdev-formats.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/subdev-formats.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/subdev-formats.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/subdev-formats.xml</a></div><div class='hunk'>@@ -50,8 +50,16 @@ capture streams and by the application for output streams,</div><div class='ctx'> see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	&lt;/row&gt;</div><div class='ctx'> 	&lt;row&gt;</div><div class='del'>-	  &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='del'>-	  &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[6]&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&amp;v4l2-xfer-func;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;structfield&gt;xfer_func&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;This information supplements the</div><div class='add'>+&lt;structfield&gt;colorspace&lt;/structfield&gt; and must be set by the driver for</div><div class='add'>+capture streams and by the application for output streams,</div><div class='add'>+see &lt;xref linkend="colorspaces" /&gt;.&lt;/entry&gt;</div><div class='add'>+	&lt;/row&gt;</div><div class='add'>+	&lt;row&gt;</div><div class='add'>+	  &lt;entry&gt;__u16&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[11]&lt;/entry&gt;</div><div class='ctx'> 	  &lt;entry&gt;Reserved for future extensions. Applications and drivers must</div><div class='ctx'> 	  set the array to zero.&lt;/entry&gt;</div><div class='ctx'> 	&lt;/row&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml<br/>index 9b700a5f4df7..8ffe74f84af1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a></div><div class='hunk'>@@ -134,7 +134,8 @@ information.&lt;/para&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[8]&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;A place holder for future extensions.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;A place holder for future extensions. Drivers and applications</div><div class='add'>+must set the array to zero.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml b/Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml<br/>index 9215627b04c7..73eb5cfe698a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-decoder-cmd.xml</a></div><div class='hunk'>@@ -197,7 +197,17 @@ be muted when playing back at a non-standard speed.</div><div class='ctx'> this command does nothing. This command has two flags:</div><div class='ctx'> if &lt;constant&gt;V4L2_DEC_CMD_STOP_TO_BLACK&lt;/constant&gt; is set, then the decoder will</div><div class='ctx'> set the picture to black after it stopped decoding. Otherwise the last image will</div><div class='del'>-repeat. If &lt;constant&gt;V4L2_DEC_CMD_STOP_IMMEDIATELY&lt;/constant&gt; is set, then the decoder</div><div class='add'>+repeat. mem2mem decoders will stop producing new frames altogether. They will send</div><div class='add'>+a &lt;constant&gt;V4L2_EVENT_EOS&lt;/constant&gt; event when the last frame has been decoded</div><div class='add'>+and all frames are ready to be dequeued and will set the</div><div class='add'>+&lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt; buffer flag on the last buffer of the</div><div class='add'>+capture queue to indicate there will be no new buffers produced to dequeue. This</div><div class='add'>+buffer may be empty, indicated by the driver setting the</div><div class='add'>+&lt;structfield&gt;bytesused&lt;/structfield&gt; field to 0. Once the</div><div class='add'>+&lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt; flag was set, the</div><div class='add'>+&lt;link linkend="vidioc-qbuf"&gt;VIDIOC_DQBUF&lt;/link&gt; ioctl will not block anymore,</div><div class='add'>+but return an &amp;EPIPE;.</div><div class='add'>+If &lt;constant&gt;V4L2_DEC_CMD_STOP_IMMEDIATELY&lt;/constant&gt; is set, then the decoder</div><div class='ctx'> stops immediately (ignoring the &lt;structfield&gt;pts&lt;/structfield&gt; value), otherwise it</div><div class='ctx'> will keep decoding until timestamp &gt;= pts or until the last of the pending data from</div><div class='ctx'> its internal buffers was decoded.</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml<br/>index 50ccd33948c1..c9c3c7713832 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-dqevent.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-dqevent.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-dqevent.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-dqevent.xml</a></div><div class='hunk'>@@ -133,7 +133,10 @@</div><div class='ctx'> 	    &lt;entry&gt;struct timespec&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;timestamp&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'>             &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Event timestamp.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Event timestamp. The timestamp has been taken from the</div><div class='add'>+	    &lt;constant&gt;CLOCK_MONOTONIC&lt;/constant&gt; clock. To access the</div><div class='add'>+	    same clock outside V4L2, use &lt;function&gt;clock_gettime(2)&lt;/function&gt;.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml b/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml<br/>index 0619ca5d2d36..fc1d4625a78c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml</a></div><div class='hunk'>@@ -129,7 +129,15 @@ this command.&lt;/entry&gt;</div><div class='ctx'> encoding will continue until the end of the current &lt;wordasword&gt;Group</div><div class='ctx'> Of Pictures&lt;/wordasword&gt;, otherwise encoding will stop immediately.</div><div class='ctx'> When the encoder is already stopped, this command does</div><div class='del'>-nothing.&lt;/entry&gt;</div><div class='add'>+nothing. mem2mem encoders will send a &lt;constant&gt;V4L2_EVENT_EOS&lt;/constant&gt; event</div><div class='add'>+when the last frame has been decoded and all frames are ready to be dequeued and</div><div class='add'>+will set the &lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt; buffer flag on the last</div><div class='add'>+buffer of the capture queue to indicate there will be no new buffers produced to</div><div class='add'>+dequeue. This buffer may be empty, indicated by the driver setting the</div><div class='add'>+&lt;structfield&gt;bytesused&lt;/structfield&gt; field to 0. Once the</div><div class='add'>+&lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt; flag was set, the</div><div class='add'>+&lt;link linkend="vidioc-qbuf"&gt;VIDIOC_DQBUF&lt;/link&gt; ioctl will not block anymore,</div><div class='add'>+but return an &amp;EPIPE;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_ENC_CMD_PAUSE&lt;/constant&gt;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml b/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml<br/>index 5fd72c4c33e3..7c839ab0afbb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml</a></div><div class='hunk'>@@ -217,7 +217,8 @@ enumerated.&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved[2]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Reserved space for future use.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved space for future use. Must be zeroed by drivers and</div><div class='add'>+	    applications.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml b/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml<br/>index a78454b5abcd..9ed68ac8f474 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml</a></div><div class='hunk'>@@ -223,7 +223,8 @@ application should zero out all members except for the</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved[2]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Reserved space for future use.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved space for future use. Must be zeroed by drivers and</div><div class='add'>+	    applications.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-expbuf.xml b/Documentation/DocBook/media/v4l/vidioc-expbuf.xml<br/>index 4165e7bfa4ff..a78c9207422f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-expbuf.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-expbuf.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-expbuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-expbuf.xml</a></div><div class='hunk'>@@ -184,7 +184,8 @@ of open() for more details.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved[11]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Reserved field for future use. Must be set to zero.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved field for future use. Drivers and applications must</div><div class='add'>+set the array to zero.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml<br/>index 764b635ed4cf..06952d7cc770 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'>   &lt;refnamediv&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_G_DV_TIMINGS&lt;/refname&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_S_DV_TIMINGS&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_G_DV_TIMINGS&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_S_DV_TIMINGS&lt;/refname&gt;</div><div class='ctx'>     &lt;refpurpose&gt;Get or set DV timings for input or output&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;/refnamediv&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -34,7 +36,7 @@</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='ctx'> 	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='ctx'> 	&lt;listitem&gt;</div><div class='del'>-	  &lt;para&gt;VIDIOC_G_DV_TIMINGS, VIDIOC_S_DV_TIMINGS&lt;/para&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_G_DV_TIMINGS, VIDIOC_S_DV_TIMINGS, VIDIOC_SUBDEV_G_DV_TIMINGS, VIDIOC_SUBDEV_S_DV_TIMINGS&lt;/para&gt;</div><div class='ctx'> 	&lt;/listitem&gt;</div><div class='ctx'>       &lt;/varlistentry&gt;</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-edid.xml b/Documentation/DocBook/media/v4l/vidioc-g-edid.xml<br/>index 6df40db4c8ba..2702536bbc7c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-edid.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-g-edid.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-edid.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-edid.xml</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'>   &lt;refnamediv&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_G_EDID&lt;/refname&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_S_EDID&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_G_EDID&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_S_EDID&lt;/refname&gt;</div><div class='ctx'>     &lt;refpurpose&gt;Get or set the EDID of a video receiver/transmitter&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;/refnamediv&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +44,7 @@</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='ctx'> 	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='ctx'> 	&lt;listitem&gt;</div><div class='del'>-	  &lt;para&gt;VIDIOC_G_EDID, VIDIOC_S_EDID&lt;/para&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_G_EDID, VIDIOC_S_EDID, VIDIOC_SUBDEV_G_EDID, VIDIOC_SUBDEV_S_EDID&lt;/para&gt;</div><div class='ctx'> 	&lt;/listitem&gt;</div><div class='ctx'>       &lt;/varlistentry&gt;</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='hunk'>@@ -82,6 +84,13 @@</div><div class='ctx'>     &lt;para&gt;If blocks have to be retrieved from the sink, then this call will block until they</div><div class='ctx'>     have been read.&lt;/para&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;para&gt;If &lt;structfield&gt;start_block&lt;/structfield&gt; and &lt;structfield&gt;blocks&lt;/structfield&gt; are</div><div class='add'>+    both set to 0 when &lt;constant&gt;VIDIOC_G_EDID&lt;/constant&gt; is called, then the driver will</div><div class='add'>+    set &lt;structfield&gt;blocks&lt;/structfield&gt; to the total number of available EDID blocks</div><div class='add'>+    and it will return 0 without copying any data. This is an easy way to discover how many</div><div class='add'>+    EDID blocks there are. Note that if there are no EDID blocks available at all, then</div><div class='add'>+    the driver will set &lt;structfield&gt;blocks&lt;/structfield&gt; to 0 and it returns 0.&lt;/para&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;To set the EDID blocks of a receiver the application has to fill in the &lt;structfield&gt;pad&lt;/structfield&gt;,</div><div class='ctx'>     &lt;structfield&gt;blocks&lt;/structfield&gt; and &lt;structfield&gt;edid&lt;/structfield&gt; fields and set</div><div class='ctx'>     &lt;structfield&gt;start_block&lt;/structfield&gt; to 0. It is not possible to set part of an EDID,</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-selection.xml b/Documentation/DocBook/media/v4l/vidioc-g-selection.xml<br/>index 0bb5c060db27..7865351688da 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-selection.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-g-selection.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-selection.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-g-selection.xml</a></div><div class='hunk'>@@ -199,7 +199,7 @@ exist no rectangle&lt;/emphasis&gt; that satisfies the constraints.&lt;/para&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved[9]&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Reserved fields for future use.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved fields for future use. Drivers and applications must zero this array.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-qbuf.xml b/Documentation/DocBook/media/v4l/vidioc-qbuf.xml<br/>index 3504a7f2f382..8b98a0e421fc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-qbuf.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-qbuf.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-qbuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-qbuf.xml</a></div><div class='hunk'>@@ -187,6 +187,16 @@ continue streaming.</div><div class='ctx'> 	&lt;/para&gt;</div><div class='ctx'> 	&lt;/listitem&gt;</div><div class='ctx'>       &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EPIPE&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;constant&gt;VIDIOC_DQBUF&lt;/constant&gt; returns this on an empty</div><div class='add'>+capture queue for mem2mem codecs if a buffer with the</div><div class='add'>+&lt;constant&gt;V4L2_BUF_FLAG_LAST&lt;/constant&gt; was already dequeued and no new buffers</div><div class='add'>+are expected to become available.</div><div class='add'>+	  &lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='ctx'>     &lt;/variablelist&gt;</div><div class='ctx'>   &lt;/refsect1&gt;</div><div class='ctx'> &lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml<br/>index e185f149e0a1..e9c70a8f3476 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'>   &lt;refnamediv&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_QUERY_DV_TIMINGS&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_QUERY_DV_TIMINGS&lt;/refname&gt;</div><div class='ctx'>     &lt;refpurpose&gt;Sense the DV preset received by the current</div><div class='ctx'> input&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;/refnamediv&gt;</div><div class='hunk'>@@ -34,7 +35,7 @@ input&lt;/refpurpose&gt;</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='ctx'> 	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='ctx'> 	&lt;listitem&gt;</div><div class='del'>-	  &lt;para&gt;VIDIOC_QUERY_DV_TIMINGS&lt;/para&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_QUERY_DV_TIMINGS, VIDIOC_SUBDEV_QUERY_DV_TIMINGS&lt;/para&gt;</div><div class='ctx'> 	&lt;/listitem&gt;</div><div class='ctx'>       &lt;/varlistentry&gt;</div><div class='ctx'>       &lt;varlistentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-querybuf.xml b/Documentation/DocBook/media/v4l/vidioc-querybuf.xml<br/>index a597155c052d..50bfcb5e8508 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-querybuf.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-querybuf.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-querybuf.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-querybuf.xml</a></div><div class='hunk'>@@ -60,7 +60,8 @@ buffer at any time after buffers have been allocated with the</div><div class='ctx'>     field. Valid index numbers range from zero</div><div class='ctx'> to the number of buffers allocated with &amp;VIDIOC-REQBUFS;</div><div class='ctx'>     (&amp;v4l2-requestbuffers; &lt;structfield&gt;count&lt;/structfield&gt;) minus one.</div><div class='del'>-The &lt;structfield&gt;reserved&lt;/structfield&gt; field should to set to 0.</div><div class='add'>+The &lt;structfield&gt;reserved&lt;/structfield&gt; and &lt;structfield&gt;reserved2 &lt;/structfield&gt;</div><div class='add'>+fields must be set to 0.</div><div class='ctx'> When using the &lt;link linkend="planar-apis"&gt;multi-planar API&lt;/link&gt;, the</div><div class='ctx'> &lt;structfield&gt;m.planes&lt;/structfield&gt; field must contain a userspace pointer to an</div><div class='ctx'> array of &amp;v4l2-plane; and the &lt;structfield&gt;length&lt;/structfield&gt; field has</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml<br/>index 78a06a9a5ece..0f193fda0470 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a></div><div class='hunk'>@@ -112,8 +112,8 @@ as the &amp;v4l2-format; &lt;structfield&gt;type&lt;/structfield&gt; field. See &lt;xref</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[2]&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;A place holder for future extensions. This array should</div><div class='del'>-be zeroed by applications.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;A place holder for future extensions. Drivers and applications</div><div class='add'>+must set the array to zero.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml b/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml<br/>index d0332f610929..5fd0ee78f880 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml</a></div><div class='hunk'>@@ -5,7 +5,8 @@</div><div class='ctx'>   &lt;/refmeta&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;refnamediv&gt;</div><div class='del'>-    &lt;refname&gt;VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT&lt;/refname&gt;</div><div class='add'>+      &lt;refname&gt;VIDIOC_SUBSCRIBE_EVENT&lt;/refname&gt;</div><div class='add'>+      &lt;refname&gt;VIDIOC_UNSUBSCRIBE_EVENT&lt;/refname&gt;</div><div class='ctx'>     &lt;refpurpose&gt;Subscribe or unsubscribe event&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;/refnamediv&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/DocBook/media_api.tmpl b/Documentation/DocBook/media_api.tmpl<br/>index 03f9a1f8d413..f3f5fe5b64c9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media_api.tmpl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/media_api.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media_api.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/media_api.tmpl</a></div><div class='hunk'>@@ -1,12 +1,13 @@</div><div class='del'>-&lt;?xml version="1.0"?&gt;</div><div class='del'>-&lt;!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN"</div><div class='del'>-	"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd" [</div><div class='add'>+&lt;?xml version="1.0" encoding="UTF-8"?&gt;</div><div class='add'>+&lt;!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.5//EN"</div><div class='add'>+	"http://www.oasis-open.org/docbook/xml/4.5/docbookx.dtd" [</div><div class='ctx'> &lt;!ENTITY % media-entities SYSTEM "./media-entities.tmpl"&gt; %media-entities;</div><div class='ctx'> &lt;!ENTITY media-indices SYSTEM "./media-indices.tmpl"&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;!ENTITY eg                     "e.&amp;nbsp;g."&gt;</div><div class='ctx'> &lt;!ENTITY ie                     "i.&amp;nbsp;e."&gt;</div><div class='ctx'> &lt;!ENTITY fd                     "File descriptor returned by &lt;link linkend='func-open'&gt;&lt;function&gt;open()&lt;/function&gt;&lt;/link&gt;."&gt;</div><div class='add'>+&lt;!ENTITY fe_fd                  "File descriptor returned by &lt;link linkend='frontend_f_open'&gt;&lt;function&gt;open()&lt;/function&gt;&lt;/link&gt;."&gt;</div><div class='ctx'> &lt;!ENTITY i2c                    "I&lt;superscript&gt;2&lt;/superscript&gt;C"&gt;</div><div class='ctx'> &lt;!ENTITY return-value		"&lt;title&gt;Return Value&lt;/title&gt;&lt;para&gt;On success &lt;returnvalue&gt;0&lt;/returnvalue&gt; is returned, on error &lt;returnvalue&gt;-1&lt;/returnvalue&gt; and the &lt;varname&gt;errno&lt;/varname&gt; variable is set appropriately. The generic error codes are described at the &lt;link linkend='gen-errors'&gt;Generic Error Codes&lt;/link&gt; chapter.&lt;/para&gt;"&gt;</div><div class='ctx'> &lt;!ENTITY return-value-dvb	"&lt;para&gt;RETURN VALUE&lt;/para&gt;&lt;para&gt;On success &lt;returnvalue&gt;0&lt;/returnvalue&gt; is returned, on error &lt;returnvalue&gt;-1&lt;/returnvalue&gt; and the &lt;varname&gt;errno&lt;/varname&gt; variable is set appropriately. The generic error codes are described at the &lt;link linkend='gen-errors'&gt;Generic Error Codes&lt;/link&gt; chapter.&lt;/para&gt;"&gt;</div><div class='hunk'>@@ -32,7 +33,7 @@</div><div class='ctx'> &lt;!ENTITY dash-ent-24            "&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;&lt;entry&gt;-&lt;/entry&gt;"&gt;</div><div class='ctx'> ]&gt;</div><div class='ctx'> </div><div class='del'>-&lt;book id="media_api"&gt;</div><div class='add'>+&lt;book id="media_api" lang="en"&gt;</div><div class='ctx'> &lt;bookinfo&gt;</div><div class='ctx'> 	&lt;title&gt;LINUX MEDIA INFRASTRUCTURE API&lt;/title&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -60,28 +61,56 @@</div><div class='ctx'> 		analog and digital TV receiver cards, AM/FM receiver cards,</div><div class='ctx'> 		streaming capture and output devices, codec devices and remote</div><div class='ctx'> 		controllers.&lt;/para&gt;</div><div class='del'>-	&lt;para&gt;It is divided into four parts.&lt;/para&gt;</div><div class='add'>+	&lt;para&gt;A typical media device hardware is shown at</div><div class='add'>+	&lt;xref linkend="typical_media_device" /&gt;.&lt;/para&gt;</div><div class='add'>+	&lt;figure id="typical_media_device"&gt;</div><div class='add'>+	    &lt;title&gt;Typical Media Device&lt;/title&gt;</div><div class='add'>+	    &lt;mediaobject&gt;</div><div class='add'>+		&lt;imageobject&gt;</div><div class='add'>+		    &lt;imagedata fileref="typical_media_device.svg" format="SVG" /&gt;</div><div class='add'>+		&lt;/imageobject&gt;</div><div class='add'>+		&lt;textobject&gt;</div><div class='add'>+		    &lt;phrase&gt;Typical Media Device Block Diagram&lt;/phrase&gt;</div><div class='add'>+		&lt;/textobject&gt;</div><div class='add'>+	    &lt;/mediaobject&gt;</div><div class='add'>+	&lt;/figure&gt;</div><div class='add'>+	&lt;para&gt;The media infrastructure API was designed to control such</div><div class='add'>+	    devices. It is divided into four parts.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;The first part covers radio, video capture and output,</div><div class='ctx'> 		cameras, analog TV devices and codecs.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;The second part covers the</div><div class='ctx'> 		API used for digital TV and Internet reception via one of the</div><div class='ctx'> 		several digital tv standards. While it is called as DVB API,</div><div class='ctx'> 		in fact it covers several different video standards including</div><div class='del'>-		DVB-T, DVB-S, DVB-C and ATSC. The API is currently being updated</div><div class='del'>-		to document support also for DVB-S2, ISDB-T and ISDB-S.&lt;/para&gt;</div><div class='add'>+		DVB-T/T2, DVB-S/S2, DVB-C, ATSC, ISDB-T, ISDB-S,etc. The complete</div><div class='add'>+		list of supported standards can be found at</div><div class='add'>+		&lt;xref linkend="fe-delivery-system-t" /&gt;.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;The third part covers the Remote Controller API.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;The fourth part covers the Media Controller API.&lt;/para&gt;</div><div class='add'>+	&lt;para&gt;It should also be noted that a media device may also have audio</div><div class='add'>+	      components, like mixers, PCM capture, PCM playback, etc, which</div><div class='add'>+	      are controlled via ALSA API.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;For additional information and for the latest development code,</div><div class='ctx'> 		see: &lt;ulink url="http://linuxtv.org"&gt;http://linuxtv.org&lt;/ulink&gt;.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;For discussing improvements, reporting troubles, sending new drivers, etc, please mail to: &lt;ulink url="http://vger.kernel.org/vger-lists.html#linux-media"&gt;Linux Media Mailing List (LMML).&lt;/ulink&gt;.&lt;/para&gt;</div><div class='ctx'> &lt;/preface&gt;</div><div class='ctx'> </div><div class='del'>-&lt;part id="v4l2spec"&gt;&amp;sub-v4l2;&lt;/part&gt;</div><div class='del'>-&lt;part id="dvbapi"&gt;&amp;sub-dvbapi;&lt;/part&gt;</div><div class='del'>-&lt;part id="remotes"&gt;&amp;sub-remote_controllers;&lt;/part&gt;</div><div class='del'>-&lt;part id="media_common"&gt;&amp;sub-media-controller;&lt;/part&gt;</div><div class='add'>+&lt;part id="v4l2spec"&gt;</div><div class='add'>+&amp;sub-v4l2;</div><div class='add'>+&lt;/part&gt;</div><div class='add'>+&lt;part id="dvbapi"&gt;</div><div class='add'>+&amp;sub-dvbapi;</div><div class='add'>+&lt;/part&gt;</div><div class='add'>+&lt;part id="remotes"&gt;</div><div class='add'>+&amp;sub-remote_controllers;</div><div class='add'>+&lt;/part&gt;</div><div class='add'>+&lt;part id="media_common"&gt;</div><div class='add'>+&amp;sub-media-controller;</div><div class='add'>+&lt;/part&gt;</div><div class='ctx'> </div><div class='del'>-&lt;chapter id="gen_errors"&gt;&amp;sub-gen-errors;&lt;/chapter&gt;</div><div class='add'>+&lt;chapter id="gen_errors"&gt;</div><div class='add'>+&amp;sub-gen-errors;</div><div class='add'>+&lt;/chapter&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;sub-fdl-appendix;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/DocBook/scsi.tmpl b/Documentation/DocBook/scsi.tmpl<br/>index 324b53494f08..4b9b9b286cea 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/scsi.tmpl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/DocBook/scsi.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/scsi.tmpl?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/DocBook/scsi.tmpl</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'>         SAS, Fibre Channel, FireWire, and ATAPI devices.  SCSI packets are</div><div class='ctx'>         also commonly exchanged over Infiniband,</div><div class='ctx'>         &lt;ulink url='http://i2o.shadowconnect.com/faq.php'&gt;I20&lt;/ulink&gt;, TCP/IP</div><div class='del'>-        (&lt;ulink url='http://en.wikipedia.org/wiki/ISCSI'&gt;iSCSI&lt;/ulink&gt;), even</div><div class='add'>+        (&lt;ulink url='https://en.wikipedia.org/wiki/ISCSI'&gt;iSCSI&lt;/ulink&gt;), even</div><div class='ctx'>         &lt;ulink url='http://cyberelk.net/tim/parport/parscsi.html'&gt;Parallel</div><div class='ctx'>         ports&lt;/ulink&gt;.</div><div class='ctx'>       &lt;/para&gt;</div><div class='head'>diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt<br/>index f29bcbc463e7..370ca006db7a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/RTFP.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/RCU/RTFP.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/RTFP.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/RTFP.txt</a></div><div class='hunk'>@@ -1496,7 +1496,7 @@ Canis Rufus and Zoicon5 and Anome and Hal Eisen"</div><div class='ctx'> ,month="July"</div><div class='ctx'> ,day="8"</div><div class='ctx'> ,year="2006"</div><div class='del'>-,note="\url{http://en.wikipedia.org/wiki/Read-copy-update}"</div><div class='add'>+,note="\url{https://en.wikipedia.org/wiki/Read-copy-update}"</div><div class='ctx'> ,annotation={</div><div class='ctx'> 	Wikipedia RCU page as of July 8 2006.</div><div class='ctx'> 	[Viewed August 21, 2006]</div><div class='head'>diff --git a/Documentation/RCU/arrayRCU.txt b/Documentation/RCU/arrayRCU.txt<br/>index 453ebe6953ee..f05a9afb2c39 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/arrayRCU.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/RCU/arrayRCU.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/arrayRCU.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/arrayRCU.txt</a></div><div class='hunk'>@@ -10,7 +10,19 @@ also be used to protect arrays.  Three situations are as follows:</div><div class='ctx'> </div><div class='ctx'> 3.  Resizeable Arrays</div><div class='ctx'> </div><div class='del'>-Each of these situations are discussed below.</div><div class='add'>+Each of these three situations involves an RCU-protected pointer to an</div><div class='add'>+array that is separately indexed.  It might be tempting to consider use</div><div class='add'>+of RCU to instead protect the index into an array, however, this use</div><div class='add'>+case is -not- supported.  The problem with RCU-protected indexes into</div><div class='add'>+arrays is that compilers can play way too many optimization games with</div><div class='add'>+integers, which means that the rules governing handling of these indexes</div><div class='add'>+are far more trouble than they are worth.  If RCU-protected indexes into</div><div class='add'>+arrays prove to be particularly valuable (which they have not thus far),</div><div class='add'>+explicit cooperation from the compiler will be required to permit them</div><div class='add'>+to be safely used.</div><div class='add'>+</div><div class='add'>+That aside, each of the three RCU-protected pointer situations are</div><div class='add'>+described in the following sections.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Situation 1: Hash Tables</div><div class='hunk'>@@ -36,9 +48,9 @@ Quick Quiz:  Why is it so important that updates be rare when</div><div class='ctx'> Situation 3: Resizeable Arrays</div><div class='ctx'> </div><div class='ctx'> Use of RCU for resizeable arrays is demonstrated by the grow_ary()</div><div class='del'>-function used by the System V IPC code.  The array is used to map from</div><div class='del'>-semaphore, message-queue, and shared-memory IDs to the data structure</div><div class='del'>-that represents the corresponding IPC construct.  The grow_ary()</div><div class='add'>+function formerly used by the System V IPC code.  The array is used</div><div class='add'>+to map from semaphore, message-queue, and shared-memory IDs to the data</div><div class='add'>+structure that represents the corresponding IPC construct.  The grow_ary()</div><div class='ctx'> function does not acquire any locks; instead its caller must hold the</div><div class='ctx'> ids-&gt;sem semaphore.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/RCU/lockdep.txt b/Documentation/RCU/lockdep.txt<br/>index cd83d2348fef..da51d3068850 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/lockdep.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/RCU/lockdep.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/lockdep.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/lockdep.txt</a></div><div class='hunk'>@@ -47,11 +47,6 @@ checking of rcu_dereference() primitives:</div><div class='ctx'> 		Use explicit check expression "c" along with</div><div class='ctx'> 		srcu_read_lock_held()().  This is useful in code that</div><div class='ctx'> 		is invoked by both SRCU readers and updaters.</div><div class='del'>-	rcu_dereference_index_check(p, c):</div><div class='del'>-		Use explicit check expression "c", but the caller</div><div class='del'>-		must supply one of the rcu_read_lock_held() functions.</div><div class='del'>-		This is useful in code that uses RCU-protected arrays</div><div class='del'>-		that is invoked by both RCU readers and updaters.</div><div class='ctx'> 	rcu_dereference_raw(p):</div><div class='ctx'> 		Don't check.  (Use sparingly, if at all.)</div><div class='ctx'> 	rcu_dereference_protected(p, c):</div><div class='hunk'>@@ -64,11 +59,6 @@ checking of rcu_dereference() primitives:</div><div class='ctx'> 		but retain the compiler constraints that prevent duplicating</div><div class='ctx'> 		or coalescsing.  This is useful when when testing the</div><div class='ctx'> 		value of the pointer itself, for example, against NULL.</div><div class='del'>-	rcu_access_index(idx):</div><div class='del'>-		Return the value of the index and omit all barriers, but</div><div class='del'>-		retain the compiler constraints that prevent duplicating</div><div class='del'>-		or coalescsing.  This is useful when when testing the</div><div class='del'>-		value of the index itself, for example, against -1.</div><div class='ctx'> </div><div class='ctx'> The rcu_dereference_check() check expression can be any boolean</div><div class='ctx'> expression, but would normally include a lockdep expression.  However,</div><div class='head'>diff --git a/Documentation/RCU/rcu_dereference.txt b/Documentation/RCU/rcu_dereference.txt<br/>index ceb05da5a5ac..1e6c0da994f5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/rcu_dereference.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/RCU/rcu_dereference.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/rcu_dereference.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/rcu_dereference.txt</a></div><div class='hunk'>@@ -25,17 +25,6 @@ o	You must use one of the rcu_dereference() family of primitives</div><div class='ctx'> 	for an example where the compiler can in fact deduce the exact</div><div class='ctx'> 	value of the pointer, and thus cause misordering.</div><div class='ctx'> </div><div class='del'>-o	Do not use single-element RCU-protected arrays.  The compiler</div><div class='del'>-	is within its right to assume that the value of an index into</div><div class='del'>-	such an array must necessarily evaluate to zero.  The compiler</div><div class='del'>-	could then substitute the constant zero for the computation, so</div><div class='del'>-	that the array index no longer depended on the value returned</div><div class='del'>-	by rcu_dereference().  If the array index no longer depends</div><div class='del'>-	on rcu_dereference(), then both the compiler and the CPU</div><div class='del'>-	are within their rights to order the array access before the</div><div class='del'>-	rcu_dereference(), which can cause the array access to return</div><div class='del'>-	garbage.</div><div class='del'>-</div><div class='ctx'> o	Avoid cancellation when using the "+" and "-" infix arithmetic</div><div class='ctx'> 	operators.  For example, for a given variable "x", avoid</div><div class='ctx'> 	"(x-x)".  There are similar arithmetic pitfalls from other</div><div class='hunk'>@@ -76,14 +65,15 @@ o	Do not use the results from the boolean "&amp;&amp;" and "||" when</div><div class='ctx'> 	dereferencing.	For example, the following (rather improbable)</div><div class='ctx'> 	code is buggy:</div><div class='ctx'> </div><div class='del'>-		int a[2];</div><div class='del'>-		int index;</div><div class='del'>-		int force_zero_index = 1;</div><div class='add'>+		int *p;</div><div class='add'>+		int *q;</div><div class='ctx'> </div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-		r1 = rcu_dereference(i1)</div><div class='del'>-		r2 = a[r1 &amp;&amp; force_zero_index];  /* BUGGY!!! */</div><div class='add'>+		p = rcu_dereference(gp)</div><div class='add'>+		q = &amp;global_q;</div><div class='add'>+		q += p != &amp;oom_p1 &amp;&amp; p != &amp;oom_p2;</div><div class='add'>+		r1 = *q;  /* BUGGY!!! */</div><div class='ctx'> </div><div class='ctx'> 	The reason this is buggy is that "&amp;&amp;" and "||" are often compiled</div><div class='ctx'> 	using branches.  While weak-memory machines such as ARM or PowerPC</div><div class='hunk'>@@ -94,14 +84,15 @@ o	Do not use the results from relational operators ("==", "!=",</div><div class='ctx'> 	"&gt;", "&gt;=", "&lt;", or "&lt;=") when dereferencing.  For example,</div><div class='ctx'> 	the following (quite strange) code is buggy:</div><div class='ctx'> </div><div class='del'>-		int a[2];</div><div class='del'>-		int index;</div><div class='del'>-		int flip_index = 0;</div><div class='add'>+		int *p;</div><div class='add'>+		int *q;</div><div class='ctx'> </div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-		r1 = rcu_dereference(i1)</div><div class='del'>-		r2 = a[r1 != flip_index];  /* BUGGY!!! */</div><div class='add'>+		p = rcu_dereference(gp)</div><div class='add'>+		q = &amp;global_q;</div><div class='add'>+		q += p &gt; &amp;oom_p;</div><div class='add'>+		r1 = *q;  /* BUGGY!!! */</div><div class='ctx'> </div><div class='ctx'> 	As before, the reason this is buggy is that relational operators</div><div class='ctx'> 	are often compiled using branches.  And as before, although</div><div class='hunk'>@@ -193,6 +184,11 @@ o	Be very careful about comparing pointers obtained from</div><div class='ctx'> 		pointer.  Note that the volatile cast in rcu_dereference()</div><div class='ctx'> 		will normally prevent the compiler from knowing too much.</div><div class='ctx'> </div><div class='add'>+		However, please note that if the compiler knows that the</div><div class='add'>+		pointer takes on only one of two values, a not-equal</div><div class='add'>+		comparison will provide exactly the information that the</div><div class='add'>+		compiler needs to deduce the value of the pointer.</div><div class='add'>+</div><div class='ctx'> o	Disable any value-speculation optimizations that your compiler</div><div class='ctx'> 	might provide, especially if you are making use of feedback-based</div><div class='ctx'> 	optimizations that take data collected from prior runs.  Such</div><div class='head'>diff --git a/Documentation/RCU/whatisRCU.txt b/Documentation/RCU/whatisRCU.txt<br/>index 88dfce182f66..5746b0c77f3e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/whatisRCU.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/RCU/whatisRCU.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/whatisRCU.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/RCU/whatisRCU.txt</a></div><div class='hunk'>@@ -256,7 +256,9 @@ rcu_dereference()</div><div class='ctx'> 	If you are going to be fetching multiple fields from the</div><div class='ctx'> 	RCU-protected structure, using the local variable is of</div><div class='ctx'> 	course preferred.  Repeated rcu_dereference() calls look</div><div class='del'>-	ugly and incur unnecessary overhead on Alpha CPUs.</div><div class='add'>+	ugly, do not guarantee that the same pointer will be returned</div><div class='add'>+	if an update happened while in the critical section, and incur</div><div class='add'>+	unnecessary overhead on Alpha CPUs.</div><div class='ctx'> </div><div class='ctx'> 	Note that the value returned by rcu_dereference() is valid</div><div class='ctx'> 	only within the enclosing RCU read-side critical section.</div><div class='hunk'>@@ -879,9 +881,7 @@ SRCU:	Initialization/cleanup</div><div class='ctx'> </div><div class='ctx'> All:  lockdep-checked RCU-protected pointer access</div><div class='ctx'> </div><div class='del'>-	rcu_access_index</div><div class='ctx'> 	rcu_access_pointer</div><div class='del'>-	rcu_dereference_index_check</div><div class='ctx'> 	rcu_dereference_raw</div><div class='ctx'> 	rcu_lockdep_assert</div><div class='ctx'> 	rcu_sleep_check</div><div class='head'>diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches<br/>index b03a832a08e2..27e7e5edeca8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/SubmittingPatches?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/SubmittingPatches</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/SubmittingPatches?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/SubmittingPatches</a></div><div class='hunk'>@@ -299,7 +299,9 @@ toward the stable maintainers by putting a line like this:</div><div class='ctx'> </div><div class='ctx'>   Cc: stable@vger.kernel.org</div><div class='ctx'> </div><div class='del'>-into your patch.</div><div class='add'>+into the sign-off area of your patch (note, NOT an email recipient).  You</div><div class='add'>+should also read Documentation/stable_kernel_rules.txt in addition to this</div><div class='add'>+file.</div><div class='ctx'> </div><div class='ctx'> Note, however, that some subsystem maintainers want to come to their own</div><div class='ctx'> conclusions on which patches should go to the stable trees.  The networking</div><div class='head'>diff --git a/Documentation/acpi/enumeration.txt b/Documentation/acpi/enumeration.txt<br/>index 15dfce708ebf..b731b292e812 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/acpi/enumeration.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/acpi/enumeration.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/acpi/enumeration.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/acpi/enumeration.txt</a></div><div class='hunk'>@@ -42,7 +42,7 @@ Adding ACPI support for an existing driver should be pretty</div><div class='ctx'> straightforward. Here is the simplest example:</div><div class='ctx'> </div><div class='ctx'> 	#ifdef CONFIG_ACPI</div><div class='del'>-	static struct acpi_device_id mydrv_acpi_match[] = {</div><div class='add'>+	static const struct acpi_device_id mydrv_acpi_match[] = {</div><div class='ctx'> 		/* ACPI IDs here */</div><div class='ctx'> 		{ }</div><div class='ctx'> 	};</div><div class='hunk'>@@ -166,7 +166,7 @@ the platform device drivers. Below is an example where we add ACPI support</div><div class='ctx'> to at25 SPI eeprom driver (this is meant for the above ACPI snippet):</div><div class='ctx'> </div><div class='ctx'> 	#ifdef CONFIG_ACPI</div><div class='del'>-	static struct acpi_device_id at25_acpi_match[] = {</div><div class='add'>+	static const struct acpi_device_id at25_acpi_match[] = {</div><div class='ctx'> 		{ "AT25", 0 },</div><div class='ctx'> 		{ },</div><div class='ctx'> 	};</div><div class='hunk'>@@ -230,7 +230,7 @@ Below is an example of how to add ACPI support to the existing mpu3050</div><div class='ctx'> input driver:</div><div class='ctx'> </div><div class='ctx'> 	#ifdef CONFIG_ACPI</div><div class='del'>-	static struct acpi_device_id mpu3050_acpi_match[] = {</div><div class='add'>+	static const struct acpi_device_id mpu3050_acpi_match[] = {</div><div class='ctx'> 		{ "MPU3050", 0 },</div><div class='ctx'> 		{ },</div><div class='ctx'> 	};</div><div class='hunk'>@@ -359,3 +359,54 @@ the id should be set like:</div><div class='ctx'> The ACPI id "XYZ0001" is then used to lookup an ACPI device directly under</div><div class='ctx'> the MFD device and if found, that ACPI companion device is bound to the</div><div class='ctx'> resulting child platform device.</div><div class='add'>+</div><div class='add'>+Device Tree namespace link device ID</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The Device Tree protocol uses device indentification based on the "compatible"</div><div class='add'>+property whose value is a string or an array of strings recognized as device</div><div class='add'>+identifiers by drivers and the driver core.  The set of all those strings may be</div><div class='add'>+regarded as a device indentification namespace analogous to the ACPI/PNP device</div><div class='add'>+ID namespace.  Consequently, in principle it should not be necessary to allocate</div><div class='add'>+a new (and arguably redundant) ACPI/PNP device ID for a devices with an existing</div><div class='add'>+identification string in the Device Tree (DT) namespace, especially if that ID</div><div class='add'>+is only needed to indicate that a given device is compatible with another one,</div><div class='add'>+presumably having a matching driver in the kernel already.</div><div class='add'>+</div><div class='add'>+In ACPI, the device identification object called _CID (Compatible ID) is used to</div><div class='add'>+list the IDs of devices the given one is compatible with, but those IDs must</div><div class='add'>+belong to one of the namespaces prescribed by the ACPI specification (see</div><div class='add'>+Section 6.1.2 of ACPI 6.0 for details) and the DT namespace is not one of them.</div><div class='add'>+Moreover, the specification mandates that either a _HID or an _ADR identificaion</div><div class='add'>+object be present for all ACPI objects representing devices (Section 6.1 of ACPI</div><div class='add'>+6.0).  For non-enumerable bus types that object must be _HID and its value must</div><div class='add'>+be a device ID from one of the namespaces prescribed by the specification too.</div><div class='add'>+</div><div class='add'>+The special DT namespace link device ID, PRP0001, provides a means to use the</div><div class='add'>+existing DT-compatible device identification in ACPI and to satisfy the above</div><div class='add'>+requirements following from the ACPI specification at the same time.  Namely,</div><div class='add'>+if PRP0001 is returned by _HID, the ACPI subsystem will look for the</div><div class='add'>+"compatible" property in the device object's _DSD and will use the value of that</div><div class='add'>+property to identify the corresponding device in analogy with the original DT</div><div class='add'>+device identification algorithm.  If the "compatible" property is not present</div><div class='add'>+or its value is not valid, the device will not be enumerated by the ACPI</div><div class='add'>+subsystem.  Otherwise, it will be enumerated automatically as a platform device</div><div class='add'>+(except when an I2C or SPI link from the device to its parent is present, in</div><div class='add'>+which case the ACPI core will leave the device enumeration to the parent's</div><div class='add'>+driver) and the identification strings from the "compatible" property value will</div><div class='add'>+be used to find a driver for the device along with the device IDs listed by _CID</div><div class='add'>+(if present).</div><div class='add'>+</div><div class='add'>+Analogously, if PRP0001 is present in the list of device IDs returned by _CID,</div><div class='add'>+the identification strings listed by the "compatible" property value (if present</div><div class='add'>+and valid) will be used to look for a driver matching the device, but in that</div><div class='add'>+case their relative priority with respect to the other device IDs listed by</div><div class='add'>+_HID and _CID depends on the position of PRP0001 in the _CID return package.</div><div class='add'>+Specifically, the device IDs returned by _HID and preceding PRP0001 in the _CID</div><div class='add'>+return package will be checked first.  Also in that case the bus type the device</div><div class='add'>+will be enumerated to depends on the device ID returned by _HID.</div><div class='add'>+</div><div class='add'>+It is valid to define device objects with a _HID returning PRP0001 and without</div><div class='add'>+the "compatible" property in the _DSD or a _CID as long as one of their</div><div class='add'>+ancestors provides a _DSD with a valid "compatible" property.  Such device</div><div class='add'>+objects are then simply regarded as additional "blocks" providing hierarchical</div><div class='add'>+configuration information to the driver of the composite ancestor device.</div><div class='head'>diff --git a/Documentation/arm/CCN.txt b/Documentation/arm/CCN.txt<br/>index 0632b3aad83e..ffca443a19b4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/CCN.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/arm/CCN.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/CCN.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/CCN.txt</a></div><div class='hunk'>@@ -33,20 +33,23 @@ directory, with first 8 configurable by user and additional</div><div class='ctx'> Cycle counter is described by a "type" value 0xff and does</div><div class='ctx'> not require any other settings.</div><div class='ctx'> </div><div class='add'>+The driver also provides a "cpumask" sysfs attribute, which contains</div><div class='add'>+a single CPU ID, of the processor which will be used to handle all</div><div class='add'>+the CCN PMU events. It is recommended that the user space tools</div><div class='add'>+request the events on this processor (if not, the perf_event-&gt;cpu value</div><div class='add'>+will be overwritten anyway). In case of this processor being offlined,</div><div class='add'>+the events are migrated to another one and the attribute is updated.</div><div class='add'>+</div><div class='ctx'> Example of perf tool use:</div><div class='ctx'> </div><div class='ctx'> / # perf list | grep ccn</div><div class='ctx'>   ccn/cycles/                                        [Kernel PMU event]</div><div class='ctx'> &lt;...&gt;</div><div class='del'>-  ccn/xp_valid_flit/                                 [Kernel PMU event]</div><div class='add'>+  ccn/xp_valid_flit,xp=?,port=?,vc=?,dir=?/          [Kernel PMU event]</div><div class='ctx'> &lt;...&gt;</div><div class='ctx'> </div><div class='del'>-/ # perf stat -C 0 -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \</div><div class='add'>+/ # perf stat -a -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \</div><div class='ctx'>                                                                        sleep 1</div><div class='ctx'> </div><div class='ctx'> The driver does not support sampling, therefore "perf record" will</div><div class='del'>-not work. Also notice that only single cpu is being selected</div><div class='del'>-("-C 0") - this is because perf framework does not support</div><div class='del'>-"non-CPU related" counters (yet?) so system-wide session ("-a")</div><div class='del'>-would try (and in most cases fail) to set up the same event</div><div class='del'>-per each CPU.</div><div class='add'>+not work. Per-task (without "-a") perf sessions are not supported.</div><div class='head'>diff --git a/Documentation/arm/SPEAr/overview.txt b/Documentation/arm/SPEAr/overview.txt<br/>index 65610bf52ebf..1b049be6c84f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/SPEAr/overview.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/arm/SPEAr/overview.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/SPEAr/overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/SPEAr/overview.txt</a></div><div class='hunk'>@@ -60,4 +60,4 @@ Introduction</div><div class='ctx'>   Document Author</div><div class='ctx'>   ---------------</div><div class='ctx'> </div><div class='del'>-  Viresh Kumar &lt;viresh.linux@gmail.com&gt;, (c) 2010-2012 ST Microelectronics</div><div class='add'>+  Viresh Kumar &lt;vireshk@kernel.org&gt;, (c) 2010-2012 ST Microelectronics</div><div class='head'>diff --git a/Documentation/arm/Samsung/Bootloader-interface.txt b/Documentation/arm/Samsung/Bootloader-interface.txt<br/>new file mode 100644<br/>index 000000000000..b96ead9a6919<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/Samsung/Bootloader-interface.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/Samsung/Bootloader-interface.txt</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+      Interface between kernel and boot loaders on Exynos boards</div><div class='add'>+      ==========================================================</div><div class='add'>+</div><div class='add'>+Author: Krzysztof Kozlowski</div><div class='add'>+Date  : 6 June 2015</div><div class='add'>+</div><div class='add'>+The document tries to describe currently used interface between Linux kernel</div><div class='add'>+and boot loaders on Samsung Exynos based boards. This is not a definition</div><div class='add'>+of interface but rather a description of existing state, a reference</div><div class='add'>+for information purpose only.</div><div class='add'>+</div><div class='add'>+In the document "boot loader" means any of following: U-boot, proprietary</div><div class='add'>+SBOOT or any other firmware for ARMv7 and ARMv8 initializing the board before</div><div class='add'>+executing kernel.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1. Non-Secure mode</div><div class='add'>+Address:      sysram_ns_base_addr</div><div class='add'>+Offset        Value                                        Purpose</div><div class='add'>+=============================================================================</div><div class='add'>+0x08          exynos_cpu_resume_ns                         System suspend</div><div class='add'>+0x0c          0x00000bad (Magic cookie)                    System suspend</div><div class='add'>+0x1c          exynos4_secondary_startup                    Secondary CPU boot</div><div class='add'>+0x1c + 4*cpu  exynos4_secondary_startup (Exynos4412)       Secondary CPU boot</div><div class='add'>+0x20          0xfcba0d10 (Magic cookie)                    AFTR</div><div class='add'>+0x24          exynos_cpu_resume_ns                         AFTR</div><div class='add'>+0x28 + 4*cpu  0x8 (Magic cookie, Exynos3250)               AFTR</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+2. Secure mode</div><div class='add'>+Address:      sysram_base_addr</div><div class='add'>+Offset        Value                                        Purpose</div><div class='add'>+=============================================================================</div><div class='add'>+0x00          exynos4_secondary_startup                    Secondary CPU boot</div><div class='add'>+0x04          exynos4_secondary_startup (Exynos542x)       Secondary CPU boot</div><div class='add'>+4*cpu         exynos4_secondary_startup (Exynos4412)       Secondary CPU boot</div><div class='add'>+0x20          exynos_cpu_resume (Exynos4210 r1.0)          AFTR</div><div class='add'>+0x24          0xfcba0d10 (Magic cookie, Exynos4210 r1.0)   AFTR</div><div class='add'>+</div><div class='add'>+Address:      pmu_base_addr</div><div class='add'>+Offset        Value                                        Purpose</div><div class='add'>+=============================================================================</div><div class='add'>+0x0800        exynos_cpu_resume                            AFTR</div><div class='add'>+0x0814        exynos4_secondary_startup (Exynos4210 r1.1)  Secondary CPU boot</div><div class='add'>+0x0818        0xfcba0d10 (Magic cookie, Exynos4210 r1.1)   AFTR</div><div class='add'>+0x081C        exynos_cpu_resume (Exynos4210 r1.1)          AFTR</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+3. Other (regardless of secure/non-secure mode)</div><div class='add'>+Address:      pmu_base_addr</div><div class='add'>+Offset        Value                           Purpose</div><div class='add'>+=============================================================================</div><div class='add'>+0x0908        Non-zero (only Exynos3250)      Secondary CPU boot up indicator</div><div class='head'>diff --git a/Documentation/arm/stm32/overview.txt b/Documentation/arm/stm32/overview.txt<br/>new file mode 100644<br/>index 000000000000..09aed5588d7c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/stm32/overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/stm32/overview.txt</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+			STM32 ARM Linux Overview</div><div class='add'>+			========================</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+  The STMicroelectronics family of Cortex-M based MCUs are supported by the</div><div class='add'>+  'STM32' platform of ARM Linux. Currently only the STM32F429 is supported.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Configuration</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+  A generic configuration is provided for STM32 family, and can be used as the</div><div class='add'>+  default by</div><div class='add'>+	make stm32_defconfig</div><div class='add'>+</div><div class='add'>+Layout</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+  All the files for multiple machine families are located in the platform code</div><div class='add'>+  contained in arch/arm/mach-stm32</div><div class='add'>+</div><div class='add'>+  There is a generic board board-dt.c in the mach folder which support</div><div class='add'>+  Flattened Device Tree, which means, it works with any compatible board with</div><div class='add'>+  Device Trees.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Document Author</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+  Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/arm/stm32/stm32f429-overview.txt b/Documentation/arm/stm32/stm32f429-overview.txt<br/>new file mode 100644<br/>index 000000000000..5206822bd8ef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/stm32/stm32f429-overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/stm32/stm32f429-overview.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+			STM32F429 Overview</div><div class='add'>+			==================</div><div class='add'>+</div><div class='add'>+  Introduction</div><div class='add'>+  ------------</div><div class='add'>+	The STM32F429 is a Cortex-M4 MCU aimed at various applications.</div><div class='add'>+	It features:</div><div class='add'>+	- ARM Cortex-M4 up to 180MHz with FPU</div><div class='add'>+	- 2MB internal Flash Memory</div><div class='add'>+	- External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND)</div><div class='add'>+	- I2C, SPI, SAI, CAN, USB OTG, Ethernet controllers</div><div class='add'>+	- LCD controller &amp; Camera interface</div><div class='add'>+	- Cryptographic processor</div><div class='add'>+</div><div class='add'>+  Resources</div><div class='add'>+  ---------</div><div class='add'>+	Datasheet and reference manual are publicly available on ST website:</div><div class='add'>+	- http://www.st.com/web/en/catalog/mmc/FM141/SC1169/SS1577/LN1806?ecmp=stm32f429-439_pron_pr-ces2014_nov2013</div><div class='add'>+</div><div class='add'>+  Document Author</div><div class='add'>+  ---------------</div><div class='add'>+	Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/arm/sunxi/README b/Documentation/arm/sunxi/README<br/>index 1fe2d7fd4108..5e38e1582f95 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/sunxi/README?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/arm/sunxi/README</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/sunxi/README?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/sunxi/README</a></div><div class='hunk'>@@ -36,7 +36,7 @@ SunXi family</div><div class='ctx'>         + User Manual</div><div class='ctx'>           http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf</div><div class='ctx'> </div><div class='del'>-      - Allwinner A23</div><div class='add'>+      - Allwinner A23 (sun8i)</div><div class='ctx'>         + Datasheet</div><div class='ctx'>           http://dl.linux-sunxi.org/A23/A23%20Datasheet%20V1.0%2020130830.pdf</div><div class='ctx'>         + User Manual</div><div class='hunk'>@@ -55,7 +55,23 @@ SunXi family</div><div class='ctx'>         + User Manual</div><div class='ctx'>           http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20User%20Manual%20%20V1.0%2020130322.pdf</div><div class='ctx'> </div><div class='add'>+      - Allwinner A33 (sun8i)</div><div class='add'>+        + Datasheet</div><div class='add'>+          http://dl.linux-sunxi.org/A33/A33%20Datasheet%20release%201.1.pdf</div><div class='add'>+        + User Manual</div><div class='add'>+          http://dl.linux-sunxi.org/A33/A33%20user%20manual%20release%201.1.pdf</div><div class='add'>+</div><div class='add'>+      - Allwinner H3 (sun8i)</div><div class='add'>+        + Datasheet</div><div class='add'>+          http://dl.linux-sunxi.org/H3/Allwinner_H3_Datasheet_V1.0.pdf</div><div class='add'>+</div><div class='ctx'>     * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs</div><div class='ctx'>       - Allwinner A80</div><div class='ctx'>         + Datasheet</div><div class='ctx'> 	  http://dl.linux-sunxi.org/A80/A80_Datasheet_Revision_1.0_0404.pdf</div><div class='add'>+</div><div class='add'>+    * Octa ARM Cortex-A7 based SoCs</div><div class='add'>+      - Allwinner A83T</div><div class='add'>+        + Not Supported</div><div class='add'>+        + Datasheet</div><div class='add'>+          http://dl.linux-sunxi.org/A83T/A83T_datasheet_Revision_1.1.pdf</div><div class='head'>diff --git a/Documentation/arm/vlocks.txt b/Documentation/arm/vlocks.txt<br/>index 415960a9bab0..45731672c564 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/vlocks.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/arm/vlocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/vlocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm/vlocks.txt</a></div><div class='hunk'>@@ -206,6 +206,6 @@ References</div><div class='ctx'> [1] Lamport, L. "A New Solution of Dijkstra's Concurrent Programming</div><div class='ctx'>     Problem", Communications of the ACM 17, 8 (August 1974), 453-455.</div><div class='ctx'> </div><div class='del'>-    http://en.wikipedia.org/wiki/Lamport%27s_bakery_algorithm</div><div class='add'>+    https://en.wikipedia.org/wiki/Lamport%27s_bakery_algorithm</div><div class='ctx'> </div><div class='ctx'> [2] linux/arch/arm/common/vlock.S, www.kernel.org.</div><div class='head'>diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt<br/>index f3c05b5f9f08..1690350f16e7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm64/booting.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/arm64/booting.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm64/booting.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/arm64/booting.txt</a></div><div class='hunk'>@@ -45,11 +45,13 @@ sees fit.)</div><div class='ctx'> </div><div class='ctx'> Requirement: MANDATORY</div><div class='ctx'> </div><div class='del'>-The device tree blob (dtb) must be placed on an 8-byte boundary within</div><div class='del'>-the first 512 megabytes from the start of the kernel image and must not</div><div class='del'>-cross a 2-megabyte boundary. This is to allow the kernel to map the</div><div class='del'>-blob using a single section mapping in the initial page tables.</div><div class='add'>+The device tree blob (dtb) must be placed on an 8-byte boundary and must</div><div class='add'>+not exceed 2 megabytes in size. Since the dtb will be mapped cacheable</div><div class='add'>+using blocks of up to 2 megabytes in size, it must not be placed within</div><div class='add'>+any 2M region which must be mapped with any specific attributes.</div><div class='ctx'> </div><div class='add'>+NOTE: versions prior to v4.2 also require that the DTB be placed within</div><div class='add'>+the 512 MB region starting at text_offset bytes below the kernel Image.</div><div class='ctx'> </div><div class='ctx'> 3. Decompress the kernel image</div><div class='ctx'> ------------------------------</div><div class='head'>diff --git a/Documentation/blackfin/gptimers-example.c b/Documentation/blackfin/gptimers-example.c<br/>index b1bd6340e748..283eba993d9d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/blackfin/gptimers-example.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/blackfin/gptimers-example.c</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/blackfin/gptimers-example.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/blackfin/gptimers-example.c</a></div><div class='hunk'>@@ -17,6 +17,12 @@</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME "gptimer_example"</div><div class='ctx'> </div><div class='add'>+#ifdef IRQ_TIMER5</div><div class='add'>+#define SAMPLE_IRQ_TIMER IRQ_TIMER5</div><div class='add'>+#else</div><div class='add'>+#define SAMPLE_IRQ_TIMER IRQ_TIMER2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct gptimer_data {</div><div class='ctx'> 	uint32_t period, width;</div><div class='ctx'> };</div><div class='hunk'>@@ -57,7 +63,8 @@ static int __init gptimer_example_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* grab the IRQ for the timer */</div><div class='del'>-	ret = request_irq(IRQ_TIMER5, gptimer_example_irq, IRQF_SHARED, DRIVER_NAME, &amp;data);</div><div class='add'>+	ret = request_irq(SAMPLE_IRQ_TIMER, gptimer_example_irq,</div><div class='add'>+			IRQF_SHARED, DRIVER_NAME, &amp;data);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		printk(KERN_NOTICE DRIVER_NAME ": IRQ request failed\n");</div><div class='ctx'> 		peripheral_free(P_TMR5);</div><div class='hunk'>@@ -65,7 +72,8 @@ static int __init gptimer_example_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup the timer and enable it */</div><div class='del'>-	set_gptimer_config(TIMER5_id, WDTH_CAP | PULSE_HI | PERIOD_CNT | IRQ_ENA);</div><div class='add'>+	set_gptimer_config(TIMER5_id,</div><div class='add'>+			WDTH_CAP | PULSE_HI | PERIOD_CNT | IRQ_ENA);</div><div class='ctx'> 	enable_gptimers(TIMER5bit);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -75,7 +83,7 @@ module_init(gptimer_example_init);</div><div class='ctx'> static void __exit gptimer_example_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	disable_gptimers(TIMER5bit);</div><div class='del'>-	free_irq(IRQ_TIMER5, &amp;data);</div><div class='add'>+	free_irq(SAMPLE_IRQ_TIMER, &amp;data);</div><div class='ctx'> 	peripheral_free(P_TMR5);</div><div class='ctx'> }</div><div class='ctx'> module_exit(gptimer_example_exit);</div><div class='head'>diff --git a/Documentation/blockdev/zram.txt b/Documentation/blockdev/zram.txt<br/>index 48a183e29988..c4de576093af 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/blockdev/zram.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/blockdev/zram.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/blockdev/zram.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/blockdev/zram.txt</a></div><div class='hunk'>@@ -19,7 +19,9 @@ Following shows a typical sequence of steps for using zram.</div><div class='ctx'> 1) Load Module:</div><div class='ctx'> 	modprobe zram num_devices=4</div><div class='ctx'> 	This creates 4 devices: /dev/zram{0,1,2,3}</div><div class='del'>-	(num_devices parameter is optional. Default: 1)</div><div class='add'>+</div><div class='add'>+num_devices parameter is optional and tells zram how many devices should be</div><div class='add'>+pre-created. Default: 1.</div><div class='ctx'> </div><div class='ctx'> 2) Set max number of compression streams</div><div class='ctx'> 	Compression backend may use up to max_comp_streams compression streams,</div><div class='hunk'>@@ -97,7 +99,24 @@ size of the disk when not in use so a huge zram is wasteful.</div><div class='ctx'> 	mkfs.ext4 /dev/zram1</div><div class='ctx'> 	mount /dev/zram1 /tmp</div><div class='ctx'> </div><div class='del'>-7) Stats:</div><div class='add'>+7) Add/remove zram devices</div><div class='add'>+</div><div class='add'>+zram provides a control interface, which enables dynamic (on-demand) device</div><div class='add'>+addition and removal.</div><div class='add'>+</div><div class='add'>+In order to add a new /dev/zramX device, perform read operation on hot_add</div><div class='add'>+attribute. This will return either new device's device id (meaning that you</div><div class='add'>+can use /dev/zram&lt;id&gt;) or error code.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	cat /sys/class/zram-control/hot_add</div><div class='add'>+	1</div><div class='add'>+</div><div class='add'>+To remove the existing /dev/zramX device (where X is a device id)</div><div class='add'>+execute</div><div class='add'>+	echo X &gt; /sys/class/zram-control/hot_remove</div><div class='add'>+</div><div class='add'>+8) Stats:</div><div class='ctx'> Per-device statistics are exported as various nodes under /sys/block/zram&lt;id&gt;/</div><div class='ctx'> </div><div class='ctx'> A brief description of exported device attritbutes. For more details please</div><div class='hunk'>@@ -126,7 +145,7 @@ mem_used_max      RW    the maximum amount memory zram have consumed to</div><div class='ctx'> mem_limit         RW    the maximum amount of memory ZRAM can use to store</div><div class='ctx'>                         the compressed data</div><div class='ctx'> num_migrated      RO    the number of objects migrated migrated by compaction</div><div class='del'>-</div><div class='add'>+compact           WO    trigger memory compaction</div><div class='ctx'> </div><div class='ctx'> WARNING</div><div class='ctx'> =======</div><div class='hunk'>@@ -172,11 +191,11 @@ line of text and contains the following stats separated by whitespace:</div><div class='ctx'> 	zero_pages</div><div class='ctx'> 	num_migrated</div><div class='ctx'> </div><div class='del'>-8) Deactivate:</div><div class='add'>+9) Deactivate:</div><div class='ctx'> 	swapoff /dev/zram0</div><div class='ctx'> 	umount /dev/zram1</div><div class='ctx'> </div><div class='del'>-9) Reset:</div><div class='add'>+10) Reset:</div><div class='ctx'> 	Write any positive value to 'reset' sysfs node</div><div class='ctx'> 	echo 1 &gt; /sys/block/zram0/reset</div><div class='ctx'> 	echo 1 &gt; /sys/block/zram1/reset</div><div class='head'>diff --git a/Documentation/cgroups/blkio-controller.txt b/Documentation/cgroups/blkio-controller.txt<br/>index cd556b914786..68b6a6a470b0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cgroups/blkio-controller.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cgroups/blkio-controller.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cgroups/blkio-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/blkio-controller.txt</a></div><div class='hunk'>@@ -387,8 +387,81 @@ groups and put applications in that group which are not driving enough</div><div class='ctx'> IO to keep disk busy. In that case set group_idle=0, and CFQ will not idle</div><div class='ctx'> on individual groups and throughput should improve.</div><div class='ctx'> </div><div class='del'>-What works</div><div class='del'>-==========</div><div class='del'>-- Currently only sync IO queues are support. All the buffered writes are</div><div class='del'>-  still system wide and not per group. Hence we will not see service</div><div class='del'>-  differentiation between buffered writes between groups.</div><div class='add'>+Writeback</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+Page cache is dirtied through buffered writes and shared mmaps and</div><div class='add'>+written asynchronously to the backing filesystem by the writeback</div><div class='add'>+mechanism.  Writeback sits between the memory and IO domains and</div><div class='add'>+regulates the proportion of dirty memory by balancing dirtying and</div><div class='add'>+write IOs.</div><div class='add'>+</div><div class='add'>+On traditional cgroup hierarchies, relationships between different</div><div class='add'>+controllers cannot be established making it impossible for writeback</div><div class='add'>+to operate accounting for cgroup resource restrictions and all</div><div class='add'>+writeback IOs are attributed to the root cgroup.</div><div class='add'>+</div><div class='add'>+If both the blkio and memory controllers are used on the v2 hierarchy</div><div class='add'>+and the filesystem supports cgroup writeback, writeback operations</div><div class='add'>+correctly follow the resource restrictions imposed by both memory and</div><div class='add'>+blkio controllers.</div><div class='add'>+</div><div class='add'>+Writeback examines both system-wide and per-cgroup dirty memory status</div><div class='add'>+and enforces the more restrictive of the two.  Also, writeback control</div><div class='add'>+parameters which are absolute values - vm.dirty_bytes and</div><div class='add'>+vm.dirty_background_bytes - are distributed across cgroups according</div><div class='add'>+to their current writeback bandwidth.</div><div class='add'>+</div><div class='add'>+There's a peculiarity stemming from the discrepancy in ownership</div><div class='add'>+granularity between memory controller and writeback.  While memory</div><div class='add'>+controller tracks ownership per page, writeback operates on inode</div><div class='add'>+basis.  cgroup writeback bridges the gap by tracking ownership by</div><div class='add'>+inode but migrating ownership if too many foreign pages, pages which</div><div class='add'>+don't match the current inode ownership, have been encountered while</div><div class='add'>+writing back the inode.</div><div class='add'>+</div><div class='add'>+This is a conscious design choice as writeback operations are</div><div class='add'>+inherently tied to inodes making strictly following page ownership</div><div class='add'>+complicated and inefficient.  The only use case which suffers from</div><div class='add'>+this compromise is multiple cgroups concurrently dirtying disjoint</div><div class='add'>+regions of the same inode, which is an unlikely use case and decided</div><div class='add'>+to be unsupported.  Note that as memory controller assigns page</div><div class='add'>+ownership on the first use and doesn't update it until the page is</div><div class='add'>+released, even if cgroup writeback strictly follows page ownership,</div><div class='add'>+multiple cgroups dirtying overlapping areas wouldn't work as expected.</div><div class='add'>+In general, write-sharing an inode across multiple cgroups is not well</div><div class='add'>+supported.</div><div class='add'>+</div><div class='add'>+Filesystem support for cgroup writeback</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+A filesystem can make writeback IOs cgroup-aware by updating</div><div class='add'>+address_space_operations-&gt;writepage[s]() to annotate bio's using the</div><div class='add'>+following two functions.</div><div class='add'>+</div><div class='add'>+* wbc_init_bio(@wbc, @bio)</div><div class='add'>+</div><div class='add'>+  Should be called for each bio carrying writeback data and associates</div><div class='add'>+  the bio with the inode's owner cgroup.  Can be called anytime</div><div class='add'>+  between bio allocation and submission.</div><div class='add'>+</div><div class='add'>+* wbc_account_io(@wbc, @page, @bytes)</div><div class='add'>+</div><div class='add'>+  Should be called for each data segment being written out.  While</div><div class='add'>+  this function doesn't care exactly when it's called during the</div><div class='add'>+  writeback session, it's the easiest and most natural to call it as</div><div class='add'>+  data segments are added to a bio.</div><div class='add'>+</div><div class='add'>+With writeback bio's annotated, cgroup support can be enabled per</div><div class='add'>+super_block by setting MS_CGROUPWB in -&gt;s_flags.  This allows for</div><div class='add'>+selective disabling of cgroup writeback support which is helpful when</div><div class='add'>+certain filesystem features, e.g. journaled data mode, are</div><div class='add'>+incompatible.</div><div class='add'>+</div><div class='add'>+wbc_init_bio() binds the specified bio to its cgroup.  Depending on</div><div class='add'>+the configuration, the bio may be executed at a lower priority and if</div><div class='add'>+the writeback session is holding shared resources, e.g. a journal</div><div class='add'>+entry, may lead to priority inversion.  There is no one easy solution</div><div class='add'>+for the problem.  Filesystems can try to work around specific problem</div><div class='add'>+cases by skipping wbc_init_bio() or using bio_associate_blkcg()</div><div class='add'>+directly.</div><div class='head'>diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt<br/>index f456b4315e86..ff71e16cc752 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cgroups/memory.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cgroups/memory.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cgroups/memory.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/memory.txt</a></div><div class='hunk'>@@ -493,6 +493,7 @@ pgpgin		- # of charging events to the memory cgroup. The charging</div><div class='ctx'> pgpgout		- # of uncharging events to the memory cgroup. The uncharging</div><div class='ctx'> 		event happens each time a page is unaccounted from the cgroup.</div><div class='ctx'> swap		- # of bytes of swap usage</div><div class='add'>+dirty		- # of bytes that are waiting to get written back to the disk.</div><div class='ctx'> writeback	- # of bytes of file/anon cache that are queued for syncing to</div><div class='ctx'> 		disk.</div><div class='ctx'> inactive_anon	- # of bytes of anonymous and swap cache memory on inactive</div><div class='head'>diff --git a/Documentation/cgroups/unified-hierarchy.txt b/Documentation/cgroups/unified-hierarchy.txt<br/>index eb102fb72213..86847a7647ab 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cgroups/unified-hierarchy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cgroups/unified-hierarchy.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cgroups/unified-hierarchy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cgroups/unified-hierarchy.txt</a></div><div class='hunk'>@@ -17,15 +17,18 @@ CONTENTS</div><div class='ctx'> 3. Structural Constraints</div><div class='ctx'>   3-1. Top-down</div><div class='ctx'>   3-2. No internal tasks</div><div class='del'>-4. Other Changes</div><div class='del'>-  4-1. [Un]populated Notification</div><div class='del'>-  4-2. Other Core Changes</div><div class='del'>-  4-3. Per-Controller Changes</div><div class='del'>-    4-3-1. blkio</div><div class='del'>-    4-3-2. cpuset</div><div class='del'>-    4-3-3. memory</div><div class='del'>-5. Planned Changes</div><div class='del'>-  5-1. CAP for resource control</div><div class='add'>+4. Delegation</div><div class='add'>+  4-1. Model of delegation</div><div class='add'>+  4-2. Common ancestor rule</div><div class='add'>+5. Other Changes</div><div class='add'>+  5-1. [Un]populated Notification</div><div class='add'>+  5-2. Other Core Changes</div><div class='add'>+  5-3. Per-Controller Changes</div><div class='add'>+    5-3-1. blkio</div><div class='add'>+    5-3-2. cpuset</div><div class='add'>+    5-3-3. memory</div><div class='add'>+6. Planned Changes</div><div class='add'>+  6-1. CAP for resource control</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 1. Background</div><div class='hunk'>@@ -245,9 +248,72 @@ cgroup must create children and transfer all its tasks to the children</div><div class='ctx'> before enabling controllers in its "cgroup.subtree_control" file.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4. Other Changes</div><div class='add'>+4. Delegation</div><div class='ctx'> </div><div class='del'>-4-1. [Un]populated Notification</div><div class='add'>+4-1. Model of delegation</div><div class='add'>+</div><div class='add'>+A cgroup can be delegated to a less privileged user by granting write</div><div class='add'>+access of the directory and its "cgroup.procs" file to the user.  Note</div><div class='add'>+that the resource control knobs in a given directory concern the</div><div class='add'>+resources of the parent and thus must not be delegated along with the</div><div class='add'>+directory.</div><div class='add'>+</div><div class='add'>+Once delegated, the user can build sub-hierarchy under the directory,</div><div class='add'>+organize processes as it sees fit and further distribute the resources</div><div class='add'>+it got from the parent.  The limits and other settings of all resource</div><div class='add'>+controllers are hierarchical and regardless of what happens in the</div><div class='add'>+delegated sub-hierarchy, nothing can escape the resource restrictions</div><div class='add'>+imposed by the parent.</div><div class='add'>+</div><div class='add'>+Currently, cgroup doesn't impose any restrictions on the number of</div><div class='add'>+cgroups in or nesting depth of a delegated sub-hierarchy; however,</div><div class='add'>+this may in the future be limited explicitly.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4-2. Common ancestor rule</div><div class='add'>+</div><div class='add'>+On the unified hierarchy, to write to a "cgroup.procs" file, in</div><div class='add'>+addition to the usual write permission to the file and uid match, the</div><div class='add'>+writer must also have write access to the "cgroup.procs" file of the</div><div class='add'>+common ancestor of the source and destination cgroups.  This prevents</div><div class='add'>+delegatees from smuggling processes across disjoint sub-hierarchies.</div><div class='add'>+</div><div class='add'>+Let's say cgroups C0 and C1 have been delegated to user U0 who created</div><div class='add'>+C00, C01 under C0 and C10 under C1 as follows.</div><div class='add'>+</div><div class='add'>+ ~~~~~~~~~~~~~ - C0 - C00</div><div class='add'>+ ~ cgroup    ~      \ C01</div><div class='add'>+ ~ hierarchy ~</div><div class='add'>+ ~~~~~~~~~~~~~ - C1 - C10</div><div class='add'>+</div><div class='add'>+C0 and C1 are separate entities in terms of resource distribution</div><div class='add'>+regardless of their relative positions in the hierarchy.  The</div><div class='add'>+resources the processes under C0 are entitled to are controlled by</div><div class='add'>+C0's ancestors and may be completely different from C1.  It's clear</div><div class='add'>+that the intention of delegating C0 to U0 is allowing U0 to organize</div><div class='add'>+the processes under C0 and further control the distribution of C0's</div><div class='add'>+resources.</div><div class='add'>+</div><div class='add'>+On traditional hierarchies, if a task has write access to "tasks" or</div><div class='add'>+"cgroup.procs" file of a cgroup and its uid agrees with the target, it</div><div class='add'>+can move the target to the cgroup.  In the above example, U0 will not</div><div class='add'>+only be able to move processes in each sub-hierarchy but also across</div><div class='add'>+the two sub-hierarchies, effectively allowing it to violate the</div><div class='add'>+organizational and resource restrictions implied by the hierarchical</div><div class='add'>+structure above C0 and C1.</div><div class='add'>+</div><div class='add'>+On the unified hierarchy, let's say U0 wants to write the pid of a</div><div class='add'>+process which has a matching uid and is currently in C10 into</div><div class='add'>+"C00/cgroup.procs".  U0 obviously has write access to the file and</div><div class='add'>+migration permission on the process; however, the common ancestor of</div><div class='add'>+the source cgroup C10 and the destination cgroup C00 is above the</div><div class='add'>+points of delegation and U0 would not have write access to its</div><div class='add'>+"cgroup.procs" and thus be denied with -EACCES.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+5. Other Changes</div><div class='add'>+</div><div class='add'>+5-1. [Un]populated Notification</div><div class='ctx'> </div><div class='ctx'> cgroup users often need a way to determine when a cgroup's</div><div class='ctx'> subhierarchy becomes empty so that it can be cleaned up.  cgroup</div><div class='hunk'>@@ -289,7 +355,7 @@ supported and the interface files "release_agent" and</div><div class='ctx'> "notify_on_release" do not exist.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4-2. Other Core Changes</div><div class='add'>+5-2. Other Core Changes</div><div class='ctx'> </div><div class='ctx'> - None of the mount options is allowed.</div><div class='ctx'> </div><div class='hunk'>@@ -306,14 +372,14 @@ supported and the interface files "release_agent" and</div><div class='ctx'> - The "cgroup.clone_children" file is removed.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4-3. Per-Controller Changes</div><div class='add'>+5-3. Per-Controller Changes</div><div class='ctx'> </div><div class='del'>-4-3-1. blkio</div><div class='add'>+5-3-1. blkio</div><div class='ctx'> </div><div class='ctx'> - blk-throttle becomes properly hierarchical.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4-3-2. cpuset</div><div class='add'>+5-3-2. cpuset</div><div class='ctx'> </div><div class='ctx'> - Tasks are kept in empty cpusets after hotplug and take on the masks</div><div class='ctx'>   of the nearest non-empty ancestor, instead of being moved to it.</div><div class='hunk'>@@ -322,7 +388,7 @@ supported and the interface files "release_agent" and</div><div class='ctx'>   masks of the nearest non-empty ancestor.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4-3-3. memory</div><div class='add'>+5-3-3. memory</div><div class='ctx'> </div><div class='ctx'> - use_hierarchy is on by default and the cgroup file for the flag is</div><div class='ctx'>   not created.</div><div class='hunk'>@@ -407,9 +473,9 @@ supported and the interface files "release_agent" and</div><div class='ctx'>   memory.low, memory.high, and memory.max will use the string "max" to</div><div class='ctx'>   indicate and set the highest possible value.</div><div class='ctx'> </div><div class='del'>-5. Planned Changes</div><div class='add'>+6. Planned Changes</div><div class='ctx'> </div><div class='del'>-5-1. CAP for resource control</div><div class='add'>+6-1. CAP for resource control</div><div class='ctx'> </div><div class='ctx'> Unified hierarchy will require one of the capabilities(7), which is</div><div class='ctx'> yet to be decided, for all resource control related knobs.  Process</div><div class='head'>diff --git a/Documentation/clk.txt b/Documentation/clk.txt<br/>index 0e4f90aa1c13..f463bdc37f88 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/clk.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/clk.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/clk.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/clk.txt</a></div><div class='hunk'>@@ -230,30 +230,7 @@ clk_register(...)</div><div class='ctx'> </div><div class='ctx'> See the basic clock types in drivers/clk/clk-*.c for examples.</div><div class='ctx'> </div><div class='del'>-	Part 5 - static initialization of clock data</div><div class='del'>-</div><div class='del'>-For platforms with many clocks (often numbering into the hundreds) it</div><div class='del'>-may be desirable to statically initialize some clock data.  This</div><div class='del'>-presents a problem since the definition of struct clk should be hidden</div><div class='del'>-from everyone except for the clock core in drivers/clk/clk.c.</div><div class='del'>-</div><div class='del'>-To get around this problem struct clk's definition is exposed in</div><div class='del'>-include/linux/clk-private.h along with some macros for more easily</div><div class='del'>-initializing instances of the basic clock types.  These clocks must</div><div class='del'>-still be initialized with the common clock framework via a call to</div><div class='del'>-__clk_init.</div><div class='del'>-</div><div class='del'>-clk-private.h must NEVER be included by code which implements struct</div><div class='del'>-clk_ops callbacks, nor must it be included by any logic which pokes</div><div class='del'>-around inside of struct clk at run-time.  To do so is a layering</div><div class='del'>-violation.</div><div class='del'>-</div><div class='del'>-To better enforce this policy, always follow this simple rule: any</div><div class='del'>-statically initialized clock data MUST be defined in a separate file</div><div class='del'>-from the logic that implements its ops.  Basically separate the logic</div><div class='del'>-from the data and all is well.</div><div class='del'>-</div><div class='del'>-	Part 6 - Disabling clock gating of unused clocks</div><div class='add'>+	Part 5 - Disabling clock gating of unused clocks</div><div class='ctx'> </div><div class='ctx'> Sometimes during development it can be useful to be able to bypass the</div><div class='ctx'> default disabling of unused clocks. For example, if drivers aren't enabling</div><div class='hunk'>@@ -264,7 +241,7 @@ are sorted out.</div><div class='ctx'> To bypass this disabling, include "clk_ignore_unused" in the bootargs to the</div><div class='ctx'> kernel.</div><div class='ctx'> </div><div class='del'>-	Part 7 - Locking</div><div class='add'>+	Part 6 - Locking</div><div class='ctx'> </div><div class='ctx'> The common clock framework uses two global locks, the prepare lock and the</div><div class='ctx'> enable lock.</div><div class='head'>diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt<br/>index 77ec21574fb1..c15aa75f5227 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cpu-freq/governors.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cpu-freq/governors.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cpu-freq/governors.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/governors.txt</a></div><div class='hunk'>@@ -36,7 +36,7 @@ Contents:</div><div class='ctx'> 1. What Is A CPUFreq Governor?</div><div class='ctx'> ==============================</div><div class='ctx'> </div><div class='del'>-Most cpufreq drivers (in fact, all except one, longrun) or even most</div><div class='add'>+Most cpufreq drivers (except the intel_pstate and longrun) or even most</div><div class='ctx'> cpu frequency scaling algorithms only offer the CPU to be set to one</div><div class='ctx'> frequency. In order to offer dynamic frequency scaling, the cpufreq</div><div class='ctx'> core must be able to tell these drivers of a "target frequency". So</div><div class='head'>diff --git a/Documentation/cpu-freq/intel-pstate.txt b/Documentation/cpu-freq/intel-pstate.txt<br/>index 655750743fb0..be8d4006bf76 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cpu-freq/intel-pstate.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cpu-freq/intel-pstate.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cpu-freq/intel-pstate.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/intel-pstate.txt</a></div><div class='hunk'>@@ -3,24 +3,25 @@ Intel P-state driver</div><div class='ctx'> </div><div class='ctx'> This driver provides an interface to control the P state selection for</div><div class='ctx'> SandyBridge+ Intel processors.  The driver can operate two different</div><div class='del'>-modes based on the processor model legacy and Hardware P state (HWP)</div><div class='add'>+modes based on the processor model, legacy mode and Hardware P state (HWP)</div><div class='ctx'> mode.</div><div class='ctx'> </div><div class='del'>-In legacy mode the driver implements a scaling driver with an internal</div><div class='del'>-governor for Intel Core processors.  The driver follows the same model</div><div class='del'>-as the Transmeta scaling driver (longrun.c) and implements the</div><div class='del'>-setpolicy() instead of target().  Scaling drivers that implement</div><div class='del'>-setpolicy() are assumed to implement internal governors by the cpufreq</div><div class='del'>-core. All the logic for selecting the current P state is contained</div><div class='del'>-within the driver; no external governor is used by the cpufreq core.</div><div class='add'>+In legacy mode, the Intel P-state implements two internal governors,</div><div class='add'>+performance and powersave, that differ from the general cpufreq governors of</div><div class='add'>+the same name (the general cpufreq governors implement target(), whereas the</div><div class='add'>+internal Intel P-state governors implement setpolicy()).  The internal</div><div class='add'>+performance governor sets the max_perf_pct and min_perf_pct to 100; that is,</div><div class='add'>+the governor selects the highest available P state to maximize the performance</div><div class='add'>+of the core.  The internal powersave governor selects the appropriate P state</div><div class='add'>+based on the current load on the CPU.</div><div class='ctx'> </div><div class='ctx'> In HWP mode P state selection is implemented in the processor</div><div class='ctx'> itself. The driver provides the interfaces between the cpufreq core and</div><div class='ctx'> the processor to control P state selection based on user preferences</div><div class='ctx'> and reporting frequency to the cpufreq core.  In this mode the</div><div class='del'>-internal governor code is disabled.</div><div class='add'>+internal Intel P-state governor code is disabled.</div><div class='ctx'> </div><div class='del'>-In addtion to the interfaces provided by the cpufreq core for</div><div class='add'>+In addition to the interfaces provided by the cpufreq core for</div><div class='ctx'> controlling frequency the driver provides sysfs files for</div><div class='ctx'> controlling P state selection. These files have been added to</div><div class='ctx'> /sys/devices/system/cpu/intel_pstate/</div><div class='head'>diff --git a/Documentation/cpu-freq/user-guide.txt b/Documentation/cpu-freq/user-guide.txt<br/>index ff2f28332cc4..109e97bbab77 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cpu-freq/user-guide.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cpu-freq/user-guide.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cpu-freq/user-guide.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cpu-freq/user-guide.txt</a></div><div class='hunk'>@@ -196,8 +196,6 @@ affected_cpus :			List of Online CPUs that require software</div><div class='ctx'> related_cpus :			List of Online + Offline CPUs that need software</div><div class='ctx'> 				coordination of frequency.</div><div class='ctx'> </div><div class='del'>-scaling_driver :		Hardware driver for cpufreq.</div><div class='del'>-</div><div class='ctx'> scaling_cur_freq :		Current frequency of the CPU as determined by</div><div class='ctx'> 				the governor and cpufreq core, in KHz. This is</div><div class='ctx'> 				the frequency the kernel thinks the CPU runs</div><div class='head'>diff --git a/Documentation/cputopology.txt b/Documentation/cputopology.txt<br/>index 0aad6deb2d96..12b1b25b4da9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cputopology.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/cputopology.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cputopology.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/cputopology.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> </div><div class='ctx'> Export CPU topology info via sysfs. Items (attributes) are similar</div><div class='del'>-to /proc/cpuinfo.</div><div class='add'>+to /proc/cpuinfo output of some architectures:</div><div class='ctx'> </div><div class='ctx'> 1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:</div><div class='ctx'> </div><div class='hunk'>@@ -23,20 +23,35 @@ to /proc/cpuinfo.</div><div class='ctx'> 4) /sys/devices/system/cpu/cpuX/topology/thread_siblings:</div><div class='ctx'> </div><div class='ctx'> 	internal kernel map of cpuX's hardware threads within the same</div><div class='del'>-	core as cpuX</div><div class='add'>+	core as cpuX.</div><div class='ctx'> </div><div class='del'>-5) /sys/devices/system/cpu/cpuX/topology/core_siblings:</div><div class='add'>+5) /sys/devices/system/cpu/cpuX/topology/thread_siblings_list:</div><div class='add'>+</div><div class='add'>+	human-readable list of cpuX's hardware threads within the same</div><div class='add'>+	core as cpuX.</div><div class='add'>+</div><div class='add'>+6) /sys/devices/system/cpu/cpuX/topology/core_siblings:</div><div class='ctx'> </div><div class='ctx'> 	internal kernel map of cpuX's hardware threads within the same</div><div class='ctx'> 	physical_package_id.</div><div class='ctx'> </div><div class='del'>-6) /sys/devices/system/cpu/cpuX/topology/book_siblings:</div><div class='add'>+7) /sys/devices/system/cpu/cpuX/topology/core_siblings_list:</div><div class='add'>+</div><div class='add'>+	human-readable list of cpuX's hardware threads within the same</div><div class='add'>+	physical_package_id.</div><div class='add'>+</div><div class='add'>+8) /sys/devices/system/cpu/cpuX/topology/book_siblings:</div><div class='ctx'> </div><div class='ctx'> 	internal kernel map of cpuX's hardware threads within the same</div><div class='ctx'> 	book_id.</div><div class='ctx'> </div><div class='add'>+9) /sys/devices/system/cpu/cpuX/topology/book_siblings_list:</div><div class='add'>+</div><div class='add'>+	human-readable list of cpuX's hardware threads within the same</div><div class='add'>+	book_id.</div><div class='add'>+</div><div class='ctx'> To implement it in an architecture-neutral way, a new source file,</div><div class='del'>-drivers/base/topology.c, is to export the 4 or 6 attributes. The two book</div><div class='add'>+drivers/base/topology.c, is to export the 6 or 9 attributes. The three book</div><div class='ctx'> related sysfs files will only be created if CONFIG_SCHED_BOOK is selected.</div><div class='ctx'> </div><div class='ctx'> For an architecture to support this feature, it must define some of</div><div class='hunk'>@@ -44,20 +59,22 @@ these macros in include/asm-XXX/topology.h:</div><div class='ctx'> #define topology_physical_package_id(cpu)</div><div class='ctx'> #define topology_core_id(cpu)</div><div class='ctx'> #define topology_book_id(cpu)</div><div class='del'>-#define topology_thread_cpumask(cpu)</div><div class='add'>+#define topology_sibling_cpumask(cpu)</div><div class='ctx'> #define topology_core_cpumask(cpu)</div><div class='ctx'> #define topology_book_cpumask(cpu)</div><div class='ctx'> </div><div class='del'>-The type of **_id is int.</div><div class='del'>-The type of siblings is (const) struct cpumask *.</div><div class='add'>+The type of **_id macros is int.</div><div class='add'>+The type of **_cpumask macros is (const) struct cpumask *. The latter</div><div class='add'>+correspond with appropriate **_siblings sysfs attributes (except for</div><div class='add'>+topology_sibling_cpumask() which corresponds with thread_siblings).</div><div class='ctx'> </div><div class='ctx'> To be consistent on all architectures, include/linux/topology.h</div><div class='ctx'> provides default definitions for any of the above macros that are</div><div class='ctx'> not defined by include/asm-XXX/topology.h:</div><div class='ctx'> 1) physical_package_id: -1</div><div class='ctx'> 2) core_id: 0</div><div class='del'>-3) thread_siblings: just the given CPU</div><div class='del'>-4) core_siblings: just the given CPU</div><div class='add'>+3) sibling_cpumask: just the given CPU</div><div class='add'>+4) core_cpumask: just the given CPU</div><div class='ctx'> </div><div class='ctx'> For architectures that don't support books (CONFIG_SCHED_BOOK) there are no</div><div class='ctx'> default definitions for topology_book_id() and topology_book_cpumask().</div><div class='head'>diff --git a/Documentation/debugging-via-ohci1394.txt b/Documentation/debugging-via-ohci1394.txt<br/>index 5c9a567b3fac..03703afc4d30 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/debugging-via-ohci1394.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/debugging-via-ohci1394.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/debugging-via-ohci1394.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/debugging-via-ohci1394.txt</a></div><div class='hunk'>@@ -181,4 +181,4 @@ Notes</div><div class='ctx'> Documentation and specifications: http://halobates.de/firewire/</div><div class='ctx'> </div><div class='ctx'> FireWire is a trademark of Apple Inc. - for more information please refer to:</div><div class='del'>-http://en.wikipedia.org/wiki/FireWire</div><div class='add'>+https://en.wikipedia.org/wiki/FireWire</div><div class='head'>diff --git a/Documentation/device-mapper/cache-policies.txt b/Documentation/device-mapper/cache-policies.txt<br/>index 0d124a971801..d9246a32e673 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/cache-policies.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/device-mapper/cache-policies.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/cache-policies.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/cache-policies.txt</a></div><div class='hunk'>@@ -25,10 +25,10 @@ trying to see when the io scheduler has let the ios run.</div><div class='ctx'> Overview of supplied cache replacement policies</div><div class='ctx'> ===============================================</div><div class='ctx'> </div><div class='del'>-multiqueue</div><div class='del'>-----------</div><div class='add'>+multiqueue (mq)</div><div class='add'>+---------------</div><div class='ctx'> </div><div class='del'>-This policy is the default.</div><div class='add'>+This policy has been deprecated in favor of the smq policy (see below).</div><div class='ctx'> </div><div class='ctx'> The multiqueue policy has three sets of 16 queues: one set for entries</div><div class='ctx'> waiting for the cache and another two for those in the cache (a set for</div><div class='hunk'>@@ -73,6 +73,67 @@ If you're trying to quickly warm a new cache device you may wish to</div><div class='ctx'> reduce these to encourage promotion.  Remember to switch them back to</div><div class='ctx'> their defaults after the cache fills though.</div><div class='ctx'> </div><div class='add'>+Stochastic multiqueue (smq)</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+This policy is the default.</div><div class='add'>+</div><div class='add'>+The stochastic multi-queue (smq) policy addresses some of the problems</div><div class='add'>+with the multiqueue (mq) policy.</div><div class='add'>+</div><div class='add'>+The smq policy (vs mq) offers the promise of less memory utilization,</div><div class='add'>+improved performance and increased adaptability in the face of changing</div><div class='add'>+workloads.  SMQ also does not have any cumbersome tuning knobs.</div><div class='add'>+</div><div class='add'>+Users may switch from "mq" to "smq" simply by appropriately reloading a</div><div class='add'>+DM table that is using the cache target.  Doing so will cause all of the</div><div class='add'>+mq policy's hints to be dropped.  Also, performance of the cache may</div><div class='add'>+degrade slightly until smq recalculates the origin device's hotspots</div><div class='add'>+that should be cached.</div><div class='add'>+</div><div class='add'>+Memory usage:</div><div class='add'>+The mq policy uses a lot of memory; 88 bytes per cache block on a 64</div><div class='add'>+bit machine.</div><div class='add'>+</div><div class='add'>+SMQ uses 28bit indexes to implement it's data structures rather than</div><div class='add'>+pointers.  It avoids storing an explicit hit count for each block.  It</div><div class='add'>+has a 'hotspot' queue rather than a pre cache which uses a quarter of</div><div class='add'>+the entries (each hotspot block covers a larger area than a single</div><div class='add'>+cache block).</div><div class='add'>+</div><div class='add'>+All these mean smq uses ~25bytes per cache block.  Still a lot of</div><div class='add'>+memory, but a substantial improvement nontheless.</div><div class='add'>+</div><div class='add'>+Level balancing:</div><div class='add'>+MQ places entries in different levels of the multiqueue structures</div><div class='add'>+based on their hit count (~ln(hit count)).  This means the bottom</div><div class='add'>+levels generally have the most entries, and the top ones have very</div><div class='add'>+few.  Having unbalanced levels like this reduces the efficacy of the</div><div class='add'>+multiqueue.</div><div class='add'>+</div><div class='add'>+SMQ does not maintain a hit count, instead it swaps hit entries with</div><div class='add'>+the least recently used entry from the level above.  The over all</div><div class='add'>+ordering being a side effect of this stochastic process.  With this</div><div class='add'>+scheme we can decide how many entries occupy each multiqueue level,</div><div class='add'>+resulting in better promotion/demotion decisions.</div><div class='add'>+</div><div class='add'>+Adaptability:</div><div class='add'>+The MQ policy maintains a hit count for each cache block.  For a</div><div class='add'>+different block to get promoted to the cache it's hit count has to</div><div class='add'>+exceed the lowest currently in the cache.  This means it can take a</div><div class='add'>+long time for the cache to adapt between varying IO patterns.</div><div class='add'>+Periodically degrading the hit counts could help with this, but I</div><div class='add'>+haven't found a nice general solution.</div><div class='add'>+</div><div class='add'>+SMQ doesn't maintain hit counts, so a lot of this problem just goes</div><div class='add'>+away.  In addition it tracks performance of the hotspot queue, which</div><div class='add'>+is used to decide which blocks to promote.  If the hotspot queue is</div><div class='add'>+performing badly then it starts moving entries more quickly between</div><div class='add'>+levels.  This lets it adapt to new IO patterns very quickly.</div><div class='add'>+</div><div class='add'>+Performance:</div><div class='add'>+Testing SMQ shows substantially better performance than MQ.</div><div class='add'>+</div><div class='ctx'> cleaner</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/device-mapper/cache.txt b/Documentation/device-mapper/cache.txt<br/>index 68c0f517c60e..785eab87aa71 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/cache.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/device-mapper/cache.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/cache.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/cache.txt</a></div><div class='hunk'>@@ -221,6 +221,7 @@ Status</div><div class='ctx'> &lt;#read hits&gt; &lt;#read misses&gt; &lt;#write hits&gt; &lt;#write misses&gt;</div><div class='ctx'> &lt;#demotions&gt; &lt;#promotions&gt; &lt;#dirty&gt; &lt;#features&gt; &lt;features&gt;*</div><div class='ctx'> &lt;#core args&gt; &lt;core args&gt;* &lt;policy name&gt; &lt;#policy args&gt; &lt;policy args&gt;*</div><div class='add'>+&lt;cache metadata mode&gt;</div><div class='ctx'> </div><div class='ctx'> metadata block size	 : Fixed block size for each metadata block in</div><div class='ctx'> 			     sectors</div><div class='hunk'>@@ -251,8 +252,18 @@ core args		 : Key/value pairs for tuning the core</div><div class='ctx'> 			     e.g. migration_threshold</div><div class='ctx'> policy name		 : Name of the policy</div><div class='ctx'> #policy args		 : Number of policy arguments to follow (must be even)</div><div class='del'>-policy args		 : Key/value pairs</div><div class='del'>-			     e.g. sequential_threshold</div><div class='add'>+policy args		 : Key/value pairs e.g. sequential_threshold</div><div class='add'>+cache metadata mode      : ro if read-only, rw if read-write</div><div class='add'>+	In serious cases where even a read-only mode is deemed unsafe</div><div class='add'>+	no further I/O will be permitted and the status will just</div><div class='add'>+	contain the string 'Fail'.  The userspace recovery tools</div><div class='add'>+	should then be used.</div><div class='add'>+needs_check		 : 'needs_check' if set, '-' if not set</div><div class='add'>+	A metadata operation has failed, resulting in the needs_check</div><div class='add'>+	flag being set in the metadata's superblock.  The metadata</div><div class='add'>+	device must be deactivated and checked/repaired before the</div><div class='add'>+	cache can be made fully operational again.  '-' indicates</div><div class='add'>+	needs_check is not set.</div><div class='ctx'> </div><div class='ctx'> Messages</div><div class='ctx'> --------</div><div class='head'>diff --git a/Documentation/device-mapper/dm-raid.txt b/Documentation/device-mapper/dm-raid.txt<br/>index ef8ba9fa58c4..cb12af3b51c2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/dm-raid.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/device-mapper/dm-raid.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/dm-raid.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/dm-raid.txt</a></div><div class='hunk'>@@ -224,3 +224,5 @@ Version History</div><div class='ctx'> 	New status (STATUSTYPE_INFO) fields: sync_action and mismatch_cnt.</div><div class='ctx'> 1.5.1   Add ability to restore transiently failed devices on resume.</div><div class='ctx'> 1.5.2   'mismatch_cnt' is zero unless [last_]sync_action is "check".</div><div class='add'>+1.6.0   Add discard support (and devices_handle_discard_safely module param).</div><div class='add'>+1.7.0   Add support for MD RAID0 mappings.</div><div class='head'>diff --git a/Documentation/device-mapper/statistics.txt b/Documentation/device-mapper/statistics.txt<br/>index 2a1673adc200..4919b2dfd1b3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/statistics.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/device-mapper/statistics.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/statistics.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/statistics.txt</a></div><div class='hunk'>@@ -13,9 +13,14 @@ the range specified.</div><div class='ctx'> The I/O statistics counters for each step-sized area of a region are</div><div class='ctx'> in the same format as /sys/block/*/stat or /proc/diskstats (see:</div><div class='ctx'> Documentation/iostats.txt).  But two extra counters (12 and 13) are</div><div class='del'>-provided: total time spent reading and writing in milliseconds.	 All</div><div class='del'>-these counters may be accessed by sending the @stats_print message to</div><div class='del'>-the appropriate DM device via dmsetup.</div><div class='add'>+provided: total time spent reading and writing.  When the histogram</div><div class='add'>+argument is used, the 14th parameter is reported that represents the</div><div class='add'>+histogram of latencies.  All these counters may be accessed by sending</div><div class='add'>+the @stats_print message to the appropriate DM device via dmsetup.</div><div class='add'>+</div><div class='add'>+The reported times are in milliseconds and the granularity depends on</div><div class='add'>+the kernel ticks.  When the option precise_timestamps is used, the</div><div class='add'>+reported times are in nanoseconds.</div><div class='ctx'> </div><div class='ctx'> Each region has a corresponding unique identifier, which we call a</div><div class='ctx'> region_id, that is assigned when the region is created.	 The region_id</div><div class='hunk'>@@ -33,7 +38,9 @@ memory is used by reading</div><div class='ctx'> Messages</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-    @stats_create &lt;range&gt; &lt;step&gt; [&lt;program_id&gt; [&lt;aux_data&gt;]]</div><div class='add'>+    @stats_create &lt;range&gt; &lt;step&gt;</div><div class='add'>+		[&lt;number_of_optional_arguments&gt; &lt;optional_arguments&gt;...]</div><div class='add'>+		[&lt;program_id&gt; [&lt;aux_data&gt;]]</div><div class='ctx'> </div><div class='ctx'> 	Create a new region and return the region_id.</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +55,29 @@ Messages</div><div class='ctx'> 	  "/&lt;number_of_areas&gt;" - the range is subdivided into the specified</div><div class='ctx'> 				 number of areas.</div><div class='ctx'> </div><div class='add'>+	&lt;number_of_optional_arguments&gt;</div><div class='add'>+	  The number of optional arguments</div><div class='add'>+</div><div class='add'>+	&lt;optional_arguments&gt;</div><div class='add'>+	  The following optional arguments are supported</div><div class='add'>+	  precise_timestamps - use precise timer with nanosecond resolution</div><div class='add'>+		instead of the "jiffies" variable.  When this argument is</div><div class='add'>+		used, the resulting times are in nanoseconds instead of</div><div class='add'>+		milliseconds.  Precise timestamps are a little bit slower</div><div class='add'>+		to obtain than jiffies-based timestamps.</div><div class='add'>+	  histogram:n1,n2,n3,n4,... - collect histogram of latencies.  The</div><div class='add'>+		numbers n1, n2, etc are times that represent the boundaries</div><div class='add'>+		of the histogram.  If precise_timestamps is not used, the</div><div class='add'>+		times are in milliseconds, otherwise they are in</div><div class='add'>+		nanoseconds.  For each range, the kernel will report the</div><div class='add'>+		number of requests that completed within this range. For</div><div class='add'>+		example, if we use "histogram:10,20,30", the kernel will</div><div class='add'>+		report four numbers a:b:c:d. a is the number of requests</div><div class='add'>+		that took 0-10 ms to complete, b is the number of requests</div><div class='add'>+		that took 10-20 ms to complete, c is the number of requests</div><div class='add'>+		that took 20-30 ms to complete and d is the number of</div><div class='add'>+		requests that took more than 30 ms to complete.</div><div class='add'>+</div><div class='ctx'> 	&lt;program_id&gt;</div><div class='ctx'> 	  An optional parameter.  A name that uniquely identifies</div><div class='ctx'> 	  the userspace owner of the range.  This groups ranges together</div><div class='hunk'>@@ -55,6 +85,9 @@ Messages</div><div class='ctx'> 	  created and ignore those created by others.</div><div class='ctx'> 	  The kernel returns this string back in the output of</div><div class='ctx'> 	  @stats_list message, but it doesn't use it for anything else.</div><div class='add'>+	  If we omit the number of optional arguments, program id must not</div><div class='add'>+	  be a number, otherwise it would be interpreted as the number of</div><div class='add'>+	  optional arguments.</div><div class='ctx'> </div><div class='ctx'> 	&lt;aux_data&gt;</div><div class='ctx'> 	  An optional parameter.  A word that provides auxiliary data</div><div class='head'>diff --git a/Documentation/device-mapper/thin-provisioning.txt b/Documentation/device-mapper/thin-provisioning.txt<br/>index 4f67578b2954..1699a55b7b70 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/thin-provisioning.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/device-mapper/thin-provisioning.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/thin-provisioning.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/device-mapper/thin-provisioning.txt</a></div><div class='hunk'>@@ -296,7 +296,7 @@ ii) Status</div><div class='ctx'> 	underlying device.  When this is enabled when loading the table,</div><div class='ctx'> 	it can get disabled if the underlying device doesn't support it.</div><div class='ctx'> </div><div class='del'>-    ro|rw</div><div class='add'>+    ro|rw|out_of_data_space</div><div class='ctx'> 	If the pool encounters certain types of device failures it will</div><div class='ctx'> 	drop into a read-only metadata mode in which no changes to</div><div class='ctx'> 	the pool metadata (like allocating new blocks) are permitted.</div><div class='hunk'>@@ -314,6 +314,13 @@ ii) Status</div><div class='ctx'> 	module parameter can be used to change this timeout -- it</div><div class='ctx'> 	defaults to 60 seconds but may be disabled using a value of 0.</div><div class='ctx'> </div><div class='add'>+    needs_check</div><div class='add'>+	A metadata operation has failed, resulting in the needs_check</div><div class='add'>+	flag being set in the metadata's superblock.  The metadata</div><div class='add'>+	device must be deactivated and checked/repaired before the</div><div class='add'>+	thin-pool can be made fully operational again.  '-' indicates</div><div class='add'>+	needs_check is not set.</div><div class='add'>+</div><div class='ctx'> iii) Messages</div><div class='ctx'> </div><div class='ctx'>     create_thin &lt;dev id&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arc/archs-idu-intc.txt b/Documentation/devicetree/bindings/arc/archs-idu-intc.txt<br/>new file mode 100644<br/>index 000000000000..0dcb7c7d3e40<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arc/archs-idu-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/archs-idu-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+* ARC-HS Interrupt Distribution Unit</div><div class='add'>+</div><div class='add'>+  This optional 2nd level interrupt controller can be used in SMP configurations for</div><div class='add'>+  dynamic IRQ routing, load balancing of common/external IRQs towards core intc.</div><div class='add'>+</div><div class='add'>+Properties:</div><div class='add'>+</div><div class='add'>+- compatible: "snps,archs-idu-intc"</div><div class='add'>+- interrupt-controller: This is an interrupt controller.</div><div class='add'>+- interrupt-parent: &lt;reference to parent core intc&gt;</div><div class='add'>+- #interrupt-cells: Must be &lt;2&gt;.</div><div class='add'>+- interrupts: &lt;...&gt; specifies the upstream core irqs</div><div class='add'>+</div><div class='add'>+  First cell specifies the "common" IRQ from peripheral to IDU</div><div class='add'>+  Second cell specifies the irq distribution mode to cores</div><div class='add'>+     0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+</div><div class='add'>+  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='add'>+  is not specified.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	core_intc: core-interrupt-controller {</div><div class='add'>+		compatible = "snps,archs-intc";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	idu_intc: idu-interrupt-controller {</div><div class='add'>+		compatible = "snps,archs-idu-intc";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * &lt;hwirq  distribution&gt;</div><div class='add'>+		 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+		 */</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		/* upstream core irqs: downstream these are "COMMON" irq 0,1..  */</div><div class='add'>+		interrupts = &lt;24 25 26 27 28 29 30 31&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	some_device: serial@c0fc1000 {</div><div class='add'>+		interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 0&gt;;	/* upstream idu IRQ #24, Round Robin */</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arc/archs-intc.txt b/Documentation/devicetree/bindings/arc/archs-intc.txt<br/>new file mode 100644<br/>index 000000000000..69f326d6a5ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arc/archs-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/archs-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)</div><div class='add'>+</div><div class='add'>+Properties:</div><div class='add'>+</div><div class='add'>+- compatible: "snps,archs-intc"</div><div class='add'>+- interrupt-controller: This is an interrupt controller.</div><div class='add'>+- #interrupt-cells: Must be &lt;1&gt;.</div><div class='add'>+</div><div class='add'>+  Single Cell "interrupts" property of a device specifies the IRQ number</div><div class='add'>+  between 16 to 256</div><div class='add'>+</div><div class='add'>+  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='add'>+  is not specified.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	intc: interrupt-controller {</div><div class='add'>+		compatible = "snps,archs-intc";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;16 17 18 19 20 21 22 23 24 25&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arc/axs101.txt b/Documentation/devicetree/bindings/arc/axs101.txt<br/>new file mode 100644<br/>index 000000000000..48290d5178b5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arc/axs101.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/axs101.txt</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings</div><div class='add'>+---------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+SDP Main Board with an AXC001 CPU Card hoisting ARC700 core in silicon</div><div class='add'>+</div><div class='add'>+Required root node properties:</div><div class='add'>+    - compatible = "snps,axs101", "snps,arc-sdp";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arc/axs103.txt b/Documentation/devicetree/bindings/arc/axs103.txt<br/>new file mode 100644<br/>index 000000000000..6eea862e72b9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arc/axs103.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arc/axs103.txt</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings</div><div class='add'>+---------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+SDP Main Board with an AXC003 FPGA Card which can contain various flavours of</div><div class='add'>+HS38x cores.</div><div class='add'>+</div><div class='add'>+Required root node properties:</div><div class='add'>+    - compatible = "snps,axs103", "snps,arc-sdp";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt<br/>new file mode 100644<br/>index 000000000000..77ca635765e1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+Altera SOCFPGA SDRAM Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should contain "altr,sdr-ctl" and "syscon".</div><div class='add'>+  syscon is required by the Altera SOCFPGA SDRAM EDAC.</div><div class='add'>+- reg : Should contain 1 register range (address and length)</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	sdr: sdr@ffc25000 {</div><div class='add'>+		compatible = "altr,sdr-ctl", "syscon";</div><div class='add'>+		reg = &lt;0xffc25000 0x1000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt<br/>index d0ce01da5c59..f5ad0ff69fae 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@ Altera SOCFPGA SDRAM Error Detection &amp; Correction [EDAC]</div><div class='ctx'> The EDAC accesses a range of registers in the SDRAM controller.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : should contain "altr,sdram-edac";</div><div class='add'>+- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"</div><div class='ctx'> - altr,sdr-syscon : phandle of the sdr module</div><div class='ctx'> - interrupts : Should contain the SDRAM ECC IRQ in the</div><div class='ctx'> 	appropriate format for the IRQ controller.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards<br/>index b78564b2b201..1a709970e7f7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/arm-boards?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/arm-boards</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/arm-boards?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/arm-boards</a></div><div class='hunk'>@@ -157,3 +157,69 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+ARM Versatile Express Boards</div><div class='add'>+-----------------------------</div><div class='add'>+For details on the device tree bindings for ARM Versatile Express boards</div><div class='add'>+please consult the vexpress.txt file in the same directory as this file.</div><div class='add'>+</div><div class='add'>+ARM Juno Boards</div><div class='add'>+----------------</div><div class='add'>+The Juno boards are targeting development for AArch64 systems. The first</div><div class='add'>+iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64,</div><div class='add'>+with the second iteration, Juno r1, mainly aimed at development of PCIe</div><div class='add'>+based systems. Juno r1 also has support for AXI masters placed on the TLX</div><div class='add'>+connectors to join the coherency domain.</div><div class='add'>+</div><div class='add'>+Juno boards are described in a similar way to ARM Versatile Express boards,</div><div class='add'>+with the motherboard part of the hardware being described in a separate file</div><div class='add'>+to highlight the fact that is part of the support infrastructure for the SoC.</div><div class='add'>+Juno device tree bindings also share the Versatile Express bindings as</div><div class='add'>+described under the RS1 memory mapping.</div><div class='add'>+</div><div class='add'>+Required properties (in root node):</div><div class='add'>+	compatible = "arm,juno";	/* For Juno r0 board */</div><div class='add'>+	compatible = "arm,juno-r1";	/* For Juno r1 board */</div><div class='add'>+</div><div class='add'>+Required nodes:</div><div class='add'>+The description for the board must include:</div><div class='add'>+   - a "psci" node describing the boot method used for the secondary CPUs.</div><div class='add'>+     A detailed description of the bindings used for "psci" nodes is present</div><div class='add'>+     in the psci.txt file.</div><div class='add'>+   - a "cpus" node describing the available cores and their associated</div><div class='add'>+     "enable-method"s. For more details see cpus.txt file.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/ {</div><div class='add'>+	model = "ARM Juno development board (r0)";</div><div class='add'>+	compatible = "arm,juno", "arm,vexpress";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		A57_0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a57","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		.....</div><div class='add'>+</div><div class='add'>+		A53_0: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a53","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		.....</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/armv7m_systick.txt b/Documentation/devicetree/bindings/arm/armv7m_systick.txt<br/>new file mode 100644<br/>index 000000000000..7cf4a24601eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/armv7m_systick.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/armv7m_systick.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+* ARMv7M System Timer</div><div class='add'>+</div><div class='add'>+ARMv7-M includes a system timer, known as SysTick. Current driver only</div><div class='add'>+implements the clocksource feature.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible	  : Should be "arm,armv7m-systick"</div><div class='add'>+- reg		  : The address range of the timer</div><div class='add'>+</div><div class='add'>+Required clocking property, have to be one of:</div><div class='add'>+- clocks	  : The input clock of the timer</div><div class='add'>+- clock-frequency : The rate in HZ in input of the ARM SysTick</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+systick: timer@e000e010 {</div><div class='add'>+	compatible = "arm,armv7m-systick";</div><div class='add'>+	reg = &lt;0xe000e010 0x10&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk_systick&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+systick: timer@e000e010 {</div><div class='add'>+	compatible = "arm,armv7m-systick";</div><div class='add'>+	reg = &lt;0xe000e010 0x10&gt;;</div><div class='add'>+	clock-frequency = &lt;90000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt<br/>index 2e99b5b57350..424ac8cbfa08 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/atmel-at91.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/atmel-at91.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/atmel-at91.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/atmel-at91.txt</a></div><div class='hunk'>@@ -98,7 +98,7 @@ Example:</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> RAMC SDRAM/DDR Controller required properties:</div><div class='del'>-- compatible: Should be "atmel,at91rm9200-sdramc",</div><div class='add'>+- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"</div><div class='ctx'> 			"atmel,at91sam9260-sdramc",</div><div class='ctx'> 			"atmel,at91sam9g45-ddramc",</div><div class='ctx'> 			"atmel,sama5d3-ddramc",</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt<br/>index ac683480c486..c78576bb7729 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt</a></div><div class='hunk'>@@ -1,8 +1,35 @@</div><div class='ctx'> Broadcom BCM2835 device tree bindings</div><div class='ctx'> -------------------------------------------</div><div class='ctx'> </div><div class='del'>-Boards with the BCM2835 SoC shall have the following properties:</div><div class='add'>+Raspberry Pi Model A</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-a", "brcm,bcm2835";</div><div class='ctx'> </div><div class='del'>-Required root node property:</div><div class='add'>+Raspberry Pi Model A+</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";</div><div class='ctx'> </div><div class='add'>+Raspberry Pi Model B</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-b", "brcm,bcm2835";</div><div class='add'>+</div><div class='add'>+Raspberry Pi Model B (no P5)</div><div class='add'>+early model B with I2C0 rather than I2C1 routed to the expansion header</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835";</div><div class='add'>+</div><div class='add'>+Raspberry Pi Model B rev2</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";</div><div class='add'>+</div><div class='add'>+Raspberry Pi Model B+</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";</div><div class='add'>+</div><div class='add'>+Raspberry Pi Compute Module</div><div class='add'>+Required root node properties:</div><div class='add'>+compatible = "raspberrypi,compute-module", "brcm,bcm2835";</div><div class='add'>+</div><div class='add'>+Generic BCM2835 board</div><div class='add'>+Required root node properties:</div><div class='ctx'> compatible = "brcm,bcm2835";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt<br/>index bd49987a8812..b82b6a0ae6f7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a></div><div class='hunk'>@@ -7,3 +7,79 @@ following properties:</div><div class='ctx'> Required root node property:</div><div class='ctx'> </div><div class='ctx'> compatible: should be "brcm,bcm63138"</div><div class='add'>+</div><div class='add'>+An optional Boot lookup table Device Tree node is required for secondary CPU</div><div class='add'>+initialization as well as a 'resets' phandle to the correct PMB controller as</div><div class='add'>+defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an</div><div class='add'>+'enable-method' property.</div><div class='add'>+</div><div class='add'>+Required properties for the Boot lookup table node:</div><div class='add'>+- compatible: should be "brcm,bcm63138-bootlut"</div><div class='add'>+- reg: register base address and length for the Boot Lookup table</div><div class='add'>+</div><div class='add'>+Optional properties for the primary CPU node:</div><div class='add'>+- enable-method: should be "brcm,bcm63138"</div><div class='add'>+</div><div class='add'>+Optional properties for the secondary CPU node:</div><div class='add'>+- enable-method: should be "brcm,bcm63138"</div><div class='add'>+- resets: phandle to the relevant PMB controller, one integer indicating the internal</div><div class='add'>+  bus number, and a second integer indicating the address of the CPU in the PMB</div><div class='add'>+  internal bus number.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cotex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			...</div><div class='add'>+			enable-method = "brcm,bcm63138";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			...</div><div class='add'>+			enable-method = "brcm,bcm63138";</div><div class='add'>+			resets = &lt;&amp;pmb0 4 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bootlut: bootlut@8000 {</div><div class='add'>+		compatible = "brcm,bcm63138-bootlut";</div><div class='add'>+		reg = &lt;0x8000 0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+=======</div><div class='add'>+reboot</div><div class='add'>+------</div><div class='add'>+Two nodes are required for software reboot: a timer node and a syscon-reboot node.</div><div class='add'>+</div><div class='add'>+Timer node:</div><div class='add'>+</div><div class='add'>+- compatible: Must be "brcm,bcm6328-timer", "syscon"</div><div class='add'>+- reg: Register base address and length</div><div class='add'>+</div><div class='add'>+Syscon reboot node:</div><div class='add'>+</div><div class='add'>+See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the</div><div class='add'>+detailed list of properties, the two values defined below are specific to the</div><div class='add'>+BCM6328-style timer:</div><div class='add'>+</div><div class='add'>+- offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register</div><div class='add'>+  from the beginning of the TIMER block</div><div class='add'>+- mask: Should be 1 for the SoftRst bit.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	timer: timer@80 {</div><div class='add'>+		compatible = "brcm,bcm6328-timer", "syscon";</div><div class='add'>+		reg = &lt;0x80 0x3c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reboot {</div><div class='add'>+		compatible = "syscon-reboot";</div><div class='add'>+		regmap = &lt;&amp;timer&gt;;</div><div class='add'>+		offset = &lt;0x34&gt;;</div><div class='add'>+		mask = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cci.txt b/Documentation/devicetree/bindings/arm/cci.txt<br/>index 3c5c631328d3..aef1d200a9b2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/cci.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/cci.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/cci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/cci.txt</a></div><div class='hunk'>@@ -31,8 +31,9 @@ specific to ARM.</div><div class='ctx'> 	- compatible</div><div class='ctx'> 		Usage: required</div><div class='ctx'> 		Value type: &lt;string&gt;</div><div class='del'>-		Definition: must be set to</div><div class='add'>+		Definition: must contain one of the following:</div><div class='ctx'> 			    "arm,cci-400"</div><div class='add'>+			    "arm,cci-500"</div><div class='ctx'> </div><div class='ctx'> 	- reg</div><div class='ctx'> 		Usage: required</div><div class='hunk'>@@ -99,6 +100,7 @@ specific to ARM.</div><div class='ctx'> 				 "arm,cci-400-pmu,r1"</div><div class='ctx'> 				 "arm,cci-400-pmu"  - DEPRECATED, permitted only where OS has</div><div class='ctx'> 						      secure acces to CCI registers</div><div class='add'>+				 "arm,cci-500-pmu,r0"</div><div class='ctx'> 		- reg:</div><div class='ctx'> 			Usage: required</div><div class='ctx'> 			Value type: Integer cells. A register entry, expressed</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt<br/>index 88602b75418e..65a6db2271a2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/coresight.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/coresight.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/coresight.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/coresight.txt</a></div><div class='hunk'>@@ -17,15 +17,19 @@ its hardware characteristcs.</div><div class='ctx'> 		- "arm,coresight-tmc", "arm,primecell";</div><div class='ctx'> 		- "arm,coresight-funnel", "arm,primecell";</div><div class='ctx'> 		- "arm,coresight-etm3x", "arm,primecell";</div><div class='add'>+		- "qcom,coresight-replicator1x", "arm,primecell";</div><div class='ctx'> </div><div class='ctx'> 	* reg: physical base address and length of the register</div><div class='ctx'> 	  set(s) of the component.</div><div class='ctx'> </div><div class='del'>-	* clocks: the clock associated to this component.</div><div class='add'>+	* clocks: the clocks associated to this component.</div><div class='ctx'> </div><div class='del'>-	* clock-names: the name of the clock as referenced by the code.</div><div class='del'>-	  Since we are using the AMBA framework, the name should be</div><div class='del'>-	  "apb_pclk".</div><div class='add'>+	* clock-names: the name of the clocks referenced by the code.</div><div class='add'>+	  Since we are using the AMBA framework, the name of the clock</div><div class='add'>+	  providing the interconnect should be "apb_pclk", and some</div><div class='add'>+	  coresight blocks also have an additional clock "atclk", which</div><div class='add'>+	  clocks the core of that coresight component. The latter clock</div><div class='add'>+	  is optional.</div><div class='ctx'> </div><div class='ctx'> 	* port or ports: The representation of the component's port</div><div class='ctx'> 	  layout using the generic DT graph presentation found in</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt<br/>index 6aa331d11c5e..d6b794cef0b8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/cpus.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/cpus.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/cpus.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/cpus.txt</a></div><div class='hunk'>@@ -188,6 +188,7 @@ nodes to be present and contain the properties described below.</div><div class='ctx'> 			# On ARM 32-bit systems this property is optional and</div><div class='ctx'> 			  can be one of:</div><div class='ctx'> 			    "allwinner,sun6i-a31"</div><div class='add'>+			    "allwinner,sun8i-a23"</div><div class='ctx'> 			    "arm,psci"</div><div class='ctx'> 			    "brcm,brahma-b15"</div><div class='ctx'> 			    "marvell,armada-375-smp"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt<br/>index 5da38c5ed476..e151057d92f0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/exynos/power_domain.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/exynos/power_domain.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/exynos/power_domain.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/exynos/power_domain.txt</a></div><div class='hunk'>@@ -19,9 +19,10 @@ Optional Properties:</div><div class='ctx'> 	domains.</div><div class='ctx'> - clock-names: The following clocks can be specified:</div><div class='ctx'> 	- oscclk: Oscillator clock.</div><div class='del'>-	- pclkN, clkN: Pairs of parent of input clock and input clock to the</div><div class='del'>-		devices in this power domain. Maximum of 4 pairs (N = 0 to 3)</div><div class='del'>-		are supported currently.</div><div class='add'>+	- clkN: Input clocks to the devices in this power domain. These clocks</div><div class='add'>+		will be reparented to oscclk before swithing power domain off.</div><div class='add'>+		Their original parent will be brought back after turning on</div><div class='add'>+		the domain. Maximum of 4 clocks (N = 0 to 3) are supported.</div><div class='ctx'> 	- asbN: Clocks required by asynchronous bridges (ASB) present in</div><div class='ctx'> 		the power domain. These clock should be enabled during power</div><div class='ctx'> 		domain on/off operations.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt<br/>index a5462b6b3c30..2a3ba73f0c5c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/fsl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/fsl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/fsl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/fsl.txt</a></div><div class='hunk'>@@ -81,12 +81,15 @@ Freescale Vybrid Platform Device Tree Bindings</div><div class='ctx'> For the Vybrid SoC familiy all variants with DDR controller are supported,</div><div class='ctx'> which is the VF5xx and VF6xx series. Out of historical reasons, in most</div><div class='ctx'> places the kernel uses vf610 to refer to the whole familiy.</div><div class='add'>+The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4</div><div class='add'>+core support.</div><div class='ctx'> </div><div class='ctx'> Required root node compatible property (one of them):</div><div class='ctx'>     - compatible = "fsl,vf500";</div><div class='ctx'>     - compatible = "fsl,vf510";</div><div class='ctx'>     - compatible = "fsl,vf600";</div><div class='ctx'>     - compatible = "fsl,vf610";</div><div class='add'>+    - compatible = "fsl,vf610m4";</div><div class='ctx'> </div><div class='ctx'> Freescale LS1021A Platform Device Tree Bindings</div><div class='ctx'> ------------------------------------------------</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt<br/>index 35b1bd49cfa1..c431c67524d6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt</a></div><div class='hunk'>@@ -1,5 +1,8 @@</div><div class='ctx'> Hisilicon Platforms Device Tree Bindings</div><div class='ctx'> ----------------------------------------------------</div><div class='add'>+Hi6220 SoC</div><div class='add'>+Required root node properties:</div><div class='add'>+	- compatible = "hisilicon,hi6220";</div><div class='ctx'> </div><div class='ctx'> Hi4511 Board</div><div class='ctx'> Required root node properties:</div><div class='hunk'>@@ -13,6 +16,9 @@ HiP01 ca9x2 Board</div><div class='ctx'> Required root node properties:</div><div class='ctx'> 	- compatible = "hisilicon,hip01-ca9x2";</div><div class='ctx'> </div><div class='add'>+HiKey Board</div><div class='add'>+Required root node properties:</div><div class='add'>+	- compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";</div><div class='ctx'> </div><div class='ctx'> Hisilicon system controller</div><div class='ctx'> </div><div class='hunk'>@@ -41,6 +47,87 @@ Example:</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> -----------------------------------------------------------------------</div><div class='add'>+Hisilicon Hi6220 system controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "hisilicon,hi6220-sysctrl"</div><div class='add'>+- reg : Register address and size</div><div class='add'>+- #clock-cells: should be set to 1, many clock registers are defined</div><div class='add'>+  under this controller and this property must be present.</div><div class='add'>+</div><div class='add'>+Hisilicon designs this controller as one of the system controllers,</div><div class='add'>+its main functions are the same as Hisilicon system controller, but</div><div class='add'>+the register offset of some core modules are different.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	/*for Hi6220*/</div><div class='add'>+	sys_ctrl: sys_ctrl@f7030000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-sysctrl", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xf7030000 0x0 0x2000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Hisilicon Hi6220 Power Always ON domain controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "hisilicon,hi6220-aoctrl"</div><div class='add'>+- reg : Register address and size</div><div class='add'>+- #clock-cells: should be set to 1, many clock registers are defined</div><div class='add'>+  under this controller and this property must be present.</div><div class='add'>+</div><div class='add'>+Hisilicon designs this system controller to control the power always</div><div class='add'>+on domain for mobile platform.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	/*for Hi6220*/</div><div class='add'>+	ao_ctrl: ao_ctrl@f7800000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-aoctrl", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xf7800000 0x0 0x2000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Hisilicon Hi6220 Media domain controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "hisilicon,hi6220-mediactrl"</div><div class='add'>+- reg : Register address and size</div><div class='add'>+- #clock-cells: should be set to 1, many clock registers are defined</div><div class='add'>+  under this controller and this property must be present.</div><div class='add'>+</div><div class='add'>+Hisilicon designs this system controller to control the multimedia</div><div class='add'>+domain(e.g. codec, G3D ...) for mobile platform.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	/*for Hi6220*/</div><div class='add'>+	media_ctrl: media_ctrl@f4410000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-mediactrl", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xf4410000 0x0 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Hisilicon Hi6220 Power Management domain controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "hisilicon,hi6220-pmctrl"</div><div class='add'>+- reg : Register address and size</div><div class='add'>+- #clock-cells: should be set to 1, some clock registers are define</div><div class='add'>+  under this controller and this property must be present.</div><div class='add'>+</div><div class='add'>+Hisilicon designs this system controller to control the power management</div><div class='add'>+domain for mobile platform.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	/*for Hi6220*/</div><div class='add'>+	pm_ctrl: pm_ctrl@f7032000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-pmctrl", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xf7032000 0x0 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+-----------------------------------------------------------------------</div><div class='ctx'> Hisilicon HiP01 system controller</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt<br/>index 0dbabe9a6b0a..2251dccb141e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/l2cc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/l2cc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/l2cc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/l2cc.txt</a></div><div class='hunk'>@@ -67,6 +67,11 @@ Optional properties:</div><div class='ctx'>   disable if zero.</div><div class='ctx'> - arm,prefetch-offset : Override prefetch offset value. Valid values are</div><div class='ctx'>   0-7, 15, 23, and 31.</div><div class='add'>+- prefetch-data : Data prefetch. Value: &lt;0&gt; (forcibly disable), &lt;1&gt;</div><div class='add'>+  (forcibly enable), property absent (retain settings set by firmware)</div><div class='add'>+- prefetch-instr : Instruction prefetch. Value: &lt;0&gt; (forcibly disable),</div><div class='add'>+  &lt;1&gt; (forcibly enable), property absent (retain settings set by</div><div class='add'>+  firmware)</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt<br/>index a99eb9eb14c0..3bab18409b7a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/marvell,berlin.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/marvell,berlin.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/marvell,berlin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/marvell,berlin.txt</a></div><div class='hunk'>@@ -1,6 +1,18 @@</div><div class='ctx'> Marvell Berlin SoC Family Device Tree Bindings</div><div class='ctx'> ---------------------------------------------------------------</div><div class='ctx'> </div><div class='add'>+Work in progress statement:</div><div class='add'>+</div><div class='add'>+Device tree files and bindings applying to Marvell Berlin SoCs and boards are</div><div class='add'>+considered "unstable". Any Marvell Berlin device tree binding may change at any</div><div class='add'>+time. Be sure to use a device tree binary and a kernel image generated from the</div><div class='add'>+same source tree.</div><div class='add'>+</div><div class='add'>+Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a</div><div class='add'>+stable binding/ABI.</div><div class='add'>+</div><div class='add'>+---------------------------------------------------------------</div><div class='add'>+</div><div class='ctx'> Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500</div><div class='ctx'> shall have the following properties:</div><div class='ctx'> </div><div class='hunk'>@@ -49,10 +61,9 @@ chip control registers, so there should be a single DT node only providing the</div><div class='ctx'> different functions which are described below.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: shall be one of</div><div class='del'>-	"marvell,berlin2-chip-ctrl" for BG2</div><div class='del'>-	"marvell,berlin2cd-chip-ctrl" for BG2CD</div><div class='del'>-	"marvell,berlin2q-chip-ctrl" for BG2Q</div><div class='add'>+- compatible:</div><div class='add'>+	* the first and second values must be:</div><div class='add'>+		"simple-mfd", "syscon"</div><div class='ctx'> - reg: address and length of following register sets for</div><div class='ctx'>   BG2/BG2CD: chip control register set</div><div class='ctx'>   BG2Q: chip control register set and cpu pll registers</div><div class='hunk'>@@ -63,90 +74,23 @@ Marvell Berlin SoCs have a system control register set providing several</div><div class='ctx'> individual registers dealing with pinmux, padmux, and reset.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: should be one of</div><div class='del'>-	"marvell,berlin2-system-ctrl" for BG2</div><div class='del'>-	"marvell,berlin2cd-system-ctrl" for BG2CD</div><div class='del'>-	"marvell,berlin2q-system-ctrl" for BG2Q</div><div class='add'>+- compatible:</div><div class='add'>+	* the first and second values must be:</div><div class='add'>+		"simple-mfd", "syscon"</div><div class='ctx'> - reg: address and length of the system control register set</div><div class='ctx'> </div><div class='del'>-* Clock provider binding</div><div class='del'>-</div><div class='del'>-As clock related registers are spread among the chip control registers, the</div><div class='del'>-chip control node also provides the clocks. Marvell Berlin2 (BG2, BG2CD, BG2Q)</div><div class='del'>-SoCs share the same IP for PLLs and clocks, with some minor differences in</div><div class='del'>-features and register layout.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #clock-cells: shall be set to 1</div><div class='del'>-- clocks: clock specifiers referencing the core clock input clocks</div><div class='del'>-- clock-names: array of strings describing the input clock specifiers above.</div><div class='del'>-    Allowed clock-names for the reference clocks are</div><div class='del'>-      "refclk" for the SoCs osciallator input on all SoCs,</div><div class='del'>-    and SoC-specific input clocks for</div><div class='del'>-      BG2/BG2CD: "video_ext0" for the external video clock input</div><div class='del'>-</div><div class='del'>-Clocks provided by core clocks shall be referenced by a clock specifier</div><div class='del'>-indexing one of the provided clocks. Refer to dt-bindings/clock/berlin&lt;soc&gt;.h</div><div class='del'>-for the corresponding index mapping.</div><div class='del'>-</div><div class='del'>-* Pin controller binding</div><div class='del'>-</div><div class='del'>-Pin control registers are part of both register sets, chip control and system</div><div class='del'>-control. The pins controlled are organized in groups, so no actual pin</div><div class='del'>-information is needed.</div><div class='del'>-</div><div class='del'>-A pin-controller node should contain subnodes representing the pin group</div><div class='del'>-configurations, one per function. Each subnode has the group name and the muxing</div><div class='del'>-function used.</div><div class='del'>-</div><div class='del'>-Be aware the Marvell Berlin datasheets use the keyword 'mode' for what is called</div><div class='del'>-a 'function' in the pin-controller subsystem.</div><div class='del'>-</div><div class='del'>-Required subnode-properties:</div><div class='del'>-- groups: a list of strings describing the group names.</div><div class='del'>-- function: a string describing the function used to mux the groups.</div><div class='del'>-</div><div class='del'>-* Reset controller binding</div><div class='del'>-</div><div class='del'>-A reset controller is part of the chip control registers set. The chip control</div><div class='del'>-node also provides the reset. The register set is not at the same offset between</div><div class='del'>-Berlin SoCs.</div><div class='del'>-</div><div class='del'>-Required property:</div><div class='del'>-- #reset-cells: must be set to 2</div><div class='del'>-</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> chip: chip-control@ea0000 {</div><div class='del'>-	compatible = "marvell,berlin2-chip-ctrl";</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-	#reset-cells = &lt;2&gt;;</div><div class='add'>+	compatible = "simple-mfd", "syscon";</div><div class='ctx'> 	reg = &lt;0xea0000 0x400&gt;;</div><div class='del'>-	clocks = &lt;&amp;refclk&gt;, &lt;&amp;externaldev 0&gt;;</div><div class='del'>-	clock-names = "refclk", "video_ext0";</div><div class='ctx'> </div><div class='del'>-	spi1_pmux: spi1-pmux {</div><div class='del'>-		groups = "G0";</div><div class='del'>-		function = "spi1";</div><div class='del'>-	};</div><div class='add'>+	/* sub-device nodes */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> sysctrl: system-controller@d000 {</div><div class='del'>-	compatible = "marvell,berlin2-system-ctrl";</div><div class='add'>+	compatible = "simple-mfd", "syscon";</div><div class='ctx'> 	reg = &lt;0xd000 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-	uart0_pmux: uart0-pmux {</div><div class='del'>-		groups = "GSM4";</div><div class='del'>-		function = "uart0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart1_pmux: uart1-pmux {</div><div class='del'>-		groups = "GSM5";</div><div class='del'>-		function = "uart1";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart2_pmux: uart2-pmux {</div><div class='del'>-		groups = "GSM3";</div><div class='del'>-		function = "uart2";</div><div class='del'>-	};</div><div class='add'>+	/* sub-device nodes */</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt<br/>new file mode 100644<br/>index 000000000000..936166fbee09<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+Mediatek apmixedsys controller</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+The Mediatek apmixedsys controller provides the PLLs to the system.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: Should be:</div><div class='add'>+	- "mediatek,mt8135-apmixedsys"</div><div class='add'>+	- "mediatek,mt8173-apmixedsys"</div><div class='add'>+- #clock-cells: Must be 1</div><div class='add'>+</div><div class='add'>+The apmixedsys controller uses the common clk binding from</div><div class='add'>+Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+apmixedsys: clock-controller@10209000 {</div><div class='add'>+	compatible = "mediatek,mt8173-apmixedsys";</div><div class='add'>+	reg = &lt;0 0x10209000 0 0x1000&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt<br/>new file mode 100644<br/>index 000000000000..f6cd3e4192ff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+Mediatek infracfg controller</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+The Mediatek infracfg controller provides various clocks and reset</div><div class='add'>+outputs to the system.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: Should be:</div><div class='add'>+	- "mediatek,mt8135-infracfg", "syscon"</div><div class='add'>+	- "mediatek,mt8173-infracfg", "syscon"</div><div class='add'>+- #clock-cells: Must be 1</div><div class='add'>+- #reset-cells: Must be 1</div><div class='add'>+</div><div class='add'>+The infracfg controller uses the common clk binding from</div><div class='add'>+Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='add'>+Also it uses the common reset controller binding from</div><div class='add'>+Documentation/devicetree/bindings/reset/reset.txt.</div><div class='add'>+The available reset outputs are defined in</div><div class='add'>+dt-bindings/reset-controller/mt*-resets.h</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+infracfg: power-controller@10001000 {</div><div class='add'>+	compatible = "mediatek,mt8173-infracfg", "syscon";</div><div class='add'>+	reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+	#reset-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt<br/>new file mode 100644<br/>index 000000000000..f25b85499a6f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+Mediatek pericfg controller</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+The Mediatek pericfg controller provides various clocks and reset</div><div class='add'>+outputs to the system.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: Should be:</div><div class='add'>+	- "mediatek,mt8135-pericfg", "syscon"</div><div class='add'>+	- "mediatek,mt8173-pericfg", "syscon"</div><div class='add'>+- #clock-cells: Must be 1</div><div class='add'>+- #reset-cells: Must be 1</div><div class='add'>+</div><div class='add'>+The pericfg controller uses the common clk binding from</div><div class='add'>+Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='add'>+Also it uses the common reset controller binding from</div><div class='add'>+Documentation/devicetree/bindings/reset/reset.txt.</div><div class='add'>+The available reset outputs are defined in</div><div class='add'>+dt-bindings/reset-controller/mt*-resets.h</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+pericfg: power-controller@10003000 {</div><div class='add'>+	compatible = "mediatek,mt8173-pericfg", "syscon";</div><div class='add'>+	reg = &lt;0 0x10003000 0 0x1000&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+	#reset-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt<br/>new file mode 100644<br/>index 000000000000..f9e917994ced<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+Mediatek topckgen controller</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+The Mediatek topckgen controller provides various clocks to the system.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: Should be:</div><div class='add'>+	- "mediatek,mt8135-topckgen"</div><div class='add'>+	- "mediatek,mt8173-topckgen"</div><div class='add'>+- #clock-cells: Must be 1</div><div class='add'>+</div><div class='add'>+The topckgen controller uses the common clk binding from</div><div class='add'>+Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+topckgen: power-controller@10000000 {</div><div class='add'>+	compatible = "mediatek,mt8173-topckgen";</div><div class='add'>+	reg = &lt;0 0x10000000 0 0x1000&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/scu.txt b/Documentation/devicetree/bindings/arm/scu.txt<br/>new file mode 100644<br/>index 000000000000..c447680519bb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/scu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/scu.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* ARM Snoop Control Unit (SCU)</div><div class='add'>+</div><div class='add'>+As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided</div><div class='add'>+with a Snoop Control Unit. The register range is usually 256 (0x100)</div><div class='add'>+bytes.</div><div class='add'>+</div><div class='add'>+References:</div><div class='add'>+</div><div class='add'>+- Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual</div><div class='add'>+  Revision r2p0</div><div class='add'>+- Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual</div><div class='add'>+  Revision r0p1</div><div class='add'>+</div><div class='add'>+- compatible : Should be:</div><div class='add'>+	"arm,cortex-a9-scu"</div><div class='add'>+	"arm,cortex-a5-scu"</div><div class='add'>+</div><div class='add'>+- reg : Specify the base address and the size of the SCU register window.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+scu@a04100000 {</div><div class='add'>+	compatible = "arm,cortex-a9-scu";</div><div class='add'>+	reg = &lt;0xa0410000 0x100&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt<br/>index 42941fdefb11..67da20539540 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/sunxi.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/arm/sunxi.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/sunxi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/sunxi.txt</a></div><div class='hunk'>@@ -9,4 +9,6 @@ using one of the following compatible strings:</div><div class='ctx'>   allwinner,sun6i-a31</div><div class='ctx'>   allwinner,sun7i-a20</div><div class='ctx'>   allwinner,sun8i-a23</div><div class='add'>+  allwinner,sun8i-a33</div><div class='add'>+  allwinner,sun8i-h3</div><div class='ctx'>   allwinner,sun9i-a80</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/ux500/boards.txt b/Documentation/devicetree/bindings/arm/ux500/boards.txt<br/>new file mode 100644<br/>index 000000000000..b8737a8de718<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/ux500/boards.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/ux500/boards.txt</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+ST-Ericsson Ux500 boards</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Required properties (in root node) one of these:</div><div class='add'>+	compatible = "st-ericsson,mop500" (legacy)</div><div class='add'>+	compatible = "st-ericsson,u8500"</div><div class='add'>+</div><div class='add'>+Required node (under root node):</div><div class='add'>+</div><div class='add'>+soc: represents the system-on-chip and contains the chip</div><div class='add'>+peripherals</div><div class='add'>+</div><div class='add'>+Required property of soc node, one of these:</div><div class='add'>+	compatible = "stericsson,db8500"</div><div class='add'>+</div><div class='add'>+Required subnodes under soc node:</div><div class='add'>+</div><div class='add'>+backupram: (used for CPU spin tables and for storing data</div><div class='add'>+during retention, system won't boot without this):</div><div class='add'>+	compatible = "ste,dbx500-backupram"</div><div class='add'>+</div><div class='add'>+scu:</div><div class='add'>+	see binding for arm/scu.txt</div><div class='add'>+</div><div class='add'>+interrupt-controller:</div><div class='add'>+	see binding for arm/gic.txt</div><div class='add'>+</div><div class='add'>+timer:</div><div class='add'>+	see binding for arm/twd.txt</div><div class='add'>+</div><div class='add'>+clocks:</div><div class='add'>+	see binding for clocks/ux500.txt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+        model = "ST-Ericsson HREF (pre-v60) and ST UIB";</div><div class='add'>+        compatible = "st-ericsson,mop500", "st-ericsson,u8500";</div><div class='add'>+</div><div class='add'>+        soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "stericsson,db8500";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		backupram@80150000 {</div><div class='add'>+			compatible = "ste,dbx500-backupram";</div><div class='add'>+			reg = &lt;0x80150000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@a0411000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0xa0411000 0x1000&gt;,</div><div class='add'>+			      &lt;0xa0410100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scu@a04100000 {</div><div class='add'>+			compatible = "arm,cortex-a9-scu";</div><div class='add'>+			reg = &lt;0xa0410000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@a0410600 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+			reg = &lt;0xa0410600 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 13 0x304&gt;; /* IRQ level high per-CPU */</div><div class='add'>+			clocks = &lt;&amp;smp_twd_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clocks {</div><div class='add'>+			compatible = "stericsson,u8500-clks";</div><div class='add'>+</div><div class='add'>+			smp_twd_clk: smp-twd-clock {</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+        };</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/zte.txt b/Documentation/devicetree/bindings/arm/zte.txt<br/>new file mode 100644<br/>index 000000000000..3ff5c9e85c1c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/zte.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/arm/zte.txt</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+ZTE platforms device tree bindings</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+-  ZX296702 board:</div><div class='add'>+    Required root node properties:</div><div class='add'>+      - compatible = "zte,zx296702-ad1", "zte,zx296702"</div><div class='add'>+</div><div class='add'>+System management required properties:</div><div class='add'>+      - compatible = "zte,sysctrl"</div><div class='add'>+</div><div class='add'>+Low power management required properties:</div><div class='add'>+      - compatible = "zte,zx296702-pcu"</div><div class='add'>+</div><div class='add'>+Bus matrix required properties:</div><div class='add'>+      - compatible = "zte,zx-bus-matrix"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt<br/>new file mode 100644<br/>index 000000000000..7ca8b976c13a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/ahci-ceva.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/ahci-ceva.txt</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+Binding for CEVA AHCI SATA Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - reg: Physical base address and size of the controller's register area.</div><div class='add'>+  - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.</div><div class='add'>+  - clocks: Input clock specifier. Refer to common clock bindings.</div><div class='add'>+  - interrupts: Interrupt specifier. Refer to interrupt binding.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+  - ceva,broken-gen2: limit to gen1 speed instead of gen2.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+	ahci@fd0c0000 {</div><div class='add'>+		compatible = "ceva,ahci-1v84";</div><div class='add'>+		reg = &lt;0xfd0c0000 0x200&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;0 133 4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc SATA_CLK_ID&gt;;</div><div class='add'>+		ceva,broken-gen2;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt<br/>index c2340eeeb97f..a2321819e7f5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/ahci-platform.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/ata/ahci-platform.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/ahci-platform.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/ahci-platform.txt</a></div><div class='hunk'>@@ -16,6 +16,8 @@ Required properties:</div><div class='ctx'>   - "snps,dwc-ahci"</div><div class='ctx'>   - "snps,exynos5440-ahci"</div><div class='ctx'>   - "snps,spear-ahci"</div><div class='add'>+  - "fsl,qoriq-ahci" : for qoriq series socs which include ls1021, ls2085, etc.</div><div class='add'>+  - "fsl,&lt;chip&gt;-ahci" : chip could be ls1021, ls2085 etc.</div><div class='ctx'>   - "generic-ahci"</div><div class='ctx'> - interrupts        : &lt;interrupt mapping for SATA IRQ&gt;</div><div class='ctx'> - reg               : &lt;registers mapping&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt b/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt<br/>new file mode 100644<br/>index 000000000000..20ac9bbfa1fd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+* Broadcom SATA3 AHCI Controller for STB</div><div class='add'>+</div><div class='add'>+SATA nodes are defined to describe on-chip Serial ATA controllers.</div><div class='add'>+Each SATA controller should have its own node.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible         : compatible list, may contain "brcm,bcm7445-ahci" and/or</div><div class='add'>+                       "brcm,sata3-ahci"</div><div class='add'>+- reg                : register mappings for AHCI and SATA_TOP_CTRL</div><div class='add'>+- reg-names          : "ahci" and "top-ctrl"</div><div class='add'>+- interrupts         : interrupt mapping for SATA IRQ</div><div class='add'>+</div><div class='add'>+Also see ahci-platform.txt.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	sata@f045a000 {</div><div class='add'>+		compatible = "brcm,bcm7445-ahci", "brcm,sata3-ahci";</div><div class='add'>+		reg = &lt;0xf045a000 0xa9c&gt;, &lt;0xf0458040 0x24&gt;;</div><div class='add'>+		reg-names = "ahci", "top-ctrl";</div><div class='add'>+		interrupts = &lt;0 30 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sata0: sata-port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			phys = &lt;&amp;sata_phy 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata1: sata-port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			phys = &lt;&amp;sata_phy 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt<br/>new file mode 100644<br/>index 000000000000..2b7b3fa588d7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+* Amlogic Meson8b Clock and Reset Unit</div><div class='add'>+</div><div class='add'>+The Amlogic Meson8b clock controller generates and supplies clock to various</div><div class='add'>+controllers within the SoC.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: should be "amlogic,meson8b-clkc"</div><div class='add'>+- reg: it must be composed by two tuples:</div><div class='add'>+	0) physical base address of the xtal register and length of memory</div><div class='add'>+	   mapped region.</div><div class='add'>+	1) physical base address of the clock controller and length of memory</div><div class='add'>+	   mapped region.</div><div class='add'>+</div><div class='add'>+- #clock-cells: should be 1.</div><div class='add'>+</div><div class='add'>+Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be</div><div class='add'>+used in device tree sources.</div><div class='add'>+</div><div class='add'>+Example: Clock controller node:</div><div class='add'>+</div><div class='add'>+	clkc: clock-controller@c1104000 {</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "amlogic,meson8b-clkc";</div><div class='add'>+		reg = &lt;0xc1108000 0x4&gt;, &lt;0xc1104000 0x460&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example: UART controller node that consumes the clock generated by the clock</div><div class='add'>+  controller:</div><div class='add'>+</div><div class='add'>+	uart_AO: serial@c81004c0 {</div><div class='add'>+		compatible = "amlogic,meson-uart";</div><div class='add'>+		reg = &lt;0xc81004c0 0x14&gt;;</div><div class='add'>+		interrupts = &lt;0 90 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc CLKID_CLK81&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt<br/>index 7a4d4926f44e..5ba6450693b9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/at91-clock.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/at91-clock.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/at91-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/at91-clock.txt</a></div><div class='hunk'>@@ -248,7 +248,7 @@ Required properties for peripheral clocks:</div><div class='ctx'> - #address-cells : shall be 1 (reg is used to encode clk id).</div><div class='ctx'> - clocks : shall be the master clock phandle.</div><div class='ctx'> 	e.g. clocks = &lt;&amp;mck&gt;;</div><div class='del'>-- name: device tree node describing a specific system clock.</div><div class='add'>+- name: device tree node describing a specific peripheral clock.</div><div class='ctx'> 	* #clock-cells : from common clock binding; shall be set to 0.</div><div class='ctx'> 	* reg: peripheral id. See Atmel's datasheets to get a full</div><div class='ctx'> 	  list of peripheral ids.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt b/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt<br/>deleted file mode 100644<br/>index 00d26edec8bc..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-Broadcom Cygnus Clocks</div><div class='del'>-</div><div class='del'>-This binding uses the common clock binding:</div><div class='del'>-Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-</div><div class='del'>-Currently various "fixed" clocks are declared for peripheral drivers that use</div><div class='del'>-the common clock framework to reference their core clocks. Proper support of</div><div class='del'>-these clocks will be added later</div><div class='del'>-</div><div class='del'>-Device tree example:</div><div class='del'>-</div><div class='del'>-	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		osc: oscillator {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			clock-frequency = &lt;25000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb_clk: apb_clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;1000000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		periph_clk: periph_clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;500000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt<br/>new file mode 100644<br/>index 000000000000..da8d9bb5751c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+Broadcom iProc Family Clocks</div><div class='add'>+</div><div class='add'>+This binding uses the common clock binding:</div><div class='add'>+    Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+</div><div class='add'>+The iProc clock controller manages clocks that are common to the iProc family.</div><div class='add'>+An SoC from the iProc family may have several PPLs, e.g., ARMPLL, GENPLL,</div><div class='add'>+LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL</div><div class='add'>+comprises of several leaf clocks</div><div class='add'>+</div><div class='add'>+Required properties for a PLL and its leaf clocks:</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+    Should have a value of the form "brcm,&lt;soc&gt;-&lt;pll&gt;". For example, GENPLL on</div><div class='add'>+Cygnus has a compatible string of "brcm,cygnus-genpll"</div><div class='add'>+</div><div class='add'>+- #clock-cells:</div><div class='add'>+    Have a value of &lt;1&gt; since there are more than 1 leaf clock of a given PLL</div><div class='add'>+</div><div class='add'>+- reg:</div><div class='add'>+    Define the base and range of the I/O address space that contain the iProc</div><div class='add'>+clock control registers required for the PLL</div><div class='add'>+</div><div class='add'>+- clocks:</div><div class='add'>+    The input parent clock phandle for the PLL. For most iProc PLLs, this is an</div><div class='add'>+onboard crystal with a fixed rate</div><div class='add'>+</div><div class='add'>+- clock-output-names:</div><div class='add'>+    An ordered list of strings defining the names of the clocks</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	osc: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	genpll: genpll {</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,cygnus-genpll";</div><div class='add'>+		reg = &lt;0x0301d000 0x2c&gt;, &lt;0x0301c020 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;osc&gt;;</div><div class='add'>+		clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",</div><div class='add'>+				     "enet_sw", "audio_125", "can";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Required properties for ASIU clocks:</div><div class='add'>+</div><div class='add'>+ASIU clocks are a special case. These clocks are derived directly from the</div><div class='add'>+reference clock of the onboard crystal</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+    Should have a value of the form "brcm,&lt;soc&gt;-asiu-clk". For example, ASIU</div><div class='add'>+clocks for Cygnus have a compatible string of "brcm,cygnus-asiu-clk"</div><div class='add'>+</div><div class='add'>+- #clock-cells:</div><div class='add'>+    Have a value of &lt;1&gt; since there are more than 1 ASIU clocks</div><div class='add'>+</div><div class='add'>+- reg:</div><div class='add'>+    Define the base and range of the I/O address space that contain the iProc</div><div class='add'>+clock control registers required for ASIU clocks</div><div class='add'>+</div><div class='add'>+- clocks:</div><div class='add'>+    The input parent clock phandle for the ASIU clock, i.e., the onboard</div><div class='add'>+crystal</div><div class='add'>+</div><div class='add'>+- clock-output-names:</div><div class='add'>+    An ordered list of strings defining the names of the ASIU clocks</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	osc: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	asiu_clks: asiu_clks {</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,cygnus-asiu-clk";</div><div class='add'>+		reg = &lt;0x0301d048 0xc&gt;, &lt;0x180aa024 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;osc&gt;;</div><div class='add'>+		clock-output-names = "keypad", "adc/touch", "pwm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Cygnus</div><div class='add'>+------</div><div class='add'>+PLL and leaf clock compatible strings for Cygnus are:</div><div class='add'>+    "brcm,cygnus-armpll"</div><div class='add'>+    "brcm,cygnus-genpll"</div><div class='add'>+    "brcm,cygnus-lcpll0"</div><div class='add'>+    "brcm,cygnus-mipipll"</div><div class='add'>+    "brcm,cygnus-asiu-clk"</div><div class='add'>+</div><div class='add'>+The following table defines the set of PLL/clock index and ID for Cygnus.</div><div class='add'>+These clock IDs are defined in:</div><div class='add'>+    "include/dt-bindings/clock/bcm-cygnus.h"</div><div class='add'>+</div><div class='add'>+    Clock      Source (Parent)  Index   ID</div><div class='add'>+    ---        -----            -----   ---------</div><div class='add'>+    crystal    N/A              N/A     N/A</div><div class='add'>+</div><div class='add'>+    armpll     crystal          N/A     N/A</div><div class='add'>+</div><div class='add'>+    keypad     crystal (ASIU)   0       BCM_CYGNUS_ASIU_KEYPAD_CLK</div><div class='add'>+    adc/tsc    crystal (ASIU)   1       BCM_CYGNUS_ASIU_ADC_CLK</div><div class='add'>+    pwm        crystal (ASIU)   2       BCM_CYGNUS_ASIU_PWM_CLK</div><div class='add'>+</div><div class='add'>+    genpll     crystal          0       BCM_CYGNUS_GENPLL</div><div class='add'>+    axi21      genpll           1       BCM_CYGNUS_GENPLL_AXI21_CLK</div><div class='add'>+    250mhz     genpll           2       BCM_CYGNUS_GENPLL_250MHZ_CLK</div><div class='add'>+    ihost_sys  genpll           3       BCM_CYGNUS_GENPLL_IHOST_SYS_CLK</div><div class='add'>+    enet_sw    genpll           4       BCM_CYGNUS_GENPLL_ENET_SW_CLK</div><div class='add'>+    audio_125  genpll           5       BCM_CYGNUS_GENPLL_AUDIO_125_CLK</div><div class='add'>+    can        genpll           6       BCM_CYGNUS_GENPLL_CAN_CLK</div><div class='add'>+</div><div class='add'>+    lcpll0     crystal          0       BCM_CYGNUS_LCPLL0</div><div class='add'>+    pcie_phy   lcpll0           1       BCM_CYGNUS_LCPLL0_PCIE_PHY_REF_CLK</div><div class='add'>+    ddr_phy    lcpll0           2       BCM_CYGNUS_LCPLL0_DDR_PHY_CLK</div><div class='add'>+    sdio       lcpll0           3       BCM_CYGNUS_LCPLL0_SDIO_CLK</div><div class='add'>+    usb_phy    lcpll0           4       BCM_CYGNUS_LCPLL0_USB_PHY_REF_CLK</div><div class='add'>+    smart_card lcpll0           5       BCM_CYGNUS_LCPLL0_SMART_CARD_CLK</div><div class='add'>+    ch5_unused lcpll0           6       BCM_CYGNUS_LCPLL0_CH5_UNUSED</div><div class='add'>+</div><div class='add'>+    mipipll    crystal          0       BCM_CYGNUS_MIPIPLL</div><div class='add'>+    ch0_unused mipipll          1       BCM_CYGNUS_MIPIPLL_CH0_UNUSED</div><div class='add'>+    ch1_lcd    mipipll          2       BCM_CYGNUS_MIPIPLL_CH1_LCD</div><div class='add'>+    ch2_v3d    mipipll          3       BCM_CYGNUS_MIPIPLL_CH2_V3D</div><div class='add'>+    ch3_unused mipipll          4       BCM_CYGNUS_MIPIPLL_CH3_UNUSED</div><div class='add'>+    ch4_unused mipipll          5       BCM_CYGNUS_MIPIPLL_CH4_UNUSED</div><div class='add'>+    ch5_unused mipipll          6       BCM_CYGNUS_MIPIPLL_CH5_UNUSED</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt<br/>index 06fc6d541c89..2ec489eebe72 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/clock-bindings.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/clock-bindings.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a></div><div class='hunk'>@@ -138,9 +138,10 @@ Some platforms may require initial configuration of default parent clocks</div><div class='ctx'> and clock frequencies. Such a configuration can be specified in a device tree</div><div class='ctx'> node through assigned-clocks, assigned-clock-parents and assigned-clock-rates</div><div class='ctx'> properties. The assigned-clock-parents property should contain a list of parent</div><div class='del'>-clocks in form of phandle and clock specifier pairs, the assigned-clock-parents</div><div class='del'>-property the list of assigned clock frequency values - corresponding to clocks</div><div class='del'>-listed in the assigned-clocks property.</div><div class='add'>+clocks in the form of a phandle and clock specifier pair and the</div><div class='add'>+assigned-clock-rates property should contain a list of frequencies in Hz. Both</div><div class='add'>+these properties should correspond to the clocks listed in the assigned-clocks</div><div class='add'>+property.</div><div class='ctx'> </div><div class='ctx'> To skip setting parent or rate of a clock its corresponding entry should be</div><div class='ctx'> set to 0, or can be omitted if it is not followed by any non-zero entry.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/csr,atlas7-car.txt b/Documentation/devicetree/bindings/clock/csr,atlas7-car.txt<br/>new file mode 100644<br/>index 000000000000..54d6d1358339<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/csr,atlas7-car.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/csr,atlas7-car.txt</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+* Clock and reset bindings for CSR atlas7</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "sirf,atlas7-car"</div><div class='add'>+- reg: Address and length of the register set</div><div class='add'>+- #clock-cells: Should be &lt;1&gt;</div><div class='add'>+- #reset-cells: Should be &lt;1&gt;</div><div class='add'>+</div><div class='add'>+The clock consumer should specify the desired clock by having the clock</div><div class='add'>+ID in its "clocks" phandle cell.</div><div class='add'>+The ID list atlas7_clks defined in drivers/clk/sirf/clk-atlas7.c</div><div class='add'>+</div><div class='add'>+The reset consumer should specify the desired reset by having the reset</div><div class='add'>+ID in its "reset" phandle cell.</div><div class='add'>+The ID list atlas7_reset_unit defined in drivers/clk/sirf/clk-atlas7.c</div><div class='add'>+</div><div class='add'>+Examples: Clock and reset controller node:</div><div class='add'>+</div><div class='add'>+car: clock-controller@18620000 {</div><div class='add'>+	compatible = "sirf,atlas7-car";</div><div class='add'>+	reg = &lt;0x18620000 0x1000&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+	#reset-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Examples: Consumers using clock or reset:</div><div class='add'>+</div><div class='add'>+timer@10dc0000 {</div><div class='add'>+	compatible = "sirf,macro-tick";</div><div class='add'>+	reg = &lt;0x10dc0000 0x1000&gt;;</div><div class='add'>+	clocks = &lt;&amp;car 54&gt;;</div><div class='add'>+	interrupts = &lt;0 0 0&gt;,</div><div class='add'>+		   &lt;0 1 0&gt;,</div><div class='add'>+		   &lt;0 2 0&gt;,</div><div class='add'>+		   &lt;0 49 0&gt;,</div><div class='add'>+		   &lt;0 50 0&gt;,</div><div class='add'>+		   &lt;0 51 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+uart1: uart@18020000 {</div><div class='add'>+	cell-index = &lt;1&gt;;</div><div class='add'>+	compatible = "sirf,macro-uart";</div><div class='add'>+	reg = &lt;0x18020000 0x1000&gt;;</div><div class='add'>+	clocks = &lt;&amp;clks 95&gt;;</div><div class='add'>+	interrupts = &lt;0 18 0&gt;;</div><div class='add'>+	fifosize = &lt;32&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+vpp@13110000 {</div><div class='add'>+	compatible = "sirf,prima2-vpp";</div><div class='add'>+	reg = &lt;0x13110000 0x10000&gt;;</div><div class='add'>+	interrupts = &lt;0 31 0&gt;;</div><div class='add'>+	clocks = &lt;&amp;car 85&gt;;</div><div class='add'>+	resets = &lt;&amp;car 29&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/emev2-clock.txt b/Documentation/devicetree/bindings/clock/emev2-clock.txt<br/>index 60bbb1a8c69a..268ca615459e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/emev2-clock.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/emev2-clock.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/emev2-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/emev2-clock.txt</a></div><div class='hunk'>@@ -52,7 +52,7 @@ usia_u0_sclk: usia_u0_sclk {</div><div class='ctx'> </div><div class='ctx'> Example of consumer:</div><div class='ctx'> </div><div class='del'>-uart@e1020000 {</div><div class='add'>+serial@e1020000 {</div><div class='ctx'> 	compatible = "renesas,em-uart";</div><div class='ctx'> 	reg = &lt;0xe1020000 0x38&gt;;</div><div class='ctx'> 	interrupts = &lt;0 8 0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/hi6220-clock.txt b/Documentation/devicetree/bindings/clock/hi6220-clock.txt<br/>new file mode 100644<br/>index 000000000000..259e30af9597<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/hi6220-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/hi6220-clock.txt</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+* Hisilicon Hi6220 Clock Controller</div><div class='add'>+</div><div class='add'>+Clock control registers reside in different Hi6220 system controllers,</div><div class='add'>+please refer the following document to know more about the binding rules</div><div class='add'>+for these system controllers:</div><div class='add'>+</div><div class='add'>+Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: the compatible should be one of the following strings to</div><div class='add'>+	indicate the clock controller functionality.</div><div class='add'>+</div><div class='add'>+	- "hisilicon,hi6220-aoctrl"</div><div class='add'>+	- "hisilicon,hi6220-sysctrl"</div><div class='add'>+	- "hisilicon,hi6220-mediactrl"</div><div class='add'>+	- "hisilicon,hi6220-pmctrl"</div><div class='add'>+</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+</div><div class='add'>+- #clock-cells: should be 1.</div><div class='add'>+</div><div class='add'>+For example:</div><div class='add'>+	sys_ctrl: sys_ctrl@f7030000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-sysctrl", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xf7030000 0x0 0x2000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Each clock is assigned an identifier and client nodes use this identifier</div><div class='add'>+to specify the clock which they consume.</div><div class='add'>+</div><div class='add'>+All these identifier could be found in &lt;dt-bindings/clock/hi6220-clock.h&gt;.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx7d-clock.txt b/Documentation/devicetree/bindings/clock/imx7d-clock.txt<br/>new file mode 100644<br/>index 000000000000..9d3026d81a68<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/imx7d-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/imx7d-clock.txt</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+* Clock bindings for Freescale i.MX7 Dual</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "fsl,imx7d-ccm"</div><div class='add'>+- reg: Address and length of the register set</div><div class='add'>+- #clock-cells: Should be &lt;1&gt;</div><div class='add'>+- clocks: list of clock specifiers, must contain an entry for each required</div><div class='add'>+  entry in clock-names</div><div class='add'>+- clock-names: should include entries "ckil", "osc"</div><div class='add'>+</div><div class='add'>+The clock consumer should specify the desired clock by having the clock</div><div class='add'>+ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx7d-clock.h</div><div class='add'>+for the full list of i.MX7 Dual clock IDs.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.txt b/Documentation/devicetree/bindings/clock/ingenic,cgu.txt<br/>new file mode 100644<br/>index 000000000000..f8d4134ae409<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/ingenic,cgu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/ingenic,cgu.txt</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+Ingenic SoC CGU binding</div><div class='add'>+</div><div class='add'>+The CGU in an Ingenic SoC provides all the clocks generated on-chip. It</div><div class='add'>+typically includes a variety of PLLs, multiplexers, dividers &amp; gates in order</div><div class='add'>+to provide many different clock signals derived from only 2 external source</div><div class='add'>+clocks.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "ingenic,&lt;soctype&gt;-cgu".</div><div class='add'>+  For example "ingenic,jz4740-cgu" or "ingenic,jz4780-cgu".</div><div class='add'>+- reg : The address &amp; length of the CGU registers.</div><div class='add'>+- clocks : List of phandle &amp; clock specifiers for clocks external to the CGU.</div><div class='add'>+  Two such external clocks should be specified - first the external crystal</div><div class='add'>+  "ext" and second the RTC clock source "rtc".</div><div class='add'>+- clock-names : List of name strings for the external clocks.</div><div class='add'>+- #clock-cells: Should be 1.</div><div class='add'>+  Clock consumers specify this argument to identify a clock. The valid values</div><div class='add'>+  may be found in &lt;dt-bindings/clock/&lt;soctype&gt;-cgu.h&gt;.</div><div class='add'>+</div><div class='add'>+Example SoC include file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cgu: jz4740-cgu {</div><div class='add'>+		compatible = "ingenic,jz4740-cgu";</div><div class='add'>+		reg = &lt;0x10000000 0x100&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0: serial@10030000 {</div><div class='add'>+		clocks = &lt;&amp;cgu JZ4740_CLK_UART0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example board file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	ext: clock@0 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: clock@1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	&amp;cgu {</div><div class='add'>+		clocks = &lt;&amp;ext&gt; &lt;&amp;rtc&gt;;</div><div class='add'>+		clock-names: "ext", "rtc";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/keystone-pll.txt b/Documentation/devicetree/bindings/clock/keystone-pll.txt<br/>index 225990f79b7c..47570d207215 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/keystone-pll.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/keystone-pll.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/keystone-pll.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/keystone-pll.txt</a></div><div class='hunk'>@@ -15,8 +15,8 @@ Required properties:</div><div class='ctx'> - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"</div><div class='ctx'> - clocks : parent clock phandle</div><div class='ctx'> - reg - pll control0 and pll multipler registers</div><div class='del'>-- reg-names : control and multiplier. The multiplier is applicable only for</div><div class='del'>-		main pll clock</div><div class='add'>+- reg-names : control, multiplier and post-divider. The multiplier and</div><div class='add'>+		post-divider registers are applicable only for main pll clock</div><div class='ctx'> - fixed-postdiv : fixed post divider value. If absent, use clkod register bits</div><div class='ctx'> 		for postdiv</div><div class='ctx'> </div><div class='hunk'>@@ -25,8 +25,8 @@ Example:</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "ti,keystone,main-pll-clock";</div><div class='ctx'> 		clocks = &lt;&amp;refclksys&gt;;</div><div class='del'>-		reg = &lt;0x02620350 4&gt;, &lt;0x02310110 4&gt;;</div><div class='del'>-		reg-names = "control", "multiplier";</div><div class='add'>+		reg = &lt;0x02620350 4&gt;, &lt;0x02310110 4&gt;, &lt;0x02310108 4&gt;;</div><div class='add'>+		reg-names = "control", "multiplier", "post-divider";</div><div class='ctx'> 		fixed-postdiv = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt b/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt<br/>new file mode 100644<br/>index 000000000000..fa97c12014ac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/lpc1850-ccu.txt</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+* NXP LPC1850 Clock Control Unit (CCU)</div><div class='add'>+</div><div class='add'>+Each CGU base clock has several clock branches which can be turned on</div><div class='add'>+or off independently by the Clock Control Units CCU1 or CCU2. The</div><div class='add'>+branch clocks are distributed between CCU1 and CCU2.</div><div class='add'>+</div><div class='add'>+ - Above text taken from NXP LPC1850 User Manual.</div><div class='add'>+</div><div class='add'>+This binding uses the common clock binding:</div><div class='add'>+    Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:</div><div class='add'>+	Should be "nxp,lpc1850-ccu"</div><div class='add'>+- reg:</div><div class='add'>+	Shall define the base and range of the address space</div><div class='add'>+	containing clock control registers</div><div class='add'>+- #clock-cells:</div><div class='add'>+	Shall have value &lt;1&gt;.  The permitted clock-specifier values</div><div class='add'>+	are the branch clock names defined in table below.</div><div class='add'>+- clocks:</div><div class='add'>+	Shall contain a list of phandles for the base clocks routed</div><div class='add'>+	from the CGU to the specific CCU. See mapping of base clocks</div><div class='add'>+	and CCU in table below.</div><div class='add'>+- clock-names:</div><div class='add'>+	Shall contain a list of names for the base clock routed</div><div class='add'>+	from the CGU to the specific CCU. Valid CCU clock names:</div><div class='add'>+	"base_usb0_clk",  "base_periph_clk", "base_usb1_clk",</div><div class='add'>+	"base_cpu_clk",   "base_spifi_clk",  "base_spi_clk",</div><div class='add'>+	"base_apb1_clk",  "base_apb3_clk",   "base_adchs_clk",</div><div class='add'>+	"base_sdio_clk",  "base_ssp0_clk",   "base_ssp1_clk",</div><div class='add'>+	"base_uart0_clk", "base_uart1_clk",  "base_uart2_clk",</div><div class='add'>+	"base_uart3_clk", "base_audio_clk"</div><div class='add'>+</div><div class='add'>+Which branch clocks that are available on the CCU depends on the</div><div class='add'>+specific LPC part. Check the user manual for your specific part.</div><div class='add'>+</div><div class='add'>+A list of CCU clocks can be found in dt-bindings/clock/lpc18xx-ccu.h.</div><div class='add'>+</div><div class='add'>+Example board file:</div><div class='add'>+</div><div class='add'>+soc {</div><div class='add'>+	ccu1: clock-controller@40051000 {</div><div class='add'>+		compatible = "nxp,lpc1850-ccu";</div><div class='add'>+		reg = &lt;0x40051000 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cgu BASE_APB3_CLK&gt;,   &lt;&amp;cgu BASE_APB1_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_SPIFI_CLK&gt;,  &lt;&amp;cgu BASE_CPU_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_PERIPH_CLK&gt;, &lt;&amp;cgu BASE_USB0_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_USB1_CLK&gt;,   &lt;&amp;cgu BASE_SPI_CLK&gt;;</div><div class='add'>+		clock-names = "base_apb3_clk",   "base_apb1_clk",</div><div class='add'>+			      "base_spifi_clk",  "base_cpu_clk",</div><div class='add'>+			      "base_periph_clk", "base_usb0_clk",</div><div class='add'>+			      "base_usb1_clk",   "base_spi_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ccu2: clock-controller@40052000 {</div><div class='add'>+		compatible = "nxp,lpc1850-ccu";</div><div class='add'>+		reg = &lt;0x40052000 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cgu BASE_AUDIO_CLK&gt;, &lt;&amp;cgu BASE_UART3_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_UART2_CLK&gt;, &lt;&amp;cgu BASE_UART1_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_UART0_CLK&gt;, &lt;&amp;cgu BASE_SSP1_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cgu BASE_SSP0_CLK&gt;,  &lt;&amp;cgu BASE_SDIO_CLK&gt;;</div><div class='add'>+		clock-names = "base_audio_clk", "base_uart3_clk",</div><div class='add'>+			      "base_uart2_clk", "base_uart1_clk",</div><div class='add'>+			      "base_uart0_clk", "base_ssp1_clk",</div><div class='add'>+			      "base_ssp0_clk",  "base_sdio_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* A user of CCU brach clocks */</div><div class='add'>+	uart1: serial@40082000 {</div><div class='add'>+		...</div><div class='add'>+		clocks = &lt;&amp;ccu2 CLK_APB0_UART1&gt;, &lt;&amp;ccu1 CLK_CPU_UART1&gt;;</div><div class='add'>+		...</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/lpc1850-cgu.txt b/Documentation/devicetree/bindings/clock/lpc1850-cgu.txt<br/>new file mode 100644<br/>index 000000000000..2cc32a9a945a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/lpc1850-cgu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/lpc1850-cgu.txt</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+* NXP LPC1850 Clock Generation Unit (CGU)</div><div class='add'>+</div><div class='add'>+The CGU generates multiple independent clocks for the core and the</div><div class='add'>+peripheral blocks of the LPC18xx. Each independent clock is called</div><div class='add'>+a base clock and itself is one of the inputs to the two Clock</div><div class='add'>+Control Units (CCUs) which control the branch clocks to the</div><div class='add'>+individual peripherals.</div><div class='add'>+</div><div class='add'>+The CGU selects the inputs to the clock generators from multiple</div><div class='add'>+clock sources, controls the clock generation, and routes the outputs</div><div class='add'>+of the clock generators through the clock source bus to the output</div><div class='add'>+stages. Each output stage provides an independent clock source and</div><div class='add'>+corresponds to one of the base clocks for the LPC18xx.</div><div class='add'>+</div><div class='add'>+ - Above text taken from NXP LPC1850 User Manual.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+This binding uses the common clock binding:</div><div class='add'>+    Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:</div><div class='add'>+	Should be "nxp,lpc1850-cgu"</div><div class='add'>+- reg:</div><div class='add'>+	Shall define the base and range of the address space</div><div class='add'>+	containing clock control registers</div><div class='add'>+- #clock-cells:</div><div class='add'>+	Shall have value &lt;1&gt;.  The permitted clock-specifier values</div><div class='add'>+	are the base clock numbers defined below.</div><div class='add'>+- clocks:</div><div class='add'>+	Shall contain a list of phandles for the external input</div><div class='add'>+	sources to the CGU. The list shall be in the following</div><div class='add'>+	order: xtal, 32khz, enet_rx_clk, enet_tx_clk, gp_clkin.</div><div class='add'>+- clock-indices:</div><div class='add'>+	Shall be an ordered list of numbers defining the base clock</div><div class='add'>+	number provided by the CGU.</div><div class='add'>+- clock-output-names:</div><div class='add'>+	Shall be an ordered list of strings defining the names of</div><div class='add'>+	the clocks provided by the CGU.</div><div class='add'>+</div><div class='add'>+Which base clocks that are available on the CGU depends on the</div><div class='add'>+specific LPC part. Base clocks are numbered from 0 to 27.</div><div class='add'>+</div><div class='add'>+Number:		Name:			Description:</div><div class='add'>+ 0		BASE_SAFE_CLK		Base safe clock (always on) for WWDT</div><div class='add'>+ 1		BASE_USB0_CLK		Base clock for USB0</div><div class='add'>+ 2		BASE_PERIPH_CLK		Base clock for Cortex-M0SUB subsystem,</div><div class='add'>+					SPI, and SGPIO</div><div class='add'>+ 3		BASE_USB1_CLK		Base clock for USB1</div><div class='add'>+ 4		BASE_CPU_CLK		System base clock for ARM Cortex-M core</div><div class='add'>+					and APB peripheral blocks #0 and #2</div><div class='add'>+ 5		BASE_SPIFI_CLK		Base clock for SPIFI</div><div class='add'>+ 6		BASE_SPI_CLK		Base clock for SPI</div><div class='add'>+ 7		BASE_PHY_RX_CLK		Base clock for Ethernet PHY Receive clock</div><div class='add'>+ 8		BASE_PHY_TX_CLK		Base clock for Ethernet PHY Transmit clock</div><div class='add'>+ 9		BASE_APB1_CLK		Base clock for APB peripheral block # 1</div><div class='add'>+10		BASE_APB3_CLK		Base clock for APB peripheral block # 3</div><div class='add'>+11		BASE_LCD_CLK		Base clock for LCD</div><div class='add'>+12		BASE_ADCHS_CLK		Base clock for ADCHS</div><div class='add'>+13		BASE_SDIO_CLK		Base clock for SD/MMC</div><div class='add'>+14		BASE_SSP0_CLK		Base clock for SSP0</div><div class='add'>+15		BASE_SSP1_CLK		Base clock for SSP1</div><div class='add'>+16		BASE_UART0_CLK		Base clock for UART0</div><div class='add'>+17		BASE_UART1_CLK		Base clock for UART1</div><div class='add'>+18		BASE_UART2_CLK		Base clock for UART2</div><div class='add'>+19		BASE_UART3_CLK		Base clock for UART3</div><div class='add'>+20		BASE_OUT_CLK		Base clock for CLKOUT pin</div><div class='add'>+24-21		-			Reserved</div><div class='add'>+25		BASE_AUDIO_CLK		Base clock for audio system (I2S)</div><div class='add'>+26 		BASE_CGU_OUT0_CLK	Base clock for CGU_OUT0 clock output</div><div class='add'>+27 		BASE_CGU_OUT1_CLK	Base clock for CGU_OUT1 clock output</div><div class='add'>+</div><div class='add'>+BASE_PERIPH_CLK and BASE_SPI_CLK is only available on LPC43xx.</div><div class='add'>+BASE_ADCHS_CLK is only available on LPC4370.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example board file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	clocks {</div><div class='add'>+		xtal: xtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xtal32: xtal32 {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		enet_rx_clk: enet_rx_clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "enet_rx_clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		enet_tx_clk: enet_tx_clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "enet_tx_clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gp_clkin: gp_clkin {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gp_clkin";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		cgu: clock-controller@40050000 {</div><div class='add'>+			compatible = "nxp,lpc1850-cgu";</div><div class='add'>+			reg = &lt;0x40050000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;, &lt;&amp;creg_clk 1&gt;, &lt;&amp;enet_rx_clk&gt;, &lt;&amp;enet_tx_clk&gt;, &lt;&amp;gp_clkin&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* A CGU and CCU clock consumer */</div><div class='add'>+		lcdc: lcdc@40008000 {</div><div class='add'>+			...</div><div class='add'>+			clocks = &lt;&amp;cgu BASE_LCD_CLK&gt;, &lt;&amp;ccu1 CLK_CPU_LCD&gt;;</div><div class='add'>+			clock-names = "clcdclk", "apb_pclk";</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/marvell,berlin.txt b/Documentation/devicetree/bindings/clock/marvell,berlin.txt<br/>new file mode 100644<br/>index 000000000000..c611c495f3ff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/marvell,berlin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/marvell,berlin.txt</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+Device Tree Clock bindings for Marvell Berlin</div><div class='add'>+</div><div class='add'>+This binding uses the common clock binding[1].</div><div class='add'>+</div><div class='add'>+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+</div><div class='add'>+Clock related registers are spread among the chip control registers. Berlin</div><div class='add'>+clock node should be a sub-node of the chip controller node. Marvell Berlin2</div><div class='add'>+(BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some</div><div class='add'>+minor differences in features and register layout.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk"</div><div class='add'>+- #clock-cells: must be 1</div><div class='add'>+- clocks: must be the input parent clock phandle</div><div class='add'>+- clock-names: name of the input parent clock</div><div class='add'>+	Allowed clock-names for the reference clocks are</div><div class='add'>+	"refclk" for the SoCs oscillator input on all SoCs,</div><div class='add'>+	and SoC-specific input clocks for</div><div class='add'>+	BG2/BG2CD: "video_ext0" for the external video clock input</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+chip_clk: clock {</div><div class='add'>+	compatible = "marvell,berlin2q-clk";</div><div class='add'>+</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+	clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+	clock-names = "refclk";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1928.txt b/Documentation/devicetree/bindings/clock/marvell,pxa1928.txt<br/>new file mode 100644<br/>index 000000000000..809c5a2d8d9d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/marvell,pxa1928.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/marvell,pxa1928.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+* Marvell PXA1928 Clock Controllers</div><div class='add'>+</div><div class='add'>+The PXA1928 clock subsystem generates and supplies clock to various</div><div class='add'>+controllers within the PXA1928 SoC. The PXA1928 contains 3 clock controller</div><div class='add'>+blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: should be one of the following.</div><div class='add'>+  - "marvell,pxa1928-apmu" - APMU controller compatible</div><div class='add'>+  - "marvell,pxa1928-mpmu" - MPMU controller compatible</div><div class='add'>+  - "marvell,pxa1928-apbc" - APBC controller compatible</div><div class='add'>+- reg: physical base address of the clock controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- #clock-cells: should be 1.</div><div class='add'>+- #reset-cells: should be 1.</div><div class='add'>+</div><div class='add'>+Each clock is assigned an identifier and client nodes use the clock controller</div><div class='add'>+phandle and this identifier to specify the clock which they consume.</div><div class='add'>+</div><div class='add'>+All these identifiers can be found in &lt;dt-bindings/clock/marvell,pxa1928.h&gt;.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt<br/>index 31c7c0c1ce8f..660e64912cce 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt</a></div><div class='hunk'>@@ -19,6 +19,7 @@ ID	Clock	Peripheral</div><div class='ctx'> 9	pex1	PCIe Cntrl 1</div><div class='ctx'> 15	sata0	SATA Host 0</div><div class='ctx'> 17	sdio	SDHCI Host</div><div class='add'>+23	crypto	CESA (crypto engine)</div><div class='ctx'> 25	tdm	Time Division Mplx</div><div class='ctx'> 28	ddr	DDR Cntrl</div><div class='ctx'> 30	sata1	SATA Host 0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt<br/>index c6620bc96703..7f02fb4ca4ad 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt</a></div><div class='hunk'>@@ -20,15 +20,38 @@ Required properties :</div><div class='ctx'> - #reset-cells : Should be 1.</div><div class='ctx'>   In clock consumers, this cell represents the bit number in the CAR's</div><div class='ctx'>   array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.</div><div class='add'>+- nvidia,external-memory-controller : phandle of the EMC driver.</div><div class='add'>+</div><div class='add'>+The node should contain a "emc-timings" subnode for each supported RAM type (see</div><div class='add'>+field RAM_CODE in register PMC_STRAPPING_OPT_A).</div><div class='add'>+</div><div class='add'>+Required properties for "emc-timings" nodes :</div><div class='add'>+- nvidia,ram-code : Should contain the value of RAM_CODE this timing set</div><div class='add'>+  is used for.</div><div class='add'>+</div><div class='add'>+Each "emc-timings" node should contain a "timing" subnode for every supported</div><div class='add'>+EMC clock rate.</div><div class='add'>+</div><div class='add'>+Required properties for "timing" nodes :</div><div class='add'>+- clock-frequency : Should contain the memory clock rate to which this timing</div><div class='add'>+relates.</div><div class='add'>+- nvidia,parent-clock-frequency : Should contain the rate at which the current</div><div class='add'>+parent of the EMC clock should be running at this timing.</div><div class='add'>+- clocks : Must contain an entry for each entry in clock-names.</div><div class='add'>+  See ../clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names : Must include the following entries:</div><div class='add'>+  - emc-parent : the clock that should be the parent of the EMC clock at this</div><div class='add'>+timing.</div><div class='ctx'> </div><div class='ctx'> Example SoC include file:</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	tegra_car: clock {</div><div class='add'>+	tegra_car: clock@60006000 {</div><div class='ctx'> 		compatible = "nvidia,tegra124-car";</div><div class='ctx'> 		reg = &lt;0x60006000 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		#reset-cells = &lt;1&gt;;</div><div class='add'>+		nvidia,external-memory-controller = &lt;&amp;emc&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb@c5004000 {</div><div class='hunk'>@@ -62,4 +85,23 @@ Example board file:</div><div class='ctx'> 	&amp;tegra_car {</div><div class='ctx'> 		clocks = &lt;&amp;clk_32k&gt; &lt;&amp;osc&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	clock@60006000 {</div><div class='add'>+		emc-timings-3 {</div><div class='add'>+			nvidia,ram-code = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			timing-12750000 {</div><div class='add'>+				clock-frequency = &lt;12750000&gt;;</div><div class='add'>+				nvidia,parent-clock-frequency = &lt;408000000&gt;;</div><div class='add'>+				clocks = &lt;&amp;tegra_car TEGRA124_CLK_PLL_P&gt;;</div><div class='add'>+				clock-names = "emc-parent";</div><div class='add'>+			};</div><div class='add'>+			timing-20400000 {</div><div class='add'>+				clock-frequency = &lt;20400000&gt;;</div><div class='add'>+				nvidia,parent-clock-frequency = &lt;408000000&gt;;</div><div class='add'>+				clocks = &lt;&amp;tegra_car TEGRA124_CLK_PLL_P&gt;;</div><div class='add'>+				clock-names = "emc-parent";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt<br/>new file mode 100644<br/>index 000000000000..e0fc2c11dd00<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/qca,ath79-pll.txt</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller</div><div class='add'>+</div><div class='add'>+The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+- compatible: has to be "qca,&lt;soctype&gt;-cpu-intc" and one of the following</div><div class='add'>+  fallbacks:</div><div class='add'>+  - "qca,ar7100-pll"</div><div class='add'>+  - "qca,ar7240-pll"</div><div class='add'>+  - "qca,ar9130-pll"</div><div class='add'>+  - "qca,ar9330-pll"</div><div class='add'>+  - "qca,ar9340-pll"</div><div class='add'>+  - "qca,qca9550-pll"</div><div class='add'>+- reg: Base address and size of the controllers memory area</div><div class='add'>+- clock-names: Name of the input clock, has to be "ref"</div><div class='add'>+- clocks: phandle of the external reference clock</div><div class='add'>+- #clock-cells: has to be one</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- clock-output-names: should be "cpu", "ddr", "ahb"</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	memory-controller@18050000 {</div><div class='add'>+		compatible = "qca,ar9132-ppl", "qca,ar9130-pll";</div><div class='add'>+		reg = &lt;0x18050000 0x20&gt;;</div><div class='add'>+</div><div class='add'>+		clock-names = "ref";</div><div class='add'>+		clocks = &lt;&amp;extosc&gt;;</div><div class='add'>+</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "cpu", "ddr", "ahb";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt<br/>index 054f65f9319c..5ddb68418655 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt</a></div><div class='hunk'>@@ -10,9 +10,11 @@ Required Properties:</div><div class='ctx'>     - "renesas,r8a73a4-div6-clock" for R8A73A4 (R-Mobile APE6) DIV6 clocks</div><div class='ctx'>     - "renesas,r8a7740-div6-clock" for R8A7740 (R-Mobile A1) DIV6 clocks</div><div class='ctx'>     - "renesas,r8a7790-div6-clock" for R8A7790 (R-Car H2) DIV6 clocks</div><div class='del'>-    - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2) DIV6 clocks</div><div class='add'>+    - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2-W) DIV6 clocks</div><div class='add'>+    - "renesas,r8a7793-div6-clock" for R8A7793 (R-Car M2-N) DIV6 clocks</div><div class='add'>+    - "renesas,r8a7794-div6-clock" for R8A7794 (R-Car E2) DIV6 clocks</div><div class='ctx'>     - "renesas,sh73a0-div6-clock" for SH73A0 (SH-Mobile AG5) DIV6 clocks</div><div class='del'>-    - "renesas,cpg-div6-clock" for generic DIV6 clocks</div><div class='add'>+    and "renesas,cpg-div6-clock" as a fallback.</div><div class='ctx'>   - reg: Base address and length of the memory resource used by the DIV6 clock</div><div class='ctx'>   - clocks: Reference to the parent clock(s); either one, four, or eight</div><div class='ctx'>     clocks must be specified.  For clocks with multiple parents, invalid</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt<br/>index 0a80fa70ca26..16ed18155160 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt</a></div><div class='hunk'>@@ -13,12 +13,14 @@ Required Properties:</div><div class='ctx'>     - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks</div><div class='ctx'>     - "renesas,r8a73a4-mstp-clocks" for R8A73A4 (R-Mobile APE6) MSTP gate clocks</div><div class='ctx'>     - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks</div><div class='add'>+    - "renesas,r8a7778-mstp-clocks" for R8A7778 (R-Car M1) MSTP gate clocks</div><div class='ctx'>     - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks</div><div class='ctx'>     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks</div><div class='del'>-    - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks</div><div class='add'>+    - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2-W) MSTP gate clocks</div><div class='add'>+    - "renesas,r8a7793-mstp-clocks" for R8A7793 (R-Car M2-N) MSTP gate clocks</div><div class='ctx'>     - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks</div><div class='ctx'>     - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks</div><div class='del'>-    - "renesas,cpg-mstp-clock" for generic MSTP gate clocks</div><div class='add'>+    and "renesas,cpg-mstp-clocks" as a fallback.</div><div class='ctx'>   - reg: Base address and length of the I/O mapped registers used by the MSTP</div><div class='ctx'>     clocks. The first register is the clock control register and is mandatory.</div><div class='ctx'>     The second register is the clock status register and is optional when not</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt b/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt<br/>new file mode 100644<br/>index 000000000000..36c2b528245c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+* Renesas H8/300 divider clock</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: Must be "renesas,sh73a0-h8300-div-clock"</div><div class='add'>+</div><div class='add'>+  - clocks: Reference to the parent clocks ("extal1" and "extal2")</div><div class='add'>+</div><div class='add'>+  - #clock-cells: Must be 1</div><div class='add'>+</div><div class='add'>+  - reg: Base address and length of the divide rate selector</div><div class='add'>+</div><div class='add'>+  - renesas,width: bit width of selector</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+		cclk: cclk {</div><div class='add'>+			compatible = "renesas,h8300-div-clock";</div><div class='add'>+			clocks = &lt;&amp;xclk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0xfee01b 2&gt;;</div><div class='add'>+			renesas,width = &lt;2&gt;;</div><div class='add'>+		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt b/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt<br/>new file mode 100644<br/>index 000000000000..500cdadbceb7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+Renesas H8S2678 PLL clock</div><div class='add'>+</div><div class='add'>+This device is Clock multiplyer</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: Must be "renesas,h8s2678-pll-clock"</div><div class='add'>+</div><div class='add'>+  - clocks: Reference to the parent clocks</div><div class='add'>+</div><div class='add'>+  - #clock-cells: Must be 0</div><div class='add'>+</div><div class='add'>+  - reg: Two rate selector (Multiply / Divide) register address</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+		pllclk: pllclk {</div><div class='add'>+			compatible = "renesas,h8s2678-pll-clock";</div><div class='add'>+			clocks = &lt;&amp;xclk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0xfee03b 2&gt;, &lt;0xfee045 2&gt;;</div><div class='add'>+		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt<br/>index b02944fba9de..56f111bd3e45 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt</a></div><div class='hunk'>@@ -10,7 +10,7 @@ Required Properties:</div><div class='ctx'>     - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG</div><div class='ctx'>     - "renesas,r8a7793-cpg-clocks" for the r8a7793 CPG</div><div class='ctx'>     - "renesas,r8a7794-cpg-clocks" for the r8a7794 CPG</div><div class='del'>-    - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG</div><div class='add'>+    and "renesas,rcar-gen2-cpg-clocks" as a fallback.</div><div class='ctx'> </div><div class='ctx'>   - reg: Base address and length of the memory resource used by the CPG</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt<br/>index 98a257492522..b0f7ddb8cdb1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt</a></div><div class='hunk'>@@ -7,7 +7,7 @@ Required Properties:</div><div class='ctx'> </div><div class='ctx'>   - compatible: Must be one of</div><div class='ctx'>     - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG</div><div class='del'>-    - "renesas,rz-cpg-clocks" for the generic RZ CPG</div><div class='add'>+    and "renesas,rz-cpg-clocks" as a fallback.</div><div class='ctx'>   - reg: Base address and length of the memory resource used by the CPG</div><div class='ctx'>   - clocks: References to possible parent clocks. Order must match clock modes</div><div class='ctx'>     in the datasheet. For the r7s72100, this is extal, usb_x1.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt b/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt<br/>new file mode 100644<br/>index 000000000000..fee3205cdff9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/st,stm32-rcc.txt</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+STMicroelectronics STM32 Reset and Clock Controller</div><div class='add'>+===================================================</div><div class='add'>+</div><div class='add'>+The RCC IP is both a reset and a clock controller. This documentation only</div><div class='add'>+describes the clock part.</div><div class='add'>+</div><div class='add'>+Please also refer to clock-bindings.txt in this directory for common clock</div><div class='add'>+controller binding usage.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "st,stm32f42xx-rcc"</div><div class='add'>+- reg: should be register base and length as documented in the</div><div class='add'>+  datasheet</div><div class='add'>+- #clock-cells: 2, device nodes should specify the clock in their "clocks"</div><div class='add'>+  property, containing a phandle to the clock device node, an index selecting</div><div class='add'>+  between gated clocks and other clocks and an index specifying the clock to</div><div class='add'>+  use.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	rcc: rcc@40023800 {</div><div class='add'>+		#clock-cells = &lt;2&gt;</div><div class='add'>+		compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";</div><div class='add'>+		reg = &lt;0x40023800 0x400&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Specifying gated clocks</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+The primary index must be set to 0.</div><div class='add'>+</div><div class='add'>+The secondary index is the bit number within the RCC register bank, starting</div><div class='add'>+from the first RCC clock enable register (RCC_AHB1ENR, address offset 0x30).</div><div class='add'>+</div><div class='add'>+It is calculated as: index = register_offset / 4 * 32 + bit_offset.</div><div class='add'>+Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	/* Gated clock, AHB1 bit 0 (GPIOA) */</div><div class='add'>+	... {</div><div class='add'>+		clocks = &lt;&amp;rcc 0 0&gt;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Gated clock, AHB2 bit 4 (CRYP) */</div><div class='add'>+	... {</div><div class='add'>+		clocks = &lt;&amp;rcc 0 36&gt;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Specifying other clocks</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+The primary index must be set to 1.</div><div class='add'>+</div><div class='add'>+The secondary index is bound with the following magic numbers:</div><div class='add'>+</div><div class='add'>+	0	SYSTICK</div><div class='add'>+	1	FCLK</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	/* Misc clock, FCLK */</div><div class='add'>+	... {</div><div class='add'>+		clocks = &lt;&amp;rcc 1 1&gt;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt<br/>index 4fa11af3d378..8a47b77abfca 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/sunxi.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/clock/sunxi.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/sunxi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/sunxi.txt</a></div><div class='hunk'>@@ -67,6 +67,7 @@ Required properties:</div><div class='ctx'> 	"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20</div><div class='ctx'> 	"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13</div><div class='ctx'> 	"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31</div><div class='add'>+	"allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23</div><div class='ctx'> 	"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80</div><div class='ctx'> 	"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,cdce925.txt b/Documentation/devicetree/bindings/clock/ti,cdce925.txt<br/>new file mode 100644<br/>index 000000000000..4c7669ad681b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/ti,cdce925.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/ti,cdce925.txt</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+Binding for TO CDCE925 programmable I2C clock synthesizers.</div><div class='add'>+</div><div class='add'>+Reference</div><div class='add'>+This binding uses the common clock binding[1].</div><div class='add'>+</div><div class='add'>+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+[2] http://www.ti.com/product/cdce925</div><div class='add'>+</div><div class='add'>+The driver provides clock sources for each output Y1 through Y5.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+ - compatible: Shall be "ti,cdce925"</div><div class='add'>+ - reg: I2C device address.</div><div class='add'>+ - clocks: Points to a fixed parent clock that provides the input frequency.</div><div class='add'>+ - #clock-cells: From common clock bindings: Shall be 1.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+ - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a</div><div class='add'>+                 board, or to compensate for external influences.</div><div class='add'>+</div><div class='add'>+For both PLL1 and PLL2 an optional child node can be used to specify spread</div><div class='add'>+spectrum clocking parameters for a board.</div><div class='add'>+  - spread-spectrum: SSC mode as defined in the data sheet.</div><div class='add'>+  - spread-spectrum-center: Use "centered" mode instead of "max" mode. When</div><div class='add'>+    present, the clock runs at the requested frequency on average. Otherwise</div><div class='add'>+    the requested frequency is the maximum value of the SCC range.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	clockgen: cdce925pw@64 {</div><div class='add'>+		compatible = "cdce925";</div><div class='add'>+		reg = &lt;0x64&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal_27Mhz&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		xtal-load-pf = &lt;5&gt;;</div><div class='add'>+		/* PLL options to get SSC 1% centered */</div><div class='add'>+		PLL2 {</div><div class='add'>+			spread-spectrum = &lt;4&gt;;</div><div class='add'>+			spread-spectrum-center;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/zx296702-clk.txt b/Documentation/devicetree/bindings/clock/zx296702-clk.txt<br/>new file mode 100644<br/>index 000000000000..750442b65505<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/clock/zx296702-clk.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/clock/zx296702-clk.txt</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+Device Tree Clock bindings for ZTE zx296702</div><div class='add'>+</div><div class='add'>+This binding uses the common clock binding[1].</div><div class='add'>+</div><div class='add'>+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : shall be one of the following:</div><div class='add'>+	"zte,zx296702-topcrm-clk":</div><div class='add'>+		zx296702 top clock selection, divider and gating</div><div class='add'>+</div><div class='add'>+	"zte,zx296702-lsp0crpm-clk" and</div><div class='add'>+	"zte,zx296702-lsp1crpm-clk":</div><div class='add'>+		zx296702 device level clock selection and gating</div><div class='add'>+</div><div class='add'>+- reg: Address and length of the register set</div><div class='add'>+</div><div class='add'>+The clock consumer should specify the desired clock by having the clock</div><div class='add'>+ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296702-clock.h</div><div class='add'>+for the full list of zx296702 clock IDs.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+topclk: topcrm@0x09800000 {</div><div class='add'>+        compatible = "zte,zx296702-topcrm-clk";</div><div class='add'>+        reg = &lt;0x09800000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+uart0: serial@0x09405000 {</div><div class='add'>+        compatible = "zte,zx296702-uart";</div><div class='add'>+        reg = &lt;0x09405000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;lsp1clk ZX296702_UART0_PCLK&gt;;</div><div class='add'>+        status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt<br/>index 38988ef1336b..f0d926bf9f36 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/crypto/fsl-sec2.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/crypto/fsl-sec2.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/crypto/fsl-sec2.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/fsl-sec2.txt</a></div><div class='hunk'>@@ -1,9 +1,11 @@</div><div class='del'>-Freescale SoC SEC Security Engines versions 2.x-3.x</div><div class='add'>+Freescale SoC SEC Security Engines versions 1.x-2.x-3.x</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='ctx'> - compatible : Should contain entries for this and backward compatible</div><div class='del'>-  SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"</div><div class='add'>+  SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)</div><div class='add'>+                             e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)</div><div class='add'>+    warning: SEC1 and SEC2 are mutually exclusive</div><div class='ctx'> - reg : Offset and length of the register set for the device</div><div class='ctx'> - interrupts : the SEC's interrupt number</div><div class='ctx'> - fsl,num-channels : An integer representing the number of channels</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/marvell-cesa.txt b/Documentation/devicetree/bindings/crypto/marvell-cesa.txt<br/>new file mode 100644<br/>index 000000000000..c6c6a4a045bd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/crypto/marvell-cesa.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/marvell-cesa.txt</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+Marvell Cryptographic Engines And Security Accelerator</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be one of the following string</div><div class='add'>+	      "marvell,orion-crypto"</div><div class='add'>+	      "marvell,kirkwood-crypto"</div><div class='add'>+	      "marvell,dove-crypto"</div><div class='add'>+	      "marvell,armada-370-crypto"</div><div class='add'>+	      "marvell,armada-xp-crypto"</div><div class='add'>+	      "marvell,armada-375-crypto"</div><div class='add'>+	      "marvell,armada-38x-crypto"</div><div class='add'>+- reg: base physical address of the engine and length of memory mapped</div><div class='add'>+       region. Can also contain an entry for the SRAM attached to the CESA,</div><div class='add'>+       but this representation is deprecated and marvell,crypto-srams should</div><div class='add'>+       be used instead</div><div class='add'>+- reg-names: "regs". Can contain an "sram" entry, but this representation</div><div class='add'>+	     is deprecated and marvell,crypto-srams should be used instead</div><div class='add'>+- interrupts: interrupt number</div><div class='add'>+- clocks: reference to the crypto engines clocks. This property is not</div><div class='add'>+	  required for orion and kirkwood platforms</div><div class='add'>+- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine</div><div class='add'>+	       id.</div><div class='add'>+	       This property is not required for the orion and kirkwoord</div><div class='add'>+	       platforms.</div><div class='add'>+	       "cesazX" clocks are not required on armada-370 platforms</div><div class='add'>+- marvell,crypto-srams: phandle to crypto SRAM definitions</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not</div><div class='add'>+			    specified the whole SRAM is used (2KB)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+	crypto@90000 {</div><div class='add'>+		compatible = "marvell,armada-xp-crypto";</div><div class='add'>+		reg = &lt;0x90000 0x10000&gt;;</div><div class='add'>+		reg-names = "regs";</div><div class='add'>+		interrupts = &lt;48&gt;, &lt;49&gt;;</div><div class='add'>+		clocks = &lt;&amp;gateclk 23&gt;, &lt;&amp;gateclk 23&gt;;</div><div class='add'>+		clock-names = "cesa0", "cesa1";</div><div class='add'>+		marvell,crypto-srams = &lt;&amp;crypto_sram0&gt;, &lt;&amp;crypto_sram1&gt;;</div><div class='add'>+		marvell,crypto-sram-size = &lt;0x600&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt<br/>index 47229b1a594b..c0c35f00335b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/crypto/mv_cesa.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/crypto/mv_cesa.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/crypto/mv_cesa.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/crypto/mv_cesa.txt</a></div><div class='hunk'>@@ -1,20 +1,33 @@</div><div class='ctx'> Marvell Cryptographic Engines And Security Accelerator</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : should be "marvell,orion-crypto"</div><div class='del'>-- reg : base physical address of the engine and length of memory mapped</div><div class='del'>-        region, followed by base physical address of sram and its memory</div><div class='del'>-        length</div><div class='del'>-- reg-names : "regs" , "sram";</div><div class='del'>-- interrupts : interrupt number</div><div class='add'>+- compatible: should be one of the following string</div><div class='add'>+	      "marvell,orion-crypto"</div><div class='add'>+	      "marvell,kirkwood-crypto"</div><div class='add'>+	      "marvell,dove-crypto"</div><div class='add'>+- reg: base physical address of the engine and length of memory mapped</div><div class='add'>+       region. Can also contain an entry for the SRAM attached to the CESA,</div><div class='add'>+       but this representation is deprecated and marvell,crypto-srams should</div><div class='add'>+       be used instead</div><div class='add'>+- reg-names: "regs". Can contain an "sram" entry, but this representation</div><div class='add'>+	     is deprecated and marvell,crypto-srams should be used instead</div><div class='add'>+- interrupts: interrupt number</div><div class='add'>+- clocks: reference to the crypto engines clocks. This property is only</div><div class='add'>+	  required for Dove platforms</div><div class='add'>+- marvell,crypto-srams: phandle to crypto SRAM definitions</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not</div><div class='add'>+			    specified the whole SRAM is used (2KB)</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='ctx'> </div><div class='ctx'> 	crypto@30000 {</div><div class='ctx'> 		compatible = "marvell,orion-crypto";</div><div class='del'>-		reg = &lt;0x30000 0x10000&gt;,</div><div class='del'>-		      &lt;0x4000000 0x800&gt;;</div><div class='del'>-		reg-names = "regs" , "sram";</div><div class='add'>+		reg = &lt;0x30000 0x10000&gt;;</div><div class='add'>+		reg-names = "regs";</div><div class='ctx'> 		interrupts = &lt;22&gt;;</div><div class='add'>+		marvell,crypto-srams = &lt;&amp;crypto_sram&gt;;</div><div class='add'>+		marvell,crypto-sram-size = &lt;0x600&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/dma.txt b/Documentation/devicetree/bindings/dma/dma.txt<br/>index 82104271e754..6312fb00ce8d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/dma.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/dma/dma.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/dma.txt</a></div><div class='hunk'>@@ -31,6 +31,34 @@ Example:</div><div class='ctx'> 		dma-requests = &lt;127&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+* DMA router</div><div class='add'>+</div><div class='add'>+DMA routers are transparent IP blocks used to route DMA request lines from</div><div class='add'>+devices to the DMA controller. Some SoCs (like TI DRA7x) have more peripherals</div><div class='add'>+integrated with DMA requests than what the DMA controller can handle directly.</div><div class='add'>+</div><div class='add'>+Required property:</div><div class='add'>+- dma-masters:		phandle of the DMA controller or list of phandles for</div><div class='add'>+			the DMA controllers the router can direct the signal to.</div><div class='add'>+- #dma-cells: 		Must be at least 1. Used to provide DMA router specific</div><div class='add'>+			information. See DMA client binding below for more</div><div class='add'>+			details.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- dma-requests: 	Number of incoming request lines the router can handle.</div><div class='add'>+- In the node pointed by the dma-masters:</div><div class='add'>+	- dma-requests:	The router driver might need to look for this in order</div><div class='add'>+			to configure the routing.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	sdma_xbar: dma-router@4a002b78 {</div><div class='add'>+		compatible = "ti,dra7-dma-crossbar";</div><div class='add'>+		reg = &lt;0x4a002b78 0xfc&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-requests = &lt;205&gt;;</div><div class='add'>+		ti,dma-safe-map = &lt;0&gt;;</div><div class='add'>+		dma-masters = &lt;&amp;sdma&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> * DMA client</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt<br/>index 7c6cb7fcecd2..cc29c35266e2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/mv-xor.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/dma/mv-xor.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/mv-xor.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/mv-xor.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> * Marvell XOR engines</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: Should be "marvell,orion-xor"</div><div class='add'>+- compatible: Should be "marvell,orion-xor" or "marvell,armada-380-xor"</div><div class='ctx'> - reg: Should contain registers location and length (two sets)</div><div class='ctx'>     the first set is the low registers, the second set the high</div><div class='ctx'>     registers for the XOR engine.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt b/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt<br/>index ecbc96ad36f8..ccd52d6a231a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/dma/sirfsoc-dma.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/sirfsoc-dma.txt</a></div><div class='hunk'>@@ -3,7 +3,8 @@</div><div class='ctx'> See dma.txt first</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: Should be "sirf,prima2-dmac" or "sirf,marco-dmac"</div><div class='add'>+- compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or</div><div class='add'>+  "sirf,atlas7-dmac-v2"</div><div class='ctx'> - reg: Should contain DMA registers location and length.</div><div class='ctx'> - interrupts: Should contain one interrupt shared by all channel</div><div class='ctx'> - #dma-cells: must be &lt;1&gt;. used to represent the number of integer</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt<br/>index 9cdcba24d7c3..d13c136cef8c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/sun6i-dma.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/dma/sun6i-dma.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/sun6i-dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/sun6i-dma.txt</a></div><div class='hunk'>@@ -4,7 +4,10 @@ This driver follows the generic DMA bindings defined in dma.txt.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='del'>-- compatible:	Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"</div><div class='add'>+- compatible:	Must be one of</div><div class='add'>+		  "allwinner,sun6i-a31-dma"</div><div class='add'>+		  "allwinner,sun8i-a23-dma"</div><div class='add'>+		  "allwinner,sun8i-h3-dma"</div><div class='ctx'> - reg:		Should contain the registers base address and length</div><div class='ctx'> - interrupts:	Should contain a reference to the interrupt used by this device</div><div class='ctx'> - clocks:	Should contain a reference to the parent AHB clock</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt<br/>new file mode 100644<br/>index 000000000000..63a48928f3a8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+Texas Instruments DMA Crossbar (DMA request router)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:	"ti,dra7-dma-crossbar" for DRA7xx DMA crossbar</div><div class='add'>+- reg:		Memory map for accessing module</div><div class='add'>+- #dma-cells:	Should be set to &lt;1&gt;.</div><div class='add'>+		Clients should use the crossbar request number (input)</div><div class='add'>+- dma-requests:	Number of DMA requests the crossbar can receive</div><div class='add'>+- dma-masters:	phandle pointing to the DMA controller</div><div class='add'>+</div><div class='add'>+The DMA controller node need to have the following poroperties:</div><div class='add'>+- dma-requests:	Number of DMA requests the controller can handle</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- ti,dma-safe-map: Safe routing value for unused request lines</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+/* DMA controller */</div><div class='add'>+sdma: dma-controller@4a056000 {</div><div class='add'>+	compatible = "ti,omap4430-sdma";</div><div class='add'>+	reg = &lt;0x4a056000 0x1000&gt;;</div><div class='add'>+	interrupts =	&lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	#dma-cells = &lt;1&gt;;</div><div class='add'>+	dma-channels = &lt;32&gt;;</div><div class='add'>+	dma-requests = &lt;127&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DMA crossbar */</div><div class='add'>+sdma_xbar: dma-router@4a002b78 {</div><div class='add'>+	compatible = "ti,dra7-dma-crossbar";</div><div class='add'>+	reg = &lt;0x4a002b78 0xfc&gt;;</div><div class='add'>+	#dma-cells = &lt;1&gt;;</div><div class='add'>+	dma-requests = &lt;205&gt;;</div><div class='add'>+	ti,dma-safe-map = &lt;0&gt;;</div><div class='add'>+	dma-masters = &lt;&amp;sdma&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DMA client */</div><div class='add'>+uart1: serial@4806a000 {</div><div class='add'>+	compatible = "ti,omap4-uart";</div><div class='add'>+	reg = &lt;0x4806a000 0x100&gt;;</div><div class='add'>+	interrupts-extended = &lt;&amp;gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	ti,hwmods = "uart1";</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+	dmas = &lt;&amp;sdma_xbar 49&gt;, &lt;&amp;sdma_xbar 50&gt;;</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt<br/>index e75f0e549fff..971c3eedb1c7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/imx/fsl-imx-drm.txt</a></div><div class='hunk'>@@ -65,8 +65,10 @@ Optional properties:</div><div class='ctx'> - edid: verbatim EDID data block describing attached display.</div><div class='ctx'> - ddc: phandle describing the i2c bus handling the display data</div><div class='ctx'>   channel</div><div class='del'>-- port: A port node with endpoint definitions as defined in</div><div class='add'>+- port@[0-1]: Port nodes with endpoint definitions as defined in</div><div class='ctx'>   Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='add'>+  Port 0 is the input port connected to the IPU display interface,</div><div class='add'>+  port 1 is the output port connected to a panel.</div><div class='ctx'> </div><div class='ctx'> example:</div><div class='ctx'> </div><div class='hunk'>@@ -75,9 +77,29 @@ display@di0 {</div><div class='ctx'> 	edid = [edid-data];</div><div class='ctx'> 	interface-pix-fmt = "rgb24";</div><div class='ctx'> </div><div class='del'>-	port {</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 		display_in: endpoint {</div><div class='ctx'> 			remote-endpoint = &lt;&amp;ipu_di0_disp0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		display_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+panel {</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		panel_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/msm/dsi.txt b/Documentation/devicetree/bindings/drm/msm/dsi.txt<br/>new file mode 100644<br/>index 000000000000..cd8fe6cf536c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/msm/dsi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/dsi.txt</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+Qualcomm Technologies Inc. adreno/snapdragon DSI output</div><div class='add'>+</div><div class='add'>+DSI Controller:</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:</div><div class='add'>+  * "qcom,mdss-dsi-ctrl"</div><div class='add'>+- reg: Physical base address and length of the registers of controller</div><div class='add'>+- reg-names: The names of register regions. The following regions are required:</div><div class='add'>+  * "dsi_ctrl"</div><div class='add'>+- qcom,dsi-host-index: The ID of DSI controller hardware instance. This should</div><div class='add'>+  be 0 or 1, since we have 2 DSI controllers at most for now.</div><div class='add'>+- interrupts: The interrupt signal from the DSI block.</div><div class='add'>+- power-domains: Should be &lt;&amp;mmcc MDSS_GDSC&gt;.</div><div class='add'>+- clocks: device clocks</div><div class='add'>+  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names: the following clocks are required:</div><div class='add'>+  * "bus_clk"</div><div class='add'>+  * "byte_clk"</div><div class='add'>+  * "core_clk"</div><div class='add'>+  * "core_mmss_clk"</div><div class='add'>+  * "iface_clk"</div><div class='add'>+  * "mdp_core_clk"</div><div class='add'>+  * "pixel_clk"</div><div class='add'>+- vdd-supply: phandle to vdd regulator device node</div><div class='add'>+- vddio-supply: phandle to vdd-io regulator device node</div><div class='add'>+- vdda-supply: phandle to vdda regulator device node</div><div class='add'>+- qcom,dsi-phy: phandle to DSI PHY device node</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- panel@0: Node of panel connected to this DSI controller.</div><div class='add'>+  See files in Documentation/devicetree/bindings/panel/ for each supported</div><div class='add'>+  panel.</div><div class='add'>+- qcom,dual-panel-mode: Boolean value indicating if the DSI controller is</div><div class='add'>+  driving a panel which needs 2 DSI links.</div><div class='add'>+- qcom,master-panel: Boolean value indicating if the DSI controller is driving</div><div class='add'>+  the master link of the 2-DSI panel.</div><div class='add'>+- qcom,sync-dual-panel: Boolean value indicating if the DSI controller is</div><div class='add'>+  driving a 2-DSI panel whose 2 links need receive command simultaneously.</div><div class='add'>+- interrupt-parent: phandle to the MDP block if the interrupt signal is routed</div><div class='add'>+  through MDP block</div><div class='add'>+</div><div class='add'>+DSI PHY:</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Could be the following</div><div class='add'>+  * "qcom,dsi-phy-28nm-hpm"</div><div class='add'>+  * "qcom,dsi-phy-28nm-lp"</div><div class='add'>+- reg: Physical base address and length of the registers of PLL, PHY and PHY</div><div class='add'>+  regulator</div><div class='add'>+- reg-names: The names of register regions. The following regions are required:</div><div class='add'>+  * "dsi_pll"</div><div class='add'>+  * "dsi_phy"</div><div class='add'>+  * "dsi_phy_regulator"</div><div class='add'>+- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should</div><div class='add'>+  be 0 or 1, since we have 2 DSI PHYs at most for now.</div><div class='add'>+- power-domains: Should be &lt;&amp;mmcc MDSS_GDSC&gt;.</div><div class='add'>+- clocks: device clocks</div><div class='add'>+  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names: the following clocks are required:</div><div class='add'>+  * "iface_clk"</div><div class='add'>+- vddio-supply: phandle to vdd-io regulator device node</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	mdss_dsi0: qcom,mdss_dsi@fd922800 {</div><div class='add'>+		compatible = "qcom,mdss-dsi-ctrl";</div><div class='add'>+		qcom,dsi-host-index = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mdss_mdp&gt;;</div><div class='add'>+		interrupts = &lt;4 0&gt;;</div><div class='add'>+		reg-names = "dsi_ctrl";</div><div class='add'>+		reg = &lt;0xfd922800 0x200&gt;;</div><div class='add'>+		power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='add'>+		clock-names =</div><div class='add'>+			"bus_clk",</div><div class='add'>+			"byte_clk",</div><div class='add'>+			"core_clk",</div><div class='add'>+			"core_mmss_clk",</div><div class='add'>+			"iface_clk",</div><div class='add'>+			"mdp_core_clk",</div><div class='add'>+			"pixel_clk";</div><div class='add'>+		clocks =</div><div class='add'>+			&lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MDSS_BYTE0_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MDSS_ESC0_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MMSS_MISC_AHB_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+			&lt;&amp;mmcc MDSS_PCLK0_CLK&gt;;</div><div class='add'>+		vdda-supply = &lt;&amp;pma8084_l2&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pma8084_l22&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,dsi-phy = &lt;&amp;mdss_dsi_phy0&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,dual-panel-mode;</div><div class='add'>+		qcom,master-panel;</div><div class='add'>+		qcom,sync-dual-panel;</div><div class='add'>+</div><div class='add'>+		panel: panel@0 {</div><div class='add'>+			compatible = "sharp,lq101r1sx01";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			link2 = &lt;&amp;secondary&gt;;</div><div class='add'>+</div><div class='add'>+			power-supply = &lt;...&gt;;</div><div class='add'>+			backlight = &lt;...&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mdss_dsi_phy0: qcom,mdss_dsi_phy@fd922a00 {</div><div class='add'>+		compatible = "qcom,dsi-phy-28nm-hpm";</div><div class='add'>+		qcom,dsi-phy-index = &lt;0&gt;;</div><div class='add'>+		reg-names =</div><div class='add'>+			"dsi_pll",</div><div class='add'>+			"dsi_phy",</div><div class='add'>+			"dsi_phy_regulator";</div><div class='add'>+		reg =   &lt;0xfd922a00 0xd4&gt;,</div><div class='add'>+			&lt;0xfd922b00 0x2b0&gt;,</div><div class='add'>+			&lt;0xfd922d80 0x7b&gt;;</div><div class='add'>+		clock-names = "iface_clk";</div><div class='add'>+		clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/msm/edp.txt b/Documentation/devicetree/bindings/drm/msm/edp.txt<br/>new file mode 100644<br/>index 000000000000..3a20f6ea5898<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/msm/edp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/edp.txt</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+Qualcomm Technologies Inc. adreno/snapdragon eDP output</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:</div><div class='add'>+  * "qcom,mdss-edp"</div><div class='add'>+- reg: Physical base address and length of the registers of controller and PLL</div><div class='add'>+- reg-names: The names of register regions. The following regions are required:</div><div class='add'>+  * "edp"</div><div class='add'>+  * "pll_base"</div><div class='add'>+- interrupts: The interrupt signal from the eDP block.</div><div class='add'>+- power-domains: Should be &lt;&amp;mmcc MDSS_GDSC&gt;.</div><div class='add'>+- clocks: device clocks</div><div class='add'>+  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names: the following clocks are required:</div><div class='add'>+  * "core_clk"</div><div class='add'>+  * "iface_clk"</div><div class='add'>+  * "mdp_core_clk"</div><div class='add'>+  * "pixel_clk"</div><div class='add'>+  * "link_clk"</div><div class='add'>+- #clock-cells: The value should be 1.</div><div class='add'>+- vdda-supply: phandle to vdda regulator device node</div><div class='add'>+- lvl-vdd-supply: phandle to regulator device node which is used to supply power</div><div class='add'>+  to HPD receiving chip</div><div class='add'>+- panel-en-gpios: GPIO pin to supply power to panel.</div><div class='add'>+- panel-hpd-gpios: GPIO pin used for eDP hpd.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- interrupt-parent: phandle to the MDP block if the interrupt signal is routed</div><div class='add'>+  through MDP block</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	mdss_edp: qcom,mdss_edp@fd923400 {</div><div class='add'>+			compatible = "qcom,mdss-edp";</div><div class='add'>+			reg-names =</div><div class='add'>+				"edp",</div><div class='add'>+				"pll_base";</div><div class='add'>+			reg =	&lt;0xfd923400 0x700&gt;,</div><div class='add'>+				&lt;0xfd923a00 0xd4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;mdss_mdp&gt;;</div><div class='add'>+			interrupts = &lt;12 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='add'>+			clock-names =</div><div class='add'>+				"core_clk",</div><div class='add'>+				"pixel_clk",</div><div class='add'>+				"iface_clk",</div><div class='add'>+				"link_clk",</div><div class='add'>+				"mdp_core_clk";</div><div class='add'>+			clocks =</div><div class='add'>+				&lt;&amp;mmcc MDSS_EDPAUX_CLK&gt;,</div><div class='add'>+				&lt;&amp;mmcc MDSS_EDPPIXEL_CLK&gt;,</div><div class='add'>+				&lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+				&lt;&amp;mmcc MDSS_EDPLINK_CLK&gt;,</div><div class='add'>+				&lt;&amp;mmcc MDSS_MDP_CLK&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			vdda-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+			lvl-vdd-supply = &lt;&amp;lvl_vreg&gt;;</div><div class='add'>+			panel-en-gpios = &lt;&amp;tlmm 137 0&gt;;</div><div class='add'>+			panel-hpd-gpios = &lt;&amp;tlmm 103 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/msm/hdmi.txt b/Documentation/devicetree/bindings/drm/msm/hdmi.txt<br/>index a29a55f3d937..c43aa53debed 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/msm/hdmi.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/drm/msm/hdmi.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/msm/hdmi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/msm/hdmi.txt</a></div><div class='hunk'>@@ -20,6 +20,9 @@ Required properties:</div><div class='ctx'> Optional properties:</div><div class='ctx'> - qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin</div><div class='ctx'> - qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin</div><div class='add'>+- pinctrl-names: the pin control state names; should contain "default"</div><div class='add'>+- pinctrl-0: the default pinctrl state (active)</div><div class='add'>+- pinctrl-1: the "sleep" pinctrl state</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -44,5 +47,8 @@ Example:</div><div class='ctx'> 		qcom,hdmi-tx-hpd = &lt;&amp;msmgpio 72 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		core-vdda-supply = &lt;&amp;pm8921_hdmi_mvs&gt;;</div><div class='ctx'> 		hdmi-mux-supply = &lt;&amp;ext_3p3v&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hpd_active  &amp;ddc_active  &amp;cec_active&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;hpd_suspend &amp;ddc_suspend &amp;cec_suspend&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/tilcdc/slave.txt b/Documentation/devicetree/bindings/drm/tilcdc/slave.txt<br/>deleted file mode 100644<br/>index 3d2c52460dca..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/tilcdc/slave.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/drm/tilcdc/slave.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Device-Tree bindings for tilcdc DRM encoder slave output driver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: value should be "ti,tilcdc,slave".</div><div class='del'>- - i2c: the phandle for the i2c device the encoder slave is connected to</div><div class='del'>-</div><div class='del'>-Recommended properties:</div><div class='del'>- - pinctrl-names, pinctrl-0: the pincontrol settings to configure</div><div class='del'>-   muxing properly for pins that connect to TFP410 device</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	hdmi {</div><div class='del'>-		compatible = "ti,tilcdc,slave";</div><div class='del'>-		i2c = &lt;&amp;i2c0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;nxp_hdmi_bonelt_pins&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt b/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt<br/>index fff10da5e927..2136ee81e061 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt</a></div><div class='hunk'>@@ -18,6 +18,12 @@ Optional properties:</div><div class='ctx'>  - max-pixelclock: The maximum pixel clock that can be supported</div><div class='ctx'>    by the lcd controller in KHz.</div><div class='ctx'> </div><div class='add'>+Optional nodes:</div><div class='add'>+</div><div class='add'>+ - port/ports: to describe a connection to an external encoder. The</div><div class='add'>+   binding follows Documentation/devicetree/bindings/graph.txt and</div><div class='add'>+   suppors a single port with a single endpoint.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	fb: fb@4830e000 {</div><div class='hunk'>@@ -26,4 +32,25 @@ Example:</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		interrupts = &lt;36&gt;;</div><div class='ctx'> 		ti,hwmods = "lcdc";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			lcdc_0: endpoint@0 {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tda19988: tda19988 {</div><div class='add'>+		compatible = "nxp,tda998x";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default", "off";</div><div class='add'>+		pinctrl-0 = &lt;&amp;nxp_hdmi_bonelt_pins&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;nxp_hdmi_bonelt_off_pins&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_0: endpoint@0 {</div><div class='add'>+				remote-endpoint = &lt;&amp;lcdc_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt b/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt<br/>new file mode 100644<br/>index 000000000000..78edb80002c8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/edac/apm-xgene-edac.txt</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+* APM X-Gene SoC EDAC node</div><div class='add'>+</div><div class='add'>+EDAC node is defined to describe on-chip error detection and correction.</div><div class='add'>+The follow error types are supported:</div><div class='add'>+</div><div class='add'>+  memory controller	- Memory controller</div><div class='add'>+  PMD (L1/L2)		- Processor module unit (PMD) L1/L2 cache</div><div class='add'>+</div><div class='add'>+The following section describes the EDAC DT node binding.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible		: Shall be "apm,xgene-edac".</div><div class='add'>+- regmap-csw		: Regmap of the CPU switch fabric (CSW) resource.</div><div class='add'>+- regmap-mcba		: Regmap of the MCB-A (memory bridge) resource.</div><div class='add'>+- regmap-mcbb		: Regmap of the MCB-B (memory bridge) resource.</div><div class='add'>+- regmap-efuse		: Regmap of the PMD efuse resource.</div><div class='add'>+- reg			: First resource shall be the CPU bus (PCP) resource.</div><div class='add'>+- interrupts            : Interrupt-specifier for MCU, PMD, L3, or SoC error</div><div class='add'>+			  IRQ(s).</div><div class='add'>+</div><div class='add'>+Required properties for memory controller subnode:</div><div class='add'>+- compatible		: Shall be "apm,xgene-edac-mc".</div><div class='add'>+- reg			: First resource shall be the memory controller unit</div><div class='add'>+                          (MCU) resource.</div><div class='add'>+- memory-controller	: Instance number of the memory controller.</div><div class='add'>+</div><div class='add'>+Required properties for PMD subnode:</div><div class='add'>+- compatible		: Shall be "apm,xgene-edac-pmd" or</div><div class='add'>+                          "apm,xgene-edac-pmd-v2".</div><div class='add'>+- reg			: First resource shall be the PMD resource.</div><div class='add'>+- pmd-controller	: Instance number of the PMD controller.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	csw: csw@7e200000 {</div><div class='add'>+		compatible = "apm,xgene-csw", "syscon";</div><div class='add'>+		reg = &lt;0x0 0x7e200000 0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcba: mcba@7e700000 {</div><div class='add'>+		compatible = "apm,xgene-mcb", "syscon";</div><div class='add'>+		reg = &lt;0x0 0x7e700000 0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcbb: mcbb@7e720000 {</div><div class='add'>+		compatible = "apm,xgene-mcb", "syscon";</div><div class='add'>+		reg = &lt;0x0 0x7e720000 0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	efuse: efuse@1054a000 {</div><div class='add'>+		compatible = "apm,xgene-efuse", "syscon";</div><div class='add'>+		reg = &lt;0x0 0x1054a000 0x0 0x20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edac@78800000 {</div><div class='add'>+		compatible = "apm,xgene-edac";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		regmap-csw = &lt;&amp;csw&gt;;</div><div class='add'>+		regmap-mcba = &lt;&amp;mcba&gt;;</div><div class='add'>+		regmap-mcbb = &lt;&amp;mcbb&gt;;</div><div class='add'>+		regmap-efuse = &lt;&amp;efuse&gt;;</div><div class='add'>+		reg = &lt;0x0 0x78800000 0x0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0x0 0x20 0x4&gt;,</div><div class='add'>+			     &lt;0x0 0x21 0x4&gt;,</div><div class='add'>+			     &lt;0x0 0x27 0x4&gt;;</div><div class='add'>+</div><div class='add'>+		edacmc@7e800000 {</div><div class='add'>+			compatible = "apm,xgene-edac-mc";</div><div class='add'>+			reg = &lt;0x0 0x7e800000 0x0 0x1000&gt;;</div><div class='add'>+			memory-controller = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edacpmd@7c000000 {</div><div class='add'>+			compatible = "apm,xgene-edac-pmd";</div><div class='add'>+			reg = &lt;0x0 0x7c000000 0x0 0x200000&gt;;</div><div class='add'>+			pmd-controller = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt<br/>index 23e1d3194174..41372d441131 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt</a></div><div class='hunk'>@@ -29,7 +29,7 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 	fuse@7000f800 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-efuse";</div><div class='del'>-		reg = &lt;0x7000F800 0x400&gt;,</div><div class='add'>+		reg = &lt;0x7000f800 0x400&gt;,</div><div class='ctx'> 		      &lt;0x70000000 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;tegra_car TEGRA20_CLK_FUSE&gt;;</div><div class='ctx'> 		clock-names = "fuse";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt b/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt<br/>new file mode 100644<br/>index 000000000000..435f1bcca341<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+Broadcom STB "UPG GIO" GPIO controller</div><div class='add'>+</div><div class='add'>+The controller's registers are organized as sets of eight 32-bit</div><div class='add'>+registers with each set controlling a bank of up to 32 pins.  A single</div><div class='add'>+interrupt is shared for all of the banks handled by the controller.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+    Must be "brcm,brcmstb-gpio"</div><div class='add'>+</div><div class='add'>+- reg:</div><div class='add'>+    Define the base and range of the I/O address space containing</div><div class='add'>+    the brcmstb GPIO controller registers</div><div class='add'>+</div><div class='add'>+- #gpio-cells:</div><div class='add'>+    Should be &lt;2&gt;.  The first cell is the pin number (within the controller's</div><div class='add'>+    pin space), and the second is used for the following:</div><div class='add'>+    bit[0]: polarity (0 for active-high, 1 for active-low)</div><div class='add'>+</div><div class='add'>+- gpio-controller:</div><div class='add'>+    Specifies that the node is a GPIO controller.</div><div class='add'>+</div><div class='add'>+- brcm,gpio-bank-widths:</div><div class='add'>+    Number of GPIO lines for each bank.  Number of elements must</div><div class='add'>+    correspond to number of banks suggested by the 'reg' property.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- interrupts:</div><div class='add'>+    The interrupt shared by all GPIO lines for this controller.</div><div class='add'>+</div><div class='add'>+- interrupt-parent:</div><div class='add'>+    phandle of the parent interrupt controller</div><div class='add'>+</div><div class='add'>+- #interrupt-cells:</div><div class='add'>+    Should be &lt;2&gt;.  The first cell is the GPIO number, the second should specify</div><div class='add'>+    flags.  The following subset of flags is supported:</div><div class='add'>+    - bits[3:0] trigger type and level flags</div><div class='add'>+        1 = low-to-high edge triggered</div><div class='add'>+        2 = high-to-low edge triggered</div><div class='add'>+        4 = active high level-sensitive</div><div class='add'>+        8 = active low level-sensitive</div><div class='add'>+      Valid combinations are 1, 2, 3, 4, 8.</div><div class='add'>+    See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt</div><div class='add'>+</div><div class='add'>+- interrupt-controller:</div><div class='add'>+    Marks the device node as an interrupt controller</div><div class='add'>+</div><div class='add'>+- interrupt-names:</div><div class='add'>+    The name of the IRQ resource used by this controller</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	upg_gio: gpio@f040a700 {</div><div class='add'>+		#gpio-cells = &lt;0x2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+		compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xf040a700 0x80&gt;;</div><div class='add'>+		interrupt-parent = &lt;0xf&gt;;</div><div class='add'>+		interrupts = &lt;0x6&gt;;</div><div class='add'>+		interrupt-names = "upg_gio";</div><div class='add'>+		brcm,gpio-bank-widths = &lt;0x20 0x20 0x20 0x18&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-ath79.txt b/Documentation/devicetree/bindings/gpio/gpio-ath79.txt<br/>new file mode 100644<br/>index 000000000000..c522851017ae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-ath79.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-ath79.txt</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9xxx GPIO controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: has to be "qca,&lt;soctype&gt;-gpio" and one of the following</div><div class='add'>+  fallbacks:</div><div class='add'>+  - "qca,ar7100-gpio"</div><div class='add'>+  - "qca,ar9340-gpio"</div><div class='add'>+- reg: Base address and size of the controllers memory area</div><div class='add'>+- gpio-controller : Marks the device node as a GPIO controller.</div><div class='add'>+- #gpio-cells : Should be two. The first cell is the pin number and the</div><div class='add'>+  second cell is used to specify optional parameters.</div><div class='add'>+- ngpios: Should be set to the number of GPIOs available on the SoC.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- interrupt-parent: phandle of the parent interrupt controller.</div><div class='add'>+- interrupts: Interrupt specifier for the controllers interrupt.</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller</div><div class='add'>+- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='add'>+		     source, should be 2</div><div class='add'>+</div><div class='add'>+Please refer to interrupts.txt in this directory for details of the common</div><div class='add'>+Interrupt Controllers bindings used by client devices.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gpio@18040000 {</div><div class='add'>+		compatible = "qca,ar9132-gpio", "qca,ar7100-gpio";</div><div class='add'>+		reg = &lt;0x18040000 0x30&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ngpios = &lt;22&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-atlas7.txt b/Documentation/devicetree/bindings/gpio/gpio-atlas7.txt<br/>new file mode 100644<br/>index 000000000000..d7e123fc90b5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-atlas7.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-atlas7.txt</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+CSR SiRFatlas7 GPIO controller bindings</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible	: "sirf,atlas7-gpio"</div><div class='add'>+- reg		: Address range of the pinctrl registers</div><div class='add'>+- interrupts	: Interrupts used by every GPIO group</div><div class='add'>+- gpio-banks	: How many gpio banks on this controller</div><div class='add'>+- gpio-controller : Indicates this device is a GPIO controller</div><div class='add'>+- interrupt-controller  : Marks the device node as an interrupt controller</div><div class='add'>+</div><div class='add'>+The GPIO controller also acts as an interrupt controller. It uses the default</div><div class='add'>+two cells specifier as described in Documentation/devicetree/bindings/</div><div class='add'>+interrupt-controller/interrupts.txt.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gpio_0: gpio_mediam@17040000 {</div><div class='add'>+		compatible = "sirf,atlas7-gpio";</div><div class='add'>+		reg = &lt;0x17040000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 13 0&gt;, &lt;0 14 0&gt;;</div><div class='add'>+</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+</div><div class='add'>+		gpio-banks = &lt;2&gt;;</div><div class='add'>+		gpio-ranges = &lt;&amp;pinctrl 0 0 0&gt;,</div><div class='add'>+				&lt;&amp;pinctrl 32 0 0&gt;;</div><div class='add'>+		gpio-ranges-group-names = "lvds_gpio_grp",</div><div class='add'>+					"uart_nand_gpio_grp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			gpios = &lt;&amp;gpio_1 15 0&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2 {</div><div class='add'>+			gpios = &lt;&amp;gpio_2 34 0&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Please refer to gpio.txt in this directory for details of the common</div><div class='add'>+gpio properties used by devices.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt b/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt<br/>new file mode 100644<br/>index 000000000000..abf4db736c6e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+Axis ETRAX FS General I/O controller bindings</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+  - "axis,etraxfs-gio"</div><div class='add'>+- reg: Physical base address and length of the controller's registers.</div><div class='add'>+- #gpio-cells: Should be 3</div><div class='add'>+  - The first cell is the gpio offset number.</div><div class='add'>+  - The second cell is reserved and is currently unused.</div><div class='add'>+  - The third cell is the port number (hex).</div><div class='add'>+- gpio-controller: Marks the device node as a GPIO controller.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gio: gpio@b001a000 {</div><div class='add'>+		compatible = "axis,etraxfs-gio";</div><div class='add'>+		reg = &lt;0xb001a000 0x1000&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;3&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-xlp.txt b/Documentation/devicetree/bindings/gpio/gpio-xlp.txt<br/>new file mode 100644<br/>index 000000000000..262ee4ddf2cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-xlp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-xlp.txt</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+Netlogic XLP Family GPIO</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+This GPIO driver is used for following Netlogic XLP SoCs:</div><div class='add'>+	XLP832, XLP316, XLP208, XLP980, XLP532</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+- compatible: Should be one of the following:</div><div class='add'>+  - "netlogic,xlp832-gpio": For Netlogic XLP832</div><div class='add'>+  - "netlogic,xlp316-gpio": For Netlogic XLP316</div><div class='add'>+  - "netlogic,xlp208-gpio": For Netlogic XLP208</div><div class='add'>+  - "netlogic,xlp980-gpio": For Netlogic XLP980</div><div class='add'>+  - "netlogic,xlp532-gpio": For Netlogic XLP532</div><div class='add'>+- reg: Physical base address and length of the controller's registers.</div><div class='add'>+- #gpio-cells: Should be two. The first cell is the pin number and the second</div><div class='add'>+  cell is used to specify optional parameters (currently unused).</div><div class='add'>+- gpio-controller: Marks the device node as a GPIO controller.</div><div class='add'>+- nr-gpios: Number of GPIO pins supported by the controller.</div><div class='add'>+- interrupt-cells: Should be two. The first cell is the GPIO Number. The</div><div class='add'>+  second cell is used to specify flags. The following subset of flags is</div><div class='add'>+  supported:</div><div class='add'>+  - trigger type:</div><div class='add'>+	1 = low to high edge triggered.</div><div class='add'>+	2 = high to low edge triggered.</div><div class='add'>+	4 = active high level-sensitive.</div><div class='add'>+	8 = active low level-sensitive.</div><div class='add'>+- interrupts: Interrupt number for this device.</div><div class='add'>+- interrupt-parent: phandle of the parent interrupt controller.</div><div class='add'>+- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gpio: xlp_gpio@34000 {</div><div class='add'>+		compatible = "netlogic,xlp316-gpio";</div><div class='add'>+		reg = &lt;0 0x34100 0x1000</div><div class='add'>+		       0 0x35100 0x1000&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		nr-gpios = &lt;57&gt;;</div><div class='add'>+</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+		interrupts = &lt;39&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.txt b/Documentation/devicetree/bindings/gpio/gpio-zynq.txt<br/>index 986371a4be2c..db4c6a663c03 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-zynq.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/gpio/gpio-zynq.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-zynq.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/gpio-zynq.txt</a></div><div class='hunk'>@@ -6,7 +6,7 @@ Required properties:</div><div class='ctx'> 			  - First cell is the GPIO line number</div><div class='ctx'> 			  - Second cell is used to specify optional</div><div class='ctx'> 			    parameters (unused)</div><div class='del'>-- compatible		: Should be "xlnx,zynq-gpio-1.0"</div><div class='add'>+- compatible		: Should be "xlnx,zynq-gpio-1.0" or "xlnx,zynqmp-gpio-1.0"</div><div class='ctx'> - clocks		: Clock specifier (see clock bindings for details)</div><div class='ctx'> - gpio-controller	: Marks the device node as a GPIO controller.</div><div class='ctx'> - interrupts		: Interrupt specifier (see interrupt bindings for</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt b/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt<br/>new file mode 100644<br/>index 000000000000..eb7cdd69e10b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+NXP LPC18xx/43xx GPIO controller Device Tree Bindings</div><div class='add'>+-----------------------------------------------------</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible		: Should be "nxp,lpc1850-gpio"</div><div class='add'>+- reg			: Address and length of the register set for the device</div><div class='add'>+- clocks		: Clock specifier (see clock bindings for details)</div><div class='add'>+- gpio-controller	: Marks the device node as a GPIO controller.</div><div class='add'>+- #gpio-cells 		: Should be two</div><div class='add'>+			  - First cell is the GPIO line number</div><div class='add'>+			  - Second cell is used to specify polarity</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- gpio-ranges		: Mapping between GPIO and pinctrl</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+#define LPC_GPIO(port, pin)	(port * 32 + pin)</div><div class='add'>+#define LPC_PIN(port, pin)	(0x##port * 32 + pin)</div><div class='add'>+</div><div class='add'>+gpio: gpio@400f4000 {</div><div class='add'>+	compatible = "nxp,lpc1850-gpio";</div><div class='add'>+	reg = &lt;0x400f4000 0x4000&gt;;</div><div class='add'>+	clocks = &lt;&amp;ccu1 CLK_CPU_GPIO&gt;;</div><div class='add'>+	gpio-controller;</div><div class='add'>+	#gpio-cells = &lt;2&gt;;</div><div class='add'>+	gpio-ranges =	&lt;&amp;pinctrl LPC_GPIO(0,0)  LPC_PIN(0,0)  2&gt;,</div><div class='add'>+			...</div><div class='add'>+			&lt;&amp;pinctrl LPC_GPIO(7,19) LPC_PIN(f,5)  7&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+gpio_joystick {</div><div class='add'>+	compatible = "gpio-keys-polled";</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	button@0 {</div><div class='add'>+		...</div><div class='add'>+		gpios = &lt;&amp;gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/h8300/cpu.txt b/Documentation/devicetree/bindings/h8300/cpu.txt<br/>new file mode 100644<br/>index 000000000000..70cd58608f4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/h8300/cpu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/h8300/cpu.txt</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+* H8/300 CPU bindings</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: Compatible property value should be "renesas,h8300".</div><div class='add'>+- clock-frequency: Contains the clock frequency for CPU, in Hz.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "renesas,h8300";</div><div class='add'>+			clock-frequency = &lt;20000000&gt;;</div><div class='add'>+		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/hwlock.txt b/Documentation/devicetree/bindings/hwlock/hwlock.txt<br/>new file mode 100644<br/>index 000000000000..085d1f5c916a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwlock/hwlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/hwlock.txt</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+Generic hwlock bindings</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+Generic bindings that are common to all the hwlock platform specific driver</div><div class='add'>+implementations.</div><div class='add'>+</div><div class='add'>+Please also look through the individual platform specific hwlock binding</div><div class='add'>+documentations for identifying any additional properties specific to that</div><div class='add'>+platform.</div><div class='add'>+</div><div class='add'>+hwlock providers:</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- #hwlock-cells:        Specifies the number of cells needed to represent a</div><div class='add'>+                        specific lock.</div><div class='add'>+</div><div class='add'>+hwlock users:</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+Consumers that require specific hwlock(s) should specify them using the</div><div class='add'>+property "hwlocks", and an optional "hwlock-names" property.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- hwlocks:              List of phandle to a hwlock provider node and an</div><div class='add'>+                        associated hwlock args specifier as indicated by</div><div class='add'>+                        #hwlock-cells. The list can have just a single hwlock</div><div class='add'>+                        or multiple hwlocks, with each hwlock represented by</div><div class='add'>+                        a phandle and a corresponding args specifier.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- hwlock-names:         List of hwlock name strings defined in the same order</div><div class='add'>+                        as the hwlocks, with one name per hwlock. Consumers can</div><div class='add'>+                        use the hwlock-names to match and get a specific hwlock.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1. Example of a node using a single specific hwlock:</div><div class='add'>+</div><div class='add'>+The following example has a node requesting a hwlock in the bank defined by</div><div class='add'>+the node hwlock1. hwlock1 is a hwlock provider with an argument specifier</div><div class='add'>+of length 1.</div><div class='add'>+</div><div class='add'>+	node {</div><div class='add'>+		...</div><div class='add'>+		hwlocks = &lt;&amp;hwlock1 2&gt;;</div><div class='add'>+		...</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+2. Example of a node using multiple specific hwlocks:</div><div class='add'>+</div><div class='add'>+The following example has a node requesting two hwlocks, a hwlock within</div><div class='add'>+the hwlock device node 'hwlock1' with #hwlock-cells value of 1, and another</div><div class='add'>+hwlock within the hwlock device node 'hwlock2' with #hwlock-cells value of 2.</div><div class='add'>+</div><div class='add'>+	node {</div><div class='add'>+		...</div><div class='add'>+		hwlocks = &lt;&amp;hwlock1 2&gt;, &lt;&amp;hwlock2 0 3&gt;;</div><div class='add'>+		...</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt<br/>new file mode 100644<br/>index 000000000000..2c9804f4f4ac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+OMAP4+ HwSpinlock Driver</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:		Should be "ti,omap4-hwspinlock" for</div><div class='add'>+			    OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs</div><div class='add'>+- reg:			Contains the hwspinlock module register address space</div><div class='add'>+			(base address and length)</div><div class='add'>+- ti,hwmods:		Name of the hwmod associated with the hwspinlock device</div><div class='add'>+- #hwlock-cells:	Should be 1. The OMAP hwspinlock users will use a</div><div class='add'>+			0-indexed relative hwlock number as the argument</div><div class='add'>+			specifier value for requesting a specific hwspinlock</div><div class='add'>+			within a hwspinlock bank.</div><div class='add'>+</div><div class='add'>+Please look at the generic hwlock binding for usage information for consumers,</div><div class='add'>+"Documentation/devicetree/bindings/hwlock/hwlock.txt"</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+/* OMAP4 */</div><div class='add'>+hwspinlock: spinlock@4a0f6000 {</div><div class='add'>+	compatible = "ti,omap4-hwspinlock";</div><div class='add'>+	reg = &lt;0x4a0f6000 0x1000&gt;;</div><div class='add'>+	ti,hwmods = "spinlock";</div><div class='add'>+	#hwlock-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt<br/>new file mode 100644<br/>index 000000000000..4563f524556b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+Qualcomm Hardware Mutex Block:</div><div class='add'>+</div><div class='add'>+The hardware block provides mutexes utilized between different processors on</div><div class='add'>+the SoC as part of the communication protocol used by these processors.</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+	Usage: required</div><div class='add'>+	Value type: &lt;string&gt;</div><div class='add'>+	Definition: must be one of:</div><div class='add'>+		    "qcom,sfpb-mutex",</div><div class='add'>+		    "qcom,tcsr-mutex"</div><div class='add'>+</div><div class='add'>+- syscon:</div><div class='add'>+	Usage: required</div><div class='add'>+	Value type: &lt;prop-encoded-array&gt;</div><div class='add'>+	Definition: one cell containing:</div><div class='add'>+		    syscon phandle</div><div class='add'>+		    offset of the hwmutex block within the syscon</div><div class='add'>+		    stride of the hwmutex registers</div><div class='add'>+</div><div class='add'>+- #hwlock-cells:</div><div class='add'>+	Usage: required</div><div class='add'>+	Value type: &lt;u32&gt;</div><div class='add'>+	Definition: must be 1, the specified cell represent the lock id</div><div class='add'>+		    (hwlock standard property, see hwlock.txt)</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	tcsr_mutex_block: syscon@fd484000 {</div><div class='add'>+		compatible = "syscon";</div><div class='add'>+		reg = &lt;0xfd484000 0x2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hwlock@fd484000 {</div><div class='add'>+		compatible = "qcom,tcsr-mutex";</div><div class='add'>+		syscon = &lt;&amp;tcsr_mutex_block 0 0x80&gt;;</div><div class='add'>+</div><div class='add'>+		#hwlock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt<br/>new file mode 100644<br/>index 000000000000..9bb1240a68e0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+SIRF Hardware spinlock device Binding</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+Required properties :</div><div class='add'>+- compatible : shall contain only one of the following:</div><div class='add'>+	"sirf,hwspinlock"</div><div class='add'>+</div><div class='add'>+- reg : the register address of hwspinlock</div><div class='add'>+</div><div class='add'>+- #hwlock-cells : hwlock users only use the hwlock id to represent a specific</div><div class='add'>+	hwlock, so the number of cells should be &lt;1&gt; here.</div><div class='add'>+</div><div class='add'>+Please look at the generic hwlock binding for usage information for consumers,</div><div class='add'>+"Documentation/devicetree/bindings/hwlock/hwlock.txt"</div><div class='add'>+</div><div class='add'>+Example of hwlock provider:</div><div class='add'>+	hwlock {</div><div class='add'>+		compatible = "sirf,hwspinlock";</div><div class='add'>+		reg = &lt;0x13240000 0x00010000&gt;;</div><div class='add'>+		#hwlock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Example of hwlock users:</div><div class='add'>+	node {</div><div class='add'>+		...</div><div class='add'>+		hwlocks = &lt;&amp;hwlock 2&gt;;</div><div class='add'>+		...</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt b/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt<br/>index fcca8e744f41..a04a80f9cc70 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt</a></div><div class='hunk'>@@ -9,6 +9,7 @@ Requires node properties:</div><div class='ctx'> 	"murata,ncp21wb473"</div><div class='ctx'> 	"murata,ncp03wb473"</div><div class='ctx'> 	"murata,ncp15wl333"</div><div class='add'>+	"murata,ncp03wf104"</div><div class='ctx'> </div><div class='ctx'> /* Usage of vendor name "ntc" is deprecated */</div><div class='ctx'> &lt;DEPRECATED&gt;	"ntc,ncp15wb473"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt b/Documentation/devicetree/bindings/i2c/i2c-at91.txt<br/>index 388f0a275fba..6e81dc153f3b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-at91.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/i2c/i2c-at91.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-at91.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-at91.txt</a></div><div class='hunk'>@@ -2,8 +2,8 @@ I2C for Atmel platforms</div><div class='ctx'> </div><div class='ctx'> Required properties :</div><div class='ctx'> - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",</div><div class='del'>-     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c"</div><div class='del'>-     or "atmel,at91sam9x5-i2c"</div><div class='add'>+     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",</div><div class='add'>+     "atmel,at91sam9x5-i2c" or "atmel,sama5d2-i2c"</div><div class='ctx'> - reg: physical base address of the controller and length of memory mapped</div><div class='ctx'>      region.</div><div class='ctx'> - interrupts: interrupt number to the cpu.</div><div class='hunk'>@@ -13,6 +13,10 @@ Required properties :</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000</div><div class='add'>+- dmas: A list of two dma specifiers, one for each entry in dma-names.</div><div class='add'>+- dma-names: should contain "tx" and "rx".</div><div class='add'>+- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='add'>+  capable I2C controllers.</div><div class='ctx'> - Child nodes conforming to i2c bus binding</div><div class='ctx'> </div><div class='ctx'> Examples :</div><div class='hunk'>@@ -32,3 +36,25 @@ i2c0: i2c@fff84000 {</div><div class='ctx'> 		pagesize = &lt;128&gt;;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+i2c0: i2c@f8034600 {</div><div class='add'>+	compatible = "atmel,sama5d2-i2c";</div><div class='add'>+	reg = &lt;0xf8034600 0x100&gt;;</div><div class='add'>+	interrupts = &lt;19 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+	dmas = &lt;&amp;dma0</div><div class='add'>+		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='add'>+		AT91_XDMAC_DT_PERID(11)&gt;,</div><div class='add'>+	       &lt;&amp;dma0</div><div class='add'>+		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='add'>+		AT91_XDMAC_DT_PERID(12)&gt;;</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clocks = &lt;&amp;flx0&gt;;</div><div class='add'>+	atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+	wm8731: wm8731@1a {</div><div class='add'>+		compatible = "wm8731";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt b/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt<br/>new file mode 100644<br/>index 000000000000..d6f724efdcf2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+Broadcom stb bsc iic master controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: should be "brcm,brcmstb-i2c"</div><div class='add'>+- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz</div><div class='add'>+		   valid values are 375000, 390000, 187500, 200000</div><div class='add'>+		   93750, 97500, 46875 and 50000</div><div class='add'>+- reg: specifies the base physical address and size of the registers</div><div class='add'>+</div><div class='add'>+Optional properties :</div><div class='add'>+</div><div class='add'>+- interrupt-parent: specifies the phandle to the parent interrupt controller</div><div class='add'>+  this one is cascaded from</div><div class='add'>+- interrupts: specifies the interrupt number, the irq line to be used</div><div class='add'>+- interrupt-names: Interrupt name string</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+bsca: i2c@f0406200 {</div><div class='add'>+      clock-frequency = &lt;390000&gt;;</div><div class='add'>+      compatible = "brcm,brcmstb-i2c";</div><div class='add'>+      interrupt-parent = &lt;&amp;irq0_intc&gt;;</div><div class='add'>+      reg = &lt;0xf0406200 0x58&gt;;</div><div class='add'>+      interrupts = &lt;0x18&gt;;</div><div class='add'>+      interrupt-names = "upg_bsca";</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt b/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt<br/>new file mode 100644<br/>index 000000000000..0ce6fa3242f0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-mt6577.txt</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+* Mediatek's I2C controller</div><div class='add'>+</div><div class='add'>+The Mediatek's I2C controller is used to interface with I2C devices.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible: value should be either of the following.</div><div class='add'>+      (a) "mediatek,mt6577-i2c", for i2c compatible with mt6577 i2c.</div><div class='add'>+      (b) "mediatek,mt6589-i2c", for i2c compatible with mt6589 i2c.</div><div class='add'>+      (c) "mediatek,mt8127-i2c", for i2c compatible with mt8127 i2c.</div><div class='add'>+      (d) "mediatek,mt8135-i2c", for i2c compatible with mt8135 i2c.</div><div class='add'>+      (e) "mediatek,mt8173-i2c", for i2c compatible with mt8173 i2c.</div><div class='add'>+  - reg: physical base address of the controller and dma base, length of memory</div><div class='add'>+    mapped region.</div><div class='add'>+  - interrupts: interrupt number to the cpu.</div><div class='add'>+  - clock-div: the fixed value for frequency divider of clock source in i2c</div><div class='add'>+    module. Each IC may be different.</div><div class='add'>+  - clocks: clock name from clock manager</div><div class='add'>+  - clock-names: Must include "main" and "dma", if enable have-pmic need include</div><div class='add'>+    "pmic" extra.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+  - clock-frequency: Frequency in Hz of the bus when transfer, the default value</div><div class='add'>+    is 100000.</div><div class='add'>+  - mediatek,have-pmic: platform can control i2c form special pmic side.</div><div class='add'>+    Only mt6589 and mt8135 support this feature.</div><div class='add'>+  - mediatek,use-push-pull: IO config use push-pull mode.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	i2c0: i2c@1100d000 {</div><div class='add'>+			compatible = "mediatek,mt6577-i2c";</div><div class='add'>+			reg = &lt;0x1100d000 0x70&gt;,</div><div class='add'>+			      &lt;0x11000300 0x80&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			mediatek,have-pmic;</div><div class='add'>+			clock-div = &lt;16&gt;;</div><div class='add'>+			clocks = &lt;&amp;i2c0_ck&gt;, &lt;&amp;ap_dma_ck&gt;;</div><div class='add'>+			clock-names = "main", "dma";</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt b/Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt<br/>new file mode 100644<br/>index 000000000000..f6b2c20cfbf6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/i2c-xgene-slimpro.txt</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+APM X-Gene SLIMpro Mailbox I2C Driver</div><div class='add'>+</div><div class='add'>+An I2C controller accessed over the "SLIMpro" mailbox.</div><div class='add'>+</div><div class='add'>+Required properties :</div><div class='add'>+</div><div class='add'>+ - compatible : should be "apm,xgene-slimpro-i2c"</div><div class='add'>+ - mboxes : use the label reference for the mailbox as the first parameter.</div><div class='add'>+	    The second parameter is the channel number.</div><div class='add'>+</div><div class='add'>+Example :</div><div class='add'>+	i2cslimpro {</div><div class='add'>+		compatible = "apm,xgene-slimpro-i2c";</div><div class='add'>+		mboxes = &lt;&amp;mailbox 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt<br/>index ad0c4ac916dd..00f8652e193a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/trivial-devices.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/i2c/trivial-devices.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/trivial-devices.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/i2c/trivial-devices.txt</a></div><div class='hunk'>@@ -19,8 +19,7 @@ adi,adt7475		+/-1C TDM Extended Temp Range I.C</div><div class='ctx'> adi,adt7476		+/-1C TDM Extended Temp Range I.C</div><div class='ctx'> adi,adt7490		+/-1C TDM Extended Temp Range I.C</div><div class='ctx'> adi,adxl345		Three-Axis Digital Accelerometer</div><div class='del'>-adi,adxl346		Three-Axis Digital Accelerometer</div><div class='del'>-adi,adxl34x		Three-Axis Digital Accelerometer</div><div class='add'>+adi,adxl346		Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)</div><div class='ctx'> at,24c08		i2c serial eeprom  (24cxx)</div><div class='ctx'> atmel,24c00		i2c serial eeprom  (24cxx)</div><div class='ctx'> atmel,24c01		i2c serial eeprom  (24cxx)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt b/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt<br/>new file mode 100644<br/>index 000000000000..908334c6b07f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+* Berlin Analog to Digital Converter (ADC)</div><div class='add'>+</div><div class='add'>+The Berlin ADC has 8 channels, with one connected to a temperature sensor.</div><div class='add'>+It is part of the system controller register set. The ADC node should be a</div><div class='add'>+sub-node of the system controller node.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "marvell,berlin2-adc"</div><div class='add'>+- interrupts: the interrupts for the ADC and the temperature sensor</div><div class='add'>+- interrupt-names: should be "adc" and "tsen"</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+adc: adc {</div><div class='add'>+	compatible = "marvell,berlin2-adc";</div><div class='add'>+	interrupt-parent = &lt;&amp;sic&gt;;</div><div class='add'>+	interrupts = &lt;12&gt;, &lt;14&gt;;</div><div class='add'>+	interrupt-names = "adc", "tsen";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt<br/>index 42ca7deec97d..15ca6b47958e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='del'>-* Texas Instruments' ADC128S052 ADC chip</div><div class='add'>+* Texas Instruments' ADC128S052 and ADC122S021 ADC chip</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>- - compatible: Should be "ti,adc128s052"</div><div class='add'>+ - compatible: Should be "ti,adc128s052" or "ti,adc122s021"</div><div class='ctx'>  - reg: spi chip select number for the device</div><div class='ctx'>  - vref-supply: The regulator supply for ADC reference voltage</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt<br/>index 1a4a43d5c9ea..3eb40e20c143 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/iio/adc/vf610-adc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/adc/vf610-adc.txt</a></div><div class='hunk'>@@ -11,6 +11,13 @@ Required properties:</div><div class='ctx'> - clock-names: Must contain "adc", matching entry in the clocks property.</div><div class='ctx'> - vref-supply: The regulator supply ADC reference voltage.</div><div class='ctx'> </div><div class='add'>+Recommended properties:</div><div class='add'>+- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating</div><div class='add'>+  requirements. Three values are required, depending on conversion mode:</div><div class='add'>+  - Frequency in normal mode (ADLPC=0, ADHSC=0)</div><div class='add'>+  - Frequency in high-speed mode (ADLPC=0, ADHSC=1)</div><div class='add'>+  - Frequency in low-power mode (ADLPC=1, ADHSC=0)</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> adc0: adc@4003b000 {</div><div class='ctx'> 	compatible = "fsl,vf610-adc";</div><div class='hunk'>@@ -18,5 +25,7 @@ adc0: adc@4003b000 {</div><div class='ctx'> 	interrupts = &lt;0 53 0x04&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clks VF610_CLK_ADC0&gt;;</div><div class='ctx'> 	clock-names = "adc";</div><div class='add'>+	fsl,adck-max-frequency = &lt;30000000&gt;, &lt;40000000&gt;,</div><div class='add'>+				&lt;20000000&gt;;</div><div class='ctx'> 	vref-supply = &lt;&amp;reg_vcc_3v3_mcu&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt<br/>new file mode 100644<br/>index 000000000000..e4d8f1c52f4a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device</div><div class='add'>+</div><div class='add'>+http://www.invensense.com/mems/gyro/mpu6050.html</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+ - compatible : should be "invensense,mpu6050"</div><div class='add'>+ - reg : the I2C address of the sensor</div><div class='add'>+ - interrupt-parent : should be the phandle for the interrupt controller</div><div class='add'>+ - interrupts : interrupt mapping for GPIO IRQ</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	mpu6050@68 {</div><div class='add'>+		compatible = "invensense,mpu6050";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;18 1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt b/Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt<br/>new file mode 100644<br/>index 000000000000..9f263b7df162<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+* Bosch BMC150 magnetometer sensor</div><div class='add'>+</div><div class='add'>+http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-04.pdf</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+  - compatible : should be "bosch,bmc150_magn"</div><div class='add'>+  - reg : the I2C address of the magnetometer</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+  - interrupt-parent : phandle to the parent interrupt controller</div><div class='add'>+  - interrupts : interrupt mapping for GPIO IRQ</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+bmc150_magn@12 {</div><div class='add'>+        compatible = "bosch,bmc150_magn";</div><div class='add'>+        reg = &lt;0x12&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+        interrupts = &lt;0 1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/st-sensors.txt b/Documentation/devicetree/bindings/iio/st-sensors.txt<br/>index d2aaca974531..8a6be3bdf267 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/st-sensors.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/iio/st-sensors.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/st-sensors.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/st-sensors.txt</a></div><div class='hunk'>@@ -30,6 +30,7 @@ Accelerometers:</div><div class='ctx'> - st,lsm330d-accel</div><div class='ctx'> - st,lsm330dl-accel</div><div class='ctx'> - st,lsm330dlc-accel</div><div class='add'>+- st,lis331dl-accel</div><div class='ctx'> - st,lis331dlh-accel</div><div class='ctx'> - st,lsm303dl-accel</div><div class='ctx'> - st,lsm303dlm-accel</div><div class='hunk'>@@ -45,6 +46,7 @@ Gyroscopes:</div><div class='ctx'> - st,lsm330-gyro</div><div class='ctx'> </div><div class='ctx'> Magnetometers:</div><div class='add'>+- st,lsm303dlh-magn</div><div class='ctx'> - st,lsm303dlhc-magn</div><div class='ctx'> - st,lsm303dlm-magn</div><div class='ctx'> - st,lis3mdl-magn</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/mlx90614.txt b/Documentation/devicetree/bindings/iio/temperature/mlx90614.txt<br/>new file mode 100644<br/>index 000000000000..9be57b036092<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iio/temperature/mlx90614.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iio/temperature/mlx90614.txt</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+* Melexis MLX90614 contactless IR temperature sensor</div><div class='add'>+</div><div class='add'>+http://melexis.com/Infrared-Thermometer-Sensors/Infrared-Thermometer-Sensors/MLX90614-615.aspx</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+  - compatible: should be "melexis,mlx90614"</div><div class='add'>+  - reg: the I2C address of the sensor</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+  - wakeup-gpios: device tree identifier of the GPIO connected to the SDA line</div><div class='add'>+      to hold low in order to wake up the device.  In normal operation, the</div><div class='add'>+      GPIO is set as input and will not interfere in I2C communication.  There</div><div class='add'>+      is no need for a GPIO driving the SCL line.  If no GPIO is given, power</div><div class='add'>+      management is disabled.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+mlx90614@5a {</div><div class='add'>+	compatible = "melexis,mlx90614";</div><div class='add'>+	reg = &lt;0x5a&gt;;</div><div class='add'>+	wakeup-gpios = &lt;&amp;gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ti,drv2665.txt b/Documentation/devicetree/bindings/input/ti,drv2665.txt<br/>new file mode 100644<br/>index 000000000000..1ba97ac04305<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/ti,drv2665.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/input/ti,drv2665.txt</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+* Texas Instruments - drv2665 Haptics driver</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+	- compatible - "ti,drv2665" - DRV2665</div><div class='add'>+	- reg -  I2C slave address</div><div class='add'>+	- vbat-supply - Required supply regulator</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+haptics: haptics@59 {</div><div class='add'>+	compatible = "ti,drv2665";</div><div class='add'>+	reg = &lt;0x59&gt;;</div><div class='add'>+	vbat-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+For more product information please see the link below:</div><div class='add'>+http://www.ti.com/product/drv2665</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt b/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt<br/>index 6c4fb34823d3..b1163bf97146 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt</a></div><div class='hunk'>@@ -42,6 +42,27 @@ Optional properties:</div><div class='ctx'> 			 hardware knob for adjusting the amount of "settling</div><div class='ctx'> 			 time".</div><div class='ctx'> </div><div class='add'>+- child "adc"</div><div class='add'>+	ti,chan-step-opendelay: List of open delays for each channel of</div><div class='add'>+				ADC in the order of ti,adc-channels. The</div><div class='add'>+				value corresponds to the number of ADC</div><div class='add'>+				clock cycles to wait after applying the</div><div class='add'>+				step configuration registers and before</div><div class='add'>+				sending the start of ADC conversion.</div><div class='add'>+				Maximum value is 0x3FFFF.</div><div class='add'>+       ti,chan-step-sampledelay: List of sample delays for each channel</div><div class='add'>+				  of ADC in the order of ti,adc-channels.</div><div class='add'>+				  The value corresponds to the number of</div><div class='add'>+				  ADC clock cycles to sample (to hold</div><div class='add'>+				  start of conversion high).</div><div class='add'>+				  Maximum value is 0xFF.</div><div class='add'>+       ti,chan-step-avg: Number of averages to be performed for each</div><div class='add'>+			  channel of ADC. If average is 16 then input</div><div class='add'>+			  is sampled 16 times and averaged to get more</div><div class='add'>+			  accurate value. This increases the time taken</div><div class='add'>+			  by ADC to generate a sample. Valid range is 0</div><div class='add'>+			  average to 16 averages. Maximum value is 16.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> 	tscadc: tscadc@44e0d000 {</div><div class='ctx'> 		compatible = "ti,am3359-tscadc";</div><div class='hunk'>@@ -55,5 +76,8 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='ctx'> 			ti,adc-channels = &lt;4 5 6 7&gt;;</div><div class='add'>+			ti,chan-step-opendelay = &lt;0x098 0x3ffff 0x098 0x0&gt;;</div><div class='add'>+			ti,chan-step-sampledelay = &lt;0xff 0x0 0xf 0x0&gt;;</div><div class='add'>+			ti,chan-step-avg = &lt;16 2 4 8&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt<br/>index f292917fa00d..0e9f09a6a2fe 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: Should be "atmel,&lt;chip&gt;-aic"</div><div class='del'>-  &lt;chip&gt; can be "at91rm9200", "sama5d3" or "sama5d4"</div><div class='add'>+  &lt;chip&gt; can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4"</div><div class='ctx'> - interrupt-controller: Identifies the node as an interrupt controller.</div><div class='ctx'> - interrupt-parent: For single AIC system, it is an empty property.</div><div class='ctx'> - #interrupt-cells: The number of cells to define the interrupts. It should be 3.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt<br/>new file mode 100644<br/>index 000000000000..5f89fb635a1b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+Ingenic SoC Interrupt Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible : should be "ingenic,&lt;socname&gt;-intc". Valid strings are:</div><div class='add'>+    ingenic,jz4740-intc</div><div class='add'>+    ingenic,jz4770-intc</div><div class='add'>+    ingenic,jz4775-intc</div><div class='add'>+    ingenic,jz4780-intc</div><div class='add'>+- reg : Specifies base physical address and size of the registers.</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller</div><div class='add'>+- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='add'>+  interrupt source. The value shall be 1.</div><div class='add'>+- interrupt-parent : phandle of the CPU interrupt controller.</div><div class='add'>+- interrupts : Specifies the CPU interrupt the controller is connected to.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+intc: interrupt-controller@10001000 {</div><div class='add'>+	compatible = "ingenic,jz4740-intc";</div><div class='add'>+	reg = &lt;0x10001000 0x14&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-controller;</div><div class='add'>+	#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+	interrupts = &lt;2&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt<br/>new file mode 100644<br/>index 000000000000..aabce7810d29<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9XXX CPU interrupt controller</div><div class='add'>+</div><div class='add'>+On most SoC the IRQ controller need to flush the DDR FIFO before running</div><div class='add'>+the interrupt handler of some devices. This is configured using the</div><div class='add'>+qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+- compatible: has to be "qca,&lt;soctype&gt;-cpu-intc", "qca,ar7100-cpu-intc"</div><div class='add'>+  as fallback</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller</div><div class='add'>+- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='add'>+		     source, should be 1 for intc</div><div class='add'>+</div><div class='add'>+Please refer to interrupts.txt in this directory for details of the common</div><div class='add'>+Interrupt Controllers bindings used by client devices.</div><div class='add'>+</div><div class='add'>+Optional Properties:</div><div class='add'>+</div><div class='add'>+- qca,ddr-wb-channel-interrupts: List of the interrupts needing a write</div><div class='add'>+  buffer flush</div><div class='add'>+- qca,ddr-wb-channels: List of phandles to the write buffer channels for</div><div class='add'>+  each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt</div><div class='add'>+  default to the entry's index.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	interrupt-controller {</div><div class='add'>+		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		qca,ddr-wb-channel-interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='add'>+		qca,ddr-wb-channels = &lt;&amp;ddr_ctrl 3&gt;, &lt;&amp;ddr_ctrl 2&gt;,</div><div class='add'>+					&lt;&amp;ddr_ctrl 0&gt;, &lt;&amp;ddr_ctrl 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	ddr_ctrl: memory-controller@18000000 {</div><div class='add'>+		...</div><div class='add'>+		#qca,ddr-wb-channel-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt<br/>new file mode 100644<br/>index 000000000000..391717a68f3b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller</div><div class='add'>+</div><div class='add'>+The MISC interrupt controller is a secondary controller for lower priority</div><div class='add'>+interrupt.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+- compatible: has to be "qca,&lt;soctype&gt;-cpu-intc", "qca,ar7100-misc-intc"</div><div class='add'>+  as fallback</div><div class='add'>+- reg: Base address and size of the controllers memory area</div><div class='add'>+- interrupt-parent: phandle of the parent interrupt controller.</div><div class='add'>+- interrupts: Interrupt specifier for the controllers interrupt.</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller</div><div class='add'>+- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='add'>+		     source, should be 1</div><div class='add'>+</div><div class='add'>+Please refer to interrupts.txt in this directory for details of the common</div><div class='add'>+Interrupt Controllers bindings used by client devices.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	interrupt-controller@18060010 {</div><div class='add'>+		compatible = "qca,ar9132-misc-intc", qca,ar7100-misc-intc";</div><div class='add'>+		reg = &lt;0x18060010 0x4&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+		interrupts = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt<br/>new file mode 100644<br/>index 000000000000..56e8d82aff34<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+* H8/300H Interrupt controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: has to be "renesas,h8300h-intc", "renesas,h8300-intc" as fallback.</div><div class='add'>+- #interrupt-cells: has to be &lt;2&gt;: an interrupt index and flags, as defined in</div><div class='add'>+  interrupts.txt in this directory</div><div class='add'>+- regs: Base address of interrupt controller registers.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- any properties, listed in interrupts.txt, and any standard resource allocation</div><div class='add'>+  properties</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	h8intc: interrupt-controller@fee012 {</div><div class='add'>+		compatible = "renesas,h8300h-intc", "renesas,h8300-intc";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xfee012 7&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt<br/>new file mode 100644<br/>index 000000000000..faded2b1559b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+* H8S Interrupt controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: has to be "renesas,h8s-intc", "renesas,h8300-intc" as fallback.</div><div class='add'>+- #interrupt-cells: has to be &lt;2&gt;: an interrupt index and flags, as defined in</div><div class='add'>+  interrupts.txt in this directory</div><div class='add'>+- regs: Base address of interrupt controller registers.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- any properties, listed in interrupts.txt, and any standard resource allocation</div><div class='add'>+  properties</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	h8intc: interrupt-controller@fffe00 {</div><div class='add'>+		compatible = "renesas,h8s-intc", "renesas,h8300-intc";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xfffe00 24&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt<br/>index 4f7946ae8adc..772c550d3b4b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt</a></div><div class='hunk'>@@ -13,9 +13,12 @@ Required properties:</div><div class='ctx'> - reg: Base address and length of each register bank used by the external</div><div class='ctx'>   IRQ pins driven by the interrupt controller hardware module. The base</div><div class='ctx'>   addresses, length and number of required register banks varies with soctype.</div><div class='del'>-</div><div class='add'>+- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='ctx'> - #interrupt-cells: has to be &lt;2&gt;: an interrupt index and flags, as defined in</div><div class='del'>-  interrupts.txt in this directory</div><div class='add'>+  interrupts.txt in this directory.</div><div class='add'>+- interrupts: Must contain a list of interrupt specifiers. For each interrupt</div><div class='add'>+  provided by this irqpin controller instance, there must be one entry,</div><div class='add'>+  referring to the corresponding parent interrupt.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> </div><div class='hunk'>@@ -25,3 +28,35 @@ Optional properties:</div><div class='ctx'>   if different from the default 4 bits</div><div class='ctx'> - control-parent: disable and enable interrupts on the parent interrupt</div><div class='ctx'>   controller, needed for some broken implementations</div><div class='add'>+- clocks: Must contain a reference to the functional clock.  This property is</div><div class='add'>+  mandatory if the hardware implements a controllable functional clock for</div><div class='add'>+  the irqpin controller instance.</div><div class='add'>+- power-domains: Must contain a reference to the power domain. This property is</div><div class='add'>+  mandatory if the irqpin controller instance is part of a controllable power</div><div class='add'>+  domain.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+	irqpin1: interrupt-controller@e6900004 {</div><div class='add'>+		compatible = "renesas,intc-irqpin-r8a7740",</div><div class='add'>+			     "renesas,intc-irqpin";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xe6900004 4&gt;,</div><div class='add'>+			&lt;0xe6900014 4&gt;,</div><div class='add'>+			&lt;0xe6900024 1&gt;,</div><div class='add'>+			&lt;0xe6900044 1&gt;,</div><div class='add'>+			&lt;0xe6900064 1&gt;;</div><div class='add'>+		interrupts = &lt;0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 149 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp2_clks R8A7740_CLK_INTCA&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_a4s&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt<br/>new file mode 100644<br/>index 000000000000..c03eec116872<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+* ARM SMMUv3 Architecture Implementation</div><div class='add'>+</div><div class='add'>+The SMMUv3 architecture is a significant deparature from previous</div><div class='add'>+revisions, replacing the MMIO register interface with in-memory command</div><div class='add'>+and event queues and adding support for the ATS and PRI components of</div><div class='add'>+the PCIe specification.</div><div class='add'>+</div><div class='add'>+** SMMUv3 required properties:</div><div class='add'>+</div><div class='add'>+- compatible        : Should include:</div><div class='add'>+</div><div class='add'>+                      * "arm,smmu-v3" for any SMMUv3 compliant</div><div class='add'>+                        implementation. This entry should be last in the</div><div class='add'>+                        compatible list.</div><div class='add'>+</div><div class='add'>+- reg               : Base address and size of the SMMU.</div><div class='add'>+</div><div class='add'>+- interrupts        : Non-secure interrupt list describing the wired</div><div class='add'>+                      interrupt sources corresponding to entries in</div><div class='add'>+                      interrupt-names. If no wired interrupts are</div><div class='add'>+                      present then this property may be omitted.</div><div class='add'>+</div><div class='add'>+- interrupt-names   : When the interrupts property is present, should</div><div class='add'>+                      include the following:</div><div class='add'>+                      * "eventq"    - Event Queue not empty</div><div class='add'>+                      * "priq"      - PRI Queue not empty</div><div class='add'>+                      * "cmdq-sync" - CMD_SYNC complete</div><div class='add'>+                      * "gerror"    - Global Error activated</div><div class='add'>+</div><div class='add'>+** SMMUv3 optional properties:</div><div class='add'>+</div><div class='add'>+- dma-coherent      : Present if DMA operations made by the SMMU (page</div><div class='add'>+                      table walks, stream table accesses etc) are cache</div><div class='add'>+                      coherent with the CPU.</div><div class='add'>+</div><div class='add'>+                      NOTE: this only applies to the SMMU itself, not</div><div class='add'>+                      masters connected upstream of the SMMU.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-aat1290.txt b/Documentation/devicetree/bindings/leds/leds-aat1290.txt<br/>new file mode 100644<br/>index 000000000000..c05ed91a4e42<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/leds/leds-aat1290.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-aat1290.txt</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+* Skyworks Solutions, Inc. AAT1290 Current Regulator for Flash LEDs</div><div class='add'>+</div><div class='add'>+The device is controlled through two pins: FL_EN and EN_SET. The pins when,</div><div class='add'>+asserted high, enable flash strobe and movie mode (max 1/2 of flash current)</div><div class='add'>+respectively. In order to add a capability of selecting the strobe signal source</div><div class='add'>+(e.g. CPU or camera sensor) there is an additional switch required, independent</div><div class='add'>+of the flash chip. The switch is controlled with pin control.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible : Must be "skyworks,aat1290".</div><div class='add'>+- flen-gpios : Must be device tree identifier of the flash device FL_EN pin.</div><div class='add'>+- enset-gpios : Must be device tree identifier of the flash device EN_SET pin.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- pinctrl-names : Must contain entries: "default", "host", "isp". Entries</div><div class='add'>+		"default" and "host" must refer to the same pin configuration</div><div class='add'>+		node, which sets the host as a strobe signal provider. Entry</div><div class='add'>+		"isp" must refer to the pin configuration node, which sets the</div><div class='add'>+		ISP as a strobe signal provider.</div><div class='add'>+</div><div class='add'>+A discrete LED element connected to the device must be represented by a child</div><div class='add'>+node - see Documentation/devicetree/bindings/leds/common.txt.</div><div class='add'>+</div><div class='add'>+Required properties of the LED child node:</div><div class='add'>+- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+                       Maximum flash LED supply current can be calculated using</div><div class='add'>+                       following formula: I = 1A * 162kohm / Rset.</div><div class='add'>+- flash-timeout-us : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+                     Maximum flash timeout can be calculated using following</div><div class='add'>+                     formula: T = 8.82 * 10^9 * Ct.</div><div class='add'>+</div><div class='add'>+Optional properties of the LED child node:</div><div class='add'>+- label : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Example (by Ct = 220nF, Rset = 160kohm and exynos4412-trats2 board with</div><div class='add'>+a switch that allows for routing strobe signal either from the host or from</div><div class='add'>+the camera sensor):</div><div class='add'>+</div><div class='add'>+#include "exynos4412.dtsi"</div><div class='add'>+</div><div class='add'>+aat1290 {</div><div class='add'>+	compatible = "skyworks,aat1290";</div><div class='add'>+	flen-gpios = &lt;&amp;gpj1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	enset-gpios = &lt;&amp;gpj1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default", "host", "isp";</div><div class='add'>+	pinctrl-0 = &lt;&amp;camera_flash_host&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;camera_flash_host&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;camera_flash_isp&gt;;</div><div class='add'>+</div><div class='add'>+	camera_flash: flash-led {</div><div class='add'>+		label = "aat1290-flash";</div><div class='add'>+		led-max-microamp = &lt;520833&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1012500&gt;;</div><div class='add'>+		flash-timeout-us = &lt;1940000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	camera_flash_host: camera-flash-host {</div><div class='add'>+		samsung,pins = "gpj1-0";</div><div class='add'>+		samsung,pin-function = &lt;1&gt;;</div><div class='add'>+		samsung,pin-val = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	camera_flash_isp: camera-flash-isp {</div><div class='add'>+		samsung,pins = "gpj1-0";</div><div class='add'>+		samsung,pin-function = &lt;1&gt;;</div><div class='add'>+		samsung,pin-val = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-bcm6328.txt b/Documentation/devicetree/bindings/leds/leds-bcm6328.txt<br/>new file mode 100644<br/>index 000000000000..f9e36adc0ebf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/leds/leds-bcm6328.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-bcm6328.txt</a></div><div class='hunk'>@@ -0,0 +1,309 @@</div><div class='add'>+LEDs connected to Broadcom BCM6328 controller</div><div class='add'>+</div><div class='add'>+This controller is present on BCM6318, BCM6328, BCM6362 and BCM63268.</div><div class='add'>+In these SoCs it's possible to control LEDs both as GPIOs or by hardware.</div><div class='add'>+However, on some devices there are Serial LEDs (LEDs connected to a 74x164</div><div class='add'>+controller), which can either be controlled by software (exporting the 74x164</div><div class='add'>+as spi-gpio. See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or</div><div class='add'>+by hardware using this driver.</div><div class='add'>+Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and</div><div class='add'>+exporting the 74x164 as spi-gpio prevents those LEDs to be hardware</div><div class='add'>+controlled, so the only chance to keep them working is by using this driver.</div><div class='add'>+</div><div class='add'>+BCM6328 LED controller has a HWDIS register, which controls whether a LED</div><div class='add'>+should be controlled by a hardware signal instead of the MODE register value,</div><div class='add'>+with 0 meaning hardware control enabled and 1 hardware control disabled. This</div><div class='add'>+is usually 1:1 for hardware to LED signals, but through the activity/link</div><div class='add'>+registers you have some limited control over rerouting the LEDs (as</div><div class='add'>+explained later in brcm,link-signal-sources). Even if a LED is hardware</div><div class='add'>+controlled you are still able to make it blink or light it up if it isn't,</div><div class='add'>+but you can't turn it off if the hardware decides to light it up. For this</div><div class='add'>+reason, hardware controlled LEDs aren't registered as LED class devices.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible : should be "brcm,bcm6328-leds".</div><div class='add'>+  - #address-cells : must be 1.</div><div class='add'>+  - #size-cells : must be 0.</div><div class='add'>+  - reg : BCM6328 LED controller address and size.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+  - brcm,serial-leds : Boolean, enables Serial LEDs.</div><div class='add'>+    Default : false</div><div class='add'>+</div><div class='add'>+Each LED is represented as a sub-node of the brcm,bcm6328-leds device.</div><div class='add'>+</div><div class='add'>+LED sub-node required properties:</div><div class='add'>+  - reg : LED pin number (only LEDs 0 to 23 are valid).</div><div class='add'>+</div><div class='add'>+LED sub-node optional properties:</div><div class='add'>+  a) Optional properties for sub-nodes related to software controlled LEDs:</div><div class='add'>+    - label : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+    - active-low : Boolean, makes LED active low.</div><div class='add'>+      Default : false</div><div class='add'>+    - default-state : see</div><div class='add'>+      Documentation/devicetree/bindings/leds/leds-gpio.txt</div><div class='add'>+    - linux,default-trigger : see</div><div class='add'>+      Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+  b) Optional properties for sub-nodes related to hardware controlled LEDs:</div><div class='add'>+    - brcm,hardware-controlled : Boolean, makes this LED hardware controlled.</div><div class='add'>+      Default : false</div><div class='add'>+    - brcm,link-signal-sources : An array of hardware link</div><div class='add'>+      signal sources. Up to four link hardware signals can get muxed into</div><div class='add'>+      these LEDs. Only valid for LEDs 0 to 7, where LED signals 0 to 3 may</div><div class='add'>+      be muxed to LEDs 0 to 3, and signals 4 to 7 may be muxed to LEDs</div><div class='add'>+      4 to 7. A signal can be muxed to more than one LED, and one LED can</div><div class='add'>+      have more than one source signal.</div><div class='add'>+    - brcm,activity-signal-sources : An array of hardware activity</div><div class='add'>+      signal sources. Up to four activity hardware signals can get muxed into</div><div class='add'>+      these LEDs. Only valid for LEDs 0 to 7, where LED signals 0 to 3 may</div><div class='add'>+      be muxed to LEDs 0 to 3, and signals 4 to 7 may be muxed to LEDs</div><div class='add'>+      4 to 7. A signal can be muxed to more than one LED, and one LED can</div><div class='add'>+      have more than one source signal.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+Scenario 1 : BCM6328 with 4 EPHY LEDs</div><div class='add'>+	leds0: led-controller@10000800 {</div><div class='add'>+		compatible = "brcm,bcm6328-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x10000800 0x24&gt;;</div><div class='add'>+</div><div class='add'>+		alarm_red@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:alarm";</div><div class='add'>+		};</div><div class='add'>+		inet_green@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:inet";</div><div class='add'>+		};</div><div class='add'>+		power_green@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+		ephy0_spd@17 {</div><div class='add'>+			reg = &lt;17&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy1_spd@18 {</div><div class='add'>+			reg = &lt;18&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy2_spd@19 {</div><div class='add'>+			reg = &lt;19&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy3_spd@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Scenario 2 : BCM63268 with Serial/GPHY0 LEDs</div><div class='add'>+	leds0: led-controller@10001900 {</div><div class='add'>+		compatible = "brcm,bcm6328-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x10001900 0x24&gt;;</div><div class='add'>+		brcm,serial-leds;</div><div class='add'>+</div><div class='add'>+		gphy0_spd0@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		gphy0_spd1@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+		inet_red@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:inet";</div><div class='add'>+		};</div><div class='add'>+		dsl_green@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:dsl";</div><div class='add'>+		};</div><div class='add'>+		usb_green@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:usb";</div><div class='add'>+		};</div><div class='add'>+		wps_green@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:wps";</div><div class='add'>+		};</div><div class='add'>+		inet_green@8 {</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:inet";</div><div class='add'>+		};</div><div class='add'>+		ephy0_act@9 {</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy1_act@10 {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy2_act@11 {</div><div class='add'>+			reg = &lt;11&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		gphy0_act@12 {</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy0_spd@13 {</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy1_spd@14 {</div><div class='add'>+			reg = &lt;14&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		ephy2_spd@15 {</div><div class='add'>+			reg = &lt;15&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+		};</div><div class='add'>+		power_green@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Scenario 3 : BCM6362 with 1 LED for each EPHY</div><div class='add'>+	leds0: led-controller@10001900 {</div><div class='add'>+		compatible = "brcm,bcm6328-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x10001900 0x24&gt;;</div><div class='add'>+</div><div class='add'>+		usb@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;0&gt;;</div><div class='add'>+			brcm,activity-signal-sources = &lt;0&gt;;</div><div class='add'>+			/* USB link/activity routed to USB LED */</div><div class='add'>+		};</div><div class='add'>+		inet@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,activity-signal-sources = &lt;1&gt;;</div><div class='add'>+			/* INET activity routed to INET LED */</div><div class='add'>+		};</div><div class='add'>+		ephy0@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;4&gt;;</div><div class='add'>+			/* EPHY0 link routed to EPHY0 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy1@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;5&gt;;</div><div class='add'>+			/* EPHY1 link routed to EPHY1 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy2@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;6&gt;;</div><div class='add'>+			/* EPHY2 link routed to EPHY2 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy3@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;7&gt;;</div><div class='add'>+			/* EPHY3 link routed to EPHY3 LED */</div><div class='add'>+		};</div><div class='add'>+		power_green@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Scenario 4 : BCM6362 with 1 LED for all EPHYs</div><div class='add'>+	leds0: led-controller@10001900 {</div><div class='add'>+		compatible = "brcm,bcm6328-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x10001900 0x24&gt;;</div><div class='add'>+</div><div class='add'>+		usb@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;0 1&gt;;</div><div class='add'>+			brcm,activity-signal-sources = &lt;0 1&gt;;</div><div class='add'>+			/* USB/INET link/activity routed to USB LED */</div><div class='add'>+		};</div><div class='add'>+		ephy@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;4 5 6 7&gt;;</div><div class='add'>+			/* EPHY0/1/2/3 link routed to EPHY0 LED */</div><div class='add'>+		};</div><div class='add'>+		power_green@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Scenario 5 : BCM6362 with EPHY LEDs swapped</div><div class='add'>+	leds0: led-controller@10001900 {</div><div class='add'>+		compatible = "brcm,bcm6328-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x10001900 0x24&gt;;</div><div class='add'>+</div><div class='add'>+		usb@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;0&gt;;</div><div class='add'>+			brcm,activity-signal-sources = &lt;0 1&gt;;</div><div class='add'>+			/* USB link/act and INET act routed to USB LED */</div><div class='add'>+		};</div><div class='add'>+		ephy0@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;7&gt;;</div><div class='add'>+			/* EPHY3 link routed to EPHY0 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy1@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;6&gt;;</div><div class='add'>+			/* EPHY2 link routed to EPHY1 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy2@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;5&gt;;</div><div class='add'>+			/* EPHY1 link routed to EPHY2 LED */</div><div class='add'>+		};</div><div class='add'>+		ephy3@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			brcm,hardware-controlled;</div><div class='add'>+			brcm,link-signal-sources = &lt;4&gt;;</div><div class='add'>+			/* EPHY0 link routed to EPHY3 LED */</div><div class='add'>+		};</div><div class='add'>+		power_green@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-bcm6358.txt b/Documentation/devicetree/bindings/leds/leds-bcm6358.txt<br/>new file mode 100644<br/>index 000000000000..b22a55bcc65d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/leds/leds-bcm6358.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-bcm6358.txt</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+LEDs connected to Broadcom BCM6358 controller</div><div class='add'>+</div><div class='add'>+This controller is present on BCM6358 and BCM6368.</div><div class='add'>+In these SoCs there are Serial LEDs (LEDs connected to a 74x164 controller),</div><div class='add'>+which can either be controlled by software (exporting the 74x164 as spi-gpio.</div><div class='add'>+See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or</div><div class='add'>+by hardware using this driver.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible : should be "brcm,bcm6358-leds".</div><div class='add'>+  - #address-cells : must be 1.</div><div class='add'>+  - #size-cells : must be 0.</div><div class='add'>+  - reg : BCM6358 LED controller address and size.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+  - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.</div><div class='add'>+    Default : 1</div><div class='add'>+  - brcm,clk-dat-low : Boolean, makes clock and data signals active low.</div><div class='add'>+    Default : false</div><div class='add'>+</div><div class='add'>+Each LED is represented as a sub-node of the brcm,bcm6358-leds device.</div><div class='add'>+</div><div class='add'>+LED sub-node required properties:</div><div class='add'>+  - reg : LED pin number (only LEDs 0 to 31 are valid).</div><div class='add'>+</div><div class='add'>+LED sub-node optional properties:</div><div class='add'>+  - label : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+  - active-low : Boolean, makes LED active low.</div><div class='add'>+    Default : false</div><div class='add'>+  - default-state : see</div><div class='add'>+    Documentation/devicetree/bindings/leds/leds-gpio.txt</div><div class='add'>+  - linux,default-trigger : see</div><div class='add'>+    Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+Scenario 1 : BCM6358</div><div class='add'>+	leds0: led-controller@fffe00d0 {</div><div class='add'>+		compatible = "brcm,bcm6358-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfffe00d0 0x8&gt;;</div><div class='add'>+</div><div class='add'>+		alarm_white {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "white:alarm";</div><div class='add'>+		};</div><div class='add'>+		tv_white {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "white:tv";</div><div class='add'>+		};</div><div class='add'>+		tel_white {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "white:tel";</div><div class='add'>+		};</div><div class='add'>+		adsl_white {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "white:adsl";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Scenario 2 : BCM6368</div><div class='add'>+	leds0: led-controller@100000d0 {</div><div class='add'>+		compatible = "brcm,bcm6358-leds";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x100000d0 0x8&gt;;</div><div class='add'>+		brcm,pol-low;</div><div class='add'>+		brcm,clk-div = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		power_red {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:power";</div><div class='add'>+		};</div><div class='add'>+		power_green {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+		power_blue {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			label = "blue:power";</div><div class='add'>+		};</div><div class='add'>+		broadband_red {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:broadband";</div><div class='add'>+		};</div><div class='add'>+		broadband_green {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			label = "green:broadband";</div><div class='add'>+		};</div><div class='add'>+		broadband_blue {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "blue:broadband";</div><div class='add'>+		};</div><div class='add'>+		wireless_red {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:wireless";</div><div class='add'>+		};</div><div class='add'>+		wireless_green {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:wireless";</div><div class='add'>+		};</div><div class='add'>+		wireless_blue {</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			label = "blue:wireless";</div><div class='add'>+		};</div><div class='add'>+		phone_red {</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:phone";</div><div class='add'>+		};</div><div class='add'>+		phone_green {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:phone";</div><div class='add'>+		};</div><div class='add'>+		phone_blue {</div><div class='add'>+			reg = &lt;11&gt;;</div><div class='add'>+			label = "blue:phone";</div><div class='add'>+		};</div><div class='add'>+		upgrading_red {</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "red:upgrading";</div><div class='add'>+		};</div><div class='add'>+		upgrading_green {</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			active-low;</div><div class='add'>+			label = "green:upgrading";</div><div class='add'>+		};</div><div class='add'>+		upgrading_blue {</div><div class='add'>+			reg = &lt;14&gt;;</div><div class='add'>+			label = "blue:upgrading";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-ktd2692.txt b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt<br/>new file mode 100644<br/>index 000000000000..853737452580<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/leds/leds-ktd2692.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-ktd2692.txt</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+* Kinetic Technologies - KTD2692 Flash LED Driver</div><div class='add'>+</div><div class='add'>+KTD2692 is the ideal power solution for high-power flash LEDs.</div><div class='add'>+It uses ExpressWire single-wire programming for maximum flexibility.</div><div class='add'>+</div><div class='add'>+The ExpressWire interface through CTRL pin can control LED on/off and</div><div class='add'>+enable/disable the IC, Movie(max 1/3 of Flash current) / Flash mode current,</div><div class='add'>+Flash timeout, LVP(low voltage protection).</div><div class='add'>+</div><div class='add'>+Also, When the AUX pin is pulled high while CTRL pin is high,</div><div class='add'>+LED current will be ramped up to the flash-mode current level.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "kinetic,ktd2692".</div><div class='add'>+- ctrl-gpios : Specifier of the GPIO connected to CTRL pin.</div><div class='add'>+- aux-gpios : Specifier of the GPIO connected to AUX pin.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- vin-supply : "vin" LED supply (2.7V to 5.5V).</div><div class='add'>+  See Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='add'>+</div><div class='add'>+A discrete LED element connected to the device must be represented by a child</div><div class='add'>+node - See Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Required properties for flash LED child nodes:</div><div class='add'>+  See Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+- led-max-microamp : Minimum Threshold for Timer protection</div><div class='add'>+  is defined internally (Maximum 300mA).</div><div class='add'>+- flash-max-microamp : Flash LED maximum current</div><div class='add'>+  Formula : I(mA) = 15000 / Rset.</div><div class='add'>+- flash-max-timeout-us : Flash LED maximum timeout.</div><div class='add'>+</div><div class='add'>+Optional properties for flash LED child nodes:</div><div class='add'>+- label : See Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+ktd2692 {</div><div class='add'>+	compatible = "kinetic,ktd2692";</div><div class='add'>+	ctrl-gpios = &lt;&amp;gpc0 1 0&gt;;</div><div class='add'>+	aux-gpios = &lt;&amp;gpc0 2 0&gt;;</div><div class='add'>+	vin-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+</div><div class='add'>+	flash-led {</div><div class='add'>+		label = "ktd2692-flash";</div><div class='add'>+		led-max-microamp = &lt;300000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1500000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1835000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt b/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt<br/>new file mode 100644<br/>index 000000000000..3bbbf7024411<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/leds/leds-tlc591xx.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+LEDs connected to tlc59116 or tlc59108</div><div class='add'>+</div><div class='add'>+Required properties</div><div class='add'>+- compatible: should be "ti,tlc59116" or "ti,tlc59108"</div><div class='add'>+- #address-cells: must be 1</div><div class='add'>+- #size-cells: must be 0</div><div class='add'>+- reg: typically 0x68</div><div class='add'>+</div><div class='add'>+Each led is represented as a sub-node of the ti,tlc59116.</div><div class='add'>+See Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+LED sub-node properties:</div><div class='add'>+- reg: number of LED line, 0 to 15 or 0 to 7</div><div class='add'>+- label: (optional) name of LED</div><div class='add'>+- linux,default-trigger : (optional)</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+tlc59116@68 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	compatible = "ti,tlc59116";</div><div class='add'>+	reg = &lt;0x68&gt;;</div><div class='add'>+</div><div class='add'>+	wan@0 {</div><div class='add'>+		label = "wrt1900ac:amber:wan";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	2g@2 {</div><div class='add'>+		label = "wrt1900ac:white:2g";</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	alive@9 {</div><div class='add'>+		label = "wrt1900ac:green:alive";</div><div class='add'>+		reg = &lt;0x9&gt;;</div><div class='add'>+		linux,default_trigger = "heartbeat";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt<br/>new file mode 100644<br/>index 000000000000..e893615ef635<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+Broadcom BCM2835 VideoCore mailbox IPC</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible:	Should be "brcm,bcm2835-mbox"</div><div class='add'>+- reg:		Specifies base physical address and size of the registers</div><div class='add'>+- interrupts:	The interrupt number</div><div class='add'>+		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt</div><div class='add'>+- #mbox-cells:	Specifies the number of cells needed to encode a mailbox</div><div class='add'>+		  channel. The value shall be 0, since there is only one</div><div class='add'>+		  mailbox channel implemented by the device.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+mailbox: mailbox@7e00b800 {</div><div class='add'>+	compatible = "brcm,bcm2835-mbox";</div><div class='add'>+	reg = &lt;0x7e00b880 0x40&gt;;</div><div class='add'>+	interrupts = &lt;0 1&gt;;</div><div class='add'>+	#mbox-cells = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+firmware: firmware {</div><div class='add'>+	compatible = "raspberrypi,firmware";</div><div class='add'>+	mboxes = &lt;&amp;mailbox&gt;;</div><div class='add'>+	#power-domain-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/mailbox.txt b/Documentation/devicetree/bindings/mailbox/mailbox.txt<br/>index 1a2cd3d266db..be05b9746c69 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mailbox/mailbox.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mailbox/mailbox.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mailbox/mailbox.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mailbox/mailbox.txt</a></div><div class='hunk'>@@ -22,17 +22,11 @@ Required property:</div><div class='ctx'> - mboxes: List of phandle and mailbox channel specifiers.</div><div class='ctx'> </div><div class='ctx'> Optional property:</div><div class='del'>-- mbox-names: List of identifier strings for each mailbox channel</div><div class='del'>-		required by the client. The use of this property</div><div class='del'>-		is discouraged in favor of using index in list of</div><div class='del'>-		'mboxes' while requesting a mailbox. Instead the</div><div class='del'>-		platforms may define channel indices, in DT headers,</div><div class='del'>-		to something legible.</div><div class='add'>+- mbox-names: List of identifier strings for each mailbox channel.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> 	pwr_cntrl: power {</div><div class='ctx'> 		...</div><div class='ctx'> 		mbox-names = "pwr-ctrl", "rpc";</div><div class='del'>-		mboxes = &lt;&amp;mailbox 0</div><div class='del'>-			&amp;mailbox 1&gt;;</div><div class='add'>+		mboxes = &lt;&amp;mailbox 0 &amp;mailbox 1&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adp1653.txt b/Documentation/devicetree/bindings/media/i2c/adp1653.txt<br/>new file mode 100644<br/>index 000000000000..5ce66f2104e3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/media/i2c/adp1653.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/media/i2c/adp1653.txt</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+* Analog Devices ADP1653 flash LED driver</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: Must contain "adi,adp1653"</div><div class='add'>+</div><div class='add'>+  - reg: I2C slave address</div><div class='add'>+</div><div class='add'>+  - enable-gpios: Specifier of the GPIO connected to EN pin</div><div class='add'>+</div><div class='add'>+There are two LED outputs available - flash and indicator. One LED is</div><div class='add'>+represented by one child node, nodes need to be named "flash" and "indicator".</div><div class='add'>+</div><div class='add'>+Required properties of the LED child node:</div><div class='add'>+- max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Required properties of the flash LED child node:</div><div class='add'>+</div><div class='add'>+- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+- flash-timeout-us : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	adp1653: led-controller@30 {</div><div class='add'>+		compatible = "adi,adp1653";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio3 24 GPIO_ACTIVE_HIGH&gt;; /* 88 */</div><div class='add'>+</div><div class='add'>+		flash {</div><div class='add'>+			flash-timeout-us = &lt;500000&gt;;</div><div class='add'>+			flash-max-microamp = &lt;320000&gt;;</div><div class='add'>+			max-microamp = &lt;50000&gt;;</div><div class='add'>+		};</div><div class='add'>+		indicator {</div><div class='add'>+			max-microamp = &lt;17500&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stih4xx.txt b/Documentation/devicetree/bindings/media/st,stih4xx.txt<br/>new file mode 100644<br/>index 000000000000..df655cd3a4f8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/media/st,stih4xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/media/st,stih4xx.txt</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+STMicroelectronics stih4xx platforms</div><div class='add'>+</div><div class='add'>+bdisp: 2D blitter for STMicroelectronics SoC.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "st,stih407-bdisp".</div><div class='add'>+- reg: BDISP physical address location and length.</div><div class='add'>+- interrupts: BDISP interrupt number.</div><div class='add'>+- clocks: from common clock binding: handle hardware IP needed clocks, the</div><div class='add'>+  number of clocks may depend on the SoC type.</div><div class='add'>+  See ../clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names: names of the clocks listed in clocks property in the same order.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	bdisp0:bdisp@9f10000 {</div><div class='add'>+		compatible = "st,stih407-bdisp";</div><div class='add'>+		reg = &lt;0x9f10000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 38 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		clock-names = "bdisp";</div><div class='add'>+		clocks = &lt;&amp;clk_s_c0_flexgen CLK_IC_BDISP_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Aliases:</div><div class='add'>+Each BDISP should have a numbered alias in the aliases node, in the form of</div><div class='add'>+bdispN, N = 0 or 1.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		bdisp0 = &amp;bdisp0;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt b/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt<br/>new file mode 100644<br/>index 000000000000..efe35a065714<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+Binding for Qualcomm  Atheros AR7xxx/AR9xxx DDR controller</div><div class='add'>+</div><div class='add'>+The DDR controller of the ARxxx and AR9xxx families provides an interface</div><div class='add'>+to flush the FIFO between various devices and the DDR. This is mainly used</div><div class='add'>+by the IRQ controller to flush the FIFO before running the interrupt handler</div><div class='add'>+of such devices.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: has to be "qca,&lt;soc-type&gt;-ddr-controller",</div><div class='add'>+  "qca,[ar7100|ar7240]-ddr-controller" as fallback.</div><div class='add'>+  On SoC with PCI support "qca,ar7100-ddr-controller" should be used as</div><div class='add'>+  fallback, otherwise "qca,ar7240-ddr-controller" should be used.</div><div class='add'>+- reg: Base address and size of the controllers memory area</div><div class='add'>+- #qca,ddr-wb-channel-cells: has to be 1, the index of the write buffer</div><div class='add'>+  channel</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	ddr_ctrl: memory-controller@18000000 {</div><div class='add'>+		compatible = "qca,ar9132-ddr-controller",</div><div class='add'>+				"qca,ar7240-ddr-controller";</div><div class='add'>+		reg = &lt;0x18000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		#qca,ddr-wb-channel-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	interrupt-controller {</div><div class='add'>+		...</div><div class='add'>+		qca,ddr-wb-channel-interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='add'>+		qca,ddr-wb-channels = &lt;&amp;ddr_ctrl 3&gt;, &lt;&amp;ddr_ctrl 2&gt;,</div><div class='add'>+					&lt;&amp;ddr_ctrl 0&gt;, &lt;&amp;ddr_ctrl 1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt<br/>index f3db93c85eea..3338a2834ad7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt</a></div><div class='hunk'>@@ -1,6 +1,9 @@</div><div class='ctx'> NVIDIA Tegra Memory Controller device tree bindings</div><div class='ctx'> ===================================================</div><div class='ctx'> </div><div class='add'>+memory-controller node</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: Should be "nvidia,tegra&lt;chip&gt;-mc"</div><div class='ctx'> - reg: Physical base address and length of the controller's registers.</div><div class='hunk'>@@ -15,9 +18,49 @@ Required properties:</div><div class='ctx'> This device implements an IOMMU that complies with the generic IOMMU binding.</div><div class='ctx'> See ../iommu/iommu.txt for details.</div><div class='ctx'> </div><div class='del'>-Example:</div><div class='del'>---------</div><div class='add'>+emc-timings subnode</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+The node should contain a "emc-timings" subnode for each supported RAM type (see field RAM_CODE in</div><div class='add'>+register PMC_STRAPPING_OPT_A).</div><div class='add'>+</div><div class='add'>+Required properties for "emc-timings" nodes :</div><div class='add'>+- nvidia,ram-code : Should contain the value of RAM_CODE this timing set is used for.</div><div class='add'>+</div><div class='add'>+timing subnode</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Each "emc-timings" node should contain a subnode for every supported EMC clock rate.</div><div class='add'>+</div><div class='add'>+Required properties for timing nodes :</div><div class='add'>+- clock-frequency : Should contain the memory clock rate in Hz.</div><div class='add'>+- nvidia,emem-configuration : Values to be written to the EMEM register block. For the Tegra124 SoC</div><div class='add'>+(see section "15.6.1 MC Registers" in the TRM), these are the registers whose values need to be</div><div class='add'>+specified, according to the board documentation:</div><div class='add'>+</div><div class='add'>+	MC_EMEM_ARB_CFG</div><div class='add'>+	MC_EMEM_ARB_OUTSTANDING_REQ</div><div class='add'>+	MC_EMEM_ARB_TIMING_RCD</div><div class='add'>+	MC_EMEM_ARB_TIMING_RP</div><div class='add'>+	MC_EMEM_ARB_TIMING_RC</div><div class='add'>+	MC_EMEM_ARB_TIMING_RAS</div><div class='add'>+	MC_EMEM_ARB_TIMING_FAW</div><div class='add'>+	MC_EMEM_ARB_TIMING_RRD</div><div class='add'>+	MC_EMEM_ARB_TIMING_RAP2PRE</div><div class='add'>+	MC_EMEM_ARB_TIMING_WAP2PRE</div><div class='add'>+	MC_EMEM_ARB_TIMING_R2R</div><div class='add'>+	MC_EMEM_ARB_TIMING_W2W</div><div class='add'>+	MC_EMEM_ARB_TIMING_R2W</div><div class='add'>+	MC_EMEM_ARB_TIMING_W2R</div><div class='add'>+	MC_EMEM_ARB_DA_TURNS</div><div class='add'>+	MC_EMEM_ARB_DA_COVERS</div><div class='add'>+	MC_EMEM_ARB_MISC0</div><div class='add'>+	MC_EMEM_ARB_MISC1</div><div class='add'>+	MC_EMEM_ARB_RING1_THROTTLE</div><div class='ctx'> </div><div class='add'>+Example SoC include file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='ctx'> 	mc: memory-controller@0,70019000 {</div><div class='ctx'> 		compatible = "nvidia,tegra124-mc";</div><div class='ctx'> 		reg = &lt;0x0 0x70019000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -34,3 +77,40 @@ Example:</div><div class='ctx'> 		...</div><div class='ctx'> 		iommus = &lt;&amp;mc TEGRA_SWGROUP_SDMMC1A&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example board file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	memory-controller@0,70019000 {</div><div class='add'>+		emc-timings-3 {</div><div class='add'>+			nvidia,ram-code = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			timing-12750000 {</div><div class='add'>+				clock-frequency = &lt;12750000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt;</div><div class='add'>+					0x40040001 /* MC_EMEM_ARB_CFG */</div><div class='add'>+					0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */</div><div class='add'>+					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */</div><div class='add'>+					0x00000001 /* MC_EMEM_ARB_TIMING_RP */</div><div class='add'>+					0x00000002 /* MC_EMEM_ARB_TIMING_RC */</div><div class='add'>+					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */</div><div class='add'>+					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */</div><div class='add'>+					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */</div><div class='add'>+					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */</div><div class='add'>+					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */</div><div class='add'>+					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */</div><div class='add'>+					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */</div><div class='add'>+					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */</div><div class='add'>+					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */</div><div class='add'>+					0x06030203 /* MC_EMEM_ARB_DA_TURNS */</div><div class='add'>+					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */</div><div class='add'>+					0x77e30303 /* MC_EMEM_ARB_MISC0 */</div><div class='add'>+					0x70000f03 /* MC_EMEM_ARB_MISC1 */</div><div class='add'>+					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */</div><div class='add'>+				&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt b/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt<br/>new file mode 100644<br/>index 000000000000..cdf406c902e2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.txt</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+* H8/300 bus controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible: Must be "renesas,h8300-bsc".</div><div class='add'>+  - reg: Base address and length of BSC registers.</div><div class='add'>+</div><div class='add'>+Example.</div><div class='add'>+	bsc: memory-controller@fee01e {</div><div class='add'>+		compatible = "renesas,h8300h-bsc", "renesas,h8300-bsc";</div><div class='add'>+		reg = &lt;0xfee01e 8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt b/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt<br/>new file mode 100644<br/>index 000000000000..b59c625d6336<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt</a></div><div class='hunk'>@@ -0,0 +1,374 @@</div><div class='add'>+NVIDIA Tegra124 SoC EMC (external memory controller)</div><div class='add'>+====================================================</div><div class='add'>+</div><div class='add'>+Required properties :</div><div class='add'>+- compatible : Should be "nvidia,tegra124-emc".</div><div class='add'>+- reg : physical base address and length of the controller's registers.</div><div class='add'>+- nvidia,memory-controller : phandle of the MC driver.</div><div class='add'>+</div><div class='add'>+The node should contain a "emc-timings" subnode for each supported RAM type</div><div class='add'>+(see field RAM_CODE in register PMC_STRAPPING_OPT_A), with its unit address</div><div class='add'>+being its RAM_CODE.</div><div class='add'>+</div><div class='add'>+Required properties for "emc-timings" nodes :</div><div class='add'>+- nvidia,ram-code : Should contain the value of RAM_CODE this timing set is</div><div class='add'>+used for.</div><div class='add'>+</div><div class='add'>+Each "emc-timings" node should contain a "timing" subnode for every supported</div><div class='add'>+EMC clock rate. The "timing" subnodes should have the clock rate in Hz as</div><div class='add'>+their unit address.</div><div class='add'>+</div><div class='add'>+Required properties for "timing" nodes :</div><div class='add'>+- clock-frequency : Should contain the memory clock rate in Hz.</div><div class='add'>+- The following properties contain EMC timing characterization values</div><div class='add'>+(specified in the board documentation) :</div><div class='add'>+  - nvidia,emc-auto-cal-config : EMC_AUTO_CAL_CONFIG</div><div class='add'>+  - nvidia,emc-auto-cal-config2 : EMC_AUTO_CAL_CONFIG2</div><div class='add'>+  - nvidia,emc-auto-cal-config3 : EMC_AUTO_CAL_CONFIG3</div><div class='add'>+  - nvidia,emc-auto-cal-interval : EMC_AUTO_CAL_INTERVAL</div><div class='add'>+  - nvidia,emc-bgbias-ctl0 : EMC_BGBIAS_CTL0</div><div class='add'>+  - nvidia,emc-cfg : EMC_CFG</div><div class='add'>+  - nvidia,emc-cfg-2 : EMC_CFG_2</div><div class='add'>+  - nvidia,emc-ctt-term-ctrl : EMC_CTT_TERM_CTRL</div><div class='add'>+  - nvidia,emc-mode-1 : Mode Register 1</div><div class='add'>+  - nvidia,emc-mode-2 : Mode Register 2</div><div class='add'>+  - nvidia,emc-mode-4 : Mode Register 4</div><div class='add'>+  - nvidia,emc-mode-reset : Mode Register 0</div><div class='add'>+  - nvidia,emc-mrs-wait-cnt : EMC_MRS_WAIT_CNT</div><div class='add'>+  - nvidia,emc-sel-dpd-ctrl : EMC_SEL_DPD_CTRL</div><div class='add'>+  - nvidia,emc-xm2dqspadctrl2 : EMC_XM2DQSPADCTRL2</div><div class='add'>+  - nvidia,emc-zcal-cnt-long : EMC_ZCAL_WAIT_CNT after clock change</div><div class='add'>+  - nvidia,emc-zcal-interval : EMC_ZCAL_INTERVAL</div><div class='add'>+- nvidia,emc-configuration : EMC timing characterization data. These are the</div><div class='add'>+registers (see section "15.6.2 EMC Registers" in the TRM) whose values need to</div><div class='add'>+be specified, according to the board documentation:</div><div class='add'>+</div><div class='add'>+	EMC_RC</div><div class='add'>+	EMC_RFC</div><div class='add'>+	EMC_RFC_SLR</div><div class='add'>+	EMC_RAS</div><div class='add'>+	EMC_RP</div><div class='add'>+	EMC_R2W</div><div class='add'>+	EMC_W2R</div><div class='add'>+	EMC_R2P</div><div class='add'>+	EMC_W2P</div><div class='add'>+	EMC_RD_RCD</div><div class='add'>+	EMC_WR_RCD</div><div class='add'>+	EMC_RRD</div><div class='add'>+	EMC_REXT</div><div class='add'>+	EMC_WEXT</div><div class='add'>+	EMC_WDV</div><div class='add'>+	EMC_WDV_MASK</div><div class='add'>+	EMC_QUSE</div><div class='add'>+	EMC_QUSE_WIDTH</div><div class='add'>+	EMC_IBDLY</div><div class='add'>+	EMC_EINPUT</div><div class='add'>+	EMC_EINPUT_DURATION</div><div class='add'>+	EMC_PUTERM_EXTRA</div><div class='add'>+	EMC_PUTERM_WIDTH</div><div class='add'>+	EMC_PUTERM_ADJ</div><div class='add'>+	EMC_CDB_CNTL_1</div><div class='add'>+	EMC_CDB_CNTL_2</div><div class='add'>+	EMC_CDB_CNTL_3</div><div class='add'>+	EMC_QRST</div><div class='add'>+	EMC_QSAFE</div><div class='add'>+	EMC_RDV</div><div class='add'>+	EMC_RDV_MASK</div><div class='add'>+	EMC_REFRESH</div><div class='add'>+	EMC_BURST_REFRESH_NUM</div><div class='add'>+	EMC_PRE_REFRESH_REQ_CNT</div><div class='add'>+	EMC_PDEX2WR</div><div class='add'>+	EMC_PDEX2RD</div><div class='add'>+	EMC_PCHG2PDEN</div><div class='add'>+	EMC_ACT2PDEN</div><div class='add'>+	EMC_AR2PDEN</div><div class='add'>+	EMC_RW2PDEN</div><div class='add'>+	EMC_TXSR</div><div class='add'>+	EMC_TXSRDLL</div><div class='add'>+	EMC_TCKE</div><div class='add'>+	EMC_TCKESR</div><div class='add'>+	EMC_TPD</div><div class='add'>+	EMC_TFAW</div><div class='add'>+	EMC_TRPAB</div><div class='add'>+	EMC_TCLKSTABLE</div><div class='add'>+	EMC_TCLKSTOP</div><div class='add'>+	EMC_TREFBW</div><div class='add'>+	EMC_FBIO_CFG6</div><div class='add'>+	EMC_ODT_WRITE</div><div class='add'>+	EMC_ODT_READ</div><div class='add'>+	EMC_FBIO_CFG5</div><div class='add'>+	EMC_CFG_DIG_DLL</div><div class='add'>+	EMC_CFG_DIG_DLL_PERIOD</div><div class='add'>+	EMC_DLL_XFORM_DQS0</div><div class='add'>+	EMC_DLL_XFORM_DQS1</div><div class='add'>+	EMC_DLL_XFORM_DQS2</div><div class='add'>+	EMC_DLL_XFORM_DQS3</div><div class='add'>+	EMC_DLL_XFORM_DQS4</div><div class='add'>+	EMC_DLL_XFORM_DQS5</div><div class='add'>+	EMC_DLL_XFORM_DQS6</div><div class='add'>+	EMC_DLL_XFORM_DQS7</div><div class='add'>+	EMC_DLL_XFORM_DQS8</div><div class='add'>+	EMC_DLL_XFORM_DQS9</div><div class='add'>+	EMC_DLL_XFORM_DQS10</div><div class='add'>+	EMC_DLL_XFORM_DQS11</div><div class='add'>+	EMC_DLL_XFORM_DQS12</div><div class='add'>+	EMC_DLL_XFORM_DQS13</div><div class='add'>+	EMC_DLL_XFORM_DQS14</div><div class='add'>+	EMC_DLL_XFORM_DQS15</div><div class='add'>+	EMC_DLL_XFORM_QUSE0</div><div class='add'>+	EMC_DLL_XFORM_QUSE1</div><div class='add'>+	EMC_DLL_XFORM_QUSE2</div><div class='add'>+	EMC_DLL_XFORM_QUSE3</div><div class='add'>+	EMC_DLL_XFORM_QUSE4</div><div class='add'>+	EMC_DLL_XFORM_QUSE5</div><div class='add'>+	EMC_DLL_XFORM_QUSE6</div><div class='add'>+	EMC_DLL_XFORM_QUSE7</div><div class='add'>+	EMC_DLL_XFORM_ADDR0</div><div class='add'>+	EMC_DLL_XFORM_ADDR1</div><div class='add'>+	EMC_DLL_XFORM_ADDR2</div><div class='add'>+	EMC_DLL_XFORM_ADDR3</div><div class='add'>+	EMC_DLL_XFORM_ADDR4</div><div class='add'>+	EMC_DLL_XFORM_ADDR5</div><div class='add'>+	EMC_DLL_XFORM_QUSE8</div><div class='add'>+	EMC_DLL_XFORM_QUSE9</div><div class='add'>+	EMC_DLL_XFORM_QUSE10</div><div class='add'>+	EMC_DLL_XFORM_QUSE11</div><div class='add'>+	EMC_DLL_XFORM_QUSE12</div><div class='add'>+	EMC_DLL_XFORM_QUSE13</div><div class='add'>+	EMC_DLL_XFORM_QUSE14</div><div class='add'>+	EMC_DLL_XFORM_QUSE15</div><div class='add'>+	EMC_DLI_TRIM_TXDQS0</div><div class='add'>+	EMC_DLI_TRIM_TXDQS1</div><div class='add'>+	EMC_DLI_TRIM_TXDQS2</div><div class='add'>+	EMC_DLI_TRIM_TXDQS3</div><div class='add'>+	EMC_DLI_TRIM_TXDQS4</div><div class='add'>+	EMC_DLI_TRIM_TXDQS5</div><div class='add'>+	EMC_DLI_TRIM_TXDQS6</div><div class='add'>+	EMC_DLI_TRIM_TXDQS7</div><div class='add'>+	EMC_DLI_TRIM_TXDQS8</div><div class='add'>+	EMC_DLI_TRIM_TXDQS9</div><div class='add'>+	EMC_DLI_TRIM_TXDQS10</div><div class='add'>+	EMC_DLI_TRIM_TXDQS11</div><div class='add'>+	EMC_DLI_TRIM_TXDQS12</div><div class='add'>+	EMC_DLI_TRIM_TXDQS13</div><div class='add'>+	EMC_DLI_TRIM_TXDQS14</div><div class='add'>+	EMC_DLI_TRIM_TXDQS15</div><div class='add'>+	EMC_DLL_XFORM_DQ0</div><div class='add'>+	EMC_DLL_XFORM_DQ1</div><div class='add'>+	EMC_DLL_XFORM_DQ2</div><div class='add'>+	EMC_DLL_XFORM_DQ3</div><div class='add'>+	EMC_DLL_XFORM_DQ4</div><div class='add'>+	EMC_DLL_XFORM_DQ5</div><div class='add'>+	EMC_DLL_XFORM_DQ6</div><div class='add'>+	EMC_DLL_XFORM_DQ7</div><div class='add'>+	EMC_XM2CMDPADCTRL</div><div class='add'>+	EMC_XM2CMDPADCTRL4</div><div class='add'>+	EMC_XM2CMDPADCTRL5</div><div class='add'>+	EMC_XM2DQPADCTRL2</div><div class='add'>+	EMC_XM2DQPADCTRL3</div><div class='add'>+	EMC_XM2CLKPADCTRL</div><div class='add'>+	EMC_XM2CLKPADCTRL2</div><div class='add'>+	EMC_XM2COMPPADCTRL</div><div class='add'>+	EMC_XM2VTTGENPADCTRL</div><div class='add'>+	EMC_XM2VTTGENPADCTRL2</div><div class='add'>+	EMC_XM2VTTGENPADCTRL3</div><div class='add'>+	EMC_XM2DQSPADCTRL3</div><div class='add'>+	EMC_XM2DQSPADCTRL4</div><div class='add'>+	EMC_XM2DQSPADCTRL5</div><div class='add'>+	EMC_XM2DQSPADCTRL6</div><div class='add'>+	EMC_DSR_VTTGEN_DRV</div><div class='add'>+	EMC_TXDSRVTTGEN</div><div class='add'>+	EMC_FBIO_SPARE</div><div class='add'>+	EMC_ZCAL_WAIT_CNT</div><div class='add'>+	EMC_MRS_WAIT_CNT2</div><div class='add'>+	EMC_CTT</div><div class='add'>+	EMC_CTT_DURATION</div><div class='add'>+	EMC_CFG_PIPE</div><div class='add'>+	EMC_DYN_SELF_REF_CONTROL</div><div class='add'>+	EMC_QPOP</div><div class='add'>+</div><div class='add'>+Example SoC include file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	emc@0,7001b000 {</div><div class='add'>+		compatible = "nvidia,tegra124-emc";</div><div class='add'>+		reg = &lt;0x0 0x7001b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,memory-controller = &lt;&amp;mc&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example board file:</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	emc@0,7001b000 {</div><div class='add'>+		emc-timings-3 {</div><div class='add'>+			nvidia,ram-code = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			timing-12750000 {</div><div class='add'>+				clock-frequency = &lt;12750000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000042&gt;;</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-ctt-term-ctrl = &lt;0x00000802&gt;;</div><div class='add'>+				nvidia,emc-cfg = &lt;0x73240000&gt;;</div><div class='add'>+				nvidia,emc-cfg-2 = &lt;0x000008c5&gt;;</div><div class='add'>+				nvidia,emc-sel-dpd-ctrl = &lt;0x00040128&gt;;</div><div class='add'>+				nvidia,emc-bgbias-ctl0 = &lt;0x00000008&gt;;</div><div class='add'>+				nvidia,emc-auto-cal-config = &lt;0xa1430000&gt;;</div><div class='add'>+				nvidia,emc-auto-cal-config2 = &lt;0x00000000&gt;;</div><div class='add'>+				nvidia,emc-auto-cal-config3 = &lt;0x00000000&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-4 = &lt;0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration = &lt;</div><div class='add'>+					0x00000000 /* EMC_RC */</div><div class='add'>+					0x00000003 /* EMC_RFC */</div><div class='add'>+					0x00000000 /* EMC_RFC_SLR */</div><div class='add'>+					0x00000000 /* EMC_RAS */</div><div class='add'>+					0x00000000 /* EMC_RP */</div><div class='add'>+					0x00000004 /* EMC_R2W */</div><div class='add'>+					0x0000000a /* EMC_W2R */</div><div class='add'>+					0x00000003 /* EMC_R2P */</div><div class='add'>+					0x0000000b /* EMC_W2P */</div><div class='add'>+					0x00000000 /* EMC_RD_RCD */</div><div class='add'>+					0x00000000 /* EMC_WR_RCD */</div><div class='add'>+					0x00000003 /* EMC_RRD */</div><div class='add'>+					0x00000003 /* EMC_REXT */</div><div class='add'>+					0x00000000 /* EMC_WEXT */</div><div class='add'>+					0x00000006 /* EMC_WDV */</div><div class='add'>+					0x00000006 /* EMC_WDV_MASK */</div><div class='add'>+					0x00000006 /* EMC_QUSE */</div><div class='add'>+					0x00000002 /* EMC_QUSE_WIDTH */</div><div class='add'>+					0x00000000 /* EMC_IBDLY */</div><div class='add'>+					0x00000005 /* EMC_EINPUT */</div><div class='add'>+					0x00000005 /* EMC_EINPUT_DURATION */</div><div class='add'>+					0x00010000 /* EMC_PUTERM_EXTRA */</div><div class='add'>+					0x00000003 /* EMC_PUTERM_WIDTH */</div><div class='add'>+					0x00000000 /* EMC_PUTERM_ADJ */</div><div class='add'>+					0x00000000 /* EMC_CDB_CNTL_1 */</div><div class='add'>+					0x00000000 /* EMC_CDB_CNTL_2 */</div><div class='add'>+					0x00000000 /* EMC_CDB_CNTL_3 */</div><div class='add'>+					0x00000004 /* EMC_QRST */</div><div class='add'>+					0x0000000c /* EMC_QSAFE */</div><div class='add'>+					0x0000000d /* EMC_RDV */</div><div class='add'>+					0x0000000f /* EMC_RDV_MASK */</div><div class='add'>+					0x00000060 /* EMC_REFRESH */</div><div class='add'>+					0x00000000 /* EMC_BURST_REFRESH_NUM */</div><div class='add'>+					0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */</div><div class='add'>+					0x00000002 /* EMC_PDEX2WR */</div><div class='add'>+					0x00000002 /* EMC_PDEX2RD */</div><div class='add'>+					0x00000001 /* EMC_PCHG2PDEN */</div><div class='add'>+					0x00000000 /* EMC_ACT2PDEN */</div><div class='add'>+					0x00000007 /* EMC_AR2PDEN */</div><div class='add'>+					0x0000000f /* EMC_RW2PDEN */</div><div class='add'>+					0x00000005 /* EMC_TXSR */</div><div class='add'>+					0x00000005 /* EMC_TXSRDLL */</div><div class='add'>+					0x00000004 /* EMC_TCKE */</div><div class='add'>+					0x00000005 /* EMC_TCKESR */</div><div class='add'>+					0x00000004 /* EMC_TPD */</div><div class='add'>+					0x00000000 /* EMC_TFAW */</div><div class='add'>+					0x00000000 /* EMC_TRPAB */</div><div class='add'>+					0x00000005 /* EMC_TCLKSTABLE */</div><div class='add'>+					0x00000005 /* EMC_TCLKSTOP */</div><div class='add'>+					0x00000064 /* EMC_TREFBW */</div><div class='add'>+					0x00000000 /* EMC_FBIO_CFG6 */</div><div class='add'>+					0x00000000 /* EMC_ODT_WRITE */</div><div class='add'>+					0x00000000 /* EMC_ODT_READ */</div><div class='add'>+					0x106aa298 /* EMC_FBIO_CFG5 */</div><div class='add'>+					0x002c00a0 /* EMC_CFG_DIG_DLL */</div><div class='add'>+					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS0 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS1 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS2 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS3 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS4 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS5 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS6 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS7 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS8 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS9 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS10 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS11 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS12 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS13 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS14 */</div><div class='add'>+					0x00064000 /* EMC_DLL_XFORM_DQS15 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE0 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE1 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE2 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE3 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE4 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE5 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE6 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE7 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR0 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR1 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR2 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR3 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR4 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_ADDR5 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE8 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE9 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE10 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE11 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE12 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE13 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE14 */</div><div class='add'>+					0x00000000 /* EMC_DLL_XFORM_QUSE15 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */</div><div class='add'>+					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */</div><div class='add'>+					0x000fc000 /* EMC_DLL_XFORM_DQ0 */</div><div class='add'>+					0x000fc000 /* EMC_DLL_XFORM_DQ1 */</div><div class='add'>+					0x000fc000 /* EMC_DLL_XFORM_DQ2 */</div><div class='add'>+					0x000fc000 /* EMC_DLL_XFORM_DQ3 */</div><div class='add'>+					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */</div><div class='add'>+					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */</div><div class='add'>+					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */</div><div class='add'>+					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */</div><div class='add'>+					0x10000280 /* EMC_XM2CMDPADCTRL */</div><div class='add'>+					0x00000000 /* EMC_XM2CMDPADCTRL4 */</div><div class='add'>+					0x00111111 /* EMC_XM2CMDPADCTRL5 */</div><div class='add'>+					0x00000000 /* EMC_XM2DQPADCTRL2 */</div><div class='add'>+					0x00000000 /* EMC_XM2DQPADCTRL3 */</div><div class='add'>+					0x77ffc081 /* EMC_XM2CLKPADCTRL */</div><div class='add'>+					0x00000e0e /* EMC_XM2CLKPADCTRL2 */</div><div class='add'>+					0x81f1f108 /* EMC_XM2COMPPADCTRL */</div><div class='add'>+					0x07070004 /* EMC_XM2VTTGENPADCTRL */</div><div class='add'>+					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */</div><div class='add'>+					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */</div><div class='add'>+					0x51451400 /* EMC_XM2DQSPADCTRL3 */</div><div class='add'>+					0x00514514 /* EMC_XM2DQSPADCTRL4 */</div><div class='add'>+					0x00514514 /* EMC_XM2DQSPADCTRL5 */</div><div class='add'>+					0x51451400 /* EMC_XM2DQSPADCTRL6 */</div><div class='add'>+					0x0000003f /* EMC_DSR_VTTGEN_DRV */</div><div class='add'>+					0x00000007 /* EMC_TXDSRVTTGEN */</div><div class='add'>+					0x00000000 /* EMC_FBIO_SPARE */</div><div class='add'>+					0x00000042 /* EMC_ZCAL_WAIT_CNT */</div><div class='add'>+					0x000e000e /* EMC_MRS_WAIT_CNT2 */</div><div class='add'>+					0x00000000 /* EMC_CTT */</div><div class='add'>+					0x00000003 /* EMC_CTT_DURATION */</div><div class='add'>+					0x0000f2f3 /* EMC_CFG_PIPE */</div><div class='add'>+					0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */</div><div class='add'>+					0x0000000a /* EMC_QPOP */</div><div class='add'>+				&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt<br/>index 938f8e1ba205..0db60470ebb6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/memory-controllers/ti/emif.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/memory-controllers/ti/emif.txt</a></div><div class='hunk'>@@ -8,6 +8,7 @@ of the EMIF IP and memory parts attached to it.</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible	: Should be of the form "ti,emif-&lt;ip-rev&gt;" where &lt;ip-rev&gt;</div><div class='ctx'>   is the IP revision of the specific EMIF instance.</div><div class='add'>+		  For am437x should be ti,emif-am4372.</div><div class='ctx'> </div><div class='ctx'> - phy-type	: &lt;u32&gt; indicating the DDR phy type. Following are the</div><div class='ctx'>   allowed values</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt<br/>index 7665aa95979f..a8fee60dc20d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/arizona.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/arizona.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/arizona.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/arizona.txt</a></div><div class='hunk'>@@ -10,6 +10,9 @@ Required properties:</div><div class='ctx'>         "wlf,wm5110"</div><div class='ctx'>         "wlf,wm8280"</div><div class='ctx'>         "wlf,wm8997"</div><div class='add'>+        "wlf,wm8998"</div><div class='add'>+        "wlf,wm1814"</div><div class='add'>+</div><div class='ctx'>   - reg : I2C slave address when connected using I2C, chip select number when</div><div class='ctx'>     using SPI.</div><div class='ctx'> </div><div class='hunk'>@@ -31,10 +34,10 @@ Required properties:</div><div class='ctx'>     as covered in Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='ctx'> </div><div class='ctx'>   - DBVDD2-supply, DBVDD3-supply : Additional databus power supplies (wm5102,</div><div class='del'>-    wm5110, wm8280)</div><div class='add'>+    wm5110, wm8280, wm8998, wm1814)</div><div class='ctx'> </div><div class='ctx'>   - SPKVDDL-supply, SPKVDDR-supply : Speaker driver power supplies (wm5102,</div><div class='del'>-    wm5110, wm8280)</div><div class='add'>+    wm5110, wm8280, wm8998, wm1814)</div><div class='ctx'> </div><div class='ctx'>   - SPKVDD-supply : Speaker driver power supply (wm8997)</div><div class='ctx'> </div><div class='hunk'>@@ -53,8 +56,10 @@ Optional properties:</div><div class='ctx'>     of input signals. Valid values are 0 (Differential), 1 (Single-ended) and</div><div class='ctx'>     2 (Digital Microphone). If absent, INn_MODE registers set to 0 by default.</div><div class='ctx'>     If present, values must be specified less than or equal to the number of</div><div class='del'>-    input singals. If values less than the number of input signals, elements</div><div class='del'>-    that has not been specifed are set to 0 by default.</div><div class='add'>+    input signals. If values less than the number of input signals, elements</div><div class='add'>+    that have not been specified are set to 0 by default. Entries are:</div><div class='add'>+    &lt;IN1, IN2, IN3, IN4&gt; (wm5102, wm5110, wm8280, wm8997)</div><div class='add'>+    &lt;IN1A, IN2A, IN1B, IN2B&gt; (wm8998, wm1814)</div><div class='ctx'> </div><div class='ctx'>   - wlf,dmic-ref : DMIC reference voltage source for each input, can be</div><div class='ctx'>     selected from either MICVDD or one of the MICBIAS's, defines</div><div class='hunk'>@@ -62,6 +67,12 @@ Optional properties:</div><div class='ctx'>     present, the number of values should be less than or equal to the</div><div class='ctx'>     number of inputs, unspecified inputs will use the chip default.</div><div class='ctx'> </div><div class='add'>+  - wlf,hpdet-channel : Headphone detection channel.</div><div class='add'>+    ARIZONA_ACCDET_MODE_HPL or 1 - Headphone detect mode is set to HPDETL</div><div class='add'>+    ARIZONA_ACCDET_MODE_HPR or 2 - Headphone detect mode is set to HPDETR</div><div class='add'>+    If this node is not mentioned or if the value is unknown, then</div><div class='add'>+    headphone detection mode is set to HPDETL.</div><div class='add'>+</div><div class='ctx'>   - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if</div><div class='ctx'>     they are being externally supplied. As covered in</div><div class='ctx'>     Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt<br/>index 98685f291a72..753f14f46e85 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/axp20x.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/axp20x.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/axp20x.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/axp20x.txt</a></div><div class='hunk'>@@ -1,15 +1,16 @@</div><div class='del'>-AXP202/AXP209 device tree bindings</div><div class='add'>+AXP family PMIC device tree bindings</div><div class='ctx'> </div><div class='ctx'> The axp20x family current members :</div><div class='ctx'> axp202 (X-Powers)</div><div class='ctx'> axp209 (X-Powers)</div><div class='add'>+axp221 (X-Powers)</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: "x-powers,axp202" or "x-powers,axp209"</div><div class='add'>+- compatible: "x-powers,axp202", "x-powers,axp209", "x-powers,axp221"</div><div class='ctx'> - reg: The I2C slave address for the AXP chip</div><div class='ctx'> - interrupt-parent: The parent interrupt controller</div><div class='ctx'> - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin</div><div class='del'>-- interrupt-controller: axp20x has its own internal IRQs</div><div class='add'>+- interrupt-controller: The PMIC has its own internal IRQs</div><div class='ctx'> - #interrupt-cells: Should be set to 1</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='hunk'>@@ -48,6 +49,31 @@ LDO3		: LDO		: ldo3in-supply</div><div class='ctx'> LDO4		: LDO		: ldo24in-supply	: shared supply</div><div class='ctx'> LDO5		: LDO		: ldo5in-supply</div><div class='ctx'> </div><div class='add'>+AXP221 regulators, type, and corresponding input supply names:</div><div class='add'>+</div><div class='add'>+Regulator	  Type		  Supply Name		  Notes</div><div class='add'>+---------	  ----		  -----------		  -----</div><div class='add'>+DCDC1		: DC-DC buck	: vin1-supply</div><div class='add'>+DCDC2		: DC-DC buck	: vin2-supply</div><div class='add'>+DCDC3		: DC-DC	buck	: vin3-supply</div><div class='add'>+DCDC4		: DC-DC	buck	: vin4-supply</div><div class='add'>+DCDC5		: DC-DC	buck	: vin5-supply</div><div class='add'>+DC1SW		: On/Off Switch	: dcdc1-supply		: DCDC1 secondary output</div><div class='add'>+DC5LDO		: LDO		: dcdc5-supply		: input from DCDC5</div><div class='add'>+ALDO1		: LDO		: aldoin-supply		: shared supply</div><div class='add'>+ALDO2		: LDO		: aldoin-supply		: shared supply</div><div class='add'>+ALDO3		: LDO		: aldoin-supply		: shared supply</div><div class='add'>+DLDO1		: LDO		: dldoin-supply		: shared supply</div><div class='add'>+DLDO2		: LDO		: dldoin-supply		: shared supply</div><div class='add'>+DLDO3		: LDO		: dldoin-supply		: shared supply</div><div class='add'>+DLDO4		: LDO		: dldoin-supply		: shared supply</div><div class='add'>+ELDO1		: LDO		: eldoin-supply		: shared supply</div><div class='add'>+ELDO2		: LDO		: eldoin-supply		: shared supply</div><div class='add'>+ELDO3		: LDO		: eldoin-supply		: shared supply</div><div class='add'>+LDO_IO0		: LDO		: ips-supply		: GPIO 0</div><div class='add'>+LDO_IO1		: LDO		: ips-supply		: GPIO 1</div><div class='add'>+RTC_LDO		: LDO		: ips-supply		: always on</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> axp209: pmic@34 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt<br/>index 8009c3d87f33..1777916e9e28 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/cros-ec.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/cros-ec.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/cros-ec.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/cros-ec.txt</a></div><div class='hunk'>@@ -18,6 +18,10 @@ Required properties (SPI):</div><div class='ctx'> - reg: SPI chip select</div><div class='ctx'> </div><div class='ctx'> Optional properties (SPI):</div><div class='add'>+- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little</div><div class='add'>+  time to wake up from sleep before they can receive SPI transfers at a high</div><div class='add'>+  clock rate. This property specifies the delay, in usecs, between the</div><div class='add'>+  assertion of the CS to the start of the first clock pulse.</div><div class='ctx'> - google,cros-ec-spi-msg-delay: Some implementations of the EC require some</div><div class='ctx'>   additional processing time in order to accept new transactions. If the delay</div><div class='ctx'>   between transactions is not long enough the EC may not be able to respond</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/da9063.txt b/Documentation/devicetree/bindings/mfd/da9063.txt<br/>index 42c6fa6f1c9a..05b21bcb8543 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/da9063.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/da9063.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/da9063.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/da9063.txt</a></div><div class='hunk'>@@ -5,6 +5,7 @@ DA9093 consists of a large and varied group of sub-devices (I2C Only):</div><div class='ctx'> Device                   Supply Names    Description</div><div class='ctx'> ------                   ------------    -----------</div><div class='ctx'> da9063-regulator        :               : LDOs &amp; BUCKs</div><div class='add'>+da9063-onkey            :               : On Key</div><div class='ctx'> da9063-rtc              :               : Real-Time Clock</div><div class='ctx'> da9063-watchdog         :               : Watchdog</div><div class='ctx'> </div><div class='hunk'>@@ -51,6 +52,18 @@ Sub-nodes:</div><div class='ctx'>   the DA9063. There are currently no entries in this binding, however</div><div class='ctx'>   compatible = "dlg,da9063-rtc" should be added if a node is created.</div><div class='ctx'> </div><div class='add'>+- onkey : This node defines the OnKey settings for controlling the key</div><div class='add'>+  functionality of the device. The node should contain the compatible property</div><div class='add'>+  with the value "dlg,da9063-onkey".</div><div class='add'>+</div><div class='add'>+  Optional onkey properties:</div><div class='add'>+</div><div class='add'>+  - dlg,disable-key-power : Disable power-down using a long key-press. If this</div><div class='add'>+    entry exists the OnKey driver will remove support for the KEY_POWER key</div><div class='add'>+    press. If this entry does not exist then by default the key-press</div><div class='add'>+    triggered power down is enabled and the OnKey will support both KEY_POWER</div><div class='add'>+    and KEY_SLEEP.</div><div class='add'>+</div><div class='ctx'> - watchdog : This node defines settings for the Watchdog timer associated</div><div class='ctx'>   with the DA9063. There are currently no entries in this binding, however</div><div class='ctx'>   compatible = "dlg,da9063-watchdog" should be added if a node is created.</div><div class='hunk'>@@ -73,6 +86,11 @@ Example:</div><div class='ctx'> 			compatible = "dlg,da9063-watchdog";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		onkey {</div><div class='add'>+			compatible = "dlg,da9063-onkey";</div><div class='add'>+			dlg,disable-key-power;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		regulators {</div><div class='ctx'> 			DA9063_BCORE1: bcore1 {</div><div class='ctx'> 				regulator-name = "BCORE1";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/max77686.txt b/Documentation/devicetree/bindings/mfd/max77686.txt<br/>index e39f0bc1f55e..163bd81a4607 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/max77686.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/max77686.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/max77686.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/max77686.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> Maxim MAX77686 multi-function device</div><div class='ctx'> </div><div class='del'>-MAX77686 is a Mulitifunction device with PMIC, RTC and Charger on chip. It is</div><div class='add'>+MAX77686 is a Multifunction device with PMIC, RTC and Charger on chip. It is</div><div class='ctx'> interfaced to host controller using i2c interface. PMIC and Charger submodules</div><div class='ctx'> are addressed using same i2c slave address whereas RTC submodule uses</div><div class='ctx'> different i2c slave address,presently for which we are statically creating i2c</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/max77693.txt b/Documentation/devicetree/bindings/mfd/max77693.txt<br/>index 38e64405e98d..d3425846aa5b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/max77693.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/max77693.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/max77693.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/max77693.txt</a></div><div class='hunk'>@@ -76,7 +76,60 @@ Optional properties:</div><div class='ctx'>     Valid values: 4300000, 4700000, 4800000, 4900000</div><div class='ctx'>     Default: 4300000</div><div class='ctx'> </div><div class='add'>+- led : the LED submodule device node</div><div class='add'>+</div><div class='add'>+There are two LED outputs available - FLED1 and FLED2. Each of them can</div><div class='add'>+control a separate LED or they can be connected together to double</div><div class='add'>+the maximum current for a single connected LED. One LED is represented</div><div class='add'>+by one child node.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Must be "maxim,max77693-led".</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- maxim,boost-mode :</div><div class='add'>+	In boost mode the device can produce up to 1.2A of total current</div><div class='add'>+	on both outputs. The maximum current on each output is reduced</div><div class='add'>+	to 625mA then. If not enabled explicitly, boost setting defaults to</div><div class='add'>+	LEDS_BOOST_FIXED in case both current sources are used.</div><div class='add'>+	Possible values:</div><div class='add'>+		LEDS_BOOST_OFF (0) - no boost,</div><div class='add'>+		LEDS_BOOST_ADAPTIVE (1) - adaptive mode,</div><div class='add'>+		LEDS_BOOST_FIXED (2) - fixed mode.</div><div class='add'>+- maxim,boost-mvout : Output voltage of the boost module in millivolts.</div><div class='add'>+	Valid values: 3300 - 5500, step by 25 (rounded down)</div><div class='add'>+	Default: 3300</div><div class='add'>+- maxim,mvsys-min : Low input voltage level in millivolts. Flash is not fired</div><div class='add'>+	if chip estimates that system voltage could drop below this level due</div><div class='add'>+	to flash power consumption.</div><div class='add'>+	Valid values: 2400 - 3400, step by 33 (rounded down)</div><div class='add'>+	Default: 2400</div><div class='add'>+</div><div class='add'>+Required properties for the LED child node:</div><div class='add'>+- led-sources : see Documentation/devicetree/bindings/leds/common.txt;</div><div class='add'>+		device current output identifiers: 0 - FLED1, 1 - FLED2</div><div class='add'>+- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+	Valid values for a LED connected to one FLED output:</div><div class='add'>+		15625 - 250000, step by 15625 (rounded down)</div><div class='add'>+	Valid values for a LED connected to both FLED outputs:</div><div class='add'>+		15625 - 500000, step by 15625 (rounded down)</div><div class='add'>+- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+	Valid values for a single LED connected to one FLED output</div><div class='add'>+	(boost mode must be turned off):</div><div class='add'>+		15625 - 1000000, step by 15625 (rounded down)</div><div class='add'>+	Valid values for a single LED connected to both FLED outputs:</div><div class='add'>+		15625 - 1250000, step by 15625 (rounded down)</div><div class='add'>+	Valid values for two LEDs case:</div><div class='add'>+		15625 - 625000, step by 15625 (rounded down)</div><div class='add'>+- flash-max-timeout-us : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+	Valid values: 62500 - 1000000, step by 62500 (rounded down)</div><div class='add'>+</div><div class='add'>+Optional properties for the LED child node:</div><div class='add'>+- label : see Documentation/devicetree/bindings/leds/common.txt</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='ctx'> 	max77693@66 {</div><div class='ctx'> 		compatible = "maxim,max77693";</div><div class='ctx'> 		reg = &lt;0x66&gt;;</div><div class='hunk'>@@ -117,5 +170,19 @@ Example:</div><div class='ctx'> 			maxim,thermal-regulation-celsius = &lt;75&gt;;</div><div class='ctx'> 			maxim,battery-overcurrent-microamp = &lt;3000000&gt;;</div><div class='ctx'> 			maxim,charge-input-threshold-microvolt = &lt;4300000&gt;;</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			compatible = "maxim,max77693-led";</div><div class='add'>+			maxim,boost-mode = &lt;LEDS_BOOST_FIXED&gt;;</div><div class='add'>+			maxim,boost-mvout = &lt;5000&gt;;</div><div class='add'>+			maxim,mvsys-min = &lt;2400&gt;;</div><div class='add'>+</div><div class='add'>+			camera_flash: flash-led {</div><div class='add'>+				label = "max77693-flash";</div><div class='add'>+				led-sources = &lt;0&gt;, &lt;1&gt;;</div><div class='add'>+				led-max-microamp = &lt;500000&gt;;</div><div class='add'>+				flash-max-microamp = &lt;1250000&gt;;</div><div class='add'>+				flash-max-timeout-us = &lt;1000000&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt<br/>new file mode 100644<br/>index 000000000000..af9d6931a1a2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/mfd.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/mfd.txt</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+Multi-Function Devices (MFD)</div><div class='add'>+</div><div class='add'>+These devices comprise a nexus for heterogeneous hardware blocks containing</div><div class='add'>+more than one non-unique yet varying hardware functionality.</div><div class='add'>+</div><div class='add'>+A typical MFD can be:</div><div class='add'>+</div><div class='add'>+- A mixed signal ASIC on an external bus, sometimes a PMIC (Power Management</div><div class='add'>+  Integrated Circuit) that is manufactured in a lower technology node (rough</div><div class='add'>+  silicon) that handles analog drivers for things like audio amplifiers, LED</div><div class='add'>+  drivers, level shifters, PHY (physical interfaces to things like USB or</div><div class='add'>+  ethernet), regulators etc.</div><div class='add'>+</div><div class='add'>+- A range of memory registers containing "miscellaneous system registers" also</div><div class='add'>+  known as a system controller "syscon" or any other memory range containing a</div><div class='add'>+  mix of unrelated hardware devices.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- compatible : "simple-mfd" - this signifies that the operating system should</div><div class='add'>+  consider all subnodes of the MFD device as separate devices akin to how</div><div class='add'>+  "simple-bus" inidicates when to see subnodes as children for a simple</div><div class='add'>+  memory-mapped bus. For more complex devices, when the nexus driver has to</div><div class='add'>+  probe registers to figure out what child devices exist etc, this should not</div><div class='add'>+  be used. In the latter case the child devices will be determined by the</div><div class='add'>+  operating system.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+foo@1000 {</div><div class='add'>+	compatible = "syscon", "simple-mfd";</div><div class='add'>+	reg = &lt;0x01000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+	led@08.0 {</div><div class='add'>+		compatible = "register-bit-led";</div><div class='add'>+		offset = &lt;0x08&gt;;</div><div class='add'>+		mask = &lt;0x01&gt;;</div><div class='add'>+		label = "myled";</div><div class='add'>+		default-state = "on";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/tps6507x.txt b/Documentation/devicetree/bindings/mfd/tps6507x.txt<br/>index 8fffa3c5ed40..8fffa3c5ed40 100755..100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/tps6507x.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mfd/tps6507x.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/tps6507x.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mfd/tps6507x.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/ath79-soc.txt b/Documentation/devicetree/bindings/mips/ath79-soc.txt<br/>new file mode 100644<br/>index 000000000000..88a12a43e44e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mips/ath79-soc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mips/ath79-soc.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9XXX SoC</div><div class='add'>+</div><div class='add'>+Each device tree must specify a compatible value for the AR SoC</div><div class='add'>+it uses in the compatible property of the root node. The compatible</div><div class='add'>+value must be one of the following values:</div><div class='add'>+</div><div class='add'>+- qca,ar7130</div><div class='add'>+- qca,ar7141</div><div class='add'>+- qca,ar7161</div><div class='add'>+- qca,ar7240</div><div class='add'>+- qca,ar7241</div><div class='add'>+- qca,ar7242</div><div class='add'>+- qca,ar9130</div><div class='add'>+- qca,ar9132</div><div class='add'>+- qca,ar9330</div><div class='add'>+- qca,ar9331</div><div class='add'>+- qca,ar9341</div><div class='add'>+- qca,ar9342</div><div class='add'>+- qca,ar9344</div><div class='add'>+- qca,qca9556</div><div class='add'>+- qca,qca9558</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt<br/>index 47b205cc9cc7..4556359c5876 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt</a></div><div class='hunk'>@@ -10,3 +10,5 @@ Required properties:</div><div class='ctx'>        The second entry gives the physical address and length of the</div><div class='ctx'>        registers indicating the strapping options.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit).</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt<br/>index 98ee2abbe138..7e9490313d5a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/arasan,sdhci.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/arasan,sdhci.txt</a></div><div class='hunk'>@@ -8,7 +8,8 @@ Device Tree Bindings for the Arasan SDHCI Controller</div><div class='ctx'>   [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt</div><div class='ctx'> </div><div class='ctx'> Required Properties:</div><div class='del'>-  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'</div><div class='add'>+  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or</div><div class='add'>+                'arasan,sdhci-4.9a'</div><div class='ctx'>   - reg: From mmc bindings: Register location and length.</div><div class='ctx'>   - clocks: From clock bindings: Handles to clock inputs.</div><div class='ctx'>   - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt<br/>index 415c5575cbf7..5d0376b8f202 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a></div><div class='hunk'>@@ -7,7 +7,14 @@ This file documents differences between the core properties described</div><div class='ctx'> by mmc.txt and the properties used by the sdhci-esdhc-imx driver.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : Should be "fsl,&lt;chip&gt;-esdhc"</div><div class='add'>+- compatible : Should be "fsl,&lt;chip&gt;-esdhc", the supported chips include</div><div class='add'>+	       "fsl,imx25-esdhc"</div><div class='add'>+	       "fsl,imx35-esdhc"</div><div class='add'>+	       "fsl,imx51-esdhc"</div><div class='add'>+	       "fsl,imx53-esdhc"</div><div class='add'>+	       "fsl,imx6q-usdhc"</div><div class='add'>+	       "fsl,imx6sl-usdhc"</div><div class='add'>+	       "fsl,imx6sx-usdhc"</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - fsl,cd-controller : Indicate to use controller internal card detection</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt<br/>index 3b3544931437..df370585cbcc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt</a></div><div class='hunk'>@@ -13,6 +13,10 @@ Required Properties:</div><div class='ctx'> </div><div class='ctx'> * compatible: should be one of the following.</div><div class='ctx'>   - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.</div><div class='add'>+  - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.</div><div class='add'>+</div><div class='add'>+Optional Properties:</div><div class='add'>+- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -42,3 +46,27 @@ Example:</div><div class='ctx'> 		cap-mmc-highspeed;</div><div class='ctx'> 		cap-sd-highspeed;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* for Hi6220 */</div><div class='add'>+</div><div class='add'>+	dwmmc_1: dwmmc1@f723e000 {</div><div class='add'>+		compatible = "hisilicon,hi6220-dw-mshc";</div><div class='add'>+		num-slots = &lt;0x1&gt;;</div><div class='add'>+		bus-width = &lt;0x4&gt;;</div><div class='add'>+		disable-wp;</div><div class='add'>+		cap-sd-highspeed;</div><div class='add'>+		sd-uhs-sdr12;</div><div class='add'>+		sd-uhs-sdr25;</div><div class='add'>+		card-detect-delay = &lt;200&gt;;</div><div class='add'>+		hisilicon,peripheral-syscon = &lt;&amp;ao_ctrl&gt;;</div><div class='add'>+		reg = &lt;0x0 0xf723e000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0x0 0x49 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clock_sys HI6220_MMC1_CIUCLK&gt;, &lt;&amp;clock_sys HI6220_MMC1_CLK&gt;;</div><div class='add'>+		clock-names = "ciu", "biu";</div><div class='add'>+		cd-gpios = &lt;&amp;gpio1 0 1&gt;;</div><div class='add'>+		pinctrl-names = "default", "idle";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sd_pmx_func &amp;sd_clk_cfg_func &amp;sd_cfg_func&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;sd_pmx_idle &amp;sd_clk_cfg_idle &amp;sd_cfg_idle&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;ldo7&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;ldo10&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt<br/>index a462c50f19a8..ce0e76749671 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt</a></div><div class='hunk'>@@ -21,5 +21,7 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 	sdhci0_pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='del'>-		reset-gpios = &lt;&amp;gpio1 12 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_32768_ck&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='ctx'> 	}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt<br/>index 438899e8829b..0384fc3f64e8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/mmc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mmc.txt</a></div><div class='hunk'>@@ -21,6 +21,11 @@ Optional properties:</div><div class='ctx'>   below for the case, when a GPIO is used for the CD line</div><div class='ctx'> - wp-inverted: when present, polarity on the WP line is inverted. See the note</div><div class='ctx'>   below for the case, when a GPIO is used for the WP line</div><div class='add'>+- disable-wp: When set no physical WP line is present. This property should</div><div class='add'>+  only be specified when the controller has a dedicated write-protect</div><div class='add'>+  detection logic. If a GPIO is always used for the write-protect detection</div><div class='add'>+  logic it is sufficient to not specify wp-gpios property in the absence of a WP</div><div class='add'>+  line.</div><div class='ctx'> - max-frequency: maximum operating clock frequency</div><div class='ctx'> - no-1-8-v: when present, denotes that 1.8v card voltage is not supported on</div><div class='ctx'>   this system, even if the controller claims it is.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt<br/>new file mode 100644<br/>index 000000000000..a1adfa495ad3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mtk-sd.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/mtk-sd.txt</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+* MTK MMC controller</div><div class='add'>+</div><div class='add'>+The MTK  MSDC can act as a MMC controller</div><div class='add'>+to support MMC, SD, and SDIO types of memory cards.</div><div class='add'>+</div><div class='add'>+This file documents differences between the core properties in mmc.txt</div><div class='add'>+and the properties used by the msdc driver.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc"</div><div class='add'>+- interrupts: Should contain MSDC interrupt number</div><div class='add'>+- clocks: MSDC source clock, HCLK</div><div class='add'>+- clock-names: "source", "hclk"</div><div class='add'>+- pinctrl-names: should be "default", "state_uhs"</div><div class='add'>+- pinctrl-0: should contain default/high speed pin ctrl</div><div class='add'>+- pinctrl-1: should contain uhs mode pin ctrl</div><div class='add'>+- vmmc-supply: power to the Core</div><div class='add'>+- vqmmc-supply: power to the IO</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+mmc0: mmc@11230000 {</div><div class='add'>+	compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";</div><div class='add'>+	reg = &lt;0 0x11230000 0 0x108&gt;;</div><div class='add'>+	interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;mt6397_vemc_3v3_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;mt6397_vio18_reg&gt;;</div><div class='add'>+	clocks = &lt;&amp;pericfg CLK_PERI_MSDC30_0&gt;, &lt;&amp;topckgen CLK_TOP_MSDC50_0_H_SEL&gt;;</div><div class='add'>+	clock-names = "source", "hclk";</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc0_pins_uhs&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt<br/>index 299081f94abd..d38942f6c5ae 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/mmc/renesas,mmcif.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mmc/renesas,mmcif.txt</a></div><div class='hunk'>@@ -18,6 +18,8 @@ Required properties:</div><div class='ctx'>   dma-names property.</div><div class='ctx'> - dma-names: must contain "tx" for the transmit DMA channel and "rx" for the</div><div class='ctx'>   receive DMA channel.</div><div class='add'>+- max-frequency: Maximum operating clock frequency, driver uses default clock</div><div class='add'>+  frequency if it is not set.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Example: R8A7790 (R-Car H2) MMCIF0</div><div class='hunk'>@@ -29,4 +31,5 @@ Example: R8A7790 (R-Car H2) MMCIF0</div><div class='ctx'> 		clocks = &lt;&amp;mstp3_clks R8A7790_CLK_MMCIF0&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0xd1&gt;, &lt;&amp;dmac0 0xd2&gt;;</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='add'>+		max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt<br/>new file mode 100644<br/>index 000000000000..4ff7128ee3b2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+* Broadcom STB NAND Controller</div><div class='add'>+</div><div class='add'>+The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND</div><div class='add'>+flash chips. It has a memory-mapped register interface for both control</div><div class='add'>+registers and for its data input/output buffer. On some SoCs, this controller is</div><div class='add'>+paired with a custom DMA engine (inventively named "Flash DMA") which supports</div><div class='add'>+basic PROGRAM and READ functions, among other features.</div><div class='add'>+</div><div class='add'>+This controller was originally designed for STB SoCs (BCM7xxx) but is now</div><div class='add'>+available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and</div><div class='add'>+iProc/Cygnus. Its history includes several similar (but not fully register</div><div class='add'>+compatible) versions.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible       : May contain an SoC-specific compatibility string (see below)</div><div class='add'>+                     to account for any SoC-specific hardware bits that may be</div><div class='add'>+                     added on top of the base core controller.</div><div class='add'>+                     In addition, must contain compatibility information about</div><div class='add'>+                     the core NAND controller, of the following form:</div><div class='add'>+                     "brcm,brcmnand" and an appropriate version compatibility</div><div class='add'>+                     string, like "brcm,brcmnand-v7.0"</div><div class='add'>+                     Possible values:</div><div class='add'>+                         brcm,brcmnand-v4.0</div><div class='add'>+                         brcm,brcmnand-v5.0</div><div class='add'>+                         brcm,brcmnand-v6.0</div><div class='add'>+                         brcm,brcmnand-v6.1</div><div class='add'>+                         brcm,brcmnand-v7.0</div><div class='add'>+                         brcm,brcmnand-v7.1</div><div class='add'>+                         brcm,brcmnand</div><div class='add'>+- reg              : the register start and length for NAND register region.</div><div class='add'>+                     (optional) Flash DMA register range (if present)</div><div class='add'>+                     (optional) NAND flash cache range (if at non-standard offset)</div><div class='add'>+- reg-names        : a list of the names corresponding to the previous register</div><div class='add'>+                     ranges. Should contain "nand" and (optionally)</div><div class='add'>+                     "flash-dma" and/or "nand-cache".</div><div class='add'>+- interrupts       : The NAND CTLRDY interrupt and (if Flash DMA is available)</div><div class='add'>+                     FLASH_DMA_DONE</div><div class='add'>+- interrupt-names  : May be "nand_ctlrdy" or "flash_dma_done", if broken out as</div><div class='add'>+                     individual interrupts.</div><div class='add'>+                     May be "nand", if the SoC has the individual NAND</div><div class='add'>+                     interrupts multiplexed behind another custom piece of</div><div class='add'>+                     hardware</div><div class='add'>+- interrupt-parent : See standard interrupt bindings</div><div class='add'>+- #address-cells   : &lt;1&gt; - subnodes give the chip-select number</div><div class='add'>+- #size-cells      : &lt;0&gt;</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- brcm,nand-has-wp          : Some versions of this IP include a write-protect</div><div class='add'>+                              (WP) control bit. It is always available on &gt;=</div><div class='add'>+                              v7.0. Use this property to describe the rare</div><div class='add'>+                              earlier versions of this core that include WP</div><div class='add'>+</div><div class='add'>+ -- Additonal SoC-specific NAND controller properties --</div><div class='add'>+</div><div class='add'>+The NAND controller is integrated differently on the variety of SoCs on which it</div><div class='add'>+is found. Part of this integration involves providing status and enable bits</div><div class='add'>+with which to control the 8 exposed NAND interrupts, as well as hardware for</div><div class='add'>+configuring the endianness of the data bus. On some SoCs, these features are</div><div class='add'>+handled via standard, modular components (e.g., their interrupts look like a</div><div class='add'>+normal IRQ chip), but on others, they are controlled in unique and interesting</div><div class='add'>+ways, sometimes with registers that lump multiple NAND-related functions</div><div class='add'>+together. The former case can be described simply by the standard interrupts</div><div class='add'>+properties in the main controller node. But for the latter exceptional cases,</div><div class='add'>+we define additional 'compatible' properties and associated register resources within the NAND controller node above.</div><div class='add'>+</div><div class='add'>+ - compatible: Can be one of several SoC-specific strings. Each SoC may have</div><div class='add'>+   different requirements for its additional properties, as described below each</div><div class='add'>+   bullet point below.</div><div class='add'>+</div><div class='add'>+   * "brcm,nand-bcm63138"</div><div class='add'>+     - reg: (required) the 'NAND_INT_BASE' register range, with separate status</div><div class='add'>+       and enable registers</div><div class='add'>+     - reg-names: (required) "nand-int-base"</div><div class='add'>+</div><div class='add'>+   * "brcm,nand-iproc"</div><div class='add'>+     - reg: (required) the "IDM" register range, for interrupt enable and APB</div><div class='add'>+       bus access endianness configuration, and the "EXT" register range,</div><div class='add'>+       for interrupt status/ack.</div><div class='add'>+     - reg-names: (required) a list of the names corresponding to the previous</div><div class='add'>+       register ranges. Should contain "iproc-idm" and "iproc-ext".</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+* NAND chip-select</div><div class='add'>+</div><div class='add'>+Each controller (compatible: "brcm,brcmnand") may contain one or more subnodes</div><div class='add'>+to represent enabled chip-selects which (may) contain NAND flash chips. Their</div><div class='add'>+properties are as follows.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible                : should contain "brcm,nandcs"</div><div class='add'>+- reg                       : a single integer representing the chip-select</div><div class='add'>+                              number (e.g., 0, 1, 2, etc.)</div><div class='add'>+- #address-cells            : see partition.txt</div><div class='add'>+- #size-cells               : see partition.txt</div><div class='add'>+- nand-ecc-strength         : see nand.txt</div><div class='add'>+- nand-ecc-step-size        : must be 512 or 1024. See nand.txt</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- nand-on-flash-bbt         : boolean, to enable the on-flash BBT for this</div><div class='add'>+                              chip-select. See nand.txt</div><div class='add'>+- brcm,nand-oob-sector-size : integer, to denote the spare area sector size</div><div class='add'>+                              expected for the ECC layout in use. This size, in</div><div class='add'>+                              addition to the strength and step-size,</div><div class='add'>+                              determines how the hardware BCH engine will lay</div><div class='add'>+                              out the parity bytes it stores on the flash.</div><div class='add'>+                              This property can be automatically determined by</div><div class='add'>+                              the flash geometry (particularly the NAND page</div><div class='add'>+                              and OOB size) in many cases, but when booting</div><div class='add'>+                              from NAND, the boot controller has only a limited</div><div class='add'>+                              number of available options for its default ECC</div><div class='add'>+                              layout.</div><div class='add'>+</div><div class='add'>+Each nandcs device node may optionally contain sub-nodes describing the flash</div><div class='add'>+partition mapping. See partition.txt for more detail.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+nand@f0442800 {</div><div class='add'>+	compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";</div><div class='add'>+	reg = &lt;0xF0442800 0x600&gt;,</div><div class='add'>+	      &lt;0xF0443000 0x100&gt;;</div><div class='add'>+	reg-names = "nand", "flash-dma";</div><div class='add'>+	interrupt-parent = &lt;&amp;hif_intr2_intc&gt;;</div><div class='add'>+	interrupts = &lt;24&gt;, &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	nandcs@1 {</div><div class='add'>+		compatible = "brcm,nandcs";</div><div class='add'>+		reg = &lt;1&gt;; // Chip select 1</div><div class='add'>+		nand-on-flash-bbt;</div><div class='add'>+		nand-ecc-strength = &lt;12&gt;;</div><div class='add'>+		nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+</div><div class='add'>+		// Partitions</div><div class='add'>+		#address-cells = &lt;1&gt;;  // &lt;2&gt;, for 64-bit offset</div><div class='add'>+		#size-cells = &lt;1&gt;;     // &lt;2&gt;, for 64-bit length</div><div class='add'>+		flash0.rootfs@0 {</div><div class='add'>+			reg = &lt;0 0x10000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		flash0@0 {</div><div class='add'>+			reg = &lt;0 0&gt;; // MTDPART_SIZ_FULL</div><div class='add'>+		};</div><div class='add'>+		flash0.kernel@10000000 {</div><div class='add'>+			reg = &lt;0x10000000 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt<br/>deleted file mode 100644<br/>index 8db32384a486..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/amd-xgbe-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-* AMD 10GbE PHY driver (amd-xgbe-phy)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "amd,xgbe-phy-seattle-v1a" and</div><div class='del'>-  "ethernet-phy-ieee802.3-c45"</div><div class='del'>-- reg: Address and length of the register sets for the device</div><div class='del'>-   - SerDes Rx/Tx registers</div><div class='del'>-   - SerDes integration registers (1/2)</div><div class='del'>-   - SerDes integration registers (2/2)</div><div class='del'>-- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='del'>-  that services interrupts for this device</div><div class='del'>-- interrupts: Should contain the amd-xgbe-phy interrupt.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- amd,speed-set: Speed capabilities of the device</div><div class='del'>-    0 - 1GbE and 10GbE (default)</div><div class='del'>-    1 - 2.5GbE and 10GbE</div><div class='del'>-</div><div class='del'>-The following optional properties are represented by an array with each</div><div class='del'>-value corresponding to a particular speed. The first array value represents</div><div class='del'>-the setting for the 1GbE speed, the second value for the 2.5GbE speed and</div><div class='del'>-the third value for the 10GbE speed.  All three values are required if the</div><div class='del'>-property is used.</div><div class='del'>-- amd,serdes-blwc: Baseline wandering correction enablement</div><div class='del'>-    0 - Off</div><div class='del'>-    1 - On</div><div class='del'>-- amd,serdes-cdr-rate: CDR rate speed selection</div><div class='del'>-- amd,serdes-pq-skew: PQ (data sampling) skew</div><div class='del'>-- amd,serdes-tx-amp: TX amplitude boost</div><div class='del'>-- amd,serdes-dfe-tap-config: DFE taps available to run</div><div class='del'>-- amd,serdes-dfe-tap-enable: DFE taps to enable</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	xgbe_phy@e1240800 {</div><div class='del'>-		compatible = "amd,xgbe-phy-seattle-v1a", "ethernet-phy-ieee802.3-c45";</div><div class='del'>-		reg = &lt;0 0xe1240800 0 0x00400&gt;,</div><div class='del'>-		      &lt;0 0xe1250000 0 0x00060&gt;,</div><div class='del'>-		      &lt;0 0xe1250080 0 0x00004&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		interrupts = &lt;0 323 4&gt;;</div><div class='del'>-		amd,speed-set = &lt;0&gt;;</div><div class='del'>-		amd,serdes-blwc = &lt;1&gt;, &lt;1&gt;, &lt;0&gt;;</div><div class='del'>-		amd,serdes-cdr-rate = &lt;2&gt;, &lt;2&gt;, &lt;7&gt;;</div><div class='del'>-		amd,serdes-pq-skew = &lt;10&gt;, &lt;10&gt;, &lt;30&gt;;</div><div class='del'>-		amd,serdes-tx-amp = &lt;15&gt;, &lt;15&gt;, &lt;10&gt;;</div><div class='del'>-		amd,serdes-dfe-tap-config = &lt;3&gt;, &lt;3&gt;, &lt;1&gt;;</div><div class='del'>-		amd,serdes-dfe-tap-enable = &lt;0&gt;, &lt;0&gt;, &lt;127&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/amd-xgbe.txt b/Documentation/devicetree/bindings/net/amd-xgbe.txt<br/>index 26efd526d16c..4bb624a73b54 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/amd-xgbe.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/amd-xgbe.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/amd-xgbe.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/amd-xgbe.txt</a></div><div class='hunk'>@@ -5,12 +5,16 @@ Required properties:</div><div class='ctx'> - reg: Address and length of the register sets for the device</div><div class='ctx'>    - MAC registers</div><div class='ctx'>    - PCS registers</div><div class='add'>+   - SerDes Rx/Tx registers</div><div class='add'>+   - SerDes integration registers (1/2)</div><div class='add'>+   - SerDes integration registers (2/2)</div><div class='ctx'> - interrupt-parent: Should be the phandle for the interrupt controller</div><div class='ctx'>   that services interrupts for this device</div><div class='ctx'> - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt</div><div class='ctx'>   listed is required and is the general device interrupt. If the optional</div><div class='ctx'>   amd,per-channel-interrupt property is specified, then one additional</div><div class='del'>-  interrupt for each DMA channel supported by the device should be specified</div><div class='add'>+  interrupt for each DMA channel supported by the device should be specified.</div><div class='add'>+  The last interrupt listed should be the PCS auto-negotiation interrupt.</div><div class='ctx'> - clocks:</div><div class='ctx'>    - DMA clock for the amd-xgbe device (used for calculating the</div><div class='ctx'>      correct Rx interrupt watchdog timer value on a DMA channel</div><div class='hunk'>@@ -19,7 +23,6 @@ Required properties:</div><div class='ctx'> - clock-names: Should be the names of the clocks</div><div class='ctx'>    - "dma_clk" for the DMA clock</div><div class='ctx'>    - "ptp_clk" for the PTP clock</div><div class='del'>-- phy-handle: See ethernet.txt file in the same directory</div><div class='ctx'> - phy-mode: See ethernet.txt file in the same directory</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='hunk'>@@ -29,19 +32,46 @@ Optional properties:</div><div class='ctx'> - amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate</div><div class='ctx'>   a unique interrupt for each DMA channel - this requires an additional</div><div class='ctx'>   interrupt be configured for each DMA channel</div><div class='add'>+- amd,speed-set: Speed capabilities of the device</div><div class='add'>+    0 - 1GbE and 10GbE (default)</div><div class='add'>+    1 - 2.5GbE and 10GbE</div><div class='add'>+</div><div class='add'>+The following optional properties are represented by an array with each</div><div class='add'>+value corresponding to a particular speed. The first array value represents</div><div class='add'>+the setting for the 1GbE speed, the second value for the 2.5GbE speed and</div><div class='add'>+the third value for the 10GbE speed.  All three values are required if the</div><div class='add'>+property is used.</div><div class='add'>+- amd,serdes-blwc: Baseline wandering correction enablement</div><div class='add'>+    0 - Off</div><div class='add'>+    1 - On</div><div class='add'>+- amd,serdes-cdr-rate: CDR rate speed selection</div><div class='add'>+- amd,serdes-pq-skew: PQ (data sampling) skew</div><div class='add'>+- amd,serdes-tx-amp: TX amplitude boost</div><div class='add'>+- amd,serdes-dfe-tap-config: DFE taps available to run</div><div class='add'>+- amd,serdes-dfe-tap-enable: DFE taps to enable</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> 	xgbe@e0700000 {</div><div class='ctx'> 		compatible = "amd,xgbe-seattle-v1a";</div><div class='ctx'> 		reg = &lt;0 0xe0700000 0 0x80000&gt;,</div><div class='del'>-		      &lt;0 0xe0780000 0 0x80000&gt;;</div><div class='add'>+		      &lt;0 0xe0780000 0 0x80000&gt;,</div><div class='add'>+		      &lt;0 0xe1240800 0 0x00400&gt;,</div><div class='add'>+		      &lt;0 0xe1250000 0 0x00060&gt;,</div><div class='add'>+		      &lt;0 0xe1250080 0 0x00004&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		interrupts = &lt;0 325 4&gt;,</div><div class='del'>-			     &lt;0 326 1&gt;, &lt;0 327 1&gt;, &lt;0 328 1&gt;, &lt;0 329 1&gt;;</div><div class='add'>+			     &lt;0 326 1&gt;, &lt;0 327 1&gt;, &lt;0 328 1&gt;, &lt;0 329 1&gt;,</div><div class='add'>+			     &lt;0 323 4&gt;;</div><div class='ctx'> 		amd,per-channel-interrupt;</div><div class='ctx'> 		clocks = &lt;&amp;xgbe_dma_clk&gt;, &lt;&amp;xgbe_ptp_clk&gt;;</div><div class='ctx'> 		clock-names = "dma_clk", "ptp_clk";</div><div class='del'>-		phy-handle = &lt;&amp;phy&gt;;</div><div class='ctx'> 		phy-mode = "xgmii";</div><div class='ctx'> 		mac-address = [ 02 a1 a2 a3 a4 a5 ];</div><div class='add'>+		amd,speed-set = &lt;0&gt;;</div><div class='add'>+		amd,serdes-blwc = &lt;1&gt;, &lt;1&gt;, &lt;0&gt;;</div><div class='add'>+		amd,serdes-cdr-rate = &lt;2&gt;, &lt;2&gt;, &lt;7&gt;;</div><div class='add'>+		amd,serdes-pq-skew = &lt;10&gt;, &lt;10&gt;, &lt;30&gt;;</div><div class='add'>+		amd,serdes-tx-amp = &lt;15&gt;, &lt;15&gt;, &lt;10&gt;;</div><div class='add'>+		amd,serdes-dfe-tap-config = &lt;3&gt;, &lt;3&gt;, &lt;1&gt;;</div><div class='add'>+		amd,serdes-dfe-tap-enable = &lt;0&gt;, &lt;0&gt;, &lt;127&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt<br/>new file mode 100644<br/>index 000000000000..4e29b2b82873<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/ezchip_enet.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ezchip_enet.txt</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+* EZchip NPS Management Ethernet port driver</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "ezchip,nps-mgt-enet"</div><div class='add'>+- reg: Address and length of the register set for the device</div><div class='add'>+- interrupts: Should contain the ENET interrupt</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+	ethernet@f0003000 {</div><div class='add'>+		compatible = "ezchip,nps-mgt-enet";</div><div class='add'>+		reg = &lt;0xf0003000 0x44&gt;;</div><div class='add'>+		interrupts = &lt;7&gt;;</div><div class='add'>+		mac-address = [ 00 11 22 33 44 55 ];</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ipq806x-dwmac.txt b/Documentation/devicetree/bindings/net/ipq806x-dwmac.txt<br/>new file mode 100644<br/>index 000000000000..6d7ab4e524d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/ipq806x-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ipq806x-dwmac.txt</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+* IPQ806x DWMAC Ethernet controller</div><div class='add'>+</div><div class='add'>+The device inherits all the properties of the dwmac/stmmac devices</div><div class='add'>+described in the file net/stmmac.txt with the following changes.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: should be "qcom,ipq806x-gmac" along with "snps,dwmac"</div><div class='add'>+	      and any applicable more detailed version number</div><div class='add'>+	      described in net/stmmac.txt</div><div class='add'>+</div><div class='add'>+- qcom,nss-common: should contain a phandle to a syscon device mapping the</div><div class='add'>+		   nss-common registers.</div><div class='add'>+</div><div class='add'>+- qcom,qsgmii-csr: should contain a phandle to a syscon device mapping the</div><div class='add'>+		   qsgmii-csr registers.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gmac: ethernet@37000000 {</div><div class='add'>+		device_type = "network";</div><div class='add'>+		compatible = "qcom,ipq806x-gmac";</div><div class='add'>+		reg = &lt;0x37000000 0x200000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "macirq";</div><div class='add'>+</div><div class='add'>+		qcom,nss-common = &lt;&amp;nss_common&gt;;</div><div class='add'>+		qcom,qsgmii-csr = &lt;&amp;qsgmii_csr&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;gcc GMAC_CORE1_CLK&gt;;</div><div class='add'>+		clock-names = "stmmaceth";</div><div class='add'>+</div><div class='add'>+		resets = &lt;&amp;gcc GMAC_CORE1_RESET&gt;;</div><div class='add'>+		reset-names = "stmmaceth";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt<br/>index ba19d671e808..b5d79761ac97 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/macb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/macb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/macb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/macb.txt</a></div><div class='hunk'>@@ -7,8 +7,10 @@ Required properties:</div><div class='ctx'>   Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".</div><div class='ctx'>   Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on</div><div class='ctx'>   the Cadence GEM, or the generic form: "cdns,gem".</div><div class='del'>-  Use "cdns,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.</div><div class='del'>-  Use "cdns,sama5d4-gem" for the Gigabit IP available on Atmel sama5d4 SoCs.</div><div class='add'>+  Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.</div><div class='add'>+  Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.</div><div class='add'>+  Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.</div><div class='add'>+  Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC.</div><div class='ctx'> - reg: Address and length of the register set for the device</div><div class='ctx'> - interrupts: Should contain macb interrupt</div><div class='ctx'> - phy-mode: See ethernet.txt file in the same directory.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt<br/>index 750d577e8083..f5a8ca29aff0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> * Marvell Armada 370 / Armada XP Ethernet Controller (NETA)</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: should be "marvell,armada-370-neta".</div><div class='add'>+- compatible: "marvell,armada-370-neta" or "marvell,armada-xp-neta".</div><div class='ctx'> - reg: address and length of the register set for the device.</div><div class='ctx'> - interrupts: interrupt for the device</div><div class='ctx'> - phy: See ethernet.txt file in the same directory.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt b/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt<br/>new file mode 100644<br/>index 000000000000..7c4a0cc370cf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+* Marvell International Ltd. NCI NFC Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "mrvl,nfc-uart".</div><div class='add'>+</div><div class='add'>+Optional SoC specific properties:</div><div class='add'>+- pinctrl-names: Contains only one value - "default".</div><div class='add'>+- pintctrl-0: Specifies the pin control groups used for this controller.</div><div class='add'>+- reset-n-io: Output GPIO pin used to reset the chip (active low).</div><div class='add'>+- hci-muxed: Specifies that the chip is muxing NCI over HCI frames.</div><div class='add'>+</div><div class='add'>+Optional UART-based chip specific properties:</div><div class='add'>+- flow-control: Specifies that the chip is using RTS/CTS.</div><div class='add'>+- break-control: Specifies that the chip needs specific break management.</div><div class='add'>+</div><div class='add'>+Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nfcmrvluart: nfcmrvluart@5 {</div><div class='add'>+		compatible = "mrvl,nfc-uart";</div><div class='add'>+</div><div class='add'>+		reset-n-io = &lt;&amp;gpio3 16 0&gt;;</div><div class='add'>+</div><div class='add'>+		hci-muxed;</div><div class='add'>+		flow-control;</div><div class='add'>+        }</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/st21nfcb.txt b/Documentation/devicetree/bindings/net/nfc/st-nci.txt<br/>index bb237072dbe9..d707588ed734 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nfc/st21nfcb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/nfc/st21nfcb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nfc/st-nci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/st-nci.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='del'>-* STMicroelectronics SAS. ST21NFCB NFC Controller</div><div class='add'>+* STMicroelectronics SAS. ST NCI NFC Controller</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: Should be "st,st21nfcb-i2c".</div><div class='add'>+- compatible: Should be "st,st21nfcb-i2c" or "st,st21nfcc-i2c".</div><div class='ctx'> - clock-frequency: I²C work frequency.</div><div class='ctx'> - reg: address on the bus</div><div class='ctx'> - interrupt-parent: phandle for the interrupt gpio controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/trf7970a.txt b/Documentation/devicetree/bindings/net/nfc/trf7970a.txt<br/>index 7c89ca290ced..32b35a07abe4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nfc/trf7970a.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/nfc/trf7970a.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nfc/trf7970a.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nfc/trf7970a.txt</a></div><div class='hunk'>@@ -18,6 +18,9 @@ Optional SoC Specific Properties:</div><div class='ctx'>   "IRQ Status Read" erratum.</div><div class='ctx'> - en2-rf-quirk: Specify that the trf7970a being used has the "EN2 RF"</div><div class='ctx'>   erratum.</div><div class='add'>+- t5t-rmb-extra-byte-quirk: Specify that the trf7970a has the erratum</div><div class='add'>+  where an extra byte is returned by Read Multiple Block commands issued</div><div class='add'>+  to Type 5 tags.</div><div class='ctx'> </div><div class='ctx'> Example (for ARM-based BeagleBone with TRF7970A on SPI1):</div><div class='ctx'> </div><div class='hunk'>@@ -39,6 +42,7 @@ Example (for ARM-based BeagleBone with TRF7970A on SPI1):</div><div class='ctx'> 		autosuspend-delay = &lt;30000&gt;;</div><div class='ctx'> 		irq-status-read-quirk;</div><div class='ctx'> 		en2-rf-quirk;</div><div class='add'>+		t5t-rmb-extra-byte-quirk;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt b/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt<br/>new file mode 100644<br/>index 000000000000..7edba1264f6f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.txt</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+* NXP LPC1850 GMAC ethernet controller</div><div class='add'>+</div><div class='add'>+This device is a platform glue layer for stmmac.</div><div class='add'>+Please see stmmac.txt for the other unchanged properties.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+ - compatible:  Should contain "nxp,lpc1850-dwmac"</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+mac: ethernet@40010000 {</div><div class='add'>+	compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac";</div><div class='add'>+	reg = &lt;0x40010000 0x2000&gt;;</div><div class='add'>+	interrupts = &lt;5&gt;;</div><div class='add'>+	interrupt-names = "macirq";</div><div class='add'>+	clocks = &lt;&amp;ccu1 CLK_CPU_ETHERNET&gt;;</div><div class='add'>+	clock-names = "stmmaceth";</div><div class='add'>+	resets = &lt;&amp;rgu 22&gt;;</div><div class='add'>+	reset-names = "stmmaceth";</div><div class='add'>+}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/phy.txt b/Documentation/devicetree/bindings/net/phy.txt<br/>index 40831fbaff72..525e1658f2da 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/phy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/phy.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/phy.txt</a></div><div class='hunk'>@@ -30,6 +30,9 @@ Optional Properties:</div><div class='ctx'> </div><div class='ctx'> - max-speed: Maximum PHY supported speed (10, 100, 1000...)</div><div class='ctx'> </div><div class='add'>+- broken-turn-around: If set, indicates the PHY device does not correctly</div><div class='add'>+  release the turn around line low at the end of a MDIO transaction.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> ethernet-phy@0 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt<br/>new file mode 100644<br/>index 000000000000..1fd8831437bf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/renesas,ravb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/renesas,ravb.txt</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+* Renesas Electronics Ethernet AVB</div><div class='add'>+</div><div class='add'>+This file provides information on what the device node for the Ethernet AVB</div><div class='add'>+interface contains.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.</div><div class='add'>+	      "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.</div><div class='add'>+- reg: offset and length of (1) the register block and (2) the stream buffer.</div><div class='add'>+- interrupts: interrupt specifier for the sole interrupt.</div><div class='add'>+- phy-mode: see ethernet.txt file in the same directory.</div><div class='add'>+- phy-handle: see ethernet.txt file in the same directory.</div><div class='add'>+- #address-cells: number of address cells for the MDIO bus, must be equal to 1.</div><div class='add'>+- #size-cells: number of size cells on the MDIO bus, must be equal to 0.</div><div class='add'>+- clocks: clock phandle and specifier pair.</div><div class='add'>+- pinctrl-0: phandle, referring to a default pin configuration node.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- interrupt-parent: the phandle for the interrupt controller that services</div><div class='add'>+		    interrupts for this device.</div><div class='add'>+- pinctrl-names: pin configuration state name ("default").</div><div class='add'>+- renesas,no-ether-link: boolean, specify when a board does not provide a proper</div><div class='add'>+			 AVB_LINK signal.</div><div class='add'>+- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is</div><div class='add'>+				 active-low instead of normal active-high.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	ethernet@e6800000 {</div><div class='add'>+		compatible = "renesas,etheravb-r8a7790";</div><div class='add'>+		reg = &lt;0 0xe6800000 0 0x800&gt;, &lt;0 0xee0e8000 0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;0 163 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp8_clks R8A7790_CLK_ETHERAVB&gt;;</div><div class='add'>+		phy-mode = "rmii";</div><div class='add'>+		phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;ether_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		renesas,no-ether-link;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+			interrupts = &lt;15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.txt b/Documentation/devicetree/bindings/net/rockchip-dwmac.txt<br/>index 21fd199e89b5..93eac7ce1446 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/net/rockchip-dwmac.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/rockchip-dwmac.txt</a></div><div class='hunk'>@@ -3,7 +3,7 @@ Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)</div><div class='ctx'> The device node has following properties.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>- - compatible: Can be "rockchip,rk3288-gmac".</div><div class='add'>+ - compatible: Can be one of "rockchip,rk3288-gmac", "rockchip,rk3368-gmac"</div><div class='ctx'>  - reg: addresses and length of the register sets for the device.</div><div class='ctx'>  - interrupts: Should contain the GMAC interrupts.</div><div class='ctx'>  - interrupt-names: Should contain the interrupt names "macirq".</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt<br/>new file mode 100644<br/>index 000000000000..58d935b58598<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/ti,dp83867.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/net/ti,dp83867.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* Texas Instruments - dp83867 Giga bit ethernet phy</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+	- reg - The ID number for the phy, usually a small integer</div><div class='add'>+	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h</div><div class='add'>+		for applicable values</div><div class='add'>+	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h</div><div class='add'>+		for applicable values</div><div class='add'>+	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h</div><div class='add'>+		for applicable values</div><div class='add'>+</div><div class='add'>+Default child nodes are standard Ethernet PHY device</div><div class='add'>+nodes as described in Documentation/devicetree/bindings/net/phy.txt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_75_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Datasheet can be found:</div><div class='add'>+http://www.ti.com/product/DP83867IR/datasheet</div><div class='head'>diff --git a/Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt b/Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt<br/>new file mode 100644<br/>index 000000000000..8270319a99de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/panel/hannstar,hsd100pxn1.txt</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "hannstar,hsd100pxn1"</div><div class='add'>+</div><div class='add'>+This binding is compatible with the simple-panel binding, which is specified</div><div class='add'>+in simple-panel.txt in this directory.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/panel/lg,lb070wv8.txt b/Documentation/devicetree/bindings/panel/lg,lb070wv8.txt<br/>new file mode 100644<br/>index 000000000000..a7588e5259cf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/panel/lg,lb070wv8.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/panel/lg,lb070wv8.txt</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+LG 7" (800x480 pixels) TFT LCD panel</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "lg,lb070wv8"</div><div class='add'>+</div><div class='add'>+This binding is compatible with the simple-panel binding, which is specified</div><div class='add'>+in simple-panel.txt in this directory.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt b/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt<br/>new file mode 100644<br/>index 000000000000..36d881c8e6d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pci/xgene-pci-msi.txt</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+* AppliedMicro X-Gene v1 PCIe MSI controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible: should be "apm,xgene1-msi" to identify</div><div class='add'>+	      X-Gene v1 PCIe MSI controller block.</div><div class='add'>+- msi-controller: indicates that this is X-Gene v1 PCIe MSI controller node</div><div class='add'>+- reg: physical base address (0x79000000) and length (0x900000) for controller</div><div class='add'>+       registers. These registers include the MSI termination address and data</div><div class='add'>+       registers as well as the MSI interrupt status registers.</div><div class='add'>+- reg-names: not required</div><div class='add'>+- interrupts: A list of 16 interrupt outputs of the controller, starting from</div><div class='add'>+	      interrupt number 0x10 to 0x1f.</div><div class='add'>+- interrupt-names: not required</div><div class='add'>+</div><div class='add'>+Each PCIe node needs to have property msi-parent that points to msi controller node</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+SoC DTSI:</div><div class='add'>+</div><div class='add'>+	+ MSI node:</div><div class='add'>+	msi@79000000 {</div><div class='add'>+		compatible = "apm,xgene1-msi";</div><div class='add'>+		msi-controller;</div><div class='add'>+		reg = &lt;0x00 0x79000000 0x0 0x900000&gt;;</div><div class='add'>+		interrupts = 	&lt;0x0 0x10 0x4&gt;</div><div class='add'>+				&lt;0x0 0x11 0x4&gt;</div><div class='add'>+				&lt;0x0 0x12 0x4&gt;</div><div class='add'>+				&lt;0x0 0x13 0x4&gt;</div><div class='add'>+				&lt;0x0 0x14 0x4&gt;</div><div class='add'>+				&lt;0x0 0x15 0x4&gt;</div><div class='add'>+				&lt;0x0 0x16 0x4&gt;</div><div class='add'>+				&lt;0x0 0x17 0x4&gt;</div><div class='add'>+				&lt;0x0 0x18 0x4&gt;</div><div class='add'>+				&lt;0x0 0x19 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1a 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1b 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1c 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1d 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1e 0x4&gt;</div><div class='add'>+				&lt;0x0 0x1f 0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	+ PCIe controller node with msi-parent property pointing to MSI node:</div><div class='add'>+	pcie0: pcie@1f2b0000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		reg = &lt; 0x00 0x1f2b0000 0x0 0x00010000   /* Controller registers */</div><div class='add'>+			0xe0 0xd0000000 0x0 0x00040000&gt;; /* PCI config space */</div><div class='add'>+		reg-names = "csr", "cfg";</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000   /* io */</div><div class='add'>+			  0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000&gt;; /* mem */</div><div class='add'>+		dma-ranges = &lt;0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000</div><div class='add'>+			      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+		interrupt-map = &lt;0x0 0x0 0x0 0x1 &amp;gic 0x0 0xc2 0x1</div><div class='add'>+				 0x0 0x0 0x0 0x2 &amp;gic 0x0 0xc3 0x1</div><div class='add'>+				 0x0 0x0 0x0 0x3 &amp;gic 0x0 0xc4 0x1</div><div class='add'>+				 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xc5 0x1&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		clocks = &lt;&amp;pcie0clk 0&gt;;</div><div class='add'>+		msi-parent= &lt;&amp;msi&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xilinx-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-pcie.txt<br/>index 3e2c88d97ad4..02f979a48aeb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pci/xilinx-pcie.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pci/xilinx-pcie.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pci/xilinx-pcie.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pci/xilinx-pcie.txt</a></div><div class='hunk'>@@ -58,5 +58,5 @@ Example:</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		}</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt<br/>new file mode 100644<br/>index 000000000000..7f81ef90146a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+* Broadcom SATA3 PHY for STB</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be one or more of</div><div class='add'>+     "brcm,bcm7445-sata-phy"</div><div class='add'>+     "brcm,phy-sata3"</div><div class='add'>+- address-cells: should be 1</div><div class='add'>+- size-cells: should be 0</div><div class='add'>+- reg: register range for the PHY PCB interface</div><div class='add'>+- reg-names: should be "phy"</div><div class='add'>+</div><div class='add'>+Sub-nodes:</div><div class='add'>+  Each port's PHY should be represented as a sub-node.</div><div class='add'>+</div><div class='add'>+Sub-nodes required properties:</div><div class='add'>+- reg: the PHY number</div><div class='add'>+- phy-cells: generic PHY binding; must be 0</div><div class='add'>+Optional:</div><div class='add'>+- brcm,enable-ssc: use spread spectrum clocking (SSC) on this port</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	sata-phy@f0458100 {</div><div class='add'>+		compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";</div><div class='add'>+		reg = &lt;0xf0458100 0x1e00&gt;, &lt;0xf045804c 0x10&gt;;</div><div class='add'>+		reg-names = "phy";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sata-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt b/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt<br/>new file mode 100644<br/>index 000000000000..afbc7e24a3de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+IMG Pistachio USB PHY</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+--------------------</div><div class='add'>+ - compatible: Must be "img,pistachio-usb-phy".</div><div class='add'>+ - #phy-cells: Must be 0.  See ./phy-bindings.txt for details.</div><div class='add'>+ - clocks: Must contain an entry for each entry in clock-names.</div><div class='add'>+   See ../clock/clock-bindings.txt for details.</div><div class='add'>+ - clock-names: Must include "usb_phy".</div><div class='add'>+ - img,cr-top: Must constain a phandle to the CR_TOP syscon node.</div><div class='add'>+ - img,refclk: Indicates the reference clock source for the USB PHY.</div><div class='add'>+   See &lt;dt-bindings/phy/phy-pistachio-usb.h&gt; for a list of valid values.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+--------------------</div><div class='add'>+ - phy-supply: USB VBUS supply.  Must supply 5.0V.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+--------</div><div class='add'>+usb_phy: usb-phy {</div><div class='add'>+	compatible = "img,pistachio-usb-phy";</div><div class='add'>+	clocks = &lt;&amp;clk_core CLK_USB_PHY&gt;;</div><div class='add'>+	clock-names = "usb_phy";</div><div class='add'>+	phy-supply = &lt;&amp;usb_vbus&gt;;</div><div class='add'>+	img,refclk = &lt;REFCLK_CLK_CORE&gt;;</div><div class='add'>+	img,cr-top = &lt;&amp;cr_top&gt;;</div><div class='add'>+	#phy-cells = &lt;0&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt b/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt<br/>new file mode 100644<br/>index 000000000000..660a13ca90b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+* Marvell PXA1928 USB and HSIC PHYs</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "marvell,pxa1928-usb-phy" or "marvell,pxa1928-hsic-phy"</div><div class='add'>+- reg: base address and length of the registers</div><div class='add'>+- clocks - A single clock. From common clock binding.</div><div class='add'>+- #phys-cells: should be 0. From commmon phy binding.</div><div class='add'>+- resets: reference to the reset controller</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	usbphy: phy@7000 {</div><div class='add'>+		compatible = "marvell,pxa1928-usb-phy";</div><div class='add'>+		reg = &lt;0x7000 0xe0&gt;;</div><div class='add'>+		clocks = &lt;&amp;apmu_clocks PXA1928_CLK_USB&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt<br/>index 00fc52a034b7..d564ba4f1cf6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt</a></div><div class='hunk'>@@ -6,6 +6,7 @@ This file provides information on what the device node for the R-Car generation</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.</div><div class='ctx'> 	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.</div><div class='add'>+	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.</div><div class='ctx'> - reg: offset and length of the register block.</div><div class='ctx'> - #address-cells: number of address cells for the USB channel subnodes, must</div><div class='ctx'> 		  be &lt;1&gt;.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt<br/>index fdd8046e650a..9462ab7ddd1f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt</a></div><div class='hunk'>@@ -16,6 +16,8 @@ Required properties:</div><div class='ctx'>   "allwinner,sun7i-a20-pinctrl"</div><div class='ctx'>   "allwinner,sun8i-a23-pinctrl"</div><div class='ctx'>   "allwinner,sun8i-a23-r-pinctrl"</div><div class='add'>+  "allwinner,sun8i-a33-pinctrl"</div><div class='add'>+</div><div class='ctx'> - reg: Should contain the register physical address and length for the</div><div class='ctx'>   pin controller.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..a8bb5e26019c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+* Pin-controller driver for the Marvell Berlin SoCs</div><div class='add'>+</div><div class='add'>+Pin control registers are part of both chip controller and system</div><div class='add'>+controller register sets. Pin controller nodes should be a sub-node of</div><div class='add'>+either the chip controller or system controller node. The pins</div><div class='add'>+controlled are organized in groups, so no actual pin information is</div><div class='add'>+needed.</div><div class='add'>+</div><div class='add'>+A pin-controller node should contain subnodes representing the pin group</div><div class='add'>+configurations, one per function. Each subnode has the group name and</div><div class='add'>+the muxing function used.</div><div class='add'>+</div><div class='add'>+Be aware the Marvell Berlin datasheets use the keyword 'mode' for what</div><div class='add'>+is called a 'function' in the pin-controller subsystem.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be one of:</div><div class='add'>+	"marvell,berlin2-soc-pinctrl",</div><div class='add'>+	"marvell,berlin2-system-pinctrl",</div><div class='add'>+	"marvell,berlin2cd-soc-pinctrl",</div><div class='add'>+	"marvell,berlin2cd-system-pinctrl",</div><div class='add'>+	"marvell,berlin2q-soc-pinctrl",</div><div class='add'>+	"marvell,berlin2q-system-pinctrl"</div><div class='add'>+</div><div class='add'>+Required subnode-properties:</div><div class='add'>+- groups: a list of strings describing the group names.</div><div class='add'>+- function: a string describing the function used to mux the groups.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sys_pinctrl: pin-controller {</div><div class='add'>+	compatible = "marvell,berlin2q-system-pinctrl";</div><div class='add'>+</div><div class='add'>+	uart0_pmux: uart0-pmux {</div><div class='add'>+		groups = "GSM12";</div><div class='add'>+		function = "uart0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pmux&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..8bbf25d58656<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+* Freescale i.MX7 Dual IOMUX Controller</div><div class='add'>+</div><div class='add'>+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part</div><div class='add'>+and usage.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imx7d-iomuxc"</div><div class='add'>+- fsl,pins: each entry consists of 6 integers and represents the mux and config</div><div class='add'>+  setting for one pin.  The first 5 integers &lt;mux_reg conf_reg input_reg mux_val</div><div class='add'>+  input_val&gt; are specified using a PIN_FUNC_ID macro, which can be found in</div><div class='add'>+  imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is</div><div class='add'>+  the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual</div><div class='add'>+  Reference Manual for detailed CONFIG settings.</div><div class='add'>+</div><div class='add'>+CONFIG bits definition:</div><div class='add'>+PAD_CTL_PUS_100K_DOWN           (0 &lt;&lt; 5)</div><div class='add'>+PAD_CTL_PUS_5K_UP               (1 &lt;&lt; 5)</div><div class='add'>+PAD_CTL_PUS_47K_UP              (2 &lt;&lt; 5)</div><div class='add'>+PAD_CTL_PUS_100K_UP             (3 &lt;&lt; 5)</div><div class='add'>+PAD_CTL_PUE                     (1 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_HYS                     (1 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_SRE_SLOW                (1 &lt;&lt; 2)</div><div class='add'>+PAD_CTL_SRE_FAST                (0 &lt;&lt; 2)</div><div class='add'>+PAD_CTL_DSE_X1                  (0 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_DSE_X2                  (1 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_DSE_X3                  (2 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_DSE_X4                  (3 &lt;&lt; 0)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..08a4a32c8eb0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+Imagination Technologies Pistachio SoC pin controllers</div><div class='add'>+======================================================</div><div class='add'>+</div><div class='add'>+The pin controllers on Pistachio are a combined GPIO controller, (GPIO)</div><div class='add'>+interrupt controller, and pinmux + pinconf device. The system ("east") pin</div><div class='add'>+controller on Pistachio has 99 pins, 90 of which are MFIOs which can be</div><div class='add'>+configured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs</div><div class='add'>+each. The GPIO banks are represented as sub-nodes of the pad controller node.</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and</div><div class='add'>+../interrupt-controller/interrupts.txt for generic information regarding</div><div class='add'>+pin controller, GPIO, and interrupt bindings.</div><div class='add'>+</div><div class='add'>+Required properties for pin controller node:</div><div class='add'>+--------------------------------------------</div><div class='add'>+ - compatible: "img,pistachio-system-pinctrl".</div><div class='add'>+ - reg: Address range of the pinctrl registers.</div><div class='add'>+</div><div class='add'>+Required properties for GPIO bank sub-nodes:</div><div class='add'>+--------------------------------------------</div><div class='add'>+ - interrupts: Interrupt line for the GPIO bank.</div><div class='add'>+ - gpio-controller: Indicates the device is a GPIO controller.</div><div class='add'>+ - #gpio-cells: Must be two. The first cell is the GPIO pin number and the</div><div class='add'>+   second cell indicates the polarity. See &lt;dt-bindings/gpio/gpio.h&gt; for</div><div class='add'>+   a list of possible values.</div><div class='add'>+ - interrupt-controller: Indicates the device is an interrupt controller.</div><div class='add'>+ - #interrupt-cells: Must be two. The first cell is the GPIO pin number and</div><div class='add'>+   the second cell encodes the interrupt flags. See</div><div class='add'>+   &lt;dt-bindings/interrupt-controller/irq.h&gt; for a list of valid flags.</div><div class='add'>+</div><div class='add'>+Note that the N GPIO bank sub-nodes *must* be named gpio0, gpio1, ... gpioN-1.</div><div class='add'>+</div><div class='add'>+Required properties for pin configuration sub-nodes:</div><div class='add'>+----------------------------------------------------</div><div class='add'>+ - pins: List of pins to which the configuration applies. See below for a</div><div class='add'>+   list of possible pins.</div><div class='add'>+</div><div class='add'>+Optional properties for pin configuration sub-nodes:</div><div class='add'>+----------------------------------------------------</div><div class='add'>+ - function: Mux function for the specified pins. This is not applicable for</div><div class='add'>+   non-MFIO pins. See below for a list of valid functions for each pin.</div><div class='add'>+ - bias-high-impedance: Enable high-impedance mode.</div><div class='add'>+ - bias-pull-up: Enable weak pull-up.</div><div class='add'>+ - bias-pull-down: Enable weak pull-down.</div><div class='add'>+ - bias-bus-hold: Enable bus-keeper mode.</div><div class='add'>+ - drive-strength: Drive strength in mA. Supported values: 2, 4, 8, 12.</div><div class='add'>+ - input-schmitt-enable: Enable Schmitt trigger.</div><div class='add'>+ - input-schmitt-disable: Disable Schmitt trigger.</div><div class='add'>+ - slew-rate: Slew rate control. 0 for slow, 1 for fast.</div><div class='add'>+</div><div class='add'>+Pin		Functions</div><div class='add'>+---		---------</div><div class='add'>+mfio0		spim1</div><div class='add'>+mfio1		spim1, spim0, uart1</div><div class='add'>+mfio2		spim1, spim0, uart1</div><div class='add'>+mfio3		spim1</div><div class='add'>+mfio4		spim1</div><div class='add'>+mfio5		spim1</div><div class='add'>+mfio6		spim1</div><div class='add'>+mfio7		spim1</div><div class='add'>+mfio8		spim0</div><div class='add'>+mfio9		spim0</div><div class='add'>+mfio10		spim0</div><div class='add'>+mfio11		spis</div><div class='add'>+mfio12		spis</div><div class='add'>+mfio13		spis</div><div class='add'>+mfio14		spis</div><div class='add'>+mfio15		sdhost, mips_trace_clk, mips_trace_data</div><div class='add'>+mfio16		sdhost, mips_trace_dint, mips_trace_data</div><div class='add'>+mfio17		sdhost, mips_trace_trigout, mips_trace_data</div><div class='add'>+mfio18		sdhost, mips_trace_trigin, mips_trace_data</div><div class='add'>+mfio19		sdhost, mips_trace_dm, mips_trace_data</div><div class='add'>+mfio20		sdhost, mips_trace_probe_n, mips_trace_data</div><div class='add'>+mfio21		sdhost, mips_trace_data</div><div class='add'>+mfio22		sdhost, mips_trace_data</div><div class='add'>+mfio23		sdhost</div><div class='add'>+mfio24		sdhost</div><div class='add'>+mfio25		sdhost</div><div class='add'>+mfio26		sdhost</div><div class='add'>+mfio27		sdhost</div><div class='add'>+mfio28		i2c0, spim0</div><div class='add'>+mfio29		i2c0, spim0</div><div class='add'>+mfio30		i2c1, spim0</div><div class='add'>+mfio31		i2c1, spim1</div><div class='add'>+mfio32		i2c2</div><div class='add'>+mfio33		i2c2</div><div class='add'>+mfio34		i2c3</div><div class='add'>+mfio35		i2c3</div><div class='add'>+mfio36		i2s_out, audio_clk_in</div><div class='add'>+mfio37		i2s_out, debug_raw_cca_ind</div><div class='add'>+mfio38		i2s_out, debug_ed_sec20_cca_ind</div><div class='add'>+mfio39		i2s_out, debug_ed_sec40_cca_ind</div><div class='add'>+mfio40		i2s_out, debug_agc_done_0</div><div class='add'>+mfio41		i2s_out, debug_agc_done_1</div><div class='add'>+mfio42		i2s_out, debug_ed_cca_ind</div><div class='add'>+mfio43		i2s_out, debug_s2l_done</div><div class='add'>+mfio44		i2s_out</div><div class='add'>+mfio45		i2s_dac_clk, audio_sync</div><div class='add'>+mfio46		audio_trigger</div><div class='add'>+mfio47		i2s_in</div><div class='add'>+mfio48		i2s_in</div><div class='add'>+mfio49		i2s_in</div><div class='add'>+mfio50		i2s_in</div><div class='add'>+mfio51		i2s_in</div><div class='add'>+mfio52		i2s_in</div><div class='add'>+mfio53		i2s_in</div><div class='add'>+mfio54		i2s_in, spdif_in</div><div class='add'>+mfio55		uart0, spim0, spim1</div><div class='add'>+mfio56		uart0, spim0, spim1</div><div class='add'>+mfio57		uart0, spim0, spim1</div><div class='add'>+mfio58		uart0, spim1</div><div class='add'>+mfio59		uart1</div><div class='add'>+mfio60		uart1</div><div class='add'>+mfio61		spdif_out</div><div class='add'>+mfio62		spdif_in</div><div class='add'>+mfio63		eth, mips_trace_clk, mips_trace_data</div><div class='add'>+mfio64		eth, mips_trace_dint, mips_trace_data</div><div class='add'>+mfio65		eth, mips_trace_trigout, mips_trace_data</div><div class='add'>+mfio66		eth, mips_trace_trigin, mips_trace_data</div><div class='add'>+mfio67		eth, mips_trace_dm, mips_trace_data</div><div class='add'>+mfio68		eth, mips_trace_probe_n, mips_trace_data</div><div class='add'>+mfio69		eth, mips_trace_data</div><div class='add'>+mfio70		eth, mips_trace_data</div><div class='add'>+mfio71		eth</div><div class='add'>+mfio72		ir</div><div class='add'>+mfio73		pwmpdm, mips_trace_clk, sram_debug</div><div class='add'>+mfio74		pwmpdm, mips_trace_dint, sram_debug</div><div class='add'>+mfio75		pwmpdm, mips_trace_trigout, rom_debug</div><div class='add'>+mfio76		pwmpdm, mips_trace_trigin, rom_debug</div><div class='add'>+mfio77		mdc_debug, mips_trace_dm, rpu_debug</div><div class='add'>+mfio78		mdc_debug, mips_trace_probe_n, rpu_debug</div><div class='add'>+mfio79		ddr_debug, mips_trace_data, mips_debug</div><div class='add'>+mfio80		ddr_debug, mips_trace_data, mips_debug</div><div class='add'>+mfio81		dreq0, mips_trace_data, eth_debug</div><div class='add'>+mfio82		dreq1, mips_trace_data, eth_debug</div><div class='add'>+mfio83		mips_pll_lock, mips_trace_data, usb_debug</div><div class='add'>+mfio84		sys_pll_lock, mips_trace_data, usb_debug</div><div class='add'>+mfio85		wifi_pll_lock, mips_trace_data, sdhost_debug</div><div class='add'>+mfio86		bt_pll_lock, mips_trace_data, sdhost_debug</div><div class='add'>+mfio87		rpu_v_pll_lock, dreq2, socif_debug</div><div class='add'>+mfio88		rpu_l_pll_lock, dreq3, socif_debug</div><div class='add'>+mfio89		audio_pll_lock, dreq4, dreq5</div><div class='add'>+tck</div><div class='add'>+trstn</div><div class='add'>+tdi</div><div class='add'>+tms</div><div class='add'>+tdo</div><div class='add'>+jtag_comply</div><div class='add'>+safe_mode</div><div class='add'>+por_disable</div><div class='add'>+resetn</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+--------</div><div class='add'>+pinctrl@18101C00 {</div><div class='add'>+	compatible = "img,pistachio-system-pinctrl";</div><div class='add'>+	reg = &lt;0x18101C00 0x400&gt;;</div><div class='add'>+</div><div class='add'>+	gpio0: gpio0 {</div><div class='add'>+		interrupts = &lt;GIC_SHARED 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	gpio5: gpio5 {</div><div class='add'>+		interrupts = &lt;GIC_SHARED 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	uart0_xfer: uart0-xfer {</div><div class='add'>+		uart0-rxd {</div><div class='add'>+			pins = "mfio55";</div><div class='add'>+			function = "uart0";</div><div class='add'>+		};</div><div class='add'>+		uart0-txd {</div><div class='add'>+			pins = "mfio56";</div><div class='add'>+			function = "uart0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_rts_cts: uart0-rts-cts {</div><div class='add'>+		uart0-rts {</div><div class='add'>+			  pins = "mfio57";</div><div class='add'>+			  function = "uart0";</div><div class='add'>+		};</div><div class='add'>+		uart0-cts {</div><div class='add'>+			  pins = "mfio58";</div><div class='add'>+			  function = "uart0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+uart@... {</div><div class='add'>+	...</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_xfer&gt;, &lt;&amp;uart0_rts_cts&gt;;</div><div class='add'>+	...</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+usb_vbus: fixed-regulator {</div><div class='add'>+	...</div><div class='add'>+	gpio = &lt;&amp;gpio5 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	...</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt b/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-falcon.txt<br/>index ac4da9fe07bd..ac4da9fe07bd 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-falcon.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-falcon.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt b/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt<br/>index e89b4677567d..e89b4677567d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt<br/>index adda2a8d1d52..add7c38ec7d8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt</a></div><div class='hunk'>@@ -17,10 +17,10 @@ mpp0          0        gpio, uart0(rxd)</div><div class='ctx'> mpp1          1        gpo, uart0(txd)</div><div class='ctx'> mpp2          2        gpio, i2c0(sck), uart0(txd)</div><div class='ctx'> mpp3          3        gpio, i2c0(sda), uart0(rxd)</div><div class='del'>-mpp4          4        gpio, cpu_pd(vdd)</div><div class='del'>-mpp5          5        gpo, ge0(txclko), uart1(txd), spi1(clk), audio(mclk)</div><div class='add'>+mpp4          4        gpio, vdd(cpu-pd)</div><div class='add'>+mpp5          5        gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk)</div><div class='ctx'> mpp6          6        gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)</div><div class='del'>-mpp7          7        gpo, ge0(txd1), tdm(tdx), audio(lrclk)</div><div class='add'>+mpp7          7        gpo, ge0(txd1), tdm(dtx), audio(lrclk)</div><div class='ctx'> mpp8          8        gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)</div><div class='ctx'> mpp9          9        gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo)</div><div class='ctx'> mpp10         10       gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)</div><div class='hunk'>@@ -52,8 +52,8 @@ mpp30         30       gpio, ge0(rxd7), ge1(rxclk), i2c1(sck)</div><div class='ctx'> mpp31         31       gpio, tclk, ge0(txerr)</div><div class='ctx'> mpp32         32       gpio, spi0(cs0)</div><div class='ctx'> mpp33         33       gpio, dev(bootcs), spi0(cs0)</div><div class='del'>-mpp34         34       gpo, dev(wen0), spi0(mosi)</div><div class='del'>-mpp35         35       gpo, dev(oen), spi0(sck)</div><div class='add'>+mpp34         34       gpo, dev(we0), spi0(mosi)</div><div class='add'>+mpp35         35       gpo, dev(oe), spi0(sck)</div><div class='ctx'> mpp36         36       gpo, dev(a1), spi0(miso)</div><div class='ctx'> mpp37         37       gpo, dev(a0), sata0(prsnt)</div><div class='ctx'> mpp38         38       gpio, dev(ready), uart1(cts), uart0(cts)</div><div class='hunk'>@@ -86,11 +86,11 @@ mpp57         57       gpio, dev(cs3), uart1(rxd), tdm(fsync), sata0(prsnt),</div><div class='ctx'> mpp58         58       gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),</div><div class='ctx'>                        uart0(rts)</div><div class='ctx'> mpp59         59       gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk)</div><div class='del'>-mpp60         60       gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rst-out),</div><div class='add'>+mpp60         60       gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rstout),</div><div class='ctx'>                        audio(sdi)</div><div class='del'>-mpp61         61       gpo, dev(wen1), uart1(txd), audio(rclk)</div><div class='add'>+mpp61         61       gpo, dev(we1), uart1(txd), audio(lrclk)</div><div class='ctx'> mpp62         62       gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),</div><div class='ctx'>                        audio(mclk), uart0(cts)</div><div class='ctx'> mpp63         63       gpo, spi0(sck), tclk</div><div class='del'>-mpp64         64       gpio, spi0(miso), spi0-1(cs1)</div><div class='del'>-mpp65         65       gpio, spi0(mosi), spi0-1(cs2)</div><div class='add'>+mpp64         64       gpio, spi0(miso), spi0(cs1)</div><div class='add'>+mpp65         65       gpio, spi0(mosi), spi0(cs2)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt<br/>index 7de0cda4a379..06e5bb0367f5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt</a></div><div class='hunk'>@@ -15,24 +15,24 @@ name          pins     functions</div><div class='ctx'> ================================================================================</div><div class='ctx'> mpp0          0        gpio, dev(ad2), spi0(cs1), spi1(cs1)</div><div class='ctx'> mpp1          1        gpio, dev(ad3), spi0(mosi), spi1(mosi)</div><div class='del'>-mpp2          2        gpio, dev(ad4), ptp(eventreq), led(c0), audio(sdi)</div><div class='del'>-mpp3          3        gpio, dev(ad5), ptp(triggen), led(p3), audio(mclk)</div><div class='add'>+mpp2          2        gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)</div><div class='add'>+mpp3          3        gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)</div><div class='ctx'> mpp4          4        gpio, dev(ad6), spi0(miso), spi1(miso)</div><div class='ctx'> mpp5          5        gpio, dev(ad7), spi0(cs2), spi1(cs2)</div><div class='del'>-mpp6          6        gpio, dev(ad0), led(p1), audio(rclk)</div><div class='add'>+mpp6          6        gpio, dev(ad0), led(p1), audio(lrclk)</div><div class='ctx'> mpp7          7        gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)</div><div class='ctx'> mpp8          8        gpio, dev (bootcs), spi0(cs0), spi1(cs0)</div><div class='del'>-mpp9          9        gpio, nf(wen), spi0(sck), spi1(sck)</div><div class='del'>-mpp10        10        gpio, nf(ren), dram(vttctrl), led(c1)</div><div class='add'>+mpp9          9        gpio, spi0(sck), spi1(sck), nand(we)</div><div class='add'>+mpp10        10        gpio, dram(vttctrl), led(c1), nand(re)</div><div class='ctx'> mpp11        11        gpio, dev(a0), led(c2), audio(sdo)</div><div class='ctx'> mpp12        12        gpio, dev(a1), audio(bclk)</div><div class='del'>-mpp13        13        gpio, dev(readyn), pcie0(rstoutn), pcie1(rstoutn)</div><div class='add'>+mpp13        13        gpio, dev(ready), pcie0(rstout), pcie1(rstout)</div><div class='ctx'> mpp14        14        gpio, i2c0(sda), uart1(txd)</div><div class='ctx'> mpp15        15        gpio, i2c0(sck), uart1(rxd)</div><div class='ctx'> mpp16        16        gpio, uart0(txd)</div><div class='ctx'> mpp17        17        gpio, uart0(rxd)</div><div class='del'>-mpp18        18        gpio, tdm(intn)</div><div class='del'>-mpp19        19        gpio, tdm(rstn)</div><div class='add'>+mpp18        18        gpio, tdm(int)</div><div class='add'>+mpp19        19        gpio, tdm(rst)</div><div class='ctx'> mpp20        20        gpio, tdm(pclk)</div><div class='ctx'> mpp21        21        gpio, tdm(fsync)</div><div class='ctx'> mpp22        22        gpio, tdm(drx)</div><div class='hunk'>@@ -45,12 +45,12 @@ mpp28        28        gpio, led(p3), ge1(txctl), sd(clk)</div><div class='ctx'> mpp29        29        gpio, pcie1(clkreq), ge1(rxclk), sd(d3)</div><div class='ctx'> mpp30        30        gpio, ge1(txd0), spi1(cs0)</div><div class='ctx'> mpp31        31        gpio, ge1(txd1), spi1(mosi)</div><div class='del'>-mpp32        32        gpio, ge1(txd2), spi1(sck), ptp(triggen)</div><div class='add'>+mpp32        32        gpio, ge1(txd2), spi1(sck), ptp(trig)</div><div class='ctx'> mpp33        33        gpio, ge1(txd3), spi1(miso)</div><div class='ctx'> mpp34        34        gpio, ge1(txclkout), spi1(sck)</div><div class='ctx'> mpp35        35        gpio, ge1(rxctl), spi1(cs1), spi0(cs2)</div><div class='ctx'> mpp36        36        gpio, pcie0(clkreq)</div><div class='del'>-mpp37        37        gpio, pcie0(clkreq), tdm(intn), ge(mdc)</div><div class='add'>+mpp37        37        gpio, pcie0(clkreq), tdm(int), ge(mdc)</div><div class='ctx'> mpp38        38        gpio, pcie1(clkreq), ge(mdio)</div><div class='ctx'> mpp39        39        gpio, ref(clkout)</div><div class='ctx'> mpp40        40        gpio, uart1(txd)</div><div class='hunk'>@@ -58,25 +58,25 @@ mpp41        41        gpio, uart1(rxd)</div><div class='ctx'> mpp42        42        gpio, spi1(cs2), led(c0)</div><div class='ctx'> mpp43        43        gpio, sata0(prsnt), dram(vttctrl)</div><div class='ctx'> mpp44        44        gpio, sata0(prsnt)</div><div class='del'>-mpp45        45        gpio, spi0(cs2), pcie0(rstoutn)</div><div class='del'>-mpp46        46        gpio, led(p0), ge0(txd0), ge1(txd0)</div><div class='add'>+mpp45        45        gpio, spi0(cs2), pcie0(rstout)</div><div class='add'>+mpp46        46        gpio, led(p0), ge0(txd0), ge1(txd0), dev(we1)</div><div class='ctx'> mpp47        47        gpio, led(p1), ge0(txd1), ge1(txd1)</div><div class='ctx'> mpp48        48        gpio, led(p2), ge0(txd2), ge1(txd2)</div><div class='ctx'> mpp49        49        gpio, led(p3), ge0(txd3), ge1(txd3)</div><div class='ctx'> mpp50        50        gpio, led(c0), ge0(rxd0), ge1(rxd0)</div><div class='ctx'> mpp51        51        gpio, led(c1), ge0(rxd1), ge1(rxd1)</div><div class='ctx'> mpp52        52        gpio, led(c2), ge0(rxd2), ge1(rxd2)</div><div class='del'>-mpp53        53        gpio, pcie1(rstoutn), ge0(rxd3), ge1(rxd3)</div><div class='del'>-mpp54        54        gpio, pcie0(rstoutn), ge0(rxctl), ge1(rxctl)</div><div class='add'>+mpp53        53        gpio, pcie1(rstout), ge0(rxd3), ge1(rxd3)</div><div class='add'>+mpp54        54        gpio, pcie0(rstout), ge0(rxctl), ge1(rxctl)</div><div class='ctx'> mpp55        55        gpio, ge0(rxclk), ge1(rxclk)</div><div class='ctx'> mpp56        56        gpio, ge0(txclkout), ge1(txclkout)</div><div class='del'>-mpp57        57        gpio, ge0(txctl), ge1(txctl)</div><div class='add'>+mpp57        57        gpio, ge0(txctl), ge1(txctl), dev(we0)</div><div class='ctx'> mpp58        58        gpio, led(c0)</div><div class='ctx'> mpp59        59        gpio, led(c1)</div><div class='ctx'> mpp60        60        gpio, uart1(txd), led(c2)</div><div class='ctx'> mpp61        61        gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)</div><div class='ctx'> mpp62        62        gpio, i2c1(sck), led(p1)</div><div class='del'>-mpp63        63        gpio, ptp(triggen), led(p2)</div><div class='add'>+mpp63        63        gpio, ptp(trig), led(p2), dev(burst/last)</div><div class='ctx'> mpp64        64        gpio, dram(vttctrl), led(p3)</div><div class='ctx'> mpp65        65        gpio, sata1(prsnt)</div><div class='del'>-mpp66        66        gpio, ptp(eventreq), spi1(cs3)</div><div class='add'>+mpp66        66        gpio, ptp(evreq), spi1(cs3)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt<br/>index b17c96849fc9..54ec4c0a0d0e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt</a></div><div class='hunk'>@@ -27,16 +27,16 @@ mpp8          8        gpio, ge0(txd1), dev(ad10)</div><div class='ctx'> mpp9          9        gpio, ge0(txd2), dev(ad11)</div><div class='ctx'> mpp10         10       gpio, ge0(txd3), dev(ad12)</div><div class='ctx'> mpp11         11       gpio, ge0(txctl), dev(ad13)</div><div class='del'>-mpp12         12       gpio, ge0(rxd0), pcie0(rstout), pcie1(rstout) [1], spi0(cs1), dev(ad14)</div><div class='del'>-mpp13         13       gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15)</div><div class='del'>-mpp14         14       gpio, ge0(rxd2), ptp(clk), m(vtt_ctrl), spi0(cs3), dev(wen1)</div><div class='del'>-mpp15         15       gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi), pcie1(rstout) [1]</div><div class='del'>-mpp16         16       gpio, ge0(rxctl), ge(mdio slave), m(decc_err), spi0(miso), pcie0(clkreq)</div><div class='del'>-mpp17         17       gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt)</div><div class='del'>-mpp18         18       gpio, ge0(rxerr), ptp(trig_gen), ua1(txd), spi0(cs0), pcie1(rstout) [1]</div><div class='del'>-mpp19         19       gpio, ge0(col), ptp(event_req), pcie0(clkreq), sata1(prsnt), ua0(cts)</div><div class='del'>-mpp20         20       gpio, ge0(txclk), ptp(clk), pcie1(rstout) [1], sata0(prsnt), ua0(rts)</div><div class='del'>-mpp21         21       gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs)</div><div class='add'>+mpp12         12       gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)</div><div class='add'>+mpp13         13       gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15), pcie2(clkreq)</div><div class='add'>+mpp14         14       gpio, ge0(rxd2), ptp(clk), dram(vttctrl), spi0(cs3), dev(we1), pcie3(clkreq)</div><div class='add'>+mpp15         15       gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi)</div><div class='add'>+mpp16         16       gpio, ge0(rxctl), ge(mdio slave), dram(deccerr), spi0(miso), pcie0(clkreq), pcie1(clkreq) [1]</div><div class='add'>+mpp17         17       gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt), sata0(prsnt)</div><div class='add'>+mpp18         18       gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)</div><div class='add'>+mpp19         19       gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts)</div><div class='add'>+mpp20         20       gpio, ge0(txclk), ptp(clk), sata0(prsnt), ua0(rts)</div><div class='add'>+mpp21         21       gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt)</div><div class='ctx'> mpp22         22       gpio, spi0(mosi), dev(ad0)</div><div class='ctx'> mpp23         23       gpio, spi0(sck), dev(ad2)</div><div class='ctx'> mpp24         24       gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)</div><div class='hunk'>@@ -45,36 +45,36 @@ mpp26         26       gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)</div><div class='ctx'> mpp27         27       gpio, spi0(cs3), ge1(txclkout), i2c1(sda), sd0(d7), dev(cs2)</div><div class='ctx'> mpp28         28       gpio, ge1(txd0), sd0(clk), dev(ad5)</div><div class='ctx'> mpp29         29       gpio, ge1(txd1), dev(ale0)</div><div class='del'>-mpp30         30       gpio, ge1(txd2), dev(oen)</div><div class='add'>+mpp30         30       gpio, ge1(txd2), dev(oe)</div><div class='ctx'> mpp31         31       gpio, ge1(txd3), dev(ale1)</div><div class='del'>-mpp32         32       gpio, ge1(txctl), dev(wen0)</div><div class='del'>-mpp33         33       gpio, m(decc_err), dev(ad3)</div><div class='add'>+mpp32         32       gpio, ge1(txctl), dev(we0)</div><div class='add'>+mpp33         33       gpio, dram(deccerr), dev(ad3)</div><div class='ctx'> mpp34         34       gpio, dev(ad1)</div><div class='ctx'> mpp35         35       gpio, ref(clk_out1), dev(a1)</div><div class='del'>-mpp36         36       gpio, ptp(trig_gen), dev(a0)</div><div class='add'>+mpp36         36       gpio, ptp(trig), dev(a0)</div><div class='ctx'> mpp37         37       gpio, ptp(clk), ge1(rxclk), sd0(d3), dev(ad8)</div><div class='del'>-mpp38         38       gpio, ptp(event_req), ge1(rxd1), ref(clk_out0), sd0(d0), dev(ad4)</div><div class='add'>+mpp38         38       gpio, ptp(evreq), ge1(rxd1), ref(clk_out0), sd0(d0), dev(ad4)</div><div class='ctx'> mpp39         39       gpio, i2c1(sck), ge1(rxd2), ua0(cts), sd0(d1), dev(a2)</div><div class='ctx'> mpp40         40       gpio, i2c1(sda), ge1(rxd3), ua0(rts), sd0(d2), dev(ad6)</div><div class='del'>-mpp41         41       gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last)</div><div class='add'>+mpp41         41       gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0)</div><div class='ctx'> mpp42         42       gpio, ua1(txd), ua0(rts), dev(ad7)</div><div class='del'>-mpp43         43       gpio, pcie0(clkreq), m(vtt_ctrl), m(decc_err), pcie0(rstout), dev(clkout)</div><div class='del'>-mpp44         44       gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [3], pcie0(rstout)</div><div class='del'>-mpp45         45       gpio, ref(clk_out0), pcie0(rstout), pcie1(rstout) [1], pcie2(rstout), pcie3(rstout)</div><div class='del'>-mpp46         46       gpio, ref(clk_out1), pcie0(rstout), pcie1(rstout) [1], pcie2(rstout), pcie3(rstout)</div><div class='del'>-mpp47         47       gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], spi1(cs2), sata3(prsnt) [2]</div><div class='del'>-mpp48         48       gpio, sata0(prsnt), m(vtt_ctrl), tdm2c(pclk), audio(mclk), sd0(d4)</div><div class='del'>-mpp49         49       gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm2c(fsync), audio(lrclk), sd0(d5)</div><div class='del'>-mpp50         50       gpio, pcie0(rstout), pcie1(rstout) [1], tdm2c(drx), audio(extclk), sd0(cmd)</div><div class='del'>-mpp51         51       gpio, tdm2c(dtx), audio(sdo), m(decc_err)</div><div class='del'>-mpp52         52       gpio, pcie0(rstout), pcie1(rstout) [1], tdm2c(intn), audio(sdi), sd0(d6)</div><div class='del'>-mpp53         53       gpio, sata1(prsnt), sata0(prsnt), tdm2c(rstn), audio(bclk), sd0(d7)</div><div class='del'>-mpp54         54       gpio, sata0(prsnt), sata1(prsnt), pcie0(rstout), pcie1(rstout) [1], sd0(d3)</div><div class='del'>-mpp55         55       gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0)</div><div class='del'>-mpp56         56       gpio, ua1(rts), ge(mdc), m(decc_err), spi1(mosi)</div><div class='del'>-mpp57         57       gpio, spi1(sck), sd0(clk)</div><div class='del'>-mpp58         58       gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1)</div><div class='del'>-mpp59         59       gpio, pcie0(rstout), i2c1(sda), pcie1(rstout) [1], spi1(cs0), sd0(d2)</div><div class='add'>+mpp43         43       gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)</div><div class='add'>+mpp44         44       gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [3]</div><div class='add'>+mpp45         45       gpio, ref(clk_out0), pcie0(rstout), ua1(rxd)</div><div class='add'>+mpp46         46       gpio, ref(clk_out1), pcie0(rstout), ua1(txd)</div><div class='add'>+mpp47         47       gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [2]</div><div class='add'>+mpp48         48       gpio, sata0(prsnt), dram(vttctrl), tdm(pclk), audio(mclk), sd0(d4), pcie0(clkreq)</div><div class='add'>+mpp49         49       gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync), audio(lrclk), sd0(d5), pcie1(clkreq)</div><div class='add'>+mpp50         50       gpio, pcie0(rstout), tdm(drx), audio(extclk), sd0(cmd)</div><div class='add'>+mpp51         51       gpio, tdm(dtx), audio(sdo), dram(deccerr), ptp(trig)</div><div class='add'>+mpp52         52       gpio, pcie0(rstout), tdm(int), audio(sdi), sd0(d6), ptp(clk)</div><div class='add'>+mpp53         53       gpio, sata1(prsnt), sata0(prsnt), tdm(rst), audio(bclk), sd0(d7), ptp(evreq)</div><div class='add'>+mpp54         54       gpio, sata0(prsnt), sata1(prsnt), pcie0(rstout), ge0(txerr), sd0(d3)</div><div class='add'>+mpp55         55       gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)</div><div class='add'>+mpp56         56       gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)</div><div class='add'>+mpp57         57       gpio, spi1(sck), sd0(clk), ua1(txd)</div><div class='add'>+mpp58         58       gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)</div><div class='add'>+mpp59         59       gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)</div><div class='ctx'> </div><div class='ctx'> [1]: only available on 88F6820 and 88F6828</div><div class='ctx'> [2]: only available on 88F6828</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt<br/>index 5b1a9dc004f4..a40b60f1ca4c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-39x-pinctrl.txt</a></div><div class='hunk'>@@ -4,8 +4,9 @@ Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding</div><div class='ctx'> part and usage.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: "marvell,88f6920-pinctrl", "marvell,88f6928-pinctrl"</div><div class='del'>-  depending on the specific variant of the SoC being used.</div><div class='add'>+- compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or</div><div class='add'>+  "marvell,88f6928-pinctrl" depending on the specific variant of the</div><div class='add'>+  SoC being used.</div><div class='ctx'> - reg: register specifier of MPP registers</div><div class='ctx'> </div><div class='ctx'> Available mpp pins/groups and functions:</div><div class='hunk'>@@ -24,55 +25,60 @@ mpp6	6	gpio, dev(cs3), xsmi(mdio)</div><div class='ctx'> mpp7	7	gpio, dev(ad9), xsmi(mdc)</div><div class='ctx'> mpp8	8	gpio, dev(ad10), ptp(trig)</div><div class='ctx'> mpp9	9	gpio, dev(ad11), ptp(clk)</div><div class='del'>-mpp10	10	gpio, dev(ad12), ptp(event)</div><div class='add'>+mpp10	10	gpio, dev(ad12), ptp(evreq)</div><div class='ctx'> mpp11	11	gpio, dev(ad13), led(clk)</div><div class='ctx'> mpp12	12	gpio, pcie0(rstout), dev(ad14), led(stb)</div><div class='del'>-mpp13	13	gpio, dev(ad15), led(data)</div><div class='del'>-mpp14	14	gpio, m(vtt), dev(wen1), ua1(txd)</div><div class='add'>+mpp13	13	gpio, dev(ad15), pcie2(clkreq), led(data)</div><div class='add'>+mpp14	14	gpio, dram(vttctrl), dev(we1), ua1(txd)</div><div class='ctx'> mpp15	15	gpio, pcie0(rstout), spi0(mosi), i2c1(sck)</div><div class='del'>-mpp16	16	gpio, m(decc), spi0(miso), i2c1(sda)</div><div class='del'>-mpp17	17	gpio, ua1(rxd), spi0(sck), smi(mdio)</div><div class='add'>+mpp16	16	gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)</div><div class='add'>+mpp17	17	gpio, ua1(rxd), spi0(sck), sata1(prsnt) [1], sata0(prsnt) [1], smi(mdio)</div><div class='ctx'> mpp18	18	gpio, ua1(txd), spi0(cs0), i2c2(sck)</div><div class='del'>-mpp19	19	gpio, sata1(present) [1], ua0(cts), ua1(rxd), i2c2(sda)</div><div class='del'>-mpp20	20	gpio, sata0(present) [1], ua0(rts), ua1(txd), smi(mdc)</div><div class='del'>-mpp21	21	gpio, spi0(cs1), sata0(present) [1], sd(cmd), dev(bootcs), ge(rxd0)</div><div class='add'>+mpp19	19	gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda)</div><div class='add'>+mpp20	20	gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)</div><div class='add'>+mpp21	21	gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs),</div><div class='add'>+                sata1(prsnt) [1], ge(rxd0)</div><div class='ctx'> mpp22	22	gpio, spi0(mosi), dev(ad0)</div><div class='ctx'> mpp23	23	gpio, spi0(sck), dev(ad2)</div><div class='del'>-mpp24	24	gpio, spi0(miso), ua0(cts), ua1(rxd), sd(d4), dev(readyn)</div><div class='del'>-mpp25	25	gpio, spi0(cs0), ua0(rts), ua1(txd), sd(d5), dev(cs0)</div><div class='del'>-mpp26	26	gpio, spi0(cs2), i2c1(sck), sd(d6), dev(cs1)</div><div class='del'>-mpp27	27	gpio, spi0(cs3), i2c1(sda), sd(d7), dev(cs2), ge(txclkout)</div><div class='del'>-mpp28	28	gpio, sd(clk), dev(ad5), ge(txd0)</div><div class='add'>+mpp24	24	gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)</div><div class='add'>+mpp25	25	gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)</div><div class='add'>+mpp26	26	gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)</div><div class='add'>+mpp27	27	gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)</div><div class='add'>+mpp28	28	gpio, sd0(clk), dev(ad5), ge(txd0)</div><div class='ctx'> mpp29	29	gpio, dev(ale0), ge(txd1)</div><div class='del'>-mpp30	30	gpio, dev(oen), ge(txd2)</div><div class='add'>+mpp30	30	gpio, dev(oe), ge(txd2)</div><div class='ctx'> mpp31	31	gpio, dev(ale1), ge(txd3)</div><div class='del'>-mpp32	32	gpio, dev(wen0), ge(txctl)</div><div class='del'>-mpp33	33	gpio, m(decc), dev(ad3)</div><div class='add'>+mpp32	32	gpio, dev(we0), ge(txctl)</div><div class='add'>+mpp33	33	gpio, dram(deccerr), dev(ad3)</div><div class='ctx'> mpp34	34	gpio, dev(ad1)</div><div class='ctx'> mpp35	35	gpio, ref(clk), dev(a1)</div><div class='ctx'> mpp36	36	gpio, dev(a0)</div><div class='del'>-mpp37	37	gpio, sd(d3), dev(ad8), ge(rxclk)</div><div class='del'>-mpp38	38	gpio, ref(clk), sd(d0), dev(ad4), ge(rxd1)</div><div class='del'>-mpp39	39	gpio, i2c1(sck), ua0(cts), sd(d1), dev(a2), ge(rxd2)</div><div class='del'>-mpp40	40	gpio, i2c1(sda), ua0(rts), sd(d2), dev(ad6), ge(rxd3)</div><div class='del'>-mpp41	41	gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burstn), nd(rbn0), ge(rxctl)</div><div class='add'>+mpp37	37	gpio, sd0(d3), dev(ad8), ge(rxclk)</div><div class='add'>+mpp38	38	gpio, ref(clk), sd0(d0), dev(ad4), ge(rxd1)</div><div class='add'>+mpp39	39	gpio, i2c1(sck), ua0(cts), sd0(d1), dev(a2), ge(rxd2)</div><div class='add'>+mpp40	40	gpio, i2c1(sda), ua0(rts), sd0(d2), dev(ad6), ge(rxd3)</div><div class='add'>+mpp41	41	gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl)</div><div class='ctx'> mpp42	42	gpio, ua1(txd), ua0(rts), dev(ad7)</div><div class='del'>-mpp43	43	gpio, pcie0(clkreq), m(vtt), m(decc), spi1(cs2), dev(clkout), nd(rbn1)</div><div class='del'>-mpp44	44	gpio, sata0(present) [1], sata1(present) [1], led(clk)</div><div class='add'>+mpp43	43	gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)</div><div class='add'>+mpp44	44	gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2],</div><div class='add'>+                sata3(prsnt) [2], led(clk)</div><div class='ctx'> mpp45	45	gpio, ref(clk), pcie0(rstout), ua1(rxd)</div><div class='ctx'> mpp46	46	gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb)</div><div class='del'>-mpp47	47	gpio, sata0(present) [1], sata1(present) [1], led(data)</div><div class='del'>-mpp48	48	gpio, sata0(present) [1], m(vtt), tdm(pclk) [1], audio(mclk) [1], sd(d4), pcie0(clkreq), ua1(txd)</div><div class='del'>-mpp49	49	gpio, tdm(fsync) [1], audio(lrclk) [1], sd(d5), ua2(rxd)</div><div class='del'>-mpp50	50	gpio, pcie0(rstout), tdm(drx) [1], audio(extclk) [1], sd(cmd), ua2(rxd)</div><div class='del'>-mpp51	51	gpio, tdm(dtx) [1], audio(sdo) [1], m(decc), ua2(txd)</div><div class='del'>-mpp52	52	gpio, pcie0(rstout), tdm(intn) [1], audio(sdi) [1], sd(d6), i2c3(sck)</div><div class='del'>-mpp53	53	gpio, sata1(present) [1], sata0(present) [1], tdm(rstn) [1], audio(bclk) [1], sd(d7), i2c3(sda)</div><div class='del'>-mpp54	54	gpio, sata0(present) [1], sata1(present) [1], pcie0(rstout), sd(d3), ua3(txd)</div><div class='del'>-mpp55	55	gpio, ua1(cts), spi1(cs1), sd(d0), ua1(rxd), ua3(rxd)</div><div class='del'>-mpp56	56	gpio, ua1(rts), m(decc), spi1(mosi), ua1(txd)</div><div class='del'>-mpp57	57	gpio, spi1(sck), sd(clk), ua1(txd)</div><div class='del'>-mpp58	58	gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd(d1), ua1(rxd)</div><div class='del'>-mpp59	59	gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd(d2)</div><div class='add'>+mpp47	47	gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2],</div><div class='add'>+                sata3(prsnt) [2], led(data)</div><div class='add'>+mpp48	48	gpio, sata0(prsnt) [1], dram(vttctrl), tdm(pclk) [2], audio(mclk) [2], sd0(d4), pcie0(clkreq), ua1(txd)</div><div class='add'>+mpp49	49	gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync) [2],</div><div class='add'>+                audio(lrclk) [2], sd0(d5), ua2(rxd)</div><div class='add'>+mpp50	50	gpio, pcie0(rstout), tdm(drx) [2], audio(extclk) [2], sd0(cmd), ua2(rxd)</div><div class='add'>+mpp51	51	gpio, tdm(dtx) [2], audio(sdo) [2], dram(deccerr), ua2(txd)</div><div class='add'>+mpp52	52	gpio, pcie0(rstout), tdm(int) [2], audio(sdi) [2], sd0(d6), i2c3(sck)</div><div class='add'>+mpp53	53	gpio, sata1(prsnt) [1], sata0(prsnt) [1], tdm(rst) [2], audio(bclk) [2], sd0(d7), i2c3(sda)</div><div class='add'>+mpp54	54	gpio, sata0(prsnt) [1], sata1(prsnt) [1], pcie0(rstout), sd0(d3), ua3(txd)</div><div class='add'>+mpp55	55	gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)</div><div class='add'>+mpp56	56	gpio, ua1(rts), dram(deccerr), spi1(mosi), ua1(txd)</div><div class='add'>+mpp57	57	gpio, spi1(sck), sd0(clk), ua1(txd)</div><div class='add'>+mpp58	58	gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)</div><div class='add'>+mpp59	59	gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)</div><div class='ctx'> </div><div class='del'>-[1]: only available on 88F6928</div><div class='add'>+[1]: only available on 88F6925/88F6928</div><div class='add'>+[2]: only available on 88F6928</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt<br/>index 373dbccd7ab0..76da7222ff92 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt</a></div><div class='hunk'>@@ -18,7 +18,7 @@ only for more detailed description in this document.</div><div class='ctx'> </div><div class='ctx'> name          pins     functions</div><div class='ctx'> ================================================================================</div><div class='del'>-mpp0          0        gpio, ge0(txclko), lcd(d0)</div><div class='add'>+mpp0          0        gpio, ge0(txclkout), lcd(d0)</div><div class='ctx'> mpp1          1        gpio, ge0(txd0), lcd(d1)</div><div class='ctx'> mpp2          2        gpio, ge0(txd1), lcd(d2)</div><div class='ctx'> mpp3          3        gpio, ge0(txd2), lcd(d3)</div><div class='hunk'>@@ -30,49 +30,50 @@ mpp8          8        gpio, ge0(rxd2), lcd(d8)</div><div class='ctx'> mpp9          9        gpio, ge0(rxd3), lcd(d9)</div><div class='ctx'> mpp10         10       gpio, ge0(rxctl), lcd(d10)</div><div class='ctx'> mpp11         11       gpio, ge0(rxclk), lcd(d11)</div><div class='del'>-mpp12         12       gpio, ge0(txd4), ge1(txd0), lcd(d12)</div><div class='del'>-mpp13         13       gpio, ge0(txd5), ge1(txd1), lcd(d13)</div><div class='del'>-mpp14         14       gpio, ge0(txd6), ge1(txd2), lcd(d15)</div><div class='del'>-mpp15         15       gpio, ge0(txd7), ge1(txd3), lcd(d16)</div><div class='del'>-mpp16         16       gpio, ge0(txd7), ge1(txd3), lcd(d16)</div><div class='del'>-mpp17         17       gpio, ge0(col), ge1(txctl), lcd(d17)</div><div class='add'>+mpp12         12       gpio, ge0(txd4), ge1(txclkout), lcd(d12)</div><div class='add'>+mpp13         13       gpio, ge0(txd5), ge1(txd0), spi1(mosi), lcd(d13)</div><div class='add'>+mpp14         14       gpio, ge0(txd6), ge1(txd1), spi1(sck), lcd(d15)</div><div class='add'>+mpp15         15       gpio, ge0(txd7), ge1(txd2), lcd(d16)</div><div class='add'>+mpp16         16       gpio, ge0(txd7), ge1(txd3), spi1(cs0), lcd(d16)</div><div class='add'>+mpp17         17       gpio, ge0(col), ge1(txctl), spi1(miso), lcd(d17)</div><div class='ctx'> mpp18         18       gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)</div><div class='ctx'> mpp19         19       gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq)</div><div class='ctx'> mpp20         20       gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)</div><div class='del'>-mpp21         21       gpio, ge0(rxd5), ge1(rxd3), lcd(d21), mem(bat)</div><div class='add'>+mpp21         21       gpio, ge0(rxd5), ge1(rxd3), lcd(d21), dram(bat)</div><div class='ctx'> mpp22         22       gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt)</div><div class='ctx'> mpp23         23       gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt)</div><div class='del'>-mpp24         24       gpio, lcd(hsync), sata1(prsnt), nf(bootcs-re), tdm(rst)</div><div class='del'>-mpp25         25       gpio, lcd(vsync), sata0(prsnt), nf(bootcs-we), tdm(pclk)</div><div class='del'>-mpp26         26       gpio, lcd(clk), tdm(fsync), vdd(cpu1-pd)</div><div class='add'>+mpp24         24       gpio, lcd(hsync), sata1(prsnt), tdm(rst)</div><div class='add'>+mpp25         25       gpio, lcd(vsync), sata0(prsnt), tdm(pclk)</div><div class='add'>+mpp26         26       gpio, lcd(clk), tdm(fsync)</div><div class='ctx'> mpp27         27       gpio, lcd(e), tdm(dtx), ptp(trig)</div><div class='ctx'> mpp28         28       gpio, lcd(pwm), tdm(drx), ptp(evreq)</div><div class='del'>-mpp29         29       gpio, lcd(ref-clk), tdm(int0), ptp(clk), vdd(cpu0-pd)</div><div class='add'>+mpp29         29       gpio, lcd(ref-clk), tdm(int0), ptp(clk)</div><div class='ctx'> mpp30         30       gpio, tdm(int1), sd0(clk)</div><div class='del'>-mpp31         31       gpio, tdm(int2), sd0(cmd), vdd(cpu0-pd)</div><div class='del'>-mpp32         32       gpio, tdm(int3), sd0(d0), vdd(cpu1-pd)</div><div class='del'>-mpp33         33       gpio, tdm(int4), sd0(d1), mem(bat)</div><div class='del'>-mpp34         34       gpio, tdm(int5), sd0(d2), sata0(prsnt)</div><div class='add'>+mpp31         31       gpio, tdm(int2), sd0(cmd)</div><div class='add'>+mpp32         32       gpio, tdm(int3), sd0(d0)</div><div class='add'>+mpp33         33       gpio, tdm(int4), sd0(d1), dram(bat), dram(vttctrl)</div><div class='add'>+mpp34         34       gpio, tdm(int5), sd0(d2), sata0(prsnt), dram(deccerr)</div><div class='ctx'> mpp35         35       gpio, tdm(int6), sd0(d3), sata1(prsnt)</div><div class='del'>-mpp36         36       gpio, spi(mosi)</div><div class='del'>-mpp37         37       gpio, spi(miso)</div><div class='del'>-mpp38         38       gpio, spi(sck)</div><div class='del'>-mpp39         39       gpio, spi(cs0)</div><div class='del'>-mpp40         40       gpio, spi(cs1), uart2(cts), lcd(vga-hsync), vdd(cpu1-pd),</div><div class='del'>-                       pcie(clkreq0)</div><div class='del'>-mpp41         41       gpio, spi(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),</div><div class='del'>-                       pcie(clkreq1)</div><div class='del'>-mpp42         42       gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer),</div><div class='del'>-                       vdd(cpu0-pd)</div><div class='del'>-mpp43         43       gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout),</div><div class='del'>-                       vdd(cpu2-3-pd){1}</div><div class='del'>-mpp44         44       gpio, uart2(cts), uart3(rxd), spi(cs4), pcie(clkreq2),</div><div class='del'>-                       mem(bat)</div><div class='del'>-mpp45         45       gpio, uart2(rts), uart3(txd), spi(cs5), sata1(prsnt)</div><div class='del'>-mpp46         46       gpio, uart3(rts), uart1(rts), spi(cs6), sata0(prsnt)</div><div class='del'>-mpp47         47       gpio, uart3(cts), uart1(cts), spi(cs7), pcie(clkreq3),</div><div class='del'>-                       ref(clkout)</div><div class='del'>-mpp48         48       gpio, tclk, dev(burst/last)</div><div class='add'>+mpp36         36       gpio, spi0(mosi)</div><div class='add'>+mpp37         37       gpio, spi0(miso)</div><div class='add'>+mpp38         38       gpio, spi0(sck)</div><div class='add'>+mpp39         39       gpio, spi0(cs0)</div><div class='add'>+mpp40         40       gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),</div><div class='add'>+                       spi1(cs1)</div><div class='add'>+mpp41         41       gpio, spi0(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),</div><div class='add'>+                       pcie(clkreq1), spi1(cs2)</div><div class='add'>+mpp42         42       gpio, uart2(rxd), uart0(cts), tdm(int7), tdm(timer)</div><div class='add'>+mpp43         43       gpio, uart2(txd), uart0(rts), spi0(cs3), pcie(rstout),</div><div class='add'>+                       spi1(cs3)</div><div class='add'>+mpp44         44       gpio, uart2(cts), uart3(rxd), spi0(cs4), pcie(clkreq2),</div><div class='add'>+                       dram(bat), spi1(cs4)</div><div class='add'>+mpp45         45       gpio, uart2(rts), uart3(txd), spi0(cs5), sata1(prsnt),</div><div class='add'>+                       spi1(cs5), dram(vttctrl)</div><div class='add'>+mpp46         46       gpio, uart3(rts), uart1(rts), spi0(cs6), sata0(prsnt),</div><div class='add'>+                       spi1(cs6)</div><div class='add'>+mpp47         47       gpio, uart3(cts), uart1(cts), spi0(cs7), pcie(clkreq3),</div><div class='add'>+                       ref(clkout), spi1(cs7)</div><div class='add'>+mpp48         48       gpio, dev(clkout), dev(burst/last), nand(rb)</div><div class='ctx'> </div><div class='ctx'> * Marvell Armada XP (mv78260 and mv78460 only)</div><div class='ctx'> </div><div class='hunk'>@@ -84,9 +85,9 @@ mpp51         51       gpio, dev(ad16)</div><div class='ctx'> mpp52         52       gpio, dev(ad17)</div><div class='ctx'> mpp53         53       gpio, dev(ad18)</div><div class='ctx'> mpp54         54       gpio, dev(ad19)</div><div class='del'>-mpp55         55       gpio, dev(ad20), vdd(cpu0-pd)</div><div class='del'>-mpp56         56       gpio, dev(ad21), vdd(cpu1-pd)</div><div class='del'>-mpp57         57       gpio, dev(ad22), vdd(cpu2-3-pd){1}</div><div class='add'>+mpp55         55       gpio, dev(ad20)</div><div class='add'>+mpp56         56       gpio, dev(ad21)</div><div class='add'>+mpp57         57       gpio, dev(ad22)</div><div class='ctx'> mpp58         58       gpio, dev(ad23)</div><div class='ctx'> mpp59         59       gpio, dev(ad24)</div><div class='ctx'> mpp60         60       gpio, dev(ad25)</div><div class='hunk'>@@ -96,6 +97,3 @@ mpp63         63       gpio, dev(ad28)</div><div class='ctx'> mpp64         64       gpio, dev(ad29)</div><div class='ctx'> mpp65         65       gpio, dev(ad30)</div><div class='ctx'> mpp66         66       gpio, dev(ad31)</div><div class='del'>-</div><div class='del'>-Notes:</div><div class='del'>-* {1} vdd(cpu2-3-pd) only available on mv78460.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt b/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt<br/>new file mode 100644<br/>index 000000000000..df0309c57505<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+NXP LPC18xx/43xx SCU pin controller Device Tree Bindings</div><div class='add'>+--------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible		: Should be "nxp,lpc1850-scu"</div><div class='add'>+- reg			: Address and length of the register set for the device</div><div class='add'>+- clocks		: Clock specifier (see clock bindings for details)</div><div class='add'>+</div><div class='add'>+The lpc1850-scu driver uses the generic pin multiplexing and generic pin</div><div class='add'>+configuration documented in pinctrl-bindings.txt.</div><div class='add'>+</div><div class='add'>+The following generic nodes are supported:</div><div class='add'>+ - function</div><div class='add'>+ - pins</div><div class='add'>+ - bias-disable</div><div class='add'>+ - bias-pull-up</div><div class='add'>+ - bias-pull-down</div><div class='add'>+ - drive-strength</div><div class='add'>+ - input-enable</div><div class='add'>+ - input-disable</div><div class='add'>+ - input-schmitt-enable</div><div class='add'>+ - input-schmitt-disable</div><div class='add'>+ - slew-rate</div><div class='add'>+</div><div class='add'>+Not all pins support all properties so either refer to the NXP 1850/4350</div><div class='add'>+user manual or the pin table in the pinctrl-lpc18xx driver for supported</div><div class='add'>+pin properties.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+pinctrl: pinctrl@40086000 {</div><div class='add'>+	compatible = "nxp,lpc1850-scu";</div><div class='add'>+	reg = &lt;0x40086000 0x1000&gt;;</div><div class='add'>+	clocks = &lt;&amp;ccu1 CLK_CPU_SCU&gt;;</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		i2c0_pins_cfg {</div><div class='add'>+			pins = "i2c0_scl", "i2c0_sda";</div><div class='add'>+			function = "i2c0";</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-pins {</div><div class='add'>+		uart0_rx_cfg {</div><div class='add'>+			pins = "pf_11";</div><div class='add'>+			function = "uart0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0_tx_cfg {</div><div class='add'>+			pins = "pf_10";</div><div class='add'>+			function = "uart0";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt<br/>new file mode 100644<br/>index 000000000000..eecf028ff485<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+CSR SiRFatlas7 pinmux controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible	: "sirf,atlas7-ioc"</div><div class='add'>+- reg		: Address range of the pinctrl registers</div><div class='add'>+</div><div class='add'>+For example, pinctrl might have properties like the following:</div><div class='add'>+	pinctrl: ioc@18880000 {</div><div class='add'>+			compatible = "sirf,atlas7-ioc";</div><div class='add'>+			reg = &lt;0x18880000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			a_ac97_pmx: ac97@0 {</div><div class='add'>+				ac97 {</div><div class='add'>+					groups = "audio_ac97_grp";</div><div class='add'>+					function = "audio_ac97";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			...</div><div class='add'>+</div><div class='add'>+			sd2_pmx: sd2@0 {</div><div class='add'>+				sd2 {</div><div class='add'>+					groups = "sd2_grp0";</div><div class='add'>+					function = "sd2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			...</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			sample0_cfg: sample0@0 {</div><div class='add'>+				sample0 {</div><div class='add'>+					pins = "ldd_0", "ldd_1";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sample1_cfg: sample1@0 {</div><div class='add'>+				sample1 {</div><div class='add'>+					pins = "ldd_2", "ldd_3";</div><div class='add'>+					input-schmitt-enable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sample2_cfg: sample2@0 {</div><div class='add'>+				sample2 {</div><div class='add'>+					groups = "uart4_nopause_grp";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sample3_cfg: sample3@0 {</div><div class='add'>+				sample3 {</div><div class='add'>+					pins = "ldd_4", "ldd_5";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the common</div><div class='add'>+pinctrl bindings used by client devices.</div><div class='add'>+</div><div class='add'>+SiRFatlas7's pinmux nodes act as a container for an abitrary number of subnodes.</div><div class='add'>+Each of these subnodes represents some desired configuration for a group of pins.</div><div class='add'>+</div><div class='add'>+Required subnode-properties:</div><div class='add'>+- groups : An array of strings. Each string contains the name of a group.</div><div class='add'>+- function: A string containing the name of the function to mux to the</div><div class='add'>+  group.</div><div class='add'>+</div><div class='add'>+  Valid values for group and function names can be found from looking at the</div><div class='add'>+  group and function arrays in driver files:</div><div class='add'>+  drivers/pinctrl/pinctrl-sirf.c</div><div class='add'>+</div><div class='add'>+For example, pinctrl might have subnodes like the following:</div><div class='add'>+	sd0_pmx: sd0@0 {</div><div class='add'>+		sd0 {</div><div class='add'>+			groups = "sd0_grp";</div><div class='add'>+			function = "sd0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_pmx0: sd1@0 {</div><div class='add'>+		sd1 {</div><div class='add'>+			groups = "sd1_grp0";</div><div class='add'>+			function = "sd1_m0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_pmx1: sd1@1 {</div><div class='add'>+		sd1 {</div><div class='add'>+			groups = "sd1_grp1";</div><div class='add'>+			function = "sd1_m1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+For a specific board, if it wants to use sd1,</div><div class='add'>+it can add the following to its board-specific .dts file.</div><div class='add'>+sd1: sd@0x12340000 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_pmx0&gt;;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+or</div><div class='add'>+</div><div class='add'>+sd1: sd@0x12340000 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_pmx1&gt;;</div><div class='add'>+}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt<br/>index 5868a0f7255d..0480bc31bfd7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt</a></div><div class='hunk'>@@ -3,9 +3,11 @@</div><div class='ctx'> The Mediatek's Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: value should be either of the following.</div><div class='add'>+- compatible: value should be one of the following.</div><div class='ctx'>     (a) "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.</div><div class='del'>-- mediatek,pctl-regmap: Should be a phandle of the syscfg node.</div><div class='add'>+    (b) "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl.</div><div class='add'>+    (c) "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.</div><div class='add'>+    (d) "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl.</div><div class='ctx'> - pins-are-numbered: Specify the subnodes are using numbered pinmux to</div><div class='ctx'>   specify pins.</div><div class='ctx'> - gpio-controller : Marks the device node as a gpio controller.</div><div class='hunk'>@@ -24,6 +26,9 @@ Required properties:</div><div class='ctx'>             Only the following flags are supported:</div><div class='ctx'>             0 - GPIO_ACTIVE_HIGH</div><div class='ctx'>             1 - GPIO_ACTIVE_LOW</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- mediatek,pctl-regmap: Should be a phandle of the syscfg node.</div><div class='ctx'> - reg: physicall address base for EINT registers</div><div class='ctx'> - interrupt-controller: Marks the device node as an interrupt controller</div><div class='ctx'> - #interrupt-cells: Should be two.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..77aa11790163<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+Qualcomm MSM8660 TLMM block</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "qcom,msm8660-pinctrl"</div><div class='add'>+- reg: Should be the base address and length of the TLMM block.</div><div class='add'>+- interrupts: Should be the parent IRQ of the TLMM block.</div><div class='add'>+- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='add'>+- #interrupt-cells: Should be two.</div><div class='add'>+- gpio-controller: Marks the device node as a GPIO controller.</div><div class='add'>+- #gpio-cells : Should be two.</div><div class='add'>+                The first cell is the gpio pin number and the</div><div class='add'>+                second cell is used for optional parameters.</div><div class='add'>+</div><div class='add'>+Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='add'>+a general description of GPIO and interrupt bindings.</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='add'>+common pinctrl bindings used by client devices, including the meaning of the</div><div class='add'>+phrase "pin configuration node".</div><div class='add'>+</div><div class='add'>+Qualcomm's pin configuration nodes act as a container for an arbitrary number of</div><div class='add'>+subnodes. Each of these subnodes represents some desired configuration for a</div><div class='add'>+pin, a group, or a list of pins or groups. This configuration can include the</div><div class='add'>+mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='add'>+parameters, such as pull-up, drive strength, etc.</div><div class='add'>+</div><div class='add'>+The name of each subnode is not important; all subnodes should be enumerated</div><div class='add'>+and processed purely based on their content.</div><div class='add'>+</div><div class='add'>+Each subnode only affects those parameters that are explicitly listed. In</div><div class='add'>+other words, a subnode that lists a mux function but no pin configuration</div><div class='add'>+parameters implies no information about any pin configuration parameters.</div><div class='add'>+Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='add'>+information about e.g. the mux function.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='add'>+to specify in a pin configuration subnode:</div><div class='add'>+</div><div class='add'>+ pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength,</div><div class='add'>+ output-low, output-high.</div><div class='add'>+</div><div class='add'>+Non-empty subnodes must specify the 'pins' property.</div><div class='add'>+</div><div class='add'>+Valid values for pins are:</div><div class='add'>+  gpio0-gpio172, sdc3_clk, sdc3_cmd, sdc3_data sdc4_clk, sdc4_cmd, sdc4_data</div><div class='add'>+</div><div class='add'>+Valid values for function are:</div><div class='add'>+  gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a, gp_clk_1b,</div><div class='add'>+  gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n,</div><div class='add'>+  gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,</div><div class='add'>+  gsbi2_spi_cs3_n, gsbi3, gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n,</div><div class='add'>+  gsbi4, gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12, hdmi, i2s,</div><div class='add'>+  lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2, sdc5, tsif1, tsif2, usb_fs1,</div><div class='add'>+  usb_fs1_oe_n, usb_fs2, usb_fs2_oe_n, vfe, vsens_alarm,</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	msmgpio: pinctrl@800000 {</div><div class='add'>+		compatible = "qcom,msm8660-pinctrl";</div><div class='add'>+		reg = &lt;0x800000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;0 16 0x4&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gsbi12_uart&gt;;</div><div class='add'>+</div><div class='add'>+		gsbi12_uart: gsbi12-uart {</div><div class='add'>+			mux {</div><div class='add'>+				pins = "gpio117", "gpio118";</div><div class='add'>+				function = "gsbi12";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tx {</div><div class='add'>+				pins = "gpio118";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rx {</div><div class='add'>+				pins = "gpio117";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt<br/>index bfe72ec055e3..51cee44fc140 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt</a></div><div class='hunk'>@@ -16,7 +16,9 @@ Required Properties:</div><div class='ctx'>     - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.</div><div class='ctx'>     - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.</div><div class='ctx'>     - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.</div><div class='del'>-    - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2) compatible pin-controller.</div><div class='add'>+    - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.</div><div class='add'>+    - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.</div><div class='add'>+    - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.</div><div class='ctx'>     - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.</div><div class='ctx'> </div><div class='ctx'>   - reg: Base address and length of each memory resource used by the pin</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt<br/>index 388b213249fd..391ef4be8d50 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt</a></div><div class='hunk'>@@ -21,14 +21,15 @@ defined as gpio sub-nodes of the pinmux controller.</div><div class='ctx'> Required properties for iomux controller:</div><div class='ctx'>   - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"</div><div class='ctx'> 		       "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"</div><div class='del'>-		       "rockchip,rk3288-pinctrl"</div><div class='add'>+		       "rockchip,rk3288-pinctrl", "rockchip,rk3368-pinctrl"</div><div class='ctx'>   - rockchip,grf: phandle referencing a syscon providing the</div><div class='ctx'> 	 "general register files"</div><div class='ctx'> </div><div class='ctx'> Optional properties for iomux controller:</div><div class='ctx'>   - rockchip,pmu: phandle referencing a syscon providing the pmu registers</div><div class='ctx'> 	 as some SoCs carry parts of the iomux controller registers there.</div><div class='del'>-	 Required for at least rk3188 and rk3288.</div><div class='add'>+	 Required for at least rk3188 and rk3288. On the rk3368 this should</div><div class='add'>+	 point to the PMUGRF syscon.</div><div class='ctx'> </div><div class='ctx'> Deprecated properties for iomux controller:</div><div class='ctx'>   - reg: first element is the general register space of the iomux controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt<br/>index b7b55a964f65..f488b0f77406 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt</a></div><div class='hunk'>@@ -45,8 +45,9 @@ to specify in a pinconf subnode:</div><div class='ctx'> </div><div class='ctx'>  Valid values for groups are:</div><div class='ctx'>    ethernet0_0_grp, ethernet1_0_grp, mdio0_0_grp, mdio1_0_grp,</div><div class='del'>-   qspi0_0_grp, qspi1_0_grp, qspi_fbclk, qspi_cs1_grp, spi0_0_grp,</div><div class='del'>-   spi0_1_grp - spi0_2_grp, spi1_0_grp - spi1_3_grp, sdio0_0_grp - sdio0_2_grp,</div><div class='add'>+   qspi0_0_grp, qspi1_0_grp, qspi_fbclk, qspi_cs1_grp, spi0_0_grp - spi0_2_grp,</div><div class='add'>+   spi0_X_ssY (X=0..2, Y=0..2), spi1_0_grp - spi1_3_grp,</div><div class='add'>+   spi1_X_ssY (X=0..3, Y=0..2), sdio0_0_grp - sdio0_2_grp,</div><div class='ctx'>    sdio1_0_grp - sdio1_3_grp, sdio0_emio_wp, sdio0_emio_cd, sdio1_emio_wp,</div><div class='ctx'>    sdio1_emio_cd, smc0_nor, smc0_nor_cs1_grp, smc0_nor_addr25_grp, smc0_nand,</div><div class='ctx'>    can0_0_grp - can0_10_grp, can1_0_grp - can1_11_grp, uart0_0_grp - uart0_10_grp,</div><div class='hunk'>@@ -59,7 +60,7 @@ to specify in a pinconf subnode:</div><div class='ctx'> </div><div class='ctx'>  Valid values for function are:</div><div class='ctx'>    ethernet0, ethernet1, mdio0, mdio1, qspi0, qspi1, qspi_fbclk, qspi_cs1,</div><div class='del'>-   spi0, spi1, sdio0, sdio0_pc, sdio0_cd, sdio0_wp,</div><div class='add'>+   spi0, spi0_ss, spi1, spi1_ss, sdio0, sdio0_pc, sdio0_cd, sdio0_wp,</div><div class='ctx'>    sdio1, sdio1_pc, sdio1_cd, sdio1_wp,</div><div class='ctx'>    smc0_nor, smc0_nor_cs1, smc0_nor_addr25, smc0_nand, can0, can1, uart0, uart1,</div><div class='ctx'>    i2c0, i2c1, ttc0, ttc1, swdt0, gpio0, usb0, usb1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/bq24257.txt b/Documentation/devicetree/bindings/power/bq24257.txt<br/>new file mode 100644<br/>index 000000000000..5c9d3940d07c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/bq24257.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/bq24257.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+Binding for TI bq24257 Li-Ion Charger</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should contain one of the following:</div><div class='add'>+ * "ti,bq24257"</div><div class='add'>+- reg:			   integer, i2c address of the device.</div><div class='add'>+- ti,battery-regulation-voltage: integer, maximum charging voltage in uV.</div><div class='add'>+- ti,charge-current:	   integer, maximum charging current in uA.</div><div class='add'>+- ti,termination-current:  integer, charge will be terminated when current in</div><div class='add'>+			   constant-voltage phase drops below this value (in uA).</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+bq24257 {</div><div class='add'>+	compatible = "ti,bq24257";</div><div class='add'>+	reg = &lt;0x6a&gt;;</div><div class='add'>+</div><div class='add'>+	ti,battery-regulation-voltage = &lt;4200000&gt;;</div><div class='add'>+	ti,charge-current = &lt;1000000&gt;;</div><div class='add'>+	ti,termination-current = &lt;50000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/bq25890.txt b/Documentation/devicetree/bindings/power/bq25890.txt<br/>new file mode 100644<br/>index 000000000000..c9dd17d142ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/bq25890.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/bq25890.txt</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+Binding for TI bq25890 Li-Ion Charger</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should contain one of the following:</div><div class='add'>+    * "ti,bq25890"</div><div class='add'>+- reg: integer, i2c address of the device.</div><div class='add'>+- ti,battery-regulation-voltage: integer, maximum charging voltage (in uV);</div><div class='add'>+- ti,charge-current: integer, maximum charging current (in uA);</div><div class='add'>+- ti,termination-current: integer, charge will be terminated when current in</div><div class='add'>+    constant-voltage phase drops below this value (in uA);</div><div class='add'>+- ti,precharge-current: integer, maximum charge current during precharge</div><div class='add'>+    phase (in uA);</div><div class='add'>+- ti,minimum-sys-voltage: integer, when battery is charging and it is below</div><div class='add'>+    minimum system voltage, the system will be regulated above</div><div class='add'>+    minimum-sys-voltage setting (in uV);</div><div class='add'>+- ti,boost-voltage: integer, VBUS voltage level in boost mode (in uV);</div><div class='add'>+- ti,boost-max-current: integer, maximum allowed current draw in boost mode</div><div class='add'>+    (in uA).</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- ti,boost-low-freq: boolean, if present boost mode frequency will be 500kHz,</div><div class='add'>+    otherwise 1.5MHz;</div><div class='add'>+- ti,use-ilim-pin: boolean, if present the ILIM resistor will be used and the</div><div class='add'>+    input current will be the lower between the resistor setting and the IINLIM</div><div class='add'>+    register setting;</div><div class='add'>+- ti,thermal-regulation-threshold: integer, temperature above which the charge</div><div class='add'>+    current is lowered, to avoid overheating (in degrees Celsius). If omitted,</div><div class='add'>+    the default setting will be used (120 degrees);</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+bq25890 {</div><div class='add'>+        compatible = "ti,bq25890";</div><div class='add'>+        reg = &lt;0x6a&gt;;</div><div class='add'>+</div><div class='add'>+        ti,battery-regulation-voltage = &lt;4200000&gt;;</div><div class='add'>+        ti,charge-current = &lt;1000000&gt;;</div><div class='add'>+        ti,termination-current = &lt;50000&gt;;</div><div class='add'>+        ti,precharge-current = &lt;128000&gt;;</div><div class='add'>+        ti,minimum-sys-voltage = &lt;3600000&gt;;</div><div class='add'>+        ti,boost-voltage = &lt;5000000&gt;;</div><div class='add'>+        ti,boost-max-current = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+        ti,use-ilim-pin;</div><div class='add'>+        ti,thermal-regulation-threshold = &lt;120&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/opp.txt b/Documentation/devicetree/bindings/power/opp.txt<br/>index 74499e5033fc..0d5e7c978121 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/opp.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/power/opp.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/opp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/opp.txt</a></div><div class='hunk'>@@ -1,8 +1,19 @@</div><div class='del'>-* Generic OPP Interface</div><div class='add'>+Generic OPP (Operating Performance Points) Bindings</div><div class='add'>+----------------------------------------------------</div><div class='ctx'> </div><div class='del'>-SoCs have a standard set of tuples consisting of frequency and</div><div class='del'>-voltage pairs that the device will support per voltage domain. These</div><div class='del'>-are called Operating Performance Points or OPPs.</div><div class='add'>+Devices work at voltage-current-frequency combinations and some implementations</div><div class='add'>+have the liberty of choosing these. These combinations are called Operating</div><div class='add'>+Performance Points aka OPPs. This document defines bindings for these OPPs</div><div class='add'>+applicable across wide range of devices. For illustration purpose, this document</div><div class='add'>+uses CPU as a device.</div><div class='add'>+</div><div class='add'>+This document contain multiple versions of OPP binding and only one of them</div><div class='add'>+should be used per device.</div><div class='add'>+</div><div class='add'>+Binding 1: operating-points</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+This binding only supports voltage-frequency pairs.</div><div class='ctx'> </div><div class='ctx'> Properties:</div><div class='ctx'> - operating-points: An array of 2-tuples items, and each item consists</div><div class='hunk'>@@ -23,3 +34,432 @@ cpu@0 {</div><div class='ctx'> 		198000  850000</div><div class='ctx'> 	&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Binding 2: operating-points-v2</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+* Property: operating-points-v2</div><div class='add'>+</div><div class='add'>+Devices supporting OPPs must set their "operating-points-v2" property with</div><div class='add'>+phandle to a OPP table in their DT node. The OPP core will use this phandle to</div><div class='add'>+find the operating points for the device.</div><div class='add'>+</div><div class='add'>+Devices may want to choose OPP tables at runtime and so can provide a list of</div><div class='add'>+phandles here. But only *one* of them should be chosen at runtime. This must be</div><div class='add'>+accompanied by a corresponding "operating-points-names" property, to uniquely</div><div class='add'>+identify the OPP tables.</div><div class='add'>+</div><div class='add'>+If required, this can be extended for SoC vendor specfic bindings. Such bindings</div><div class='add'>+should be documented as Documentation/devicetree/bindings/power/&lt;vendor&gt;-opp.txt</div><div class='add'>+and should have a compatible description like: "operating-points-v2-&lt;vendor&gt;".</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- operating-points-names: Names of OPP tables (required if multiple OPP</div><div class='add'>+  tables are present), to uniquely identify them. The same list must be present</div><div class='add'>+  for all the CPUs which are sharing clock/voltage rails and hence the OPP</div><div class='add'>+  tables.</div><div class='add'>+</div><div class='add'>+* OPP Table Node</div><div class='add'>+</div><div class='add'>+This describes the OPPs belonging to a device. This node can have following</div><div class='add'>+properties:</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Allow OPPs to express their compatibility. It should be:</div><div class='add'>+  "operating-points-v2".</div><div class='add'>+</div><div class='add'>+- OPP nodes: One or more OPP nodes describing voltage-current-frequency</div><div class='add'>+  combinations. Their name isn't significant but their phandle can be used to</div><div class='add'>+  reference an OPP.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- opp-shared: Indicates that device nodes using this OPP Table Node's phandle</div><div class='add'>+  switch their DVFS state together, i.e. they share clock/voltage/current lines.</div><div class='add'>+  Missing property means devices have independent clock/voltage/current lines,</div><div class='add'>+  but they share OPP tables.</div><div class='add'>+</div><div class='add'>+- status: Marks the OPP table enabled/disabled.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+* OPP Node</div><div class='add'>+</div><div class='add'>+This defines voltage-current-frequency combinations along with other related</div><div class='add'>+properties.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- opp-hz: Frequency in Hz</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- opp-microvolt: voltage in micro Volts.</div><div class='add'>+</div><div class='add'>+  A single regulator's voltage is specified with an array of size one or three.</div><div class='add'>+  Single entry is for target voltage and three entries are for &lt;target min max&gt;</div><div class='add'>+  voltages.</div><div class='add'>+</div><div class='add'>+  Entries for multiple regulators must be present in the same order as</div><div class='add'>+  regulators are specified in device's DT node.</div><div class='add'>+</div><div class='add'>+- opp-microamp: The maximum current drawn by the device in microamperes</div><div class='add'>+  considering system specific parameters (such as transients, process, aging,</div><div class='add'>+  maximum operating temperature range etc.) as necessary. This may be used to</div><div class='add'>+  set the most efficient regulator operating mode.</div><div class='add'>+</div><div class='add'>+  Should only be set if opp-microvolt is set for the OPP.</div><div class='add'>+</div><div class='add'>+  Entries for multiple regulators must be present in the same order as</div><div class='add'>+  regulators are specified in device's DT node. If this property isn't required</div><div class='add'>+  for few regulators, then this should be marked as zero for them. If it isn't</div><div class='add'>+  required for any regulator, then this property need not be present.</div><div class='add'>+</div><div class='add'>+- clock-latency-ns: Specifies the maximum possible transition latency (in</div><div class='add'>+  nanoseconds) for switching to this OPP from any other OPP.</div><div class='add'>+</div><div class='add'>+- turbo-mode: Marks the OPP to be used only for turbo modes. Turbo mode is</div><div class='add'>+  available on some platforms, where the device can run over its operating</div><div class='add'>+  frequency for a short duration of time limited by the device's power, current</div><div class='add'>+  and thermal limits.</div><div class='add'>+</div><div class='add'>+- opp-suspend: Marks the OPP to be used during device suspend. Only one OPP in</div><div class='add'>+  the table should have this.</div><div class='add'>+</div><div class='add'>+- status: Marks the node enabled/disabled.</div><div class='add'>+</div><div class='add'>+Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 0&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 0&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table: opp_table0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000 975000 985000&gt;;</div><div class='add'>+			opp-microamp = &lt;70000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = &lt;1100000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;980000 1000000 1010000&gt;;</div><div class='add'>+			opp-microamp = &lt;80000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;310000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;290000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example 2: Single cluster, Quad-core Qualcom-krait, switches DVFS states</div><div class='add'>+independently.</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "qcom,krait";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 0&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "qcom,krait";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 1&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@2 {</div><div class='add'>+			compatible = "qcom,krait";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 2&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@3 {</div><div class='add'>+			compatible = "qcom,krait";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 3&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply3&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_opp_table: opp_table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Missing opp-shared property means CPUs switch DVFS states</div><div class='add'>+		 * independently.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000 975000 985000&gt;;</div><div class='add'>+			opp-microamp = &lt;70000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = &lt;1100000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;980000 1000000 1010000&gt;;</div><div class='add'>+			opp-microamp = &lt;80000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;310000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000&gt;;</div><div class='add'>+			opp-microamp = &lt;90000;</div><div class='add'>+			lock-latency-ns = &lt;290000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example 3: Dual-cluster, Dual-core per cluster. CPUs within a cluster switch</div><div class='add'>+DVFS state together.</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 0&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 0&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a15";</div><div class='add'>+			reg = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 1&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@101 {</div><div class='add'>+			compatible = "arm,cortex-a15";</div><div class='add'>+			reg = &lt;101&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_controller 1&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster0_opp: opp_table0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000 975000 985000&gt;;</div><div class='add'>+			opp-microamp = &lt;70000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = &lt;1100000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;980000 1000000 1010000&gt;;</div><div class='add'>+			opp-microamp = &lt;80000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;310000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000&gt;;</div><div class='add'>+			opp-microamp = &lt;90000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;290000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster1_opp: opp_table1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp10 {</div><div class='add'>+			opp-hz = &lt;1300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1045000 1050000 1055000&gt;;</div><div class='add'>+			opp-microamp = &lt;95000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;400000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+		opp11 {</div><div class='add'>+			opp-hz = &lt;1400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1075000&gt;;</div><div class='add'>+			opp-microamp = &lt;100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp12 {</div><div class='add'>+			opp-hz = &lt;1500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1010000 1100000 1110000&gt;;</div><div class='add'>+			opp-microamp = &lt;95000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;400000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example 4: Handling multiple regulators</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			...</div><div class='add'>+</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply0&gt;, &lt;&amp;cpu_supply1&gt;, &lt;&amp;cpu_supply2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table: opp_table0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000&gt;, /* Supply 0 */</div><div class='add'>+					&lt;960000&gt;, /* Supply 1 */</div><div class='add'>+					&lt;960000&gt;; /* Supply 2 */</div><div class='add'>+			opp-microamp =  &lt;70000&gt;,  /* Supply 0 */</div><div class='add'>+					&lt;70000&gt;,  /* Supply 1 */</div><div class='add'>+					&lt;70000&gt;;  /* Supply 2 */</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* OR */</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000 975000 985000&gt;, /* Supply 0 */</div><div class='add'>+					&lt;960000 965000 975000&gt;, /* Supply 1 */</div><div class='add'>+					&lt;960000 965000 975000&gt;; /* Supply 2 */</div><div class='add'>+			opp-microamp =  &lt;70000&gt;,		/* Supply 0 */</div><div class='add'>+					&lt;70000&gt;,		/* Supply 1 */</div><div class='add'>+					&lt;70000&gt;;		/* Supply 2 */</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* OR */</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;970000 975000 985000&gt;, /* Supply 0 */</div><div class='add'>+					&lt;960000 965000 975000&gt;, /* Supply 1 */</div><div class='add'>+					&lt;960000 965000 975000&gt;; /* Supply 2 */</div><div class='add'>+			opp-microamp =  &lt;70000&gt;,		/* Supply 0 */</div><div class='add'>+					&lt;0&gt;,			/* Supply 1 doesn't need this */</div><div class='add'>+					&lt;70000&gt;;		/* Supply 2 */</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Example 5: Multiple OPP tables</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			...</div><div class='add'>+</div><div class='add'>+			cpu-supply = &lt;&amp;cpu_supply&gt;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table_slow&gt;, &lt;&amp;cpu0_opp_table_fast&gt;;</div><div class='add'>+			operating-points-names = "slow", "fast";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table_slow: opp_table_slow {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		status = "okay";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = &lt;600000000&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = &lt;800000000&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table_fast: opp_table_fast {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		status = "okay";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp10 {</div><div class='add'>+			opp-hz = &lt;1000000000&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp11 {</div><div class='add'>+			opp-hz = &lt;1100000000&gt;;</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/rt9455_charger.txt b/Documentation/devicetree/bindings/power/rt9455_charger.txt<br/>new file mode 100644<br/>index 000000000000..5d9ad5cf2c5a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/rt9455_charger.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/rt9455_charger.txt</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+Binding for Richtek rt9455 battery charger</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:				it should contain one of the following:</div><div class='add'>+					"richtek,rt9455".</div><div class='add'>+- reg:					integer, i2c address of the device.</div><div class='add'>+- interrupt-parent:			the phandle for the interrupt controller that</div><div class='add'>+					services interrupts for this device.</div><div class='add'>+- interrupts:				interrupt mapping for GPIO IRQ, it should be</div><div class='add'>+					configured with IRQ_TYPE_LEVEL_LOW flag.</div><div class='add'>+- richtek,output-charge-current:	integer, output current from the charger to the</div><div class='add'>+					battery, in uA.</div><div class='add'>+- richtek,end-of-charge-percentage:	integer, percent of the output charge current.</div><div class='add'>+					When the current in constant-voltage phase drops</div><div class='add'>+					below output_charge_current x end-of-charge-percentage,</div><div class='add'>+					charge is terminated.</div><div class='add'>+- richtek,battery-regulation-voltage:	integer, maximum battery voltage in uV.</div><div class='add'>+- richtek,boost-output-voltage:		integer, maximum voltage provided to consumer</div><div class='add'>+					devices, when the charger is in boost mode, in uV.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- richtek,min-input-voltage-regulation: integer, input voltage level in uV, used to</div><div class='add'>+					decrease voltage level when the over current</div><div class='add'>+					of the input power source occurs.</div><div class='add'>+					This prevents input voltage drop due to insufficient</div><div class='add'>+					current provided by the power source.</div><div class='add'>+					Default: 4500000 uV (4.5V)</div><div class='add'>+- richtek,avg-input-current-regulation: integer, input current value in uA drained by the</div><div class='add'>+					charger from the power source.</div><div class='add'>+					Default: 500000 uA (500mA)</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+rt9455@22 {</div><div class='add'>+	compatible = "richtek,rt9455";</div><div class='add'>+	reg = &lt;0x22&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	richtek,output-charge-current	    = &lt;500000&gt;;</div><div class='add'>+	richtek,end-of-charge-percentage    = &lt;10&gt;;</div><div class='add'>+	richtek,battery-regulation-voltage  = &lt;4200000&gt;;</div><div class='add'>+	richtek,boost-output-voltage	    = &lt;5050000&gt;;</div><div class='add'>+</div><div class='add'>+	richtek,min-input-voltage-regulation = &lt;4500000&gt;;</div><div class='add'>+	richtek,avg-input-current-regulation = &lt;500000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/twl-charger.txt b/Documentation/devicetree/bindings/power/twl-charger.txt<br/>index d5c706216df5..3b4ea1b73b38 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/twl-charger.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/power/twl-charger.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power/twl-charger.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power/twl-charger.txt</a></div><div class='hunk'>@@ -1,5 +1,15 @@</div><div class='ctx'> TWL BCI (Battery Charger Interface)</div><div class='ctx'> </div><div class='add'>+The battery charger needs to interact with the USB phy in order</div><div class='add'>+to know when charging is permissible, and when there is a connection</div><div class='add'>+or disconnection.</div><div class='add'>+</div><div class='add'>+The choice of phy cannot be configured at a hardware level, so there</div><div class='add'>+is no value in explicit configuration in device-tree.  Rather</div><div class='add'>+if there is a sibling of the BCI node which is compatible with</div><div class='add'>+"ti,twl4030-usb", then that is used to determine when and how</div><div class='add'>+use USB power for charging.</div><div class='add'>+</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible:</div><div class='ctx'>   - "ti,twl4030-bci"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power_supply/max17042_battery.txt b/Documentation/devicetree/bindings/power_supply/max17042_battery.txt<br/>index 5bc9b685cf8a..3f3894aaeebc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power_supply/max17042_battery.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/power_supply/max17042_battery.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/power_supply/max17042_battery.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/power_supply/max17042_battery.txt</a></div><div class='hunk'>@@ -9,10 +9,23 @@ Optional properties :</div><div class='ctx'>                          (datasheet-recommended value is 10000).</div><div class='ctx'>    Defining this property enables current-sense functionality.</div><div class='ctx'> </div><div class='add'>+Optional threshold properties :</div><div class='add'>+ If skipped the condition won't be reported.</div><div class='add'>+ - maxim,cold-temp :      Temperature threshold to report battery</div><div class='add'>+                          as cold (in tenths of degree Celsius).</div><div class='add'>+ - maxim,over-heat-temp : Temperature threshold to report battery</div><div class='add'>+                          as over heated (in tenths of degree Celsius).</div><div class='add'>+ - maxim,dead-volt :      Voltage threshold to report battery</div><div class='add'>+                          as dead (in mV).</div><div class='add'>+ - maxim,over-volt :      Voltage threshold to report battery</div><div class='add'>+                          as over voltage (in mV).</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	battery-charger@36 {</div><div class='ctx'> 		compatible = "maxim,max17042";</div><div class='ctx'> 		reg = &lt;0x36&gt;;</div><div class='ctx'> 		maxim,rsns-microohm = &lt;10000&gt;;</div><div class='add'>+		maxim,over-heat-temp = &lt;600&gt;;</div><div class='add'>+		maxim,over-volt = &lt;4300&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt<br/>index edda55f74004..1fc5328c0651 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/powerpc/fsl/fman.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/powerpc/fsl/fman.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/powerpc/fsl/fman.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/powerpc/fsl/fman.txt</a></div><div class='hunk'>@@ -189,6 +189,19 @@ PROPERTIES</div><div class='ctx'> 		Definition: There is one reg region describing the port</div><div class='ctx'> 		configuration registers.</div><div class='ctx'> </div><div class='add'>+- fsl,fman-10g-port</div><div class='add'>+		Usage: optional</div><div class='add'>+		Value type: boolean</div><div class='add'>+		Definition: The default port rate is 1G.</div><div class='add'>+		If this property exists, the port is s 10G port.</div><div class='add'>+</div><div class='add'>+- fsl,fman-best-effort-port</div><div class='add'>+		Usage: optional</div><div class='add'>+		Value type: boolean</div><div class='add'>+		Definition: Can be defined only if 10G-support is set.</div><div class='add'>+		This property marks a best-effort 10G port (10G port that</div><div class='add'>+		may not be capable of line rate).</div><div class='add'>+</div><div class='ctx'> EXAMPLE</div><div class='ctx'> </div><div class='ctx'> port@a8000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt b/Documentation/devicetree/bindings/powerpc/fsl/guts.txt<br/>index 7f150b5012cc..b71b2039e112 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/powerpc/fsl/guts.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/powerpc/fsl/guts.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/powerpc/fsl/guts.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/powerpc/fsl/guts.txt</a></div><div class='hunk'>@@ -9,6 +9,11 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'>  - compatible : Should define the compatible device type for</div><div class='ctx'>    global-utilities.</div><div class='add'>+   Possible compatibles:</div><div class='add'>+	"fsl,qoriq-device-config-1.0"</div><div class='add'>+	"fsl,qoriq-device-config-2.0"</div><div class='add'>+	"fsl,&lt;chip&gt;-device-config"</div><div class='add'>+	"fsl,&lt;chip&gt;-guts"</div><div class='ctx'>  - reg : Offset and length of the register set for the device.</div><div class='ctx'> </div><div class='ctx'> Recommended properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/max8973-regulator.txt b/Documentation/devicetree/bindings/regulator/max8973-regulator.txt<br/>index 4f15d8a1bfd0..55efb24e5683 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/max8973-regulator.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/regulator/max8973-regulator.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/max8973-regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/max8973-regulator.txt</a></div><div class='hunk'>@@ -2,12 +2,30 @@</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='del'>-- compatible:	must be "maxim,max8973"</div><div class='add'>+- compatible:	must be one of following:</div><div class='add'>+			"maxim,max8973"</div><div class='add'>+			"maxim,max77621".</div><div class='ctx'> - reg:		the i2c slave address of the regulator. It should be 0x1b.</div><div class='ctx'> </div><div class='ctx'> Any standard regulator properties can be used to configure the single max8973</div><div class='ctx'> DCDC.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+-maxim,externally-enable: boolean, externally control the regulator output</div><div class='add'>+		enable/disable.</div><div class='add'>+-maxim,enable-gpio: GPIO for enable control. If the valid GPIO is provided</div><div class='add'>+		then externally enable control will be considered.</div><div class='add'>+-maxim,dvs-gpio: GPIO which is connected to DVS pin of device.</div><div class='add'>+-maxim,dvs-default-state: Default state of GPIO during initialisation.</div><div class='add'>+		1 for HIGH and 0 for LOW.</div><div class='add'>+-maxim,enable-remote-sense: boolean, enable reote sense.</div><div class='add'>+-maxim,enable-falling-slew-rate: boolean, enable falling slew rate.</div><div class='add'>+-maxim,enable-active-discharge: boolean: enable active discharge.</div><div class='add'>+-maxim,enable-frequency-shift: boolean, enable 9% frequency shift.</div><div class='add'>+-maxim,enable-bias-control: boolean, enable bias control. By enabling this</div><div class='add'>+		startup delay can be reduce to 20us from 220us.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	max8973@1b {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt<br/>new file mode 100644<br/>index 000000000000..75b4604bad07<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+Qualcomm SPMI Regulators</div><div class='add'>+</div><div class='add'>+- compatible:</div><div class='add'>+	Usage: required</div><div class='add'>+	Value type: &lt;string&gt;</div><div class='add'>+	Definition: must be one of:</div><div class='add'>+			"qcom,pm8841-regulators"</div><div class='add'>+			"qcom,pm8916-regulators"</div><div class='add'>+			"qcom,pm8941-regulators"</div><div class='add'>+</div><div class='add'>+- interrupts:</div><div class='add'>+	Usage: optional</div><div class='add'>+	Value type: &lt;prop-encoded-array&gt;</div><div class='add'>+	Definition: List of OCP interrupts.</div><div class='add'>+</div><div class='add'>+- interrupt-names:</div><div class='add'>+	Usage: required if 'interrupts' property present</div><div class='add'>+	Value type: &lt;string-array&gt;</div><div class='add'>+	Definition: List of strings defining the names of the</div><div class='add'>+		    interrupts in the 'interrupts' property 1-to-1.</div><div class='add'>+		    Supported values are "ocp-&lt;regulator_name&gt;", where</div><div class='add'>+		    &lt;regulator_name&gt; corresponds to a voltage switch</div><div class='add'>+		    type regulator.</div><div class='add'>+</div><div class='add'>+- vdd_s1-supply:</div><div class='add'>+- vdd_s2-supply:</div><div class='add'>+- vdd_s3-supply:</div><div class='add'>+- vdd_s4-supply:</div><div class='add'>+- vdd_s5-supply:</div><div class='add'>+- vdd_s6-supply:</div><div class='add'>+- vdd_s7-supply:</div><div class='add'>+- vdd_s8-supply:</div><div class='add'>+	Usage: optional (pm8841 only)</div><div class='add'>+	Value type: &lt;phandle&gt;</div><div class='add'>+	Definition: Reference to regulator supplying the input pin, as</div><div class='add'>+		    described in the data sheet.</div><div class='add'>+</div><div class='add'>+- vdd_s1-supply:</div><div class='add'>+- vdd_s2-supply:</div><div class='add'>+- vdd_s3-supply:</div><div class='add'>+- vdd_s4-supply:</div><div class='add'>+- vdd_l1_l3-supply:</div><div class='add'>+- vdd_l2-supply:</div><div class='add'>+- vdd_l4_l5_l6-supply:</div><div class='add'>+- vdd_l7-supply:</div><div class='add'>+- vdd_l8_l11_l14_l15_l16-supply:</div><div class='add'>+- vdd_l9_l10_l12_l13_l17_l18-supply:</div><div class='add'>+	Usage: optional (pm8916 only)</div><div class='add'>+	Value type: &lt;phandle&gt;</div><div class='add'>+	Definition: Reference to regulator supplying the input pin, as</div><div class='add'>+		    described in the data sheet.</div><div class='add'>+</div><div class='add'>+- vdd_s1-supply:</div><div class='add'>+- vdd_s2-supply:</div><div class='add'>+- vdd_s3-supply:</div><div class='add'>+- vdd_l1_l3-supply:</div><div class='add'>+- vdd_l2_lvs_1_2_3-supply:</div><div class='add'>+- vdd_l4_l11-supply:</div><div class='add'>+- vdd_l5_l7-supply:</div><div class='add'>+- vdd_l6_l12_l14_l15-supply:</div><div class='add'>+- vdd_l8_l16_l18_19-supply:</div><div class='add'>+- vdd_l9_l10_l17_l22-supply:</div><div class='add'>+- vdd_l13_l20_l23_l24-supply:</div><div class='add'>+- vdd_l21-supply:</div><div class='add'>+- vin_5vs-supply:</div><div class='add'>+	Usage: optional (pm8941 only)</div><div class='add'>+	Value type: &lt;phandle&gt;</div><div class='add'>+	Definition: Reference to regulator supplying the input pin, as</div><div class='add'>+		    described in the data sheet.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The regulator node houses sub-nodes for each regulator within the device. Each</div><div class='add'>+sub-node is identified using the node's name, with valid values listed for each</div><div class='add'>+of the PMICs below.</div><div class='add'>+</div><div class='add'>+pm8841:</div><div class='add'>+	s1, s2, s3, s4, s5, s6, s7, s8</div><div class='add'>+</div><div class='add'>+pm8916:</div><div class='add'>+	s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,</div><div class='add'>+	l14, l15, l16, l17, l18</div><div class='add'>+</div><div class='add'>+pm8941:</div><div class='add'>+	s1, s2, s3, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14,</div><div class='add'>+	l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3,</div><div class='add'>+	mvs1, mvs2</div><div class='add'>+</div><div class='add'>+The content of each sub-node is defined by the standard binding for regulators -</div><div class='add'>+see regulator.txt - with additional custom properties described below:</div><div class='add'>+</div><div class='add'>+- regulator-initial-mode:</div><div class='add'>+	Usage: optional</div><div class='add'>+	Value type: &lt;u32&gt;</div><div class='add'>+	Descrption: 1 = Set initial mode to high power mode (HPM), also referred</div><div class='add'>+		    to as NPM.  HPM consumes more ground current than LPM, but</div><div class='add'>+		    it can source significantly higher load current. HPM is not</div><div class='add'>+		    available on boost type regulators. For voltage switch type</div><div class='add'>+		    regulators, HPM implies that over current protection and</div><div class='add'>+		    soft start are active all the time. 0 = Set initial mode to</div><div class='add'>+		    low power mode (LPM).</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,pm8941-regulators";</div><div class='add'>+		vdd_l1_l3-supply = &lt;&amp;s1&gt;;</div><div class='add'>+</div><div class='add'>+		s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		...</div><div class='add'>+</div><div class='add'>+		l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		....</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/regulator.txt b/Documentation/devicetree/bindings/regulator/regulator.txt<br/>index abb26b58c83e..db88feb28c03 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/regulator.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/regulator/regulator.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/regulator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/regulator/regulator.txt</a></div><div class='hunk'>@@ -7,18 +7,20 @@ Optional properties:</div><div class='ctx'> - regulator-microvolt-offset: Offset applied to voltages to compensate for voltage drops</div><div class='ctx'> - regulator-min-microamp: smallest current consumers may set</div><div class='ctx'> - regulator-max-microamp: largest current consumers may set</div><div class='add'>+- regulator-input-current-limit-microamp: maximum input current regulator allows</div><div class='ctx'> - regulator-always-on: boolean, regulator should never be disabled</div><div class='ctx'> - regulator-boot-on: bootloader/firmware enabled regulator</div><div class='ctx'> - regulator-allow-bypass: allow the regulator to go into bypass mode</div><div class='ctx'> - &lt;name&gt;-supply: phandle to the parent supply/regulator node</div><div class='ctx'> - regulator-ramp-delay: ramp delay for regulator(in uV/uS)</div><div class='ctx'>   For hardware which supports disabling ramp rate, it should be explicitly</div><div class='del'>-  intialised to zero (regulator-ramp-delay = &lt;0&gt;) for disabling ramp delay.</div><div class='add'>+  initialised to zero (regulator-ramp-delay = &lt;0&gt;) for disabling ramp delay.</div><div class='ctx'> - regulator-enable-ramp-delay: The time taken, in microseconds, for the supply</div><div class='ctx'>   rail to reach the target voltage, plus/minus whatever tolerance the board</div><div class='ctx'>   design requires. This property describes the total system ramp time</div><div class='ctx'>   required due to the combination of internal ramping of the regulator itself,</div><div class='ctx'>   and board design issues such as trace capacitance and load on the supply.</div><div class='add'>+- regulator-soft-start: Enable soft start so that voltage ramps slowly</div><div class='ctx'> - regulator-state-mem sub-root node for Suspend-to-RAM mode</div><div class='ctx'>   : suspend to memory, the device goes to sleep, but all data stored in memory,</div><div class='ctx'>   only some external interrupt can wake the device.</div><div class='hunk'>@@ -37,6 +39,9 @@ Optional properties:</div><div class='ctx'> - regulator-initial-mode: initial operating mode. The set of possible operating</div><div class='ctx'>   modes depends on the capabilities of every hardware so each device binding</div><div class='ctx'>   documentation explains which values the regulator supports.</div><div class='add'>+- regulator-system-load: Load in uA present on regulator that is not captured by</div><div class='add'>+  any consumer request.</div><div class='add'>+- regulator-pull-down: Enable pull down resistor when the regulator is disabled.</div><div class='ctx'> </div><div class='ctx'> Deprecated properties:</div><div class='ctx'> - regulator-compatible: If a regulator chip contains multiple</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt b/Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt<br/>new file mode 100644<br/>index 000000000000..3a70073797eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+TI Wakeup M3 Remoteproc Driver</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor</div><div class='add'>+(commonly referred to as Wakeup M3 or CM3) to help with various low power tasks</div><div class='add'>+that cannot be controlled from the MPU. This CM3 processor requires a firmware</div><div class='add'>+binary to accomplish this. The wkup_m3 remoteproc driver handles the loading of</div><div class='add'>+the firmware and booting of the CM3.</div><div class='add'>+</div><div class='add'>+Wkup M3 Device Node:</div><div class='add'>+====================</div><div class='add'>+A wkup_m3 device node is used to represent the Wakeup M3 processor instance</div><div class='add'>+within the SoC. It is added as a child node of the parent interconnect bus</div><div class='add'>+(l4_wkup) through which it is accessible to the MPU.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+--------------------</div><div class='add'>+- compatible:		Should be one of,</div><div class='add'>+				"ti,am3352-wkup-m3" for AM33xx SoCs</div><div class='add'>+				"ti,am4372-wkup-m3" for AM43xx SoCs</div><div class='add'>+- reg:			Should contain the address ranges for the two internal</div><div class='add'>+			memory regions, UMEM and DMEM. The parent node should</div><div class='add'>+			provide an appropriate ranges property for properly</div><div class='add'>+			translating these into bus addresses.</div><div class='add'>+- reg-names:		Contains the corresponding names for the two memory</div><div class='add'>+			regions. These should be named "umem" &amp; "dmem".</div><div class='add'>+- ti,hwmods:		Name of the hwmod associated with the wkupm3 device.</div><div class='add'>+- ti,pm-firmware:	Name of firmware file to be used for loading and</div><div class='add'>+			booting the wkup_m3 remote processor.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+--------</div><div class='add'>+/* AM33xx */</div><div class='add'>+ocp {</div><div class='add'>+	 l4_wkup: l4_wkup@44c00000 {</div><div class='add'>+		compatible = "am335-l4-wkup", "simple-bus";</div><div class='add'>+		ranges = &lt;0 0x44c00000 0x400000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		wkup_m3: wkup_m3@100000 {</div><div class='add'>+			compatible = "ti,am3352-wkup-m3";</div><div class='add'>+			reg = &lt;0x100000 0x4000&gt;,</div><div class='add'>+			      &lt;0x180000 0x2000&gt;;</div><div class='add'>+			reg-names = "umem", "dmem";</div><div class='add'>+			ti,hwmods = "wkup_m3";</div><div class='add'>+			ti,pm-firmware = "am335x-pm-firmware.elf";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/berlin,reset.txt b/Documentation/devicetree/bindings/reset/berlin,reset.txt<br/>new file mode 100644<br/>index 000000000000..514fee098b4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/reset/berlin,reset.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/reset/berlin,reset.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+Marvell Berlin reset controller</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+Please also refer to reset.txt in this directory for common reset</div><div class='add'>+controller binding usage.</div><div class='add'>+</div><div class='add'>+The reset controller node must be a sub-node of the chip controller</div><div class='add'>+node on Berlin SoCs.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "marvell,berlin2-reset"</div><div class='add'>+- #reset-cells: must be set to 2</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+chip_rst: reset {</div><div class='add'>+	compatible = "marvell,berlin2-reset";</div><div class='add'>+	#reset-cells = &lt;2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_phy0 {</div><div class='add'>+	resets = &lt;&amp;chip_rst 0x104 12&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt b/Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt<br/>new file mode 100644<br/>index 000000000000..a98872d27872<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/reset/brcm,bcm63138-pmb.txt</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+Broadcom BCM63138 Processor Monitor Bus binding</div><div class='add'>+===============================================</div><div class='add'>+</div><div class='add'>+Please also refer to reset.txt in this directory for common reset</div><div class='add'>+controller binding usage.</div><div class='add'>+</div><div class='add'>+Require properties:</div><div class='add'>+</div><div class='add'>+- compatible: must be "brcm,bcm63138-pmb"</div><div class='add'>+- reg: base register address and size for this bus controller</div><div class='add'>+- #reset-cells: must be 2 first cell is the address within the bus instance designated</div><div class='add'>+  by the phandle, and the second is the number of zones for this peripheral</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	pmb0: reset-controller@4800c0 {</div><div class='add'>+		compatible = "brcm,bcm63138-pmb";</div><div class='add'>+		reg = &lt;0x4800c0 0x10&gt;;</div><div class='add'>+		#reset-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt b/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt<br/>index 5c199ee044cb..a8934fe2ab4c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt</a></div><div class='hunk'>@@ -6,11 +6,11 @@ as well as a clock output of up to 32kHz.</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: should be: "haoyu,hym8563"</div><div class='ctx'> - reg: i2c address</div><div class='del'>-- interrupts: rtc alarm/event interrupt</div><div class='ctx'> - #clock-cells: the value should be 0</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - clock-output-names: From common clock binding</div><div class='add'>+- interrupts: rtc alarm/event interrupt</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt b/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt<br/>new file mode 100644<br/>index 000000000000..73407f502e4e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+STMicroelectronics Low Power Controller (LPC) - RTC</div><div class='add'>+===================================================</div><div class='add'>+</div><div class='add'>+LPC currently supports Watchdog OR Real Time Clock functionality.</div><div class='add'>+</div><div class='add'>+[See: ../watchdog/st_lpc_wdt.txt for Watchdog options]</div><div class='add'>+</div><div class='add'>+Required properties</div><div class='add'>+</div><div class='add'>+- compatible 	: Must be one of: "st,stih407-lpc" "st,stih416-lpc"</div><div class='add'>+				  "st,stih415-lpc" "st,stid127-lpc"</div><div class='add'>+- reg		: LPC registers base address + size</div><div class='add'>+- interrupts    : LPC interrupt line number and associated flags</div><div class='add'>+- clocks	: Clock used by LPC device (See: ../clock/clock-bindings.txt)</div><div class='add'>+- st,lpc-mode	: The LPC can run either one of two modes ST_LPC_MODE_RTC [0] or</div><div class='add'>+		  ST_LPC_MODE_WDT [1].  One (and only one) mode must be</div><div class='add'>+		  selected.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	lpc@fde05000 {</div><div class='add'>+		compatible	= "st,stih407-lpc";</div><div class='add'>+		reg		= &lt;0xfde05000 0x1000&gt;;</div><div class='add'>+		clocks 		= &lt;&amp;clk_s_d3_flexgen CLK_LPC_0&gt;;</div><div class='add'>+		st,lpc-mode	= &lt;ST_LPC_MODE_RTC&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt<br/>index ab757b84daa7..ac2fcd6ff4b8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/s3c-rtc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/rtc/s3c-rtc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/s3c-rtc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/rtc/s3c-rtc.txt</a></div><div class='hunk'>@@ -6,7 +6,8 @@ Required properties:</div><div class='ctx'>     * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.</div><div class='ctx'>     * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.</div><div class='ctx'>     * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.</div><div class='del'>-    * "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc.</div><div class='add'>+    * "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with</div><div class='add'>+                                 exynos3250 rtc (use "samsung,s3c6410-rtc").</div><div class='ctx'> - reg: physical base address of the controller and length of memory mapped</div><div class='ctx'>   region.</div><div class='ctx'> - interrupts: Two interrupt numbers to the cpu should be specified. First</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt b/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt<br/>new file mode 100644<br/>index 000000000000..4163e7eb7763<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+* ARM SBSA defined generic UART</div><div class='add'>+This UART uses a subset of the PL011 registers and consequently lives</div><div class='add'>+in the PL011 driver. It's baudrate and other communication parameters</div><div class='add'>+cannot be adjusted at runtime, so it lacks a clock specifier here.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "arm,sbsa-uart"</div><div class='add'>+- reg: exactly one register range</div><div class='add'>+- interrupts: exactly one interrupt specifier</div><div class='add'>+- current-speed: the (fixed) baud rate set by the firmware</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.txt b/Documentation/devicetree/bindings/serial/ingenic,uart.txt<br/>new file mode 100644<br/>index 000000000000..c2d3b3abe7d9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/ingenic,uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/ingenic,uart.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+* Ingenic SoC UART</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "ingenic,jz4740-uart" or "ingenic,jz4780-uart"</div><div class='add'>+- reg : offset and length of the register set for the device.</div><div class='add'>+- interrupts : should contain uart interrupt.</div><div class='add'>+- clocks : phandles to the module &amp; baud clocks.</div><div class='add'>+- clock-names: tuple listing input clock names.</div><div class='add'>+	Required elements: "baud", "module"</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+uart0: serial@10030000 {</div><div class='add'>+	compatible = "ingenic,jz4740-uart";</div><div class='add'>+	reg = &lt;0x10030000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	interrupts = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4740_CLK_UART0&gt;;</div><div class='add'>+	clock-names = "baud", "module";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt<br/>index 44152261e5c5..8d63f1da07aa 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/mtk-uart.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/serial/mtk-uart.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/mtk-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/mtk-uart.txt</a></div><div class='hunk'>@@ -14,7 +14,14 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'> - interrupts: A single interrupt specifier.</div><div class='ctx'> </div><div class='del'>-- clocks: Clock driving the hardware.</div><div class='add'>+- clocks : Must contain an entry for each entry in clock-names.</div><div class='add'>+  See ../clocks/clock-bindings.txt for details.</div><div class='add'>+- clock-names:</div><div class='add'>+  - "baud": The clock the baudrate is derived from</div><div class='add'>+  - "bus": The bus clock for register accesses (optional)</div><div class='add'>+</div><div class='add'>+For compatibility with older device trees an unnamed clock is used for the</div><div class='add'>+baud clock if the baudclk does not exist. Do not use this for new designs.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -22,5 +29,6 @@ Example:</div><div class='ctx'> 		compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";</div><div class='ctx'> 		reg = &lt;0x11006000 0x400&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+		clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;bus_clk&gt;;</div><div class='add'>+		clock-names = "baud", "bus";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt b/Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt<br/>new file mode 100644<br/>index 000000000000..04e23e63ee4f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/nxp,lpc1850-uart.txt</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+* NXP LPC1850 UART</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible	: "nxp,lpc1850-uart", "ns16550a".</div><div class='add'>+- reg		: offset and length of the register set for the device.</div><div class='add'>+- interrupts	: should contain uart interrupt.</div><div class='add'>+- clocks	: phandle to the input clocks.</div><div class='add'>+- clock-names	: required elements: "uartclk", "reg".</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- dmas		: Two or more DMA channel specifiers following the</div><div class='add'>+		  convention outlined in bindings/dma/dma.txt</div><div class='add'>+- dma-names	: Names for the dma channels, if present. There must</div><div class='add'>+		  be at least one channel named "tx" for transmit</div><div class='add'>+		  and named "rx" for receive.</div><div class='add'>+</div><div class='add'>+Since it's also possible to also use the of_serial.c driver all</div><div class='add'>+parameters from 8250.txt also apply but are optional.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+uart0: serial@40081000 {</div><div class='add'>+	compatible = "nxp,lpc1850-uart", "ns16550a";</div><div class='add'>+	reg = &lt;0x40081000 0x1000&gt;;</div><div class='add'>+	reg-shift = &lt;2&gt;;</div><div class='add'>+	interrupts = &lt;24&gt;;</div><div class='add'>+	clocks = &lt;&amp;ccu2 CLK_APB0_UART0&gt;, &lt;&amp;ccu1 CLK_CPU_UART0&gt;;</div><div class='add'>+	clock-names = "uartclk", "reg";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt<br/>index 246c795668dc..fbfe53635a3a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> * NXP SC16IS7xx advanced Universal Asynchronous Receiver-Transmitter (UART)</div><div class='add'>+* i2c as bus</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: Should be one of the following:</div><div class='hunk'>@@ -31,3 +32,39 @@ Example:</div><div class='ctx'>                 gpio-controller;</div><div class='ctx'>                 #gpio-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='add'>+</div><div class='add'>+* spi as bus</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be one of the following:</div><div class='add'>+  - "nxp,sc16is740" for NXP SC16IS740,</div><div class='add'>+  - "nxp,sc16is741" for NXP SC16IS741,</div><div class='add'>+  - "nxp,sc16is750" for NXP SC16IS750,</div><div class='add'>+  - "nxp,sc16is752" for NXP SC16IS752,</div><div class='add'>+  - "nxp,sc16is760" for NXP SC16IS760,</div><div class='add'>+  - "nxp,sc16is762" for NXP SC16IS762.</div><div class='add'>+- reg: SPI chip select number.</div><div class='add'>+- interrupt-parent: The phandle for the interrupt controller that</div><div class='add'>+  services interrupts for this IC.</div><div class='add'>+- interrupts: Specifies the interrupt source of the parent interrupt</div><div class='add'>+  controller. The format of the interrupt specifier depends on the</div><div class='add'>+  parent interrupt controller.</div><div class='add'>+- clocks: phandle to the IC source clock.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- gpio-controller: Marks the device node as a GPIO controller.</div><div class='add'>+- #gpio-cells: Should be two. The first cell is the GPIO number and</div><div class='add'>+  the second cell is used to specify the GPIO polarity:</div><div class='add'>+    0 = active high,</div><div class='add'>+    1 = active low.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	sc16is750: sc16is750@0 {</div><div class='add'>+		compatible = "nxp,sc16is750";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk20m&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt<br/>index ba3ecb8cb5a1..cbae3d9a0278 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/pl011.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/serial/pl011.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/pl011.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/pl011.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> * ARM AMBA Primecell PL011 serial UART</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: must be "arm,primecell", "arm,pl011"</div><div class='add'>+- compatible: must be "arm,primecell", "arm,pl011", "zte,zx296702-uart"</div><div class='ctx'> - reg: exactly one register range with length 0x1000</div><div class='ctx'> - interrupts: exactly one interrupt specifier</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt<br/>index ae73bb0e9ad9..e84b13a8eda3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/serial/renesas,sci-serial.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/renesas,sci-serial.txt</a></div><div class='hunk'>@@ -29,6 +29,7 @@ Required properties:</div><div class='ctx'>     - "renesas,scifa" for generic SCIFA compatible UART.</div><div class='ctx'>     - "renesas,scifb" for generic SCIFB compatible UART.</div><div class='ctx'>     - "renesas,hscif" for generic HSCIF compatible UART.</div><div class='add'>+    - "renesas,sci" for generic SCI compatible UART.</div><div class='ctx'> </div><div class='ctx'>     When compatible with the generic version, nodes must list the</div><div class='ctx'>     SoC-specific version corresponding to the platform first followed by the</div><div class='hunk'>@@ -44,6 +45,11 @@ Required properties:</div><div class='ctx'> Note: Each enabled SCIx UART should have an alias correctly numbered in the</div><div class='ctx'> "aliases" node.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+  - dmas: Must contain a list of two references to DMA specifiers, one for</div><div class='add'>+	  transmission, and one for reception.</div><div class='add'>+  - dma-names: Must contain a list of two DMA names, "tx" and "rx".</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;scifa0;</div><div class='hunk'>@@ -56,4 +62,6 @@ Example:</div><div class='ctx'> 		interrupts = &lt;0 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFA0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/sirf-uart.txt b/Documentation/devicetree/bindings/serial/sirf-uart.txt<br/>index f0c39261c5d4..67e2a0aeb042 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/sirf-uart.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/serial/sirf-uart.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/sirf-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/sirf-uart.txt</a></div><div class='hunk'>@@ -2,8 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",</div><div class='del'>-		"sirf,atlas7-uart" or "sirf,atlas7-bt-uart" which means</div><div class='del'>-		uart located in BT module and used for BT.</div><div class='add'>+		"sirf,atlas7-uart" or "sirf,atlas7-usp-uart".</div><div class='ctx'> - reg : Offset and length of the register set for the device</div><div class='ctx'> - interrupts : Should contain uart interrupt</div><div class='ctx'> - fifosize : Should define hardware rx/tx fifo size</div><div class='hunk'>@@ -33,15 +32,3 @@ usp@b0090000 {</div><div class='ctx'> 	rts-gpios = &lt;&amp;gpio 15 0&gt;;</div><div class='ctx'> 	cts-gpios = &lt;&amp;gpio 46 0&gt;;</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-for uart use in BT module,</div><div class='del'>-uart6: uart@11000000 {</div><div class='del'>-	cell-index = &lt;6&gt;;</div><div class='del'>-	compatible = "sirf,atlas7-bt-uart", "sirf,atlas7-uart";</div><div class='del'>-	reg = &lt;0x11000000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;0 100 0&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks 138&gt;, &lt;&amp;clks 140&gt;, &lt;&amp;clks 141&gt;;</div><div class='del'>-	clock-names = "uart", "general", "noc";</div><div class='del'>-	fifosize = &lt;128&gt;;</div><div class='del'>-	status = "disabled";</div><div class='del'>-}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/uniphier-uart.txt b/Documentation/devicetree/bindings/serial/uniphier-uart.txt<br/>new file mode 100644<br/>index 000000000000..0b3892a7a528<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/serial/uniphier-uart.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/serial/uniphier-uart.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+UniPhier UART controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "socionext,uniphier-uart".</div><div class='add'>+- reg: offset and length of the register set for the device.</div><div class='add'>+- interrupts: a single interrupt specifier.</div><div class='add'>+- clocks: phandle to the input clock.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- fifo-size: the RX/TX FIFO size.  Defaults to 64 if not specified.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial0: serial@54006800 {</div><div class='add'>+		compatible = "socionext,uniphier-uart";</div><div class='add'>+		reg = &lt;0x54006800 0x40&gt;;</div><div class='add'>+		interrupts = &lt;0 33 4&gt;;</div><div class='add'>+		clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+		fifo-size = &lt;64&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt b/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt<br/>index 48c4dae5d6f9..47e46ccbc170 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/soc/fsl/qman-portals.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/soc/fsl/qman-portals.txt</a></div><div class='hunk'>@@ -47,7 +47,7 @@ PROPERTIES</div><div class='ctx'> </div><div class='ctx'> 	For additional details about the PAMU/LIODN binding(s) see pamu.txt</div><div class='ctx'> </div><div class='del'>-- fsl,qman-channel-id</div><div class='add'>+- cell-index</div><div class='ctx'> 	Usage:		Required</div><div class='ctx'> 	Value type:	&lt;u32&gt;</div><div class='ctx'> 	Definition:	The hardware index of the channel. This can also be</div><div class='hunk'>@@ -136,7 +136,7 @@ The example below shows a (P4080) QMan portals container/bus node with two porta</div><div class='ctx'> 			reg = &lt;0x4000 0x4000&gt;, &lt;0x101000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;106 2 0 0&gt;;</div><div class='ctx'> 			fsl,liodn = &lt;3 4&gt;;</div><div class='del'>-			fsl,qman-channel-id = &lt;1&gt;;</div><div class='add'>+			cell-index = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			fman0 {</div><div class='ctx'> 				fsl,liodn = &lt;0x22&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/sunxi/sram.txt b/Documentation/devicetree/bindings/soc/sunxi/sram.txt<br/>new file mode 100644<br/>index 000000000000..067698112f5f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/soc/sunxi/sram.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/soc/sunxi/sram.txt</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+Allwinnner SoC SRAM controllers</div><div class='add'>+-----------------------------------------------------</div><div class='add'>+</div><div class='add'>+The SRAM controller found on most Allwinner devices is represented by</div><div class='add'>+a regular node for the SRAM controller itself, with sub-nodes</div><div class='add'>+reprensenting the SRAM handled by the SRAM controller.</div><div class='add'>+</div><div class='add'>+Controller Node</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "allwinner,sun4i-a10-sram-controller"</div><div class='add'>+- reg : sram controller register offset + length</div><div class='add'>+</div><div class='add'>+SRAM nodes</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+Each SRAM is described using the mmio-sram bindings documented in</div><div class='add'>+Documentation/devicetree/bindings/misc/sram.txt</div><div class='add'>+</div><div class='add'>+Each SRAM will have SRAM sections that are going to be handled by the</div><div class='add'>+SRAM controller as subnodes. These sections are represented following</div><div class='add'>+once again the representation described in the mmio-sram binding.</div><div class='add'>+</div><div class='add'>+The valid sections compatible are:</div><div class='add'>+    - allwinner,sun4i-a10-sram-a3-a4</div><div class='add'>+    - allwinner,sun4i-a10-sram-d</div><div class='add'>+</div><div class='add'>+Devices using SRAM sections</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+Some devices need to request to the SRAM controller to map an SRAM for</div><div class='add'>+their exclusive use.</div><div class='add'>+</div><div class='add'>+The relationship between such a device and an SRAM section is</div><div class='add'>+expressed through the allwinner,sram property, that will take a</div><div class='add'>+phandle and an argument.</div><div class='add'>+</div><div class='add'>+This valid values for this argument are:</div><div class='add'>+  - 0: CPU</div><div class='add'>+  - 1: Device</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+-------</div><div class='add'>+sram-controller@01c00000 {</div><div class='add'>+	compatible = "allwinner,sun4i-a10-sram-controller";</div><div class='add'>+	reg = &lt;0x01c00000 0x30&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+</div><div class='add'>+	sram_a: sram@00000000 {</div><div class='add'>+		compatible = "mmio-sram";</div><div class='add'>+		reg = &lt;0x00000000 0xc000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0x00000000 0xc000&gt;;</div><div class='add'>+</div><div class='add'>+		emac_sram: sram-section@8000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-sram-a3-a4";</div><div class='add'>+			reg = &lt;0x8000 0x4000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+emac: ethernet@01c0b000 {</div><div class='add'>+	compatible = "allwinner,sun4i-a10-emac";</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+	allwinner,sram = &lt;&amp;emac_sram 1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8173-max98090.txt b/Documentation/devicetree/bindings/sound/mt8173-max98090.txt<br/>index 829bd26d17f8..519e97c8f1b8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mt8173-max98090.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/sound/mt8173-max98090.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mt8173-max98090.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/sound/mt8173-max98090.txt</a></div><div class='hunk'>@@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : "mediatek,mt8173-max98090"</div><div class='ctx'> - mediatek,audio-codec: the phandle of the MAX98090 audio codec</div><div class='add'>+- mediatek,platform: the phandle of MT8173 ASoC platform</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "mediatek,mt8173-max98090";</div><div class='ctx'> 		mediatek,audio-codec = &lt;&amp;max98090&gt;;</div><div class='add'>+		mediatek,platform = &lt;&amp;afe&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt b/Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt<br/>index 61e98c976bd4..f205ce9e31dd 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt</a></div><div class='hunk'>@@ -3,11 +3,13 @@ MT8173 with RT5650 RT5676 CODECS</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : "mediatek,mt8173-rt5650-rt5676"</div><div class='ctx'> - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs</div><div class='add'>+- mediatek,platform: the phandle of MT8173 ASoC platform</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "mediatek,mt8173-rt5650-rt5676";</div><div class='ctx'> 		mediatek,audio-codec = &lt;&amp;rt5650 &amp;rt5676&gt;;</div><div class='add'>+		mediatek,platform = &lt;&amp;afe&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt<br/>index 4c388bb2f0a2..8f771441be60 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/sh-msiof.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/sh-msiof.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/sh-msiof.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/sh-msiof.txt</a></div><div class='hunk'>@@ -60,7 +60,7 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 	msiof0: spi@e6e20000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7791";</div><div class='del'>-		reg = &lt;0 0xe6e20000 0 0x0064&gt;, &lt;0 0xe7e20000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e20000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp0_clks R8A7791_CLK_MSIOF0&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x51&gt;, &lt;&amp;dmac0 0x52&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt<br/>new file mode 100644<br/>index 000000000000..f1ad9c367532<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-ath79.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-ath79.txt</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: has to be "qca,&lt;soc-type&gt;-spi", "qca,ar7100-spi" as fallback.</div><div class='add'>+- reg: Base address and size of the controllers memory area</div><div class='add'>+- clocks: phandle to the AHB clock.</div><div class='add'>+- clock-names: has to be "ahb".</div><div class='add'>+- #address-cells: &lt;1&gt;, as required by generic SPI binding.</div><div class='add'>+- #size-cells: &lt;0&gt;, also as required by generic SPI binding.</div><div class='add'>+</div><div class='add'>+Child nodes as per the generic SPI binding.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	spi@1F000000 {</div><div class='add'>+		compatible = "qca,ar9132-spi", "qca,ar7100-spi";</div><div class='add'>+		reg = &lt;0x1F000000 0x10&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;pll 2&gt;;</div><div class='add'>+		clock-names = "ahb";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt<br/>index 70af78a9185e..fa77f874e321 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> ARM Freescale DSPI controller</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : "fsl,vf610-dspi"</div><div class='add'>+- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi", "fsl,ls2085a-dspi"</div><div class='ctx'> - reg : Offset and length of the register set for the device</div><div class='ctx'> - interrupts : Should contain SPI controller interrupt</div><div class='ctx'> - clocks: from common clock binding: handle to dspi clock.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-orion.txt b/Documentation/devicetree/bindings/spi/spi-orion.txt<br/>index 50c3a3de61c1..98bc69815eb3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-orion.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/spi-orion.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-orion.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-orion.txt</a></div><div class='hunk'>@@ -1,7 +1,13 @@</div><div class='ctx'> Marvell Orion SPI device</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : should be "marvell,orion-spi" or "marvell,armada-370-spi".</div><div class='add'>+- compatible : should be on of the following:</div><div class='add'>+    - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs</div><div class='add'>+    - "marvell,armada-370-spi", for the Armada 370 SoCs</div><div class='add'>+    - "marvell,armada-375-spi", for the Armada 375 SoCs</div><div class='add'>+    - "marvell,armada-380-spi", for the Armada 38x SoCs</div><div class='add'>+    - "marvell,armada-390-spi", for the Armada 39x SoCs</div><div class='add'>+    - "marvell,armada-xp-spi", for the Armada XP SoCs</div><div class='ctx'> - reg : offset and length of the register set for the device</div><div class='ctx'> - cell-index : Which of multiple SPI controllers is this.</div><div class='ctx'> Optional properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-sirf.txt b/Documentation/devicetree/bindings/spi/spi-sirf.txt<br/>index 4c7adb8f777c..ddd78ff68fae 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-sirf.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/spi-sirf.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-sirf.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-sirf.txt</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> * CSR SiRFprimaII Serial Peripheral Interface</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible : Should be "sirf,prima2-spi"</div><div class='add'>+- compatible : Should be "sirf,prima2-spi", "sirf,prima2-usp"</div><div class='add'>+               or "sirf,atlas7-usp"</div><div class='ctx'> - reg : Offset and length of the register set for the device</div><div class='ctx'> - interrupts : Should contain SPI interrupt</div><div class='ctx'> - resets: phandle to the reset controller asserting this device in</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt<br/>new file mode 100644<br/>index 000000000000..c8f50e5cf70b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+Xilinx Zynq UltraScale+ MPSoC GQSPI controller Device Tree Bindings</div><div class='add'>+-------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible		: Should be "xlnx,zynqmp-qspi-1.0".</div><div class='add'>+- reg			: Physical base address and size of GQSPI registers map.</div><div class='add'>+- interrupts		: Property with a value describing the interrupt</div><div class='add'>+			  number.</div><div class='add'>+- interrupt-parent	: Must be core interrupt controller.</div><div class='add'>+- clock-names		: List of input clock names - "ref_clk", "pclk"</div><div class='add'>+			  (See clock bindings for details).</div><div class='add'>+- clocks		: Clock phandles (see clock bindings for details).</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- num-cs		: Number of chip selects used.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	qspi: spi@ff0f0000 {</div><div class='add'>+		compatible = "xlnx,zynqmp-qspi-1.0";</div><div class='add'>+		clock-names = "ref_clk", "pclk";</div><div class='add'>+		clocks = &lt;&amp;misc_clk &amp;misc_clk&gt;;</div><div class='add'>+		interrupts = &lt;0 15 4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		num-cs = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x0 0xff0f0000 0x1000&gt;,&lt;0x0 0xc0000000 0x8000000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt b/Documentation/devicetree/bindings/spi/spi_atmel.txt<br/>index 4f8184d069cb..fb588b3e6a9a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi_atmel.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/spi_atmel.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi_atmel.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi_atmel.txt</a></div><div class='hunk'>@@ -4,11 +4,16 @@ Required properties:</div><div class='ctx'> - compatible : should be "atmel,at91rm9200-spi".</div><div class='ctx'> - reg: Address and length of the register set for the device</div><div class='ctx'> - interrupts: Should contain spi interrupt</div><div class='del'>-- cs-gpios: chipselects</div><div class='add'>+- cs-gpios: chipselects (optional for SPI controller version &gt;= 2 with the</div><div class='add'>+  Chip Select Active After Transfer feature).</div><div class='ctx'> - clock-names: tuple listing input clock names.</div><div class='ctx'> 	Required elements: "spi_clk"</div><div class='ctx'> - clocks: phandles to input clocks.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='add'>+  capable SPI controllers.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> spi1: spi@fffcc000 {</div><div class='hunk'>@@ -20,6 +25,7 @@ spi1: spi@fffcc000 {</div><div class='ctx'> 	clocks = &lt;&amp;spi1_clk&gt;;</div><div class='ctx'> 	clock-names = "spi_clk";</div><div class='ctx'> 	cs-gpios = &lt;&amp;pioB 3 0&gt;;</div><div class='add'>+	atmel,fifo-size = &lt;32&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mmc-slot@0 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt<br/>index 22ed6797216d..4d1673ca8cf8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi_pl022.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/spi/spi_pl022.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/spi/spi_pl022.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/spi/spi_pl022.txt</a></div><div class='hunk'>@@ -4,9 +4,9 @@ Required properties:</div><div class='ctx'> - compatible : "arm,pl022", "arm,primecell"</div><div class='ctx'> - reg : Offset and length of the register set for the device</div><div class='ctx'> - interrupts : Should contain SPI controller interrupt</div><div class='add'>+- num-cs : total number of chipselects</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- num-cs : total number of chipselects</div><div class='ctx'> - cs-gpios : should specify GPIOs used for chipselects.</div><div class='ctx'>   The gpios will be referred to as reg = &lt;index&gt; in the SPI child nodes.</div><div class='ctx'>   If unspecified, a single SPI device without a chip select can be used.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt<br/>new file mode 100644<br/>index 000000000000..d48fc5280d5a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+* Temperature Sensor on hisilicon SoCs</div><div class='add'>+</div><div class='add'>+** Required properties :</div><div class='add'>+</div><div class='add'>+- compatible: "hisilicon,tsensor".</div><div class='add'>+- reg: physical base address of thermal sensor and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupt: The interrupt number to the cpu. Defines the interrupt used</div><div class='add'>+  by /SOCTHERM/tsensor.</div><div class='add'>+- clock-names: Input clock name, should be 'thermal_clk'.</div><div class='add'>+- clocks: phandles for clock specified in "clock-names" property.</div><div class='add'>+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.</div><div class='add'>+</div><div class='add'>+Example :</div><div class='add'>+</div><div class='add'>+	tsensor: tsensor@0,f7030700 {</div><div class='add'>+		compatible = "hisilicon,tsensor";</div><div class='add'>+		reg = &lt;0x0 0xf7030700 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 7 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;sys_ctrl HI6220_TSENSOR_CLK&gt;;</div><div class='add'>+		clock-names = "thermal_clk";</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt b/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt<br/>new file mode 100644<br/>index 000000000000..290ec06fa33a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+Qualcomm QPNP PMIC Temperature Alarm</div><div class='add'>+</div><div class='add'>+QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips</div><div class='add'>+that utilize the Qualcomm SPMI implementation. These peripherals provide an</div><div class='add'>+interrupt signal and status register to identify high PMIC die temperature.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:      Should contain "qcom,spmi-temp-alarm".</div><div class='add'>+- reg:             Specifies the SPMI address and length of the controller's</div><div class='add'>+                   registers.</div><div class='add'>+- interrupts:      PMIC temperature alarm interrupt.</div><div class='add'>+- #thermal-sensor-cells: Should be 0. See thermal.txt for a description.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- io-channels:     Should contain IIO channel specifier for the ADC channel,</div><div class='add'>+                   which report chip die temperature.</div><div class='add'>+- io-channel-names: Should contain "thermal".</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	pm8941_temp: thermal-alarm@2400 {</div><div class='add'>+		compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+		reg = &lt;0x2400 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		io-channels = &lt;&amp;pm8941_vadc VADC_DIE_TEMP&gt;;</div><div class='add'>+		io-channel-names = "thermal";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		pm8941 {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8941_temp&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				passive {</div><div class='add'>+					temperature = &lt;1050000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+				alert {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+				crit {</div><div class='add'>+					temperature = &lt;145000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal.txt b/Documentation/devicetree/bindings/thermal/thermal.txt<br/>index 29fe0bfae38e..8a49362dea6e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/thermal/thermal.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/thermal/thermal.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/thermal/thermal.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/thermal/thermal.txt</a></div><div class='hunk'>@@ -167,6 +167,13 @@ Optional property:</div><div class='ctx'> 			by means of sensor ID. Additional coefficients are</div><div class='ctx'> 			interpreted as constant offset.</div><div class='ctx'> </div><div class='add'>+- sustainable-power:	An estimate of the sustainable power (in mW) that the</div><div class='add'>+  Type: unsigned	thermal zone can dissipate at the desired</div><div class='add'>+  Size: one cell	control temperature.  For reference, the</div><div class='add'>+			sustainable power of a 4'' phone is typically</div><div class='add'>+			2000mW, while on a 10'' tablet is around</div><div class='add'>+			4500mW.</div><div class='add'>+</div><div class='ctx'> Note: The delay properties are bound to the maximum dT/dt (temperature</div><div class='ctx'> derivative over time) in two situations for a thermal zone:</div><div class='ctx'> (i)  - when passive cooling is activated (polling-delay-passive); and</div><div class='hunk'>@@ -546,6 +553,8 @@ thermal-zones {</div><div class='ctx'> 		 */</div><div class='ctx'> 		coefficients =		&lt;1200	-345	890&gt;;</div><div class='ctx'> </div><div class='add'>+		sustainable-power = &lt;2500&gt;;</div><div class='add'>+</div><div class='ctx'> 		trips {</div><div class='ctx'> 			/* Trips are based on resulting linear equation */</div><div class='ctx'> 			cpu_trip: cpu-trip {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt<br/>index 993695c659e1..eeee6cd51e5c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt</a></div><div class='hunk'>@@ -6,6 +6,9 @@ Required properties:</div><div class='ctx'> - interrupts : A list of 3 interrupts; one per timer channel.</div><div class='ctx'> - clocks: phandle to the source clock</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- timer-width: Bit width of the timer, necessary if not 16.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> ttc0: ttc0@f8001000 {</div><div class='hunk'>@@ -14,4 +17,5 @@ ttc0: ttc0@f8001000 {</div><div class='ctx'> 	compatible = "cdns,ttc";</div><div class='ctx'> 	reg = &lt;0xF8001000 0x1000&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;cpu_clk 3&gt;;</div><div class='add'>+	timer-width = &lt;32&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt b/Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt<br/>new file mode 100644<br/>index 000000000000..51b05a0e70d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/nxp,lpc3220-timer.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+* NXP LPC3220 timer</div><div class='add'>+</div><div class='add'>+The NXP LPC3220 timer is used on a wide range of NXP SoCs. This</div><div class='add'>+includes LPC32xx, LPC178x, LPC18xx and LPC43xx parts.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible:</div><div class='add'>+	Should be "nxp,lpc3220-timer".</div><div class='add'>+- reg:</div><div class='add'>+	Address and length of the register set.</div><div class='add'>+- interrupts:</div><div class='add'>+	Reference to the timer interrupt</div><div class='add'>+- clocks:</div><div class='add'>+	Should contain a reference to timer clock.</div><div class='add'>+- clock-names:</div><div class='add'>+	Should contain "timerclk".</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+timer1: timer@40085000 {</div><div class='add'>+	compatible = "nxp,lpc3220-timer";</div><div class='add'>+	reg = &lt;0x40085000 0x1000&gt;;</div><div class='add'>+	interrupts = &lt;13&gt;;</div><div class='add'>+	clocks = &lt;&amp;ccu1 CLK_CPU_TIMER1&gt;;</div><div class='add'>+	clock-names = "timerclk";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt b/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt<br/>new file mode 100644<br/>index 000000000000..e8792447a199<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* Renesas H8/300 16bit timer</div><div class='add'>+</div><div class='add'>+The 16bit timer is a 16bit timer/counter with configurable clock inputs and</div><div class='add'>+programmable compare match.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: must contain "renesas,16bit-timer"</div><div class='add'>+  - reg: base address and length of the registers block for the timer module.</div><div class='add'>+  - interrupts: interrupt-specifier for the timer, IMIA</div><div class='add'>+  - clocks: a list of phandle, one for each entry in clock-names.</div><div class='add'>+  - clock-names: must contain "peripheral_clk" for the functional clock.</div><div class='add'>+  - renesas,channel: timer channel number.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	timer16: timer@ffff68 {</div><div class='add'>+		compatible = "reneas,16bit-timer";</div><div class='add'>+		reg = &lt;0xffff68 8&gt;, &lt;0xffff60 8&gt;;</div><div class='add'>+		interrupts = &lt;24&gt;;</div><div class='add'>+		renesas,channel = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;pclk&gt;;</div><div class='add'>+		clock-names = "peripheral_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt b/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt<br/>new file mode 100644<br/>index 000000000000..9dca3759a0f0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* Renesas H8/300 8bit timer</div><div class='add'>+</div><div class='add'>+The 8bit timer is a 8bit timer/counter with configurable clock inputs and</div><div class='add'>+programmable compare match.</div><div class='add'>+</div><div class='add'>+This implement only supported cascade mode.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: must contain "renesas,8bit-timer"</div><div class='add'>+  - reg: base address and length of the registers block for the timer module.</div><div class='add'>+  - interrupts: interrupt-specifier for the timer, CMIA and TOVI</div><div class='add'>+  - clocks: a list of phandle, one for each entry in clock-names.</div><div class='add'>+  - clock-names: must contain "fck" for the functional clock.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	timer8_0: timer@ffff80 {</div><div class='add'>+		compatible = "renesas,8bit-timer";</div><div class='add'>+		reg = &lt;0xffff80 10&gt;;</div><div class='add'>+		interrupts = &lt;36&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,tpu.txt b/Documentation/devicetree/bindings/timer/renesas,tpu.txt<br/>new file mode 100644<br/>index 000000000000..f8b25897fb31<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/renesas,tpu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/renesas,tpu.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+* Renesas H8/300 Timer Pluse Unit</div><div class='add'>+</div><div class='add'>+The TPU is a 16bit timer/counter with configurable clock inputs and</div><div class='add'>+programmable compare match.</div><div class='add'>+This implementation support only cascade mode.</div><div class='add'>+</div><div class='add'>+Required Properties:</div><div class='add'>+</div><div class='add'>+  - compatible: must contain "renesas,tpu"</div><div class='add'>+  - reg: base address and length of the registers block in 2 channel.</div><div class='add'>+  - clocks: a list of phandle, one for each entry in clock-names.</div><div class='add'>+  - clock-names: must contain "peripheral_clk" for the functional clock.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	tpu: tpu@ffffe0 {</div><div class='add'>+		compatible = "renesas,tpu";</div><div class='add'>+		reg = &lt;0xffffe0 16&gt;, &lt;0xfffff0 12&gt;;</div><div class='add'>+		clocks = &lt;&amp;pclk&gt;;</div><div class='add'>+		clock-names = "peripheral_clk";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt<br/>new file mode 100644<br/>index 000000000000..8ef28e70d6e8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/timer/st,stm32-timer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/timer/st,stm32-timer.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+. STMicroelectronics STM32 timer</div><div class='add'>+</div><div class='add'>+The STM32 MCUs family has several general-purpose 16 and 32 bits timers.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "st,stm32-timer"</div><div class='add'>+- reg : Address and length of the register set</div><div class='add'>+- clocks : Reference on the timer input clock</div><div class='add'>+- interrupts : Reference to the timer interrupt</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- resets: Reference to a reset controller asserting the timer</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+timer5: timer@40000c00 {</div><div class='add'>+	compatible = "st,stm32-timer";</div><div class='add'>+	reg = &lt;0x40000c00 0x400&gt;;</div><div class='add'>+	interrupts = &lt;50&gt;;</div><div class='add'>+	resets = &lt;&amp;rrc 259&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt<br/>index e180d56c75db..5883b73ea1b5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/atmel-usb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/atmel-usb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a></div><div class='hunk'>@@ -5,6 +5,13 @@ OHCI</div><div class='ctx'> Required properties:</div><div class='ctx'>  - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers</div><div class='ctx'>    used in host mode.</div><div class='add'>+ - reg: Address and length of the register set for the device</div><div class='add'>+ - interrupts: Should contain ehci interrupt</div><div class='add'>+ - clocks: Should reference the peripheral, host and system clocks</div><div class='add'>+ - clock-names: Should contains two strings</div><div class='add'>+		"ohci_clk" for the peripheral clock</div><div class='add'>+		"hclk" for the host clock</div><div class='add'>+		"uhpck" for the system clock</div><div class='ctx'>  - num-ports: Number of ports.</div><div class='ctx'>  - atmel,vbus-gpio: If present, specifies a gpio that needs to be</div><div class='ctx'>    activated for the bus to be powered.</div><div class='hunk'>@@ -14,6 +21,8 @@ Required properties:</div><div class='ctx'> usb0: ohci@00500000 {</div><div class='ctx'> 	compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 	reg = &lt;0x00500000 0x100000&gt;;</div><div class='add'>+	clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+	clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 	interrupts = &lt;20 4&gt;;</div><div class='ctx'> 	num-ports = &lt;2&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -23,11 +32,19 @@ EHCI</div><div class='ctx'> Required properties:</div><div class='ctx'>  - compatible: Should be "atmel,at91sam9g45-ehci" for USB controllers</div><div class='ctx'>    used in host mode.</div><div class='add'>+ - reg: Address and length of the register set for the device</div><div class='add'>+ - interrupts: Should contain ehci interrupt</div><div class='add'>+ - clocks: Should reference the peripheral and the UTMI clocks</div><div class='add'>+ - clock-names: Should contains two strings</div><div class='add'>+		"ehci_clk" for the peripheral clock</div><div class='add'>+		"usb_clk" for the UTMI clock</div><div class='ctx'> </div><div class='ctx'> usb1: ehci@00800000 {</div><div class='ctx'> 	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 	reg = &lt;0x00800000 0x100000&gt;;</div><div class='ctx'> 	interrupts = &lt;22 4&gt;;</div><div class='add'>+	clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;;</div><div class='add'>+	clock-names = "usb_clk", "ehci_clk";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> AT91 USB device controller</div><div class='hunk'>@@ -53,6 +70,8 @@ usb1: gadget@fffa4000 {</div><div class='ctx'> 	compatible = "atmel,at91rm9200-udc";</div><div class='ctx'> 	reg = &lt;0xfffa4000 0x4000&gt;;</div><div class='ctx'> 	interrupts = &lt;10 4&gt;;</div><div class='add'>+	clocks = &lt;&amp;udc_clk&gt;, &lt;&amp;udpck&gt;;</div><div class='add'>+	clock-names = "pclk", "hclk";</div><div class='ctx'> 	atmel,vbus-gpio = &lt;&amp;pioC 5 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -60,11 +79,15 @@ Atmel High-Speed USB device controller</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'>  - compatible: Should be one of the following</div><div class='del'>-	       "at91sam9rl-udc"</div><div class='del'>-	       "at91sam9g45-udc"</div><div class='del'>-	       "sama5d3-udc"</div><div class='add'>+	       "atmel,at91sam9rl-udc"</div><div class='add'>+	       "atmel,at91sam9g45-udc"</div><div class='add'>+	       "atmel,sama5d3-udc"</div><div class='ctx'>  - reg: Address and length of the register set for the device</div><div class='ctx'>  - interrupts: Should contain usba interrupt</div><div class='add'>+ - clocks: Should reference the peripheral and host clocks</div><div class='add'>+ - clock-names: Should contains two strings</div><div class='add'>+		"pclk" for the peripheral clock</div><div class='add'>+		"hclk" for the host clock</div><div class='ctx'>  - ep childnode: To specify the number of endpoints and their properties.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='hunk'>@@ -86,6 +109,8 @@ usb2: gadget@fff78000 {</div><div class='ctx'> 	reg = &lt;0x00600000 0x80000</div><div class='ctx'> 	       0xfff78000 0x400&gt;;</div><div class='ctx'> 	interrupts = &lt;27 4 0&gt;;</div><div class='add'>+	clocks = &lt;&amp;utmi&gt;, &lt;&amp;udphs_clk&gt;;</div><div class='add'>+	clock-names = "hclk", "pclk";</div><div class='ctx'> 	atmel,vbus-gpio = &lt;&amp;pioB 19 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	ep0 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt<br/>deleted file mode 100644<br/>index 38a548001e3a..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-* Freescale i.MX ci13xxx usb controllers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "fsl,imx27-usb"</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-- interrupts: Should contain controller interrupt</div><div class='del'>-- fsl,usbphy: phandle of usb phy that connects to the port</div><div class='del'>-</div><div class='del'>-Recommended properies:</div><div class='del'>-- phy_type: the type of the phy connected to the core. Should be one</div><div class='del'>-  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this</div><div class='del'>-  property the PORTSC register won't be touched</div><div class='del'>-- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- fsl,usbmisc: phandler of non-core register device, with one argument</div><div class='del'>-  that indicate usb controller index</div><div class='del'>-- vbus-supply: regulator for vbus</div><div class='del'>-- disable-over-current: disable over current detect</div><div class='del'>-- external-vbus-divider: enables off-chip resistor divider for Vbus</div><div class='del'>-- maximum-speed: limit the maximum connection speed to "full-speed".</div><div class='del'>-- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-usb@02184000 { /* USB OTG */</div><div class='del'>-	compatible = "fsl,imx6q-usb", "fsl,imx27-usb";</div><div class='del'>-	reg = &lt;0x02184000 0x200&gt;;</div><div class='del'>-	interrupts = &lt;0 43 0x04&gt;;</div><div class='del'>-	fsl,usbphy = &lt;&amp;usbphy1&gt;;</div><div class='del'>-	fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='del'>-	disable-over-current;</div><div class='del'>-	external-vbus-divider;</div><div class='del'>-	maximum-speed = "full-speed";</div><div class='del'>-	tpl-support;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt<br/>deleted file mode 100644<br/>index f2899b550939..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-Qualcomm CI13xxx (Chipidea) USB controllers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:   should contain "qcom,ci-hdrc"</div><div class='del'>-- reg:          offset and length of the register set in the memory map</div><div class='del'>-- interrupts:   interrupt-specifier for the controller interrupt.</div><div class='del'>-- usb-phy:      phandle for the PHY device</div><div class='del'>-- dr_mode:      Should be "peripheral"</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	gadget@f9a55000 {</div><div class='del'>-		compatible = "qcom,ci-hdrc";</div><div class='del'>-		reg = &lt;0xf9a55000 0x400&gt;;</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-		interrupts = &lt;0 134 0&gt;;</div><div class='del'>-		usb-phy = &lt;&amp;usbphy0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt<br/>index 27f8b1e5ee46..553e2fae3a76 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt</a></div><div class='hunk'>@@ -1,15 +1,35 @@</div><div class='ctx'> * USB2 ChipIdea USB controller for ci13xxx</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: should be "chipidea,usb2"</div><div class='add'>+- compatible: should be one of:</div><div class='add'>+	"fsl,imx27-usb"</div><div class='add'>+	"lsi,zevio-usb"</div><div class='add'>+	"qcom,ci-hdrc"</div><div class='add'>+	"chipidea,usb2"</div><div class='ctx'> - reg: base address and length of the registers</div><div class='ctx'> - interrupts: interrupt for the USB controller</div><div class='ctx'> </div><div class='add'>+Recommended properies:</div><div class='add'>+- phy_type: the type of the phy connected to the core. Should be one</div><div class='add'>+  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this</div><div class='add'>+  property the PORTSC register won't be touched.</div><div class='add'>+- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"</div><div class='add'>+</div><div class='add'>+Deprecated properties:</div><div class='add'>+- usb-phy:      phandle for the PHY device. Use "phys" instead.</div><div class='add'>+- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.</div><div class='add'>+</div><div class='ctx'> Optional properties:</div><div class='ctx'> - clocks: reference to the USB clock</div><div class='ctx'> - phys: reference to the USB PHY</div><div class='ctx'> - phy-names: should be "usb-phy"</div><div class='ctx'> - vbus-supply: reference to the VBUS regulator</div><div class='add'>+- maximum-speed: limit the maximum connection speed to "full-speed".</div><div class='add'>+- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts</div><div class='add'>+- fsl,usbmisc: (FSL only) phandler of non-core register device, with one</div><div class='add'>+  argument that indicate usb controller index</div><div class='add'>+- disable-over-current: (FSL only) disable over current detect</div><div class='add'>+- external-vbus-divider: (FSL only) enables off-chip resistor divider for Vbus</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt<br/>deleted file mode 100644<br/>index abbcb2aea38c..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-* LSI Zevio USB OTG Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "lsi,zevio-usb"</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-- interrupts: Should contain controller interrupt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- vbus-supply: regulator for vbus</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-		usb0: usb@b0000000 {</div><div class='del'>-			reg = &lt;0xb0000000 0x1000&gt;;</div><div class='del'>-			compatible = "lsi,zevio-usb";</div><div class='del'>-			interrupts = &lt;8&gt;;</div><div class='del'>-			vbus-supply = &lt;&amp;vbus_reg&gt;;</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt<br/>index f9d70252bbb2..01c71b1258f4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/dwc3-st.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/dwc3-st.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a></div><div class='hunk'>@@ -49,8 +49,7 @@ st_dwc3: dwc3@8f94000 {</div><div class='ctx'> 	st,syscfg	= &lt;&amp;syscfg_core&gt;;</div><div class='ctx'> 	resets		= &lt;&amp;powerdown STIH407_USB3_POWERDOWN&gt;,</div><div class='ctx'> 			  &lt;&amp;softreset STIH407_MIPHY2_SOFTRESET&gt;;</div><div class='del'>-	reset-names	= "powerdown",</div><div class='del'>-			  "softreset";</div><div class='add'>+	reset-names	= "powerdown", "softreset";</div><div class='ctx'> 	#address-cells	= &lt;1&gt;;</div><div class='ctx'> 	#size-cells	= &lt;1&gt;;</div><div class='ctx'> 	pinctrl-names	= "default";</div><div class='hunk'>@@ -62,7 +61,7 @@ st_dwc3: dwc3@8f94000 {</div><div class='ctx'> 		reg		= &lt;0x09900000 0x100000&gt;;</div><div class='ctx'> 		interrupts	= &lt;GIC_SPI 155 IRQ_TYPE_NONE&gt;;</div><div class='ctx'> 		dr_mode		= "host";</div><div class='del'>-		phys-names      = "usb2-phy", "usb3-phy";</div><div class='del'>-		phys            = &lt;&amp;usb2_picophy2&gt;, &lt;&amp;phy_port2 MIPHY_TYPE_USB&gt;;</div><div class='add'>+		phy-names	= "usb2-phy", "usb3-phy";</div><div class='add'>+		phys		= &lt;&amp;usb2_picophy2&gt;, &lt;&amp;phy_port2 PHY_TYPE_USB3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt<br/>index 5cc364309edb..0815eac5b185 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/dwc3.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/dwc3.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/dwc3.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/dwc3.txt</a></div><div class='hunk'>@@ -38,6 +38,8 @@ Optional properties:</div><div class='ctx'>  - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal</div><div class='ctx'> 			utmi_l1_suspend_n, false when asserts utmi_sleep_n</div><div class='ctx'>  - snps,hird-threshold: HIRD threshold</div><div class='add'>+ - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for</div><div class='add'>+   UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3.</div><div class='ctx'> </div><div class='ctx'> This is usually a subnode to DWC3 glue to which it is connected.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt<br/>index 2826f2af503a..bd8d9e753029 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/msm-hsusb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/msm-hsusb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/msm-hsusb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/msm-hsusb.txt</a></div><div class='hunk'>@@ -69,6 +69,17 @@ Optional properties:</div><div class='ctx'>                 (no, min, max) where each value represents either a voltage</div><div class='ctx'>                 in microvolts or a value corresponding to voltage corner.</div><div class='ctx'> </div><div class='add'>+- qcom,manual-pullup: If present, vbus is not routed to USB controller/phy</div><div class='add'>+                and controller driver therefore enables pull-up explicitly</div><div class='add'>+                before starting controller using usbcmd run/stop bit.</div><div class='add'>+</div><div class='add'>+- extcon:       phandles to external connector devices. First phandle</div><div class='add'>+                should point to external connector, which provide "USB"</div><div class='add'>+                cable events, the second should point to external connector</div><div class='add'>+                device, which provide "USB-HOST" cable events. If one of</div><div class='add'>+                the external connector devices is not required empty &lt;0&gt;</div><div class='add'>+                phandle should be specified.</div><div class='add'>+</div><div class='ctx'> Example HSUSB OTG controller device node:</div><div class='ctx'> </div><div class='ctx'>     usb@f9a55000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt<br/>index ddbe304beb21..64a4ca6cf96f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/renesas_usbhs.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/renesas_usbhs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/renesas_usbhs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/renesas_usbhs.txt</a></div><div class='hunk'>@@ -4,6 +4,7 @@ Required properties:</div><div class='ctx'>   - compatible: Must contain one of the following:</div><div class='ctx'> 	- "renesas,usbhs-r8a7790"</div><div class='ctx'> 	- "renesas,usbhs-r8a7791"</div><div class='add'>+	- "renesas,usbhs-r8a7794"</div><div class='ctx'>   - reg: Base address and length of the register for the USBHS</div><div class='ctx'>   - interrupts: Interrupt specifier for the USBHS</div><div class='ctx'>   - clocks: A list of phandle + clock specifier pairs</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt b/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt<br/>index 0aee0ad3f035..17327a296110 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/twlxxxx-usb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/twlxxxx-usb.txt</a></div><div class='hunk'>@@ -30,6 +30,9 @@ TWL4030 USB PHY AND COMPARATOR</div><div class='ctx'>  - usb_mode : The mode used by the phy to connect to the controller. "1"</div><div class='ctx'>    specifies "ULPI" mode and "2" specifies "CEA2011_3PIN" mode.</div><div class='ctx'> </div><div class='add'>+If a sibling node is compatible "ti,twl4030-bci", then it will find</div><div class='add'>+this device and query it for USB power status.</div><div class='add'>+</div><div class='ctx'> twl4030-usb {</div><div class='ctx'> 	compatible = "ti,twl4030-usb";</div><div class='ctx'> 	interrupts = &lt; 10 4 &gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt b/Documentation/devicetree/bindings/usb/usb-ehci.txt<br/>index 0b04fdff9d5a..a12d6012a40f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/usb-ehci.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/usb/usb-ehci.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/usb-ehci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/usb/usb-ehci.txt</a></div><div class='hunk'>@@ -13,6 +13,8 @@ Optional properties:</div><div class='ctx'>  - big-endian-desc : boolean, set this for hcds with big-endian descriptors</div><div class='ctx'>  - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc</div><div class='ctx'>  - needs-reset-on-resume : boolean, set this to force EHCI reset after resume</div><div class='add'>+ - has-transaction-translator : boolean, set this if EHCI have a Transaction</div><div class='add'>+				Translator built into the root hub.</div><div class='ctx'>  - clocks : a list of phandle + clock specifier pairs</div><div class='ctx'>  - phys : phandle + phy specifier pair</div><div class='ctx'>  - phy-names : "usb"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt<br/>index b6969e477bf3..d444757c4d9e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/vendor-prefixes.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/vendor-prefixes.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/vendor-prefixes.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/vendor-prefixes.txt</a></div><div class='hunk'>@@ -40,6 +40,7 @@ calxeda	Calxeda</div><div class='ctx'> capella	Capella Microsystems, Inc</div><div class='ctx'> cavium	Cavium, Inc.</div><div class='ctx'> cdns	Cadence Design Systems Inc.</div><div class='add'>+ceva	Ceva, Inc.</div><div class='ctx'> chipidea	Chipidea, Inc</div><div class='ctx'> chipone		ChipOne</div><div class='ctx'> chipspark	ChipSPARK</div><div class='hunk'>@@ -52,6 +53,7 @@ cnxt	Conexant Systems, Inc.</div><div class='ctx'> cortina	Cortina Systems, Inc.</div><div class='ctx'> cosmic	Cosmic Circuits</div><div class='ctx'> crystalfontz	Crystalfontz America, Inc.</div><div class='add'>+cubietech	Cubietech, Ltd.</div><div class='ctx'> dallas	Maxim Integrated Products (formerly Dallas Semiconductor)</div><div class='ctx'> davicom	DAVICOM Semiconductor, Inc.</div><div class='ctx'> delta	Delta Electronics, Inc.</div><div class='hunk'>@@ -61,6 +63,7 @@ digilent	Diglent, Inc.</div><div class='ctx'> dlg	Dialog Semiconductor</div><div class='ctx'> dlink	D-Link Corporation</div><div class='ctx'> dmo	Data Modul AG</div><div class='add'>+ea	Embedded Artists AB</div><div class='ctx'> ebv	EBV Elektronik</div><div class='ctx'> edt	Emerging Display Technologies</div><div class='ctx'> elan	Elan Microelectronic Corp.</div><div class='hunk'>@@ -91,9 +94,11 @@ gumstix	Gumstix, Inc.</div><div class='ctx'> gw	Gateworks Corporation</div><div class='ctx'> hannstar	HannStar Display Corporation</div><div class='ctx'> haoyu	Haoyu Microelectronic Co. Ltd.</div><div class='add'>+hardkernel	Hardkernel Co., Ltd</div><div class='ctx'> himax	Himax Technologies, Inc.</div><div class='ctx'> hisilicon	Hisilicon Limited.</div><div class='ctx'> hit	Hitachi Ltd.</div><div class='add'>+hitex	Hitex Development Tools</div><div class='ctx'> honeywell	Honeywell</div><div class='ctx'> hp	Hewlett Packard</div><div class='ctx'> i2se	I2SE GmbH</div><div class='hunk'>@@ -101,6 +106,7 @@ ibm	International Business Machines (IBM)</div><div class='ctx'> idt	Integrated Device Technologies, Inc.</div><div class='ctx'> iom	Iomega Corporation</div><div class='ctx'> img	Imagination Technologies Ltd.</div><div class='add'>+ingenic	Ingenic Semiconductor</div><div class='ctx'> innolux	Innolux Corporation</div><div class='ctx'> intel	Intel Corporation</div><div class='ctx'> intercontrol	Inter Control Group</div><div class='hunk'>@@ -108,6 +114,7 @@ isee	ISEE 2007 S.L.</div><div class='ctx'> isil	Intersil</div><div class='ctx'> karo	Ka-Ro electronics GmbH</div><div class='ctx'> keymile	Keymile GmbH</div><div class='add'>+kinetic Kinetic Technologies</div><div class='ctx'> lacie	LaCie</div><div class='ctx'> lantiq	Lantiq Semiconductor</div><div class='ctx'> lenovo	Lenovo Group Ltd.</div><div class='hunk'>@@ -118,6 +125,7 @@ lltc	Linear Technology Corporation</div><div class='ctx'> marvell	Marvell Technology Group Ltd.</div><div class='ctx'> maxim	Maxim Integrated Products</div><div class='ctx'> mediatek	MediaTek Inc.</div><div class='add'>+melexis	Melexis N.V.</div><div class='ctx'> merrii	Merrii Technology Co., Ltd.</div><div class='ctx'> micrel	Micrel Inc.</div><div class='ctx'> microchip	Microchip Technology Inc.</div><div class='hunk'>@@ -155,13 +163,16 @@ powervr	PowerVR (deprecated, use img)</div><div class='ctx'> qca	Qualcomm Atheros, Inc.</div><div class='ctx'> qcom	Qualcomm Technologies, Inc</div><div class='ctx'> qemu	QEMU, a generic and open source machine emulator and virtualizer</div><div class='add'>+qi	Qi Hardware</div><div class='ctx'> qnap	QNAP Systems, Inc.</div><div class='ctx'> radxa	Radxa</div><div class='ctx'> raidsonic	RaidSonic Technology GmbH</div><div class='ctx'> ralink	Mediatek/Ralink Technology Corp.</div><div class='ctx'> ramtron	Ramtron International</div><div class='add'>+raspberrypi	Raspberry Pi Foundation</div><div class='ctx'> realtek Realtek Semiconductor Corp.</div><div class='ctx'> renesas	Renesas Electronics Corporation</div><div class='add'>+richtek	Richtek Technology Corporation</div><div class='ctx'> ricoh	Ricoh Co. Ltd.</div><div class='ctx'> rockchip	Fuzhou Rockchip Electronics Co., Ltd</div><div class='ctx'> samsung	Samsung Semiconductor</div><div class='hunk'>@@ -182,6 +193,7 @@ skyworks	Skyworks Solutions, Inc.</div><div class='ctx'> smsc	Standard Microsystems Corporation</div><div class='ctx'> snps	Synopsys, Inc.</div><div class='ctx'> solidrun	SolidRun</div><div class='add'>+solomon        Solomon Systech Limited</div><div class='ctx'> sony	Sony Corporation</div><div class='ctx'> spansion	Spansion Inc.</div><div class='ctx'> sprd	Spreadtrum Communications Inc.</div><div class='hunk'>@@ -190,12 +202,14 @@ ste	ST-Ericsson</div><div class='ctx'> stericsson	ST-Ericsson</div><div class='ctx'> synology	Synology, Inc.</div><div class='ctx'> tbs	TBS Technologies</div><div class='add'>+tcl	Toby Churchill Ltd.</div><div class='ctx'> thine	THine Electronics, Inc.</div><div class='ctx'> ti	Texas Instruments</div><div class='ctx'> tlm	Trusted Logic Mobility</div><div class='ctx'> toradex	Toradex AG</div><div class='ctx'> toshiba	Toshiba Corporation</div><div class='ctx'> toumaz	Toumaz</div><div class='add'>+tplink	TP-LINK Technologies Co., Ltd.</div><div class='ctx'> truly	Truly Semiconductors Limited</div><div class='ctx'> usi	Universal Scientific Industrial Co., Ltd.</div><div class='ctx'> v3	V3 Semiconductor</div><div class='hunk'>@@ -203,6 +217,7 @@ variscite	Variscite Ltd.</div><div class='ctx'> via	VIA Technologies, Inc.</div><div class='ctx'> virtio	Virtual I/O Device Specification, developed by the OASIS consortium</div><div class='ctx'> voipac	Voipac Technologies s.r.o.</div><div class='add'>+wexler	Wexler</div><div class='ctx'> winbond Winbond Electronics corp.</div><div class='ctx'> wlf	Wolfson Microelectronics</div><div class='ctx'> wm	Wondermedia Technologies, Inc.</div><div class='hunk'>@@ -212,3 +227,5 @@ xillybus	Xillybus Ltd.</div><div class='ctx'> xlnx	Xilinx</div><div class='ctx'> zyxel	ZyXEL Communications Corp.</div><div class='ctx'> zarlink	Zarlink Semiconductor</div><div class='add'>+zii	Zodiac Inflight Innovations</div><div class='add'>+zte	ZTE Corp.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/video/exynos-mic.txt b/Documentation/devicetree/bindings/video/exynos-mic.txt<br/>new file mode 100644<br/>index 000000000000..0fba2ee6440a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/exynos-mic.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/video/exynos-mic.txt</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)</div><div class='add'>+</div><div class='add'>+MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi is</div><div class='add'>+not capable to transfer high resoltuion frame data as decon can send. MIC</div><div class='add'>+solves this problem by compressing the frame data by 1/2 before it is</div><div class='add'>+transferred through mipi dsi. The compressed frame data must be uncompressed in</div><div class='add'>+the panel PCB.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: value should be "samsung,exynos5433-mic".</div><div class='add'>+- reg: physical base address and length of the MIC registers set and system</div><div class='add'>+       register of mic.</div><div class='add'>+- clocks: must include clock specifiers corresponding to entries in the</div><div class='add'>+	  clock-names property.</div><div class='add'>+- clock-names: list of clock names sorted in the same order as the clocks</div><div class='add'>+	       property. Must contain "pclk_mic0", "sclk_rgb_vclk_to_mic0".</div><div class='add'>+- samsung,disp-syscon: the reference node for syscon for DISP block.</div><div class='add'>+- ports: contains a port which is connected to decon node and dsi node.</div><div class='add'>+	 address-cells and size-cells must 1 and 0, respectively.</div><div class='add'>+- port: contains an endpoint node which is connected to the endpoint in the</div><div class='add'>+	decon node or dsi node. The reg value must be 0 and 1 respectively.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+SoC specific DT entry:</div><div class='add'>+mic: mic@13930000 {</div><div class='add'>+	compatible = "samsung,exynos5433-mic";</div><div class='add'>+	reg = &lt;0x13930000 0x48&gt;;</div><div class='add'>+	clocks = &lt;&amp;cmu_disp CLK_PCLK_MIC0&gt;,</div><div class='add'>+	       &lt;&amp;cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0&gt;;</div><div class='add'>+	clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";</div><div class='add'>+	samsung,disp-syscon = &lt;&amp;syscon_disp&gt;;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			mic_to_decon: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;decon_to_mic&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			mic_to_dsi: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_to_mic&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt b/Documentation/devicetree/bindings/video/exynos5433-decon.txt<br/>new file mode 100644<br/>index 000000000000..377afbf5122a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/exynos5433-decon.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/video/exynos5433-decon.txt</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+Device-Tree bindings for Samsung Exynos SoC display controller (DECON)</div><div class='add'>+</div><div class='add'>+DECON (Display and Enhancement Controller) is the Display Controller for the</div><div class='add'>+Exynos series of SoCs which transfers the image data from a video memory</div><div class='add'>+buffer to an external LCD interface.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: value should be "samsung,exynos5433-decon";</div><div class='add'>+- reg: physical base address and length of the DECON registers set.</div><div class='add'>+- interrupts: should contain a list of all DECON IP block interrupts in the</div><div class='add'>+	      order: VSYNC, LCD_SYSTEM. The interrupt specifier format</div><div class='add'>+	      depends on the interrupt controller used.</div><div class='add'>+- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"</div><div class='add'>+		   in the same order as they were listed in the interrupts</div><div class='add'>+		   property.</div><div class='add'>+- clocks: must include clock specifiers corresponding to entries in the</div><div class='add'>+	  clock-names property.</div><div class='add'>+- clock-names: list of clock names sorted in the same order as the clocks</div><div class='add'>+	       property. Must contain "aclk_decon", "aclk_smmu_decon0x",</div><div class='add'>+	       "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",</div><div class='add'>+	       "sclk_decon_eclk"</div><div class='add'>+- ports: contains a port which is connected to mic node. address-cells and</div><div class='add'>+	 size-cells must 1 and 0, respectively.</div><div class='add'>+- port: contains an endpoint node which is connected to the endpoint in the mic</div><div class='add'>+	node. The reg value muset be 0.</div><div class='add'>+- i80-if-timings: specify whether the panel which is connected to decon uses</div><div class='add'>+		  i80 lcd interface or mipi video interface. This node contains</div><div class='add'>+		  no timing information as that of fimd does. Because there is</div><div class='add'>+		  no register in decon to specify i80 interface timing value,</div><div class='add'>+		  it is not needed, but make it remain to use same kind of node</div><div class='add'>+		  in fimd and exynos7 decon.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+SoC specific DT entry:</div><div class='add'>+decon: decon@13800000 {</div><div class='add'>+	compatible = "samsung,exynos5433-decon";</div><div class='add'>+	reg = &lt;0x13800000 0x2104&gt;;</div><div class='add'>+	clocks = &lt;&amp;cmu_disp CLK_ACLK_DECON&gt;, &lt;&amp;cmu_disp CLK_ACLK_SMMU_DECON0X&gt;,</div><div class='add'>+		&lt;&amp;cmu_disp CLK_ACLK_XIU_DECON0X&gt;,</div><div class='add'>+		&lt;&amp;cmu_disp CLK_PCLK_SMMU_DECON0X&gt;,</div><div class='add'>+		&lt;&amp;cmu_disp CLK_SCLK_DECON_VCLK&gt;,</div><div class='add'>+		&lt;&amp;cmu_disp CLK_SCLK_DECON_ECLK&gt;;</div><div class='add'>+	clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x",</div><div class='add'>+		"pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk";</div><div class='add'>+	interrupt-names = "vsync", "lcd_sys";</div><div class='add'>+	interrupts = &lt;0 202 0&gt;, &lt;0 203 0&gt;;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			decon_to_mic: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mic_to_decon&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Board specific DT entry:</div><div class='add'>+&amp;decon {</div><div class='add'>+	i80-if-timings {</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt<br/>index 802aa7ef64e5..0be036270661 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/exynos_dsim.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/video/exynos_dsim.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/exynos_dsim.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/video/exynos_dsim.txt</a></div><div class='hunk'>@@ -6,17 +6,19 @@ Required properties:</div><div class='ctx'> 		"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */</div><div class='ctx'> 		"samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */</div><div class='ctx'> 		"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */</div><div class='add'>+		"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */</div><div class='ctx'>   - reg: physical base address and length of the registers set for the device</div><div class='ctx'>   - interrupts: should contain DSI interrupt</div><div class='ctx'>   - clocks: list of clock specifiers, must contain an entry for each required</div><div class='ctx'>     entry in clock-names</div><div class='del'>-  - clock-names: should include "bus_clk"and "pll_clk" entries</div><div class='add'>+  - clock-names: should include "bus_clk"and "sclk_mipi" entries</div><div class='add'>+		 the use of "pll_clk" is deprecated</div><div class='ctx'>   - phys: list of phy specifiers, must contain an entry for each required</div><div class='ctx'>     entry in phy-names</div><div class='ctx'>   - phy-names: should include "dsim" entry</div><div class='ctx'>   - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)</div><div class='ctx'>   - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)</div><div class='del'>-  - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock</div><div class='add'>+  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock</div><div class='ctx'>   - #address-cells, #size-cells: should be set respectively to &lt;1&gt; and &lt;0&gt;</div><div class='ctx'>     according to DSI host bindings (see MIPI DSI bindings [1])</div><div class='ctx'> </div><div class='hunk'>@@ -30,10 +32,19 @@ Video interfaces:</div><div class='ctx'>   Device node can contain video interface port nodes according to [2].</div><div class='ctx'>   The following are properties specific to those nodes:</div><div class='ctx'> </div><div class='del'>-  port node:</div><div class='del'>-    - reg: (required) can be 0 for input RGB/I80 port or 1 for DSI port;</div><div class='add'>+  port node inbound:</div><div class='add'>+    - reg: (required) must be 0.</div><div class='add'>+  port node outbound:</div><div class='add'>+    - reg: (required) must be 1.</div><div class='ctx'> </div><div class='del'>-  endpoint node of DSI port (reg = 1):</div><div class='add'>+  endpoint node connected from mic node (reg = 0):</div><div class='add'>+    - remote-endpoint: specifies the endpoint in mic node. This node is required</div><div class='add'>+		       for Exynos5433 mipi dsi. So mic can access to panel node</div><div class='add'>+		       thoughout this dsi node.</div><div class='add'>+  endpoint node connected to panel node (reg = 1):</div><div class='add'>+    - remote-endpoint: specifies the endpoint in panel node. This node is</div><div class='add'>+		       required in all kinds of exynos mipi dsi to represent</div><div class='add'>+		       the connection between mipi dsi and panel.</div><div class='ctx'>     - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst</div><div class='ctx'>       mode</div><div class='ctx'>     - samsung,esc-clock-frequency: specifies DSI frequency in escape mode</div><div class='hunk'>@@ -48,7 +59,7 @@ Example:</div><div class='ctx'> 		reg = &lt;0x11C80000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;0 79 0&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock 286&gt;, &lt;&amp;clock 143&gt;;</div><div class='del'>-		clock-names = "bus_clk", "pll_clk";</div><div class='add'>+		clock-names = "bus_clk", "sclk_mipi";</div><div class='ctx'> 		phys = &lt;&amp;mipi_phy 1&gt;;</div><div class='ctx'> 		phy-names = "dsim";</div><div class='ctx'> 		vddcore-supply = &lt;&amp;vusb_reg&gt;;</div><div class='hunk'>@@ -72,7 +83,15 @@ Example:</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				decon_to_mic: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mic_to_decon&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='ctx'> 				dsi_ep: endpoint {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/video/ssd1307fb.txt b/Documentation/devicetree/bindings/video/ssd1307fb.txt<br/>index 7a125427ff4b..d1be78db63f5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/ssd1307fb.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/video/ssd1307fb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/video/ssd1307fb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/video/ssd1307fb.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'>   - compatible: Should be "solomon,&lt;chip&gt;fb-&lt;bus&gt;". The only supported bus for</div><div class='del'>-    now is i2c, and the supported chips are ssd1306 and ssd1307.</div><div class='add'>+    now is i2c, and the supported chips are ssd1305, ssd1306 and ssd1307.</div><div class='ctx'>   - reg: Should contain address of the controller on the I2C bus. Most likely</div><div class='ctx'>          0x3c or 0x3d</div><div class='ctx'>   - pwm: Should contain the pwm to use according to the OF device tree PWM</div><div class='hunk'>@@ -15,6 +15,16 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'>   - reset-active-low: Is the reset gpio is active on physical low?</div><div class='add'>+  - solomon,segment-no-remap: Display needs normal (non-inverted) data column</div><div class='add'>+                              to segment mapping</div><div class='add'>+  - solomon,com-seq: Display uses sequential COM pin configuration</div><div class='add'>+  - solomon,com-lrremap: Display uses left-right COM pin remap</div><div class='add'>+  - solomon,com-invdir: Display uses inverted COM pin scan direction</div><div class='add'>+  - solomon,com-offset: Number of the COM pin wired to the first display line</div><div class='add'>+  - solomon,prechargep1: Length of deselect period (phase 1) in clock cycles.</div><div class='add'>+  - solomon,prechargep2: Length of precharge period (phase 2) in clock cycles.</div><div class='add'>+                         This needs to be the higher, the higher the capacitance</div><div class='add'>+                         of the OLED's pixels is</div><div class='ctx'> </div><div class='ctx'> [0]: Documentation/devicetree/bindings/pwm/pwm.txt</div><div class='ctx'> </div><div class='hunk'>@@ -26,3 +36,14 @@ ssd1307: oled@3c {</div><div class='ctx'>         reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='ctx'>         reset-active-low;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+ssd1306: oled@3c {</div><div class='add'>+        compatible = "solomon,ssd1306fb-i2c";</div><div class='add'>+        reg = &lt;0x3c&gt;;</div><div class='add'>+        pwms = &lt;&amp;pwm 4 3000&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='add'>+        reset-active-low;</div><div class='add'>+        solomon,com-lrremap;</div><div class='add'>+        solomon,com-invdir;</div><div class='add'>+        solomon,com-offset = &lt;32&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/digicolor-wdt.txt b/Documentation/devicetree/bindings/watchdog/digicolor-wdt.txt<br/>new file mode 100644<br/>index 000000000000..a882967e17d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/watchdog/digicolor-wdt.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/watchdog/digicolor-wdt.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+Conexant Digicolor SoCs Watchdog timer</div><div class='add'>+</div><div class='add'>+The watchdog functionality in Conexant Digicolor SoCs relies on the so called</div><div class='add'>+"Agent Communication" block. This block includes the eight programmable system</div><div class='add'>+timer counters. The first timer (called "Timer A") is the only one that can be</div><div class='add'>+used as watchdog.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- compatible : Should be "cnxt,cx92755-wdt"</div><div class='add'>+- reg : Specifies base physical address and size of the registers</div><div class='add'>+- clocks : phandle; specifies the clock that drives the timer</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- timeout-sec : Contains the watchdog timeout in seconds</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	watchdog@f0000fc0 {</div><div class='add'>+		compatible = "cnxt,cx92755-wdt";</div><div class='add'>+		reg = &lt;0xf0000fc0 0x8&gt;;</div><div class='add'>+		clocks = &lt;&amp;main_clk&gt;;</div><div class='add'>+		timeout-sec = &lt;15&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/omap-wdt.txt b/Documentation/devicetree/bindings/watchdog/omap-wdt.txt<br/>index c227970671ea..1fa20e453a2d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/watchdog/omap-wdt.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/bindings/watchdog/omap-wdt.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/watchdog/omap-wdt.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/watchdog/omap-wdt.txt</a></div><div class='hunk'>@@ -1,10 +1,11 @@</div><div class='ctx'> TI Watchdog Timer (WDT) Controller for OMAP</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-compatible:</div><div class='del'>-- "ti,omap3-wdt" for OMAP3</div><div class='del'>-- "ti,omap4-wdt" for OMAP4</div><div class='del'>-- ti,hwmods: Name of the hwmod associated to the WDT</div><div class='add'>+- compatible : "ti,omap3-wdt" for OMAP3 or "ti,omap4-wdt" for OMAP4</div><div class='add'>+- ti,hwmods : Name of the hwmod associated to the WDT</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- timeout-sec : default watchdog timeout in seconds</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt b/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt<br/>new file mode 100644<br/>index 000000000000..388c88a01222<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+STMicroelectronics Low Power Controller (LPC) - Watchdog</div><div class='add'>+========================================================</div><div class='add'>+</div><div class='add'>+LPC currently supports Watchdog OR Real Time Clock functionality.</div><div class='add'>+</div><div class='add'>+[See: ../rtc/rtc-st-lpc.txt for RTC options]</div><div class='add'>+</div><div class='add'>+Required properties</div><div class='add'>+</div><div class='add'>+- compatible 	: Must be one of: "st,stih407-lpc" "st,stih416-lpc"</div><div class='add'>+				  "st,stih415-lpc" "st,stid127-lpc"</div><div class='add'>+- reg		: LPC registers base address + size</div><div class='add'>+- interrupts    : LPC interrupt line number and associated flags</div><div class='add'>+- clocks	: Clock used by LPC device (See: ../clock/clock-bindings.txt)</div><div class='add'>+- st,lpc-mode	: The LPC can run either one of two modes ST_LPC_MODE_RTC [0] or</div><div class='add'>+		  ST_LPC_MODE_WDT [1].  One (and only one) mode must be</div><div class='add'>+		  selected.</div><div class='add'>+</div><div class='add'>+Required properties [watchdog mode]</div><div class='add'>+</div><div class='add'>+- st,syscfg	: Phandle to syscfg node used to enable watchdog and configure</div><div class='add'>+		  CPU reset type.</div><div class='add'>+- timeout-sec	: Watchdog timeout in seconds</div><div class='add'>+</div><div class='add'>+Optional properties [watchdog mode]</div><div class='add'>+</div><div class='add'>+- st,warm-reset	: If present reset type will be 'warm' - if not it will be cold</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	lpc@fde05000 {</div><div class='add'>+		compatible	= "st,stih407-lpc";</div><div class='add'>+		reg		= &lt;0xfde05000 0x1000&gt;;</div><div class='add'>+		clocks 		= &lt;&amp;clk_s_d3_flexgen CLK_LPC_0&gt;;</div><div class='add'>+		st,syscfg	= &lt;&amp;syscfg_core&gt;;</div><div class='add'>+		timeout-sec	= &lt;120&gt;;</div><div class='add'>+		st,lpc-mode	= &lt;ST_LPC_MODE_WDT&gt;;</div><div class='add'>+		st,warm-reset;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt<br/>index e49e423268c0..04d34f6a58f3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/booting-without-of.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/devicetree/booting-without-of.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/booting-without-of.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/devicetree/booting-without-of.txt</a></div><div class='hunk'>@@ -856,6 +856,10 @@ address which can extend beyond that limit.</div><div class='ctx'>   name may clash with standard defined ones, you prefix them with your</div><div class='ctx'>   vendor name and a comma.</div><div class='ctx'> </div><div class='add'>+  Additional properties for the root node:</div><div class='add'>+</div><div class='add'>+    - serial-number : a string representing the device's serial number</div><div class='add'>+</div><div class='ctx'>   b) The /cpus node</div><div class='ctx'> </div><div class='ctx'>   This node is the parent of all individual CPU nodes. It doesn't</div><div class='head'>diff --git a/Documentation/dmaengine/provider.txt b/Documentation/dmaengine/provider.txt<br/>index 05d2280190f1..ca67b0f04c6e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/dmaengine/provider.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/dmaengine/provider.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/dmaengine/provider.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/dmaengine/provider.txt</a></div><div class='hunk'>@@ -345,11 +345,12 @@ where to put them)</div><div class='ctx'>       that abstracts it away.</div><div class='ctx'> </div><div class='ctx'>   * DMA_CTRL_ACK</div><div class='del'>-    - Undocumented feature</div><div class='del'>-    - No one really has an idea of what it's about, besides being</div><div class='del'>-      related to reusing the DMA transaction descriptors or having</div><div class='del'>-      additional transactions added to it in the async-tx API</div><div class='del'>-    - Useless in the case of the slave API</div><div class='add'>+    - If set, the transfer can be reused after being completed.</div><div class='add'>+    - There is a guarantee the transfer won't be freed until it is acked</div><div class='add'>+      by async_tx_ack().</div><div class='add'>+    - As a consequence, if a device driver wants to skip the dma_map_sg() and</div><div class='add'>+      dma_unmap_sg() in between 2 transfers, because the DMA'd data wasn't used,</div><div class='add'>+      it can resubmit the transfer right after its completion.</div><div class='ctx'> </div><div class='ctx'> General Design Notes</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/dmaengine/pxa_dma.txt b/Documentation/dmaengine/pxa_dma.txt<br/>new file mode 100644<br/>index 000000000000..413ef9cfaa4d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/dmaengine/pxa_dma.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/dmaengine/pxa_dma.txt</a></div><div class='hunk'>@@ -0,0 +1,153 @@</div><div class='add'>+PXA/MMP - DMA Slave controller</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+Constraints</div><div class='add'>+-----------</div><div class='add'>+  a) Transfers hot queuing</div><div class='add'>+     A driver submitting a transfer and issuing it should be granted the transfer</div><div class='add'>+     is queued even on a running DMA channel.</div><div class='add'>+     This implies that the queuing doesn't wait for the previous transfer end,</div><div class='add'>+     and that the descriptor chaining is not only done in the irq/tasklet code</div><div class='add'>+     triggered by the end of the transfer.</div><div class='add'>+     A transfer which is submitted and issued on a phy doesn't wait for a phy to</div><div class='add'>+     stop and restart, but is submitted on a "running channel". The other</div><div class='add'>+     drivers, especially mmp_pdma waited for the phy to stop before relaunching</div><div class='add'>+     a new transfer.</div><div class='add'>+</div><div class='add'>+  b) All transfers having asked for confirmation should be signaled</div><div class='add'>+     Any issued transfer with DMA_PREP_INTERRUPT should trigger a callback call.</div><div class='add'>+     This implies that even if an irq/tasklet is triggered by end of tx1, but</div><div class='add'>+     at the time of irq/dma tx2 is already finished, tx1-&gt;complete() and</div><div class='add'>+     tx2-&gt;complete() should be called.</div><div class='add'>+</div><div class='add'>+  c) Channel running state</div><div class='add'>+     A driver should be able to query if a channel is running or not. For the</div><div class='add'>+     multimedia case, such as video capture, if a transfer is submitted and then</div><div class='add'>+     a check of the DMA channel reports a "stopped channel", the transfer should</div><div class='add'>+     not be issued until the next "start of frame interrupt", hence the need to</div><div class='add'>+     know if a channel is in running or stopped state.</div><div class='add'>+</div><div class='add'>+  d) Bandwidth guarantee</div><div class='add'>+     The PXA architecture has 4 levels of DMAs priorities : high, normal, low.</div><div class='add'>+     The high prorities get twice as much bandwidth as the normal, which get twice</div><div class='add'>+     as much as the low priorities.</div><div class='add'>+     A driver should be able to request a priority, especially the real-time</div><div class='add'>+     ones such as pxa_camera with (big) throughputs.</div><div class='add'>+</div><div class='add'>+Design</div><div class='add'>+------</div><div class='add'>+  a) Virtual channels</div><div class='add'>+     Same concept as in sa11x0 driver, ie. a driver was assigned a "virtual</div><div class='add'>+     channel" linked to the requestor line, and the physical DMA channel is</div><div class='add'>+     assigned on the fly when the transfer is issued.</div><div class='add'>+</div><div class='add'>+  b) Transfer anatomy for a scatter-gather transfer</div><div class='add'>+     +------------+-----+---------------+----------------+-----------------+</div><div class='add'>+     | desc-sg[0] | ... | desc-sg[last] | status updater | finisher/linker |</div><div class='add'>+     +------------+-----+---------------+----------------+-----------------+</div><div class='add'>+</div><div class='add'>+     This structure is pointed by dma-&gt;sg_cpu.</div><div class='add'>+     The descriptors are used as follows :</div><div class='add'>+      - desc-sg[i]: i-th descriptor, transferring the i-th sg</div><div class='add'>+        element to the video buffer scatter gather</div><div class='add'>+      - status updater</div><div class='add'>+        Transfers a single u32 to a well known dma coherent memory to leave</div><div class='add'>+        a trace that this transfer is done. The "well known" is unique per</div><div class='add'>+        physical channel, meaning that a read of this value will tell which</div><div class='add'>+        is the last finished transfer at that point in time.</div><div class='add'>+      - finisher: has ddadr=DADDR_STOP, dcmd=ENDIRQEN</div><div class='add'>+      - linker: has ddadr= desc-sg[0] of next transfer, dcmd=0</div><div class='add'>+</div><div class='add'>+  c) Transfers hot-chaining</div><div class='add'>+     Suppose the running chain is :</div><div class='add'>+         Buffer 1         Buffer 2</div><div class='add'>+     +---------+----+---+  +----+----+----+---+</div><div class='add'>+     | d0 | .. | dN | l |  | d0 | .. | dN | f |</div><div class='add'>+     +---------+----+-|-+  ^----+----+----+---+</div><div class='add'>+                      |    |</div><div class='add'>+                      +----+</div><div class='add'>+</div><div class='add'>+     After a call to dmaengine_submit(b3), the chain will look like :</div><div class='add'>+          Buffer 1              Buffer 2             Buffer 3</div><div class='add'>+     +---------+----+---+  +----+----+----+---+  +----+----+----+---+</div><div class='add'>+     | d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |</div><div class='add'>+     +---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+</div><div class='add'>+                      |    |                |    |</div><div class='add'>+                      +----+                +----+</div><div class='add'>+                                           new_link</div><div class='add'>+</div><div class='add'>+     If while new_link was created the DMA channel stopped, it is _not_</div><div class='add'>+     restarted. Hot-chaining doesn't break the assumption that</div><div class='add'>+     dma_async_issue_pending() is to be used to ensure the transfer is actually started.</div><div class='add'>+</div><div class='add'>+     One exception to this rule :</div><div class='add'>+       - if Buffer1 and Buffer2 had all their addresses 8 bytes aligned</div><div class='add'>+       - and if Buffer3 has at least one address not 4 bytes aligned</div><div class='add'>+       - then hot-chaining cannot happen, as the channel must be stopped, the</div><div class='add'>+         "align bit" must be set, and the channel restarted As a consequence,</div><div class='add'>+         such a transfer tx_submit() will be queued on the submitted queue, and</div><div class='add'>+         this specific case if the DMA is already running in aligned mode.</div><div class='add'>+</div><div class='add'>+  d) Transfers completion updater</div><div class='add'>+     Each time a transfer is completed on a channel, an interrupt might be</div><div class='add'>+     generated or not, up to the client's request. But in each case, the last</div><div class='add'>+     descriptor of a transfer, the "status updater", will write the latest</div><div class='add'>+     transfer being completed into the physical channel's completion mark.</div><div class='add'>+</div><div class='add'>+     This will speed up residue calculation, for large transfers such as video</div><div class='add'>+     buffers which hold around 6k descriptors or more. This also allows without</div><div class='add'>+     any lock to find out what is the latest completed transfer in a running</div><div class='add'>+     DMA chain.</div><div class='add'>+</div><div class='add'>+  e) Transfers completion, irq and tasklet</div><div class='add'>+     When a transfer flagged as "DMA_PREP_INTERRUPT" is finished, the dma irq</div><div class='add'>+     is raised. Upon this interrupt, a tasklet is scheduled for the physical</div><div class='add'>+     channel.</div><div class='add'>+     The tasklet is responsible for :</div><div class='add'>+      - reading the physical channel last updater mark</div><div class='add'>+      - calling all the transfer callbacks of finished transfers, based on</div><div class='add'>+        that mark, and each transfer flags.</div><div class='add'>+     If a transfer is completed while this handling is done, a dma irq will</div><div class='add'>+     be raised, and the tasklet will be scheduled once again, having a new</div><div class='add'>+     updater mark.</div><div class='add'>+</div><div class='add'>+  f) Residue</div><div class='add'>+     Residue granularity will be descriptor based. The issued but not completed</div><div class='add'>+     transfers will be scanned for all of their descriptors against the</div><div class='add'>+     currently running descriptor.</div><div class='add'>+</div><div class='add'>+  g) Most complicated case of driver's tx queues</div><div class='add'>+     The most tricky situation is when :</div><div class='add'>+       - there are not "acked" transfers (tx0)</div><div class='add'>+       - a driver submitted an aligned tx1, not chained</div><div class='add'>+       - a driver submitted an aligned tx2 =&gt; tx2 is cold chained to tx1</div><div class='add'>+       - a driver issued tx1+tx2 =&gt; channel is running in aligned mode</div><div class='add'>+       - a driver submitted an aligned tx3 =&gt; tx3 is hot-chained</div><div class='add'>+       - a driver submitted an unaligned tx4 =&gt; tx4 is put in submitted queue,</div><div class='add'>+         not chained</div><div class='add'>+       - a driver issued tx4 =&gt; tx4 is put in issued queue, not chained</div><div class='add'>+       - a driver submitted an aligned tx5 =&gt; tx5 is put in submitted queue, not</div><div class='add'>+         chained</div><div class='add'>+       - a driver submitted an aligned tx6 =&gt; tx6 is put in submitted queue,</div><div class='add'>+         cold chained to tx5</div><div class='add'>+</div><div class='add'>+     This translates into (after tx4 is issued) :</div><div class='add'>+       - issued queue</div><div class='add'>+     +-----+ +-----+ +-----+ +-----+</div><div class='add'>+     | tx1 | | tx2 | | tx3 | | tx4 |</div><div class='add'>+     +---|-+ ^---|-+ ^-----+ +-----+</div><div class='add'>+         |   |   |   |</div><div class='add'>+         +---+   +---+</div><div class='add'>+       - submitted queue</div><div class='add'>+     +-----+ +-----+</div><div class='add'>+     | tx5 | | tx6 |</div><div class='add'>+     +---|-+ ^-----+</div><div class='add'>+         |   |</div><div class='add'>+         +---+</div><div class='add'>+       - completed queue : empty</div><div class='add'>+       - allocated queue : tx0</div><div class='add'>+</div><div class='add'>+     It should be noted that after tx3 is completed, the channel is stopped, and</div><div class='add'>+     restarted in "unaligned mode" to handle tx4.</div><div class='add'>+</div><div class='add'>+Author: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;</div><div class='head'>diff --git a/Documentation/edac.txt b/Documentation/edac.txt<br/>index 73fff13e848f..0cf27a3544a5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/edac.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/edac.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/edac.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/edac.txt</a></div><div class='hunk'>@@ -1,53 +1,34 @@</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> EDAC - Error Detection And Correction</div><div class='del'>-</div><div class='del'>-Written by Doug Thompson &lt;dougthompson@xmission.com&gt;</div><div class='del'>-7 Dec 2005</div><div class='del'>-17 Jul 2007	Updated</div><div class='del'>-</div><div class='del'>-(c) Mauro Carvalho Chehab</div><div class='del'>-05 Aug 2009	Nehalem interface</div><div class='del'>-</div><div class='del'>-EDAC is maintained and written by:</div><div class='del'>-</div><div class='del'>-	Doug Thompson, Dave Jiang, Dave Peterson et al,</div><div class='del'>-	original author: Thayne Harbaugh,</div><div class='del'>-</div><div class='del'>-Contact:</div><div class='del'>-	website:	bluesmoke.sourceforge.net</div><div class='del'>-	mailing list:	bluesmoke-devel@lists.sourceforge.net</div><div class='add'>+=====================================</div><div class='ctx'> </div><div class='ctx'> "bluesmoke" was the name for this device driver when it was "out-of-tree"</div><div class='ctx'> and maintained at sourceforge.net.  When it was pushed into 2.6.16 for the</div><div class='ctx'> first time, it was renamed to 'EDAC'.</div><div class='ctx'> </div><div class='del'>-The bluesmoke project at sourceforge.net is now utilized as a 'staging area'</div><div class='del'>-for EDAC development, before it is sent upstream to kernel.org</div><div class='del'>-</div><div class='del'>-At the bluesmoke/EDAC project site is a series of quilt patches against</div><div class='del'>-recent kernels, stored in a SVN repository. For easier downloading, there</div><div class='del'>-is also a tarball snapshot available.</div><div class='add'>+PURPOSE</div><div class='add'>+-------</div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='del'>-EDAC PURPOSE</div><div class='del'>-</div><div class='del'>-The 'edac' kernel module goal is to detect and report errors that occur</div><div class='del'>-within the computer system running under linux.</div><div class='add'>+The 'edac' kernel module's goal is to detect and report hardware errors</div><div class='add'>+that occur within the computer system running under linux.</div><div class='ctx'> </div><div class='ctx'> MEMORY</div><div class='add'>+------</div><div class='ctx'> </div><div class='del'>-In the initial release, memory Correctable Errors (CE) and Uncorrectable</div><div class='del'>-Errors (UE) are the primary errors being harvested. These types of errors</div><div class='del'>-are harvested by the 'edac_mc' class of device.</div><div class='add'>+Memory Correctable Errors (CE) and Uncorrectable Errors (UE) are the</div><div class='add'>+primary errors being harvested. These types of errors are harvested by</div><div class='add'>+the 'edac_mc' device.</div><div class='ctx'> </div><div class='ctx'> Detecting CE events, then harvesting those events and reporting them,</div><div class='del'>-CAN be a predictor of future UE events.  With CE events, the system can</div><div class='del'>-continue to operate, but with less safety. Preventive maintenance and</div><div class='del'>-proactive part replacement of memory DIMMs exhibiting CEs can reduce</div><div class='del'>-the likelihood of the dreaded UE events and system 'panics'.</div><div class='add'>+*can* but must not necessarily be a predictor of future UE events. With</div><div class='add'>+CE events only, the system can and will continue to operate as no data</div><div class='add'>+has been damaged yet.</div><div class='add'>+</div><div class='add'>+However, preventive maintenance and proactive part replacement of memory</div><div class='add'>+DIMMs exhibiting CEs can reduce the likelihood of the dreaded UE events</div><div class='add'>+and system panics.</div><div class='ctx'> </div><div class='del'>-NON-MEMORY</div><div class='add'>+OTHER HARDWARE ELEMENTS</div><div class='add'>+-----------------------</div><div class='ctx'> </div><div class='ctx'> A new feature for EDAC, the edac_device class of device, was added in</div><div class='ctx'> the 2.6.23 version of the kernel.</div><div class='hunk'>@@ -56,70 +37,57 @@ This new device type allows for non-memory type of ECC hardware detectors</div><div class='ctx'> to have their states harvested and presented to userspace via the sysfs</div><div class='ctx'> interface.</div><div class='ctx'> </div><div class='del'>-Some architectures have ECC detectors for L1, L2 and L3 caches, along with DMA</div><div class='del'>-engines, fabric switches, main data path switches, interconnections,</div><div class='del'>-and various other hardware data paths. If the hardware reports it, then</div><div class='del'>-a edac_device device probably can be constructed to harvest and present</div><div class='del'>-that to userspace.</div><div class='add'>+Some architectures have ECC detectors for L1, L2 and L3 caches,</div><div class='add'>+along with DMA engines, fabric switches, main data path switches,</div><div class='add'>+interconnections, and various other hardware data paths. If the hardware</div><div class='add'>+reports it, then a edac_device device probably can be constructed to</div><div class='add'>+harvest and present that to userspace.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> PCI BUS SCANNING</div><div class='add'>+----------------</div><div class='ctx'> </div><div class='del'>-In addition, PCI Bus Parity and SERR Errors are scanned for on PCI devices</div><div class='del'>-in order to determine if errors are occurring on data transfers.</div><div class='add'>+In addition, PCI devices are scanned for PCI Bus Parity and SERR Errors</div><div class='add'>+in order to determine if errors are occurring during data transfers.</div><div class='ctx'> </div><div class='ctx'> The presence of PCI Parity errors must be examined with a grain of salt.</div><div class='del'>-There are several add-in adapters that do NOT follow the PCI specification</div><div class='add'>+There are several add-in adapters that do *not* follow the PCI specification</div><div class='ctx'> with regards to Parity generation and reporting. The specification says</div><div class='ctx'> the vendor should tie the parity status bits to 0 if they do not intend</div><div class='ctx'> to generate parity.  Some vendors do not do this, and thus the parity bit</div><div class='ctx'> can "float" giving false positives.</div><div class='ctx'> </div><div class='del'>-In the kernel there is a PCI device attribute located in sysfs that is</div><div class='del'>-checked by the EDAC PCI scanning code. If that attribute is set,</div><div class='del'>-PCI parity/error scanning is skipped for that device. The attribute</div><div class='del'>-is:</div><div class='add'>+There is a PCI device attribute located in sysfs that is checked by</div><div class='add'>+the EDAC PCI scanning code. If that attribute is set, PCI parity/error</div><div class='add'>+scanning is skipped for that device. The attribute is:</div><div class='ctx'> </div><div class='ctx'> 	broken_parity_status</div><div class='ctx'> </div><div class='del'>-as is located in /sys/devices/pci&lt;XXX&gt;/0000:XX:YY.Z directories for</div><div class='add'>+and is located in /sys/devices/pci&lt;XXX&gt;/0000:XX:YY.Z directories for</div><div class='ctx'> PCI devices.</div><div class='ctx'> </div><div class='del'>-FUTURE HARDWARE SCANNING</div><div class='ctx'> </div><div class='del'>-EDAC will have future error detectors that will be integrated with</div><div class='del'>-EDAC or added to it, in the following list:</div><div class='del'>-</div><div class='del'>-	MCE	Machine Check Exception</div><div class='del'>-	MCA	Machine Check Architecture</div><div class='del'>-	NMI	NMI notification of ECC errors</div><div class='del'>-	MSRs 	Machine Specific Register error cases</div><div class='del'>-	and other mechanisms.</div><div class='del'>-</div><div class='del'>-These errors are usually bus errors, ECC errors, thermal throttling</div><div class='del'>-and the like.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-============================================================================</div><div class='del'>-EDAC VERSIONING</div><div class='add'>+VERSIONING</div><div class='add'>+----------</div><div class='ctx'> </div><div class='ctx'> EDAC is composed of a "core" module (edac_core.ko) and several Memory</div><div class='del'>-Controller (MC) driver modules. On a given system, the CORE</div><div class='del'>-is loaded and one MC driver will be loaded. Both the CORE and</div><div class='del'>-the MC driver (or edac_device driver) have individual versions that reflect</div><div class='del'>-current release level of their respective modules.</div><div class='add'>+Controller (MC) driver modules. On a given system, the CORE is loaded</div><div class='add'>+and one MC driver will be loaded. Both the CORE and the MC driver (or</div><div class='add'>+edac_device driver) have individual versions that reflect current</div><div class='add'>+release level of their respective modules.</div><div class='ctx'> </div><div class='del'>-Thus, to "report" on what version a system is running, one must report both</div><div class='del'>-the CORE's and the MC driver's versions.</div><div class='add'>+Thus, to "report" on what version a system is running, one must report</div><div class='add'>+both the CORE's and the MC driver's versions.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> LOADING</div><div class='add'>+-------</div><div class='ctx'> </div><div class='del'>-If 'edac' was statically linked with the kernel then no loading is</div><div class='del'>-necessary.  If 'edac' was built as modules then simply modprobe the</div><div class='del'>-'edac' pieces that you need.  You should be able to modprobe</div><div class='del'>-hardware-specific modules and have the dependencies load the necessary core</div><div class='del'>-modules.</div><div class='add'>+If 'edac' was statically linked with the kernel then no loading</div><div class='add'>+is necessary. If 'edac' was built as modules then simply modprobe</div><div class='add'>+the 'edac' pieces that you need. You should be able to modprobe</div><div class='add'>+hardware-specific modules and have the dependencies load the necessary</div><div class='add'>+core modules.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -129,35 +97,33 @@ loads both the amd76x_edac.ko memory controller module and the edac_mc.ko</div><div class='ctx'> core module.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='del'>-EDAC sysfs INTERFACE</div><div class='del'>-</div><div class='del'>-EDAC presents a 'sysfs' interface for control, reporting and attribute</div><div class='del'>-reporting purposes.</div><div class='add'>+SYSFS INTERFACE</div><div class='add'>+---------------</div><div class='ctx'> </div><div class='del'>-EDAC lives in the /sys/devices/system/edac directory.</div><div class='add'>+EDAC presents a 'sysfs' interface for control and reporting purposes. It</div><div class='add'>+lives in the /sys/devices/system/edac directory.</div><div class='ctx'> </div><div class='del'>-Within this directory there currently reside 2 'edac' components:</div><div class='add'>+Within this directory there currently reside 2 components:</div><div class='ctx'> </div><div class='ctx'> 	mc	memory controller(s) system</div><div class='ctx'> 	pci	PCI control and status system</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='add'>+</div><div class='ctx'> Memory Controller (mc) Model</div><div class='add'>+----------------------------</div><div class='ctx'> </div><div class='del'>-First a background on the memory controller's model abstracted in EDAC.</div><div class='del'>-Each 'mc' device controls a set of DIMM memory modules. These modules are</div><div class='del'>-laid out in a Chip-Select Row (csrowX) and Channel table (chX). There can</div><div class='del'>-be multiple csrows and multiple channels.</div><div class='add'>+Each 'mc' device controls a set of DIMM memory modules. These modules</div><div class='add'>+are laid out in a Chip-Select Row (csrowX) and Channel table (chX).</div><div class='add'>+There can be multiple csrows and multiple channels.</div><div class='ctx'> </div><div class='del'>-Memory controllers allow for several csrows, with 8 csrows being a typical value.</div><div class='del'>-Yet, the actual number of csrows depends on the electrical "loading"</div><div class='del'>-of a given motherboard, memory controller and DIMM characteristics.</div><div class='add'>+Memory controllers allow for several csrows, with 8 csrows being a</div><div class='add'>+typical value. Yet, the actual number of csrows depends on the layout of</div><div class='add'>+a given motherboard, memory controller and DIMM characteristics.</div><div class='ctx'> </div><div class='del'>-Dual channels allows for 128 bit data transfers to the CPU from memory.</div><div class='del'>-Some newer chipsets allow for more than 2 channels, like Fully Buffered DIMMs</div><div class='del'>-(FB-DIMMs). The following example will assume 2 channels:</div><div class='add'>+Dual channels allows for 128 bit data transfers to/from the CPU from/to</div><div class='add'>+memory. Some newer chipsets allow for more than 2 channels, like Fully</div><div class='add'>+Buffered DIMMs (FB-DIMMs). The following example will assume 2 channels:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 		Channel 0	Channel 1</div><div class='hunk'>@@ -179,12 +145,12 @@ for memory DIMMs:</div><div class='ctx'> 	DIMM_A1</div><div class='ctx'> 	DIMM_B1</div><div class='ctx'> </div><div class='del'>-Labels for these slots are usually silk screened on the motherboard. Slots</div><div class='del'>-labeled 'A' are channel 0 in this example. Slots labeled 'B'</div><div class='del'>-are channel 1. Notice that there are two csrows possible on a</div><div class='del'>-physical DIMM. These csrows are allocated their csrow assignment</div><div class='del'>-based on the slot into which the memory DIMM is placed. Thus, when 1 DIMM</div><div class='del'>-is placed in each Channel, the csrows cross both DIMMs.</div><div class='add'>+Labels for these slots are usually silk-screened on the motherboard.</div><div class='add'>+Slots labeled 'A' are channel 0 in this example. Slots labeled 'B' are</div><div class='add'>+channel 1. Notice that there are two csrows possible on a physical DIMM.</div><div class='add'>+These csrows are allocated their csrow assignment based on the slot into</div><div class='add'>+which the memory DIMM is placed. Thus, when 1 DIMM is placed in each</div><div class='add'>+Channel, the csrows cross both DIMMs.</div><div class='ctx'> </div><div class='ctx'> Memory DIMMs come single or dual "ranked". A rank is a populated csrow.</div><div class='ctx'> Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above</div><div class='hunk'>@@ -193,8 +159,8 @@ when 2 dual ranked DIMMs are similarly placed, then both csrow0 and</div><div class='ctx'> csrow1 will be populated. The pattern repeats itself for csrow2 and</div><div class='ctx'> csrow3.</div><div class='ctx'> </div><div class='del'>-The representation of the above is reflected in the directory tree</div><div class='del'>-in EDAC's sysfs interface. Starting in directory</div><div class='add'>+The representation of the above is reflected in the directory</div><div class='add'>+tree in EDAC's sysfs interface. Starting in directory</div><div class='ctx'> /sys/devices/system/edac/mc each memory controller will be represented</div><div class='ctx'> by its own 'mcX' directory, where 'X' is the index of the MC.</div><div class='ctx'> </div><div class='hunk'>@@ -217,34 +183,35 @@ Under each 'mcX' directory each 'csrowX' is again represented by a</div><div class='ctx'> 		|-&gt;csrow3</div><div class='ctx'> 		....</div><div class='ctx'> </div><div class='del'>-Notice that there is no csrow1, which indicates that csrow0 is</div><div class='del'>-composed of a single ranked DIMMs. This should also apply in both</div><div class='del'>-Channels, in order to have dual-channel mode be operational. Since</div><div class='del'>-both csrow2 and csrow3 are populated, this indicates a dual ranked</div><div class='del'>-set of DIMMs for channels 0 and 1.</div><div class='add'>+Notice that there is no csrow1, which indicates that csrow0 is composed</div><div class='add'>+of a single ranked DIMMs. This should also apply in both Channels, in</div><div class='add'>+order to have dual-channel mode be operational. Since both csrow2 and</div><div class='add'>+csrow3 are populated, this indicates a dual ranked set of DIMMs for</div><div class='add'>+channels 0 and 1.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Within each of the 'mcX' and 'csrowX' directories are several</div><div class='del'>-EDAC control and attribute files.</div><div class='add'>+Within each of the 'mcX' and 'csrowX' directories are several EDAC</div><div class='add'>+control and attribute files.</div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='del'>-'mcX' DIRECTORIES</div><div class='ctx'> </div><div class='add'>+'mcX' directories</div><div class='add'>+-----------------</div><div class='ctx'> </div><div class='ctx'> In 'mcX' directories are EDAC control and attribute files for</div><div class='ctx'> this 'X' instance of the memory controllers.</div><div class='ctx'> </div><div class='ctx'> For a description of the sysfs API, please see:</div><div class='del'>-	Documentation/ABI/testing/sysfs/devices-edac</div><div class='add'>+	Documentation/ABI/testing/sysfs-devices-edac</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='del'>-'csrowX' DIRECTORIES</div><div class='add'>+'csrowX' directories</div><div class='add'>+--------------------</div><div class='ctx'> </div><div class='del'>-When CONFIG_EDAC_LEGACY_SYSFS is enabled, the sysfs will contain the</div><div class='del'>-csrowX directories. As this API doesn't work properly for Rambus, FB-DIMMs</div><div class='del'>-and modern Intel Memory Controllers, this is being deprecated in favor</div><div class='del'>-of dimmX directories.</div><div class='add'>+When CONFIG_EDAC_LEGACY_SYSFS is enabled, sysfs will contain the csrowX</div><div class='add'>+directories. As this API doesn't work properly for Rambus, FB-DIMMs and</div><div class='add'>+modern Intel Memory Controllers, this is being deprecated in favor of</div><div class='add'>+dimmX directories.</div><div class='ctx'> </div><div class='ctx'> In the 'csrowX' directories are EDAC control and attribute files for</div><div class='ctx'> this 'X' instance of csrow:</div><div class='hunk'>@@ -265,18 +232,18 @@ Total Correctable Errors count attribute file:</div><div class='ctx'> 	'ce_count'</div><div class='ctx'> </div><div class='ctx'> 	This attribute file displays the total count of correctable</div><div class='del'>-	errors that have occurred on this csrow. This</div><div class='del'>-	count is very important to examine. CEs provide early</div><div class='del'>-	indications that a DIMM is beginning to fail. This count</div><div class='del'>-	field should be monitored for non-zero values and report</div><div class='del'>-	such information to the system administrator.</div><div class='add'>+	errors that have occurred on this csrow. This count is very</div><div class='add'>+	important to examine. CEs provide early indications that a</div><div class='add'>+	DIMM is beginning to fail. This count field should be</div><div class='add'>+	monitored for non-zero values and report such information</div><div class='add'>+	to the system administrator.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Total memory managed by this csrow attribute file:</div><div class='ctx'> </div><div class='ctx'> 	'size_mb'</div><div class='ctx'> </div><div class='del'>-	This attribute file displays, in count of megabytes, of memory</div><div class='add'>+	This attribute file displays, in count of megabytes, the memory</div><div class='ctx'> 	that this csrow contains.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -377,11 +344,13 @@ Channel 1 DIMM Label control file:</div><div class='ctx'> 	motherboard specific and determination of this information</div><div class='ctx'> 	must occur in userland at this time.</div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> SYSTEM LOGGING</div><div class='add'>+--------------</div><div class='ctx'> </div><div class='del'>-If logging for UEs and CEs are enabled then system logs will have</div><div class='del'>-error notices indicating errors that have been detected:</div><div class='add'>+If logging for UEs and CEs is enabled, then system logs will contain</div><div class='add'>+information indicating that errors have been detected:</div><div class='ctx'> </div><div class='ctx'> EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0,</div><div class='ctx'> channel 1 "DIMM_B1": amd76x_edac</div><div class='hunk'>@@ -404,24 +373,23 @@ The structure of the message is:</div><div class='ctx'> 	and then an optional, driver-specific message that may</div><div class='ctx'> 		have additional information.</div><div class='ctx'> </div><div class='del'>-Both UEs and CEs with no info will lack all but memory controller,</div><div class='del'>-error type, a notice of "no info" and then an optional,</div><div class='del'>-driver-specific error message.</div><div class='add'>+Both UEs and CEs with no info will lack all but memory controller, error</div><div class='add'>+type, a notice of "no info" and then an optional, driver-specific error</div><div class='add'>+message.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='ctx'> PCI Bus Parity Detection</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-On Header Type 00 devices the primary status is looked at</div><div class='del'>-for any parity error regardless of whether Parity is enabled on the</div><div class='del'>-device.  (The spec indicates parity is generated in some cases).</div><div class='del'>-On Header Type 01 bridges, the secondary status register is also</div><div class='del'>-looked at to see if parity occurred on the bus on the other side of</div><div class='del'>-the bridge.</div><div class='add'>+On Header Type 00 devices, the primary status is looked at for any</div><div class='add'>+parity error regardless of whether parity is enabled on the device or</div><div class='add'>+not. (The spec indicates parity is generated in some cases). On Header</div><div class='add'>+Type 01 bridges, the secondary status register is also looked at to see</div><div class='add'>+if parity occurred on the bus on the other side of the bridge.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> SYSFS CONFIGURATION</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> Under /sys/devices/system/edac/pci are control and attribute files as follows:</div><div class='ctx'> </div><div class='hunk'>@@ -450,8 +418,9 @@ Parity Count:</div><div class='ctx'> 	have been detected.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-============================================================================</div><div class='add'>+</div><div class='ctx'> MODULE PARAMETERS</div><div class='add'>+-----------------</div><div class='ctx'> </div><div class='ctx'> Panic on UE control file:</div><div class='ctx'> </div><div class='hunk'>@@ -516,7 +485,7 @@ Panic on PCI PARITY Error:</div><div class='ctx'> 	'panic_on_pci_parity'</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	This control files enables or disables panicking when a parity</div><div class='add'>+	This control file enables or disables panicking when a parity</div><div class='ctx'> 	error has been detected.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -530,10 +499,8 @@ Panic on PCI PARITY Error:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-=======================================================================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-EDAC_DEVICE type of device</div><div class='add'>+EDAC device type</div><div class='add'>+----------------</div><div class='ctx'> </div><div class='ctx'> In the header file, edac_core.h, there is a series of edac_device structures</div><div class='ctx'> and APIs for the EDAC_DEVICE.</div><div class='hunk'>@@ -573,6 +540,7 @@ The test_device_edac device adds at least one of its own custom control:</div><div class='ctx'> The symlink points to the 'struct dev' that is registered for this edac_device.</div><div class='ctx'> </div><div class='ctx'> INSTANCES</div><div class='add'>+---------</div><div class='ctx'> </div><div class='ctx'> One or more instance directories are present. For the 'test_device_edac' case:</div><div class='ctx'> </div><div class='hunk'>@@ -586,6 +554,7 @@ counter in deeper subdirectories.</div><div class='ctx'> 	ue_count	total of UE events of subdirectories</div><div class='ctx'> </div><div class='ctx'> BLOCKS</div><div class='add'>+------</div><div class='ctx'> </div><div class='ctx'> At the lowest directory level is the 'block' directory. There can be 0, 1</div><div class='ctx'> or more blocks specified in each instance.</div><div class='hunk'>@@ -617,14 +586,15 @@ The 'test_device_edac' device adds 4 attributes and 1 control:</div><div class='ctx'> 				reset all the above counters.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Use of the 'test_device_edac' driver should any others to create their own</div><div class='add'>+Use of the 'test_device_edac' driver should enable any others to create their own</div><div class='ctx'> unique drivers for their hardware systems.</div><div class='ctx'> </div><div class='ctx'> The 'test_device_edac' sample driver is located at the</div><div class='ctx'> bluesmoke.sourceforge.net project site for EDAC.</div><div class='ctx'> </div><div class='del'>-=======================================================================</div><div class='add'>+</div><div class='ctx'> NEHALEM USAGE OF EDAC APIs</div><div class='add'>+--------------------------</div><div class='ctx'> </div><div class='ctx'> This chapter documents some EXPERIMENTAL mappings for EDAC API to handle</div><div class='ctx'> Nehalem EDAC driver. They will likely be changed on future versions</div><div class='hunk'>@@ -633,7 +603,7 @@ of the driver.</div><div class='ctx'> Due to the way Nehalem exports Memory Controller data, some adjustments</div><div class='ctx'> were done at i7core_edac driver. This chapter will cover those differences</div><div class='ctx'> </div><div class='del'>-1) On Nehalem, there are one Memory Controller per Quick Patch Interconnect</div><div class='add'>+1) On Nehalem, there is one Memory Controller per Quick Patch Interconnect</div><div class='ctx'>    (QPI). At the driver, the term "socket" means one QPI. This is</div><div class='ctx'>    associated with a physical CPU socket.</div><div class='ctx'> </div><div class='hunk'>@@ -642,7 +612,7 @@ were done at i7core_edac driver. This chapter will cover those differences</div><div class='ctx'>    Each channel can have up to 3 DIMMs.</div><div class='ctx'> </div><div class='ctx'>    The minimum known unity is DIMMs. There are no information about csrows.</div><div class='del'>-   As EDAC API maps the minimum unity is csrows, the driver sequencially</div><div class='add'>+   As EDAC API maps the minimum unity is csrows, the driver sequentially</div><div class='ctx'>    maps channel/dimm into different csrows.</div><div class='ctx'> </div><div class='ctx'>    For example, supposing the following layout:</div><div class='hunk'>@@ -664,7 +634,7 @@ exports one</div><div class='ctx'> </div><div class='ctx'>    Each QPI is exported as a different memory controller.</div><div class='ctx'> </div><div class='del'>-2) Nehalem MC has the hability to generate errors. The driver implements this</div><div class='add'>+2) Nehalem MC has the ability to generate errors. The driver implements this</div><div class='ctx'>    functionality via some error injection nodes:</div><div class='ctx'> </div><div class='ctx'>    For injecting a memory error, there are some sysfs nodes, under</div><div class='hunk'>@@ -771,5 +741,22 @@ exports one</div><div class='ctx'> </div><div class='ctx'>    The standard error counters are generated when an mcelog error is received</div><div class='ctx'>    by the driver. Since, with udimm, this is counted by software, it is</div><div class='del'>-   possible that some errors could be lost. With rdimm's, they displays the</div><div class='add'>+   possible that some errors could be lost. With rdimm's, they display the</div><div class='ctx'>    contents of the registers</div><div class='add'>+</div><div class='add'>+CREDITS:</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Written by Doug Thompson &lt;dougthompson@xmission.com&gt;</div><div class='add'>+7 Dec 2005</div><div class='add'>+17 Jul 2007	Updated</div><div class='add'>+</div><div class='add'>+(c) Mauro Carvalho Chehab</div><div class='add'>+05 Aug 2009	Nehalem interface</div><div class='add'>+</div><div class='add'>+EDAC authors/maintainers:</div><div class='add'>+</div><div class='add'>+	Doug Thompson, Dave Jiang, Dave Peterson et al,</div><div class='add'>+	Mauro Carvalho Chehab</div><div class='add'>+	Borislav Petkov</div><div class='add'>+	original author: Thayne Harbaugh</div><div class='head'>diff --git a/Documentation/features/arch-support.txt b/Documentation/features/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..d22a1095e661<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+</div><div class='add'>+For generic kernel features that need architecture support, the</div><div class='add'>+arch-support.txt file in each feature directory shows the arch</div><div class='add'>+support matrix, for all upstream Linux architectures.</div><div class='add'>+</div><div class='add'>+The meaning of entries in the tables is:</div><div class='add'>+</div><div class='add'>+    | ok |  # feature supported by the architecture</div><div class='add'>+    |TODO|  # feature not yet supported by the architecture</div><div class='add'>+    | .. |  # feature cannot be supported by the hardware</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/features/core/BPF-JIT/arch-support.txt b/Documentation/features/core/BPF-JIT/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..c1b4f917238f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/core/BPF-JIT/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/core/BPF-JIT/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          BPF-JIT</div><div class='add'>+#         Kconfig:       HAVE_BPF_JIT</div><div class='add'>+#         description:   arch supports BPF JIT optimizations</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/core/generic-idle-thread/arch-support.txt b/Documentation/features/core/generic-idle-thread/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..6d930fcbe519<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/core/generic-idle-thread/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/core/generic-idle-thread/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          generic-idle-thread</div><div class='add'>+#         Kconfig:       GENERIC_SMP_IDLE_THREAD</div><div class='add'>+#         description:   arch makes use of the generic SMP idle thread facility</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: |  ok  |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: |  ok  |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/core/jump-labels/arch-support.txt b/Documentation/features/core/jump-labels/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..136868b636e6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/core/jump-labels/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/core/jump-labels/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          jump-labels</div><div class='add'>+#         Kconfig:       HAVE_ARCH_JUMP_LABEL</div><div class='add'>+#         description:   arch supports live patched, high efficiency branches</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/core/tracehook/arch-support.txt b/Documentation/features/core/tracehook/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..728061d763b1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/core/tracehook/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/core/tracehook/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          tracehook</div><div class='add'>+#         Kconfig:       HAVE_ARCH_TRACEHOOK</div><div class='add'>+#         description:   arch supports tracehook (ptrace) register handling APIs</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: |  ok  |</div><div class='add'>+    |         c6x: |  ok  |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: |  ok  |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: |  ok  |</div><div class='add'>+    |       nios2: |  ok  |</div><div class='add'>+    |    openrisc: |  ok  |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/KASAN/arch-support.txt b/Documentation/features/debug/KASAN/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..14531da2fb54<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/KASAN/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/KASAN/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          KASAN</div><div class='add'>+#         Kconfig:       HAVE_ARCH_KASAN</div><div class='add'>+#         description:   arch supports the KASAN runtime memory checker</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/gcov-profile-all/arch-support.txt b/Documentation/features/debug/gcov-profile-all/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..38dea8eeba0a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/gcov-profile-all/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/gcov-profile-all/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          gcov-profile-all</div><div class='add'>+#         Kconfig:       ARCH_HAS_GCOV_PROFILE_ALL</div><div class='add'>+#         description:   arch supports whole-kernel GCOV code coverage profiling</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kgdb/arch-support.txt b/Documentation/features/debug/kgdb/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..862e15d6f79e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/kgdb/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/kgdb/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          kgdb</div><div class='add'>+#         Kconfig:       HAVE_ARCH_KGDB</div><div class='add'>+#         description:   arch supports the kGDB kernel debugger</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: |  ok  |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: |  ok  |</div><div class='add'>+    |       nios2: |  ok  |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..40f44d041fb4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/kprobes-on-ftrace/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          kprobes-on-ftrace</div><div class='add'>+#         Kconfig:       HAVE_KPROBES_ON_FTRACE</div><div class='add'>+#         description:   arch supports combined kprobes and ftrace live patching</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kprobes/arch-support.txt b/Documentation/features/debug/kprobes/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..a44bfff6940b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/kprobes/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/kprobes/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          kprobes</div><div class='add'>+#         Kconfig:       HAVE_KPROBES</div><div class='add'>+#         description:   arch supports live patched kernel probe</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: |  ok  |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kretprobes/arch-support.txt b/Documentation/features/debug/kretprobes/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..d87c1ce24204<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/kretprobes/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/kretprobes/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          kretprobes</div><div class='add'>+#         Kconfig:       HAVE_KRETPROBES</div><div class='add'>+#         description:   arch supports kernel function-return probes</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/optprobes/arch-support.txt b/Documentation/features/debug/optprobes/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..b8999d8544ca<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/optprobes/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/optprobes/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          optprobes</div><div class='add'>+#         Kconfig:       HAVE_OPTPROBES</div><div class='add'>+#         description:   arch supports live patched optprobes</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/stackprotector/arch-support.txt b/Documentation/features/debug/stackprotector/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..0fa423313409<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/stackprotector/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/stackprotector/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          stackprotector</div><div class='add'>+#         Kconfig:       HAVE_CC_STACKPROTECTOR</div><div class='add'>+#         description:   arch supports compiler driven stack overflow protection</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/uprobes/arch-support.txt b/Documentation/features/debug/uprobes/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..4efe36c3ace9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/uprobes/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/uprobes/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          uprobes</div><div class='add'>+#         Kconfig:       ARCH_SUPPORTS_UPROBES</div><div class='add'>+#         description:   arch supports live patched user probes</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/user-ret-profiler/arch-support.txt b/Documentation/features/debug/user-ret-profiler/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..44cc1ff3f603<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/debug/user-ret-profiler/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/debug/user-ret-profiler/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          user-ret-profiler</div><div class='add'>+#         Kconfig:       HAVE_USER_RETURN_NOTIFIER</div><div class='add'>+#         description:   arch supports user-space return from system call profiler</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/io/dma-api-debug/arch-support.txt b/Documentation/features/io/dma-api-debug/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..4f4a3443b114<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/io/dma-api-debug/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/io/dma-api-debug/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          dma-api-debug</div><div class='add'>+#         Kconfig:       HAVE_DMA_API_DEBUG</div><div class='add'>+#         description:   arch supports DMA debug facilities</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: |  ok  |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/io/dma-contiguous/arch-support.txt b/Documentation/features/io/dma-contiguous/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..a97e8e3f4ebb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/io/dma-contiguous/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/io/dma-contiguous/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          dma-contiguous</div><div class='add'>+#         Kconfig:       HAVE_DMA_CONTIGUOUS</div><div class='add'>+#         description:   arch supports the DMA CMA (continuous memory allocator)</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/io/dma_map_attrs/arch-support.txt b/Documentation/features/io/dma_map_attrs/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..51d0f1c02a3e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/io/dma_map_attrs/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/io/dma_map_attrs/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          dma_map_attrs</div><div class='add'>+#         Kconfig:       HAVE_DMA_ATTRS</div><div class='add'>+#         description:   arch provides dma_*map*_attrs() APIs</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: |  ok  |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: |  ok  |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: |  ok  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/io/sg-chain/arch-support.txt b/Documentation/features/io/sg-chain/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..b9b675539b9d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/io/sg-chain/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/io/sg-chain/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          sg-chain</div><div class='add'>+#         Kconfig:       ARCH_HAS_SG_CHAIN</div><div class='add'>+#         description:   arch supports chained scatter-gather lists</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/lib/strncasecmp/arch-support.txt b/Documentation/features/lib/strncasecmp/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..12b1c9358e57<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/lib/strncasecmp/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/lib/strncasecmp/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          strncasecmp</div><div class='add'>+#         Kconfig:       __HAVE_ARCH_STRNCASECMP</div><div class='add'>+#         description:   arch provides an optimized strncasecmp() function</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: | TODO |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/list-arch.sh b/Documentation/features/list-arch.sh<br/>new file mode 100755<br/>index 000000000000..6065124a072f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/list-arch.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/list-arch.sh</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+#</div><div class='add'>+# Small script that visualizes the kernel feature support status</div><div class='add'>+# of an architecture.</div><div class='add'>+#</div><div class='add'>+# (If no arguments are given then it will print the host architecture's status.)</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+ARCH=${1:-$(arch | sed 's/x86_64/x86/' | sed 's/i386/x86/')}</div><div class='add'>+</div><div class='add'>+cd $(dirname $0)</div><div class='add'>+echo "#"</div><div class='add'>+echo "# Kernel feature support matrix of the '$ARCH' architecture:"</div><div class='add'>+echo "#"</div><div class='add'>+</div><div class='add'>+for F in */*/arch-support.txt; do</div><div class='add'>+  SUBSYS=$(echo $F | cut -d/ -f1)</div><div class='add'>+  N=$(grep -h "^# Feature name:"        $F | cut -c25-)</div><div class='add'>+  C=$(grep -h "^#         Kconfig:"     $F | cut -c25-)</div><div class='add'>+  D=$(grep -h "^#         description:" $F | cut -c25-)</div><div class='add'>+  S=$(grep -hw $ARCH $F | cut -d\| -f3)</div><div class='add'>+</div><div class='add'>+  printf "%10s/%-22s:%s| %35s # %s\n" "$SUBSYS" "$N" "$S" "$C" "$D"</div><div class='add'>+done</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/features/locking/cmpxchg-local/arch-support.txt b/Documentation/features/locking/cmpxchg-local/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..d9c310889bc1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/locking/cmpxchg-local/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/locking/cmpxchg-local/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          cmpxchg-local</div><div class='add'>+#         Kconfig:       HAVE_CMPXCHG_LOCAL</div><div class='add'>+#         description:   arch supports the this_cpu_cmpxchg() API</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/locking/lockdep/arch-support.txt b/Documentation/features/locking/lockdep/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..cf90635bdcbb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/locking/lockdep/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/locking/lockdep/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          lockdep</div><div class='add'>+#         Kconfig:       LOCKDEP_SUPPORT</div><div class='add'>+#         description:   arch supports the runtime locking correctness debug facility</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: |  ok  |</div><div class='add'>+    |    blackfin: |  ok  |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: |  ok  |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: |  ok  |</div><div class='add'>+    |   unicore32: |  ok  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/locking/queued-rwlocks/arch-support.txt b/Documentation/features/locking/queued-rwlocks/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..68c3a5ddd9b9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/locking/queued-rwlocks/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/locking/queued-rwlocks/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          queued-rwlocks</div><div class='add'>+#         Kconfig:       ARCH_USE_QUEUED_RWLOCKS</div><div class='add'>+#         description:   arch supports queued rwlocks</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/locking/queued-spinlocks/arch-support.txt b/Documentation/features/locking/queued-spinlocks/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..e973b1a9572f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/locking/queued-spinlocks/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/locking/queued-spinlocks/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          queued-spinlocks</div><div class='add'>+#         Kconfig:       ARCH_USE_QUEUED_SPINLOCKS</div><div class='add'>+#         description:   arch supports queued spinlocks</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/locking/rwsem-optimized/arch-support.txt b/Documentation/features/locking/rwsem-optimized/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..ac93d7ab66c4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/locking/rwsem-optimized/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/locking/rwsem-optimized/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          rwsem-optimized</div><div class='add'>+#         Kconfig:       Optimized asm/rwsem.h</div><div class='add'>+#         description:   arch provides optimized rwsem APIs</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/perf/kprobes-event/arch-support.txt b/Documentation/features/perf/kprobes-event/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..9855ad044386<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/perf/kprobes-event/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/perf/kprobes-event/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          kprobes-event</div><div class='add'>+#         Kconfig:       HAVE_REGS_AND_STACK_ACCESS_API</div><div class='add'>+#         description:   arch supports kprobes with perf events</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/perf/perf-regs/arch-support.txt b/Documentation/features/perf/perf-regs/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..e2b4a78ec543<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/perf/perf-regs/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/perf/perf-regs/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          perf-regs</div><div class='add'>+#         Kconfig:       HAVE_PERF_REGS</div><div class='add'>+#         description:   arch supports perf events register access</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/perf/perf-stackdump/arch-support.txt b/Documentation/features/perf/perf-stackdump/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..3dc24b0673c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/perf/perf-stackdump/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/perf/perf-stackdump/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          perf-stackdump</div><div class='add'>+#         Kconfig:       HAVE_PERF_USER_STACK_DUMP</div><div class='add'>+#         description:   arch supports perf events stack dumps</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/sched/numa-balancing/arch-support.txt b/Documentation/features/sched/numa-balancing/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..ac7cd6b1502b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/sched/numa-balancing/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/sched/numa-balancing/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          numa-balancing</div><div class='add'>+#         Kconfig:       ARCH_SUPPORTS_NUMA_BALANCING</div><div class='add'>+#         description:   arch supports NUMA balancing</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ..  |</div><div class='add'>+    |         arm: |  ..  |</div><div class='add'>+    |       arm64: |  ..  |</div><div class='add'>+    |       avr32: |  ..  |</div><div class='add'>+    |    blackfin: |  ..  |</div><div class='add'>+    |         c6x: |  ..  |</div><div class='add'>+    |        cris: |  ..  |</div><div class='add'>+    |         frv: |  ..  |</div><div class='add'>+    |       h8300: |  ..  |</div><div class='add'>+    |     hexagon: |  ..  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: |  ..  |</div><div class='add'>+    |        m68k: |  ..  |</div><div class='add'>+    |       metag: |  ..  |</div><div class='add'>+    |  microblaze: |  ..  |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: |  ..  |</div><div class='add'>+    |       nios2: |  ..  |</div><div class='add'>+    |    openrisc: |  ..  |</div><div class='add'>+    |      parisc: |  ..  |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ..  |</div><div class='add'>+    |       score: |  ..  |</div><div class='add'>+    |          sh: |  ..  |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: |  ..  |</div><div class='add'>+    |   unicore32: |  ..  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ..  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/seccomp/seccomp-filter/arch-support.txt b/Documentation/features/seccomp/seccomp-filter/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..bea800910342<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/seccomp/seccomp-filter/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/seccomp/seccomp-filter/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          seccomp-filter</div><div class='add'>+#         Kconfig:       HAVE_ARCH_SECCOMP_FILTER</div><div class='add'>+#         description:   arch supports seccomp filters</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/arch-tick-broadcast/arch-support.txt b/Documentation/features/time/arch-tick-broadcast/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..8acb439a4a17<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/arch-tick-broadcast/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/arch-tick-broadcast/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          arch-tick-broadcast</div><div class='add'>+#         Kconfig:       ARCH_HAS_TICK_BROADCAST</div><div class='add'>+#         description:   arch provides tick_broadcast()</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: | TODO |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/clockevents/arch-support.txt b/Documentation/features/time/clockevents/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..ff670b2207f1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/clockevents/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/clockevents/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          clockevents</div><div class='add'>+#         Kconfig:       GENERIC_CLOCKEVENTS</div><div class='add'>+#         description:   arch support generic clock events</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: |  ok  |</div><div class='add'>+    |    blackfin: |  ok  |</div><div class='add'>+    |         c6x: |  ok  |</div><div class='add'>+    |        cris: |  ok  |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: |  ok  |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: |  ok  |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: |  ok  |</div><div class='add'>+    |       nios2: |  ok  |</div><div class='add'>+    |    openrisc: |  ok  |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: |  ok  |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: |  ok  |</div><div class='add'>+    |   unicore32: |  ok  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/context-tracking/arch-support.txt b/Documentation/features/time/context-tracking/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..a1e3eea7003f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/context-tracking/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/context-tracking/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          context-tracking</div><div class='add'>+#         Kconfig:       HAVE_CONTEXT_TRACKING</div><div class='add'>+#         description:   arch supports context tracking for NO_HZ_FULL</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..e63316239938<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/irq-time-acct/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/irq-time-acct/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          irq-time-acct</div><div class='add'>+#         Kconfig:       HAVE_IRQ_TIME_ACCOUNTING</div><div class='add'>+#         description:   arch supports precise IRQ time accounting</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ..  |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ..  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ..  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: |  ..  |</div><div class='add'>+    |     powerpc: |  ..  |</div><div class='add'>+    |        s390: |  ..  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ..  |</div><div class='add'>+    |        tile: |  ..  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/modern-timekeeping/arch-support.txt b/Documentation/features/time/modern-timekeeping/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..17f68a02e84d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/modern-timekeeping/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/modern-timekeeping/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          modern-timekeeping</div><div class='add'>+#         Kconfig:       !ARCH_USES_GETTIMEOFFSET</div><div class='add'>+#         description:   arch does not use arch_gettimeoffset() anymore</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: |  ok  |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: |  ok  |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: |  ok  |</div><div class='add'>+    |       h8300: |  ok  |</div><div class='add'>+    |     hexagon: |  ok  |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: |  ok  |</div><div class='add'>+    |       nios2: |  ok  |</div><div class='add'>+    |    openrisc: |  ok  |</div><div class='add'>+    |      parisc: |  ok  |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: |  ok  |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: |  ok  |</div><div class='add'>+    |   unicore32: |  ok  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/time/virt-cpuacct/arch-support.txt b/Documentation/features/time/virt-cpuacct/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..cf3c3e383d15<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/time/virt-cpuacct/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/time/virt-cpuacct/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          virt-cpuacct</div><div class='add'>+#         Kconfig:       HAVE_VIRT_CPU_ACCOUNTING</div><div class='add'>+#         description:   arch supports precise virtual CPU time accounting</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: |  ok  |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: |  ok  |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/ELF-ASLR/arch-support.txt b/Documentation/features/vm/ELF-ASLR/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..ec4dd28e1297<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/ELF-ASLR/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/ELF-ASLR/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          ELF-ASLR</div><div class='add'>+#         Kconfig:       ARCH_HAS_ELF_RANDOMIZE</div><div class='add'>+#         description:   arch randomizes the stack, heap and binary images of ELF binaries</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/PG_uncached/arch-support.txt b/Documentation/features/vm/PG_uncached/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..991974275a3e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/PG_uncached/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/PG_uncached/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          PG_uncached</div><div class='add'>+#         Kconfig:       ARCH_USES_PG_UNCACHED</div><div class='add'>+#         description:   arch supports the PG_uncached page flag</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/THP/arch-support.txt b/Documentation/features/vm/THP/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..972d02c2a74c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/THP/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/THP/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          THP</div><div class='add'>+#         Kconfig:       HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='add'>+#         description:   arch supports transparent hugepages</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ..  |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: |  ..  |</div><div class='add'>+    |    blackfin: |  ..  |</div><div class='add'>+    |         c6x: |  ..  |</div><div class='add'>+    |        cris: |  ..  |</div><div class='add'>+    |         frv: |  ..  |</div><div class='add'>+    |       h8300: |  ..  |</div><div class='add'>+    |     hexagon: |  ..  |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: |  ..  |</div><div class='add'>+    |        m68k: |  ..  |</div><div class='add'>+    |       metag: |  ..  |</div><div class='add'>+    |  microblaze: |  ..  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: |  ..  |</div><div class='add'>+    |       nios2: |  ..  |</div><div class='add'>+    |    openrisc: |  ..  |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: |  ..  |</div><div class='add'>+    |          sh: |  ..  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: |  ..  |</div><div class='add'>+    |   unicore32: |  ..  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ..  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/huge-vmap/arch-support.txt b/Documentation/features/vm/huge-vmap/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..af6816bccb43<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/huge-vmap/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/huge-vmap/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          huge-vmap</div><div class='add'>+#         Kconfig:       HAVE_ARCH_HUGE_VMAP</div><div class='add'>+#         description:   arch supports the ioremap_pud_enabled() and ioremap_pmd_enabled() VM APIs</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: | TODO |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/ioremap_prot/arch-support.txt b/Documentation/features/vm/ioremap_prot/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..90c53749fde7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/ioremap_prot/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/ioremap_prot/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          ioremap_prot</div><div class='add'>+#         Kconfig:       HAVE_IOREMAP_PROT</div><div class='add'>+#         description:   arch has ioremap_prot()</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='add'>+    |         arm: | TODO |</div><div class='add'>+    |       arm64: | TODO |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: | TODO |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: |  ok  |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/numa-memblock/arch-support.txt b/Documentation/features/vm/numa-memblock/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..e7c252a0c531<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/numa-memblock/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/numa-memblock/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          numa-memblock</div><div class='add'>+#         Kconfig:       HAVE_MEMBLOCK_NODE_MAP</div><div class='add'>+#         description:   arch supports NUMA aware memblocks</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: |  ..  |</div><div class='add'>+    |         arm: |  ..  |</div><div class='add'>+    |       arm64: |  ..  |</div><div class='add'>+    |       avr32: |  ..  |</div><div class='add'>+    |    blackfin: |  ..  |</div><div class='add'>+    |         c6x: |  ..  |</div><div class='add'>+    |        cris: |  ..  |</div><div class='add'>+    |         frv: |  ..  |</div><div class='add'>+    |       h8300: |  ..  |</div><div class='add'>+    |     hexagon: |  ..  |</div><div class='add'>+    |        ia64: |  ok  |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: |  ..  |</div><div class='add'>+    |       metag: |  ok  |</div><div class='add'>+    |  microblaze: |  ok  |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: |  ..  |</div><div class='add'>+    |    openrisc: |  ..  |</div><div class='add'>+    |      parisc: |  ..  |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: |  ok  |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: |  ..  |</div><div class='add'>+    |   unicore32: |  ..  |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: |  ..  |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/pmdp_splitting_flush/arch-support.txt b/Documentation/features/vm/pmdp_splitting_flush/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..26f74b457e0b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/pmdp_splitting_flush/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/pmdp_splitting_flush/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          pmdp_splitting_flush</div><div class='add'>+#         Kconfig:       __HAVE_ARCH_PMDP_SPLITTING_FLUSH</div><div class='add'>+#         description:   arch supports the pmdp_splitting_flush() VM API</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: |  ok  |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: | TODO |</div><div class='add'>+    |       sparc: | TODO |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/pte_special/arch-support.txt b/Documentation/features/vm/pte_special/arch-support.txt<br/>new file mode 100644<br/>index 000000000000..aaaa21db6226<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/features/vm/pte_special/arch-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/features/vm/pte_special/arch-support.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+#</div><div class='add'>+# Feature name:          pte_special</div><div class='add'>+#         Kconfig:       __HAVE_ARCH_PTE_SPECIAL</div><div class='add'>+#         description:   arch supports the pte_special()/pte_mkspecial() VM APIs</div><div class='add'>+#</div><div class='add'>+    -----------------------</div><div class='add'>+    |         arch |status|</div><div class='add'>+    -----------------------</div><div class='add'>+    |       alpha: | TODO |</div><div class='add'>+    |         arc: | TODO |</div><div class='add'>+    |         arm: |  ok  |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='add'>+    |       avr32: | TODO |</div><div class='add'>+    |    blackfin: | TODO |</div><div class='add'>+    |         c6x: | TODO |</div><div class='add'>+    |        cris: | TODO |</div><div class='add'>+    |         frv: | TODO |</div><div class='add'>+    |       h8300: | TODO |</div><div class='add'>+    |     hexagon: | TODO |</div><div class='add'>+    |        ia64: | TODO |</div><div class='add'>+    |        m32r: | TODO |</div><div class='add'>+    |        m68k: | TODO |</div><div class='add'>+    |       metag: | TODO |</div><div class='add'>+    |  microblaze: | TODO |</div><div class='add'>+    |        mips: | TODO |</div><div class='add'>+    |     mn10300: | TODO |</div><div class='add'>+    |       nios2: | TODO |</div><div class='add'>+    |    openrisc: | TODO |</div><div class='add'>+    |      parisc: | TODO |</div><div class='add'>+    |     powerpc: |  ok  |</div><div class='add'>+    |        s390: |  ok  |</div><div class='add'>+    |       score: | TODO |</div><div class='add'>+    |          sh: |  ok  |</div><div class='add'>+    |       sparc: |  ok  |</div><div class='add'>+    |        tile: | TODO |</div><div class='add'>+    |          um: | TODO |</div><div class='add'>+    |   unicore32: | TODO |</div><div class='add'>+    |         x86: |  ok  |</div><div class='add'>+    |      xtensa: | TODO |</div><div class='add'>+    -----------------------</div><div class='head'>diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking<br/>index 0a926e2ba3ab..6a34a0f4d37c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/Locking?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/Locking</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/Locking?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/Locking</a></div><div class='hunk'>@@ -50,8 +50,8 @@ prototypes:</div><div class='ctx'> 	int (*rename2) (struct inode *, struct dentry *,</div><div class='ctx'> 			struct inode *, struct dentry *, unsigned int);</div><div class='ctx'> 	int (*readlink) (struct dentry *, char __user *,int);</div><div class='del'>-	void * (*follow_link) (struct dentry *, struct nameidata *);</div><div class='del'>-	void (*put_link) (struct dentry *, struct nameidata *, void *);</div><div class='add'>+	const char *(*follow_link) (struct dentry *, void **);</div><div class='add'>+	void (*put_link) (struct inode *, void *);</div><div class='ctx'> 	void (*truncate) (struct inode *);</div><div class='ctx'> 	int (*permission) (struct inode *, int, unsigned int);</div><div class='ctx'> 	int (*get_acl)(struct inode *, int);</div><div class='head'>diff --git a/Documentation/filesystems/automount-support.txt b/Documentation/filesystems/automount-support.txt<br/>index 7cac200e2a85..7eb762eb3136 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/automount-support.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/automount-support.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/automount-support.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/automount-support.txt</a></div><div class='hunk'>@@ -1,41 +1,15 @@</div><div class='del'>-Support is available for filesystems that wish to do automounting support (such</div><div class='del'>-as kAFS which can be found in fs/afs/). This facility includes allowing</div><div class='del'>-in-kernel mounts to be performed and mountpoint degradation to be</div><div class='del'>-requested. The latter can also be requested by userspace.</div><div class='add'>+Support is available for filesystems that wish to do automounting</div><div class='add'>+support (such as kAFS which can be found in fs/afs/ and NFS in</div><div class='add'>+fs/nfs/). This facility includes allowing in-kernel mounts to be</div><div class='add'>+performed and mountpoint degradation to be requested. The latter can</div><div class='add'>+also be requested by userspace.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> ======================</div><div class='ctx'> IN-KERNEL AUTOMOUNTING</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='del'>-A filesystem can now mount another filesystem on one of its directories by the</div><div class='del'>-following procedure:</div><div class='del'>-</div><div class='del'>- (1) Give the directory a follow_link() operation.</div><div class='del'>-</div><div class='del'>-     When the directory is accessed, the follow_link op will be called, and</div><div class='del'>-     it will be provided with the location of the mountpoint in the nameidata</div><div class='del'>-     structure (vfsmount and dentry).</div><div class='del'>-</div><div class='del'>- (2) Have the follow_link() op do the following steps:</div><div class='del'>-</div><div class='del'>-     (a) Call vfs_kern_mount() to call the appropriate filesystem to set up a</div><div class='del'>-         superblock and gain a vfsmount structure representing it.</div><div class='del'>-</div><div class='del'>-     (b) Copy the nameidata provided as an argument and substitute the dentry</div><div class='del'>-	 argument into it the copy.</div><div class='del'>-</div><div class='del'>-     (c) Call do_add_mount() to install the new vfsmount into the namespace's</div><div class='del'>-	 mountpoint tree, thus making it accessible to userspace. Use the</div><div class='del'>-	 nameidata set up in (b) as the destination.</div><div class='del'>-</div><div class='del'>-	 If the mountpoint will be automatically expired, then do_add_mount()</div><div class='del'>-	 should also be given the location of an expiration list (see further</div><div class='del'>-	 down).</div><div class='del'>-</div><div class='del'>-     (d) Release the path in the nameidata argument and substitute in the new</div><div class='del'>-	 vfsmount and its root dentry. The ref counts on these will need</div><div class='del'>-	 incrementing.</div><div class='add'>+See section "Mount Traps" of  Documentation/filesystems/autofs4.txt</div><div class='ctx'> </div><div class='ctx'> Then from userspace, you can just do something like:</div><div class='ctx'> </div><div class='hunk'>@@ -61,17 +35,18 @@ AUTOMATIC MOUNTPOINT EXPIRY</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='ctx'> Automatic expiration of mountpoints is easy, provided you've mounted the</div><div class='del'>-mountpoint to be expired in the automounting procedure outlined above.</div><div class='add'>+mountpoint to be expired in the automounting procedure outlined separately.</div><div class='ctx'> </div><div class='ctx'> To do expiration, you need to follow these steps:</div><div class='ctx'> </div><div class='del'>- (3) Create at least one list off which the vfsmounts to be expired can be</div><div class='del'>-     hung. Access to this list will be governed by the vfsmount_lock.</div><div class='add'>+ (1) Create at least one list off which the vfsmounts to be expired can be</div><div class='add'>+     hung.</div><div class='ctx'> </div><div class='del'>- (4) In step (2c) above, the call to do_add_mount() should be provided with a</div><div class='del'>-     pointer to this list. It will hang the vfsmount off of it if it succeeds.</div><div class='add'>+ (2) When a new mountpoint is created in the -&gt;d_automount method, add</div><div class='add'>+     the mnt to the list using mnt_set_expiry()</div><div class='add'>+             mnt_set_expiry(newmnt, &amp;afs_vfsmounts);</div><div class='ctx'> </div><div class='del'>- (5) When you want mountpoints to be expired, call mark_mounts_for_expiry()</div><div class='add'>+ (3) When you want mountpoints to be expired, call mark_mounts_for_expiry()</div><div class='ctx'>      with a pointer to this list. This will process the list, marking every</div><div class='ctx'>      vfsmount thereon for potential expiry on the next call.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/caching/backend-api.txt b/Documentation/filesystems/caching/backend-api.txt<br/>index 277d1e810670..c0bd5677271b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/caching/backend-api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/caching/backend-api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/caching/backend-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/caching/backend-api.txt</a></div><div class='hunk'>@@ -676,6 +676,29 @@ FS-Cache provides some utilities that a cache backend may make use of:</div><div class='ctx'>      as possible.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+ (*) Indicate that a stale object was found and discarded:</div><div class='add'>+</div><div class='add'>+	void fscache_object_retrying_stale(struct fscache_object *object);</div><div class='add'>+</div><div class='add'>+     This is called to indicate that the lookup procedure found an object in</div><div class='add'>+     the cache that the netfs decided was stale.  The object has been</div><div class='add'>+     discarded from the cache and the lookup will be performed again.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+ (*) Indicate that the caching backend killed an object:</div><div class='add'>+</div><div class='add'>+	void fscache_object_mark_killed(struct fscache_object *object,</div><div class='add'>+					enum fscache_why_object_killed why);</div><div class='add'>+</div><div class='add'>+     This is called to indicate that the cache backend preemptively killed an</div><div class='add'>+     object.  The why parameter should be set to indicate the reason:</div><div class='add'>+</div><div class='add'>+	FSCACHE_OBJECT_IS_STALE - the object was stale and needs discarding.</div><div class='add'>+	FSCACHE_OBJECT_NO_SPACE - there was insufficient cache space</div><div class='add'>+	FSCACHE_OBJECT_WAS_RETIRED - the object was retired when relinquished.</div><div class='add'>+	FSCACHE_OBJECT_WAS_CULLED - the object was culled to make space.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'>  (*) Get and release references on a retrieval record:</div><div class='ctx'> </div><div class='ctx'> 	void fscache_get_retrieval(struct fscache_retrieval *op);</div><div class='head'>diff --git a/Documentation/filesystems/caching/fscache.txt b/Documentation/filesystems/caching/fscache.txt<br/>index 770267af5b3e..50f0a5757f48 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/caching/fscache.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/caching/fscache.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/caching/fscache.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/caching/fscache.txt</a></div><div class='hunk'>@@ -284,8 +284,9 @@ proc files.</div><div class='ctx'> 		enq=N	Number of times async ops queued for processing</div><div class='ctx'> 		can=N	Number of async ops cancelled</div><div class='ctx'> 		rej=N	Number of async ops rejected due to object lookup/create failure</div><div class='add'>+		ini=N	Number of async ops initialised</div><div class='ctx'> 		dfr=N	Number of async ops queued for deferred release</div><div class='del'>-		rel=N	Number of async ops released</div><div class='add'>+		rel=N	Number of async ops released (should equal ini=N when idle)</div><div class='ctx'> 		gc=N	Number of deferred-release async ops garbage collected</div><div class='ctx'> 	CacheOp	alo=N	Number of in-progress alloc_object() cache ops</div><div class='ctx'> 		luo=N	Number of in-progress lookup_object() cache ops</div><div class='hunk'>@@ -303,6 +304,10 @@ proc files.</div><div class='ctx'> 		wrp=N	Number of in-progress write_page() cache ops</div><div class='ctx'> 		ucp=N	Number of in-progress uncache_page() cache ops</div><div class='ctx'> 		dsp=N	Number of in-progress dissociate_pages() cache ops</div><div class='add'>+	CacheEv	nsp=N	Number of object lookups/creations rejected due to lack of space</div><div class='add'>+		stl=N	Number of stale objects deleted</div><div class='add'>+		rtr=N	Number of objects retired when relinquished</div><div class='add'>+		cul=N	Number of objects culled</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>  (*) /proc/fs/fscache/histogram</div><div class='head'>diff --git a/Documentation/filesystems/dax.txt b/Documentation/filesystems/dax.txt<br/>index baf41118660d..7af2851d667c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/dax.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/dax.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/dax.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/dax.txt</a></div><div class='hunk'>@@ -18,8 +18,10 @@ Usage</div><div class='ctx'> -----</div><div class='ctx'> </div><div class='ctx'> If you have a block device which supports DAX, you can make a filesystem</div><div class='del'>-on it as usual.  When mounting it, use the -o dax option manually</div><div class='del'>-or add 'dax' to the options in /etc/fstab.</div><div class='add'>+on it as usual.  The DAX code currently only supports files with a block</div><div class='add'>+size equal to your kernel's PAGE_SIZE, so you may need to specify a block</div><div class='add'>+size when creating the filesystem.  When mounting it, use the "-o dax"</div><div class='add'>+option on the command line or add 'dax' to the options in /etc/fstab.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Implementation Tips for Block Driver Writers</div><div class='head'>diff --git a/Documentation/filesystems/nfs/knfsd-stats.txt b/Documentation/filesystems/nfs/knfsd-stats.txt<br/>index 64ced5149d37..1a5d82180b84 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/nfs/knfsd-stats.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/nfs/knfsd-stats.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/nfs/knfsd-stats.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/nfs/knfsd-stats.txt</a></div><div class='hunk'>@@ -68,16 +68,10 @@ sockets-enqueued</div><div class='ctx'> 	rate of change for this counter is zero; significantly non-zero</div><div class='ctx'> 	values may indicate a performance limitation.</div><div class='ctx'> </div><div class='del'>-	This can happen either because there are too few nfsd threads in the</div><div class='del'>-	thread pool for the NFS workload (the workload is thread-limited),</div><div class='del'>-	or because the NFS workload needs more CPU time than is available in</div><div class='del'>-	the thread pool (the workload is CPU-limited).  In the former case,</div><div class='del'>-	configuring more nfsd threads will probably improve the performance</div><div class='del'>-	of the NFS workload.  In the latter case, the sunrpc server layer is</div><div class='del'>-	already choosing not to wake idle nfsd threads because there are too</div><div class='del'>-	many nfsd threads which want to run but cannot, so configuring more</div><div class='del'>-	nfsd threads will make no difference whatsoever.  The overloads-avoided</div><div class='del'>-	statistic (see below) can be used to distinguish these cases.</div><div class='add'>+	This can happen because there are too few nfsd threads in the thread</div><div class='add'>+	pool for the NFS workload (the workload is thread-limited), in which</div><div class='add'>+	case configuring more nfsd threads will probably improve the</div><div class='add'>+	performance of the NFS workload.</div><div class='ctx'> </div><div class='ctx'> threads-woken</div><div class='ctx'> 	Counts how many times an idle nfsd thread is woken to try to</div><div class='hunk'>@@ -88,36 +82,6 @@ threads-woken</div><div class='ctx'> 	thing.  The ideal rate of change for this counter will be close</div><div class='ctx'> 	to but less than the rate of change of the packets-arrived counter.</div><div class='ctx'> </div><div class='del'>-overloads-avoided</div><div class='del'>-	Counts how many times the sunrpc server layer chose not to wake an</div><div class='del'>-	nfsd thread, despite the presence of idle nfsd threads, because</div><div class='del'>-	too many nfsd threads had been recently woken but could not get</div><div class='del'>-	enough CPU time to actually run.</div><div class='del'>-</div><div class='del'>-	This statistic counts a circumstance where the sunrpc layer</div><div class='del'>-	heuristically avoids overloading the CPU scheduler with too many</div><div class='del'>-	runnable nfsd threads.  The ideal rate of change for this counter</div><div class='del'>-	is zero.  Significant non-zero values indicate that the workload</div><div class='del'>-	is CPU limited.  Usually this is associated with heavy CPU usage</div><div class='del'>-	on all the CPUs in the nfsd thread pool.</div><div class='del'>-</div><div class='del'>-	If a sustained large overloads-avoided rate is detected on a pool,</div><div class='del'>-	the top(1) utility should be used to check for the following</div><div class='del'>-	pattern of CPU usage on all the CPUs associated with the given</div><div class='del'>-	nfsd thread pool.</div><div class='del'>-</div><div class='del'>-	 - %us ~= 0 (as you're *NOT* running applications on your NFS server)</div><div class='del'>-</div><div class='del'>-	 - %wa ~= 0</div><div class='del'>-</div><div class='del'>-	 - %id ~= 0</div><div class='del'>-</div><div class='del'>-	 - %sy + %hi + %si ~= 100</div><div class='del'>-</div><div class='del'>-	If this pattern is seen, configuring more nfsd threads will *not*</div><div class='del'>-	improve the performance of the workload.  If this patten is not</div><div class='del'>-	seen, then something more subtle is wrong.</div><div class='del'>-</div><div class='ctx'> threads-timedout</div><div class='ctx'> 	Counts how many times an nfsd thread triggered an idle timeout,</div><div class='ctx'> 	i.e. was not woken to handle any incoming network packets for</div><div class='head'>diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting<br/>index e69274de8d0c..f24d1b833957 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/porting?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/porting</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/porting?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/porting</a></div><div class='hunk'>@@ -379,10 +379,10 @@ may now be called in rcu-walk mode (nd-&gt;flags &amp; LOOKUP_RCU). -ECHILD should be</div><div class='ctx'> returned if the filesystem cannot handle rcu-walk. See</div><div class='ctx'> Documentation/filesystems/vfs.txt for more details.</div><div class='ctx'> </div><div class='del'>-	permission and check_acl are inode permission checks that are called</div><div class='del'>-on many or all directory inodes on the way down a path walk (to check for</div><div class='del'>-exec permission). These must now be rcu-walk aware (flags &amp; IPERM_FLAG_RCU).</div><div class='del'>-See Documentation/filesystems/vfs.txt for more details.</div><div class='add'>+	permission is an inode permission check that is called on many or all</div><div class='add'>+directory inodes on the way down a path walk (to check for exec permission). It</div><div class='add'>+must now be rcu-walk aware (mask &amp; MAY_NOT_BLOCK).  See</div><div class='add'>+Documentation/filesystems/vfs.txt for more details.</div><div class='ctx'>  </div><div class='ctx'> --</div><div class='ctx'> [mandatory]</div><div class='hunk'>@@ -483,3 +483,24 @@ in your dentry operations instead.</div><div class='ctx'> --</div><div class='ctx'> [mandatory]</div><div class='ctx'> 	-&gt;aio_read/-&gt;aio_write are gone.  Use -&gt;read_iter/-&gt;write_iter.</div><div class='add'>+---</div><div class='add'>+[recommended]</div><div class='add'>+	for embedded ("fast") symlinks just set inode-&gt;i_link to wherever the</div><div class='add'>+	symlink body is and use simple_follow_link() as -&gt;follow_link().</div><div class='add'>+--</div><div class='add'>+[mandatory]</div><div class='add'>+	calling conventions for -&gt;follow_link() have changed.  Instead of returning</div><div class='add'>+	cookie and using nd_set_link() to store the body to traverse, we return</div><div class='add'>+	the body to traverse and store the cookie using explicit void ** argument.</div><div class='add'>+	nameidata isn't passed at all - nd_jump_link() doesn't need it and</div><div class='add'>+	nd_[gs]et_link() is gone.</div><div class='add'>+--</div><div class='add'>+[mandatory]</div><div class='add'>+	calling conventions for -&gt;put_link() have changed.  It gets inode instead of</div><div class='add'>+	dentry,  it does not get nameidata at all and it gets called only when cookie</div><div class='add'>+	is non-NULL.  Note that link body isn't available anymore, so if you need it,</div><div class='add'>+	store it as cookie.</div><div class='add'>+--</div><div class='add'>+[mandatory]</div><div class='add'>+	__fd_install() &amp; fd_install() can now sleep. Callers should not</div><div class='add'>+	hold a spinlock	or other resources that do not allow a schedule.</div><div class='head'>diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt<br/>index c3b6b301d8b0..6f7fafde0884 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/proc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/proc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/proc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/proc.txt</a></div><div class='hunk'>@@ -205,7 +205,7 @@ asynchronous manner and the value may not be very precise. To see a precise</div><div class='ctx'> snapshot of a moment, you can see /proc/&lt;pid&gt;/smaps file and scan page table.</div><div class='ctx'> It's slow but very precise.</div><div class='ctx'> </div><div class='del'>-Table 1-2: Contents of the status files (as of 3.20.0)</div><div class='add'>+Table 1-2: Contents of the status files (as of 4.1)</div><div class='ctx'> ..............................................................................</div><div class='ctx'>  Field                       Content</div><div class='ctx'>  Name                        filename of the executable</div><div class='hunk'>@@ -235,6 +235,7 @@ Table 1-2: Contents of the status files (as of 3.20.0)</div><div class='ctx'>  VmExe                       size of text segment</div><div class='ctx'>  VmLib                       size of shared library code</div><div class='ctx'>  VmPTE                       size of page table entries</div><div class='add'>+ VmPMD                       size of second level page tables</div><div class='ctx'>  VmSwap                      size of swap usage (the number of referred swapents)</div><div class='ctx'>  Threads                     number of threads</div><div class='ctx'>  SigQ                        number of signals queued/max. number for queue</div><div class='head'>diff --git a/Documentation/filesystems/quota.txt b/Documentation/filesystems/quota.txt<br/>index 5e8de25bf0f1..29fc01552646 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/quota.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/quota.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/quota.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/quota.txt</a></div><div class='hunk'>@@ -32,7 +32,10 @@ The interface uses generic netlink framework (see</div><div class='ctx'> http://lwn.net/Articles/208755/ and http://people.suug.ch/~tgr/libnl/ for more</div><div class='ctx'> details about this layer). The name of the quota generic netlink interface</div><div class='ctx'> is "VFS_DQUOT". Definitions of constants below are in &lt;linux/quota.h&gt;.</div><div class='del'>-  Currently, the interface supports only one message type QUOTA_NL_C_WARNING.</div><div class='add'>+Since the quota netlink protocol is not namespace aware, quota netlink messages</div><div class='add'>+are sent only in initial network namespace.</div><div class='add'>+</div><div class='add'>+Currently, the interface supports only one message type QUOTA_NL_C_WARNING.</div><div class='ctx'> This command is used to send a notification about any of the above mentioned</div><div class='ctx'> events. Each message has six attributes. These are (type of the argument is</div><div class='ctx'> in parentheses):</div><div class='head'>diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt<br/>index 5d833b32bbcd..5eb8456fc41e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/vfs.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/vfs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/vfs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/vfs.txt</a></div><div class='hunk'>@@ -350,8 +350,8 @@ struct inode_operations {</div><div class='ctx'> 	int (*rename2) (struct inode *, struct dentry *,</div><div class='ctx'> 			struct inode *, struct dentry *, unsigned int);</div><div class='ctx'> 	int (*readlink) (struct dentry *, char __user *,int);</div><div class='del'>-        void * (*follow_link) (struct dentry *, struct nameidata *);</div><div class='del'>-        void (*put_link) (struct dentry *, struct nameidata *, void *);</div><div class='add'>+	const char *(*follow_link) (struct dentry *, void **);</div><div class='add'>+	void (*put_link) (struct inode *, void *);</div><div class='ctx'> 	int (*permission) (struct inode *, int);</div><div class='ctx'> 	int (*get_acl)(struct inode *, int);</div><div class='ctx'> 	int (*setattr) (struct dentry *, struct iattr *);</div><div class='hunk'>@@ -436,16 +436,18 @@ otherwise noted.</div><div class='ctx'> </div><div class='ctx'>   follow_link: called by the VFS to follow a symbolic link to the</div><div class='ctx'> 	inode it points to.  Only required if you want to support</div><div class='del'>-	symbolic links.  This method returns a void pointer cookie</div><div class='del'>-	that is passed to put_link().</div><div class='add'>+	symbolic links.  This method returns the symlink body</div><div class='add'>+	to traverse (and possibly resets the current position with</div><div class='add'>+	nd_jump_link()).  If the body won't go away until the inode</div><div class='add'>+	is gone, nothing else is needed; if it needs to be otherwise</div><div class='add'>+	pinned, the data needed to release whatever we'd grabbed</div><div class='add'>+	is to be stored in void * variable passed by address to</div><div class='add'>+	follow_link() instance.</div><div class='ctx'> </div><div class='ctx'>   put_link: called by the VFS to release resources allocated by</div><div class='del'>-  	follow_link().  The cookie returned by follow_link() is passed</div><div class='del'>-  	to this method as the last parameter.  It is used by</div><div class='del'>-  	filesystems such as NFS where page cache is not stable</div><div class='del'>-  	(i.e. page that was installed when the symbolic link walk</div><div class='del'>-  	started might not be in the page cache at the end of the</div><div class='del'>-  	walk).</div><div class='add'>+	follow_link().  The cookie stored by follow_link() is passed</div><div class='add'>+	to this method as the last parameter; only called when</div><div class='add'>+	cookie isn't NULL.</div><div class='ctx'> </div><div class='ctx'>   permission: called by the VFS to check for access rights on a POSIX-like</div><div class='ctx'>   	filesystem.</div><div class='hunk'>@@ -797,7 +799,7 @@ struct file_operations</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='ctx'> This describes how the VFS can manipulate an open file. As of kernel</div><div class='del'>-3.12, the following members are defined:</div><div class='add'>+4.1, the following members are defined:</div><div class='ctx'> </div><div class='ctx'> struct file_operations {</div><div class='ctx'> 	struct module *owner;</div><div class='hunk'>@@ -811,8 +813,9 @@ struct file_operations {</div><div class='ctx'> 	long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);</div><div class='ctx'> 	long (*compat_ioctl) (struct file *, unsigned int, unsigned long);</div><div class='ctx'> 	int (*mmap) (struct file *, struct vm_area_struct *);</div><div class='add'>+	int (*mremap)(struct file *, struct vm_area_struct *);</div><div class='ctx'> 	int (*open) (struct inode *, struct file *);</div><div class='del'>-	int (*flush) (struct file *);</div><div class='add'>+	int (*flush) (struct file *, fl_owner_t id);</div><div class='ctx'> 	int (*release) (struct inode *, struct file *);</div><div class='ctx'> 	int (*fsync) (struct file *, loff_t, loff_t, int datasync);</div><div class='ctx'> 	int (*aio_fsync) (struct kiocb *, int datasync);</div><div class='hunk'>@@ -822,11 +825,15 @@ struct file_operations {</div><div class='ctx'> 	unsigned long (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long);</div><div class='ctx'> 	int (*check_flags)(int);</div><div class='ctx'> 	int (*flock) (struct file *, int, struct file_lock *);</div><div class='del'>-	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, size_t, unsigned int);</div><div class='del'>-	ssize_t (*splice_read)(struct file *, struct pipe_inode_info *, size_t, unsigned int);</div><div class='del'>-	int (*setlease)(struct file *, long arg, struct file_lock **, void **);</div><div class='del'>-	long (*fallocate)(struct file *, int mode, loff_t offset, loff_t len);</div><div class='add'>+	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int);</div><div class='add'>+	ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int);</div><div class='add'>+	int (*setlease)(struct file *, long, struct file_lock **, void **);</div><div class='add'>+	long (*fallocate)(struct file *file, int mode, loff_t offset,</div><div class='add'>+			  loff_t len);</div><div class='ctx'> 	void (*show_fdinfo)(struct seq_file *m, struct file *f);</div><div class='add'>+#ifndef CONFIG_MMU</div><div class='add'>+	unsigned (*mmap_capabilities)(struct file *);</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> Again, all methods are called without any locks being held, unless</div><div class='head'>diff --git a/Documentation/filesystems/xfs.txt b/Documentation/filesystems/xfs.txt<br/>index 5a5a05582b58..8146e9fd5ffc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/xfs.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/filesystems/xfs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/xfs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/filesystems/xfs.txt</a></div><div class='hunk'>@@ -236,10 +236,10 @@ Removed Mount Options</div><div class='ctx'> </div><div class='ctx'>   Name				Removed</div><div class='ctx'>   ----				-------</div><div class='del'>-  delaylog/nodelaylog		v3.20</div><div class='del'>-  ihashsize			v3.20</div><div class='del'>-  irixsgid			v3.20</div><div class='del'>-  osyncisdsync/osyncisosync	v3.20</div><div class='add'>+  delaylog/nodelaylog		v4.0</div><div class='add'>+  ihashsize			v4.0</div><div class='add'>+  irixsgid			v4.0</div><div class='add'>+  osyncisdsync/osyncisosync	v4.0</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> sysctls</div><div class='hunk'>@@ -346,5 +346,5 @@ Removed Sysctls</div><div class='ctx'> </div><div class='ctx'>   Name				Removed</div><div class='ctx'>   ----				-------</div><div class='del'>-  fs.xfs.xfsbufd_centisec	v3.20</div><div class='del'>-  fs.xfs.age_buffer_centisecs	v3.20</div><div class='add'>+  fs.xfs.xfsbufd_centisec	v4.0</div><div class='add'>+  fs.xfs.age_buffer_centisecs	v4.0</div><div class='head'>diff --git a/Documentation/gpio/consumer.txt b/Documentation/gpio/consumer.txt<br/>index c21c1313f09e..75542b91b766 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/gpio/consumer.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/gpio/consumer.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/gpio/consumer.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/gpio/consumer.txt</a></div><div class='hunk'>@@ -241,18 +241,18 @@ Set multiple GPIO outputs with a single function call</div><div class='ctx'> -----------------------------------------------------</div><div class='ctx'> The following functions set the output values of an array of GPIOs:</div><div class='ctx'> </div><div class='del'>-	void gpiod_set_array(unsigned int array_size,</div><div class='del'>-			     struct gpio_desc **desc_array,</div><div class='del'>-			     int *value_array)</div><div class='del'>-	void gpiod_set_raw_array(unsigned int array_size,</div><div class='del'>-				 struct gpio_desc **desc_array,</div><div class='del'>-				 int *value_array)</div><div class='del'>-	void gpiod_set_array_cansleep(unsigned int array_size,</div><div class='del'>-				      struct gpio_desc **desc_array,</div><div class='del'>-				      int *value_array)</div><div class='del'>-	void gpiod_set_raw_array_cansleep(unsigned int array_size,</div><div class='del'>-					  struct gpio_desc **desc_array,</div><div class='del'>-					  int *value_array)</div><div class='add'>+	void gpiod_set_array_value(unsigned int array_size,</div><div class='add'>+				   struct gpio_desc **desc_array,</div><div class='add'>+				   int *value_array)</div><div class='add'>+	void gpiod_set_raw_array_value(unsigned int array_size,</div><div class='add'>+				       struct gpio_desc **desc_array,</div><div class='add'>+				       int *value_array)</div><div class='add'>+	void gpiod_set_array_value_cansleep(unsigned int array_size,</div><div class='add'>+					    struct gpio_desc **desc_array,</div><div class='add'>+					    int *value_array)</div><div class='add'>+	void gpiod_set_raw_array_value_cansleep(unsigned int array_size,</div><div class='add'>+						struct gpio_desc **desc_array,</div><div class='add'>+						int *value_array)</div><div class='ctx'> </div><div class='ctx'> The array can be an arbitrary set of GPIOs. The functions will try to set</div><div class='ctx'> GPIOs belonging to the same bank or chip simultaneously if supported by the</div><div class='hunk'>@@ -271,8 +271,8 @@ matches the desired group of GPIOs, those GPIOs can be set by simply using</div><div class='ctx'> the struct gpio_descs returned by gpiod_get_array():</div><div class='ctx'> </div><div class='ctx'> 	struct gpio_descs *my_gpio_descs = gpiod_get_array(...);</div><div class='del'>-	gpiod_set_array(my_gpio_descs-&gt;ndescs, my_gpio_descs-&gt;desc,</div><div class='del'>-			my_gpio_values);</div><div class='add'>+	gpiod_set_array_value(my_gpio_descs-&gt;ndescs, my_gpio_descs-&gt;desc,</div><div class='add'>+			      my_gpio_values);</div><div class='ctx'> </div><div class='ctx'> It is also possible to set a completely arbitrary array of descriptors. The</div><div class='ctx'> descriptors may be obtained using any combination of gpiod_get() and</div><div class='hunk'>@@ -290,7 +290,7 @@ corresponding to a given GPIO using the following call:</div><div class='ctx'> </div><div class='ctx'> 	int gpiod_to_irq(const struct gpio_desc *desc)</div><div class='ctx'> </div><div class='del'>-It will return an IRQ number, or an negative errno code if the mapping can't be</div><div class='add'>+It will return an IRQ number, or a negative errno code if the mapping can't be</div><div class='ctx'> done (most likely because that particular GPIO cannot be used as IRQ). It is an</div><div class='ctx'> unchecked error to use a GPIO that wasn't set up as an input using</div><div class='ctx'> gpiod_direction_input(), or to use an IRQ number that didn't originally come</div><div class='head'>diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt<br/>index 6f83fa965b4b..79ab5648d69b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/gpio/gpio-legacy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/gpio/gpio-legacy.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/gpio/gpio-legacy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/gpio/gpio-legacy.txt</a></div><div class='hunk'>@@ -751,9 +751,6 @@ requested using gpio_request():</div><div class='ctx'> 	int gpio_export_link(struct device *dev, const char *name,</div><div class='ctx'> 		unsigned gpio)</div><div class='ctx'> </div><div class='del'>-	/* change the polarity of a GPIO node in sysfs */</div><div class='del'>-	int gpio_sysfs_set_active_low(unsigned gpio, int value);</div><div class='del'>-</div><div class='ctx'> After a kernel driver requests a GPIO, it may only be made available in</div><div class='ctx'> the sysfs interface by gpio_export().  The driver can control whether the</div><div class='ctx'> signal direction may change.  This helps drivers prevent userspace code</div><div class='hunk'>@@ -767,9 +764,3 @@ After the GPIO has been exported, gpio_export_link() allows creating</div><div class='ctx'> symlinks from elsewhere in sysfs to the GPIO sysfs node.  Drivers can</div><div class='ctx'> use this to provide the interface under their own device in sysfs with</div><div class='ctx'> a descriptive name.</div><div class='del'>-</div><div class='del'>-Drivers can use gpio_sysfs_set_active_low() to hide GPIO line polarity</div><div class='del'>-differences between boards from user space.  This only affects the</div><div class='del'>-sysfs interface.  Polarity change can be done both before and after</div><div class='del'>-gpio_export(), and previously enabled poll(2) support for either</div><div class='del'>-rising or falling edge will be reconfigured to follow this setting.</div><div class='head'>diff --git a/Documentation/gpio/sysfs.txt b/Documentation/gpio/sysfs.txt<br/>index c2c3a97f8ff7..535b6a8a7a7c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/gpio/sysfs.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/gpio/sysfs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/gpio/sysfs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/gpio/sysfs.txt</a></div><div class='hunk'>@@ -132,9 +132,6 @@ requested using gpio_request():</div><div class='ctx'> 	int gpiod_export_link(struct device *dev, const char *name,</div><div class='ctx'> 		      struct gpio_desc *desc);</div><div class='ctx'> </div><div class='del'>-	/* change the polarity of a GPIO node in sysfs */</div><div class='del'>-	int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value);</div><div class='del'>-</div><div class='ctx'> After a kernel driver requests a GPIO, it may only be made available in</div><div class='ctx'> the sysfs interface by gpiod_export(). The driver can control whether the</div><div class='ctx'> signal direction may change. This helps drivers prevent userspace code</div><div class='hunk'>@@ -148,8 +145,3 @@ After the GPIO has been exported, gpiod_export_link() allows creating</div><div class='ctx'> symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can</div><div class='ctx'> use this to provide the interface under their own device in sysfs with</div><div class='ctx'> a descriptive name.</div><div class='del'>-</div><div class='del'>-Drivers can use gpiod_sysfs_set_active_low() to hide GPIO line polarity</div><div class='del'>-differences between boards from user space. Polarity change can be done both</div><div class='del'>-before and after gpiod_export(), and previously enabled poll(2) support for</div><div class='del'>-either rising or falling edge will be reconfigured to follow this setting.</div><div class='head'>diff --git a/Documentation/hwmon/ntc_thermistor b/Documentation/hwmon/ntc_thermistor<br/>index c5e05e2900a3..1d4cc847c6fe 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwmon/ntc_thermistor?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/hwmon/ntc_thermistor</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/ntc_thermistor?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/hwmon/ntc_thermistor</a></div><div class='hunk'>@@ -2,8 +2,10 @@ Kernel driver ntc_thermistor</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='ctx'> Supported thermistors from Murata:</div><div class='del'>-* Murata NTC Thermistors NCP15WB473, NCP18WB473, NCP21WB473, NCP03WB473, NCP15WL333</div><div class='del'>-  Prefixes: 'ncp15wb473', 'ncp18wb473', 'ncp21wb473', 'ncp03wb473', 'ncp15wl333'</div><div class='add'>+* Murata NTC Thermistors NCP15WB473, NCP18WB473, NCP21WB473, NCP03WB473,</div><div class='add'>+  NCP15WL333, NCP03WF104</div><div class='add'>+  Prefixes: 'ncp15wb473', 'ncp18wb473', 'ncp21wb473', 'ncp03wb473',</div><div class='add'>+  'ncp15wl333', 'ncp03wf104'</div><div class='ctx'>   Datasheet: Publicly available at Murata</div><div class='ctx'> </div><div class='ctx'> Supported thermistors from EPCOS:</div><div class='head'>diff --git a/Documentation/hwmon/submitting-patches b/Documentation/hwmon/submitting-patches<br/>index 3d1bac399a22..d201828d202f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwmon/submitting-patches?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/hwmon/submitting-patches</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/submitting-patches?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/hwmon/submitting-patches</a></div><div class='hunk'>@@ -81,6 +81,13 @@ increase the chances of your change being accepted.</div><div class='ctx'> </div><div class='ctx'> * Provide a detect function if and only if a chip can be detected reliably.</div><div class='ctx'> </div><div class='add'>+* Only the following I2C addresses shall be probed: 0x18-0x1f, 0x28-0x2f,</div><div class='add'>+  0x48-0x4f, 0x58, 0x5c, 0x73 and 0x77. Probing other addresses is strongly</div><div class='add'>+  discouraged as it is known to cause trouble with other (non-hwmon) I2C</div><div class='add'>+  chips. If your chip lives at an address which can't be probed then the</div><div class='add'>+  device will have to be instantiated explicitly (which is always better</div><div class='add'>+  anyway.)</div><div class='add'>+</div><div class='ctx'> * Avoid writing to chip registers in the detect function. If you have to write,</div><div class='ctx'>   only do it after you have already gathered enough data to be certain that the</div><div class='ctx'>   detection is going to be successful.</div><div class='head'>diff --git a/Documentation/hwmon/tc74 b/Documentation/hwmon/tc74<br/>new file mode 100644<br/>index 000000000000..43027aad5f8e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/tc74?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/hwmon/tc74</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+Kernel driver tc74</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+   * Microchip TC74</div><div class='add'>+     Prefix: 'tc74'</div><div class='add'>+     Datasheet: Publicly available at Microchip website.</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Driver supports the above part.</div><div class='add'>+</div><div class='add'>+The tc74 has an 8-bit sensor, with 1 degree centigrade resolution</div><div class='add'>+and +- 2 degrees centigrade accuracy.</div><div class='add'>+</div><div class='add'>+Notes</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+Currently entering low power standby mode is not supported.</div><div class='head'>diff --git a/Documentation/hwmon/w83792d b/Documentation/hwmon/w83792d<br/>index 53f7b6866fec..f2ffc402ea45 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwmon/w83792d?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/hwmon/w83792d</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/w83792d?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/hwmon/w83792d</a></div><div class='hunk'>@@ -8,6 +8,7 @@ Supported chips:</div><div class='ctx'>     Datasheet: http://www.winbond.com.tw</div><div class='ctx'> </div><div class='ctx'> Author: Shane Huang (Winbond)</div><div class='add'>+Updated: Roger Lucas</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Module Parameters</div><div class='hunk'>@@ -38,9 +39,16 @@ parameter; this will put it into a more well-behaved state first.</div><div class='ctx'> The driver implements three temperature sensors, seven fan rotation speed</div><div class='ctx'> sensors, nine voltage sensors, and two automatic fan regulation</div><div class='ctx'> strategies called: Smart Fan I (Thermal Cruise mode) and Smart Fan II.</div><div class='del'>-Automatic fan control mode is possible only for fan1-fan3. Fan4-fan7 can run</div><div class='del'>-synchronized with selected fan (fan1-fan3). This functionality and manual PWM</div><div class='del'>-control for fan4-fan7 is not yet implemented.</div><div class='add'>+</div><div class='add'>+The driver also implements up to seven fan control outputs: pwm1-7.  Pwm1-7</div><div class='add'>+can be configured to PWM output or Analogue DC output via their associated</div><div class='add'>+pwmX_mode. Outputs pwm4 through pwm7 may or may not be present depending on</div><div class='add'>+how the W83792AD/D was configured by the BIOS.</div><div class='add'>+</div><div class='add'>+Automatic fan control mode is possible only for fan1-fan3.</div><div class='add'>+</div><div class='add'>+For all pwmX outputs, a value of 0 means minimum fan speed and a value of</div><div class='add'>+255 means maximum fan speed.</div><div class='ctx'> </div><div class='ctx'> Temperatures are measured in degrees Celsius and measurement resolution is 1</div><div class='ctx'> degC for temp1 and 0.5 degC for temp2 and temp3. An alarm is triggered when</div><div class='hunk'>@@ -157,14 +165,14 @@ for each fan.</div><div class='ctx'> /sys files</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='del'>-pwm[1-3] - this file stores PWM duty cycle or DC value (fan speed) in range:</div><div class='add'>+pwm[1-7] - this file stores PWM duty cycle or DC value (fan speed) in range:</div><div class='ctx'> 	0 (stop) to 255 (full)</div><div class='ctx'> pwm[1-3]_enable - this file controls mode of fan/temperature control:</div><div class='ctx'>             * 0 Disabled</div><div class='ctx'>             * 1 Manual mode</div><div class='ctx'>             * 2 Smart Fan II</div><div class='ctx'>             * 3 Thermal Cruise</div><div class='del'>-pwm[1-3]_mode - Select PWM of DC mode</div><div class='add'>+pwm[1-7]_mode - Select PWM or DC mode</div><div class='ctx'>             * 0 DC</div><div class='ctx'>             * 1 PWM</div><div class='ctx'> thermal_cruise[1-3] - Selects the desired temperature for cruise (degC)</div><div class='head'>diff --git a/Documentation/hwspinlock.txt b/Documentation/hwspinlock.txt<br/>index 62f7d4ea6e26..61c1ee98e59f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwspinlock.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/hwspinlock.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwspinlock.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/hwspinlock.txt</a></div><div class='hunk'>@@ -48,6 +48,16 @@ independent, drivers.</div><div class='ctx'>      ids for predefined purposes.</div><div class='ctx'>      Should be called from a process context (might sleep).</div><div class='ctx'> </div><div class='add'>+  int of_hwspin_lock_get_id(struct device_node *np, int index);</div><div class='add'>+   - retrieve the global lock id for an OF phandle-based specific lock.</div><div class='add'>+     This function provides a means for DT users of a hwspinlock module</div><div class='add'>+     to get the global lock id of a specific hwspinlock, so that it can</div><div class='add'>+     be requested using the normal hwspin_lock_request_specific() API.</div><div class='add'>+     The function returns a lock id number on success, -EPROBE_DEFER if</div><div class='add'>+     the hwspinlock device is not yet registered with the core, or other</div><div class='add'>+     error values.</div><div class='add'>+     Should be called from a process context (might sleep).</div><div class='add'>+</div><div class='ctx'>   int hwspin_lock_free(struct hwspinlock *hwlock);</div><div class='ctx'>    - free a previously-assigned hwspinlock; returns 0 on success, or an</div><div class='ctx'>      appropriate error code on failure (e.g. -EINVAL if the hwspinlock</div><div class='head'>diff --git a/Documentation/i2c/slave-interface b/Documentation/i2c/slave-interface<br/>index 389bb5d61854..2dee4e2d62df 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/i2c/slave-interface?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/i2c/slave-interface</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/i2c/slave-interface?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/i2c/slave-interface</a></div><div class='hunk'>@@ -3,16 +3,16 @@ Linux I2C slave interface description</div><div class='ctx'> </div><div class='ctx'> by Wolfram Sang &lt;wsa@sang-engineering.com&gt; in 2014-15</div><div class='ctx'> </div><div class='del'>-Linux can also be an I2C slave in case I2C controllers have slave support.</div><div class='del'>-Besides this HW requirement, one also needs a software backend providing the</div><div class='del'>-actual functionality. An example for this is the slave-eeprom driver, which</div><div class='del'>-acts as a dual memory driver. While another I2C master on the bus can access it</div><div class='del'>-like a regular EEPROM, the Linux I2C slave can access the content via sysfs and</div><div class='del'>-retrieve/provide information as needed. The software backend driver and the I2C</div><div class='del'>-bus driver communicate via events. Here is a small graph visualizing the data</div><div class='del'>-flow and the means by which data is transported. The dotted line marks only one</div><div class='del'>-example. The backend could also use e.g. a character device, be in-kernel</div><div class='del'>-only, or something completely different:</div><div class='add'>+Linux can also be an I2C slave if the I2C controller in use has slave</div><div class='add'>+functionality. For that to work, one needs slave support in the bus driver plus</div><div class='add'>+a hardware independent software backend providing the actual functionality. An</div><div class='add'>+example for the latter is the slave-eeprom driver, which acts as a dual memory</div><div class='add'>+driver. While another I2C master on the bus can access it like a regular</div><div class='add'>+EEPROM, the Linux I2C slave can access the content via sysfs and handle data as</div><div class='add'>+needed. The backend driver and the I2C bus driver communicate via events. Here</div><div class='add'>+is a small graph visualizing the data flow and the means by which data is</div><div class='add'>+transported. The dotted line marks only one example. The backend could also</div><div class='add'>+use a character device, be in-kernel only, or something completely different:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>               e.g. sysfs        I2C slave events        I/O registers</div><div class='hunk'>@@ -31,10 +31,10 @@ User manual</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='ctx'> I2C slave backends behave like standard I2C clients. So, you can instantiate</div><div class='del'>-them like described in the document 'instantiating-devices'. A quick example</div><div class='del'>-for instantiating the slave-eeprom driver from userspace:</div><div class='add'>+them as described in the document 'instantiating-devices'. A quick example for</div><div class='add'>+instantiating the slave-eeprom driver from userspace at address 0x64 on bus 1:</div><div class='ctx'> </div><div class='del'>-  # echo 0-0064 &gt; /sys/bus/i2c/drivers/i2c-slave-eeprom/bind</div><div class='add'>+  # echo slave-24c02 0x64 &gt; /sys/bus/i2c/devices/i2c-1/new_device</div><div class='ctx'> </div><div class='ctx'> Each backend should come with separate documentation to describe its specific</div><div class='ctx'> behaviour and setup.</div><div class='hunk'>@@ -43,6 +43,11 @@ behaviour and setup.</div><div class='ctx'> Developer manual</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='add'>+First, the events which are used by the bus driver and the backend will be</div><div class='add'>+described in detail. After that, some implementation hints for extending bus</div><div class='add'>+drivers and writing backends will be given.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> I2C slave events</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/input/rotary-encoder.txt b/Documentation/input/rotary-encoder.txt<br/>index 92e68bce13a4..5737e3590adb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/input/rotary-encoder.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/input/rotary-encoder.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/input/rotary-encoder.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/input/rotary-encoder.txt</a></div><div class='hunk'>@@ -33,7 +33,7 @@ The phase diagram of these two outputs look like this:</div><div class='ctx'> 	          one step (half-period mode)</div><div class='ctx'> </div><div class='ctx'> For more information, please see</div><div class='del'>-	http://en.wikipedia.org/wiki/Rotary_encoder</div><div class='add'>+	https://en.wikipedia.org/wiki/Rotary_encoder</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 1. Events / state machine</div><div class='head'>diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt<br/>index 51f4221657bf..611c52267d24 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ioctl/ioctl-number.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ioctl/ioctl-number.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ioctl/ioctl-number.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ioctl/ioctl-number.txt</a></div><div class='hunk'>@@ -321,6 +321,7 @@ Code  Seq#(hex)	Include File		Comments</div><div class='ctx'> 0xDB	00-0F	drivers/char/mwave/mwavepub.h</div><div class='ctx'> 0xDD	00-3F	ZFCP device driver	see drivers/s390/scsi/</div><div class='ctx'> 					&lt;mailto:aherrman@de.ibm.com&gt;</div><div class='add'>+0xE5	00-3F	linux/fuse.h</div><div class='ctx'> 0xEC	00-01	drivers/platform/chrome/cros_ec_dev.h	ChromeOS EC driver</div><div class='ctx'> 0xF3	00-3F	drivers/usb/misc/sisusbvga/sisusb.h	sisfb (in development)</div><div class='ctx'> 					&lt;mailto:thomas@winischhofer.net&gt;</div><div class='head'>diff --git a/Documentation/ja_JP/HOWTO b/Documentation/ja_JP/HOWTO<br/>index b61885c35ce1..5a0f2bdc2cf9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ja_JP/HOWTO?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/ja_JP/HOWTO</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ja_JP/HOWTO?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ja_JP/HOWTO</a></div><div class='hunk'>@@ -445,7 +445,7 @@ MAINTAINERS ファイルã�«ãƒªã‚¹ãƒˆã�Œã�‚ã‚Šã�¾ã�™ã�®ã�§å�‚ç…§ã�—ã�¦ã��ã� ã�•ã�</div><div class='ctx'> メールã�®å…ˆé ­ã�§ã�ªã��ã€�å�„引用行ã�®é–“ã�«ã�‚ã�ªã�Ÿã�®è¨€ã�„ã�Ÿã�„ã�“ã�¨ã‚’追加ã�™ã‚‹ã�¹ã��ã�§</div><div class='ctx'> ã�™ã€‚</div><div class='ctx'> </div><div class='del'>-ã‚‚ã�—パッãƒ�をメールã�«ä»˜ã�‘ã‚‹å ´å�ˆã�¯ã€�Documentaion/SubmittingPatches ã�«æ��</div><div class='add'>+ã‚‚ã�—パッãƒ�をメールã�«ä»˜ã�‘ã‚‹å ´å�ˆã�¯ã€�Documentation/SubmittingPatches ã�«æ��</div><div class='ctx'> 示ã�•ã‚Œã�¦ã�„るよã�†ã�«ã€�ã��ã‚Œã�¯ プレーンã�ªå�¯èª­ãƒ†ã‚­ã‚¹ãƒˆã�«ã�™ã‚‹ã�“ã�¨ã‚’忘れã�ªã�„</div><div class='ctx'> よã�†ã�«ã�—ã�¾ã�—ょã�†ã€‚カーãƒ�ル開発者ã�¯ 添付や圧縮ã�—ã�Ÿãƒ‘ッãƒ�を扱ã�„ã�Ÿã�Œã‚Šã�¾</div><div class='ctx'> ã�›ã‚“-</div><div class='head'>diff --git a/Documentation/kasan.txt b/Documentation/kasan.txt<br/>index 4692241789b1..0d32355a4c34 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kasan.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/kasan.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kasan.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/kasan.txt</a></div><div class='hunk'>@@ -150,7 +150,7 @@ AddressSanitizer dedicates 1/8 of kernel memory to its shadow memory</div><div class='ctx'> (e.g. 16TB to cover 128TB on x86_64) and uses direct mapping with a scale and</div><div class='ctx'> offset to translate a memory address to its corresponding shadow address.</div><div class='ctx'> </div><div class='del'>-Here is the function witch translate an address to its corresponding shadow</div><div class='add'>+Here is the function which translates an address to its corresponding shadow</div><div class='ctx'> address:</div><div class='ctx'> </div><div class='ctx'> static inline void *kasan_mem_to_shadow(const void *addr)</div><div class='head'>diff --git a/Documentation/kbuild/headers_install.txt b/Documentation/kbuild/headers_install.txt<br/>index 951eb9f1e040..f0153adb95e2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kbuild/headers_install.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/kbuild/headers_install.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kbuild/headers_install.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/kbuild/headers_install.txt</a></div><div class='hunk'>@@ -24,7 +24,7 @@ The "make headers_install" command can be run in the top level directory of the</div><div class='ctx'> kernel source code (or using a standard out-of-tree build).  It takes two</div><div class='ctx'> optional arguments:</div><div class='ctx'> </div><div class='del'>-  make headers_install ARCH=i386 INSTALL_HDR_PATH=/usr/include</div><div class='add'>+  make headers_install ARCH=i386 INSTALL_HDR_PATH=/usr</div><div class='ctx'> </div><div class='ctx'> ARCH indicates which architecture to produce headers for, and defaults to the</div><div class='ctx'> current architecture.  The linux/asm directory of the exported kernel headers</div><div class='hunk'>@@ -33,8 +33,11 @@ the command:</div><div class='ctx'> </div><div class='ctx'>   ls -d include/asm-* | sed 's/.*-//'</div><div class='ctx'> </div><div class='del'>-INSTALL_HDR_PATH indicates where to install the headers.  It defaults to</div><div class='del'>-"./usr/include".</div><div class='add'>+INSTALL_HDR_PATH indicates where to install the headers. It defaults to</div><div class='add'>+"./usr".</div><div class='add'>+</div><div class='add'>+An 'include' directory is automatically created inside INSTALL_HDR_PATH and</div><div class='add'>+headers are installed in 'INSTALL_HDR_PATH/include'.</div><div class='ctx'> </div><div class='ctx'> The command "make headers_install_all" exports headers for all architectures</div><div class='ctx'> simultaneously.  (This is mostly of interest to distribution maintainers,</div><div class='head'>diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt<br/>index 74b6c6d97210..13f888a02a3d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kbuild/makefiles.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/kbuild/makefiles.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kbuild/makefiles.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/kbuild/makefiles.txt</a></div><div class='hunk'>@@ -755,8 +755,8 @@ Additional files can be specified in kbuild makefiles by use of $(clean-files).</div><div class='ctx'> 		#lib/Makefile</div><div class='ctx'> 		clean-files := crc32table.h</div><div class='ctx'> </div><div class='del'>-When executing "make clean", the two files "devlist.h classlist.h" will be</div><div class='del'>-deleted. Kbuild will assume files to be in the same relative directory as the</div><div class='add'>+When executing "make clean", the file "crc32table.h" will be deleted.</div><div class='add'>+Kbuild will assume files to be in the same relative directory as the</div><div class='ctx'> Makefile, except if prefixed with $(objtree).</div><div class='ctx'> </div><div class='ctx'> To delete a directory hierarchy use:</div><div class='hunk'>@@ -952,6 +952,14 @@ When kbuild executes, the following steps are followed (roughly):</div><div class='ctx'> 	$(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic</div><div class='ctx'> 	mode) if this option is supported by $(AR).</div><div class='ctx'> </div><div class='add'>+    ARCH_CPPFLAGS, ARCH_AFLAGS, ARCH_CFLAGS   Overrides the kbuild defaults</div><div class='add'>+</div><div class='add'>+	These variables are appended to the KBUILD_CPPFLAGS,</div><div class='add'>+	KBUILD_AFLAGS, and KBUILD_CFLAGS, respectively, after the</div><div class='add'>+	top-level Makefile has set any other flags. This provides a</div><div class='add'>+	means for an architecture to override the defaults.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> --- 6.2 Add prerequisites to archheaders:</div><div class='ctx'> </div><div class='ctx'> 	The archheaders: rule is used to generate header files that</div><div class='head'>diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt<br/>index 6726139bd289..1d6f0459cd7b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kernel-parameters.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/kernel-parameters.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kernel-parameters.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/kernel-parameters.txt</a></div><div class='hunk'>@@ -179,11 +179,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 			See also Documentation/power/runtime_pm.txt, pci=noacpi</div><div class='ctx'> </div><div class='del'>-	acpi_rsdp=	[ACPI,EFI,KEXEC]</div><div class='del'>-			Pass the RSDP address to the kernel, mostly used</div><div class='del'>-			on machines running EFI runtime service to boot the</div><div class='del'>-			second kernel for kdump.</div><div class='del'>-</div><div class='ctx'> 	acpi_apic_instance=	[ACPI, IOAPIC]</div><div class='ctx'> 			Format: &lt;int&gt;</div><div class='ctx'> 			2: use 2nd APIC table, if available</div><div class='hunk'>@@ -197,6 +192,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			(e.g. thinkpad_acpi, sony_acpi, etc.) instead</div><div class='ctx'> 			of the ACPI video.ko driver.</div><div class='ctx'> </div><div class='add'>+	acpica_no_return_repair [HW, ACPI]</div><div class='add'>+			Disable AML predefined validation mechanism</div><div class='add'>+			This mechanism can repair the evaluation result to make</div><div class='add'>+			the return objects more ACPI specification compliant.</div><div class='add'>+			This option is useful for developers to identify the</div><div class='add'>+			root cause of an AML interpreter issue when the issue</div><div class='add'>+			has something to do with the repair mechanism.</div><div class='add'>+</div><div class='ctx'> 	acpi.debug_layer=	[HW,ACPI,ACPI_DEBUG]</div><div class='ctx'> 	acpi.debug_level=	[HW,ACPI,ACPI_DEBUG]</div><div class='ctx'> 			Format: &lt;int&gt;</div><div class='hunk'>@@ -225,6 +228,22 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			unusable.  The "log_buf_len" parameter may be useful</div><div class='ctx'> 			if you need to capture more output.</div><div class='ctx'> </div><div class='add'>+	acpi_enforce_resources=	[ACPI]</div><div class='add'>+			{ strict | lax | no }</div><div class='add'>+			Check for resource conflicts between native drivers</div><div class='add'>+			and ACPI OperationRegions (SystemIO and SystemMemory</div><div class='add'>+			only). IO ports and memory declared in ACPI might be</div><div class='add'>+			used by the ACPI subsystem in arbitrary AML code and</div><div class='add'>+			can interfere with legacy drivers.</div><div class='add'>+			strict (default): access to resources claimed by ACPI</div><div class='add'>+			is denied; legacy drivers trying to access reserved</div><div class='add'>+			resources will fail to bind to device using them.</div><div class='add'>+			lax: access to resources claimed by ACPI is allowed;</div><div class='add'>+			legacy drivers trying to access reserved resources</div><div class='add'>+			will bind successfully but a warning message is logged.</div><div class='add'>+			no: ACPI OperationRegions are not marked as reserved,</div><div class='add'>+			no further checks are performed.</div><div class='add'>+</div><div class='ctx'> 	acpi_force_table_verification	[HW,ACPI]</div><div class='ctx'> 			Enable table checksum verification during early stage.</div><div class='ctx'> 			By default, this is disabled due to x86 early mapping</div><div class='hunk'>@@ -253,6 +272,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			This feature is enabled by default.</div><div class='ctx'> 			This option allows to turn off the feature.</div><div class='ctx'> </div><div class='add'>+	acpi_no_memhotplug [ACPI] Disable memory hotplug.  Useful for kdump</div><div class='add'>+			   kernels.</div><div class='add'>+</div><div class='ctx'> 	acpi_no_static_ssdt	[HW,ACPI]</div><div class='ctx'> 			Disable installation of static SSDTs at early boot time</div><div class='ctx'> 			By default, SSDTs contained in the RSDT/XSDT will be</div><div class='hunk'>@@ -263,17 +285,20 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			dynamic table installation which will install SSDT</div><div class='ctx'> 			tables to /sys/firmware/acpi/tables/dynamic.</div><div class='ctx'> </div><div class='del'>-	acpica_no_return_repair [HW, ACPI]</div><div class='del'>-			Disable AML predefined validation mechanism</div><div class='del'>-			This mechanism can repair the evaluation result to make</div><div class='del'>-			the return objects more ACPI specification compliant.</div><div class='del'>-			This option is useful for developers to identify the</div><div class='del'>-			root cause of an AML interpreter issue when the issue</div><div class='del'>-			has something to do with the repair mechanism.</div><div class='add'>+	acpi_rsdp=	[ACPI,EFI,KEXEC]</div><div class='add'>+			Pass the RSDP address to the kernel, mostly used</div><div class='add'>+			on machines running EFI runtime service to boot the</div><div class='add'>+			second kernel for kdump.</div><div class='ctx'> </div><div class='ctx'> 	acpi_os_name=	[HW,ACPI] Tell ACPI BIOS the name of the OS</div><div class='ctx'> 			Format: To spoof as Windows 98: ="Microsoft Windows"</div><div class='ctx'> </div><div class='add'>+	acpi_rev_override [ACPI] Override the _REV object to return 5 (instead</div><div class='add'>+			of 2 which is mandated by ACPI 6) as the supported ACPI</div><div class='add'>+			specification revision (when using this switch, it may</div><div class='add'>+			be necessary to carry out a cold reboot _twice_ in a</div><div class='add'>+			row to make it take effect on the platform firmware).</div><div class='add'>+</div><div class='ctx'> 	acpi_osi=	[HW,ACPI] Modify list of supported OS interface strings</div><div class='ctx'> 			acpi_osi="string1"	# add string1</div><div class='ctx'> 			acpi_osi="!string2"	# remove string2</div><div class='hunk'>@@ -365,25 +390,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			Use timer override. For some broken Nvidia NF5 boards</div><div class='ctx'> 			that require a timer override, but don't have HPET</div><div class='ctx'> </div><div class='del'>-	acpi_enforce_resources=	[ACPI]</div><div class='del'>-			{ strict | lax | no }</div><div class='del'>-			Check for resource conflicts between native drivers</div><div class='del'>-			and ACPI OperationRegions (SystemIO and SystemMemory</div><div class='del'>-			only). IO ports and memory declared in ACPI might be</div><div class='del'>-			used by the ACPI subsystem in arbitrary AML code and</div><div class='del'>-			can interfere with legacy drivers.</div><div class='del'>-			strict (default): access to resources claimed by ACPI</div><div class='del'>-			is denied; legacy drivers trying to access reserved</div><div class='del'>-			resources will fail to bind to device using them.</div><div class='del'>-			lax: access to resources claimed by ACPI is allowed;</div><div class='del'>-			legacy drivers trying to access reserved resources</div><div class='del'>-			will bind successfully but a warning message is logged.</div><div class='del'>-			no: ACPI OperationRegions are not marked as reserved,</div><div class='del'>-			no further checks are performed.</div><div class='del'>-</div><div class='del'>-	acpi_no_memhotplug [ACPI] Disable memory hotplug.  Useful for kdump</div><div class='del'>-			   kernels.</div><div class='del'>-</div><div class='ctx'> 	add_efi_memmap	[EFI; X86] Include EFI memory map in</div><div class='ctx'> 			kernel's map of available physical RAM.</div><div class='ctx'> </div><div class='hunk'>@@ -746,6 +752,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 	cpuidle.off=1	[CPU_IDLE]</div><div class='ctx'> 			disable the cpuidle sub-system</div><div class='ctx'> </div><div class='add'>+	cpu_init_udelay=N</div><div class='add'>+			[X86] Delay for N microsec between assert and de-assert</div><div class='add'>+			of APIC INIT to start processors.  This delay occurs</div><div class='add'>+			on every CPU online, such as boot, and resume from suspend.</div><div class='add'>+			Default: 10000</div><div class='add'>+</div><div class='ctx'> 	cpcihp_generic=	[HW,PCI] Generic port I/O CompactPCI driver</div><div class='ctx'> 			Format:</div><div class='ctx'> 			&lt;first_slot&gt;,&lt;last_slot&gt;,&lt;port&gt;,&lt;enum_bit&gt;[,&lt;debug&gt;]</div><div class='hunk'>@@ -937,12 +949,19 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			Enable debug messages at boot time.  See</div><div class='ctx'> 			Documentation/dynamic-debug-howto.txt for details.</div><div class='ctx'> </div><div class='add'>+	nompx		[X86] Disables Intel Memory Protection Extensions.</div><div class='add'>+			See Documentation/x86/intel_mpx.txt for more</div><div class='add'>+			information about the feature.</div><div class='add'>+</div><div class='ctx'> 	eagerfpu=	[X86]</div><div class='ctx'> 			on	enable eager fpu restore</div><div class='ctx'> 			off	disable eager fpu restore</div><div class='ctx'> 			auto	selects the default scheme, which automatically</div><div class='ctx'> 				enables eagerfpu restore for xsaveopt.</div><div class='ctx'> </div><div class='add'>+	module.async_probe [KNL]</div><div class='add'>+			Enable asynchronous probe on this module.</div><div class='add'>+</div><div class='ctx'> 	early_ioremap_debug [KNL]</div><div class='ctx'> 			Enable debug messages in early_ioremap support. This</div><div class='ctx'> 			is useful for tracking down temporary early mappings</div><div class='hunk'>@@ -959,14 +978,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 		uart[8250],io,&lt;addr&gt;[,options]</div><div class='ctx'> 		uart[8250],mmio,&lt;addr&gt;[,options]</div><div class='ctx'> 		uart[8250],mmio32,&lt;addr&gt;[,options]</div><div class='add'>+		uart[8250],mmio32be,&lt;addr&gt;[,options]</div><div class='ctx'> 		uart[8250],0x&lt;addr&gt;[,options]</div><div class='ctx'> 			Start an early, polled-mode console on the 8250/16550</div><div class='ctx'> 			UART at the specified I/O port or MMIO address.</div><div class='ctx'> 			MMIO inter-register address stride is either 8-bit</div><div class='del'>-			(mmio) or 32-bit (mmio32).</div><div class='del'>-			If none of [io|mmio|mmio32], &lt;addr&gt; is assumed to be</div><div class='del'>-			equivalent to 'mmio'. 'options' are specified in the</div><div class='del'>-			same format described for "console=ttyS&lt;n&gt;"; if</div><div class='add'>+			(mmio) or 32-bit (mmio32 or mmio32be).</div><div class='add'>+			If none of [io|mmio|mmio32|mmio32be], &lt;addr&gt; is assumed</div><div class='add'>+			to be equivalent to 'mmio'. 'options' are specified</div><div class='add'>+			in the same format described for "console=ttyS&lt;n&gt;"; if</div><div class='ctx'> 			unspecified, the h/w is not initialized.</div><div class='ctx'> </div><div class='ctx'> 		pl011,&lt;addr&gt;</div><div class='hunk'>@@ -1009,6 +1029,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			earlyprintk=serial[,0x...[,baudrate]]</div><div class='ctx'> 			earlyprintk=ttySn[,baudrate]</div><div class='ctx'> 			earlyprintk=dbgp[debugController#]</div><div class='add'>+			earlyprintk=pciserial,bus:device.function[,baudrate]</div><div class='ctx'> </div><div class='ctx'> 			earlyprintk is useful when the kernel crashes before</div><div class='ctx'> 			the normal console is initialized. It is not enabled by</div><div class='hunk'>@@ -1398,7 +1419,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			The list of supported hash algorithms is defined</div><div class='ctx'> 			in crypto/hash_info.h.</div><div class='ctx'> </div><div class='del'>-	ima_tcb		[IMA]</div><div class='add'>+	ima_policy=	[IMA]</div><div class='add'>+			The builtin measurement policy to load during IMA</div><div class='add'>+			setup.  Specyfing "tcb" as the value, measures all</div><div class='add'>+			programs exec'd, files mmap'd for exec, and all files</div><div class='add'>+			opened with the read mode bit set by either the</div><div class='add'>+			effective uid (euid=0) or uid=0.</div><div class='add'>+			Format: "tcb"</div><div class='add'>+</div><div class='add'>+	ima_tcb		[IMA] Deprecated.  Use ima_policy= instead.</div><div class='ctx'> 			Load a policy which meets the needs of the Trusted</div><div class='ctx'> 			Computing Base.  This means IMA will measure all</div><div class='ctx'> 			programs exec'd, files mmap'd for exec, and all files</div><div class='hunk'>@@ -1406,7 +1435,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	ima_template=   [IMA]</div><div class='ctx'> 			Select one of defined IMA measurements template formats.</div><div class='del'>-			Formats: { "ima" | "ima-ng" }</div><div class='add'>+			Formats: { "ima" | "ima-ng" | "ima-sig" }</div><div class='ctx'> 			Default: "ima-ng"</div><div class='ctx'> </div><div class='ctx'> 	ima_template_fmt=</div><div class='hunk'>@@ -1780,6 +1809,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 			* [no]ncq: Turn on or off NCQ.</div><div class='ctx'> </div><div class='add'>+			* [no]ncqtrim: Turn off queued DSM TRIM.</div><div class='add'>+</div><div class='ctx'> 			* nohrst, nosrst, norst: suppress hard, soft</div><div class='ctx'>                           and both resets.</div><div class='ctx'> </div><div class='hunk'>@@ -2443,7 +2474,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	nomca		[IA-64] Disable machine check abort handling</div><div class='ctx'> </div><div class='del'>-	nomce		[X86-32] Machine Check Exception</div><div class='add'>+	nomce		[X86-32] Disable Machine Check Exception</div><div class='ctx'> </div><div class='ctx'> 	nomfgpt		[X86-32] Disable Multi-Function General Purpose</div><div class='ctx'> 			Timer usage (for AMD Geode machines).</div><div class='hunk'>@@ -2998,11 +3029,34 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			Set maximum number of finished RCU callbacks to</div><div class='ctx'> 			process in one batch.</div><div class='ctx'> </div><div class='add'>+	rcutree.dump_tree=	[KNL]</div><div class='add'>+			Dump the structure of the rcu_node combining tree</div><div class='add'>+			out at early boot.  This is used for diagnostic</div><div class='add'>+			purposes, to verify correct tree setup.</div><div class='add'>+</div><div class='add'>+	rcutree.gp_cleanup_delay=	[KNL]</div><div class='add'>+			Set the number of jiffies to delay each step of</div><div class='add'>+			RCU grace-period cleanup.  This only has effect</div><div class='add'>+			when CONFIG_RCU_TORTURE_TEST_SLOW_CLEANUP is set.</div><div class='add'>+</div><div class='ctx'> 	rcutree.gp_init_delay=	[KNL]</div><div class='ctx'> 			Set the number of jiffies to delay each step of</div><div class='ctx'> 			RCU grace-period initialization.  This only has</div><div class='del'>-			effect when CONFIG_RCU_TORTURE_TEST_SLOW_INIT is</div><div class='del'>-			set.</div><div class='add'>+			effect when CONFIG_RCU_TORTURE_TEST_SLOW_INIT</div><div class='add'>+			is set.</div><div class='add'>+</div><div class='add'>+	rcutree.gp_preinit_delay=	[KNL]</div><div class='add'>+			Set the number of jiffies to delay each step of</div><div class='add'>+			RCU grace-period pre-initialization, that is,</div><div class='add'>+			the propagation of recent CPU-hotplug changes up</div><div class='add'>+			the rcu_node combining tree.  This only has effect</div><div class='add'>+			when CONFIG_RCU_TORTURE_TEST_SLOW_PREINIT is set.</div><div class='add'>+</div><div class='add'>+	rcutree.rcu_fanout_exact= [KNL]</div><div class='add'>+			Disable autobalancing of the rcu_node combining</div><div class='add'>+			tree.  This is used by rcutorture, and might</div><div class='add'>+			possibly be useful for architectures having high</div><div class='add'>+			cache-to-cache transfer latencies.</div><div class='ctx'> </div><div class='ctx'> 	rcutree.rcu_fanout_leaf= [KNL]</div><div class='ctx'> 			Increase the number of CPUs assigned to each</div><div class='hunk'>@@ -3107,7 +3161,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			test, hence the "fake".</div><div class='ctx'> </div><div class='ctx'> 	rcutorture.nreaders= [KNL]</div><div class='del'>-			Set number of RCU readers.</div><div class='add'>+			Set number of RCU readers.  The value -1 selects</div><div class='add'>+			N-1, where N is the number of CPUs.  A value</div><div class='add'>+			"n" less than -1 selects N-n-2, where N is again</div><div class='add'>+			the number of CPUs.  For example, -2 selects N</div><div class='add'>+			(the number of CPUs), -3 selects N+1, and so on.</div><div class='ctx'> </div><div class='ctx'> 	rcutorture.object_debug= [KNL]</div><div class='ctx'> 			Enable debug-object double-call_rcu() testing.</div><div class='head'>diff --git a/Documentation/kmemleak.txt b/Documentation/kmemleak.txt<br/>index 45e777f4e41d..18e24abb3ecf 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kmemleak.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/kmemleak.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kmemleak.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/kmemleak.txt</a></div><div class='hunk'>@@ -6,7 +6,7 @@ Introduction</div><div class='ctx'> </div><div class='ctx'> Kmemleak provides a way of detecting possible kernel memory leaks in a</div><div class='ctx'> way similar to a tracing garbage collector</div><div class='del'>-(http://en.wikipedia.org/wiki/Garbage_collection_%28computer_science%29#Tracing_garbage_collectors),</div><div class='add'>+(https://en.wikipedia.org/wiki/Garbage_collection_%28computer_science%29#Tracing_garbage_collectors),</div><div class='ctx'> with the difference that the orphan objects are not freed but only</div><div class='ctx'> reported via /sys/kernel/debug/kmemleak. A similar method is used by the</div><div class='ctx'> Valgrind tool (memcheck --leak-check) to detect the memory leaks in</div><div class='head'>diff --git a/Documentation/laptops/.gitignore b/Documentation/laptops/.gitignore<br/>index da2bd065f4bc..9fc984e64386 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/laptops/.gitignore?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/laptops/.gitignore</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/laptops/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/laptops/.gitignore</a></div><div class='hunk'>@@ -1,2 +1 @@</div><div class='ctx'> dslm</div><div class='del'>-freefall</div><div class='head'>diff --git a/Documentation/laptops/00-INDEX b/Documentation/laptops/00-INDEX<br/>index a3b4f209e562..7c0ac2a26b9e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/laptops/00-INDEX?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/laptops/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/laptops/00-INDEX?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/laptops/00-INDEX</a></div><div class='hunk'>@@ -8,8 +8,6 @@ disk-shock-protection.txt</div><div class='ctx'> 	- information on hard disk shock protection.</div><div class='ctx'> dslm.c</div><div class='ctx'> 	- Simple Disk Sleep Monitor program</div><div class='del'>-freefall.c</div><div class='del'>-	- (HP/DELL) laptop accelerometer program for disk protection.</div><div class='ctx'> laptop-mode.txt</div><div class='ctx'> 	- how to conserve battery power using laptop-mode.</div><div class='ctx'> sony-laptop.txt</div><div class='head'>diff --git a/Documentation/laptops/Makefile b/Documentation/laptops/Makefile<br/>index 2b0fa5edf1d3..0abe44f68965 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/laptops/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/laptops/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/laptops/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/laptops/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # List of programs to build</div><div class='del'>-hostprogs-y := dslm freefall</div><div class='add'>+hostprogs-y := dslm</div><div class='ctx'> </div><div class='ctx'> # Tell kbuild to always build the programs</div><div class='ctx'> always := $(hostprogs-y)</div><div class='head'>diff --git a/Documentation/leds/leds-class-flash.txt b/Documentation/leds/leds-class-flash.txt<br/>index 19bb67355424..8da3c6f4b60b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/leds/leds-class-flash.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/leds/leds-class-flash.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/leds/leds-class-flash.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-class-flash.txt</a></div><div class='hunk'>@@ -20,3 +20,54 @@ Following sysfs attributes are exposed for controlling flash LED devices:</div><div class='ctx'> 	- max_flash_timeout</div><div class='ctx'> 	- flash_strobe</div><div class='ctx'> 	- flash_fault</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+V4L2 flash wrapper for flash LEDs</div><div class='add'>+=================================</div><div class='add'>+</div><div class='add'>+A LED subsystem driver can be controlled also from the level of VideoForLinux2</div><div class='add'>+subsystem. In order to enable this CONFIG_V4L2_FLASH_LED_CLASS symbol has to</div><div class='add'>+be defined in the kernel config.</div><div class='add'>+</div><div class='add'>+The driver must call the v4l2_flash_init function to get registered in the</div><div class='add'>+V4L2 subsystem. The function takes six arguments:</div><div class='add'>+- dev       : flash device, e.g. an I2C device</div><div class='add'>+- of_node   : of_node of the LED, may be NULL if the same as device's</div><div class='add'>+- fled_cdev : LED flash class device to wrap</div><div class='add'>+- iled_cdev : LED flash class device representing indicator LED associated with</div><div class='add'>+	      fled_cdev, may be NULL</div><div class='add'>+- ops : V4L2 specific ops</div><div class='add'>+	* external_strobe_set - defines the source of the flash LED strobe -</div><div class='add'>+		V4L2_CID_FLASH_STROBE control or external source, typically</div><div class='add'>+		a sensor, which makes it possible to synchronise the flash</div><div class='add'>+		strobe start with exposure start,</div><div class='add'>+	* intensity_to_led_brightness and led_brightness_to_intensity - perform</div><div class='add'>+		enum led_brightness &lt;-&gt; V4L2 intensity conversion in a device</div><div class='add'>+		specific manner - they can be used for devices with non-linear</div><div class='add'>+		LED current scale.</div><div class='add'>+- config : configuration for V4L2 Flash sub-device</div><div class='add'>+	* dev_name - the name of the media entity, unique in the system,</div><div class='add'>+	* flash_faults - bitmask of flash faults that the LED flash class</div><div class='add'>+		device can report; corresponding LED_FAULT* bit definitions are</div><div class='add'>+		available in &lt;linux/led-class-flash.h&gt;,</div><div class='add'>+	* torch_intensity - constraints for the LED in TORCH mode</div><div class='add'>+		in microamperes,</div><div class='add'>+	* indicator_intensity - constraints for the indicator LED</div><div class='add'>+		in microamperes,</div><div class='add'>+	* has_external_strobe - determines whether the flash strobe source</div><div class='add'>+		can be switched to external,</div><div class='add'>+</div><div class='add'>+On remove the v4l2_flash_release function has to be called, which takes one</div><div class='add'>+argument - struct v4l2_flash pointer returned previously by v4l2_flash_init.</div><div class='add'>+This function can be safely called with NULL or error pointer argument.</div><div class='add'>+</div><div class='add'>+Please refer to drivers/leds/leds-max77693.c for an exemplary usage of the</div><div class='add'>+v4l2 flash wrapper.</div><div class='add'>+</div><div class='add'>+Once the V4L2 sub-device is registered by the driver which created the Media</div><div class='add'>+controller device, the sub-device node acts just as a node of a native V4L2</div><div class='add'>+flash API device would. The calls are simply routed to the LED flash API.</div><div class='add'>+</div><div class='add'>+Opening the V4L2 flash sub-device makes the LED subsystem sysfs interface</div><div class='add'>+unavailable. The interface is re-enabled after the V4L2 flash sub-device</div><div class='add'>+is closed.</div><div class='head'>diff --git a/Documentation/leds/leds-class.txt b/Documentation/leds/leds-class.txt<br/>index 79699c200766..62261c04060a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/leds/leds-class.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/leds/leds-class.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/leds/leds-class.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-class.txt</a></div><div class='hunk'>@@ -2,9 +2,6 @@</div><div class='ctx'> LED handling under Linux</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='del'>-If you're reading this and thinking about keyboard leds, these are</div><div class='del'>-handled by the input subsystem and the led class is *not* needed.</div><div class='del'>-</div><div class='ctx'> In its simplest form, the LED class just allows control of LEDs from</div><div class='ctx'> userspace. LEDs appear in /sys/class/leds/. The maximum brightness of the</div><div class='ctx'> LED is defined in max_brightness file. The brightness file will set the brightness</div><div class='head'>diff --git a/Documentation/leds/leds-lp5523.txt b/Documentation/leds/leds-lp5523.txt<br/>index 5b3e91d4ac59..0dbbd279c9b9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/leds/leds-lp5523.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/leds/leds-lp5523.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/leds/leds-lp5523.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/leds/leds-lp5523.txt</a></div><div class='hunk'>@@ -49,6 +49,36 @@ There are two ways to run LED patterns.</div><div class='ctx'> 2) Firmware interface - LP55xx common interface</div><div class='ctx'>   For the details, please refer to 'firmware' section in leds-lp55xx.txt</div><div class='ctx'> </div><div class='add'>+LP5523 has three master faders. If a channel is mapped to one of</div><div class='add'>+the master faders, its output is dimmed based on the value of the master</div><div class='add'>+fader.</div><div class='add'>+</div><div class='add'>+For example,</div><div class='add'>+</div><div class='add'>+  echo "123000123" &gt; master_fader_leds</div><div class='add'>+</div><div class='add'>+creates the following channel-fader mappings:</div><div class='add'>+</div><div class='add'>+  channel 0,6 to master_fader1</div><div class='add'>+  channel 1,7 to master_fader2</div><div class='add'>+  channel 2,8 to master_fader3</div><div class='add'>+</div><div class='add'>+Then, to have 25% of the original output on channel 0,6:</div><div class='add'>+</div><div class='add'>+  echo 64 &gt; master_fader1</div><div class='add'>+</div><div class='add'>+To have 0% of the original output (i.e. no output) channel 1,7:</div><div class='add'>+</div><div class='add'>+  echo 0 &gt; master_fader2</div><div class='add'>+</div><div class='add'>+To have 100% of the original output (i.e. no dimming) on channel 2,8:</div><div class='add'>+</div><div class='add'>+  echo 255 &gt; master_fader3</div><div class='add'>+</div><div class='add'>+To clear all master fader controls:</div><div class='add'>+</div><div class='add'>+  echo "000000000" &gt; master_fader_leds</div><div class='add'>+</div><div class='ctx'> Selftest uses always the current from the platform data.</div><div class='ctx'> </div><div class='ctx'> Each channel contains led current settings.</div><div class='head'>diff --git a/Documentation/lockup-watchdogs.txt b/Documentation/lockup-watchdogs.txt<br/>index ab0baa692c13..22dd6af2e4bd 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/lockup-watchdogs.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/lockup-watchdogs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/lockup-watchdogs.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/lockup-watchdogs.txt</a></div><div class='hunk'>@@ -61,3 +61,21 @@ As explained above, a kernel knob is provided that allows</div><div class='ctx'> administrators to configure the period of the hrtimer and the perf</div><div class='ctx'> event. The right value for a particular environment is a trade-off</div><div class='ctx'> between fast response to lockups and detection overhead.</div><div class='add'>+</div><div class='add'>+By default, the watchdog runs on all online cores.  However, on a</div><div class='add'>+kernel configured with NO_HZ_FULL, by default the watchdog runs only</div><div class='add'>+on the housekeeping cores, not the cores specified in the "nohz_full"</div><div class='add'>+boot argument.  If we allowed the watchdog to run by default on</div><div class='add'>+the "nohz_full" cores, we would have to run timer ticks to activate</div><div class='add'>+the scheduler, which would prevent the "nohz_full" functionality</div><div class='add'>+from protecting the user code on those cores from the kernel.</div><div class='add'>+Of course, disabling it by default on the nohz_full cores means that</div><div class='add'>+when those cores do enter the kernel, by default we will not be</div><div class='add'>+able to detect if they lock up.  However, allowing the watchdog</div><div class='add'>+to continue to run on the housekeeping (non-tickless) cores means</div><div class='add'>+that we will continue to detect lockups properly on those cores.</div><div class='add'>+</div><div class='add'>+In either case, the set of cores excluded from running the watchdog</div><div class='add'>+may be adjusted via the kernel.watchdog_cpumask sysctl.  For</div><div class='add'>+nohz_full cores, this may be useful for debugging a case where the</div><div class='add'>+kernel seems to be hanging on the nohz_full cores.</div><div class='head'>diff --git a/Documentation/magic-number.txt b/Documentation/magic-number.txt<br/>index 4c8e142db2ef..28befed9f610 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/magic-number.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/magic-number.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/magic-number.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/magic-number.txt</a></div><div class='hunk'>@@ -116,7 +116,6 @@ COW_MAGIC             0x4f4f4f4d  cow_header_v1     arch/um/drivers/ubd_user.c</div><div class='ctx'> I810_CARD_MAGIC       0x5072696E  i810_card         sound/oss/i810_audio.c</div><div class='ctx'> TRIDENT_CARD_MAGIC    0x5072696E  trident_card      sound/oss/trident.c</div><div class='ctx'> ROUTER_MAGIC          0x524d4157  wan_device        [in wanrouter.h pre 3.9]</div><div class='del'>-SCC_MAGIC             0x52696368  gs_port           drivers/char/scc.h</div><div class='ctx'> SAVEKMSG_MAGIC1       0x53415645  savekmsg          arch/*/amiga/config.c</div><div class='ctx'> GDA_MAGIC             0x58464552  gda               arch/mips/include/asm/sn/gda.h</div><div class='ctx'> RED_MAGIC1            0x5a2cf071  (any)             mm/slab.c</div><div class='hunk'>@@ -138,7 +137,6 @@ KMALLOC_MAGIC         0x87654321  snd_alloc_track   sound/core/memory.c</div><div class='ctx'> PWC_MAGIC             0x89DC10AB  pwc_device        drivers/usb/media/pwc.h</div><div class='ctx'> NBD_REPLY_MAGIC       0x96744668  nbd_reply         include/linux/nbd.h</div><div class='ctx'> ENI155_MAGIC          0xa54b872d  midway_eprom	    drivers/atm/eni.h</div><div class='del'>-SCI_MAGIC             0xbabeface  gs_port           drivers/char/sh-sci.h</div><div class='ctx'> CODA_MAGIC            0xC0DAC0DA  coda_file_info    fs/coda/coda_fs_i.h</div><div class='ctx'> DPMEM_MAGIC           0xc0ffee11  gdt_pci_sram      drivers/scsi/gdth.h</div><div class='ctx'> YAM_MAGIC             0xF10A7654  yam_port          drivers/net/hamradio/yam.c</div><div class='head'>diff --git a/Documentation/md.txt b/Documentation/md.txt<br/>index f925666e4342..1a2ada46aaed 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/md.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/md.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/md.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/md.txt</a></div><div class='hunk'>@@ -549,7 +549,7 @@ also have</div><div class='ctx'>    sync_speed_max</div><div class='ctx'>      This are similar to /proc/sys/dev/raid/speed_limit_{min,max}</div><div class='ctx'>      however they only apply to the particular array.</div><div class='del'>-     If no value has been written to these, of if the word 'system'</div><div class='add'>+     If no value has been written to these, or if the word 'system'</div><div class='ctx'>      is written, then the system-wide value is used.  If a value,</div><div class='ctx'>      in kibibytes-per-second is written, then it is used.</div><div class='ctx'>      When the files are read, they show the currently active value</div><div class='head'>diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt<br/>index f95746189b5d..13feb697271f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/memory-barriers.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/memory-barriers.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/memory-barriers.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/memory-barriers.txt</a></div><div class='hunk'>@@ -617,16 +617,16 @@ case what's actually required is:</div><div class='ctx'> However, stores are not speculated.  This means that ordering -is- provided</div><div class='ctx'> for load-store control dependencies, as in the following example:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	if (q) {</div><div class='ctx'> 		ACCESS_ONCE(b) = p;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-Control dependencies pair normally with other types of barriers.</div><div class='del'>-That said, please note that ACCESS_ONCE() is not optional!  Without the</div><div class='del'>-ACCESS_ONCE(), might combine the load from 'a' with other loads from</div><div class='del'>-'a', and the store to 'b' with other stores to 'b', with possible highly</div><div class='del'>-counterintuitive effects on ordering.</div><div class='add'>+Control dependencies pair normally with other types of barriers.  That</div><div class='add'>+said, please note that READ_ONCE_CTRL() is not optional!  Without the</div><div class='add'>+READ_ONCE_CTRL(), the compiler might combine the load from 'a' with</div><div class='add'>+other loads from 'a', and the store to 'b' with other stores to 'b',</div><div class='add'>+with possible highly counterintuitive effects on ordering.</div><div class='ctx'> </div><div class='ctx'> Worse yet, if the compiler is able to prove (say) that the value of</div><div class='ctx'> variable 'a' is always non-zero, it would be well within its rights</div><div class='hunk'>@@ -636,12 +636,15 @@ as follows:</div><div class='ctx'> 	q = a;</div><div class='ctx'> 	b = p;  /* BUG: Compiler and CPU can both reorder!!! */</div><div class='ctx'> </div><div class='del'>-So don't leave out the ACCESS_ONCE().</div><div class='add'>+Finally, the READ_ONCE_CTRL() includes an smp_read_barrier_depends()</div><div class='add'>+that DEC Alpha needs in order to respect control depedencies.</div><div class='add'>+</div><div class='add'>+So don't leave out the READ_ONCE_CTRL().</div><div class='ctx'> </div><div class='ctx'> It is tempting to try to enforce ordering on identical stores on both</div><div class='ctx'> branches of the "if" statement as follows:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	if (q) {</div><div class='ctx'> 		barrier();</div><div class='ctx'> 		ACCESS_ONCE(b) = p;</div><div class='hunk'>@@ -655,7 +658,7 @@ branches of the "if" statement as follows:</div><div class='ctx'> Unfortunately, current compilers will transform this as follows at high</div><div class='ctx'> optimization levels:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	barrier();</div><div class='ctx'> 	ACCESS_ONCE(b) = p;  /* BUG: No ordering vs. load from a!!! */</div><div class='ctx'> 	if (q) {</div><div class='hunk'>@@ -685,7 +688,7 @@ memory barriers, for example, smp_store_release():</div><div class='ctx'> In contrast, without explicit memory barriers, two-legged-if control</div><div class='ctx'> ordering is guaranteed only when the stores differ, for example:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	if (q) {</div><div class='ctx'> 		ACCESS_ONCE(b) = p;</div><div class='ctx'> 		do_something();</div><div class='hunk'>@@ -694,14 +697,14 @@ ordering is guaranteed only when the stores differ, for example:</div><div class='ctx'> 		do_something_else();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-The initial ACCESS_ONCE() is still required to prevent the compiler from</div><div class='del'>-proving the value of 'a'.</div><div class='add'>+The initial READ_ONCE_CTRL() is still required to prevent the compiler</div><div class='add'>+from proving the value of 'a'.</div><div class='ctx'> </div><div class='ctx'> In addition, you need to be careful what you do with the local variable 'q',</div><div class='ctx'> otherwise the compiler might be able to guess the value and again remove</div><div class='ctx'> the needed conditional.  For example:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	if (q % MAX) {</div><div class='ctx'> 		ACCESS_ONCE(b) = p;</div><div class='ctx'> 		do_something();</div><div class='hunk'>@@ -714,7 +717,7 @@ If MAX is defined to be 1, then the compiler knows that (q % MAX) is</div><div class='ctx'> equal to zero, in which case the compiler is within its rights to</div><div class='ctx'> transform the above code into the following:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	ACCESS_ONCE(b) = p;</div><div class='ctx'> 	do_something_else();</div><div class='ctx'> </div><div class='hunk'>@@ -725,7 +728,7 @@ is gone, and the barrier won't bring it back.  Therefore, if you are</div><div class='ctx'> relying on this ordering, you should make sure that MAX is greater than</div><div class='ctx'> one, perhaps as follows:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	BUILD_BUG_ON(MAX &lt;= 1); /* Order load from a with store to b. */</div><div class='ctx'> 	if (q % MAX) {</div><div class='ctx'> 		ACCESS_ONCE(b) = p;</div><div class='hunk'>@@ -742,14 +745,15 @@ of the 'if' statement.</div><div class='ctx'> You must also be careful not to rely too much on boolean short-circuit</div><div class='ctx'> evaluation.  Consider this example:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	if (a || 1 &gt; 0)</div><div class='ctx'> 		ACCESS_ONCE(b) = 1;</div><div class='ctx'> </div><div class='del'>-Because the second condition is always true, the compiler can transform</div><div class='del'>-this example as following, defeating control dependency:</div><div class='add'>+Because the first condition cannot fault and the second condition is</div><div class='add'>+always true, the compiler can transform this example as following,</div><div class='add'>+defeating control dependency:</div><div class='ctx'> </div><div class='del'>-	q = ACCESS_ONCE(a);</div><div class='add'>+	q = READ_ONCE_CTRL(a);</div><div class='ctx'> 	ACCESS_ONCE(b) = 1;</div><div class='ctx'> </div><div class='ctx'> This example underscores the need to ensure that the compiler cannot</div><div class='hunk'>@@ -762,8 +766,8 @@ demonstrated by two related examples, with the initial values of</div><div class='ctx'> x and y both being zero:</div><div class='ctx'> </div><div class='ctx'> 	CPU 0                     CPU 1</div><div class='del'>-	=====================     =====================</div><div class='del'>-	r1 = ACCESS_ONCE(x);      r2 = ACCESS_ONCE(y);</div><div class='add'>+	=======================   =======================</div><div class='add'>+	r1 = READ_ONCE_CTRL(x);   r2 = READ_ONCE_CTRL(y);</div><div class='ctx'> 	if (r1 &gt; 0)               if (r2 &gt; 0)</div><div class='ctx'> 	  ACCESS_ONCE(y) = 1;       ACCESS_ONCE(x) = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -783,7 +787,8 @@ But because control dependencies do -not- provide transitivity, the above</div><div class='ctx'> assertion can fail after the combined three-CPU example completes.  If you</div><div class='ctx'> need the three-CPU example to provide ordering, you will need smp_mb()</div><div class='ctx'> between the loads and stores in the CPU 0 and CPU 1 code fragments,</div><div class='del'>-that is, just before or just after the "if" statements.</div><div class='add'>+that is, just before or just after the "if" statements.  Furthermore,</div><div class='add'>+the original two-CPU example is very fragile and should be avoided.</div><div class='ctx'> </div><div class='ctx'> These two examples are the LB and WWC litmus tests from this paper:</div><div class='ctx'> http://www.cl.cam.ac.uk/users/pes20/ppc-supplemental/test6.pdf and this</div><div class='hunk'>@@ -791,6 +796,12 @@ site: https://www.cl.cam.ac.uk/~pes20/ppcmem/index.html.</div><div class='ctx'> </div><div class='ctx'> In summary:</div><div class='ctx'> </div><div class='add'>+  (*) Control dependencies must be headed by READ_ONCE_CTRL().</div><div class='add'>+      Or, as a much less preferable alternative, interpose</div><div class='add'>+      be headed by READ_ONCE() or an ACCESS_ONCE() read and must</div><div class='add'>+      have smp_read_barrier_depends() between this read and the</div><div class='add'>+      control-dependent write.</div><div class='add'>+</div><div class='ctx'>   (*) Control dependencies can order prior loads against later stores.</div><div class='ctx'>       However, they do -not- guarantee any other sort of ordering:</div><div class='ctx'>       Not prior loads against later loads, nor prior stores against</div><div class='hunk'>@@ -1662,7 +1673,7 @@ CPU from reordering them.</div><div class='ctx'> </div><div class='ctx'> There are some more advanced barrier functions:</div><div class='ctx'> </div><div class='del'>- (*) set_mb(var, value)</div><div class='add'>+ (*) smp_store_mb(var, value)</div><div class='ctx'> </div><div class='ctx'>      This assigns the value to the variable and then inserts a full memory</div><div class='ctx'>      barrier after it, depending on the function.  It isn't guaranteed to</div><div class='hunk'>@@ -1784,10 +1795,9 @@ for each construct.  These operations all imply certain barriers:</div><div class='ctx'> </div><div class='ctx'>      Memory operations issued before the ACQUIRE may be completed after</div><div class='ctx'>      the ACQUIRE operation has completed.  An smp_mb__before_spinlock(),</div><div class='del'>-     combined with a following ACQUIRE, orders prior loads against</div><div class='del'>-     subsequent loads and stores and also orders prior stores against</div><div class='del'>-     subsequent stores.  Note that this is weaker than smp_mb()!  The</div><div class='del'>-     smp_mb__before_spinlock() primitive is free on many architectures.</div><div class='add'>+     combined with a following ACQUIRE, orders prior stores against</div><div class='add'>+     subsequent loads and stores. Note that this is weaker than smp_mb()!</div><div class='add'>+     The smp_mb__before_spinlock() primitive is free on many architectures.</div><div class='ctx'> </div><div class='ctx'>  (2) RELEASE operation implication:</div><div class='ctx'> </div><div class='hunk'>@@ -1975,7 +1985,7 @@ after it has altered the task state:</div><div class='ctx'> 	CPU 1</div><div class='ctx'> 	===============================</div><div class='ctx'> 	set_current_state();</div><div class='del'>-	  set_mb();</div><div class='add'>+	  smp_store_mb();</div><div class='ctx'> 	    STORE current-&gt;state</div><div class='ctx'> 	    &lt;general barrier&gt;</div><div class='ctx'> 	LOAD event_indicated</div><div class='hunk'>@@ -2016,7 +2026,7 @@ between the STORE to indicate the event and the STORE to set TASK_RUNNING:</div><div class='ctx'> 	CPU 1				CPU 2</div><div class='ctx'> 	===============================	===============================</div><div class='ctx'> 	set_current_state();		STORE event_indicated</div><div class='del'>-	  set_mb();			wake_up();</div><div class='add'>+	  smp_store_mb();		wake_up();</div><div class='ctx'> 	    STORE current-&gt;state	  &lt;write barrier&gt;</div><div class='ctx'> 	    &lt;general barrier&gt;		  STORE current-&gt;state</div><div class='ctx'> 	LOAD event_indicated</div><div class='head'>diff --git a/Documentation/mic/mic_overview.txt b/Documentation/mic/mic_overview.txt<br/>index 77c541802ad9..1a2f2c8ec59e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/mic/mic_overview.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/mic/mic_overview.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/mic/mic_overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mic_overview.txt</a></div><div class='hunk'>@@ -24,6 +24,10 @@ a virtual bus called mic bus is created and virtual dma devices are</div><div class='ctx'> created on it by the host/card drivers. On host the channels are private</div><div class='ctx'> and used only by the host driver to transfer data for the virtio devices.</div><div class='ctx'> </div><div class='add'>+The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a</div><div class='add'>+low level communications API across PCIe currently implemented for MIC.</div><div class='add'>+More details are available at scif_overview.txt.</div><div class='add'>+</div><div class='ctx'> Here is a block diagram of the various components described above. The</div><div class='ctx'> virtio backends are situated on the host rather than the card given better</div><div class='ctx'> single threaded performance for the host compared to MIC, the ability of</div><div class='hunk'>@@ -47,18 +51,18 @@ the fact that the virtio block storage backend can only be on the host.</div><div class='ctx'>                       |               |       | Virtio over PCIe IOCTLs  |</div><div class='ctx'>                       |               |       +--------------------------+</div><div class='ctx'> +-----------+         |               |                   |  +-----------+</div><div class='del'>-| MIC DMA   |         |               |                   |  | MIC DMA   |</div><div class='del'>-| Driver    |         |               |                   |  | Driver    |</div><div class='del'>-+-----------+         |               |                   |  +-----------+</div><div class='del'>-      |               |               |                   |        |</div><div class='del'>-+---------------+     |               |                   |  +----------------+</div><div class='del'>-|MIC virtual Bus|     |               |                   |  |MIC virtual Bus |</div><div class='del'>-+---------------+     |               |                   |  +----------------+</div><div class='del'>-      |               |               |                   |              |</div><div class='del'>-      |   +--------------+            |            +---------------+     |</div><div class='del'>-      |   |Intel MIC     |            |            |Intel MIC      |     |</div><div class='del'>-      +---|Card Driver   |            |            |Host Driver    |     |</div><div class='del'>-          +--------------+            |            +---------------+-----+</div><div class='add'>+| MIC DMA   |         |  +----------+ | +-----------+     |  | MIC DMA   |</div><div class='add'>+| Driver    |         |  |  SCIF    | | |   SCIF    |     |  | Driver    |</div><div class='add'>++-----------+         |  +----------+ | +-----------+     |  +-----------+</div><div class='add'>+      |               |       |       |       |           |        |</div><div class='add'>++---------------+     | +-----+-----+ | +-----+-----+     | +---------------+</div><div class='add'>+|MIC virtual Bus|     | |SCIF HW Bus| | |SCIF HW BUS|     | |MIC virtual Bus|</div><div class='add'>++---------------+     | +-----------+ | +-----+-----+     | +---------------+</div><div class='add'>+      |               |       |       |       |           |              |</div><div class='add'>+      |   +--------------+    |       |       |    +---------------+     |</div><div class='add'>+      |   |Intel MIC     |    |       |       |    |Intel MIC      |     |</div><div class='add'>+      +---|Card Driver   +----+       |       |    |Host Driver    |     |</div><div class='add'>+          +--------------+            |       +----+---------------+-----+</div><div class='ctx'>                       |               |                   |</div><div class='ctx'>              +-------------------------------------------------------------+</div><div class='ctx'>              |                                                             |</div><div class='head'>diff --git a/Documentation/mic/mpssd/Makefile b/Documentation/mic/mpssd/Makefile<br/>index f47fe6ba7300..06871b0c08a6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/mic/mpssd/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/mic/mpssd/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/mic/mpssd/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mpssd/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+ifndef CROSS_COMPILE</div><div class='ctx'> # List of programs to build</div><div class='ctx'> hostprogs-$(CONFIG_X86_64) := mpssd</div><div class='ctx'> </div><div class='hunk'>@@ -17,3 +18,4 @@ HOSTLOADLIBES_mpssd := -lpthread</div><div class='ctx'> install:</div><div class='ctx'> 	install mpssd /usr/sbin/mpssd</div><div class='ctx'> 	install micctrl /usr/sbin/micctrl</div><div class='add'>+endif</div><div class='head'>diff --git a/Documentation/mic/mpssd/mpss b/Documentation/mic/mpssd/mpss<br/>index cacbdb0aefb9..582aad4811ae 100755<br/>--- a/<a href='/drm-misc/tree/Documentation/mic/mpssd/mpss?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/mic/mpssd/mpss</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/mic/mpssd/mpss?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/mpssd/mpss</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> exec=/usr/sbin/mpssd</div><div class='ctx'> sysfs="/sys/class/mic"</div><div class='add'>+mic_modules="mic_host mic_x100_dma scif"</div><div class='ctx'> </div><div class='ctx'> start()</div><div class='ctx'> {</div><div class='hunk'>@@ -48,18 +49,15 @@ start()</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='ctx'> 	echo -e $"Starting MPSS Stack"</div><div class='del'>-	echo -e $"Loading MIC_X100_DMA &amp; MIC_HOST Modules"</div><div class='add'>+	echo -e $"Loading MIC drivers:" $mic_modules</div><div class='ctx'> </div><div class='del'>-	for f in "mic_host" "mic_x100_dma"</div><div class='del'>-	do</div><div class='del'>-		modprobe $f</div><div class='del'>-		RETVAL=$?</div><div class='del'>-		if [ $RETVAL -ne 0 ]; then</div><div class='del'>-			failure</div><div class='del'>-			echo</div><div class='del'>-			return $RETVAL</div><div class='del'>-		fi</div><div class='del'>-	done</div><div class='add'>+	modprobe -a $mic_modules</div><div class='add'>+	RETVAL=$?</div><div class='add'>+	if [ $RETVAL -ne 0 ]; then</div><div class='add'>+		failure</div><div class='add'>+		echo</div><div class='add'>+		return $RETVAL</div><div class='add'>+	fi</div><div class='ctx'> </div><div class='ctx'> 	# Start the daemon</div><div class='ctx'> 	echo -n $"Starting MPSSD "</div><div class='hunk'>@@ -170,8 +168,8 @@ unload()</div><div class='ctx'> 	stop</div><div class='ctx'> </div><div class='ctx'> 	sleep 5</div><div class='del'>-	echo -n $"Removing MIC_HOST &amp; MIC_X100_DMA Modules: "</div><div class='del'>-	modprobe -r mic_host mic_x100_dma</div><div class='add'>+	echo -n $"Removing MIC drivers:" $mic_modules</div><div class='add'>+	modprobe -r $mic_modules</div><div class='ctx'> 	RETVAL=$?</div><div class='ctx'> 	[ $RETVAL -ne 0 ] &amp;&amp; failure || success</div><div class='ctx'> 	echo</div><div class='head'>diff --git a/Documentation/mic/scif_overview.txt b/Documentation/mic/scif_overview.txt<br/>new file mode 100644<br/>index 000000000000..0a280d986731<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/mic/scif_overview.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/mic/scif_overview.txt</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a low</div><div class='add'>+level communications API across PCIe currently implemented for MIC. Currently</div><div class='add'>+SCIF provides inter-node communication within a single host platform, where a</div><div class='add'>+node is a MIC Coprocessor or Xeon based host. SCIF abstracts the details of</div><div class='add'>+communicating over the PCIe bus while providing an API that is symmetric</div><div class='add'>+across all the nodes in the PCIe network. An important design objective for SCIF</div><div class='add'>+is to deliver the maximum possible performance given the communication</div><div class='add'>+abilities of the hardware. SCIF has been used to implement an offload compiler</div><div class='add'>+runtime and OFED support for MPI implementations for MIC coprocessors.</div><div class='add'>+</div><div class='add'>+==== SCIF API Components ====</div><div class='add'>+The SCIF API has the following parts:</div><div class='add'>+1. Connection establishment using a client server model</div><div class='add'>+2. Byte stream messaging intended for short messages</div><div class='add'>+3. Node enumeration to determine online nodes</div><div class='add'>+4. Poll semantics for detection of incoming connections and messages</div><div class='add'>+5. Memory registration to pin down pages</div><div class='add'>+6. Remote memory mapping for low latency CPU accesses via mmap</div><div class='add'>+7. Remote DMA (RDMA) for high bandwidth DMA transfers</div><div class='add'>+8. Fence APIs for RDMA synchronization</div><div class='add'>+</div><div class='add'>+SCIF exposes the notion of a connection which can be used by peer processes on</div><div class='add'>+nodes in a SCIF PCIe "network" to share memory "windows" and to communicate. A</div><div class='add'>+process in a SCIF node initiates a SCIF connection to a peer process on a</div><div class='add'>+different node via a SCIF "endpoint". SCIF endpoints support messaging APIs</div><div class='add'>+which are similar to connection oriented socket APIs. Connected SCIF endpoints</div><div class='add'>+can also register local memory which is followed by data transfer using either</div><div class='add'>+DMA, CPU copies or remote memory mapping via mmap. SCIF supports both user and</div><div class='add'>+kernel mode clients which are functionally equivalent.</div><div class='add'>+</div><div class='add'>+==== SCIF Performance for MIC ====</div><div class='add'>+DMA bandwidth comparison between the TCP (over ethernet over PCIe) stack versus</div><div class='add'>+SCIF shows the performance advantages of SCIF for HPC applications and runtimes.</div><div class='add'>+</div><div class='add'>+             Comparison of TCP and SCIF based BW</div><div class='add'>+</div><div class='add'>+  Throughput (GB/sec)</div><div class='add'>+    8 +                                             PCIe Bandwidth ******</div><div class='add'>+      +                                                        TCP ######</div><div class='add'>+    7 +    **************************************             SCIF %%%%%%</div><div class='add'>+      |                       %%%%%%%%%%%%%%%%%%%</div><div class='add'>+    6 +                   %%%%</div><div class='add'>+      |                 %%</div><div class='add'>+      |               %%%</div><div class='add'>+    5 +              %%</div><div class='add'>+      |            %%</div><div class='add'>+    4 +           %%</div><div class='add'>+      |          %%</div><div class='add'>+    3 +         %%</div><div class='add'>+      |        %</div><div class='add'>+    2 +      %%</div><div class='add'>+      |     %%</div><div class='add'>+      |    %</div><div class='add'>+    1 +</div><div class='add'>+      +    ######################################</div><div class='add'>+    0 +++---+++--+--+-+--+--+-++-+--+-++-+--+-++-+-</div><div class='add'>+      1       10     100      1000   10000   100000</div><div class='add'>+                   Transfer Size (KBytes)</div><div class='add'>+</div><div class='add'>+SCIF allows memory sharing via mmap(..) between processes on different PCIe</div><div class='add'>+nodes and thus provides bare-metal PCIe latency. The round trip SCIF mmap</div><div class='add'>+latency from the host to an x100 MIC for an 8 byte message is 0.44 usecs.</div><div class='add'>+</div><div class='add'>+SCIF has a user space library which is a thin IOCTL wrapper providing a user</div><div class='add'>+space API similar to the kernel API in scif.h. The SCIF user space library</div><div class='add'>+is distributed @ https://software.intel.com/en-us/mic-developer</div><div class='add'>+</div><div class='add'>+Here is some pseudo code for an example of how two applications on two PCIe</div><div class='add'>+nodes would typically use the SCIF API:</div><div class='add'>+</div><div class='add'>+Process A (on node A)			Process B (on node B)</div><div class='add'>+</div><div class='add'>+/* get online node information */</div><div class='add'>+scif_get_node_ids(..)			scif_get_node_ids(..)</div><div class='add'>+scif_open(..)				scif_open(..)</div><div class='add'>+scif_bind(..)				scif_bind(..)</div><div class='add'>+scif_listen(..)</div><div class='add'>+scif_accept(..)				scif_connect(..)</div><div class='add'>+/* SCIF connection established */</div><div class='add'>+</div><div class='add'>+/* Send and receive short messages */</div><div class='add'>+scif_send(..)/scif_recv(..)		scif_send(..)/scif_recv(..)</div><div class='add'>+</div><div class='add'>+/* Register memory */</div><div class='add'>+scif_register(..)			scif_register(..)</div><div class='add'>+</div><div class='add'>+/* RDMA */</div><div class='add'>+scif_readfrom(..)/scif_writeto(..)	scif_readfrom(..)/scif_writeto(..)</div><div class='add'>+</div><div class='add'>+/* Fence DMAs */</div><div class='add'>+scif_fence_signal(..)			scif_fence_signal(..)</div><div class='add'>+</div><div class='add'>+mmap(..)				mmap(..)</div><div class='add'>+</div><div class='add'>+/* Access remote registered memory */</div><div class='add'>+</div><div class='add'>+/* Close the endpoints */</div><div class='add'>+scif_close(..)				scif_close(..)</div><div class='head'>diff --git a/Documentation/misc-devices/spear-pcie-gadget.txt b/Documentation/misc-devices/spear-pcie-gadget.txt<br/>index 02c13ef5e908..89b88dee4143 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/misc-devices/spear-pcie-gadget.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/misc-devices/spear-pcie-gadget.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/spear-pcie-gadget.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/misc-devices/spear-pcie-gadget.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@ Spear PCIe Gadget Driver:</div><div class='ctx'> </div><div class='ctx'> Author</div><div class='ctx'> =============</div><div class='del'>-Pratyush Anand (pratyush.anand@st.com)</div><div class='add'>+Pratyush Anand (pratyush.anand@gmail.com)</div><div class='ctx'> </div><div class='ctx'> Location</div><div class='ctx'> ============</div><div class='head'>diff --git a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt<br/>index 83bf4986baea..334b49ef02d1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/bonding.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/bonding.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/bonding.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/bonding.txt</a></div><div class='hunk'>@@ -51,6 +51,7 @@ Table of Contents</div><div class='ctx'> 3.4	Configuring Bonding Manually via Sysfs</div><div class='ctx'> 3.5	Configuration with Interfaces Support</div><div class='ctx'> 3.6	Overriding Configuration for Special Cases</div><div class='add'>+3.7 Configuring LACP for 802.3ad mode in a more secure way</div><div class='ctx'> </div><div class='ctx'> 4. Querying Bonding Configuration</div><div class='ctx'> 4.1	Bonding Configuration</div><div class='hunk'>@@ -178,6 +179,27 @@ active_slave</div><div class='ctx'> 	active slave, or the empty string if there is no active slave or</div><div class='ctx'> 	the current mode does not use an active slave.</div><div class='ctx'> </div><div class='add'>+ad_actor_sys_prio</div><div class='add'>+</div><div class='add'>+	In an AD system, this specifies the system priority. The allowed range</div><div class='add'>+	is 1 - 65535. If the value is not specified, it takes 65535 as the</div><div class='add'>+	default value.</div><div class='add'>+</div><div class='add'>+	This parameter has effect only in 802.3ad mode and is available through</div><div class='add'>+	SysFs interface.</div><div class='add'>+</div><div class='add'>+ad_actor_system</div><div class='add'>+</div><div class='add'>+	In an AD system, this specifies the mac-address for the actor in</div><div class='add'>+	protocol packet exchanges (LACPDUs). The value cannot be NULL or</div><div class='add'>+	multicast. It is preferred to have the local-admin bit set for this</div><div class='add'>+	mac but driver does not enforce it. If the value is not given then</div><div class='add'>+	system defaults to using the masters' mac address as actors' system</div><div class='add'>+	address.</div><div class='add'>+</div><div class='add'>+	This parameter has effect only in 802.3ad mode and is available through</div><div class='add'>+	SysFs interface.</div><div class='add'>+</div><div class='ctx'> ad_select</div><div class='ctx'> </div><div class='ctx'> 	Specifies the 802.3ad aggregation selection logic to use.  The</div><div class='hunk'>@@ -220,6 +242,21 @@ ad_select</div><div class='ctx'> </div><div class='ctx'> 	This option was added in bonding version 3.4.0.</div><div class='ctx'> </div><div class='add'>+ad_user_port_key</div><div class='add'>+</div><div class='add'>+	In an AD system, the port-key has three parts as shown below -</div><div class='add'>+</div><div class='add'>+	   Bits   Use</div><div class='add'>+	   00     Duplex</div><div class='add'>+	   01-05  Speed</div><div class='add'>+	   06-15  User-defined</div><div class='add'>+</div><div class='add'>+	This defines the upper 10 bits of the port key. The values can be</div><div class='add'>+	from 0 - 1023. If not given, the system defaults to 0.</div><div class='add'>+</div><div class='add'>+	This parameter has effect only in 802.3ad mode and is available through</div><div class='add'>+	SysFs interface.</div><div class='add'>+</div><div class='ctx'> all_slaves_active</div><div class='ctx'> </div><div class='ctx'> 	Specifies that duplicate frames (received on inactive ports) should be</div><div class='hunk'>@@ -1622,6 +1659,53 @@ output port selection.</div><div class='ctx'> This feature first appeared in bonding driver version 3.7.0 and support for</div><div class='ctx'> output slave selection was limited to round-robin and active-backup modes.</div><div class='ctx'> </div><div class='add'>+3.7 Configuring LACP for 802.3ad mode in a more secure way</div><div class='add'>+----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+When using 802.3ad bonding mode, the Actor (host) and Partner (switch)</div><div class='add'>+exchange LACPDUs.  These LACPDUs cannot be sniffed, because they are</div><div class='add'>+destined to link local mac addresses (which switches/bridges are not</div><div class='add'>+supposed to forward).  However, most of the values are easily predictable</div><div class='add'>+or are simply the machine's MAC address (which is trivially known to all</div><div class='add'>+other hosts in the same L2).  This implies that other machines in the L2</div><div class='add'>+domain can spoof LACPDU packets from other hosts to the switch and potentially</div><div class='add'>+cause mayhem by joining (from the point of view of the switch) another</div><div class='add'>+machine's aggregate, thus receiving a portion of that hosts incoming</div><div class='add'>+traffic and / or spoofing traffic from that machine themselves (potentially</div><div class='add'>+even successfully terminating some portion of flows). Though this is not</div><div class='add'>+a likely scenario, one could avoid this possibility by simply configuring</div><div class='add'>+few bonding parameters:</div><div class='add'>+</div><div class='add'>+   (a) ad_actor_system : You can set a random mac-address that can be used for</div><div class='add'>+       these LACPDU exchanges. The value can not be either NULL or Multicast.</div><div class='add'>+       Also it's preferable to set the local-admin bit. Following shell code</div><div class='add'>+       generates a random mac-address as described above.</div><div class='add'>+</div><div class='add'>+       # sys_mac_addr=$(printf '%02x:%02x:%02x:%02x:%02x:%02x' \</div><div class='add'>+                                $(( (RANDOM &amp; 0xFE) | 0x02 )) \</div><div class='add'>+                                $(( RANDOM &amp; 0xFF )) \</div><div class='add'>+                                $(( RANDOM &amp; 0xFF )) \</div><div class='add'>+                                $(( RANDOM &amp; 0xFF )) \</div><div class='add'>+                                $(( RANDOM &amp; 0xFF )) \</div><div class='add'>+                                $(( RANDOM &amp; 0xFF )))</div><div class='add'>+       # echo $sys_mac_addr &gt; /sys/class/net/bond0/bonding/ad_actor_system</div><div class='add'>+</div><div class='add'>+   (b) ad_actor_sys_prio : Randomize the system priority. The default value</div><div class='add'>+       is 65535, but system can take the value from 1 - 65535. Following shell</div><div class='add'>+       code generates random priority and sets it.</div><div class='add'>+</div><div class='add'>+       # sys_prio=$(( 1 + RANDOM + RANDOM ))</div><div class='add'>+       # echo $sys_prio &gt; /sys/class/net/bond0/bonding/ad_actor_sys_prio</div><div class='add'>+</div><div class='add'>+   (c) ad_user_port_key : Use the user portion of the port-key. The default</div><div class='add'>+       keeps this empty. These are the upper 10 bits of the port-key and value</div><div class='add'>+       ranges from 0 - 1023. Following shell code generates these 10 bits and</div><div class='add'>+       sets it.</div><div class='add'>+</div><div class='add'>+       # usr_port_key=$(( RANDOM &amp; 0x3FF ))</div><div class='add'>+       # echo $usr_port_key &gt; /sys/class/net/bond0/bonding/ad_user_port_key</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 4 Querying Bonding Configuration</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/can.txt b/Documentation/networking/can.txt<br/>index 5abad1e921ca..b48d4a149411 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/can.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/can.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/can.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/can.txt</a></div><div class='hunk'>@@ -268,6 +268,9 @@ solution for a couple of reasons:</div><div class='ctx'>     struct can_frame {</div><div class='ctx'>             canid_t can_id;  /* 32 bit CAN_ID + EFF/RTR/ERR flags */</div><div class='ctx'>             __u8    can_dlc; /* frame payload length in byte (0 .. 8) */</div><div class='add'>+            __u8    __pad;   /* padding */</div><div class='add'>+            __u8    __res0;  /* reserved / padding */</div><div class='add'>+            __u8    __res1;  /* reserved / padding */</div><div class='ctx'>             __u8    data[8] __attribute__((aligned(8)));</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/dctcp.txt b/Documentation/networking/dctcp.txt<br/>index 0d5dfbc89ec9..13a857753208 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/dctcp.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/dctcp.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/dctcp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/dctcp.txt</a></div><div class='hunk'>@@ -8,6 +8,7 @@ the data center network to provide multi-bit feedback to the end hosts.</div><div class='ctx'> To enable it on end hosts:</div><div class='ctx'> </div><div class='ctx'>   sysctl -w net.ipv4.tcp_congestion_control=dctcp</div><div class='add'>+  sysctl -w net.ipv4.tcp_ecn_fallback=0 (optional)</div><div class='ctx'> </div><div class='ctx'> All switches in the data center network running DCTCP must support ECN</div><div class='ctx'> marking and be configured for marking when reaching defined switch buffer</div><div class='head'>diff --git a/Documentation/networking/fore200e.txt b/Documentation/networking/fore200e.txt<br/>index d52af53efdc5..1f98f62b4370 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/fore200e.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/fore200e.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/fore200e.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/fore200e.txt</a></div><div class='hunk'>@@ -37,7 +37,7 @@ version. Alternative binary firmware images can be found somewhere on the</div><div class='ctx'> ForeThought CD-ROM supplied with your adapter by FORE Systems.</div><div class='ctx'> </div><div class='ctx'> You can also get the latest firmware images from FORE Systems at</div><div class='del'>-http://en.wikipedia.org/wiki/FORE_Systems. Register TACTics Online and go to</div><div class='add'>+https://en.wikipedia.org/wiki/FORE_Systems. Register TACTics Online and go to</div><div class='ctx'> the 'software updates' pages. The firmware binaries are part of</div><div class='ctx'> the various ForeThought software distributions.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/ieee802154.txt b/Documentation/networking/ieee802154.txt<br/>index 22bbc7225f8e..1700756af057 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/ieee802154.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/ieee802154.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/ieee802154.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/ieee802154.txt</a></div><div class='hunk'>@@ -30,8 +30,8 @@ int sd = socket(PF_IEEE802154, SOCK_DGRAM, 0);</div><div class='ctx'> </div><div class='ctx'> The address family, socket addresses etc. are defined in the</div><div class='ctx'> include/net/af_ieee802154.h header or in the special header</div><div class='del'>-in our userspace package (see either linux-zigbee sourceforge download page</div><div class='del'>-or git tree at git://linux-zigbee.git.sourceforge.net/gitroot/linux-zigbee).</div><div class='add'>+in the userspace package (see either http://wpan.cakelab.org/ or the</div><div class='add'>+git tree at https://github.com/linux-wpan/wpan-tools).</div><div class='ctx'> </div><div class='ctx'> One can use SOCK_RAW for passing raw data towards device xmit function. YMMV.</div><div class='ctx'> </div><div class='hunk'>@@ -49,15 +49,6 @@ Like with WiFi, there are several types of devices implementing IEEE 802.15.4.</div><div class='ctx'> Those types of devices require different approach to be hooked into Linux kernel.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-MLME - MAC Level Management</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-Most of IEEE 802.15.4 MLME interfaces are directly mapped on netlink commands.</div><div class='del'>-See the include/net/nl802154.h header. Our userspace tools package</div><div class='del'>-(see above) provides CLI configuration utility for radio interfaces and simple</div><div class='del'>-coordinator for IEEE 802.15.4 networks as an example users of MLME protocol.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> HardMAC</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='hunk'>@@ -75,8 +66,6 @@ net_device with a pointer to struct ieee802154_mlme_ops instance. The fields</div><div class='ctx'> assoc_req, assoc_resp, disassoc_req, start_req, and scan_req are optional.</div><div class='ctx'> All other fields are required.</div><div class='ctx'> </div><div class='del'>-We provide an example of simple HardMAC driver at drivers/ieee802154/fakehard.c</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> SoftMAC</div><div class='ctx'> =======</div><div class='hunk'>@@ -89,7 +78,8 @@ stack interface for network sniffers (e.g. WireShark).</div><div class='ctx'> </div><div class='ctx'> This layer is going to be extended soon.</div><div class='ctx'> </div><div class='del'>-See header include/net/mac802154.h and several drivers in drivers/ieee802154/.</div><div class='add'>+See header include/net/mac802154.h and several drivers in</div><div class='add'>+drivers/net/ieee802154/.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Device drivers API</div><div class='hunk'>@@ -114,18 +104,17 @@ Moreover IEEE 802.15.4 device operations structure should be filled.</div><div class='ctx'> Fake drivers</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-In addition there are two drivers available which simulate real devices with</div><div class='del'>-HardMAC (fakehard) and SoftMAC (fakelb - IEEE 802.15.4 loopback driver)</div><div class='del'>-interfaces. This option provides possibility to test and debug stack without</div><div class='del'>-usage of real hardware.</div><div class='add'>+In addition there is a driver available which simulates a real device with</div><div class='add'>+SoftMAC (fakelb - IEEE 802.15.4 loopback driver) interface. This option</div><div class='add'>+provides possibility to test and debug stack without usage of real hardware.</div><div class='ctx'> </div><div class='del'>-See sources in drivers/ieee802154 folder for more details.</div><div class='add'>+See sources in drivers/net/ieee802154 folder for more details.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 6LoWPAN Linux implementation</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='del'>-The IEEE 802.15.4 standard specifies an MTU of 128 bytes, yielding about 80</div><div class='add'>+The IEEE 802.15.4 standard specifies an MTU of 127 bytes, yielding about 80</div><div class='ctx'> octets of actual MAC payload once security is turned on, on a wireless link</div><div class='ctx'> with a link throughput of 250 kbps or less.  The 6LoWPAN adaptation format</div><div class='ctx'> [RFC4944] was specified to carry IPv6 datagrams over such constrained links,</div><div class='hunk'>@@ -140,7 +129,8 @@ In Semptember 2011 the standard update was published - [RFC6282].</div><div class='ctx'> It deprecates HC1 and HC2 compression and defines IPHC encoding format which is</div><div class='ctx'> used in this Linux implementation.</div><div class='ctx'> </div><div class='del'>-All the code related to 6lowpan you may find in files: net/ieee802154/6lowpan.*</div><div class='add'>+All the code related to 6lowpan you may find in files: net/6lowpan/*</div><div class='add'>+and net/ieee802154/6lowpan/*</div><div class='ctx'> </div><div class='ctx'> To setup 6lowpan interface you need (busybox release &gt; 1.17.0):</div><div class='ctx'> 1. Add IEEE802.15.4 interface and initialize PANid;</div><div class='head'>diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt<br/>index 071fb18dc57c..5fae7704daab 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/ip-sysctl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/ip-sysctl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/ip-sysctl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/ip-sysctl.txt</a></div><div class='hunk'>@@ -267,6 +267,15 @@ tcp_ecn - INTEGER</div><div class='ctx'> 		  but do not request ECN on outgoing connections.</div><div class='ctx'> 	Default: 2</div><div class='ctx'> </div><div class='add'>+tcp_ecn_fallback - BOOLEAN</div><div class='add'>+	If the kernel detects that ECN connection misbehaves, enable fall</div><div class='add'>+	back to non-ECN. Currently, this knob implements the fallback</div><div class='add'>+	from RFC3168, section 6.1.1.1., but we reserve that in future,</div><div class='add'>+	additional detection mechanisms could be implemented under this</div><div class='add'>+	knob. The value	is not used, if tcp_ecn or per route (or congestion</div><div class='add'>+	control) ECN settings are disabled.</div><div class='add'>+	Default: 1 (fallback enabled)</div><div class='add'>+</div><div class='ctx'> tcp_fack - BOOLEAN</div><div class='ctx'> 	Enable FACK congestion avoidance and fast retransmission.</div><div class='ctx'> 	The value is not used, if tcp_sack is not enabled.</div><div class='hunk'>@@ -742,8 +751,10 @@ IP Variables:</div><div class='ctx'> ip_local_port_range - 2 INTEGERS</div><div class='ctx'> 	Defines the local port range that is used by TCP and UDP to</div><div class='ctx'> 	choose the local port. The first number is the first, the</div><div class='del'>-	second the last local port number. The default values are</div><div class='del'>-	32768 and 61000 respectively.</div><div class='add'>+	second the last local port number.</div><div class='add'>+	If possible, it is better these numbers have different parity.</div><div class='add'>+	(one even and one odd values)</div><div class='add'>+	The default values are 32768 and 60999 respectively.</div><div class='ctx'> </div><div class='ctx'> ip_local_reserved_ports - list of comma separated ranges</div><div class='ctx'> 	Specify the ports which are reserved for known third-party</div><div class='hunk'>@@ -766,7 +777,7 @@ ip_local_reserved_ports - list of comma separated ranges</div><div class='ctx'> 	ip_local_port_range, e.g.:</div><div class='ctx'> </div><div class='ctx'> 	$ cat /proc/sys/net/ipv4/ip_local_port_range</div><div class='del'>-	32000	61000</div><div class='add'>+	32000	60999</div><div class='ctx'> 	$ cat /proc/sys/net/ipv4/ip_local_reserved_ports</div><div class='ctx'> 	8080,9148</div><div class='ctx'> </div><div class='hunk'>@@ -1213,6 +1224,14 @@ auto_flowlabels - BOOLEAN</div><div class='ctx'> 	FALSE: disabled</div><div class='ctx'> 	Default: false</div><div class='ctx'> </div><div class='add'>+flowlabel_state_ranges - BOOLEAN</div><div class='add'>+	Split the flow label number space into two ranges. 0-0x7FFFF is</div><div class='add'>+	reserved for the IPv6 flow manager facility, 0x80000-0xFFFFF</div><div class='add'>+	is reserved for stateless flow labels as described in RFC6437.</div><div class='add'>+	TRUE: enabled</div><div class='add'>+	FALSE: disabled</div><div class='add'>+	Default: true</div><div class='add'>+</div><div class='ctx'> anycast_src_echo_reply - BOOLEAN</div><div class='ctx'> 	Controls the use of anycast addresses as source addresses for ICMPv6</div><div class='ctx'> 	echo reply</div><div class='head'>diff --git a/Documentation/networking/netconsole.txt b/Documentation/networking/netconsole.txt<br/>index a5d574a9ae09..30409a36e95d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/netconsole.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/netconsole.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/netconsole.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/netconsole.txt</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> started by Ingo Molnar &lt;mingo@redhat.com&gt;, 2001.09.17</div><div class='ctx'> 2.6 port and netpoll api by Matt Mackall &lt;mpm@selenic.com&gt;, Sep 9 2003</div><div class='ctx'> IPv6 support by Cong Wang &lt;xiyou.wangcong@gmail.com&gt;, Jan 1 2013</div><div class='add'>+Extended console support by Tejun Heo &lt;tj@kernel.org&gt;, May 1 2015</div><div class='ctx'> </div><div class='ctx'> Please send bug reports to Matt Mackall &lt;mpm@selenic.com&gt;</div><div class='ctx'> Satyam Sharma &lt;satyam.sharma@gmail.com&gt;, and Cong Wang &lt;xiyou.wangcong@gmail.com&gt;</div><div class='hunk'>@@ -24,9 +25,10 @@ Sender and receiver configuration:</div><div class='ctx'> It takes a string configuration parameter "netconsole" in the</div><div class='ctx'> following format:</div><div class='ctx'> </div><div class='del'>- netconsole=[src-port]@[src-ip]/[&lt;dev&gt;],[tgt-port]@&lt;tgt-ip&gt;/[tgt-macaddr]</div><div class='add'>+ netconsole=[+][src-port]@[src-ip]/[&lt;dev&gt;],[tgt-port]@&lt;tgt-ip&gt;/[tgt-macaddr]</div><div class='ctx'> </div><div class='ctx'>    where</div><div class='add'>+        +             if present, enable extended console support</div><div class='ctx'>         src-port      source for UDP packets (defaults to 6665)</div><div class='ctx'>         src-ip        source IP to use (interface address)</div><div class='ctx'>         dev           network interface (eth0)</div><div class='hunk'>@@ -107,6 +109,7 @@ To remove a target:</div><div class='ctx'> The interface exposes these parameters of a netconsole target to userspace:</div><div class='ctx'> </div><div class='ctx'> 	enabled		Is this target currently enabled?	(read-write)</div><div class='add'>+	extended	Extended mode enabled			(read-write)</div><div class='ctx'> 	dev_name	Local network interface name		(read-write)</div><div class='ctx'> 	local_port	Source UDP port to use			(read-write)</div><div class='ctx'> 	remote_port	Remote agent's UDP port			(read-write)</div><div class='hunk'>@@ -132,6 +135,36 @@ You can also update the local interface dynamically. This is especially</div><div class='ctx'> useful if you want to use interfaces that have newly come up (and may not</div><div class='ctx'> have existed when netconsole was loaded / initialized).</div><div class='ctx'> </div><div class='add'>+Extended console:</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+If '+' is prefixed to the configuration line or "extended" config file</div><div class='add'>+is set to 1, extended console support is enabled. An example boot</div><div class='add'>+param follows.</div><div class='add'>+</div><div class='add'>+ linux netconsole=+4444@10.0.0.1/eth1,9353@10.0.0.2/12:34:56:78:9a:bc</div><div class='add'>+</div><div class='add'>+Log messages are transmitted with extended metadata header in the</div><div class='add'>+following format which is the same as /dev/kmsg.</div><div class='add'>+</div><div class='add'>+ &lt;level&gt;,&lt;sequnum&gt;,&lt;timestamp&gt;,&lt;contflag&gt;;&lt;message text&gt;</div><div class='add'>+</div><div class='add'>+Non printable characters in &lt;message text&gt; are escaped using "\xff"</div><div class='add'>+notation. If the message contains optional dictionary, verbatim</div><div class='add'>+newline is used as the delimeter.</div><div class='add'>+</div><div class='add'>+If a message doesn't fit in certain number of bytes (currently 1000),</div><div class='add'>+the message is split into multiple fragments by netconsole. These</div><div class='add'>+fragments are transmitted with "ncfrag" header field added.</div><div class='add'>+</div><div class='add'>+ ncfrag=&lt;byte-offset&gt;/&lt;total-bytes&gt;</div><div class='add'>+</div><div class='add'>+For example, assuming a lot smaller chunk size, a message "the first</div><div class='add'>+chunk, the 2nd chunk." may be split as follows.</div><div class='add'>+</div><div class='add'>+ 6,416,1758426,-,ncfrag=0/31;the first chunk,</div><div class='add'>+ 6,416,1758426,-,ncfrag=16/31; the 2nd chunk.</div><div class='add'>+</div><div class='ctx'> Miscellaneous notes:</div><div class='ctx'> ====================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/pktgen.txt b/Documentation/networking/pktgen.txt<br/>index 0344f1d45b37..f4be85e96005 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/pktgen.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/pktgen.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/pktgen.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/pktgen.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-                  HOWTO for the linux packet generator </div><div class='add'>+                  HOWTO for the linux packet generator</div><div class='ctx'>                   ------------------------------------</div><div class='ctx'> </div><div class='ctx'> Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel</div><div class='hunk'>@@ -50,17 +50,33 @@ For ixgbe use e.g. "30" resulting in approx 33K interrupts/sec (1/30*10^6):</div><div class='ctx'>  # ethtool -C ethX rx-usecs 30</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Viewing threads</div><div class='del'>-===============</div><div class='del'>-/proc/net/pktgen/kpktgend_0 </div><div class='del'>-Name: kpktgend_0  max_before_softirq: 10000</div><div class='del'>-Running: </div><div class='del'>-Stopped: eth1 </div><div class='del'>-Result: OK: max_before_softirq=10000</div><div class='add'>+Kernel threads</div><div class='add'>+==============</div><div class='add'>+Pktgen creates a thread for each CPU with affinity to that CPU.</div><div class='add'>+Which is controlled through procfile /proc/net/pktgen/kpktgend_X.</div><div class='add'>+</div><div class='add'>+Example: /proc/net/pktgen/kpktgend_0</div><div class='add'>+</div><div class='add'>+ Running:</div><div class='add'>+ Stopped: eth4@0</div><div class='add'>+ Result: OK: add_device=eth4@0</div><div class='add'>+</div><div class='add'>+Most important are the devices assigned to the thread.</div><div class='add'>+</div><div class='add'>+The two basic thread commands are:</div><div class='add'>+ * add_device DEVICE@NAME -- adds a single device</div><div class='add'>+ * rem_device_all         -- remove all associated devices</div><div class='add'>+</div><div class='add'>+When adding a device to a thread, a corrosponding procfile is created</div><div class='add'>+which is used for configuring this device. Thus, device names need to</div><div class='add'>+be unique.</div><div class='ctx'> </div><div class='del'>-Most important are the devices assigned to the thread.  Note that a</div><div class='del'>-device can only belong to one thread.</div><div class='add'>+To support adding the same device to multiple threads, which is useful</div><div class='add'>+with multi queue NICs, a the device naming scheme is extended with "@":</div><div class='add'>+ device@something</div><div class='ctx'> </div><div class='add'>+The part after "@" can be anything, but it is custom to use the thread</div><div class='add'>+number.</div><div class='ctx'> </div><div class='ctx'> Viewing devices</div><div class='ctx'> ===============</div><div class='hunk'>@@ -69,29 +85,32 @@ The Params section holds configured information.  The Current section</div><div class='ctx'> holds running statistics.  The Result is printed after a run or after</div><div class='ctx'> interruption.  Example:</div><div class='ctx'> </div><div class='del'>-/proc/net/pktgen/eth1       </div><div class='add'>+/proc/net/pktgen/eth4@0</div><div class='ctx'> </div><div class='del'>-Params: count 10000000  min_pkt_size: 60  max_pkt_size: 60</div><div class='del'>-     frags: 0  delay: 0  clone_skb: 1000000  ifname: eth1</div><div class='add'>+ Params: count 100000  min_pkt_size: 60  max_pkt_size: 60</div><div class='add'>+     frags: 0  delay: 0  clone_skb: 64  ifname: eth4@0</div><div class='ctx'>      flows: 0 flowlen: 0</div><div class='del'>-     dst_min: 10.10.11.2  dst_max: </div><div class='del'>-     src_min:   src_max: </div><div class='del'>-     src_mac: 00:00:00:00:00:00  dst_mac: 00:04:23:AC:FD:82</div><div class='del'>-     udp_src_min: 9  udp_src_max: 9  udp_dst_min: 9  udp_dst_max: 9</div><div class='del'>-     src_mac_count: 0  dst_mac_count: 0 </div><div class='del'>-     Flags: </div><div class='del'>-Current:</div><div class='del'>-     pkts-sofar: 10000000  errors: 39664</div><div class='del'>-     started: 1103053986245187us  stopped: 1103053999346329us idle: 880401us</div><div class='del'>-     seq_num: 10000011  cur_dst_mac_offset: 0  cur_src_mac_offset: 0</div><div class='del'>-     cur_saddr: 0x10a0a0a  cur_daddr: 0x20b0a0a</div><div class='del'>-     cur_udp_dst: 9  cur_udp_src: 9</div><div class='add'>+     queue_map_min: 0  queue_map_max: 0</div><div class='add'>+     dst_min: 192.168.81.2  dst_max:</div><div class='add'>+     src_min:   src_max:</div><div class='add'>+     src_mac: 90:e2:ba:0a:56:b4 dst_mac: 00:1b:21:3c:9d:f8</div><div class='add'>+     udp_src_min: 9  udp_src_max: 109  udp_dst_min: 9  udp_dst_max: 9</div><div class='add'>+     src_mac_count: 0  dst_mac_count: 0</div><div class='add'>+     Flags: UDPSRC_RND  NO_TIMESTAMP  QUEUE_MAP_CPU</div><div class='add'>+ Current:</div><div class='add'>+     pkts-sofar: 100000  errors: 0</div><div class='add'>+     started: 623913381008us  stopped: 623913396439us idle: 25us</div><div class='add'>+     seq_num: 100001  cur_dst_mac_offset: 0  cur_src_mac_offset: 0</div><div class='add'>+     cur_saddr: 192.168.8.3  cur_daddr: 192.168.81.2</div><div class='add'>+     cur_udp_dst: 9  cur_udp_src: 42</div><div class='add'>+     cur_queue_map: 0</div><div class='ctx'>      flows: 0</div><div class='del'>-Result: OK: 13101142(c12220741+d880401) usec, 10000000 (60byte,0frags)</div><div class='del'>-  763292pps 390Mb/sec (390805504bps) errors: 39664</div><div class='add'>+ Result: OK: 15430(c15405+d25) usec, 100000 (60byte,0frags)</div><div class='add'>+  6480562pps 3110Mb/sec (3110669760bps) errors: 0</div><div class='ctx'> </div><div class='del'>-Configuring threads and devices</div><div class='del'>-================================</div><div class='add'>+</div><div class='add'>+Configuring devices</div><div class='add'>+===================</div><div class='ctx'> This is done via the /proc interface, and most easily done via pgset</div><div class='ctx'> as defined in the sample scripts.</div><div class='ctx'> </div><div class='hunk'>@@ -126,7 +145,7 @@ Examples:</div><div class='ctx'>                          To select queue 1 of a given device,</div><div class='ctx'>                          use queue_map_min=1 and queue_map_max=1</div><div class='ctx'> </div><div class='del'>- pgset "src_mac_count 1" Sets the number of MACs we'll range through.  </div><div class='add'>+ pgset "src_mac_count 1" Sets the number of MACs we'll range through.</div><div class='ctx'>                          The 'minimum' MAC is what you set with srcmac.</div><div class='ctx'> </div><div class='ctx'>  pgset "dst_mac_count 1" Sets the number of MACs we'll range through.</div><div class='hunk'>@@ -145,6 +164,7 @@ Examples:</div><div class='ctx'>                               UDPCSUM,</div><div class='ctx'>                               IPSEC # IPsec encapsulation (needs CONFIG_XFRM)</div><div class='ctx'>                               NODE_ALLOC # node specific memory allocation</div><div class='add'>+                              NO_TIMESTAMP # disable timestamping</div><div class='ctx'> </div><div class='ctx'>  pgset spi SPI_VALUE     Set specific SA used to transform packet.</div><div class='ctx'> </div><div class='hunk'>@@ -192,24 +212,43 @@ Examples:</div><div class='ctx'>  pgset "rate 300M"        set rate to 300 Mb/s</div><div class='ctx'>  pgset "ratep 1000000"    set rate to 1Mpps</div><div class='ctx'> </div><div class='add'>+ pgset "xmit_mode netif_receive"  RX inject into stack netif_receive_skb()</div><div class='add'>+				  Works with "burst" but not with "clone_skb".</div><div class='add'>+				  Default xmit_mode is "start_xmit".</div><div class='add'>+</div><div class='ctx'> Sample scripts</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='del'>-A collection of small tutorial scripts for pktgen is in the</div><div class='del'>-samples/pktgen directory:</div><div class='add'>+A collection of tutorial scripts and helpers for pktgen is in the</div><div class='add'>+samples/pktgen directory. The helper parameters.sh file support easy</div><div class='add'>+and consistant parameter parsing across the sample scripts.</div><div class='add'>+</div><div class='add'>+Usage example and help:</div><div class='add'>+ ./pktgen_sample01_simple.sh -i eth4 -m 00:1B:21:3C:9D:F8 -d 192.168.8.2</div><div class='add'>+</div><div class='add'>+Usage: ./pktgen_sample01_simple.sh [-vx] -i ethX</div><div class='add'>+  -i : ($DEV)       output interface/device (required)</div><div class='add'>+  -s : ($PKT_SIZE)  packet size</div><div class='add'>+  -d : ($DEST_IP)   destination IP</div><div class='add'>+  -m : ($DST_MAC)   destination MAC-addr</div><div class='add'>+  -t : ($THREADS)   threads to start</div><div class='add'>+  -c : ($SKB_CLONE) SKB clones send before alloc new SKB</div><div class='add'>+  -b : ($BURST)     HW level bursting of SKBs</div><div class='add'>+  -v : ($VERBOSE)   verbose</div><div class='add'>+  -x : ($DEBUG)     debug</div><div class='add'>+</div><div class='add'>+The global variables being set are also listed.  E.g. the required</div><div class='add'>+interface/device parameter "-i" sets variable $DEV.  Copy the</div><div class='add'>+pktgen_sampleXX scripts and modify them to fit your own needs.</div><div class='add'>+</div><div class='add'>+The old scripts:</div><div class='ctx'> </div><div class='del'>-pktgen.conf-1-1                  # 1 CPU 1 dev </div><div class='ctx'> pktgen.conf-1-2                  # 1 CPU 2 dev</div><div class='del'>-pktgen.conf-2-1                  # 2 CPU's 1 dev </div><div class='del'>-pktgen.conf-2-2                  # 2 CPU's 2 dev</div><div class='ctx'> pktgen.conf-1-1-rdos             # 1 CPU 1 dev w. route DoS </div><div class='ctx'> pktgen.conf-1-1-ip6              # 1 CPU 1 dev ipv6</div><div class='ctx'> pktgen.conf-1-1-ip6-rdos         # 1 CPU 1 dev ipv6  w. route DoS</div><div class='ctx'> pktgen.conf-1-1-flows            # 1 CPU 1 dev multiple flows.</div><div class='ctx'> </div><div class='del'>-Run in shell: ./pktgen.conf-X-Y</div><div class='del'>-This does all the setup including sending.</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> Interrupt affinity</div><div class='ctx'> ===================</div><div class='hunk'>@@ -217,6 +256,9 @@ Note that when adding devices to a specific CPU it is a good idea to</div><div class='ctx'> also assign /proc/irq/XX/smp_affinity so that the TX interrupts are bound</div><div class='ctx'> to the same CPU.  This reduces cache bouncing when freeing skbs.</div><div class='ctx'> </div><div class='add'>+Plus using the device flag QUEUE_MAP_CPU, which maps the SKBs TX queue</div><div class='add'>+to the running threads CPU (directly from smp_processor_id()).</div><div class='add'>+</div><div class='ctx'> Enable IPsec</div><div class='ctx'> ============</div><div class='ctx'> Default IPsec transformation with ESP encapsulation plus transport mode</div><div class='hunk'>@@ -237,18 +279,19 @@ Current commands and configuration options</div><div class='ctx'> </div><div class='ctx'> start</div><div class='ctx'> stop</div><div class='add'>+reset</div><div class='ctx'> </div><div class='ctx'> ** Thread commands:</div><div class='ctx'> </div><div class='ctx'> add_device</div><div class='ctx'> rem_device_all</div><div class='del'>-max_before_softirq</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> ** Device commands:</div><div class='ctx'> </div><div class='ctx'> count</div><div class='ctx'> clone_skb</div><div class='add'>+burst</div><div class='ctx'> debug</div><div class='ctx'> </div><div class='ctx'> frags</div><div class='hunk'>@@ -257,10 +300,17 @@ delay</div><div class='ctx'> src_mac_count</div><div class='ctx'> dst_mac_count</div><div class='ctx'> </div><div class='del'>-pkt_size </div><div class='add'>+pkt_size</div><div class='ctx'> min_pkt_size</div><div class='ctx'> max_pkt_size</div><div class='ctx'> </div><div class='add'>+queue_map_min</div><div class='add'>+queue_map_max</div><div class='add'>+skb_priority</div><div class='add'>+</div><div class='add'>+tos           (ipv4)</div><div class='add'>+traffic_class (ipv6)</div><div class='add'>+</div><div class='ctx'> mpls</div><div class='ctx'> </div><div class='ctx'> udp_src_min</div><div class='hunk'>@@ -269,6 +319,8 @@ udp_src_max</div><div class='ctx'> udp_dst_min</div><div class='ctx'> udp_dst_max</div><div class='ctx'> </div><div class='add'>+node</div><div class='add'>+</div><div class='ctx'> flag</div><div class='ctx'>   IPSRC_RND</div><div class='ctx'>   IPDST_RND</div><div class='hunk'>@@ -287,6 +339,9 @@ flag</div><div class='ctx'>   UDPCSUM</div><div class='ctx'>   IPSEC</div><div class='ctx'>   NODE_ALLOC</div><div class='add'>+  NO_TIMESTAMP</div><div class='add'>+</div><div class='add'>+spi (ipsec)</div><div class='ctx'> </div><div class='ctx'> dst_min</div><div class='ctx'> dst_max</div><div class='hunk'>@@ -299,8 +354,10 @@ src_mac</div><div class='ctx'> </div><div class='ctx'> clear_counters</div><div class='ctx'> </div><div class='del'>-dst6</div><div class='ctx'> src6</div><div class='add'>+dst6</div><div class='add'>+dst6_max</div><div class='add'>+dst6_min</div><div class='ctx'> </div><div class='ctx'> flows</div><div class='ctx'> flowlen</div><div class='hunk'>@@ -308,6 +365,17 @@ flowlen</div><div class='ctx'> rate</div><div class='ctx'> ratep</div><div class='ctx'> </div><div class='add'>+xmit_mode &lt;start_xmit|netif_receive&gt;</div><div class='add'>+</div><div class='add'>+vlan_cfi</div><div class='add'>+vlan_id</div><div class='add'>+vlan_p</div><div class='add'>+</div><div class='add'>+svlan_cfi</div><div class='add'>+svlan_id</div><div class='add'>+svlan_p</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> References:</div><div class='ctx'> ftp://robur.slu.se/pub/Linux/net-development/pktgen-testing/</div><div class='ctx'> ftp://robur.slu.se/pub/Linux/net-development/pktgen-testing/examples/</div><div class='head'>diff --git a/Documentation/networking/switchdev.txt b/Documentation/networking/switchdev.txt<br/>index f981a9295a39..c5d7ade10ff2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/switchdev.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/switchdev.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/switchdev.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/switchdev.txt</a></div><div class='hunk'>@@ -1,59 +1,360 @@</div><div class='del'>-Switch (and switch-ish) device drivers HOWTO</div><div class='del'>-===========================</div><div class='del'>-</div><div class='del'>-Please note that the word "switch" is here used in very generic meaning.</div><div class='del'>-This include devices supporting L2/L3 but also various flow offloading chips,</div><div class='del'>-including switches embedded into SR-IOV NICs.</div><div class='del'>-</div><div class='del'>-Lets describe a topology a bit. Imagine the following example:</div><div class='del'>-</div><div class='del'>-       +----------------------------+    +---------------+</div><div class='del'>-       |     SOME switch chip       |    |      CPU      |</div><div class='del'>-       +----------------------------+    +---------------+</div><div class='del'>-       port1 port2 port3 port4 MNGMNT    |     PCI-E     |</div><div class='del'>-         |     |     |     |     |       +---------------+</div><div class='del'>-        PHY   PHY    |     |     |         |  NIC0 NIC1</div><div class='del'>-                     |     |     |         |   |    |</div><div class='del'>-                     |     |     +- PCI-E -+   |    |</div><div class='del'>-                     |     +------- MII -------+    |</div><div class='del'>-                     +------------- MII ------------+</div><div class='del'>-</div><div class='del'>-In this example, there are two independent lines between the switch silicon</div><div class='del'>-and CPU. NIC0 and NIC1 drivers are not aware of a switch presence. They are</div><div class='del'>-separate from the switch driver. SOME switch chip is by managed by a driver</div><div class='del'>-via PCI-E device MNGMNT. Note that MNGMNT device, NIC0 and NIC1 may be</div><div class='del'>-connected to some other type of bus.</div><div class='del'>-</div><div class='del'>-Now, for the previous example show the representation in kernel:</div><div class='del'>-</div><div class='del'>-       +----------------------------+    +---------------+</div><div class='del'>-       |     SOME switch chip       |    |      CPU      |</div><div class='del'>-       +----------------------------+    +---------------+</div><div class='del'>-       sw0p0 sw0p1 sw0p2 sw0p3 MNGMNT    |     PCI-E     |</div><div class='del'>-         |     |     |     |     |       +---------------+</div><div class='del'>-        PHY   PHY    |     |     |         |  eth0 eth1</div><div class='del'>-                     |     |     |         |   |    |</div><div class='del'>-                     |     |     +- PCI-E -+   |    |</div><div class='del'>-                     |     +------- MII -------+    |</div><div class='del'>-                     +------------- MII ------------+</div><div class='del'>-</div><div class='del'>-Lets call the example switch driver for SOME switch chip "SOMEswitch". This</div><div class='del'>-driver takes care of PCI-E device MNGMNT. There is a netdevice instance sw0pX</div><div class='del'>-created for each port of a switch. These netdevices are instances</div><div class='del'>-of "SOMEswitch" driver. sw0pX netdevices serve as a "representation"</div><div class='del'>-of the switch chip. eth0 and eth1 are instances of some other existing driver.</div><div class='del'>-</div><div class='del'>-The only difference of the switch-port netdevice from the ordinary netdevice</div><div class='del'>-is that is implements couple more NDOs:</div><div class='del'>-</div><div class='del'>-  ndo_switch_parent_id_get - This returns the same ID for two port netdevices</div><div class='del'>-			     of the same physical switch chip. This is</div><div class='del'>-			     mandatory to be implemented by all switch drivers</div><div class='del'>-			     and serves the caller for recognition of a port</div><div class='del'>-			     netdevice.</div><div class='del'>-  ndo_switch_parent_* - Functions that serve for a manipulation of the switch</div><div class='del'>-			chip itself (it can be though of as a "parent" of the</div><div class='del'>-			port, therefore the name). They are not port-specific.</div><div class='del'>-			Caller might use arbitrary port netdevice of the same</div><div class='del'>-			switch and it will make no difference.</div><div class='del'>-  ndo_switch_port_* - Functions that serve for a port-specific manipulation.</div><div class='add'>+Ethernet switch device driver model (switchdev)</div><div class='add'>+===============================================</div><div class='add'>+Copyright (c) 2014 Jiri Pirko &lt;jiri@resnulli.us&gt;</div><div class='add'>+Copyright (c) 2014-2015 Scott Feldman &lt;sfeldma@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The Ethernet switch device driver model (switchdev) is an in-kernel driver</div><div class='add'>+model for switch devices which offload the forwarding (data) plane from the</div><div class='add'>+kernel.</div><div class='add'>+</div><div class='add'>+Figure 1 is a block diagram showing the components of the switchdev model for</div><div class='add'>+an example setup using a data-center-class switch ASIC chip.  Other setups</div><div class='add'>+with SR-IOV or soft switches, such as OVS, are possible.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+                             User-space tools                                 </div><div class='add'>+                                                                              </div><div class='add'>+       user space                   |                                         </div><div class='add'>+      +-------------------------------------------------------------------+   </div><div class='add'>+       kernel                       | Netlink                                 </div><div class='add'>+                                    |                                         </div><div class='add'>+                     +--------------+-------------------------------+         </div><div class='add'>+                     |         Network stack                        |         </div><div class='add'>+                     |           (Linux)                            |         </div><div class='add'>+                     |                                              |         </div><div class='add'>+                     +----------------------------------------------+         </div><div class='add'>+                                                                              </div><div class='add'>+                           sw1p2     sw1p4     sw1p6</div><div class='add'>+                      sw1p1  +  sw1p3  +  sw1p5  +          eth1             </div><div class='add'>+                        +    |    +    |    +    |            +               </div><div class='add'>+                        |    |    |    |    |    |            |               </div><div class='add'>+                     +--+----+----+----+-+--+----+---+  +-----+-----+         </div><div class='add'>+                     |         Switch driver         |  |    mgmt   |         </div><div class='add'>+                     |        (this document)        |  |   driver  |         </div><div class='add'>+                     |                               |  |           |         </div><div class='add'>+                     +--------------+----------------+  +-----------+         </div><div class='add'>+                                    |                                         </div><div class='add'>+       kernel                       | HW bus (eg PCI)                         </div><div class='add'>+      +-------------------------------------------------------------------+   </div><div class='add'>+       hardware                     |                                         </div><div class='add'>+                     +--------------+---+------------+                        </div><div class='add'>+                     |         Switch device (sw1)   |                        </div><div class='add'>+                     |  +----+                       +--------+               </div><div class='add'>+                     |  |    v offloaded data path   | mgmt port              </div><div class='add'>+                     |  |    |                       |                        </div><div class='add'>+                     +--|----|----+----+----+----+---+                        </div><div class='add'>+                        |    |    |    |    |    |                            </div><div class='add'>+                        +    +    +    +    +    +                            </div><div class='add'>+                       p1   p2   p3   p4   p5   p6</div><div class='add'>+                                       </div><div class='add'>+                             front-panel ports                                </div><div class='add'>+                                                                              </div><div class='add'>+</div><div class='add'>+                                    Fig 1.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Include Files</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Configuration</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Use "depends NET_SWITCHDEV" in driver's Kconfig to ensure switchdev model</div><div class='add'>+support is built for driver.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Switch Ports</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+On switchdev driver initialization, the driver will allocate and register a</div><div class='add'>+struct net_device (using register_netdev()) for each enumerated physical switch</div><div class='add'>+port, called the port netdev.  A port netdev is the software representation of</div><div class='add'>+the physical port and provides a conduit for control traffic to/from the</div><div class='add'>+controller (the kernel) and the network, as well as an anchor point for higher</div><div class='add'>+level constructs such as bridges, bonds, VLANs, tunnels, and L3 routers.  Using</div><div class='add'>+standard netdev tools (iproute2, ethtool, etc), the port netdev can also</div><div class='add'>+provide to the user access to the physical properties of the switch port such</div><div class='add'>+as PHY link state and I/O statistics.</div><div class='add'>+</div><div class='add'>+There is (currently) no higher-level kernel object for the switch beyond the</div><div class='add'>+port netdevs.  All of the switchdev driver ops are netdev ops or switchdev ops.</div><div class='add'>+</div><div class='add'>+A switch management port is outside the scope of the switchdev driver model.</div><div class='add'>+Typically, the management port is not participating in offloaded data plane and</div><div class='add'>+is loaded with a different driver, such as a NIC driver, on the management port</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+Port Netdev Naming</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Udev rules should be used for port netdev naming, using some unique attribute</div><div class='add'>+of the port as a key, for example the port MAC address or the port PHYS name.</div><div class='add'>+Hard-coding of kernel netdev names within the driver is discouraged; let the</div><div class='add'>+kernel pick the default netdev name, and let udev set the final name based on a</div><div class='add'>+port attribute.</div><div class='add'>+</div><div class='add'>+Using port PHYS name (ndo_get_phys_port_name) for the key is particularly</div><div class='add'>+useful for dynamically-named ports where the device names its ports based on</div><div class='add'>+external configuration.  For example, if a physical 40G port is split logically</div><div class='add'>+into 4 10G ports, resulting in 4 port netdevs, the device can give a unique</div><div class='add'>+name for each port using port PHYS name.  The udev rule would be:</div><div class='add'>+</div><div class='add'>+SUBSYSTEM=="net", ACTION=="add", DRIVER="&lt;driver&gt;", ATTR{phys_port_name}!="", \</div><div class='add'>+	NAME="$attr{phys_port_name}"</div><div class='add'>+</div><div class='add'>+Suggested naming convention is "swXpYsZ", where X is the switch name or ID, Y</div><div class='add'>+is the port name or ID, and Z is the sub-port name or ID.  For example, sw1p1s0</div><div class='add'>+would be sub-port 0 on port 1 on switch 1.</div><div class='add'>+</div><div class='add'>+Switch ID</div><div class='add'>+^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The switchdev driver must implement the switchdev op switchdev_port_attr_get</div><div class='add'>+for SWITCHDEV_ATTR_PORT_PARENT_ID for each port netdev, returning the same</div><div class='add'>+physical ID for each port of a switch.  The ID must be unique between switches</div><div class='add'>+on the same system.  The ID does not need to be unique between switches on</div><div class='add'>+different systems.</div><div class='add'>+</div><div class='add'>+The switch ID is used to locate ports on a switch and to know if aggregated</div><div class='add'>+ports belong to the same switch.</div><div class='add'>+</div><div class='add'>+Port Features</div><div class='add'>+^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+NETIF_F_NETNS_LOCAL</div><div class='add'>+</div><div class='add'>+If the switchdev driver (and device) only supports offloading of the default</div><div class='add'>+network namespace (netns), the driver should set this feature flag to prevent</div><div class='add'>+the port netdev from being moved out of the default netns.  A netns-aware</div><div class='add'>+driver/device would not set this flag and be responsible for partitioning</div><div class='add'>+hardware to preserve netns containment.  This means hardware cannot forward</div><div class='add'>+traffic from a port in one namespace to another port in another namespace.</div><div class='add'>+</div><div class='add'>+Port Topology</div><div class='add'>+^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The port netdevs representing the physical switch ports can be organized into</div><div class='add'>+higher-level switching constructs.  The default construct is a standalone</div><div class='add'>+router port, used to offload L3 forwarding.  Two or more ports can be bonded</div><div class='add'>+together to form a LAG.  Two or more ports (or LAGs) can be bridged to bridge</div><div class='add'>+L2 networks.  VLANs can be applied to sub-divide L2 networks.  L2-over-L3</div><div class='add'>+tunnels can be built on ports.  These constructs are built using standard Linux</div><div class='add'>+tools such as the bridge driver, the bonding/team drivers, and netlink-based</div><div class='add'>+tools such as iproute2.</div><div class='add'>+</div><div class='add'>+The switchdev driver can know a particular port's position in the topology by</div><div class='add'>+monitoring NETDEV_CHANGEUPPER notifications.  For example, a port moved into a</div><div class='add'>+bond will see it's upper master change.  If that bond is moved into a bridge,</div><div class='add'>+the bond's upper master will change.  And so on.  The driver will track such</div><div class='add'>+movements to know what position a port is in in the overall topology by</div><div class='add'>+registering for netdevice events and acting on NETDEV_CHANGEUPPER.</div><div class='add'>+</div><div class='add'>+L2 Forwarding Offload</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+The idea is to offload the L2 data forwarding (switching) path from the kernel</div><div class='add'>+to the switchdev device by mirroring bridge FDB entries down to the device.  An</div><div class='add'>+FDB entry is the {port, MAC, VLAN} tuple forwarding destination.</div><div class='add'>+</div><div class='add'>+To offloading L2 bridging, the switchdev driver/device should support:</div><div class='add'>+</div><div class='add'>+	- Static FDB entries installed on a bridge port</div><div class='add'>+	- Notification of learned/forgotten src mac/vlans from device</div><div class='add'>+	- STP state changes on the port</div><div class='add'>+	- VLAN flooding of multicast/broadcast and unknown unicast packets</div><div class='add'>+</div><div class='add'>+Static FDB Entries</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The switchdev driver should implement ndo_fdb_add, ndo_fdb_del and ndo_fdb_dump</div><div class='add'>+to support static FDB entries installed to the device.  Static bridge FDB</div><div class='add'>+entries are installed, for example, using iproute2 bridge cmd:</div><div class='add'>+</div><div class='add'>+	bridge fdb add ADDR dev DEV [vlan VID] [self]</div><div class='add'>+</div><div class='add'>+The driver should use the helper switchdev_port_fdb_xxx ops for ndo_fdb_xxx</div><div class='add'>+ops, and handle add/delete/dump of SWITCHDEV_OBJ_PORT_FDB object using</div><div class='add'>+switchdev_port_obj_xxx ops.</div><div class='add'>+</div><div class='add'>+XXX: what should be done if offloading this rule to hardware fails (for</div><div class='add'>+example, due to full capacity in hardware tables) ?</div><div class='add'>+</div><div class='add'>+Note: by default, the bridge does not filter on VLAN and only bridges untagged</div><div class='add'>+traffic.  To enable VLAN support, turn on VLAN filtering:</div><div class='add'>+</div><div class='add'>+	echo 1 &gt;/sys/class/net/&lt;bridge&gt;/bridge/vlan_filtering</div><div class='add'>+</div><div class='add'>+Notification of Learned/Forgotten Source MAC/VLANs</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The switch device will learn/forget source MAC address/VLAN on ingress packets</div><div class='add'>+and notify the switch driver of the mac/vlan/port tuples.  The switch driver,</div><div class='add'>+in turn, will notify the bridge driver using the switchdev notifier call:</div><div class='add'>+</div><div class='add'>+	err = call_switchdev_notifiers(val, dev, info);</div><div class='add'>+</div><div class='add'>+Where val is SWITCHDEV_FDB_ADD when learning and SWITCHDEV_FDB_DEL when</div><div class='add'>+forgetting, and info points to a struct switchdev_notifier_fdb_info.  On</div><div class='add'>+SWITCHDEV_FDB_ADD, the bridge driver will install the FDB entry into the</div><div class='add'>+bridge's FDB and mark the entry as NTF_EXT_LEARNED.  The iproute2 bridge</div><div class='add'>+command will label these entries "offload":</div><div class='add'>+</div><div class='add'>+	$ bridge fdb</div><div class='add'>+	52:54:00:12:35:01 dev sw1p1 master br0 permanent</div><div class='add'>+	00:02:00:00:02:00 dev sw1p1 master br0 offload</div><div class='add'>+	00:02:00:00:02:00 dev sw1p1 self</div><div class='add'>+	52:54:00:12:35:02 dev sw1p2 master br0 permanent</div><div class='add'>+	00:02:00:00:03:00 dev sw1p2 master br0 offload</div><div class='add'>+	00:02:00:00:03:00 dev sw1p2 self</div><div class='add'>+	33:33:00:00:00:01 dev eth0 self permanent</div><div class='add'>+	01:00:5e:00:00:01 dev eth0 self permanent</div><div class='add'>+	33:33:ff:00:00:00 dev eth0 self permanent</div><div class='add'>+	01:80:c2:00:00:0e dev eth0 self permanent</div><div class='add'>+	33:33:00:00:00:01 dev br0 self permanent</div><div class='add'>+	01:00:5e:00:00:01 dev br0 self permanent</div><div class='add'>+	33:33:ff:12:35:01 dev br0 self permanent</div><div class='add'>+</div><div class='add'>+Learning on the port should be disabled on the bridge using the bridge command:</div><div class='add'>+</div><div class='add'>+	bridge link set dev DEV learning off</div><div class='add'>+</div><div class='add'>+Learning on the device port should be enabled, as well as learning_sync:</div><div class='add'>+</div><div class='add'>+	bridge link set dev DEV learning on self</div><div class='add'>+	bridge link set dev DEV learning_sync on self</div><div class='add'>+</div><div class='add'>+Learning_sync attribute enables syncing of the learned/forgotton FDB entry to</div><div class='add'>+the bridge's FDB.  It's possible, but not optimal, to enable learning on the</div><div class='add'>+device port and on the bridge port, and disable learning_sync.</div><div class='add'>+</div><div class='add'>+To support learning and learning_sync port attributes, the driver implements</div><div class='add'>+switchdev op switchdev_port_attr_get/set for SWITCHDEV_ATTR_PORT_BRIDGE_FLAGS.</div><div class='add'>+The driver should initialize the attributes to the hardware defaults.</div><div class='add'>+</div><div class='add'>+FDB Ageing</div><div class='add'>+^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+There are two FDB ageing models supported: 1) ageing by the device, and 2)</div><div class='add'>+ageing by the kernel.  Ageing by the device is preferred if many FDB entries</div><div class='add'>+are supported.  The driver calls call_switchdev_notifiers(SWITCHDEV_FDB_DEL,</div><div class='add'>+...) to age out the FDB entry.  In this model, ageing by the kernel should be</div><div class='add'>+turned off.  XXX: how to turn off ageing in kernel on a per-port basis or</div><div class='add'>+otherwise prevent the kernel from ageing out the FDB entry?</div><div class='add'>+</div><div class='add'>+In the kernel ageing model, the standard bridge ageing mechanism is used to age</div><div class='add'>+out stale FDB entries.  To keep an FDB entry "alive", the driver should refresh</div><div class='add'>+the FDB entry by calling call_switchdev_notifiers(SWITCHDEV_FDB_ADD, ...).  The</div><div class='add'>+notification will reset the FDB entry's last-used time to now.  The driver</div><div class='add'>+should rate limit refresh notifications, for example, no more than once a</div><div class='add'>+second.  If the FDB entry expires, fdb_delete is called to remove entry from</div><div class='add'>+the device.</div><div class='add'>+</div><div class='add'>+STP State Change on Port</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Internally or with a third-party STP protocol implementation (e.g. mstpd), the</div><div class='add'>+bridge driver maintains the STP state for ports, and will notify the switch</div><div class='add'>+driver of STP state change on a port using the switchdev op</div><div class='add'>+switchdev_attr_port_set for SWITCHDEV_ATTR_PORT_STP_UPDATE.</div><div class='add'>+</div><div class='add'>+State is one of BR_STATE_*.  The switch driver can use STP state updates to</div><div class='add'>+update ingress packet filter list for the port.  For example, if port is</div><div class='add'>+DISABLED, no packets should pass, but if port moves to BLOCKED, then STP BPDUs</div><div class='add'>+and other IEEE 01:80:c2:xx:xx:xx link-local multicast packets can pass.</div><div class='add'>+</div><div class='add'>+Note that STP BDPUs are untagged and STP state applies to all VLANs on the port</div><div class='add'>+so packet filters should be applied consistently across untagged and tagged</div><div class='add'>+VLANs on the port.</div><div class='add'>+</div><div class='add'>+Flooding L2 domain</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+For a given L2 VLAN domain, the switch device should flood multicast/broadcast</div><div class='add'>+and unknown unicast packets to all ports in domain, if allowed by port's</div><div class='add'>+current STP state.  The switch driver, knowing which ports are within which</div><div class='add'>+vlan L2 domain, can program the switch device for flooding.  The packet should</div><div class='add'>+also be sent to the port netdev for processing by the bridge driver.  The</div><div class='add'>+bridge should not reflood the packet to the same ports the device flooded.</div><div class='add'>+XXX: the mechanism to avoid duplicate flood packets is being discuseed.</div><div class='add'>+</div><div class='add'>+It is possible for the switch device to not handle flooding and push the</div><div class='add'>+packets up to the bridge driver for flooding.  This is not ideal as the number</div><div class='add'>+of ports scale in the L2 domain as the device is much more efficient at</div><div class='add'>+flooding packets that software.</div><div class='add'>+</div><div class='add'>+IGMP Snooping</div><div class='add'>+^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+XXX: complete this section</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+L3 Routing Offload</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Offloading L3 routing requires that device be programmed with FIB entries from</div><div class='add'>+the kernel, with the device doing the FIB lookup and forwarding.  The device</div><div class='add'>+does a longest prefix match (LPM) on FIB entries matching route prefix and</div><div class='add'>+forwards the packet to the matching FIB entry's nexthop(s) egress ports.</div><div class='add'>+</div><div class='add'>+To program the device, the driver implements support for</div><div class='add'>+SWITCHDEV_OBJ_IPV[4|6]_FIB object using switchdev_port_obj_xxx ops.</div><div class='add'>+switchdev_port_obj_add is used for both adding a new FIB entry to the device,</div><div class='add'>+or modifying an existing entry on the device.</div><div class='add'>+</div><div class='add'>+XXX: Currently, only SWITCHDEV_OBJ_IPV4_FIB objects are supported.</div><div class='add'>+</div><div class='add'>+SWITCHDEV_OBJ_IPV4_FIB object passes:</div><div class='add'>+</div><div class='add'>+	struct switchdev_obj_ipv4_fib {         /* IPV4_FIB */</div><div class='add'>+		u32 dst;</div><div class='add'>+		int dst_len;</div><div class='add'>+		struct fib_info *fi;</div><div class='add'>+		u8 tos;</div><div class='add'>+		u8 type;</div><div class='add'>+		u32 nlflags;</div><div class='add'>+		u32 tb_id;</div><div class='add'>+	} ipv4_fib;</div><div class='add'>+</div><div class='add'>+to add/modify/delete IPv4 dst/dest_len prefix on table tb_id.  The *fi</div><div class='add'>+structure holds details on the route and route's nexthops.  *dev is one of the</div><div class='add'>+port netdevs mentioned in the routes next hop list.  If the output port netdevs</div><div class='add'>+referenced in the route's nexthop list don't all have the same switch ID, the</div><div class='add'>+driver is not called to add/modify/delete the FIB entry.</div><div class='add'>+</div><div class='add'>+Routes offloaded to the device are labeled with "offload" in the ip route</div><div class='add'>+listing:</div><div class='add'>+</div><div class='add'>+	$ ip route show</div><div class='add'>+	default via 192.168.0.2 dev eth0</div><div class='add'>+	11.0.0.0/30 dev sw1p1  proto kernel  scope link  src 11.0.0.2 offload</div><div class='add'>+	11.0.0.4/30 via 11.0.0.1 dev sw1p1  proto zebra  metric 20 offload</div><div class='add'>+	11.0.0.8/30 dev sw1p2  proto kernel  scope link  src 11.0.0.10 offload</div><div class='add'>+	11.0.0.12/30 via 11.0.0.9 dev sw1p2  proto zebra  metric 20 offload</div><div class='add'>+	12.0.0.2  proto zebra  metric 30 offload</div><div class='add'>+		nexthop via 11.0.0.1  dev sw1p1 weight 1</div><div class='add'>+		nexthop via 11.0.0.9  dev sw1p2 weight 1</div><div class='add'>+	12.0.0.3 via 11.0.0.1 dev sw1p1  proto zebra  metric 20 offload</div><div class='add'>+	12.0.0.4 via 11.0.0.9 dev sw1p2  proto zebra  metric 20 offload</div><div class='add'>+	192.168.0.0/24 dev eth0  proto kernel  scope link  src 192.168.0.15</div><div class='add'>+</div><div class='add'>+XXX: add/mod/del IPv6 FIB API</div><div class='add'>+</div><div class='add'>+Nexthop Resolution</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The FIB entry's nexthop list contains the nexthop tuple (gateway, dev), but for</div><div class='add'>+the switch device to forward the packet with the correct dst mac address, the</div><div class='add'>+nexthop gateways must be resolved to the neighbor's mac address.  Neighbor mac</div><div class='add'>+address discovery comes via the ARP (or ND) process and is available via the</div><div class='add'>+arp_tbl neighbor table.  To resolve the routes nexthop gateways, the driver</div><div class='add'>+should trigger the kernel's neighbor resolution process.  See the rocker</div><div class='add'>+driver's rocker_port_ipv4_resolve() for an example.</div><div class='add'>+</div><div class='add'>+The driver can monitor for updates to arp_tbl using the netevent notifier</div><div class='add'>+NETEVENT_NEIGH_UPDATE.  The device can be programmed with resolved nexthops</div><div class='add'>+for the routes as arp_tbl updates.</div><div class='head'>diff --git a/Documentation/networking/tc-actions-env-rules.txt b/Documentation/networking/tc-actions-env-rules.txt<br/>index 70d6cf608251..f37814693ad3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/tc-actions-env-rules.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/tc-actions-env-rules.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/tc-actions-env-rules.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/tc-actions-env-rules.txt</a></div><div class='hunk'>@@ -8,14 +8,8 @@ For example if your action queues a packet to be processed later,</div><div class='ctx'> or intentionally branches by redirecting a packet, then you need to</div><div class='ctx'> clone the packet.</div><div class='ctx'> </div><div class='del'>-There are certain fields in the skb tc_verd that need to be reset so we</div><div class='del'>-avoid loops, etc.  A few are generic enough that skb_act_clone()</div><div class='del'>-resets them for you, so invoke skb_act_clone() rather than skb_clone().</div><div class='del'>-</div><div class='ctx'> 2) If you munge any packet thou shalt call pskb_expand_head in the case</div><div class='ctx'> someone else is referencing the skb. After that you "own" the skb.</div><div class='del'>-You must also tell us if it is ok to munge the packet (TC_OK2MUNGE),</div><div class='del'>-this way any action downstream can stomp on the packet.</div><div class='ctx'> </div><div class='ctx'> 3) Dropping packets you don't own is a no-no. You simply return</div><div class='ctx'> TC_ACT_SHOT to the caller and they will drop it.</div><div class='head'>diff --git a/Documentation/networking/timestamping/txtimestamp.c b/Documentation/networking/timestamping/txtimestamp.c<br/>index 8217510d3842..5df07047ca86 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/timestamping/txtimestamp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/networking/timestamping/txtimestamp.c</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/timestamping/txtimestamp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/networking/timestamping/txtimestamp.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;error.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;linux/errqueue.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='hunk'>@@ -49,7 +50,6 @@</div><div class='ctx'> #include &lt;poll.h&gt;</div><div class='ctx'> #include &lt;stdarg.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='del'>-#include &lt;stdint.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='hunk'>@@ -96,7 +96,7 @@ static void __print_timestamp(const char *name, struct timespec *cur,</div><div class='ctx'> 		prev_ms = (long) ts_prev.tv_sec * 1000 * 1000;</div><div class='ctx'> 		prev_ms += ts_prev.tv_nsec / 1000;</div><div class='ctx'> </div><div class='del'>-		fprintf(stderr, "  (%+ld us)", cur_ms - prev_ms);</div><div class='add'>+		fprintf(stderr, "  (%+" PRId64 " us)", cur_ms - prev_ms);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ts_prev = *cur;</div><div class='head'>diff --git a/Documentation/nfc/nfc-hci.txt b/Documentation/nfc/nfc-hci.txt<br/>index 0686c9e211c2..0dc078cab972 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/nfc/nfc-hci.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/nfc/nfc-hci.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/nfc/nfc-hci.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nfc/nfc-hci.txt</a></div><div class='hunk'>@@ -122,7 +122,7 @@ This must be done from a context that can sleep.</div><div class='ctx'> PHY Management</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='del'>-The physical link (i2c, ...) management is defined by the following struture:</div><div class='add'>+The physical link (i2c, ...) management is defined by the following structure:</div><div class='ctx'> </div><div class='ctx'> struct nfc_phy_ops {</div><div class='ctx'> 	int (*write)(void *dev_id, struct sk_buff *skb);</div><div class='head'>diff --git a/Documentation/ntb.txt b/Documentation/ntb.txt<br/>new file mode 100644<br/>index 000000000000..1d9bbabb6c79<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ntb.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/ntb.txt</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+# NTB Drivers</div><div class='add'>+</div><div class='add'>+NTB (Non-Transparent Bridge) is a type of PCI-Express bridge chip that connects</div><div class='add'>+the separate memory systems of two computers to the same PCI-Express fabric.</div><div class='add'>+Existing NTB hardware supports a common feature set, including scratchpad</div><div class='add'>+registers, doorbell registers, and memory translation windows.  Scratchpad</div><div class='add'>+registers are read-and-writable registers that are accessible from either side</div><div class='add'>+of the device, so that peers can exchange a small amount of information at a</div><div class='add'>+fixed address.  Doorbell registers provide a way for peers to send interrupt</div><div class='add'>+events.  Memory windows allow translated read and write access to the peer</div><div class='add'>+memory.</div><div class='add'>+</div><div class='add'>+## NTB Core Driver (ntb)</div><div class='add'>+</div><div class='add'>+The NTB core driver defines an api wrapping the common feature set, and allows</div><div class='add'>+clients interested in NTB features to discover NTB the devices supported by</div><div class='add'>+hardware drivers.  The term "client" is used here to mean an upper layer</div><div class='add'>+component making use of the NTB api.  The term "driver," or "hardware driver,"</div><div class='add'>+is used here to mean a driver for a specific vendor and model of NTB hardware.</div><div class='add'>+</div><div class='add'>+## NTB Client Drivers</div><div class='add'>+</div><div class='add'>+NTB client drivers should register with the NTB core driver.  After</div><div class='add'>+registering, the client probe and remove functions will be called appropriately</div><div class='add'>+as ntb hardware, or hardware drivers, are inserted and removed.  The</div><div class='add'>+registration uses the Linux Device framework, so it should feel familiar to</div><div class='add'>+anyone who has written a pci driver.</div><div class='add'>+</div><div class='add'>+### NTB Transport Client (ntb\_transport) and NTB Netdev (ntb\_netdev)</div><div class='add'>+</div><div class='add'>+The primary client for NTB is the Transport client, used in tandem with NTB</div><div class='add'>+Netdev.  These drivers function together to create a logical link to the peer,</div><div class='add'>+across the ntb, to exchange packets of network data.  The Transport client</div><div class='add'>+establishes a logical link to the peer, and creates queue pairs to exchange</div><div class='add'>+messages and data.  The NTB Netdev then creates an ethernet device using a</div><div class='add'>+Transport queue pair.  Network data is copied between socket buffers and the</div><div class='add'>+Transport queue pair buffer.  The Transport client may be used for other things</div><div class='add'>+besides Netdev, however no other applications have yet been written.</div><div class='add'>+</div><div class='add'>+### NTB Ping Pong Test Client (ntb\_pingpong)</div><div class='add'>+</div><div class='add'>+The Ping Pong test client serves as a demonstration to exercise the doorbell</div><div class='add'>+and scratchpad registers of NTB hardware, and as an example simple NTB client.</div><div class='add'>+Ping Pong enables the link when started, waits for the NTB link to come up, and</div><div class='add'>+then proceeds to read and write the doorbell scratchpad registers of the NTB.</div><div class='add'>+The peers interrupt each other using a bit mask of doorbell bits, which is</div><div class='add'>+shifted by one in each round, to test the behavior of multiple doorbell bits</div><div class='add'>+and interrupt vectors.  The Ping Pong driver also reads the first local</div><div class='add'>+scratchpad, and writes the value plus one to the first peer scratchpad, each</div><div class='add'>+round before writing the peer doorbell register.</div><div class='add'>+</div><div class='add'>+Module Parameters:</div><div class='add'>+</div><div class='add'>+* unsafe - Some hardware has known issues with scratchpad and doorbell</div><div class='add'>+	registers.  By default, Ping Pong will not attempt to exercise such</div><div class='add'>+	hardware.  You may override this behavior at your own risk by setting</div><div class='add'>+	unsafe=1.</div><div class='add'>+* delay\_ms - Specify the delay between receiving a doorbell</div><div class='add'>+	interrupt event and setting the peer doorbell register for the next</div><div class='add'>+	round.</div><div class='add'>+* init\_db - Specify the doorbell bits to start new series of rounds.  A new</div><div class='add'>+	series begins once all the doorbell bits have been shifted out of</div><div class='add'>+	range.</div><div class='add'>+* dyndbg - It is suggested to specify dyndbg=+p when loading this module, and</div><div class='add'>+	then to observe debugging output on the console.</div><div class='add'>+</div><div class='add'>+### NTB Tool Test Client (ntb\_tool)</div><div class='add'>+</div><div class='add'>+The Tool test client serves for debugging, primarily, ntb hardware and drivers.</div><div class='add'>+The Tool provides access through debugfs for reading, setting, and clearing the</div><div class='add'>+NTB doorbell, and reading and writing scratchpads.</div><div class='add'>+</div><div class='add'>+The Tool does not currently have any module parameters.</div><div class='add'>+</div><div class='add'>+Debugfs Files:</div><div class='add'>+</div><div class='add'>+* *debugfs*/ntb\_tool/*hw*/ - A directory in debugfs will be created for each</div><div class='add'>+	NTB device probed by the tool.  This directory is shortened to *hw*</div><div class='add'>+	below.</div><div class='add'>+* *hw*/db - This file is used to read, set, and clear the local doorbell.  Not</div><div class='add'>+	all operations may be supported by all hardware.  To read the doorbell,</div><div class='add'>+	read the file.  To set the doorbell, write `s` followed by the bits to</div><div class='add'>+	set (eg: `echo 's 0x0101' &gt; db`).  To clear the doorbell, write `c`</div><div class='add'>+	followed by the bits to clear.</div><div class='add'>+* *hw*/mask - This file is used to read, set, and clear the local doorbell mask.</div><div class='add'>+	See *db* for details.</div><div class='add'>+* *hw*/peer\_db - This file is used to read, set, and clear the peer doorbell.</div><div class='add'>+	See *db* for details.</div><div class='add'>+* *hw*/peer\_mask - This file is used to read, set, and clear the peer doorbell</div><div class='add'>+	mask.  See *db* for details.</div><div class='add'>+* *hw*/spad - This file is used to read and write local scratchpads.  To read</div><div class='add'>+	the values of all scratchpads, read the file.  To write values, write a</div><div class='add'>+	series of pairs of scratchpad number and value</div><div class='add'>+	(eg: `echo '4 0x123 7 0xabc' &gt; spad`</div><div class='add'>+	# to set scratchpads `4` and `7` to `0x123` and `0xabc`, respectively).</div><div class='add'>+* *hw*/peer\_spad - This file is used to read and write peer scratchpads.  See</div><div class='add'>+	*spad* for details.</div><div class='add'>+</div><div class='add'>+## NTB Hardware Drivers</div><div class='add'>+</div><div class='add'>+NTB hardware drivers should register devices with the NTB core driver.  After</div><div class='add'>+registering, clients probe and remove functions will be called.</div><div class='add'>+</div><div class='add'>+### NTB Intel Hardware Driver (ntb\_hw\_intel)</div><div class='add'>+</div><div class='add'>+The Intel hardware driver supports NTB on Xeon and Atom CPUs.</div><div class='add'>+</div><div class='add'>+Module Parameters:</div><div class='add'>+</div><div class='add'>+* b2b\_mw\_idx - If the peer ntb is to be accessed via a memory window, then use</div><div class='add'>+	this memory window to access the peer ntb.  A value of zero or positive</div><div class='add'>+	starts from the first mw idx, and a negative value starts from the last</div><div class='add'>+	mw idx.  Both sides MUST set the same value here!  The default value is</div><div class='add'>+	`-1`.</div><div class='add'>+* b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if</div><div class='add'>+	the memory window is large enough, still allow the client to use the</div><div class='add'>+	second half of the memory window for address translation to the peer.</div><div class='add'>+* xeon\_b2b\_usd\_bar2\_addr64 - If using B2B topology on Xeon hardware, use</div><div class='add'>+	this 64 bit address on the bus between the NTB devices for the window</div><div class='add'>+	at BAR2, on the upstream side of the link.</div><div class='add'>+* xeon\_b2b\_usd\_bar4\_addr64 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_usd\_bar4\_addr32 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_usd\_bar5\_addr32 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_dsd\_bar2\_addr64 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_dsd\_bar4\_addr64 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_dsd\_bar4\_addr32 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='add'>+* xeon\_b2b\_dsd\_bar5\_addr32 - See *xeon\_b2b\_bar2\_addr64*.</div><div class='head'>diff --git a/Documentation/nvdimm/btt.txt b/Documentation/nvdimm/btt.txt<br/>new file mode 100644<br/>index 000000000000..b91443f577dc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/nvdimm/btt.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nvdimm/btt.txt</a></div><div class='hunk'>@@ -0,0 +1,283 @@</div><div class='add'>+BTT - Block Translation Table</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1. Introduction</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Persistent memory based storage is able to perform IO at byte (or more</div><div class='add'>+accurately, cache line) granularity. However, we often want to expose such</div><div class='add'>+storage as traditional block devices. The block drivers for persistent memory</div><div class='add'>+will do exactly this. However, they do not provide any atomicity guarantees.</div><div class='add'>+Traditional SSDs typically provide protection against torn sectors in hardware,</div><div class='add'>+using stored energy in capacitors to complete in-flight block writes, or perhaps</div><div class='add'>+in firmware. We don't have this luxury with persistent memory - if a write is in</div><div class='add'>+progress, and we experience a power failure, the block will contain a mix of old</div><div class='add'>+and new data. Applications may not be prepared to handle such a scenario.</div><div class='add'>+</div><div class='add'>+The Block Translation Table (BTT) provides atomic sector update semantics for</div><div class='add'>+persistent memory devices, so that applications that rely on sector writes not</div><div class='add'>+being torn can continue to do so. The BTT manifests itself as a stacked block</div><div class='add'>+device, and reserves a portion of the underlying storage for its metadata. At</div><div class='add'>+the heart of it, is an indirection table that re-maps all the blocks on the</div><div class='add'>+volume. It can be thought of as an extremely simple file system that only</div><div class='add'>+provides atomic sector updates.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+2. Static Layout</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The underlying storage on which a BTT can be laid out is not limited in any way.</div><div class='add'>+The BTT, however, splits the available space into chunks of up to 512 GiB,</div><div class='add'>+called "Arenas".</div><div class='add'>+</div><div class='add'>+Each arena follows the same layout for its metadata, and all references in an</div><div class='add'>+arena are internal to it (with the exception of one field that points to the</div><div class='add'>+next arena). The following depicts the "On-disk" metadata layout:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  Backing Store     +-------&gt;  Arena</div><div class='add'>++---------------+   |   +------------------+</div><div class='add'>+|               |   |   | Arena info block |</div><div class='add'>+|    Arena 0    +---+   |       4K         |</div><div class='add'>+|     512G      |       +------------------+</div><div class='add'>+|               |       |                  |</div><div class='add'>++---------------+       |                  |</div><div class='add'>+|               |       |                  |</div><div class='add'>+|    Arena 1    |       |   Data Blocks    |</div><div class='add'>+|     512G      |       |                  |</div><div class='add'>+|               |       |                  |</div><div class='add'>++---------------+       |                  |</div><div class='add'>+|       .       |       |                  |</div><div class='add'>+|       .       |       |                  |</div><div class='add'>+|       .       |       |                  |</div><div class='add'>+|               |       |                  |</div><div class='add'>+|               |       |                  |</div><div class='add'>++---------------+       +------------------+</div><div class='add'>+                        |                  |</div><div class='add'>+                        |     BTT Map      |</div><div class='add'>+                        |                  |</div><div class='add'>+                        |                  |</div><div class='add'>+                        +------------------+</div><div class='add'>+                        |                  |</div><div class='add'>+                        |     BTT Flog     |</div><div class='add'>+                        |                  |</div><div class='add'>+                        +------------------+</div><div class='add'>+                        | Info block copy  |</div><div class='add'>+                        |       4K         |</div><div class='add'>+                        +------------------+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+3. Theory of Operation</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+a. The BTT Map</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The map is a simple lookup/indirection table that maps an LBA to an internal</div><div class='add'>+block. Each map entry is 32 bits. The two most significant bits are special</div><div class='add'>+flags, and the remaining form the internal block number.</div><div class='add'>+</div><div class='add'>+Bit      Description</div><div class='add'>+31 - 30	: Error and Zero flags - Used in the following way:</div><div class='add'>+	 Bit		      Description</div><div class='add'>+	31 30</div><div class='add'>+	-----------------------------------------------------------------------</div><div class='add'>+	 00	Initial state. Reads return zeroes; Premap = Postmap</div><div class='add'>+	 01	Zero state: Reads return zeroes</div><div class='add'>+	 10	Error state: Reads fail; Writes clear 'E' bit</div><div class='add'>+	 11	Normal Block – has valid postmap</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+29 - 0	: Mappings to internal 'postmap' blocks</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Some of the terminology that will be subsequently used:</div><div class='add'>+</div><div class='add'>+External LBA  : LBA as made visible to upper layers.</div><div class='add'>+ABA           : Arena Block Address - Block offset/number within an arena</div><div class='add'>+Premap ABA    : The block offset into an arena, which was decided upon by range</div><div class='add'>+		checking the External LBA</div><div class='add'>+Postmap ABA   : The block number in the "Data Blocks" area obtained after</div><div class='add'>+		indirection from the map</div><div class='add'>+nfree	      : The number of free blocks that are maintained at any given time.</div><div class='add'>+		This is the number of concurrent writes that can happen to the</div><div class='add'>+		arena.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+For example, after adding a BTT, we surface a disk of 1024G. We get a read for</div><div class='add'>+the external LBA at 768G. This falls into the second arena, and of the 512G</div><div class='add'>+worth of blocks that this arena contributes, this block is at 256G. Thus, the</div><div class='add'>+premap ABA is 256G. We now refer to the map, and find out the mapping for block</div><div class='add'>+'X' (256G) points to block 'Y', say '64'. Thus the postmap ABA is 64.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+b. The BTT Flog</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The BTT provides sector atomicity by making every write an "allocating write",</div><div class='add'>+i.e. Every write goes to a "free" block. A running list of free blocks is</div><div class='add'>+maintained in the form of the BTT flog. 'Flog' is a combination of the words</div><div class='add'>+"free list" and "log". The flog contains 'nfree' entries, and an entry contains:</div><div class='add'>+</div><div class='add'>+lba     : The premap ABA that is being written to</div><div class='add'>+old_map : The old postmap ABA - after 'this' write completes, this will be a</div><div class='add'>+	  free block.</div><div class='add'>+new_map : The new postmap ABA. The map will up updated to reflect this</div><div class='add'>+	  lba-&gt;postmap_aba mapping, but we log it here in case we have to</div><div class='add'>+	  recover.</div><div class='add'>+seq	: Sequence number to mark which of the 2 sections of this flog entry is</div><div class='add'>+	  valid/newest. It cycles between 01-&gt;10-&gt;11-&gt;01 (binary) under normal</div><div class='add'>+	  operation, with 00 indicating an uninitialized state.</div><div class='add'>+lba'	: alternate lba entry</div><div class='add'>+old_map': alternate old postmap entry</div><div class='add'>+new_map': alternate new postmap entry</div><div class='add'>+seq'	: alternate sequence number.</div><div class='add'>+</div><div class='add'>+Each of the above fields is 32-bit, making one entry 32 bytes. Entries are also</div><div class='add'>+padded to 64 bytes to avoid cache line sharing or aliasing. Flog updates are</div><div class='add'>+done such that for any entry being written, it:</div><div class='add'>+a. overwrites the 'old' section in the entry based on sequence numbers</div><div class='add'>+b. writes the 'new' section such that the sequence number is written last.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+c. The concept of lanes</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+While 'nfree' describes the number of concurrent IOs an arena can process</div><div class='add'>+concurrently, 'nlanes' is the number of IOs the BTT device as a whole can</div><div class='add'>+process.</div><div class='add'>+ nlanes = min(nfree, num_cpus)</div><div class='add'>+A lane number is obtained at the start of any IO, and is used for indexing into</div><div class='add'>+all the on-disk and in-memory data structures for the duration of the IO. If</div><div class='add'>+there are more CPUs than the max number of available lanes, than lanes are</div><div class='add'>+protected by spinlocks.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+d. In-memory data structure: Read Tracking Table (RTT)</div><div class='add'>+------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Consider a case where we have two threads, one doing reads and the other,</div><div class='add'>+writes. We can hit a condition where the writer thread grabs a free block to do</div><div class='add'>+a new IO, but the (slow) reader thread is still reading from it. In other words,</div><div class='add'>+the reader consulted a map entry, and started reading the corresponding block. A</div><div class='add'>+writer started writing to the same external LBA, and finished the write updating</div><div class='add'>+the map for that external LBA to point to its new postmap ABA. At this point the</div><div class='add'>+internal, postmap block that the reader is (still) reading has been inserted</div><div class='add'>+into the list of free blocks. If another write comes in for the same LBA, it can</div><div class='add'>+grab this free block, and start writing to it, causing the reader to read</div><div class='add'>+incorrect data. To prevent this, we introduce the RTT.</div><div class='add'>+</div><div class='add'>+The RTT is a simple, per arena table with 'nfree' entries. Every reader inserts</div><div class='add'>+into rtt[lane_number], the postmap ABA it is reading, and clears it after the</div><div class='add'>+read is complete. Every writer thread, after grabbing a free block, checks the</div><div class='add'>+RTT for its presence. If the postmap free block is in the RTT, it waits till the</div><div class='add'>+reader clears the RTT entry, and only then starts writing to it.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+e. In-memory data structure: map locks</div><div class='add'>+--------------------------------------</div><div class='add'>+</div><div class='add'>+Consider a case where two writer threads are writing to the same LBA. There can</div><div class='add'>+be a race in the following sequence of steps:</div><div class='add'>+</div><div class='add'>+free[lane] = map[premap_aba]</div><div class='add'>+map[premap_aba] = postmap_aba</div><div class='add'>+</div><div class='add'>+Both threads can update their respective free[lane] with the same old, freed</div><div class='add'>+postmap_aba. This has made the layout inconsistent by losing a free entry, and</div><div class='add'>+at the same time, duplicating another free entry for two lanes.</div><div class='add'>+</div><div class='add'>+To solve this, we could have a single map lock (per arena) that has to be taken</div><div class='add'>+before performing the above sequence, but we feel that could be too contentious.</div><div class='add'>+Instead we use an array of (nfree) map_locks that is indexed by</div><div class='add'>+(premap_aba modulo nfree).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+f. Reconstruction from the Flog</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+On startup, we analyze the BTT flog to create our list of free blocks. We walk</div><div class='add'>+through all the entries, and for each lane, of the set of two possible</div><div class='add'>+'sections', we always look at the most recent one only (based on the sequence</div><div class='add'>+number). The reconstruction rules/steps are simple:</div><div class='add'>+- Read map[log_entry.lba].</div><div class='add'>+- If log_entry.new matches the map entry, then log_entry.old is free.</div><div class='add'>+- If log_entry.new does not match the map entry, then log_entry.new is free.</div><div class='add'>+  (This case can only be caused by power-fails/unsafe shutdowns)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+g. Summarizing - Read and Write flows</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+Read:</div><div class='add'>+</div><div class='add'>+1.  Convert external LBA to arena number + pre-map ABA</div><div class='add'>+2.  Get a lane (and take lane_lock)</div><div class='add'>+3.  Read map to get the entry for this pre-map ABA</div><div class='add'>+4.  Enter post-map ABA into RTT[lane]</div><div class='add'>+5.  If TRIM flag set in map, return zeroes, and end IO (go to step 8)</div><div class='add'>+6.  If ERROR flag set in map, end IO with EIO (go to step 8)</div><div class='add'>+7.  Read data from this block</div><div class='add'>+8.  Remove post-map ABA entry from RTT[lane]</div><div class='add'>+9.  Release lane (and lane_lock)</div><div class='add'>+</div><div class='add'>+Write:</div><div class='add'>+</div><div class='add'>+1.  Convert external LBA to Arena number + pre-map ABA</div><div class='add'>+2.  Get a lane (and take lane_lock)</div><div class='add'>+3.  Use lane to index into in-memory free list and obtain a new block, next flog</div><div class='add'>+        index, next sequence number</div><div class='add'>+4.  Scan the RTT to check if free block is present, and spin/wait if it is.</div><div class='add'>+5.  Write data to this free block</div><div class='add'>+6.  Read map to get the existing post-map ABA entry for this pre-map ABA</div><div class='add'>+7.  Write flog entry: [premap_aba / old postmap_aba / new postmap_aba / seq_num]</div><div class='add'>+8.  Write new post-map ABA into map.</div><div class='add'>+9.  Write old post-map entry into the free list</div><div class='add'>+10. Calculate next sequence number and write into the free list entry</div><div class='add'>+11. Release lane (and lane_lock)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4. Error Handling</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+An arena would be in an error state if any of the metadata is corrupted</div><div class='add'>+irrecoverably, either due to a bug or a media error. The following conditions</div><div class='add'>+indicate an error:</div><div class='add'>+- Info block checksum does not match (and recovering from the copy also fails)</div><div class='add'>+- All internal available blocks are not uniquely and entirely addressed by the</div><div class='add'>+  sum of mapped blocks and free blocks (from the BTT flog).</div><div class='add'>+- Rebuilding free list from the flog reveals missing/duplicate/impossible</div><div class='add'>+  entries</div><div class='add'>+- A map entry is out of bounds</div><div class='add'>+</div><div class='add'>+If any of these error conditions are encountered, the arena is put into a read</div><div class='add'>+only state using a flag in the info block.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+5. In-kernel usage</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+Any block driver that supports byte granularity IO to the storage may register</div><div class='add'>+with the BTT. It will have to provide the rw_bytes interface in its</div><div class='add'>+block_device_operations struct:</div><div class='add'>+</div><div class='add'>+	int (*rw_bytes)(struct gendisk *, void *, size_t, off_t, int rw);</div><div class='add'>+</div><div class='add'>+It may register with the BTT after it adds its own gendisk, using btt_init:</div><div class='add'>+</div><div class='add'>+	struct btt *btt_init(struct gendisk *disk, unsigned long long rawsize,</div><div class='add'>+			u32 lbasize, u8 uuid[], int maxlane);</div><div class='add'>+</div><div class='add'>+note that maxlane is the maximum amount of concurrency the driver wishes to</div><div class='add'>+allow the BTT to use.</div><div class='add'>+</div><div class='add'>+The BTT 'disk' appears as a stacked block device that grabs the underlying block</div><div class='add'>+device in the O_EXCL mode.</div><div class='add'>+</div><div class='add'>+When the driver wishes to remove the backing disk, it should similarly call</div><div class='add'>+btt_fini using the same struct btt* handle that was provided to it by btt_init.</div><div class='add'>+</div><div class='add'>+	void btt_fini(struct btt *btt);</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/nvdimm/nvdimm.txt b/Documentation/nvdimm/nvdimm.txt<br/>new file mode 100644<br/>index 000000000000..197a0b6b0582<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/nvdimm/nvdimm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/nvdimm/nvdimm.txt</a></div><div class='hunk'>@@ -0,0 +1,808 @@</div><div class='add'>+			  LIBNVDIMM: Non-Volatile Devices</div><div class='add'>+	      libnvdimm - kernel / libndctl - userspace helper library</div><div class='add'>+			   linux-nvdimm@lists.01.org</div><div class='add'>+				      v13</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	Glossary</div><div class='add'>+	Overview</div><div class='add'>+	    Supporting Documents</div><div class='add'>+	    Git Trees</div><div class='add'>+	LIBNVDIMM PMEM and BLK</div><div class='add'>+	Why BLK?</div><div class='add'>+	    PMEM vs BLK</div><div class='add'>+	        BLK-REGIONs, PMEM-REGIONs, Atomic Sectors, and DAX</div><div class='add'>+	Example NVDIMM Platform</div><div class='add'>+	LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API</div><div class='add'>+	    LIBNDCTL: Context</div><div class='add'>+	        libndctl: instantiate a new library context example</div><div class='add'>+	    LIBNVDIMM/LIBNDCTL: Bus</div><div class='add'>+	        libnvdimm: control class device in /sys/class</div><div class='add'>+	        libnvdimm: bus</div><div class='add'>+	        libndctl: bus enumeration example</div><div class='add'>+	    LIBNVDIMM/LIBNDCTL: DIMM (NMEM)</div><div class='add'>+	        libnvdimm: DIMM (NMEM)</div><div class='add'>+	        libndctl: DIMM enumeration example</div><div class='add'>+	    LIBNVDIMM/LIBNDCTL: Region</div><div class='add'>+	        libnvdimm: region</div><div class='add'>+	        libndctl: region enumeration example</div><div class='add'>+	        Why Not Encode the Region Type into the Region Name?</div><div class='add'>+	        How Do I Determine the Major Type of a Region?</div><div class='add'>+	    LIBNVDIMM/LIBNDCTL: Namespace</div><div class='add'>+	        libnvdimm: namespace</div><div class='add'>+	        libndctl: namespace enumeration example</div><div class='add'>+	        libndctl: namespace creation example</div><div class='add'>+	        Why the Term "namespace"?</div><div class='add'>+	    LIBNVDIMM/LIBNDCTL: Block Translation Table "btt"</div><div class='add'>+	        libnvdimm: btt layout</div><div class='add'>+	        libndctl: btt creation example</div><div class='add'>+	Summary LIBNDCTL Diagram</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Glossary</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+PMEM: A system-physical-address range where writes are persistent.  A</div><div class='add'>+block device composed of PMEM is capable of DAX.  A PMEM address range</div><div class='add'>+may span an interleave of several DIMMs.</div><div class='add'>+</div><div class='add'>+BLK: A set of one or more programmable memory mapped apertures provided</div><div class='add'>+by a DIMM to access its media.  This indirection precludes the</div><div class='add'>+performance benefit of interleaving, but enables DIMM-bounded failure</div><div class='add'>+modes.</div><div class='add'>+</div><div class='add'>+DPA: DIMM Physical Address, is a DIMM-relative offset.  With one DIMM in</div><div class='add'>+the system there would be a 1:1 system-physical-address:DPA association.</div><div class='add'>+Once more DIMMs are added a memory controller interleave must be</div><div class='add'>+decoded to determine the DPA associated with a given</div><div class='add'>+system-physical-address.  BLK capacity always has a 1:1 relationship</div><div class='add'>+with a single-DIMM's DPA range.</div><div class='add'>+</div><div class='add'>+DAX: File system extensions to bypass the page cache and block layer to</div><div class='add'>+mmap persistent memory, from a PMEM block device, directly into a</div><div class='add'>+process address space.</div><div class='add'>+</div><div class='add'>+BTT: Block Translation Table: Persistent memory is byte addressable.</div><div class='add'>+Existing software may have an expectation that the power-fail-atomicity</div><div class='add'>+of writes is at least one sector, 512 bytes.  The BTT is an indirection</div><div class='add'>+table with atomic update semantics to front a PMEM/BLK block device</div><div class='add'>+driver and present arbitrary atomic sector sizes.</div><div class='add'>+</div><div class='add'>+LABEL: Metadata stored on a DIMM device that partitions and identifies</div><div class='add'>+(persistently names) storage between PMEM and BLK.  It also partitions</div><div class='add'>+BLK storage to host BTTs with different parameters per BLK-partition.</div><div class='add'>+Note that traditional partition tables, GPT/MBR, are layered on top of a</div><div class='add'>+BLK or PMEM device.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+The LIBNVDIMM subsystem provides support for three types of NVDIMMs, namely,</div><div class='add'>+PMEM, BLK, and NVDIMM devices that can simultaneously support both PMEM</div><div class='add'>+and BLK mode access.  These three modes of operation are described by</div><div class='add'>+the "NVDIMM Firmware Interface Table" (NFIT) in ACPI 6.  While the LIBNVDIMM</div><div class='add'>+implementation is generic and supports pre-NFIT platforms, it was guided</div><div class='add'>+by the superset of capabilities need to support this ACPI 6 definition</div><div class='add'>+for NVDIMM resources.  The bulk of the kernel implementation is in place</div><div class='add'>+to handle the case where DPA accessible via PMEM is aliased with DPA</div><div class='add'>+accessible via BLK.  When that occurs a LABEL is needed to reserve DPA</div><div class='add'>+for exclusive access via one mode a time.</div><div class='add'>+</div><div class='add'>+Supporting Documents</div><div class='add'>+ACPI 6: http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf</div><div class='add'>+NVDIMM Namespace: http://pmem.io/documents/NVDIMM_Namespace_Spec.pdf</div><div class='add'>+DSM Interface Example: http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf</div><div class='add'>+Driver Writer's Guide: http://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf</div><div class='add'>+</div><div class='add'>+Git Trees</div><div class='add'>+LIBNVDIMM: https://git.kernel.org/cgit/linux/kernel/git/djbw/nvdimm.git</div><div class='add'>+LIBNDCTL: https://github.com/pmem/ndctl.git</div><div class='add'>+PMEM: https://github.com/01org/prd</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM PMEM and BLK</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Prior to the arrival of the NFIT, non-volatile memory was described to a</div><div class='add'>+system in various ad-hoc ways.  Usually only the bare minimum was</div><div class='add'>+provided, namely, a single system-physical-address range where writes</div><div class='add'>+are expected to be durable after a system power loss.  Now, the NFIT</div><div class='add'>+specification standardizes not only the description of PMEM, but also</div><div class='add'>+BLK and platform message-passing entry points for control and</div><div class='add'>+configuration.</div><div class='add'>+</div><div class='add'>+For each NVDIMM access method (PMEM, BLK), LIBNVDIMM provides a block</div><div class='add'>+device driver:</div><div class='add'>+</div><div class='add'>+    1. PMEM (nd_pmem.ko): Drives a system-physical-address range.  This</div><div class='add'>+    range is contiguous in system memory and may be interleaved (hardware</div><div class='add'>+    memory controller striped) across multiple DIMMs.  When interleaved the</div><div class='add'>+    platform may optionally provide details of which DIMMs are participating</div><div class='add'>+    in the interleave.</div><div class='add'>+</div><div class='add'>+    Note that while LIBNVDIMM describes system-physical-address ranges that may</div><div class='add'>+    alias with BLK access as ND_NAMESPACE_PMEM ranges and those without</div><div class='add'>+    alias as ND_NAMESPACE_IO ranges, to the nd_pmem driver there is no</div><div class='add'>+    distinction.  The different device-types are an implementation detail</div><div class='add'>+    that userspace can exploit to implement policies like "only interface</div><div class='add'>+    with address ranges from certain DIMMs".  It is worth noting that when</div><div class='add'>+    aliasing is present and a DIMM lacks a label, then no block device can</div><div class='add'>+    be created by default as userspace needs to do at least one allocation</div><div class='add'>+    of DPA to the PMEM range.  In contrast ND_NAMESPACE_IO ranges, once</div><div class='add'>+    registered, can be immediately attached to nd_pmem.</div><div class='add'>+</div><div class='add'>+    2. BLK (nd_blk.ko): This driver performs I/O using a set of platform</div><div class='add'>+    defined apertures.  A set of apertures will all access just one DIMM.</div><div class='add'>+    Multiple windows allow multiple concurrent accesses, much like</div><div class='add'>+    tagged-command-queuing, and would likely be used by different threads or</div><div class='add'>+    different CPUs.</div><div class='add'>+</div><div class='add'>+    The NFIT specification defines a standard format for a BLK-aperture, but</div><div class='add'>+    the spec also allows for vendor specific layouts, and non-NFIT BLK</div><div class='add'>+    implementations may other designs for BLK I/O.  For this reason "nd_blk"</div><div class='add'>+    calls back into platform-specific code to perform the I/O.  One such</div><div class='add'>+    implementation is defined in the "Driver Writer's Guide" and "DSM</div><div class='add'>+    Interface Example".</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Why BLK?</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+While PMEM provides direct byte-addressable CPU-load/store access to</div><div class='add'>+NVDIMM storage, it does not provide the best system RAS (recovery,</div><div class='add'>+availability, and serviceability) model.  An access to a corrupted</div><div class='add'>+system-physical-address address causes a cpu exception while an access</div><div class='add'>+to a corrupted address through an BLK-aperture causes that block window</div><div class='add'>+to raise an error status in a register.  The latter is more aligned with</div><div class='add'>+the standard error model that host-bus-adapter attached disks present.</div><div class='add'>+Also, if an administrator ever wants to replace a memory it is easier to</div><div class='add'>+service a system at DIMM module boundaries.  Compare this to PMEM where</div><div class='add'>+data could be interleaved in an opaque hardware specific manner across</div><div class='add'>+several DIMMs.</div><div class='add'>+</div><div class='add'>+PMEM vs BLK</div><div class='add'>+BLK-apertures solve this RAS problem, but their presence is also the</div><div class='add'>+major contributing factor to the complexity of the ND subsystem.  They</div><div class='add'>+complicate the implementation because PMEM and BLK alias in DPA space.</div><div class='add'>+Any given DIMM's DPA-range may contribute to one or more</div><div class='add'>+system-physical-address sets of interleaved DIMMs, *and* may also be</div><div class='add'>+accessed in its entirety through its BLK-aperture.  Accessing a DPA</div><div class='add'>+through a system-physical-address while simultaneously accessing the</div><div class='add'>+same DPA through a BLK-aperture has undefined results.  For this reason,</div><div class='add'>+DIMMs with this dual interface configuration include a DSM function to</div><div class='add'>+store/retrieve a LABEL.  The LABEL effectively partitions the DPA-space</div><div class='add'>+into exclusive system-physical-address and BLK-aperture accessible</div><div class='add'>+regions.  For simplicity a DIMM is allowed a PMEM "region" per each</div><div class='add'>+interleave set in which it is a member.  The remaining DPA space can be</div><div class='add'>+carved into an arbitrary number of BLK devices with discontiguous</div><div class='add'>+extents.</div><div class='add'>+</div><div class='add'>+BLK-REGIONs, PMEM-REGIONs, Atomic Sectors, and DAX</div><div class='add'>+--------------------------------------------------</div><div class='add'>+</div><div class='add'>+One of the few</div><div class='add'>+reasons to allow multiple BLK namespaces per REGION is so that each</div><div class='add'>+BLK-namespace can be configured with a BTT with unique atomic sector</div><div class='add'>+sizes.  While a PMEM device can host a BTT the LABEL specification does</div><div class='add'>+not provide for a sector size to be specified for a PMEM namespace.</div><div class='add'>+This is due to the expectation that the primary usage model for PMEM is</div><div class='add'>+via DAX, and the BTT is incompatible with DAX.  However, for the cases</div><div class='add'>+where an application or filesystem still needs atomic sector update</div><div class='add'>+guarantees it can register a BTT on a PMEM device or partition.  See</div><div class='add'>+LIBNVDIMM/NDCTL: Block Translation Table "btt"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example NVDIMM Platform</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+For the remainder of this document the following diagram will be</div><div class='add'>+referenced for any example sysfs layouts.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+                             (a)               (b)           DIMM   BLK-REGION</div><div class='add'>+          +-------------------+--------+--------+--------+</div><div class='add'>++------+  |       pm0.0       | blk2.0 | pm1.0  | blk2.1 |    0      region2</div><div class='add'>+| imc0 +--+- - - region0- - - +--------+        +--------+</div><div class='add'>++--+---+  |       pm0.0       | blk3.0 | pm1.0  | blk3.1 |    1      region3</div><div class='add'>+   |      +-------------------+--------v        v--------+</div><div class='add'>++--+---+                               |                 |</div><div class='add'>+| cpu0 |                                     region1</div><div class='add'>++--+---+                               |                 |</div><div class='add'>+   |      +----------------------------^        ^--------+</div><div class='add'>++--+---+  |           blk4.0           | pm1.0  | blk4.0 |    2      region4</div><div class='add'>+| imc1 +--+----------------------------|        +--------+</div><div class='add'>++------+  |           blk5.0           | pm1.0  | blk5.0 |    3      region5</div><div class='add'>+          +----------------------------+--------+--------+</div><div class='add'>+</div><div class='add'>+In this platform we have four DIMMs and two memory controllers in one</div><div class='add'>+socket.  Each unique interface (BLK or PMEM) to DPA space is identified</div><div class='add'>+by a region device with a dynamically assigned id (REGION0 - REGION5).</div><div class='add'>+</div><div class='add'>+    1. The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A</div><div class='add'>+    single PMEM namespace is created in the REGION0-SPA-range that spans</div><div class='add'>+    DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that</div><div class='add'>+    interleaved system-physical-address range is reclaimed as BLK-aperture</div><div class='add'>+    accessed space starting at DPA-offset (a) into each DIMM.  In that</div><div class='add'>+    reclaimed space we create two BLK-aperture "namespaces" from REGION2 and</div><div class='add'>+    REGION3 where "blk2.0" and "blk3.0" are just human readable names that</div><div class='add'>+    could be set to any user-desired name in the LABEL.</div><div class='add'>+</div><div class='add'>+    2. In the last portion of DIMM0 and DIMM1 we have an interleaved</div><div class='add'>+    system-physical-address range, REGION1, that spans those two DIMMs as</div><div class='add'>+    well as DIMM2 and DIMM3.  Some of REGION1 allocated to a PMEM namespace</div><div class='add'>+    named "pm1.0" the rest is reclaimed in 4 BLK-aperture namespaces (for</div><div class='add'>+    each DIMM in the interleave set), "blk2.1", "blk3.1", "blk4.0", and</div><div class='add'>+    "blk5.0".</div><div class='add'>+</div><div class='add'>+    3. The portion of DIMM2 and DIMM3 that do not participate in the REGION1</div><div class='add'>+    interleaved system-physical-address range (i.e. the DPA address below</div><div class='add'>+    offset (b) are also included in the "blk4.0" and "blk5.0" namespaces.</div><div class='add'>+    Note, that this example shows that BLK-aperture namespaces don't need to</div><div class='add'>+    be contiguous in DPA-space.</div><div class='add'>+</div><div class='add'>+    This bus is provided by the kernel under the device</div><div class='add'>+    /sys/devices/platform/nfit_test.0 when CONFIG_NFIT_TEST is enabled and</div><div class='add'>+    the nfit_test.ko module is loaded.  This not only test LIBNVDIMM but the</div><div class='add'>+    acpi_nfit.ko driver as well.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API</div><div class='add'>+----------------------------------------------------</div><div class='add'>+</div><div class='add'>+What follows is a description of the LIBNVDIMM sysfs layout and a</div><div class='add'>+corresponding object hierarchy diagram as viewed through the LIBNDCTL</div><div class='add'>+api.  The example sysfs paths and diagrams are relative to the Example</div><div class='add'>+NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit</div><div class='add'>+test.</div><div class='add'>+</div><div class='add'>+LIBNDCTL: Context</div><div class='add'>+Every api call in the LIBNDCTL library requires a context that holds the</div><div class='add'>+logging parameters and other library instance state.  The library is</div><div class='add'>+based on the libabc template:</div><div class='add'>+https://git.kernel.org/cgit/linux/kernel/git/kay/libabc.git/</div><div class='add'>+</div><div class='add'>+LIBNDCTL: instantiate a new library context example</div><div class='add'>+</div><div class='add'>+	struct ndctl_ctx *ctx;</div><div class='add'>+</div><div class='add'>+	if (ndctl_new(&amp;ctx) == 0)</div><div class='add'>+		return ctx;</div><div class='add'>+	else</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+LIBNVDIMM/LIBNDCTL: Bus</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+A bus has a 1:1 relationship with an NFIT.  The current expectation for</div><div class='add'>+ACPI based systems is that there is only ever one platform-global NFIT.</div><div class='add'>+That said, it is trivial to register multiple NFITs, the specification</div><div class='add'>+does not preclude it.  The infrastructure supports multiple busses and</div><div class='add'>+we we use this capability to test multiple NFIT configurations in the</div><div class='add'>+unit test.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: control class device in /sys/class</div><div class='add'>+</div><div class='add'>+This character device accepts DSM messages to be passed to DIMM</div><div class='add'>+identified by its NFIT handle.</div><div class='add'>+</div><div class='add'>+	/sys/class/nd/ndctl0</div><div class='add'>+	|-- dev</div><div class='add'>+	|-- device -&gt; ../../../ndbus0</div><div class='add'>+	|-- subsystem -&gt; ../../../../../../../class/nd</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: bus</div><div class='add'>+</div><div class='add'>+	struct nvdimm_bus *nvdimm_bus_register(struct device *parent,</div><div class='add'>+	       struct nvdimm_bus_descriptor *nfit_desc);</div><div class='add'>+</div><div class='add'>+	/sys/devices/platform/nfit_test.0/ndbus0</div><div class='add'>+	|-- commands</div><div class='add'>+	|-- nd</div><div class='add'>+	|-- nfit</div><div class='add'>+	|-- nmem0</div><div class='add'>+	|-- nmem1</div><div class='add'>+	|-- nmem2</div><div class='add'>+	|-- nmem3</div><div class='add'>+	|-- power</div><div class='add'>+	|-- provider</div><div class='add'>+	|-- region0</div><div class='add'>+	|-- region1</div><div class='add'>+	|-- region2</div><div class='add'>+	|-- region3</div><div class='add'>+	|-- region4</div><div class='add'>+	|-- region5</div><div class='add'>+	|-- uevent</div><div class='add'>+	`-- wait_probe</div><div class='add'>+</div><div class='add'>+LIBNDCTL: bus enumeration example</div><div class='add'>+Find the bus handle that describes the bus from Example NVDIMM Platform</div><div class='add'>+</div><div class='add'>+	static struct ndctl_bus *get_bus_by_provider(struct ndctl_ctx *ctx,</div><div class='add'>+			const char *provider)</div><div class='add'>+	{</div><div class='add'>+		struct ndctl_bus *bus;</div><div class='add'>+</div><div class='add'>+		ndctl_bus_foreach(ctx, bus)</div><div class='add'>+			if (strcmp(provider, ndctl_bus_get_provider(bus)) == 0)</div><div class='add'>+				return bus;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = get_bus_by_provider(ctx, "nfit_test.0");</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM/LIBNDCTL: DIMM (NMEM)</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+The DIMM device provides a character device for sending commands to</div><div class='add'>+hardware, and it is a container for LABELs.  If the DIMM is defined by</div><div class='add'>+NFIT then an optional 'nfit' attribute sub-directory is available to add</div><div class='add'>+NFIT-specifics.</div><div class='add'>+</div><div class='add'>+Note that the kernel device name for "DIMMs" is "nmemX".  The NFIT</div><div class='add'>+describes these devices via "Memory Device to System Physical Address</div><div class='add'>+Range Mapping Structure", and there is no requirement that they actually</div><div class='add'>+be physical DIMMs, so we use a more generic name.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: DIMM (NMEM)</div><div class='add'>+</div><div class='add'>+	struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data,</div><div class='add'>+			const struct attribute_group **groups, unsigned long flags,</div><div class='add'>+			unsigned long *dsm_mask);</div><div class='add'>+</div><div class='add'>+	/sys/devices/platform/nfit_test.0/ndbus0</div><div class='add'>+	|-- nmem0</div><div class='add'>+	|   |-- available_slots</div><div class='add'>+	|   |-- commands</div><div class='add'>+	|   |-- dev</div><div class='add'>+	|   |-- devtype</div><div class='add'>+	|   |-- driver -&gt; ../../../../../bus/nd/drivers/nvdimm</div><div class='add'>+	|   |-- modalias</div><div class='add'>+	|   |-- nfit</div><div class='add'>+	|   |   |-- device</div><div class='add'>+	|   |   |-- format</div><div class='add'>+	|   |   |-- handle</div><div class='add'>+	|   |   |-- phys_id</div><div class='add'>+	|   |   |-- rev_id</div><div class='add'>+	|   |   |-- serial</div><div class='add'>+	|   |   `-- vendor</div><div class='add'>+	|   |-- state</div><div class='add'>+	|   |-- subsystem -&gt; ../../../../../bus/nd</div><div class='add'>+	|   `-- uevent</div><div class='add'>+	|-- nmem1</div><div class='add'>+	[..]</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNDCTL: DIMM enumeration example</div><div class='add'>+</div><div class='add'>+Note, in this example we are assuming NFIT-defined DIMMs which are</div><div class='add'>+identified by an "nfit_handle" a 32-bit value where:</div><div class='add'>+Bit 3:0 DIMM number within the memory channel</div><div class='add'>+Bit 7:4 memory channel number</div><div class='add'>+Bit 11:8 memory controller ID</div><div class='add'>+Bit 15:12 socket ID (within scope of a Node controller if node controller is present)</div><div class='add'>+Bit 27:16 Node Controller ID</div><div class='add'>+Bit 31:28 Reserved</div><div class='add'>+</div><div class='add'>+	static struct ndctl_dimm *get_dimm_by_handle(struct ndctl_bus *bus,</div><div class='add'>+	       unsigned int handle)</div><div class='add'>+	{</div><div class='add'>+		struct ndctl_dimm *dimm;</div><div class='add'>+</div><div class='add'>+		ndctl_dimm_foreach(bus, dimm)</div><div class='add'>+			if (ndctl_dimm_get_handle(dimm) == handle)</div><div class='add'>+				return dimm;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	#define DIMM_HANDLE(n, s, i, c, d) \</div><div class='add'>+		(((n &amp; 0xfff) &lt;&lt; 16) | ((s &amp; 0xf) &lt;&lt; 12) | ((i &amp; 0xf) &lt;&lt; 8) \</div><div class='add'>+		 | ((c &amp; 0xf) &lt;&lt; 4) | (d &amp; 0xf))</div><div class='add'>+</div><div class='add'>+	dimm = get_dimm_by_handle(bus, DIMM_HANDLE(0, 0, 0, 0, 0));</div><div class='add'>+</div><div class='add'>+LIBNVDIMM/LIBNDCTL: Region</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+A generic REGION device is registered for each PMEM range orBLK-aperture</div><div class='add'>+set.  Per the example there are 6 regions: 2 PMEM and 4 BLK-aperture</div><div class='add'>+sets on the "nfit_test.0" bus.  The primary role of regions are to be a</div><div class='add'>+container of "mappings".  A mapping is a tuple of &lt;DIMM,</div><div class='add'>+DPA-start-offset, length&gt;.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM provides a built-in driver for these REGION devices.  This driver</div><div class='add'>+is responsible for reconciling the aliased DPA mappings across all</div><div class='add'>+regions, parsing the LABEL, if present, and then emitting NAMESPACE</div><div class='add'>+devices with the resolved/exclusive DPA-boundaries for the nd_pmem or</div><div class='add'>+nd_blk device driver to consume.</div><div class='add'>+</div><div class='add'>+In addition to the generic attributes of "mapping"s, "interleave_ways"</div><div class='add'>+and "size" the REGION device also exports some convenience attributes.</div><div class='add'>+"nstype" indicates the integer type of namespace-device this region</div><div class='add'>+emits, "devtype" duplicates the DEVTYPE variable stored by udev at the</div><div class='add'>+'add' event, "modalias" duplicates the MODALIAS variable stored by udev</div><div class='add'>+at the 'add' event, and finally, the optional "spa_index" is provided in</div><div class='add'>+the case where the region is defined by a SPA.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: region</div><div class='add'>+</div><div class='add'>+	struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,</div><div class='add'>+			struct nd_region_desc *ndr_desc);</div><div class='add'>+	struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,</div><div class='add'>+			struct nd_region_desc *ndr_desc);</div><div class='add'>+</div><div class='add'>+	/sys/devices/platform/nfit_test.0/ndbus0</div><div class='add'>+	|-- region0</div><div class='add'>+	|   |-- available_size</div><div class='add'>+	|   |-- btt0</div><div class='add'>+	|   |-- btt_seed</div><div class='add'>+	|   |-- devtype</div><div class='add'>+	|   |-- driver -&gt; ../../../../../bus/nd/drivers/nd_region</div><div class='add'>+	|   |-- init_namespaces</div><div class='add'>+	|   |-- mapping0</div><div class='add'>+	|   |-- mapping1</div><div class='add'>+	|   |-- mappings</div><div class='add'>+	|   |-- modalias</div><div class='add'>+	|   |-- namespace0.0</div><div class='add'>+	|   |-- namespace_seed</div><div class='add'>+	|   |-- numa_node</div><div class='add'>+	|   |-- nfit</div><div class='add'>+	|   |   `-- spa_index</div><div class='add'>+	|   |-- nstype</div><div class='add'>+	|   |-- set_cookie</div><div class='add'>+	|   |-- size</div><div class='add'>+	|   |-- subsystem -&gt; ../../../../../bus/nd</div><div class='add'>+	|   `-- uevent</div><div class='add'>+	|-- region1</div><div class='add'>+	[..]</div><div class='add'>+</div><div class='add'>+LIBNDCTL: region enumeration example</div><div class='add'>+</div><div class='add'>+Sample region retrieval routines based on NFIT-unique data like</div><div class='add'>+"spa_index" (interleave set id) for PMEM and "nfit_handle" (dimm id) for</div><div class='add'>+BLK.</div><div class='add'>+</div><div class='add'>+	static struct ndctl_region *get_pmem_region_by_spa_index(struct ndctl_bus *bus,</div><div class='add'>+			unsigned int spa_index)</div><div class='add'>+	{</div><div class='add'>+		struct ndctl_region *region;</div><div class='add'>+</div><div class='add'>+		ndctl_region_foreach(bus, region) {</div><div class='add'>+			if (ndctl_region_get_type(region) != ND_DEVICE_REGION_PMEM)</div><div class='add'>+				continue;</div><div class='add'>+			if (ndctl_region_get_spa_index(region) == spa_index)</div><div class='add'>+				return region;</div><div class='add'>+		}</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static struct ndctl_region *get_blk_region_by_dimm_handle(struct ndctl_bus *bus,</div><div class='add'>+			unsigned int handle)</div><div class='add'>+	{</div><div class='add'>+		struct ndctl_region *region;</div><div class='add'>+</div><div class='add'>+		ndctl_region_foreach(bus, region) {</div><div class='add'>+			struct ndctl_mapping *map;</div><div class='add'>+</div><div class='add'>+			if (ndctl_region_get_type(region) != ND_DEVICE_REGION_BLOCK)</div><div class='add'>+				continue;</div><div class='add'>+			ndctl_mapping_foreach(region, map) {</div><div class='add'>+				struct ndctl_dimm *dimm = ndctl_mapping_get_dimm(map);</div><div class='add'>+</div><div class='add'>+				if (ndctl_dimm_get_handle(dimm) == handle)</div><div class='add'>+					return region;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Why Not Encode the Region Type into the Region Name?</div><div class='add'>+----------------------------------------------------</div><div class='add'>+</div><div class='add'>+At first glance it seems since NFIT defines just PMEM and BLK interface</div><div class='add'>+types that we should simply name REGION devices with something derived</div><div class='add'>+from those type names.  However, the ND subsystem explicitly keeps the</div><div class='add'>+REGION name generic and expects userspace to always consider the</div><div class='add'>+region-attributes for 4 reasons:</div><div class='add'>+</div><div class='add'>+    1. There are already more than two REGION and "namespace" types.  For</div><div class='add'>+    PMEM there are two subtypes.  As mentioned previously we have PMEM where</div><div class='add'>+    the constituent DIMM devices are known and anonymous PMEM.  For BLK</div><div class='add'>+    regions the NFIT specification already anticipates vendor specific</div><div class='add'>+    implementations.  The exact distinction of what a region contains is in</div><div class='add'>+    the region-attributes not the region-name or the region-devtype.</div><div class='add'>+</div><div class='add'>+    2. A region with zero child-namespaces is a possible configuration.  For</div><div class='add'>+    example, the NFIT allows for a DCR to be published without a</div><div class='add'>+    corresponding BLK-aperture.  This equates to a DIMM that can only accept</div><div class='add'>+    control/configuration messages, but no i/o through a descendant block</div><div class='add'>+    device.  Again, this "type" is advertised in the attributes ('mappings'</div><div class='add'>+    == 0) and the name does not tell you much.</div><div class='add'>+</div><div class='add'>+    3. What if a third major interface type arises in the future?  Outside</div><div class='add'>+    of vendor specific implementations, it's not difficult to envision a</div><div class='add'>+    third class of interface type beyond BLK and PMEM.  With a generic name</div><div class='add'>+    for the REGION level of the device-hierarchy old userspace</div><div class='add'>+    implementations can still make sense of new kernel advertised</div><div class='add'>+    region-types.  Userspace can always rely on the generic region</div><div class='add'>+    attributes like "mappings", "size", etc and the expected child devices</div><div class='add'>+    named "namespace".  This generic format of the device-model hierarchy</div><div class='add'>+    allows the LIBNVDIMM and LIBNDCTL implementations to be more uniform and</div><div class='add'>+    future-proof.</div><div class='add'>+</div><div class='add'>+    4. There are more robust mechanisms for determining the major type of a</div><div class='add'>+    region than a device name.  See the next section, How Do I Determine the</div><div class='add'>+    Major Type of a Region?</div><div class='add'>+</div><div class='add'>+How Do I Determine the Major Type of a Region?</div><div class='add'>+----------------------------------------------</div><div class='add'>+</div><div class='add'>+Outside of the blanket recommendation of "use libndctl", or simply</div><div class='add'>+looking at the kernel header (/usr/include/linux/ndctl.h) to decode the</div><div class='add'>+"nstype" integer attribute, here are some other options.</div><div class='add'>+</div><div class='add'>+    1. module alias lookup:</div><div class='add'>+</div><div class='add'>+    The whole point of region/namespace device type differentiation is to</div><div class='add'>+    decide which block-device driver will attach to a given LIBNVDIMM namespace.</div><div class='add'>+    One can simply use the modalias to lookup the resulting module.  It's</div><div class='add'>+    important to note that this method is robust in the presence of a</div><div class='add'>+    vendor-specific driver down the road.  If a vendor-specific</div><div class='add'>+    implementation wants to supplant the standard nd_blk driver it can with</div><div class='add'>+    minimal impact to the rest of LIBNVDIMM.</div><div class='add'>+</div><div class='add'>+    In fact, a vendor may also want to have a vendor-specific region-driver</div><div class='add'>+    (outside of nd_region).  For example, if a vendor defined its own LABEL</div><div class='add'>+    format it would need its own region driver to parse that LABEL and emit</div><div class='add'>+    the resulting namespaces.  The output from module resolution is more</div><div class='add'>+    accurate than a region-name or region-devtype.</div><div class='add'>+</div><div class='add'>+    2. udev:</div><div class='add'>+</div><div class='add'>+    The kernel "devtype" is registered in the udev database</div><div class='add'>+    # udevadm info --path=/devices/platform/nfit_test.0/ndbus0/region0</div><div class='add'>+    P: /devices/platform/nfit_test.0/ndbus0/region0</div><div class='add'>+    E: DEVPATH=/devices/platform/nfit_test.0/ndbus0/region0</div><div class='add'>+    E: DEVTYPE=nd_pmem</div><div class='add'>+    E: MODALIAS=nd:t2</div><div class='add'>+    E: SUBSYSTEM=nd</div><div class='add'>+</div><div class='add'>+    # udevadm info --path=/devices/platform/nfit_test.0/ndbus0/region4</div><div class='add'>+    P: /devices/platform/nfit_test.0/ndbus0/region4</div><div class='add'>+    E: DEVPATH=/devices/platform/nfit_test.0/ndbus0/region4</div><div class='add'>+    E: DEVTYPE=nd_blk</div><div class='add'>+    E: MODALIAS=nd:t3</div><div class='add'>+    E: SUBSYSTEM=nd</div><div class='add'>+</div><div class='add'>+    ...and is available as a region attribute, but keep in mind that the</div><div class='add'>+    "devtype" does not indicate sub-type variations and scripts should</div><div class='add'>+    really be understanding the other attributes.</div><div class='add'>+</div><div class='add'>+    3. type specific attributes:</div><div class='add'>+</div><div class='add'>+    As it currently stands a BLK-aperture region will never have a</div><div class='add'>+    "nfit/spa_index" attribute, but neither will a non-NFIT PMEM region.  A</div><div class='add'>+    BLK region with a "mappings" value of 0 is, as mentioned above, a DIMM</div><div class='add'>+    that does not allow I/O.  A PMEM region with a "mappings" value of zero</div><div class='add'>+    is a simple system-physical-address range.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM/LIBNDCTL: Namespace</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+A REGION, after resolving DPA aliasing and LABEL specified boundaries,</div><div class='add'>+surfaces one or more "namespace" devices.  The arrival of a "namespace"</div><div class='add'>+device currently triggers either the nd_blk or nd_pmem driver to load</div><div class='add'>+and register a disk/block device.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: namespace</div><div class='add'>+Here is a sample layout from the three major types of NAMESPACE where</div><div class='add'>+namespace0.0 represents DIMM-info-backed PMEM (note that it has a 'uuid'</div><div class='add'>+attribute), namespace2.0 represents a BLK namespace (note it has a</div><div class='add'>+'sector_size' attribute) that, and namespace6.0 represents an anonymous</div><div class='add'>+PMEM namespace (note that has no 'uuid' attribute due to not support a</div><div class='add'>+LABEL).</div><div class='add'>+</div><div class='add'>+	/sys/devices/platform/nfit_test.0/ndbus0/region0/namespace0.0</div><div class='add'>+	|-- alt_name</div><div class='add'>+	|-- devtype</div><div class='add'>+	|-- dpa_extents</div><div class='add'>+	|-- force_raw</div><div class='add'>+	|-- modalias</div><div class='add'>+	|-- numa_node</div><div class='add'>+	|-- resource</div><div class='add'>+	|-- size</div><div class='add'>+	|-- subsystem -&gt; ../../../../../../bus/nd</div><div class='add'>+	|-- type</div><div class='add'>+	|-- uevent</div><div class='add'>+	`-- uuid</div><div class='add'>+	/sys/devices/platform/nfit_test.0/ndbus0/region2/namespace2.0</div><div class='add'>+	|-- alt_name</div><div class='add'>+	|-- devtype</div><div class='add'>+	|-- dpa_extents</div><div class='add'>+	|-- force_raw</div><div class='add'>+	|-- modalias</div><div class='add'>+	|-- numa_node</div><div class='add'>+	|-- sector_size</div><div class='add'>+	|-- size</div><div class='add'>+	|-- subsystem -&gt; ../../../../../../bus/nd</div><div class='add'>+	|-- type</div><div class='add'>+	|-- uevent</div><div class='add'>+	`-- uuid</div><div class='add'>+	/sys/devices/platform/nfit_test.1/ndbus1/region6/namespace6.0</div><div class='add'>+	|-- block</div><div class='add'>+	|   `-- pmem0</div><div class='add'>+	|-- devtype</div><div class='add'>+	|-- driver -&gt; ../../../../../../bus/nd/drivers/pmem</div><div class='add'>+	|-- force_raw</div><div class='add'>+	|-- modalias</div><div class='add'>+	|-- numa_node</div><div class='add'>+	|-- resource</div><div class='add'>+	|-- size</div><div class='add'>+	|-- subsystem -&gt; ../../../../../../bus/nd</div><div class='add'>+	|-- type</div><div class='add'>+	`-- uevent</div><div class='add'>+</div><div class='add'>+LIBNDCTL: namespace enumeration example</div><div class='add'>+Namespaces are indexed relative to their parent region, example below.</div><div class='add'>+These indexes are mostly static from boot to boot, but subsystem makes</div><div class='add'>+no guarantees in this regard.  For a static namespace identifier use its</div><div class='add'>+'uuid' attribute.</div><div class='add'>+</div><div class='add'>+static struct ndctl_namespace *get_namespace_by_id(struct ndctl_region *region,</div><div class='add'>+                unsigned int id)</div><div class='add'>+{</div><div class='add'>+        struct ndctl_namespace *ndns;</div><div class='add'>+</div><div class='add'>+        ndctl_namespace_foreach(region, ndns)</div><div class='add'>+                if (ndctl_namespace_get_id(ndns) == id)</div><div class='add'>+                        return ndns;</div><div class='add'>+</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+LIBNDCTL: namespace creation example</div><div class='add'>+Idle namespaces are automatically created by the kernel if a given</div><div class='add'>+region has enough available capacity to create a new namespace.</div><div class='add'>+Namespace instantiation involves finding an idle namespace and</div><div class='add'>+configuring it.  For the most part the setting of namespace attributes</div><div class='add'>+can occur in any order, the only constraint is that 'uuid' must be set</div><div class='add'>+before 'size'.  This enables the kernel to track DPA allocations</div><div class='add'>+internally with a static identifier.</div><div class='add'>+</div><div class='add'>+static int configure_namespace(struct ndctl_region *region,</div><div class='add'>+                struct ndctl_namespace *ndns,</div><div class='add'>+                struct namespace_parameters *parameters)</div><div class='add'>+{</div><div class='add'>+        char devname[50];</div><div class='add'>+</div><div class='add'>+        snprintf(devname, sizeof(devname), "namespace%d.%d",</div><div class='add'>+                        ndctl_region_get_id(region), paramaters-&gt;id);</div><div class='add'>+</div><div class='add'>+        ndctl_namespace_set_alt_name(ndns, devname);</div><div class='add'>+        /* 'uuid' must be set prior to setting size! */</div><div class='add'>+        ndctl_namespace_set_uuid(ndns, paramaters-&gt;uuid);</div><div class='add'>+        ndctl_namespace_set_size(ndns, paramaters-&gt;size);</div><div class='add'>+        /* unlike pmem namespaces, blk namespaces have a sector size */</div><div class='add'>+        if (parameters-&gt;lbasize)</div><div class='add'>+                ndctl_namespace_set_sector_size(ndns, parameters-&gt;lbasize);</div><div class='add'>+        ndctl_namespace_enable(ndns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Why the Term "namespace"?</div><div class='add'>+</div><div class='add'>+    1. Why not "volume" for instance?  "volume" ran the risk of confusing ND</div><div class='add'>+    as a volume manager like device-mapper.</div><div class='add'>+</div><div class='add'>+    2. The term originated to describe the sub-devices that can be created</div><div class='add'>+    within a NVME controller (see the nvme specification:</div><div class='add'>+    http://www.nvmexpress.org/specifications/), and NFIT namespaces are</div><div class='add'>+    meant to parallel the capabilities and configurability of</div><div class='add'>+    NVME-namespaces.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIBNVDIMM/LIBNDCTL: Block Translation Table "btt"</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+A BTT (design document: http://pmem.io/2014/09/23/btt.html) is a stacked</div><div class='add'>+block device driver that fronts either the whole block device or a</div><div class='add'>+partition of a block device emitted by either a PMEM or BLK NAMESPACE.</div><div class='add'>+</div><div class='add'>+LIBNVDIMM: btt layout</div><div class='add'>+Every region will start out with at least one BTT device which is the</div><div class='add'>+seed device.  To activate it set the "namespace", "uuid", and</div><div class='add'>+"sector_size" attributes and then bind the device to the nd_pmem or</div><div class='add'>+nd_blk driver depending on the region type.</div><div class='add'>+</div><div class='add'>+	/sys/devices/platform/nfit_test.1/ndbus0/region0/btt0/</div><div class='add'>+	|-- namespace</div><div class='add'>+	|-- delete</div><div class='add'>+	|-- devtype</div><div class='add'>+	|-- modalias</div><div class='add'>+	|-- numa_node</div><div class='add'>+	|-- sector_size</div><div class='add'>+	|-- subsystem -&gt; ../../../../../bus/nd</div><div class='add'>+	|-- uevent</div><div class='add'>+	`-- uuid</div><div class='add'>+</div><div class='add'>+LIBNDCTL: btt creation example</div><div class='add'>+Similar to namespaces an idle BTT device is automatically created per</div><div class='add'>+region.  Each time this "seed" btt device is configured and enabled a new</div><div class='add'>+seed is created.  Creating a BTT configuration involves two steps of</div><div class='add'>+finding and idle BTT and assigning it to consume a PMEM or BLK namespace.</div><div class='add'>+</div><div class='add'>+	static struct ndctl_btt *get_idle_btt(struct ndctl_region *region)</div><div class='add'>+	{</div><div class='add'>+		struct ndctl_btt *btt;</div><div class='add'>+</div><div class='add'>+		ndctl_btt_foreach(region, btt)</div><div class='add'>+			if (!ndctl_btt_is_enabled(btt)</div><div class='add'>+					&amp;&amp; !ndctl_btt_is_configured(btt))</div><div class='add'>+				return btt;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static int configure_btt(struct ndctl_region *region,</div><div class='add'>+			struct btt_parameters *parameters)</div><div class='add'>+	{</div><div class='add'>+		btt = get_idle_btt(region);</div><div class='add'>+</div><div class='add'>+		ndctl_btt_set_uuid(btt, parameters-&gt;uuid);</div><div class='add'>+		ndctl_btt_set_sector_size(btt, parameters-&gt;sector_size);</div><div class='add'>+		ndctl_btt_set_namespace(btt, parameters-&gt;ndns);</div><div class='add'>+		/* turn off raw mode device */</div><div class='add'>+		ndctl_namespace_disable(parameters-&gt;ndns);</div><div class='add'>+		/* turn on btt access */</div><div class='add'>+		ndctl_btt_enable(btt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+Once instantiated a new inactive btt seed device will appear underneath</div><div class='add'>+the region.</div><div class='add'>+</div><div class='add'>+Once a "namespace" is removed from a BTT that instance of the BTT device</div><div class='add'>+will be deleted or otherwise reset to default values.  This deletion is</div><div class='add'>+only at the device model level.  In order to destroy a BTT the "info</div><div class='add'>+block" needs to be destroyed.  Note, that to destroy a BTT the media</div><div class='add'>+needs to be written in raw mode.  By default, the kernel will autodetect</div><div class='add'>+the presence of a BTT and disable raw mode.  This autodetect behavior</div><div class='add'>+can be suppressed by enabling raw mode for the namespace via the</div><div class='add'>+ndctl_namespace_set_raw_mode() api.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Summary LIBNDCTL Diagram</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+For the given example above, here is the view of the objects as seen by the LIBNDCTL api:</div><div class='add'>+            +---+</div><div class='add'>+            |CTX|    +---------+   +--------------+  +---------------+</div><div class='add'>+            +-+-+  +-&gt; REGION0 +---&gt; NAMESPACE0.0 +--&gt; PMEM8 "pm0.0" |</div><div class='add'>+              |    | +---------+   +--------------+  +---------------+</div><div class='add'>++-------+     |    | +---------+   +--------------+  +---------------+</div><div class='add'>+| DIMM0 &lt;-+   |    +-&gt; REGION1 +---&gt; NAMESPACE1.0 +--&gt; PMEM6 "pm1.0" |</div><div class='add'>++-------+ |   |    | +---------+   +--------------+  +---------------+</div><div class='add'>+| DIMM1 &lt;-+ +-v--+ | +---------+   +--------------+  +---------------+</div><div class='add'>++-------+ +-+BUS0+---&gt; REGION2 +-+-&gt; NAMESPACE2.0 +--&gt; ND6  "blk2.0" |</div><div class='add'>+| DIMM2 &lt;-+ +----+ | +---------+ | +--------------+  +----------------------+</div><div class='add'>++-------+ |        |             +-&gt; NAMESPACE2.1 +--&gt; ND5  "blk2.1" | BTT2 |</div><div class='add'>+| DIMM3 &lt;-+        |               +--------------+  +----------------------+</div><div class='add'>++-------+          | +---------+   +--------------+  +---------------+</div><div class='add'>+                   +-&gt; REGION3 +-+-&gt; NAMESPACE3.0 +--&gt; ND4  "blk3.0" |</div><div class='add'>+                   | +---------+ | +--------------+  +----------------------+</div><div class='add'>+                   |             +-&gt; NAMESPACE3.1 +--&gt; ND3  "blk3.1" | BTT1 |</div><div class='add'>+                   |               +--------------+  +----------------------+</div><div class='add'>+                   | +---------+   +--------------+  +---------------+</div><div class='add'>+                   +-&gt; REGION4 +---&gt; NAMESPACE4.0 +--&gt; ND2  "blk4.0" |</div><div class='add'>+                   | +---------+   +--------------+  +---------------+</div><div class='add'>+                   | +---------+   +--------------+  +----------------------+</div><div class='add'>+                   +-&gt; REGION5 +---&gt; NAMESPACE5.0 +--&gt; ND1  "blk5.0" | BTT0 |</div><div class='add'>+                     +---------+   +--------------+  +---------------+------+</div><div class='add'>+</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/phy.txt b/Documentation/phy.txt<br/>index 371361c69a4b..b388c5af9e72 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/phy.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/phy.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/phy.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/phy.txt</a></div><div class='hunk'>@@ -76,6 +76,8 @@ struct phy *phy_get(struct device *dev, const char *string);</div><div class='ctx'> struct phy *phy_optional_get(struct device *dev, const char *string);</div><div class='ctx'> struct phy *devm_phy_get(struct device *dev, const char *string);</div><div class='ctx'> struct phy *devm_phy_optional_get(struct device *dev, const char *string);</div><div class='add'>+struct phy *devm_of_phy_get_by_index(struct device *dev, struct device_node *np,</div><div class='add'>+				     int index);</div><div class='ctx'> </div><div class='ctx'> phy_get, phy_optional_get, devm_phy_get and devm_phy_optional_get can</div><div class='ctx'> be used to get the PHY. In the case of dt boot, the string arguments</div><div class='hunk'>@@ -86,7 +88,10 @@ successful PHY get. On driver detach, release function is invoked on</div><div class='ctx'> the the devres data and devres data is freed. phy_optional_get and</div><div class='ctx'> devm_phy_optional_get should be used when the phy is optional. These</div><div class='ctx'> two functions will never return -ENODEV, but instead returns NULL when</div><div class='del'>-the phy cannot be found.</div><div class='add'>+the phy cannot be found.Some generic drivers, such as ehci, may use multiple</div><div class='add'>+phys and for such drivers referencing phy(s) by name(s) does not make sense. In</div><div class='add'>+this case, devm_of_phy_get_by_index can be used to get a phy reference based on</div><div class='add'>+the index.</div><div class='ctx'> </div><div class='ctx'> It should be noted that NULL is a valid phy reference. All phy</div><div class='ctx'> consumer calls on the NULL phy become NOPs. That is the release calls,</div><div class='head'>diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt<br/>index a9b47163bb5d..4976389e432d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/pinctrl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/pinctrl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/pinctrl.txt</a></div><div class='hunk'>@@ -714,6 +714,7 @@ static struct pinmux_ops foo_pmxops = {</div><div class='ctx'> 	.get_function_name = foo_get_fname,</div><div class='ctx'> 	.get_function_groups = foo_get_groups,</div><div class='ctx'> 	.set_mux = foo_set_mux,</div><div class='add'>+	.strict = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Pinmux operations are handled by some pin controller */</div><div class='hunk'>@@ -830,6 +831,11 @@ separate memory range only intended for GPIO driving, and the register</div><div class='ctx'> range dealing with pin config and pin multiplexing get placed into a</div><div class='ctx'> different memory range and a separate section of the data sheet.</div><div class='ctx'> </div><div class='add'>+A flag "strict" in struct pinctrl_desc is available to check and deny</div><div class='add'>+simultaneous access to the same pin from GPIO and pin multiplexing</div><div class='add'>+consumers on hardware of this type. The pinctrl driver should set this flag</div><div class='add'>+accordingly.</div><div class='add'>+</div><div class='ctx'> (B)</div><div class='ctx'> </div><div class='ctx'>                        pin config</div><div class='hunk'>@@ -850,6 +856,11 @@ possible that the GPIO, pin config and pin multiplex registers are placed into</div><div class='ctx'> the same memory range and the same section of the data sheet, although that</div><div class='ctx'> need not be the case.</div><div class='ctx'> </div><div class='add'>+In some pin controllers, although the physical pins are designed in the same</div><div class='add'>+way as (B), the GPIO function still can't be enabled at the same time as the</div><div class='add'>+peripheral functions. So again the "strict" flag should be set, denying</div><div class='add'>+simultaneous activation by GPIO and other muxed in devices.</div><div class='add'>+</div><div class='ctx'> From a kernel point of view, however, these are different aspects of the</div><div class='ctx'> hardware and shall be put into different subsystems:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt<br/>index 44fe1d28a163..e76dc0ad4d2b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/runtime_pm.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/power/runtime_pm.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/runtime_pm.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/power/runtime_pm.txt</a></div><div class='hunk'>@@ -556,6 +556,12 @@ helper functions described in Section 4.  In that case, pm_runtime_resume()</div><div class='ctx'> should be used.  Of course, for this purpose the device's runtime PM has to be</div><div class='ctx'> enabled earlier by calling pm_runtime_enable().</div><div class='ctx'> </div><div class='add'>+Note, if the device may execute pm_runtime calls during the probe (such as</div><div class='add'>+if it is registers with a subsystem that may call back in) then the</div><div class='add'>+pm_runtime_get_sync() call paired with a pm_runtime_put() call will be</div><div class='add'>+appropriate to ensure that the device is not put back to sleep during the</div><div class='add'>+probe. This can happen with systems such as the network device layer.</div><div class='add'>+</div><div class='ctx'> It may be desirable to suspend the device once -&gt;probe() has finished.</div><div class='ctx'> Therefore the driver core uses the asyncronous pm_request_idle() to submit a</div><div class='ctx'> request to execute the subsystem-level idle callback for the device at that</div><div class='head'>diff --git a/Documentation/power/swsusp.txt b/Documentation/power/swsusp.txt<br/>index f732a8321e8a..8cc17ca71813 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/swsusp.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/power/swsusp.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/swsusp.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/power/swsusp.txt</a></div><div class='hunk'>@@ -410,8 +410,17 @@ Documentation/usb/persist.txt.</div><div class='ctx'> </div><div class='ctx'> Q: Can I suspend-to-disk using a swap partition under LVM?</div><div class='ctx'> </div><div class='del'>-A: No. You can suspend successfully, but you'll not be able to</div><div class='del'>-resume. uswsusp should be able to work with LVM. See suspend.sf.net.</div><div class='add'>+A: Yes and No.  You can suspend successfully, but the kernel will not be able</div><div class='add'>+to resume on its own.  You need an initramfs that can recognize the resume</div><div class='add'>+situation, activate the logical volume containing the swap volume (but not</div><div class='add'>+touch any filesystems!), and eventually call</div><div class='add'>+</div><div class='add'>+echo -n "$major:$minor" &gt; /sys/power/resume</div><div class='add'>+</div><div class='add'>+where $major and $minor are the respective major and minor device numbers of</div><div class='add'>+the swap volume.</div><div class='add'>+</div><div class='add'>+uswsusp works with LVM, too.  See http://suspend.sourceforge.net/</div><div class='ctx'> </div><div class='ctx'> Q: I upgraded the kernel from 2.6.15 to 2.6.16. Both kernels were</div><div class='ctx'> compiled with the similar configuration files. Anyway I found that</div><div class='head'>diff --git a/Documentation/powerpc/00-INDEX b/Documentation/powerpc/00-INDEX<br/>index 6fd0e8bb8140..9dc845cf7d88 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/powerpc/00-INDEX?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/powerpc/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/powerpc/00-INDEX?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/00-INDEX</a></div><div class='hunk'>@@ -30,3 +30,5 @@ ptrace.txt</div><div class='ctx'> 	- Information on the ptrace interfaces for hardware debug registers.</div><div class='ctx'> transactional_memory.txt</div><div class='ctx'> 	- Overview of the Power8 transactional memory support.</div><div class='add'>+dscr.txt</div><div class='add'>+	- Overview DSCR (Data Stream Control Register) support.</div><div class='head'>diff --git a/Documentation/powerpc/cxl.txt b/Documentation/powerpc/cxl.txt<br/>index 2c71ecc519d9..2a230d01cd8c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/powerpc/cxl.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/powerpc/cxl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/powerpc/cxl.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/cxl.txt</a></div><div class='hunk'>@@ -133,6 +133,9 @@ User API</div><div class='ctx'>     The following file operations are supported on both slave and</div><div class='ctx'>     master devices.</div><div class='ctx'> </div><div class='add'>+    A userspace library libcxl is avaliable here:</div><div class='add'>+	https://github.com/ibm-capi/libcxl</div><div class='add'>+    This provides a C interface to this kernel API.</div><div class='ctx'> </div><div class='ctx'> open</div><div class='ctx'> ----</div><div class='hunk'>@@ -366,6 +369,7 @@ Sysfs Class</div><div class='ctx'>     enumeration and tuning of the accelerators. Its layout is</div><div class='ctx'>     described in Documentation/ABI/testing/sysfs-class-cxl</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> Udev rules</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/powerpc/dscr.txt b/Documentation/powerpc/dscr.txt<br/>new file mode 100644<br/>index 000000000000..1ff4400c57b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/powerpc/dscr.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/dscr.txt</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+			DSCR (Data Stream Control Register)</div><div class='add'>+		================================================</div><div class='add'>+</div><div class='add'>+DSCR register in powerpc allows user to have some control of prefetch of data</div><div class='add'>+stream in the processor. Please refer to the ISA documents or related manual</div><div class='add'>+for more detailed information regarding how to use this DSCR to attain this</div><div class='add'>+control of the pefetches . This document here provides an overview of kernel</div><div class='add'>+support for DSCR, related kernel objects, it's functionalities and exported</div><div class='add'>+user interface.</div><div class='add'>+</div><div class='add'>+(A) Data Structures:</div><div class='add'>+</div><div class='add'>+	(1) thread_struct:</div><div class='add'>+		dscr		/* Thread DSCR value */</div><div class='add'>+		dscr_inherit	/* Thread has changed default DSCR */</div><div class='add'>+</div><div class='add'>+	(2) PACA:</div><div class='add'>+		dscr_default	/* per-CPU DSCR default value */</div><div class='add'>+</div><div class='add'>+	(3) sysfs.c:</div><div class='add'>+		dscr_default	/* System DSCR default value */</div><div class='add'>+</div><div class='add'>+(B) Scheduler Changes:</div><div class='add'>+</div><div class='add'>+	Scheduler will write the per-CPU DSCR default which is stored in the</div><div class='add'>+	CPU's PACA value into the register if the thread has dscr_inherit value</div><div class='add'>+	cleared which means that it has not changed the default DSCR till now.</div><div class='add'>+	If the dscr_inherit value is set which means that it has changed the</div><div class='add'>+	default DSCR value, scheduler will write the changed value which will</div><div class='add'>+	now be contained in thread struct's dscr into the register instead of</div><div class='add'>+	the per-CPU default PACA based DSCR value.</div><div class='add'>+</div><div class='add'>+	NOTE: Please note here that the system wide global DSCR value never</div><div class='add'>+	gets used directly in the scheduler process context switch at all.</div><div class='add'>+</div><div class='add'>+(C) SYSFS Interface:</div><div class='add'>+</div><div class='add'>+	Global DSCR default:		/sys/devices/system/cpu/dscr_default</div><div class='add'>+	CPU specific DSCR default:	/sys/devices/system/cpu/cpuN/dscr</div><div class='add'>+</div><div class='add'>+	Changing the global DSCR default in the sysfs will change all the CPU</div><div class='add'>+	specific DSCR defaults immediately in their PACA structures. Again if</div><div class='add'>+	the current process has the dscr_inherit clear, it also writes the new</div><div class='add'>+	value into every CPU's DSCR register right away and updates the current</div><div class='add'>+	thread's DSCR value as well.</div><div class='add'>+</div><div class='add'>+	Changing the CPU specif DSCR default value in the sysfs does exactly</div><div class='add'>+	the same thing as above but unlike the global one above, it just changes</div><div class='add'>+	stuff for that particular CPU instead for all the CPUs on the system.</div><div class='add'>+</div><div class='add'>+(D) User Space Instructions:</div><div class='add'>+</div><div class='add'>+	The DSCR register can be accessed in the user space using any of these</div><div class='add'>+	two SPR numbers available for that purpose.</div><div class='add'>+</div><div class='add'>+	(1) Problem state SPR:		0x03	(Un-privileged, POWER8 only)</div><div class='add'>+	(2) Privileged state SPR:	0x11	(Privileged)</div><div class='add'>+</div><div class='add'>+	Accessing DSCR through privileged SPR number (0x11) from user space</div><div class='add'>+	works, as it is emulated following an illegal instruction exception</div><div class='add'>+	inside the kernel. Both mfspr and mtspr instructions are emulated.</div><div class='add'>+</div><div class='add'>+	Accessing DSCR through user level SPR (0x03) from user space will first</div><div class='add'>+	create a facility unavailable exception. Inside this exception handler</div><div class='add'>+	all mfspr isntruction based read attempts will get emulated and returned</div><div class='add'>+	where as the first mtspr instruction based write attempts will enable</div><div class='add'>+	the DSCR facility for the next time around (both for read and write) by</div><div class='add'>+	setting DSCR facility in the FSCR register.</div><div class='add'>+</div><div class='add'>+(E) Specifics about 'dscr_inherit':</div><div class='add'>+</div><div class='add'>+	The thread struct element 'dscr_inherit' represents whether the thread</div><div class='add'>+	in question has attempted and changed the DSCR itself using any of the</div><div class='add'>+	following methods. This element signifies whether the thread wants to</div><div class='add'>+	use the CPU default DSCR value or its own changed DSCR value in the</div><div class='add'>+	kernel.</div><div class='add'>+</div><div class='add'>+		(1) mtspr instruction	(SPR number 0x03)</div><div class='add'>+		(2) mtspr instruction	(SPR number 0x11)</div><div class='add'>+		(3) ptrace interface	(Explicitly set user DSCR value)</div><div class='add'>+</div><div class='add'>+	Any child of the process created after this event in the process inherits</div><div class='add'>+	this same behaviour as well.</div><div class='head'>diff --git a/Documentation/powerpc/transactional_memory.txt b/Documentation/powerpc/transactional_memory.txt<br/>index ded69794a5c0..ba0a2a4a54ba 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/powerpc/transactional_memory.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/powerpc/transactional_memory.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/powerpc/transactional_memory.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/powerpc/transactional_memory.txt</a></div><div class='hunk'>@@ -74,22 +74,23 @@ Causes of transaction aborts</div><div class='ctx'> Syscalls</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-Performing syscalls from within transaction is not recommended, and can lead</div><div class='del'>-to unpredictable results.</div><div class='add'>+Syscalls made from within an active transaction will not be performed and the</div><div class='add'>+transaction will be doomed by the kernel with the failure code TM_CAUSE_SYSCALL</div><div class='add'>+| TM_CAUSE_PERSISTENT.</div><div class='ctx'> </div><div class='del'>-Syscalls do not by design abort transactions, but beware: The kernel code will</div><div class='del'>-not be running in transactional state.  The effect of syscalls will always</div><div class='del'>-remain visible, but depending on the call they may abort your transaction as a</div><div class='del'>-side-effect, read soon-to-be-aborted transactional data that should not remain</div><div class='del'>-invisible, etc.  If you constantly retry a transaction that constantly aborts</div><div class='del'>-itself by calling a syscall, you'll have a livelock &amp; make no progress.</div><div class='add'>+Syscalls made from within a suspended transaction are performed as normal and</div><div class='add'>+the transaction is not explicitly doomed by the kernel.  However, what the</div><div class='add'>+kernel does to perform the syscall may result in the transaction being doomed</div><div class='add'>+by the hardware.  The syscall is performed in suspended mode so any side</div><div class='add'>+effects will be persistent, independent of transaction success or failure.  No</div><div class='add'>+guarantees are provided by the kernel about which syscalls will affect</div><div class='add'>+transaction success.</div><div class='ctx'> </div><div class='del'>-Simple syscalls (e.g. sigprocmask()) "could" be OK.  Even things like write()</div><div class='del'>-from, say, printf() should be OK as long as the kernel does not access any</div><div class='del'>-memory that was accessed transactionally.</div><div class='del'>-</div><div class='del'>-Consider any syscalls that happen to work as debug-only -- not recommended for</div><div class='del'>-production use.  Best to queue them up till after the transaction is over.</div><div class='add'>+Care must be taken when relying on syscalls to abort during active transactions</div><div class='add'>+if the calls are made via a library.  Libraries may cache values (which may</div><div class='add'>+give the appearance of success) or perform operations that cause transaction</div><div class='add'>+failure before entering the kernel (which may produce different failure codes).</div><div class='add'>+Examples are glibc's getpid() and lazy symbol resolution.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Signals</div><div class='hunk'>@@ -176,8 +177,7 @@ kernel aborted a transaction:</div><div class='ctx'>  TM_CAUSE_RESCHED       Thread was rescheduled.</div><div class='ctx'>  TM_CAUSE_TLBI          Software TLB invalid.</div><div class='ctx'>  TM_CAUSE_FAC_UNAV      FP/VEC/VSX unavailable trap.</div><div class='del'>- TM_CAUSE_SYSCALL       Currently unused; future syscalls that must abort</div><div class='del'>-                        transactions for consistency will use this.</div><div class='add'>+ TM_CAUSE_SYSCALL       Syscall from active transaction.</div><div class='ctx'>  TM_CAUSE_SIGNAL        Signal delivered.</div><div class='ctx'>  TM_CAUSE_MISC          Currently unused.</div><div class='ctx'>  TM_CAUSE_ALIGNMENT     Alignment fault.</div><div class='head'>diff --git a/Documentation/pps/pps.txt b/Documentation/pps/pps.txt<br/>index c03b1be5eb15..c508cceeee7d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/pps/pps.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/pps/pps.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/pps/pps.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/pps/pps.txt</a></div><div class='hunk'>@@ -166,7 +166,7 @@ Testing the PPS support</div><div class='ctx'> </div><div class='ctx'> In order to test the PPS support even without specific hardware you can use</div><div class='ctx'> the ktimer driver (see the client subsection in the PPS configuration menu)</div><div class='del'>-and the userland tools provided into Documentaion/pps/ directory.</div><div class='add'>+and the userland tools provided in the Documentation/pps/ directory.</div><div class='ctx'> </div><div class='ctx'> Once you have enabled the compilation of ktimer just modprobe it (if</div><div class='ctx'> not statically compiled):</div><div class='head'>diff --git a/Documentation/prctl/Makefile b/Documentation/prctl/Makefile<br/>index 2948b7b124b9..44de3080c7f2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/prctl/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/prctl/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/prctl/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/prctl/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+ifndef CROSS_COMPILE</div><div class='ctx'> # List of programs to build</div><div class='ctx'> hostprogs-$(CONFIG_X86) := disable-tsc-ctxt-sw-stress-test disable-tsc-on-off-stress-test disable-tsc-test</div><div class='ctx'> # Tell kbuild to always build the programs</div><div class='hunk'>@@ -6,3 +7,4 @@ always := $(hostprogs-y)</div><div class='ctx'> HOSTCFLAGS_disable-tsc-ctxt-sw-stress-test.o += -I$(objtree)/usr/include</div><div class='ctx'> HOSTCFLAGS_disable-tsc-on-off-stress-test.o += -I$(objtree)/usr/include</div><div class='ctx'> HOSTCFLAGS_disable-tsc-test.o += -I$(objtree)/usr/include</div><div class='add'>+endif</div><div class='head'>diff --git a/Documentation/preempt-locking.txt b/Documentation/preempt-locking.txt<br/>index 57883ca2498b..e89ce6624af2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/preempt-locking.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/preempt-locking.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/preempt-locking.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/preempt-locking.txt</a></div><div class='hunk'>@@ -48,7 +48,7 @@ preemption must be disabled around such regions.</div><div class='ctx'> </div><div class='ctx'> Note, some FPU functions are already explicitly preempt safe.  For example,</div><div class='ctx'> kernel_fpu_begin and kernel_fpu_end will disable and enable preemption.</div><div class='del'>-However, math_state_restore must be called with preemption disabled.</div><div class='add'>+However, fpu__restore() must be called with preemption disabled.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> RULE #3: Lock acquire and release must be performed by same task</div><div class='head'>diff --git a/Documentation/remoteproc.txt b/Documentation/remoteproc.txt<br/>index e6469fdcf89a..ef0219fa4bb4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/remoteproc.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/remoteproc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/remoteproc.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/remoteproc.txt</a></div><div class='hunk'>@@ -51,6 +51,12 @@ cost.</div><div class='ctx'>         rproc_shutdown() returns, and users can still use it with a subsequent</div><div class='ctx'>         rproc_boot(), if needed.</div><div class='ctx'> </div><div class='add'>+  struct rproc *rproc_get_by_phandle(phandle phandle)</div><div class='add'>+    - Find an rproc handle using a device tree phandle. Returns the rproc</div><div class='add'>+      handle on success, and NULL on failure. This function increments</div><div class='add'>+      the remote processor's refcount, so always use rproc_put() to</div><div class='add'>+      decrement it back once rproc isn't needed anymore.</div><div class='add'>+</div><div class='ctx'> 3. Typical usage</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/remoteproc.h&gt;</div><div class='head'>diff --git a/Documentation/s390/qeth.txt b/Documentation/s390/qeth.txt<br/>index 74122ada9949..aa06fcf5f8c2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/s390/qeth.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/s390/qeth.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/s390/qeth.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/s390/qeth.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> IBM s390 QDIO Ethernet Driver</div><div class='ctx'> </div><div class='del'>-HiperSockets Bridge Port Support</div><div class='add'>+OSA and HiperSockets Bridge Port Support</div><div class='ctx'> </div><div class='ctx'> Uevents</div><div class='ctx'> </div><div class='hunk'>@@ -8,7 +8,7 @@ To generate the events the device must be assigned a role of either</div><div class='ctx'> a primary or a secondary Bridge Port. For more information, see</div><div class='ctx'> "z/VM Connectivity, SC24-6174".</div><div class='ctx'> </div><div class='del'>-When run on HiperSockets Bridge Capable Port hardware, and the state</div><div class='add'>+When run on an OSA or HiperSockets Bridge Capable Port hardware, and the state</div><div class='ctx'> of some configured Bridge Port device on the channel changes, a udev</div><div class='ctx'> event with ACTION=CHANGE is emitted on behalf of the corresponding</div><div class='ctx'> ccwgroup device. The event has the following attributes:</div><div class='head'>diff --git a/Documentation/scheduler/sched-deadline.txt b/Documentation/scheduler/sched-deadline.txt<br/>index 21461a0441c1..e114513a2731 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scheduler/sched-deadline.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/scheduler/sched-deadline.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scheduler/sched-deadline.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scheduler/sched-deadline.txt</a></div><div class='hunk'>@@ -8,6 +8,10 @@ CONTENTS</div><div class='ctx'>  1. Overview</div><div class='ctx'>  2. Scheduling algorithm</div><div class='ctx'>  3. Scheduling Real-Time Tasks</div><div class='add'>+   3.1 Definitions</div><div class='add'>+   3.2 Schedulability Analysis for Uniprocessor Systems</div><div class='add'>+   3.3 Schedulability Analysis for Multiprocessor Systems</div><div class='add'>+   3.4 Relationship with SCHED_DEADLINE Parameters</div><div class='ctx'>  4. Bandwidth management</div><div class='ctx'>    4.1 System-wide settings</div><div class='ctx'>    4.2 Task interface</div><div class='hunk'>@@ -43,7 +47,7 @@ CONTENTS</div><div class='ctx'>  "deadline", to schedule tasks. A SCHED_DEADLINE task should receive</div><div class='ctx'>  "runtime" microseconds of execution time every "period" microseconds, and</div><div class='ctx'>  these "runtime" microseconds are available within "deadline" microseconds</div><div class='del'>- from the beginning of the period.  In order to implement this behaviour,</div><div class='add'>+ from the beginning of the period.  In order to implement this behavior,</div><div class='ctx'>  every time the task wakes up, the scheduler computes a "scheduling deadline"</div><div class='ctx'>  consistent with the guarantee (using the CBS[2,3] algorithm). Tasks are then</div><div class='ctx'>  scheduled using EDF[1] on these scheduling deadlines (the task with the</div><div class='hunk'>@@ -52,7 +56,7 @@ CONTENTS</div><div class='ctx'>  "admission control" strategy (see Section "4. Bandwidth management") is used</div><div class='ctx'>  (clearly, if the system is overloaded this guarantee cannot be respected).</div><div class='ctx'> </div><div class='del'>- Summing up, the CBS[2,3] algorithms assigns scheduling deadlines to tasks so</div><div class='add'>+ Summing up, the CBS[2,3] algorithm assigns scheduling deadlines to tasks so</div><div class='ctx'>  that each task runs for at most its runtime every period, avoiding any</div><div class='ctx'>  interference between different tasks (bandwidth isolation), while the EDF[1]</div><div class='ctx'>  algorithm selects the task with the earliest scheduling deadline as the one</div><div class='hunk'>@@ -63,7 +67,7 @@ CONTENTS</div><div class='ctx'>  In more details, the CBS algorithm assigns scheduling deadlines to</div><div class='ctx'>  tasks in the following way:</div><div class='ctx'> </div><div class='del'>-  - Each SCHED_DEADLINE task is characterised by the "runtime",</div><div class='add'>+  - Each SCHED_DEADLINE task is characterized by the "runtime",</div><div class='ctx'>     "deadline", and "period" parameters;</div><div class='ctx'> </div><div class='ctx'>   - The state of the task is described by a "scheduling deadline", and</div><div class='hunk'>@@ -78,7 +82,7 @@ CONTENTS</div><div class='ctx'> </div><div class='ctx'>     then, if the scheduling deadline is smaller than the current time, or</div><div class='ctx'>     this condition is verified, the scheduling deadline and the</div><div class='del'>-    remaining runtime are re-initialised as</div><div class='add'>+    remaining runtime are re-initialized as</div><div class='ctx'> </div><div class='ctx'>          scheduling deadline = current time + deadline</div><div class='ctx'>          remaining runtime = runtime</div><div class='hunk'>@@ -126,31 +130,37 @@ CONTENTS</div><div class='ctx'>  suited for periodic or sporadic real-time tasks that need guarantees on their</div><div class='ctx'>  timing behavior, e.g., multimedia, streaming, control applications, etc.</div><div class='ctx'> </div><div class='add'>+3.1 Definitions</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='ctx'>  A typical real-time task is composed of a repetition of computation phases</div><div class='ctx'>  (task instances, or jobs) which are activated on a periodic or sporadic</div><div class='ctx'>  fashion.</div><div class='del'>- Each job J_j (where J_j is the j^th job of the task) is characterised by an</div><div class='add'>+ Each job J_j (where J_j is the j^th job of the task) is characterized by an</div><div class='ctx'>  arrival time r_j (the time when the job starts), an amount of computation</div><div class='ctx'>  time c_j needed to finish the job, and a job absolute deadline d_j, which</div><div class='ctx'>  is the time within which the job should be finished. The maximum execution</div><div class='del'>- time max_j{c_j} is called "Worst Case Execution Time" (WCET) for the task.</div><div class='add'>+ time max{c_j} is called "Worst Case Execution Time" (WCET) for the task.</div><div class='ctx'>  A real-time task can be periodic with period P if r_{j+1} = r_j + P, or</div><div class='ctx'>  sporadic with minimum inter-arrival time P is r_{j+1} &gt;= r_j + P. Finally,</div><div class='ctx'>  d_j = r_j + D, where D is the task's relative deadline.</div><div class='del'>- The utilisation of a real-time task is defined as the ratio between its</div><div class='add'>+ Summing up, a real-time task can be described as</div><div class='add'>+	Task = (WCET, D, P)</div><div class='add'>+</div><div class='add'>+ The utilization of a real-time task is defined as the ratio between its</div><div class='ctx'>  WCET and its period (or minimum inter-arrival time), and represents</div><div class='ctx'>  the fraction of CPU time needed to execute the task.</div><div class='ctx'> </div><div class='del'>- If the total utilisation sum_i(WCET_i/P_i) is larger than M (with M equal</div><div class='add'>+ If the total utilization U=sum(WCET_i/P_i) is larger than M (with M equal</div><div class='ctx'>  to the number of CPUs), then the scheduler is unable to respect all the</div><div class='ctx'>  deadlines.</div><div class='del'>- Note that total utilisation is defined as the sum of the utilisations</div><div class='add'>+ Note that total utilization is defined as the sum of the utilizations</div><div class='ctx'>  WCET_i/P_i over all the real-time tasks in the system. When considering</div><div class='ctx'>  multiple real-time tasks, the parameters of the i-th task are indicated</div><div class='ctx'>  with the "_i" suffix.</div><div class='del'>- Moreover, if the total utilisation is larger than M, then we risk starving</div><div class='add'>+ Moreover, if the total utilization is larger than M, then we risk starving</div><div class='ctx'>  non- real-time tasks by real-time tasks.</div><div class='del'>- If, instead, the total utilisation is smaller than M, then non real-time</div><div class='add'>+ If, instead, the total utilization is smaller than M, then non real-time</div><div class='ctx'>  tasks will not be starved and the system might be able to respect all the</div><div class='ctx'>  deadlines.</div><div class='ctx'>  As a matter of fact, in this case it is possible to provide an upper bound</div><div class='hunk'>@@ -159,38 +169,119 @@ CONTENTS</div><div class='ctx'>  More precisely, it can be proven that using a global EDF scheduler the</div><div class='ctx'>  maximum tardiness of each task is smaller or equal than</div><div class='ctx'> 	((M − 1) · WCET_max − WCET_min)/(M − (M − 2) · U_max) + WCET_max</div><div class='del'>- where WCET_max = max_i{WCET_i} is the maximum WCET, WCET_min=min_i{WCET_i}</div><div class='del'>- is the minimum WCET, and U_max = max_i{WCET_i/P_i} is the maximum utilisation.</div><div class='add'>+ where WCET_max = max{WCET_i} is the maximum WCET, WCET_min=min{WCET_i}</div><div class='add'>+ is the minimum WCET, and U_max = max{WCET_i/P_i} is the maximum</div><div class='add'>+ utilization[12].</div><div class='add'>+</div><div class='add'>+3.2 Schedulability Analysis for Uniprocessor Systems</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='ctx'>  If M=1 (uniprocessor system), or in case of partitioned scheduling (each</div><div class='ctx'>  real-time task is statically assigned to one and only one CPU), it is</div><div class='ctx'>  possible to formally check if all the deadlines are respected.</div><div class='ctx'>  If D_i = P_i for all tasks, then EDF is able to respect all the deadlines</div><div class='del'>- of all the tasks executing on a CPU if and only if the total utilisation</div><div class='add'>+ of all the tasks executing on a CPU if and only if the total utilization</div><div class='ctx'>  of the tasks running on such a CPU is smaller or equal than 1.</div><div class='ctx'>  If D_i != P_i for some task, then it is possible to define the density of</div><div class='del'>- a task as C_i/min{D_i,T_i}, and EDF is able to respect all the deadlines</div><div class='del'>- of all the tasks running on a CPU if the sum sum_i C_i/min{D_i,T_i} of the</div><div class='del'>- densities of the tasks running on such a CPU is smaller or equal than 1</div><div class='del'>- (notice that this condition is only sufficient, and not necessary).</div><div class='add'>+ a task as WCET_i/min{D_i,P_i}, and EDF is able to respect all the deadlines</div><div class='add'>+ of all the tasks running on a CPU if the sum of the densities of the tasks</div><div class='add'>+ running on such a CPU is smaller or equal than 1:</div><div class='add'>+	sum(WCET_i / min{D_i, P_i}) &lt;= 1</div><div class='add'>+ It is important to notice that this condition is only sufficient, and not</div><div class='add'>+ necessary: there are task sets that are schedulable, but do not respect the</div><div class='add'>+ condition. For example, consider the task set {Task_1,Task_2} composed by</div><div class='add'>+ Task_1=(50ms,50ms,100ms) and Task_2=(10ms,100ms,100ms).</div><div class='add'>+ EDF is clearly able to schedule the two tasks without missing any deadline</div><div class='add'>+ (Task_1 is scheduled as soon as it is released, and finishes just in time</div><div class='add'>+ to respect its deadline; Task_2 is scheduled immediately after Task_1, hence</div><div class='add'>+ its response time cannot be larger than 50ms + 10ms = 60ms) even if</div><div class='add'>+	50 / min{50,100} + 10 / min{100, 100} = 50 / 50 + 10 / 100 = 1.1</div><div class='add'>+ Of course it is possible to test the exact schedulability of tasks with</div><div class='add'>+ D_i != P_i (checking a condition that is both sufficient and necessary),</div><div class='add'>+ but this cannot be done by comparing the total utilization or density with</div><div class='add'>+ a constant. Instead, the so called "processor demand" approach can be used,</div><div class='add'>+ computing the total amount of CPU time h(t) needed by all the tasks to</div><div class='add'>+ respect all of their deadlines in a time interval of size t, and comparing</div><div class='add'>+ such a time with the interval size t. If h(t) is smaller than t (that is,</div><div class='add'>+ the amount of time needed by the tasks in a time interval of size t is</div><div class='add'>+ smaller than the size of the interval) for all the possible values of t, then</div><div class='add'>+ EDF is able to schedule the tasks respecting all of their deadlines. Since</div><div class='add'>+ performing this check for all possible values of t is impossible, it has been</div><div class='add'>+ proven[4,5,6] that it is sufficient to perform the test for values of t</div><div class='add'>+ between 0 and a maximum value L. The cited papers contain all of the</div><div class='add'>+ mathematical details and explain how to compute h(t) and L.</div><div class='add'>+ In any case, this kind of analysis is too complex as well as too</div><div class='add'>+ time-consuming to be performed on-line. Hence, as explained in Section</div><div class='add'>+ 4 Linux uses an admission test based on the tasks' utilizations.</div><div class='add'>+</div><div class='add'>+3.3 Schedulability Analysis for Multiprocessor Systems</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='ctx'>  On multiprocessor systems with global EDF scheduling (non partitioned</div><div class='ctx'>  systems), a sufficient test for schedulability can not be based on the</div><div class='del'>- utilisations (it can be shown that task sets with utilisations slightly</div><div class='del'>- larger than 1 can miss deadlines regardless of the number of CPUs M).</div><div class='del'>- However, as previously stated, enforcing that the total utilisation is smaller</div><div class='del'>- than M is enough to guarantee that non real-time tasks are not starved and</div><div class='del'>- that the tardiness of real-time tasks has an upper bound.</div><div class='add'>+ utilizations or densities: it can be shown that even if D_i = P_i task</div><div class='add'>+ sets with utilizations slightly larger than 1 can miss deadlines regardless</div><div class='add'>+ of the number of CPUs.</div><div class='add'>+</div><div class='add'>+ Consider a set {Task_1,...Task_{M+1}} of M+1 tasks on a system with M</div><div class='add'>+ CPUs, with the first task Task_1=(P,P,P) having period, relative deadline</div><div class='add'>+ and WCET equal to P. The remaining M tasks Task_i=(e,P-1,P-1) have an</div><div class='add'>+ arbitrarily small worst case execution time (indicated as "e" here) and a</div><div class='add'>+ period smaller than the one of the first task. Hence, if all the tasks</div><div class='add'>+ activate at the same time t, global EDF schedules these M tasks first</div><div class='add'>+ (because their absolute deadlines are equal to t + P - 1, hence they are</div><div class='add'>+ smaller than the absolute deadline of Task_1, which is t + P). As a</div><div class='add'>+ result, Task_1 can be scheduled only at time t + e, and will finish at</div><div class='add'>+ time t + e + P, after its absolute deadline. The total utilization of the</div><div class='add'>+ task set is U = M · e / (P - 1) + P / P = M · e / (P - 1) + 1, and for small</div><div class='add'>+ values of e this can become very close to 1. This is known as "Dhall's</div><div class='add'>+ effect"[7]. Note: the example in the original paper by Dhall has been</div><div class='add'>+ slightly simplified here (for example, Dhall more correctly computed</div><div class='add'>+ lim_{e-&gt;0}U).</div><div class='add'>+</div><div class='add'>+ More complex schedulability tests for global EDF have been developed in</div><div class='add'>+ real-time literature[8,9], but they are not based on a simple comparison</div><div class='add'>+ between total utilization (or density) and a fixed constant. If all tasks</div><div class='add'>+ have D_i = P_i, a sufficient schedulability condition can be expressed in</div><div class='add'>+ a simple way:</div><div class='add'>+	sum(WCET_i / P_i) &lt;= M - (M - 1) · U_max</div><div class='add'>+ where U_max = max{WCET_i / P_i}[10]. Notice that for U_max = 1,</div><div class='add'>+ M - (M - 1) · U_max becomes M - M + 1 = 1 and this schedulability condition</div><div class='add'>+ just confirms the Dhall's effect. A more complete survey of the literature</div><div class='add'>+ about schedulability tests for multi-processor real-time scheduling can be</div><div class='add'>+ found in [11].</div><div class='add'>+</div><div class='add'>+ As seen, enforcing that the total utilization is smaller than M does not</div><div class='add'>+ guarantee that global EDF schedules the tasks without missing any deadline</div><div class='add'>+ (in other words, global EDF is not an optimal scheduling algorithm). However,</div><div class='add'>+ a total utilization smaller than M is enough to guarantee that non real-time</div><div class='add'>+ tasks are not starved and that the tardiness of real-time tasks has an upper</div><div class='add'>+ bound[12] (as previously noted). Different bounds on the maximum tardiness</div><div class='add'>+ experienced by real-time tasks have been developed in various papers[13,14],</div><div class='add'>+ but the theoretical result that is important for SCHED_DEADLINE is that if</div><div class='add'>+ the total utilization is smaller or equal than M then the response times of</div><div class='add'>+ the tasks are limited.</div><div class='add'>+</div><div class='add'>+3.4 Relationship with SCHED_DEADLINE Parameters</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='del'>- SCHED_DEADLINE can be used to schedule real-time tasks guaranteeing that</div><div class='del'>- the jobs' deadlines of a task are respected. In order to do this, a task</div><div class='del'>- must be scheduled by setting:</div><div class='add'>+ Finally, it is important to understand the relationship between the</div><div class='add'>+ SCHED_DEADLINE scheduling parameters described in Section 2 (runtime,</div><div class='add'>+ deadline and period) and the real-time task parameters (WCET, D, P)</div><div class='add'>+ described in this section. Note that the tasks' temporal constraints are</div><div class='add'>+ represented by its absolute deadlines d_j = r_j + D described above, while</div><div class='add'>+ SCHED_DEADLINE schedules the tasks according to scheduling deadlines (see</div><div class='add'>+ Section 2).</div><div class='add'>+ If an admission test is used to guarantee that the scheduling deadlines</div><div class='add'>+ are respected, then SCHED_DEADLINE can be used to schedule real-time tasks</div><div class='add'>+ guaranteeing that all the jobs' deadlines of a task are respected.</div><div class='add'>+ In order to do this, a task must be scheduled by setting:</div><div class='ctx'> </div><div class='ctx'>   - runtime &gt;= WCET</div><div class='ctx'>   - deadline = D</div><div class='ctx'>   - period &lt;= P</div><div class='ctx'> </div><div class='del'>- IOW, if runtime &gt;= WCET and if period is &gt;= P, then the scheduling deadlines</div><div class='add'>+ IOW, if runtime &gt;= WCET and if period is &lt;= P, then the scheduling deadlines</div><div class='ctx'>  and the absolute deadlines (d_j) coincide, so a proper admission control</div><div class='ctx'>  allows to respect the jobs' absolute deadlines for this task (this is what is</div><div class='ctx'>  called "hard schedulability property" and is an extension of Lemma 1 of [2]).</div><div class='hunk'>@@ -206,6 +297,39 @@ CONTENTS</div><div class='ctx'>       Symposium, 1998. http://retis.sssup.it/~giorgio/paps/1998/rtss98-cbs.pdf</div><div class='ctx'>   3 - L. Abeni. Server Mechanisms for Multimedia Applications. ReTiS Lab</div><div class='ctx'>       Technical Report. http://disi.unitn.it/~abeni/tr-98-01.pdf</div><div class='add'>+  4 - J. Y. Leung and M.L. Merril. A Note on Preemptive Scheduling of</div><div class='add'>+      Periodic, Real-Time Tasks. Information Processing Letters, vol. 11,</div><div class='add'>+      no. 3, pp. 115-118, 1980.</div><div class='add'>+  5 - S. K. Baruah, A. K. Mok and L. E. Rosier. Preemptively Scheduling</div><div class='add'>+      Hard-Real-Time Sporadic Tasks on One Processor. Proceedings of the</div><div class='add'>+      11th IEEE Real-time Systems Symposium, 1990.</div><div class='add'>+  6 - S. K. Baruah, L. E. Rosier and R. R. Howell. Algorithms and Complexity</div><div class='add'>+      Concerning the Preemptive Scheduling of Periodic Real-Time tasks on</div><div class='add'>+      One Processor. Real-Time Systems Journal, vol. 4, no. 2, pp 301-324,</div><div class='add'>+      1990.</div><div class='add'>+  7 - S. J. Dhall and C. L. Liu. On a real-time scheduling problem. Operations</div><div class='add'>+      research, vol. 26, no. 1, pp 127-140, 1978.</div><div class='add'>+  8 - T. Baker. Multiprocessor EDF and Deadline Monotonic Schedulability</div><div class='add'>+      Analysis. Proceedings of the 24th IEEE Real-Time Systems Symposium, 2003.</div><div class='add'>+  9 - T. Baker. An Analysis of EDF Schedulability on a Multiprocessor.</div><div class='add'>+      IEEE Transactions on Parallel and Distributed Systems, vol. 16, no. 8,</div><div class='add'>+      pp 760-768, 2005.</div><div class='add'>+  10 - J. Goossens, S. Funk and S. Baruah, Priority-Driven Scheduling of</div><div class='add'>+       Periodic Task Systems on Multiprocessors. Real-Time Systems Journal,</div><div class='add'>+       vol. 25, no. 2–3, pp. 187–205, 2003.</div><div class='add'>+  11 - R. Davis and A. Burns. A Survey of Hard Real-Time Scheduling for</div><div class='add'>+       Multiprocessor Systems. ACM Computing Surveys, vol. 43, no. 4, 2011.</div><div class='add'>+       http://www-users.cs.york.ac.uk/~robdavis/papers/MPSurveyv5.0.pdf</div><div class='add'>+  12 - U. C. Devi and J. H. Anderson. Tardiness Bounds under Global EDF</div><div class='add'>+       Scheduling on a Multiprocessor. Real-Time Systems Journal, vol. 32,</div><div class='add'>+       no. 2, pp 133-189, 2008.</div><div class='add'>+  13 - P. Valente and G. Lipari. An Upper Bound to the Lateness of Soft</div><div class='add'>+       Real-Time Tasks Scheduled by EDF on Multiprocessors. Proceedings of</div><div class='add'>+       the 26th IEEE Real-Time Systems Symposium, 2005.</div><div class='add'>+  14 - J. Erickson, U. Devi and S. Baruah. Improved tardiness bounds for</div><div class='add'>+       Global EDF. Proceedings of the 22nd Euromicro Conference on</div><div class='add'>+       Real-Time Systems, 2010.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 4. Bandwidth management</div><div class='ctx'> =======================</div><div class='hunk'>@@ -218,10 +342,10 @@ CONTENTS</div><div class='ctx'>  no guarantee can be given on the actual scheduling of the -deadline tasks.</div><div class='ctx'> </div><div class='ctx'>  As already stated in Section 3, a necessary condition to be respected to</div><div class='del'>- correctly schedule a set of real-time tasks is that the total utilisation</div><div class='add'>+ correctly schedule a set of real-time tasks is that the total utilization</div><div class='ctx'>  is smaller than M. When talking about -deadline tasks, this requires that</div><div class='ctx'>  the sum of the ratio between runtime and period for all tasks is smaller</div><div class='del'>- than M. Notice that the ratio runtime/period is equivalent to the utilisation</div><div class='add'>+ than M. Notice that the ratio runtime/period is equivalent to the utilization</div><div class='ctx'>  of a "traditional" real-time task, and is also often referred to as</div><div class='ctx'>  "bandwidth".</div><div class='ctx'>  The interface used to control the CPU bandwidth that can be allocated</div><div class='hunk'>@@ -251,7 +375,7 @@ CONTENTS</div><div class='ctx'>  The system wide settings are configured under the /proc virtual file system.</div><div class='ctx'> </div><div class='ctx'>  For now the -rt knobs are used for -deadline admission control and the</div><div class='del'>- -deadline runtime is accounted against the -rt runtime. We realise that this</div><div class='add'>+ -deadline runtime is accounted against the -rt runtime. We realize that this</div><div class='ctx'>  isn't entirely desirable; however, it is better to have a small interface for</div><div class='ctx'>  now, and be able to change it easily later. The ideal situation (see 5.) is to</div><div class='ctx'>  run -rt tasks from a -deadline server; in which case the -rt bandwidth is a</div><div class='head'>diff --git a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt<br/>index 731bc4f4c5e6..255075157511 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/scsi_mid_low_api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/scsi/scsi_mid_low_api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/scsi_mid_low_api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scsi/scsi_mid_low_api.txt</a></div><div class='hunk'>@@ -1269,7 +1269,7 @@ Members of interest:</div><div class='ctx'>     request_buffer - either contains data buffer or scatter gather list</div><div class='ctx'>                      depending on the setting of use_sg. Scatter gather</div><div class='ctx'>                      elements are defined by 'struct scatterlist' found</div><div class='del'>-                     in include/asm/scatterlist.h .</div><div class='add'>+                     in include/linux/scatterlist.h .</div><div class='ctx'>     done         - function pointer that should be invoked by LLD when the</div><div class='ctx'>                    SCSI command is completed (successfully or otherwise).</div><div class='ctx'>                    Should only be called by an LLD if the LLD has accepted</div><div class='head'>diff --git a/Documentation/scsi/st.txt b/Documentation/scsi/st.txt<br/>index 0d5bdb153d3b..f29fa550665a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/st.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/scsi/st.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/st.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/scsi/st.txt</a></div><div class='hunk'>@@ -151,6 +151,65 @@ A link named 'tape' is made from the SCSI device directory to the class</div><div class='ctx'> directory corresponding to the mode 0 auto-rewind device (e.g., st0). </div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+SYSFS AND STATISTICS FOR TAPE DEVICES</div><div class='add'>+</div><div class='add'>+The st driver maintains statistics for tape drives inside the sysfs filesystem.</div><div class='add'>+The following method can be used to locate the statistics that are</div><div class='add'>+available (assuming that sysfs is mounted at /sys):</div><div class='add'>+</div><div class='add'>+1. Use opendir(3) on the directory /sys/class/scsi_tape</div><div class='add'>+2. Use readdir(3) to read the directory contents</div><div class='add'>+3. Use regcomp(3)/regexec(3) to match directory entries to the extended</div><div class='add'>+        regular expression "^st[0-9]+$"</div><div class='add'>+4. Access the statistics from the /sys/class/scsi_tape/&lt;match&gt;/stats</div><div class='add'>+        directory (where &lt;match&gt; is a directory entry from /sys/class/scsi_tape</div><div class='add'>+        that matched the extended regular expression)</div><div class='add'>+</div><div class='add'>+The reason for using this approach is that all the character devices</div><div class='add'>+pointing to the same tape drive use the same statistics. That means</div><div class='add'>+that st0 would have the same statistics as nst0.</div><div class='add'>+</div><div class='add'>+The directory contains the following statistics files:</div><div class='add'>+</div><div class='add'>+1.  in_flight - The number of I/Os currently outstanding to this device.</div><div class='add'>+2.  io_ns - The amount of time spent waiting (in nanoseconds) for all I/O</div><div class='add'>+        to complete (including read and write). This includes tape movement</div><div class='add'>+        commands such as seeking between file or set marks and implicit tape</div><div class='add'>+        movement such as when rewind on close tape devices are used.</div><div class='add'>+3.  other_cnt - The number of I/Os issued to the tape drive other than read or</div><div class='add'>+        write commands. The time taken to complete these commands uses the</div><div class='add'>+        following calculation io_ms-read_ms-write_ms.</div><div class='add'>+4.  read_byte_cnt - The number of bytes read from the tape drive.</div><div class='add'>+5.  read_cnt - The number of read requests issued to the tape drive.</div><div class='add'>+6.  read_ns - The amount of time (in nanoseconds) spent waiting for read</div><div class='add'>+        requests to complete.</div><div class='add'>+7.  write_byte_cnt - The number of bytes written to the tape drive.</div><div class='add'>+8.  write_cnt - The number of write requests issued to the tape drive.</div><div class='add'>+9.  write_ns - The amount of time (in nanoseconds) spent waiting for write</div><div class='add'>+        requests to complete.</div><div class='add'>+10. resid_cnt - The number of times during a read or write we found</div><div class='add'>+	the residual amount to be non-zero. This should mean that a program</div><div class='add'>+	is issuing a read larger thean the block size on tape. For write</div><div class='add'>+	not all data made it to tape.</div><div class='add'>+</div><div class='add'>+Note: The in_flight value is incremented when an I/O starts the I/O</div><div class='add'>+itself is not added to the statistics until it completes.</div><div class='add'>+</div><div class='add'>+The total of read_cnt, write_cnt, and other_cnt may not total to the same</div><div class='add'>+value as iodone_cnt at the device level. The tape statistics only count</div><div class='add'>+I/O issued via the st module.</div><div class='add'>+</div><div class='add'>+When read the statistics may not be temporally consistent while I/O is in</div><div class='add'>+progress. The individual values are read and written to atomically however</div><div class='add'>+when reading them back via sysfs they may be in the process of being</div><div class='add'>+updated when starting an I/O or when it is completed.</div><div class='add'>+</div><div class='add'>+The value shown in in_flight is incremented before any statstics are</div><div class='add'>+updated and decremented when an I/O completes after updating statistics.</div><div class='add'>+The value of in_flight is 0 when there are no I/Os outstanding that are</div><div class='add'>+issued by the st driver. Tape statistics do not take into account any</div><div class='add'>+I/O performed via the sg device.</div><div class='add'>+</div><div class='ctx'> BSD AND SYS V SEMANTICS</div><div class='ctx'> </div><div class='ctx'> The user can choose between these two behaviours of the tape driver by</div><div class='head'>diff --git a/Documentation/security/Smack.txt b/Documentation/security/Smack.txt<br/>index abc82f85215b..de5e1aeca7fb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/security/Smack.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/security/Smack.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/security/Smack.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/security/Smack.txt</a></div><div class='hunk'>@@ -206,11 +206,11 @@ netlabel</div><div class='ctx'> 	label. The format accepted on write is:</div><div class='ctx'> 		"%d.%d.%d.%d label" or "%d.%d.%d.%d/%d label".</div><div class='ctx'> onlycap</div><div class='del'>-	This contains the label processes must have for CAP_MAC_ADMIN</div><div class='add'>+	This contains labels processes must have for CAP_MAC_ADMIN</div><div class='ctx'> 	and CAP_MAC_OVERRIDE to be effective. If this file is empty</div><div class='ctx'> 	these capabilities are effective at for processes with any</div><div class='del'>-	label. The value is set by writing the desired label to the</div><div class='del'>-	file or cleared by writing "-" to the file.</div><div class='add'>+	label. The values are set by writing the desired labels, separated</div><div class='add'>+	by spaces, to the file or cleared by writing "-" to the file.</div><div class='ctx'> ptrace</div><div class='ctx'> 	This is used to define the current ptrace policy</div><div class='ctx'> 	0 - default: this is the policy that relies on Smack access rules.</div><div class='head'>diff --git a/Documentation/serial/serial-rs485.txt b/Documentation/serial/serial-rs485.txt<br/>index 39dac95422a3..2253b8b45a74 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/serial/serial-rs485.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/serial/serial-rs485.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/serial/serial-rs485.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/serial/serial-rs485.txt</a></div><div class='hunk'>@@ -33,50 +33,10 @@</div><div class='ctx'>    the values given by the device tree.</div><div class='ctx'> </div><div class='ctx'>    Any driver for devices capable of working both as RS232 and RS485 should</div><div class='del'>-   provide at least the following ioctls:</div><div class='del'>-</div><div class='del'>-    - TIOCSRS485 (typically associated with number 0x542F). This ioctl is used</div><div class='del'>-      to enable/disable RS485 mode from user-space</div><div class='del'>-</div><div class='del'>-    - TIOCGRS485 (typically associated with number 0x542E). This ioctl is used</div><div class='del'>-      to get RS485 mode from kernel-space (i.e., driver) to user-space.</div><div class='del'>-</div><div class='del'>-   In other words, the serial driver should contain a code similar to the next</div><div class='del'>-   one:</div><div class='del'>-</div><div class='del'>-	static struct uart_ops atmel_pops = {</div><div class='del'>-		/* ... */</div><div class='del'>-		.ioctl		= handle_ioctl,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	static int handle_ioctl(struct uart_port *port,</div><div class='del'>-		unsigned int cmd,</div><div class='del'>-		unsigned long arg)</div><div class='del'>-	{</div><div class='del'>-		struct serial_rs485 rs485conf;</div><div class='del'>-</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case TIOCSRS485:</div><div class='del'>-			if (copy_from_user(&amp;rs485conf,</div><div class='del'>-				(struct serial_rs485 *) arg,</div><div class='del'>-				sizeof(rs485conf)))</div><div class='del'>-					return -EFAULT;</div><div class='del'>-</div><div class='del'>-			/* ... */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case TIOCGRS485:</div><div class='del'>-			if (copy_to_user((struct serial_rs485 *) arg,</div><div class='del'>-				...,</div><div class='del'>-				sizeof(rs485conf)))</div><div class='del'>-					return -EFAULT;</div><div class='del'>-			/* ... */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* ... */</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+   implement the rs485_config callback in the uart_port structure. The</div><div class='add'>+   serial_core calls rs485_config to do the device specific part in response</div><div class='add'>+   to TIOCSRS485 and TIOCGRS485 ioctls (see below). The rs485_config callback</div><div class='add'>+   receives a pointer to struct serial_rs485.</div><div class='ctx'> </div><div class='ctx'> 4. USAGE FROM USER-LEVEL</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +45,7 @@</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/serial.h&gt;</div><div class='ctx'> </div><div class='del'>-	/* Driver-specific ioctls: */</div><div class='add'>+	/* RS485 ioctls: */</div><div class='ctx'> 	#define TIOCGRS485      0x542E</div><div class='ctx'> 	#define TIOCSRS485      0x542F</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/serial/tty.txt b/Documentation/serial/tty.txt<br/>index dbe6623fed1c..973c8ad3f959 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/serial/tty.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/serial/tty.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/serial/tty.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/serial/tty.txt</a></div><div class='hunk'>@@ -4,9 +4,6 @@</div><div class='ctx'> Your guide to the ancient and twisted locking policies of the tty layer and</div><div class='ctx'> the warped logic behind them. Beware all ye who read on.</div><div class='ctx'> </div><div class='del'>-FIXME: still need to work out the full set of BKL assumptions and document</div><div class='del'>-them so they can eventually be killed off.</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> Line Discipline</div><div class='ctx'> ---------------</div><div class='head'>diff --git a/Documentation/stable_kernel_rules.txt b/Documentation/stable_kernel_rules.txt<br/>index 58d0ac4df946..3049a612291b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/stable_kernel_rules.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/stable_kernel_rules.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/stable_kernel_rules.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/stable_kernel_rules.txt</a></div><div class='hunk'>@@ -59,11 +59,20 @@ For all other submissions, choose one of the following procedures:</div><div class='ctx'>    changelog of your submission, as well as the kernel version you wish</div><div class='ctx'>    it to be applied to.</div><div class='ctx'> </div><div class='del'>-Option 1 is probably the easiest and most common. Options 2 and 3 are more</div><div class='del'>-useful if the patch isn't deemed worthy at the time it is applied to a public</div><div class='del'>-git tree (for instance, because it deserves more regression testing first).</div><div class='del'>-Option 3 is especially useful if the patch needs some special handling to apply</div><div class='del'>-to an older kernel (e.g., if API's have changed in the meantime).</div><div class='add'>+Option 1 is *strongly* preferred, is the easiest and most common.  Options 2 and</div><div class='add'>+3 are more useful if the patch isn't deemed worthy at the time it is applied to</div><div class='add'>+a public git tree (for instance, because it deserves more regression testing</div><div class='add'>+first).  Option 3 is especially useful if the patch needs some special handling</div><div class='add'>+to apply to an older kernel (e.g., if API's have changed in the meantime).</div><div class='add'>+</div><div class='add'>+Note that for Option 3, if the patch deviates from the original upstream patch</div><div class='add'>+(for example because it had to be backported) this must be very clearly</div><div class='add'>+documented and justified in the patch description.</div><div class='add'>+</div><div class='add'>+The upstream commit ID must be specified with a separate line above the commit</div><div class='add'>+text, like this:</div><div class='add'>+</div><div class='add'>+    commit &lt;sha1&gt; upstream.</div><div class='ctx'> </div><div class='ctx'> Additionally, some patches submitted via Option 1 may have additional patch</div><div class='ctx'> prerequisites which can be cherry-picked. This can be specified in the following</div><div class='head'>diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt<br/>index c831001c45f1..6fccb69c03e7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sysctl/kernel.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/sysctl/kernel.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sysctl/kernel.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/sysctl/kernel.txt</a></div><div class='hunk'>@@ -197,8 +197,8 @@ core_pattern is used to specify a core dumpfile pattern name.</div><div class='ctx'> 	%P	global pid (init PID namespace)</div><div class='ctx'> 	%i	tid</div><div class='ctx'> 	%I	global tid (init PID namespace)</div><div class='del'>-	%u	uid</div><div class='del'>-	%g	gid</div><div class='add'>+	%u	uid (in initial user namespace)</div><div class='add'>+	%g	gid (in initial user namespace)</div><div class='ctx'> 	%d	dump mode, matches PR_SET_DUMPABLE and</div><div class='ctx'> 		/proc/sys/fs/suid_dumpable</div><div class='ctx'> 	%s	signal number</div><div class='hunk'>@@ -923,6 +923,27 @@ and nmi_watchdog.</div><div class='ctx'> </div><div class='ctx'> ==============================================================</div><div class='ctx'> </div><div class='add'>+watchdog_cpumask:</div><div class='add'>+</div><div class='add'>+This value can be used to control on which cpus the watchdog may run.</div><div class='add'>+The default cpumask is all possible cores, but if NO_HZ_FULL is</div><div class='add'>+enabled in the kernel config, and cores are specified with the</div><div class='add'>+nohz_full= boot argument, those cores are excluded by default.</div><div class='add'>+Offline cores can be included in this mask, and if the core is later</div><div class='add'>+brought online, the watchdog will be started based on the mask value.</div><div class='add'>+</div><div class='add'>+Typically this value would only be touched in the nohz_full case</div><div class='add'>+to re-enable cores that by default were not running the watchdog,</div><div class='add'>+if a kernel lockup was suspected on those cores.</div><div class='add'>+</div><div class='add'>+The argument value is the standard cpulist format for cpumasks,</div><div class='add'>+so for example to enable the watchdog on cores 0, 2, 3, and 4 you</div><div class='add'>+might say:</div><div class='add'>+</div><div class='add'>+  echo 0,2-4 &gt; /proc/sys/kernel/watchdog_cpumask</div><div class='add'>+</div><div class='add'>+==============================================================</div><div class='add'>+</div><div class='ctx'> watchdog_thresh:</div><div class='ctx'> </div><div class='ctx'> This value can be used to control the frequency of hrtimer and NMI</div><div class='head'>diff --git a/Documentation/target/tcm_mod_builder.py b/Documentation/target/tcm_mod_builder.py<br/>index 2ba71cea0172..949de191fcdc 100755<br/>--- a/<a href='/drm-misc/tree/Documentation/target/tcm_mod_builder.py?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/target/tcm_mod_builder.py</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/target/tcm_mod_builder.py?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcm_mod_builder.py</a></div><div class='hunk'>@@ -50,15 +50,6 @@ def tcm_mod_build_FC_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf = "#define " + fabric_mod_name.upper() + "_VERSION	\"v0.1\"\n"</div><div class='ctx'> 	buf += "#define " + fabric_mod_name.upper() + "_NAMELEN	32\n"</div><div class='ctx'> 	buf += "\n"</div><div class='del'>-	buf += "struct " + fabric_mod_name + "_nacl {\n"</div><div class='del'>-	buf += "	/* Binary World Wide unique Port Name for FC Initiator Nport */\n"</div><div class='del'>-	buf += "	u64 nport_wwpn;\n"</div><div class='del'>-	buf += "	/* ASCII formatted WWPN for FC Initiator Nport */\n"</div><div class='del'>-	buf += "	char nport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"</div><div class='del'>-	buf += "	/* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"</div><div class='del'>-	buf += "	struct se_node_acl se_node_acl;\n"</div><div class='del'>-	buf += "};\n"</div><div class='del'>-	buf += "\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_tpg {\n"</div><div class='ctx'> 	buf += "	/* FC lport target portal group tag for TCM */\n"</div><div class='ctx'> 	buf += "	u16 lport_tpgt;\n"</div><div class='hunk'>@@ -69,8 +60,6 @@ def tcm_mod_build_FC_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "};\n"</div><div class='ctx'> 	buf += "\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_lport {\n"</div><div class='del'>-	buf += "	/* SCSI protocol the lport is providing */\n"</div><div class='del'>-	buf += "	u8 lport_proto_id;\n"</div><div class='ctx'> 	buf += "	/* Binary World Wide unique Port Name for FC Target Lport */\n"</div><div class='ctx'> 	buf += "	u64 lport_wwpn;\n"</div><div class='ctx'> 	buf += "	/* ASCII formatted WWPN for FC Target Lport */\n"</div><div class='hunk'>@@ -105,14 +94,6 @@ def tcm_mod_build_SAS_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf = "#define " + fabric_mod_name.upper() + "_VERSION  \"v0.1\"\n"</div><div class='ctx'> 	buf += "#define " + fabric_mod_name.upper() + "_NAMELEN 32\n"</div><div class='ctx'> 	buf += "\n"</div><div class='del'>-	buf += "struct " + fabric_mod_name + "_nacl {\n"</div><div class='del'>-	buf += "	/* Binary World Wide unique Port Name for SAS Initiator port */\n"</div><div class='del'>-	buf += "	u64 iport_wwpn;\n"</div><div class='del'>-	buf += "	/* ASCII formatted WWPN for Sas Initiator port */\n"</div><div class='del'>-	buf += "	char iport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"</div><div class='del'>-	buf += "	/* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"</div><div class='del'>-	buf += "	struct se_node_acl se_node_acl;\n"</div><div class='del'>-	buf += "};\n\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_tpg {\n"</div><div class='ctx'> 	buf += "	/* SAS port target portal group tag for TCM */\n"</div><div class='ctx'> 	buf += "	u16 tport_tpgt;\n"</div><div class='hunk'>@@ -122,8 +103,6 @@ def tcm_mod_build_SAS_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "	struct se_portal_group se_tpg;\n"</div><div class='ctx'> 	buf += "};\n\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_tport {\n"</div><div class='del'>-	buf += "	/* SCSI protocol the tport is providing */\n"</div><div class='del'>-	buf += "	u8 tport_proto_id;\n"</div><div class='ctx'> 	buf += "	/* Binary World Wide unique Port Name for SAS Target port */\n"</div><div class='ctx'> 	buf += "	u64 tport_wwpn;\n"</div><div class='ctx'> 	buf += "	/* ASCII formatted WWPN for SAS Target port */\n"</div><div class='hunk'>@@ -158,12 +137,6 @@ def tcm_mod_build_iSCSI_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf = "#define " + fabric_mod_name.upper() + "_VERSION  \"v0.1\"\n"</div><div class='ctx'> 	buf += "#define " + fabric_mod_name.upper() + "_NAMELEN 32\n"</div><div class='ctx'> 	buf += "\n"</div><div class='del'>-	buf += "struct " + fabric_mod_name + "_nacl {\n"</div><div class='del'>-	buf += "	/* ASCII formatted InitiatorName */\n"</div><div class='del'>-	buf += "	char iport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"</div><div class='del'>-	buf += "	/* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"</div><div class='del'>-	buf += "	struct se_node_acl se_node_acl;\n"</div><div class='del'>-	buf += "};\n\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_tpg {\n"</div><div class='ctx'> 	buf += "	/* iSCSI target portal group tag for TCM */\n"</div><div class='ctx'> 	buf += "	u16 tport_tpgt;\n"</div><div class='hunk'>@@ -173,8 +146,6 @@ def tcm_mod_build_iSCSI_include(fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "	struct se_portal_group se_tpg;\n"</div><div class='ctx'> 	buf += "};\n\n"</div><div class='ctx'> 	buf += "struct " + fabric_mod_name + "_tport {\n"</div><div class='del'>-	buf += "	/* SCSI protocol the tport is providing */\n"</div><div class='del'>-	buf += "	u8 tport_proto_id;\n"</div><div class='ctx'> 	buf += "	/* ASCII formatted TargetName for IQN */\n"</div><div class='ctx'> 	buf += "	char tport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"</div><div class='ctx'> 	buf += "	/* Returned by " + fabric_mod_name + "_make_tport() */\n"</div><div class='hunk'>@@ -232,61 +203,12 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "#include &lt;target/target_core_base.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;target/target_core_fabric.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;target/target_core_fabric_configfs.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;target/target_core_configfs.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;target/configfs_macros.h&gt;\n\n"</div><div class='ctx'> 	buf += "#include \"" + fabric_mod_name + "_base.h\"\n"</div><div class='ctx'> 	buf += "#include \"" + fabric_mod_name + "_fabric.h\"\n\n"</div><div class='ctx'> </div><div class='ctx'> 	buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops;\n\n"</div><div class='ctx'> </div><div class='del'>-	buf += "static struct se_node_acl *" + fabric_mod_name + "_make_nodeacl(\n"</div><div class='del'>-	buf += "	struct se_portal_group *se_tpg,\n"</div><div class='del'>-	buf += "	struct config_group *group,\n"</div><div class='del'>-	buf += "	const char *name)\n"</div><div class='del'>-	buf += "{\n"</div><div class='del'>-	buf += "	struct se_node_acl *se_nacl, *se_nacl_new;\n"</div><div class='del'>-	buf += "	struct " + fabric_mod_name + "_nacl *nacl;\n"</div><div class='del'>-</div><div class='del'>-	if proto_ident == "FC" or proto_ident == "SAS":</div><div class='del'>-		buf += "	u64 wwpn = 0;\n"</div><div class='del'>-</div><div class='del'>-	buf += "	u32 nexus_depth;\n\n"</div><div class='del'>-	buf += "	/* " + fabric_mod_name + "_parse_wwn(name, &amp;wwpn, 1) &lt; 0)\n"</div><div class='del'>-	buf += "		return ERR_PTR(-EINVAL); */\n"</div><div class='del'>-	buf += "	se_nacl_new = " + fabric_mod_name + "_alloc_fabric_acl(se_tpg);\n"</div><div class='del'>-	buf += "	if (!se_nacl_new)\n"</div><div class='del'>-	buf += "		return ERR_PTR(-ENOMEM);\n"</div><div class='del'>-	buf += "//#warning FIXME: Hardcoded nexus depth in " + fabric_mod_name + "_make_nodeacl()\n"</div><div class='del'>-	buf += "	nexus_depth = 1;\n"</div><div class='del'>-	buf += "	/*\n"</div><div class='del'>-	buf += "	 * se_nacl_new may be released by core_tpg_add_initiator_node_acl()\n"</div><div class='del'>-	buf += "	 * when converting a NodeACL from demo mode -&gt; explict\n"</div><div class='del'>-	buf += "	 */\n"</div><div class='del'>-	buf += "	se_nacl = core_tpg_add_initiator_node_acl(se_tpg, se_nacl_new,\n"</div><div class='del'>-	buf += "				name, nexus_depth);\n"</div><div class='del'>-	buf += "	if (IS_ERR(se_nacl)) {\n"</div><div class='del'>-	buf += "		" + fabric_mod_name + "_release_fabric_acl(se_tpg, se_nacl_new);\n"</div><div class='del'>-	buf += "		return se_nacl;\n"</div><div class='del'>-	buf += "	}\n"</div><div class='del'>-	buf += "	/*\n"</div><div class='del'>-	buf += "	 * Locate our struct " + fabric_mod_name + "_nacl and set the FC Nport WWPN\n"</div><div class='del'>-	buf += "	 */\n"</div><div class='del'>-	buf += "	nacl = container_of(se_nacl, struct " + fabric_mod_name + "_nacl, se_node_acl);\n"</div><div class='del'>-</div><div class='del'>-	if proto_ident == "FC" or proto_ident == "SAS":</div><div class='del'>-		buf += "	nacl-&gt;" + fabric_mod_init_port + "_wwpn = wwpn;\n"</div><div class='del'>-</div><div class='del'>-	buf += "	/* " + fabric_mod_name + "_format_wwn(&amp;nacl-&gt;" + fabric_mod_init_port + "_name[0], " + fabric_mod_name.upper() + "_NAMELEN, wwpn); */\n\n"</div><div class='del'>-	buf += "	return se_nacl;\n"</div><div class='del'>-	buf += "}\n\n"</div><div class='del'>-	buf += "static void " + fabric_mod_name + "_drop_nodeacl(struct se_node_acl *se_acl)\n"</div><div class='del'>-	buf += "{\n"</div><div class='del'>-	buf += "	struct " + fabric_mod_name + "_nacl *nacl = container_of(se_acl,\n"</div><div class='del'>-	buf += "				struct " + fabric_mod_name + "_nacl, se_node_acl);\n"</div><div class='del'>-	buf += "	core_tpg_del_initiator_node_acl(se_acl-&gt;se_tpg, se_acl, 1);\n"</div><div class='del'>-	buf += "	kfree(nacl);\n"</div><div class='del'>-	buf += "}\n\n"</div><div class='del'>-</div><div class='ctx'> 	buf += "static struct se_portal_group *" + fabric_mod_name + "_make_tpg(\n"</div><div class='ctx'> 	buf += "	struct se_wwn *wwn,\n"</div><div class='ctx'> 	buf += "	struct config_group *group,\n"</div><div class='hunk'>@@ -309,8 +231,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "	tpg-&gt;" + fabric_mod_port + " = " + fabric_mod_port + ";\n"</div><div class='ctx'> 	buf += "	tpg-&gt;" + fabric_mod_port + "_tpgt = tpgt;\n\n"</div><div class='ctx'> 	buf += "	ret = core_tpg_register(&amp;" + fabric_mod_name + "_ops, wwn,\n"</div><div class='del'>-	buf += "				&amp;tpg-&gt;se_tpg, tpg,\n"</div><div class='del'>-	buf += "				TRANSPORT_TPG_TYPE_NORMAL);\n"</div><div class='add'>+	buf += "				&amp;tpg-&gt;se_tpg, SCSI_PROTOCOL_SAS);\n"</div><div class='ctx'> 	buf += "	if (ret &lt; 0) {\n"</div><div class='ctx'> 	buf += "		kfree(tpg);\n"</div><div class='ctx'> 	buf += "		return NULL;\n"</div><div class='hunk'>@@ -372,21 +293,13 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"</div><div class='ctx'> 	buf += "	.module				= THIS_MODULE,\n"</div><div class='ctx'> 	buf += "	.name				= " + fabric_mod_name + ",\n"</div><div class='del'>-	buf += "	.get_fabric_proto_ident		= " + fabric_mod_name + "_get_fabric_proto_ident,\n"</div><div class='ctx'> 	buf += "	.get_fabric_name		= " + fabric_mod_name + "_get_fabric_name,\n"</div><div class='del'>-	buf += "	.get_fabric_proto_ident		= " + fabric_mod_name + "_get_fabric_proto_ident,\n"</div><div class='ctx'> 	buf += "	.tpg_get_wwn			= " + fabric_mod_name + "_get_fabric_wwn,\n"</div><div class='ctx'> 	buf += "	.tpg_get_tag			= " + fabric_mod_name + "_get_tag,\n"</div><div class='del'>-	buf += "	.tpg_get_default_depth		= " + fabric_mod_name + "_get_default_depth,\n"</div><div class='del'>-	buf += "	.tpg_get_pr_transport_id	= " + fabric_mod_name + "_get_pr_transport_id,\n"</div><div class='del'>-	buf += "	.tpg_get_pr_transport_id_len	= " + fabric_mod_name + "_get_pr_transport_id_len,\n"</div><div class='del'>-	buf += "	.tpg_parse_pr_out_transport_id	= " + fabric_mod_name + "_parse_pr_out_transport_id,\n"</div><div class='ctx'> 	buf += "	.tpg_check_demo_mode		= " + fabric_mod_name + "_check_false,\n"</div><div class='ctx'> 	buf += "	.tpg_check_demo_mode_cache	= " + fabric_mod_name + "_check_true,\n"</div><div class='ctx'> 	buf += "	.tpg_check_demo_mode_write_protect = " + fabric_mod_name + "_check_true,\n"</div><div class='ctx'> 	buf += "	.tpg_check_prod_mode_write_protect = " + fabric_mod_name + "_check_false,\n"</div><div class='del'>-	buf += "	.tpg_alloc_fabric_acl		= " + fabric_mod_name + "_alloc_fabric_acl,\n"</div><div class='del'>-	buf += "	.tpg_release_fabric_acl		= " + fabric_mod_name + "_release_fabric_acl,\n"</div><div class='ctx'> 	buf += "	.tpg_get_inst_index		= " + fabric_mod_name + "_tpg_get_inst_index,\n"</div><div class='ctx'> 	buf += "	.release_cmd			= " + fabric_mod_name + "_release_cmd,\n"</div><div class='ctx'> 	buf += "	.shutdown_session		= " + fabric_mod_name + "_shutdown_session,\n"</div><div class='hunk'>@@ -396,7 +309,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "	.write_pending			= " + fabric_mod_name + "_write_pending,\n"</div><div class='ctx'> 	buf += "	.write_pending_status		= " + fabric_mod_name + "_write_pending_status,\n"</div><div class='ctx'> 	buf += "	.set_default_node_attributes	= " + fabric_mod_name + "_set_default_node_attrs,\n"</div><div class='del'>-	buf += "	.get_task_tag			= " + fabric_mod_name + "_get_task_tag,\n"</div><div class='ctx'> 	buf += "	.get_cmd_state			= " + fabric_mod_name + "_get_cmd_state,\n"</div><div class='ctx'> 	buf += "	.queue_data_in			= " + fabric_mod_name + "_queue_data_in,\n"</div><div class='ctx'> 	buf += "	.queue_status			= " + fabric_mod_name + "_queue_status,\n"</div><div class='hunk'>@@ -409,12 +321,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "	.fabric_drop_wwn		= " + fabric_mod_name + "_drop_" + fabric_mod_port + ",\n"</div><div class='ctx'> 	buf += "	.fabric_make_tpg		= " + fabric_mod_name + "_make_tpg,\n"</div><div class='ctx'> 	buf += "	.fabric_drop_tpg		= " + fabric_mod_name + "_drop_tpg,\n"</div><div class='del'>-	buf += "	.fabric_post_link		= NULL,\n"</div><div class='del'>-	buf += "	.fabric_pre_unlink		= NULL,\n"</div><div class='del'>-	buf += "	.fabric_make_np			= NULL,\n"</div><div class='del'>-	buf += "	.fabric_drop_np			= NULL,\n"</div><div class='del'>-	buf += "	.fabric_make_nodeacl		= " + fabric_mod_name + "_make_nodeacl,\n"</div><div class='del'>-	buf += "	.fabric_drop_nodeacl		= " + fabric_mod_name + "_drop_nodeacl,\n"</div><div class='ctx'> 	buf += "\n"</div><div class='ctx'> 	buf += "	.tfc_wwn_attrs			= " + fabric_mod_name + "_wwn_attrs;\n"</div><div class='ctx'> 	buf += "};\n\n"</div><div class='hunk'>@@ -503,14 +409,10 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 	buf += "#include &lt;linux/string.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;linux/ctype.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;asm/unaligned.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;scsi/scsi.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;scsi/scsi_host.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;scsi/scsi_device.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;scsi/scsi_cmnd.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;scsi/libfc.h&gt;\n\n"</div><div class='add'>+	buf += "#include &lt;scsi/scsi_common.h&gt;\n"</div><div class='add'>+	buf += "#include &lt;scsi/scsi_proto.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;target/target_core_base.h&gt;\n"</div><div class='ctx'> 	buf += "#include &lt;target/target_core_fabric.h&gt;\n"</div><div class='del'>-	buf += "#include &lt;target/target_core_configfs.h&gt;\n\n"</div><div class='ctx'> 	buf += "#include \"" + fabric_mod_name + "_base.h\"\n"</div><div class='ctx'> 	buf += "#include \"" + fabric_mod_name + "_fabric.h\"\n\n"</div><div class='ctx'> </div><div class='hunk'>@@ -542,35 +444,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 			bufi += "char *" + fabric_mod_name + "_get_fabric_name(void);\n"</div><div class='ctx'> 			continue</div><div class='ctx'> </div><div class='del'>-		if re.search('get_fabric_proto_ident', fo):</div><div class='del'>-			buf += "u8 " + fabric_mod_name + "_get_fabric_proto_ident(struct se_portal_group *se_tpg)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"</div><div class='del'>-			buf += "				struct " + fabric_mod_name + "_tpg, se_tpg);\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg-&gt;" + fabric_mod_port + ";\n"</div><div class='del'>-			buf += "	u8 proto_id;\n\n"</div><div class='del'>-			buf += "	switch (" + fabric_mod_port + "-&gt;" + fabric_mod_port + "_proto_id) {\n"</div><div class='del'>-			if proto_ident == "FC":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_FCP:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		proto_id = fc_get_fabric_proto_ident(se_tpg);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "SAS":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_SAS:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		proto_id = sas_get_fabric_proto_ident(se_tpg);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "iSCSI":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_ISCSI:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		proto_id = iscsi_get_fabric_proto_ident(se_tpg);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-</div><div class='del'>-			buf += "	}\n\n"</div><div class='del'>-			buf += "	return proto_id;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "u8 " + fabric_mod_name + "_get_fabric_proto_ident(struct se_portal_group *);\n"</div><div class='del'>-</div><div class='ctx'> 		if re.search('get_wwn', fo):</div><div class='ctx'> 			buf += "char *" + fabric_mod_name + "_get_fabric_wwn(struct se_portal_group *se_tpg)\n"</div><div class='ctx'> 			buf += "{\n"</div><div class='hunk'>@@ -590,150 +463,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 			buf += "}\n\n"</div><div class='ctx'> 			bufi += "u16 " + fabric_mod_name + "_get_tag(struct se_portal_group *);\n"</div><div class='ctx'> </div><div class='del'>-		if re.search('get_default_depth', fo):</div><div class='del'>-			buf += "u32 " + fabric_mod_name + "_get_default_depth(struct se_portal_group *se_tpg)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	return 1;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "u32 " + fabric_mod_name + "_get_default_depth(struct se_portal_group *);\n"</div><div class='del'>-</div><div class='del'>-		if re.search('get_pr_transport_id\)\(', fo):</div><div class='del'>-			buf += "u32 " + fabric_mod_name + "_get_pr_transport_id(\n"</div><div class='del'>-			buf += "	struct se_portal_group *se_tpg,\n"</div><div class='del'>-			buf += "	struct se_node_acl *se_nacl,\n"</div><div class='del'>-			buf += "	struct t10_pr_registration *pr_reg,\n"</div><div class='del'>-			buf += "	int *format_code,\n"</div><div class='del'>-			buf += "	unsigned char *buf)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"</div><div class='del'>-			buf += "				struct " + fabric_mod_name + "_tpg, se_tpg);\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg-&gt;" + fabric_mod_port + ";\n"</div><div class='del'>-			buf += "	int ret = 0;\n\n"</div><div class='del'>-			buf += "	switch (" + fabric_mod_port + "-&gt;" + fabric_mod_port + "_proto_id) {\n"</div><div class='del'>-			if proto_ident == "FC":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_FCP:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = fc_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code, buf);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "SAS":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_SAS:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = sas_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code, buf);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "iSCSI":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_ISCSI:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = iscsi_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code, buf);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-</div><div class='del'>-			buf += "	}\n\n"</div><div class='del'>-			buf += "	return ret;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "u32 " + fabric_mod_name + "_get_pr_transport_id(struct se_portal_group *,\n"</div><div class='del'>-			bufi += "			struct se_node_acl *, struct t10_pr_registration *,\n"</div><div class='del'>-			bufi += "			int *, unsigned char *);\n"</div><div class='del'>-</div><div class='del'>-		if re.search('get_pr_transport_id_len\)\(', fo):</div><div class='del'>-			buf += "u32 " + fabric_mod_name + "_get_pr_transport_id_len(\n"</div><div class='del'>-			buf += "	struct se_portal_group *se_tpg,\n"</div><div class='del'>-			buf += "	struct se_node_acl *se_nacl,\n"</div><div class='del'>-			buf += "	struct t10_pr_registration *pr_reg,\n"</div><div class='del'>-			buf += "	int *format_code)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"</div><div class='del'>-			buf += "				struct " + fabric_mod_name + "_tpg, se_tpg);\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg-&gt;" + fabric_mod_port + ";\n"</div><div class='del'>-			buf += "	int ret = 0;\n\n"</div><div class='del'>-			buf += "	switch (" + fabric_mod_port + "-&gt;" + fabric_mod_port + "_proto_id) {\n"</div><div class='del'>-			if proto_ident == "FC":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_FCP:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = fc_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "SAS":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_SAS:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = sas_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-			elif proto_ident == "iSCSI":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_ISCSI:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		ret = iscsi_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"</div><div class='del'>-				buf += "					format_code);\n"</div><div class='del'>-				buf += "		break;\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-			buf += "	}\n\n"</div><div class='del'>-			buf += "	return ret;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "u32 " + fabric_mod_name + "_get_pr_transport_id_len(struct se_portal_group *,\n"</div><div class='del'>-			bufi += "			struct se_node_acl *, struct t10_pr_registration *,\n"</div><div class='del'>-			bufi += "			int *);\n"</div><div class='del'>-</div><div class='del'>-		if re.search('parse_pr_out_transport_id\)\(', fo):</div><div class='del'>-			buf += "char *" + fabric_mod_name + "_parse_pr_out_transport_id(\n"</div><div class='del'>-			buf += "	struct se_portal_group *se_tpg,\n"</div><div class='del'>-			buf += "	const char *buf,\n"</div><div class='del'>-			buf += "	u32 *out_tid_len,\n"</div><div class='del'>-			buf += "	char **port_nexus_ptr)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"</div><div class='del'>-			buf += "				struct " + fabric_mod_name + "_tpg, se_tpg);\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg-&gt;" + fabric_mod_port + ";\n"</div><div class='del'>-			buf += "	char *tid = NULL;\n\n"</div><div class='del'>-			buf += "	switch (" + fabric_mod_port + "-&gt;" + fabric_mod_port + "_proto_id) {\n"</div><div class='del'>-			if proto_ident == "FC":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_FCP:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		tid = fc_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"</div><div class='del'>-				buf += "					port_nexus_ptr);\n"</div><div class='del'>-			elif proto_ident == "SAS":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_SAS:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		tid = sas_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"</div><div class='del'>-				buf += "					port_nexus_ptr);\n"</div><div class='del'>-			elif proto_ident == "iSCSI":</div><div class='del'>-				buf += "	case SCSI_PROTOCOL_ISCSI:\n"</div><div class='del'>-				buf += "	default:\n"</div><div class='del'>-				buf += "		tid = iscsi_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"</div><div class='del'>-				buf += "					port_nexus_ptr);\n"</div><div class='del'>-</div><div class='del'>-			buf += "	}\n\n"</div><div class='del'>-			buf += "	return tid;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "char *" + fabric_mod_name + "_parse_pr_out_transport_id(struct se_portal_group *,\n"</div><div class='del'>-			bufi +=	"			const char *, u32 *, char **);\n"</div><div class='del'>-</div><div class='del'>-		if re.search('alloc_fabric_acl\)\(', fo):</div><div class='del'>-			buf += "struct se_node_acl *" + fabric_mod_name + "_alloc_fabric_acl(struct se_portal_group *se_tpg)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_nacl *nacl;\n\n"</div><div class='del'>-			buf += "	nacl = kzalloc(sizeof(struct " + fabric_mod_name + "_nacl), GFP_KERNEL);\n"</div><div class='del'>-			buf += "	if (!nacl) {\n"</div><div class='del'>-			buf += "		printk(KERN_ERR \"Unable to allocate struct " + fabric_mod_name + "_nacl\\n\");\n"</div><div class='del'>-			buf += "		return NULL;\n"</div><div class='del'>-			buf += "	}\n\n"</div><div class='del'>-			buf += "	return &amp;nacl-&gt;se_node_acl;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "struct se_node_acl *" + fabric_mod_name + "_alloc_fabric_acl(struct se_portal_group *);\n"</div><div class='del'>-</div><div class='del'>-		if re.search('release_fabric_acl\)\(', fo):</div><div class='del'>-			buf += "void " + fabric_mod_name + "_release_fabric_acl(\n"</div><div class='del'>-			buf += "	struct se_portal_group *se_tpg,\n"</div><div class='del'>-			buf += "	struct se_node_acl *se_nacl)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	struct " + fabric_mod_name + "_nacl *nacl = container_of(se_nacl,\n"</div><div class='del'>-			buf += "			struct " + fabric_mod_name + "_nacl, se_node_acl);\n"</div><div class='del'>-			buf += "	kfree(nacl);\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "void " + fabric_mod_name + "_release_fabric_acl(struct se_portal_group *,\n"</div><div class='del'>-			bufi +=	"			struct se_node_acl *);\n"</div><div class='del'>-</div><div class='ctx'> 		if re.search('tpg_get_inst_index\)\(', fo):</div><div class='ctx'> 			buf += "u32 " + fabric_mod_name + "_tpg_get_inst_index(struct se_portal_group *se_tpg)\n"</div><div class='ctx'> 			buf += "{\n"</div><div class='hunk'>@@ -790,13 +519,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):</div><div class='ctx'> 			buf += "}\n\n"</div><div class='ctx'> 			bufi += "void " + fabric_mod_name + "_set_default_node_attrs(struct se_node_acl *);\n"</div><div class='ctx'> </div><div class='del'>-		if re.search('get_task_tag\)\(', fo):</div><div class='del'>-			buf += "u32 " + fabric_mod_name + "_get_task_tag(struct se_cmd *se_cmd)\n"</div><div class='del'>-			buf += "{\n"</div><div class='del'>-			buf += "	return 0;\n"</div><div class='del'>-			buf += "}\n\n"</div><div class='del'>-			bufi += "u32 " + fabric_mod_name + "_get_task_tag(struct se_cmd *);\n"</div><div class='del'>-</div><div class='ctx'> 		if re.search('get_cmd_state\)\(', fo):</div><div class='ctx'> 			buf += "int " + fabric_mod_name + "_get_cmd_state(struct se_cmd *se_cmd)\n"</div><div class='ctx'> 			buf += "{\n"</div><div class='head'>diff --git a/Documentation/target/tcm_mod_builder.txt b/Documentation/target/tcm_mod_builder.txt<br/>index 84533d8e747f..ae22f7005540 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/target/tcm_mod_builder.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/target/tcm_mod_builder.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/target/tcm_mod_builder.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcm_mod_builder.txt</a></div><div class='hunk'>@@ -13,8 +13,8 @@ fabric skeleton, by simply using:</div><div class='ctx'> This script will create a new drivers/target/$TCM_NEW_MOD/, and will do the following</div><div class='ctx'> </div><div class='ctx'> 	*) Generate new API callers for drivers/target/target_core_fabric_configs.c logic</div><div class='del'>-	   -&gt;make_nodeacl(), -&gt;drop_nodeacl(), -&gt;make_tpg(), -&gt;drop_tpg()</div><div class='del'>-	   -&gt;make_wwn(), -&gt;drop_wwn().  These are created into $TCM_NEW_MOD/$TCM_NEW_MOD_configfs.c</div><div class='add'>+	   -&gt;make_tpg(), -&gt;drop_tpg(), -&gt;make_wwn(), -&gt;drop_wwn().  These are created</div><div class='add'>+	   into $TCM_NEW_MOD/$TCM_NEW_MOD_configfs.c</div><div class='ctx'> 	*) Generate basic infrastructure for loading/unloading LKMs and TCM/ConfigFS fabric module</div><div class='ctx'> 	   using a skeleton struct target_core_fabric_ops API template.</div><div class='ctx'> 	*) Based on user defined T10 Proto_Ident for the new fabric module being built,</div><div class='head'>diff --git a/Documentation/target/tcmu-design.txt b/Documentation/target/tcmu-design.txt<br/>index 263b907517ac..bef81e42788f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/target/tcmu-design.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/target/tcmu-design.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/target/tcmu-design.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/target/tcmu-design.txt</a></div><div class='hunk'>@@ -152,7 +152,7 @@ overall shared memory region, not the entry. The data in/out buffers</div><div class='ctx'> are accessible via tht req.iov[] array. iov_cnt contains the number of</div><div class='ctx'> entries in iov[] needed to describe either the Data-In or Data-Out</div><div class='ctx'> buffers. For bidirectional commands, iov_cnt specifies how many iovec</div><div class='del'>-entries cover the Data-Out area, and iov_bidi_count specifies how many</div><div class='add'>+entries cover the Data-Out area, and iov_bidi_cnt specifies how many</div><div class='ctx'> iovec entries immediately after that in iov[] cover the Data-In</div><div class='ctx'> area. Just like other fields, iov.iov_base is an offset from the start</div><div class='ctx'> of the region.</div><div class='head'>diff --git a/Documentation/thermal/cpu-cooling-api.txt b/Documentation/thermal/cpu-cooling-api.txt<br/>index 753e47cc2e20..71653584cd03 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/thermal/cpu-cooling-api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/thermal/cpu-cooling-api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/thermal/cpu-cooling-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/cpu-cooling-api.txt</a></div><div class='hunk'>@@ -36,8 +36,162 @@ the user. The registration APIs returns the cooling device pointer.</div><div class='ctx'>     np: pointer to the cooling device device tree node</div><div class='ctx'>     clip_cpus: cpumask of cpus where the frequency constraints will happen.</div><div class='ctx'> </div><div class='del'>-1.1.3 void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)</div><div class='add'>+1.1.3 struct thermal_cooling_device *cpufreq_power_cooling_register(</div><div class='add'>+    const struct cpumask *clip_cpus, u32 capacitance,</div><div class='add'>+    get_static_t plat_static_func)</div><div class='add'>+</div><div class='add'>+Similar to cpufreq_cooling_register, this function registers a cpufreq</div><div class='add'>+cooling device.  Using this function, the cooling device will</div><div class='add'>+implement the power extensions by using a simple cpu power model.  The</div><div class='add'>+cpus must have registered their OPPs using the OPP library.</div><div class='add'>+</div><div class='add'>+The additional parameters are needed for the power model (See 2. Power</div><div class='add'>+models).  "capacitance" is the dynamic power coefficient (See 2.1</div><div class='add'>+Dynamic power).  "plat_static_func" is a function to calculate the</div><div class='add'>+static power consumed by these cpus (See 2.2 Static power).</div><div class='add'>+</div><div class='add'>+1.1.4 struct thermal_cooling_device *of_cpufreq_power_cooling_register(</div><div class='add'>+    struct device_node *np, const struct cpumask *clip_cpus, u32 capacitance,</div><div class='add'>+    get_static_t plat_static_func)</div><div class='add'>+</div><div class='add'>+Similar to cpufreq_power_cooling_register, this function register a</div><div class='add'>+cpufreq cooling device with power extensions using the device tree</div><div class='add'>+information supplied by the np parameter.</div><div class='add'>+</div><div class='add'>+1.1.5 void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)</div><div class='ctx'> </div><div class='ctx'>     This interface function unregisters the "thermal-cpufreq-%x" cooling device.</div><div class='ctx'> </div><div class='ctx'>     cdev: Cooling device pointer which has to be unregistered.</div><div class='add'>+</div><div class='add'>+2. Power models</div><div class='add'>+</div><div class='add'>+The power API registration functions provide a simple power model for</div><div class='add'>+CPUs.  The current power is calculated as dynamic + (optionally)</div><div class='add'>+static power.  This power model requires that the operating-points of</div><div class='add'>+the CPUs are registered using the kernel's opp library and the</div><div class='add'>+`cpufreq_frequency_table` is assigned to the `struct device` of the</div><div class='add'>+cpu.  If you are using CONFIG_CPUFREQ_DT then the</div><div class='add'>+`cpufreq_frequency_table` should already be assigned to the cpu</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+The `plat_static_func` parameter of `cpufreq_power_cooling_register()`</div><div class='add'>+and `of_cpufreq_power_cooling_register()` is optional.  If you don't</div><div class='add'>+provide it, only dynamic power will be considered.</div><div class='add'>+</div><div class='add'>+2.1 Dynamic power</div><div class='add'>+</div><div class='add'>+The dynamic power consumption of a processor depends on many factors.</div><div class='add'>+For a given processor implementation the primary factors are:</div><div class='add'>+</div><div class='add'>+- The time the processor spends running, consuming dynamic power, as</div><div class='add'>+  compared to the time in idle states where dynamic consumption is</div><div class='add'>+  negligible.  Herein we refer to this as 'utilisation'.</div><div class='add'>+- The voltage and frequency levels as a result of DVFS.  The DVFS</div><div class='add'>+  level is a dominant factor governing power consumption.</div><div class='add'>+- In running time the 'execution' behaviour (instruction types, memory</div><div class='add'>+  access patterns and so forth) causes, in most cases, a second order</div><div class='add'>+  variation.  In pathological cases this variation can be significant,</div><div class='add'>+  but typically it is of a much lesser impact than the factors above.</div><div class='add'>+</div><div class='add'>+A high level dynamic power consumption model may then be represented as:</div><div class='add'>+</div><div class='add'>+Pdyn = f(run) * Voltage^2 * Frequency * Utilisation</div><div class='add'>+</div><div class='add'>+f(run) here represents the described execution behaviour and its</div><div class='add'>+result has a units of Watts/Hz/Volt^2 (this often expressed in</div><div class='add'>+mW/MHz/uVolt^2)</div><div class='add'>+</div><div class='add'>+The detailed behaviour for f(run) could be modelled on-line.  However,</div><div class='add'>+in practice, such an on-line model has dependencies on a number of</div><div class='add'>+implementation specific processor support and characterisation</div><div class='add'>+factors.  Therefore, in initial implementation that contribution is</div><div class='add'>+represented as a constant coefficient.  This is a simplification</div><div class='add'>+consistent with the relative contribution to overall power variation.</div><div class='add'>+</div><div class='add'>+In this simplified representation our model becomes:</div><div class='add'>+</div><div class='add'>+Pdyn = Capacitance * Voltage^2 * Frequency * Utilisation</div><div class='add'>+</div><div class='add'>+Where `capacitance` is a constant that represents an indicative</div><div class='add'>+running time dynamic power coefficient in fundamental units of</div><div class='add'>+mW/MHz/uVolt^2.  Typical values for mobile CPUs might lie in range</div><div class='add'>+from 100 to 500.  For reference, the approximate values for the SoC in</div><div class='add'>+ARM's Juno Development Platform are 530 for the Cortex-A57 cluster and</div><div class='add'>+140 for the Cortex-A53 cluster.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+2.2 Static power</div><div class='add'>+</div><div class='add'>+Static leakage power consumption depends on a number of factors.  For a</div><div class='add'>+given circuit implementation the primary factors are:</div><div class='add'>+</div><div class='add'>+- Time the circuit spends in each 'power state'</div><div class='add'>+- Temperature</div><div class='add'>+- Operating voltage</div><div class='add'>+- Process grade</div><div class='add'>+</div><div class='add'>+The time the circuit spends in each 'power state' for a given</div><div class='add'>+evaluation period at first order means OFF or ON.  However,</div><div class='add'>+'retention' states can also be supported that reduce power during</div><div class='add'>+inactive periods without loss of context.</div><div class='add'>+</div><div class='add'>+Note: The visibility of state entries to the OS can vary, according to</div><div class='add'>+platform specifics, and this can then impact the accuracy of a model</div><div class='add'>+based on OS state information alone.  It might be possible in some</div><div class='add'>+cases to extract more accurate information from system resources.</div><div class='add'>+</div><div class='add'>+The temperature, operating voltage and process 'grade' (slow to fast)</div><div class='add'>+of the circuit are all significant factors in static leakage power</div><div class='add'>+consumption.  All of these have complex relationships to static power.</div><div class='add'>+</div><div class='add'>+Circuit implementation specific factors include the chosen silicon</div><div class='add'>+process as well as the type, number and size of transistors in both</div><div class='add'>+the logic gates and any RAM elements included.</div><div class='add'>+</div><div class='add'>+The static power consumption modelling must take into account the</div><div class='add'>+power managed regions that are implemented.  Taking the example of an</div><div class='add'>+ARM processor cluster, the modelling would take into account whether</div><div class='add'>+each CPU can be powered OFF separately or if only a single power</div><div class='add'>+region is implemented for the complete cluster.</div><div class='add'>+</div><div class='add'>+In one view, there are others, a static power consumption model can</div><div class='add'>+then start from a set of reference values for each power managed</div><div class='add'>+region (e.g. CPU, Cluster/L2) in each state (e.g. ON, OFF) at an</div><div class='add'>+arbitrary process grade, voltage and temperature point.  These values</div><div class='add'>+are then scaled for all of the following: the time in each state, the</div><div class='add'>+process grade, the current temperature and the operating voltage.</div><div class='add'>+However, since both implementation specific and complex relationships</div><div class='add'>+dominate the estimate, the appropriate interface to the model from the</div><div class='add'>+cpu cooling device is to provide a function callback that calculates</div><div class='add'>+the static power in this platform.  When registering the cpu cooling</div><div class='add'>+device pass a function pointer that follows the `get_static_t`</div><div class='add'>+prototype:</div><div class='add'>+</div><div class='add'>+    int plat_get_static(cpumask_t *cpumask, int interval,</div><div class='add'>+                        unsigned long voltage, u32 &amp;power);</div><div class='add'>+</div><div class='add'>+`cpumask` is the cpumask of the cpus involved in the calculation.</div><div class='add'>+`voltage` is the voltage at which they are operating.  The function</div><div class='add'>+should calculate the average static power for the last `interval`</div><div class='add'>+milliseconds.  It returns 0 on success, -E* on error.  If it</div><div class='add'>+succeeds, it should store the static power in `power`.  Reading the</div><div class='add'>+temperature of the cpus described by `cpumask` is left for</div><div class='add'>+plat_get_static() to do as the platform knows best which thermal</div><div class='add'>+sensor is closest to the cpu.</div><div class='add'>+</div><div class='add'>+If `plat_static_func` is NULL, static power is considered to be</div><div class='add'>+negligible for this platform and only dynamic power is considered.</div><div class='add'>+</div><div class='add'>+The platform specific callback can then use any combination of tables</div><div class='add'>+and/or equations to permute the estimated value.  Process grade</div><div class='add'>+information is not passed to the model since access to such data, from</div><div class='add'>+on-chip measurement capability or manufacture time data, is platform</div><div class='add'>+specific.</div><div class='add'>+</div><div class='add'>+Note: the significance of static power for CPUs in comparison to</div><div class='add'>+dynamic power is highly dependent on implementation.  Given the</div><div class='add'>+potential complexity in implementation, the importance and accuracy of</div><div class='add'>+its inclusion when using cpu cooling devices should be assessed on a</div><div class='add'>+case by case basis.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/thermal/power_allocator.txt b/Documentation/thermal/power_allocator.txt<br/>new file mode 100644<br/>index 000000000000..c3797b529991<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/thermal/power_allocator.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/power_allocator.txt</a></div><div class='hunk'>@@ -0,0 +1,247 @@</div><div class='add'>+Power allocator governor tunables</div><div class='add'>+=================================</div><div class='add'>+</div><div class='add'>+Trip points</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The governor requires the following two passive trip points:</div><div class='add'>+</div><div class='add'>+1.  "switch on" trip point: temperature above which the governor</div><div class='add'>+    control loop starts operating.  This is the first passive trip</div><div class='add'>+    point of the thermal zone.</div><div class='add'>+</div><div class='add'>+2.  "desired temperature" trip point: it should be higher than the</div><div class='add'>+    "switch on" trip point.  This the target temperature the governor</div><div class='add'>+    is controlling for.  This is the last passive trip point of the</div><div class='add'>+    thermal zone.</div><div class='add'>+</div><div class='add'>+PID Controller</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The power allocator governor implements a</div><div class='add'>+Proportional-Integral-Derivative controller (PID controller) with</div><div class='add'>+temperature as the control input and power as the controlled output:</div><div class='add'>+</div><div class='add'>+    P_max = k_p * e + k_i * err_integral + k_d * diff_err + sustainable_power</div><div class='add'>+</div><div class='add'>+where</div><div class='add'>+    e = desired_temperature - current_temperature</div><div class='add'>+    err_integral is the sum of previous errors</div><div class='add'>+    diff_err = e - previous_error</div><div class='add'>+</div><div class='add'>+It is similar to the one depicted below:</div><div class='add'>+</div><div class='add'>+                                      k_d</div><div class='add'>+                                       |</div><div class='add'>+current_temp                           |</div><div class='add'>+     |                                 v</div><div class='add'>+     |                +----------+   +---+</div><div class='add'>+     |         +-----&gt;| diff_err |--&gt;| X |------+</div><div class='add'>+     |         |      +----------+   +---+      |</div><div class='add'>+     |         |                                |      tdp        actor</div><div class='add'>+     |         |                      k_i       |       |  get_requested_power()</div><div class='add'>+     |         |                       |        |       |        |     |</div><div class='add'>+     |         |                       |        |       |        |     | ...</div><div class='add'>+     v         |                       v        v       v        v     v</div><div class='add'>+   +---+       |      +-------+      +---+    +---+   +---+   +----------+</div><div class='add'>+   | S |-------+-----&gt;| sum e |-----&gt;| X |---&gt;| S |--&gt;| S |--&gt;|power     |</div><div class='add'>+   +---+       |      +-------+      +---+    +---+   +---+   |allocation|</div><div class='add'>+     ^         |                                ^             +----------+</div><div class='add'>+     |         |                                |                |     |</div><div class='add'>+     |         |        +---+                   |                |     |</div><div class='add'>+     |         +-------&gt;| X |-------------------+                v     v</div><div class='add'>+     |                  +---+                               granted performance</div><div class='add'>+desired_temperature       ^</div><div class='add'>+                          |</div><div class='add'>+                          |</div><div class='add'>+                      k_po/k_pu</div><div class='add'>+</div><div class='add'>+Sustainable power</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+An estimate of the sustainable dissipatable power (in mW) should be</div><div class='add'>+provided while registering the thermal zone.  This estimates the</div><div class='add'>+sustained power that can be dissipated at the desired control</div><div class='add'>+temperature.  This is the maximum sustained power for allocation at</div><div class='add'>+the desired maximum temperature.  The actual sustained power can vary</div><div class='add'>+for a number of reasons.  The closed loop controller will take care of</div><div class='add'>+variations such as environmental conditions, and some factors related</div><div class='add'>+to the speed-grade of the silicon.  `sustainable_power` is therefore</div><div class='add'>+simply an estimate, and may be tuned to affect the aggressiveness of</div><div class='add'>+the thermal ramp. For reference, the sustainable power of a 4" phone</div><div class='add'>+is typically 2000mW, while on a 10" tablet is around 4500mW (may vary</div><div class='add'>+depending on screen size).</div><div class='add'>+</div><div class='add'>+If you are using device tree, do add it as a property of the</div><div class='add'>+thermal-zone.  For example:</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		soc_thermal {</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			sustainable-power = &lt;2500&gt;;</div><div class='add'>+			...</div><div class='add'>+</div><div class='add'>+Instead, if the thermal zone is registered from the platform code, pass a</div><div class='add'>+`thermal_zone_params` that has a `sustainable_power`.  If no</div><div class='add'>+`thermal_zone_params` were being passed, then something like below</div><div class='add'>+will suffice:</div><div class='add'>+</div><div class='add'>+	static const struct thermal_zone_params tz_params = {</div><div class='add'>+		.sustainable_power = 3500,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+and then pass `tz_params` as the 5th parameter to</div><div class='add'>+`thermal_zone_device_register()`</div><div class='add'>+</div><div class='add'>+k_po and k_pu</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+The implementation of the PID controller in the power allocator</div><div class='add'>+thermal governor allows the configuration of two proportional term</div><div class='add'>+constants: `k_po` and `k_pu`.  `k_po` is the proportional term</div><div class='add'>+constant during temperature overshoot periods (current temperature is</div><div class='add'>+above "desired temperature" trip point).  Conversely, `k_pu` is the</div><div class='add'>+proportional term constant during temperature undershoot periods</div><div class='add'>+(current temperature below "desired temperature" trip point).</div><div class='add'>+</div><div class='add'>+These controls are intended as the primary mechanism for configuring</div><div class='add'>+the permitted thermal "ramp" of the system.  For instance, a lower</div><div class='add'>+`k_pu` value will provide a slower ramp, at the cost of capping</div><div class='add'>+available capacity at a low temperature.  On the other hand, a high</div><div class='add'>+value of `k_pu` will result in the governor granting very high power</div><div class='add'>+whilst temperature is low, and may lead to temperature overshooting.</div><div class='add'>+</div><div class='add'>+The default value for `k_pu` is:</div><div class='add'>+</div><div class='add'>+    2 * sustainable_power / (desired_temperature - switch_on_temp)</div><div class='add'>+</div><div class='add'>+This means that at `switch_on_temp` the output of the controller's</div><div class='add'>+proportional term will be 2 * `sustainable_power`.  The default value</div><div class='add'>+for `k_po` is:</div><div class='add'>+</div><div class='add'>+    sustainable_power / (desired_temperature - switch_on_temp)</div><div class='add'>+</div><div class='add'>+Focusing on the proportional and feed forward values of the PID</div><div class='add'>+controller equation we have:</div><div class='add'>+</div><div class='add'>+    P_max = k_p * e + sustainable_power</div><div class='add'>+</div><div class='add'>+The proportional term is proportional to the difference between the</div><div class='add'>+desired temperature and the current one.  When the current temperature</div><div class='add'>+is the desired one, then the proportional component is zero and</div><div class='add'>+`P_max` = `sustainable_power`.  That is, the system should operate in</div><div class='add'>+thermal equilibrium under constant load.  `sustainable_power` is only</div><div class='add'>+an estimate, which is the reason for closed-loop control such as this.</div><div class='add'>+</div><div class='add'>+Expanding `k_pu` we get:</div><div class='add'>+    P_max = 2 * sustainable_power * (T_set - T) / (T_set - T_on) +</div><div class='add'>+        sustainable_power</div><div class='add'>+</div><div class='add'>+where</div><div class='add'>+    T_set is the desired temperature</div><div class='add'>+    T is the current temperature</div><div class='add'>+    T_on is the switch on temperature</div><div class='add'>+</div><div class='add'>+When the current temperature is the switch_on temperature, the above</div><div class='add'>+formula becomes:</div><div class='add'>+</div><div class='add'>+    P_max = 2 * sustainable_power * (T_set - T_on) / (T_set - T_on) +</div><div class='add'>+        sustainable_power = 2 * sustainable_power + sustainable_power =</div><div class='add'>+        3 * sustainable_power</div><div class='add'>+</div><div class='add'>+Therefore, the proportional term alone linearly decreases power from</div><div class='add'>+3 * `sustainable_power` to `sustainable_power` as the temperature</div><div class='add'>+rises from the switch on temperature to the desired temperature.</div><div class='add'>+</div><div class='add'>+k_i and integral_cutoff</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+`k_i` configures the PID loop's integral term constant.  This term</div><div class='add'>+allows the PID controller to compensate for long term drift and for</div><div class='add'>+the quantized nature of the output control: cooling devices can't set</div><div class='add'>+the exact power that the governor requests.  When the temperature</div><div class='add'>+error is below `integral_cutoff`, errors are accumulated in the</div><div class='add'>+integral term.  This term is then multiplied by `k_i` and the result</div><div class='add'>+added to the output of the controller.  Typically `k_i` is set low (1</div><div class='add'>+or 2) and `integral_cutoff` is 0.</div><div class='add'>+</div><div class='add'>+k_d</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+`k_d` configures the PID loop's derivative term constant.  It's</div><div class='add'>+recommended to leave it as the default: 0.</div><div class='add'>+</div><div class='add'>+Cooling device power API</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Cooling devices controlled by this governor must supply the additional</div><div class='add'>+"power" API in their `cooling_device_ops`.  It consists on three ops:</div><div class='add'>+</div><div class='add'>+1. int get_requested_power(struct thermal_cooling_device *cdev,</div><div class='add'>+	struct thermal_zone_device *tz, u32 *power);</div><div class='add'>+@cdev: The `struct thermal_cooling_device` pointer</div><div class='add'>+@tz: thermal zone in which we are currently operating</div><div class='add'>+@power: pointer in which to store the calculated power</div><div class='add'>+</div><div class='add'>+`get_requested_power()` calculates the power requested by the device</div><div class='add'>+in milliwatts and stores it in @power .  It should return 0 on</div><div class='add'>+success, -E* on failure.  This is currently used by the power</div><div class='add'>+allocator governor to calculate how much power to give to each cooling</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+2. int state2power(struct thermal_cooling_device *cdev, struct</div><div class='add'>+        thermal_zone_device *tz, unsigned long state, u32 *power);</div><div class='add'>+@cdev: The `struct thermal_cooling_device` pointer</div><div class='add'>+@tz: thermal zone in which we are currently operating</div><div class='add'>+@state: A cooling device state</div><div class='add'>+@power: pointer in which to store the equivalent power</div><div class='add'>+</div><div class='add'>+Convert cooling device state @state into power consumption in</div><div class='add'>+milliwatts and store it in @power.  It should return 0 on success, -E*</div><div class='add'>+on failure.  This is currently used by thermal core to calculate the</div><div class='add'>+maximum power that an actor can consume.</div><div class='add'>+</div><div class='add'>+3. int power2state(struct thermal_cooling_device *cdev, u32 power,</div><div class='add'>+	unsigned long *state);</div><div class='add'>+@cdev: The `struct thermal_cooling_device` pointer</div><div class='add'>+@power: power in milliwatts</div><div class='add'>+@state: pointer in which to store the resulting state</div><div class='add'>+</div><div class='add'>+Calculate a cooling device state that would make the device consume at</div><div class='add'>+most @power mW and store it in @state.  It should return 0 on success,</div><div class='add'>+-E* on failure.  This is currently used by the thermal core to convert</div><div class='add'>+a given power set by the power allocator governor to a state that the</div><div class='add'>+cooling device can set.  It is a function because this conversion may</div><div class='add'>+depend on external factors that may change so this function should the</div><div class='add'>+best conversion given "current circumstances".</div><div class='add'>+</div><div class='add'>+Cooling device weights</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+Weights are a mechanism to bias the allocation among cooling</div><div class='add'>+devices.  They express the relative power efficiency of different</div><div class='add'>+cooling devices.  Higher weight can be used to express higher power</div><div class='add'>+efficiency.  Weighting is relative such that if each cooling device</div><div class='add'>+has a weight of one they are considered equal.  This is particularly</div><div class='add'>+useful in heterogeneous systems where two cooling devices may perform</div><div class='add'>+the same kind of compute, but with different efficiency.  For example,</div><div class='add'>+a system with two different types of processors.</div><div class='add'>+</div><div class='add'>+If the thermal zone is registered using</div><div class='add'>+`thermal_zone_device_register()` (i.e., platform code), then weights</div><div class='add'>+are passed as part of the thermal zone's `thermal_bind_parameters`.</div><div class='add'>+If the platform is registered using device tree, then they are passed</div><div class='add'>+as the `contribution` property of each map in the `cooling-maps` node.</div><div class='add'>+</div><div class='add'>+Limitations of the power allocator governor</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+The power allocator governor's PID controller works best if there is a</div><div class='add'>+periodic tick.  If you have a driver that calls</div><div class='add'>+`thermal_zone_device_update()` (or anything that ends up calling the</div><div class='add'>+governor's `throttle()` function) repetitively, the governor response</div><div class='add'>+won't be very good.  Note that this is not particular to this</div><div class='add'>+governor, step-wise will also misbehave if you call its throttle()</div><div class='add'>+faster than the normal thermal framework tick (due to interrupts for</div><div class='add'>+example) as it will overreact.</div><div class='head'>diff --git a/Documentation/thermal/sysfs-api.txt b/Documentation/thermal/sysfs-api.txt<br/>index 87519cb379ee..c1f6864a8c5d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/thermal/sysfs-api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/thermal/sysfs-api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/thermal/sysfs-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/thermal/sysfs-api.txt</a></div><div class='hunk'>@@ -95,7 +95,7 @@ temperature) and throttle appropriate devices.</div><div class='ctx'> 1.3 interface for binding a thermal zone device with a thermal cooling device</div><div class='ctx'> 1.3.1 int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz,</div><div class='ctx'> 	int trip, struct thermal_cooling_device *cdev,</div><div class='del'>-	unsigned long upper, unsigned long lower);</div><div class='add'>+	unsigned long upper, unsigned long lower, unsigned int weight);</div><div class='ctx'> </div><div class='ctx'>     This interface function bind a thermal cooling device to the certain trip</div><div class='ctx'>     point of a thermal zone device.</div><div class='hunk'>@@ -110,6 +110,8 @@ temperature) and throttle appropriate devices.</div><div class='ctx'>     lower:the Minimum cooling state can be used for this trip point.</div><div class='ctx'>           THERMAL_NO_LIMIT means no lower limit,</div><div class='ctx'> 	  and the cooling device can be in cooling state 0.</div><div class='add'>+    weight: the influence of this cooling device in this thermal</div><div class='add'>+            zone.  See 1.4.1 below for more information.</div><div class='ctx'> </div><div class='ctx'> 1.3.2 int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz,</div><div class='ctx'> 		int trip, struct thermal_cooling_device *cdev);</div><div class='hunk'>@@ -127,9 +129,15 @@ temperature) and throttle appropriate devices.</div><div class='ctx'>     This structure defines the following parameters that are used to bind</div><div class='ctx'>     a zone with a cooling device for a particular trip point.</div><div class='ctx'>     .cdev: The cooling device pointer</div><div class='del'>-    .weight: The 'influence' of a particular cooling device on this zone.</div><div class='del'>-             This is on a percentage scale. The sum of all these weights</div><div class='del'>-             (for a particular zone) cannot exceed 100.</div><div class='add'>+    .weight: The 'influence' of a particular cooling device on this</div><div class='add'>+             zone. This is relative to the rest of the cooling</div><div class='add'>+             devices. For example, if all cooling devices have a</div><div class='add'>+             weight of 1, then they all contribute the same. You can</div><div class='add'>+             use percentages if you want, but it's not mandatory. A</div><div class='add'>+             weight of 0 means that this cooling device doesn't</div><div class='add'>+             contribute to the cooling of this zone unless all cooling</div><div class='add'>+             devices have a weight of 0. If all weights are 0, then</div><div class='add'>+             they all contribute the same.</div><div class='ctx'>     .trip_mask:This is a bit mask that gives the binding relation between</div><div class='ctx'>                this thermal zone and cdev, for a particular trip point.</div><div class='ctx'>                If nth bit is set, then the cdev and thermal zone are bound</div><div class='hunk'>@@ -176,6 +184,14 @@ Thermal zone device sys I/F, created once it's registered:</div><div class='ctx'>     |---trip_point_[0-*]_type:	Trip point type</div><div class='ctx'>     |---trip_point_[0-*]_hyst:	Hysteresis value for this trip point</div><div class='ctx'>     |---emul_temp:		Emulated temperature set node</div><div class='add'>+    |---sustainable_power:      Sustainable dissipatable power</div><div class='add'>+    |---k_po:                   Proportional term during temperature overshoot</div><div class='add'>+    |---k_pu:                   Proportional term during temperature undershoot</div><div class='add'>+    |---k_i:                    PID's integral term in the power allocator gov</div><div class='add'>+    |---k_d:                    PID's derivative term in the power allocator</div><div class='add'>+    |---integral_cutoff:        Offset above which errors are accumulated</div><div class='add'>+    |---slope:                  Slope constant applied as linear extrapolation</div><div class='add'>+    |---offset:                 Offset constant applied as linear extrapolation</div><div class='ctx'> </div><div class='ctx'> Thermal cooling device sys I/F, created once it's registered:</div><div class='ctx'> /sys/class/thermal/cooling_device[0-*]:</div><div class='hunk'>@@ -192,6 +208,8 @@ thermal_zone_bind_cooling_device/thermal_zone_unbind_cooling_device.</div><div class='ctx'> /sys/class/thermal/thermal_zone[0-*]:</div><div class='ctx'>     |---cdev[0-*]:		[0-*]th cooling device in current thermal zone</div><div class='ctx'>     |---cdev[0-*]_trip_point:	Trip point that cdev[0-*] is associated with</div><div class='add'>+    |---cdev[0-*]_weight:       Influence of the cooling device in</div><div class='add'>+                                this thermal zone</div><div class='ctx'> </div><div class='ctx'> Besides the thermal zone device sysfs I/F and cooling device sysfs I/F,</div><div class='ctx'> the generic thermal driver also creates a hwmon sysfs I/F for each _type_</div><div class='hunk'>@@ -265,6 +283,14 @@ cdev[0-*]_trip_point</div><div class='ctx'> 	point.</div><div class='ctx'> 	RO, Optional</div><div class='ctx'> </div><div class='add'>+cdev[0-*]_weight</div><div class='add'>+        The influence of cdev[0-*] in this thermal zone. This value</div><div class='add'>+        is relative to the rest of cooling devices in the thermal</div><div class='add'>+        zone. For example, if a cooling device has a weight double</div><div class='add'>+        than that of other, it's twice as effective in cooling the</div><div class='add'>+        thermal zone.</div><div class='add'>+        RW, Optional</div><div class='add'>+</div><div class='ctx'> passive</div><div class='ctx'> 	Attribute is only present for zones in which the passive cooling</div><div class='ctx'> 	policy is not supported by native thermal driver. Default is zero</div><div class='hunk'>@@ -289,6 +315,66 @@ emul_temp</div><div class='ctx'> 	  because userland can easily disable the thermal policy by simply</div><div class='ctx'> 	  flooding this sysfs node with low temperature values.</div><div class='ctx'> </div><div class='add'>+sustainable_power</div><div class='add'>+	An estimate of the sustained power that can be dissipated by</div><div class='add'>+	the thermal zone. Used by the power allocator governor. For</div><div class='add'>+	more information see Documentation/thermal/power_allocator.txt</div><div class='add'>+	Unit: milliwatts</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+k_po</div><div class='add'>+	The proportional term of the power allocator governor's PID</div><div class='add'>+	controller during temperature overshoot. Temperature overshoot</div><div class='add'>+	is when the current temperature is above the "desired</div><div class='add'>+	temperature" trip point. For more information see</div><div class='add'>+	Documentation/thermal/power_allocator.txt</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+k_pu</div><div class='add'>+	The proportional term of the power allocator governor's PID</div><div class='add'>+	controller during temperature undershoot. Temperature undershoot</div><div class='add'>+	is when the current temperature is below the "desired</div><div class='add'>+	temperature" trip point. For more information see</div><div class='add'>+	Documentation/thermal/power_allocator.txt</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+k_i</div><div class='add'>+	The integral term of the power allocator governor's PID</div><div class='add'>+	controller. This term allows the PID controller to compensate</div><div class='add'>+	for long term drift. For more information see</div><div class='add'>+	Documentation/thermal/power_allocator.txt</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+k_d</div><div class='add'>+	The derivative term of the power allocator governor's PID</div><div class='add'>+	controller. For more information see</div><div class='add'>+	Documentation/thermal/power_allocator.txt</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+integral_cutoff</div><div class='add'>+	Temperature offset from the desired temperature trip point</div><div class='add'>+	above which the integral term of the power allocator</div><div class='add'>+	governor's PID controller starts accumulating errors. For</div><div class='add'>+	example, if integral_cutoff is 0, then the integral term only</div><div class='add'>+	accumulates error when temperature is above the desired</div><div class='add'>+	temperature trip point. For more information see</div><div class='add'>+	Documentation/thermal/power_allocator.txt</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+slope</div><div class='add'>+	The slope constant used in a linear extrapolation model</div><div class='add'>+	to determine a hotspot temperature based off the sensor's</div><div class='add'>+	raw readings. It is up to the device driver to determine</div><div class='add'>+	the usage of these values.</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='add'>+offset</div><div class='add'>+	The offset constant used in a linear extrapolation model</div><div class='add'>+	to determine a hotspot temperature based off the sensor's</div><div class='add'>+	raw readings. It is up to the device driver to determine</div><div class='add'>+	the usage of these values.</div><div class='add'>+	RW, Optional</div><div class='add'>+</div><div class='ctx'> *****************************</div><div class='ctx'> * Cooling device attributes *</div><div class='ctx'> *****************************</div><div class='hunk'>@@ -318,7 +404,8 @@ passive, active. If an ACPI thermal zone supports critical, passive,</div><div class='ctx'> active[0] and active[1] at the same time, it may register itself as a</div><div class='ctx'> thermal_zone_device (thermal_zone1) with 4 trip points in all.</div><div class='ctx'> It has one processor and one fan, which are both registered as</div><div class='del'>-thermal_cooling_device.</div><div class='add'>+thermal_cooling_device. Both are considered to have the same</div><div class='add'>+effectiveness in cooling the thermal zone.</div><div class='ctx'> </div><div class='ctx'> If the processor is listed in _PSL method, and the fan is listed in _AL0</div><div class='ctx'> method, the sys I/F structure will be built like this:</div><div class='hunk'>@@ -340,8 +427,10 @@ method, the sys I/F structure will be built like this:</div><div class='ctx'>     |---trip_point_3_type:	active1</div><div class='ctx'>     |---cdev0:			---&gt;/sys/class/thermal/cooling_device0</div><div class='ctx'>     |---cdev0_trip_point:	1	/* cdev0 can be used for passive */</div><div class='add'>+    |---cdev0_weight:           1024</div><div class='ctx'>     |---cdev1:			---&gt;/sys/class/thermal/cooling_device3</div><div class='ctx'>     |---cdev1_trip_point:	2	/* cdev1 can be used for active[0]*/</div><div class='add'>+    |---cdev1_weight:           1024</div><div class='ctx'> </div><div class='ctx'> |cooling_device0:</div><div class='ctx'>     |---type:			Processor</div><div class='head'>diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt<br/>index 572ca923631a..7ddb1e319f84 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/trace/ftrace.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/trace/ftrace.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/trace/ftrace.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/trace/ftrace.txt</a></div><div class='hunk'>@@ -108,8 +108,8 @@ of ftrace. Here is a list of some of the key files:</div><div class='ctx'> 	data is read from this file, it is consumed, and</div><div class='ctx'> 	will not be read again with a sequential read. The</div><div class='ctx'> 	"trace" file is static, and if the tracer is not</div><div class='del'>-	adding more data,they will display the same</div><div class='del'>-	information every time they are read.</div><div class='add'>+	adding more data, it will display the same</div><div class='add'>+	information every time it is read.</div><div class='ctx'> </div><div class='ctx'>   trace_options:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/usb/gadget-testing.txt b/Documentation/usb/gadget-testing.txt<br/>index f45b2bf4b41d..592678009c15 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/usb/gadget-testing.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/usb/gadget-testing.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/usb/gadget-testing.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/usb/gadget-testing.txt</a></div><div class='hunk'>@@ -526,8 +526,6 @@ Except for ifname they can be written to until the function is linked to a</div><div class='ctx'> configuration. The ifname is read-only and contains the name of the interface</div><div class='ctx'> which was assigned by the net core, e. g. usb0.</div><div class='ctx'> </div><div class='del'>-By default there can be only 1 RNDIS interface in the system.</div><div class='del'>-</div><div class='ctx'> Testing the RNDIS function</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -629,7 +627,7 @@ Function-specific configfs interface</div><div class='ctx'> The function name to use when creating the function directory is "uac2".</div><div class='ctx'> The uac2 function provides these attributes in its function directory:</div><div class='ctx'> </div><div class='del'>-	chmask - capture channel mask</div><div class='add'>+	c_chmask - capture channel mask</div><div class='ctx'> 	c_srate - capture sampling rate</div><div class='ctx'> 	c_ssize - capture sample size (bytes)</div><div class='ctx'> 	p_chmask - playback channel mask</div><div class='head'>diff --git a/Documentation/usb/usb-serial.txt b/Documentation/usb/usb-serial.txt<br/>index 947fa62bccf2..349f3104fa4f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/usb/usb-serial.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/usb/usb-serial.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/usb/usb-serial.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/usb/usb-serial.txt</a></div><div class='hunk'>@@ -465,12 +465,14 @@ Generic Serial driver</div><div class='ctx'>   device, and does not support any kind of device flow control. All that</div><div class='ctx'>   is required of your device is that it has at least one bulk in endpoint,</div><div class='ctx'>   or one bulk out endpoint. </div><div class='del'>-  </div><div class='del'>-  To enable the generic driver to recognize your device, build the driver</div><div class='del'>-  as a module and load it by the following invocation:</div><div class='add'>+</div><div class='add'>+  To enable the generic driver to recognize your device, provide</div><div class='add'>+	echo &lt;vid&gt; &lt;pid&gt; &gt;/sys/bus/usb-serial/drivers/generic/new_id</div><div class='add'>+  where the &lt;vid&gt; and &lt;pid&gt; is replaced with the hex representation of your</div><div class='add'>+  device's vendor id and product id.</div><div class='add'>+  If the driver is compiled as a module you can also provide one id when</div><div class='add'>+  loading the module</div><div class='ctx'> 	insmod usbserial vendor=0x#### product=0x####</div><div class='del'>-  where the #### is replaced with the hex representation of your device's</div><div class='del'>-  vendor id and product id.</div><div class='ctx'> </div><div class='ctx'>   This driver has been successfully used to connect to the NetChip USB</div><div class='ctx'>   development board, providing a way to develop USB firmware without</div><div class='head'>diff --git a/Documentation/vDSO/Makefile b/Documentation/vDSO/Makefile<br/>index ee075c3d2124..b12e98770e1f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vDSO/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/vDSO/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vDSO/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vDSO/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+ifndef CROSS_COMPILE</div><div class='ctx'> # vdso_test won't build for glibc &lt; 2.16, so disable it</div><div class='ctx'> # hostprogs-y := vdso_test</div><div class='ctx'> hostprogs-$(CONFIG_X86) := vdso_standalone_test_x86</div><div class='hunk'>@@ -13,3 +14,4 @@ HOSTLOADLIBES_vdso_standalone_test_x86 := -nostdlib</div><div class='ctx'> ifeq ($(CONFIG_X86_32),y)</div><div class='ctx'> HOSTLOADLIBES_vdso_standalone_test_x86 += -lgcc_s</div><div class='ctx'> endif</div><div class='add'>+endif</div><div class='head'>diff --git a/Documentation/vfio.txt b/Documentation/vfio.txt<br/>index 96978eced341..1dd3fddfd3a1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vfio.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/vfio.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vfio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vfio.txt</a></div><div class='hunk'>@@ -289,10 +289,12 @@ PPC64 sPAPR implementation note</div><div class='ctx'> </div><div class='ctx'> This implementation has some specifics:</div><div class='ctx'> </div><div class='del'>-1) Only one IOMMU group per container is supported as an IOMMU group</div><div class='del'>-represents the minimal entity which isolation can be guaranteed for and</div><div class='del'>-groups are allocated statically, one per a Partitionable Endpoint (PE)</div><div class='add'>+1) On older systems (POWER7 with P5IOC2/IODA1) only one IOMMU group per</div><div class='add'>+container is supported as an IOMMU table is allocated at the boot time,</div><div class='add'>+one table per a IOMMU group which is a Partitionable Endpoint (PE)</div><div class='ctx'> (PE is often a PCI domain but not always).</div><div class='add'>+Newer systems (POWER8 with IODA2) have improved hardware design which allows</div><div class='add'>+to remove this limitation and have multiple IOMMU groups per a VFIO container.</div><div class='ctx'> </div><div class='ctx'> 2) The hardware supports so called DMA windows - the PCI address range</div><div class='ctx'> within which DMA transfer is allowed, any attempt to access address space</div><div class='hunk'>@@ -385,6 +387,18 @@ The code flow from the example above should be slightly changed:</div><div class='ctx'> </div><div class='ctx'> 	....</div><div class='ctx'> </div><div class='add'>+	/* Inject EEH error, which is expected to be caused by 32-bits</div><div class='add'>+	 * config load.</div><div class='add'>+	 */</div><div class='add'>+	pe_op.op = VFIO_EEH_PE_INJECT_ERR;</div><div class='add'>+	pe_op.err.type = EEH_ERR_TYPE_32;</div><div class='add'>+	pe_op.err.func = EEH_ERR_FUNC_LD_CFG_ADDR;</div><div class='add'>+	pe_op.err.addr = 0ul;</div><div class='add'>+	pe_op.err.mask = 0ul;</div><div class='add'>+	ioctl(container, VFIO_EEH_PE_OP, &amp;pe_op);</div><div class='add'>+</div><div class='add'>+	....</div><div class='add'>+</div><div class='ctx'> 	/* When 0xFF's returned from reading PCI config space or IO BARs</div><div class='ctx'> 	 * of the PCI device. Check the PE's state to see if that has been</div><div class='ctx'> 	 * frozen.</div><div class='hunk'>@@ -427,6 +441,48 @@ The code flow from the example above should be slightly changed:</div><div class='ctx'> </div><div class='ctx'> 	....</div><div class='ctx'> </div><div class='add'>+5) There is v2 of SPAPR TCE IOMMU. It deprecates VFIO_IOMMU_ENABLE/</div><div class='add'>+VFIO_IOMMU_DISABLE and implements 2 new ioctls:</div><div class='add'>+VFIO_IOMMU_SPAPR_REGISTER_MEMORY and VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY</div><div class='add'>+(which are unsupported in v1 IOMMU).</div><div class='add'>+</div><div class='add'>+PPC64 paravirtualized guests generate a lot of map/unmap requests,</div><div class='add'>+and the handling of those includes pinning/unpinning pages and updating</div><div class='add'>+mm::locked_vm counter to make sure we do not exceed the rlimit.</div><div class='add'>+The v2 IOMMU splits accounting and pinning into separate operations:</div><div class='add'>+</div><div class='add'>+- VFIO_IOMMU_SPAPR_REGISTER_MEMORY/VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY ioctls</div><div class='add'>+receive a user space address and size of the block to be pinned.</div><div class='add'>+Bisecting is not supported and VFIO_IOMMU_UNREGISTER_MEMORY is expected to</div><div class='add'>+be called with the exact address and size used for registering</div><div class='add'>+the memory block. The userspace is not expected to call these often.</div><div class='add'>+The ranges are stored in a linked list in a VFIO container.</div><div class='add'>+</div><div class='add'>+- VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA ioctls only update the actual</div><div class='add'>+IOMMU table and do not do pinning; instead these check that the userspace</div><div class='add'>+address is from pre-registered range.</div><div class='add'>+</div><div class='add'>+This separation helps in optimizing DMA for guests.</div><div class='add'>+</div><div class='add'>+6) sPAPR specification allows guests to have an additional DMA window(s) on</div><div class='add'>+a PCI bus with a variable page size. Two ioctls have been added to support</div><div class='add'>+this: VFIO_IOMMU_SPAPR_TCE_CREATE and VFIO_IOMMU_SPAPR_TCE_REMOVE.</div><div class='add'>+The platform has to support the functionality or error will be returned to</div><div class='add'>+the userspace. The existing hardware supports up to 2 DMA windows, one is</div><div class='add'>+2GB long, uses 4K pages and called "default 32bit window"; the other can</div><div class='add'>+be as big as entire RAM, use different page size, it is optional - guests</div><div class='add'>+create those in run-time if the guest driver supports 64bit DMA.</div><div class='add'>+</div><div class='add'>+VFIO_IOMMU_SPAPR_TCE_CREATE receives a page shift, a DMA window size and</div><div class='add'>+a number of TCE table levels (if a TCE table is going to be big enough and</div><div class='add'>+the kernel may not be able to allocate enough of physically contiguous memory).</div><div class='add'>+It creates a new window in the available slot and returns the bus address where</div><div class='add'>+the new window starts. Due to hardware limitation, the user space cannot choose</div><div class='add'>+the location of DMA windows.</div><div class='add'>+</div><div class='add'>+VFIO_IOMMU_SPAPR_TCE_REMOVE receives the bus start address of the window</div><div class='add'>+and removes it.</div><div class='add'>+</div><div class='ctx'> -------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> [1] VFIO was originally an acronym for "Virtual Function I/O" in its</div><div class='head'>diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885<br/>index 4c84ec853265..44a4cfbfdc40 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.cx23885?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/CARDLIST.cx23885</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.cx23885?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.cx23885</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'>  35 -&gt; TeVii S471                                          [d471:9022]</div><div class='ctx'>  36 -&gt; Hauppauge WinTV-HVR1255                             [0070:2259]</div><div class='ctx'>  37 -&gt; Prof Revolution DVB-S2 8000                         [8000:3034]</div><div class='del'>- 38 -&gt; Hauppauge WinTV-HVR4400                             [0070:c108,0070:c138,0070:c12a,0070:c1f8]</div><div class='add'>+ 38 -&gt; Hauppauge WinTV-HVR4400/HVR5500                     [0070:c108,0070:c138,0070:c1f8]</div><div class='ctx'>  39 -&gt; AVerTV Hybrid Express Slim HC81R                    [1461:d939]</div><div class='ctx'>  40 -&gt; TurboSight TBS 6981                                 [6981:8888]</div><div class='ctx'>  41 -&gt; TurboSight TBS 6980                                 [6980:8888]</div><div class='hunk'>@@ -45,3 +45,10 @@</div><div class='ctx'>  44 -&gt; DViCO FusionHDTV DVB-T Dual Express2                [18ac:db98]</div><div class='ctx'>  45 -&gt; DVBSky T9580                                        [4254:9580]</div><div class='ctx'>  46 -&gt; DVBSky T980C                                        [4254:980c]</div><div class='add'>+ 47 -&gt; DVBSky S950C                                        [4254:950c]</div><div class='add'>+ 48 -&gt; Technotrend TT-budget CT2-4500 CI                   [13c2:3013]</div><div class='add'>+ 49 -&gt; DVBSky S950                                         [4254:0950]</div><div class='add'>+ 50 -&gt; DVBSky S952                                         [4254:0952]</div><div class='add'>+ 51 -&gt; DVBSky T982                                         [4254:0982]</div><div class='add'>+ 52 -&gt; Hauppauge WinTV-HVR5525                             [0070:f038]</div><div class='add'>+ 53 -&gt; Hauppauge WinTV Starburst                           [0070:c12a]</div><div class='head'>diff --git a/Documentation/video4linux/CARDLIST.em28xx b/Documentation/video4linux/CARDLIST.em28xx<br/>index 3700edb81db2..9e57ce43c4f4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.em28xx?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/CARDLIST.em28xx</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.em28xx?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.em28xx</a></div><div class='hunk'>@@ -94,3 +94,5 @@</div><div class='ctx'>  93 -&gt; KWorld USB ATSC TV Stick UB435-Q V3      (em2874)        [1b80:e34c]</div><div class='ctx'>  94 -&gt; PCTV tripleStick (292e)                  (em28178)</div><div class='ctx'>  95 -&gt; Leadtek VC100                            (em2861)        [0413:6f07]</div><div class='add'>+ 96 -&gt; Terratec Cinergy T2 Stick HD             (em28178)</div><div class='add'>+ 97 -&gt; Elgato EyeTV Hybrid 2008 INT             (em2884)        [0fd9:0018]</div><div class='head'>diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134<br/>index a93d86455233..f4b395bdc090 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.saa7134?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/CARDLIST.saa7134</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.saa7134?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.saa7134</a></div><div class='hunk'>@@ -192,3 +192,4 @@</div><div class='ctx'> 191 -&gt; Hawell HW-9004V1</div><div class='ctx'> 192 -&gt; AverMedia AverTV Satellite Hybrid+FM A706 [1461:2055]</div><div class='ctx'> 193 -&gt; WIS Voyager or compatible                [1905:7007]</div><div class='add'>+194 -&gt; AverMedia AverTV/505                     [1461:a10a]</div><div class='head'>diff --git a/Documentation/video4linux/CARDLIST.saa7164 b/Documentation/video4linux/CARDLIST.saa7164<br/>index 2205e8d55537..6eb057220474 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.saa7164?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/CARDLIST.saa7164</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/CARDLIST.saa7164?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/CARDLIST.saa7164</a></div><div class='hunk'>@@ -9,3 +9,6 @@</div><div class='ctx'>   8 -&gt; Hauppauge WinTV-HVR2250                             [0070:88A1]</div><div class='ctx'>   9 -&gt; Hauppauge WinTV-HVR2200                             [0070:8940]</div><div class='ctx'>  10 -&gt; Hauppauge WinTV-HVR2200                             [0070:8953]</div><div class='add'>+ 11 -&gt; Hauppauge WinTV-HVR2255(proto)</div><div class='add'>+ 12 -&gt; Hauppauge WinTV-HVR2255                             [0070:f111]</div><div class='add'>+ 13 -&gt; Hauppauge WinTV-HVR2205                             [0070:f123,0070:f120]</div><div class='head'>diff --git a/Documentation/video4linux/v4l2-framework.txt b/Documentation/video4linux/v4l2-framework.txt<br/>index 59e619f9bbf5..75d5c18d689a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-framework.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/v4l2-framework.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-framework.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/v4l2-framework.txt</a></div><div class='hunk'>@@ -1129,6 +1129,10 @@ available event type is 'class base + 1'.</div><div class='ctx'> An example on how the V4L2 events may be used can be found in the OMAP</div><div class='ctx'> 3 ISP driver (drivers/media/platform/omap3isp).</div><div class='ctx'> </div><div class='add'>+A subdev can directly send an event to the v4l2_device notify function with</div><div class='add'>+V4L2_DEVICE_NOTIFY_EVENT. This allows the bridge to map the subdev that sends</div><div class='add'>+the event to the video node(s) associated with the subdev that need to be</div><div class='add'>+informed about such an event.</div><div class='ctx'> </div><div class='ctx'> V4L2 clocks</div><div class='ctx'> -----------</div><div class='head'>diff --git a/Documentation/video4linux/v4l2-pci-skeleton.c b/Documentation/video4linux/v4l2-pci-skeleton.c<br/>index 7bd1b975bfd2..9c80c090e92d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-pci-skeleton.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/v4l2-pci-skeleton.c</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-pci-skeleton.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/v4l2-pci-skeleton.c</a></div><div class='hunk'>@@ -406,9 +406,7 @@ static int skeleton_enum_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 	if (f-&gt;index != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	strlcpy(f-&gt;description, "4:2:2, packed, YUYV", sizeof(f-&gt;description));</div><div class='ctx'> 	f-&gt;pixelformat = V4L2_PIX_FMT_YUYV;</div><div class='del'>-	f-&gt;flags = 0;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/video4linux/vivid.txt b/Documentation/video4linux/vivid.txt<br/>index cd4b5a1ac529..e35d376b7f64 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/vivid.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/video4linux/vivid.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/vivid.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/video4linux/vivid.txt</a></div><div class='hunk'>@@ -631,26 +631,33 @@ Timestamp Source: selects when the timestamp for each buffer is taken.</div><div class='ctx'> </div><div class='ctx'> Colorspace: selects which colorspace should be used when generating the image.</div><div class='ctx'> 	This only applies if the CSC Colorbar test pattern is selected,</div><div class='del'>-	otherwise the test pattern will go through unconverted (except for</div><div class='del'>-	the so-called 'Transfer Function' corrections and the R'G'B' to Y'CbCr</div><div class='del'>-	conversion). This behavior is also what you want, since a 75% Colorbar</div><div class='add'>+	otherwise the test pattern will go through unconverted.</div><div class='add'>+	This behavior is also what you want, since a 75% Colorbar</div><div class='ctx'> 	should really have 75% signal intensity and should not be affected</div><div class='ctx'> 	by colorspace conversions.</div><div class='ctx'> </div><div class='ctx'> 	Changing the colorspace will result in the V4L2_EVENT_SOURCE_CHANGE</div><div class='ctx'> 	to be sent since it emulates a detected colorspace change.</div><div class='ctx'> </div><div class='add'>+Transfer Function: selects which colorspace transfer function should be used when</div><div class='add'>+	generating an image. This only applies if the CSC Colorbar test pattern is</div><div class='add'>+	selected, otherwise the test pattern will go through unconverted.</div><div class='add'>+        This behavior is also what you want, since a 75% Colorbar</div><div class='add'>+        should really have 75% signal intensity and should not be affected</div><div class='add'>+        by colorspace conversions.</div><div class='add'>+</div><div class='add'>+	Changing the transfer function will result in the V4L2_EVENT_SOURCE_CHANGE</div><div class='add'>+	to be sent since it emulates a detected colorspace change.</div><div class='add'>+</div><div class='ctx'> Y'CbCr Encoding: selects which Y'CbCr encoding should be used when generating</div><div class='del'>-	a Y'CbCr image.	This only applies if the CSC Colorbar test pattern is</div><div class='del'>-	selected, and if the format is set to a Y'CbCr format as opposed to an</div><div class='del'>-	RGB format.</div><div class='add'>+	a Y'CbCr image.	This only applies if the format is set to a Y'CbCr format</div><div class='add'>+	as opposed to an RGB format.</div><div class='ctx'> </div><div class='ctx'> 	Changing the Y'CbCr encoding will result in the V4L2_EVENT_SOURCE_CHANGE</div><div class='ctx'> 	to be sent since it emulates a detected colorspace change.</div><div class='ctx'> </div><div class='ctx'> Quantization: selects which quantization should be used for the RGB or Y'CbCr</div><div class='del'>-	encoding when generating the test pattern. This only applies if the CSC</div><div class='del'>-	Colorbar test pattern is selected.</div><div class='add'>+	encoding when generating the test pattern.</div><div class='ctx'> </div><div class='ctx'> 	Changing the quantization will result in the V4L2_EVENT_SOURCE_CHANGE</div><div class='ctx'> 	to be sent since it emulates a detected colorspace change.</div><div class='hunk'>@@ -888,7 +895,7 @@ Section 10.1: Video and Sliced VBI looping</div><div class='ctx'> </div><div class='ctx'> The way to enable video/VBI looping is currently fairly crude. A 'Loop Video'</div><div class='ctx'> control is available in the "Vivid" control class of the video</div><div class='del'>-output and VBI output devices. When checked the video looping will be enabled.</div><div class='add'>+capture and VBI capture devices. When checked the video looping will be enabled.</div><div class='ctx'> Once enabled any video S-Video or HDMI input will show a static test pattern</div><div class='ctx'> until the video output has started. At that time the video output will be</div><div class='ctx'> looped to the video input provided that:</div><div class='hunk'>@@ -985,8 +992,9 @@ to change crop and compose rectangles on the fly.</div><div class='ctx'> Section 12: Formats</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-The driver supports all the regular packed YUYV formats, 16, 24 and 32 RGB</div><div class='del'>-packed formats and two multiplanar formats (one luma and one chroma plane).</div><div class='add'>+The driver supports all the regular packed and planar 4:4:4, 4:2:2 and 4:2:0</div><div class='add'>+YUYV formats, 8, 16, 24 and 32 RGB packed formats and various multiplanar</div><div class='add'>+formats.</div><div class='ctx'> </div><div class='ctx'> The alpha component can be set through the 'Alpha Component' User control</div><div class='ctx'> for those formats that support it. If the 'Apply Alpha To Red Only' control</div><div class='hunk'>@@ -1119,11 +1127,9 @@ Just as a reminder and in no particular order:</div><div class='ctx'> - Use per-queue locks and/or per-device locks to improve throughput</div><div class='ctx'> - Add support to loop from a specific output to a specific input across</div><div class='ctx'>   vivid instances</div><div class='del'>-- Add support for VIDIOC_EXPBUF once support for that has been added to vb2</div><div class='ctx'> - The SDR radio should use the same 'frequencies' for stations as the normal</div><div class='ctx'>   radio receiver, and give back noise if the frequency doesn't match up with</div><div class='ctx'>   a station frequency</div><div class='del'>-- Improve the sine generation of the SDR radio.</div><div class='ctx'> - Make a thread for the RDS generation, that would help in particular for the</div><div class='ctx'>   "Controls" RDS Rx I/O Mode as the read-only RDS controls could be updated</div><div class='ctx'>   in real-time.</div><div class='head'>diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt<br/>index 9fa2bf8c3f6f..a7926a90156f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/kvm/api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/virtual/kvm/api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/kvm/api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/virtual/kvm/api.txt</a></div><div class='hunk'>@@ -254,6 +254,11 @@ since the last call to this ioctl.  Bit 0 is the first page in the</div><div class='ctx'> memory slot.  Ensure the entire structure is cleared to avoid padding</div><div class='ctx'> issues.</div><div class='ctx'> </div><div class='add'>+If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 specifies</div><div class='add'>+the address space for which you want to return the dirty bitmap.</div><div class='add'>+They must be less than the value that KVM_CHECK_EXTENSION returns for</div><div class='add'>+the KVM_CAP_MULTI_ADDRESS_SPACE capability.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 4.9 KVM_SET_MEMORY_ALIAS</div><div class='ctx'> </div><div class='hunk'>@@ -820,11 +825,21 @@ struct kvm_vcpu_events {</div><div class='ctx'> 	} nmi;</div><div class='ctx'> 	__u32 sipi_vector;</div><div class='ctx'> 	__u32 flags;</div><div class='add'>+	struct {</div><div class='add'>+		__u8 smm;</div><div class='add'>+		__u8 pending;</div><div class='add'>+		__u8 smm_inside_nmi;</div><div class='add'>+		__u8 latched_init;</div><div class='add'>+	} smi;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KVM_VCPUEVENT_VALID_SHADOW may be set in the flags field to signal that</div><div class='del'>-interrupt.shadow contains a valid state. Otherwise, this field is undefined.</div><div class='add'>+Only two fields are defined in the flags field:</div><div class='add'>+</div><div class='add'>+- KVM_VCPUEVENT_VALID_SHADOW may be set in the flags field to signal that</div><div class='add'>+  interrupt.shadow contains a valid state.</div><div class='ctx'> </div><div class='add'>+- KVM_VCPUEVENT_VALID_SMM may be set in the flags field to signal that</div><div class='add'>+  smi contains a valid state.</div><div class='ctx'> </div><div class='ctx'> 4.32 KVM_SET_VCPU_EVENTS</div><div class='ctx'> </div><div class='hunk'>@@ -841,17 +856,20 @@ vcpu.</div><div class='ctx'> See KVM_GET_VCPU_EVENTS for the data structure.</div><div class='ctx'> </div><div class='ctx'> Fields that may be modified asynchronously by running VCPUs can be excluded</div><div class='del'>-from the update. These fields are nmi.pending and sipi_vector. Keep the</div><div class='del'>-corresponding bits in the flags field cleared to suppress overwriting the</div><div class='del'>-current in-kernel state. The bits are:</div><div class='add'>+from the update. These fields are nmi.pending, sipi_vector, smi.smm,</div><div class='add'>+smi.pending. Keep the corresponding bits in the flags field cleared to</div><div class='add'>+suppress overwriting the current in-kernel state. The bits are:</div><div class='ctx'> </div><div class='ctx'> KVM_VCPUEVENT_VALID_NMI_PENDING - transfer nmi.pending to the kernel</div><div class='ctx'> KVM_VCPUEVENT_VALID_SIPI_VECTOR - transfer sipi_vector</div><div class='add'>+KVM_VCPUEVENT_VALID_SMM         - transfer the smi sub-struct.</div><div class='ctx'> </div><div class='ctx'> If KVM_CAP_INTR_SHADOW is available, KVM_VCPUEVENT_VALID_SHADOW can be set in</div><div class='ctx'> the flags field to signal that interrupt.shadow contains a valid state and</div><div class='ctx'> shall be written into the VCPU.</div><div class='ctx'> </div><div class='add'>+KVM_VCPUEVENT_VALID_SMM can only be set if KVM_CAP_X86_SMM is available.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 4.33 KVM_GET_DEBUGREGS</div><div class='ctx'> </div><div class='hunk'>@@ -911,6 +929,13 @@ slot.  When changing an existing slot, it may be moved in the guest</div><div class='ctx'> physical memory space, or its flags may be modified.  It may not be</div><div class='ctx'> resized.  Slots may not overlap in guest physical address space.</div><div class='ctx'> </div><div class='add'>+If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot"</div><div class='add'>+specifies the address space which is being modified.  They must be</div><div class='add'>+less than the value that KVM_CHECK_EXTENSION returns for the</div><div class='add'>+KVM_CAP_MULTI_ADDRESS_SPACE capability.  Slots in separate address spaces</div><div class='add'>+are unrelated; the restriction on overlapping slots only applies within</div><div class='add'>+each address space.</div><div class='add'>+</div><div class='ctx'> Memory for the region is taken starting at the address denoted by the</div><div class='ctx'> field userspace_addr, which must point at user addressable memory for</div><div class='ctx'> the entire memory slot size.  Any object may back this memory, including</div><div class='hunk'>@@ -959,7 +984,8 @@ documentation when it pops into existence).</div><div class='ctx'> 4.37 KVM_ENABLE_CAP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ENABLE_CAP, KVM_CAP_ENABLE_CAP_VM</div><div class='del'>-Architectures: ppc, s390</div><div class='add'>+Architectures: x86 (only KVM_CAP_ENABLE_CAP_VM),</div><div class='add'>+	       mips (only KVM_CAP_ENABLE_CAP), ppc, s390</div><div class='ctx'> Type: vcpu ioctl, vm ioctl (with KVM_CAP_ENABLE_CAP_VM)</div><div class='ctx'> Parameters: struct kvm_enable_cap (in)</div><div class='ctx'> Returns: 0 on success; -1 on error</div><div class='hunk'>@@ -1268,7 +1294,7 @@ The flags bitmap is defined as:</div><div class='ctx'>    /* the host supports the ePAPR idle hcall</div><div class='ctx'>    #define KVM_PPC_PVINFO_FLAGS_EV_IDLE   (1&lt;&lt;0)</div><div class='ctx'> </div><div class='del'>-4.48 KVM_ASSIGN_PCI_DEVICE</div><div class='add'>+4.48 KVM_ASSIGN_PCI_DEVICE (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: none</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1318,7 +1344,7 @@ Errors:</div><div class='ctx'>   have their standard meanings.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4.49 KVM_DEASSIGN_PCI_DEVICE</div><div class='add'>+4.49 KVM_DEASSIGN_PCI_DEVICE (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: none</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1337,7 +1363,7 @@ Errors:</div><div class='ctx'>   Other error conditions may be defined by individual device types or</div><div class='ctx'>   have their standard meanings.</div><div class='ctx'> </div><div class='del'>-4.50 KVM_ASSIGN_DEV_IRQ</div><div class='add'>+4.50 KVM_ASSIGN_DEV_IRQ (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ASSIGN_DEV_IRQ</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1377,7 +1403,7 @@ Errors:</div><div class='ctx'>   have their standard meanings.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4.51 KVM_DEASSIGN_DEV_IRQ</div><div class='add'>+4.51 KVM_DEASSIGN_DEV_IRQ (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ASSIGN_DEV_IRQ</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1451,7 +1477,7 @@ struct kvm_irq_routing_s390_adapter {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4.53 KVM_ASSIGN_SET_MSIX_NR</div><div class='add'>+4.53 KVM_ASSIGN_SET_MSIX_NR (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: none</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1473,7 +1499,7 @@ struct kvm_assigned_msix_nr {</div><div class='ctx'> #define KVM_MAX_MSIX_PER_DEV		256</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4.54 KVM_ASSIGN_SET_MSIX_ENTRY</div><div class='add'>+4.54 KVM_ASSIGN_SET_MSIX_ENTRY (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: none</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1629,7 +1655,7 @@ should skip processing the bitmap and just invalidate everything.  It must</div><div class='ctx'> be set to the number of set bits in the bitmap.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-4.61 KVM_ASSIGN_SET_INTX_MASK</div><div class='add'>+4.61 KVM_ASSIGN_SET_INTX_MASK (deprecated)</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_PCI_2_3</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -2978,6 +3004,16 @@ len must be a multiple of sizeof(struct kvm_s390_irq). It must be &gt; 0</div><div class='ctx'> and it must not exceed (max_vcpus + 32) * sizeof(struct kvm_s390_irq),</div><div class='ctx'> which is the maximum number of possibly pending cpu-local interrupts.</div><div class='ctx'> </div><div class='add'>+4.90 KVM_SMI</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_X86_SMM</div><div class='add'>+Architectures: x86</div><div class='add'>+Type: vcpu ioctl</div><div class='add'>+Parameters: none</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+Queues an SMI on the thread's vcpu.</div><div class='add'>+</div><div class='ctx'> 5. The kvm_run structure</div><div class='ctx'> ------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -3013,7 +3049,12 @@ an interrupt can be injected now with KVM_INTERRUPT.</div><div class='ctx'> The value of the current interrupt flag.  Only valid if in-kernel</div><div class='ctx'> local APIC is not used.</div><div class='ctx'> </div><div class='del'>-	__u8 padding2[2];</div><div class='add'>+	__u16 flags;</div><div class='add'>+</div><div class='add'>+More architecture-specific flags detailing state of the VCPU that may</div><div class='add'>+affect the device's behavior.  The only currently defined flag is</div><div class='add'>+KVM_RUN_X86_SMM, which is valid on x86 machines and is set if the</div><div class='add'>+VCPU is in system management mode.</div><div class='ctx'> </div><div class='ctx'> 	/* in (pre_kvm_run), out (post_kvm_run) */</div><div class='ctx'> 	__u64 cr8;</div><div class='head'>diff --git a/Documentation/virtual/kvm/mmu.txt b/Documentation/virtual/kvm/mmu.txt<br/>index c59bd9bc41ef..3a4d681c3e98 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/kvm/mmu.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/virtual/kvm/mmu.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/kvm/mmu.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/virtual/kvm/mmu.txt</a></div><div class='hunk'>@@ -173,6 +173,12 @@ Shadow pages contain the following information:</div><div class='ctx'>     Contains the value of cr4.smap &amp;&amp; !cr0.wp for which the page is valid</div><div class='ctx'>     (pages for which this is true are different from other pages; see the</div><div class='ctx'>     treatment of cr0.wp=0 below).</div><div class='add'>+  role.smm:</div><div class='add'>+    Is 1 if the page is valid in system management mode.  This field</div><div class='add'>+    determines which of the kvm_memslots array was used to build this</div><div class='add'>+    shadow page; it is also used to go back from a struct kvm_mmu_page</div><div class='add'>+    to a memslot, through the kvm_memslots_for_spte_role macro and</div><div class='add'>+    __gfn_to_memslot.</div><div class='ctx'>   gfn:</div><div class='ctx'>     Either the guest page table containing the translations shadowed by this</div><div class='ctx'>     page, or the base page frame for linear translations.  See role.direct.</div><div class='head'>diff --git a/Documentation/vm/unevictable-lru.txt b/Documentation/vm/unevictable-lru.txt<br/>index 3be0bfc4738d..32ee3a67dba2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vm/unevictable-lru.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/vm/unevictable-lru.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/unevictable-lru.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vm/unevictable-lru.txt</a></div><div class='hunk'>@@ -467,7 +467,13 @@ mmap(MAP_LOCKED) SYSTEM CALL HANDLING</div><div class='ctx'> </div><div class='ctx'> In addition the mlock()/mlockall() system calls, an application can request</div><div class='ctx'> that a region of memory be mlocked supplying the MAP_LOCKED flag to the mmap()</div><div class='del'>-call.  Furthermore, any mmap() call or brk() call that expands the heap by a</div><div class='add'>+call. There is one important and subtle difference here, though. mmap() + mlock()</div><div class='add'>+will fail if the range cannot be faulted in (e.g. because mm_populate fails)</div><div class='add'>+and returns with ENOMEM while mmap(MAP_LOCKED) will not fail. The mmaped</div><div class='add'>+area will still have properties of the locked area - aka. pages will not get</div><div class='add'>+swapped out - but major page faults to fault memory in might still happen.</div><div class='add'>+</div><div class='add'>+Furthermore, any mmap() call or brk() call that expands the heap by a</div><div class='ctx'> task that has previously called mlockall() with the MCL_FUTURE flag will result</div><div class='ctx'> in the newly mapped memory being mlocked.  Before the unevictable/mlock</div><div class='ctx'> changes, the kernel simply called make_pages_present() to allocate pages and</div><div class='head'>diff --git a/Documentation/vm/zswap.txt b/Documentation/vm/zswap.txt<br/>index 00c3d31e7971..8458c0861e4e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vm/zswap.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/vm/zswap.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/zswap.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vm/zswap.txt</a></div><div class='hunk'>@@ -26,8 +26,22 @@ Zswap evicts pages from compressed cache on an LRU basis to the backing swap</div><div class='ctx'> device when the compressed pool reaches its size limit.  This requirement had</div><div class='ctx'> been identified in prior community discussions.</div><div class='ctx'> </div><div class='del'>-To enabled zswap, the "enabled" attribute must be set to 1 at boot time.  e.g.</div><div class='del'>-zswap.enabled=1</div><div class='add'>+Zswap is disabled by default but can be enabled at boot time by setting</div><div class='add'>+the "enabled" attribute to 1 at boot time. ie: zswap.enabled=1.  Zswap</div><div class='add'>+can also be enabled and disabled at runtime using the sysfs interface.</div><div class='add'>+An example command to enable zswap at runtime, assuming sysfs is mounted</div><div class='add'>+at /sys, is:</div><div class='add'>+</div><div class='add'>+echo 1 &gt; /sys/modules/zswap/parameters/enabled</div><div class='add'>+</div><div class='add'>+When zswap is disabled at runtime it will stop storing pages that are</div><div class='add'>+being swapped out.  However, it will _not_ immediately write out or fault</div><div class='add'>+back into memory all of the pages stored in the compressed pool.  The</div><div class='add'>+pages stored in zswap will remain in the compressed pool until they are</div><div class='add'>+either invalidated or faulted back into memory.  In order to force all</div><div class='add'>+pages out of the compressed pool, a swapoff on the swap device(s) will</div><div class='add'>+fault back into memory all swapped out pages, including those in the</div><div class='add'>+compressed pool.</div><div class='ctx'> </div><div class='ctx'> Design:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/vme_api.txt b/Documentation/vme_api.txt<br/>index ffe6e22a2ccd..ca5b82797f6c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vme_api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/vme_api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vme_api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/vme_api.txt</a></div><div class='hunk'>@@ -171,6 +171,12 @@ This functions by reading the offset, applying the mask. If the bits selected in</div><div class='ctx'> the mask match with the values of the corresponding bits in the compare field,</div><div class='ctx'> the value of swap is written the specified offset.</div><div class='ctx'> </div><div class='add'>+Parts of a VME window can be mapped into user space memory using the following</div><div class='add'>+function:</div><div class='add'>+</div><div class='add'>+	int vme_master_mmap(struct vme_resource *resource,</div><div class='add'>+		struct vm_area_struct *vma)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Slave windows</div><div class='ctx'> =============</div><div class='head'>diff --git a/Documentation/w1/slaves/w1_therm b/Documentation/w1/slaves/w1_therm<br/>index cc62a95e4776..13411fe52f7f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/w1/slaves/w1_therm?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/w1/slaves/w1_therm</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/w1/slaves/w1_therm?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/w1/slaves/w1_therm</a></div><div class='hunk'>@@ -11,12 +11,14 @@ Author: Evgeniy Polyakov &lt;johnpol@2ka.mipt.ru&gt;</div><div class='ctx'> Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-w1_therm provides basic temperature conversion for ds18*20 devices.</div><div class='add'>+w1_therm provides basic temperature conversion for ds18*20 devices, and the</div><div class='add'>+ds28ea00 device.</div><div class='ctx'> supported family codes:</div><div class='ctx'> W1_THERM_DS18S20	0x10</div><div class='ctx'> W1_THERM_DS1822		0x22</div><div class='ctx'> W1_THERM_DS18B20	0x28</div><div class='ctx'> W1_THERM_DS1825		0x3B</div><div class='add'>+W1_THERM_DS28EA00	0x42</div><div class='ctx'> </div><div class='ctx'> Support is provided through the sysfs w1_slave file.  Each open and</div><div class='ctx'> read sequence will initiate a temperature conversion then provide two</div><div class='hunk'>@@ -48,3 +50,10 @@ resistor).  The DS18b20 temperature sensor specification lists a</div><div class='ctx'> maximum current draw of 1.5mA and that a 5k pullup resistor is not</div><div class='ctx'> sufficient.  The strong pullup is designed to provide the additional</div><div class='ctx'> current required.</div><div class='add'>+</div><div class='add'>+The DS28EA00 provides an additional two pins for implementing a sequence</div><div class='add'>+detection algorithm.  This feature allows you to determine the physical</div><div class='add'>+location of the chip in the 1-wire bus without needing pre-existing</div><div class='add'>+knowledge of the bus ordering.  Support is provided through the sysfs</div><div class='add'>+w1_seq file.  The file will contain a single line with an integer value</div><div class='add'>+representing the device index in the bus starting at 0.</div><div class='head'>diff --git a/Documentation/w1/w1.generic b/Documentation/w1/w1.generic<br/>index b2033c64c7da..b3ffaf8cfab2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/w1/w1.generic?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/w1/w1.generic</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/w1/w1.generic?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/w1/w1.generic</a></div><div class='hunk'>@@ -76,21 +76,24 @@ See struct w1_bus_master definition in w1.h for details.</div><div class='ctx'> </div><div class='ctx'> w1 master sysfs interface</div><div class='ctx'> ------------------------------------------------------------------</div><div class='del'>-&lt;xx-xxxxxxxxxxxxx&gt; - a directory for a found device. The format is family-serial</div><div class='add'>+&lt;xx-xxxxxxxxxxxxx&gt; - A directory for a found device. The format is family-serial</div><div class='ctx'> bus                - (standard) symlink to the w1 bus</div><div class='ctx'> driver             - (standard) symlink to the w1 driver</div><div class='del'>-w1_master_add      - Manually register a slave device</div><div class='del'>-w1_master_attempts - the number of times a search was attempted</div><div class='add'>+w1_master_add      - (rw) manually register a slave device</div><div class='add'>+w1_master_attempts - (ro) the number of times a search was attempted</div><div class='ctx'> w1_master_max_slave_count</div><div class='del'>-                   - maximum number of slaves to search for at a time</div><div class='del'>-w1_master_name     - the name of the device (w1_bus_masterX)</div><div class='del'>-w1_master_pullup   - 5V strong pullup 0 enabled, 1 disabled</div><div class='del'>-w1_master_remove   - Manually remove a slave device</div><div class='del'>-w1_master_search   - the number of searches left to do, -1=continual (default)</div><div class='add'>+                   - (rw) maximum number of slaves to search for at a time</div><div class='add'>+w1_master_name     - (ro) the name of the device (w1_bus_masterX)</div><div class='add'>+w1_master_pullup   - (rw) 5V strong pullup 0 enabled, 1 disabled</div><div class='add'>+w1_master_remove   - (rw) manually remove a slave device</div><div class='add'>+w1_master_search   - (rw) the number of searches left to do,</div><div class='add'>+		     -1=continual (default)</div><div class='ctx'> w1_master_slave_count</div><div class='del'>-                   - the number of slaves found</div><div class='del'>-w1_master_slaves   - the names of the slaves, one per line</div><div class='del'>-w1_master_timeout  - the delay in seconds between searches</div><div class='add'>+                   - (ro) the number of slaves found</div><div class='add'>+w1_master_slaves   - (ro) the names of the slaves, one per line</div><div class='add'>+w1_master_timeout  - (ro) the delay in seconds between searches</div><div class='add'>+w1_master_timeout_us</div><div class='add'>+                   - (ro) the delay in microseconds beetwen searches</div><div class='ctx'> </div><div class='ctx'> If you have a w1 bus that never changes (you don't add or remove devices),</div><div class='ctx'> you can set the module parameter search_count to a small positive number</div><div class='hunk'>@@ -101,6 +104,11 @@ generally only make sense when searching is disabled, as a search will</div><div class='ctx'> redetect manually removed devices that are present and timeout manually</div><div class='ctx'> added devices that aren't on the bus.</div><div class='ctx'> </div><div class='add'>+Bus searches occur at an interval, specified as a summ of timeout and</div><div class='add'>+timeout_us module parameters (either of which may be 0) for as long as</div><div class='add'>+w1_master_search remains greater than 0 or is -1.  Each search attempt</div><div class='add'>+decrements w1_master_search by 1 (down to 0) and increments</div><div class='add'>+w1_master_attempts by 1.</div><div class='ctx'> </div><div class='ctx'> w1 slave sysfs interface</div><div class='ctx'> ------------------------------------------------------------------</div><div class='head'>diff --git a/Documentation/watchdog/watchdog-kernel-api.txt b/Documentation/watchdog/watchdog-kernel-api.txt<br/>index a0438f3957ca..d8b0d3367706 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-kernel-api.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/watchdog/watchdog-kernel-api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-kernel-api.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/watchdog/watchdog-kernel-api.txt</a></div><div class='hunk'>@@ -36,6 +36,10 @@ The watchdog_unregister_device routine deregisters a registered watchdog timer</div><div class='ctx'> device. The parameter of this routine is the pointer to the registered</div><div class='ctx'> watchdog_device structure.</div><div class='ctx'> </div><div class='add'>+The watchdog subsystem includes an registration deferral mechanism,</div><div class='add'>+which allows you to register an watchdog as early as you wish during</div><div class='add'>+the boot process.</div><div class='add'>+</div><div class='ctx'> The watchdog device structure looks like this:</div><div class='ctx'> </div><div class='ctx'> struct watchdog_device {</div><div class='hunk'>@@ -52,6 +56,7 @@ struct watchdog_device {</div><div class='ctx'> 	void *driver_data;</div><div class='ctx'> 	struct mutex lock;</div><div class='ctx'> 	unsigned long status;</div><div class='add'>+	struct list_head deferred;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> It contains following fields:</div><div class='hunk'>@@ -80,6 +85,8 @@ It contains following fields:</div><div class='ctx'>   information about the status of the device (Like: is the watchdog timer</div><div class='ctx'>   running/active, is the nowayout bit set, is the device opened via</div><div class='ctx'>   the /dev/watchdog interface or not, ...).</div><div class='add'>+* deferred: entry in wtd_deferred_reg_list which is used to</div><div class='add'>+  register early initialized watchdogs.</div><div class='ctx'> </div><div class='ctx'> The list of watchdog operations is defined as:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/watchdog/watchdog-parameters.txt b/Documentation/watchdog/watchdog-parameters.txt<br/>index 692791cc674c..9f9ec9f76039 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-parameters.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/watchdog/watchdog-parameters.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-parameters.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/watchdog/watchdog-parameters.txt</a></div><div class='hunk'>@@ -208,6 +208,9 @@ nowayout: Watchdog cannot be stopped once started</div><div class='ctx'> -------------------------------------------------</div><div class='ctx'> omap_wdt:</div><div class='ctx'> timer_margin: initial watchdog timeout (in seconds)</div><div class='add'>+early_enable: Watchdog is started on module insertion (default=0</div><div class='add'>+nowayout: Watchdog cannot be stopped once started</div><div class='add'>+	(default=kernel config parameter)</div><div class='ctx'> -------------------------------------------------</div><div class='ctx'> orion_wdt:</div><div class='ctx'> heartbeat: Initial watchdog heartbeat in seconds</div><div class='head'>diff --git a/Documentation/workqueue.txt b/Documentation/workqueue.txt<br/>index f81a65b54c29..5e0e05c5183e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/workqueue.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/workqueue.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/workqueue.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/workqueue.txt</a></div><div class='hunk'>@@ -365,7 +365,7 @@ root      5674  0.0  0.0      0     0 ?        S    12:13   0:00 [kworker/1:0]</div><div class='ctx'> If kworkers are going crazy (using too much cpu), there are two types</div><div class='ctx'> of possible problems:</div><div class='ctx'> </div><div class='del'>-	1. Something beeing scheduled in rapid succession</div><div class='add'>+	1. Something being scheduled in rapid succession</div><div class='ctx'> 	2. A single work item that consumes lots of cpu cycles</div><div class='ctx'> </div><div class='ctx'> The first one can be tracked using tracing:</div><div class='head'>diff --git a/Documentation/x86/boot.txt b/Documentation/x86/boot.txt<br/>index 88b85899d309..9da6f3512249 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/boot.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/boot.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/boot.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/boot.txt</a></div><div class='hunk'>@@ -406,7 +406,7 @@ Protocol:	2.00+</div><div class='ctx'> 	- If 0, the protected-mode code is loaded at 0x10000.</div><div class='ctx'> 	- If 1, the protected-mode code is loaded at 0x100000.</div><div class='ctx'> </div><div class='del'>-  Bit 1 (kernel internal): ALSR_FLAG</div><div class='add'>+  Bit 1 (kernel internal): KASLR_FLAG</div><div class='ctx'> 	- Used internally by the compressed kernel to communicate</div><div class='ctx'> 	  KASLR status to kernel proper.</div><div class='ctx'> 	  If 1, KASLR enabled.</div><div class='hunk'>@@ -1124,7 +1124,6 @@ The boot loader *must* fill out the following fields in bp,</div><div class='ctx'> </div><div class='ctx'>     o hdr.code32_start</div><div class='ctx'>     o hdr.cmd_line_ptr</div><div class='del'>-    o hdr.cmdline_size</div><div class='ctx'>     o hdr.ramdisk_image (if applicable)</div><div class='ctx'>     o hdr.ramdisk_size  (if applicable)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/x86/entry_64.txt b/Documentation/x86/entry_64.txt<br/>index 9132b86176a3..c1df8eba9dfd 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/entry_64.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/entry_64.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/entry_64.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/entry_64.txt</a></div><div class='hunk'>@@ -1,14 +1,14 @@</div><div class='ctx'> This file documents some of the kernel entries in</div><div class='del'>-arch/x86/kernel/entry_64.S.  A lot of this explanation is adapted from</div><div class='add'>+arch/x86/entry/entry_64.S.  A lot of this explanation is adapted from</div><div class='ctx'> an email from Ingo Molnar:</div><div class='ctx'> </div><div class='ctx'> http://lkml.kernel.org/r/&lt;20110529191055.GC9835%40elte.hu&gt;</div><div class='ctx'> </div><div class='ctx'> The x86 architecture has quite a few different ways to jump into</div><div class='ctx'> kernel code.  Most of these entry points are registered in</div><div class='del'>-arch/x86/kernel/traps.c and implemented in arch/x86/kernel/entry_64.S</div><div class='del'>-for 64-bit, arch/x86/kernel/entry_32.S for 32-bit and finally</div><div class='del'>-arch/x86/ia32/ia32entry.S which implements the 32-bit compatibility</div><div class='add'>+arch/x86/kernel/traps.c and implemented in arch/x86/entry/entry_64.S</div><div class='add'>+for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally</div><div class='add'>+arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility</div><div class='ctx'> syscall entry points and thus provides for 32-bit processes the</div><div class='ctx'> ability to execute syscalls when running on 64-bit kernels.</div><div class='ctx'> </div><div class='hunk'>@@ -18,10 +18,10 @@ Some of these entries are:</div><div class='ctx'> </div><div class='ctx'>  - system_call: syscall instruction from 64-bit code.</div><div class='ctx'> </div><div class='del'>- - ia32_syscall: int 0x80 from 32-bit or 64-bit code; compat syscall</div><div class='add'>+ - entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall</div><div class='ctx'>    either way.</div><div class='ctx'> </div><div class='del'>- - ia32_syscall, ia32_sysenter: syscall and sysenter from 32-bit</div><div class='add'>+ - entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit</div><div class='ctx'>    code</div><div class='ctx'> </div><div class='ctx'>  - interrupt: An array of entries.  Every IDT vector that doesn't</div><div class='head'>diff --git a/Documentation/x86/x86_64/kernel-stacks b/Documentation/x86/kernel-stacks<br/>index e3c8a49d1a2f..0f3a6c201943 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/x86_64/kernel-stacks?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/x86_64/kernel-stacks</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/kernel-stacks?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/kernel-stacks</a></div><div class='hunk'>@@ -1,3 +1,6 @@</div><div class='add'>+Kernel stacks on x86-64 bit</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='ctx'> Most of the text from Keith Owens, hacked by AK</div><div class='ctx'> </div><div class='ctx'> x86_64 page size (PAGE_SIZE) is 4K.</div><div class='hunk'>@@ -56,13 +59,6 @@ If that assumption is ever broken then the stacks will become corrupt.</div><div class='ctx'> </div><div class='ctx'> The currently assigned IST stacks are :-</div><div class='ctx'> </div><div class='del'>-* STACKFAULT_STACK.  EXCEPTION_STKSZ (PAGE_SIZE).</div><div class='del'>-</div><div class='del'>-  Used for interrupt 12 - Stack Fault Exception (#SS).</div><div class='del'>-</div><div class='del'>-  This allows the CPU to recover from invalid stack segments. Rarely</div><div class='del'>-  happens.</div><div class='del'>-</div><div class='ctx'> * DOUBLEFAULT_STACK.  EXCEPTION_STKSZ (PAGE_SIZE).</div><div class='ctx'> </div><div class='ctx'>   Used for interrupt 8 - Double Fault Exception (#DF).</div><div class='hunk'>@@ -99,3 +95,47 @@ The currently assigned IST stacks are :-</div><div class='ctx'>   assumptions about the previous state of the kernel stack.</div><div class='ctx'> </div><div class='ctx'> For more details see the Intel IA32 or AMD AMD64 architecture manuals.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Printing backtraces on x86</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+The question about the '?' preceding function names in an x86 stacktrace</div><div class='add'>+keeps popping up, here's an indepth explanation. It helps if the reader</div><div class='add'>+stares at print_context_stack() and the whole machinery in and around</div><div class='add'>+arch/x86/kernel/dumpstack.c.</div><div class='add'>+</div><div class='add'>+Adapted from Ingo's mail, Message-ID: &lt;20150521101614.GA10889@gmail.com&gt;:</div><div class='add'>+</div><div class='add'>+We always scan the full kernel stack for return addresses stored on</div><div class='add'>+the kernel stack(s) [*], from stack top to stack bottom, and print out</div><div class='add'>+anything that 'looks like' a kernel text address.</div><div class='add'>+</div><div class='add'>+If it fits into the frame pointer chain, we print it without a question</div><div class='add'>+mark, knowing that it's part of the real backtrace.</div><div class='add'>+</div><div class='add'>+If the address does not fit into our expected frame pointer chain we</div><div class='add'>+still print it, but we print a '?'. It can mean two things:</div><div class='add'>+</div><div class='add'>+ - either the address is not part of the call chain: it's just stale</div><div class='add'>+   values on the kernel stack, from earlier function calls. This is</div><div class='add'>+   the common case.</div><div class='add'>+</div><div class='add'>+ - or it is part of the call chain, but the frame pointer was not set</div><div class='add'>+   up properly within the function, so we don't recognize it.</div><div class='add'>+</div><div class='add'>+This way we will always print out the real call chain (plus a few more</div><div class='add'>+entries), regardless of whether the frame pointer was set up correctly</div><div class='add'>+or not - but in most cases we'll get the call chain right as well. The</div><div class='add'>+entries printed are strictly in stack order, so you can deduce more</div><div class='add'>+information from that as well.</div><div class='add'>+</div><div class='add'>+The most important property of this method is that we _never_ lose</div><div class='add'>+information: we always strive to print _all_ addresses on the stack(s)</div><div class='add'>+that look like kernel text addresses, so if debug information is wrong,</div><div class='add'>+we still print out the real call chain as well - just with more question</div><div class='add'>+marks than ideal.</div><div class='add'>+</div><div class='add'>+[*] For things like IRQ and IST stacks, we also scan those stacks, in</div><div class='add'>+    the right order, and try to cross from one stack into another</div><div class='add'>+    reconstructing the call chain. This works most of the time.</div><div class='head'>diff --git a/Documentation/x86/mtrr.txt b/Documentation/x86/mtrr.txt<br/>index cc071dc333c2..860bc3adc223 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/mtrr.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/mtrr.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/mtrr.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/mtrr.txt</a></div><div class='hunk'>@@ -1,7 +1,19 @@</div><div class='ctx'> MTRR (Memory Type Range Register) control</div><div class='del'>-3 Jun 1999</div><div class='del'>-Richard Gooch</div><div class='del'>-&lt;rgooch@atnf.csiro.au&gt;</div><div class='add'>+</div><div class='add'>+Richard Gooch &lt;rgooch@atnf.csiro.au&gt; - 3 Jun 1999</div><div class='add'>+Luis R. Rodriguez &lt;mcgrof@do-not-panic.com&gt; - April 9, 2015</div><div class='add'>+</div><div class='add'>+===============================================================================</div><div class='add'>+Phasing out MTRR use</div><div class='add'>+</div><div class='add'>+MTRR use is replaced on modern x86 hardware with PAT. Over time the only type</div><div class='add'>+of effective MTRR that is expected to be supported will be for write-combining.</div><div class='add'>+As MTRR use is phased out device drivers should use arch_phys_wc_add() to make</div><div class='add'>+MTRR effective on non-PAT systems while a no-op on PAT enabled systems.</div><div class='add'>+</div><div class='add'>+For details refer to Documentation/x86/pat.txt.</div><div class='add'>+</div><div class='add'>+===============================================================================</div><div class='ctx'> </div><div class='ctx'>   On Intel P6 family processors (Pentium Pro, Pentium II and later)</div><div class='ctx'>   the Memory Type Range Registers (MTRRs) may be used to control</div><div class='head'>diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt<br/>index cf08c9fff3cd..54944c71b819 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/pat.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/pat.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/pat.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/pat.txt</a></div><div class='hunk'>@@ -12,7 +12,7 @@ virtual addresses.</div><div class='ctx'> </div><div class='ctx'> PAT allows for different types of memory attributes. The most commonly used</div><div class='ctx'> ones that will be supported at this time are Write-back, Uncached,</div><div class='del'>-Write-combined and Uncached Minus.</div><div class='add'>+Write-combined, Write-through and Uncached Minus.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> PAT APIs</div><div class='hunk'>@@ -34,16 +34,23 @@ ioremap                |    --    |    UC-     |       UC-        |</div><div class='ctx'>                        |          |            |                  |</div><div class='ctx'> ioremap_cache          |    --    |    WB      |       WB         |</div><div class='ctx'>                        |          |            |                  |</div><div class='add'>+ioremap_uc             |    --    |    UC      |       UC         |</div><div class='add'>+                       |          |            |                  |</div><div class='ctx'> ioremap_nocache        |    --    |    UC-     |       UC-        |</div><div class='ctx'>                        |          |            |                  |</div><div class='ctx'> ioremap_wc             |    --    |    --      |       WC         |</div><div class='ctx'>                        |          |            |                  |</div><div class='add'>+ioremap_wt             |    --    |    --      |       WT         |</div><div class='add'>+                       |          |            |                  |</div><div class='ctx'> set_memory_uc          |    UC-   |    --      |       --         |</div><div class='ctx'>  set_memory_wb         |          |            |                  |</div><div class='ctx'>                        |          |            |                  |</div><div class='ctx'> set_memory_wc          |    WC    |    --      |       --         |</div><div class='ctx'>  set_memory_wb         |          |            |                  |</div><div class='ctx'>                        |          |            |                  |</div><div class='add'>+set_memory_wt          |    WT    |    --      |       --         |</div><div class='add'>+ set_memory_wb         |          |            |                  |</div><div class='add'>+                       |          |            |                  |</div><div class='ctx'> pci sysfs resource     |    --    |    --      |       UC-        |</div><div class='ctx'>                        |          |            |                  |</div><div class='ctx'> pci sysfs resource_wc  |    --    |    --      |       WC         |</div><div class='hunk'>@@ -102,7 +109,38 @@ wants to export a RAM region, it has to do set_memory_uc() or set_memory_wc()</div><div class='ctx'> as step 0 above and also track the usage of those pages and use set_memory_wb()</div><div class='ctx'> before the page is freed to free pool.</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+MTRR effects on PAT / non-PAT systems</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+The following table provides the effects of using write-combining MTRRs when</div><div class='add'>+using ioremap*() calls on x86 for both non-PAT and PAT systems. Ideally</div><div class='add'>+mtrr_add() usage will be phased out in favor of arch_phys_wc_add() which will</div><div class='add'>+be a no-op on PAT enabled systems. The region over which a arch_phys_wc_add()</div><div class='add'>+is made, should already have been ioremapped with WC attributes or PAT entries,</div><div class='add'>+this can be done by using ioremap_wc() / set_memory_wc().  Devices which</div><div class='add'>+combine areas of IO memory desired to remain uncacheable with areas where</div><div class='add'>+write-combining is desirable should consider use of ioremap_uc() followed by</div><div class='add'>+set_memory_wc() to white-list effective write-combined areas.  Such use is</div><div class='add'>+nevertheless discouraged as the effective memory type is considered</div><div class='add'>+implementation defined, yet this strategy can be used as last resort on devices</div><div class='add'>+with size-constrained regions where otherwise MTRR write-combining would</div><div class='add'>+otherwise not be effective.</div><div class='add'>+</div><div class='add'>+----------------------------------------------------------------------</div><div class='add'>+MTRR Non-PAT   PAT    Linux ioremap value        Effective memory type</div><div class='add'>+----------------------------------------------------------------------</div><div class='add'>+                                                  Non-PAT |  PAT</div><div class='add'>+     PAT</div><div class='add'>+     |PCD</div><div class='add'>+     ||PWT</div><div class='add'>+     |||</div><div class='add'>+WC   000      WB      _PAGE_CACHE_MODE_WB            WC   |   WC</div><div class='add'>+WC   001      WC      _PAGE_CACHE_MODE_WC            WC*  |   WC</div><div class='add'>+WC   010      UC-     _PAGE_CACHE_MODE_UC_MINUS      WC*  |   UC</div><div class='add'>+WC   011      UC      _PAGE_CACHE_MODE_UC            UC   |   UC</div><div class='add'>+----------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+(*) denotes implementation defined and is discouraged</div><div class='ctx'> </div><div class='ctx'> Notes:</div><div class='ctx'> </div><div class='hunk'>@@ -115,8 +153,8 @@ can be more restrictive, in case of any existing aliasing for that address.</div><div class='ctx'> For example: If there is an existing uncached mapping, a new ioremap_wc can</div><div class='ctx'> return uncached mapping in place of write-combine requested.</div><div class='ctx'> </div><div class='del'>-set_memory_[uc|wc] and set_memory_wb should be used in pairs, where driver will</div><div class='del'>-first make a region uc or wc and switch it back to wb after use.</div><div class='add'>+set_memory_[uc|wc|wt] and set_memory_wb should be used in pairs, where driver</div><div class='add'>+will first make a region uc, wc or wt and switch it back to wb after use.</div><div class='ctx'> </div><div class='ctx'> Over time writes to /proc/mtrr will be deprecated in favor of using PAT based</div><div class='ctx'> interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.</div><div class='hunk'>@@ -124,7 +162,7 @@ interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.</div><div class='ctx'> Drivers should use ioremap_[uc|wc] to access PCI BARs with [uc|wc] access</div><div class='ctx'> types.</div><div class='ctx'> </div><div class='del'>-Drivers should use set_memory_[uc|wc] to set access type for RAM ranges.</div><div class='add'>+Drivers should use set_memory_[uc|wc|wt] to set access type for RAM ranges.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> PAT debugging</div><div class='head'>diff --git a/Documentation/x86/x86_64/boot-options.txt b/Documentation/x86/x86_64/boot-options.txt<br/>index 5223479291a2..68ed3114c363 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/x86/x86_64/boot-options.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/x86/x86_64/boot-options.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/x86_64/boot-options.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/x86/x86_64/boot-options.txt</a></div><div class='hunk'>@@ -31,6 +31,9 @@ Machine check</div><div class='ctx'> 		(e.g. BIOS or hardware monitoring applications), conflicting</div><div class='ctx'> 		with OS's error handling, and you cannot deactivate the agent,</div><div class='ctx'> 		then this option will be a help.</div><div class='add'>+   mce=no_lmce</div><div class='add'>+		Do not opt-in to Local MCE delivery. Use legacy method</div><div class='add'>+		to broadcast MCEs.</div><div class='ctx'>    mce=bootlog</div><div class='ctx'> 		Enable logging of machine checks left over from booting.</div><div class='ctx'> 		Disabled by default on AMD because some BIOS leave bogus ones.</div><div class='head'>diff --git a/Documentation/zh_CN/gpio.txt b/Documentation/zh_CN/gpio.txt<br/>index d5b8f01833f4..bce972521065 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/zh_CN/gpio.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/zh_CN/gpio.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/zh_CN/gpio.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/zh_CN/gpio.txt</a></div><div class='hunk'>@@ -638,9 +638,6 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO</div><div class='ctx'> 	int gpio_export_link(struct device *dev, const char *name,</div><div class='ctx'> 		unsigned gpio)</div><div class='ctx'> </div><div class='del'>-	/* 改� sysfs 中的一个 GPIO 节点的�性 */</div><div class='del'>-	int gpio_sysfs_set_active_low(unsigned gpio, int value);</div><div class='del'>-</div><div class='ctx'> 在一个内核驱动申请一个 GPIO 之�，它�以通过 gpio_export()使其在 sysfs</div><div class='ctx'> 接�中��。该驱动�以控制信�方�是��修改。这有助于防止用户空间代�无�间</div><div class='ctx'> 破���的系统状�。</div><div class='hunk'>@@ -651,8 +648,3 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO</div><div class='ctx'> 在 GPIO 被导出之�，gpio_export_link()�许在 sysfs 文件系统的任何地方</div><div class='ctx'> 创建一个到这个 GPIO sysfs 节点的符�链接。这样驱动就�以通过一个�述性的</div><div class='ctx'> �字，在 sysfs 中他们所拥有的设备下�供一个(到这个 GPIO sysfs 节点的)接�。</div><div class='del'>-</div><div class='del'>-驱动�以使用 gpio_sysfs_set_active_low() �在用户空间��电路�之间</div><div class='del'>-GPIO 线的�性差异。这个仅对 sysfs 接�起作用。�性的改��以在 gpio_export()</div><div class='del'>-��进行,且之�使能的轮询�作(poll(2))支�(上�或下�沿)将会被�新�置��循</div><div class='del'>-这个设置。</div><div class='head'>diff --git a/Documentation/zh_CN/magic-number.txt b/Documentation/zh_CN/magic-number.txt<br/>index dfb72a5c63e9..e9db693c0a23 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/zh_CN/magic-number.txt?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Documentation/zh_CN/magic-number.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/zh_CN/magic-number.txt?id=527c465a3c8716d93201ae34b7fc52679610596d'>Documentation/zh_CN/magic-number.txt</a></div><div class='hunk'>@@ -116,7 +116,6 @@ COW_MAGIC             0x4f4f4f4d  cow_header_v1     arch/um/drivers/ubd_user.c</div><div class='ctx'> I810_CARD_MAGIC       0x5072696E  i810_card         sound/oss/i810_audio.c</div><div class='ctx'> TRIDENT_CARD_MAGIC    0x5072696E  trident_card      sound/oss/trident.c</div><div class='ctx'> ROUTER_MAGIC          0x524d4157  wan_device        [in wanrouter.h pre 3.9]</div><div class='del'>-SCC_MAGIC             0x52696368  gs_port           drivers/char/scc.h</div><div class='ctx'> SAVEKMSG_MAGIC1       0x53415645  savekmsg          arch/*/amiga/config.c</div><div class='ctx'> GDA_MAGIC             0x58464552  gda               arch/mips/include/asm/sn/gda.h</div><div class='ctx'> RED_MAGIC1            0x5a2cf071  (any)             mm/slab.c</div><div class='hunk'>@@ -138,7 +137,6 @@ KMALLOC_MAGIC         0x87654321  snd_alloc_track   sound/core/memory.c</div><div class='ctx'> PWC_MAGIC             0x89DC10AB  pwc_device        drivers/usb/media/pwc.h</div><div class='ctx'> NBD_REPLY_MAGIC       0x96744668  nbd_reply         include/linux/nbd.h</div><div class='ctx'> ENI155_MAGIC          0xa54b872d  midway_eprom	    drivers/atm/eni.h</div><div class='del'>-SCI_MAGIC             0xbabeface  gs_port           drivers/char/sh-sci.h</div><div class='ctx'> CODA_MAGIC            0xC0DAC0DA  coda_file_info    include/linux/coda_fs_i.h</div><div class='ctx'> DPMEM_MAGIC           0xc0ffee11  gdt_pci_sram      drivers/scsi/gdth.h</div><div class='ctx'> YAM_MAGIC             0xF10A7654  yam_port          drivers/net/hamradio/yam.c</div><div class='head'>diff --git a/Kbuild b/Kbuild<br/>index 6f0d82a9245d..f55cefd9bf29 100644<br/>--- a/<a href='/drm-misc/tree/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>Kbuild</a></div><div class='hunk'>@@ -2,8 +2,9 @@</div><div class='ctx'> # Kbuild for top-level directory of the kernel</div><div class='ctx'> # This file takes care of the following:</div><div class='ctx'> # 1) Generate bounds.h</div><div class='del'>-# 2) Generate asm-offsets.h (may need bounds.h)</div><div class='del'>-# 3) Check for missing system calls</div><div class='add'>+# 2) Generate timeconst.h</div><div class='add'>+# 3) Generate asm-offsets.h (may need bounds.h and timeconst.h)</div><div class='add'>+# 4) Check for missing system calls</div><div class='ctx'> </div><div class='ctx'> # Default sed regexp - multiline due to syntax constraints</div><div class='ctx'> define sed-y</div><div class='hunk'>@@ -47,7 +48,25 @@ $(obj)/$(bounds-file): kernel/bounds.s FORCE</div><div class='ctx'> 	$(call filechk,offsets,__LINUX_BOUNDS_H__)</div><div class='ctx'> </div><div class='ctx'> #####</div><div class='del'>-# 2) Generate asm-offsets.h</div><div class='add'>+# 2) Generate timeconst.h</div><div class='add'>+</div><div class='add'>+timeconst-file := include/generated/timeconst.h</div><div class='add'>+</div><div class='add'>+targets += $(timeconst-file)</div><div class='add'>+</div><div class='add'>+quiet_cmd_gentimeconst = GEN     $@</div><div class='add'>+define cmd_gentimeconst</div><div class='add'>+	(echo $(CONFIG_HZ) | bc -q $&lt; ) &gt; $@</div><div class='add'>+endef</div><div class='add'>+define filechk_gentimeconst</div><div class='add'>+	(echo $(CONFIG_HZ) | bc -q $&lt; )</div><div class='add'>+endef</div><div class='add'>+</div><div class='add'>+$(obj)/$(timeconst-file): kernel/time/timeconst.bc FORCE</div><div class='add'>+	$(call filechk,gentimeconst)</div><div class='add'>+</div><div class='add'>+#####</div><div class='add'>+# 3) Generate asm-offsets.h</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> offsets-file := include/generated/asm-offsets.h</div><div class='hunk'>@@ -57,7 +76,7 @@ targets += arch/$(SRCARCH)/kernel/asm-offsets.s</div><div class='ctx'> </div><div class='ctx'> # We use internal kbuild rules to avoid the "is up to date" message from make</div><div class='ctx'> arch/$(SRCARCH)/kernel/asm-offsets.s: arch/$(SRCARCH)/kernel/asm-offsets.c \</div><div class='del'>-                                      $(obj)/$(bounds-file) FORCE</div><div class='add'>+                                      $(obj)/$(timeconst-file) $(obj)/$(bounds-file) FORCE</div><div class='ctx'> 	$(Q)mkdir -p $(dir $@)</div><div class='ctx'> 	$(call if_changed_dep,cc_s_c)</div><div class='ctx'> </div><div class='hunk'>@@ -65,7 +84,7 @@ $(obj)/$(offsets-file): arch/$(SRCARCH)/kernel/asm-offsets.s FORCE</div><div class='ctx'> 	$(call filechk,offsets,__ASM_OFFSETS_H__)</div><div class='ctx'> </div><div class='ctx'> #####</div><div class='del'>-# 3) Check for missing system calls</div><div class='add'>+# 4) Check for missing system calls</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> always += missing-syscalls</div><div class='hunk'>@@ -77,5 +96,5 @@ quiet_cmd_syscalls = CALL    $&lt;</div><div class='ctx'> missing-syscalls: scripts/checksyscalls.sh $(offsets-file) FORCE</div><div class='ctx'> 	$(call cmd,syscalls)</div><div class='ctx'> </div><div class='del'>-# Keep these two files during make clean</div><div class='del'>-no-clean-files := $(bounds-file) $(offsets-file)</div><div class='add'>+# Keep these three files during make clean</div><div class='add'>+no-clean-files := $(bounds-file) $(offsets-file) $(timeconst-file)</div><div class='head'>diff --git a/MAINTAINERS b/MAINTAINERS<br/>index 8939e1b29f6d..a2264167791a 100644<br/>--- a/<a href='/drm-misc/tree/MAINTAINERS?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>MAINTAINERS</a><br/>+++ b/<a href='/drm-misc/tree/MAINTAINERS?id=527c465a3c8716d93201ae34b7fc52679610596d'>MAINTAINERS</a></div><div class='hunk'>@@ -259,7 +259,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/acer-wmi.c</div><div class='ctx'> </div><div class='ctx'> ACPI</div><div class='del'>-M:	Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;</div><div class='add'>+M:	"Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;</div><div class='ctx'> M:	Len Brown &lt;lenb@kernel.org&gt;</div><div class='ctx'> L:	linux-acpi@vger.kernel.org</div><div class='ctx'> W:	https://01.org/linux-acpi</div><div class='hunk'>@@ -280,7 +280,7 @@ F:	tools/power/acpi/</div><div class='ctx'> ACPI COMPONENT ARCHITECTURE (ACPICA)</div><div class='ctx'> M:	Robert Moore &lt;robert.moore@intel.com&gt;</div><div class='ctx'> M:	Lv Zheng &lt;lv.zheng@intel.com&gt;</div><div class='del'>-M:	Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;</div><div class='add'>+M:	"Rafael J. Wysocki" &lt;rafael.j.wysocki@intel.com&gt;</div><div class='ctx'> L:	linux-acpi@vger.kernel.org</div><div class='ctx'> L:	devel@acpica.org</div><div class='ctx'> W:	https://acpica.org/</div><div class='hunk'>@@ -361,11 +361,11 @@ S:	Supported</div><div class='ctx'> F:	drivers/input/touchscreen/ad7879.c</div><div class='ctx'> </div><div class='ctx'> ADDRESS SPACE LAYOUT RANDOMIZATION (ASLR)</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='ctx'> ADM1025 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/adm1025</div><div class='hunk'>@@ -430,7 +430,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/macintosh/therm_adt746x.c</div><div class='ctx'> </div><div class='ctx'> ADT7475 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/adt7475</div><div class='hunk'>@@ -445,6 +445,7 @@ F:	drivers/input/misc/adxl34x.c</div><div class='ctx'> </div><div class='ctx'> ADVANSYS SCSI DRIVER</div><div class='ctx'> M:	Matthew Wilcox &lt;matthew@wil.cx&gt;</div><div class='add'>+M:	Hannes Reinecke &lt;hare@suse.com&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/scsi/advansys.txt</div><div class='hunk'>@@ -505,7 +506,7 @@ F:	drivers/scsi/aha152x*</div><div class='ctx'> F:	drivers/scsi/pcmcia/aha152x*</div><div class='ctx'> </div><div class='ctx'> AIC7XXX / AIC79XX SCSI DRIVER</div><div class='del'>-M:	Hannes Reinecke &lt;hare@suse.de&gt;</div><div class='add'>+M:	Hannes Reinecke &lt;hare@suse.com&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/scsi/aic7xxx/</div><div class='hunk'>@@ -631,7 +632,7 @@ F:	drivers/iommu/amd_iommu*.[ch]</div><div class='ctx'> F:	include/linux/amd-iommu.h</div><div class='ctx'> </div><div class='ctx'> AMD KFD</div><div class='del'>-M:	Oded Gabbay &lt;oded.gabbay@amd.com&gt;</div><div class='add'>+M:	Oded Gabbay &lt;oded.gabbay@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> T:	git git://people.freedesktop.org/~gabbayo/linux.git</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -652,7 +653,6 @@ M:	Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/net/ethernet/amd/xgbe/</div><div class='del'>-F:	drivers/net/phy/amd-xgbe-phy.c</div><div class='ctx'> </div><div class='ctx'> AMS (Apple Motion Sensor) DRIVER</div><div class='ctx'> M:	Michael Hanselmann &lt;linux-kernel@hansmi.ch&gt;</div><div class='hunk'>@@ -732,7 +732,7 @@ ANDROID DRIVERS</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> M:	Arve Hjønnevåg &lt;arve@android.com&gt;</div><div class='ctx'> M:	Riley Andrews &lt;riandrews@android.com&gt;</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/gregkh/staging.git</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git</div><div class='ctx'> L:	devel@driverdev.osuosl.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/android/</div><div class='hunk'>@@ -746,7 +746,7 @@ S:	Maintained</div><div class='ctx'> F:	sound/aoa/</div><div class='ctx'> </div><div class='ctx'> APM DRIVER</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> S:	Odd fixes</div><div class='ctx'> F:	arch/x86/kernel/apm_32.c</div><div class='ctx'> F:	include/linux/apm_bios.h</div><div class='hunk'>@@ -922,6 +922,13 @@ M:	Krzysztof Halasa &lt;khalasa@piap.pl&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-cns3xxx/</div><div class='ctx'> </div><div class='add'>+ARM/CAVIUM THUNDER NETWORK DRIVER</div><div class='add'>+M:	Sunil Goutham &lt;sgoutham@cavium.com&gt;</div><div class='add'>+M:	Robert Richter &lt;rric@kernel.org&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/net/ethernet/cavium/</div><div class='add'>+</div><div class='ctx'> ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE</div><div class='ctx'> M:	Alexander Shiyan &lt;shc_work@mail.ru&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -977,6 +984,7 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> T:	git git://github.com/ulli-kroll/linux.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-gemini/</div><div class='add'>+F:	drivers/rtc/rtc-gemini.c</div><div class='ctx'> </div><div class='ctx'> ARM/CSR SIRFPRIMA2 MACHINE SUPPORT</div><div class='ctx'> M:	Barry Song &lt;baohua@kernel.org&gt;</div><div class='hunk'>@@ -993,6 +1001,7 @@ ARM/CONEXANT DIGICOLOR MACHINE SUPPORT</div><div class='ctx'> M:	Baruch Siach &lt;baruch@tkos.co.il&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	arch/arm/boot/dts/cx92755*</div><div class='ctx'> N:	digicolor</div><div class='ctx'> </div><div class='ctx'> ARM/EBSA110 MACHINE SUPPORT</div><div class='hunk'>@@ -1035,7 +1044,7 @@ F:	arch/arm/include/asm/hardware/dec21285.h</div><div class='ctx'> F:	arch/arm/mach-footbridge/</div><div class='ctx'> </div><div class='ctx'> ARM/FREESCALE IMX / MXC ARM ARCHITECTURE</div><div class='del'>-M:	Shawn Guo &lt;shawn.guo@linaro.org&gt;</div><div class='add'>+M:	Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='ctx'> M:	Sascha Hauer &lt;kernel@pengutronix.de&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -1044,9 +1053,11 @@ F:	arch/arm/mach-imx/</div><div class='ctx'> F:	arch/arm/mach-mxs/</div><div class='ctx'> F:	arch/arm/boot/dts/imx*</div><div class='ctx'> F:	arch/arm/configs/imx*_defconfig</div><div class='add'>+F:	drivers/clk/imx/</div><div class='add'>+F:	include/soc/imx/</div><div class='ctx'> </div><div class='ctx'> ARM/FREESCALE VYBRID ARM ARCHITECTURE</div><div class='del'>-M:	Shawn Guo &lt;shawn.guo@linaro.org&gt;</div><div class='add'>+M:	Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='ctx'> M:	Sascha Hauer &lt;kernel@pengutronix.de&gt;</div><div class='ctx'> R:	Stefan Agner &lt;stefan@agner.ch&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -1189,6 +1200,12 @@ M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='add'>+ARM/LPC18XX ARCHITECTURE</div><div class='add'>+M:	Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+N:	lpc18xx</div><div class='add'>+</div><div class='ctx'> ARM/MAGICIAN MACHINE SUPPORT</div><div class='ctx'> M:	Philipp Zabel &lt;philipp.zabel@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -1236,6 +1253,13 @@ W:	http://www.digriz.org.uk/ts78xx/kernel</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-orion5x/ts78xx-*</div><div class='ctx'> </div><div class='add'>+ARM/Mediatek RTC DRIVER</div><div class='add'>+M:	Eddie Huang &lt;eddie.huang@mediatek.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+L:	linux-mediatek@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/rtc/rtc-mt6397.c</div><div class='add'>+</div><div class='ctx'> ARM/Mediatek SoC support</div><div class='ctx'> M:	Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -1301,7 +1325,7 @@ F:	arch/arm/mach-pxa/include/mach/palmtc.h</div><div class='ctx'> F:	arch/arm/mach-pxa/palmtc.c</div><div class='ctx'> </div><div class='ctx'> ARM/PALM TREO SUPPORT</div><div class='del'>-M:	Tomas Cech &lt;sleep_walker@suse.cz&gt;</div><div class='add'>+M:	Tomas Cech &lt;sleep_walker@suse.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org</div><div class='ctx'> W:	http://hackndev.com</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -1385,6 +1409,7 @@ L:	linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/boot/dts/s3c*</div><div class='ctx'> F:	arch/arm/boot/dts/exynos*</div><div class='add'>+F:	arch/arm64/boot/dts/exynos/</div><div class='ctx'> F:	arch/arm/plat-samsung/</div><div class='ctx'> F:	arch/arm/mach-s3c24*/</div><div class='ctx'> F:	arch/arm/mach-s3c64xx/</div><div class='hunk'>@@ -1488,12 +1513,22 @@ F:	drivers/phy/phy-stih407-usb.c</div><div class='ctx'> F:	drivers/phy/phy-stih41x-usb.c</div><div class='ctx'> F:	drivers/pinctrl/pinctrl-st.c</div><div class='ctx'> F:	drivers/reset/sti/</div><div class='add'>+F:	drivers/rtc/rtc-st-lpc.c</div><div class='ctx'> F:	drivers/tty/serial/st-asc.c</div><div class='ctx'> F:	drivers/usb/dwc3/dwc3-st.c</div><div class='ctx'> F:	drivers/usb/host/ehci-st.c</div><div class='ctx'> F:	drivers/usb/host/ohci-st.c</div><div class='add'>+F:	drivers/watchdog/st_lpc_wdt.c</div><div class='ctx'> F:	drivers/ata/ahci_st.c</div><div class='ctx'> </div><div class='add'>+ARM/STM32 ARCHITECTURE</div><div class='add'>+M:	Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32.git</div><div class='add'>+N:	stm32</div><div class='add'>+F:	drivers/clocksource/armv7m_systick.c</div><div class='add'>+</div><div class='ctx'> ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT</div><div class='ctx'> M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -1540,6 +1575,13 @@ F:	drivers/rtc/rtc-ab3100.c</div><div class='ctx'> F:	drivers/rtc/rtc-coh901331.c</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git</div><div class='ctx'> </div><div class='add'>+ARM/UNIPHIER ARCHITECTURE</div><div class='add'>+M:	Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/arm/mach-uniphier/</div><div class='add'>+N:	uniphier</div><div class='add'>+</div><div class='ctx'> ARM/Ux500 ARM ARCHITECTURE</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -1573,6 +1615,7 @@ M:	Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/boot/dts/vexpress*</div><div class='add'>+F:	arch/arm64/boot/dts/arm/vexpress*</div><div class='ctx'> F:	arch/arm/mach-vexpress/</div><div class='ctx'> F:	*/*/vexpress*</div><div class='ctx'> F:	*/*/*/vexpress*</div><div class='hunk'>@@ -1617,6 +1660,15 @@ S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-pxa/z2.c</div><div class='ctx'> F:	arch/arm/mach-pxa/include/mach/z2.h</div><div class='ctx'> </div><div class='add'>+ARM/ZTE ARCHITECTURE</div><div class='add'>+M:	Jun Nie &lt;jun.nie@linaro.org&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/arm/mach-zx/</div><div class='add'>+F:	drivers/clk/zte/</div><div class='add'>+F:	Documentation/devicetree/bindings/arm/zte.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/clock/zx296702-clk.txt</div><div class='add'>+</div><div class='ctx'> ARM/ZYNQ ARCHITECTURE</div><div class='ctx'> M:	Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> R:	Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt;</div><div class='hunk'>@@ -1634,11 +1686,12 @@ F:	drivers/i2c/busses/i2c-cadence.c</div><div class='ctx'> F:	drivers/mmc/host/sdhci-of-arasan.c</div><div class='ctx'> F:	drivers/edac/synopsys_edac.c</div><div class='ctx'> </div><div class='del'>-ARM SMMU DRIVER</div><div class='add'>+ARM SMMU DRIVERS</div><div class='ctx'> M:	Will Deacon &lt;will.deacon@arm.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/iommu/arm-smmu.c</div><div class='add'>+F:	drivers/iommu/arm-smmu-v3.c</div><div class='ctx'> F:	drivers/iommu/io-pgtable-arm.c</div><div class='ctx'> </div><div class='ctx'> ARM64 PORT (AARCH64 ARCHITECTURE)</div><div class='hunk'>@@ -1869,6 +1922,14 @@ W:	http://www.attotech.com</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/scsi/esas2r</div><div class='ctx'> </div><div class='add'>+ATUSB IEEE 802.15.4 RADIO DRIVER</div><div class='add'>+M:	Stefan Schmidt &lt;stefan@osg.samsung.com&gt;</div><div class='add'>+L:	linux-wpan@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/net/ieee802154/atusb.c</div><div class='add'>+F:	drivers/net/ieee802154/atusb.h</div><div class='add'>+F:	drivers/net/ieee802154/at86rf230.h</div><div class='add'>+</div><div class='ctx'> AUDIT SUBSYSTEM</div><div class='ctx'> M:	Paul Moore &lt;paul@paul-moore.com&gt;</div><div class='ctx'> M:	Eric Paris &lt;eparis@redhat.com&gt;</div><div class='hunk'>@@ -1967,12 +2028,20 @@ S:	Maintained</div><div class='ctx'> F:	drivers/net/hamradio/baycom*</div><div class='ctx'> </div><div class='ctx'> BCACHE (BLOCK LAYER CACHE)</div><div class='del'>-M:	Kent Overstreet &lt;kmo@daterainc.com&gt;</div><div class='add'>+M:	Kent Overstreet &lt;kent.overstreet@gmail.com&gt;</div><div class='ctx'> L:	linux-bcache@vger.kernel.org</div><div class='ctx'> W:	http://bcache.evilpiepirate.org</div><div class='del'>-S:	Maintained:</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	drivers/md/bcache/</div><div class='ctx'> </div><div class='add'>+BDISP ST MEDIA DRIVER</div><div class='add'>+M:	Fabien Dessenne &lt;fabien.dessenne@st.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+T:	git git://linuxtv.org/media_tree.git</div><div class='add'>+W:	http://linuxtv.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/media/platform/sti/bdisp</div><div class='add'>+</div><div class='ctx'> BEFS FILE SYSTEM</div><div class='ctx'> S:	Orphan</div><div class='ctx'> F:	Documentation/filesystems/befs.txt</div><div class='hunk'>@@ -2057,6 +2126,7 @@ M:	Jens Axboe &lt;axboe@kernel.dk&gt;</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	block/</div><div class='add'>+F:	kernel/trace/blktrace.c</div><div class='ctx'> </div><div class='ctx'> BLOCK2MTD DRIVER</div><div class='ctx'> M:	Joern Engel &lt;joern@lazybastard.org&gt;</div><div class='hunk'>@@ -2161,6 +2231,14 @@ F:	arch/mips/bcm3384/*</div><div class='ctx'> F:	arch/mips/include/asm/mach-bcm3384/*</div><div class='ctx'> F:	arch/mips/kernel/*bmips*</div><div class='ctx'> </div><div class='add'>+BROADCOM BCM47XX MIPS ARCHITECTURE</div><div class='add'>+M:	Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+M:	Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+L:	linux-mips@linux-mips.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/mips/bcm47xx/*</div><div class='add'>+F:	arch/mips/include/asm/mach-bcm47xx/*</div><div class='add'>+</div><div class='ctx'> BROADCOM BCM5301X ARM ARCHITECTURE</div><div class='ctx'> M:	Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org</div><div class='hunk'>@@ -2193,6 +2271,7 @@ S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-bcm/*brcmstb*</div><div class='ctx'> F:	arch/arm/boot/dts/bcm7*.dts*</div><div class='ctx'> F:	drivers/bus/brcmstb_gisb.c</div><div class='add'>+N:	brcmstb</div><div class='ctx'> </div><div class='ctx'> BROADCOM BMIPS MIPS ARCHITECTURE</div><div class='ctx'> M:	Kevin Cernekee &lt;cernekee@gmail.com&gt;</div><div class='hunk'>@@ -2203,7 +2282,7 @@ S:	Maintained</div><div class='ctx'> F:	arch/mips/bmips/*</div><div class='ctx'> F:	arch/mips/include/asm/mach-bmips/*</div><div class='ctx'> F:	arch/mips/kernel/*bmips*</div><div class='del'>-F:	arch/mips/boot/dts/bcm*.dts*</div><div class='add'>+F:	arch/mips/boot/dts/brcm/bcm*.dts*</div><div class='ctx'> F:	drivers/irqchip/irq-bcm7*</div><div class='ctx'> F:	drivers/irqchip/irq-brcmstb*</div><div class='ctx'> </div><div class='hunk'>@@ -2250,12 +2329,31 @@ N:	bcm9583*</div><div class='ctx'> N:	bcm583*</div><div class='ctx'> N:	bcm113*</div><div class='ctx'> </div><div class='add'>+BROADCOM BRCMSTB GPIO DRIVER</div><div class='add'>+M:	Gregory Fong &lt;gregory.0xf0@gmail.com&gt;</div><div class='add'>+L:	bcm-kernel-feedback-list@broadcom.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/gpio/gpio-brcmstb.c</div><div class='add'>+F:	Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt</div><div class='add'>+</div><div class='ctx'> BROADCOM KONA GPIO DRIVER</div><div class='ctx'> M:	Ray Jui &lt;rjui@broadcom.com&gt;</div><div class='ctx'> L:	bcm-kernel-feedback-list@broadcom.com</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/gpio/gpio-bcm-kona.c</div><div class='del'>-F:	Documentation/devicetree/bindings/gpio/gpio-bcm-kona.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt</div><div class='add'>+</div><div class='add'>+BROADCOM NVRAM DRIVER</div><div class='add'>+M:	Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+L:	linux-mips@linux-mips.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/firmware/broadcom/*</div><div class='add'>+</div><div class='add'>+BROADCOM STB NAND FLASH DRIVER</div><div class='add'>+M:	Brian Norris &lt;computersforpeace@gmail.com&gt;</div><div class='add'>+L:	linux-mtd@lists.infradead.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/mtd/nand/brcmnand/</div><div class='ctx'> </div><div class='ctx'> BROADCOM SPECIFIC AMBA DRIVER (BCMA)</div><div class='ctx'> M:	Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='hunk'>@@ -2308,7 +2406,7 @@ F:	drivers/gpio/gpio-bt8xx.c</div><div class='ctx'> BTRFS FILE SYSTEM</div><div class='ctx'> M:	Chris Mason &lt;clm@fb.com&gt;</div><div class='ctx'> M:	Josef Bacik &lt;jbacik@fb.com&gt;</div><div class='del'>-M:	David Sterba &lt;dsterba@suse.cz&gt;</div><div class='add'>+M:	David Sterba &lt;dsterba@suse.com&gt;</div><div class='ctx'> L:	linux-btrfs@vger.kernel.org</div><div class='ctx'> W:	http://btrfs.wiki.kernel.org/</div><div class='ctx'> Q:	http://patchwork.kernel.org/project/linux-btrfs/list/</div><div class='hunk'>@@ -2436,6 +2534,17 @@ S:	Maintained</div><div class='ctx'> F:	drivers/iio/light/cm*</div><div class='ctx'> F:	Documentation/devicetree/bindings/i2c/trivial-devices.txt</div><div class='ctx'> </div><div class='add'>+CAVIUM LIQUIDIO NETWORK DRIVER</div><div class='add'>+M:     Derek Chickles &lt;derek.chickles@caviumnetworks.com&gt;</div><div class='add'>+M:     Satanand Burla &lt;satananda.burla@caviumnetworks.com&gt;</div><div class='add'>+M:     Felix Manlunas &lt;felix.manlunas@caviumnetworks.com&gt;</div><div class='add'>+M:     Raghu Vatsavayi &lt;raghu.vatsavayi@caviumnetworks.com&gt;</div><div class='add'>+L:     netdev@vger.kernel.org</div><div class='add'>+W:     http://www.cavium.com</div><div class='add'>+S:     Supported</div><div class='add'>+F:     drivers/net/ethernet/cavium/</div><div class='add'>+F:     drivers/net/ethernet/cavium/liquidio/</div><div class='add'>+</div><div class='ctx'> CC2520 IEEE-802.15.4 RADIO DRIVER</div><div class='ctx'> M:	Varka Bhadram &lt;varkabhadram@gmail.com&gt;</div><div class='ctx'> L:	linux-wpan@vger.kernel.org</div><div class='hunk'>@@ -2447,7 +2556,6 @@ F:	Documentation/devicetree/bindings/net/ieee802154/cc2520.txt</div><div class='ctx'> CELL BROADBAND ENGINE ARCHITECTURE</div><div class='ctx'> M:	Arnd Bergmann &lt;arnd@arndb.de&gt;</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='del'>-L:	cbe-oss-dev@lists.ozlabs.org</div><div class='ctx'> W:	http://www.ibm.com/developerworks/power/cell/</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	arch/powerpc/include/asm/cell*.h</div><div class='hunk'>@@ -2456,19 +2564,31 @@ F:	arch/powerpc/include/uapi/asm/spu*.h</div><div class='ctx'> F:	arch/powerpc/oprofile/*cell*</div><div class='ctx'> F:	arch/powerpc/platforms/cell/</div><div class='ctx'> </div><div class='del'>-CEPH DISTRIBUTED FILE SYSTEM CLIENT</div><div class='del'>-M:	Yan, Zheng &lt;zyan@redhat.com&gt;</div><div class='add'>+CEPH COMMON CODE (LIBCEPH)</div><div class='add'>+M:	Ilya Dryomov &lt;idryomov@gmail.com&gt;</div><div class='add'>+M:	"Yan, Zheng" &lt;zyan@redhat.com&gt;</div><div class='ctx'> M:	Sage Weil &lt;sage@redhat.com&gt;</div><div class='ctx'> L:	ceph-devel@vger.kernel.org</div><div class='ctx'> W:	http://ceph.com/</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git</div><div class='add'>+T:	git git://github.com/ceph/ceph-client.git</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	Documentation/filesystems/ceph.txt</div><div class='del'>-F:	fs/ceph/</div><div class='ctx'> F:	net/ceph/</div><div class='ctx'> F:	include/linux/ceph/</div><div class='ctx'> F:	include/linux/crush/</div><div class='ctx'> </div><div class='add'>+CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH)</div><div class='add'>+M:	"Yan, Zheng" &lt;zyan@redhat.com&gt;</div><div class='add'>+M:	Sage Weil &lt;sage@redhat.com&gt;</div><div class='add'>+M:	Ilya Dryomov &lt;idryomov@gmail.com&gt;</div><div class='add'>+L:	ceph-devel@vger.kernel.org</div><div class='add'>+W:	http://ceph.com/</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git</div><div class='add'>+T:	git git://github.com/ceph/ceph-client.git</div><div class='add'>+S:	Supported</div><div class='add'>+F:	Documentation/filesystems/ceph.txt</div><div class='add'>+F:	fs/ceph/</div><div class='add'>+</div><div class='ctx'> CERTIFIED WIRELESS USB (WUSB) SUBSYSTEM:</div><div class='ctx'> L:	linux-usb@vger.kernel.org</div><div class='ctx'> S:	Orphan</div><div class='hunk'>@@ -2603,6 +2723,13 @@ L:	linux-scsi@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/scsi/fnic/</div><div class='ctx'> </div><div class='add'>+CISCO SCSI HBA DRIVER</div><div class='add'>+M:	Narsimhulu Musini &lt;nmusini@cisco.com&gt;</div><div class='add'>+M:	Sesidhar Baddela &lt;sebaddel@cisco.com&gt;</div><div class='add'>+L:	linux-scsi@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/scsi/snic/</div><div class='add'>+</div><div class='ctx'> CMPC ACPI DRIVER</div><div class='ctx'> M:	Thadeu Lima de Souza Cascardo &lt;cascardo@holoscopio.com&gt;</div><div class='ctx'> M:	Daniel Oliveira Nascimento &lt;don@syst.com.br&gt;</div><div class='hunk'>@@ -2610,11 +2737,19 @@ L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/platform/x86/classmate-laptop.c</div><div class='ctx'> </div><div class='add'>+COBALT MEDIA DRIVER</div><div class='add'>+M:	Hans Verkuil &lt;hans.verkuil@cisco.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+T:	git git://linuxtv.org/media_tree.git</div><div class='add'>+W:	http://linuxtv.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/media/pci/cobalt/</div><div class='add'>+</div><div class='ctx'> COCCINELLE/Semantic Patches (SmPL)</div><div class='ctx'> M:	Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;</div><div class='ctx'> M:	Gilles Muller &lt;Gilles.Muller@lip6.fr&gt;</div><div class='ctx'> M:	Nicolas Palix &lt;nicolas.palix@imag.fr&gt;</div><div class='del'>-M:	Michal Marek &lt;mmarek@suse.cz&gt;</div><div class='add'>+M:	Michal Marek &lt;mmarek@suse.com&gt;</div><div class='ctx'> L:	cocci@systeme.lip6.fr (moderated for non-subscribers)</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git misc</div><div class='ctx'> W:	http://coccinelle.lip6.fr/</div><div class='hunk'>@@ -2642,7 +2777,7 @@ F:	Documentation/devicetree/bindings/media/coda.txt</div><div class='ctx'> F:	drivers/media/platform/coda/</div><div class='ctx'> </div><div class='ctx'> COMMON CLK FRAMEWORK</div><div class='del'>-M:	Mike Turquette &lt;mturquette@linaro.org&gt;</div><div class='add'>+M:	Michael Turquette &lt;mturquette@baylibre.com&gt;</div><div class='ctx'> M:	Stephen Boyd &lt;sboyd@codeaurora.org&gt;</div><div class='ctx'> L:	linux-clk@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git</div><div class='hunk'>@@ -2709,6 +2844,7 @@ F:	drivers/connector/</div><div class='ctx'> CONTROL GROUP (CGROUP)</div><div class='ctx'> M:	Tejun Heo &lt;tj@kernel.org&gt;</div><div class='ctx'> M:	Li Zefan &lt;lizefan@huawei.com&gt;</div><div class='add'>+M:	Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='ctx'> L:	cgroups@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -2729,7 +2865,7 @@ F:	kernel/cpuset.c</div><div class='ctx'> </div><div class='ctx'> CONTROL GROUP - MEMORY RESOURCE CONTROLLER (MEMCG)</div><div class='ctx'> M:	Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='del'>-M:	Michal Hocko &lt;mhocko@suse.cz&gt;</div><div class='add'>+M:	Michal Hocko &lt;mhocko@kernel.org&gt;</div><div class='ctx'> L:	cgroups@vger.kernel.org</div><div class='ctx'> L:	linux-mm@kvack.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -2756,7 +2892,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/net/ethernet/ti/cpmac.c</div><div class='ctx'> </div><div class='ctx'> CPU FREQUENCY DRIVERS</div><div class='del'>-M:	Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;</div><div class='add'>+M:	"Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;</div><div class='ctx'> M:	Viresh Kumar &lt;viresh.kumar@linaro.org&gt;</div><div class='ctx'> L:	linux-pm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -2795,7 +2931,7 @@ F:	drivers/cpuidle/cpuidle-exynos.c</div><div class='ctx'> F:	arch/arm/mach-exynos/pm.c</div><div class='ctx'> </div><div class='ctx'> CPUIDLE DRIVERS</div><div class='del'>-M:	Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;</div><div class='add'>+M:	"Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;</div><div class='ctx'> M:	Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;</div><div class='ctx'> L:	linux-pm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -2810,7 +2946,7 @@ F:	arch/x86/kernel/cpuid.c</div><div class='ctx'> F:	arch/x86/kernel/msr.c</div><div class='ctx'> </div><div class='ctx'> CPU POWER MONITORING SUBSYSTEM</div><div class='del'>-M:	Thomas Renninger &lt;trenn@suse.de&gt;</div><div class='add'>+M:	Thomas Renninger &lt;trenn@suse.com&gt;</div><div class='ctx'> L:	linux-pm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	tools/power/cpupower/</div><div class='hunk'>@@ -2881,6 +3017,15 @@ S:	Maintained</div><div class='ctx'> F:	drivers/media/common/cx2341x*</div><div class='ctx'> F:	include/media/cx2341x*</div><div class='ctx'> </div><div class='add'>+CX24120 MEDIA DRIVER</div><div class='add'>+M:	Jemma Denson &lt;jdenson@gmail.com&gt;</div><div class='add'>+M:	Patrick Boettcher &lt;patrick.boettcher@posteo.de&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+W:	http://linuxtv.org/</div><div class='add'>+Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/media/dvb-frontends/cx24120*</div><div class='add'>+</div><div class='ctx'> CX88 VIDEO4LINUX DRIVER</div><div class='ctx'> M:	Mauro Carvalho Chehab &lt;mchehab@osg.samsung.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -2955,7 +3100,7 @@ M:	Michael Neuling &lt;mikey@neuling.org&gt;</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/misc/cxl/</div><div class='del'>-F:	include/misc/cxl.h</div><div class='add'>+F:	include/misc/cxl*</div><div class='ctx'> F:	include/uapi/misc/cxl.h</div><div class='ctx'> F:	Documentation/powerpc/cxl.txt</div><div class='ctx'> F:	Documentation/powerpc/cxl.txt</div><div class='hunk'>@@ -3031,7 +3176,7 @@ F:	Documentation/networking/dmfe.txt</div><div class='ctx'> F:	drivers/net/ethernet/dec/tulip/dmfe.c</div><div class='ctx'> </div><div class='ctx'> DC390/AM53C974 SCSI driver</div><div class='del'>-M:	Hannes Reinecke &lt;hare@suse.de&gt;</div><div class='add'>+M:	Hannes Reinecke &lt;hare@suse.com&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/scsi/am53c974.c</div><div class='hunk'>@@ -3085,15 +3230,20 @@ L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/dell-laptop.c</div><div class='ctx'> </div><div class='add'>+DELL LAPTOP RBTN DRIVER</div><div class='add'>+M:	Pali Rohár &lt;pali.rohar@gmail.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/platform/x86/dell-rbtn.*</div><div class='add'>+</div><div class='ctx'> DELL LAPTOP FREEFALL DRIVER</div><div class='ctx'> M:	Pali Rohár &lt;pali.rohar@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/dell-smo8800.c</div><div class='ctx'> </div><div class='ctx'> DELL LAPTOP SMM DRIVER</div><div class='del'>-M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+M:	Pali Rohár &lt;pali.rohar@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	drivers/char/i8k.c</div><div class='add'>+F:	drivers/hwmon/dell-smm-hwmon.c</div><div class='ctx'> F:	include/uapi/linux/i8k.h</div><div class='ctx'> </div><div class='ctx'> DELL SYSTEMS MANAGEMENT BASE DRIVER (dcdbas)</div><div class='hunk'>@@ -3230,7 +3380,7 @@ W:	http://www.win.tue.nl/~aeb/partitions/partition_types-1.html</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='ctx'> DISKQUOTA</div><div class='del'>-M:	Jan Kara &lt;jack@suse.cz&gt;</div><div class='add'>+M:	Jan Kara &lt;jack@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/quota.txt</div><div class='ctx'> F:	fs/quota/</div><div class='hunk'>@@ -3286,8 +3436,10 @@ F:	Documentation/hwmon/dme1737</div><div class='ctx'> F:	drivers/hwmon/dme1737.c</div><div class='ctx'> </div><div class='ctx'> DMI/SMBIOS SUPPORT</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='add'>+T:	quilt http://jdelvare.nerim.net/devel/linux/jdelvare-dmi/</div><div class='add'>+F:	Documentation/ABI/testing/sysfs-firmware-dmi-tables</div><div class='ctx'> F:	drivers/firmware/dmi-id.c</div><div class='ctx'> F:	drivers/firmware/dmi_scan.c</div><div class='ctx'> F:	include/linux/dmi.h</div><div class='hunk'>@@ -3332,16 +3484,17 @@ F:	drivers/block/drbd/</div><div class='ctx'> F:	lib/lru_cache.c</div><div class='ctx'> F:	Documentation/blockdev/drbd/</div><div class='ctx'> </div><div class='del'>-DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS</div><div class='add'>+DRIVER CORE, KOBJECTS, DEBUGFS, KERNFS AND SYSFS</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/kobject.txt</div><div class='ctx'> F:	drivers/base/</div><div class='del'>-F:	fs/sysfs/</div><div class='ctx'> F:	fs/debugfs/</div><div class='del'>-F:	include/linux/kobj*</div><div class='add'>+F:	fs/kernfs/</div><div class='add'>+F:	fs/sysfs/</div><div class='ctx'> F:	include/linux/debugfs.h</div><div class='add'>+F:	include/linux/kobj*</div><div class='ctx'> F:	lib/kobj*</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS</div><div class='hunk'>@@ -3447,6 +3600,14 @@ L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/net/wan/dscc4.c</div><div class='ctx'> </div><div class='add'>+DT3155 MEDIA DRIVER</div><div class='add'>+M:	Hans Verkuil &lt;hverkuil@xs4all.nl&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+T:	git git://linuxtv.org/media_tree.git</div><div class='add'>+W:	http://linuxtv.org</div><div class='add'>+S:	Odd Fixes</div><div class='add'>+F:	drivers/media/pci/dt3155/</div><div class='add'>+</div><div class='ctx'> DVB_USB_AF9015 MEDIA DRIVER</div><div class='ctx'> M:	Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -3729,7 +3890,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/edac/ie31200_edac.c</div><div class='ctx'> </div><div class='ctx'> EDAC-MPC85XX</div><div class='del'>-M:	Johannes Thumshirn &lt;johannes.thumshirn@men.de&gt;</div><div class='add'>+M:	Johannes Thumshirn &lt;morbidrsa@gmail.com&gt;</div><div class='ctx'> L:	linux-edac@vger.kernel.org</div><div class='ctx'> W:	bluesmoke.sourceforge.net</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -3756,6 +3917,13 @@ W:	bluesmoke.sourceforge.net</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/edac/sb_edac.c</div><div class='ctx'> </div><div class='add'>+EDAC-XGENE</div><div class='add'>+APPLIED MICRO (APM) X-GENE SOC EDAC</div><div class='add'>+M:     Loc Ho &lt;lho@apm.com&gt;</div><div class='add'>+S:     Supported</div><div class='add'>+F:     drivers/edac/xgene_edac.c</div><div class='add'>+F:     Documentation/devicetree/bindings/edac/apm-xgene-edac.txt</div><div class='add'>+</div><div class='ctx'> EDIROL UA-101/UA-1000 DRIVER</div><div class='ctx'> M:	Clemens Ladisch &lt;clemens@ladisch.de&gt;</div><div class='ctx'> L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='hunk'>@@ -3884,7 +4052,7 @@ F:	drivers/of/of_mdio.c</div><div class='ctx'> F:	drivers/of/of_net.c</div><div class='ctx'> </div><div class='ctx'> EXT2 FILE SYSTEM</div><div class='del'>-M:	Jan Kara &lt;jack@suse.cz&gt;</div><div class='add'>+M:	Jan Kara &lt;jack@suse.com&gt;</div><div class='ctx'> L:	linux-ext4@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/ext2.txt</div><div class='hunk'>@@ -3892,7 +4060,7 @@ F:	fs/ext2/</div><div class='ctx'> F:	include/linux/ext2*</div><div class='ctx'> </div><div class='ctx'> EXT3 FILE SYSTEM</div><div class='del'>-M:	Jan Kara &lt;jack@suse.cz&gt;</div><div class='add'>+M:	Jan Kara &lt;jack@suse.com&gt;</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Andreas Dilger &lt;adilger.kernel@dilger.ca&gt;</div><div class='ctx'> L:	linux-ext4@vger.kernel.org</div><div class='hunk'>@@ -3942,7 +4110,7 @@ F:	drivers/video/fbdev/exynos/exynos_mipi*</div><div class='ctx'> F:	include/video/exynos_mipi*</div><div class='ctx'> </div><div class='ctx'> F71805F HARDWARE MONITORING DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/f71805f</div><div class='hunk'>@@ -4004,7 +4172,7 @@ F:	include/uapi/scsi/fc/</div><div class='ctx'> </div><div class='ctx'> FILE LOCKING (flock() and fcntl()/lockf())</div><div class='ctx'> M:	Jeff Layton &lt;jlayton@poochiereds.net&gt;</div><div class='del'>-M:	J. Bruce Fields &lt;bfields@fieldses.org&gt;</div><div class='add'>+M:	"J. Bruce Fields" &lt;bfields@fieldses.org&gt;</div><div class='ctx'> L:	linux-fsdevel@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	include/linux/fcntl.h</div><div class='hunk'>@@ -4077,7 +4245,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/block/rsxx/</div><div class='ctx'> </div><div class='ctx'> FLOPPY DRIVER</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git</div><div class='ctx'> S:	Odd fixes</div><div class='ctx'> F:	drivers/block/floppy.c</div><div class='hunk'>@@ -4200,7 +4368,7 @@ F:	sound/soc/fsl/imx*</div><div class='ctx'> F:	sound/soc/fsl/mpc8610_hpcd.c</div><div class='ctx'> </div><div class='ctx'> FREESCALE QORIQ MANAGEMENT COMPLEX DRIVER</div><div class='del'>-M:	J. German Rivera &lt;German.Rivera@freescale.com&gt;</div><div class='add'>+M:	"J. German Rivera" &lt;German.Rivera@freescale.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/staging/fsl-mc/</div><div class='hunk'>@@ -4276,9 +4444,11 @@ FUSE: FILESYSTEM IN USERSPACE</div><div class='ctx'> M:	Miklos Szeredi &lt;miklos@szeredi.hu&gt;</div><div class='ctx'> L:	fuse-devel@lists.sourceforge.net</div><div class='ctx'> W:	http://fuse.sourceforge.net/</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	fs/fuse/</div><div class='ctx'> F:	include/uapi/linux/fuse.h</div><div class='add'>+F:	Documentation/filesystems/fuse.txt</div><div class='ctx'> </div><div class='ctx'> FUTURE DOMAIN TMC-16x0 SCSI DRIVER (16-bit)</div><div class='ctx'> M:	Rik Faith &lt;faith@cs.unc.edu&gt;</div><div class='hunk'>@@ -4482,7 +4652,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/media/usb/gspca/</div><div class='ctx'> </div><div class='ctx'> GUID PARTITION TABLE (GPT)</div><div class='del'>-M:	Davidlohr Bueso &lt;davidlohr@hp.com&gt;</div><div class='add'>+M:	Davidlohr Bueso &lt;dave@stgolabs.net&gt;</div><div class='ctx'> L:	linux-efi@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	block/partitions/efi.*</div><div class='hunk'>@@ -4494,6 +4664,17 @@ T:	git git://linuxtv.org/media_tree.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/media/usb/stk1160/</div><div class='ctx'> </div><div class='add'>+H8/300 ARCHITECTURE</div><div class='add'>+M:	Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+L:	uclinux-h8-devel@lists.sourceforge.jp (moderated for non-subscribers)</div><div class='add'>+W:	http://uclinux-h8.sourceforge.jp</div><div class='add'>+T:	git git://git.sourceforge.jp/gitroot/uclinux-h8/linux.git</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/h8300/</div><div class='add'>+F:	drivers/clocksource/h8300_*.c</div><div class='add'>+F:	drivers/clk/h8300/</div><div class='add'>+F:	drivers/irqchip/irq-renesas-h8*.c</div><div class='add'>+</div><div class='ctx'> HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER</div><div class='ctx'> M:	Frank Seidel &lt;frank@f-seidel.de&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='hunk'>@@ -4532,7 +4713,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/media/usb/hackrf/</div><div class='ctx'> </div><div class='ctx'> HARDWARE MONITORING</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> W:	http://www.lm-sensors.org/</div><div class='hunk'>@@ -4635,7 +4816,7 @@ F:	include/linux/pm.h</div><div class='ctx'> F:	arch/*/include/asm/suspend*.h</div><div class='ctx'> </div><div class='ctx'> HID CORE LAYER</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> L:	linux-input@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -4643,6 +4824,18 @@ F:	drivers/hid/</div><div class='ctx'> F:	include/linux/hid*</div><div class='ctx'> F:	include/uapi/linux/hid*</div><div class='ctx'> </div><div class='add'>+HID SENSOR HUB DRIVERS</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='add'>+M:	Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='add'>+M:	Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;</div><div class='add'>+L:	linux-input@vger.kernel.org</div><div class='add'>+L:	linux-iio@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/hid/hid-sensor*</div><div class='add'>+F:	drivers/hid/hid-sensor-*</div><div class='add'>+F:	drivers/iio/*/hid-*</div><div class='add'>+F:	include/linux/hid-sensor-*</div><div class='add'>+</div><div class='ctx'> HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS</div><div class='ctx'> M:	Thomas Gleixner &lt;tglx@linutronix.de&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='hunk'>@@ -4749,7 +4942,7 @@ S:	Maintained</div><div class='ctx'> F:	fs/hugetlbfs/</div><div class='ctx'> </div><div class='ctx'> Hyper-V CORE AND DRIVERS</div><div class='del'>-M:	K. Y. Srinivasan &lt;kys@microsoft.com&gt;</div><div class='add'>+M:	"K. Y. Srinivasan" &lt;kys@microsoft.com&gt;</div><div class='ctx'> M:	Haiyang Zhang &lt;haiyangz@microsoft.com&gt;</div><div class='ctx'> L:	devel@linuxdriverproject.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -4766,7 +4959,7 @@ F:	include/linux/hyperv.h</div><div class='ctx'> F:	tools/hv/</div><div class='ctx'> </div><div class='ctx'> I2C OVER PARALLEL PORT</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/i2c/busses/i2c-parport</div><div class='hunk'>@@ -4775,7 +4968,7 @@ F:	drivers/i2c/busses/i2c-parport.c</div><div class='ctx'> F:	drivers/i2c/busses/i2c-parport-light.c</div><div class='ctx'> </div><div class='ctx'> I2C/SMBUS CONTROLLER DRIVERS FOR PC</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/i2c/busses/i2c-ali1535</div><div class='hunk'>@@ -4816,7 +5009,7 @@ F:	drivers/i2c/busses/i2c-ismt.c</div><div class='ctx'> F:	Documentation/i2c/busses/i2c-ismt</div><div class='ctx'> </div><div class='ctx'> I2C/SMBUS STUB DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/i2c/i2c-stub.c</div><div class='hunk'>@@ -4843,7 +5036,7 @@ L:	linux-acpi@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='ctx'> I2C-TAOS-EVM DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/i2c/busses/i2c-taos-evm</div><div class='hunk'>@@ -4879,13 +5072,23 @@ M:	Marcelo Henrique Cerri &lt;mhcerri@linux.vnet.ibm.com&gt;</div><div class='ctx'> M:	Fionnuala Gunter &lt;fin@linux.vnet.ibm.com&gt;</div><div class='ctx'> L:	linux-crypto@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	drivers/crypto/nx/</div><div class='add'>+F:	drivers/crypto/nx/Makefile</div><div class='add'>+F:	drivers/crypto/nx/Kconfig</div><div class='add'>+F:	drivers/crypto/nx/nx-aes*</div><div class='add'>+F:	drivers/crypto/nx/nx-sha*</div><div class='add'>+F:	drivers/crypto/nx/nx.*</div><div class='add'>+F:	drivers/crypto/nx/nx_csbcpb.h</div><div class='add'>+F:	drivers/crypto/nx/nx_debugfs.h</div><div class='ctx'> </div><div class='ctx'> IBM Power 842 compression accelerator</div><div class='ctx'> M:	Dan Streetman &lt;ddstreet@us.ibm.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	drivers/crypto/nx/nx-842.c</div><div class='del'>-F:	include/linux/nx842.h</div><div class='add'>+F:	drivers/crypto/nx/Makefile</div><div class='add'>+F:	drivers/crypto/nx/Kconfig</div><div class='add'>+F:	drivers/crypto/nx/nx-842*</div><div class='add'>+F:	include/linux/sw842.h</div><div class='add'>+F:	crypto/842.c</div><div class='add'>+F:	lib/842/</div><div class='ctx'> </div><div class='ctx'> IBM Power Linux RAID adapter</div><div class='ctx'> M:	Brian King &lt;brking@us.ibm.com&gt;</div><div class='hunk'>@@ -5094,7 +5297,6 @@ F:	include/linux/input/</div><div class='ctx'> INPUT MULTITOUCH (MT) PROTOCOL</div><div class='ctx'> M:	Henrik Rydberg &lt;rydberg@bitmath.org&gt;</div><div class='ctx'> L:	linux-input@vger.kernel.org</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/rydberg/input-mt.git</div><div class='ctx'> S:	Odd fixes</div><div class='ctx'> F:	Documentation/input/multi-touch-protocol.txt</div><div class='ctx'> F:	drivers/input/input-mt.c</div><div class='hunk'>@@ -5102,13 +5304,12 @@ K:	\b(ABS|SYN)_MT_</div><div class='ctx'> </div><div class='ctx'> INTEL ASoC BDW/HSW DRIVERS</div><div class='ctx'> M:	Jie Yang &lt;yang.jie@linux.intel.com&gt;</div><div class='del'>-L:	alsa-devel@alsa-project.org</div><div class='add'>+L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	sound/soc/intel/sst-haswell*</div><div class='del'>-F:	sound/soc/intel/sst-dsp*</div><div class='del'>-F:	sound/soc/intel/sst-firmware.c</div><div class='del'>-F:	sound/soc/intel/broadwell.c</div><div class='del'>-F:	sound/soc/intel/haswell.c</div><div class='add'>+F:	sound/soc/intel/common/sst-dsp*</div><div class='add'>+F:	sound/soc/intel/common/sst-firmware.c</div><div class='add'>+F:	sound/soc/intel/boards/broadwell.c</div><div class='add'>+F:	sound/soc/intel/haswell/</div><div class='ctx'> </div><div class='ctx'> INTEL C600 SERIES SAS CONTROLLER DRIVER</div><div class='ctx'> M:	Intel SCU Linux support &lt;intel-linux-scu@intel.com&gt;</div><div class='hunk'>@@ -5279,9 +5480,17 @@ M:	Tomas Winkler &lt;tomas.winkler@intel.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	include/uapi/linux/mei.h</div><div class='add'>+F:	include/linux/mei_cl_bus.h</div><div class='ctx'> F:	drivers/misc/mei/*</div><div class='ctx'> F:	Documentation/misc-devices/mei/*</div><div class='ctx'> </div><div class='add'>+INTEL PMC IPC DRIVER</div><div class='add'>+M:	Zha Qipeng&lt;qipeng.zha@intel.com&gt;</div><div class='add'>+L:	platform-driver-x86@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/platform/x86/intel_pmc_ipc.c</div><div class='add'>+F:	arch/x86/include/asm/intel_pmc_ipc.h</div><div class='add'>+</div><div class='ctx'> IOC3 ETHERNET DRIVER</div><div class='ctx'> M:	Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='ctx'> L:	linux-mips@linux-mips.org</div><div class='hunk'>@@ -5356,8 +5565,8 @@ F:	include/uapi/linux/ip_vs.h</div><div class='ctx'> F:	net/netfilter/ipvs/</div><div class='ctx'> </div><div class='ctx'> IPWIRELESS DRIVER</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='del'>-M:	David Sterba &lt;dsterba@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='add'>+M:	David Sterba &lt;dsterba@suse.com&gt;</div><div class='ctx'> S:	Odd Fixes</div><div class='ctx'> F:	drivers/tty/ipwireless/</div><div class='ctx'> </div><div class='hunk'>@@ -5477,7 +5686,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/isdn/hardware/eicon/</div><div class='ctx'> </div><div class='ctx'> IT87 HARDWARE MONITORING DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/it87</div><div class='hunk'>@@ -5544,7 +5753,7 @@ F:	include/uapi/linux/jffs2.h</div><div class='ctx'> </div><div class='ctx'> JOURNALLING LAYER FOR BLOCK DEVICES (JBD)</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='del'>-M:	Jan Kara &lt;jack@suse.cz&gt;</div><div class='add'>+M:	Jan Kara &lt;jack@suse.com&gt;</div><div class='ctx'> L:	linux-ext4@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	fs/jbd/</div><div class='hunk'>@@ -5608,7 +5817,7 @@ S:	Maintained</div><div class='ctx'> F:	fs/autofs4/</div><div class='ctx'> </div><div class='ctx'> KERNEL BUILD + files below scripts/ (unless maintained elsewhere)</div><div class='del'>-M:	Michal Marek &lt;mmarek@suse.cz&gt;</div><div class='add'>+M:	Michal Marek &lt;mmarek@suse.com&gt;</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git for-next</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git rc-fixes</div><div class='ctx'> L:	linux-kbuild@vger.kernel.org</div><div class='hunk'>@@ -5672,7 +5881,7 @@ F:	arch/x86/include/asm/svm.h</div><div class='ctx'> F:	arch/x86/kvm/svm.c</div><div class='ctx'> </div><div class='ctx'> KERNEL VIRTUAL MACHINE (KVM) FOR POWERPC</div><div class='del'>-M:	Alexander Graf &lt;agraf@suse.de&gt;</div><div class='add'>+M:	Alexander Graf &lt;agraf@suse.com&gt;</div><div class='ctx'> L:	kvm-ppc@vger.kernel.org</div><div class='ctx'> W:	http://kvm.qumranet.com</div><div class='ctx'> T:	git git://github.com/agraf/linux-2.6.git</div><div class='hunk'>@@ -5829,7 +6038,7 @@ F:	drivers/leds/</div><div class='ctx'> F:	include/linux/leds.h</div><div class='ctx'> </div><div class='ctx'> LEGACY EEPROM DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/misc-devices/eeprom</div><div class='ctx'> F:	drivers/misc/eeprom/eeprom.c</div><div class='hunk'>@@ -5882,7 +6091,7 @@ F:	include/linux/ata.h</div><div class='ctx'> F:	include/linux/libata.h</div><div class='ctx'> </div><div class='ctx'> LIBATA PATA ARASAN COMPACT FLASH CONTROLLER</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> L:	linux-ide@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -5920,6 +6129,40 @@ M:	Sasha Levin &lt;sasha.levin@oracle.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	tools/lib/lockdep/</div><div class='ctx'> </div><div class='add'>+LIBNVDIMM: NON-VOLATILE MEMORY DEVICE SUBSYSTEM</div><div class='add'>+M:	Dan Williams &lt;dan.j.williams@intel.com&gt;</div><div class='add'>+L:	linux-nvdimm@lists.01.org</div><div class='add'>+Q:	https://patchwork.kernel.org/project/linux-nvdimm/list/</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/nvdimm/*</div><div class='add'>+F:	include/linux/nd.h</div><div class='add'>+F:	include/linux/libnvdimm.h</div><div class='add'>+F:	include/uapi/linux/ndctl.h</div><div class='add'>+</div><div class='add'>+LIBNVDIMM BLK: MMIO-APERTURE DRIVER</div><div class='add'>+M:	Ross Zwisler &lt;ross.zwisler@linux.intel.com&gt;</div><div class='add'>+L:	linux-nvdimm@lists.01.org</div><div class='add'>+Q:	https://patchwork.kernel.org/project/linux-nvdimm/list/</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/nvdimm/blk.c</div><div class='add'>+F:	drivers/nvdimm/region_devs.c</div><div class='add'>+F:	drivers/acpi/nfit*</div><div class='add'>+</div><div class='add'>+LIBNVDIMM BTT: BLOCK TRANSLATION TABLE</div><div class='add'>+M:	Vishal Verma &lt;vishal.l.verma@intel.com&gt;</div><div class='add'>+L:	linux-nvdimm@lists.01.org</div><div class='add'>+Q:	https://patchwork.kernel.org/project/linux-nvdimm/list/</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/nvdimm/btt*</div><div class='add'>+</div><div class='add'>+LIBNVDIMM PMEM: PERSISTENT MEMORY DRIVER</div><div class='add'>+M:	Ross Zwisler &lt;ross.zwisler@linux.intel.com&gt;</div><div class='add'>+L:	linux-nvdimm@lists.01.org</div><div class='add'>+Q:	https://patchwork.kernel.org/project/linux-nvdimm/list/</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/nvdimm/pmem.c</div><div class='add'>+F:	include/linux/pmem.h</div><div class='add'>+</div><div class='ctx'> LINUX FOR IBM pSERIES (RS/6000)</div><div class='ctx'> M:	Paul Mackerras &lt;paulus@au.ibm.com&gt;</div><div class='ctx'> W:	http://www.ibm.com/linux/ltc/projects/ppc</div><div class='hunk'>@@ -5933,7 +6176,7 @@ M:	Michael Ellerman &lt;mpe@ellerman.id.au&gt;</div><div class='ctx'> W:	http://www.penguinppc.org/</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Q:	http://patchwork.ozlabs.org/project/linuxppc-dev/list/</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/powerpc/</div><div class='ctx'> F:	arch/powerpc/</div><div class='hunk'>@@ -6009,8 +6252,8 @@ F:	drivers/platform/x86/hp_accel.c</div><div class='ctx'> LIVE PATCHING</div><div class='ctx'> M:	Josh Poimboeuf &lt;jpoimboe@redhat.com&gt;</div><div class='ctx'> M:	Seth Jennings &lt;sjenning@redhat.com&gt;</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='del'>-M:	Vojtech Pavlik &lt;vojtech@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='add'>+M:	Vojtech Pavlik &lt;vojtech@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	kernel/livepatch/</div><div class='ctx'> F:	include/linux/livepatch.h</div><div class='hunk'>@@ -6036,21 +6279,21 @@ S:	Maintained</div><div class='ctx'> F:	drivers/hwmon/lm73.c</div><div class='ctx'> </div><div class='ctx'> LM78 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/lm78</div><div class='ctx'> F:	drivers/hwmon/lm78.c</div><div class='ctx'> </div><div class='ctx'> LM83 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/lm83</div><div class='ctx'> F:	drivers/hwmon/lm83.c</div><div class='ctx'> </div><div class='ctx'> LM90 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/lm90</div><div class='hunk'>@@ -6344,6 +6587,15 @@ W:	http://linuxtv.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/media/radio/radio-maxiradio*</div><div class='ctx'> </div><div class='add'>+MEDIA DRIVERS FOR RENESAS - VSP1</div><div class='add'>+M:	Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+L:	linux-sh@vger.kernel.org</div><div class='add'>+T:	git git://linuxtv.org/media_tree.git</div><div class='add'>+S:	Supported</div><div class='add'>+F:	Documentation/devicetree/bindings/media/renesas,vsp1.txt</div><div class='add'>+F:	drivers/media/platform/vsp1/</div><div class='add'>+</div><div class='ctx'> MEDIA INPUT INFRASTRUCTURE (V4L/DVB)</div><div class='ctx'> M:	Mauro Carvalho Chehab &lt;mchehab@osg.samsung.com&gt;</div><div class='ctx'> P:	LinuxTV.org Project</div><div class='hunk'>@@ -6366,6 +6618,12 @@ F:	include/uapi/linux/meye.h</div><div class='ctx'> F:	include/uapi/linux/ivtv*</div><div class='ctx'> F:	include/uapi/linux/uvcvideo.h</div><div class='ctx'> </div><div class='add'>+MEDIATEK MT7601U WIRELESS LAN DRIVER</div><div class='add'>+M:	Jakub Kicinski &lt;kubakici@wp.pl&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/net/wireless/mediatek/mt7601u/</div><div class='add'>+</div><div class='ctx'> MEGARAID SCSI/SAS DRIVERS</div><div class='ctx'> M:	Kashyap Desai &lt;kashyap.desai@avagotech.com&gt;</div><div class='ctx'> M:	Sumit Saxena &lt;sumit.saxena@avagotech.com&gt;</div><div class='hunk'>@@ -6412,14 +6670,14 @@ F:	include/linux/mtd/</div><div class='ctx'> F:	include/uapi/mtd/</div><div class='ctx'> </div><div class='ctx'> MEN A21 WATCHDOG DRIVER</div><div class='del'>-M:	Johannes Thumshirn &lt;johannes.thumshirn@men.de&gt;</div><div class='add'>+M:	Johannes Thumshirn &lt;morbidrsa@gmail.com&gt;</div><div class='ctx'> L:	linux-watchdog@vger.kernel.org</div><div class='del'>-S:	Supported</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	drivers/watchdog/mena21_wdt.c</div><div class='ctx'> </div><div class='ctx'> MEN CHAMELEON BUS (mcb)</div><div class='del'>-M:	Johannes Thumshirn &lt;johannes.thumshirn@men.de&gt;</div><div class='del'>-S:	Supported</div><div class='add'>+M:	Johannes Thumshirn &lt;morbidrsa@gmail.com&gt;</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	drivers/mcb/</div><div class='ctx'> F:	include/linux/mcb.h</div><div class='ctx'> </div><div class='hunk'>@@ -6557,9 +6815,8 @@ S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/msi-laptop.c</div><div class='ctx'> </div><div class='ctx'> MSI WMI SUPPORT</div><div class='del'>-M:	Anisse Astier &lt;anisse@astier.eu&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='del'>-S:	Supported</div><div class='add'>+S:	Orphan</div><div class='ctx'> F:	drivers/platform/x86/msi-wmi.c</div><div class='ctx'> </div><div class='ctx'> MSI001 MEDIA DRIVER</div><div class='hunk'>@@ -6679,7 +6936,7 @@ F:	drivers/net/ethernet/natsemi/natsemi.c</div><div class='ctx'> NATIVE INSTRUMENTS USB SOUND INTERFACE DRIVER</div><div class='ctx'> M:	Daniel Mack &lt;zonque@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-L:	alsa-devel@alsa-project.org</div><div class='add'>+L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.native-instruments.com</div><div class='ctx'> F:	sound/usb/caiaq/</div><div class='ctx'> </div><div class='hunk'>@@ -6763,6 +7020,7 @@ F:	include/uapi/linux/netfilter/</div><div class='ctx'> F:	net/*/netfilter.c</div><div class='ctx'> F:	net/*/netfilter/</div><div class='ctx'> F:	net/netfilter/</div><div class='add'>+F:	net/bridge/br_netfilter*.c</div><div class='ctx'> </div><div class='ctx'> NETLABEL</div><div class='ctx'> M:	Paul Moore &lt;paul@paul-moore.com&gt;</div><div class='hunk'>@@ -6789,7 +7047,6 @@ L:	nbd-general@lists.sourceforge.net</div><div class='ctx'> T:	git git://git.pengutronix.de/git/mpa/linux-nbd.git</div><div class='ctx'> F:	Documentation/blockdev/nbd.txt</div><div class='ctx'> F:	drivers/block/nbd.c</div><div class='del'>-F:	include/linux/nbd.h</div><div class='ctx'> F:	include/uapi/linux/nbd.h</div><div class='ctx'> </div><div class='ctx'> NETWORK DROP MONITOR</div><div class='hunk'>@@ -6978,15 +7235,25 @@ F:	drivers/power/bq27x00_battery.c</div><div class='ctx'> F:	drivers/power/isp1704_charger.c</div><div class='ctx'> F:	drivers/power/rx51_battery.c</div><div class='ctx'> </div><div class='del'>-NTB DRIVER</div><div class='add'>+NTB DRIVER CORE</div><div class='ctx'> M:	Jon Mason &lt;jdmason@kudzu.us&gt;</div><div class='ctx'> M:	Dave Jiang &lt;dave.jiang@intel.com&gt;</div><div class='add'>+M:	Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://github.com/jonmason/ntb/wiki</div><div class='ctx'> T:	git git://github.com/jonmason/ntb.git</div><div class='ctx'> F:	drivers/ntb/</div><div class='ctx'> F:	drivers/net/ntb_netdev.c</div><div class='ctx'> F:	include/linux/ntb.h</div><div class='add'>+F:	include/linux/ntb_transport.h</div><div class='add'>+</div><div class='add'>+NTB INTEL DRIVER</div><div class='add'>+M:	Jon Mason &lt;jdmason@kudzu.us&gt;</div><div class='add'>+M:	Dave Jiang &lt;dave.jiang@intel.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+W:	https://github.com/jonmason/ntb/wiki</div><div class='add'>+T:	git git://github.com/jonmason/ntb.git</div><div class='add'>+F:	drivers/ntb/hw/intel/</div><div class='ctx'> </div><div class='ctx'> NTFS FILESYSTEM</div><div class='ctx'> M:	Anton Altaparmakov &lt;anton@tuxera.com&gt;</div><div class='hunk'>@@ -7097,7 +7364,7 @@ F:	arch/arm/mach-omap2/prm*</div><div class='ctx'> OMAP AUDIO SUPPORT</div><div class='ctx'> M:	Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;</div><div class='ctx'> M:	Jarkko Nikula &lt;jarkko.nikula@bitmer.com&gt;</div><div class='del'>-L:	alsa-devel@alsa-project.org (subscribers-only)</div><div class='add'>+L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='ctx'> L:	linux-omap@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	sound/soc/omap/</div><div class='hunk'>@@ -7130,7 +7397,6 @@ M:	Ohad Ben-Cohen &lt;ohad@wizery.com&gt;</div><div class='ctx'> L:	linux-omap@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/hwspinlock/omap_hwspinlock.c</div><div class='del'>-F:	arch/arm/mach-omap2/hwspinlock.c</div><div class='ctx'> </div><div class='ctx'> OMAP MMC SUPPORT</div><div class='ctx'> M:	Jarkko Lavinen &lt;jarkko.lavinen@nokia.com&gt;</div><div class='hunk'>@@ -7392,13 +7658,16 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/mn10300/</div><div class='ctx'> F:	arch/mn10300/</div><div class='ctx'> </div><div class='del'>-PARALLEL PORT SUPPORT</div><div class='add'>+PARALLEL PORT SUBSYSTEM</div><div class='add'>+M:	Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;</div><div class='add'>+M:	Sudip Mukherjee &lt;sudip@vectorindia.org&gt;</div><div class='ctx'> L:	linux-parport@lists.infradead.org (subscribers-only)</div><div class='del'>-S:	Orphan</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	drivers/parport/</div><div class='ctx'> F:	include/linux/parport*.h</div><div class='ctx'> F:	drivers/char/ppdev.c</div><div class='ctx'> F:	include/uapi/linux/ppdev.h</div><div class='add'>+F:	Documentation/parport*.txt</div><div class='ctx'> </div><div class='ctx'> PARAVIRT_OPS INTERFACE</div><div class='ctx'> M:	Jeremy Fitzhardinge &lt;jeremy@goop.org&gt;</div><div class='hunk'>@@ -7414,7 +7683,6 @@ F:	arch/*/include/asm/paravirt.h</div><div class='ctx'> PARIDE DRIVERS FOR PARALLEL PORT IDE DEVICES</div><div class='ctx'> M:	Tim Waugh &lt;tim@cyberelk.net&gt;</div><div class='ctx'> L:	linux-parport@lists.infradead.org (subscribers-only)</div><div class='del'>-W:	http://www.torque.net/linux-pp.html</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/blockdev/paride.txt</div><div class='ctx'> F:	drivers/block/paride/</div><div class='hunk'>@@ -7452,7 +7720,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/char/pc8736x_gpio.c</div><div class='ctx'> </div><div class='ctx'> PC87427 HARDWARE MONITORING DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/pc87427</div><div class='hunk'>@@ -7594,6 +7862,14 @@ L:	linux-pci@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/pci/host/*spear*</div><div class='ctx'> </div><div class='add'>+PCI MSI DRIVER FOR APPLIEDMICRO XGENE</div><div class='add'>+M:	Duc Dang &lt;dhdang@apm.com&gt;</div><div class='add'>+L:	linux-pci@vger.kernel.org</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/pci/xgene-pci-msi.txt</div><div class='add'>+F:	drivers/pci/host/pci-xgene-msi.c</div><div class='add'>+</div><div class='ctx'> PCMCIA SUBSYSTEM</div><div class='ctx'> P:	Linux PCMCIA Team</div><div class='ctx'> L:	linux-pcmcia@lists.infradead.org</div><div class='hunk'>@@ -7634,7 +7910,6 @@ F:	kernel/delayacct.c</div><div class='ctx'> </div><div class='ctx'> PERFORMANCE EVENTS SUBSYSTEM</div><div class='ctx'> M:	Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;</div><div class='del'>-M:	Paul Mackerras &lt;paulus@samba.org&gt;</div><div class='ctx'> M:	Ingo Molnar &lt;mingo@redhat.com&gt;</div><div class='ctx'> M:	Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='hunk'>@@ -7722,7 +7997,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/pinctrl/samsung/</div><div class='ctx'> </div><div class='ctx'> PIN CONTROLLER - ST SPEAR</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='hunk'>@@ -7730,7 +8005,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/pinctrl/spear/</div><div class='ctx'> </div><div class='ctx'> PKTCDVD DRIVER</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/block/pktcdvd.c</div><div class='ctx'> F:	include/linux/pktcdvd.h</div><div class='hunk'>@@ -7792,7 +8067,7 @@ F:	include/linux/power_supply.h</div><div class='ctx'> F:	drivers/power/</div><div class='ctx'> </div><div class='ctx'> PNP SUPPORT</div><div class='del'>-M:	Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;</div><div class='add'>+M:	"Rafael J. Wysocki" &lt;rafael.j.wysocki@intel.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/pnp/</div><div class='ctx'> </div><div class='hunk'>@@ -7861,14 +8136,13 @@ F:	drivers/net/wireless/prism54/</div><div class='ctx'> PS3 NETWORK SUPPORT</div><div class='ctx'> M:	Geoff Levand &lt;geoff@infradead.org&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='del'>-L:	cbe-oss-dev@lists.ozlabs.org</div><div class='add'>+L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/net/ethernet/toshiba/ps3_gelic_net.*</div><div class='ctx'> </div><div class='ctx'> PS3 PLATFORM SUPPORT</div><div class='ctx'> M:	Geoff Levand &lt;geoff@infradead.org&gt;</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='del'>-L:	cbe-oss-dev@lists.ozlabs.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/powerpc/boot/ps3*</div><div class='ctx'> F:	arch/powerpc/include/asm/lv1call.h</div><div class='hunk'>@@ -7882,7 +8156,8 @@ F:	sound/ppc/snd_ps3*</div><div class='ctx'> </div><div class='ctx'> PS3VRAM DRIVER</div><div class='ctx'> M:	Jim Paris &lt;jim@jtan.com&gt;</div><div class='del'>-L:	cbe-oss-dev@lists.ozlabs.org</div><div class='add'>+M:	Geoff Levand &lt;geoff@infradead.org&gt;</div><div class='add'>+L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/block/ps3vram.c</div><div class='ctx'> </div><div class='hunk'>@@ -7967,6 +8242,7 @@ T:	git git://github.com/hzhuang1/linux.git</div><div class='ctx'> T:	git git://github.com/rjarzmik/linux.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-pxa/</div><div class='add'>+F:	drivers/dma/pxa*</div><div class='ctx'> F:	drivers/pcmcia/pxa2xx*</div><div class='ctx'> F:	drivers/spi/spi-pxa2xx*</div><div class='ctx'> F:	drivers/usb/gadget/udc/pxa2*</div><div class='hunk'>@@ -8106,10 +8382,12 @@ RADOS BLOCK DEVICE (RBD)</div><div class='ctx'> M:	Ilya Dryomov &lt;idryomov@gmail.com&gt;</div><div class='ctx'> M:	Sage Weil &lt;sage@redhat.com&gt;</div><div class='ctx'> M:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='del'>-M:	ceph-devel@vger.kernel.org</div><div class='add'>+L:	ceph-devel@vger.kernel.org</div><div class='ctx'> W:	http://ceph.com/</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git</div><div class='add'>+T:	git git://github.com/ceph/ceph-client.git</div><div class='ctx'> S:	Supported</div><div class='add'>+F:	Documentation/ABI/testing/sysfs-bus-rbd</div><div class='ctx'> F:	drivers/block/rbd.c</div><div class='ctx'> F:	drivers/block/rbd_types.h</div><div class='ctx'> </div><div class='hunk'>@@ -8146,8 +8424,6 @@ P:	rt2x00 project</div><div class='ctx'> M:	Stanislaw Gruszka &lt;sgruszka@redhat.com&gt;</div><div class='ctx'> M:	Helmut Schaa &lt;helmut.schaa@googlemail.com&gt;</div><div class='ctx'> L:	linux-wireless@vger.kernel.org</div><div class='del'>-L:	users@rt2x00.serialmonkey.com (moderated for non-subscribers)</div><div class='del'>-W:	http://rt2x00.serialmonkey.com/</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/net/wireless/rt2x00/</div><div class='ctx'> </div><div class='hunk'>@@ -8157,12 +8433,6 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/blockdev/ramdisk.txt</div><div class='ctx'> F:	drivers/block/brd.c</div><div class='ctx'> </div><div class='del'>-PERSISTENT MEMORY DRIVER</div><div class='del'>-M:	Ross Zwisler &lt;ross.zwisler@linux.intel.com&gt;</div><div class='del'>-L:	linux-nvdimm@lists.01.org</div><div class='del'>-S:	Supported</div><div class='del'>-F:	drivers/block/pmem.c</div><div class='del'>-</div><div class='ctx'> RANDOM NUMBER DRIVER</div><div class='ctx'> M:	"Theodore Ts'o" &lt;tytso@mit.edu&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -8237,6 +8507,7 @@ M:	Alessandro Zummo &lt;a.zummo@towertech.it&gt;</div><div class='ctx'> M:	Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;</div><div class='ctx'> L:	rtc-linux@googlegroups.com</div><div class='ctx'> Q:	http://patchwork.ozlabs.org/project/rtc-linux/list/</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/rtc.txt</div><div class='ctx'> F:	drivers/rtc/</div><div class='hunk'>@@ -8537,14 +8808,20 @@ L:	linux-fbdev@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/video/fbdev/s3c-fb.c</div><div class='ctx'> </div><div class='del'>-SAMSUNG MULTIFUNCTION DEVICE DRIVERS</div><div class='add'>+SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS</div><div class='ctx'> M:	Sangbeom Kim &lt;sbkim73@samsung.com&gt;</div><div class='add'>+M:	Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='add'>+L:	linux-samsung-soc@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/mfd/sec*.c</div><div class='ctx'> F:	drivers/regulator/s2m*.c</div><div class='ctx'> F:	drivers/regulator/s5m*.c</div><div class='add'>+F:	drivers/clk/clk-s2mps11.c</div><div class='add'>+F:	drivers/rtc/rtc-s5m.c</div><div class='ctx'> F:	include/linux/mfd/samsung/</div><div class='add'>+F:	Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/mfd/s2mp*.txt</div><div class='ctx'> </div><div class='ctx'> SAMSUNG S5P/EXYNOS4 SOC SERIES CAMERA SUBSYSTEM DRIVERS</div><div class='ctx'> M:	Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='hunk'>@@ -8619,7 +8896,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/tty/serial/</div><div class='ctx'> </div><div class='ctx'> SYNOPSYS DESIGNWARE DMAC DRIVER</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> M:	Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	include/linux/dma/dw.h</div><div class='hunk'>@@ -8774,6 +9051,7 @@ S:	Supported</div><div class='ctx'> F:	kernel/seccomp.c</div><div class='ctx'> F:	include/uapi/linux/seccomp.h</div><div class='ctx'> F:	include/linux/seccomp.h</div><div class='add'>+F:	tools/testing/selftests/seccomp/*</div><div class='ctx'> K:	\bsecure_computing</div><div class='ctx'> K:	\bTIF_SECCOMP\b</div><div class='ctx'> </div><div class='hunk'>@@ -8785,7 +9063,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/mmc/host/sdhci-s3c*</div><div class='ctx'> </div><div class='ctx'> SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) ST SPEAR DRIVER</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-mmc@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -8793,7 +9071,7 @@ F:	drivers/mmc/host/sdhci-spear.c</div><div class='ctx'> </div><div class='ctx'> SECURITY SUBSYSTEM</div><div class='ctx'> M:	James Morris &lt;james.l.morris@oracle.com&gt;</div><div class='del'>-M:	Serge E. Hallyn &lt;serge@hallyn.com&gt;</div><div class='add'>+M:	"Serge E. Hallyn" &lt;serge@hallyn.com&gt;</div><div class='ctx'> L:	linux-security-module@vger.kernel.org (suggested Cc:)</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git</div><div class='ctx'> W:	http://kernsec.org/</div><div class='hunk'>@@ -8850,9 +9128,9 @@ S:	Supported</div><div class='ctx'> F:	drivers/net/ethernet/emulex/benet/</div><div class='ctx'> </div><div class='ctx'> EMULEX ONECONNECT ROCE DRIVER</div><div class='del'>-M:	Selvin Xavier &lt;selvin.xavier@emulex.com&gt;</div><div class='del'>-M:	Devesh Sharma &lt;devesh.sharma@emulex.com&gt;</div><div class='del'>-M:	Mitesh Ahuja &lt;mitesh.ahuja@emulex.com&gt;</div><div class='add'>+M:	Selvin Xavier &lt;selvin.xavier@avagotech.com&gt;</div><div class='add'>+M:	Devesh Sharma &lt;devesh.sharma@avagotech.com&gt;</div><div class='add'>+M:	Mitesh Ahuja &lt;mitesh.ahuja@avagotech.com&gt;</div><div class='ctx'> L:	linux-rdma@vger.kernel.org</div><div class='ctx'> W:	http://www.emulex.com</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -9013,7 +9291,7 @@ F:	arch/arm/mach-davinci/</div><div class='ctx'> F:	drivers/i2c/busses/i2c-davinci.c</div><div class='ctx'> </div><div class='ctx'> TI DAVINCI SERIES MEDIA DRIVER</div><div class='del'>-M:	Lad, Prabhakar &lt;prabhakar.csengg@gmail.com&gt;</div><div class='add'>+M:	"Lad, Prabhakar" &lt;prabhakar.csengg@gmail.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> W:	http://linuxtv.org/</div><div class='ctx'> Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='hunk'>@@ -9023,7 +9301,7 @@ F:	drivers/media/platform/davinci/</div><div class='ctx'> F:	include/media/davinci/</div><div class='ctx'> </div><div class='ctx'> TI AM437X VPFE DRIVER</div><div class='del'>-M:	Lad, Prabhakar &lt;prabhakar.csengg@gmail.com&gt;</div><div class='add'>+M:	"Lad, Prabhakar" &lt;prabhakar.csengg@gmail.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> W:	http://linuxtv.org/</div><div class='ctx'> Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='hunk'>@@ -9032,7 +9310,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/media/platform/am437x/</div><div class='ctx'> </div><div class='ctx'> OV2659 OMNIVISION SENSOR DRIVER</div><div class='del'>-M:	Lad, Prabhakar &lt;prabhakar.csengg@gmail.com&gt;</div><div class='add'>+M:	"Lad, Prabhakar" &lt;prabhakar.csengg@gmail.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> W:	http://linuxtv.org/</div><div class='ctx'> Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='hunk'>@@ -9147,7 +9425,7 @@ F:	Documentation/hwmon/sch5627</div><div class='ctx'> F:	drivers/hwmon/sch5627.c</div><div class='ctx'> </div><div class='ctx'> SMSC47B397 HARDWARE MONITOR DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/smsc47b397</div><div class='hunk'>@@ -9196,7 +9474,7 @@ S:	Supported</div><div class='ctx'> F:	drivers/media/pci/solo6x10/</div><div class='ctx'> </div><div class='ctx'> SOFTWARE RAID (Multiple Disks) SUPPORT</div><div class='del'>-M:	Neil Brown &lt;neilb@suse.de&gt;</div><div class='add'>+M:	Neil Brown &lt;neilb@suse.com&gt;</div><div class='ctx'> L:	linux-raid@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/md/</div><div class='hunk'>@@ -9239,7 +9517,7 @@ F:	drivers/memstick/core/ms_block.*</div><div class='ctx'> </div><div class='ctx'> SOUND</div><div class='ctx'> M:	Jaroslav Kysela &lt;perex@perex.cz&gt;</div><div class='del'>-M:	Takashi Iwai &lt;tiwai@suse.de&gt;</div><div class='add'>+M:	Takashi Iwai &lt;tiwai@suse.com&gt;</div><div class='ctx'> L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.alsa-project.org/</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git</div><div class='hunk'>@@ -9323,7 +9601,7 @@ S:	Maintained</div><div class='ctx'> F:	include/linux/compiler.h</div><div class='ctx'> </div><div class='ctx'> SPEAR PLATFORM SUPPORT</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> M:	Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -9332,7 +9610,7 @@ S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-spear/</div><div class='ctx'> </div><div class='ctx'> SPEAR CLOCK FRAMEWORK SUPPORT</div><div class='del'>-M:	Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='hunk'>@@ -9352,7 +9630,6 @@ F:	include/uapi/linux/spi/</div><div class='ctx'> </div><div class='ctx'> SPIDERNET NETWORK DRIVER for CELL</div><div class='ctx'> M:	Ishizaki Kou &lt;kou.ishizaki@toshiba.co.jp&gt;</div><div class='del'>-M:	Jens Osterkamp &lt;jens@de.ibm.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/networking/spider_net.txt</div><div class='hunk'>@@ -9361,7 +9638,6 @@ F:	drivers/net/ethernet/toshiba/spider_net*</div><div class='ctx'> SPU FILE SYSTEM</div><div class='ctx'> M:	Jeremy Kerr &lt;jk@ozlabs.org&gt;</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='del'>-L:	cbe-oss-dev@lists.ozlabs.org</div><div class='ctx'> W:	http://www.ibm.com/developerworks/power/cell/</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/filesystems/spufs.txt</div><div class='hunk'>@@ -9500,6 +9776,15 @@ M:	Forest Bond &lt;forest@alittletooquiet.net&gt;</div><div class='ctx'> S:	Odd Fixes</div><div class='ctx'> F:	drivers/staging/vt665?/</div><div class='ctx'> </div><div class='add'>+STAGING - WILC1000 WIFI DRIVER</div><div class='add'>+M:	Johnny Kim &lt;johnny.kim@atmel.com&gt;</div><div class='add'>+M:	Rachel Kim &lt;rachel.kim@atmel.com&gt;</div><div class='add'>+M:	Dean Lee &lt;dean.lee@atmel.com&gt;</div><div class='add'>+M:	Chris Park &lt;chris.park@atmel.com&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/staging/wilc1000/</div><div class='add'>+</div><div class='ctx'> STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER</div><div class='ctx'> M:	Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;</div><div class='ctx'> S:	Odd Fixes</div><div class='hunk'>@@ -9583,6 +9868,20 @@ F:	arch/arc/</div><div class='ctx'> F:	Documentation/devicetree/bindings/arc/</div><div class='ctx'> F:	drivers/tty/serial/arc_uart.c</div><div class='ctx'> </div><div class='add'>+SYNOPSYS ARC SDP platform support</div><div class='add'>+M:	Alexey Brodkin &lt;abrodkin@synopsys.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+F:	arch/arc/plat-axs10x</div><div class='add'>+F:	arch/arc/boot/dts/ax*</div><div class='add'>+F:	Documentation/devicetree/bindings/arc/axs10*</div><div class='add'>+</div><div class='add'>+SYSTEM CONFIGURATION (SYSCON)</div><div class='add'>+M:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+M:	Arnd Bergmann &lt;arnd@arndb.de&gt;</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/mfd/syscon.c</div><div class='add'>+</div><div class='ctx'> SYSV FILESYSTEM</div><div class='ctx'> M:	Christoph Hellwig &lt;hch@infradead.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -9591,7 +9890,7 @@ F:	fs/sysv/</div><div class='ctx'> F:	include/linux/sysv_fs.h</div><div class='ctx'> </div><div class='ctx'> TARGET SUBSYSTEM</div><div class='del'>-M:	Nicholas A. Bellinger &lt;nab@linux-iscsi.org&gt;</div><div class='add'>+M:	"Nicholas A. Bellinger" &lt;nab@linux-iscsi.org&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='ctx'> L:	target-devel@vger.kernel.org</div><div class='ctx'> W:	http://www.linux-iscsi.org</div><div class='hunk'>@@ -9733,7 +10032,7 @@ F:	include/linux/if_team.h</div><div class='ctx'> F:	include/uapi/linux/if_team.h</div><div class='ctx'> </div><div class='ctx'> TECHNOLOGIC SYSTEMS TS-5500 PLATFORM SUPPORT</div><div class='del'>-M:	Savoir-faire Linux Inc. &lt;kernel@savoirfairelinux.com&gt;</div><div class='add'>+M:	"Savoir-faire Linux Inc." &lt;kernel@savoirfairelinux.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/x86/platform/ts5500/</div><div class='ctx'> </div><div class='hunk'>@@ -10023,7 +10322,7 @@ F:	include/linux/toshiba.h</div><div class='ctx'> F:	include/uapi/linux/toshiba.h</div><div class='ctx'> </div><div class='ctx'> TMIO MMC DRIVER</div><div class='del'>-M:	Ian Molton &lt;ian.molton@codethink.co.uk&gt;</div><div class='add'>+M:	Ian Molton &lt;ian@mnementh.co.uk&gt;</div><div class='ctx'> L:	linux-mmc@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/mmc/host/tmio_mmc*</div><div class='hunk'>@@ -10101,9 +10400,10 @@ K:	^Subject:.*(?i)trivial</div><div class='ctx'> </div><div class='ctx'> TTY LAYER</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='del'>-M:	Jiri Slaby &lt;jslaby@suse.cz&gt;</div><div class='add'>+M:	Jiri Slaby &lt;jslaby@suse.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git</div><div class='add'>+F:	Documentation/serial/</div><div class='ctx'> F:	drivers/tty/</div><div class='ctx'> F:	drivers/tty/serial/serial_core.c</div><div class='ctx'> F:	include/linux/serial_core.h</div><div class='hunk'>@@ -10161,16 +10461,20 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/ubifs.txt</div><div class='ctx'> F:	fs/ubifs/</div><div class='ctx'> </div><div class='del'>-UCLINUX (AND M68KNOMMU)</div><div class='add'>+UCLINUX (M68KNOMMU AND COLDFIRE)</div><div class='ctx'> M:	Greg Ungerer &lt;gerg@uclinux.org&gt;</div><div class='ctx'> W:	http://www.uclinux.org/</div><div class='add'>+L:	linux-m68k@lists.linux-m68k.org</div><div class='ctx'> L:	uclinux-dev@uclinux.org  (subscribers-only)</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu.git</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	arch/m68k/coldfire/</div><div class='add'>+F:	arch/m68k/68*/</div><div class='ctx'> F:	arch/m68k/*/*_no.*</div><div class='ctx'> F:	arch/m68k/include/asm/*_no.*</div><div class='ctx'> </div><div class='ctx'> UDF FILESYSTEM</div><div class='del'>-M:	Jan Kara &lt;jack@suse.cz&gt;</div><div class='add'>+M:	Jan Kara &lt;jack@suse.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/udf.txt</div><div class='ctx'> F:	fs/udf/</div><div class='hunk'>@@ -10313,7 +10617,7 @@ F:	drivers/usb/gadget/</div><div class='ctx'> F:	include/linux/usb/gadget*</div><div class='ctx'> </div><div class='ctx'> USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)</div><div class='del'>-M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.com&gt;</div><div class='ctx'> L:	linux-usb@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -10438,7 +10742,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/usb/host/uhci*</div><div class='ctx'> </div><div class='ctx'> USB "USBNET" DRIVER FRAMEWORK</div><div class='del'>-M:	Oliver Neukum &lt;oneukum@suse.de&gt;</div><div class='add'>+M:	Oliver Neukum &lt;oneukum@suse.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> W:	http://www.linux-usb.org/usbnet</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -10499,6 +10803,13 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/video4linux/zr364xx.txt</div><div class='ctx'> F:	drivers/media/usb/zr364xx/</div><div class='ctx'> </div><div class='add'>+ULPI BUS</div><div class='add'>+M:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+L:	linux-usb@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/usb/common/ulpi.c</div><div class='add'>+F:	include/linux/ulpi/</div><div class='add'>+</div><div class='ctx'> USER-MODE LINUX (UML)</div><div class='ctx'> M:	Jeff Dike &lt;jdike@addtoit.com&gt;</div><div class='ctx'> M:	Richard Weinberger &lt;richard@nod.at&gt;</div><div class='hunk'>@@ -10551,6 +10862,12 @@ F:	drivers/vfio/</div><div class='ctx'> F:	include/linux/vfio.h</div><div class='ctx'> F:	include/uapi/linux/vfio.h</div><div class='ctx'> </div><div class='add'>+VFIO PLATFORM DRIVER</div><div class='add'>+M:	Baptiste Reynal &lt;b.reynal@virtualopensystems.com&gt;</div><div class='add'>+L:	kvm@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/vfio/platform/</div><div class='add'>+</div><div class='ctx'> VIDEOBUF2 FRAMEWORK</div><div class='ctx'> M:	Pawel Osciak &lt;pawel@osciak.com&gt;</div><div class='ctx'> M:	Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='hunk'>@@ -10579,6 +10896,15 @@ F:	drivers/block/virtio_blk.c</div><div class='ctx'> F:	include/linux/virtio_*.h</div><div class='ctx'> F:	include/uapi/linux/virtio_*.h</div><div class='ctx'> </div><div class='add'>+VIRTIO GPU DRIVER</div><div class='add'>+M:	David Airlie &lt;airlied@linux.ie&gt;</div><div class='add'>+M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='add'>+L:	dri-devel@lists.freedesktop.org</div><div class='add'>+L:	virtualization@lists.linux-foundation.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/gpu/drm/virtio/</div><div class='add'>+F:	include/uapi/linux/virtio_gpu.h</div><div class='add'>+</div><div class='ctx'> VIRTIO HOST (VHOST)</div><div class='ctx'> M:	"Michael S. Tsirkin" &lt;mst@redhat.com&gt;</div><div class='ctx'> L:	kvm@vger.kernel.org</div><div class='hunk'>@@ -10743,7 +11069,7 @@ F:	Documentation/hwmon/w83793</div><div class='ctx'> F:	drivers/hwmon/w83793.c</div><div class='ctx'> </div><div class='ctx'> W83795 HARDWARE MONITORING DRIVER</div><div class='del'>-M:	Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='add'>+M:	Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/hwmon/w83795.c</div><div class='hunk'>@@ -10901,7 +11227,7 @@ M:	Andy Lutomirski &lt;luto@amacapital.net&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/vdso</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	arch/x86/vdso/</div><div class='add'>+F:	arch/x86/entry/vdso/</div><div class='ctx'> </div><div class='ctx'> XC2028/3028 TUNER DRIVER</div><div class='ctx'> M:	Mauro Carvalho Chehab &lt;mchehab@osg.samsung.com&gt;</div><div class='hunk'>@@ -11064,6 +11390,13 @@ L:	zd1211-devs@lists.sourceforge.net (subscribers-only)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/net/wireless/zd1211rw/</div><div class='ctx'> </div><div class='add'>+ZPOOL COMPRESSED PAGE STORAGE API</div><div class='add'>+M:	Dan Streetman &lt;ddstreet@ieee.org&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	mm/zpool.c</div><div class='add'>+F:	include/linux/zpool.h</div><div class='add'>+</div><div class='ctx'> ZR36067 VIDEO FOR LINUX DRIVER</div><div class='ctx'> L:	mjpeg-users@lists.sourceforge.net</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='head'>diff --git a/Makefile b/Makefile<br/>index 3ba504496cb2..a9ad4908e870 100644<br/>--- a/<a href='/drm-misc/tree/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>Makefile</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> VERSION = 4</div><div class='del'>-PATCHLEVEL = 1</div><div class='add'>+PATCHLEVEL = 2</div><div class='ctx'> SUBLEVEL = 0</div><div class='del'>-EXTRAVERSION = -rc8</div><div class='add'>+EXTRAVERSION = -rc3</div><div class='ctx'> NAME = Hurr durr I'ma sheep</div><div class='ctx'> </div><div class='ctx'> # *DOCUMENTATION*</div><div class='hunk'>@@ -215,7 +215,6 @@ VPATH		:= $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD))</div><div class='ctx'> </div><div class='ctx'> export srctree objtree VPATH</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> # SUBARCH tells the usermode build what the underlying arch is.  That is set</div><div class='ctx'> # first, and if a usermode build is happening, the "ARCH=um" on the command</div><div class='ctx'> # line overrides the setting of ARCH below.  If a native build is happening,</div><div class='hunk'>@@ -336,15 +335,6 @@ endif</div><div class='ctx'> export KBUILD_MODULES KBUILD_BUILTIN</div><div class='ctx'> export KBUILD_CHECKSRC KBUILD_SRC KBUILD_EXTMOD</div><div class='ctx'> </div><div class='del'>-ifneq ($(CC),)</div><div class='del'>-ifeq ($(shell $(CC) -v 2&gt;&amp;1 | grep -c "clang version"), 1)</div><div class='del'>-COMPILER := clang</div><div class='del'>-else</div><div class='del'>-COMPILER := gcc</div><div class='del'>-endif</div><div class='del'>-export COMPILER</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> # We need some generic definitions (do not try to remake the file).</div><div class='ctx'> scripts/Kbuild.include: ;</div><div class='ctx'> include scripts/Kbuild.include</div><div class='hunk'>@@ -671,6 +661,13 @@ endif</div><div class='ctx'> endif</div><div class='ctx'> KBUILD_CFLAGS += $(stackp-flag)</div><div class='ctx'> </div><div class='add'>+ifeq ($(shell $(CC) -v 2&gt;&amp;1 | grep -c "clang version"), 1)</div><div class='add'>+COMPILER := clang</div><div class='add'>+else</div><div class='add'>+COMPILER := gcc</div><div class='add'>+endif</div><div class='add'>+export COMPILER</div><div class='add'>+</div><div class='ctx'> ifeq ($(COMPILER),clang)</div><div class='ctx'> KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,)</div><div class='ctx'> KBUILD_CPPFLAGS += $(call cc-option,-Wno-unknown-warning-option,)</div><div class='hunk'>@@ -783,10 +780,11 @@ endif</div><div class='ctx'> include scripts/Makefile.kasan</div><div class='ctx'> include scripts/Makefile.extrawarn</div><div class='ctx'> </div><div class='del'>-# Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments</div><div class='del'>-KBUILD_CPPFLAGS += $(KCPPFLAGS)</div><div class='del'>-KBUILD_AFLAGS += $(KAFLAGS)</div><div class='del'>-KBUILD_CFLAGS += $(KCFLAGS)</div><div class='add'>+# Add any arch overrides and user supplied CPPFLAGS, AFLAGS and CFLAGS as the</div><div class='add'>+# last assignments</div><div class='add'>+KBUILD_CPPFLAGS += $(ARCH_CPPFLAGS) $(KCPPFLAGS)</div><div class='add'>+KBUILD_AFLAGS   += $(ARCH_AFLAGS)   $(KAFLAGS)</div><div class='add'>+KBUILD_CFLAGS   += $(ARCH_CFLAGS)   $(KCFLAGS)</div><div class='ctx'> </div><div class='ctx'> # Use --build-id when available.</div><div class='ctx'> LDFLAGS_BUILD_ID = $(patsubst -Wl$(comma)%,%,\</div><div class='hunk'>@@ -1497,11 +1495,11 @@ image_name:</div><div class='ctx'> # Clear a bunch of variables before executing the submake</div><div class='ctx'> tools/: FORCE</div><div class='ctx'> 	$(Q)mkdir -p $(objtree)/tools</div><div class='del'>-	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(objtree) subdir=tools -C $(src)/tools/</div><div class='add'>+	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(O) subdir=tools -C $(src)/tools/</div><div class='ctx'> </div><div class='ctx'> tools/%: FORCE</div><div class='ctx'> 	$(Q)mkdir -p $(objtree)/tools</div><div class='del'>-	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(objtree) subdir=tools -C $(src)/tools/ $*</div><div class='add'>+	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(O) subdir=tools -C $(src)/tools/ $*</div><div class='ctx'> </div><div class='ctx'> # Single targets</div><div class='ctx'> # ---------------------------------------------------------------------------</div><div class='head'>diff --git a/arch/Kconfig b/arch/Kconfig<br/>index a65eafb24997..8a8ea7110de8 100644<br/>--- a/<a href='/drm-misc/tree/arch/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/Kconfig</a></div><div class='hunk'>@@ -221,6 +221,10 @@ config ARCH_TASK_STRUCT_ALLOCATOR</div><div class='ctx'> config ARCH_THREAD_INFO_ALLOCATOR</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+# Select if arch wants to size task_struct dynamically via arch_task_struct_size:</div><div class='add'>+config ARCH_WANTS_DYNAMIC_TASK_STRUCT</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> config HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -499,6 +503,13 @@ config ARCH_HAS_ELF_RANDOMIZE</div><div class='ctx'> 	  - arch_mmap_rnd()</div><div class='ctx'> 	  - arch_randomize_brk()</div><div class='ctx'> </div><div class='add'>+config HAVE_COPY_THREAD_TLS</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Architecture provides copy_thread_tls to accept tls argument via</div><div class='add'>+	  normal C parameter passing, rather than extracting the syscall</div><div class='add'>+	  argument from pt_regs.</div><div class='add'>+</div><div class='ctx'> #</div><div class='ctx'> # ABI hall of shame</div><div class='ctx'> #</div><div class='head'>diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild<br/>index 76aeb8fa551a..ffd9cf5ec8c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/Kbuild</a></div><div class='hunk'>@@ -5,7 +5,7 @@ generic-y += cputime.h</div><div class='ctx'> generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/alpha/include/asm/cmpxchg.h b/arch/alpha/include/asm/cmpxchg.h<br/>index 429e8cd0d78e..e5117766529e 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -66,6 +66,4 @@</div><div class='ctx'> #undef __ASM__MB</div><div class='ctx'> #undef ____cmpxchg</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> #endif /* _ALPHA_CMPXCHG_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h<br/>index f7f680f7457d..98f2eeee8f68 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/pci.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci-bridge.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -71,22 +71,6 @@ extern void pcibios_set_master(struct pci_dev *dev);</div><div class='ctx'> /* implement the pci_ DMA API in terms of the generic device dma_ one */</div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = 1024;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = (int) byte * 4;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_BOUNDARY;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* TODO: integrate with include/asm-generic/pci.h ? */</div><div class='head'>diff --git a/arch/alpha/include/asm/serial.h b/arch/alpha/include/asm/serial.h<br/>index 9d263e8d8ccc..22909b83f473 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/include/asm/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/include/asm/serial.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #define BASE_BAUD ( 1843200 / 16 )</div><div class='ctx'> </div><div class='ctx'> /* Standard COM flags (except for COM4, because of the 8514 problem) */</div><div class='del'>-#ifdef CONFIG_SERIAL_DETECT_IRQ</div><div class='add'>+#ifdef CONFIG_SERIAL_8250_DETECT_IRQ</div><div class='ctx'> #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)</div><div class='ctx'> #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/alpha/kernel/core_irongate.c b/arch/alpha/kernel/core_irongate.c<br/>index 00096df0f6ad..83d0a359a1b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/core_irongate.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/kernel/core_irongate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/core_irongate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/core_irongate.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c<br/>index 79d69d7f63f8..15f42083bdb3 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/sys_eiger.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/kernel/sys_eiger.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/sys_eiger.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/sys_eiger.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/core_tsunami.h&gt;</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='head'>diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c<br/>index 700686d04869..2cfaa0e5c577 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/sys_nautilus.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/kernel/sys_nautilus.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/sys_nautilus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/kernel/sys_nautilus.c</a></div><div class='hunk'>@@ -39,7 +39,6 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/core_irongate.h&gt;</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='head'>diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c<br/>index 9d0ac091a52a..4a905bd667e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/alpha/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/alpha/mm/fault.c</a></div><div class='hunk'>@@ -23,8 +23,7 @@</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void die_if_kernel(char *,struct pt_regs *,long, unsigned long *);</div><div class='ctx'> </div><div class='hunk'>@@ -107,7 +106,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr,</div><div class='ctx'> </div><div class='ctx'> 	/* If we're in an interrupt context, or have no user context,</div><div class='ctx'> 	   we must not take the fault.  */</div><div class='del'>-	if (!mm || in_atomic())</div><div class='add'>+	if (!mm || faulthandler_disabled())</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ALPHA_LARGE_VMALLOC</div><div class='head'>diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig<br/>index df94ac1f75b6..91cf4055acab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/Kconfig</a></div><div class='hunk'>@@ -81,26 +81,47 @@ menu "ARC Architecture Configuration"</div><div class='ctx'> </div><div class='ctx'> menu "ARC Platform/SoC/Board"</div><div class='ctx'> </div><div class='del'>-source "arch/arc/plat-arcfpga/Kconfig"</div><div class='add'>+source "arch/arc/plat-sim/Kconfig"</div><div class='ctx'> source "arch/arc/plat-tb10x/Kconfig"</div><div class='add'>+source "arch/arc/plat-axs10x/Kconfig"</div><div class='ctx'> #New platform adds here</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "ARC Instruction Set"</div><div class='add'>+	default ISA_ARCOMPACT</div><div class='add'>+</div><div class='add'>+config ISA_ARCOMPACT</div><div class='add'>+	bool "ARCompact ISA"</div><div class='add'>+	help</div><div class='add'>+	  The original ARC ISA of ARC600/700 cores</div><div class='add'>+</div><div class='add'>+config ISA_ARCV2</div><div class='add'>+	bool "ARC ISA v2"</div><div class='add'>+	help</div><div class='add'>+	  ISA for the Next Generation ARC-HS cores</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> menu "ARC CPU Configuration"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "ARC Core"</div><div class='del'>-	default ARC_CPU_770</div><div class='add'>+	default ARC_CPU_770 if ISA_ARCOMPACT</div><div class='add'>+	default ARC_CPU_HS if ISA_ARCV2</div><div class='add'>+</div><div class='add'>+if ISA_ARCOMPACT</div><div class='ctx'> </div><div class='ctx'> config ARC_CPU_750D</div><div class='ctx'> 	bool "ARC750D"</div><div class='add'>+	select ARC_CANT_LLSC</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for ARC750 core</div><div class='ctx'> </div><div class='ctx'> config ARC_CPU_770</div><div class='ctx'> 	bool "ARC770"</div><div class='del'>-	select ARC_CPU_REL_4_10</div><div class='add'>+	select ARC_HAS_SWAPE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for ARC770 core introduced with Rel 4.10 (Summer 2011)</div><div class='ctx'> 	  This core has a bunch of cool new features:</div><div class='hunk'>@@ -109,6 +130,27 @@ config ARC_CPU_770</div><div class='ctx'> 	  -Caches: New Prog Model, Region Flush</div><div class='ctx'> 	  -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr</div><div class='ctx'> </div><div class='add'>+endif	#ISA_ARCOMPACT</div><div class='add'>+</div><div class='add'>+config ARC_CPU_HS</div><div class='add'>+	bool "ARC-HS"</div><div class='add'>+	depends on ISA_ARCV2</div><div class='add'>+	help</div><div class='add'>+	  Support for ARC HS38x Cores based on ARCv2 ISA</div><div class='add'>+	  The notable features are:</div><div class='add'>+	    - SMP configurations of upto 4 core with coherency</div><div class='add'>+	    - Optional L2 Cache and IO-Coherency</div><div class='add'>+	    - Revised Interrupt Architecture (multiple priorites, reg banks,</div><div class='add'>+	        auto stack switch, auto regfile save/restore)</div><div class='add'>+	    - MMUv4 (PIPT dcache, Huge Pages)</div><div class='add'>+	    - Instructions for</div><div class='add'>+		* 64bit load/store: LDD, STD</div><div class='add'>+		* Hardware assisted divide/remainder: DIV, REM</div><div class='add'>+		* Function prologue/epilogue: ENTER_S, LEAVE_S</div><div class='add'>+		* IRQ enable/disable: CLRI, SETI</div><div class='add'>+		* pop count: FFS, FLS</div><div class='add'>+		* SETcc, BMSKN, XBFU...</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> config CPU_BIG_ENDIAN</div><div class='hunk'>@@ -117,17 +159,13 @@ config CPU_BIG_ENDIAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Build kernel for Big Endian Mode of ARC CPU</div><div class='ctx'> </div><div class='del'>-# If a platform can't work with 0x8000_0000 based dma_addr_t</div><div class='del'>-config ARC_PLAT_NEEDS_CPU_TO_DMA</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config SMP</div><div class='del'>-	bool "Symmetric Multi-Processing (Incomplete)"</div><div class='add'>+	bool "Symmetric Multi-Processing"</div><div class='ctx'> 	default n</div><div class='add'>+	select ARC_HAS_COH_CACHES if ISA_ARCV2</div><div class='add'>+	select ARC_MCIP if ISA_ARCV2</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for systems with more than one CPU. If you have</div><div class='del'>-	  a system with only one CPU, say N. If you have a system with more</div><div class='del'>-	  than one CPU, say Y.</div><div class='add'>+	  This enables support for systems with more than one CPU.</div><div class='ctx'> </div><div class='ctx'> if SMP</div><div class='ctx'> </div><div class='hunk'>@@ -137,13 +175,20 @@ config ARC_HAS_COH_CACHES</div><div class='ctx'> config ARC_HAS_REENTRANT_IRQ_LV2</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='del'>-endif</div><div class='add'>+config ARC_MCIP</div><div class='add'>+	bool "ARConnect Multicore IP (MCIP) Support "</div><div class='add'>+	depends on ISA_ARCV2</div><div class='add'>+	help</div><div class='add'>+	  This IP block enables SMP in ARC-HS38 cores.</div><div class='add'>+	  It provides for cross-core interrupts, multi-core debug</div><div class='add'>+	  hardware semaphores, shared memory,....</div><div class='ctx'> </div><div class='ctx'> config NR_CPUS</div><div class='ctx'> 	int "Maximum number of CPUs (2-4096)"</div><div class='ctx'> 	range 2 4096</div><div class='del'>-	depends on SMP</div><div class='del'>-	default "2"</div><div class='add'>+	default "4"</div><div class='add'>+</div><div class='add'>+endif	#SMP</div><div class='ctx'> </div><div class='ctx'> menuconfig ARC_CACHE</div><div class='ctx'> 	bool "Enable Cache Support"</div><div class='hunk'>@@ -185,7 +230,7 @@ config ARC_CACHE_PAGES</div><div class='ctx'> </div><div class='ctx'> config ARC_CACHE_VIPT_ALIASING</div><div class='ctx'> 	bool "Support VIPT Aliasing D$"</div><div class='del'>-	depends on ARC_HAS_DCACHE</div><div class='add'>+	depends on ARC_HAS_DCACHE &amp;&amp; ISA_ARCOMPACT</div><div class='ctx'> 	default n</div><div class='ctx'> </div><div class='ctx'> endif	#ARC_CACHE</div><div class='hunk'>@@ -226,9 +271,10 @@ config ARC_HAS_HW_MPY</div><div class='ctx'> 	  Multipler. Otherwise software multipy lib is used</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='del'>-	prompt "ARC700 MMU Version"</div><div class='add'>+	prompt "MMU Version"</div><div class='ctx'> 	default ARC_MMU_V3 if ARC_CPU_770</div><div class='ctx'> 	default ARC_MMU_V2 if ARC_CPU_750D</div><div class='add'>+	default ARC_MMU_V4 if ARC_CPU_HS</div><div class='ctx'> </div><div class='ctx'> config ARC_MMU_V1</div><div class='ctx'> 	bool "MMU v1"</div><div class='hunk'>@@ -249,6 +295,10 @@ config ARC_MMU_V3</div><div class='ctx'> 	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)</div><div class='ctx'> 	  Shared Address Spaces (SASID)</div><div class='ctx'> </div><div class='add'>+config ARC_MMU_V4</div><div class='add'>+	bool "MMU v4"</div><div class='add'>+	depends on ISA_ARCV2</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -271,6 +321,8 @@ config ARC_PAGE_SIZE_4K</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+if ISA_ARCOMPACT</div><div class='add'>+</div><div class='ctx'> config ARC_COMPACT_IRQ_LEVELS</div><div class='ctx'> 	bool "ARCompact IRQ Priorities: High(2)/Low(1)"</div><div class='ctx'> 	default n</div><div class='hunk'>@@ -290,7 +342,7 @@ config ARC_IRQ5_LV2</div><div class='ctx'> config ARC_IRQ6_LV2</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-endif</div><div class='add'>+endif	#ARC_COMPACT_IRQ_LEVELS</div><div class='ctx'> </div><div class='ctx'> config ARC_FPU_SAVE_RESTORE</div><div class='ctx'> 	bool "Enable FPU state persistence across context switch"</div><div class='hunk'>@@ -303,32 +355,53 @@ config ARC_FPU_SAVE_RESTORE</div><div class='ctx'> 	  based on actual usage of FPU by a task. Thus our implemn does</div><div class='ctx'> 	  this for all tasks in system.</div><div class='ctx'> </div><div class='add'>+endif	#ISA_ARCOMPACT</div><div class='add'>+</div><div class='ctx'> config ARC_CANT_LLSC</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='del'>-menuconfig ARC_CPU_REL_4_10</div><div class='del'>-	bool "Enable support for Rel 4.10 features"</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  -ARC770 (and dependent features) enabled</div><div class='del'>-	  -ARC750 also shares some of the new features with 770</div><div class='del'>-</div><div class='ctx'> config ARC_HAS_LLSC</div><div class='ctx'> 	bool "Insn: LLOCK/SCOND (efficient atomic ops)"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on ARC_CPU_770 &amp;&amp; !ARC_CANT_LLSC</div><div class='add'>+	depends on !ARC_CANT_LLSC</div><div class='ctx'> </div><div class='ctx'> config ARC_HAS_SWAPE</div><div class='ctx'> 	bool "Insn: SWAPE (endian-swap)"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on ARC_CPU_REL_4_10</div><div class='ctx'> </div><div class='del'>-config ARC_HAS_RTSC</div><div class='del'>-	bool "Insn: RTSC (64-bit r/o cycle counter)"</div><div class='add'>+if ISA_ARCV2</div><div class='add'>+</div><div class='add'>+config ARC_HAS_LL64</div><div class='add'>+	bool "Insn: 64bit LDD/STD"</div><div class='add'>+	help</div><div class='add'>+	  Enable gcc to generate 64-bit load/store instructions</div><div class='add'>+	  ISA mandates even/odd registers to allow encoding of two</div><div class='add'>+	  dest operands with 2 possible source operands.</div><div class='ctx'> 	default y</div><div class='del'>-	depends on ARC_CPU_REL_4_10</div><div class='add'>+</div><div class='add'>+config ARC_HAS_RTC</div><div class='add'>+	bool "Local 64-bit r/o cycle counter"</div><div class='add'>+	default n</div><div class='ctx'> 	depends on !SMP</div><div class='ctx'> </div><div class='add'>+config ARC_HAS_GRTC</div><div class='add'>+	bool "SMP synchronized 64-bit cycle counter"</div><div class='add'>+	default y</div><div class='add'>+	depends on SMP</div><div class='add'>+</div><div class='add'>+config ARC_NUMBER_OF_INTERRUPTS</div><div class='add'>+	int "Number of interrupts"</div><div class='add'>+	range 8 240</div><div class='add'>+	default 32</div><div class='add'>+	help</div><div class='add'>+	  This defines the number of interrupts on the ARCv2HS core.</div><div class='add'>+	  It affects the size of vector table.</div><div class='add'>+	  The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable</div><div class='add'>+	  in hardware, it keep things simple for Linux to assume they are always</div><div class='add'>+	  present.</div><div class='add'>+</div><div class='add'>+endif	# ISA_ARCV2</div><div class='add'>+</div><div class='ctx'> endmenu   # "ARC CPU Configuration"</div><div class='ctx'> </div><div class='ctx'> config LINUX_LINK_BASE</div><div class='hunk'>@@ -354,8 +427,10 @@ config ARC_CURR_IN_REG</div><div class='ctx'> </div><div class='ctx'> config ARC_EMUL_UNALIGNED</div><div class='ctx'> 	bool "Emulate unaligned memory access (userspace only)"</div><div class='add'>+	default N</div><div class='ctx'> 	select SYSCTL_ARCH_UNALIGN_NO_WARN</div><div class='ctx'> 	select SYSCTL_ARCH_UNALIGN_ALLOW</div><div class='add'>+	depends on ISA_ARCOMPACT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables misaligned 16 &amp; 32 bit memory access from user space.</div><div class='ctx'> 	  Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide</div><div class='hunk'>@@ -378,9 +453,10 @@ menuconfig ARC_DBG</div><div class='ctx'> 	bool "ARC debugging"</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='add'>+if ARC_DBG</div><div class='add'>+</div><div class='ctx'> config ARC_DW2_UNWIND</div><div class='ctx'> 	bool "Enable DWARF specific kernel stack unwind"</div><div class='del'>-	depends on ARC_DBG</div><div class='ctx'> 	default y</div><div class='ctx'> 	select KALLSYMS</div><div class='ctx'> 	help</div><div class='hunk'>@@ -394,18 +470,38 @@ config ARC_DW2_UNWIND</div><div class='ctx'> </div><div class='ctx'> config ARC_DBG_TLB_PARANOIA</div><div class='ctx'> 	bool "Paranoia Checks in Low Level TLB Handlers"</div><div class='del'>-	depends on ARC_DBG</div><div class='ctx'> 	default n</div><div class='ctx'> </div><div class='ctx'> config ARC_DBG_TLB_MISS_COUNT</div><div class='ctx'> 	bool "Profile TLB Misses"</div><div class='ctx'> 	default n</div><div class='ctx'> 	select DEBUG_FS</div><div class='del'>-	depends on ARC_DBG</div><div class='ctx'> 	help</div><div class='ctx'> 	  Counts number of I and D TLB Misses and exports them via Debugfs</div><div class='ctx'> 	  The counters can be cleared via Debugfs as well</div><div class='ctx'> </div><div class='add'>+if SMP</div><div class='add'>+</div><div class='add'>+config ARC_IPI_DBG</div><div class='add'>+	bool "Debug Inter Core interrupts"</div><div class='add'>+	default n</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+config ARC_UBOOT_SUPPORT</div><div class='add'>+	bool "Support uboot arg Handling"</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  ARC Linux by default checks for uboot provided args as pointers to</div><div class='add'>+	  external cmdline or DTB. This however breaks in absence of uboot,</div><div class='add'>+	  when booting from Metaware debugger directly, as the registers are</div><div class='add'>+	  not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus</div><div class='add'>+	  registers look like uboot args to kernel which then chokes.</div><div class='add'>+	  So only enable the uboot arg checking/processing if users are sure</div><div class='add'>+	  of uboot being in play.</div><div class='add'>+</div><div class='ctx'> config ARC_BUILTIN_DTB_NAME</div><div class='ctx'> 	string "Built in DTB"</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/arc/Makefile b/arch/arc/Makefile<br/>index db72fec0e160..46d87310220d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/Makefile</a></div><div class='hunk'>@@ -9,12 +9,14 @@</div><div class='ctx'> UTS_MACHINE := arc</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CROSS_COMPILE),)</div><div class='del'>-CROSS_COMPILE := arc-linux-uclibc-</div><div class='add'>+CROSS_COMPILE := arc-linux-</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> KBUILD_DEFCONFIG := nsim_700_defconfig</div><div class='ctx'> </div><div class='del'>-cflags-y	+= -mA7 -fno-common -pipe -fno-builtin -D__linux__</div><div class='add'>+cflags-y	+= -fno-common -pipe -fno-builtin -D__linux__</div><div class='add'>+cflags-$(CONFIG_ISA_ARCOMPACT)	+= -mA7</div><div class='add'>+cflags-$(CONFIG_ISA_ARCV2)	+= -mcpu=archs</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_ARC_CURR_IN_REG</div><div class='ctx'> # For a global register defintion, make sure it gets passed to every file</div><div class='hunk'>@@ -33,7 +35,11 @@ cflags-$(atleast_gcc44)			+= -fsection-anchors</div><div class='ctx'> </div><div class='ctx'> cflags-$(CONFIG_ARC_HAS_LLSC)		+= -mlock</div><div class='ctx'> cflags-$(CONFIG_ARC_HAS_SWAPE)		+= -mswape</div><div class='del'>-cflags-$(CONFIG_ARC_HAS_RTSC)		+= -mrtsc</div><div class='add'>+</div><div class='add'>+ifndef CONFIG_ARC_HAS_LL64</div><div class='add'>+cflags-$(CONFIG_ISA_ARCV2)		+= -mno-ll64</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> cflags-$(CONFIG_ARC_DW2_UNWIND)		+= -fasynchronous-unwind-tables</div><div class='ctx'> </div><div class='ctx'> # By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok</div><div class='hunk'>@@ -43,7 +49,8 @@ endif</div><div class='ctx'> </div><div class='ctx'> ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE</div><div class='ctx'> # Generic build system uses -O2, we want -O3</div><div class='del'>-cflags-y  += -O3</div><div class='add'>+# Note: No need to add to cflags-y as that happens anyways</div><div class='add'>+ARCH_CFLAGS += -O3</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # small data is default for elf32 tool-chain. If not usable, disable it</div><div class='hunk'>@@ -81,8 +88,9 @@ core-y		+= arch/arc/</div><div class='ctx'> # w/o this dtb won't embed into kernel binary</div><div class='ctx'> core-y		+= arch/arc/boot/dts/</div><div class='ctx'> </div><div class='del'>-core-$(CONFIG_ARC_PLAT_FPGA_LEGACY)	+= arch/arc/plat-arcfpga/</div><div class='del'>-core-$(CONFIG_ARC_PLAT_TB10X)		+= arch/arc/plat-tb10x/</div><div class='add'>+core-$(CONFIG_ARC_PLAT_SIM)	+= arch/arc/plat-sim/</div><div class='add'>+core-$(CONFIG_ARC_PLAT_TB10X)	+= arch/arc/plat-tb10x/</div><div class='add'>+core-$(CONFIG_ARC_PLAT_AXS10X)	+= arch/arc/plat-axs10x/</div><div class='ctx'> </div><div class='ctx'> drivers-$(CONFIG_OPROFILE)	+= arch/arc/oprofile/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/boot/dts/Makefile b/arch/arc/boot/dts/Makefile<br/>index faf240e29ec2..b0e3f19bbd07 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/boot/dts/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/boot/dts/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # Built-in dtb</div><div class='del'>-builtindtb-y		:= angel4</div><div class='add'>+builtindtb-y		:= nsim_700</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_ARC_BUILTIN_DTB_NAME),"")</div><div class='ctx'> 	builtindtb-y	:= $(patsubst "%",%,$(CONFIG_ARC_BUILTIN_DTB_NAME))</div><div class='head'>diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi<br/>new file mode 100644<br/>index 000000000000..a5e2726a067e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axc001.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc001.dtsi</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device tree for AXC001 770D/EM6/AS221 CPU card</div><div class='add'>+ * Note that this file only supports the 770D CPU</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,arc";</div><div class='add'>+	clock-frequency = &lt;750000000&gt;;	/* 750 MHZ */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpu_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00000000 0xf0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_intc: arc700-intc@cpu {</div><div class='add'>+			compatible = "snps,arc700-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * this GPIO block ORs all interrupts on CPU card (creg,..)</div><div class='add'>+		 * to uplink only 1 IRQ to ARC core intc</div><div class='add'>+		 */</div><div class='add'>+		dw-apb-gpio@0x2000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt; 0x2000 0x80 &gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ictl_intc: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+				interrupts = &lt;15&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_uart: dw-apb-uart@0x5000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x5000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;ictl_intc&gt;;</div><div class='add'>+			interrupts = &lt;19 4&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpmu0: pmu {</div><div class='add'>+			compatible = "snps,arc700-pct";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This INTC is actually connected to DW APB GPIO</div><div class='add'>+	 * which acts as a wire between MB INTC and CPU INTC.</div><div class='add'>+	 * GPIO INTC is configured in platform init code</div><div class='add'>+	 * and here we mimic direct connection from MB INTC to</div><div class='add'>+	 * CPU INTC, thus we set "interrupts = &lt;7&gt;" instead of</div><div class='add'>+	 * "interrupts = &lt;12&gt;"</div><div class='add'>+	 *</div><div class='add'>+	 * This intc actually resides on MB, but we move it here to</div><div class='add'>+	 * avoid duplicating the MB dtsi file given that IRQ from</div><div class='add'>+	 * this intc to cpu intc are different for axs101 and axs103</div><div class='add'>+	 */</div><div class='add'>+	mb_intc: dw-apb-ictl@0xe0012000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "snps,dw-apb-ictl";</div><div class='add'>+		reg = &lt; 0xe0012000 0x200 &gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+		interrupts = &lt; 7 &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0x80000000 0x40000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi<br/>new file mode 100644<br/>index 000000000000..1cd5e82f5dc2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axc003.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc003.dtsi</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device tree for AXC003 CPU card: HS38x UP configuration</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,arc";</div><div class='add'>+	clock-frequency = &lt;90000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpu_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00000000 0xf0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_intc: archs-intc@cpu {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * this GPIO block ORs all interrupts on CPU card (creg,..)</div><div class='add'>+		 * to uplink only 1 IRQ to ARC core intc</div><div class='add'>+		 */</div><div class='add'>+		dw-apb-gpio@0x2000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt; 0x2000 0x80 &gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ictl_intc: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+				interrupts = &lt;25&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_uart: dw-apb-uart@0x5000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x5000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;ictl_intc&gt;;</div><div class='add'>+			interrupts = &lt;2 4&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This INTC is actually connected to DW APB GPIO</div><div class='add'>+	 * which acts as a wire between MB INTC and CPU INTC.</div><div class='add'>+	 * GPIO INTC is configured in platform init code</div><div class='add'>+	 * and here we mimic direct connection from MB INTC to</div><div class='add'>+	 * CPU INTC, thus we set "interrupts = &lt;7&gt;" instead of</div><div class='add'>+	 * "interrupts = &lt;12&gt;"</div><div class='add'>+	 *</div><div class='add'>+	 * This intc actually resides on MB, but we move it here to</div><div class='add'>+	 * avoid duplicating the MB dtsi file given that IRQ from</div><div class='add'>+	 * this intc to cpu intc are different for axs101 and axs103</div><div class='add'>+	 */</div><div class='add'>+	mb_intc: dw-apb-ictl@0xe0012000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "snps,dw-apb-ictl";</div><div class='add'>+		reg = &lt; 0xe0012000 0x200 &gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+		interrupts = &lt; 24 &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0x80000000 0x40000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi<br/>new file mode 100644<br/>index 000000000000..2f0b33257db2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axc003_idu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axc003_idu.dtsi</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,arc";</div><div class='add'>+	clock-frequency = &lt;90000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpu_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00000000 0xf0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_intc: archs-intc@cpu {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idu_intc: idu-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-idu-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * &lt;hwirq  distribution&gt;</div><div class='add'>+			 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+			 */</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * upstream irqs to core intc - downstream these are</div><div class='add'>+			 * "COMMON" irq 0,1..</div><div class='add'>+			 */</div><div class='add'>+			interrupts = &lt;24 25&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * this GPIO block ORs all interrupts on CPU card (creg,..)</div><div class='add'>+		 * to uplink only 1 IRQ to ARC core intc</div><div class='add'>+		 */</div><div class='add'>+		dw-apb-gpio@0x2000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt; 0x2000 0x80 &gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ictl_intc: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+</div><div class='add'>+				/*</div><div class='add'>+				 * cmn irq 1 -&gt; cpu irq 25</div><div class='add'>+				 * Distribute to cpu0 only</div><div class='add'>+				 */</div><div class='add'>+				interrupts = &lt;1 1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_uart: dw-apb-uart@0x5000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x5000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;ictl_intc&gt;;</div><div class='add'>+			interrupts = &lt;2 4&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This INTC is actually connected to DW APB GPIO</div><div class='add'>+	 * which acts as a wire between MB INTC and CPU INTC.</div><div class='add'>+	 * GPIO INTC is configured in platform init code</div><div class='add'>+	 * and here we mimic direct connection from MB INTC to</div><div class='add'>+	 * CPU INTC, thus we set "interrupts = &lt;0 1&gt;" instead of</div><div class='add'>+	 * "interrupts = &lt;12&gt;"</div><div class='add'>+	 *</div><div class='add'>+	 * This intc actually resides on MB, but we move it here to</div><div class='add'>+	 * avoid duplicating the MB dtsi file given that IRQ from</div><div class='add'>+	 * this intc to cpu intc are different for axs101 and axs103</div><div class='add'>+	 */</div><div class='add'>+	mb_intc: dw-apb-ictl@0xe0012000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "snps,dw-apb-ictl";</div><div class='add'>+		reg = &lt; 0xe0012000 0x200 &gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 1&gt;;	/* cmn irq 0 -&gt; cpu irq 24</div><div class='add'>+					   distribute to cpu0 only */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0x80000000 0x40000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axs101.dts b/arch/arc/boot/dts/axs101.dts<br/>new file mode 100644<br/>index 000000000000..3f9b0582e734<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axs101.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs101.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * ARC AXS101 S/W development platform</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "axc001.dtsi"</div><div class='add'>+/include/ "axs10x_mb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,axs101", "snps,arc-sdp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axs103.dts b/arch/arc/boot/dts/axs103.dts<br/>new file mode 100644<br/>index 000000000000..e6d0e31ea299<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axs103.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs103.dts</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device Tree for AXS103 SDP with AXS10X Main Board and</div><div class='add'>+ * AXC003 FPGA Card (with UP bitfile)</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "axc003.dtsi"</div><div class='add'>+/include/ "axs10x_mb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,axs103", "snps,arc-sdp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axs103_idu.dts b/arch/arc/boot/dts/axs103_idu.dts<br/>new file mode 100644<br/>index 000000000000..f999fef5a60a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axs103_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs103_idu.dts</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device Tree for AXS103 SDP with AXS10X Main Board and</div><div class='add'>+ * AXC003 FPGA Card (with SMP bitfile)</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "axc003_idu.dtsi"</div><div class='add'>+/include/ "axs10x_mb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,axs103", "snps,arc-sdp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi<br/>new file mode 100644<br/>index 000000000000..f3db32154973<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/axs10x_mb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/axs10x_mb.dtsi</a></div><div class='hunk'>@@ -0,0 +1,224 @@</div><div class='add'>+/*</div><div class='add'>+ * Support for peripherals on the AXS10x mainboard</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	axs10x_mb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0xe0000000 0x10000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mb_intc&gt;;</div><div class='add'>+</div><div class='add'>+		clocks {</div><div class='add'>+			i2cclk: i2cclk {</div><div class='add'>+				compatible = "fixed-clock";</div><div class='add'>+				clock-frequency = &lt;50000000&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apbclk: apbclk {</div><div class='add'>+				compatible = "fixed-clock";</div><div class='add'>+				clock-frequency = &lt;50000000&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmcclk: mmcclk {</div><div class='add'>+				compatible = "fixed-clock";</div><div class='add'>+				clock-frequency = &lt;50000000&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet@0x18000 {</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "snps,dwmac";</div><div class='add'>+			reg = &lt; 0x18000 0x2000 &gt;;</div><div class='add'>+			interrupts = &lt; 4 &gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			phy-mode = "rgmii";</div><div class='add'>+			snps,pbl = &lt; 32 &gt;;</div><div class='add'>+			clocks = &lt;&amp;apbclk&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@0x40000 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt; 0x40000 0x100 &gt;;</div><div class='add'>+			interrupts = &lt; 8 &gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@0x60000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt; 0x60000 0x100 &gt;;</div><div class='add'>+			interrupts = &lt; 8 &gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * According to DW Mobile Storage databook it is required</div><div class='add'>+		 * to use  "Hold Register" if card is enumerated in SDR12 or</div><div class='add'>+		 * SDR25 modes.</div><div class='add'>+		 *</div><div class='add'>+		 * Utilization of "Hold Register" is already implemented via</div><div class='add'>+		 * dw_mci_pltfm_prepare_command() which in its turn gets</div><div class='add'>+		 * used through dw_mci_drv_data-&gt;prepare_command call-back.</div><div class='add'>+		 * This call-back is used in Altera Socfpga platform and so</div><div class='add'>+		 * we may reuse it saying that we're compatible with their</div><div class='add'>+		 * "altr,socfpga-dw-mshc".</div><div class='add'>+		 *</div><div class='add'>+		 * Most probably "Hold Register" utilization is platform-</div><div class='add'>+		 * independent requirement which means that single unified</div><div class='add'>+		 * "snps,dw-mshc" should be enough for all users of DW MMC once</div><div class='add'>+		 * dw_mci_pltfm_prepare_command() is used in generic platform</div><div class='add'>+		 * code.</div><div class='add'>+		 */</div><div class='add'>+		mmc@0x15000 {</div><div class='add'>+			compatible = "altr,socfpga-dw-mshc";</div><div class='add'>+			reg = &lt; 0x15000 0x400 &gt;;</div><div class='add'>+			num-slots = &lt; 1 &gt;;</div><div class='add'>+			fifo-depth = &lt; 16 &gt;;</div><div class='add'>+			card-detect-delay = &lt; 200 &gt;;</div><div class='add'>+			clocks = &lt;&amp;apbclk&gt;, &lt;&amp;mmcclk&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			interrupts = &lt; 7 &gt;;</div><div class='add'>+			bus-width = &lt; 4 &gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart@0x20000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x20000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333333&gt;;</div><div class='add'>+			interrupts = &lt;17&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart@0x21000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x21000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333333&gt;;</div><div class='add'>+			interrupts = &lt;18&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* UART muxed with USB data port (ttyS3) */</div><div class='add'>+		uart@0x22000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x22000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;33333333&gt;;</div><div class='add'>+			interrupts = &lt;19&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@0x1d000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x1d000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;i2cclk&gt;;</div><div class='add'>+			interrupts = &lt;14&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@0x1e000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x1e000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;i2cclk&gt;;</div><div class='add'>+			interrupts = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@0x1f000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x1f000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;i2cclk&gt;;</div><div class='add'>+			interrupts = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@0x54{</div><div class='add'>+				compatible = "24c01";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+				pagesize = &lt;0x8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@0x57{</div><div class='add'>+				compatible = "24c04";</div><div class='add'>+				reg = &lt;0x57&gt;;</div><div class='add'>+				pagesize = &lt;0x8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0:gpio@13000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x13000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio0_banka: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;32&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio0_bankb: gpio-controller@1 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio0_bankc: gpio-controller@2 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1:gpio@14000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x14000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio1_banka: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1_bankb: gpio-controller@1 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;10&gt;;</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1_bankc: gpio-controller@2 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/angel4.dts b/arch/arc/boot/dts/nsim_700.dts<br/>index 3b076fbd8366..105a0017023f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/boot/dts/angel4.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/boot/dts/angel4.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/nsim_700.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_700.dts</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> /include/ "skeleton.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	compatible = "snps,arc-angel4";</div><div class='add'>+	compatible = "snps,nsim";</div><div class='ctx'> 	clock-frequency = &lt;80000000&gt;;	/* 80 MHZ */</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts<br/>new file mode 100644<br/>index 000000000000..911f069e0540<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/nsim_hs.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_hs.dts</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,nsim_hs";</div><div class='add'>+	interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;arcuart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpga {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* child and parent address space 1:1 mapped */</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		core_intc: core-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcuart0: serial@c0fc1000 {</div><div class='add'>+			compatible = "snps,arc-uart";</div><div class='add'>+			reg = &lt;0xc0fc1000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;24&gt;;</div><div class='add'>+			clock-frequency = &lt;80000000&gt;;</div><div class='add'>+			current-speed = &lt;115200&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts<br/>new file mode 100644<br/>index 000000000000..46ab31975612<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/nsim_hs_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsim_hs_idu.dts</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,nsim_hs";</div><div class='add'>+	interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;arcuart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpga {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* child and parent address space 1:1 mapped */</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		core_intc: core-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idu_intc: idu-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-idu-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * &lt;hwirq  distribution&gt;</div><div class='add'>+			 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+			 */</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * upstream irqs to core intc - downstream these are</div><div class='add'>+			 * "COMMON" irq 0,1..</div><div class='add'>+			 */</div><div class='add'>+			interrupts = &lt;24 25 26 27 28 29 30 31&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcuart0: serial@c0fc1000 {</div><div class='add'>+			compatible = "snps,arc-uart";</div><div class='add'>+			reg = &lt;0xc0fc1000 0x100&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+			interrupts = &lt;0 0&gt;;</div><div class='add'>+			clock-frequency = &lt;80000000&gt;;</div><div class='add'>+			current-speed = &lt;115200&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts<br/>new file mode 100644<br/>index 000000000000..d64a96f8515a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/nsimosci_hs.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsimosci_hs.dts</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,nsimosci_hs";</div><div class='add'>+	clock-frequency = &lt;20000000&gt;;	/* 20 MHZ */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		/* this is for console on PGU */</div><div class='add'>+		/* bootargs = "console=tty0 consoleblank=0"; */</div><div class='add'>+		/* this is for console on serial */</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpga {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* child and parent address space 1:1 mapped */</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		core_intc: core-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@f0000000 {</div><div class='add'>+			compatible = "ns8250";</div><div class='add'>+			reg = &lt;0xf0000000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;24&gt;;</div><div class='add'>+			clock-frequency = &lt;3686400&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			no-loopback-test = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pgu0: pgu@f9000000 {</div><div class='add'>+			compatible = "snps,arcpgufb";</div><div class='add'>+			reg = &lt;0xf9000000 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ps2: ps2@f9001000 {</div><div class='add'>+			compatible = "snps,arc_ps2";</div><div class='add'>+			reg = &lt;0xf9000400 0x14&gt;;</div><div class='add'>+			interrupts = &lt;27&gt;;</div><div class='add'>+			interrupt-names = "arc_ps2_irq";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth0: ethernet@f0003000 {</div><div class='add'>+			compatible = "snps,oscilan";</div><div class='add'>+			reg = &lt;0xf0003000 0x44&gt;;</div><div class='add'>+			interrupts = &lt;25&gt;, &lt;26&gt;;</div><div class='add'>+			interrupt-names = "rx", "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts<br/>new file mode 100644<br/>index 000000000000..f6bf0ca95a57<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/nsimosci_hs_idu.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/nsimosci_hs_idu.dts</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,nsimosci_hs";</div><div class='add'>+	clock-frequency = &lt;5000000&gt;;	/* 5 MHZ */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		/* this is for console on serial */</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpga {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* child and parent address space 1:1 mapped */</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		core_intc: core-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+/*			interrupts = &lt;16 17 18 19 20 21 22 23 24 25&gt;; */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idu_intc: idu-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-idu-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * &lt;hwirq  distribution&gt;</div><div class='add'>+			 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+			 */</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * upstream irqs to core intc - downstream these are</div><div class='add'>+			 * "COMMON" irq 0,1..</div><div class='add'>+			 */</div><div class='add'>+			interrupts = &lt;24 25 26 27 28 29 30 31&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@f0000000 {</div><div class='add'>+			compatible = "ns8250";</div><div class='add'>+			reg = &lt;0xf0000000 0x2000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+			interrupts = &lt;0 0&gt;; /* cmn irq 0 -&gt; cpu irq 24</div><div class='add'>+						RR distribute to all cpus */</div><div class='add'>+			clock-frequency = &lt;3686400&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			no-loopback-test = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pgu0: pgu@f9000000 {</div><div class='add'>+			compatible = "snps,arcpgufb";</div><div class='add'>+			reg = &lt;0xf9000000 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ps2: ps2@f9001000 {</div><div class='add'>+			compatible = "snps,arc_ps2";</div><div class='add'>+			reg = &lt;0xf9000400 0x14&gt;;</div><div class='add'>+			interrupts = &lt;3 0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+			interrupt-names = "arc_ps2_irq";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth0: ethernet@f0003000 {</div><div class='add'>+			compatible = "snps,oscilan";</div><div class='add'>+			reg = &lt;0xf0003000 0x44&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+			interrupts = &lt;1 2&gt;, &lt;2 2&gt;;</div><div class='add'>+			interrupt-names = "rx", "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arcpct0: pct {</div><div class='add'>+			compatible = "snps,archs-pct";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi<br/>new file mode 100644<br/>index 000000000000..9393fd902f0d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/vdk_axc003.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axc003.dtsi</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013, 2014 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device tree for AXC003 CPU card: HS38x UP configuration (VDK version)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,arc";</div><div class='add'>+	clock-frequency = &lt;50000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpu_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00000000 0xf0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_intc: archs-intc@cpu {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_uart: dw-apb-uart@0x5000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x5000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;2403200&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;19&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mb_intc: dw-apb-ictl@0xe0012000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "snps,dw-apb-ictl";</div><div class='add'>+		reg = &lt; 0xe0012000 0x200 &gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+		interrupts = &lt; 18 &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0x80000000 0x40000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi<br/>new file mode 100644<br/>index 000000000000..9bee8ed09eb0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/vdk_axc003_idu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axc003_idu.dtsi</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device tree for AXC003 CPU card:</div><div class='add'>+ * HS38x2 (Dual Core) with IDU intc (VDK version)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,arc";</div><div class='add'>+	clock-frequency = &lt;50000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpu_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00000000 0xf0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_intc: archs-intc@cpu {</div><div class='add'>+			compatible = "snps,archs-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idu_intc: idu-interrupt-controller {</div><div class='add'>+			compatible = "snps,archs-idu-intc";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * &lt;hwirq  distribution&gt;</div><div class='add'>+			 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3</div><div class='add'>+			 */</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;24 25 26 27&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_uart: dw-apb-uart@0x5000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x5000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;2403200&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+			interrupts = &lt;2 0&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mb_intc: dw-apb-ictl@0xe0012000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "snps,dw-apb-ictl";</div><div class='add'>+		reg = &lt; 0xe0012000 0x200 &gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='add'>+		interrupts = &lt; 0 0 &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0x80000000 0x40000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi<br/>new file mode 100644<br/>index 000000000000..45cd665fca23<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/vdk_axs10x_mb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_axs10x_mb.dtsi</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/*</div><div class='add'>+ * Support for peripherals on the AXS10x mainboard (VDK version)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	axs10x_mb_vdk {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0xe0000000 0x10000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mb_intc&gt;;</div><div class='add'>+</div><div class='add'>+		clocks {</div><div class='add'>+			apbclk: apbclk {</div><div class='add'>+				compatible = "fixed-clock";</div><div class='add'>+				clock-frequency = &lt;50000000&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet@0x18000 {</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "snps,dwmac";</div><div class='add'>+			reg = &lt; 0x18000 0x2000 &gt;;</div><div class='add'>+			interrupts = &lt; 4 &gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			phy-mode = "rgmii";</div><div class='add'>+			snps,phy-addr = &lt; 0 &gt;;  // VDK model phy address is 0</div><div class='add'>+			snps,pbl = &lt; 32 &gt;;</div><div class='add'>+			clocks = &lt;&amp;apbclk&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@0x40000 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt; 0x40000 0x100 &gt;;</div><div class='add'>+			interrupts = &lt; 8 &gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart@0x20000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x20000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;2403200&gt;;</div><div class='add'>+			interrupts = &lt;17&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart@0x21000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x21000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;2403200&gt;;</div><div class='add'>+			interrupts = &lt;18&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart@0x22000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x22000 0x100&gt;;</div><div class='add'>+			clock-frequency = &lt;2403200&gt;;</div><div class='add'>+			interrupts = &lt;19&gt;;</div><div class='add'>+			baud = &lt;115200&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */</div><div class='add'>+		pgu@0x17000 {</div><div class='add'>+			compatible = "snps,arcpgufb";</div><div class='add'>+			reg = &lt;0x17000 0x400&gt;;</div><div class='add'>+			clock-frequency = &lt;51000000&gt;; /* PGU'clock is initated in init function */</div><div class='add'>+			/* interrupts = &lt;5&gt;;   PGU interrupts not used, this vector is used for ps2 below */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */</div><div class='add'>+		ps2: ps2@e0017400 {</div><div class='add'>+			compatible = "snps,arc_ps2";</div><div class='add'>+			reg = &lt;0x17400 0x14&gt;;</div><div class='add'>+			interrupts = &lt;5&gt;;</div><div class='add'>+			interrupt-names = "arc_ps2_irq";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_hs38.dts b/arch/arc/boot/dts/vdk_hs38.dts<br/>new file mode 100644<br/>index 000000000000..5d803dd2de59<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/vdk_hs38.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_hs38.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * ARC HS38 Virtual Development Kit (VDK)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "vdk_axc003.dtsi"</div><div class='add'>+/include/ "vdk_axs10x_mb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,axs103";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_hs38_smp.dts b/arch/arc/boot/dts/vdk_hs38_smp.dts<br/>new file mode 100644<br/>index 000000000000..031a5bc79b3e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/boot/dts/vdk_hs38_smp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/boot/dts/vdk_hs38_smp.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * ARC HS38 Virtual Development Kit, SMP version (VDK)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "vdk_axc003_idu.dtsi"</div><div class='add'>+/include/ "vdk_axs10x_mb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "snps,axs103";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arc/configs/axs101_defconfig b/arch/arc/configs/axs101_defconfig<br/>new file mode 100644<br/>index 000000000000..562dac6a7f78<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/axs101_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs101_defconfig</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_POSIX_MQUEUE=y</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NO_HZ_IDLE=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../arc_initramfs/"</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_ARC_PLAT_AXS10X=y</div><div class='add'>+CONFIG_AXS101=y</div><div class='add'>+CONFIG_ARC_CACHE_LINE_SHIFT=5</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="axs101"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NATIONAL_PHY=y</div><div class='add'>+# CONFIG_USB_NET_DRIVERS is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+CONFIG_MOUSE_SERIAL=y</div><div class='add'>+CONFIG_MOUSE_SYNAPTICS_USB=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_CLUT224 is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_DW=y</div><div class='add'>+CONFIG_MMC_DW_IDMAC=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NTFS_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arc/configs/axs103_defconfig b/arch/arc/configs/axs103_defconfig<br/>new file mode 100644<br/>index 000000000000..83a6d8d5cc58<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/axs103_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs103_defconfig</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_POSIX_MQUEUE=y</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NO_HZ_IDLE=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_ARC_PLAT_AXS10X=y</div><div class='add'>+CONFIG_AXS103=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="axs103"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_AXS=y</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NATIONAL_PHY=y</div><div class='add'>+# CONFIG_USB_NET_DRIVERS is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+CONFIG_MOUSE_SERIAL=y</div><div class='add'>+CONFIG_MOUSE_SYNAPTICS_USB=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_CLUT224 is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_DW=y</div><div class='add'>+CONFIG_MMC_DW_IDMAC=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NTFS_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arc/configs/axs103_smp_defconfig b/arch/arc/configs/axs103_smp_defconfig<br/>new file mode 100644<br/>index 000000000000..f1e1c84e0dda<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/axs103_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/axs103_smp_defconfig</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_POSIX_MQUEUE=y</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NO_HZ_IDLE=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_ARC_PLAT_AXS10X=y</div><div class='add'>+CONFIG_AXS103=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="axs103_idu"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_AXS=y</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NATIONAL_PHY=y</div><div class='add'>+# CONFIG_USB_NET_DRIVERS is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+CONFIG_MOUSE_SERIAL=y</div><div class='add'>+CONFIG_MOUSE_SYNAPTICS_USB=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_CLUT224 is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_DW=y</div><div class='add'>+CONFIG_MMC_DW_IDMAC=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NTFS_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arc/configs/nsim_700_defconfig b/arch/arc/configs/nsim_700_defconfig<br/>index ef4d3bc7b6c0..138f9d887957 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/configs/nsim_700_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/configs/nsim_700_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsim_700_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_700_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-"</div><div class='ctx'> # CONFIG_LOCALVERSION_AUTO is not set</div><div class='ctx'> CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='ctx'> # CONFIG_SWAP is not set</div><div class='hunk'>@@ -22,9 +22,8 @@ CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='del'>-CONFIG_ARC_PLAT_FPGA_LEGACY=y</div><div class='del'>-# CONFIG_ARC_HAS_RTSC is not set</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="angel4"</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> # CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='head'>diff --git a/arch/arc/configs/nsim_hs_defconfig b/arch/arc/configs/nsim_hs_defconfig<br/>new file mode 100644<br/>index 000000000000..f761a7c70761<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsim_hs_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_hs_defconfig</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_POSIX_MQUEUE=y</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_KPROBES=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_UNIX_DIAG=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+# CONFIG_BLK_DEV is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_ARC=y</div><div class='add'>+CONFIG_SERIAL_ARC_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT2_FS_XATTR=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+CONFIG_XZ_DEC=y</div><div class='head'>diff --git a/arch/arc/configs/nsim_hs_smp_defconfig b/arch/arc/configs/nsim_hs_smp_defconfig<br/>new file mode 100644<br/>index 000000000000..dc6f74f41283<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsim_hs_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsim_hs_smp_defconfig</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_KPROBES=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='add'>+CONFIG_ARC_BOARD_ML509=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_UNIX_DIAG=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+# CONFIG_BLK_DEV is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_ARC=y</div><div class='add'>+CONFIG_SERIAL_ARC_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT2_FS_XATTR=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_XZ_DEC=y</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig<br/>index d2ac4e56ba1d..31e1d95764ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/configs/nsimosci_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/configs/nsimosci_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsimosci_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-"</div><div class='ctx'> # CONFIG_LOCALVERSION_AUTO is not set</div><div class='ctx'> CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='ctx'> # CONFIG_SWAP is not set</div><div class='hunk'>@@ -23,8 +23,7 @@ CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='del'>-CONFIG_ARC_PLAT_FPGA_LEGACY=y</div><div class='del'>-# CONFIG_ARC_HAS_RTSC is not set</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='ctx'> CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_hs_defconfig b/arch/arc/configs/nsimosci_hs_defconfig<br/>new file mode 100644<br/>index 000000000000..3fef0a210c56<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsimosci_hs_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_hs_defconfig</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NO_HZ=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_KPROBES=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs"</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_UNIX_DIAG=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+# CONFIG_BLK_DEV is not set</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_NET_OSCI_LAN=y</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_MOUSE_PS2_ALPS is not set</div><div class='add'>+# CONFIG_MOUSE_PS2_LOGIPS2PP is not set</div><div class='add'>+# CONFIG_MOUSE_PS2_SYNAPTICS is not set</div><div class='add'>+# CONFIG_MOUSE_PS2_TRACKPOINT is not set</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+# CONFIG_SERIO_SERPORT is not set</div><div class='add'>+CONFIG_SERIO_ARC_PS2=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_NR_UARTS=1</div><div class='add'>+CONFIG_SERIAL_8250_RUNTIME_UARTS=1</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT2_FS_XATTR=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig b/arch/arc/configs/nsimosci_hs_smp_defconfig<br/>new file mode 100644<br/>index 000000000000..51784837daae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/nsimosci_hs_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/nsimosci_hs_smp_defconfig</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_NO_HZ=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_KPROBES=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARC_PLAT_SIM=y</div><div class='add'>+CONFIG_ARC_BOARD_ML509=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+CONFIG_ARC_HAS_LL64=y</div><div class='add'>+# CONFIG_ARC_HAS_RTSC is not set</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_PACKET_DIAG=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_UNIX_DIAG=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+# CONFIG_BLK_DEV is not set</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_STMICRO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NET_OSCI_LAN=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+# CONFIG_SERIO_SERPORT is not set</div><div class='add'>+CONFIG_SERIO_LIBPS2=y</div><div class='add'>+CONFIG_SERIO_ARC_PS2=y</div><div class='add'>+CONFIG_VT_HW_CONSOLE_BINDING=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_NR_UARTS=1</div><div class='add'>+CONFIG_SERIAL_8250_RUNTIME_UARTS=1</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_ARCPGU_RGB888=y</div><div class='add'>+CONFIG_ARCPGU_DISPTYPE=0</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT2_FS_XATTR=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_FTRACE=y</div><div class='head'>diff --git a/arch/arc/configs/tb10x_defconfig b/arch/arc/configs/tb10x_defconfig<br/>index 6be6492442d6..3b4dc9cebcf1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/configs/tb10x_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/configs/tb10x_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/tb10x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/tb10x_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-"</div><div class='ctx'> # CONFIG_LOCALVERSION_AUTO is not set</div><div class='ctx'> CONFIG_DEFAULT_HOSTNAME="tb10x"</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='hunk'>@@ -26,7 +26,6 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLOCK is not set</div><div class='ctx'> CONFIG_ARC_PLAT_TB10X=y</div><div class='ctx'> CONFIG_ARC_CACHE_LINE_SHIFT=5</div><div class='del'>-# CONFIG_ARC_HAS_RTSC is not set</div><div class='ctx'> CONFIG_ARC_STACK_NONEXEC=y</div><div class='ctx'> CONFIG_HZ=250</div><div class='ctx'> CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"</div><div class='head'>diff --git a/arch/arc/configs/vdk_hs38_defconfig b/arch/arc/configs/vdk_hs38_defconfig<br/>new file mode 100644<br/>index 000000000000..ef35ef3923dd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/vdk_hs38_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/vdk_hs38_defconfig</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_ARC_PLAT_AXS10X=y</div><div class='add'>+CONFIG_AXS103=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_ARC_UBOOT_SUPPORT=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_SLRAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NATIONAL_PHY=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+CONFIG_SERIO_ARC_PS2=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_ARCPGU_RGB888=y</div><div class='add'>+CONFIG_ARCPGU_DISPTYPE=0</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_CLUT224 is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+# CONFIG_USB_EHCI_TT_NEWSCHED is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_SERIAL=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NTFS_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_DEBUG_SHIRQ=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig b/arch/arc/configs/vdk_hs38_smp_defconfig<br/>new file mode 100644<br/>index 000000000000..634509e5e572<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/configs/vdk_hs38_smp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/configs/vdk_hs38_smp_defconfig</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arc-linux-uclibc-"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_DEFAULT_HOSTNAME="ARCLinux"</div><div class='add'>+# CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_ARC_PLAT_AXS10X=y</div><div class='add'>+CONFIG_AXS103=y</div><div class='add'>+CONFIG_ISA_ARCV2=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+# CONFIG_ARC_HAS_GRTC is not set</div><div class='add'>+CONFIG_ARC_UBOOT_SUPPORT=y</div><div class='add'>+CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_NET_KEY=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_SLRAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_NATIONAL_PHY=y</div><div class='add'>+CONFIG_MOUSE_PS2_TOUCHKIT=y</div><div class='add'>+CONFIG_SERIO_ARC_PS2=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_DW=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_ARCPGU_RGB888=y</div><div class='add'>+CONFIG_ARCPGU_DISPTYPE=0</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_CLUT224 is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+# CONFIG_USB_EHCI_TT_NEWSCHED is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_SERIAL=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NTFS_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_DEBUG_SHIRQ=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arc/include/asm/Kbuild b/arch/arc/include/asm/Kbuild<br/>index be0c39e76f7c..7611b10a2d23 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/Kbuild</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> generic-y += auxvec.h</div><div class='del'>-generic-y += barrier.h</div><div class='ctx'> generic-y += bitsperlong.h</div><div class='ctx'> generic-y += bugs.h</div><div class='ctx'> generic-y += clkdev.h</div><div class='hunk'>@@ -23,6 +22,7 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += param.h</div><div class='hunk'>@@ -33,7 +33,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += shmbuf.h</div><div class='ctx'> generic-y += siginfo.h</div><div class='head'>diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h<br/>index e2b1b1211b0d..070f58827a5c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/arcregs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/arcregs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/arcregs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/arcregs.h</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #define ARC_REG_PERIBASE_BCR	0x69</div><div class='ctx'> #define ARC_REG_FP_BCR		0x6B	/* ARCompact: Single-Precision FPU */</div><div class='ctx'> #define ARC_REG_DPFP_BCR	0x6C	/* ARCompact: Dbl Precision FPU */</div><div class='add'>+#define ARC_REG_FP_V2_BCR	0xc8	/* ARCv2 FPU */</div><div class='add'>+#define ARC_REG_SLC_BCR		0xce</div><div class='ctx'> #define ARC_REG_DCCM_BCR	0x74	/* DCCM Present + SZ */</div><div class='ctx'> #define ARC_REG_TIMERS_BCR	0x75</div><div class='ctx'> #define ARC_REG_AP_BCR		0x76</div><div class='hunk'>@@ -31,6 +33,7 @@</div><div class='ctx'> #define ARC_REG_BPU_BCR		0xc0</div><div class='ctx'> #define ARC_REG_ISA_CFG_BCR	0xc1</div><div class='ctx'> #define ARC_REG_RTT_BCR		0xF2</div><div class='add'>+#define ARC_REG_IRQ_BCR		0xF3</div><div class='ctx'> #define ARC_REG_SMART_BCR	0xFF</div><div class='ctx'> </div><div class='ctx'> /* status32 Bits Positions */</div><div class='hunk'>@@ -51,6 +54,7 @@</div><div class='ctx'>  * [15: 8] = Exception Cause Code</div><div class='ctx'>  * [ 7: 0] = Exception Parameters (for certain types only)</div><div class='ctx'>  */</div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> #define ECR_V_MEM_ERR			0x01</div><div class='ctx'> #define ECR_V_INSN_ERR			0x02</div><div class='ctx'> #define ECR_V_MACH_CHK			0x20</div><div class='hunk'>@@ -58,6 +62,15 @@</div><div class='ctx'> #define ECR_V_DTLB_MISS			0x22</div><div class='ctx'> #define ECR_V_PROTV			0x23</div><div class='ctx'> #define ECR_V_TRAP			0x25</div><div class='add'>+#else</div><div class='add'>+#define ECR_V_MEM_ERR			0x01</div><div class='add'>+#define ECR_V_INSN_ERR			0x02</div><div class='add'>+#define ECR_V_MACH_CHK			0x03</div><div class='add'>+#define ECR_V_ITLB_MISS			0x04</div><div class='add'>+#define ECR_V_DTLB_MISS			0x05</div><div class='add'>+#define ECR_V_PROTV			0x06</div><div class='add'>+#define ECR_V_TRAP			0x09</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* DTLB Miss and Protection Violation Cause Codes */</div><div class='ctx'> </div><div class='hunk'>@@ -76,9 +89,6 @@</div><div class='ctx'> #define ECR_C_BIT_DTLB_LD_MISS		8</div><div class='ctx'> #define ECR_C_BIT_DTLB_ST_MISS		9</div><div class='ctx'> </div><div class='del'>-/* Dummy ECR values for Interrupts */</div><div class='del'>-#define event_IRQ1		0x0031abcd</div><div class='del'>-#define event_IRQ2		0x0032abcd</div><div class='ctx'> </div><div class='ctx'> /* Auxiliary registers */</div><div class='ctx'> #define AUX_IDENTITY		4</div><div class='hunk'>@@ -204,9 +214,11 @@ struct bcr_identity {</div><div class='ctx'> </div><div class='ctx'> struct bcr_isa {</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-	unsigned int pad1:23, atomic1:1, ver:8;</div><div class='add'>+	unsigned int div_rem:4, pad2:4, ldd:1, unalign:1, atomic:1, be:1,</div><div class='add'>+		     pad1:11, atomic1:1, ver:8;</div><div class='ctx'> #else</div><div class='del'>-	unsigned int ver:8, atomic1:1, pad1:23;</div><div class='add'>+	unsigned int ver:8, atomic1:1, pad1:11, be:1, atomic:1, unalign:1,</div><div class='add'>+		     ldd:1, pad2:4, div_rem:4;</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -269,11 +281,19 @@ struct bcr_fp_arcompact {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bcr_fp_arcv2 {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	unsigned int pad2:15, dp:1, pad1:7, sp:1, ver:8;</div><div class='add'>+#else</div><div class='add'>+	unsigned int ver:8, sp:1, pad1:7, dp:1, pad2:15;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct bcr_timer {</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-	unsigned int pad2:15, rtsc:1, pad1:6, t1:1, t0:1, ver:8;</div><div class='add'>+	unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;</div><div class='ctx'> #else</div><div class='del'>-	unsigned int ver:8, t0:1, t1:1, pad1:6, rtsc:1, pad2:15;</div><div class='add'>+	unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -285,6 +305,14 @@ struct bcr_bpu_arcompact {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bcr_bpu_arcv2 {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	unsigned int pad:6, fbe:2, tqe:2, ts:4, ft:1, rse:2, pte:3, bce:3, ver:8;</div><div class='add'>+#else</div><div class='add'>+	unsigned int ver:8, bce:3, pte:3, rse:2, ft:1, ts:4, tqe:2, fbe:2, pad:6;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct bcr_generic {</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='ctx'> 	unsigned int pad:24, ver:8;</div><div class='hunk'>@@ -299,11 +327,12 @@ struct bcr_generic {</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_arc_mmu {</div><div class='del'>-	unsigned int ver, pg_sz, sets, ways, u_dtlb, u_itlb, num_tlb;</div><div class='add'>+	unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, u_dtlb:6, u_itlb:6;</div><div class='add'>+	unsigned int num_tlb:16, sets:12, ways:4;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_arc_cache {</div><div class='del'>-	unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6;</div><div class='add'>+	unsigned int sz_k:14, line_len:8, assoc:4, ver:4, alias:1, vipt:1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_arc_bpu {</div><div class='hunk'>@@ -315,14 +344,13 @@ struct cpuinfo_arc_ccm {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_arc {</div><div class='del'>-	struct cpuinfo_arc_cache icache, dcache;</div><div class='add'>+	struct cpuinfo_arc_cache icache, dcache, slc;</div><div class='ctx'> 	struct cpuinfo_arc_mmu mmu;</div><div class='ctx'> 	struct cpuinfo_arc_bpu bpu;</div><div class='ctx'> 	struct bcr_identity core;</div><div class='ctx'> 	struct bcr_isa isa;</div><div class='ctx'> 	struct bcr_timer timers;</div><div class='ctx'> 	unsigned int vec_base;</div><div class='del'>-	unsigned int uncached_base;</div><div class='ctx'> 	struct cpuinfo_arc_ccm iccm, dccm;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,</div><div class='hunk'>@@ -336,6 +364,22 @@ struct cpuinfo_arc {</div><div class='ctx'> </div><div class='ctx'> extern struct cpuinfo_arc cpuinfo_arc700[];</div><div class='ctx'> </div><div class='add'>+static inline int is_isa_arcv2(void)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_ISA_ARCV2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is_isa_arcompact(void)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_ISA_ARCOMPACT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ISA_ARCOMPACT) &amp;&amp; !defined(_CPU_DEFAULT_A7)</div><div class='add'>+#error "Toolchain not configured for ARCompact builds"</div><div class='add'>+#elif defined(CONFIG_ISA_ARCV2) &amp;&amp; !defined(_CPU_DEFAULT_HS)</div><div class='add'>+#error "Toolchain not configured for ARCv2 builds"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ASEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_ARC_ARCREGS_H */</div><div class='head'>diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h<br/>index 9917a45fc430..03484cb4d16d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/atomic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/atomic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/atomic.h</a></div><div class='hunk'>@@ -23,13 +23,21 @@</div><div class='ctx'> </div><div class='ctx'> #define atomic_set(v, i) (((v)-&gt;counter) = (i))</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+#define PREFETCHW	"	prefetchw   [%1]	\n"</div><div class='add'>+#else</div><div class='add'>+#define PREFETCHW</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define ATOMIC_OP(op, c_op, asm_op)					\</div><div class='ctx'> static inline void atomic_##op(int i, atomic_t *v)			\</div><div class='ctx'> {									\</div><div class='ctx'> 	unsigned int temp;						\</div><div class='ctx'> 									\</div><div class='ctx'> 	__asm__ __volatile__(						\</div><div class='del'>-	"1:	llock   %0, [%1]	\n"				\</div><div class='add'>+	"1:				\n"				\</div><div class='add'>+	PREFETCHW							\</div><div class='add'>+	"	llock   %0, [%1]	\n"				\</div><div class='ctx'> 	"	" #asm_op " %0, %0, %2	\n"				\</div><div class='ctx'> 	"	scond   %0, [%1]	\n"				\</div><div class='ctx'> 	"	bnz     1b		\n"				\</div><div class='hunk'>@@ -43,8 +51,16 @@ static inline int atomic_##op##_return(int i, atomic_t *v)		\</div><div class='ctx'> {									\</div><div class='ctx'> 	unsigned int temp;						\</div><div class='ctx'> 									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * Explicit full memory barrier needed before/after as		\</div><div class='add'>+	 * LLOCK/SCOND thmeselves don't provide any such semantics	\</div><div class='add'>+	 */								\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='ctx'> 	__asm__ __volatile__(						\</div><div class='del'>-	"1:	llock   %0, [%1]	\n"				\</div><div class='add'>+	"1:				\n"				\</div><div class='add'>+	PREFETCHW							\</div><div class='add'>+	"	llock   %0, [%1]	\n"				\</div><div class='ctx'> 	"	" #asm_op " %0, %0, %2	\n"				\</div><div class='ctx'> 	"	scond   %0, [%1]	\n"				\</div><div class='ctx'> 	"	bnz     1b		\n"				\</div><div class='hunk'>@@ -52,6 +68,8 @@ static inline int atomic_##op##_return(int i, atomic_t *v)		\</div><div class='ctx'> 	: "r"(&amp;v-&gt;counter), "ir"(i)					\</div><div class='ctx'> 	: "cc");							\</div><div class='ctx'> 									\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='ctx'> 	return temp;							\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -105,6 +123,9 @@ static inline int atomic_##op##_return(int i, atomic_t *v)		\</div><div class='ctx'> 	unsigned long flags;						\</div><div class='ctx'> 	unsigned long temp;						\</div><div class='ctx'> 									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * spin lock/unlock provides the needed smp_mb() before/after	\</div><div class='add'>+	 */								\</div><div class='ctx'> 	atomic_ops_lock(flags);						\</div><div class='ctx'> 	temp = v-&gt;counter;						\</div><div class='ctx'> 	temp c_op i;							\</div><div class='hunk'>@@ -142,9 +163,19 @@ ATOMIC_OP(and, &amp;=, and)</div><div class='ctx'> #define __atomic_add_unless(v, a, u)					\</div><div class='ctx'> ({									\</div><div class='ctx'> 	int c, old;							\</div><div class='add'>+									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * Explicit full memory barrier needed before/after as		\</div><div class='add'>+	 * LLOCK/SCOND thmeselves don't provide any such semantics	\</div><div class='add'>+	 */								\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='ctx'> 	c = atomic_read(v);						\</div><div class='ctx'> 	while (c != (u) &amp;&amp; (old = atomic_cmpxchg((v), c, c + (a))) != c)\</div><div class='ctx'> 		c = old;						\</div><div class='add'>+									\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='ctx'> 	c;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/barrier.h b/arch/arc/include/asm/barrier.h<br/>new file mode 100644<br/>index 000000000000..a7209983ee64<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/barrier.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_BARRIER_H</div><div class='add'>+#define __ASM_BARRIER_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ARCv2 based HS38 cores are in-order issue, but still weakly ordered</div><div class='add'>+ * due to micro-arch buffering/queuing of load/store, cache hit vs. miss ...</div><div class='add'>+ *</div><div class='add'>+ * Explicit barrier provided by DMB instruction</div><div class='add'>+ *  - Operand supports fine grained load/store/load+store semantics</div><div class='add'>+ *  - Ensures that selected memory operation issued before it will complete</div><div class='add'>+ *    before any subsequent memory operation of same type</div><div class='add'>+ *  - DMB guarantees SMP as well as local barrier semantics</div><div class='add'>+ *    (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.</div><div class='add'>+ *    UP: barrier(), SMP: smp_*mb == *mb)</div><div class='add'>+ *  - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed</div><div class='add'>+ *    in the general case. Plus it only provides full barrier.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define mb()	asm volatile("dmb 3\n" : : : "memory")</div><div class='add'>+#define rmb()	asm volatile("dmb 1\n" : : : "memory")</div><div class='add'>+#define wmb()	asm volatile("dmb 2\n" : : : "memory")</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ARCompact based cores (ARC700) only have SYNC instruction which is super</div><div class='add'>+ * heavy weight as it flushes the pipeline as well.</div><div class='add'>+ * There are no real SMP implementations of such cores.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define mb()	asm volatile("sync\n" : : : "memory")</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/barrier.h&gt;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h<br/>index 4051e9525939..57c1f33844d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/bitops.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/bitops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/bitops.h</a></div><div class='hunk'>@@ -18,83 +18,49 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='add'>+#ifndef CONFIG_ARC_HAS_LLSC</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Hardware assisted read-modify-write using ARC700 LLOCK/SCOND insns.</div><div class='del'>- * The Kconfig glue ensures that in SMP, this is only set if the container</div><div class='del'>- * SoC/platform has cross-core coherent LLOCK/SCOND</div><div class='del'>- */</div><div class='ctx'> #if defined(CONFIG_ARC_HAS_LLSC)</div><div class='ctx'> </div><div class='del'>-static inline void set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned int temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * ARC ISA micro-optimization:</div><div class='del'>-	 *</div><div class='del'>-	 * Instructions dealing with bitpos only consider lower 5 bits (0-31)</div><div class='del'>-	 * e.g (x &lt;&lt; 33) is handled like (x &lt;&lt; 1) by ASL instruction</div><div class='del'>-	 *  (mem pointer still needs adjustment to point to next word)</div><div class='del'>-	 *</div><div class='del'>-	 * Hence the masking to clamp @nr arg can be elided in general.</div><div class='del'>-	 *</div><div class='del'>-	 * However if @nr is a constant (above assumed it in a register),</div><div class='del'>-	 * and greater than 31, gcc can optimize away (x &lt;&lt; 33) to 0,</div><div class='del'>-	 * as overflow, given the 32-bit ISA. Thus masking needs to be done</div><div class='del'>-	 * for constant @nr, but no code is generated due to const prop.</div><div class='del'>-	 */</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%1]	\n"</div><div class='del'>-	"	bset    %0, %0, %2	\n"</div><div class='del'>-	"	scond   %0, [%1]	\n"</div><div class='del'>-	"	bnz     1b	\n"</div><div class='del'>-	: "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned int temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%1]	\n"</div><div class='del'>-	"	bclr    %0, %0, %2	\n"</div><div class='del'>-	"	scond   %0, [%1]	\n"</div><div class='del'>-	"	bnz     1b	\n"</div><div class='del'>-	: "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned int temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='add'>+/*</div><div class='add'>+ * Hardware assisted Atomic-R-M-W</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%1]	\n"</div><div class='del'>-	"	bxor    %0, %0, %2	\n"</div><div class='del'>-	"	scond   %0, [%1]	\n"</div><div class='del'>-	"	bnz     1b		\n"</div><div class='del'>-	: "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='add'>+#define BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\</div><div class='add'>+{									\</div><div class='add'>+	unsigned int temp;						\</div><div class='add'>+									\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * ARC ISA micro-optimization:					\</div><div class='add'>+	 *								\</div><div class='add'>+	 * Instructions dealing with bitpos only consider lower 5 bits	\</div><div class='add'>+	 * e.g (x &lt;&lt; 33) is handled like (x &lt;&lt; 1) by ASL instruction	\</div><div class='add'>+	 *  (mem pointer still needs adjustment to point to next word)	\</div><div class='add'>+	 *								\</div><div class='add'>+	 * Hence the masking to clamp @nr arg can be elided in general.	\</div><div class='add'>+	 *								\</div><div class='add'>+	 * However if @nr is a constant (above assumed in a register),	\</div><div class='add'>+	 * and greater than 31, gcc can optimize away (x &lt;&lt; 33) to 0,	\</div><div class='add'>+	 * as overflow, given the 32-bit ISA. Thus masking needs to be	\</div><div class='add'>+	 * done for const @nr, but no code is generated due to gcc	\</div><div class='add'>+	 * const prop.							\</div><div class='add'>+	 */								\</div><div class='add'>+	nr &amp;= 0x1f;							\</div><div class='add'>+									\</div><div class='add'>+	__asm__ __volatile__(						\</div><div class='add'>+	"1:	llock       %0, [%1]		\n"			\</div><div class='add'>+	"	" #asm_op " %0, %0, %2	\n"				\</div><div class='add'>+	"	scond       %0, [%1]		\n"			\</div><div class='add'>+	"	bnz         1b			\n"			\</div><div class='add'>+	: "=&amp;r"(temp)	/* Early clobber, to prevent reg reuse */	\</div><div class='add'>+	: "r"(m),	/* Not "m": llock only supports reg direct addr mode */	\</div><div class='add'>+	  "ir"(nr)							\</div><div class='add'>+	: "cc");							\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -108,75 +74,37 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='ctx'>  * Since ARC lacks a equivalent h/w primitive, the bit is set unconditionally</div><div class='ctx'>  * and the old value of bit is returned</div><div class='ctx'>  */</div><div class='del'>-static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old, temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%2]	\n"</div><div class='del'>-	"	bset    %1, %0, %3	\n"</div><div class='del'>-	"	scond   %1, [%2]	\n"</div><div class='del'>-	"	bnz     1b		\n"</div><div class='del'>-	: "=&amp;r"(old), "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-test_and_clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned int old, temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%2]	\n"</div><div class='del'>-	"	bclr    %1, %0, %3	\n"</div><div class='del'>-	"	scond   %1, [%2]	\n"</div><div class='del'>-	"	bnz     1b		\n"</div><div class='del'>-	: "=&amp;r"(old), "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-test_and_change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned int old, temp;</div><div class='del'>-</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"1:	llock   %0, [%2]	\n"</div><div class='del'>-	"	bxor    %1, %0, %3	\n"</div><div class='del'>-	"	scond   %1, [%2]	\n"</div><div class='del'>-	"	bnz     1b		\n"</div><div class='del'>-	: "=&amp;r"(old), "=&amp;r"(temp)</div><div class='del'>-	: "r"(m), "ir"(nr)</div><div class='del'>-	: "cc");</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='add'>+#define TEST_N_BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\</div><div class='add'>+{									\</div><div class='add'>+	unsigned long old, temp;					\</div><div class='add'>+									\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	nr &amp;= 0x1f;							\</div><div class='add'>+									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * Explicit full memory barrier needed before/after as		\</div><div class='add'>+	 * LLOCK/SCOND themselves don't provide any such smenatic	\</div><div class='add'>+	 */								\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='add'>+	__asm__ __volatile__(						\</div><div class='add'>+	"1:	llock       %0, [%2]	\n"				\</div><div class='add'>+	"	" #asm_op " %1, %0, %3	\n"				\</div><div class='add'>+	"	scond       %1, [%2]	\n"				\</div><div class='add'>+	"	bnz         1b		\n"				\</div><div class='add'>+	: "=&amp;r"(old), "=&amp;r"(temp)					\</div><div class='add'>+	: "r"(m), "ir"(nr)						\</div><div class='add'>+	: "cc");							\</div><div class='add'>+									\</div><div class='add'>+	smp_mb();							\</div><div class='add'>+									\</div><div class='add'>+	return (old &amp; (1 &lt;&lt; nr)) != 0;					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else	/* !CONFIG_ARC_HAS_LLSC */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/smp.h&gt;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Non hardware assisted Atomic-R-M-W</div><div class='ctx'>  * Locking would change to irq-disabling only (UP) and spinlocks (SMP)</div><div class='hunk'>@@ -193,108 +121,37 @@ test_and_change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='ctx'>  *             at compile time)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline void set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp | (1UL &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='add'>+#define BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\</div><div class='add'>+{									\</div><div class='add'>+	unsigned long temp, flags;					\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	/*								\</div><div class='add'>+	 * spin lock/unlock provide the needed smp_mb() before/after	\</div><div class='add'>+	 */								\</div><div class='add'>+	bitops_lock(flags);						\</div><div class='add'>+									\</div><div class='add'>+	temp = *m;							\</div><div class='add'>+	*m = temp c_op (1UL &lt;&lt; (nr &amp; 0x1f));					\</div><div class='add'>+									\</div><div class='add'>+	bitops_unlock(flags);						\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp &amp; ~(1UL &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp ^ (1UL &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old | (1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-test_and_clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old &amp; ~(1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-test_and_change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old, flags;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	bitops_lock(flags);</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old ^ (1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	bitops_unlock(flags);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='add'>+#define TEST_N_BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\</div><div class='add'>+{									\</div><div class='add'>+	unsigned long old, flags;					\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	bitops_lock(flags);						\</div><div class='add'>+									\</div><div class='add'>+	old = *m;							\</div><div class='add'>+	*m = old c_op (1UL &lt;&lt; (nr &amp; 0x1f));				\</div><div class='add'>+									\</div><div class='add'>+	bitops_unlock(flags);						\</div><div class='add'>+									\</div><div class='add'>+	return (old &amp; (1UL &lt;&lt; (nr &amp; 0x1f))) != 0;			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_ARC_HAS_LLSC */</div><div class='hunk'>@@ -303,86 +160,45 @@ test_and_change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='ctx'>  * Non atomic variants</div><div class='ctx'>  **************************************/</div><div class='ctx'> </div><div class='del'>-static inline void __set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp | (1UL &lt;&lt; nr);</div><div class='add'>+#define __BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+static inline void __##op##_bit(unsigned long nr, volatile unsigned long *m)	\</div><div class='add'>+{									\</div><div class='add'>+	unsigned long temp;						\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	temp = *m;							\</div><div class='add'>+	*m = temp c_op (1UL &lt;&lt; (nr &amp; 0x1f));				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp &amp; ~(1UL &lt;&lt; nr);</div><div class='add'>+#define __TEST_N_BIT_OP(op, c_op, asm_op)				\</div><div class='add'>+static inline int __test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\</div><div class='add'>+{									\</div><div class='add'>+	unsigned long old;						\</div><div class='add'>+	m += nr &gt;&gt; 5;							\</div><div class='add'>+									\</div><div class='add'>+	old = *m;							\</div><div class='add'>+	*m = old c_op (1UL &lt;&lt; (nr &amp; 0x1f));				\</div><div class='add'>+									\</div><div class='add'>+	return (old &amp; (1UL &lt;&lt; (nr &amp; 0x1f))) != 0;			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	temp = *m;</div><div class='del'>-	*m = temp ^ (1UL &lt;&lt; nr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-__test_and_set_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old | (1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-__test_and_clear_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old &amp; ~(1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-__test_and_change_bit(unsigned long nr, volatile unsigned long *m)</div><div class='del'>-{</div><div class='del'>-	unsigned long old;</div><div class='del'>-	m += nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	old = *m;</div><div class='del'>-	*m = old ^ (1 &lt;&lt; nr);</div><div class='del'>-</div><div class='del'>-	return (old &amp; (1 &lt;&lt; nr)) != 0;</div><div class='del'>-}</div><div class='add'>+#define BIT_OPS(op, c_op, asm_op)					\</div><div class='add'>+									\</div><div class='add'>+	/* set_bit(), clear_bit(), change_bit() */			\</div><div class='add'>+	BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+									\</div><div class='add'>+	/* test_and_set_bit(), test_and_clear_bit(), test_and_change_bit() */\</div><div class='add'>+	TEST_N_BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+									\</div><div class='add'>+	/* __set_bit(), __clear_bit(), __change_bit() */		\</div><div class='add'>+	__BIT_OP(op, c_op, asm_op)					\</div><div class='add'>+									\</div><div class='add'>+	/* __test_and_set_bit(), __test_and_clear_bit(), __test_and_change_bit() */\</div><div class='add'>+	__TEST_N_BIT_OP(op, c_op, asm_op)</div><div class='add'>+</div><div class='add'>+BIT_OPS(set, |, bset)</div><div class='add'>+BIT_OPS(clear, &amp; ~, bclr)</div><div class='add'>+BIT_OPS(change, ^, bxor)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This routine doesn't need to be atomic.</div><div class='hunk'>@@ -394,14 +210,13 @@ test_bit(unsigned int nr, const volatile unsigned long *addr)</div><div class='ctx'> </div><div class='ctx'> 	addr += nr &gt;&gt; 5;</div><div class='ctx'> </div><div class='del'>-	if (__builtin_constant_p(nr))</div><div class='del'>-		nr &amp;= 0x1f;</div><div class='del'>-</div><div class='del'>-	mask = 1 &lt;&lt; nr;</div><div class='add'>+	mask = 1UL &lt;&lt; (nr &amp; 0x1f);</div><div class='ctx'> </div><div class='ctx'> 	return ((mask &amp; *addr) != 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Count the number of zeros, starting from MSB</div><div class='ctx'>  * Helper for fls( ) friends</div><div class='hunk'>@@ -494,6 +309,75 @@ static inline __attribute__ ((const)) int __ffs(unsigned long word)</div><div class='ctx'> 	return ffs(word) - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#else	/* CONFIG_ISA_ARCV2 */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * fls = Find Last Set in word</div><div class='add'>+ * @result: [1-32]</div><div class='add'>+ * fls(1) = 1, fls(0x80000000) = 32, fls(0) = 0</div><div class='add'>+ */</div><div class='add'>+static inline __attribute__ ((const)) int fls(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	fls.f	%0, %1		\n"  /* 0:31; 0(Z) if src 0 */</div><div class='add'>+	"	add.nz	%0, %0, 1	\n"  /* 0:31 -&gt; 1:32 */</div><div class='add'>+	: "=r"(n)	/* Early clobber not needed */</div><div class='add'>+	: "r"(x)</div><div class='add'>+	: "cc");</div><div class='add'>+</div><div class='add'>+	return n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __fls: Similar to fls, but zero based (0-31). Also 0 if no bit set</div><div class='add'>+ */</div><div class='add'>+static inline __attribute__ ((const)) int __fls(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	/* FLS insn has exactly same semantics as the API */</div><div class='add'>+	return	__builtin_arc_fls(x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ffs = Find First Set in word (LSB to MSB)</div><div class='add'>+ * @result: [1-32], 0 if all 0's</div><div class='add'>+ */</div><div class='add'>+static inline __attribute__ ((const)) int ffs(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	ffs.f	%0, %1		\n"  /* 0:31; 31(Z) if src 0 */</div><div class='add'>+	"	add.nz	%0, %0, 1	\n"  /* 0:31 -&gt; 1:32 */</div><div class='add'>+	"	mov.z	%0, 0		\n"  /* 31(Z)-&gt; 0 */</div><div class='add'>+	: "=r"(n)	/* Early clobber not needed */</div><div class='add'>+	: "r"(x)</div><div class='add'>+	: "cc");</div><div class='add'>+</div><div class='add'>+	return n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __ffs: Similar to ffs, but zero based (0-31)</div><div class='add'>+ */</div><div class='add'>+static inline __attribute__ ((const)) int __ffs(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	ffs.f	%0, %1		\n"  /* 0:31; 31(Z) if src 0 */</div><div class='add'>+	"	mov.z	%0, 0		\n"  /* 31(Z)-&gt; 0 */</div><div class='add'>+	: "=r"(n)</div><div class='add'>+	: "r"(x)</div><div class='add'>+	: "cc");</div><div class='add'>+</div><div class='add'>+	return n;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_ISA_ARCOMPACT */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * ffz = Find First Zero in word.</div><div class='ctx'>  * @return:[0-31], 32 if all 1's</div><div class='head'>diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h<br/>index 7861255da32d..d67345d3e2d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/cache.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/cache.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cache.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@ extern void read_decode_cache_bcr(void);</div><div class='ctx'> #define ARC_REG_IC_IVIC		0x10</div><div class='ctx'> #define ARC_REG_IC_CTRL		0x11</div><div class='ctx'> #define ARC_REG_IC_IVIL		0x19</div><div class='del'>-#if defined(CONFIG_ARC_MMU_V3)</div><div class='add'>+#if defined(CONFIG_ARC_MMU_V3) || defined(CONFIG_ARC_MMU_V4)</div><div class='ctx'> #define ARC_REG_IC_PTAG		0x1E</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -74,12 +74,24 @@ extern void read_decode_cache_bcr(void);</div><div class='ctx'> #define ARC_REG_DC_IVDL		0x4A</div><div class='ctx'> #define ARC_REG_DC_FLSH		0x4B</div><div class='ctx'> #define ARC_REG_DC_FLDL		0x4C</div><div class='del'>-#if defined(CONFIG_ARC_MMU_V3)</div><div class='ctx'> #define ARC_REG_DC_PTAG		0x5C</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* Bit val in DC_CTRL */</div><div class='ctx'> #define DC_CTRL_INV_MODE_FLUSH  0x40</div><div class='ctx'> #define DC_CTRL_FLUSH_STATUS    0x100</div><div class='ctx'> </div><div class='add'>+/*System-level cache (L2 cache) related Auxiliary registers */</div><div class='add'>+#define ARC_REG_SLC_CFG		0x901</div><div class='add'>+#define ARC_REG_SLC_CTRL	0x903</div><div class='add'>+#define ARC_REG_SLC_FLUSH	0x904</div><div class='add'>+#define ARC_REG_SLC_INVALIDATE	0x905</div><div class='add'>+#define ARC_REG_SLC_RGN_START	0x914</div><div class='add'>+#define ARC_REG_SLC_RGN_END	0x916</div><div class='add'>+</div><div class='add'>+/* Bit val in SLC_CONTROL */</div><div class='add'>+#define SLC_CTRL_IM		0x040</div><div class='add'>+#define SLC_CTRL_DISABLE	0x001</div><div class='add'>+#define SLC_CTRL_BUSY		0x100</div><div class='add'>+#define SLC_CTRL_RGN_OP_INV	0x200</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_CACHE_H */</div><div class='head'>diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h<br/>index 6abc4972bc93..0992d3dbcc65 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/cacheflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -34,9 +34,7 @@ void flush_cache_all(void);</div><div class='ctx'> void flush_icache_range(unsigned long start, unsigned long end);</div><div class='ctx'> void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len);</div><div class='ctx'> void __inv_icache_page(unsigned long paddr, unsigned long vaddr);</div><div class='del'>-void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr);</div><div class='del'>-#define __flush_dcache_page(p, v)	\</div><div class='del'>-		___flush_dcache_page((unsigned long)p, (unsigned long)v)</div><div class='add'>+void __flush_dcache_page(unsigned long paddr, unsigned long vaddr);</div><div class='ctx'> </div><div class='ctx'> #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h<br/>index 03cd6894855d..44fd531f4d7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #define __ASM_ARC_CMPXCHG_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_HAS_LLSC</div><div class='hunk'>@@ -19,16 +21,25 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long prev;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Explicit full memory barrier needed before/after as</div><div class='add'>+	 * LLOCK/SCOND thmeselves don't provide any such semantics</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"1:	llock   %0, [%1]	\n"</div><div class='ctx'> 	"	brne    %0, %2, 2f	\n"</div><div class='ctx'> 	"	scond   %3, [%1]	\n"</div><div class='ctx'> 	"	bnz     1b		\n"</div><div class='ctx'> 	"2:				\n"</div><div class='del'>-	: "=&amp;r"(prev)</div><div class='del'>-	: "r"(ptr), "ir"(expected),</div><div class='del'>-	  "r"(new) /* can't be "ir". scond can't take limm for "b" */</div><div class='del'>-	: "cc");</div><div class='add'>+	: "=&amp;r"(prev)	/* Early clobber, to prevent reg reuse */</div><div class='add'>+	: "r"(ptr),	/* Not "m": llock only supports reg direct addr mode */</div><div class='add'>+	  "ir"(expected),</div><div class='add'>+	  "r"(new)	/* can't be "ir". scond can't take LIMM for "b" */</div><div class='add'>+	: "cc", "memory"); /* so that gcc knows memory is being written here */</div><div class='add'>+</div><div class='add'>+	smp_mb();</div><div class='ctx'> </div><div class='ctx'> 	return prev;</div><div class='ctx'> }</div><div class='hunk'>@@ -42,6 +53,9 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)</div><div class='ctx'> 	int prev;</div><div class='ctx'> 	volatile unsigned long *p = ptr;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * spin lock/unlock provide the needed smp_mb() before/after</div><div class='add'>+	 */</div><div class='ctx'> 	atomic_ops_lock(flags);</div><div class='ctx'> 	prev = *p;</div><div class='ctx'> 	if (prev == expected)</div><div class='hunk'>@@ -77,12 +91,16 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,</div><div class='ctx'> </div><div class='ctx'> 	switch (size) {</div><div class='ctx'> 	case 4:</div><div class='add'>+		smp_mb();</div><div class='add'>+</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 		"	ex  %0, [%1]	\n"</div><div class='ctx'> 		: "+r"(val)</div><div class='ctx'> 		: "r"(ptr)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> </div><div class='add'>+		smp_mb();</div><div class='add'>+</div><div class='ctx'> 		return val;</div><div class='ctx'> 	}</div><div class='ctx'> 	return __xchg_bad_pointer();</div><div class='head'>diff --git a/arch/arc/include/asm/delay.h b/arch/arc/include/asm/delay.h<br/>index 43de30256981..08e7e2a16ac1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/delay.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/delay.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/delay.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/delay.h</a></div><div class='hunk'>@@ -22,11 +22,10 @@</div><div class='ctx'> static inline void __delay(unsigned long loops)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='del'>-	"1:	sub.f %0, %0, 1	\n"</div><div class='del'>-	"	jpnz 1b		\n"</div><div class='del'>-	: "+r"(loops)</div><div class='del'>-	:</div><div class='del'>-	: "cc");</div><div class='add'>+	"	lp  1f	\n"</div><div class='add'>+	"	nop	\n"</div><div class='add'>+	"1:		\n"</div><div class='add'>+	: "+l"(loops));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void __bad_udelay(void);</div><div class='head'>diff --git a/arch/arc/include/asm/dma-mapping.h b/arch/arc/include/asm/dma-mapping.h<br/>index 45b8e0cea176..2d28ba939d8e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -14,23 +14,6 @@</div><div class='ctx'> #include &lt;asm-generic/dma-coherent.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_ARC_PLAT_NEEDS_CPU_TO_DMA</div><div class='del'>-/*</div><div class='del'>- * dma_map_* API take cpu addresses, which is kernel logical address in the</div><div class='del'>- * untranslated address space (0x8000_0000) based. The dma address (bus addr)</div><div class='del'>- * ideally needs to be 0x0000_0000 based hence these glue routines.</div><div class='del'>- * However given that intermediate bus bridges can ignore the high bit, we can</div><div class='del'>- * do with these routines being no-ops.</div><div class='del'>- * If a platform/device comes up which sriclty requires 0 based bus addr</div><div class='del'>- * (e.g. AHB-PCI bridge on Angel4 board), then it can provide it's own versions</div><div class='del'>- */</div><div class='del'>-#define plat_dma_addr_to_kernel(dev, addr) ((unsigned long)(addr))</div><div class='del'>-#define plat_kernel_addr_to_dma(dev, ptr) ((dma_addr_t)(ptr))</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-#include &lt;plat/dma_addr.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> void *dma_alloc_noncoherent(struct device *dev, size_t size,</div><div class='ctx'> 			    dma_addr_t *dma_handle, gfp_t gfp);</div><div class='ctx'> </div><div class='hunk'>@@ -94,7 +77,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size,</div><div class='ctx'> 	       enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	_dma_cache_sync((unsigned long)cpu_addr, size, dir);</div><div class='del'>-	return plat_kernel_addr_to_dma(dev, cpu_addr);</div><div class='add'>+	return (dma_addr_t)cpu_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -147,16 +130,14 @@ static inline void</div><div class='ctx'> dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> 			size_t size, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='del'>-	_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,</div><div class='del'>-			DMA_FROM_DEVICE);</div><div class='add'>+	_dma_cache_sync(dma_handle, size, DMA_FROM_DEVICE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> 			   size_t size, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='del'>-	_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,</div><div class='del'>-			DMA_TO_DEVICE);</div><div class='add'>+	_dma_cache_sync(dma_handle, size, DMA_TO_DEVICE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -164,8 +145,7 @@ dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> 			      unsigned long offset, size_t size,</div><div class='ctx'> 			      enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='del'>-	_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,</div><div class='del'>-			size, DMA_FROM_DEVICE);</div><div class='add'>+	_dma_cache_sync(dma_handle + offset, size, DMA_FROM_DEVICE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -173,27 +153,28 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> 				 unsigned long offset, size_t size,</div><div class='ctx'> 				 enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='del'>-	_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,</div><div class='del'>-			size, DMA_TO_DEVICE);</div><div class='add'>+	_dma_cache_sync(dma_handle + offset, size, DMA_TO_DEVICE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='add'>+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nelems,</div><div class='ctx'> 		    enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		_dma_cache_sync((unsigned int)sg_virt(sg), sg-&gt;length, dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='del'>-		       enum dma_data_direction dir)</div><div class='add'>+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,</div><div class='add'>+		       int nelems, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		_dma_cache_sync((unsigned int)sg_virt(sg), sg-&gt;length, dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/elf.h b/arch/arc/include/asm/elf.h<br/>index a26282857683..51a99e25fe33 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/elf.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/elf.h</a></div><div class='hunk'>@@ -15,6 +15,11 @@</div><div class='ctx'> /* These ELF defines belong to uapi but libc elf.h already defines them */</div><div class='ctx'> #define EM_ARCOMPACT		93</div><div class='ctx'> </div><div class='add'>+#define EM_ARCV2		195	/* ARCv2 Cores */</div><div class='add'>+</div><div class='add'>+#define EM_ARC_INUSE		(IS_ENABLED(CONFIG_ISA_ARCOMPACT) ? \</div><div class='add'>+					EM_ARCOMPACT : EM_ARCV2)</div><div class='add'>+</div><div class='ctx'> /* ARC Relocations (kernel Modules only) */</div><div class='ctx'> #define  R_ARC_32		0x4</div><div class='ctx'> #define  R_ARC_32_ME		0x1B</div><div class='head'>diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h<br/>new file mode 100644<br/>index 000000000000..b5ff87e6f4b7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/entry-arcv2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry-arcv2.h</a></div><div class='hunk'>@@ -0,0 +1,190 @@</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_ARC_ENTRY_ARCV2_H</div><div class='add'>+#define __ASM_ARC_ENTRY_ARCV2_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/irqflags-arcv2.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;	/* For THREAD_SIZE */</div><div class='add'>+</div><div class='add'>+/*------------------------------------------------------------------------*/</div><div class='add'>+.macro INTERRUPT_PROLOGUE	called_from</div><div class='add'>+</div><div class='add'>+	; Before jumping to Interrupt Vector, hardware micro-ops did following:</div><div class='add'>+	;   1. SP auto-switched to kernel mode stack</div><div class='add'>+	;   2. STATUS32.Z flag set to U mode at time of interrupt (U:1, K:0)</div><div class='add'>+	;   3. Auto saved: r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI, PC, STAT32</div><div class='add'>+	;</div><div class='add'>+	; Now manually save: r12, sp, fp, gp, r25</div><div class='add'>+</div><div class='add'>+	PUSH	r12</div><div class='add'>+</div><div class='add'>+	; Saving pt_regs-&gt;sp correctly requires some extra work due to the way</div><div class='add'>+	; Auto stack switch works</div><div class='add'>+	;  - U mode: retrieve it from AUX_USER_SP</div><div class='add'>+	;  - K mode: add the offset from current SP where H/w starts auto push</div><div class='add'>+	;</div><div class='add'>+	; Utilize the fact that Z bit is set if Intr taken in U mode</div><div class='add'>+	mov.nz	r9, sp</div><div class='add'>+	add.nz	r9, r9, SZ_PT_REGS - PT_sp - 4</div><div class='add'>+	bnz	1f</div><div class='add'>+</div><div class='add'>+	lr	r9, [AUX_USER_SP]</div><div class='add'>+1:</div><div class='add'>+	PUSH	r9	; SP</div><div class='add'>+</div><div class='add'>+	PUSH	fp</div><div class='add'>+	PUSH	gp</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='add'>+	PUSH	r25			; user_r25</div><div class='add'>+	GET_CURR_TASK_ON_CPU	r25</div><div class='add'>+#else</div><div class='add'>+	sub	sp, sp, 4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.ifnc \called_from, exception</div><div class='add'>+	sub	sp, sp, 12	; BTA/ECR/orig_r0 placeholder per pt_regs</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*------------------------------------------------------------------------*/</div><div class='add'>+.macro INTERRUPT_EPILOGUE	called_from</div><div class='add'>+</div><div class='add'>+.ifnc \called_from, exception</div><div class='add'>+	add	sp, sp, 12	; skip BTA/ECR/orig_r0 placeholderss</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='add'>+	POP	r25</div><div class='add'>+#else</div><div class='add'>+	add	sp, sp, 4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	POP	gp</div><div class='add'>+	POP	fp</div><div class='add'>+</div><div class='add'>+	; Don't touch AUX_USER_SP if returning to K mode (Z bit set)</div><div class='add'>+	; (Z bit set on K mode is inverse of INTERRUPT_PROLOGUE)</div><div class='add'>+	add.z	sp, sp, 4</div><div class='add'>+	bz	1f</div><div class='add'>+</div><div class='add'>+	POPAX	AUX_USER_SP</div><div class='add'>+1:</div><div class='add'>+	POP	r12</div><div class='add'>+</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*------------------------------------------------------------------------*/</div><div class='add'>+.macro EXCEPTION_PROLOGUE</div><div class='add'>+</div><div class='add'>+	; Before jumping to Exception Vector, hardware micro-ops did following:</div><div class='add'>+	;   1. SP auto-switched to kernel mode stack</div><div class='add'>+	;   2. STATUS32.Z flag set to U mode at time of interrupt (U:1,K:0)</div><div class='add'>+	;</div><div class='add'>+	; Now manually save the complete reg file</div><div class='add'>+</div><div class='add'>+	PUSH	r9		; freeup a register: slot of erstatus</div><div class='add'>+</div><div class='add'>+	PUSHAX	eret</div><div class='add'>+	sub	sp, sp, 12	; skip JLI, LDI, EI</div><div class='add'>+	PUSH	lp_count</div><div class='add'>+	PUSHAX	lp_start</div><div class='add'>+	PUSHAX	lp_end</div><div class='add'>+	PUSH	blink</div><div class='add'>+</div><div class='add'>+	PUSH	r11</div><div class='add'>+	PUSH	r10</div><div class='add'>+</div><div class='add'>+	ld.as	r9,  [sp, 10]	; load stashed r9 (status32 stack slot)</div><div class='add'>+	lr	r10, [erstatus]</div><div class='add'>+	st.as	r10, [sp, 10]	; save status32 at it's right stack slot</div><div class='add'>+</div><div class='add'>+	PUSH	r9</div><div class='add'>+	PUSH	r8</div><div class='add'>+	PUSH	r7</div><div class='add'>+	PUSH	r6</div><div class='add'>+	PUSH	r5</div><div class='add'>+	PUSH	r4</div><div class='add'>+	PUSH	r3</div><div class='add'>+	PUSH	r2</div><div class='add'>+	PUSH	r1</div><div class='add'>+	PUSH	r0</div><div class='add'>+</div><div class='add'>+	; -- for interrupts, regs above are auto-saved by h/w in that order --</div><div class='add'>+	; Now do what ISR prologue does (manually save r12, sp, fp, gp, r25)</div><div class='add'>+	;</div><div class='add'>+	; Set Z flag if this was from U mode (expected by INTERRUPT_PROLOGUE)</div><div class='add'>+	; Although H/w exception micro-ops do set Z flag for U mode (just like</div><div class='add'>+	; for interrupts), it could get clobbered in case we soft land here from</div><div class='add'>+	; a TLB Miss exception handler (tlbex.S)</div><div class='add'>+</div><div class='add'>+	and	r10, r10, STATUS_U_MASK</div><div class='add'>+	xor.f	0, r10, STATUS_U_MASK</div><div class='add'>+</div><div class='add'>+	INTERRUPT_PROLOGUE  exception</div><div class='add'>+</div><div class='add'>+	PUSHAX	erbta</div><div class='add'>+	PUSHAX	ecr		; r9 contains ECR, expected by EV_Trap</div><div class='add'>+</div><div class='add'>+	PUSH	r0		; orig_r0</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*------------------------------------------------------------------------*/</div><div class='add'>+.macro EXCEPTION_EPILOGUE</div><div class='add'>+</div><div class='add'>+	; Assumes r0 has PT_status32</div><div class='add'>+	btst   r0, STATUS_U_BIT	; Z flag set if K, used in INTERRUPT_EPILOGUE</div><div class='add'>+</div><div class='add'>+	add	sp, sp, 8	; orig_r0/ECR don't need restoring</div><div class='add'>+	POPAX	erbta</div><div class='add'>+</div><div class='add'>+	INTERRUPT_EPILOGUE  exception</div><div class='add'>+</div><div class='add'>+	POP	r0</div><div class='add'>+	POP	r1</div><div class='add'>+	POP	r2</div><div class='add'>+	POP	r3</div><div class='add'>+	POP	r4</div><div class='add'>+	POP	r5</div><div class='add'>+	POP	r6</div><div class='add'>+	POP	r7</div><div class='add'>+	POP	r8</div><div class='add'>+	POP	r9</div><div class='add'>+	POP	r10</div><div class='add'>+	POP	r11</div><div class='add'>+</div><div class='add'>+	POP	blink</div><div class='add'>+	POPAX	lp_end</div><div class='add'>+	POPAX	lp_start</div><div class='add'>+</div><div class='add'>+	POP	r9</div><div class='add'>+	mov	lp_count, r9</div><div class='add'>+</div><div class='add'>+	add	sp, sp, 12	; skip JLI, LDI, EI</div><div class='add'>+	POPAX	eret</div><div class='add'>+	POPAX	erstatus</div><div class='add'>+</div><div class='add'>+	ld.as	r9, [sp, -12]	; reload r9 which got clobbered</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro FAKE_RET_FROM_EXCPN</div><div class='add'>+	lr      r9, [status32]</div><div class='add'>+	bic     r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK)</div><div class='add'>+	or      r9, r9, (STATUS_L_MASK|STATUS_IE_MASK)</div><div class='add'>+	kflag   r9</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Get thread_info of "current" tsk */</div><div class='add'>+.macro GET_CURR_THR_INFO_FROM_SP  reg</div><div class='add'>+	bmskn \reg, sp, THREAD_SHIFT - 1</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Get CPU-ID of this core */</div><div class='add'>+.macro  GET_CPU_ID  reg</div><div class='add'>+	lr  \reg, [identity]</div><div class='add'>+	xbfu \reg, \reg, 0xE8	/* 00111    01000 */</div><div class='add'>+				/* M = 8-1  N = 8 */</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h<br/>new file mode 100644<br/>index 000000000000..415443c2a8c4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/entry-compact.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry-compact.h</a></div><div class='hunk'>@@ -0,0 +1,307 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: March 2009 (Supporting 2 levels of Interrupts)</div><div class='add'>+ *  Stack switching code can no longer reliably rely on the fact that</div><div class='add'>+ *  if we are NOT in user mode, stack is switched to kernel mode.</div><div class='add'>+ *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed</div><div class='add'>+ *  it's prologue including stack switching from user mode</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: Aug 28th 2008: Bug #94984</div><div class='add'>+ *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap</div><div class='add'>+ *   Normally CPU does this automatically, however when doing FAKE rtie,</div><div class='add'>+ *   we also need to explicitly do this. The problem in macros</div><div class='add'>+ *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit</div><div class='add'>+ *   was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: May 5th 2008</div><div class='add'>+ *  -Modified CALLEE_REG save/restore macros to handle the fact that</div><div class='add'>+ *      r25 contains the kernel current task ptr</div><div class='add'>+ *  - Defined Stack Switching Macro to be reused in all intr/excp hdlrs</div><div class='add'>+ *  - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the</div><div class='add'>+ *      address Write back load ld.ab instead of seperate ld/add instn</div><div class='add'>+ *</div><div class='add'>+ * Amit Bhor, Sameer Dhavale: Codito Technologies 2004</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_ARC_ENTRY_COMPACT_H</div><div class='add'>+#define __ASM_ARC_ENTRY_COMPACT_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/irqflags-compact.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;	/* For THREAD_SIZE */</div><div class='add'>+</div><div class='add'>+/*--------------------------------------------------------------</div><div class='add'>+ * Switch to Kernel Mode stack if SP points to User Mode stack</div><div class='add'>+ *</div><div class='add'>+ * Entry   : r9 contains pre-IRQ/exception/trap status32</div><div class='add'>+ * Exit    : SP set to K mode stack</div><div class='add'>+ *           SP at the time of entry (K/U) saved @ pt_regs-&gt;sp</div><div class='add'>+ * Clobbers: r9</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+</div><div class='add'>+.macro SWITCH_TO_KERNEL_STK</div><div class='add'>+</div><div class='add'>+	/* User Mode when this happened ? Yes: Proceed to switch stack */</div><div class='add'>+	bbit1   r9, STATUS_U_BIT, 88f</div><div class='add'>+</div><div class='add'>+	/* OK we were already in kernel mode when this event happened, thus can</div><div class='add'>+	 * assume SP is kernel mode SP. _NO_ need to do any stack switching</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='add'>+	/* However....</div><div class='add'>+	 * If Level 2 Interrupts enabled, we may end up with a corner case:</div><div class='add'>+	 * 1. User Task executing</div><div class='add'>+	 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)</div><div class='add'>+	 * 3. But before it could switch SP from USER to KERNEL stack</div><div class='add'>+	 *      a L2 IRQ "Interrupts" L1</div><div class='add'>+	 * Thay way although L2 IRQ happened in Kernel mode, stack is still</div><div class='add'>+	 * not switched.</div><div class='add'>+	 * To handle this, we may need to switch stack even if in kernel mode</div><div class='add'>+	 * provided SP has values in range of USER mode stack ( &lt; 0x7000_0000 )</div><div class='add'>+	 */</div><div class='add'>+	brlo sp, VMALLOC_START, 88f</div><div class='add'>+</div><div class='add'>+	/* TODO: vineetg:</div><div class='add'>+	 * We need to be a bit more cautious here. What if a kernel bug in</div><div class='add'>+	 * L1 ISR, caused SP to go whaco (some small value which looks like</div><div class='add'>+	 * USER stk) and then we take L2 ISR.</div><div class='add'>+	 * Above brlo alone would treat it as a valid L1-L2 sceanrio</div><div class='add'>+	 * instead of shouting alound</div><div class='add'>+	 * The only feasible way is to make sure this L2 happened in</div><div class='add'>+	 * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in</div><div class='add'>+	 * L1 ISR before it switches stack</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+    /*------Intr/Ecxp happened in kernel mode, SP already setup ------ */</div><div class='add'>+	/* save it nevertheless @ pt_regs-&gt;sp for uniformity */</div><div class='add'>+</div><div class='add'>+	b.d	66f</div><div class='add'>+	st	sp, [sp, PT_sp - SZ_PT_REGS]</div><div class='add'>+</div><div class='add'>+88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */</div><div class='add'>+</div><div class='add'>+	GET_CURR_TASK_ON_CPU   r9</div><div class='add'>+</div><div class='add'>+	/* With current tsk in r9, get it's kernel mode stack base */</div><div class='add'>+	GET_TSK_STACK_BASE  r9, r9</div><div class='add'>+</div><div class='add'>+	/* save U mode SP @ pt_regs-&gt;sp */</div><div class='add'>+	st	sp, [r9, PT_sp - SZ_PT_REGS]</div><div class='add'>+</div><div class='add'>+	/* final SP switch */</div><div class='add'>+	mov	sp, r9</div><div class='add'>+66:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*------------------------------------------------------------</div><div class='add'>+ * "FAKE" a rtie to return from CPU Exception context</div><div class='add'>+ * This is to re-enable Exceptions within exception</div><div class='add'>+ * Look at EV_ProtV to see how this is actually used</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+</div><div class='add'>+.macro FAKE_RET_FROM_EXCPN</div><div class='add'>+</div><div class='add'>+	ld  r9, [sp, PT_status32]</div><div class='add'>+	bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK)</div><div class='add'>+	bset  r9, r9, STATUS_L_BIT</div><div class='add'>+	sr  r9, [erstatus]</div><div class='add'>+	mov r9, 55f</div><div class='add'>+	sr  r9, [eret]</div><div class='add'>+</div><div class='add'>+	rtie</div><div class='add'>+55:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*--------------------------------------------------------------</div><div class='add'>+ * For early Exception/ISR Prologue, a core reg is temporarily needed to</div><div class='add'>+ * code the rest of prolog (stack switching). This is done by stashing</div><div class='add'>+ * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).</div><div class='add'>+ *</div><div class='add'>+ * Before saving the full regfile - this reg is restored back, only</div><div class='add'>+ * to be saved again on kernel mode stack, as part of pt_regs.</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+.macro PROLOG_FREEUP_REG	reg, mem</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	sr  \reg, [ARC_REG_SCRATCH_DATA0]</div><div class='add'>+#else</div><div class='add'>+	st  \reg, [\mem]</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro PROLOG_RESTORE_REG	reg, mem</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	lr  \reg, [ARC_REG_SCRATCH_DATA0]</div><div class='add'>+#else</div><div class='add'>+	ld  \reg, [\mem]</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*--------------------------------------------------------------</div><div class='add'>+ * Exception Entry prologue</div><div class='add'>+ * -Switches stack to K mode (if not already)</div><div class='add'>+ * -Saves the register file</div><div class='add'>+ *</div><div class='add'>+ * After this it is safe to call the "C" handlers</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+.macro EXCEPTION_PROLOGUE</div><div class='add'>+</div><div class='add'>+	/* Need at least 1 reg to code the early exception prologue */</div><div class='add'>+	PROLOG_FREEUP_REG r9, @ex_saved_reg1</div><div class='add'>+</div><div class='add'>+	/* U/K mode at time of exception (stack not switched if already K) */</div><div class='add'>+	lr  r9, [erstatus]</div><div class='add'>+</div><div class='add'>+	/* ARC700 doesn't provide auto-stack switching */</div><div class='add'>+	SWITCH_TO_KERNEL_STK</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='add'>+	/* Treat r25 as scratch reg (save on stack) and load with "current" */</div><div class='add'>+	PUSH    r25</div><div class='add'>+	GET_CURR_TASK_ON_CPU   r25</div><div class='add'>+#else</div><div class='add'>+	sub     sp, sp, 4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	st.a	r0, [sp, -8]    /* orig_r0 needed for syscall (skip ECR slot) */</div><div class='add'>+	sub	sp, sp, 4	/* skip pt_regs-&gt;sp, already saved above */</div><div class='add'>+</div><div class='add'>+	/* Restore r9 used to code the early prologue */</div><div class='add'>+	PROLOG_RESTORE_REG  r9, @ex_saved_reg1</div><div class='add'>+</div><div class='add'>+	/* now we are ready to save the regfile */</div><div class='add'>+	SAVE_R0_TO_R12</div><div class='add'>+	PUSH	gp</div><div class='add'>+	PUSH	fp</div><div class='add'>+	PUSH	blink</div><div class='add'>+	PUSHAX	eret</div><div class='add'>+	PUSHAX	erstatus</div><div class='add'>+	PUSH	lp_count</div><div class='add'>+	PUSHAX	lp_end</div><div class='add'>+	PUSHAX	lp_start</div><div class='add'>+	PUSHAX	erbta</div><div class='add'>+</div><div class='add'>+	lr	r9, [ecr]</div><div class='add'>+	st      r9, [sp, PT_event]    /* EV_Trap expects r9 to have ECR */</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*--------------------------------------------------------------</div><div class='add'>+ * Restore all registers used by system call or Exceptions</div><div class='add'>+ * SP should always be pointing to the next free stack element</div><div class='add'>+ * when entering this macro.</div><div class='add'>+ *</div><div class='add'>+ * NOTE:</div><div class='add'>+ *</div><div class='add'>+ * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='add'>+ * for memory load operations. If used in that way interrupts are deffered</div><div class='add'>+ * by hardware and that is not good.</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+.macro EXCEPTION_EPILOGUE</div><div class='add'>+	POPAX	erbta</div><div class='add'>+	POPAX	lp_start</div><div class='add'>+	POPAX	lp_end</div><div class='add'>+</div><div class='add'>+	POP	r9</div><div class='add'>+	mov	lp_count, r9	;LD to lp_count is not allowed</div><div class='add'>+</div><div class='add'>+	POPAX	erstatus</div><div class='add'>+	POPAX	eret</div><div class='add'>+	POP	blink</div><div class='add'>+	POP	fp</div><div class='add'>+	POP	gp</div><div class='add'>+	RESTORE_R12_TO_R0</div><div class='add'>+</div><div class='add'>+	ld  sp, [sp] /* restore original sp */</div><div class='add'>+	/* orig_r0, ECR, user_r25 skipped automatically */</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Dummy ECR values for Interrupts */</div><div class='add'>+#define event_IRQ1		0x0031abcd</div><div class='add'>+#define event_IRQ2		0x0032abcd</div><div class='add'>+</div><div class='add'>+.macro INTERRUPT_PROLOGUE  LVL</div><div class='add'>+</div><div class='add'>+	/* free up r9 as scratchpad */</div><div class='add'>+	PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg</div><div class='add'>+</div><div class='add'>+	/* Which mode (user/kernel) was the system in when intr occured */</div><div class='add'>+	lr  r9, [status32_l\LVL\()]</div><div class='add'>+</div><div class='add'>+	SWITCH_TO_KERNEL_STK</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='add'>+	/* Treat r25 as scratch reg (save on stack) and load with "current" */</div><div class='add'>+	PUSH    r25</div><div class='add'>+	GET_CURR_TASK_ON_CPU   r25</div><div class='add'>+#else</div><div class='add'>+	sub     sp, sp, 4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	PUSH	0x003\LVL\()abcd    /* Dummy ECR */</div><div class='add'>+	sub	sp, sp, 8	    /* skip orig_r0 (not needed)</div><div class='add'>+				       skip pt_regs-&gt;sp, already saved above */</div><div class='add'>+</div><div class='add'>+	/* Restore r9 used to code the early prologue */</div><div class='add'>+	PROLOG_RESTORE_REG  r9, @int\LVL\()_saved_reg</div><div class='add'>+</div><div class='add'>+	SAVE_R0_TO_R12</div><div class='add'>+	PUSH	gp</div><div class='add'>+	PUSH	fp</div><div class='add'>+	PUSH	blink</div><div class='add'>+	PUSH	ilink\LVL\()</div><div class='add'>+	PUSHAX	status32_l\LVL\()</div><div class='add'>+	PUSH	lp_count</div><div class='add'>+	PUSHAX	lp_end</div><div class='add'>+	PUSHAX	lp_start</div><div class='add'>+	PUSHAX	bta_l\LVL\()</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*--------------------------------------------------------------</div><div class='add'>+ * Restore all registers used by interrupt handlers.</div><div class='add'>+ *</div><div class='add'>+ * NOTE:</div><div class='add'>+ *</div><div class='add'>+ * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='add'>+ * for memory load operations. If used in that way interrupts are deffered</div><div class='add'>+ * by hardware and that is not good.</div><div class='add'>+ *-------------------------------------------------------------*/</div><div class='add'>+.macro INTERRUPT_EPILOGUE  LVL</div><div class='add'>+	POPAX	bta_l\LVL\()</div><div class='add'>+	POPAX	lp_start</div><div class='add'>+	POPAX	lp_end</div><div class='add'>+</div><div class='add'>+	POP	r9</div><div class='add'>+	mov	lp_count, r9	;LD to lp_count is not allowed</div><div class='add'>+</div><div class='add'>+	POPAX	status32_l\LVL\()</div><div class='add'>+	POP	ilink\LVL\()</div><div class='add'>+	POP	blink</div><div class='add'>+	POP	fp</div><div class='add'>+	POP	gp</div><div class='add'>+	RESTORE_R12_TO_R0</div><div class='add'>+</div><div class='add'>+	ld  sp, [sp] /* restore original sp */</div><div class='add'>+	/* orig_r0, ECR, user_r25 skipped automatically */</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Get thread_info of "current" tsk */</div><div class='add'>+.macro GET_CURR_THR_INFO_FROM_SP  reg</div><div class='add'>+	bic \reg, sp, (THREAD_SIZE - 1)</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Get CPU-ID of this core */</div><div class='add'>+.macro  GET_CPU_ID  reg</div><div class='add'>+	lr  \reg, [identity]</div><div class='add'>+	lsr \reg, \reg, 8</div><div class='add'>+	bmsk \reg, \reg, 7</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif  /* __ASM_ARC_ENTRY_COMPACT_H */</div><div class='head'>diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h<br/>index 884081099f80..ad7860c5ce15 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/entry.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/entry.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/entry.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/entry.h</a></div><div class='hunk'>@@ -1,45 +1,27 @@</div><div class='ctx'> /*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Vineetg: March 2009 (Supporting 2 levels of Interrupts)</div><div class='del'>- *  Stack switching code can no longer reliably rely on the fact that</div><div class='del'>- *  if we are NOT in user mode, stack is switched to kernel mode.</div><div class='del'>- *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed</div><div class='del'>- *  it's prologue including stack switching from user mode</div><div class='del'>- *</div><div class='del'>- * Vineetg: Aug 28th 2008: Bug #94984</div><div class='del'>- *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap</div><div class='del'>- *   Normally CPU does this automatically, however when doing FAKE rtie,</div><div class='del'>- *   we also need to explicitly do this. The problem in macros</div><div class='del'>- *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit</div><div class='del'>- *   was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context</div><div class='del'>- *</div><div class='del'>- * Vineetg: May 5th 2008</div><div class='del'>- *  -Modified CALLEE_REG save/restore macros to handle the fact that</div><div class='del'>- *      r25 contains the kernel current task ptr</div><div class='del'>- *  - Defined Stack Switching Macro to be reused in all intr/excp hdlrs</div><div class='del'>- *  - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the</div><div class='del'>- *      address Write back load ld.ab instead of seperate ld/add instn</div><div class='del'>- *</div><div class='del'>- * Amit Bhor, Sameer Dhavale: Codito Technologies 2004</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASM_ARC_ENTRY_H</div><div class='ctx'> #define __ASM_ARC_ENTRY_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='ctx'> #include &lt;asm/unistd.h&gt;		/* For NR_syscalls defination */</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/arcregs.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;	/* For VMALLOC_START */</div><div class='del'>-#include &lt;asm/thread_info.h&gt;	/* For THREAD_SIZE */</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='add'>+#include &lt;asm/entry-compact.h&gt;	/* ISA specific bits */</div><div class='add'>+#else</div><div class='add'>+#include &lt;asm/entry-arcv2.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Note on the LD/ST addr modes with addr reg wback</div><div class='ctx'>  *</div><div class='ctx'>  * LD.a same as LD.aw</div><div class='hunk'>@@ -143,8 +125,6 @@</div><div class='ctx'> 	POP	r13</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#define OFF_USER_R25_FROM_R24	(SZ_CALLEE_REGS + SZ_PT_REGS - 8)/4</div><div class='del'>-</div><div class='ctx'> /*--------------------------------------------------------------</div><div class='ctx'>  * Collect User Mode callee regs as struct callee_regs - needed by</div><div class='ctx'>  * fork/do_signal/unaligned-access-emulation.</div><div class='hunk'>@@ -157,12 +137,13 @@</div><div class='ctx'>  *-------------------------------------------------------------*/</div><div class='ctx'> .macro SAVE_CALLEE_SAVED_USER</div><div class='ctx'> </div><div class='add'>+	mov	r12, sp		; save SP as ref to pt_regs</div><div class='ctx'> 	SAVE_R13_TO_R24</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_CURR_IN_REG</div><div class='del'>-	; Retrieve orig r25 and save it on stack</div><div class='del'>-	ld.as   r12, [sp, OFF_USER_R25_FROM_R24]</div><div class='del'>-	st.a    r12, [sp, -4]</div><div class='add'>+	; Retrieve orig r25 and save it with rest of callee_regs</div><div class='add'>+	ld.as   r12, [r12, PT_user_r25]</div><div class='add'>+	PUSH	r12</div><div class='ctx'> #else</div><div class='ctx'> 	PUSH	r25</div><div class='ctx'> #endif</div><div class='hunk'>@@ -209,12 +190,16 @@</div><div class='ctx'> .macro RESTORE_CALLEE_SAVED_USER</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_CURR_IN_REG</div><div class='del'>-	ld.ab   r12, [sp, 4]</div><div class='del'>-	st.as   r12, [sp, OFF_USER_R25_FROM_R24]</div><div class='add'>+	POP	r12</div><div class='ctx'> #else</div><div class='ctx'> 	POP	r25</div><div class='ctx'> #endif</div><div class='ctx'> 	RESTORE_R24_TO_R13</div><div class='add'>+</div><div class='add'>+	; SP is back to start of pt_regs</div><div class='add'>+#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='add'>+	st.as   r12, [sp, PT_user_r25]</div><div class='add'>+#endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /*--------------------------------------------------------------</div><div class='hunk'>@@ -240,117 +225,6 @@</div><div class='ctx'> </div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Switch to Kernel Mode stack if SP points to User Mode stack</div><div class='del'>- *</div><div class='del'>- * Entry   : r9 contains pre-IRQ/exception/trap status32</div><div class='del'>- * Exit    : SP is set to kernel mode stack pointer</div><div class='del'>- *           If CURR_IN_REG, r25 set to "current" task pointer</div><div class='del'>- * Clobbers: r9</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-.macro SWITCH_TO_KERNEL_STK</div><div class='del'>-</div><div class='del'>-	/* User Mode when this happened ? Yes: Proceed to switch stack */</div><div class='del'>-	bbit1   r9, STATUS_U_BIT, 88f</div><div class='del'>-</div><div class='del'>-	/* OK we were already in kernel mode when this event happened, thus can</div><div class='del'>-	 * assume SP is kernel mode SP. _NO_ need to do any stack switching</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='del'>-	/* However....</div><div class='del'>-	 * If Level 2 Interrupts enabled, we may end up with a corner case:</div><div class='del'>-	 * 1. User Task executing</div><div class='del'>-	 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)</div><div class='del'>-	 * 3. But before it could switch SP from USER to KERNEL stack</div><div class='del'>-	 *      a L2 IRQ "Interrupts" L1</div><div class='del'>-	 * Thay way although L2 IRQ happened in Kernel mode, stack is still</div><div class='del'>-	 * not switched.</div><div class='del'>-	 * To handle this, we may need to switch stack even if in kernel mode</div><div class='del'>-	 * provided SP has values in range of USER mode stack ( &lt; 0x7000_0000 )</div><div class='del'>-	 */</div><div class='del'>-	brlo sp, VMALLOC_START, 88f</div><div class='del'>-</div><div class='del'>-	/* TODO: vineetg:</div><div class='del'>-	 * We need to be a bit more cautious here. What if a kernel bug in</div><div class='del'>-	 * L1 ISR, caused SP to go whaco (some small value which looks like</div><div class='del'>-	 * USER stk) and then we take L2 ISR.</div><div class='del'>-	 * Above brlo alone would treat it as a valid L1-L2 sceanrio</div><div class='del'>-	 * instead of shouting alound</div><div class='del'>-	 * The only feasible way is to make sure this L2 happened in</div><div class='del'>-	 * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in</div><div class='del'>-	 * L1 ISR before it switches stack</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Save Pre Intr/Exception KERNEL MODE SP on kernel stack</div><div class='del'>-	 * safe-keeping not really needed, but it keeps the epilogue code</div><div class='del'>-	 * (SP restore) simpler/uniform.</div><div class='del'>-	 */</div><div class='del'>-	b.d	66f</div><div class='del'>-	mov	r9, sp</div><div class='del'>-</div><div class='del'>-88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */</div><div class='del'>-</div><div class='del'>-	GET_CURR_TASK_ON_CPU   r9</div><div class='del'>-</div><div class='del'>-	/* With current tsk in r9, get it's kernel mode stack base */</div><div class='del'>-	GET_TSK_STACK_BASE  r9, r9</div><div class='del'>-</div><div class='del'>-66:</div><div class='del'>-#ifdef CONFIG_ARC_CURR_IN_REG</div><div class='del'>-	/*</div><div class='del'>-	 * Treat r25 as scratch reg, save it on stack first</div><div class='del'>-	 * Load it with current task pointer</div><div class='del'>-	 */</div><div class='del'>-	st	r25, [r9, -4]</div><div class='del'>-	GET_CURR_TASK_ON_CPU   r25</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Save Pre Intr/Exception User SP on kernel stack */</div><div class='del'>-	st.a    sp, [r9, -16]	; Make room for orig_r0, ECR, user_r25</div><div class='del'>-</div><div class='del'>-	/* CAUTION:</div><div class='del'>-	 * SP should be set at the very end when we are done with everything</div><div class='del'>-	 * In case of 2 levels of interrupt we depend on value of SP to assume</div><div class='del'>-	 * that everything else is done (loading r25 etc)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* set SP to point to kernel mode stack */</div><div class='del'>-	mov sp, r9</div><div class='del'>-</div><div class='del'>-	/* ----- Stack Switched to kernel Mode, Now save REG FILE ----- */</div><div class='del'>-</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*------------------------------------------------------------</div><div class='del'>- * "FAKE" a rtie to return from CPU Exception context</div><div class='del'>- * This is to re-enable Exceptions within exception</div><div class='del'>- * Look at EV_ProtV to see how this is actually used</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-.macro FAKE_RET_FROM_EXCPN  reg</div><div class='del'>-</div><div class='del'>-	ld  \reg, [sp, PT_status32]</div><div class='del'>-	bic  \reg, \reg, (STATUS_U_MASK|STATUS_DE_MASK)</div><div class='del'>-	bset \reg, \reg, STATUS_L_BIT</div><div class='del'>-	sr  \reg, [erstatus]</div><div class='del'>-	mov \reg, 55f</div><div class='del'>-	sr  \reg, [eret]</div><div class='del'>-</div><div class='del'>-	rtie</div><div class='del'>-55:</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * @reg [OUT] &amp;thread_info of "current"</div><div class='del'>- */</div><div class='del'>-.macro GET_CURR_THR_INFO_FROM_SP  reg</div><div class='del'>-	bic \reg, sp, (THREAD_SIZE - 1)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * @reg [OUT] thread_info-&gt;flags of "current"</div><div class='ctx'>  */</div><div class='hunk'>@@ -359,222 +233,6 @@</div><div class='ctx'> 	ld  \reg, [\reg, THREAD_INFO_FLAGS]</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * For early Exception Prologue, a core reg is temporarily needed to</div><div class='del'>- * code the rest of prolog (stack switching). This is done by stashing</div><div class='del'>- * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).</div><div class='del'>- *</div><div class='del'>- * Before saving the full regfile - this reg is restored back, only</div><div class='del'>- * to be saved again on kernel mode stack, as part of pt_regs.</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-.macro EXCPN_PROLOG_FREEUP_REG	reg</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	sr  \reg, [ARC_REG_SCRATCH_DATA0]</div><div class='del'>-#else</div><div class='del'>-	st  \reg, [@ex_saved_reg1]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro EXCPN_PROLOG_RESTORE_REG	reg</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	lr  \reg, [ARC_REG_SCRATCH_DATA0]</div><div class='del'>-#else</div><div class='del'>-	ld  \reg, [@ex_saved_reg1]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Exception Entry prologue</div><div class='del'>- * -Switches stack to K mode (if not already)</div><div class='del'>- * -Saves the register file</div><div class='del'>- *</div><div class='del'>- * After this it is safe to call the "C" handlers</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-.macro EXCEPTION_PROLOGUE</div><div class='del'>-</div><div class='del'>-	/* Need at least 1 reg to code the early exception prologue */</div><div class='del'>-	EXCPN_PROLOG_FREEUP_REG r9</div><div class='del'>-</div><div class='del'>-	/* U/K mode at time of exception (stack not switched if already K) */</div><div class='del'>-	lr  r9, [erstatus]</div><div class='del'>-</div><div class='del'>-	/* ARC700 doesn't provide auto-stack switching */</div><div class='del'>-	SWITCH_TO_KERNEL_STK</div><div class='del'>-</div><div class='del'>-	/* save the regfile */</div><div class='del'>-	SAVE_ALL_SYS</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Save all registers used by Exceptions (TLB Miss, Prot-V, Mem err etc)</div><div class='del'>- * Requires SP to be already switched to kernel mode Stack</div><div class='del'>- * sp points to the next free element on the stack at exit of this macro.</div><div class='del'>- * Registers are pushed / popped in the order defined in struct ptregs</div><div class='del'>- * in asm/ptrace.h</div><div class='del'>- * Note that syscalls are implemented via TRAP which is also a exception</div><div class='del'>- * from CPU's point of view</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-.macro SAVE_ALL_SYS</div><div class='del'>-</div><div class='del'>-	lr	r9, [ecr]</div><div class='del'>-	st      r9, [sp, 8]    /* ECR */</div><div class='del'>-	st      r0, [sp, 4]    /* orig_r0, needed only for sys calls */</div><div class='del'>-</div><div class='del'>-	/* Restore r9 used to code the early prologue */</div><div class='del'>-	EXCPN_PROLOG_RESTORE_REG  r9</div><div class='del'>-</div><div class='del'>-	SAVE_R0_TO_R12</div><div class='del'>-	PUSH	gp</div><div class='del'>-	PUSH	fp</div><div class='del'>-	PUSH	blink</div><div class='del'>-	PUSHAX	eret</div><div class='del'>-	PUSHAX	erstatus</div><div class='del'>-	PUSH	lp_count</div><div class='del'>-	PUSHAX	lp_end</div><div class='del'>-	PUSHAX	lp_start</div><div class='del'>-	PUSHAX	erbta</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Restore all registers used by system call or Exceptions</div><div class='del'>- * SP should always be pointing to the next free stack element</div><div class='del'>- * when entering this macro.</div><div class='del'>- *</div><div class='del'>- * NOTE:</div><div class='del'>- *</div><div class='del'>- * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='del'>- * for memory load operations. If used in that way interrupts are deffered</div><div class='del'>- * by hardware and that is not good.</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-.macro RESTORE_ALL_SYS</div><div class='del'>-	POPAX	erbta</div><div class='del'>-	POPAX	lp_start</div><div class='del'>-	POPAX	lp_end</div><div class='del'>-</div><div class='del'>-	POP	r9</div><div class='del'>-	mov	lp_count, r9	;LD to lp_count is not allowed</div><div class='del'>-</div><div class='del'>-	POPAX	erstatus</div><div class='del'>-	POPAX	eret</div><div class='del'>-	POP	blink</div><div class='del'>-	POP	fp</div><div class='del'>-	POP	gp</div><div class='del'>-	RESTORE_R12_TO_R0</div><div class='del'>-</div><div class='del'>-	ld  sp, [sp] /* restore original sp */</div><div class='del'>-	/* orig_r0, ECR, user_r25 skipped automatically */</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Save all registers used by interrupt handlers.</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-.macro SAVE_ALL_INT1</div><div class='del'>-</div><div class='del'>-	/* restore original r9 to be saved as part of reg-file */</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	lr  r9, [ARC_REG_SCRATCH_DATA0]</div><div class='del'>-#else</div><div class='del'>-	ld  r9, [@int1_saved_reg]</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* now we are ready to save the remaining context :) */</div><div class='del'>-	st      event_IRQ1, [sp, 8]    /* Dummy ECR */</div><div class='del'>-	st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */</div><div class='del'>-</div><div class='del'>-	SAVE_R0_TO_R12</div><div class='del'>-	PUSH	gp</div><div class='del'>-	PUSH	fp</div><div class='del'>-	PUSH	blink</div><div class='del'>-	PUSH	ilink1</div><div class='del'>-	PUSHAX	status32_l1</div><div class='del'>-	PUSH	lp_count</div><div class='del'>-	PUSHAX	lp_end</div><div class='del'>-	PUSHAX	lp_start</div><div class='del'>-	PUSHAX	bta_l1</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro SAVE_ALL_INT2</div><div class='del'>-</div><div class='del'>-	/* TODO-vineetg: SMP we can't use global nor can we use</div><div class='del'>-	*   SCRATCH0 as we do for int1 because while int1 is using</div><div class='del'>-	*   it, int2 can come</div><div class='del'>-	*/</div><div class='del'>-	/* retsore original r9 , saved in sys_saved_r9 */</div><div class='del'>-	ld  r9, [@int2_saved_reg]</div><div class='del'>-</div><div class='del'>-	/* now we are ready to save the remaining context :) */</div><div class='del'>-	st      event_IRQ2, [sp, 8]    /* Dummy ECR */</div><div class='del'>-	st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */</div><div class='del'>-</div><div class='del'>-	SAVE_R0_TO_R12</div><div class='del'>-	PUSH	gp</div><div class='del'>-	PUSH	fp</div><div class='del'>-	PUSH	blink</div><div class='del'>-	PUSH	ilink2</div><div class='del'>-	PUSHAX	status32_l2</div><div class='del'>-	PUSH	lp_count</div><div class='del'>-	PUSHAX	lp_end</div><div class='del'>-	PUSHAX	lp_start</div><div class='del'>-	PUSHAX	bta_l2</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------</div><div class='del'>- * Restore all registers used by interrupt handlers.</div><div class='del'>- *</div><div class='del'>- * NOTE:</div><div class='del'>- *</div><div class='del'>- * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='del'>- * for memory load operations. If used in that way interrupts are deffered</div><div class='del'>- * by hardware and that is not good.</div><div class='del'>- *-------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-.macro RESTORE_ALL_INT1</div><div class='del'>-	POPAX	bta_l1</div><div class='del'>-	POPAX	lp_start</div><div class='del'>-	POPAX	lp_end</div><div class='del'>-</div><div class='del'>-	POP	r9</div><div class='del'>-	mov	lp_count, r9	;LD to lp_count is not allowed</div><div class='del'>-</div><div class='del'>-	POPAX	status32_l1</div><div class='del'>-	POP	ilink1</div><div class='del'>-	POP	blink</div><div class='del'>-	POP	fp</div><div class='del'>-	POP	gp</div><div class='del'>-	RESTORE_R12_TO_R0</div><div class='del'>-</div><div class='del'>-	ld  sp, [sp] /* restore original sp */</div><div class='del'>-	/* orig_r0, ECR, user_r25 skipped automatically */</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RESTORE_ALL_INT2</div><div class='del'>-	POPAX	bta_l2</div><div class='del'>-	POPAX	lp_start</div><div class='del'>-	POPAX	lp_end</div><div class='del'>-</div><div class='del'>-	POP	r9</div><div class='del'>-	mov	lp_count, r9	;LD to lp_count is not allowed</div><div class='del'>-</div><div class='del'>-	POPAX	status32_l2</div><div class='del'>-	POP	ilink2</div><div class='del'>-	POP	blink</div><div class='del'>-	POP	fp</div><div class='del'>-	POP	gp</div><div class='del'>-	RESTORE_R12_TO_R0</div><div class='del'>-</div><div class='del'>-	ld  sp, [sp] /* restore original sp */</div><div class='del'>-	/* orig_r0, ECR, user_r25 skipped automatically */</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Get CPU-ID of this core */</div><div class='del'>-.macro  GET_CPU_ID  reg</div><div class='del'>-	lr  \reg, [identity]</div><div class='del'>-	lsr \reg, \reg, 8</div><div class='del'>-	bmsk \reg, \reg, 7</div><div class='del'>-.endm</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------</div><div class='hunk'>@@ -643,6 +301,4 @@</div><div class='ctx'> </div><div class='ctx'> #endif	/* CONFIG_ARC_CURR_IN_REG */</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='ctx'> #endif  /* __ASM_ARC_ENTRY_H */</div><div class='head'>diff --git a/arch/arc/include/asm/futex.h b/arch/arc/include/asm/futex.h<br/>index 4dc64ddebece..70cfe16b742d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/futex.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/futex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/futex.h</a></div><div class='hunk'>@@ -16,12 +16,40 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARC_HAS_LLSC</div><div class='add'>+</div><div class='add'>+#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\</div><div class='add'>+							\</div><div class='add'>+	__asm__ __volatile__(				\</div><div class='add'>+	"1:	llock	%1, [%2]		\n"	\</div><div class='add'>+		insn				"\n"	\</div><div class='add'>+	"2:	scond	%0, [%2]		\n"	\</div><div class='add'>+	"	bnz	1b			\n"	\</div><div class='add'>+	"	mov %0, 0			\n"	\</div><div class='add'>+	"3:					\n"	\</div><div class='add'>+	"	.section .fixup,\"ax\"		\n"	\</div><div class='add'>+	"	.align  4			\n"	\</div><div class='add'>+	"4:	mov %0, %4			\n"	\</div><div class='add'>+	"	b   3b				\n"	\</div><div class='add'>+	"	.previous			\n"	\</div><div class='add'>+	"	.section __ex_table,\"a\"	\n"	\</div><div class='add'>+	"	.align  4			\n"	\</div><div class='add'>+	"	.word   1b, 4b			\n"	\</div><div class='add'>+	"	.word   2b, 4b			\n"	\</div><div class='add'>+	"	.previous			\n"	\</div><div class='add'>+							\</div><div class='add'>+	: "=&amp;r" (ret), "=&amp;r" (oldval)			\</div><div class='add'>+	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\</div><div class='add'>+	: "cc", "memory")</div><div class='add'>+</div><div class='add'>+#else	/* !CONFIG_ARC_HAS_LLSC */</div><div class='add'>+</div><div class='ctx'> #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\</div><div class='ctx'> 							\</div><div class='ctx'> 	__asm__ __volatile__(				\</div><div class='del'>-	"1:	ld  %1, [%2]			\n"	\</div><div class='add'>+	"1:	ld	%1, [%2]		\n"	\</div><div class='ctx'> 		insn				"\n"	\</div><div class='del'>-	"2:	st  %0, [%2]			\n"	\</div><div class='add'>+	"2:	st	%0, [%2]		\n"	\</div><div class='ctx'> 	"	mov %0, 0			\n"	\</div><div class='ctx'> 	"3:					\n"	\</div><div class='ctx'> 	"	.section .fixup,\"ax\"		\n"	\</div><div class='hunk'>@@ -39,6 +67,8 @@</div><div class='ctx'> 	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\</div><div class='ctx'> 	: "cc", "memory")</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> {</div><div class='ctx'> 	int op = (encoded_op &gt;&gt; 28) &amp; 7;</div><div class='hunk'>@@ -53,7 +83,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	pagefault_disable();	/* implies preempt_disable() */</div><div class='add'>+	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case FUTEX_OP_SET:</div><div class='hunk'>@@ -75,7 +105,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 		ret = -ENOSYS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pagefault_enable();	/* subsumes preempt_enable() */</div><div class='add'>+	pagefault_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		switch (cmp) {</div><div class='hunk'>@@ -104,7 +134,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Compare-xchg with preemption disabled.</div><div class='add'>+/* Compare-xchg with pagefaults disabled.</div><div class='ctx'>  *  Notes:</div><div class='ctx'>  *      -Best-Effort: Exchg happens only if compare succeeds.</div><div class='ctx'>  *          If compare fails, returns; leaving retry/looping to upper layers</div><div class='hunk'>@@ -121,13 +151,19 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	pagefault_disable();	/* implies preempt_disable() */</div><div class='add'>+	pagefault_disable();</div><div class='ctx'> </div><div class='del'>-	/* TBD : can use llock/scond */</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='del'>-	"1:	ld    %0, [%3]	\n"</div><div class='del'>-	"	brne  %0, %1, 3f	\n"</div><div class='del'>-	"2:	st    %2, [%3]	\n"</div><div class='add'>+#ifdef CONFIG_ARC_HAS_LLSC</div><div class='add'>+	"1:	llock	%0, [%3]		\n"</div><div class='add'>+	"	brne	%0, %1, 3f		\n"</div><div class='add'>+	"2:	scond	%2, [%3]		\n"</div><div class='add'>+	"	bnz	1b			\n"</div><div class='add'>+#else</div><div class='add'>+	"1:	ld	%0, [%3]		\n"</div><div class='add'>+	"	brne	%0, %1, 3f		\n"</div><div class='add'>+	"2:	st	%2, [%3]		\n"</div><div class='add'>+#endif</div><div class='ctx'> 	"3:	\n"</div><div class='ctx'> 	"	.section .fixup,\"ax\"	\n"</div><div class='ctx'> 	"4:	mov %0, %4	\n"</div><div class='hunk'>@@ -142,7 +178,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,</div><div class='ctx'> 	: "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT)</div><div class='ctx'> 	: "cc", "memory");</div><div class='ctx'> </div><div class='del'>-	pagefault_enable();	/* subsumes preempt_enable() */</div><div class='add'>+	pagefault_enable();</div><div class='ctx'> </div><div class='ctx'> 	*uval = val;</div><div class='ctx'> 	return val;</div><div class='head'>diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h<br/>index cabd518cb253..694ece8a0243 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/io.h</a></div><div class='hunk'>@@ -20,6 +20,7 @@ extern void iounmap(const void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> #define ioremap_nocache(phy, sz)	ioremap(phy, sz)</div><div class='ctx'> #define ioremap_wc(phy, sz)		ioremap(phy, sz)</div><div class='add'>+#define ioremap_wt(phy, sz)		ioremap(phy, sz)</div><div class='ctx'> </div><div class='ctx'> /* Change struct page to physical address */</div><div class='ctx'> #define page_to_phys(page)		(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='hunk'>@@ -98,9 +99,45 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define readb_relaxed readb</div><div class='del'>-#define readw_relaxed readw</div><div class='del'>-#define readl_relaxed readl</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='add'>+#define __iormb()		rmb()</div><div class='add'>+#define __iowmb()		wmb()</div><div class='add'>+#else</div><div class='add'>+#define __iormb()		do { } while (0)</div><div class='add'>+#define __iowmb()		do { } while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MMIO can also get buffered/optimized in micro-arch, so barriers needed</div><div class='add'>+ * Based on ARM model for the typical use case</div><div class='add'>+ *</div><div class='add'>+ *	&lt;ST [DMA buffer]&gt;</div><div class='add'>+ *	&lt;writel MMIO "go" reg&gt;</div><div class='add'>+ *  or:</div><div class='add'>+ *	&lt;readl MMIO "status" reg&gt;</div><div class='add'>+ *	&lt;LD [DMA buffer]&gt;</div><div class='add'>+ *</div><div class='add'>+ * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com</div><div class='add'>+ */</div><div class='add'>+#define readb(c)		({ u8  __v = readb_relaxed(c); __iormb(); __v; })</div><div class='add'>+#define readw(c)		({ u16 __v = readw_relaxed(c); __iormb(); __v; })</div><div class='add'>+#define readl(c)		({ u32 __v = readl_relaxed(c); __iormb(); __v; })</div><div class='add'>+</div><div class='add'>+#define writeb(v,c)		({ __iowmb(); writeb_relaxed(v,c); })</div><div class='add'>+#define writew(v,c)		({ __iowmb(); writew_relaxed(v,c); })</div><div class='add'>+#define writel(v,c)		({ __iowmb(); writel_relaxed(v,c); })</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Relaxed API for drivers which can handle any ordering themselves</div><div class='add'>+ */</div><div class='add'>+#define readb_relaxed(c)	__raw_readb(c)</div><div class='add'>+#define readw_relaxed(c)	__raw_readw(c)</div><div class='add'>+#define readl_relaxed(c)	__raw_readl(c)</div><div class='add'>+</div><div class='add'>+#define writeb_relaxed(v,c)	__raw_writeb(v,c)</div><div class='add'>+#define writew_relaxed(v,c)	__raw_writew(v,c)</div><div class='add'>+#define writel_relaxed(v,c)	__raw_writel(v,c)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h<br/>index f38652fb2ed7..bc5103637326 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irq.h</a></div><div class='hunk'>@@ -13,8 +13,14 @@</div><div class='ctx'> #define NR_IRQS		128 /* allow some CPU external IRQ handling */</div><div class='ctx'> </div><div class='ctx'> /* Platform Independent IRQs */</div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> #define TIMER0_IRQ      3</div><div class='ctx'> #define TIMER1_IRQ      4</div><div class='add'>+#else</div><div class='add'>+#define TIMER0_IRQ      16</div><div class='add'>+#define TIMER1_IRQ      17</div><div class='add'>+#define IPI_IRQ         19</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;asm-generic/irq.h&gt;</div><div class='head'>diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h<br/>new file mode 100644<br/>index 000000000000..ad481c24070d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/irqflags-arcv2.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags-arcv2.h</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_IRQFLAGS_ARCV2_H</div><div class='add'>+#define __ASM_IRQFLAGS_ARCV2_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/arcregs.h&gt;</div><div class='add'>+</div><div class='add'>+/* status32 Bits */</div><div class='add'>+#define STATUS_AD_BIT	19   /* Disable Align chk: core supports non-aligned */</div><div class='add'>+#define STATUS_IE_BIT	31</div><div class='add'>+</div><div class='add'>+#define STATUS_AD_MASK		(1&lt;&lt;STATUS_AD_BIT)</div><div class='add'>+#define STATUS_IE_MASK		(1&lt;&lt;STATUS_IE_BIT)</div><div class='add'>+</div><div class='add'>+#define AUX_USER_SP		0x00D</div><div class='add'>+#define AUX_IRQ_CTRL		0x00E</div><div class='add'>+#define AUX_IRQ_ACT		0x043	/* Active Intr across all levels */</div><div class='add'>+#define AUX_IRQ_LVL_PEND	0x200	/* Pending Intr across all levels */</div><div class='add'>+#define AUX_IRQ_PRIORITY	0x206</div><div class='add'>+#define ICAUSE			0x40a</div><div class='add'>+#define AUX_IRQ_SELECT		0x40b</div><div class='add'>+#define AUX_IRQ_ENABLE		0x40c</div><div class='add'>+</div><div class='add'>+/* Was Intr taken in User Mode */</div><div class='add'>+#define AUX_IRQ_ACT_BIT_U	31</div><div class='add'>+</div><div class='add'>+/* 0 is highest level, but taken by FIRQs, if present in design */</div><div class='add'>+#define ARCV2_IRQ_DEF_PRIO		0</div><div class='add'>+</div><div class='add'>+/* seed value for status register */</div><div class='add'>+#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | STATUS_AD_MASK | \</div><div class='add'>+					(ARCV2_IRQ_DEF_PRIO &lt;&lt; 1))</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save IRQ state and disable IRQs</div><div class='add'>+ */</div><div class='add'>+static inline long arch_local_irq_save(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("	clri %0	\n" : "=r" (flags) : : "memory");</div><div class='add'>+</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * restore saved IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline void arch_local_irq_restore(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__("	seti %0	\n" : : "r" (flags) : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unconditionally Enable IRQs</div><div class='add'>+ */</div><div class='add'>+static inline void arch_local_irq_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int irqact = read_aux_reg(AUX_IRQ_ACT);</div><div class='add'>+</div><div class='add'>+	if (irqact &amp; 0xffff)</div><div class='add'>+		write_aux_reg(AUX_IRQ_ACT, irqact &amp; ~0xffff);</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("	seti	\n" : : : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unconditionally Disable IRQs</div><div class='add'>+ */</div><div class='add'>+static inline void arch_local_irq_disable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__("	clri	\n" : : : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * save IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline long arch_local_save_flags(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long temp;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	"	lr  %0, [status32]	\n"</div><div class='add'>+	: "=&amp;r"(temp)</div><div class='add'>+	:</div><div class='add'>+	: "memory");</div><div class='add'>+</div><div class='add'>+	return temp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Query IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline int arch_irqs_disabled_flags(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	return !(flags &amp; (STATUS_IE_MASK));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int arch_irqs_disabled(void)</div><div class='add'>+{</div><div class='add'>+	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+.macro IRQ_DISABLE  scratch</div><div class='add'>+	clri</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro IRQ_ENABLE  scratch</div><div class='add'>+	seti</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif	/* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/irqflags-compact.h b/arch/arc/include/asm/irqflags-compact.h<br/>new file mode 100644<br/>index 000000000000..aa805575c320<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/irqflags-compact.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags-compact.h</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_IRQFLAGS_ARCOMPACT_H</div><div class='add'>+#define __ASM_IRQFLAGS_ARCOMPACT_H</div><div class='add'>+</div><div class='add'>+/* vineetg: March 2010 : local_irq_save( ) optimisation</div><div class='add'>+ *  -Remove explicit mov of current status32 into reg, that is not needed</div><div class='add'>+ *  -Use BIC  insn instead of INVERTED + AND</div><div class='add'>+ *  -Conditionally disable interrupts (if they are not enabled, don't disable)</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;asm/arcregs.h&gt;</div><div class='add'>+</div><div class='add'>+/* status32 Reg bits related to Interrupt Handling */</div><div class='add'>+#define STATUS_E1_BIT		1	/* Int 1 enable */</div><div class='add'>+#define STATUS_E2_BIT		2	/* Int 2 enable */</div><div class='add'>+#define STATUS_A1_BIT		3	/* Int 1 active */</div><div class='add'>+#define STATUS_A2_BIT		4	/* Int 2 active */</div><div class='add'>+</div><div class='add'>+#define STATUS_E1_MASK		(1&lt;&lt;STATUS_E1_BIT)</div><div class='add'>+#define STATUS_E2_MASK		(1&lt;&lt;STATUS_E2_BIT)</div><div class='add'>+#define STATUS_A1_MASK		(1&lt;&lt;STATUS_A1_BIT)</div><div class='add'>+#define STATUS_A2_MASK		(1&lt;&lt;STATUS_A2_BIT)</div><div class='add'>+#define STATUS_IE_MASK		(STATUS_E1_MASK | STATUS_E2_MASK)</div><div class='add'>+</div><div class='add'>+/* Other Interrupt Handling related Aux regs */</div><div class='add'>+#define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */</div><div class='add'>+#define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */</div><div class='add'>+#define AUX_IRQ_LV12		0x43	/* interrupt level register */</div><div class='add'>+</div><div class='add'>+#define AUX_IENABLE		0x40c</div><div class='add'>+#define AUX_ITRIGGER		0x40d</div><div class='add'>+#define AUX_IPULSE		0x415</div><div class='add'>+</div><div class='add'>+#define ISA_INIT_STATUS_BITS	STATUS_IE_MASK</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/******************************************************************</div><div class='add'>+ * IRQ Control Macros</div><div class='add'>+ *</div><div class='add'>+ * All of them have "memory" clobber (compiler barrier) which is needed to</div><div class='add'>+ * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)</div><div class='add'>+ * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)</div><div class='add'>+ *</div><div class='add'>+ * Noted at the time of Abilis Timer List corruption</div><div class='add'>+ *	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67</div><div class='add'>+ *	Reasoning			: https://lkml.org/lkml/2013/4/8/15</div><div class='add'>+ *</div><div class='add'>+ ******************************************************************/</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save IRQ state and disable IRQs</div><div class='add'>+ */</div><div class='add'>+static inline long arch_local_irq_save(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long temp, flags;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	"	lr  %1, [status32]	\n"</div><div class='add'>+	"	bic %0, %1, %2		\n"</div><div class='add'>+	"	and.f 0, %1, %2	\n"</div><div class='add'>+	"	flag.nz %0		\n"</div><div class='add'>+	: "=r"(temp), "=r"(flags)</div><div class='add'>+	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))</div><div class='add'>+	: "memory", "cc");</div><div class='add'>+</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * restore saved IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline void arch_local_irq_restore(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	"	flag %0			\n"</div><div class='add'>+	:</div><div class='add'>+	: "r"(flags)</div><div class='add'>+	: "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unconditionally Enable IRQs</div><div class='add'>+ */</div><div class='add'>+extern void arch_local_irq_enable(void);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unconditionally Disable IRQs</div><div class='add'>+ */</div><div class='add'>+static inline void arch_local_irq_disable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long temp;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	"	lr  %0, [status32]	\n"</div><div class='add'>+	"	and %0, %0, %1		\n"</div><div class='add'>+	"	flag %0			\n"</div><div class='add'>+	: "=&amp;r"(temp)</div><div class='add'>+	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))</div><div class='add'>+	: "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * save IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline long arch_local_save_flags(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long temp;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	"	lr  %0, [status32]	\n"</div><div class='add'>+	: "=&amp;r"(temp)</div><div class='add'>+	:</div><div class='add'>+	: "memory");</div><div class='add'>+</div><div class='add'>+	return temp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Query IRQ state</div><div class='add'>+ */</div><div class='add'>+static inline int arch_irqs_disabled_flags(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	return !(flags &amp; (STATUS_E1_MASK</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='add'>+			| STATUS_E2_MASK</div><div class='add'>+#endif</div><div class='add'>+		));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int arch_irqs_disabled(void)</div><div class='add'>+{</div><div class='add'>+	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='add'>+</div><div class='add'>+.macro TRACE_ASM_IRQ_DISABLE</div><div class='add'>+	bl	trace_hardirqs_off</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro TRACE_ASM_IRQ_ENABLE</div><div class='add'>+	bl	trace_hardirqs_on</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+.macro TRACE_ASM_IRQ_DISABLE</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro TRACE_ASM_IRQ_ENABLE</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.macro IRQ_DISABLE  scratch</div><div class='add'>+	lr	\scratch, [status32]</div><div class='add'>+	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)</div><div class='add'>+	flag	\scratch</div><div class='add'>+	TRACE_ASM_IRQ_DISABLE</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro IRQ_ENABLE  scratch</div><div class='add'>+	lr	\scratch, [status32]</div><div class='add'>+	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)</div><div class='add'>+	flag	\scratch</div><div class='add'>+	TRACE_ASM_IRQ_ENABLE</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif	/* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h<br/>index 27ecc6975a58..59bc6a64f75d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/irqflags.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/irqflags.h</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> /*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -9,171 +10,10 @@</div><div class='ctx'> #ifndef __ASM_ARC_IRQFLAGS_H</div><div class='ctx'> #define __ASM_ARC_IRQFLAGS_H</div><div class='ctx'> </div><div class='del'>-/* vineetg: March 2010 : local_irq_save( ) optimisation</div><div class='del'>- *  -Remove explicit mov of current status32 into reg, that is not needed</div><div class='del'>- *  -Use BIC  insn instead of INVERTED + AND</div><div class='del'>- *  -Conditionally disable interrupts (if they are not enabled, don't disable)</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;asm/arcregs.h&gt;</div><div class='del'>-</div><div class='del'>-/* status32 Reg bits related to Interrupt Handling */</div><div class='del'>-#define STATUS_E1_BIT		1	/* Int 1 enable */</div><div class='del'>-#define STATUS_E2_BIT		2	/* Int 2 enable */</div><div class='del'>-#define STATUS_A1_BIT		3	/* Int 1 active */</div><div class='del'>-#define STATUS_A2_BIT		4	/* Int 2 active */</div><div class='del'>-</div><div class='del'>-#define STATUS_E1_MASK		(1&lt;&lt;STATUS_E1_BIT)</div><div class='del'>-#define STATUS_E2_MASK		(1&lt;&lt;STATUS_E2_BIT)</div><div class='del'>-#define STATUS_A1_MASK		(1&lt;&lt;STATUS_A1_BIT)</div><div class='del'>-#define STATUS_A2_MASK		(1&lt;&lt;STATUS_A2_BIT)</div><div class='del'>-</div><div class='del'>-/* Other Interrupt Handling related Aux regs */</div><div class='del'>-#define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */</div><div class='del'>-#define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */</div><div class='del'>-#define AUX_IRQ_LV12		0x43	/* interrupt level register */</div><div class='del'>-</div><div class='del'>-#define AUX_IENABLE		0x40c</div><div class='del'>-#define AUX_ITRIGGER		0x40d</div><div class='del'>-#define AUX_IPULSE		0x415</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-/******************************************************************</div><div class='del'>- * IRQ Control Macros</div><div class='del'>- *</div><div class='del'>- * All of them have "memory" clobber (compiler barrier) which is needed to</div><div class='del'>- * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)</div><div class='del'>- * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)</div><div class='del'>- *</div><div class='del'>- * Noted at the time of Abilis Timer List corruption</div><div class='del'>- * 	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67</div><div class='del'>- * 	Reasoning			: https://lkml.org/lkml/2013/4/8/15</div><div class='del'>- *</div><div class='del'>- ******************************************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Save IRQ state and disable IRQs</div><div class='del'>- */</div><div class='del'>-static inline long arch_local_irq_save(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp, flags;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"	lr  %1, [status32]	\n"</div><div class='del'>-	"	bic %0, %1, %2		\n"</div><div class='del'>-	"	and.f 0, %1, %2	\n"</div><div class='del'>-	"	flag.nz %0		\n"</div><div class='del'>-	: "=r"(temp), "=r"(flags)</div><div class='del'>-	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))</div><div class='del'>-	: "memory", "cc");</div><div class='del'>-</div><div class='del'>-	return flags;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * restore saved IRQ state</div><div class='del'>- */</div><div class='del'>-static inline void arch_local_irq_restore(unsigned long flags)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"	flag %0			\n"</div><div class='del'>-	:</div><div class='del'>-	: "r"(flags)</div><div class='del'>-	: "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Unconditionally Enable IRQs</div><div class='del'>- */</div><div class='del'>-extern void arch_local_irq_enable(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Unconditionally Disable IRQs</div><div class='del'>- */</div><div class='del'>-static inline void arch_local_irq_disable(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"	lr  %0, [status32]	\n"</div><div class='del'>-	"	and %0, %0, %1		\n"</div><div class='del'>-	"	flag %0			\n"</div><div class='del'>-	: "=&amp;r"(temp)</div><div class='del'>-	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))</div><div class='del'>-	: "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * save IRQ state</div><div class='del'>- */</div><div class='del'>-static inline long arch_local_save_flags(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"	lr  %0, [status32]	\n"</div><div class='del'>-	: "=&amp;r"(temp)</div><div class='del'>-	:</div><div class='del'>-	: "memory");</div><div class='del'>-</div><div class='del'>-	return temp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Query IRQ state</div><div class='del'>- */</div><div class='del'>-static inline int arch_irqs_disabled_flags(unsigned long flags)</div><div class='del'>-{</div><div class='del'>-	return !(flags &amp; (STATUS_E1_MASK</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='del'>-			| STATUS_E2_MASK</div><div class='del'>-#endif</div><div class='del'>-		));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int arch_irqs_disabled(void)</div><div class='del'>-{</div><div class='del'>-	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='del'>-</div><div class='del'>-.macro TRACE_ASM_IRQ_DISABLE</div><div class='del'>-	bl	trace_hardirqs_off</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro TRACE_ASM_IRQ_ENABLE</div><div class='del'>-	bl	trace_hardirqs_on</div><div class='del'>-.endm</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='add'>+#include &lt;asm/irqflags-compact.h&gt;</div><div class='ctx'> #else</div><div class='del'>-</div><div class='del'>-.macro TRACE_ASM_IRQ_DISABLE</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro TRACE_ASM_IRQ_ENABLE</div><div class='del'>-.endm</div><div class='del'>-</div><div class='add'>+#include &lt;asm/irqflags-arcv2.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-.macro IRQ_DISABLE  scratch</div><div class='del'>-	lr	\scratch, [status32]</div><div class='del'>-	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)</div><div class='del'>-	flag	\scratch</div><div class='del'>-	TRACE_ASM_IRQ_DISABLE</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro IRQ_ENABLE  scratch</div><div class='del'>-	lr	\scratch, [status32]</div><div class='del'>-	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)</div><div class='del'>-	flag	\scratch</div><div class='del'>-	TRACE_ASM_IRQ_ENABLE</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h<br/>new file mode 100644<br/>index 000000000000..52c11f0bb0e5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/mcip.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/mcip.h</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+/*</div><div class='add'>+ * ARConnect IP Support (Multi core enabler: Cross core IPI, RTC ...)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_MCIP_H</div><div class='add'>+#define __ASM_MCIP_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+</div><div class='add'>+#include &lt;asm/arcregs.h&gt;</div><div class='add'>+</div><div class='add'>+#define ARC_REG_MCIP_BCR	0x0d0</div><div class='add'>+#define ARC_REG_MCIP_CMD	0x600</div><div class='add'>+#define ARC_REG_MCIP_WDATA	0x601</div><div class='add'>+#define ARC_REG_MCIP_READBACK	0x602</div><div class='add'>+</div><div class='add'>+struct mcip_cmd {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	unsigned int pad:8, param:16, cmd:8;</div><div class='add'>+#else</div><div class='add'>+	unsigned int cmd:8, param:16, pad:8;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define CMD_INTRPT_GENERATE_IRQ		0x01</div><div class='add'>+#define CMD_INTRPT_GENERATE_ACK		0x02</div><div class='add'>+#define CMD_INTRPT_READ_STATUS		0x03</div><div class='add'>+#define CMD_INTRPT_CHECK_SOURCE		0x04</div><div class='add'>+</div><div class='add'>+/* Semaphore Commands */</div><div class='add'>+#define CMD_SEMA_CLAIM_AND_READ		0x11</div><div class='add'>+#define CMD_SEMA_RELEASE		0x12</div><div class='add'>+</div><div class='add'>+#define CMD_DEBUG_SET_MASK		0x34</div><div class='add'>+#define CMD_DEBUG_SET_SELECT		0x36</div><div class='add'>+</div><div class='add'>+#define CMD_GRTC_READ_LO		0x42</div><div class='add'>+#define CMD_GRTC_READ_HI		0x43</div><div class='add'>+</div><div class='add'>+#define CMD_IDU_ENABLE			0x71</div><div class='add'>+#define CMD_IDU_DISABLE			0x72</div><div class='add'>+#define CMD_IDU_SET_MODE		0x74</div><div class='add'>+#define CMD_IDU_SET_DEST		0x76</div><div class='add'>+#define CMD_IDU_SET_MASK		0x7C</div><div class='add'>+</div><div class='add'>+#define IDU_M_TRIG_LEVEL		0x0</div><div class='add'>+#define IDU_M_TRIG_EDGE			0x1</div><div class='add'>+</div><div class='add'>+#define IDU_M_DISTRI_RR			0x0</div><div class='add'>+#define IDU_M_DISTRI_DEST		0x2</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MCIP programming model</div><div class='add'>+ *</div><div class='add'>+ * - Simple commands write {cmd:8,param:16} to MCIP_CMD aux reg</div><div class='add'>+ *   (param could be irq, common_irq, core_id ...)</div><div class='add'>+ * - More involved commands setup MCIP_WDATA with cmd specific data</div><div class='add'>+ *   before invoking the simple command</div><div class='add'>+ */</div><div class='add'>+static inline void __mcip_cmd(unsigned int cmd, unsigned int param)</div><div class='add'>+{</div><div class='add'>+	struct mcip_cmd buf;</div><div class='add'>+</div><div class='add'>+	buf.pad = 0;</div><div class='add'>+	buf.cmd = cmd;</div><div class='add'>+	buf.param = param;</div><div class='add'>+</div><div class='add'>+	WRITE_AUX(ARC_REG_MCIP_CMD, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Setup additional data for a cmd</div><div class='add'>+ * Callers need to lock to ensure atomicity</div><div class='add'>+ */</div><div class='add'>+static inline void __mcip_cmd_data(unsigned int cmd, unsigned int param,</div><div class='add'>+				   unsigned int data)</div><div class='add'>+{</div><div class='add'>+	write_aux_reg(ARC_REG_MCIP_WDATA, data);</div><div class='add'>+</div><div class='add'>+	__mcip_cmd(cmd, param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern void mcip_init_early_smp(void);</div><div class='add'>+extern void mcip_init_smp(unsigned int cpu);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h<br/>index 8c84ae98c337..0f9c3eb5327e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/mmu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/mmu.h</a></div><div class='hunk'>@@ -15,24 +15,41 @@</div><div class='ctx'> #define CONFIG_ARC_MMU_VER 2</div><div class='ctx'> #elif defined(CONFIG_ARC_MMU_V3)</div><div class='ctx'> #define CONFIG_ARC_MMU_VER 3</div><div class='add'>+#elif defined(CONFIG_ARC_MMU_V4)</div><div class='add'>+#define CONFIG_ARC_MMU_VER 4</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* MMU Management regs */</div><div class='ctx'> #define ARC_REG_MMU_BCR		0x06f</div><div class='add'>+#if (CONFIG_ARC_MMU_VER &lt; 4)</div><div class='ctx'> #define ARC_REG_TLBPD0		0x405</div><div class='ctx'> #define ARC_REG_TLBPD1		0x406</div><div class='ctx'> #define ARC_REG_TLBINDEX	0x407</div><div class='ctx'> #define ARC_REG_TLBCOMMAND	0x408</div><div class='ctx'> #define ARC_REG_PID		0x409</div><div class='ctx'> #define ARC_REG_SCRATCH_DATA0	0x418</div><div class='add'>+#else</div><div class='add'>+#define ARC_REG_TLBPD0		0x460</div><div class='add'>+#define ARC_REG_TLBPD1		0x461</div><div class='add'>+#define ARC_REG_TLBINDEX	0x464</div><div class='add'>+#define ARC_REG_TLBCOMMAND	0x465</div><div class='add'>+#define ARC_REG_PID		0x468</div><div class='add'>+#define ARC_REG_SCRATCH_DATA0	0x46c</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* Bits in MMU PID register */</div><div class='del'>-#define MMU_ENABLE		(1 &lt;&lt; 31)	/* Enable MMU for process */</div><div class='add'>+#define __TLB_ENABLE		(1 &lt;&lt; 31)</div><div class='add'>+#define __PROG_ENABLE		(1 &lt;&lt; 30)</div><div class='add'>+#define MMU_ENABLE		(__TLB_ENABLE | __PROG_ENABLE)</div><div class='ctx'> </div><div class='ctx'> /* Error code if probe fails */</div><div class='ctx'> #define TLB_LKUP_ERR		0x80000000</div><div class='ctx'> </div><div class='add'>+#if (CONFIG_ARC_MMU_VER &lt; 4)</div><div class='ctx'> #define TLB_DUP_ERR	(TLB_LKUP_ERR | 0x00000001)</div><div class='add'>+#else</div><div class='add'>+#define TLB_DUP_ERR	(TLB_LKUP_ERR | 0x40000000)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* TLB Commands */</div><div class='ctx'> #define TLBWrite    0x1</div><div class='hunk'>@@ -45,6 +62,11 @@</div><div class='ctx'> #define TLBIVUTLB   0x6		/* explicitly inv uTLBs */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if (CONFIG_ARC_MMU_VER &gt;= 4)</div><div class='add'>+#define TLBInsertEntry	0x7</div><div class='add'>+#define TLBDeleteEntry	0x8</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='head'>diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h<br/>index 9615fe1701c6..1281718802f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -72,8 +72,18 @@</div><div class='ctx'> #define _PAGE_READ          (1&lt;&lt;3)	/* Page has user read perm (H) */</div><div class='ctx'> #define _PAGE_ACCESSED      (1&lt;&lt;4)	/* Page is accessed (S) */</div><div class='ctx'> #define _PAGE_MODIFIED      (1&lt;&lt;5)	/* Page modified (dirty) (S) */</div><div class='add'>+</div><div class='add'>+#if (CONFIG_ARC_MMU_VER &gt;= 4)</div><div class='add'>+#define _PAGE_WTHRU         (1&lt;&lt;7)	/* Page cache mode write-thru (H) */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define _PAGE_GLOBAL        (1&lt;&lt;8)	/* Page is global (H) */</div><div class='ctx'> #define _PAGE_PRESENT       (1&lt;&lt;9)	/* TLB entry is valid (H) */</div><div class='add'>+</div><div class='add'>+#if (CONFIG_ARC_MMU_VER &gt;= 4)</div><div class='add'>+#define _PAGE_SZ            (1&lt;&lt;10)	/* Page Size indicator (H) */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define _PAGE_SHARED_CODE   (1&lt;&lt;11)	/* Shared Code page with cmn vaddr</div><div class='ctx'> 					   usable for shared TLB entries (H) */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h<br/>index 52312cb5dbe2..ee682d8e0213 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/processor.h</a></div><div class='hunk'>@@ -77,7 +77,7 @@ struct task_struct;</div><div class='ctx'>  */</div><div class='ctx'> #define TSK_K_ESP(tsk)		(tsk-&gt;thread.ksp)</div><div class='ctx'> </div><div class='del'>-#define TSK_K_REG(tsk, off)	(*((unsigned int *)(TSK_K_ESP(tsk) + \</div><div class='add'>+#define TSK_K_REG(tsk, off)	(*((unsigned long *)(TSK_K_ESP(tsk) + \</div><div class='ctx'> 					sizeof(struct callee_regs) + off)))</div><div class='ctx'> </div><div class='ctx'> #define TSK_K_BLINK(tsk)	TSK_K_REG(tsk, 4)</div><div class='hunk'>@@ -100,29 +100,26 @@ extern unsigned int get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-/* Kernels Virtual memory area.</div><div class='del'>- * Unlike other architectures(MIPS, sh, cris ) ARC 700 does not have a</div><div class='del'>- * "kernel translated" region (like KSEG2 in MIPS). So we use a upper part</div><div class='del'>- * of the translated bottom 2GB for kernel virtual memory and protect</div><div class='del'>- * these pages from user accesses by disabling Ru, Eu and Wu.</div><div class='add'>+/*</div><div class='add'>+ * System Memory Map on ARC</div><div class='add'>+ *</div><div class='add'>+ * ---------------------------- (lower 2G, Translated) -------------------------</div><div class='add'>+ * 0x0000_0000		0x5FFF_FFFF	(user vaddr: TASK_SIZE)</div><div class='add'>+ * 0x6000_0000		0x6FFF_FFFF	(reserved gutter between U/K)</div><div class='add'>+ * 0x7000_0000		0x7FFF_FFFF	(kvaddr: vmalloc/modules/pkmap..)</div><div class='add'>+ *</div><div class='add'>+ * PAGE_OFFSET ---------------- (Upper 2G, Untranslated) -----------------------</div><div class='add'>+ * 0x8000_0000		0xBFFF_FFFF	(kernel direct mapped)</div><div class='add'>+ * 0xC000_0000		0xFFFF_FFFF	(peripheral uncached space)</div><div class='add'>+ * -----------------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='del'>-#define VMALLOC_SIZE	(0x10000000)	/* 256M */</div><div class='del'>-#define VMALLOC_START	(PAGE_OFFSET - VMALLOC_SIZE)</div><div class='del'>-#define VMALLOC_END	(PAGE_OFFSET)</div><div class='add'>+#define VMALLOC_START	0x70000000</div><div class='add'>+#define VMALLOC_SIZE	(PAGE_OFFSET - VMALLOC_START)</div><div class='add'>+#define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)</div><div class='ctx'> </div><div class='del'>-/* Most of the architectures seem to be keeping some kind of padding between</div><div class='del'>- * userspace TASK_SIZE and PAGE_OFFSET. i.e TASK_SIZE != PAGE_OFFSET.</div><div class='del'>- */</div><div class='ctx'> #define USER_KERNEL_GUTTER    0x10000000</div><div class='ctx'> </div><div class='del'>-/* User address space:</div><div class='del'>- * On ARC700, CPU allows the entire lower half of 32 bit address space to be</div><div class='del'>- * translated. Thus potentially 2G (0:0x7FFF_FFFF) could be User vaddr space.</div><div class='del'>- * However we steal 256M for kernel addr (0x7000_0000:0x7FFF_FFFF) and another</div><div class='del'>- * 256M (0x6000_0000:0x6FFF_FFFF) is gutter between user/kernel spaces</div><div class='del'>- * Thus total User vaddr space is (0:0x5FFF_FFFF)</div><div class='del'>- */</div><div class='del'>-#define TASK_SIZE	(PAGE_OFFSET - VMALLOC_SIZE - USER_KERNEL_GUTTER)</div><div class='add'>+#define TASK_SIZE	(VMALLOC_START - USER_KERNEL_GUTTER)</div><div class='ctx'> </div><div class='ctx'> #define STACK_TOP       TASK_SIZE</div><div class='ctx'> #define STACK_TOP_MAX   STACK_TOP</div><div class='head'>diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h<br/>index 1bfeec2c0558..91694ec1ce95 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/ptrace.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> /* THE pt_regs: Defines how regs are saved during entry into kernel */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> struct pt_regs {</div><div class='ctx'> </div><div class='ctx'> 	/* Real registers */</div><div class='hunk'>@@ -56,6 +57,48 @@ struct pt_regs {</div><div class='ctx'> </div><div class='ctx'> 	long user_r25;</div><div class='ctx'> };</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+struct pt_regs {</div><div class='add'>+</div><div class='add'>+	long orig_r0;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+			unsigned long state:8, ecr_vec:8,</div><div class='add'>+				      ecr_cause:8, ecr_param:8;</div><div class='add'>+#else</div><div class='add'>+			unsigned long ecr_param:8, ecr_cause:8,</div><div class='add'>+				      ecr_vec:8, state:8;</div><div class='add'>+#endif</div><div class='add'>+		};</div><div class='add'>+		unsigned long event;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	long bta;	/* bta_l1, bta_l2, erbta */</div><div class='add'>+</div><div class='add'>+	long user_r25;</div><div class='add'>+</div><div class='add'>+	long r26;	/* gp */</div><div class='add'>+	long fp;</div><div class='add'>+	long sp;	/* user/kernel sp depending on where we came from  */</div><div class='add'>+</div><div class='add'>+	long r12;</div><div class='add'>+</div><div class='add'>+	/*------- Below list auto saved by h/w -----------*/</div><div class='add'>+	long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;</div><div class='add'>+</div><div class='add'>+	long blink;</div><div class='add'>+	long lp_end, lp_start, lp_count;</div><div class='add'>+</div><div class='add'>+	long ei, ldi, jli;</div><div class='add'>+</div><div class='add'>+	long ret;</div><div class='add'>+	long status32;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* Callee saved registers - need to be saved only when you are scheduled out */</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +106,7 @@ struct callee_regs {</div><div class='ctx'> 	long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define instruction_pointer(regs)	((regs)-&gt;ret)</div><div class='add'>+#define instruction_pointer(regs)	(unsigned long)((regs)-&gt;ret)</div><div class='ctx'> #define profile_pc(regs)		instruction_pointer(regs)</div><div class='ctx'> </div><div class='ctx'> /* return 1 if user mode or 0 if kernel mode */</div><div class='head'>diff --git a/arch/arc/include/asm/spinlock.h b/arch/arc/include/asm/spinlock.h<br/>index b6a8c2dfbe6e..e1651df6a93d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/spinlock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/spinlock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/spinlock.h</a></div><div class='hunk'>@@ -22,24 +22,46 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This smp_mb() is technically superfluous, we only need the one</div><div class='add'>+	 * after the lock for providing the ACQUIRE semantics.</div><div class='add'>+	 * However doing the "right" thing was regressing hackbench</div><div class='add'>+	 * so keeping this, pending further investigation</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"1:	ex  %0, [%1]		\n"</div><div class='ctx'> 	"	breq  %0, %2, 1b	\n"</div><div class='ctx'> 	: "+&amp;r" (tmp)</div><div class='ctx'> 	: "r"(&amp;(lock-&gt;slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)</div><div class='ctx'> 	: "memory");</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ACQUIRE barrier to ensure load/store after taking the lock</div><div class='add'>+	 * don't "bleed-up" out of the critical section (leak-in is allowed)</div><div class='add'>+	 * http://www.spinics.net/lists/kernel/msg2010409.html</div><div class='add'>+	 *</div><div class='add'>+	 * ARCv2 only has load-load, store-store and all-all barrier</div><div class='add'>+	 * thus need the full all-all barrier</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int arch_spin_trylock(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;</div><div class='ctx'> </div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"1:	ex  %0, [%1]		\n"</div><div class='ctx'> 	: "+r" (tmp)</div><div class='ctx'> 	: "r"(&amp;(lock-&gt;slock))</div><div class='ctx'> 	: "memory");</div><div class='ctx'> </div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	return (tmp == __ARCH_SPIN_LOCK_UNLOCKED__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -47,12 +69,22 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * RELEASE barrier: given the instructions avail on ARCv2, full barrier</div><div class='add'>+	 * is the only option</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"	ex  %0, [%1]		\n"</div><div class='ctx'> 	: "+r" (tmp)</div><div class='ctx'> 	: "r"(&amp;(lock-&gt;slock))</div><div class='ctx'> 	: "memory");</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * superfluous, but keeping for now - see pairing version in</div><div class='add'>+	 * arch_spin_lock above</div><div class='add'>+	 */</div><div class='ctx'> 	smp_mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h<br/>index aca0d5a45c7b..3af67455659a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/thread_info.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define THREAD_SIZE     (PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='add'>+#define THREAD_SHIFT	(PAGE_SHIFT &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h<br/>index 30c9baffa96f..d1da6032b715 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -659,31 +659,30 @@ static inline unsigned long __arc_clear_user(void __user *to, unsigned long n)</div><div class='ctx'> static inline long</div><div class='ctx'> __arc_strncpy_from_user(char *dst, const char __user *src, long count)</div><div class='ctx'> {</div><div class='del'>-	long res = count;</div><div class='add'>+	long res = 0;</div><div class='ctx'> 	char val;</div><div class='del'>-	unsigned int hw_count;</div><div class='ctx'> </div><div class='ctx'> 	if (count == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	__asm__ __volatile__(</div><div class='del'>-	"	lp 2f		\n"</div><div class='add'>+	"	lp	3f			\n"</div><div class='ctx'> 	"1:	ldb.ab  %3, [%2, 1]		\n"</div><div class='del'>-	"	breq.d  %3, 0, 2f		\n"</div><div class='add'>+	"	breq.d	%3, 0, 3f               \n"</div><div class='ctx'> 	"	stb.ab  %3, [%1, 1]		\n"</div><div class='del'>-	"2:	sub %0, %6, %4			\n"</div><div class='del'>-	"3:	;nop				\n"</div><div class='add'>+	"	add	%0, %0, 1	# Num of NON NULL bytes copied	\n"</div><div class='add'>+	"3:								\n"</div><div class='ctx'> 	"	.section .fixup, \"ax\"		\n"</div><div class='ctx'> 	"	.align 4			\n"</div><div class='del'>-	"4:	mov %0, %5			\n"</div><div class='add'>+	"4:	mov %0, %4		# sets @res as -EFAULT	\n"</div><div class='ctx'> 	"	j   3b				\n"</div><div class='ctx'> 	"	.previous			\n"</div><div class='ctx'> 	"	.section __ex_table, \"a\"	\n"</div><div class='ctx'> 	"	.align 4			\n"</div><div class='ctx'> 	"	.word   1b, 4b			\n"</div><div class='ctx'> 	"	.previous			\n"</div><div class='del'>-	: "=r"(res), "+r"(dst), "+r"(src), "=&amp;r"(val), "=l"(hw_count)</div><div class='del'>-	: "g"(-EFAULT), "ir"(count), "4"(count)	/* this "4" seeds lp_count */</div><div class='add'>+	: "+r"(res), "+r"(dst), "+r"(src), "=r"(val)</div><div class='add'>+	: "g"(-EFAULT), "l"(count)</div><div class='ctx'> 	: "memory");</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='head'>diff --git a/arch/arc/include/uapi/asm/page.h b/arch/arc/include/uapi/asm/page.h<br/>index e5d41e08240c..9d129a2a1351 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/include/uapi/asm/page.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/include/uapi/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/include/uapi/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/include/uapi/asm/page.h</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> #define PAGE_OFFSET	(0x80000000)</div><div class='ctx'> #else</div><div class='ctx'> #define PAGE_SIZE	(1UL &lt;&lt; PAGE_SHIFT)	/* Default 8K */</div><div class='del'>-#define PAGE_OFFSET	(0x80000000UL)	/* Kernel starts at 2G onwards */</div><div class='add'>+#define PAGE_OFFSET	(0x80000000UL)		/* Kernel starts at 2G onwards */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='head'>diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile<br/>index 113f2033da9f..e7f3625a19b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/Makefile</a></div><div class='hunk'>@@ -8,12 +8,14 @@</div><div class='ctx'> # Pass UTS_MACHINE for user_regset definition</div><div class='ctx'> CFLAGS_ptrace.o		+= -DUTS_MACHINE='"$(UTS_MACHINE)"'</div><div class='ctx'> </div><div class='del'>-obj-y	:= arcksyms.o setup.o irq.o time.o reset.o ptrace.o entry.o process.o</div><div class='add'>+obj-y	:= arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o</div><div class='ctx'> obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o clk.o</div><div class='del'>-obj-y	+= devtree.o</div><div class='add'>+obj-$(CONFIG_ISA_ARCOMPACT)		+= entry-compact.o intc-compact.o</div><div class='add'>+obj-$(CONFIG_ISA_ARCV2)			+= entry-arcv2.o intc-arcv2.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MODULES)			+= arcksyms.o module.o</div><div class='ctx'> obj-$(CONFIG_SMP) 			+= smp.o</div><div class='add'>+obj-$(CONFIG_ARC_MCIP)			+= mcip.o</div><div class='ctx'> obj-$(CONFIG_ARC_DW2_UNWIND)		+= unwind.o</div><div class='ctx'> obj-$(CONFIG_KPROBES)      		+= kprobes.o</div><div class='ctx'> obj-$(CONFIG_ARC_EMUL_UNALIGNED) 	+= unaligned.o</div><div class='head'>diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c<br/>index 6c3aa0edb9b5..ecaf34e9235c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/asm-offsets.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -37,6 +37,8 @@ int main(void)</div><div class='ctx'> </div><div class='ctx'> 	DEFINE(TASK_ACT_MM, offsetof(struct task_struct, active_mm));</div><div class='ctx'> 	DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));</div><div class='add'>+	DEFINE(TASK_PID, offsetof(struct task_struct, pid));</div><div class='add'>+	DEFINE(TASK_COMM, offsetof(struct task_struct, comm));</div><div class='ctx'> </div><div class='ctx'> 	DEFINE(MM_CTXT, offsetof(struct mm_struct, context));</div><div class='ctx'> 	DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));</div><div class='hunk'>@@ -56,8 +58,11 @@ int main(void)</div><div class='ctx'> 	DEFINE(PT_r5, offsetof(struct pt_regs, r5));</div><div class='ctx'> 	DEFINE(PT_r6, offsetof(struct pt_regs, r6));</div><div class='ctx'> 	DEFINE(PT_r7, offsetof(struct pt_regs, r7));</div><div class='add'>+	DEFINE(PT_ret, offsetof(struct pt_regs, ret));</div><div class='ctx'> </div><div class='ctx'> 	DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));</div><div class='ctx'> 	DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));</div><div class='add'>+	DEFINE(PT_user_r25, offsetof(struct pt_regs, user_r25));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c<br/>index e32b54abff51..7e844fd8213f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/devtree.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/devtree.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/devtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/devtree.c</a></div><div class='hunk'>@@ -32,6 +32,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)</div><div class='ctx'> </div><div class='ctx'> 	if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))</div><div class='ctx'> 		arc_base_baud = core_clk/3;</div><div class='add'>+	else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))</div><div class='add'>+		arc_base_baud = 33333333;	/* Fixed 33MHz clk (AXS10x) */</div><div class='ctx'> 	else</div><div class='ctx'> 		arc_base_baud = core_clk;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S<br/>new file mode 100644<br/>index 000000000000..bd7105d3172f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/entry-arcv2.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry-arcv2.S</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+/*</div><div class='add'>+ * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;   /* ARC_{EXTRY,EXIT} */</div><div class='add'>+#include &lt;asm/entry.h&gt;       /* SAVE_ALL_{INT1,INT2,TRAP...} */</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/arcregs.h&gt;</div><div class='add'>+#include &lt;asm/irqflags.h&gt;</div><div class='add'>+</div><div class='add'>+	.cpu HS</div><div class='add'>+</div><div class='add'>+#define VECTOR	.word</div><div class='add'>+</div><div class='add'>+;############################ Vector Table #################################</div><div class='add'>+</div><div class='add'>+	.section .vector,"a",@progbits</div><div class='add'>+	.align 4</div><div class='add'>+</div><div class='add'>+# Initial 16 slots are Exception Vectors</div><div class='add'>+VECTOR	stext			; Restart Vector (jump to entry point)</div><div class='add'>+VECTOR	mem_service		; Mem exception</div><div class='add'>+VECTOR	instr_service		; Instrn Error</div><div class='add'>+VECTOR	EV_MachineCheck		; Fatal Machine check</div><div class='add'>+VECTOR	EV_TLBMissI		; Intruction TLB miss</div><div class='add'>+VECTOR	EV_TLBMissD		; Data TLB miss</div><div class='add'>+VECTOR	EV_TLBProtV		; Protection Violation</div><div class='add'>+VECTOR	EV_PrivilegeV		; Privilege Violation</div><div class='add'>+VECTOR	EV_SWI			; Software Breakpoint</div><div class='add'>+VECTOR	EV_Trap			; Trap exception</div><div class='add'>+VECTOR	EV_Extension		; Extn Instruction Exception</div><div class='add'>+VECTOR	EV_DivZero		; Divide by Zero</div><div class='add'>+VECTOR	EV_DCError		; Data Cache Error</div><div class='add'>+VECTOR	EV_Misaligned		; Misaligned Data Access</div><div class='add'>+VECTOR	reserved		; Reserved slots</div><div class='add'>+VECTOR	reserved		; Reserved slots</div><div class='add'>+</div><div class='add'>+# Begin Interrupt Vectors</div><div class='add'>+VECTOR	handle_interrupt	; (16) Timer0</div><div class='add'>+VECTOR	handle_interrupt	; unused (Timer1)</div><div class='add'>+VECTOR	handle_interrupt	; unused (WDT)</div><div class='add'>+VECTOR	handle_interrupt	; (19) ICI (inter core interrupt)</div><div class='add'>+VECTOR	handle_interrupt</div><div class='add'>+VECTOR	handle_interrupt</div><div class='add'>+VECTOR	handle_interrupt</div><div class='add'>+VECTOR	handle_interrupt	; (23) End of fixed IRQs</div><div class='add'>+</div><div class='add'>+.rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8</div><div class='add'>+	VECTOR	handle_interrupt</div><div class='add'>+.endr</div><div class='add'>+</div><div class='add'>+	.section .text, "ax",@progbits</div><div class='add'>+</div><div class='add'>+res_service:		; processor restart</div><div class='add'>+	flag    0x1     ; not implemented</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+</div><div class='add'>+reserved:		; processor restart</div><div class='add'>+	rtie            ; jump to processor initializations</div><div class='add'>+</div><div class='add'>+;##################### Interrupt Handling ##############################</div><div class='add'>+</div><div class='add'>+ENTRY(handle_interrupt)</div><div class='add'>+</div><div class='add'>+	INTERRUPT_PROLOGUE  irq</div><div class='add'>+</div><div class='add'>+	clri		; To make status32.IE agree with CPU internal state</div><div class='add'>+</div><div class='add'>+	lr  r0, [ICAUSE]</div><div class='add'>+</div><div class='add'>+	mov   blink, ret_from_exception</div><div class='add'>+</div><div class='add'>+	b.d  arch_do_IRQ</div><div class='add'>+	mov r1, sp</div><div class='add'>+</div><div class='add'>+END(handle_interrupt)</div><div class='add'>+</div><div class='add'>+;################### Non TLB Exception Handling #############################</div><div class='add'>+</div><div class='add'>+ENTRY(EV_SWI)</div><div class='add'>+	flag 1</div><div class='add'>+END(EV_SWI)</div><div class='add'>+</div><div class='add'>+ENTRY(EV_DivZero)</div><div class='add'>+	flag 1</div><div class='add'>+END(EV_DivZero)</div><div class='add'>+</div><div class='add'>+ENTRY(EV_DCError)</div><div class='add'>+	flag 1</div><div class='add'>+END(EV_DCError)</div><div class='add'>+</div><div class='add'>+ENTRY(EV_Misaligned)</div><div class='add'>+</div><div class='add'>+	EXCEPTION_PROLOGUE</div><div class='add'>+</div><div class='add'>+	lr  r0, [efa]	; Faulting Data address</div><div class='add'>+	mov r1, sp</div><div class='add'>+</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='add'>+</div><div class='add'>+	SAVE_CALLEE_SAVED_USER</div><div class='add'>+	mov r2, sp              ; callee_regs</div><div class='add'>+</div><div class='add'>+	bl  do_misaligned_access</div><div class='add'>+</div><div class='add'>+	; TBD: optimize - do this only if a callee reg was involved</div><div class='add'>+	; either a dst of emulated LD/ST or src with address-writeback</div><div class='add'>+	RESTORE_CALLEE_SAVED_USER</div><div class='add'>+</div><div class='add'>+	b   ret_from_exception</div><div class='add'>+END(EV_Misaligned)</div><div class='add'>+</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+; Protection Violation Exception Handler</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+</div><div class='add'>+ENTRY(EV_TLBProtV)</div><div class='add'>+</div><div class='add'>+	EXCEPTION_PROLOGUE</div><div class='add'>+</div><div class='add'>+	lr  r0, [efa]	; Faulting Data address</div><div class='add'>+	mov r1, sp	; pt_regs</div><div class='add'>+</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='add'>+</div><div class='add'>+	mov blink, ret_from_exception</div><div class='add'>+	b   do_page_fault</div><div class='add'>+</div><div class='add'>+END(EV_TLBProtV)</div><div class='add'>+</div><div class='add'>+; From Linux standpoint Slow Path I/D TLB Miss is same a ProtV as they</div><div class='add'>+; need to call do_page_fault().</div><div class='add'>+; ECR in pt_regs provides whether access was R/W/X</div><div class='add'>+</div><div class='add'>+.global        call_do_page_fault</div><div class='add'>+.set call_do_page_fault, EV_TLBProtV</div><div class='add'>+</div><div class='add'>+;############# Common Handlers for ARCompact and ARCv2 ##############</div><div class='add'>+</div><div class='add'>+#include "entry.S"</div><div class='add'>+</div><div class='add'>+;############# Return from Intr/Excp/Trap (ARCv2 ISA Specifics) ##############</div><div class='add'>+;</div><div class='add'>+; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)</div><div class='add'>+; IRQ shd definitely not happen between now and rtie</div><div class='add'>+; All 2 entry points to here already disable interrupts</div><div class='add'>+</div><div class='add'>+.Lrestore_regs:</div><div class='add'>+</div><div class='add'>+	ld	r0, [sp, PT_status32]	; U/K mode at time of entry</div><div class='add'>+	lr	r10, [AUX_IRQ_ACT]</div><div class='add'>+</div><div class='add'>+	bmsk	r11, r10, 15	; AUX_IRQ_ACT.ACTIVE</div><div class='add'>+	breq	r11, 0, .Lexcept_ret	; No intr active, ret from Exception</div><div class='add'>+</div><div class='add'>+;####### Return from Intr #######</div><div class='add'>+</div><div class='add'>+debug_marker_l1:</div><div class='add'>+	bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot</div><div class='add'>+</div><div class='add'>+.Lisr_ret_fast_path:</div><div class='add'>+	; Handle special case #1: (Entry via Exception, Return via IRQ)</div><div class='add'>+	;</div><div class='add'>+	; Exception in U mode, preempted in kernel, Intr taken (K mode), orig</div><div class='add'>+	; task now returning to U mode (riding the Intr)</div><div class='add'>+	; AUX_IRQ_ACTIVE won't have U bit set (since intr in K mode), hence SP</div><div class='add'>+	; won't be switched to correct U mode value (from AUX_SP)</div><div class='add'>+	; So force AUX_IRQ_ACT.U for such a case</div><div class='add'>+</div><div class='add'>+	btst	r0, STATUS_U_BIT		; Z flag set if K (Z clear for U)</div><div class='add'>+	bset.nz	r11, r11, AUX_IRQ_ACT_BIT_U	; NZ means U</div><div class='add'>+	sr	r11, [AUX_IRQ_ACT]</div><div class='add'>+</div><div class='add'>+	INTERRUPT_EPILOGUE  irq</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+;####### Return from Exception / pure kernel mode #######</div><div class='add'>+</div><div class='add'>+.Lexcept_ret:	; Expects r0 has PT_status32</div><div class='add'>+</div><div class='add'>+debug_marker_syscall:</div><div class='add'>+	EXCEPTION_EPILOGUE</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+;####### Return from Intr to insn in delay slot #######</div><div class='add'>+</div><div class='add'>+; Handle special case #2: (Entry via Exception in Delay Slot, Return via IRQ)</div><div class='add'>+;</div><div class='add'>+; Intr returning to a Delay Slot (DS) insn</div><div class='add'>+; (since IRQ NOT allowed in DS in ARCv2, this can only happen if orig</div><div class='add'>+; entry was via Exception in DS which got preempted in kernel).</div><div class='add'>+;</div><div class='add'>+; IRQ RTIE won't reliably restore DE bit and/or BTA, needs handling</div><div class='add'>+.Lintr_ret_to_delay_slot:</div><div class='add'>+debug_marker_ds:</div><div class='add'>+</div><div class='add'>+	ld	r2, [@intr_to_DE_cnt]</div><div class='add'>+	add	r2, r2, 1</div><div class='add'>+	st	r2, [@intr_to_DE_cnt]</div><div class='add'>+</div><div class='add'>+	ld	r2, [sp, PT_ret]</div><div class='add'>+	ld	r3, [sp, PT_status32]</div><div class='add'>+</div><div class='add'>+	bic  	r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK</div><div class='add'>+	st	r0, [sp, PT_status32]</div><div class='add'>+</div><div class='add'>+	mov	r1, .Lintr_ret_to_delay_slot_2</div><div class='add'>+	st	r1, [sp, PT_ret]</div><div class='add'>+</div><div class='add'>+	st	r2, [sp, 0]</div><div class='add'>+	st	r3, [sp, 4]</div><div class='add'>+</div><div class='add'>+	b	.Lisr_ret_fast_path</div><div class='add'>+</div><div class='add'>+.Lintr_ret_to_delay_slot_2:</div><div class='add'>+	sub	sp, sp, SZ_PT_REGS</div><div class='add'>+	st	r9, [sp, -4]</div><div class='add'>+</div><div class='add'>+	ld	r9, [sp, 0]</div><div class='add'>+	sr	r9, [eret]</div><div class='add'>+</div><div class='add'>+	ld	r9, [sp, 4]</div><div class='add'>+	sr	r9, [erstatus]</div><div class='add'>+</div><div class='add'>+	ld	r9, [sp, 8]</div><div class='add'>+	sr	r9, [erbta]</div><div class='add'>+</div><div class='add'>+	ld	r9, [sp, -4]</div><div class='add'>+	add	sp, sp, SZ_PT_REGS</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+END(ret_from_exception)</div><div class='head'>diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S<br/>new file mode 100644<br/>index 000000000000..15d457b4403a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/entry-compact.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry-compact.S</a></div><div class='hunk'>@@ -0,0 +1,393 @@</div><div class='add'>+/*</div><div class='add'>+ * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARCompact ISA</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * vineetg: May 2011</div><div class='add'>+ *  -Userspace unaligned access emulation</div><div class='add'>+ *</div><div class='add'>+ * vineetg: Feb 2011 (ptrace low level code fixes)</div><div class='add'>+ *  -traced syscall return code (r0) was not saved into pt_regs for restoring</div><div class='add'>+ *   into user reg-file when traded task rets to user space.</div><div class='add'>+ *  -syscalls needing arch-wrappers (mainly for passing sp as pt_regs)</div><div class='add'>+ *   were not invoking post-syscall trace hook (jumping directly into</div><div class='add'>+ *   ret_from_system_call)</div><div class='add'>+ *</div><div class='add'>+ * vineetg: Nov 2010:</div><div class='add'>+ *  -Vector table jumps (@8 bytes) converted into branches (@4 bytes)</div><div class='add'>+ *  -To maintain the slot size of 8 bytes/vector, added nop, which is</div><div class='add'>+ *   not executed at runtime.</div><div class='add'>+ *</div><div class='add'>+ * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)</div><div class='add'>+ *  -do_signal()invoked upon TIF_RESTORE_SIGMASK as well</div><div class='add'>+ *  -Wrappers for sys_{,rt_}sigsuspend() nolonger needed as they don't</div><div class='add'>+ *   need ptregs anymore</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: Oct 2009</div><div class='add'>+ *  -In a rare scenario, Process gets a Priv-V exception and gets scheduled</div><div class='add'>+ *   out. Since we don't do FAKE RTIE for Priv-V, CPU excpetion state remains</div><div class='add'>+ *   active (AE bit enabled).  This causes a double fault for a subseq valid</div><div class='add'>+ *   exception. Thus FAKE RTIE needed in low level Priv-Violation handler.</div><div class='add'>+ *   Instr Error could also cause similar scenario, so same there as well.</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: March 2009 (Supporting 2 levels of Interrupts)</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: Aug 28th 2008: Bug #94984</div><div class='add'>+ *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap</div><div class='add'>+ *   Normally CPU does this automatically, however when doing FAKE rtie,</div><div class='add'>+ *   we need to explicitly do this. The problem in macros</div><div class='add'>+ *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit</div><div class='add'>+ *   was being "CLEARED" rather then "SET". Since it is Loop INHIBIT Bit,</div><div class='add'>+ *   setting it and not clearing it clears ZOL context</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: May 16th, 2008</div><div class='add'>+ *  - r25 now contains the Current Task when in kernel</div><div class='add'>+ *</div><div class='add'>+ * Vineetg: Dec 22, 2007</div><div class='add'>+ *    Minor Surgery of Low Level ISR to make it SMP safe</div><div class='add'>+ *    - MMU_SCRATCH0 Reg used for freeing up r9 in Level 1 ISR</div><div class='add'>+ *    - _current_task is made an array of NR_CPUS</div><div class='add'>+ *    - Access of _current_task wrapped inside a macro so that if hardware</div><div class='add'>+ *       team agrees for a dedicated reg, no other code is touched</div><div class='add'>+ *</div><div class='add'>+ * Amit Bhor, Rahul Trivedi, Kanika Nema, Sameer Dhavale : Codito Tech 2004</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;	/* {EXTRY,EXIT} */</div><div class='add'>+#include &lt;asm/entry.h&gt;</div><div class='add'>+#include &lt;asm/irqflags.h&gt;</div><div class='add'>+</div><div class='add'>+	.cpu A7</div><div class='add'>+</div><div class='add'>+;############################ Vector Table #################################</div><div class='add'>+</div><div class='add'>+.macro VECTOR  lbl</div><div class='add'>+#if 1   /* Just in case, build breaks */</div><div class='add'>+	j   \lbl</div><div class='add'>+#else</div><div class='add'>+	b   \lbl</div><div class='add'>+	nop</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+	.section .vector, "ax",@progbits</div><div class='add'>+	.align 4</div><div class='add'>+</div><div class='add'>+/* Each entry in the vector table must occupy 2 words. Since it is a jump</div><div class='add'>+ * across sections (.vector to .text) we are gauranteed that 'j somewhere'</div><div class='add'>+ * will use the 'j limm' form of the intrsuction as long as somewhere is in</div><div class='add'>+ * a section other than .vector.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+; ********* Critical System Events **********************</div><div class='add'>+VECTOR   res_service             ; 0x0, Restart Vector  (0x0)</div><div class='add'>+VECTOR   mem_service             ; 0x8, Mem exception   (0x1)</div><div class='add'>+VECTOR   instr_service           ; 0x10, Instrn Error   (0x2)</div><div class='add'>+</div><div class='add'>+; ******************** Device ISRs **********************</div><div class='add'>+#ifdef CONFIG_ARC_IRQ3_LV2</div><div class='add'>+VECTOR   handle_interrupt_level2</div><div class='add'>+#else</div><div class='add'>+VECTOR   handle_interrupt_level1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+VECTOR   handle_interrupt_level1</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_IRQ5_LV2</div><div class='add'>+VECTOR   handle_interrupt_level2</div><div class='add'>+#else</div><div class='add'>+VECTOR   handle_interrupt_level1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_IRQ6_LV2</div><div class='add'>+VECTOR   handle_interrupt_level2</div><div class='add'>+#else</div><div class='add'>+VECTOR   handle_interrupt_level1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.rept   25</div><div class='add'>+VECTOR   handle_interrupt_level1 ; Other devices</div><div class='add'>+.endr</div><div class='add'>+</div><div class='add'>+/* FOR ARC600: timer = 0x3, uart = 0x8, emac = 0x10 */</div><div class='add'>+</div><div class='add'>+; ******************** Exceptions **********************</div><div class='add'>+VECTOR   EV_MachineCheck         ; 0x100, Fatal Machine check   (0x20)</div><div class='add'>+VECTOR   EV_TLBMissI             ; 0x108, Intruction TLB miss   (0x21)</div><div class='add'>+VECTOR   EV_TLBMissD             ; 0x110, Data TLB miss         (0x22)</div><div class='add'>+VECTOR   EV_TLBProtV             ; 0x118, Protection Violation  (0x23)</div><div class='add'>+				 ;         or Misaligned Access</div><div class='add'>+VECTOR   EV_PrivilegeV           ; 0x120, Privilege Violation   (0x24)</div><div class='add'>+VECTOR   EV_Trap                 ; 0x128, Trap exception        (0x25)</div><div class='add'>+VECTOR   EV_Extension            ; 0x130, Extn Intruction Excp  (0x26)</div><div class='add'>+</div><div class='add'>+.rept   24</div><div class='add'>+VECTOR   reserved                ; Reserved Exceptions</div><div class='add'>+.endr</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+;##################### Scratch Mem for IRQ stack switching #############</div><div class='add'>+</div><div class='add'>+ARCFP_DATA int1_saved_reg</div><div class='add'>+	.align 32</div><div class='add'>+	.type   int1_saved_reg, @object</div><div class='add'>+	.size   int1_saved_reg, 4</div><div class='add'>+int1_saved_reg:</div><div class='add'>+	.zero 4</div><div class='add'>+</div><div class='add'>+/* Each Interrupt level needs its own scratch */</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='add'>+</div><div class='add'>+ARCFP_DATA int2_saved_reg</div><div class='add'>+	.type   int2_saved_reg, @object</div><div class='add'>+	.size   int2_saved_reg, 4</div><div class='add'>+int2_saved_reg:</div><div class='add'>+	.zero 4</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+	.section .text, "ax",@progbits</div><div class='add'>+</div><div class='add'>+res_service:		; processor restart</div><div class='add'>+	flag    0x1     ; not implemented</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+</div><div class='add'>+reserved:		; processor restart</div><div class='add'>+	rtie            ; jump to processor initializations</div><div class='add'>+</div><div class='add'>+;##################### Interrupt Handling ##############################</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+;  Level 2 ISR: Can interrupt a Level 1 ISR</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+ENTRY(handle_interrupt_level2)</div><div class='add'>+</div><div class='add'>+	INTERRUPT_PROLOGUE 2</div><div class='add'>+</div><div class='add'>+	;------------------------------------------------------</div><div class='add'>+	; if L2 IRQ interrupted a L1 ISR, disable preemption</div><div class='add'>+	;------------------------------------------------------</div><div class='add'>+</div><div class='add'>+	ld r9, [sp, PT_status32]        ; get statu32_l2 (saved in pt_regs)</div><div class='add'>+	bbit0 r9, STATUS_A1_BIT, 1f     ; L1 not active when L2 IRQ, so normal</div><div class='add'>+</div><div class='add'>+	; A1 is set in status32_l2</div><div class='add'>+	; bump thread_info-&gt;preempt_count (Disable preemption)</div><div class='add'>+	GET_CURR_THR_INFO_FROM_SP   r10</div><div class='add'>+	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='add'>+	add     r9, r9, 1</div><div class='add'>+	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='add'>+</div><div class='add'>+1:</div><div class='add'>+	;------------------------------------------------------</div><div class='add'>+	; setup params for Linux common ISR and invoke it</div><div class='add'>+	;------------------------------------------------------</div><div class='add'>+	lr  r0, [icause2]</div><div class='add'>+	and r0, r0, 0x1f</div><div class='add'>+</div><div class='add'>+	bl.d  @arch_do_IRQ</div><div class='add'>+	mov r1, sp</div><div class='add'>+</div><div class='add'>+	mov r8,0x2</div><div class='add'>+	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg</div><div class='add'>+</div><div class='add'>+	b   ret_from_exception</div><div class='add'>+</div><div class='add'>+END(handle_interrupt_level2)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+;  Level 1 ISR</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+ENTRY(handle_interrupt_level1)</div><div class='add'>+</div><div class='add'>+	INTERRUPT_PROLOGUE 1</div><div class='add'>+</div><div class='add'>+	lr  r0, [icause1]</div><div class='add'>+	and r0, r0, 0x1f</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='add'>+	; icause1 needs to be read early, before calling tracing, which</div><div class='add'>+	; can clobber scratch regs, hence use of stack to stash it</div><div class='add'>+	push r0</div><div class='add'>+	TRACE_ASM_IRQ_DISABLE</div><div class='add'>+	pop  r0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	bl.d  @arch_do_IRQ</div><div class='add'>+	mov r1, sp</div><div class='add'>+</div><div class='add'>+	mov r8,0x1</div><div class='add'>+	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg</div><div class='add'>+</div><div class='add'>+	b   ret_from_exception</div><div class='add'>+END(handle_interrupt_level1)</div><div class='add'>+</div><div class='add'>+;################### Non TLB Exception Handling #############################</div><div class='add'>+</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+; Protection Violation Exception Handler</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+</div><div class='add'>+ENTRY(EV_TLBProtV)</div><div class='add'>+</div><div class='add'>+	EXCEPTION_PROLOGUE</div><div class='add'>+</div><div class='add'>+	lr  r2, [ecr]</div><div class='add'>+	lr  r0, [efa]	; Faulting Data address (not part of pt_regs saved above)</div><div class='add'>+</div><div class='add'>+	; Exception auto-disables further Intr/exceptions.</div><div class='add'>+	; Re-enable them by pretending to return from exception</div><div class='add'>+	; (so rest of handler executes in pure K mode)</div><div class='add'>+</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='add'>+</div><div class='add'>+	mov   r1, sp	; Handle to pt_regs</div><div class='add'>+</div><div class='add'>+	;------ (5) Type of Protection Violation? ----------</div><div class='add'>+	;</div><div class='add'>+	; ProtV Hardware Exception is triggered for Access Faults of 2 types</div><div class='add'>+	;   -Access Violaton	: 00_23_(00|01|02|03)_00</div><div class='add'>+	;			         x  r  w  r+w</div><div class='add'>+	;   -Unaligned Access	: 00_23_04_00</div><div class='add'>+	;</div><div class='add'>+	bbit1 r2, ECR_C_BIT_PROTV_MISALIG_DATA, 4f</div><div class='add'>+</div><div class='add'>+	;========= (6a) Access Violation Processing ========</div><div class='add'>+	bl  do_page_fault</div><div class='add'>+	b   ret_from_exception</div><div class='add'>+</div><div class='add'>+	;========== (6b) Non aligned access ============</div><div class='add'>+4:</div><div class='add'>+</div><div class='add'>+	SAVE_CALLEE_SAVED_USER</div><div class='add'>+	mov r2, sp              ; callee_regs</div><div class='add'>+</div><div class='add'>+	bl  do_misaligned_access</div><div class='add'>+</div><div class='add'>+	; TBD: optimize - do this only if a callee reg was involved</div><div class='add'>+	; either a dst of emulated LD/ST or src with address-writeback</div><div class='add'>+	RESTORE_CALLEE_SAVED_USER</div><div class='add'>+</div><div class='add'>+	b   ret_from_exception</div><div class='add'>+</div><div class='add'>+END(EV_TLBProtV)</div><div class='add'>+</div><div class='add'>+; Wrapper for Linux page fault handler called from EV_TLBMiss*</div><div class='add'>+; Very similar to ProtV handler case (6a) above, but avoids the extra checks</div><div class='add'>+; for Misaligned access</div><div class='add'>+;</div><div class='add'>+ENTRY(call_do_page_fault)</div><div class='add'>+</div><div class='add'>+	EXCEPTION_PROLOGUE</div><div class='add'>+	lr  r0, [efa]	; Faulting Data address</div><div class='add'>+	mov   r1, sp</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='add'>+</div><div class='add'>+	mov blink, ret_from_exception</div><div class='add'>+	b  do_page_fault</div><div class='add'>+</div><div class='add'>+END(call_do_page_fault)</div><div class='add'>+</div><div class='add'>+;############# Common Handlers for ARCompact and ARCv2 ##############</div><div class='add'>+</div><div class='add'>+#include "entry.S"</div><div class='add'>+</div><div class='add'>+;############# Return from Intr/Excp/Trap (ARC Specifics) ##############</div><div class='add'>+;</div><div class='add'>+; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)</div><div class='add'>+; IRQ shd definitely not happen between now and rtie</div><div class='add'>+; All 2 entry points to here already disable interrupts</div><div class='add'>+</div><div class='add'>+.Lrestore_regs:</div><div class='add'>+</div><div class='add'>+	TRACE_ASM_IRQ_ENABLE</div><div class='add'>+</div><div class='add'>+	lr	r10, [status32]</div><div class='add'>+</div><div class='add'>+	; Restore REG File. In case multiple Events outstanding,</div><div class='add'>+	; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None</div><div class='add'>+	; Note that we use realtime STATUS32 (not pt_regs-&gt;status32) to</div><div class='add'>+	; decide that.</div><div class='add'>+</div><div class='add'>+	; if Returning from Exception</div><div class='add'>+	btst   r10, STATUS_AE_BIT</div><div class='add'>+	bnz    .Lexcep_ret</div><div class='add'>+</div><div class='add'>+	; Not Exception so maybe Interrupts (Level 1 or 2)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='add'>+</div><div class='add'>+	; Level 2 interrupt return Path - from hardware standpoint</div><div class='add'>+	bbit0  r10, STATUS_A2_BIT, not_level2_interrupt</div><div class='add'>+</div><div class='add'>+	;------------------------------------------------------------------</div><div class='add'>+	; However the context returning might not have taken L2 intr itself</div><div class='add'>+	; e.g. Task'A' user-code -&gt; L2 intr -&gt; schedule -&gt; 'B' user-code ret</div><div class='add'>+	; Special considerations needed for the context which took L2 intr</div><div class='add'>+</div><div class='add'>+	ld   r9, [sp, PT_event]        ; Ensure this is L2 intr context</div><div class='add'>+	brne r9, event_IRQ2, 149f</div><div class='add'>+</div><div class='add'>+	;------------------------------------------------------------------</div><div class='add'>+	; if L2 IRQ interrupted an L1 ISR,  we'd disabled preemption earlier</div><div class='add'>+	; so that sched doesn't move to new task, causing L1 to be delayed</div><div class='add'>+	; undeterministically. Now that we've achieved that, let's reset</div><div class='add'>+	; things to what they were, before returning from L2 context</div><div class='add'>+	;----------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+	ld r9, [sp, PT_status32]       ; get statu32_l2 (saved in pt_regs)</div><div class='add'>+	bbit0 r9, STATUS_A1_BIT, 149f  ; L1 not active when L2 IRQ, so normal</div><div class='add'>+</div><div class='add'>+	; decrement thread_info-&gt;preempt_count (re-enable preemption)</div><div class='add'>+	GET_CURR_THR_INFO_FROM_SP   r10</div><div class='add'>+	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='add'>+</div><div class='add'>+	; paranoid check, given A1 was active when A2 happened, preempt count</div><div class='add'>+	; must not be 0 because we would have incremented it.</div><div class='add'>+	; If this does happen we simply HALT as it means a BUG !!!</div><div class='add'>+	cmp     r9, 0</div><div class='add'>+	bnz     2f</div><div class='add'>+	flag 1</div><div class='add'>+</div><div class='add'>+2:</div><div class='add'>+	sub     r9, r9, 1</div><div class='add'>+	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='add'>+</div><div class='add'>+149:</div><div class='add'>+	;return from level 2</div><div class='add'>+	INTERRUPT_EPILOGUE 2</div><div class='add'>+debug_marker_l2:</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+not_level2_interrupt:</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	bbit0  r10, STATUS_A1_BIT, .Lpure_k_mode_ret</div><div class='add'>+</div><div class='add'>+	;return from level 1</div><div class='add'>+	INTERRUPT_EPILOGUE 1</div><div class='add'>+debug_marker_l1:</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+.Lexcep_ret:</div><div class='add'>+.Lpure_k_mode_ret:</div><div class='add'>+</div><div class='add'>+	;this case is for syscalls or Exceptions or pure kernel mode</div><div class='add'>+</div><div class='add'>+	EXCEPTION_EPILOGUE</div><div class='add'>+debug_marker_syscall:</div><div class='add'>+	rtie</div><div class='add'>+</div><div class='add'>+END(ret_from_exception)</div><div class='head'>diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S<br/>index d868289c5a26..f7a82fd4d601 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/entry.S</a></div><div class='hunk'>@@ -1,60 +1,13 @@</div><div class='ctx'> /*</div><div class='del'>- * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARC</div><div class='add'>+ * Common Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARC</div><div class='add'>+ * (included from entry-&lt;isa&gt;.S</div><div class='ctx'>  *</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * vineetg: May 2011</div><div class='del'>- *  -Userspace unaligned access emulation</div><div class='del'>- *</div><div class='del'>- * vineetg: Feb 2011 (ptrace low level code fixes)</div><div class='del'>- *  -traced syscall return code (r0) was not saved into pt_regs for restoring</div><div class='del'>- *   into user reg-file when traded task rets to user space.</div><div class='del'>- *  -syscalls needing arch-wrappers (mainly for passing sp as pt_regs)</div><div class='del'>- *   were not invoking post-syscall trace hook (jumping directly into</div><div class='del'>- *   ret_from_system_call)</div><div class='del'>- *</div><div class='del'>- * vineetg: Nov 2010:</div><div class='del'>- *  -Vector table jumps (@8 bytes) converted into branches (@4 bytes)</div><div class='del'>- *  -To maintain the slot size of 8 bytes/vector, added nop, which is</div><div class='del'>- *   not executed at runtime.</div><div class='del'>- *</div><div class='del'>- * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)</div><div class='del'>- *  -do_signal()invoked upon TIF_RESTORE_SIGMASK as well</div><div class='del'>- *  -Wrappers for sys_{,rt_}sigsuspend() nolonger needed as they don't</div><div class='del'>- *   need ptregs anymore</div><div class='del'>- *</div><div class='del'>- * Vineetg: Oct 2009</div><div class='del'>- *  -In a rare scenario, Process gets a Priv-V exception and gets scheduled</div><div class='del'>- *   out. Since we don't do FAKE RTIE for Priv-V, CPU excpetion state remains</div><div class='del'>- *   active (AE bit enabled).  This causes a double fault for a subseq valid</div><div class='del'>- *   exception. Thus FAKE RTIE needed in low level Priv-Violation handler.</div><div class='del'>- *   Instr Error could also cause similar scenario, so same there as well.</div><div class='del'>- *</div><div class='del'>- * Vineetg: March 2009 (Supporting 2 levels of Interrupts)</div><div class='del'>- *</div><div class='del'>- * Vineetg: Aug 28th 2008: Bug #94984</div><div class='del'>- *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap</div><div class='del'>- *   Normally CPU does this automatically, however when doing FAKE rtie,</div><div class='del'>- *   we need to explicitly do this. The problem in macros</div><div class='del'>- *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit</div><div class='del'>- *   was being "CLEARED" rather then "SET". Since it is Loop INHIBIT Bit,</div><div class='del'>- *   setting it and not clearing it clears ZOL context</div><div class='del'>- *</div><div class='del'>- * Vineetg: May 16th, 2008</div><div class='del'>- *  - r25 now contains the Current Task when in kernel</div><div class='del'>- *</div><div class='del'>- * Vineetg: Dec 22, 2007</div><div class='del'>- *    Minor Surgery of Low Level ISR to make it SMP safe</div><div class='del'>- *    - MMU_SCRATCH0 Reg used for freeing up r9 in Level 1 ISR</div><div class='del'>- *    - _current_task is made an array of NR_CPUS</div><div class='del'>- *    - Access of _current_task wrapped inside a macro so that if hardware</div><div class='del'>- *       team agrees for a dedicated reg, no other code is touched</div><div class='del'>- *</div><div class='del'>- * Amit Bhor, Rahul Trivedi, Kanika Nema, Sameer Dhavale : Codito Tech 2004</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*------------------------------------------------------------------</div><div class='hunk'>@@ -67,206 +20,59 @@</div><div class='ctx'>  *  Global Pointer (gp)                 r26</div><div class='ctx'>  *  Frame Pointer (fp)                  r27</div><div class='ctx'>  *  Stack Pointer (sp)                  r28</div><div class='del'>- *  Interrupt link register (ilink1)    r29</div><div class='del'>- *  Interrupt link register (ilink2)    r30</div><div class='ctx'>  *  Branch link register (blink)        r31</div><div class='ctx'>  *------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	.cpu A7</div><div class='del'>-</div><div class='del'>-;############################ Vector Table #################################</div><div class='del'>-</div><div class='del'>-.macro VECTOR  lbl</div><div class='del'>-#if 1   /* Just in case, build breaks */</div><div class='del'>-	j   \lbl</div><div class='del'>-#else</div><div class='del'>-	b   \lbl</div><div class='del'>-	nop</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-	.section .vector, "ax",@progbits</div><div class='del'>-	.align 4</div><div class='del'>-</div><div class='del'>-/* Each entry in the vector table must occupy 2 words. Since it is a jump</div><div class='del'>- * across sections (.vector to .text) we are gauranteed that 'j somewhere'</div><div class='del'>- * will use the 'j limm' form of the intrsuction as long as somewhere is in</div><div class='del'>- * a section other than .vector.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-; ********* Critical System Events **********************</div><div class='del'>-VECTOR   res_service             ; 0x0, Restart Vector  (0x0)</div><div class='del'>-VECTOR   mem_service             ; 0x8, Mem exception   (0x1)</div><div class='del'>-VECTOR   instr_service           ; 0x10, Instrn Error   (0x2)</div><div class='del'>-</div><div class='del'>-; ******************** Device ISRs **********************</div><div class='del'>-#ifdef CONFIG_ARC_IRQ3_LV2</div><div class='del'>-VECTOR   handle_interrupt_level2</div><div class='del'>-#else</div><div class='del'>-VECTOR   handle_interrupt_level1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-VECTOR   handle_interrupt_level1</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_IRQ5_LV2</div><div class='del'>-VECTOR   handle_interrupt_level2</div><div class='del'>-#else</div><div class='del'>-VECTOR   handle_interrupt_level1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_IRQ6_LV2</div><div class='del'>-VECTOR   handle_interrupt_level2</div><div class='del'>-#else</div><div class='del'>-VECTOR   handle_interrupt_level1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.rept   25</div><div class='del'>-VECTOR   handle_interrupt_level1 ; Other devices</div><div class='del'>-.endr</div><div class='del'>-</div><div class='del'>-/* FOR ARC600: timer = 0x3, uart = 0x8, emac = 0x10 */</div><div class='del'>-</div><div class='del'>-; ******************** Exceptions **********************</div><div class='del'>-VECTOR   EV_MachineCheck         ; 0x100, Fatal Machine check   (0x20)</div><div class='del'>-VECTOR   EV_TLBMissI             ; 0x108, Intruction TLB miss   (0x21)</div><div class='del'>-VECTOR   EV_TLBMissD             ; 0x110, Data TLB miss         (0x22)</div><div class='del'>-VECTOR   EV_TLBProtV             ; 0x118, Protection Violation  (0x23)</div><div class='del'>-				 ;         or Misaligned Access</div><div class='del'>-VECTOR   EV_PrivilegeV           ; 0x120, Privilege Violation   (0x24)</div><div class='del'>-VECTOR   EV_Trap                 ; 0x128, Trap exception        (0x25)</div><div class='del'>-VECTOR   EV_Extension            ; 0x130, Extn Intruction Excp  (0x26)</div><div class='del'>-</div><div class='del'>-.rept   24</div><div class='del'>-VECTOR   reserved                ; Reserved Exceptions</div><div class='del'>-.endr</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;   /* {EXTRY,EXIT} */</div><div class='del'>-#include &lt;asm/entry.h&gt;       /* SAVE_ALL_{INT1,INT2,SYS...} */</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/arcregs.h&gt;</div><div class='del'>-#include &lt;asm/irqflags.h&gt;</div><div class='del'>-</div><div class='del'>-;##################### Scratch Mem for IRQ stack switching #############</div><div class='del'>-</div><div class='del'>-ARCFP_DATA int1_saved_reg</div><div class='del'>-	.align 32</div><div class='del'>-	.type   int1_saved_reg, @object</div><div class='del'>-	.size   int1_saved_reg, 4</div><div class='del'>-int1_saved_reg:</div><div class='del'>-	.zero 4</div><div class='del'>-</div><div class='del'>-/* Each Interrupt level needs its own scratch */</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='del'>-</div><div class='del'>-ARCFP_DATA int2_saved_reg</div><div class='del'>-	.type   int2_saved_reg, @object</div><div class='del'>-	.size   int2_saved_reg, 4</div><div class='del'>-int2_saved_reg:</div><div class='del'>-	.zero 4</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-	.section .text, "ax",@progbits</div><div class='del'>-</div><div class='del'>-res_service:		; processor restart</div><div class='del'>-	flag    0x1     ; not implemented</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-</div><div class='del'>-reserved:		; processor restart</div><div class='del'>-	rtie            ; jump to processor initializations</div><div class='del'>-</div><div class='del'>-;##################### Interrupt Handling ##############################</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-;  Level 2 ISR: Can interrupt a Level 1 ISR</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-ENTRY(handle_interrupt_level2)</div><div class='add'>+;################### Special Sys Call Wrappers ##########################</div><div class='ctx'> </div><div class='del'>-	; TODO-vineetg for SMP this wont work</div><div class='del'>-	; free up r9 as scratchpad</div><div class='del'>-	st  r9, [@int2_saved_reg]</div><div class='add'>+ENTRY(sys_clone_wrapper)</div><div class='add'>+	SAVE_CALLEE_SAVED_USER</div><div class='add'>+	bl  @sys_clone</div><div class='add'>+	DISCARD_CALLEE_SAVED_USER</div><div class='ctx'> </div><div class='del'>-	;Which mode (user/kernel) was the system in when intr occured</div><div class='del'>-	lr  r9, [status32_l2]</div><div class='add'>+	GET_CURR_THR_INFO_FLAGS   r10</div><div class='add'>+	btst r10, TIF_SYSCALL_TRACE</div><div class='add'>+	bnz  tracesys_exit</div><div class='ctx'> </div><div class='del'>-	SWITCH_TO_KERNEL_STK</div><div class='del'>-	SAVE_ALL_INT2</div><div class='add'>+	b ret_from_system_call</div><div class='add'>+END(sys_clone_wrapper)</div><div class='ctx'> </div><div class='del'>-	;------------------------------------------------------</div><div class='del'>-	; if L2 IRQ interrupted a L1 ISR, disable preemption</div><div class='del'>-	;------------------------------------------------------</div><div class='add'>+ENTRY(ret_from_fork)</div><div class='add'>+	; when the forked child comes here from the __switch_to function</div><div class='add'>+	; r0 has the last task pointer.</div><div class='add'>+	; put last task in scheduler queue</div><div class='add'>+	bl   @schedule_tail</div><div class='ctx'> </div><div class='del'>-	ld r9, [sp, PT_status32]        ; get statu32_l2 (saved in pt_regs)</div><div class='del'>-	bbit0 r9, STATUS_A1_BIT, 1f     ; L1 not active when L2 IRQ, so normal</div><div class='add'>+	ld   r9, [sp, PT_status32]</div><div class='add'>+	brne r9, 0, 1f</div><div class='ctx'> </div><div class='del'>-	; A1 is set in status32_l2</div><div class='del'>-	; bump thread_info-&gt;preempt_count (Disable preemption)</div><div class='del'>-	GET_CURR_THR_INFO_FROM_SP   r10</div><div class='del'>-	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='del'>-	add     r9, r9, 1</div><div class='del'>-	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='add'>+	jl.d [r14]		; kernel thread entry point</div><div class='add'>+	mov  r0, r13		; (see PF_KTHREAD block in copy_thread)</div><div class='ctx'> </div><div class='ctx'> 1:</div><div class='del'>-	;------------------------------------------------------</div><div class='del'>-	; setup params for Linux common ISR and invoke it</div><div class='del'>-	;------------------------------------------------------</div><div class='del'>-	lr  r0, [icause2]</div><div class='del'>-	and r0, r0, 0x1f</div><div class='del'>-</div><div class='del'>-	bl.d  @arch_do_IRQ</div><div class='del'>-	mov r1, sp</div><div class='del'>-</div><div class='del'>-	mov r8,0x2</div><div class='del'>-	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg</div><div class='del'>-</div><div class='del'>-	b   ret_from_exception</div><div class='del'>-</div><div class='del'>-END(handle_interrupt_level2)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-;  Level 1 ISR</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-ENTRY(handle_interrupt_level1)</div><div class='del'>-</div><div class='del'>-	/* free up r9 as scratchpad */</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	sr  r9, [ARC_REG_SCRATCH_DATA0]</div><div class='del'>-#else</div><div class='del'>-	st   r9, [@int1_saved_reg]</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	;Which mode (user/kernel) was the system in when intr occured</div><div class='del'>-	lr  r9, [status32_l1]</div><div class='del'>-</div><div class='del'>-	SWITCH_TO_KERNEL_STK</div><div class='del'>-	SAVE_ALL_INT1</div><div class='add'>+	; Return to user space</div><div class='add'>+	; 1. Any forked task (Reach here via BRne above)</div><div class='add'>+	; 2. First ever init task (Reach here via return from JL above)</div><div class='add'>+	;    This is the historic "kernel_execve" use-case, to return to init</div><div class='add'>+	;    user mode, in a round about way since that is always done from</div><div class='add'>+	;    a kernel thread which is executed via JL above but always returns</div><div class='add'>+	;    out whenever kernel_execve (now inline do_fork()) is involved</div><div class='add'>+	b    ret_from_exception</div><div class='add'>+END(ret_from_fork)</div><div class='ctx'> </div><div class='del'>-	lr  r0, [icause1]</div><div class='del'>-	and r0, r0, 0x1f</div><div class='add'>+#ifdef CONFIG_ARC_DW2_UNWIND</div><div class='add'>+; Workaround for bug 94179 (STAR ):</div><div class='add'>+; Despite -fasynchronous-unwind-tables, linker is not making dwarf2 unwinder</div><div class='add'>+; section (.debug_frame) as loadable. So we force it here.</div><div class='add'>+; This also fixes STAR 9000487933 where the prev-workaround (objcopy --setflag)</div><div class='add'>+; would not work after a clean build due to kernel build system dependencies.</div><div class='add'>+.section .debug_frame, "wa",@progbits</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='del'>-	; icause1 needs to be read early, before calling tracing, which</div><div class='del'>-	; can clobber scratch regs, hence use of stack to stash it</div><div class='del'>-	push r0</div><div class='del'>-	TRACE_ASM_IRQ_DISABLE</div><div class='del'>-	pop  r0</div><div class='add'>+; Reset to .text as this file is included in entry-&lt;isa&gt;.S</div><div class='add'>+.section .text, "ax",@progbits</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	bl.d  @arch_do_IRQ</div><div class='del'>-	mov r1, sp</div><div class='del'>-</div><div class='del'>-	mov r8,0x1</div><div class='del'>-	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg</div><div class='del'>-</div><div class='del'>-	b   ret_from_exception</div><div class='del'>-END(handle_interrupt_level1)</div><div class='del'>-</div><div class='ctx'> ;################### Non TLB Exception Handling #############################</div><div class='ctx'> </div><div class='ctx'> ; ---------------------------------------------</div><div class='hunk'>@@ -280,7 +86,7 @@ ENTRY(instr_service)</div><div class='ctx'> 	lr  r0, [efa]</div><div class='ctx'> 	mov r1, sp</div><div class='ctx'> </div><div class='del'>-	FAKE_RET_FROM_EXCPN r9</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='ctx'> 	bl  do_insterror_or_kprobe</div><div class='ctx'> 	b   ret_from_exception</div><div class='hunk'>@@ -297,7 +103,7 @@ ENTRY(mem_service)</div><div class='ctx'> 	lr  r0, [efa]</div><div class='ctx'> 	mov r1, sp</div><div class='ctx'> </div><div class='del'>-	FAKE_RET_FROM_EXCPN r9</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='ctx'> 	bl  do_memory_error</div><div class='ctx'> 	b   ret_from_exception</div><div class='hunk'>@@ -334,60 +140,6 @@ ENTRY(EV_MachineCheck)</div><div class='ctx'> END(EV_MachineCheck)</div><div class='ctx'> </div><div class='ctx'> ; ---------------------------------------------</div><div class='del'>-; Protection Violation Exception Handler</div><div class='del'>-; ---------------------------------------------</div><div class='del'>-</div><div class='del'>-ENTRY(EV_TLBProtV)</div><div class='del'>-</div><div class='del'>-	EXCEPTION_PROLOGUE</div><div class='del'>-</div><div class='del'>-	;---------(3) Save some more regs-----------------</div><div class='del'>-	;  vineetg: Mar 6th: Random Seg Fault issue #1</div><div class='del'>-	;  ecr and efa were not saved in case an Intr sneaks in</div><div class='del'>-	;  after fake rtie</div><div class='del'>-</div><div class='del'>-	lr  r2, [ecr]</div><div class='del'>-	lr  r0, [efa]	; Faulting Data address</div><div class='del'>-</div><div class='del'>-	; --------(4) Return from CPU Exception Mode ---------</div><div class='del'>-	;  Fake a rtie, but rtie to next label</div><div class='del'>-	;  That way, subsequently, do_page_fault ( ) executes in pure kernel</div><div class='del'>-	;  mode with further Exceptions enabled</div><div class='del'>-</div><div class='del'>-	FAKE_RET_FROM_EXCPN r9</div><div class='del'>-</div><div class='del'>-	mov   r1, sp</div><div class='del'>-</div><div class='del'>-	;------ (5) Type of Protection Violation? ----------</div><div class='del'>-	;</div><div class='del'>-	; ProtV Hardware Exception is triggered for Access Faults of 2 types</div><div class='del'>-	;   -Access Violaton	: 00_23_(00|01|02|03)_00</div><div class='del'>-	;			         x  r  w  r+w</div><div class='del'>-	;   -Unaligned Access	: 00_23_04_00</div><div class='del'>-	;</div><div class='del'>-	bbit1 r2, ECR_C_BIT_PROTV_MISALIG_DATA, 4f</div><div class='del'>-</div><div class='del'>-	;========= (6a) Access Violation Processing ========</div><div class='del'>-	bl  do_page_fault</div><div class='del'>-	b   ret_from_exception</div><div class='del'>-</div><div class='del'>-	;========== (6b) Non aligned access ============</div><div class='del'>-4:</div><div class='del'>-</div><div class='del'>-	SAVE_CALLEE_SAVED_USER</div><div class='del'>-	mov r2, sp              ; callee_regs</div><div class='del'>-</div><div class='del'>-	bl  do_misaligned_access</div><div class='del'>-</div><div class='del'>-	; TBD: optimize - do this only if a callee reg was involved</div><div class='del'>-	; either a dst of emulated LD/ST or src with address-writeback</div><div class='del'>-	RESTORE_CALLEE_SAVED_USER</div><div class='del'>-</div><div class='del'>-	b   ret_from_exception</div><div class='del'>-</div><div class='del'>-END(EV_TLBProtV)</div><div class='del'>-</div><div class='del'>-; ---------------------------------------------</div><div class='ctx'> ; Privilege Violation Exception Handler</div><div class='ctx'> ; ---------------------------------------------</div><div class='ctx'> ENTRY(EV_PrivilegeV)</div><div class='hunk'>@@ -397,7 +149,7 @@ ENTRY(EV_PrivilegeV)</div><div class='ctx'> 	lr  r0, [efa]</div><div class='ctx'> 	mov r1, sp</div><div class='ctx'> </div><div class='del'>-	FAKE_RET_FROM_EXCPN r9</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='ctx'> 	bl  do_privilege_fault</div><div class='ctx'> 	b   ret_from_exception</div><div class='hunk'>@@ -413,14 +165,17 @@ ENTRY(EV_Extension)</div><div class='ctx'> 	lr  r0, [efa]</div><div class='ctx'> 	mov r1, sp</div><div class='ctx'> </div><div class='del'>-	FAKE_RET_FROM_EXCPN r9</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='ctx'> 	bl  do_extension_fault</div><div class='ctx'> 	b   ret_from_exception</div><div class='ctx'> END(EV_Extension)</div><div class='ctx'> </div><div class='del'>-;######################### System Call Tracing #########################</div><div class='add'>+;################ Trap Handling (Syscall, Breakpoint) ##################</div><div class='ctx'> </div><div class='add'>+; ---------------------------------------------</div><div class='add'>+; syscall Tracing</div><div class='add'>+; ---------------------------------------------</div><div class='ctx'> tracesys:</div><div class='ctx'> 	; save EFA in case tracer wants the PC of traced task</div><div class='ctx'> 	; using ERET won't work since next-PC has already committed</div><div class='hunk'>@@ -463,10 +218,9 @@ tracesys_exit:</div><div class='ctx'> 	b   ret_from_exception ; NOT ret_from_system_call at is saves r0 which</div><div class='ctx'> 	; we'd done before calling post hook above</div><div class='ctx'> </div><div class='del'>-;################### Break Point TRAP ##########################</div><div class='del'>-</div><div class='del'>-	; ======= (5b) Trap is due to Break-Point =========</div><div class='del'>-</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+; Breakpoint TRAP</div><div class='add'>+; ---------------------------------------------</div><div class='ctx'> trap_with_param:</div><div class='ctx'> </div><div class='ctx'> 	; stop_pc info by gdb needs this info</div><div class='hunk'>@@ -475,7 +229,7 @@ trap_with_param:</div><div class='ctx'> </div><div class='ctx'> 	; Now that we have read EFA, it is safe to do "fake" rtie</div><div class='ctx'> 	;   and get out of CPU exception mode</div><div class='del'>-	FAKE_RET_FROM_EXCPN r11</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='ctx'> 	; Save callee regs in case gdb wants to have a look</div><div class='ctx'> 	; SP will grow up by size of CALLEE Reg-File</div><div class='hunk'>@@ -494,37 +248,33 @@ trap_with_param:</div><div class='ctx'> </div><div class='ctx'> 	b   ret_from_exception</div><div class='ctx'> </div><div class='del'>-;##################### Trap Handling ##############################</div><div class='del'>-;</div><div class='del'>-; EV_Trap caused by TRAP_S and TRAP0 instructions.</div><div class='del'>-;------------------------------------------------------------------</div><div class='del'>-;   (1) System Calls</div><div class='del'>-;       :parameters in r0-r7.</div><div class='del'>-;       :r8 has the system call number</div><div class='del'>-;   (2) Break Points</div><div class='del'>-;------------------------------------------------------------------</div><div class='add'>+; ---------------------------------------------</div><div class='add'>+; syscall TRAP</div><div class='add'>+; ABI: (r0-r7) upto 8 args, (r8) syscall number</div><div class='add'>+; ---------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ENTRY(EV_Trap)</div><div class='ctx'> </div><div class='ctx'> 	EXCEPTION_PROLOGUE</div><div class='ctx'> </div><div class='del'>-	;------- (4) What caused the Trap --------------</div><div class='del'>-	lr     r12, [ecr]</div><div class='del'>-	bmsk.f 0, r12, 7</div><div class='add'>+	;============ TRAP 1   :breakpoints</div><div class='add'>+	; Check ECR for trap with arg (PROLOGUE ensures r9 has ECR)</div><div class='add'>+	bmsk.f 0, r9, 7</div><div class='ctx'> 	bnz    trap_with_param</div><div class='ctx'> </div><div class='del'>-	; ======= (5a) Trap is due to System Call ========</div><div class='add'>+	;============ TRAP  (no param): syscall top level</div><div class='ctx'> </div><div class='del'>-	; Before doing anything, return from CPU Exception Mode</div><div class='del'>-	FAKE_RET_FROM_EXCPN r11</div><div class='add'>+	; First return from Exception to pure K mode (Exception/IRQs renabled)</div><div class='add'>+	FAKE_RET_FROM_EXCPN</div><div class='ctx'> </div><div class='del'>-	; If syscall tracing ongoing, invoke pre-pos-hooks</div><div class='add'>+	; If syscall tracing ongoing, invoke pre-post-hooks</div><div class='ctx'> 	GET_CURR_THR_INFO_FLAGS   r10</div><div class='ctx'> 	btst r10, TIF_SYSCALL_TRACE</div><div class='ctx'> 	bnz tracesys  ; this never comes back</div><div class='ctx'> </div><div class='del'>-	;============ This is normal System Call case ==========</div><div class='del'>-	; Sys-call num shd not exceed the total system calls avail</div><div class='add'>+	;============ Normal syscall case</div><div class='add'>+</div><div class='add'>+	; syscall num shd not exceed the total system calls avail</div><div class='ctx'> 	cmp     r8,  NR_syscalls</div><div class='ctx'> 	mov.hi  r0, -ENOSYS</div><div class='ctx'> 	bhi     ret_from_system_call</div><div class='hunk'>@@ -565,7 +315,7 @@ resume_user_mode_begin:</div><div class='ctx'> 	; Fast Path return to user mode if no pending work</div><div class='ctx'> 	GET_CURR_THR_INFO_FLAGS   r9</div><div class='ctx'> 	and.f  0,  r9, _TIF_WORK_MASK</div><div class='del'>-	bz     restore_regs</div><div class='add'>+	bz     .Lrestore_regs</div><div class='ctx'> </div><div class='ctx'> 	; --- (Slow Path #1) task preemption ---</div><div class='ctx'> 	bbit0  r9, TIF_NEED_RESCHED, .Lchk_pend_signals</div><div class='hunk'>@@ -624,11 +374,11 @@ resume_kernel_mode:</div><div class='ctx'> 	; Can't preempt if preemption disabled</div><div class='ctx'> 	GET_CURR_THR_INFO_FROM_SP   r10</div><div class='ctx'> 	ld  r8, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='del'>-	brne  r8, 0, restore_regs</div><div class='add'>+	brne  r8, 0, .Lrestore_regs</div><div class='ctx'> </div><div class='ctx'> 	; check if this task's NEED_RESCHED flag set</div><div class='ctx'> 	ld  r9, [r10, THREAD_INFO_FLAGS]</div><div class='del'>-	bbit0  r9, TIF_NEED_RESCHED, restore_regs</div><div class='add'>+	bbit0  r9, TIF_NEED_RESCHED, .Lrestore_regs</div><div class='ctx'> </div><div class='ctx'> 	; Invoke PREEMPTION</div><div class='ctx'> 	bl      preempt_schedule_irq</div><div class='hunk'>@@ -636,142 +386,7 @@ resume_kernel_mode:</div><div class='ctx'> 	; preempt_schedule_irq() always returns with IRQ disabled</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	; fall through</div><div class='del'>-</div><div class='del'>-;############# Return from Intr/Excp/Trap (ARC Specifics) ##############</div><div class='del'>-;</div><div class='del'>-; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)</div><div class='del'>-; IRQ shd definitely not happen between now and rtie</div><div class='del'>-; All 2 entry points to here already disable interrupts</div><div class='del'>-</div><div class='del'>-restore_regs :</div><div class='del'>-</div><div class='del'>-	TRACE_ASM_IRQ_ENABLE</div><div class='del'>-</div><div class='del'>-	lr	r10, [status32]</div><div class='del'>-</div><div class='del'>-	; Restore REG File. In case multiple Events outstanding,</div><div class='del'>-	; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None</div><div class='del'>-	; Note that we use realtime STATUS32 (not pt_regs-&gt;status32) to</div><div class='del'>-	; decide that.</div><div class='del'>-</div><div class='del'>-	; if Returning from Exception</div><div class='del'>-	bbit0  r10, STATUS_AE_BIT, not_exception</div><div class='del'>-	RESTORE_ALL_SYS</div><div class='del'>-	rtie</div><div class='del'>-</div><div class='del'>-	; Not Exception so maybe Interrupts (Level 1 or 2)</div><div class='del'>-</div><div class='del'>-not_exception:</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS</div><div class='del'>-</div><div class='del'>-	; Level 2 interrupt return Path - from hardware standpoint</div><div class='del'>-	bbit0  r10, STATUS_A2_BIT, not_level2_interrupt</div><div class='del'>-</div><div class='del'>-	;------------------------------------------------------------------</div><div class='del'>-	; However the context returning might not have taken L2 intr itself</div><div class='del'>-	; e.g. Task'A' user-code -&gt; L2 intr -&gt; schedule -&gt; 'B' user-code ret</div><div class='del'>-	; Special considerations needed for the context which took L2 intr</div><div class='del'>-</div><div class='del'>-	ld   r9, [sp, PT_event]        ; Ensure this is L2 intr context</div><div class='del'>-	brne r9, event_IRQ2, 149f</div><div class='del'>-</div><div class='del'>-	;------------------------------------------------------------------</div><div class='del'>-	; if L2 IRQ interrupted an L1 ISR,  we'd disabled preemption earlier</div><div class='del'>-	; so that sched doesn't move to new task, causing L1 to be delayed</div><div class='del'>-	; undeterministically. Now that we've achieved that, let's reset</div><div class='del'>-	; things to what they were, before returning from L2 context</div><div class='del'>-	;----------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-	ld r9, [sp, PT_status32]       ; get statu32_l2 (saved in pt_regs)</div><div class='del'>-	bbit0 r9, STATUS_A1_BIT, 149f  ; L1 not active when L2 IRQ, so normal</div><div class='del'>-</div><div class='del'>-	; decrement thread_info-&gt;preempt_count (re-enable preemption)</div><div class='del'>-	GET_CURR_THR_INFO_FROM_SP   r10</div><div class='del'>-	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='del'>-</div><div class='del'>-	; paranoid check, given A1 was active when A2 happened, preempt count</div><div class='del'>-	; must not be 0 because we would have incremented it.</div><div class='del'>-	; If this does happen we simply HALT as it means a BUG !!!</div><div class='del'>-	cmp     r9, 0</div><div class='del'>-	bnz     2f</div><div class='del'>-	flag 1</div><div class='del'>-</div><div class='del'>-2:</div><div class='del'>-	sub     r9, r9, 1</div><div class='del'>-	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]</div><div class='del'>-</div><div class='del'>-149:</div><div class='del'>-	;return from level 2</div><div class='del'>-	RESTORE_ALL_INT2</div><div class='del'>-debug_marker_l2:</div><div class='del'>-	rtie</div><div class='del'>-</div><div class='del'>-not_level2_interrupt:</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	bbit0  r10, STATUS_A1_BIT, not_level1_interrupt</div><div class='add'>+	b	.Lrestore_regs</div><div class='ctx'> </div><div class='del'>-	;return from level 1</div><div class='add'>+##### DONT ADD CODE HERE - .Lrestore_regs actually follows in entry-&lt;isa&gt;.S</div><div class='ctx'> </div><div class='del'>-	RESTORE_ALL_INT1</div><div class='del'>-debug_marker_l1:</div><div class='del'>-	rtie</div><div class='del'>-</div><div class='del'>-not_level1_interrupt:</div><div class='del'>-</div><div class='del'>-	;this case is for syscalls or Exceptions (with fake rtie)</div><div class='del'>-</div><div class='del'>-	RESTORE_ALL_SYS</div><div class='del'>-debug_marker_syscall:</div><div class='del'>-	rtie</div><div class='del'>-</div><div class='del'>-END(ret_from_exception)</div><div class='del'>-</div><div class='del'>-ENTRY(ret_from_fork)</div><div class='del'>-	; when the forked child comes here from the __switch_to function</div><div class='del'>-	; r0 has the last task pointer.</div><div class='del'>-	; put last task in scheduler queue</div><div class='del'>-	bl   @schedule_tail</div><div class='del'>-</div><div class='del'>-	ld   r9, [sp, PT_status32]</div><div class='del'>-	brne r9, 0, 1f</div><div class='del'>-</div><div class='del'>-	jl.d [r14]		; kernel thread entry point</div><div class='del'>-	mov  r0, r13		; (see PF_KTHREAD block in copy_thread)</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	; Return to user space</div><div class='del'>-	; 1. Any forked task (Reach here via BRne above)</div><div class='del'>-	; 2. First ever init task (Reach here via return from JL above)</div><div class='del'>-	;    This is the historic "kernel_execve" use-case, to return to init</div><div class='del'>-	;    user mode, in a round about way since that is always done from</div><div class='del'>-	;    a kernel thread which is executed via JL above but always returns</div><div class='del'>-	;    out whenever kernel_execve (now inline do_fork()) is involved</div><div class='del'>-	b    ret_from_exception</div><div class='del'>-END(ret_from_fork)</div><div class='del'>-</div><div class='del'>-;################### Special Sys Call Wrappers ##########################</div><div class='del'>-</div><div class='del'>-ENTRY(sys_clone_wrapper)</div><div class='del'>-	SAVE_CALLEE_SAVED_USER</div><div class='del'>-	bl  @sys_clone</div><div class='del'>-	DISCARD_CALLEE_SAVED_USER</div><div class='del'>-</div><div class='del'>-	GET_CURR_THR_INFO_FLAGS   r10</div><div class='del'>-	btst r10, TIF_SYSCALL_TRACE</div><div class='del'>-	bnz  tracesys_exit</div><div class='del'>-</div><div class='del'>-	b ret_from_system_call</div><div class='del'>-END(sys_clone_wrapper)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_DW2_UNWIND</div><div class='del'>-; Workaround for bug 94179 (STAR ):</div><div class='del'>-; Despite -fasynchronous-unwind-tables, linker is not making dwarf2 unwinder</div><div class='del'>-; section (.debug_frame) as loadable. So we force it here.</div><div class='del'>-; This also fixes STAR 9000487933 where the prev-workaround (objcopy --setflag)</div><div class='del'>-; would not work after a clean build due to kernel build system dependencies.</div><div class='del'>-.section .debug_frame, "wa",@progbits</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S<br/>index b0e8666fdccc..812f95e6ae69 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/head.S</a></div><div class='hunk'>@@ -49,8 +49,6 @@</div><div class='ctx'> 1:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-	.cpu A7</div><div class='del'>-</div><div class='ctx'> 	.section .init.text, "ax",@progbits</div><div class='ctx'> 	.type stext, @function</div><div class='ctx'> 	.globl stext</div><div class='hunk'>@@ -83,6 +81,7 @@ stext:</div><div class='ctx'> 	st.ab   0, [r5, 4]</div><div class='ctx'> 1:</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARC_UBOOT_SUPPORT</div><div class='ctx'> 	; Uboot - kernel ABI</div><div class='ctx'> 	;    r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2</div><div class='ctx'> 	;    r1 = magic number (board identity, unused as of now</div><div class='hunk'>@@ -90,6 +89,7 @@ stext:</div><div class='ctx'> 	; These are handled later in setup_arch()</div><div class='ctx'> 	st	r0, [@uboot_tag]</div><div class='ctx'> 	st	r2, [@uboot_arg]</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	; setup "current" tsk and optionally cache it in dedicated r25</div><div class='ctx'> 	mov	r9, @init_task</div><div class='head'>diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c<br/>new file mode 100644<br/>index 000000000000..26c156827479<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/intc-arcv2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/intc-arcv2.c</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Early Hardware specific Interrupt setup</div><div class='add'>+ * -Called very early (start_kernel -&gt; setup_arch -&gt; setup_processor)</div><div class='add'>+ * -Platform Independent (must for any ARC Core)</div><div class='add'>+ * -Needed for each CPU (hence not foldable into init_IRQ)</div><div class='add'>+ */</div><div class='add'>+void arc_init_IRQ(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int tmp;</div><div class='add'>+</div><div class='add'>+	struct aux_irq_ctrl {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		unsigned int res3:18, save_idx_regs:1, res2:1,</div><div class='add'>+			     save_u_to_u:1, save_lp_regs:1, save_blink:1,</div><div class='add'>+			     res:4, save_nr_gpr_pairs:5;</div><div class='add'>+#else</div><div class='add'>+		unsigned int save_nr_gpr_pairs:5, res:4,</div><div class='add'>+			     save_blink:1, save_lp_regs:1, save_u_to_u:1,</div><div class='add'>+			     res2:1, save_idx_regs:1, res3:18;</div><div class='add'>+#endif</div><div class='add'>+	} ictrl;</div><div class='add'>+</div><div class='add'>+	*(unsigned int *)&amp;ictrl = 0;</div><div class='add'>+</div><div class='add'>+	ictrl.save_nr_gpr_pairs = 6;	/* r0 to r11 (r12 saved manually) */</div><div class='add'>+	ictrl.save_blink = 1;</div><div class='add'>+	ictrl.save_lp_regs = 1;		/* LP_COUNT, LP_START, LP_END */</div><div class='add'>+	ictrl.save_u_to_u = 0;		/* user ctxt saved on kernel stack */</div><div class='add'>+	ictrl.save_idx_regs = 1;	/* JLI, LDI, EI */</div><div class='add'>+</div><div class='add'>+	WRITE_AUX(AUX_IRQ_CTRL, ictrl);</div><div class='add'>+</div><div class='add'>+	/* setup status32, don't enable intr yet as kernel doesn't want */</div><div class='add'>+	tmp = read_aux_reg(0xa);</div><div class='add'>+	tmp |= ISA_INIT_STATUS_BITS;</div><div class='add'>+	tmp &amp;= ~STATUS_IE_MASK;</div><div class='add'>+	asm volatile("flag %0	\n"::"r"(tmp));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ARCv2 core intc provides multiple interrupt priorities (upto 16).</div><div class='add'>+	 * Typical builds though have only two levels (0-high, 1-low)</div><div class='add'>+	 * Linux by default uses lower prio 1 for most irqs, reserving 0 for</div><div class='add'>+	 * NMI style interrupts in future (say perf)</div><div class='add'>+	 *</div><div class='add'>+	 * Read the intc BCR to confirm that Linux default priority is avail</div><div class='add'>+	 * in h/w</div><div class='add'>+	 *</div><div class='add'>+	 * Note:</div><div class='add'>+	 *  IRQ_BCR[27..24] contains N-1 (for N priority levels) and prio level</div><div class='add'>+	 *  is 0 based.</div><div class='add'>+	 */</div><div class='add'>+	tmp = (read_aux_reg(ARC_REG_IRQ_BCR) &gt;&gt; 24 ) &amp; 0xF;</div><div class='add'>+	if (ARCV2_IRQ_DEF_PRIO &gt; tmp)</div><div class='add'>+		panic("Linux default irq prio incorrect\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arcv2_irq_mask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	write_aux_reg(AUX_IRQ_SELECT, data-&gt;irq);</div><div class='add'>+	write_aux_reg(AUX_IRQ_ENABLE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arcv2_irq_unmask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	write_aux_reg(AUX_IRQ_SELECT, data-&gt;irq);</div><div class='add'>+	write_aux_reg(AUX_IRQ_ENABLE, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arcv2_irq_enable(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	/* set default priority */</div><div class='add'>+	write_aux_reg(AUX_IRQ_SELECT, data-&gt;irq);</div><div class='add'>+	write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * hw auto enables (linux unmask) all by default</div><div class='add'>+	 * So no need to do IRQ_ENABLE here</div><div class='add'>+	 * XXX: However OSCI LAN need it</div><div class='add'>+	 */</div><div class='add'>+	write_aux_reg(AUX_IRQ_ENABLE, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip arcv2_irq_chip = {</div><div class='add'>+	.name           = "ARCv2 core Intc",</div><div class='add'>+	.irq_mask	= arcv2_irq_mask,</div><div class='add'>+	.irq_unmask	= arcv2_irq_unmask,</div><div class='add'>+	.irq_enable	= arcv2_irq_enable</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int arcv2_irq_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			 irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	if (irq == TIMER0_IRQ || irq == IPI_IRQ)</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;arcv2_irq_chip, handle_percpu_irq);</div><div class='add'>+	else</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;arcv2_irq_chip, handle_level_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops arcv2_irq_ops = {</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+	.map = arcv2_irq_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_domain *root_domain;</div><div class='add'>+</div><div class='add'>+static int __init</div><div class='add'>+init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	if (parent)</div><div class='add'>+		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='add'>+</div><div class='add'>+	root_domain = irq_domain_add_legacy(intc, NR_CPU_IRQS, 0, 0,</div><div class='add'>+					    &amp;arcv2_irq_ops, NULL);</div><div class='add'>+</div><div class='add'>+	if (!root_domain)</div><div class='add'>+		panic("root irq domain not avail\n");</div><div class='add'>+</div><div class='add'>+	/* with this we don't need to export root_domain */</div><div class='add'>+	irq_set_default_host(root_domain);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+IRQCHIP_DECLARE(arc_intc, "snps,archs-intc", init_onchip_IRQ);</div><div class='head'>diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c<br/>new file mode 100644<br/>index 000000000000..039fac30b5c1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/intc-compact.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/intc-compact.c</a></div><div class='hunk'>@@ -0,0 +1,225 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Early Hardware specific Interrupt setup</div><div class='add'>+ * -Platform independent, needed for each CPU (not foldable into init_IRQ)</div><div class='add'>+ * -Called very early (start_kernel -&gt; setup_arch -&gt; setup_processor)</div><div class='add'>+ *</div><div class='add'>+ * what it does ?</div><div class='add'>+ * -Optionally, setup the High priority Interrupts as Level 2 IRQs</div><div class='add'>+ */</div><div class='add'>+void arc_init_IRQ(void)</div><div class='add'>+{</div><div class='add'>+	int level_mask = 0;</div><div class='add'>+</div><div class='add'>+       /* setup any high priority Interrupts (Level2 in ARCompact jargon) */</div><div class='add'>+	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) &lt;&lt; 3;</div><div class='add'>+	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) &lt;&lt; 5;</div><div class='add'>+	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ6_LV2) &lt;&lt; 6;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write to register, even if no LV2 IRQs configured to reset it</div><div class='add'>+	 * in case bootloader had mucked with it</div><div class='add'>+	 */</div><div class='add'>+	write_aux_reg(AUX_IRQ_LEV, level_mask);</div><div class='add'>+</div><div class='add'>+	if (level_mask)</div><div class='add'>+		pr_info("Level-2 interrupts bitset %x\n", level_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ARC700 core includes a simple on-chip intc supporting</div><div class='add'>+ * -per IRQ enable/disable</div><div class='add'>+ * -2 levels of interrupts (high/low)</div><div class='add'>+ * -all interrupts being level triggered</div><div class='add'>+ *</div><div class='add'>+ * To reduce platform code, we assume all IRQs directly hooked-up into intc.</div><div class='add'>+ * Platforms with external intc, hence cascaded IRQs, are free to over-ride</div><div class='add'>+ * below, per IRQ.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void arc_irq_mask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int ienb;</div><div class='add'>+</div><div class='add'>+	ienb = read_aux_reg(AUX_IENABLE);</div><div class='add'>+	ienb &amp;= ~(1 &lt;&lt; data-&gt;irq);</div><div class='add'>+	write_aux_reg(AUX_IENABLE, ienb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arc_irq_unmask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int ienb;</div><div class='add'>+</div><div class='add'>+	ienb = read_aux_reg(AUX_IENABLE);</div><div class='add'>+	ienb |= (1 &lt;&lt; data-&gt;irq);</div><div class='add'>+	write_aux_reg(AUX_IENABLE, ienb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip onchip_intc = {</div><div class='add'>+	.name           = "ARC In-core Intc",</div><div class='add'>+	.irq_mask	= arc_irq_mask,</div><div class='add'>+	.irq_unmask	= arc_irq_unmask,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			       irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * XXX: the IPI IRQ needs to be handled like TIMER too. However ARC core</div><div class='add'>+	 *      code doesn't own it (like TIMER0). ISS IDU / ezchip define it</div><div class='add'>+	 *      in platform header which can't be included here as it goes</div><div class='add'>+	 *      against multi-platform image philisophy</div><div class='add'>+	 */</div><div class='add'>+	if (irq == TIMER0_IRQ)</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;onchip_intc, handle_percpu_irq);</div><div class='add'>+	else</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;onchip_intc, handle_level_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops arc_intc_domain_ops = {</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+	.map = arc_intc_domain_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_domain *root_domain;</div><div class='add'>+</div><div class='add'>+static int __init</div><div class='add'>+init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	if (parent)</div><div class='add'>+		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='add'>+</div><div class='add'>+	root_domain = irq_domain_add_legacy(intc, NR_CPU_IRQS, 0, 0,</div><div class='add'>+					    &amp;arc_intc_domain_ops, NULL);</div><div class='add'>+</div><div class='add'>+	if (!root_domain)</div><div class='add'>+		panic("root irq domain not avail\n");</div><div class='add'>+</div><div class='add'>+	/* with this we don't need to export root_domain */</div><div class='add'>+	irq_set_default_host(root_domain);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+IRQCHIP_DECLARE(arc_intc, "snps,arc700-intc", init_onchip_IRQ);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * arch_local_irq_enable - Enable interrupts.</div><div class='add'>+ *</div><div class='add'>+ * 1. Explicitly called to re-enable interrupts</div><div class='add'>+ * 2. Implicitly called from spin_unlock_irq, write_unlock_irq etc</div><div class='add'>+ *    which maybe in hard ISR itself</div><div class='add'>+ *</div><div class='add'>+ * Semantics of this function change depending on where it is called from:</div><div class='add'>+ *</div><div class='add'>+ * -If called from hard-ISR, it must not invert interrupt priorities</div><div class='add'>+ *  e.g. suppose TIMER is high priority (Level 2) IRQ</div><div class='add'>+ *    Time hard-ISR, timer_interrupt( ) calls spin_unlock_irq several times.</div><div class='add'>+ *    Here local_irq_enable( ) shd not re-enable lower priority interrupts</div><div class='add'>+ * -If called from soft-ISR, it must re-enable all interrupts</div><div class='add'>+ *    soft ISR are low prioity jobs which can be very slow, thus all IRQs</div><div class='add'>+ *    must be enabled while they run.</div><div class='add'>+ *    Now hardware context wise we may still be in L2 ISR (not done rtie)</div><div class='add'>+ *    still we must re-enable both L1 and L2 IRQs</div><div class='add'>+ *  Another twist is prev scenario with flow being</div><div class='add'>+ *     L1 ISR ==&gt; interrupted by L2 ISR  ==&gt; L2 soft ISR</div><div class='add'>+ *     here we must not re-enable Ll as prev Ll Interrupt's h/w context will get</div><div class='add'>+ *     over-written (this is deficiency in ARC700 Interrupt mechanism)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS	/* Complex version for 2 IRQ levels */</div><div class='add'>+</div><div class='add'>+void arch_local_irq_enable(void)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	unsigned long flags = arch_local_save_flags();</div><div class='add'>+</div><div class='add'>+	/* Allow both L1 and L2 at the onset */</div><div class='add'>+	flags |= (STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='add'>+</div><div class='add'>+	/* Called from hard ISR (between irq_enter and irq_exit) */</div><div class='add'>+	if (in_irq()) {</div><div class='add'>+</div><div class='add'>+		/* If in L2 ISR, don't re-enable any further IRQs as this can</div><div class='add'>+		 * cause IRQ priorities to get upside down. e.g. it could allow</div><div class='add'>+		 * L1 be taken while in L2 hard ISR which is wrong not only in</div><div class='add'>+		 * theory, it can also cause the dreaded L1-L2-L1 scenario</div><div class='add'>+		 */</div><div class='add'>+		if (flags &amp; STATUS_A2_MASK)</div><div class='add'>+			flags &amp;= ~(STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='add'>+</div><div class='add'>+		/* Even if in L1 ISR, allowe Higher prio L2 IRQs */</div><div class='add'>+		else if (flags &amp; STATUS_A1_MASK)</div><div class='add'>+			flags &amp;= ~(STATUS_E1_MASK);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* called from soft IRQ, ideally we want to re-enable all levels */</div><div class='add'>+</div><div class='add'>+	else if (in_softirq()) {</div><div class='add'>+</div><div class='add'>+		/* However if this is case of L1 interrupted by L2,</div><div class='add'>+		 * re-enabling both may cause whaco L1-L2-L1 scenario</div><div class='add'>+		 * because ARC700 allows level 1 to interrupt an active L2 ISR</div><div class='add'>+		 * Thus we disable both</div><div class='add'>+		 * However some code, executing in soft ISR wants some IRQs</div><div class='add'>+		 * to be enabled so we re-enable L2 only</div><div class='add'>+		 *</div><div class='add'>+		 * How do we determine L1 intr by L2</div><div class='add'>+		 *  -A2 is set (means in L2 ISR)</div><div class='add'>+		 *  -E1 is set in this ISR's pt_regs-&gt;status32 which is</div><div class='add'>+		 *      saved copy of status32_l2 when l2 ISR happened</div><div class='add'>+		 */</div><div class='add'>+		struct pt_regs *pt = get_irq_regs();</div><div class='add'>+</div><div class='add'>+		if ((flags &amp; STATUS_A2_MASK) &amp;&amp; pt &amp;&amp;</div><div class='add'>+		    (pt-&gt;status32 &amp; STATUS_A1_MASK)) {</div><div class='add'>+			/*flags &amp;= ~(STATUS_E1_MASK | STATUS_E2_MASK); */</div><div class='add'>+			flags &amp;= ~(STATUS_E1_MASK);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* ! CONFIG_ARC_COMPACT_IRQ_LEVELS */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Simpler version for only 1 level of interrupt</div><div class='add'>+ * Here we only Worry about Level 1 Bits</div><div class='add'>+ */</div><div class='add'>+void arch_local_irq_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ARC IDE Drivers tries to re-enable interrupts from hard-isr</div><div class='add'>+	 * context which is simply wrong</div><div class='add'>+	 */</div><div class='add'>+	if (in_irq()) {</div><div class='add'>+		WARN_ONCE(1, "IRQ enabled from hard-isr");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flags = arch_local_save_flags();</div><div class='add'>+	flags |= (STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+EXPORT_SYMBOL(arch_local_irq_enable);</div><div class='head'>diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c<br/>index 620ec2fe32a9..2989a7bcf8a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/irq.c</a></div><div class='hunk'>@@ -8,116 +8,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip.h&gt;</div><div class='del'>-#include "../../drivers/irqchip/irqchip.h"</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach_desc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Early Hardware specific Interrupt setup</div><div class='del'>- * -Platform independent, needed for each CPU (not foldable into init_IRQ)</div><div class='del'>- * -Called very early (start_kernel -&gt; setup_arch -&gt; setup_processor)</div><div class='del'>- *</div><div class='del'>- * what it does ?</div><div class='del'>- * -Optionally, setup the High priority Interrupts as Level 2 IRQs</div><div class='del'>- */</div><div class='del'>-void arc_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	int level_mask = 0;</div><div class='del'>-</div><div class='del'>-       /* setup any high priority Interrupts (Level2 in ARCompact jargon) */</div><div class='del'>-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) &lt;&lt; 3;</div><div class='del'>-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) &lt;&lt; 5;</div><div class='del'>-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ6_LV2) &lt;&lt; 6;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Write to register, even if no LV2 IRQs configured to reset it</div><div class='del'>-	 * in case bootloader had mucked with it</div><div class='del'>-	 */</div><div class='del'>-	write_aux_reg(AUX_IRQ_LEV, level_mask);</div><div class='del'>-</div><div class='del'>-	if (level_mask)</div><div class='del'>-		pr_info("Level-2 interrupts bitset %x\n", level_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ARC700 core includes a simple on-chip intc supporting</div><div class='del'>- * -per IRQ enable/disable</div><div class='del'>- * -2 levels of interrupts (high/low)</div><div class='del'>- * -all interrupts being level triggered</div><div class='del'>- *</div><div class='del'>- * To reduce platform code, we assume all IRQs directly hooked-up into intc.</div><div class='del'>- * Platforms with external intc, hence cascaded IRQs, are free to over-ride</div><div class='del'>- * below, per IRQ.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void arc_irq_mask(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	unsigned int ienb;</div><div class='del'>-</div><div class='del'>-	ienb = read_aux_reg(AUX_IENABLE);</div><div class='del'>-	ienb &amp;= ~(1 &lt;&lt; data-&gt;irq);</div><div class='del'>-	write_aux_reg(AUX_IENABLE, ienb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void arc_irq_unmask(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	unsigned int ienb;</div><div class='del'>-</div><div class='del'>-	ienb = read_aux_reg(AUX_IENABLE);</div><div class='del'>-	ienb |= (1 &lt;&lt; data-&gt;irq);</div><div class='del'>-	write_aux_reg(AUX_IENABLE, ienb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip onchip_intc = {</div><div class='del'>-	.name           = "ARC In-core Intc",</div><div class='del'>-	.irq_mask	= arc_irq_mask,</div><div class='del'>-	.irq_unmask	= arc_irq_unmask,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='del'>-				irq_hw_number_t hw)</div><div class='del'>-{</div><div class='del'>-	if (irq == TIMER0_IRQ)</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;onchip_intc, handle_percpu_irq);</div><div class='del'>-	else</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;onchip_intc, handle_level_irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops arc_intc_domain_ops = {</div><div class='del'>-	.xlate = irq_domain_xlate_onecell,</div><div class='del'>-	.map = arc_intc_domain_map,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct irq_domain *root_domain;</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='del'>-{</div><div class='del'>-	if (parent)</div><div class='del'>-		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='del'>-</div><div class='del'>-	root_domain = irq_domain_add_legacy(intc, NR_CPU_IRQS, 0, 0,</div><div class='del'>-					    &amp;arc_intc_domain_ops, NULL);</div><div class='del'>-</div><div class='del'>-	if (!root_domain)</div><div class='del'>-		panic("root irq domain not avail\n");</div><div class='del'>-</div><div class='del'>-	/* with this we don't need to export root_domain */</div><div class='del'>-	irq_set_default_host(root_domain);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-IRQCHIP_DECLARE(arc_intc, "snps,arc700-intc", init_onchip_IRQ);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Late Interrupt system init called from start_kernel for Boot CPU only</div><div class='ctx'>  *</div><div class='ctx'>  * Since slab must already be initialized, platforms can start doing any</div><div class='hunk'>@@ -178,107 +72,3 @@ void arc_request_percpu_irq(int irq, int cpu,</div><div class='ctx'> </div><div class='ctx'> 	enable_percpu_irq(irq, 0);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * arch_local_irq_enable - Enable interrupts.</div><div class='del'>- *</div><div class='del'>- * 1. Explicitly called to re-enable interrupts</div><div class='del'>- * 2. Implicitly called from spin_unlock_irq, write_unlock_irq etc</div><div class='del'>- *    which maybe in hard ISR itself</div><div class='del'>- *</div><div class='del'>- * Semantics of this function change depending on where it is called from:</div><div class='del'>- *</div><div class='del'>- * -If called from hard-ISR, it must not invert interrupt priorities</div><div class='del'>- *  e.g. suppose TIMER is high priority (Level 2) IRQ</div><div class='del'>- *    Time hard-ISR, timer_interrupt( ) calls spin_unlock_irq several times.</div><div class='del'>- *    Here local_irq_enable( ) shd not re-enable lower priority interrupts</div><div class='del'>- * -If called from soft-ISR, it must re-enable all interrupts</div><div class='del'>- *    soft ISR are low prioity jobs which can be very slow, thus all IRQs</div><div class='del'>- *    must be enabled while they run.</div><div class='del'>- *    Now hardware context wise we may still be in L2 ISR (not done rtie)</div><div class='del'>- *    still we must re-enable both L1 and L2 IRQs</div><div class='del'>- *  Another twist is prev scenario with flow being</div><div class='del'>- *     L1 ISR ==&gt; interrupted by L2 ISR  ==&gt; L2 soft ISR</div><div class='del'>- *     here we must not re-enable Ll as prev Ll Interrupt's h/w context will get</div><div class='del'>- *     over-written (this is deficiency in ARC700 Interrupt mechanism)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS	/* Complex version for 2 IRQ levels */</div><div class='del'>-</div><div class='del'>-void arch_local_irq_enable(void)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	flags = arch_local_save_flags();</div><div class='del'>-</div><div class='del'>-	/* Allow both L1 and L2 at the onset */</div><div class='del'>-	flags |= (STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='del'>-</div><div class='del'>-	/* Called from hard ISR (between irq_enter and irq_exit) */</div><div class='del'>-	if (in_irq()) {</div><div class='del'>-</div><div class='del'>-		/* If in L2 ISR, don't re-enable any further IRQs as this can</div><div class='del'>-		 * cause IRQ priorities to get upside down. e.g. it could allow</div><div class='del'>-		 * L1 be taken while in L2 hard ISR which is wrong not only in</div><div class='del'>-		 * theory, it can also cause the dreaded L1-L2-L1 scenario</div><div class='del'>-		 */</div><div class='del'>-		if (flags &amp; STATUS_A2_MASK)</div><div class='del'>-			flags &amp;= ~(STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='del'>-</div><div class='del'>-		/* Even if in L1 ISR, allowe Higher prio L2 IRQs */</div><div class='del'>-		else if (flags &amp; STATUS_A1_MASK)</div><div class='del'>-			flags &amp;= ~(STATUS_E1_MASK);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* called from soft IRQ, ideally we want to re-enable all levels */</div><div class='del'>-</div><div class='del'>-	else if (in_softirq()) {</div><div class='del'>-</div><div class='del'>-		/* However if this is case of L1 interrupted by L2,</div><div class='del'>-		 * re-enabling both may cause whaco L1-L2-L1 scenario</div><div class='del'>-		 * because ARC700 allows level 1 to interrupt an active L2 ISR</div><div class='del'>-		 * Thus we disable both</div><div class='del'>-		 * However some code, executing in soft ISR wants some IRQs</div><div class='del'>-		 * to be enabled so we re-enable L2 only</div><div class='del'>-		 *</div><div class='del'>-		 * How do we determine L1 intr by L2</div><div class='del'>-		 *  -A2 is set (means in L2 ISR)</div><div class='del'>-		 *  -E1 is set in this ISR's pt_regs-&gt;status32 which is</div><div class='del'>-		 *      saved copy of status32_l2 when l2 ISR happened</div><div class='del'>-		 */</div><div class='del'>-		struct pt_regs *pt = get_irq_regs();</div><div class='del'>-		if ((flags &amp; STATUS_A2_MASK) &amp;&amp; pt &amp;&amp;</div><div class='del'>-		    (pt-&gt;status32 &amp; STATUS_A1_MASK)) {</div><div class='del'>-			/*flags &amp;= ~(STATUS_E1_MASK | STATUS_E2_MASK); */</div><div class='del'>-			flags &amp;= ~(STATUS_E1_MASK);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	arch_local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else /* ! CONFIG_ARC_COMPACT_IRQ_LEVELS */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Simpler version for only 1 level of interrupt</div><div class='del'>- * Here we only Worry about Level 1 Bits</div><div class='del'>- */</div><div class='del'>-void arch_local_irq_enable(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * ARC IDE Drivers tries to re-enable interrupts from hard-isr</div><div class='del'>-	 * context which is simply wrong</div><div class='del'>-	 */</div><div class='del'>-	if (in_irq()) {</div><div class='del'>-		WARN_ONCE(1, "IRQ enabled from hard-isr");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	flags = arch_local_save_flags();</div><div class='del'>-	flags |= (STATUS_E1_MASK | STATUS_E2_MASK);</div><div class='del'>-	arch_local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-EXPORT_SYMBOL(arch_local_irq_enable);</div><div class='head'>diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c<br/>new file mode 100644<br/>index 000000000000..2fb86589054d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/mcip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/mcip.c</a></div><div class='hunk'>@@ -0,0 +1,356 @@</div><div class='add'>+/*</div><div class='add'>+ * ARC ARConnect (MultiCore IP) support (formerly known as MCIP)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;asm/mcip.h&gt;</div><div class='add'>+</div><div class='add'>+static char smp_cpuinfo_buf[128];</div><div class='add'>+static int idu_detected;</div><div class='add'>+</div><div class='add'>+static DEFINE_RAW_SPINLOCK(mcip_lock);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Any SMP specific init any CPU does when it comes up.</div><div class='add'>+ * Here we setup the CPU to enable Inter-Processor-Interrupts</div><div class='add'>+ * Called for each CPU</div><div class='add'>+ * -Master      : init_IRQ()</div><div class='add'>+ * -Other(s)    : start_kernel_secondary()</div><div class='add'>+ */</div><div class='add'>+void mcip_init_smp(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	smp_ipi_irq_setup(cpu, IPI_IRQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcip_ipi_send(int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ipi_was_pending;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: We must spin here if the other cpu hasn't yet</div><div class='add'>+	 * serviced a previous message. This can burn lots</div><div class='add'>+	 * of time, but we MUST follows this protocol or</div><div class='add'>+	 * ipi messages can be lost!!!</div><div class='add'>+	 * Also, we must release the lock in this loop because</div><div class='add'>+	 * the other side may get to this same loop and not</div><div class='add'>+	 * be able to ack -- thus causing deadlock.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+		__mcip_cmd(CMD_INTRPT_READ_STATUS, cpu);</div><div class='add'>+		ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK);</div><div class='add'>+		if (ipi_was_pending == 0)</div><div class='add'>+			break; /* break out but keep lock */</div><div class='add'>+		raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	__mcip_cmd(CMD_INTRPT_GENERATE_IRQ, cpu);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_IPI_DBG</div><div class='add'>+	if (ipi_was_pending)</div><div class='add'>+		pr_info("IPI ACK delayed from cpu %d\n", cpu);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcip_ipi_clear(int irq)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu, c;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int __maybe_unused copy;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Who sent the IPI */</div><div class='add'>+	__mcip_cmd(CMD_INTRPT_CHECK_SOURCE, 0);</div><div class='add'>+</div><div class='add'>+	copy = cpu = read_aux_reg(ARC_REG_MCIP_READBACK);	/* 1,2,4,8... */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In rare case, multiple concurrent IPIs sent to same target can</div><div class='add'>+	 * possibly be coalesced by MCIP into 1 asserted IRQ, so @cpus can be</div><div class='add'>+	 * "vectored" (multiple bits sets) as opposed to typical single bit</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		c = __ffs(cpu);			/* 0,1,2,3 */</div><div class='add'>+		__mcip_cmd(CMD_INTRPT_GENERATE_ACK, c);</div><div class='add'>+		cpu &amp;= ~(1U &lt;&lt; c);</div><div class='add'>+	} while (cpu);</div><div class='add'>+</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_IPI_DBG</div><div class='add'>+	if (c != __ffs(copy))</div><div class='add'>+		pr_info("IPIs from %x coalesced to %x\n",</div><div class='add'>+			copy, raw_smp_processor_id());</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+volatile int wake_flag;</div><div class='add'>+</div><div class='add'>+static void mcip_wakeup_cpu(int cpu, unsigned long pc)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(cpu == 0);</div><div class='add'>+	wake_flag = cpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arc_platform_smp_wait_to_boot(int cpu)</div><div class='add'>+{</div><div class='add'>+	while (wake_flag != cpu)</div><div class='add'>+		;</div><div class='add'>+</div><div class='add'>+	wake_flag = 0;</div><div class='add'>+	__asm__ __volatile__("j @first_lines_of_secondary	\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct plat_smp_ops plat_smp_ops = {</div><div class='add'>+	.info		= smp_cpuinfo_buf,</div><div class='add'>+	.cpu_kick	= mcip_wakeup_cpu,</div><div class='add'>+	.ipi_send	= mcip_ipi_send,</div><div class='add'>+	.ipi_clear	= mcip_ipi_clear,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void mcip_init_early_smp(void)</div><div class='add'>+{</div><div class='add'>+#define IS_AVAIL1(var, str)    ((var) ? str : "")</div><div class='add'>+</div><div class='add'>+	struct mcip_bcr {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		unsigned int pad3:8,</div><div class='add'>+			     idu:1, llm:1, num_cores:6,</div><div class='add'>+			     iocoh:1,  grtc:1, dbg:1, pad2:1,</div><div class='add'>+			     msg:1, sem:1, ipi:1, pad:1,</div><div class='add'>+			     ver:8;</div><div class='add'>+#else</div><div class='add'>+		unsigned int ver:8,</div><div class='add'>+			     pad:1, ipi:1, sem:1, msg:1,</div><div class='add'>+			     pad2:1, dbg:1, grtc:1, iocoh:1,</div><div class='add'>+			     num_cores:6, llm:1, idu:1,</div><div class='add'>+			     pad3:8;</div><div class='add'>+#endif</div><div class='add'>+	} mp;</div><div class='add'>+</div><div class='add'>+	READ_BCR(ARC_REG_MCIP_BCR, mp);</div><div class='add'>+</div><div class='add'>+	sprintf(smp_cpuinfo_buf,</div><div class='add'>+		"Extn [SMP]\t: ARConnect (v%d): %d cores with %s%s%s%s\n",</div><div class='add'>+		mp.ver, mp.num_cores,</div><div class='add'>+		IS_AVAIL1(mp.ipi, "IPI "),</div><div class='add'>+		IS_AVAIL1(mp.idu, "IDU "),</div><div class='add'>+		IS_AVAIL1(mp.dbg, "DEBUG "),</div><div class='add'>+		IS_AVAIL1(mp.grtc, "GRTC"));</div><div class='add'>+</div><div class='add'>+	idu_detected = mp.idu;</div><div class='add'>+</div><div class='add'>+	if (mp.dbg) {</div><div class='add'>+		__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);</div><div class='add'>+		__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) &amp;&amp; !mp.grtc)</div><div class='add'>+		panic("kernel trying to use non-existent GRTC\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * ARCv2 Interrupt Distribution Unit (IDU)</div><div class='add'>+ *</div><div class='add'>+ * Connects external "COMMON" IRQs to core intc, providing:</div><div class='add'>+ *  -dynamic routing (IRQ affinity)</div><div class='add'>+ *  -load balancing (Round Robin interrupt distribution)</div><div class='add'>+ *  -1:N distribution</div><div class='add'>+ *</div><div class='add'>+ * It physically resides in the MCIP hw block</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set the DEST for @cmn_irq to @cpu_mask (1 bit per core)</div><div class='add'>+ */</div><div class='add'>+static void idu_set_dest(unsigned int cmn_irq, unsigned int cpu_mask)</div><div class='add'>+{</div><div class='add'>+	__mcip_cmd_data(CMD_IDU_SET_DEST, cmn_irq, cpu_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idu_set_mode(unsigned int cmn_irq, unsigned int lvl,</div><div class='add'>+			   unsigned int distr)</div><div class='add'>+{</div><div class='add'>+	union {</div><div class='add'>+		unsigned int word;</div><div class='add'>+		struct {</div><div class='add'>+			unsigned int distr:2, pad:2, lvl:1, pad2:27;</div><div class='add'>+		};</div><div class='add'>+	} data;</div><div class='add'>+</div><div class='add'>+	data.distr = distr;</div><div class='add'>+	data.lvl = lvl;</div><div class='add'>+	__mcip_cmd_data(CMD_IDU_SET_MODE, cmn_irq, data.word);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idu_irq_mask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+	__mcip_cmd_data(CMD_IDU_SET_MASK, data-&gt;hwirq, 1);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idu_irq_unmask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+	__mcip_cmd_data(CMD_IDU_SET_MASK, data-&gt;hwirq, 0);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+static int</div><div class='add'>+idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask,</div><div class='add'>+		     bool force)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	cpumask_t online;</div><div class='add'>+</div><div class='add'>+	/* errout if no online cpu per @cpumask */</div><div class='add'>+	if (!cpumask_and(&amp;online, cpumask, cpu_online_mask))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+</div><div class='add'>+	idu_set_dest(data-&gt;hwirq, cpumask_bits(&amp;online)[0]);</div><div class='add'>+	idu_set_mode(data-&gt;hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR);</div><div class='add'>+</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+</div><div class='add'>+	return IRQ_SET_MASK_OK;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct irq_chip idu_irq_chip = {</div><div class='add'>+	.name			= "MCIP IDU Intc",</div><div class='add'>+	.irq_mask		= idu_irq_mask,</div><div class='add'>+	.irq_unmask		= idu_irq_unmask,</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	.irq_set_affinity       = idu_irq_set_affinity,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int idu_first_irq;</div><div class='add'>+</div><div class='add'>+static void idu_cascade_isr(unsigned int core_irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain = irq_desc_get_handler_data(desc);</div><div class='add'>+	unsigned int idu_irq;</div><div class='add'>+</div><div class='add'>+	idu_irq = core_irq - idu_first_irq;</div><div class='add'>+	generic_handle_irq(irq_find_mapping(domain, idu_irq));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_and_handler(virq, &amp;idu_irq_chip, handle_level_irq);</div><div class='add'>+	irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idu_irq_xlate(struct irq_domain *d, struct device_node *n,</div><div class='add'>+			 const u32 *intspec, unsigned int intsize,</div><div class='add'>+			 irq_hw_number_t *out_hwirq, unsigned int *out_type)</div><div class='add'>+{</div><div class='add'>+	irq_hw_number_t hwirq = *out_hwirq = intspec[0];</div><div class='add'>+	int distri = intspec[1];</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	*out_type = IRQ_TYPE_NONE;</div><div class='add'>+</div><div class='add'>+	/* XXX: validate distribution scheme again online cpu mask */</div><div class='add'>+	if (distri == 0) {</div><div class='add'>+		/* 0 - Round Robin to all cpus, otherwise 1 bit per core */</div><div class='add'>+		raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+		idu_set_dest(hwirq, BIT(num_online_cpus()) - 1);</div><div class='add'>+		idu_set_mode(hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR);</div><div class='add'>+		raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * DEST based distribution for Level Triggered intr can only</div><div class='add'>+		 * have 1 CPU, so generalize it to always contain 1 cpu</div><div class='add'>+		 */</div><div class='add'>+		int cpu = ffs(distri);</div><div class='add'>+</div><div class='add'>+		if (cpu != fls(distri))</div><div class='add'>+			pr_warn("IDU irq %lx distri mode set to cpu %x\n",</div><div class='add'>+				hwirq, cpu);</div><div class='add'>+</div><div class='add'>+		raw_spin_lock_irqsave(&amp;mcip_lock, flags);</div><div class='add'>+		idu_set_dest(hwirq, cpu);</div><div class='add'>+		idu_set_mode(hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_DEST);</div><div class='add'>+		raw_spin_unlock_irqrestore(&amp;mcip_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops idu_irq_ops = {</div><div class='add'>+	.xlate	= idu_irq_xlate,</div><div class='add'>+	.map	= idu_irq_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * [16, 23]: Statically assigned always private-per-core (Timers, WDT, IPI)</div><div class='add'>+ * [24, 23+C]: If C &gt; 0 then "C" common IRQs</div><div class='add'>+ * [24+C, N]: Not statically assigned, private-per-core</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int __init</div><div class='add'>+idu_of_init(struct device_node *intc, struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	/* Read IDU BCR to confirm nr_irqs */</div><div class='add'>+	int nr_irqs = of_irq_count(intc);</div><div class='add'>+	int i, irq;</div><div class='add'>+</div><div class='add'>+	if (!idu_detected)</div><div class='add'>+		panic("IDU not detected, but DeviceTree using it");</div><div class='add'>+</div><div class='add'>+	pr_info("MCIP: IDU referenced from Devicetree %d irqs\n", nr_irqs);</div><div class='add'>+</div><div class='add'>+	domain = irq_domain_add_linear(intc, nr_irqs, &amp;idu_irq_ops, NULL);</div><div class='add'>+</div><div class='add'>+	/* Parent interrupts (core-intc) are already mapped */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_irqs; i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * Return parent uplink IRQs (towards core intc) 24,25,.....</div><div class='add'>+		 * this step has been done before already</div><div class='add'>+		 * however we need it to get the parent virq and set IDU handler</div><div class='add'>+		 * as first level isr</div><div class='add'>+		 */</div><div class='add'>+		irq = irq_of_parse_and_map(intc, i);</div><div class='add'>+		if (!i)</div><div class='add'>+			idu_first_irq = irq;</div><div class='add'>+</div><div class='add'>+		irq_set_chained_handler_and_data(irq, idu_cascade_isr, domain);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__mcip_cmd(CMD_IDU_ENABLE, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+IRQCHIP_DECLARE(arcv2_idu_intc, "snps,archs-idu-intc", idu_of_init);</div><div class='head'>diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c<br/>index fd2ec50102f2..1287388c258a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/perf_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/perf_event.c</a></div><div class='hunk'>@@ -266,10 +266,9 @@ static int arc_pmu_add(struct perf_event *event, int flags)</div><div class='ctx'> </div><div class='ctx'> static int arc_pmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct arc_pmu *arc_pmu;</div><div class='ctx'> 	struct arc_reg_pct_build pct_bcr;</div><div class='ctx'> 	struct arc_reg_cc_build cc_bcr;</div><div class='del'>-	int i, j, ret;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	union cc_name {</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -336,9 +335,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* ARC 700 PMU does not support sampling events */</div><div class='ctx'> 	arc_pmu-&gt;pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;</div><div class='ctx'> </div><div class='del'>-	ret = perf_pmu_register(&amp;arc_pmu-&gt;pmu, pdev-&gt;name, PERF_TYPE_RAW);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return perf_pmu_register(&amp;arc_pmu-&gt;pmu, pdev-&gt;name, PERF_TYPE_RAW);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='head'>diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c<br/>index e095c557afdd..44092456776f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/process.c</a></div><div class='hunk'>@@ -44,7 +44,11 @@ SYSCALL_DEFINE0(arc_gettls)</div><div class='ctx'> void arch_cpu_idle(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* sleep, but enable all interrupts before committing */</div><div class='del'>-	__asm__("sleep 0x3");</div><div class='add'>+	if (is_isa_arcompact()) {</div><div class='add'>+		__asm__("sleep 0x3");</div><div class='add'>+	} else {</div><div class='add'>+		__asm__("sleep 0x10");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void ret_from_fork(void);</div><div class='hunk'>@@ -166,8 +170,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)</div><div class='ctx'> 	 * [L] ZOL loop inhibited to begin with - cleared by a LP insn</div><div class='ctx'> 	 * Interrupts enabled</div><div class='ctx'> 	 */</div><div class='del'>-	regs-&gt;status32 = STATUS_U_MASK | STATUS_L_MASK |</div><div class='del'>-			 STATUS_E1_MASK | STATUS_E2_MASK;</div><div class='add'>+	regs-&gt;status32 = STATUS_U_MASK | STATUS_L_MASK | ISA_INIT_STATUS_BITS;</div><div class='ctx'> </div><div class='ctx'> 	/* bogus seed values for debugging */</div><div class='ctx'> 	regs-&gt;lp_start = 0x10;</div><div class='hunk'>@@ -197,8 +200,11 @@ int elf_check_arch(const struct elf32_hdr *x)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int eflags;</div><div class='ctx'> </div><div class='del'>-	if (x-&gt;e_machine != EM_ARCOMPACT)</div><div class='add'>+	if (x-&gt;e_machine != EM_ARC_INUSE) {</div><div class='add'>+		pr_err("ELF not built for %s ISA\n",</div><div class='add'>+			is_isa_arcompact() ? "ARCompact":"ARCv2");</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	eflags = x-&gt;e_flags;</div><div class='ctx'> 	if ((eflags &amp; EF_ARC_OSABI_MSK) &lt; EF_ARC_OSABI_CURRENT) {</div><div class='head'>diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c<br/>index 13b3ffb27a38..4442204fe238 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/ptrace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/ptrace.c</a></div><div class='hunk'>@@ -47,10 +47,47 @@ static int genregs_get(struct task_struct *target,</div><div class='ctx'> 			offsetof(struct user_regs_struct, LOC) + 4);</div><div class='ctx'> </div><div class='ctx'> 	REG_O_ZERO(pad);</div><div class='del'>-	REG_O_CHUNK(scratch, callee, ptregs);</div><div class='add'>+	REG_O_ONE(scratch.bta, &amp;ptregs-&gt;bta);</div><div class='add'>+	REG_O_ONE(scratch.lp_start, &amp;ptregs-&gt;lp_start);</div><div class='add'>+	REG_O_ONE(scratch.lp_end, &amp;ptregs-&gt;lp_end);</div><div class='add'>+	REG_O_ONE(scratch.lp_count, &amp;ptregs-&gt;lp_count);</div><div class='add'>+	REG_O_ONE(scratch.status32, &amp;ptregs-&gt;status32);</div><div class='add'>+	REG_O_ONE(scratch.ret, &amp;ptregs-&gt;ret);</div><div class='add'>+	REG_O_ONE(scratch.blink, &amp;ptregs-&gt;blink);</div><div class='add'>+	REG_O_ONE(scratch.fp, &amp;ptregs-&gt;fp);</div><div class='add'>+	REG_O_ONE(scratch.gp, &amp;ptregs-&gt;r26);</div><div class='add'>+	REG_O_ONE(scratch.r12, &amp;ptregs-&gt;r12);</div><div class='add'>+	REG_O_ONE(scratch.r11, &amp;ptregs-&gt;r11);</div><div class='add'>+	REG_O_ONE(scratch.r10, &amp;ptregs-&gt;r10);</div><div class='add'>+	REG_O_ONE(scratch.r9, &amp;ptregs-&gt;r9);</div><div class='add'>+	REG_O_ONE(scratch.r8, &amp;ptregs-&gt;r8);</div><div class='add'>+	REG_O_ONE(scratch.r7, &amp;ptregs-&gt;r7);</div><div class='add'>+	REG_O_ONE(scratch.r6, &amp;ptregs-&gt;r6);</div><div class='add'>+	REG_O_ONE(scratch.r5, &amp;ptregs-&gt;r5);</div><div class='add'>+	REG_O_ONE(scratch.r4, &amp;ptregs-&gt;r4);</div><div class='add'>+	REG_O_ONE(scratch.r3, &amp;ptregs-&gt;r3);</div><div class='add'>+	REG_O_ONE(scratch.r2, &amp;ptregs-&gt;r2);</div><div class='add'>+	REG_O_ONE(scratch.r1, &amp;ptregs-&gt;r1);</div><div class='add'>+	REG_O_ONE(scratch.r0, &amp;ptregs-&gt;r0);</div><div class='add'>+	REG_O_ONE(scratch.sp, &amp;ptregs-&gt;sp);</div><div class='add'>+</div><div class='ctx'> 	REG_O_ZERO(pad2);</div><div class='del'>-	REG_O_CHUNK(callee, efa, cregs);</div><div class='del'>-	REG_O_CHUNK(efa, stop_pc, &amp;target-&gt;thread.fault_address);</div><div class='add'>+</div><div class='add'>+	REG_O_ONE(callee.r25, &amp;cregs-&gt;r25);</div><div class='add'>+	REG_O_ONE(callee.r24, &amp;cregs-&gt;r24);</div><div class='add'>+	REG_O_ONE(callee.r23, &amp;cregs-&gt;r23);</div><div class='add'>+	REG_O_ONE(callee.r22, &amp;cregs-&gt;r22);</div><div class='add'>+	REG_O_ONE(callee.r21, &amp;cregs-&gt;r21);</div><div class='add'>+	REG_O_ONE(callee.r20, &amp;cregs-&gt;r20);</div><div class='add'>+	REG_O_ONE(callee.r19, &amp;cregs-&gt;r19);</div><div class='add'>+	REG_O_ONE(callee.r18, &amp;cregs-&gt;r18);</div><div class='add'>+	REG_O_ONE(callee.r17, &amp;cregs-&gt;r17);</div><div class='add'>+	REG_O_ONE(callee.r16, &amp;cregs-&gt;r16);</div><div class='add'>+	REG_O_ONE(callee.r15, &amp;cregs-&gt;r15);</div><div class='add'>+	REG_O_ONE(callee.r14, &amp;cregs-&gt;r14);</div><div class='add'>+	REG_O_ONE(callee.r13, &amp;cregs-&gt;r13);</div><div class='add'>+</div><div class='add'>+	REG_O_ONE(efa, &amp;target-&gt;thread.fault_address);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		if (in_brkpt_trap(ptregs)) {</div><div class='hunk'>@@ -97,12 +134,51 @@ static int genregs_set(struct task_struct *target,</div><div class='ctx'> 			offsetof(struct user_regs_struct, LOC) + 4);</div><div class='ctx'> </div><div class='ctx'> 	REG_IGNORE_ONE(pad);</div><div class='del'>-	/* TBD: disallow updates to STATUS32 etc*/</div><div class='del'>-	REG_IN_CHUNK(scratch, pad2, ptregs);	/* pt_regs[bta..sp] */</div><div class='add'>+</div><div class='add'>+	REG_IN_ONE(scratch.bta, &amp;ptregs-&gt;bta);</div><div class='add'>+	REG_IN_ONE(scratch.lp_start, &amp;ptregs-&gt;lp_start);</div><div class='add'>+	REG_IN_ONE(scratch.lp_end, &amp;ptregs-&gt;lp_end);</div><div class='add'>+	REG_IN_ONE(scratch.lp_count, &amp;ptregs-&gt;lp_count);</div><div class='add'>+</div><div class='add'>+	REG_IGNORE_ONE(scratch.status32);</div><div class='add'>+</div><div class='add'>+	REG_IN_ONE(scratch.ret, &amp;ptregs-&gt;ret);</div><div class='add'>+	REG_IN_ONE(scratch.blink, &amp;ptregs-&gt;blink);</div><div class='add'>+	REG_IN_ONE(scratch.fp, &amp;ptregs-&gt;fp);</div><div class='add'>+	REG_IN_ONE(scratch.gp, &amp;ptregs-&gt;r26);</div><div class='add'>+	REG_IN_ONE(scratch.r12, &amp;ptregs-&gt;r12);</div><div class='add'>+	REG_IN_ONE(scratch.r11, &amp;ptregs-&gt;r11);</div><div class='add'>+	REG_IN_ONE(scratch.r10, &amp;ptregs-&gt;r10);</div><div class='add'>+	REG_IN_ONE(scratch.r9, &amp;ptregs-&gt;r9);</div><div class='add'>+	REG_IN_ONE(scratch.r8, &amp;ptregs-&gt;r8);</div><div class='add'>+	REG_IN_ONE(scratch.r7, &amp;ptregs-&gt;r7);</div><div class='add'>+	REG_IN_ONE(scratch.r6, &amp;ptregs-&gt;r6);</div><div class='add'>+	REG_IN_ONE(scratch.r5, &amp;ptregs-&gt;r5);</div><div class='add'>+	REG_IN_ONE(scratch.r4, &amp;ptregs-&gt;r4);</div><div class='add'>+	REG_IN_ONE(scratch.r3, &amp;ptregs-&gt;r3);</div><div class='add'>+	REG_IN_ONE(scratch.r2, &amp;ptregs-&gt;r2);</div><div class='add'>+	REG_IN_ONE(scratch.r1, &amp;ptregs-&gt;r1);</div><div class='add'>+	REG_IN_ONE(scratch.r0, &amp;ptregs-&gt;r0);</div><div class='add'>+	REG_IN_ONE(scratch.sp, &amp;ptregs-&gt;sp);</div><div class='add'>+</div><div class='ctx'> 	REG_IGNORE_ONE(pad2);</div><div class='del'>-	REG_IN_CHUNK(callee, efa, cregs);	/* callee_regs[r25..r13] */</div><div class='add'>+</div><div class='add'>+	REG_IN_ONE(callee.r25, &amp;cregs-&gt;r25);</div><div class='add'>+	REG_IN_ONE(callee.r24, &amp;cregs-&gt;r24);</div><div class='add'>+	REG_IN_ONE(callee.r23, &amp;cregs-&gt;r23);</div><div class='add'>+	REG_IN_ONE(callee.r22, &amp;cregs-&gt;r22);</div><div class='add'>+	REG_IN_ONE(callee.r21, &amp;cregs-&gt;r21);</div><div class='add'>+	REG_IN_ONE(callee.r20, &amp;cregs-&gt;r20);</div><div class='add'>+	REG_IN_ONE(callee.r19, &amp;cregs-&gt;r19);</div><div class='add'>+	REG_IN_ONE(callee.r18, &amp;cregs-&gt;r18);</div><div class='add'>+	REG_IN_ONE(callee.r17, &amp;cregs-&gt;r17);</div><div class='add'>+	REG_IN_ONE(callee.r16, &amp;cregs-&gt;r16);</div><div class='add'>+	REG_IN_ONE(callee.r15, &amp;cregs-&gt;r15);</div><div class='add'>+	REG_IN_ONE(callee.r14, &amp;cregs-&gt;r14);</div><div class='add'>+	REG_IN_ONE(callee.r13, &amp;cregs-&gt;r13);</div><div class='add'>+</div><div class='ctx'> 	REG_IGNORE_ONE(efa);			/* efa update invalid */</div><div class='del'>-	REG_IGNORE_ONE(stop_pc);			/* PC updated via @ret */</div><div class='add'>+	REG_IGNORE_ONE(stop_pc);		/* PC updated via @ret */</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -124,7 +200,7 @@ static const struct user_regset arc_regsets[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset_view user_arc_view = {</div><div class='ctx'> 	.name		= UTS_MACHINE,</div><div class='del'>-	.e_machine	= EM_ARCOMPACT,</div><div class='add'>+	.e_machine	= EM_ARC_INUSE,</div><div class='ctx'> 	.regsets	= arc_regsets,</div><div class='ctx'> 	.n		= ARRAY_SIZE(arc_regsets)</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c<br/>index 1d167c6df8ca..18cc01591c96 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/setup.c</a></div><div class='hunk'>@@ -30,6 +30,8 @@</div><div class='ctx'> </div><div class='ctx'> #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))</div><div class='ctx'> </div><div class='add'>+unsigned int intr_to_DE_cnt;</div><div class='add'>+</div><div class='ctx'> /* Part of U-boot ABI: see head.S */</div><div class='ctx'> int __initdata uboot_tag;</div><div class='ctx'> char __initdata *uboot_arg;</div><div class='hunk'>@@ -54,7 +56,7 @@ static void read_arc_build_cfg_regs(void)</div><div class='ctx'> 	cpu-&gt;vec_base = read_aux_reg(AUX_INTR_VEC_BASE);</div><div class='ctx'> </div><div class='ctx'> 	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);</div><div class='del'>-	cpu-&gt;uncached_base = uncached_space.start &lt;&lt; 24;</div><div class='add'>+	BUG_ON((uncached_space.start &lt;&lt; 24) != ARC_UNCACHED_ADDR_SPACE);</div><div class='ctx'> </div><div class='ctx'> 	READ_BCR(ARC_REG_MUL_BCR, cpu-&gt;extn_mpy);</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +98,7 @@ static void read_arc_build_cfg_regs(void)</div><div class='ctx'> 	read_decode_mmu_bcr();</div><div class='ctx'> 	read_decode_cache_bcr();</div><div class='ctx'> </div><div class='del'>-	{</div><div class='add'>+	if (is_isa_arcompact()) {</div><div class='ctx'> 		struct bcr_fp_arcompact sp, dp;</div><div class='ctx'> 		struct bcr_bpu_arcompact bpu;</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +114,19 @@ static void read_arc_build_cfg_regs(void)</div><div class='ctx'> 			cpu-&gt;bpu.num_cache = 256 &lt;&lt; (bpu.ent - 1);</div><div class='ctx'> 			cpu-&gt;bpu.num_pred = 256 &lt;&lt; (bpu.ent - 1);</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		struct bcr_fp_arcv2 spdp;</div><div class='add'>+		struct bcr_bpu_arcv2 bpu;</div><div class='add'>+</div><div class='add'>+		READ_BCR(ARC_REG_FP_V2_BCR, spdp);</div><div class='add'>+		cpu-&gt;extn.fpu_sp = spdp.sp ? 1 : 0;</div><div class='add'>+		cpu-&gt;extn.fpu_dp = spdp.dp ? 1 : 0;</div><div class='add'>+</div><div class='add'>+		READ_BCR(ARC_REG_BPU_BCR, bpu);</div><div class='add'>+		cpu-&gt;bpu.ver = bpu.ver;</div><div class='add'>+		cpu-&gt;bpu.full = bpu.ft;</div><div class='add'>+		cpu-&gt;bpu.num_cache = 256 &lt;&lt; bpu.bce;</div><div class='add'>+		cpu-&gt;bpu.num_pred = 2048 &lt;&lt; bpu.pte;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	READ_BCR(ARC_REG_AP_BCR, bcr);</div><div class='hunk'>@@ -127,16 +142,22 @@ static void read_arc_build_cfg_regs(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct cpuinfo_data arc_cpu_tbl[] = {</div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> 	{ {0x20, "ARC 600"      }, 0x2F},</div><div class='ctx'> 	{ {0x30, "ARC 700"      }, 0x33},</div><div class='ctx'> 	{ {0x34, "ARC 700 R4.10"}, 0x34},</div><div class='ctx'> 	{ {0x35, "ARC 700 R4.11"}, 0x35},</div><div class='add'>+#else</div><div class='add'>+	{ {0x50, "ARC HS38 R2.0"}, 0x51},</div><div class='add'>+	{ {0x52, "ARC HS38 R2.1"}, 0x52},</div><div class='add'>+#endif</div><div class='ctx'> 	{ {0x00, NULL		} }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define IS_AVAIL1(v, str)	((v) ? str : "")</div><div class='del'>-#define IS_USED(cfg)		(IS_ENABLED(cfg) ? "" : "(not used) ")</div><div class='del'>-#define IS_AVAIL2(v, str, cfg)  IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))</div><div class='add'>+#define IS_AVAIL1(v, s)		((v) ? s : "")</div><div class='add'>+#define IS_USED_RUN(v)		((v) ? "" : "(not used) ")</div><div class='add'>+#define IS_USED_CFG(cfg)	IS_USED_RUN(IS_ENABLED(cfg))</div><div class='add'>+#define IS_AVAIL2(v, s, cfg)	IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg))</div><div class='ctx'> </div><div class='ctx'> static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)</div><div class='ctx'> {</div><div class='hunk'>@@ -149,13 +170,17 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	FIX_PTR(cpu);</div><div class='ctx'> </div><div class='del'>-	{</div><div class='add'>+	if (is_isa_arcompact()) {</div><div class='ctx'> 		isa_nm = "ARCompact";</div><div class='ctx'> 		be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);</div><div class='ctx'> </div><div class='ctx'> 		atomic = cpu-&gt;isa.atomic1;</div><div class='ctx'> 		if (!cpu-&gt;isa.ver)	/* ISA BCR absent, use Kconfig info */</div><div class='ctx'> 			atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);</div><div class='add'>+	} else {</div><div class='add'>+		isa_nm = "ARCv2";</div><div class='add'>+		be = cpu-&gt;isa.be;</div><div class='add'>+		atomic = cpu-&gt;isa.atomic;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	n += scnprintf(buf + n, len - n,</div><div class='hunk'>@@ -183,16 +208,34 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)</div><div class='ctx'> 	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",</div><div class='ctx'> 		       IS_AVAIL1(cpu-&gt;timers.t0, "Timer0 "),</div><div class='ctx'> 		       IS_AVAIL1(cpu-&gt;timers.t1, "Timer1 "),</div><div class='del'>-		       IS_AVAIL2(cpu-&gt;timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));</div><div class='add'>+		       IS_AVAIL2(cpu-&gt;timers.rtc, "64-bit RTC ",</div><div class='add'>+				 CONFIG_ARC_HAS_RTC));</div><div class='ctx'> </div><div class='del'>-	n += i = scnprintf(buf + n, len - n, "%s%s",</div><div class='del'>-			   IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));</div><div class='add'>+	n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",</div><div class='add'>+			   IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),</div><div class='add'>+			   IS_AVAIL2(cpu-&gt;isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),</div><div class='add'>+			   IS_AVAIL1(cpu-&gt;isa.unalign, "unalign (not used)"));</div><div class='ctx'> </div><div class='ctx'> 	if (i)</div><div class='ctx'> 		n += scnprintf(buf + n, len - n, "\n\t\t: ");</div><div class='ctx'> </div><div class='add'>+	if (cpu-&gt;extn_mpy.ver) {</div><div class='add'>+		if (cpu-&gt;extn_mpy.ver &lt;= 0x2) {	/* ARCompact */</div><div class='add'>+			n += scnprintf(buf + n, len - n, "mpy ");</div><div class='add'>+		} else {</div><div class='add'>+			int opt = 2;	/* stock MPY/MPYH */</div><div class='add'>+</div><div class='add'>+			if (cpu-&gt;extn_mpy.dsp)	/* OPT 7-9 */</div><div class='add'>+				opt = cpu-&gt;extn_mpy.dsp + 6;</div><div class='add'>+</div><div class='add'>+			n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);</div><div class='add'>+		}</div><div class='add'>+		n += scnprintf(buf + n, len - n, "%s",</div><div class='add'>+			       IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",</div><div class='del'>-		       IS_AVAIL1(cpu-&gt;extn_mpy.ver, "mpy "),</div><div class='add'>+		       IS_AVAIL1(cpu-&gt;isa.div_rem, "div_rem "),</div><div class='ctx'> 		       IS_AVAIL1(cpu-&gt;extn.norm, "norm "),</div><div class='ctx'> 		       IS_AVAIL1(cpu-&gt;extn.barrel, "barrel-shift "),</div><div class='ctx'> 		       IS_AVAIL1(cpu-&gt;extn.swap, "swap "),</div><div class='hunk'>@@ -219,7 +262,7 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	n += scnprintf(buf + n, len - n,</div><div class='ctx'> 		       "Vector Table\t: %#x\nUncached Base\t: %#x\n",</div><div class='del'>-		       cpu-&gt;vec_base, cpu-&gt;uncached_base);</div><div class='add'>+		       cpu-&gt;vec_base, ARC_UNCACHED_ADDR_SPACE);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu-&gt;extn.fpu_sp || cpu-&gt;extn.fpu_dp)</div><div class='ctx'> 		n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",</div><div class='hunk'>@@ -254,8 +297,8 @@ static void arc_chk_core_config(void)</div><div class='ctx'> 	if (!cpu-&gt;timers.t1)</div><div class='ctx'> 		panic("Timer1 is not present!\n");</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) &amp;&amp; !cpu-&gt;timers.rtsc)</div><div class='del'>-		panic("RTSC is not present\n");</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARC_HAS_RTC) &amp;&amp; !cpu-&gt;timers.rtc)</div><div class='add'>+		panic("RTC is not present\n");</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_HAS_DCCM</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -323,13 +366,16 @@ static inline int is_kernel(unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> void __init setup_arch(char **cmdline_p)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_ARC_UBOOT_SUPPORT</div><div class='ctx'> 	/* make sure that uboot passed pointer to cmdline/dtb is valid */</div><div class='ctx'> 	if (uboot_tag &amp;&amp; is_kernel((unsigned long)uboot_arg))</div><div class='ctx'> 		panic("Invalid uboot arg\n");</div><div class='ctx'> </div><div class='ctx'> 	/* See if u-boot passed an external Device Tree blob */</div><div class='ctx'> 	machine_desc = setup_machine_fdt(uboot_arg);	/* uboot_tag == 2 */</div><div class='del'>-	if (!machine_desc) {</div><div class='add'>+	if (!machine_desc)</div><div class='add'>+#endif</div><div class='add'>+	{</div><div class='ctx'> 		/* No, so try the embedded one */</div><div class='ctx'> 		machine_desc = setup_machine_fdt(__dtb_start);</div><div class='ctx'> 		if (!machine_desc)</div><div class='head'>diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c<br/>index 2251fb4bbfd7..004b7f0bc76c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/signal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/signal.c</a></div><div class='hunk'>@@ -67,7 +67,33 @@ stash_usr_regs(struct rt_sigframe __user *sf, struct pt_regs *regs,</div><div class='ctx'> 	       sigset_t *set)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	err = __copy_to_user(&amp;(sf-&gt;uc.uc_mcontext.regs.scratch), regs,</div><div class='add'>+	struct user_regs_struct uregs;</div><div class='add'>+</div><div class='add'>+	uregs.scratch.bta	= regs-&gt;bta;</div><div class='add'>+	uregs.scratch.lp_start	= regs-&gt;lp_start;</div><div class='add'>+	uregs.scratch.lp_end	= regs-&gt;lp_end;</div><div class='add'>+	uregs.scratch.lp_count	= regs-&gt;lp_count;</div><div class='add'>+	uregs.scratch.status32	= regs-&gt;status32;</div><div class='add'>+	uregs.scratch.ret	= regs-&gt;ret;</div><div class='add'>+	uregs.scratch.blink	= regs-&gt;blink;</div><div class='add'>+	uregs.scratch.fp	= regs-&gt;fp;</div><div class='add'>+	uregs.scratch.gp	= regs-&gt;r26;</div><div class='add'>+	uregs.scratch.r12	= regs-&gt;r12;</div><div class='add'>+	uregs.scratch.r11	= regs-&gt;r11;</div><div class='add'>+	uregs.scratch.r10	= regs-&gt;r10;</div><div class='add'>+	uregs.scratch.r9	= regs-&gt;r9;</div><div class='add'>+	uregs.scratch.r8	= regs-&gt;r8;</div><div class='add'>+	uregs.scratch.r7	= regs-&gt;r7;</div><div class='add'>+	uregs.scratch.r6	= regs-&gt;r6;</div><div class='add'>+	uregs.scratch.r5	= regs-&gt;r5;</div><div class='add'>+	uregs.scratch.r4	= regs-&gt;r4;</div><div class='add'>+	uregs.scratch.r3	= regs-&gt;r3;</div><div class='add'>+	uregs.scratch.r2	= regs-&gt;r2;</div><div class='add'>+	uregs.scratch.r1	= regs-&gt;r1;</div><div class='add'>+	uregs.scratch.r0	= regs-&gt;r0;</div><div class='add'>+	uregs.scratch.sp	= regs-&gt;sp;</div><div class='add'>+</div><div class='add'>+	err = __copy_to_user(&amp;(sf-&gt;uc.uc_mcontext.regs.scratch), &amp;uregs.scratch,</div><div class='ctx'> 			     sizeof(sf-&gt;uc.uc_mcontext.regs.scratch));</div><div class='ctx'> 	err |= __copy_to_user(&amp;sf-&gt;uc.uc_sigmask, set, sizeof(sigset_t));</div><div class='ctx'> </div><div class='hunk'>@@ -78,14 +104,40 @@ static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> 	int err;</div><div class='add'>+	struct user_regs_struct uregs;</div><div class='ctx'> </div><div class='ctx'> 	err = __copy_from_user(&amp;set, &amp;sf-&gt;uc.uc_sigmask, sizeof(set));</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='del'>-	err |= __copy_from_user(regs, &amp;(sf-&gt;uc.uc_mcontext.regs.scratch),</div><div class='add'>+	err |= __copy_from_user(&amp;uregs.scratch,</div><div class='add'>+				&amp;(sf-&gt;uc.uc_mcontext.regs.scratch),</div><div class='ctx'> 				sizeof(sf-&gt;uc.uc_mcontext.regs.scratch));</div><div class='ctx'> </div><div class='add'>+	regs-&gt;bta	= uregs.scratch.bta;</div><div class='add'>+	regs-&gt;lp_start	= uregs.scratch.lp_start;</div><div class='add'>+	regs-&gt;lp_end	= uregs.scratch.lp_end;</div><div class='add'>+	regs-&gt;lp_count	= uregs.scratch.lp_count;</div><div class='add'>+	regs-&gt;status32	= uregs.scratch.status32;</div><div class='add'>+	regs-&gt;ret	= uregs.scratch.ret;</div><div class='add'>+	regs-&gt;blink	= uregs.scratch.blink;</div><div class='add'>+	regs-&gt;fp	= uregs.scratch.fp;</div><div class='add'>+	regs-&gt;r26	= uregs.scratch.gp;</div><div class='add'>+	regs-&gt;r12	= uregs.scratch.r12;</div><div class='add'>+	regs-&gt;r11	= uregs.scratch.r11;</div><div class='add'>+	regs-&gt;r10	= uregs.scratch.r10;</div><div class='add'>+	regs-&gt;r9	= uregs.scratch.r9;</div><div class='add'>+	regs-&gt;r8	= uregs.scratch.r8;</div><div class='add'>+	regs-&gt;r7	= uregs.scratch.r7;</div><div class='add'>+	regs-&gt;r6	= uregs.scratch.r6;</div><div class='add'>+	regs-&gt;r5	= uregs.scratch.r5;</div><div class='add'>+	regs-&gt;r4	= uregs.scratch.r4;</div><div class='add'>+	regs-&gt;r3	= uregs.scratch.r3;</div><div class='add'>+	regs-&gt;r2	= uregs.scratch.r2;</div><div class='add'>+	regs-&gt;r1	= uregs.scratch.r1;</div><div class='add'>+	regs-&gt;r0	= uregs.scratch.r0;</div><div class='add'>+	regs-&gt;sp	= uregs.scratch.sp;</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -284,7 +336,7 @@ static void arc_restart_syscall(struct k_sigaction *ka, struct pt_regs *regs)</div><div class='ctx'> 		 * their orig user space value when we ret from kernel</div><div class='ctx'> 		 */</div><div class='ctx'> 		regs-&gt;r0 = regs-&gt;orig_r0;</div><div class='del'>-		regs-&gt;ret -= 4;</div><div class='add'>+		regs-&gt;ret -= is_isa_arcv2() ? 2 : 4;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -325,10 +377,10 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 		if (regs-&gt;r0 == -ERESTARTNOHAND ||</div><div class='ctx'> 		    regs-&gt;r0 == -ERESTARTSYS || regs-&gt;r0 == -ERESTARTNOINTR) {</div><div class='ctx'> 			regs-&gt;r0 = regs-&gt;orig_r0;</div><div class='del'>-			regs-&gt;ret -= 4;</div><div class='add'>+			regs-&gt;ret -= is_isa_arcv2() ? 2 : 4;</div><div class='ctx'> 		} else if (regs-&gt;r0 == -ERESTART_RESTARTBLOCK) {</div><div class='ctx'> 			regs-&gt;r8 = __NR_restart_syscall;</div><div class='del'>-			regs-&gt;ret -= 4;</div><div class='add'>+			regs-&gt;ret -= is_isa_arcv2() ? 2 : 4;</div><div class='ctx'> 		}</div><div class='ctx'> 		syscall_wont_restart(regs);	/* No more restarts */</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c<br/>index 6a400b1b0b62..be13d12420ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/smp.c</a></div><div class='hunk'>@@ -31,7 +31,7 @@ arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;</div><div class='ctx'> arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-struct plat_smp_ops  plat_smp_ops;</div><div class='add'>+struct plat_smp_ops  __weak plat_smp_ops;</div><div class='ctx'> </div><div class='ctx'> /* XXX: per cpu ? Only needed once in early seconday boot */</div><div class='ctx'> struct task_struct *secondary_idle_tsk;</div><div class='hunk'>@@ -182,7 +182,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> /*</div><div class='ctx'>  * not supported here</div><div class='ctx'>  */</div><div class='del'>-int __init setup_profiling_timer(unsigned int multiplier)</div><div class='add'>+int setup_profiling_timer(unsigned int multiplier)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='hunk'>@@ -278,8 +278,10 @@ static void ipi_cpu_stop(void)</div><div class='ctx'> 	machine_halt();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __do_IPI(unsigned long msg)</div><div class='add'>+static inline int __do_IPI(unsigned long msg)</div><div class='ctx'> {</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='ctx'> 	switch (msg) {</div><div class='ctx'> 	case IPI_RESCHEDULE:</div><div class='ctx'> 		scheduler_ipi();</div><div class='hunk'>@@ -294,8 +296,10 @@ static inline void __do_IPI(unsigned long msg)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		pr_warn("IPI with unexpected msg %ld\n", msg);</div><div class='add'>+		rc = 1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -305,6 +309,7 @@ static inline void __do_IPI(unsigned long msg)</div><div class='ctx'> irqreturn_t do_IPI(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pending;</div><div class='add'>+	unsigned long __maybe_unused copy;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("IPI [%ld] received on cpu %d\n",</div><div class='ctx'> 		 *this_cpu_ptr(&amp;ipi_data), smp_processor_id());</div><div class='hunk'>@@ -316,11 +321,18 @@ irqreturn_t do_IPI(int irq, void *dev_id)</div><div class='ctx'> 	 * "dequeue" the msg corresponding to this IPI (and possibly other</div><div class='ctx'> 	 * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)</div><div class='ctx'> 	 */</div><div class='del'>-	pending = xchg(this_cpu_ptr(&amp;ipi_data), 0);</div><div class='add'>+	copy = pending = xchg(this_cpu_ptr(&amp;ipi_data), 0);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		unsigned long msg = __ffs(pending);</div><div class='del'>-		__do_IPI(msg);</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		rc = __do_IPI(msg);</div><div class='add'>+#ifdef CONFIG_ARC_IPI_DBG</div><div class='add'>+		/* IPI received but no valid @msg */</div><div class='add'>+		if (rc)</div><div class='add'>+			pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);</div><div class='add'>+#endif</div><div class='ctx'> 		pending &amp;= ~(1U &lt;&lt; msg);</div><div class='ctx'> 	} while (pending);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/stacktrace.c b/arch/arc/kernel/stacktrace.c<br/>index 92320d6f737c..001de4ce711e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/stacktrace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/stacktrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/stacktrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/stacktrace.c</a></div><div class='hunk'>@@ -122,19 +122,17 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,</div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		address = UNW_PC(&amp;frame_info);</div><div class='ctx'> </div><div class='del'>-		if (address &amp;&amp; __kernel_text_address(address)) {</div><div class='del'>-			if (consumer_fn(address, arg) == -1)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='add'>+		if (!address || !__kernel_text_address(address))</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		ret = arc_unwind(&amp;frame_info);</div><div class='add'>+		if (consumer_fn(address, arg) == -1)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		if (ret == 0) {</div><div class='del'>-			frame_info.regs.r63 = frame_info.regs.r31;</div><div class='del'>-			continue;</div><div class='del'>-		} else {</div><div class='add'>+		ret = arc_unwind(&amp;frame_info);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		frame_info.regs.r63 = frame_info.regs.r31;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return address;		/* return the last address it saw */</div><div class='head'>diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c<br/>index dbe74f418019..3364d2bbc515 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/time.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'>  * while TIMER1 for free running (clocksource)</div><div class='ctx'>  *</div><div class='ctx'>  * Newer ARC700 cores have 64bit clk fetching RTSC insn, preferred over TIMER1</div><div class='add'>+ * which however is currently broken</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='hunk'>@@ -44,6 +45,8 @@</div><div class='ctx'> #include &lt;asm/clk.h&gt;</div><div class='ctx'> #include &lt;asm/mach_desc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/mcip.h&gt;</div><div class='add'>+</div><div class='ctx'> /* Timer related Aux registers */</div><div class='ctx'> #define ARC_REG_TIMER0_LIMIT	0x23	/* timer 0 limit */</div><div class='ctx'> #define ARC_REG_TIMER0_CTRL	0x22	/* timer 0 control */</div><div class='hunk'>@@ -59,14 +62,10 @@</div><div class='ctx'> </div><div class='ctx'> /********** Clock Source Device *********/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARC_HAS_RTSC</div><div class='add'>+#ifdef CONFIG_ARC_HAS_GRTC</div><div class='ctx'> </div><div class='del'>-int arc_counter_setup(void)</div><div class='add'>+static int arc_counter_setup(void)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * For SMP this needs to be 0. However Kconfig glue doesn't</div><div class='del'>-	 * enable this option for SMP configs</div><div class='del'>-	 */</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -75,45 +74,84 @@ static cycle_t arc_counter_read(struct clocksource *cs)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	union {</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-		struct { u32 high, low; };</div><div class='add'>+		struct { u32 h, l; };</div><div class='ctx'> #else</div><div class='del'>-		struct { u32 low, high; };</div><div class='add'>+		struct { u32 l, h; };</div><div class='ctx'> #endif</div><div class='ctx'> 		cycle_t  full;</div><div class='ctx'> 	} stamp;</div><div class='ctx'> </div><div class='del'>-	flags = arch_local_irq_save();</div><div class='add'>+	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile(</div><div class='del'>-	"	.extCoreRegister tsch, 58,  r, cannot_shortcut	\n"</div><div class='del'>-	"	rtsc %0, 0	\n"</div><div class='del'>-	"	mov  %1, 0	\n"</div><div class='del'>-	: "=r" (stamp.low), "=r" (stamp.high));</div><div class='add'>+	__mcip_cmd(CMD_GRTC_READ_LO, 0);</div><div class='add'>+	stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);</div><div class='add'>+</div><div class='add'>+	__mcip_cmd(CMD_GRTC_READ_HI, 0);</div><div class='add'>+	stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);</div><div class='ctx'> </div><div class='del'>-	arch_local_irq_restore(flags);</div><div class='add'>+	local_irq_restore(flags);</div><div class='ctx'> </div><div class='ctx'> 	return stamp.full;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct clocksource arc_counter = {</div><div class='del'>-	.name   = "ARC RTSC",</div><div class='del'>-	.rating = 300,</div><div class='add'>+	.name   = "ARConnect GRTC",</div><div class='add'>+	.rating = 400,</div><div class='ctx'> 	.read   = arc_counter_read,</div><div class='del'>-	.mask   = CLOCKSOURCE_MASK(32),</div><div class='add'>+	.mask   = CLOCKSOURCE_MASK(64),</div><div class='ctx'> 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#else /* !CONFIG_ARC_HAS_RTSC */</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_HAS_RTC</div><div class='add'>+</div><div class='add'>+#define AUX_RTC_CTRL	0x103</div><div class='add'>+#define AUX_RTC_LOW	0x104</div><div class='add'>+#define AUX_RTC_HIGH	0x105</div><div class='ctx'> </div><div class='del'>-static bool is_usable_as_clocksource(void)</div><div class='add'>+int arc_counter_setup(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	return 0;</div><div class='add'>+	write_aux_reg(AUX_RTC_CTRL, 1);</div><div class='add'>+</div><div class='add'>+	/* Not usable in SMP */</div><div class='add'>+	return !IS_ENABLED(CONFIG_SMP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t arc_counter_read(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	unsigned long status;</div><div class='add'>+	union {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		struct { u32 high, low; };</div><div class='ctx'> #else</div><div class='del'>-	return 1;</div><div class='add'>+		struct { u32 low, high; };</div><div class='ctx'> #endif</div><div class='add'>+		cycle_t  full;</div><div class='add'>+	} stamp;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile(</div><div class='add'>+	"1:						\n"</div><div class='add'>+	"	lr		%0, [AUX_RTC_LOW]	\n"</div><div class='add'>+	"	lr		%1, [AUX_RTC_HIGH]	\n"</div><div class='add'>+	"	lr		%2, [AUX_RTC_CTRL]	\n"</div><div class='add'>+	"	bbit0.nt	%2, 31, 1b		\n"</div><div class='add'>+	: "=r" (stamp.low), "=r" (stamp.high), "=r" (status));</div><div class='add'>+</div><div class='add'>+	return stamp.full;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct clocksource arc_counter = {</div><div class='add'>+	.name   = "ARCv2 RTC",</div><div class='add'>+	.rating = 350,</div><div class='add'>+	.read   = arc_counter_read,</div><div class='add'>+	.mask   = CLOCKSOURCE_MASK(64),</div><div class='add'>+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_ARC_HAS_RTC */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * set 32bit TIMER1 to keep counting monotonically and wraparound</div><div class='ctx'>  */</div><div class='hunk'>@@ -123,7 +161,8 @@ int arc_counter_setup(void)</div><div class='ctx'> 	write_aux_reg(ARC_REG_TIMER1_CNT, 0);</div><div class='ctx'> 	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);</div><div class='ctx'> </div><div class='del'>-	return is_usable_as_clocksource();</div><div class='add'>+	/* Not usable in SMP */</div><div class='add'>+	return !IS_ENABLED(CONFIG_SMP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static cycle_t arc_counter_read(struct clocksource *cs)</div><div class='hunk'>@@ -140,6 +179,7 @@ static struct clocksource arc_counter = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /********** Clock Event Device *********/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c<br/>index e00a01879025..a6f91e88ce36 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/kernel/troubleshoot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/kernel/troubleshoot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/kernel/troubleshoot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/kernel/troubleshoot.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='ctx'> #include &lt;asm/arcregs.h&gt;</div><div class='add'>+#include &lt;asm/irqflags.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)</div><div class='hunk'>@@ -34,7 +35,10 @@ static noinline void print_reg_file(long *reg_rev, int start_num)</div><div class='ctx'> 			n += scnprintf(buf + n, len - n, "\n");</div><div class='ctx'> </div><div class='ctx'> 		/* because pt_regs has regs reversed: r12..r0, r25..r13 */</div><div class='del'>-		reg_rev--;</div><div class='add'>+		if (is_isa_arcv2() &amp;&amp; start_num == 0)</div><div class='add'>+			reg_rev++;</div><div class='add'>+		else</div><div class='add'>+			reg_rev--;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (start_num != 0)</div><div class='hunk'>@@ -54,7 +58,6 @@ static void show_callee_regs(struct callee_regs *cregs)</div><div class='ctx'> </div><div class='ctx'> static void print_task_path_n_nm(struct task_struct *tsk, char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct path path;</div><div class='ctx'> 	char *path_nm = NULL;</div><div class='ctx'> 	struct mm_struct *mm;</div><div class='ctx'> 	struct file *exe_file;</div><div class='hunk'>@@ -67,15 +70,12 @@ static void print_task_path_n_nm(struct task_struct *tsk, char *buf)</div><div class='ctx'> 	mmput(mm);</div><div class='ctx'> </div><div class='ctx'> 	if (exe_file) {</div><div class='del'>-		path = exe_file-&gt;f_path;</div><div class='del'>-		path_get(&amp;exe_file-&gt;f_path);</div><div class='add'>+		path_nm = file_path(exe_file, buf, 255);</div><div class='ctx'> 		fput(exe_file);</div><div class='del'>-		path_nm = d_path(&amp;path, buf, 255);</div><div class='del'>-		path_put(&amp;path);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	pr_info("Path: %s\n", path_nm);</div><div class='add'>+	pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void show_faulting_vma(unsigned long address, char *buf)</div><div class='hunk'>@@ -99,8 +99,7 @@ static void show_faulting_vma(unsigned long address, char *buf)</div><div class='ctx'> 	if (vma &amp;&amp; (vma-&gt;vm_start &lt;= address)) {</div><div class='ctx'> 		struct file *file = vma-&gt;vm_file;</div><div class='ctx'> 		if (file) {</div><div class='del'>-			struct path *path = &amp;file-&gt;f_path;</div><div class='del'>-			nm = d_path(path, buf, PAGE_SIZE - 1);</div><div class='add'>+			nm = file_path(file, buf, PAGE_SIZE - 1);</div><div class='ctx'> 			inode = file_inode(vma-&gt;vm_file);</div><div class='ctx'> 			dev = inode-&gt;i_sb-&gt;s_dev;</div><div class='ctx'> 			ino = inode-&gt;i_ino;</div><div class='hunk'>@@ -152,6 +151,15 @@ static void show_ecr_verbose(struct pt_regs *regs)</div><div class='ctx'> 				((cause_code == 0x02) ? "Write" : "EX"));</div><div class='ctx'> 	} else if (vec == ECR_V_INSN_ERR) {</div><div class='ctx'> 		pr_cont("Illegal Insn\n");</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+	} else if (vec == ECR_V_MEM_ERR) {</div><div class='add'>+		if (cause_code == 0x00)</div><div class='add'>+			pr_cont("Bus Error from Insn Mem\n");</div><div class='add'>+		else if (cause_code == 0x10)</div><div class='add'>+			pr_cont("Bus Error from Data Mem\n");</div><div class='add'>+		else</div><div class='add'>+			pr_cont("Bus Error, check PRM\n");</div><div class='add'>+#endif</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_cont("Check Programmer's Manual\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -185,12 +193,20 @@ void show_regs(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("[STAT32]: 0x%08lx", regs-&gt;status32);</div><div class='ctx'> </div><div class='del'>-#define STS_BIT(r, bit)	r-&gt;status32 &amp; STATUS_##bit##_MASK ? #bit : ""</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		pr_cont(" : %2s %2s %2s %2s %2s\n",</div><div class='del'>-			STS_BIT(regs, AE), STS_BIT(regs, A2), STS_BIT(regs, A1),</div><div class='del'>-			STS_BIT(regs, E2), STS_BIT(regs, E1));</div><div class='add'>+#define STS_BIT(r, bit)	r-&gt;status32 &amp; STATUS_##bit##_MASK ? #bit" " : ""</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='add'>+	pr_cont(" : %2s%2s%2s%2s%2s%2s%2s\n",</div><div class='add'>+			(regs-&gt;status32 &amp; STATUS_U_MASK) ? "U " : "K ",</div><div class='add'>+			STS_BIT(regs, DE), STS_BIT(regs, AE),</div><div class='add'>+			STS_BIT(regs, A2), STS_BIT(regs, A1),</div><div class='add'>+			STS_BIT(regs, E2), STS_BIT(regs, E1));</div><div class='add'>+#else</div><div class='add'>+	pr_cont(" : %2s%2s%2s%2s\n",</div><div class='add'>+			STS_BIT(regs, IE),</div><div class='add'>+			(regs-&gt;status32 &amp; STATUS_U_MASK) ? "U " : "K ",</div><div class='add'>+			STS_BIT(regs, DE), STS_BIT(regs, AE));</div><div class='add'>+#endif</div><div class='ctx'> 	pr_info("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n",</div><div class='ctx'> 		regs-&gt;bta, regs-&gt;sp, regs-&gt;fp);</div><div class='ctx'> 	pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",</div><div class='head'>diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile<br/>index db46e200baba..b1656d156097 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/lib/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/Makefile</a></div><div class='hunk'>@@ -5,5 +5,7 @@</div><div class='ctx'> # it under the terms of the GNU General Public License version 2 as</div><div class='ctx'> # published by the Free Software Foundation.</div><div class='ctx'> </div><div class='del'>-lib-y	:= strchr-700.o strcmp.o strcpy-700.o strlen.o</div><div class='del'>-lib-y	+= memcmp.o memcpy-700.o memset.o</div><div class='add'>+lib-y	:= strchr-700.o strcpy-700.o strlen.o memcmp.o</div><div class='add'>+</div><div class='add'>+lib-$(CONFIG_ISA_ARCOMPACT)	+= memcpy-700.o memset.o strcmp.o</div><div class='add'>+lib-$(CONFIG_ISA_ARCV2)		+= memcpy-archs.o memset-archs.o strcmp-archs.o</div><div class='head'>diff --git a/arch/arc/lib/memcmp.S b/arch/arc/lib/memcmp.S<br/>index 978bf8314dfb..a4015e7d9ab7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/lib/memcmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/lib/memcmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/lib/memcmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memcmp.S</a></div><div class='hunk'>@@ -24,14 +24,32 @@ ENTRY(memcmp)</div><div class='ctx'> 	ld	r4,[r0,0]</div><div class='ctx'> 	ld	r5,[r1,0]</div><div class='ctx'> 	lsr.f	lp_count,r3,3</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+	/* In ARCv2 a branch can't be the last instruction in a zero overhead</div><div class='add'>+	 * loop.</div><div class='add'>+	 * So we move the branch to the start of the loop, duplicate it</div><div class='add'>+	 * after the end, and set up r12 so that the branch isn't taken</div><div class='add'>+	 *  initially.</div><div class='add'>+	 */</div><div class='add'>+	mov_s	r12,WORD2</div><div class='add'>+	lpne	.Loop_end</div><div class='add'>+	brne	WORD2,r12,.Lodd</div><div class='add'>+	ld	WORD2,[r0,4]</div><div class='add'>+#else</div><div class='ctx'> 	lpne	.Loop_end</div><div class='ctx'> 	ld_s	WORD2,[r0,4]</div><div class='add'>+#endif</div><div class='ctx'> 	ld_s	r12,[r1,4]</div><div class='ctx'> 	brne	r4,r5,.Leven</div><div class='ctx'> 	ld.a	r4,[r0,8]</div><div class='ctx'> 	ld.a	r5,[r1,8]</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+.Loop_end:</div><div class='add'>+	brne	WORD2,r12,.Lodd</div><div class='add'>+#else</div><div class='ctx'> 	brne	WORD2,r12,.Lodd</div><div class='ctx'> .Loop_end:</div><div class='add'>+#endif</div><div class='ctx'> 	asl_s	SHIFT,SHIFT,3</div><div class='ctx'> 	bhs_s	.Last_cmp</div><div class='ctx'> 	brne	r4,r5,.Leven</div><div class='hunk'>@@ -89,7 +107,6 @@ ENTRY(memcmp)</div><div class='ctx'> 	bset.cs	r0,r0,31</div><div class='ctx'> .Lodd:</div><div class='ctx'> 	cmp_s	WORD2,r12</div><div class='del'>-</div><div class='ctx'> 	mov_s	r0,1</div><div class='ctx'> 	j_s.d	[blink]</div><div class='ctx'> 	bset.cs	r0,r0,31</div><div class='hunk'>@@ -100,14 +117,25 @@ ENTRY(memcmp)</div><div class='ctx'> 	ldb	r4,[r0,0]</div><div class='ctx'> 	ldb	r5,[r1,0]</div><div class='ctx'> 	lsr.f	lp_count,r3</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+	mov	r12,r3</div><div class='ctx'> 	lpne	.Lbyte_end</div><div class='add'>+	brne	r3,r12,.Lbyte_odd</div><div class='add'>+#else</div><div class='add'>+	lpne	.Lbyte_end</div><div class='add'>+#endif</div><div class='ctx'> 	ldb_s	r3,[r0,1]</div><div class='ctx'> 	ldb	r12,[r1,1]</div><div class='ctx'> 	brne	r4,r5,.Lbyte_even</div><div class='ctx'> 	ldb.a	r4,[r0,2]</div><div class='ctx'> 	ldb.a	r5,[r1,2]</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+.Lbyte_end:</div><div class='add'>+	brne	r3,r12,.Lbyte_odd</div><div class='add'>+#else</div><div class='ctx'> 	brne	r3,r12,.Lbyte_odd</div><div class='ctx'> .Lbyte_end:</div><div class='add'>+#endif</div><div class='ctx'> 	bcc	.Lbyte_even</div><div class='ctx'> 	brne	r4,r5,.Lbyte_even</div><div class='ctx'> 	ldb_s	r3,[r0,1]</div><div class='head'>diff --git a/arch/arc/lib/memcpy-archs.S b/arch/arc/lib/memcpy-archs.S<br/>new file mode 100644<br/>index 000000000000..1b2b3acfed52<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/lib/memcpy-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memcpy-archs.S</a></div><div class='hunk'>@@ -0,0 +1,236 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __LITTLE_ENDIAN__</div><div class='add'>+# define SHIFT_1(RX,RY,IMM)	asl	RX, RY, IMM	; &lt;&lt;</div><div class='add'>+# define SHIFT_2(RX,RY,IMM)	lsr	RX, RY, IMM	; &gt;&gt;</div><div class='add'>+# define MERGE_1(RX,RY,IMM)	asl	RX, RY, IMM</div><div class='add'>+# define MERGE_2(RX,RY,IMM)</div><div class='add'>+# define EXTRACT_1(RX,RY,IMM)	and	RX, RY, 0xFFFF</div><div class='add'>+# define EXTRACT_2(RX,RY,IMM)	lsr	RX, RY, IMM</div><div class='add'>+#else</div><div class='add'>+# define SHIFT_1(RX,RY,IMM)	lsr	RX, RY, IMM	; &gt;&gt;</div><div class='add'>+# define SHIFT_2(RX,RY,IMM)	asl	RX, RY, IMM	; &lt;&lt;</div><div class='add'>+# define MERGE_1(RX,RY,IMM)	asl	RX, RY, IMM	; &lt;&lt;</div><div class='add'>+# define MERGE_2(RX,RY,IMM)	asl	RX, RY, IMM	; &lt;&lt;</div><div class='add'>+# define EXTRACT_1(RX,RY,IMM)	lsr	RX, RY, IMM</div><div class='add'>+# define EXTRACT_2(RX,RY,IMM)	lsr	RX, RY, 0x08</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_HAS_LL64</div><div class='add'>+# define PREFETCH_READ(RX)	prefetch    [RX, 56]</div><div class='add'>+# define PREFETCH_WRITE(RX)	prefetchw   [RX, 64]</div><div class='add'>+# define LOADX(DST,RX)		ldd.ab	DST, [RX, 8]</div><div class='add'>+# define STOREX(SRC,RX)		std.ab	SRC, [RX, 8]</div><div class='add'>+# define ZOLSHFT		5</div><div class='add'>+# define ZOLAND			0x1F</div><div class='add'>+#else</div><div class='add'>+# define PREFETCH_READ(RX)	prefetch    [RX, 28]</div><div class='add'>+# define PREFETCH_WRITE(RX)	prefetchw   [RX, 32]</div><div class='add'>+# define LOADX(DST,RX)		ld.ab	DST, [RX, 4]</div><div class='add'>+# define STOREX(SRC,RX)		st.ab	SRC, [RX, 4]</div><div class='add'>+# define ZOLSHFT		4</div><div class='add'>+# define ZOLAND			0xF</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ENTRY(memcpy)</div><div class='add'>+	prefetch [r1]		; Prefetch the read location</div><div class='add'>+	prefetchw [r0]		; Prefetch the write location</div><div class='add'>+	mov.f	0, r2</div><div class='add'>+;;; if size is zero</div><div class='add'>+	jz.d	[blink]</div><div class='add'>+	mov	r3, r0		; don;t clobber ret val</div><div class='add'>+</div><div class='add'>+;;; if size &lt;= 8</div><div class='add'>+	cmp	r2, 8</div><div class='add'>+	bls.d	@smallchunk</div><div class='add'>+	mov.f	lp_count, r2</div><div class='add'>+</div><div class='add'>+	and.f	r4, r0, 0x03</div><div class='add'>+	rsub	lp_count, r4, 4</div><div class='add'>+	lpnz	@aligndestination</div><div class='add'>+	;; LOOP BEGIN</div><div class='add'>+	ldb.ab	r5, [r1,1]</div><div class='add'>+	sub	r2, r2, 1</div><div class='add'>+	stb.ab	r5, [r3,1]</div><div class='add'>+aligndestination:</div><div class='add'>+</div><div class='add'>+;;; Check the alignment of the source</div><div class='add'>+	and.f	r4, r1, 0x03</div><div class='add'>+	bnz.d	@sourceunaligned</div><div class='add'>+</div><div class='add'>+;;; CASE 0: Both source and destination are 32bit aligned</div><div class='add'>+;;; Convert len to Dwords, unfold x4</div><div class='add'>+	lsr.f	lp_count, r2, ZOLSHFT</div><div class='add'>+	lpnz	@copy32_64bytes</div><div class='add'>+	;; LOOP START</div><div class='add'>+	LOADX (r6, r1)</div><div class='add'>+	PREFETCH_READ (r1)</div><div class='add'>+	PREFETCH_WRITE (r3)</div><div class='add'>+	LOADX (r8, r1)</div><div class='add'>+	LOADX (r10, r1)</div><div class='add'>+	LOADX (r4, r1)</div><div class='add'>+	STOREX (r6, r3)</div><div class='add'>+	STOREX (r8, r3)</div><div class='add'>+	STOREX (r10, r3)</div><div class='add'>+	STOREX (r4, r3)</div><div class='add'>+copy32_64bytes:</div><div class='add'>+</div><div class='add'>+	and.f	lp_count, r2, ZOLAND ;Last remaining 31 bytes</div><div class='add'>+smallchunk:</div><div class='add'>+	lpnz	@copyremainingbytes</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ldb.ab	r5, [r1,1]</div><div class='add'>+	stb.ab	r5, [r3,1]</div><div class='add'>+copyremainingbytes:</div><div class='add'>+</div><div class='add'>+	j	[blink]</div><div class='add'>+;;; END CASE 0</div><div class='add'>+</div><div class='add'>+sourceunaligned:</div><div class='add'>+	cmp	r4, 2</div><div class='add'>+	beq.d	@unalignedOffby2</div><div class='add'>+	sub	r2, r2, 1</div><div class='add'>+</div><div class='add'>+	bhi.d	@unalignedOffby3</div><div class='add'>+	ldb.ab	r5, [r1, 1]</div><div class='add'>+</div><div class='add'>+;;; CASE 1: The source is unaligned, off by 1</div><div class='add'>+	;; Hence I need to read 1 byte for a 16bit alignment</div><div class='add'>+	;; and 2bytes to reach 32bit alignment</div><div class='add'>+	ldh.ab	r6, [r1, 2]</div><div class='add'>+	sub	r2, r2, 2</div><div class='add'>+	;; Convert to words, unfold x2</div><div class='add'>+	lsr.f	lp_count, r2, 3</div><div class='add'>+	MERGE_1 (r6, r6, 8)</div><div class='add'>+	MERGE_2 (r5, r5, 24)</div><div class='add'>+	or	r5, r5, r6</div><div class='add'>+</div><div class='add'>+	;; Both src and dst are aligned</div><div class='add'>+	lpnz	@copy8bytes_1</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ld.ab	r6, [r1, 4]</div><div class='add'>+	prefetch [r1, 28]	;Prefetch the next read location</div><div class='add'>+	ld.ab	r8, [r1,4]</div><div class='add'>+	prefetchw [r3, 32]	;Prefetch the next write location</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r7, r6, 24)</div><div class='add'>+	or	r7, r7, r5</div><div class='add'>+	SHIFT_2	(r5, r6, 8)</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r9, r8, 24)</div><div class='add'>+	or	r9, r9, r5</div><div class='add'>+	SHIFT_2	(r5, r8, 8)</div><div class='add'>+</div><div class='add'>+	st.ab	r7, [r3, 4]</div><div class='add'>+	st.ab	r9, [r3, 4]</div><div class='add'>+copy8bytes_1:</div><div class='add'>+</div><div class='add'>+	;; Write back the remaining 16bits</div><div class='add'>+	EXTRACT_1 (r6, r5, 16)</div><div class='add'>+	sth.ab	r6, [r3, 2]</div><div class='add'>+	;; Write back the remaining 8bits</div><div class='add'>+	EXTRACT_2 (r5, r5, 16)</div><div class='add'>+	stb.ab	r5, [r3, 1]</div><div class='add'>+</div><div class='add'>+	and.f	lp_count, r2, 0x07 ;Last 8bytes</div><div class='add'>+	lpnz	@copybytewise_1</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ldb.ab	r6, [r1,1]</div><div class='add'>+	stb.ab	r6, [r3,1]</div><div class='add'>+copybytewise_1:</div><div class='add'>+	j	[blink]</div><div class='add'>+</div><div class='add'>+unalignedOffby2:</div><div class='add'>+;;; CASE 2: The source is unaligned, off by 2</div><div class='add'>+	ldh.ab	r5, [r1, 2]</div><div class='add'>+	sub	r2, r2, 1</div><div class='add'>+</div><div class='add'>+	;; Both src and dst are aligned</div><div class='add'>+	;; Convert to words, unfold x2</div><div class='add'>+	lsr.f	lp_count, r2, 3</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+	asl.nz	r5, r5, 16</div><div class='add'>+#endif</div><div class='add'>+	lpnz	@copy8bytes_2</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ld.ab	r6, [r1, 4]</div><div class='add'>+	prefetch [r1, 28]	;Prefetch the next read location</div><div class='add'>+	ld.ab	r8, [r1,4]</div><div class='add'>+	prefetchw [r3, 32]	;Prefetch the next write location</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r7, r6, 16)</div><div class='add'>+	or	r7, r7, r5</div><div class='add'>+	SHIFT_2	(r5, r6, 16)</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r9, r8, 16)</div><div class='add'>+	or	r9, r9, r5</div><div class='add'>+	SHIFT_2	(r5, r8, 16)</div><div class='add'>+</div><div class='add'>+	st.ab	r7, [r3, 4]</div><div class='add'>+	st.ab	r9, [r3, 4]</div><div class='add'>+copy8bytes_2:</div><div class='add'>+</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+	lsr.nz	r5, r5, 16</div><div class='add'>+#endif</div><div class='add'>+	sth.ab	r5, [r3, 2]</div><div class='add'>+</div><div class='add'>+	and.f	lp_count, r2, 0x07 ;Last 8bytes</div><div class='add'>+	lpnz	@copybytewise_2</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ldb.ab	r6, [r1,1]</div><div class='add'>+	stb.ab	r6, [r3,1]</div><div class='add'>+copybytewise_2:</div><div class='add'>+	j	[blink]</div><div class='add'>+</div><div class='add'>+unalignedOffby3:</div><div class='add'>+;;; CASE 3: The source is unaligned, off by 3</div><div class='add'>+;;; Hence, I need to read 1byte for achieve the 32bit alignment</div><div class='add'>+</div><div class='add'>+	;; Both src and dst are aligned</div><div class='add'>+	;; Convert to words, unfold x2</div><div class='add'>+	lsr.f	lp_count, r2, 3</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+	asl.ne	r5, r5, 24</div><div class='add'>+#endif</div><div class='add'>+	lpnz	@copy8bytes_3</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ld.ab	r6, [r1, 4]</div><div class='add'>+	prefetch [r1, 28]	;Prefetch the next read location</div><div class='add'>+	ld.ab	r8, [r1,4]</div><div class='add'>+	prefetch [r3, 32]	;Prefetch the next write location</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r7, r6, 8)</div><div class='add'>+	or	r7, r7, r5</div><div class='add'>+	SHIFT_2	(r5, r6, 24)</div><div class='add'>+</div><div class='add'>+	SHIFT_1	(r9, r8, 8)</div><div class='add'>+	or	r9, r9, r5</div><div class='add'>+	SHIFT_2	(r5, r8, 24)</div><div class='add'>+</div><div class='add'>+	st.ab	r7, [r3, 4]</div><div class='add'>+	st.ab	r9, [r3, 4]</div><div class='add'>+copy8bytes_3:</div><div class='add'>+</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+	lsr.nz	r5, r5, 24</div><div class='add'>+#endif</div><div class='add'>+	stb.ab	r5, [r3, 1]</div><div class='add'>+</div><div class='add'>+	and.f	lp_count, r2, 0x07 ;Last 8bytes</div><div class='add'>+	lpnz	@copybytewise_3</div><div class='add'>+	;; LOOP START</div><div class='add'>+	ldb.ab	r6, [r1,1]</div><div class='add'>+	stb.ab	r6, [r3,1]</div><div class='add'>+copybytewise_3:</div><div class='add'>+	j	[blink]</div><div class='add'>+</div><div class='add'>+END(memcpy)</div><div class='head'>diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S<br/>new file mode 100644<br/>index 000000000000..92d573c734b5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/lib/memset-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/memset-archs.S</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#undef PREALLOC_NOT_AVAIL</div><div class='add'>+</div><div class='add'>+#ifdef PREALLOC_NOT_AVAIL</div><div class='add'>+#define PREWRITE(A,B)	prefetchw [(A),(B)]</div><div class='add'>+#else</div><div class='add'>+#define PREWRITE(A,B)	prealloc [(A),(B)]</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ENTRY(memset)</div><div class='add'>+	prefetchw [r0]		; Prefetch the write location</div><div class='add'>+	mov.f	0, r2</div><div class='add'>+;;; if size is zero</div><div class='add'>+	jz.d	[blink]</div><div class='add'>+	mov	r3, r0		; don't clobber ret val</div><div class='add'>+</div><div class='add'>+;;; if length &lt; 8</div><div class='add'>+	brls.d.nt	r2, 8, .Lsmallchunk</div><div class='add'>+	mov.f	lp_count,r2</div><div class='add'>+</div><div class='add'>+	and.f	r4, r0, 0x03</div><div class='add'>+	rsub	lp_count, r4, 4</div><div class='add'>+	lpnz	@.Laligndestination</div><div class='add'>+	;; LOOP BEGIN</div><div class='add'>+	stb.ab	r1, [r3,1]</div><div class='add'>+	sub	r2, r2, 1</div><div class='add'>+.Laligndestination:</div><div class='add'>+</div><div class='add'>+;;; Destination is aligned</div><div class='add'>+	and	r1, r1, 0xFF</div><div class='add'>+	asl	r4, r1, 8</div><div class='add'>+	or	r4, r4, r1</div><div class='add'>+	asl	r5, r4, 16</div><div class='add'>+	or	r5, r5, r4</div><div class='add'>+	mov	r4, r5</div><div class='add'>+</div><div class='add'>+	sub3	lp_count, r2, 8</div><div class='add'>+	cmp     r2, 64</div><div class='add'>+	bmsk.hi	r2, r2, 5</div><div class='add'>+	mov.ls	lp_count, 0</div><div class='add'>+	add3.hi	r2, r2, 8</div><div class='add'>+</div><div class='add'>+;;; Convert len to Dwords, unfold x8</div><div class='add'>+	lsr.f	lp_count, lp_count, 6</div><div class='add'>+	lpnz	@.Lset64bytes</div><div class='add'>+	;; LOOP START</div><div class='add'>+	PREWRITE(r3, 64)	;Prefetch the next write location</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+.Lset64bytes:</div><div class='add'>+</div><div class='add'>+	lsr.f	lp_count, r2, 5 ;Last remaining  max 124 bytes</div><div class='add'>+	lpnz	.Lset32bytes</div><div class='add'>+	;; LOOP START</div><div class='add'>+	prefetchw   [r3, 32]	;Prefetch the next write location</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+	std.ab	r4, [r3, 8]</div><div class='add'>+.Lset32bytes:</div><div class='add'>+</div><div class='add'>+	and.f	lp_count, r2, 0x1F ;Last remaining 31 bytes</div><div class='add'>+.Lsmallchunk:</div><div class='add'>+	lpnz	.Lcopy3bytes</div><div class='add'>+	;; LOOP START</div><div class='add'>+	stb.ab	r1, [r3, 1]</div><div class='add'>+.Lcopy3bytes:</div><div class='add'>+</div><div class='add'>+	j	[blink]</div><div class='add'>+</div><div class='add'>+END(memset)</div><div class='add'>+</div><div class='add'>+ENTRY(memzero)</div><div class='add'>+    ; adjust bzero args to memset args</div><div class='add'>+    mov r2, r1</div><div class='add'>+    b.d  memset    ;tail call so need to tinker with blink</div><div class='add'>+    mov r1, 0</div><div class='add'>+END(memzero)</div><div class='head'>diff --git a/arch/arc/lib/strcmp-archs.S b/arch/arc/lib/strcmp-archs.S<br/>new file mode 100644<br/>index 000000000000..4f338eec3365<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/lib/strcmp-archs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/lib/strcmp-archs.S</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+ENTRY(strcmp)</div><div class='add'>+	or	r2, r0, r1</div><div class='add'>+	bmsk_s	r2, r2, 1</div><div class='add'>+	brne	r2, 0, @.Lcharloop</div><div class='add'>+</div><div class='add'>+;;; s1 and s2 are word aligned</div><div class='add'>+	ld.ab	r2, [r0, 4]</div><div class='add'>+</div><div class='add'>+	mov_s	r12, 0x01010101</div><div class='add'>+	ror	r11, r12</div><div class='add'>+	.align  4</div><div class='add'>+.LwordLoop:</div><div class='add'>+	ld.ab	r3, [r1, 4]</div><div class='add'>+	;; Detect NULL char in str1</div><div class='add'>+	sub	r4, r2, r12</div><div class='add'>+	ld.ab	r5, [r0, 4]</div><div class='add'>+	bic	r4, r4, r2</div><div class='add'>+	and	r4, r4, r11</div><div class='add'>+	brne.d.nt	r4, 0, .LfoundNULL</div><div class='add'>+	;; Check if the read locations are the same</div><div class='add'>+	cmp	r2, r3</div><div class='add'>+	beq.d	.LwordLoop</div><div class='add'>+	mov.eq	r2, r5</div><div class='add'>+</div><div class='add'>+	;; A match is found, spot it out</div><div class='add'>+#ifdef __LITTLE_ENDIAN__</div><div class='add'>+	swape	r3, r3</div><div class='add'>+	mov_s	r0, 1</div><div class='add'>+	swape	r2, r2</div><div class='add'>+#else</div><div class='add'>+	mov_s	r0, 1</div><div class='add'>+#endif</div><div class='add'>+	cmp_s	r2, r3</div><div class='add'>+	j_s.d	[blink]</div><div class='add'>+	bset.lo	r0, r0, 31</div><div class='add'>+</div><div class='add'>+	.align 4</div><div class='add'>+.LfoundNULL:</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+	swape	r4, r4</div><div class='add'>+	swape	r2, r2</div><div class='add'>+	swape	r3, r3</div><div class='add'>+#endif</div><div class='add'>+	;; Find null byte</div><div class='add'>+	ffs	r0, r4</div><div class='add'>+	bmsk	r2, r2, r0</div><div class='add'>+	bmsk	r3, r3, r0</div><div class='add'>+	swape	r2, r2</div><div class='add'>+	swape	r3, r3</div><div class='add'>+	;; make the return value</div><div class='add'>+	sub.f	r0, r2, r3</div><div class='add'>+	mov.hi	r0, 1</div><div class='add'>+	j_s.d	[blink]</div><div class='add'>+	bset.lo	r0, r0, 31</div><div class='add'>+</div><div class='add'>+	.align 4</div><div class='add'>+.Lcharloop:</div><div class='add'>+	ldb.ab	r2, [r0, 1]</div><div class='add'>+	ldb.ab	r3, [r1, 1]</div><div class='add'>+	nop</div><div class='add'>+	breq	r2, 0, .Lcmpend</div><div class='add'>+	breq	r2, r3, .Lcharloop</div><div class='add'>+</div><div class='add'>+	.align 4</div><div class='add'>+.Lcmpend:</div><div class='add'>+	j_s.d	[blink]</div><div class='add'>+	sub	r0, r2, r3</div><div class='add'>+END(strcmp)</div><div class='head'>diff --git a/arch/arc/mm/Makefile b/arch/arc/mm/Makefile<br/>index ac95cc239c1e..7beb941556c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/Makefile</a></div><div class='hunk'>@@ -7,4 +7,4 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-y	:= extable.o ioremap.o dma.o fault.o init.o</div><div class='del'>-obj-y	+= tlb.o tlbex.o cache_arc700.o mmap.o</div><div class='add'>+obj-y	+= tlb.o tlbex.o cache.o mmap.o</div><div class='head'>diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache.c<br/>index 12b2100db073..1cd6695b6ab5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/cache_arc700.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/cache_arc700.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/cache.c</a></div><div class='hunk'>@@ -1,64 +1,12 @@</div><div class='ctx'> /*</div><div class='del'>- * ARC700 VIPT Cache Management</div><div class='add'>+ * ARC Cache Management</div><div class='ctx'>  *</div><div class='add'>+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  vineetg: May 2011: for Non-aliasing VIPT D-cache following can be NOPs</div><div class='del'>- *   -flush_cache_dup_mm (fork)</div><div class='del'>- *   -likewise for flush_cache_mm (exit/execve)</div><div class='del'>- *   -likewise for flush_cache_range,flush_cache_page (munmap, exit, COW-break)</div><div class='del'>- *</div><div class='del'>- * vineetg: Apr 2011</div><div class='del'>- *  -Now that MMU can support larger pg sz (16K), the determiniation of</div><div class='del'>- *   aliasing shd not be based on assumption of 8k pg</div><div class='del'>- *</div><div class='del'>- * vineetg: Mar 2011</div><div class='del'>- *  -optimised version of flush_icache_range( ) for making I/D coherent</div><div class='del'>- *   when vaddr is available (agnostic of num of aliases)</div><div class='del'>- *</div><div class='del'>- * vineetg: Mar 2011</div><div class='del'>- *  -Added documentation about I-cache aliasing on ARC700 and the way it</div><div class='del'>- *   was handled up until MMU V2.</div><div class='del'>- *  -Spotted a three year old bug when killing the 4 aliases, which needs</div><div class='del'>- *   bottom 2 bits, so we need to do paddr | {0x00, 0x01, 0x02, 0x03}</div><div class='del'>- *                        instead of paddr | {0x00, 0x01, 0x10, 0x11}</div><div class='del'>- *   (Rajesh you owe me one now)</div><div class='del'>- *</div><div class='del'>- * vineetg: Dec 2010</div><div class='del'>- *  -Off-by-one error when computing num_of_lines to flush</div><div class='del'>- *   This broke signal handling with bionic which uses synthetic sigret stub</div><div class='del'>- *</div><div class='del'>- * vineetg: Mar 2010</div><div class='del'>- *  -GCC can't generate ZOL for core cache flush loops.</div><div class='del'>- *   Conv them into iterations based as opposed to while (start &lt; end) types</div><div class='del'>- *</div><div class='del'>- * Vineetg: July 2009</div><div class='del'>- *  -In I-cache flush routine we used to chk for aliasing for every line INV.</div><div class='del'>- *   Instead now we setup routines per cache geometry and invoke them</div><div class='del'>- *   via function pointers.</div><div class='del'>- *</div><div class='del'>- * Vineetg: Jan 2009</div><div class='del'>- *  -Cache Line flush routines used to flush an extra line beyond end addr</div><div class='del'>- *   because check was while (end &gt;= start) instead of (end &gt; start)</div><div class='del'>- *     =Some call sites had to work around by doing -1, -4 etc to end param</div><div class='del'>- *     =Some callers didnt care. This was spec bad in case of INV routines</div><div class='del'>- *      which would discard valid data (cause of the horrible ext2 bug</div><div class='del'>- *      in ARC IDE driver)</div><div class='del'>- *</div><div class='del'>- * vineetg: June 11th 2008: Fixed flush_icache_range( )</div><div class='del'>- *  -Since ARC700 caches are not coherent (I$ doesnt snoop D$) both need</div><div class='del'>- *   to be flushed, which it was not doing.</div><div class='del'>- *  -load_module( ) passes vmalloc addr (Kernel Virtual Addr) to the API,</div><div class='del'>- *   however ARC cache maintenance OPs require PHY addr. Thus need to do</div><div class='del'>- *   vmalloc_to_phy.</div><div class='del'>- *  -Also added optimisation there, that for range &gt; PAGE SIZE we flush the</div><div class='del'>- *   entire cache in one shot rather than line by line. For e.g. a module</div><div class='del'>- *   with Code sz 600k, old code flushed 600k worth of cache (line-by-line),</div><div class='del'>- *   while cache is only 16 or 32k.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -73,9 +21,15 @@</div><div class='ctx'> #include &lt;asm/cachectl.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='add'>+static int l2_line_sz;</div><div class='add'>+</div><div class='add'>+void (*_cache_line_loop_ic_fn)(unsigned long paddr, unsigned long vaddr,</div><div class='add'>+			       unsigned long sz, const int cacheop);</div><div class='add'>+</div><div class='ctx'> char *arc_cache_mumbojumbo(int c, char *buf, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int n = 0;</div><div class='add'>+	struct cpuinfo_arc_cache *p;</div><div class='ctx'> </div><div class='ctx'> #define PR_CACHE(p, cfg, str)						\</div><div class='ctx'> 	if (!(p)-&gt;ver)							\</div><div class='hunk'>@@ -91,6 +45,11 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)</div><div class='ctx'> 	PR_CACHE(&amp;cpuinfo_arc700[c].icache, CONFIG_ARC_HAS_ICACHE, "I-Cache");</div><div class='ctx'> 	PR_CACHE(&amp;cpuinfo_arc700[c].dcache, CONFIG_ARC_HAS_DCACHE, "D-Cache");</div><div class='ctx'> </div><div class='add'>+	p = &amp;cpuinfo_arc700[c].slc;</div><div class='add'>+	if (p-&gt;ver)</div><div class='add'>+		n += scnprintf(buf + n, len - n,</div><div class='add'>+			"SLC\t\t: %uK, %uB Line\n", p-&gt;sz_k, p-&gt;line_len);</div><div class='add'>+</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +60,7 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)</div><div class='ctx'>  */</div><div class='ctx'> void read_decode_cache_bcr(void)</div><div class='ctx'> {</div><div class='del'>-	struct cpuinfo_arc_cache *p_ic, *p_dc;</div><div class='add'>+	struct cpuinfo_arc_cache *p_ic, *p_dc, *p_slc;</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='ctx'> 	struct bcr_cache {</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='hunk'>@@ -111,14 +70,29 @@ void read_decode_cache_bcr(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	} ibcr, dbcr;</div><div class='ctx'> </div><div class='add'>+	struct bcr_generic sbcr;</div><div class='add'>+</div><div class='add'>+	struct bcr_slc_cfg {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		unsigned int pad:24, way:2, lsz:2, sz:4;</div><div class='add'>+#else</div><div class='add'>+		unsigned int sz:4, lsz:2, way:2, pad:24;</div><div class='add'>+#endif</div><div class='add'>+	} slc_cfg;</div><div class='add'>+</div><div class='ctx'> 	p_ic = &amp;cpuinfo_arc700[cpu].icache;</div><div class='ctx'> 	READ_BCR(ARC_REG_IC_BCR, ibcr);</div><div class='ctx'> </div><div class='ctx'> 	if (!ibcr.ver)</div><div class='ctx'> 		goto dc_chk;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(ibcr.config != 3);</div><div class='del'>-	p_ic-&gt;assoc = 2;		/* Fixed to 2w set assoc */</div><div class='add'>+	if (ibcr.ver &lt;= 3) {</div><div class='add'>+		BUG_ON(ibcr.config != 3);</div><div class='add'>+		p_ic-&gt;assoc = 2;		/* Fixed to 2w set assoc */</div><div class='add'>+	} else if (ibcr.ver &gt;= 4) {</div><div class='add'>+		p_ic-&gt;assoc = 1 &lt;&lt; ibcr.config;	/* 1,2,4,8 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	p_ic-&gt;line_len = 8 &lt;&lt; ibcr.line_len;</div><div class='ctx'> 	p_ic-&gt;sz_k = 1 &lt;&lt; (ibcr.sz - 1);</div><div class='ctx'> 	p_ic-&gt;ver = ibcr.ver;</div><div class='hunk'>@@ -130,94 +104,140 @@ dc_chk:</div><div class='ctx'> 	READ_BCR(ARC_REG_DC_BCR, dbcr);</div><div class='ctx'> </div><div class='ctx'> 	if (!dbcr.ver)</div><div class='del'>-		return;</div><div class='add'>+		goto slc_chk;</div><div class='add'>+</div><div class='add'>+	if (dbcr.ver &lt;= 3) {</div><div class='add'>+		BUG_ON(dbcr.config != 2);</div><div class='add'>+		p_dc-&gt;assoc = 4;		/* Fixed to 4w set assoc */</div><div class='add'>+		p_dc-&gt;vipt = 1;</div><div class='add'>+		p_dc-&gt;alias = p_dc-&gt;sz_k/p_dc-&gt;assoc/TO_KB(PAGE_SIZE) &gt; 1;</div><div class='add'>+	} else if (dbcr.ver &gt;= 4) {</div><div class='add'>+		p_dc-&gt;assoc = 1 &lt;&lt; dbcr.config;	/* 1,2,4,8 */</div><div class='add'>+		p_dc-&gt;vipt = 0;</div><div class='add'>+		p_dc-&gt;alias = 0;		/* PIPT so can't VIPT alias */</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(dbcr.config != 2);</div><div class='del'>-	p_dc-&gt;assoc = 4;		/* Fixed to 4w set assoc */</div><div class='ctx'> 	p_dc-&gt;line_len = 16 &lt;&lt; dbcr.line_len;</div><div class='ctx'> 	p_dc-&gt;sz_k = 1 &lt;&lt; (dbcr.sz - 1);</div><div class='ctx'> 	p_dc-&gt;ver = dbcr.ver;</div><div class='del'>-	p_dc-&gt;vipt = 1;</div><div class='del'>-	p_dc-&gt;alias = p_dc-&gt;sz_k/p_dc-&gt;assoc/TO_KB(PAGE_SIZE) &gt; 1;</div><div class='add'>+</div><div class='add'>+slc_chk:</div><div class='add'>+	if (!is_isa_arcv2())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	p_slc = &amp;cpuinfo_arc700[cpu].slc;</div><div class='add'>+	READ_BCR(ARC_REG_SLC_BCR, sbcr);</div><div class='add'>+	if (sbcr.ver) {</div><div class='add'>+		READ_BCR(ARC_REG_SLC_CFG, slc_cfg);</div><div class='add'>+		p_slc-&gt;ver = sbcr.ver;</div><div class='add'>+		p_slc-&gt;sz_k = 128 &lt;&lt; slc_cfg.sz;</div><div class='add'>+		l2_line_sz = p_slc-&gt;line_len = (slc_cfg.lsz == 0) ? 128 : 64;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * 1. Validate the Cache Geomtery (compile time config matches hardware)</div><div class='del'>- * 2. If I-cache suffers from aliasing, setup work arounds (difft flush rtn)</div><div class='del'>- *    (aliasing D-cache configurations are not supported YET)</div><div class='del'>- * 3. Enable the Caches, setup default flush mode for D-Cache</div><div class='del'>- * 3. Calculate the SHMLBA used by user space</div><div class='add'>+ * Line Operation on {I,D}-Cache</div><div class='ctx'>  */</div><div class='del'>-void arc_cache_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int __maybe_unused cpu = smp_processor_id();</div><div class='del'>-	char str[256];</div><div class='del'>-</div><div class='del'>-	printk(arc_cache_mumbojumbo(0, str, sizeof(str)));</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {</div><div class='del'>-		struct cpuinfo_arc_cache *ic = &amp;cpuinfo_arc700[cpu].icache;</div><div class='add'>+#define OP_INV		0x1</div><div class='add'>+#define OP_FLUSH	0x2</div><div class='add'>+#define OP_FLUSH_N_INV	0x3</div><div class='add'>+#define OP_INV_IC	0x4</div><div class='ctx'> </div><div class='del'>-		if (!ic-&gt;ver)</div><div class='del'>-			panic("cache support enabled but non-existent cache\n");</div><div class='add'>+/*</div><div class='add'>+ *		I-Cache Aliasing in ARC700 VIPT caches (MMU v1-v3)</div><div class='add'>+ *</div><div class='add'>+ * ARC VIPT I-cache uses vaddr to index into cache and paddr to match the tag.</div><div class='add'>+ * The orig Cache Management Module "CDU" only required paddr to invalidate a</div><div class='add'>+ * certain line since it sufficed as index in Non-Aliasing VIPT cache-geometry.</div><div class='add'>+ * Infact for distinct V1,V2,P: all of {V1-P},{V2-P},{P-P} would end up fetching</div><div class='add'>+ * the exact same line.</div><div class='add'>+ *</div><div class='add'>+ * However for larger Caches (way-size &gt; page-size) - i.e. in Aliasing config,</div><div class='add'>+ * paddr alone could not be used to correctly index the cache.</div><div class='add'>+ *</div><div class='add'>+ * ------------------</div><div class='add'>+ * MMU v1/v2 (Fixed Page Size 8k)</div><div class='add'>+ * ------------------</div><div class='add'>+ * The solution was to provide CDU with these additonal vaddr bits. These</div><div class='add'>+ * would be bits [x:13], x would depend on cache-geometry, 13 comes from</div><div class='add'>+ * standard page size of 8k.</div><div class='add'>+ * H/w folks chose [17:13] to be a future safe range, and moreso these 5 bits</div><div class='add'>+ * of vaddr could easily be "stuffed" in the paddr as bits [4:0] since the</div><div class='add'>+ * orig 5 bits of paddr were anyways ignored by CDU line ops, as they</div><div class='add'>+ * represent the offset within cache-line. The adv of using this "clumsy"</div><div class='add'>+ * interface for additional info was no new reg was needed in CDU programming</div><div class='add'>+ * model.</div><div class='add'>+ *</div><div class='add'>+ * 17:13 represented the max num of bits passable, actual bits needed were</div><div class='add'>+ * fewer, based on the num-of-aliases possible.</div><div class='add'>+ * -for 2 alias possibility, only bit 13 needed (32K cache)</div><div class='add'>+ * -for 4 alias possibility, bits 14:13 needed (64K cache)</div><div class='add'>+ *</div><div class='add'>+ * ------------------</div><div class='add'>+ * MMU v3</div><div class='add'>+ * ------------------</div><div class='add'>+ * This ver of MMU supports variable page sizes (1k-16k): although Linux will</div><div class='add'>+ * only support 8k (default), 16k and 4k.</div><div class='add'>+ * However from hardware perspective, smaller page sizes aggrevate aliasing</div><div class='add'>+ * meaning more vaddr bits needed to disambiguate the cache-line-op ;</div><div class='add'>+ * the existing scheme of piggybacking won't work for certain configurations.</div><div class='add'>+ * Two new registers IC_PTAG and DC_PTAG inttoduced.</div><div class='add'>+ * "tag" bits are provided in PTAG, index bits in existing IVIL/IVDL/FLDL regs</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-		if (ic-&gt;line_len != L1_CACHE_BYTES)</div><div class='del'>-			panic("ICache line [%d] != kernel Config [%d]",</div><div class='del'>-			      ic-&gt;line_len, L1_CACHE_BYTES);</div><div class='add'>+static inline</div><div class='add'>+void __cache_line_loop_v2(unsigned long paddr, unsigned long vaddr,</div><div class='add'>+			  unsigned long sz, const int op)</div><div class='add'>+{</div><div class='add'>+	unsigned int aux_cmd;</div><div class='add'>+	int num_lines;</div><div class='add'>+	const int full_page = __builtin_constant_p(sz) &amp;&amp; sz == PAGE_SIZE;</div><div class='ctx'> </div><div class='del'>-		if (ic-&gt;ver != CONFIG_ARC_MMU_VER)</div><div class='del'>-			panic("Cache ver [%d] doesn't match MMU ver [%d]\n",</div><div class='del'>-			      ic-&gt;ver, CONFIG_ARC_MMU_VER);</div><div class='add'>+	if (op == OP_INV_IC) {</div><div class='add'>+		aux_cmd = ARC_REG_IC_IVIL;</div><div class='add'>+	} else {</div><div class='add'>+		/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */</div><div class='add'>+		aux_cmd = op &amp; OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_ARC_HAS_DCACHE)) {</div><div class='del'>-		struct cpuinfo_arc_cache *dc = &amp;cpuinfo_arc700[cpu].dcache;</div><div class='del'>-		int handled;</div><div class='del'>-</div><div class='del'>-		if (!dc-&gt;ver)</div><div class='del'>-			panic("cache support enabled but non-existent cache\n");</div><div class='add'>+	/* Ensure we properly floor/ceil the non-line aligned/sized requests</div><div class='add'>+	 * and have @paddr - aligned to cache line and integral @num_lines.</div><div class='add'>+	 * This however can be avoided for page sized since:</div><div class='add'>+	 *  -@paddr will be cache-line aligned already (being page aligned)</div><div class='add'>+	 *  -@sz will be integral multiple of line size (being page sized).</div><div class='add'>+	 */</div><div class='add'>+	if (!full_page) {</div><div class='add'>+		sz += paddr &amp; ~CACHE_LINE_MASK;</div><div class='add'>+		paddr &amp;= CACHE_LINE_MASK;</div><div class='add'>+		vaddr &amp;= CACHE_LINE_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (dc-&gt;line_len != L1_CACHE_BYTES)</div><div class='del'>-			panic("DCache line [%d] != kernel Config [%d]",</div><div class='del'>-			      dc-&gt;line_len, L1_CACHE_BYTES);</div><div class='add'>+	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);</div><div class='ctx'> </div><div class='del'>-		/* check for D-Cache aliasing */</div><div class='del'>-		handled = IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);</div><div class='add'>+	/* MMUv2 and before: paddr contains stuffed vaddrs bits */</div><div class='add'>+	paddr |= (vaddr &gt;&gt; PAGE_SHIFT) &amp; 0x1F;</div><div class='ctx'> </div><div class='del'>-		if (dc-&gt;alias &amp;&amp; !handled)</div><div class='del'>-			panic("Enable CONFIG_ARC_CACHE_VIPT_ALIASING\n");</div><div class='del'>-		else if (!dc-&gt;alias &amp;&amp; handled)</div><div class='del'>-			panic("Don't need CONFIG_ARC_CACHE_VIPT_ALIASING\n");</div><div class='add'>+	while (num_lines-- &gt; 0) {</div><div class='add'>+		write_aux_reg(aux_cmd, paddr);</div><div class='add'>+		paddr += L1_CACHE_BYTES;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define OP_INV		0x1</div><div class='del'>-#define OP_FLUSH	0x2</div><div class='del'>-#define OP_FLUSH_N_INV	0x3</div><div class='del'>-#define OP_INV_IC	0x4</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Common Helper for Line Operations on {I,D}-Cache</div><div class='del'>- */</div><div class='del'>-static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,</div><div class='del'>-				     unsigned long sz, const int cacheop)</div><div class='add'>+static inline</div><div class='add'>+void __cache_line_loop_v3(unsigned long paddr, unsigned long vaddr,</div><div class='add'>+			  unsigned long sz, const int op)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int aux_cmd, aux_tag;</div><div class='ctx'> 	int num_lines;</div><div class='del'>-	const int full_page_op = __builtin_constant_p(sz) &amp;&amp; sz == PAGE_SIZE;</div><div class='add'>+	const int full_page = __builtin_constant_p(sz) &amp;&amp; sz == PAGE_SIZE;</div><div class='ctx'> </div><div class='del'>-	if (cacheop == OP_INV_IC) {</div><div class='add'>+	if (op == OP_INV_IC) {</div><div class='ctx'> 		aux_cmd = ARC_REG_IC_IVIL;</div><div class='del'>-#if (CONFIG_ARC_MMU_VER &gt; 2)</div><div class='ctx'> 		aux_tag = ARC_REG_IC_PTAG;</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */</div><div class='del'>-		aux_cmd = cacheop &amp; OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;</div><div class='del'>-#if (CONFIG_ARC_MMU_VER &gt; 2)</div><div class='add'>+	} else {</div><div class='add'>+		aux_cmd = op &amp; OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;</div><div class='ctx'> 		aux_tag = ARC_REG_DC_PTAG;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure we properly floor/ceil the non-line aligned/sized requests</div><div class='hunk'>@@ -226,177 +246,169 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,</div><div class='ctx'> 	 *  -@paddr will be cache-line aligned already (being page aligned)</div><div class='ctx'> 	 *  -@sz will be integral multiple of line size (being page sized).</div><div class='ctx'> 	 */</div><div class='del'>-	if (!full_page_op) {</div><div class='add'>+	if (!full_page) {</div><div class='ctx'> 		sz += paddr &amp; ~CACHE_LINE_MASK;</div><div class='ctx'> 		paddr &amp;= CACHE_LINE_MASK;</div><div class='ctx'> 		vaddr &amp;= CACHE_LINE_MASK;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);</div><div class='ctx'> </div><div class='del'>-#if (CONFIG_ARC_MMU_VER &lt;= 2)</div><div class='del'>-	/* MMUv2 and before: paddr contains stuffed vaddrs bits */</div><div class='del'>-	paddr |= (vaddr &gt;&gt; PAGE_SHIFT) &amp; 0x1F;</div><div class='del'>-#else</div><div class='del'>-	/* if V-P const for loop, PTAG can be written once outside loop */</div><div class='del'>-	if (full_page_op)</div><div class='add'>+	/*</div><div class='add'>+	 * MMUv3, cache ops require paddr in PTAG reg</div><div class='add'>+	 * if V-P const for loop, PTAG can be written once outside loop</div><div class='add'>+	 */</div><div class='add'>+	if (full_page)</div><div class='ctx'> 		write_aux_reg(aux_tag, paddr);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	while (num_lines-- &gt; 0) {</div><div class='del'>-#if (CONFIG_ARC_MMU_VER &gt; 2)</div><div class='del'>-		/* MMUv3, cache ops require paddr seperately */</div><div class='del'>-		if (!full_page_op) {</div><div class='add'>+		if (!full_page) {</div><div class='ctx'> 			write_aux_reg(aux_tag, paddr);</div><div class='ctx'> 			paddr += L1_CACHE_BYTES;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		write_aux_reg(aux_cmd, vaddr);</div><div class='ctx'> 		vaddr += L1_CACHE_BYTES;</div><div class='del'>-#else</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In HS38x (MMU v4), although icache is VIPT, only paddr is needed for cache</div><div class='add'>+ * maintenance ops (in IVIL reg), as long as icache doesn't alias.</div><div class='add'>+ *</div><div class='add'>+ * For Aliasing icache, vaddr is also needed (in IVIL), while paddr is</div><div class='add'>+ * specified in PTAG (similar to MMU v3)</div><div class='add'>+ */</div><div class='add'>+static inline</div><div class='add'>+void __cache_line_loop_v4(unsigned long paddr, unsigned long vaddr,</div><div class='add'>+			  unsigned long sz, const int cacheop)</div><div class='add'>+{</div><div class='add'>+	unsigned int aux_cmd;</div><div class='add'>+	int num_lines;</div><div class='add'>+	const int full_page_op = __builtin_constant_p(sz) &amp;&amp; sz == PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (cacheop == OP_INV_IC) {</div><div class='add'>+		aux_cmd = ARC_REG_IC_IVIL;</div><div class='add'>+	} else {</div><div class='add'>+		/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */</div><div class='add'>+		aux_cmd = cacheop &amp; OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure we properly floor/ceil the non-line aligned/sized requests</div><div class='add'>+	 * and have @paddr - aligned to cache line and integral @num_lines.</div><div class='add'>+	 * This however can be avoided for page sized since:</div><div class='add'>+	 *  -@paddr will be cache-line aligned already (being page aligned)</div><div class='add'>+	 *  -@sz will be integral multiple of line size (being page sized).</div><div class='add'>+	 */</div><div class='add'>+	if (!full_page_op) {</div><div class='add'>+		sz += paddr &amp; ~CACHE_LINE_MASK;</div><div class='add'>+		paddr &amp;= CACHE_LINE_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);</div><div class='add'>+</div><div class='add'>+	while (num_lines-- &gt; 0) {</div><div class='ctx'> 		write_aux_reg(aux_cmd, paddr);</div><div class='ctx'> 		paddr += L1_CACHE_BYTES;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if (CONFIG_ARC_MMU_VER &lt; 3)</div><div class='add'>+#define __cache_line_loop	__cache_line_loop_v2</div><div class='add'>+#elif (CONFIG_ARC_MMU_VER == 3)</div><div class='add'>+#define __cache_line_loop	__cache_line_loop_v3</div><div class='add'>+#elif (CONFIG_ARC_MMU_VER &gt; 3)</div><div class='add'>+#define __cache_line_loop	__cache_line_loop_v4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARC_HAS_DCACHE</div><div class='ctx'> </div><div class='ctx'> /***************************************************************</div><div class='ctx'>  * Machine specific helpers for Entire D-Cache or Per Line ops</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline unsigned int __before_dc_op(const int op)</div><div class='add'>+static inline void __before_dc_op(const int op)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg = reg;</div><div class='del'>-</div><div class='ctx'> 	if (op == OP_FLUSH_N_INV) {</div><div class='ctx'> 		/* Dcache provides 2 cmd: FLUSH or INV</div><div class='ctx'> 		 * INV inturn has sub-modes: DISCARD or FLUSH-BEFORE</div><div class='ctx'> 		 * flush-n-inv is achieved by INV cmd but with IM=1</div><div class='ctx'> 		 * So toggle INV sub-mode depending on op request and default</div><div class='ctx'> 		 */</div><div class='del'>-		reg = read_aux_reg(ARC_REG_DC_CTRL);</div><div class='del'>-		write_aux_reg(ARC_REG_DC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH)</div><div class='del'>-			;</div><div class='add'>+		const unsigned int ctl = ARC_REG_DC_CTRL;</div><div class='add'>+		write_aux_reg(ctl, read_aux_reg(ctl) | DC_CTRL_INV_MODE_FLUSH);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return reg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __after_dc_op(const int op, unsigned int reg)</div><div class='add'>+static inline void __after_dc_op(const int op)</div><div class='ctx'> {</div><div class='del'>-	if (op &amp; OP_FLUSH)	/* flush / flush-n-inv both wait */</div><div class='del'>-		while (read_aux_reg(ARC_REG_DC_CTRL) &amp; DC_CTRL_FLUSH_STATUS);</div><div class='add'>+	if (op &amp; OP_FLUSH) {</div><div class='add'>+		const unsigned int ctl = ARC_REG_DC_CTRL;</div><div class='add'>+		unsigned int reg;</div><div class='ctx'> </div><div class='del'>-	/* Switch back to default Invalidate mode */</div><div class='del'>-	if (op == OP_FLUSH_N_INV)</div><div class='del'>-		write_aux_reg(ARC_REG_DC_CTRL, reg &amp; ~DC_CTRL_INV_MODE_FLUSH);</div><div class='add'>+		/* flush / flush-n-inv both wait */</div><div class='add'>+		while ((reg = read_aux_reg(ctl)) &amp; DC_CTRL_FLUSH_STATUS)</div><div class='add'>+			;</div><div class='add'>+</div><div class='add'>+		/* Switch back to default Invalidate mode */</div><div class='add'>+		if (op == OP_FLUSH_N_INV)</div><div class='add'>+			write_aux_reg(ctl, reg &amp; ~DC_CTRL_INV_MODE_FLUSH);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Operation on Entire D-Cache</div><div class='del'>- * @cacheop = {OP_INV, OP_FLUSH, OP_FLUSH_N_INV}</div><div class='add'>+ * @op = {OP_INV, OP_FLUSH, OP_FLUSH_N_INV}</div><div class='ctx'>  * Note that constant propagation ensures all the checks are gone</div><div class='ctx'>  * in generated code</div><div class='ctx'>  */</div><div class='del'>-static inline void __dc_entire_op(const int cacheop)</div><div class='add'>+static inline void __dc_entire_op(const int op)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ctrl_reg;</div><div class='ctx'> 	int aux;</div><div class='ctx'> </div><div class='del'>-	ctrl_reg = __before_dc_op(cacheop);</div><div class='add'>+	__before_dc_op(op);</div><div class='ctx'> </div><div class='del'>-	if (cacheop &amp; OP_INV)	/* Inv or flush-n-inv use same cmd reg */</div><div class='add'>+	if (op &amp; OP_INV)	/* Inv or flush-n-inv use same cmd reg */</div><div class='ctx'> 		aux = ARC_REG_DC_IVDC;</div><div class='ctx'> 	else</div><div class='ctx'> 		aux = ARC_REG_DC_FLSH;</div><div class='ctx'> </div><div class='ctx'> 	write_aux_reg(aux, 0x1);</div><div class='ctx'> </div><div class='del'>-	__after_dc_op(cacheop, ctrl_reg);</div><div class='add'>+	__after_dc_op(op);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* For kernel mappings cache operation: index is same as paddr */</div><div class='ctx'> #define __dc_line_op_k(p, sz, op)	__dc_line_op(p, p, sz, op)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * D-Cache : Per Line INV (discard or wback+discard) or FLUSH (wback)</div><div class='add'>+ * D-Cache Line ops: Per Line INV (discard or wback+discard) or FLUSH (wback)</div><div class='ctx'>  */</div><div class='ctx'> static inline void __dc_line_op(unsigned long paddr, unsigned long vaddr,</div><div class='del'>-				unsigned long sz, const int cacheop)</div><div class='add'>+				unsigned long sz, const int op)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int ctrl_reg;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	ctrl_reg = __before_dc_op(cacheop);</div><div class='add'>+	__before_dc_op(op);</div><div class='ctx'> </div><div class='del'>-	__cache_line_loop(paddr, vaddr, sz, cacheop);</div><div class='add'>+	__cache_line_loop(paddr, vaddr, sz, op);</div><div class='ctx'> </div><div class='del'>-	__after_dc_op(cacheop, ctrl_reg);</div><div class='add'>+	__after_dc_op(op);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-#define __dc_entire_op(cacheop)</div><div class='del'>-#define __dc_line_op(paddr, vaddr, sz, cacheop)</div><div class='del'>-#define __dc_line_op_k(paddr, sz, cacheop)</div><div class='add'>+#define __dc_entire_op(op)</div><div class='add'>+#define __dc_line_op(paddr, vaddr, sz, op)</div><div class='add'>+#define __dc_line_op_k(paddr, sz, op)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_ARC_HAS_DCACHE */</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_ARC_HAS_ICACHE</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *		I-Cache Aliasing in ARC700 VIPT caches</div><div class='del'>- *</div><div class='del'>- * ARC VIPT I-cache uses vaddr to index into cache and paddr to match the tag.</div><div class='del'>- * The orig Cache Management Module "CDU" only required paddr to invalidate a</div><div class='del'>- * certain line since it sufficed as index in Non-Aliasing VIPT cache-geometry.</div><div class='del'>- * Infact for distinct V1,V2,P: all of {V1-P},{V2-P},{P-P} would end up fetching</div><div class='del'>- * the exact same line.</div><div class='del'>- *</div><div class='del'>- * However for larger Caches (way-size &gt; page-size) - i.e. in Aliasing config,</div><div class='del'>- * paddr alone could not be used to correctly index the cache.</div><div class='del'>- *</div><div class='del'>- * ------------------</div><div class='del'>- * MMU v1/v2 (Fixed Page Size 8k)</div><div class='del'>- * ------------------</div><div class='del'>- * The solution was to provide CDU with these additonal vaddr bits. These</div><div class='del'>- * would be bits [x:13], x would depend on cache-geometry, 13 comes from</div><div class='del'>- * standard page size of 8k.</div><div class='del'>- * H/w folks chose [17:13] to be a future safe range, and moreso these 5 bits</div><div class='del'>- * of vaddr could easily be "stuffed" in the paddr as bits [4:0] since the</div><div class='del'>- * orig 5 bits of paddr were anyways ignored by CDU line ops, as they</div><div class='del'>- * represent the offset within cache-line. The adv of using this "clumsy"</div><div class='del'>- * interface for additional info was no new reg was needed in CDU programming</div><div class='del'>- * model.</div><div class='del'>- *</div><div class='del'>- * 17:13 represented the max num of bits passable, actual bits needed were</div><div class='del'>- * fewer, based on the num-of-aliases possible.</div><div class='del'>- * -for 2 alias possibility, only bit 13 needed (32K cache)</div><div class='del'>- * -for 4 alias possibility, bits 14:13 needed (64K cache)</div><div class='del'>- *</div><div class='del'>- * ------------------</div><div class='del'>- * MMU v3</div><div class='del'>- * ------------------</div><div class='del'>- * This ver of MMU supports variable page sizes (1k-16k): although Linux will</div><div class='del'>- * only support 8k (default), 16k and 4k.</div><div class='del'>- * However from hardware perspective, smaller page sizes aggrevate aliasing</div><div class='del'>- * meaning more vaddr bits needed to disambiguate the cache-line-op ;</div><div class='del'>- * the existing scheme of piggybacking won't work for certain configurations.</div><div class='del'>- * Two new registers IC_PTAG and DC_PTAG inttoduced.</div><div class='del'>- * "tag" bits are provided in PTAG, index bits in existing IVIL/IVDL/FLDL regs</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/***********************************************************</div><div class='del'>- * Machine specific helper for per line I-Cache invalidate.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static inline void __ic_entire_inv(void)</div><div class='ctx'> {</div><div class='ctx'> 	write_aux_reg(ARC_REG_IC_IVIC, 1);</div><div class='hunk'>@@ -410,7 +422,7 @@ __ic_line_inv_vaddr_local(unsigned long paddr, unsigned long vaddr,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	__cache_line_loop(paddr, vaddr, sz, OP_INV_IC);</div><div class='add'>+	(*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC);</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -453,6 +465,61 @@ static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_ARC_HAS_ICACHE */</div><div class='ctx'> </div><div class='add'>+noinline void slc_op(unsigned long paddr, unsigned long sz, const int op)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+	/*</div><div class='add'>+	 * SLC is shared between all cores and concurrent aux operations from</div><div class='add'>+	 * multiple cores need to be serialized using a spinlock</div><div class='add'>+	 * A concurrent operation can be silently ignored and/or the old/new</div><div class='add'>+	 * operation can remain incomplete forever (lockup in SLC_CTRL_BUSY loop</div><div class='add'>+	 * below)</div><div class='add'>+	 */</div><div class='add'>+	static DEFINE_SPINLOCK(lock);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int ctrl;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock, flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The Region Flush operation is specified by CTRL.RGN_OP[11..9]</div><div class='add'>+	 *  - b'000 (default) is Flush,</div><div class='add'>+	 *  - b'001 is Invalidate if CTRL.IM == 0</div><div class='add'>+	 *  - b'001 is Flush-n-Invalidate if CTRL.IM == 1</div><div class='add'>+	 */</div><div class='add'>+	ctrl = read_aux_reg(ARC_REG_SLC_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Don't rely on default value of IM bit */</div><div class='add'>+	if (!(op &amp; OP_FLUSH))		/* i.e. OP_INV */</div><div class='add'>+		ctrl &amp;= ~SLC_CTRL_IM;	/* clear IM: Disable flush before Inv */</div><div class='add'>+	else</div><div class='add'>+		ctrl |= SLC_CTRL_IM;</div><div class='add'>+</div><div class='add'>+	if (op &amp; OP_INV)</div><div class='add'>+		ctrl |= SLC_CTRL_RGN_OP_INV;	/* Inv or flush-n-inv */</div><div class='add'>+	else</div><div class='add'>+		ctrl &amp;= ~SLC_CTRL_RGN_OP_INV;</div><div class='add'>+</div><div class='add'>+	write_aux_reg(ARC_REG_SLC_CTRL, ctrl);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Lower bits are ignored, no need to clip</div><div class='add'>+	 * END needs to be setup before START (latter triggers the operation)</div><div class='add'>+	 * END can't be same as START, so add (l2_line_sz - 1) to sz</div><div class='add'>+	 */</div><div class='add'>+	write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1));</div><div class='add'>+	write_aux_reg(ARC_REG_SLC_RGN_START, paddr);</div><div class='add'>+</div><div class='add'>+	while (read_aux_reg(ARC_REG_SLC_CTRL) &amp; SLC_CTRL_BUSY);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock, flags);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int need_slc_flush(void)</div><div class='add'>+{</div><div class='add'>+	return is_isa_arcv2() &amp;&amp; l2_line_sz;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /***********************************************************</div><div class='ctx'>  * Exported APIs</div><div class='hunk'>@@ -493,7 +560,7 @@ void flush_dcache_page(struct page *page)</div><div class='ctx'> 	} else if (page_mapped(page)) {</div><div class='ctx'> </div><div class='ctx'> 		/* kernel reading from page with U-mapping */</div><div class='del'>-		void *paddr = page_address(page);</div><div class='add'>+		unsigned long paddr = (unsigned long)page_address(page);</div><div class='ctx'> 		unsigned long vaddr = page-&gt;index &lt;&lt; PAGE_CACHE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 		if (addr_not_cache_congruent(paddr, vaddr))</div><div class='hunk'>@@ -502,22 +569,30 @@ void flush_dcache_page(struct page *page)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_page);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> void dma_cache_wback_inv(unsigned long start, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	__dc_line_op_k(start, sz, OP_FLUSH_N_INV);</div><div class='add'>+</div><div class='add'>+	if (need_slc_flush())</div><div class='add'>+		slc_op(start, sz, OP_FLUSH_N_INV);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_cache_wback_inv);</div><div class='ctx'> </div><div class='ctx'> void dma_cache_inv(unsigned long start, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	__dc_line_op_k(start, sz, OP_INV);</div><div class='add'>+</div><div class='add'>+	if (need_slc_flush())</div><div class='add'>+		slc_op(start, sz, OP_INV);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_cache_inv);</div><div class='ctx'> </div><div class='ctx'> void dma_cache_wback(unsigned long start, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	__dc_line_op_k(start, sz, OP_FLUSH);</div><div class='add'>+</div><div class='add'>+	if (need_slc_flush())</div><div class='add'>+		slc_op(start, sz, OP_FLUSH);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_cache_wback);</div><div class='ctx'> </div><div class='hunk'>@@ -605,7 +680,7 @@ void __inv_icache_page(unsigned long paddr, unsigned long vaddr)</div><div class='ctx'>  * wrapper to clearout kernel or userspace mappings of a page</div><div class='ctx'>  * For kernel mappings @vaddr == @paddr</div><div class='ctx'>  */</div><div class='del'>-void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr)</div><div class='add'>+void __flush_dcache_page(unsigned long paddr, unsigned long vaddr)</div><div class='ctx'> {</div><div class='ctx'> 	__dc_line_op(paddr, vaddr &amp; PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV);</div><div class='ctx'> }</div><div class='hunk'>@@ -637,7 +712,7 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long u_vaddr,</div><div class='ctx'> </div><div class='ctx'> 	u_vaddr &amp;= PAGE_MASK;</div><div class='ctx'> </div><div class='del'>-	___flush_dcache_page(paddr, u_vaddr);</div><div class='add'>+	__flush_dcache_page(paddr, u_vaddr);</div><div class='ctx'> </div><div class='ctx'> 	if (vma-&gt;vm_flags &amp; VM_EXEC)</div><div class='ctx'> 		__inv_icache_page(paddr, u_vaddr);</div><div class='hunk'>@@ -663,8 +738,8 @@ void flush_anon_page(struct vm_area_struct *vma, struct page *page,</div><div class='ctx'> void copy_user_highpage(struct page *to, struct page *from,</div><div class='ctx'> 	unsigned long u_vaddr, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='del'>-	void *kfrom = page_address(from);</div><div class='del'>-	void *kto = page_address(to);</div><div class='add'>+	unsigned long kfrom = (unsigned long)page_address(from);</div><div class='add'>+	unsigned long kto = (unsigned long)page_address(to);</div><div class='ctx'> 	int clean_src_k_mappings = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -680,7 +755,7 @@ void copy_user_highpage(struct page *to, struct page *from,</div><div class='ctx'> 		clean_src_k_mappings = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	copy_page(kto, kfrom);</div><div class='add'>+	copy_page((void *)kto, (void *)kfrom);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mark DST page K-mapping as dirty for a later finalization by</div><div class='hunk'>@@ -721,3 +796,56 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void arc_cache_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int __maybe_unused cpu = smp_processor_id();</div><div class='add'>+	char str[256];</div><div class='add'>+</div><div class='add'>+	printk(arc_cache_mumbojumbo(0, str, sizeof(str)));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {</div><div class='add'>+		struct cpuinfo_arc_cache *ic = &amp;cpuinfo_arc700[cpu].icache;</div><div class='add'>+</div><div class='add'>+		if (!ic-&gt;ver)</div><div class='add'>+			panic("cache support enabled but non-existent cache\n");</div><div class='add'>+</div><div class='add'>+		if (ic-&gt;line_len != L1_CACHE_BYTES)</div><div class='add'>+			panic("ICache line [%d] != kernel Config [%d]",</div><div class='add'>+			      ic-&gt;line_len, L1_CACHE_BYTES);</div><div class='add'>+</div><div class='add'>+		if (ic-&gt;ver != CONFIG_ARC_MMU_VER)</div><div class='add'>+			panic("Cache ver [%d] doesn't match MMU ver [%d]\n",</div><div class='add'>+			      ic-&gt;ver, CONFIG_ARC_MMU_VER);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * In MMU v4 (HS38x) the alising icache config uses IVIL/PTAG</div><div class='add'>+		 * pair to provide vaddr/paddr respectively, just as in MMU v3</div><div class='add'>+		 */</div><div class='add'>+		if (is_isa_arcv2() &amp;&amp; ic-&gt;alias)</div><div class='add'>+			_cache_line_loop_ic_fn = __cache_line_loop_v3;</div><div class='add'>+		else</div><div class='add'>+			_cache_line_loop_ic_fn = __cache_line_loop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARC_HAS_DCACHE)) {</div><div class='add'>+		struct cpuinfo_arc_cache *dc = &amp;cpuinfo_arc700[cpu].dcache;</div><div class='add'>+</div><div class='add'>+		if (!dc-&gt;ver)</div><div class='add'>+			panic("cache support enabled but non-existent cache\n");</div><div class='add'>+</div><div class='add'>+		if (dc-&gt;line_len != L1_CACHE_BYTES)</div><div class='add'>+			panic("DCache line [%d] != kernel Config [%d]",</div><div class='add'>+			      dc-&gt;line_len, L1_CACHE_BYTES);</div><div class='add'>+</div><div class='add'>+		/* check for D-Cache aliasing on ARCompact: ARCv2 has PIPT */</div><div class='add'>+		if (is_isa_arcompact()) {</div><div class='add'>+			int handled = IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);</div><div class='add'>+</div><div class='add'>+			if (dc-&gt;alias &amp;&amp; !handled)</div><div class='add'>+				panic("Enable CONFIG_ARC_CACHE_VIPT_ALIASING\n");</div><div class='add'>+			else if (!dc-&gt;alias &amp;&amp; handled)</div><div class='add'>+				panic("Disable CONFIG_ARC_CACHE_VIPT_ALIASING\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c<br/>index 12cc6485b218..57706a9c6948 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/dma.c</a></div><div class='hunk'>@@ -14,8 +14,6 @@</div><div class='ctx'>  * Cache bit off in the TLB entry.</div><div class='ctx'>  *</div><div class='ctx'>  * The default DMA address == Phy address which is 0x8000_0000 based.</div><div class='del'>- * A platform/device can make it zero based, by over-riding</div><div class='del'>- * plat_{dma,kernel}_addr_to_{kernel,dma}</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='hunk'>@@ -37,7 +35,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* This is bus address, platform dependent */</div><div class='del'>-	*dma_handle = plat_kernel_addr_to_dma(dev, paddr);</div><div class='add'>+	*dma_handle = (dma_addr_t)paddr;</div><div class='ctx'> </div><div class='ctx'> 	return paddr;</div><div class='ctx'> }</div><div class='hunk'>@@ -46,8 +44,7 @@ EXPORT_SYMBOL(dma_alloc_noncoherent);</div><div class='ctx'> void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,</div><div class='ctx'> 			  dma_addr_t dma_handle)</div><div class='ctx'> {</div><div class='del'>-	free_pages_exact((void *)plat_dma_addr_to_kernel(dev, dma_handle),</div><div class='del'>-			 size);</div><div class='add'>+	free_pages_exact((void *)dma_handle, size);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_free_noncoherent);</div><div class='ctx'> </div><div class='hunk'>@@ -63,11 +60,23 @@ void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='ctx'> </div><div class='ctx'> 	/* This is kernel Virtual address (0x7000_0000 based) */</div><div class='ctx'> 	kvaddr = ioremap_nocache((unsigned long)paddr, size);</div><div class='del'>-	if (kvaddr != NULL)</div><div class='del'>-		memset(kvaddr, 0, size);</div><div class='add'>+	if (kvaddr == NULL)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* This is bus address, platform dependent */</div><div class='del'>-	*dma_handle = plat_kernel_addr_to_dma(dev, paddr);</div><div class='add'>+	*dma_handle = (dma_addr_t)paddr;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Evict any existing L1 and/or L2 lines for the backing page</div><div class='add'>+	 * in case it was used earlier as a normal "cached" page.</div><div class='add'>+	 * Yeah this bit us - STAR 9000898266</div><div class='add'>+	 *</div><div class='add'>+	 * Although core does call flush_cache_vmap(), it gets kvaddr hence</div><div class='add'>+	 * can't be used to efficiently flush L1 and/or L2 which need paddr</div><div class='add'>+	 * Currently flush_cache_vmap nukes the L1 cache completely which</div><div class='add'>+	 * will be optimized as a separate commit</div><div class='add'>+	 */</div><div class='add'>+	dma_cache_wback_inv((unsigned long)paddr, size);</div><div class='ctx'> </div><div class='ctx'> 	return kvaddr;</div><div class='ctx'> }</div><div class='hunk'>@@ -78,8 +87,7 @@ void dma_free_coherent(struct device *dev, size_t size, void *kvaddr,</div><div class='ctx'> {</div><div class='ctx'> 	iounmap((void __force __iomem *)kvaddr);</div><div class='ctx'> </div><div class='del'>-	free_pages_exact((void *)plat_dma_addr_to_kernel(dev, dma_handle),</div><div class='del'>-			 size);</div><div class='add'>+	free_pages_exact((void *)dma_handle, size);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_free_coherent);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c<br/>index 6a2e006cbcce..d948e4e9d89c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/fault.c</a></div><div class='hunk'>@@ -86,7 +86,7 @@ void do_page_fault(unsigned long address, struct pt_regs *regs)</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c<br/>index 7f47d2a56f44..2c7ce8bb7475 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/tlb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/tlb.c</a></div><div class='hunk'>@@ -113,6 +113,8 @@ static inline void __tlb_entry_erase(void)</div><div class='ctx'> 	write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if (CONFIG_ARC_MMU_VER &lt; 4)</div><div class='add'>+</div><div class='ctx'> static inline unsigned int tlb_entry_lkup(unsigned long vaddr_n_asid)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int idx;</div><div class='hunk'>@@ -210,6 +212,28 @@ static void tlb_entry_insert(unsigned int pd0, unsigned int pd1)</div><div class='ctx'> 	write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#else	/* CONFIG_ARC_MMU_VER &gt;= 4) */</div><div class='add'>+</div><div class='add'>+static void utlb_invalidate(void)</div><div class='add'>+{</div><div class='add'>+	/* No need since uTLB is always in sync with JTLB */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tlb_entry_erase(unsigned int vaddr_n_asid)</div><div class='add'>+{</div><div class='add'>+	write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid | _PAGE_PRESENT);</div><div class='add'>+	write_aux_reg(ARC_REG_TLBCOMMAND, TLBDeleteEntry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tlb_entry_insert(unsigned int pd0, unsigned int pd1)</div><div class='add'>+{</div><div class='add'>+	write_aux_reg(ARC_REG_TLBPD0, pd0);</div><div class='add'>+	write_aux_reg(ARC_REG_TLBPD1, pd1);</div><div class='add'>+	write_aux_reg(ARC_REG_TLBCOMMAND, TLBInsertEntry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Un-conditionally (without lookup) erase the entire MMU contents</div><div class='ctx'>  */</div><div class='hunk'>@@ -582,23 +606,42 @@ void read_decode_mmu_bcr(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	} *mmu3;</div><div class='ctx'> </div><div class='add'>+	struct bcr_mmu_4 {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,</div><div class='add'>+		     n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;</div><div class='add'>+#else</div><div class='add'>+	/*           DTLB      ITLB      JES        JE         JA      */</div><div class='add'>+	unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,</div><div class='add'>+		     pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;</div><div class='add'>+#endif</div><div class='add'>+	} *mmu4;</div><div class='add'>+</div><div class='ctx'> 	tmp = read_aux_reg(ARC_REG_MMU_BCR);</div><div class='ctx'> 	mmu-&gt;ver = (tmp &gt;&gt; 24);</div><div class='ctx'> </div><div class='ctx'> 	if (mmu-&gt;ver &lt;= 2) {</div><div class='ctx'> 		mmu2 = (struct bcr_mmu_1_2 *)&amp;tmp;</div><div class='del'>-		mmu-&gt;pg_sz = PAGE_SIZE;</div><div class='add'>+		mmu-&gt;pg_sz_k = TO_KB(PAGE_SIZE);</div><div class='ctx'> 		mmu-&gt;sets = 1 &lt;&lt; mmu2-&gt;sets;</div><div class='ctx'> 		mmu-&gt;ways = 1 &lt;&lt; mmu2-&gt;ways;</div><div class='ctx'> 		mmu-&gt;u_dtlb = mmu2-&gt;u_dtlb;</div><div class='ctx'> 		mmu-&gt;u_itlb = mmu2-&gt;u_itlb;</div><div class='del'>-	} else {</div><div class='add'>+	} else if (mmu-&gt;ver == 3) {</div><div class='ctx'> 		mmu3 = (struct bcr_mmu_3 *)&amp;tmp;</div><div class='del'>-		mmu-&gt;pg_sz = 512 &lt;&lt; mmu3-&gt;pg_sz;</div><div class='add'>+		mmu-&gt;pg_sz_k = 1 &lt;&lt; (mmu3-&gt;pg_sz - 1);</div><div class='ctx'> 		mmu-&gt;sets = 1 &lt;&lt; mmu3-&gt;sets;</div><div class='ctx'> 		mmu-&gt;ways = 1 &lt;&lt; mmu3-&gt;ways;</div><div class='ctx'> 		mmu-&gt;u_dtlb = mmu3-&gt;u_dtlb;</div><div class='ctx'> 		mmu-&gt;u_itlb = mmu3-&gt;u_itlb;</div><div class='add'>+	} else {</div><div class='add'>+		mmu4 = (struct bcr_mmu_4 *)&amp;tmp;</div><div class='add'>+		mmu-&gt;pg_sz_k = 1 &lt;&lt; (mmu4-&gt;sz0 - 1);</div><div class='add'>+		mmu-&gt;s_pg_sz_m = 1 &lt;&lt; (mmu4-&gt;sz1 - 11);</div><div class='add'>+		mmu-&gt;sets = 64 &lt;&lt; mmu4-&gt;n_entry;</div><div class='add'>+		mmu-&gt;ways = mmu4-&gt;n_ways * 2;</div><div class='add'>+		mmu-&gt;u_dtlb = mmu4-&gt;u_dtlb * 4;</div><div class='add'>+		mmu-&gt;u_itlb = mmu4-&gt;u_itlb * 4;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mmu-&gt;num_tlb = mmu-&gt;sets * mmu-&gt;ways;</div><div class='hunk'>@@ -608,10 +651,15 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int n = 0;</div><div class='ctx'> 	struct cpuinfo_arc_mmu *p_mmu = &amp;cpuinfo_arc700[cpu_id].mmu;</div><div class='add'>+	char super_pg[64] = "";</div><div class='add'>+</div><div class='add'>+	if (p_mmu-&gt;s_pg_sz_m)</div><div class='add'>+		scnprintf(super_pg, 64, "%dM Super Page%s, ",</div><div class='add'>+			  p_mmu-&gt;s_pg_sz_m, " (not used)");</div><div class='ctx'> </div><div class='ctx'> 	n += scnprintf(buf + n, len - n,</div><div class='del'>-		      "MMU [v%x]\t: %dk PAGE, JTLB %d (%dx%d), uDTLB %d, uITLB %d %s\n",</div><div class='del'>-		       p_mmu-&gt;ver, TO_KB(p_mmu-&gt;pg_sz),</div><div class='add'>+		      "MMU [v%x]\t: %dk PAGE, %sJTLB %d (%dx%d), uDTLB %d, uITLB %d %s\n",</div><div class='add'>+		       p_mmu-&gt;ver, p_mmu-&gt;pg_sz_k, super_pg,</div><div class='ctx'> 		       p_mmu-&gt;num_tlb, p_mmu-&gt;sets, p_mmu-&gt;ways,</div><div class='ctx'> 		       p_mmu-&gt;u_dtlb, p_mmu-&gt;u_itlb,</div><div class='ctx'> 		       IS_ENABLED(CONFIG_ARC_MMU_SASID) ? ",SASID" : "");</div><div class='hunk'>@@ -639,7 +687,7 @@ void arc_mmu_init(void)</div><div class='ctx'> 		      mmu-&gt;ver, CONFIG_ARC_MMU_VER);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mmu-&gt;pg_sz != PAGE_SIZE)</div><div class='add'>+	if (mmu-&gt;pg_sz_k != TO_KB(PAGE_SIZE))</div><div class='ctx'> 		panic("MMU pg size != PAGE_SIZE (%luk)\n", TO_KB(PAGE_SIZE));</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the MMU */</div><div class='head'>diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S<br/>index d572f1c2c724..f6f4c3cb505d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/mm/tlbex.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/mm/tlbex.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/mm/tlbex.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/mm/tlbex.S</a></div><div class='hunk'>@@ -35,8 +35,6 @@</div><div class='ctx'>  * Rahul Trivedi, Amit Bhor: Codito Technologies 2004</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	.cpu A7</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/entry.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='hunk'>@@ -46,6 +44,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/tlb-mmu1.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> ;-----------------------------------------------------------------</div><div class='ctx'> ; ARC700 Exception Handling doesn't auto-switch stack and it only provides</div><div class='ctx'> ; ONE scratch AUX reg "ARC_REG_SCRATCH_DATA0"</div><div class='hunk'>@@ -123,6 +122,24 @@ ex_saved_reg1:</div><div class='ctx'> #endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+#else	/* ARCv2 */</div><div class='add'>+</div><div class='add'>+.macro TLBMISS_FREEUP_REGS</div><div class='add'>+	PUSH  r0</div><div class='add'>+	PUSH  r1</div><div class='add'>+	PUSH  r2</div><div class='add'>+	PUSH  r3</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro TLBMISS_RESTORE_REGS</div><div class='add'>+	POP   r3</div><div class='add'>+	POP   r2</div><div class='add'>+	POP   r1</div><div class='add'>+	POP   r0</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> ;============================================================================</div><div class='ctx'> ;  Troubleshooting Stuff</div><div class='ctx'> ;============================================================================</div><div class='hunk'>@@ -241,6 +258,7 @@ ex_saved_reg1:</div><div class='ctx'> ; Commit the TLB entry into MMU</div><div class='ctx'> </div><div class='ctx'> .macro COMMIT_ENTRY_TO_MMU</div><div class='add'>+#if (CONFIG_ARC_MMU_VER &lt; 4)</div><div class='ctx'> </div><div class='ctx'> 	/* Get free TLB slot: Set = computed from vaddr, way = random */</div><div class='ctx'> 	sr  TLBGetIndex, [ARC_REG_TLBCOMMAND]</div><div class='hunk'>@@ -251,6 +269,10 @@ ex_saved_reg1:</div><div class='ctx'> #else</div><div class='ctx'> 	sr TLBWrite, [ARC_REG_TLBCOMMAND]</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+	sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]</div><div class='add'>+#endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +313,7 @@ ENTRY(EV_TLBMissI)</div><div class='ctx'> 	CONV_PTE_TO_TLB</div><div class='ctx'> 	COMMIT_ENTRY_TO_MMU</div><div class='ctx'> 	TLBMISS_RESTORE_REGS</div><div class='add'>+EV_TLBMissI_fast_ret:	; additional label for VDK OS-kit instrumentation</div><div class='ctx'> 	rtie</div><div class='ctx'> </div><div class='ctx'> END(EV_TLBMissI)</div><div class='hunk'>@@ -356,6 +379,7 @@ ENTRY(EV_TLBMissD)</div><div class='ctx'> </div><div class='ctx'> 	COMMIT_ENTRY_TO_MMU</div><div class='ctx'> 	TLBMISS_RESTORE_REGS</div><div class='add'>+EV_TLBMissD_fast_ret:	; additional label for VDK OS-kit instrumentation</div><div class='ctx'> 	rtie</div><div class='ctx'> </div><div class='ctx'> ;-------- Common routine to call Linux Page Fault Handler -----------</div><div class='hunk'>@@ -366,19 +390,5 @@ do_slow_path_pf:</div><div class='ctx'> </div><div class='ctx'> 	; Slow path TLB Miss handled as a regular ARC Exception</div><div class='ctx'> 	; (stack switching / save the complete reg-file).</div><div class='del'>-	EXCEPTION_PROLOGUE</div><div class='del'>-</div><div class='del'>-	; ------- setup args for Linux Page fault Hanlder ---------</div><div class='del'>-	mov_s r1, sp</div><div class='del'>-	lr    r0, [efa]</div><div class='del'>-</div><div class='del'>-	; We don't want exceptions to be disabled while the fault is handled.</div><div class='del'>-	; Now that we have saved the context we return from exception hence</div><div class='del'>-	; exceptions get re-enable</div><div class='del'>-</div><div class='del'>-	FAKE_RET_FROM_EXCPN  r9</div><div class='del'>-</div><div class='del'>-	bl  do_page_fault</div><div class='del'>-	b   ret_from_exception</div><div class='del'>-</div><div class='add'>+	b  call_do_page_fault</div><div class='ctx'> END(EV_TLBMissD)</div><div class='head'>diff --git a/arch/arc/plat-arcfpga/Kconfig b/arch/arc/plat-arcfpga/Kconfig<br/>deleted file mode 100644<br/>index 217593a70751..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arc/plat-arcfpga/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/plat-arcfpga/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='del'>-#</div><div class='del'>-# This program is free software; you can redistribute it and/or modify</div><div class='del'>-# it under the terms of the GNU General Public License version 2 as</div><div class='del'>-# published by the Free Software Foundation.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-menuconfig ARC_PLAT_FPGA_LEGACY</div><div class='del'>-	bool "\"Legacy\" ARC FPGA dev Boards"</div><div class='del'>-	select ARC_HAS_COH_CACHES if SMP</div><div class='del'>-	help</div><div class='del'>-	  Support for ARC development boards, provided by Synopsys.</div><div class='del'>-	  These are based on FPGA or ISS. e.g.</div><div class='del'>-	  - ARCAngel4</div><div class='del'>-	  - ML509</div><div class='del'>-	  - MetaWare ISS</div><div class='del'>-</div><div class='del'>-if ARC_PLAT_FPGA_LEGACY</div><div class='del'>-</div><div class='del'>-config ISS_SMP_EXTN</div><div class='del'>-	bool "ARC SMP Extensions (ISS Models only)"</div><div class='del'>-	default n</div><div class='del'>-	depends on SMP</div><div class='del'>-	help</div><div class='del'>-	  SMP Extensions to ARC700, in a "simulation only" Model, supported in</div><div class='del'>-	  ARC ISS (Instruction Set Simulator).</div><div class='del'>-	  The SMP extensions include:</div><div class='del'>-	  -IDU (Interrupt Distribution Unit)</div><div class='del'>-	  -XTL (To enable CPU start/stop/set-PC for another CPU)</div><div class='del'>-	  It doesn't provide coherent Caches and/or Atomic Ops (LLOCK/SCOND)</div><div class='del'>-</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/arc/plat-arcfpga/include/plat/smp.h b/arch/arc/plat-arcfpga/include/plat/smp.h<br/>deleted file mode 100644<br/>index c09eb4cfc77c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arc/plat-arcfpga/include/plat/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/plat-arcfpga/include/plat/smp.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,118 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Rajeshwar Ranga: Interrupt Distribution Unit API's</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_ARCFPGA_SMP_H</div><div class='del'>-#define __PLAT_ARCFPGA_SMP_H</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/arcregs.h&gt;</div><div class='del'>-</div><div class='del'>-#define ARC_AUX_IDU_REG_CMD		0x2000</div><div class='del'>-#define ARC_AUX_IDU_REG_PARAM		0x2001</div><div class='del'>-</div><div class='del'>-#define ARC_AUX_XTL_REG_CMD		0x2002</div><div class='del'>-#define ARC_AUX_XTL_REG_PARAM		0x2003</div><div class='del'>-</div><div class='del'>-#define ARC_REG_MP_BCR			0x2021</div><div class='del'>-</div><div class='del'>-#define ARC_XTL_CMD_WRITE_PC		0x04</div><div class='del'>-#define ARC_XTL_CMD_CLEAR_HALT		0x02</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Build Configuration Register which identifies the sub-components</div><div class='del'>- */</div><div class='del'>-struct bcr_mp {</div><div class='del'>-#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-	unsigned int mp_arch:16, pad:5, sdu:1, idu:1, scu:1, ver:8;</div><div class='del'>-#else</div><div class='del'>-	unsigned int ver:8, scu:1, idu:1, sdu:1, pad:5, mp_arch:16;</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* IDU supports 256 common interrupts */</div><div class='del'>-#define NR_IDU_IRQS			256</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The Aux Regs layout is same bit-by-bit in both BE/LE modes.</div><div class='del'>- * However when casted as a bitfield encoded "C" struct, gcc treats it as</div><div class='del'>- * memory, generating different code for BE/LE, requiring strcture adj (see</div><div class='del'>- * include/asm/arcregs.h)</div><div class='del'>- *</div><div class='del'>- * However when manually "carving" the value for a Aux, no special handling</div><div class='del'>- * of BE is needed because of the property discribed above</div><div class='del'>- */</div><div class='del'>-#define IDU_SET_COMMAND(irq, cmd)			\</div><div class='del'>-do {							\</div><div class='del'>-	uint32_t __val;					\</div><div class='del'>-	__val = (((irq &amp; 0xFF) &lt;&lt; 8) | (cmd &amp; 0xFF));	\</div><div class='del'>-	write_aux_reg(ARC_AUX_IDU_REG_CMD, __val);	\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define IDU_SET_PARAM(par)  write_aux_reg(ARC_AUX_IDU_REG_PARAM, par)</div><div class='del'>-#define IDU_GET_PARAM()     read_aux_reg(ARC_AUX_IDU_REG_PARAM)</div><div class='del'>-</div><div class='del'>-/* IDU Commands */</div><div class='del'>-#define IDU_DISABLE			0x00</div><div class='del'>-#define IDU_ENABLE			0x01</div><div class='del'>-#define IDU_IRQ_CLEAR			0x02</div><div class='del'>-#define IDU_IRQ_ASSERT			0x03</div><div class='del'>-#define IDU_IRQ_WMODE			0x04</div><div class='del'>-#define IDU_IRQ_STATUS			0x05</div><div class='del'>-#define IDU_IRQ_ACK			0x06</div><div class='del'>-#define IDU_IRQ_PEND			0x07</div><div class='del'>-#define IDU_IRQ_RMODE			0x08</div><div class='del'>-#define IDU_IRQ_WBITMASK		0x09</div><div class='del'>-#define IDU_IRQ_RBITMASK		0x0A</div><div class='del'>-</div><div class='del'>-#define idu_enable()		IDU_SET_COMMAND(0, IDU_ENABLE)</div><div class='del'>-#define idu_disable()		IDU_SET_COMMAND(0, IDU_DISABLE)</div><div class='del'>-</div><div class='del'>-#define idu_irq_assert(irq)	IDU_SET_COMMAND((irq), IDU_IRQ_ASSERT)</div><div class='del'>-#define idu_irq_clear(irq)	IDU_SET_COMMAND((irq), IDU_IRQ_CLEAR)</div><div class='del'>-</div><div class='del'>-/* IDU Interrupt Mode - Destination Encoding */</div><div class='del'>-#define IDU_IRQ_MOD_DISABLE		0x00</div><div class='del'>-#define IDU_IRQ_MOD_ROUND_RECP		0x01</div><div class='del'>-#define IDU_IRQ_MOD_TCPU_FIRSTRECP	0x02</div><div class='del'>-#define IDU_IRQ_MOD_TCPU_ALLRECP	0x03</div><div class='del'>-</div><div class='del'>-/* IDU Interrupt Mode  - Triggering Mode */</div><div class='del'>-#define IDU_IRQ_MODE_LEVEL_TRIG		0x00</div><div class='del'>-#define IDU_IRQ_MODE_PULSE_TRIG		0x01</div><div class='del'>-</div><div class='del'>-#define IDU_IRQ_MODE_PARAM(dest_mode, trig_mode)   \</div><div class='del'>-	(((trig_mode &amp; 0x01) &lt;&lt; 15) | (dest_mode &amp; 0xFF))</div><div class='del'>-</div><div class='del'>-struct idu_irq_config {</div><div class='del'>-	uint8_t irq;</div><div class='del'>-	uint8_t dest_mode;</div><div class='del'>-	uint8_t trig_mode;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct idu_irq_status {</div><div class='del'>-	uint8_t irq;</div><div class='del'>-	bool enabled;</div><div class='del'>-	bool status;</div><div class='del'>-	bool ack;</div><div class='del'>-	bool pend;</div><div class='del'>-	uint8_t next_rr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern void idu_irq_set_tgtcpu(uint8_t irq, uint32_t mask);</div><div class='del'>-extern void idu_irq_set_mode(uint8_t irq, uint8_t dest_mode, uint8_t trig_mode);</div><div class='del'>-</div><div class='del'>-extern void iss_model_init_smp(unsigned int cpu);</div><div class='del'>-extern void iss_model_init_early_smp(void);</div><div class='del'>-</div><div class='del'>-#endif	/* CONFIG_SMP */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arc/plat-arcfpga/smp.c b/arch/arc/plat-arcfpga/smp.c<br/>deleted file mode 100644<br/>index 64797ba3bbe3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arc/plat-arcfpga/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/plat-arcfpga/smp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,186 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ARC700 Simulation-only Extensions for SMP</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Vineet Gupta    - 2012 : split off arch common and plat specific SMP</div><div class='del'>- *  Rajeshwar Ranga - 2007 : Interrupt Distribution Unit API's</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;plat/smp.h&gt;</div><div class='del'>-</div><div class='del'>-#define IDU_INTERRUPT_0 16</div><div class='del'>-</div><div class='del'>-static char smp_cpuinfo_buf[128];</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *-------------------------------------------------------------------</div><div class='del'>- * Platform specific callbacks expected by arch SMP code</div><div class='del'>- *-------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Master kick starting another CPU</div><div class='del'>- */</div><div class='del'>-static void iss_model_smp_wakeup_cpu(int cpu, unsigned long pc)</div><div class='del'>-{</div><div class='del'>-	/* setup the start PC */</div><div class='del'>-	write_aux_reg(ARC_AUX_XTL_REG_PARAM, pc);</div><div class='del'>-</div><div class='del'>-	/* Trigger WRITE_PC cmd for this cpu */</div><div class='del'>-	write_aux_reg(ARC_AUX_XTL_REG_CMD,</div><div class='del'>-			(ARC_XTL_CMD_WRITE_PC | (cpu &lt;&lt; 8)));</div><div class='del'>-</div><div class='del'>-	/* Take the cpu out of Halt */</div><div class='del'>-	write_aux_reg(ARC_AUX_XTL_REG_CMD,</div><div class='del'>-			(ARC_XTL_CMD_CLEAR_HALT | (cpu &lt;&lt; 8)));</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int get_hw_config_num_irq(void)</div><div class='del'>-{</div><div class='del'>-	uint32_t val = read_aux_reg(ARC_REG_VECBASE_BCR);</div><div class='del'>-</div><div class='del'>-	switch (val &amp; 0x03) {</div><div class='del'>-	case 0:</div><div class='del'>-		return 16;</div><div class='del'>-	case 1:</div><div class='del'>-		return 32;</div><div class='del'>-	case 2:</div><div class='del'>-		return 8;</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Any SMP specific init any CPU does when it comes up.</div><div class='del'>- * Here we setup the CPU to enable Inter-Processor-Interrupts</div><div class='del'>- * Called for each CPU</div><div class='del'>- * -Master      : init_IRQ()</div><div class='del'>- * -Other(s)    : start_kernel_secondary()</div><div class='del'>- */</div><div class='del'>-void iss_model_init_smp(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	/* Check if CPU is configured for more than 16 interrupts */</div><div class='del'>-	if (NR_IRQS &lt;= 16 || get_hw_config_num_irq() &lt;= 16)</div><div class='del'>-		panic("[arcfpga] IRQ system can't support IDU IPI\n");</div><div class='del'>-</div><div class='del'>-	idu_disable();</div><div class='del'>-</div><div class='del'>-	/****************************************************************</div><div class='del'>-	 * IDU provides a set of Common IRQs, each of which can be dynamically</div><div class='del'>-	 * attached to (1|many|all) CPUs.</div><div class='del'>-	 * The Common IRQs [0-15] are mapped as CPU pvt [16-31]</div><div class='del'>-	 *</div><div class='del'>-	 * Here we use a simple 1:1 mapping:</div><div class='del'>-	 * A CPU 'x' is wired to Common IRQ 'x'.</div><div class='del'>-	 * So an IDU ASSERT on IRQ 'x' will trigger Interupt on CPU 'x', which</div><div class='del'>-	 * makes up for our simple IPI plumbing.</div><div class='del'>-	 *</div><div class='del'>-	 * TBD: Have a dedicated multicast IRQ for sending IPIs to all CPUs</div><div class='del'>-	 *      w/o having to do one-at-a-time</div><div class='del'>-	 ******************************************************************/</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Claim an IRQ which would trigger IPI on this CPU.</div><div class='del'>-	 * In IDU parlance it involves setting up a cpu bitmask for the IRQ</div><div class='del'>-	 * The bitmap here contains only 1 CPU (self).</div><div class='del'>-	 */</div><div class='del'>-	idu_irq_set_tgtcpu(cpu, 0x1 &lt;&lt; cpu);</div><div class='del'>-</div><div class='del'>-	/* Set the IRQ destination to use the bitmask above */</div><div class='del'>-	idu_irq_set_mode(cpu, 7, /* XXX: IDU_IRQ_MOD_TCPU_ALLRECP: ISS bug */</div><div class='del'>-			 IDU_IRQ_MODE_PULSE_TRIG);</div><div class='del'>-</div><div class='del'>-	idu_enable();</div><div class='del'>-</div><div class='del'>-	/* Attach the arch-common IPI ISR to our IDU IRQ */</div><div class='del'>-	smp_ipi_irq_setup(cpu, IDU_INTERRUPT_0 + cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iss_model_ipi_send(int cpu)</div><div class='del'>-{</div><div class='del'>-	idu_irq_assert(cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iss_model_ipi_clear(int irq)</div><div class='del'>-{</div><div class='del'>-	idu_irq_clear(IDU_INTERRUPT_0 + smp_processor_id());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iss_model_init_early_smp(void)</div><div class='del'>-{</div><div class='del'>-#define IS_AVAIL1(var, str)    ((var) ? str : "")</div><div class='del'>-</div><div class='del'>-	struct bcr_mp mp;</div><div class='del'>-</div><div class='del'>-	READ_BCR(ARC_REG_MP_BCR, mp);</div><div class='del'>-</div><div class='del'>-	sprintf(smp_cpuinfo_buf, "Extn [ISS-SMP]: v%d, arch(%d) %s %s %s\n",</div><div class='del'>-		mp.ver, mp.mp_arch, IS_AVAIL1(mp.scu, "SCU"),</div><div class='del'>-		IS_AVAIL1(mp.idu, "IDU"), IS_AVAIL1(mp.sdu, "SDU"));</div><div class='del'>-</div><div class='del'>-	plat_smp_ops.info = smp_cpuinfo_buf;</div><div class='del'>-</div><div class='del'>-	plat_smp_ops.cpu_kick = iss_model_smp_wakeup_cpu;</div><div class='del'>-	plat_smp_ops.ipi_send = iss_model_ipi_send;</div><div class='del'>-	plat_smp_ops.ipi_clear = iss_model_ipi_clear;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *-------------------------------------------------------------------</div><div class='del'>- * Low level Platform IPI Providers</div><div class='del'>- *-------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Set the Mode for the Common IRQ */</div><div class='del'>-void idu_irq_set_mode(uint8_t irq, uint8_t dest_mode, uint8_t trig_mode)</div><div class='del'>-{</div><div class='del'>-	uint32_t par = IDU_IRQ_MODE_PARAM(dest_mode, trig_mode);</div><div class='del'>-</div><div class='del'>-	IDU_SET_PARAM(par);</div><div class='del'>-	IDU_SET_COMMAND(irq, IDU_IRQ_WMODE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Set the target cpu Bitmask for Common IRQ */</div><div class='del'>-void idu_irq_set_tgtcpu(uint8_t irq, uint32_t mask)</div><div class='del'>-{</div><div class='del'>-	IDU_SET_PARAM(mask);</div><div class='del'>-	IDU_SET_COMMAND(irq, IDU_IRQ_WBITMASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Get the Interrupt Acknowledged status for IRQ (as CPU Bitmask) */</div><div class='del'>-bool idu_irq_get_ack(uint8_t irq)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-</div><div class='del'>-	IDU_SET_COMMAND(irq, IDU_IRQ_ACK);</div><div class='del'>-	val = IDU_GET_PARAM();</div><div class='del'>-</div><div class='del'>-	return val &amp; (1 &lt;&lt; irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the Interrupt Pending status for IRQ (as CPU Bitmask)</div><div class='del'>- * -Pending means CPU has not yet noticed the IRQ (e.g. disabled)</div><div class='del'>- * -After Interrupt has been taken, the IPI expcitily needs to be</div><div class='del'>- *  cleared, to be acknowledged.</div><div class='del'>- */</div><div class='del'>-bool idu_irq_get_pend(uint8_t irq)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-</div><div class='del'>-	IDU_SET_COMMAND(irq, IDU_IRQ_PEND);</div><div class='del'>-	val = IDU_GET_PARAM();</div><div class='del'>-</div><div class='del'>-	return val &amp; (1 &lt;&lt; irq);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arc/plat-axs10x/Kconfig b/arch/arc/plat-axs10x/Kconfig<br/>new file mode 100644<br/>index 000000000000..d475f9d4847c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-axs10x/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+#</div><div class='add'>+# This program is free software; you can redistribute it and/or modify</div><div class='add'>+# it under the terms of the GNU General Public License version 2 as</div><div class='add'>+# published by the Free Software Foundation.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+menuconfig ARC_PLAT_AXS10X</div><div class='add'>+	bool "Synopsys ARC AXS10x Software Development Platforms"</div><div class='add'>+	select DW_APB_ICTL</div><div class='add'>+	select GPIO_DWAPB</div><div class='add'>+	select OF_GPIO</div><div class='add'>+	select GENERIC_IRQ_CHIP</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	help</div><div class='add'>+	  Support for the ARC AXS10x Software Development Platforms.</div><div class='add'>+</div><div class='add'>+	  The AXS10x Platforms consist of a mainboard with peripherals,</div><div class='add'>+	  on which several daughter cards can be placed. The daughter cards</div><div class='add'>+	  typically contain a CPU and memory.</div><div class='add'>+</div><div class='add'>+if ARC_PLAT_AXS10X</div><div class='add'>+</div><div class='add'>+config AXS101</div><div class='add'>+	depends on ISA_ARCOMPACT</div><div class='add'>+	bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)"</div><div class='add'>+	help</div><div class='add'>+	  This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC</div><div class='add'>+	  770D is supported in Linux.</div><div class='add'>+</div><div class='add'>+	  The AXS101 Platform consists of an AXS10x mainboard with</div><div class='add'>+	  this daughtercard. Please use the axs101.dts device tree</div><div class='add'>+	  with this configuration.</div><div class='add'>+</div><div class='add'>+config AXS103</div><div class='add'>+	bool "AXS103 with AXC003 CPU Card (ARC HS38x)"</div><div class='add'>+	depends on ISA_ARCV2</div><div class='add'>+	help</div><div class='add'>+	  This adds support for the HS38x CPU Card.</div><div class='add'>+</div><div class='add'>+	  The AXS103 Platform consists of an AXS10x mainboard with</div><div class='add'>+	  this daughtercard. Please use the axs103.dts device tree</div><div class='add'>+	  with this configuration.</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arc/plat-axs10x/Makefile b/arch/arc/plat-axs10x/Makefile<br/>new file mode 100644<br/>index 000000000000..d4748f27f86e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-axs10x/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+#</div><div class='add'>+# This program is free software; you can redistribute it and/or modify</div><div class='add'>+# it under the terms of the GNU General Public License version 2 as</div><div class='add'>+# published by the Free Software Foundation.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x.o</div><div class='head'>diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c<br/>new file mode 100644<br/>index 000000000000..99f7da513a48<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-axs10x/axs10x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-axs10x/axs10x.c</a></div><div class='hunk'>@@ -0,0 +1,484 @@</div><div class='add'>+/*</div><div class='add'>+ * AXS101/AXS103 Software Development Platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/clk.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/mach_desc.h&gt;</div><div class='add'>+#include &lt;asm/mcip.h&gt;</div><div class='add'>+</div><div class='add'>+#define AXS_MB_CGU		0xE0010000</div><div class='add'>+#define AXS_MB_CREG		0xE0011000</div><div class='add'>+</div><div class='add'>+#define CREG_MB_IRQ_MUX		(AXS_MB_CREG + 0x214)</div><div class='add'>+#define CREG_MB_SW_RESET	(AXS_MB_CREG + 0x220)</div><div class='add'>+#define CREG_MB_VER		(AXS_MB_CREG + 0x230)</div><div class='add'>+#define CREG_MB_CONFIG		(AXS_MB_CREG + 0x234)</div><div class='add'>+</div><div class='add'>+#define AXC001_CREG		0xF0001000</div><div class='add'>+#define AXC001_GPIO_INTC	0xF0003000</div><div class='add'>+</div><div class='add'>+static void __init axs10x_enable_gpio_intc_wire(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Peripherals on CPU Card and Mother Board are wired to cpu intc via</div><div class='add'>+	 * intermediate DW APB GPIO blocks (mainly for debouncing)</div><div class='add'>+	 *</div><div class='add'>+	 *         ---------------------</div><div class='add'>+	 *        |  snps,arc700-intc |</div><div class='add'>+	 *        ---------------------</div><div class='add'>+	 *          | #7          | #15</div><div class='add'>+	 * -------------------   -------------------</div><div class='add'>+	 * | snps,dw-apb-gpio |  | snps,dw-apb-gpio |</div><div class='add'>+	 * -------------------   -------------------</div><div class='add'>+	 *        |                         |</div><div class='add'>+	 *        |                 [ Debug UART on cpu card ]</div><div class='add'>+	 *        |</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 * | snps,dw-apb-intc (MB)|</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 *  |      |       |      |</div><div class='add'>+	 * [eth] [uart]        [... other perip on Main Board]</div><div class='add'>+	 *</div><div class='add'>+	 * Current implementation of "irq-dw-apb-ictl" driver doesn't work well</div><div class='add'>+	 * with stacked INTCs. In particular problem happens if its master INTC</div><div class='add'>+	 * not yet instantiated. See discussion here -</div><div class='add'>+	 * https://lkml.org/lkml/2015/3/4/755</div><div class='add'>+	 *</div><div class='add'>+	 * So setup the first gpio block as a passive pass thru and hide it from</div><div class='add'>+	 * DT hardware topology - connect MB intc directly to cpu intc</div><div class='add'>+	 * The GPIO "wire" needs to be init nevertheless (here)</div><div class='add'>+	 *</div><div class='add'>+	 * One side adv is that peripheral interrupt handling avoids one nested</div><div class='add'>+	 * intc ISR hop</div><div class='add'>+	 */</div><div class='add'>+#define GPIO_INTEN		(AXC001_GPIO_INTC + 0x30)</div><div class='add'>+#define GPIO_INTMASK		(AXC001_GPIO_INTC + 0x34)</div><div class='add'>+#define GPIO_INTTYPE_LEVEL	(AXC001_GPIO_INTC + 0x38)</div><div class='add'>+#define GPIO_INT_POLARITY	(AXC001_GPIO_INTC + 0x3c)</div><div class='add'>+#define MB_TO_GPIO_IRQ		12</div><div class='add'>+</div><div class='add'>+	iowrite32(~(1 &lt;&lt; MB_TO_GPIO_IRQ), (void __iomem *) GPIO_INTMASK);</div><div class='add'>+	iowrite32(0, (void __iomem *) GPIO_INTTYPE_LEVEL);</div><div class='add'>+	iowrite32(~0, (void __iomem *) GPIO_INT_POLARITY);</div><div class='add'>+	iowrite32(1 &lt;&lt; MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __init</div><div class='add'>+write_cgu_reg(uint32_t value, void __iomem *reg, void __iomem *lock_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int loops = 128 * 1024, ctr;</div><div class='add'>+</div><div class='add'>+	iowrite32(value, reg);</div><div class='add'>+</div><div class='add'>+	ctr = loops;</div><div class='add'>+	while (((ioread32(lock_reg) &amp; 1) == 1) &amp;&amp; ctr--) /* wait for unlock */</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	ctr = loops;</div><div class='add'>+	while (((ioread32(lock_reg) &amp; 1) == 0) &amp;&amp; ctr--) /* wait for re-lock */</div><div class='add'>+		cpu_relax();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init axs10x_print_board_ver(unsigned int creg, const char *str)</div><div class='add'>+{</div><div class='add'>+	union ver {</div><div class='add'>+		struct {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+			unsigned int pad:11, y:12, m:4, d:5;</div><div class='add'>+#else</div><div class='add'>+			unsigned int d:5, m:4, y:12, pad:11;</div><div class='add'>+#endif</div><div class='add'>+		};</div><div class='add'>+		unsigned int val;</div><div class='add'>+	} board;</div><div class='add'>+</div><div class='add'>+	board.val = ioread32((void __iomem *)creg);</div><div class='add'>+	pr_info("AXS: %s FPGA Date: %u-%u-%u\n", str, board.d, board.m,</div><div class='add'>+		board.y);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init axs10x_early_init(void)</div><div class='add'>+{</div><div class='add'>+	int mb_rev;</div><div class='add'>+	char mb[32];</div><div class='add'>+</div><div class='add'>+	/* Determine motherboard version */</div><div class='add'>+	if (ioread32((void __iomem *) CREG_MB_CONFIG) &amp; (1 &lt;&lt; 28))</div><div class='add'>+		mb_rev = 3;	/* HT-3 (rev3.0) */</div><div class='add'>+	else</div><div class='add'>+		mb_rev = 2;	/* HT-2 (rev2.0) */</div><div class='add'>+</div><div class='add'>+	axs10x_enable_gpio_intc_wire();</div><div class='add'>+</div><div class='add'>+	scnprintf(mb, 32, "MainBoard v%d", mb_rev);</div><div class='add'>+	axs10x_print_board_ver(CREG_MB_VER, mb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AXS101</div><div class='add'>+</div><div class='add'>+#define CREG_CPU_ADDR_770	(AXC001_CREG + 0x20)</div><div class='add'>+#define CREG_CPU_ADDR_TUNN	(AXC001_CREG + 0x60)</div><div class='add'>+#define CREG_CPU_ADDR_770_UPD	(AXC001_CREG + 0x34)</div><div class='add'>+#define CREG_CPU_ADDR_TUNN_UPD	(AXC001_CREG + 0x74)</div><div class='add'>+</div><div class='add'>+#define CREG_CPU_ARC770_IRQ_MUX	(AXC001_CREG + 0x114)</div><div class='add'>+#define CREG_CPU_GPIO_UART_MUX	(AXC001_CREG + 0x120)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set up System Memory Map for ARC cpu / peripherals controllers</div><div class='add'>+ *</div><div class='add'>+ * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each</div><div class='add'>+ * of which maps to a corresponding 256MB aperture in Target slave memory map.</div><div class='add'>+ *</div><div class='add'>+ * e.g. ARC cpu AXI Master's aperture 8 (0x8000_0000) is mapped to aperture 0</div><div class='add'>+ * (0x0000_0000) of DDR Port 0 (slave #1)</div><div class='add'>+ *</div><div class='add'>+ * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel:</div><div class='add'>+ * which has master/slaves on both ends.</div><div class='add'>+ * e.g. aperture 14 (0xE000_0000) of ARC cpu is mapped to aperture 14</div><div class='add'>+ * (0xE000_0000) of CPU Card AXI Tunnel slave (slave #3) which is mapped to</div><div class='add'>+ * MB AXI Tunnel Master, which also has a mem map setup</div><div class='add'>+ *</div><div class='add'>+ * In the reverse direction, MB AXI Masters (e.g. GMAC) mem map is setup</div><div class='add'>+ * to map to MB AXI Tunnel slave which connects to CPU Card AXI Tunnel Master</div><div class='add'>+ */</div><div class='add'>+struct aperture {</div><div class='add'>+	unsigned int slave_sel:4, slave_off:4, pad:24;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CPU Card target slaves */</div><div class='add'>+#define AXC001_SLV_NONE			0</div><div class='add'>+#define AXC001_SLV_DDR_PORT0		1</div><div class='add'>+#define AXC001_SLV_SRAM			2</div><div class='add'>+#define AXC001_SLV_AXI_TUNNEL		3</div><div class='add'>+#define AXC001_SLV_AXI2APB		6</div><div class='add'>+#define AXC001_SLV_DDR_PORT1		7</div><div class='add'>+</div><div class='add'>+/* MB AXI Target slaves */</div><div class='add'>+#define AXS_MB_SLV_NONE			0</div><div class='add'>+#define AXS_MB_SLV_AXI_TUNNEL_CPU	1</div><div class='add'>+#define AXS_MB_SLV_AXI_TUNNEL_HAPS	2</div><div class='add'>+#define AXS_MB_SLV_SRAM			3</div><div class='add'>+#define AXS_MB_SLV_CONTROL		4</div><div class='add'>+</div><div class='add'>+/* MB AXI masters */</div><div class='add'>+#define AXS_MB_MST_TUNNEL_CPU		0</div><div class='add'>+#define AXS_MB_MST_USB_OHCI		10</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * memmap for ARC core on CPU Card</div><div class='add'>+ */</div><div class='add'>+static const struct aperture axc001_memmap[16] = {</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0x0},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0x1},</div><div class='add'>+	{AXC001_SLV_SRAM,		0x0}, /* 0x2000_0000: Local SRAM */</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_DDR_PORT0,		0x0}, /* 0x8000_0000: DDR   0..256M */</div><div class='add'>+	{AXC001_SLV_DDR_PORT0,		0x1}, /* 0x9000_0000: DDR 256..512M */</div><div class='add'>+	{AXC001_SLV_DDR_PORT0,		0x2},</div><div class='add'>+	{AXC001_SLV_DDR_PORT0,		0x3},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0xD},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0xE}, /* MB: CREG, CGU... */</div><div class='add'>+	{AXC001_SLV_AXI2APB,		0x0}, /* CPU Card local CREG, CGU... */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * memmap for CPU Card AXI Tunnel Master (for access by MB controllers)</div><div class='add'>+ * GMAC (MB) -&gt; MB AXI Tunnel slave -&gt; CPU Card AXI Tunnel Master -&gt; DDR</div><div class='add'>+ */</div><div class='add'>+static const struct aperture axc001_axi_tunnel_memmap[16] = {</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0x0},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0x1},</div><div class='add'>+	{AXC001_SLV_SRAM,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_DDR_PORT1,		0x0},</div><div class='add'>+	{AXC001_SLV_DDR_PORT1,		0x1},</div><div class='add'>+	{AXC001_SLV_DDR_PORT1,		0x2},</div><div class='add'>+	{AXC001_SLV_DDR_PORT1,		0x3},</div><div class='add'>+	{AXC001_SLV_NONE,		0x0},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0xD},</div><div class='add'>+	{AXC001_SLV_AXI_TUNNEL,		0xE},</div><div class='add'>+	{AXC001_SLV_AXI2APB,		0x0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * memmap for MB AXI Masters</div><div class='add'>+ * Same mem map for all perip controllers as well as MB AXI Tunnel Master</div><div class='add'>+ */</div><div class='add'>+static const struct aperture axs_mb_memmap[16] = {</div><div class='add'>+	{AXS_MB_SLV_SRAM,		0x0},</div><div class='add'>+	{AXS_MB_SLV_SRAM,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_CPU,	0x8},	/* DDR on CPU Card */</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_CPU,	0x9},	/* DDR on CPU Card */</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_CPU,	0xA},</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_CPU,	0xB},</div><div class='add'>+	{AXS_MB_SLV_NONE,		0x0},</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_HAPS,	0xD},</div><div class='add'>+	{AXS_MB_SLV_CONTROL,		0x0},	/* MB Local CREG, CGU... */</div><div class='add'>+	{AXS_MB_SLV_AXI_TUNNEL_CPU,	0xF},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static noinline void __init</div><div class='add'>+axs101_set_memmap(void __iomem *base, const struct aperture map[16])</div><div class='add'>+{</div><div class='add'>+	unsigned int slave_select, slave_offset;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	slave_select = slave_offset = 0;</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		slave_select |= map[i].slave_sel &lt;&lt; (i &lt;&lt; 2);</div><div class='add'>+		slave_offset |= map[i].slave_off &lt;&lt; (i &lt;&lt; 2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite32(slave_select, base + 0x0);	/* SLV0 */</div><div class='add'>+	iowrite32(slave_offset, base + 0x8);	/* OFFSET0 */</div><div class='add'>+</div><div class='add'>+	slave_select = slave_offset = 0;</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		slave_select |= map[i+8].slave_sel &lt;&lt; (i &lt;&lt; 2);</div><div class='add'>+		slave_offset |= map[i+8].slave_off &lt;&lt; (i &lt;&lt; 2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite32(slave_select, base + 0x4);	/* SLV1 */</div><div class='add'>+	iowrite32(slave_offset, base + 0xC);	/* OFFSET1 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init axs101_early_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* ARC 770D memory view */</div><div class='add'>+	axs101_set_memmap((void __iomem *) CREG_CPU_ADDR_770, axc001_memmap);</div><div class='add'>+	iowrite32(1, (void __iomem *) CREG_CPU_ADDR_770_UPD);</div><div class='add'>+</div><div class='add'>+	/* AXI tunnel memory map (incoming traffic from MB into CPU Card */</div><div class='add'>+	axs101_set_memmap((void __iomem *) CREG_CPU_ADDR_TUNN,</div><div class='add'>+			      axc001_axi_tunnel_memmap);</div><div class='add'>+	iowrite32(1, (void __iomem *) CREG_CPU_ADDR_TUNN_UPD);</div><div class='add'>+</div><div class='add'>+	/* MB peripherals memory map */</div><div class='add'>+	for (i = AXS_MB_MST_TUNNEL_CPU; i &lt;= AXS_MB_MST_USB_OHCI; i++)</div><div class='add'>+		axs101_set_memmap((void __iomem *) AXS_MB_CREG + (i &lt;&lt; 4),</div><div class='add'>+				      axs_mb_memmap);</div><div class='add'>+</div><div class='add'>+	iowrite32(0x3ff, (void __iomem *) AXS_MB_CREG + 0x100); /* Update */</div><div class='add'>+</div><div class='add'>+	/* GPIO pins 18 and 19 are used as UART rx and tx, respectively. */</div><div class='add'>+	iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX);</div><div class='add'>+</div><div class='add'>+	/* Set up the MB interrupt system: mux interrupts to GPIO7) */</div><div class='add'>+	iowrite32(0x01, (void __iomem *) CREG_MB_IRQ_MUX);</div><div class='add'>+</div><div class='add'>+	/* reset ethernet and ULPI interfaces */</div><div class='add'>+	iowrite32(0x18, (void __iomem *) CREG_MB_SW_RESET);</div><div class='add'>+</div><div class='add'>+	/* map GPIO 14:10 to ARC 9:5 (IRQ mux change for MB v2 onwards) */</div><div class='add'>+	iowrite32(0x52, (void __iomem *) CREG_CPU_ARC770_IRQ_MUX);</div><div class='add'>+</div><div class='add'>+	axs10x_early_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_AXS101 */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AXS103</div><div class='add'>+</div><div class='add'>+#define AXC003_CGU	0xF0000000</div><div class='add'>+#define AXC003_CREG	0xF0001000</div><div class='add'>+#define AXC003_MST_AXI_TUNNEL	0</div><div class='add'>+#define AXC003_MST_HS38		1</div><div class='add'>+</div><div class='add'>+#define CREG_CPU_AXI_M0_IRQ_MUX	(AXC003_CREG + 0x440)</div><div class='add'>+#define CREG_CPU_GPIO_UART_MUX	(AXC003_CREG + 0x480)</div><div class='add'>+#define CREG_CPU_TUN_IO_CTRL	(AXC003_CREG + 0x494)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+union pll_reg {</div><div class='add'>+	struct {</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		unsigned int pad:17, noupd:1, bypass:1, edge:1, high:6, low:6;</div><div class='add'>+#else</div><div class='add'>+		unsigned int low:6, high:6, edge:1, bypass:1, noupd:1, pad:17;</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+	unsigned int val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int __init axs103_get_freq(void)</div><div class='add'>+{</div><div class='add'>+	union pll_reg idiv, fbdiv, odiv;</div><div class='add'>+	unsigned int f = 33333333;</div><div class='add'>+</div><div class='add'>+	idiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 0);</div><div class='add'>+	fbdiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 4);</div><div class='add'>+	odiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 8);</div><div class='add'>+</div><div class='add'>+	if (idiv.bypass != 1)</div><div class='add'>+		f = f / (idiv.low + idiv.high);</div><div class='add'>+</div><div class='add'>+	if (fbdiv.bypass != 1)</div><div class='add'>+		f = f * (fbdiv.low + fbdiv.high);</div><div class='add'>+</div><div class='add'>+	if (odiv.bypass != 1)</div><div class='add'>+		f = f / (odiv.low + odiv.high);</div><div class='add'>+</div><div class='add'>+	f = (f + 500000) / 1000000; /* Rounding */</div><div class='add'>+	return f;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int __init encode_div(unsigned int id, int upd)</div><div class='add'>+{</div><div class='add'>+	union pll_reg div;</div><div class='add'>+</div><div class='add'>+	div.val = 0;</div><div class='add'>+</div><div class='add'>+	div.noupd = !upd;</div><div class='add'>+	div.bypass = id == 1 ? 1 : 0;</div><div class='add'>+	div.edge = (id%2 == 0) ? 0 : 1;  /* 0 = rising */</div><div class='add'>+	div.low = (id%2 == 0) ? id &gt;&gt; 1 : (id &gt;&gt; 1)+1;</div><div class='add'>+	div.high = id &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	return div.val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+noinline static void __init</div><div class='add'>+axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)</div><div class='add'>+{</div><div class='add'>+	write_cgu_reg(encode_div(id, 0),</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x80 + 0,</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x110);</div><div class='add'>+</div><div class='add'>+	write_cgu_reg(encode_div(fd, 0),</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x80 + 4,</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x110);</div><div class='add'>+</div><div class='add'>+	write_cgu_reg(encode_div(od, 1),</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x80 + 8,</div><div class='add'>+		      (void __iomem *)AXC003_CGU + 0x110);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init axs103_early_init(void)</div><div class='add'>+{</div><div class='add'>+	switch (arc_get_core_freq()/1000000) {</div><div class='add'>+	case 33:</div><div class='add'>+		axs103_set_freq(1, 1, 1);</div><div class='add'>+		break;</div><div class='add'>+	case 50:</div><div class='add'>+		axs103_set_freq(1, 30, 20);</div><div class='add'>+		break;</div><div class='add'>+	case 75:</div><div class='add'>+		axs103_set_freq(2, 45, 10);</div><div class='add'>+		break;</div><div class='add'>+	case 90:</div><div class='add'>+		axs103_set_freq(2, 54, 10);</div><div class='add'>+		break;</div><div class='add'>+	case 100:</div><div class='add'>+		axs103_set_freq(1, 30, 10);</div><div class='add'>+		break;</div><div class='add'>+	case 125:</div><div class='add'>+		axs103_set_freq(2, 45,  6);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/*</div><div class='add'>+		 * In this case, core_frequency derived from</div><div class='add'>+		 * DT "clock-frequency" might not match with board value.</div><div class='add'>+		 * Hence update it to match the board value.</div><div class='add'>+		 */</div><div class='add'>+		arc_set_core_freq(axs103_get_freq() * 1000000);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("Freq is %dMHz\n", axs103_get_freq());</div><div class='add'>+</div><div class='add'>+	/* Memory maps already config in pre-bootloader */</div><div class='add'>+</div><div class='add'>+	/* set GPIO mux to UART */</div><div class='add'>+	iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX);</div><div class='add'>+</div><div class='add'>+	iowrite32((0x00100000U | 0x000C0000U | 0x00003322U),</div><div class='add'>+		  (void __iomem *) CREG_CPU_TUN_IO_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Set up the AXS_MB interrupt system.*/</div><div class='add'>+	iowrite32(12, (void __iomem *) (CREG_CPU_AXI_M0_IRQ_MUX</div><div class='add'>+					 + (AXC003_MST_HS38 &lt;&lt; 2)));</div><div class='add'>+</div><div class='add'>+	/* connect ICTL - Main Board with GPIO line */</div><div class='add'>+	iowrite32(0x01, (void __iomem *) CREG_MB_IRQ_MUX);</div><div class='add'>+</div><div class='add'>+	axs10x_print_board_ver(AXC003_CREG + 4088, "AXC003 CPU Card");</div><div class='add'>+</div><div class='add'>+	axs10x_early_init();</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARC_MCIP</div><div class='add'>+	/* No Hardware init, but filling the smp ops callbacks */</div><div class='add'>+	mcip_init_early_smp();</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AXS101</div><div class='add'>+</div><div class='add'>+static const char *axs101_compat[] __initconst = {</div><div class='add'>+	"snps,axs101",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MACHINE_START(AXS101, "axs101")</div><div class='add'>+	.dt_compat	= axs101_compat,</div><div class='add'>+	.init_early	= axs101_early_init,</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_AXS101 */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AXS103</div><div class='add'>+</div><div class='add'>+static const char *axs103_compat[] __initconst = {</div><div class='add'>+	"snps,axs103",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MACHINE_START(AXS103, "axs103")</div><div class='add'>+	.dt_compat	= axs103_compat,</div><div class='add'>+	.init_early	= axs103_early_init,</div><div class='add'>+#ifdef CONFIG_ARC_MCIP</div><div class='add'>+	.init_smp	= mcip_init_smp,</div><div class='add'>+#endif</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For the VDK OS-kit, to get the offset to pid and command fields</div><div class='add'>+ */</div><div class='add'>+char coware_swa_pid_offset[TASK_PID];</div><div class='add'>+char coware_swa_comm_offset[TASK_COMM];</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_AXS103 */</div><div class='head'>diff --git a/arch/arc/plat-sim/Kconfig b/arch/arc/plat-sim/Kconfig<br/>new file mode 100644<br/>index 000000000000..18e39fcc488a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-sim/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='add'>+#</div><div class='add'>+# This program is free software; you can redistribute it and/or modify</div><div class='add'>+# it under the terms of the GNU General Public License version 2 as</div><div class='add'>+# published by the Free Software Foundation.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+menuconfig ARC_PLAT_SIM</div><div class='add'>+	bool "ARC nSIM based simulation virtual platforms"</div><div class='add'>+	select ARC_HAS_COH_CACHES if SMP</div><div class='add'>+	help</div><div class='add'>+	  Support for nSIM based ARC simulation platforms</div><div class='add'>+	  This includes the standalone nSIM (uart only) vs. System C OSCI VP</div><div class='head'>diff --git a/arch/arc/plat-arcfpga/Makefile b/arch/arc/plat-sim/Makefile<br/>index 66fd0ecd68b3..00b1a958cec7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/plat-arcfpga/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/plat-arcfpga/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-sim/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/Makefile</a></div><div class='hunk'>@@ -6,7 +6,4 @@</div><div class='ctx'> # published by the Free Software Foundation.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-KBUILD_CFLAGS	+= -Iarch/arc/plat-arcfpga/include</div><div class='del'>-</div><div class='ctx'> obj-y := platform.o</div><div class='del'>-obj-$(CONFIG_ISS_SMP_EXTN)		+= smp.o</div><div class='head'>diff --git a/arch/arc/plat-arcfpga/platform.c b/arch/arc/plat-sim/platform.c<br/>index afc88254acc1..d9e35b4a2f08 100644<br/>--- a/<a href='/drm-misc/tree/arch/arc/plat-arcfpga/platform.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arc/plat-arcfpga/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arc/plat-sim/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arc/plat-sim/platform.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * ARC FPGA Platform support code</div><div class='add'>+ * ARC simulation Platform support code</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/mach_desc.h&gt;</div><div class='del'>-#include &lt;plat/smp.h&gt;</div><div class='add'>+#include &lt;asm/mcip.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*----------------------- Machine Descriptions ------------------------------</div><div class='ctx'>  *</div><div class='hunk'>@@ -20,26 +20,18 @@</div><div class='ctx'>  * callback set, by matching the DT compatible name.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static const char *legacy_fpga_compat[] __initconst = {</div><div class='del'>-	"snps,arc-angel4",</div><div class='del'>-	"snps,arc-ml509",</div><div class='del'>-	NULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MACHINE_START(LEGACY_FPGA, "legacy_fpga")</div><div class='del'>-	.dt_compat	= legacy_fpga_compat,</div><div class='del'>-#ifdef CONFIG_ISS_SMP_EXTN</div><div class='del'>-	.init_early	= iss_model_init_early_smp,</div><div class='del'>-	.init_smp	= iss_model_init_smp,</div><div class='del'>-#endif</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='ctx'> static const char *simulation_compat[] __initconst = {</div><div class='ctx'> 	"snps,nsim",</div><div class='add'>+	"snps,nsim_hs",</div><div class='ctx'> 	"snps,nsimosci",</div><div class='add'>+	"snps,nsimosci_hs",</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(SIMULATION, "simulation")</div><div class='ctx'> 	.dt_compat	= simulation_compat,</div><div class='add'>+#ifdef CONFIG_ARC_MCIP</div><div class='add'>+	.init_early	= mcip_init_early_smp,</div><div class='add'>+	.init_smp	= mcip_init_smp,</div><div class='add'>+#endif</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig<br/>index 45df48ba0b12..1c5021002fe4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Kconfig</a></div><div class='hunk'>@@ -15,6 +15,8 @@ config ARM</div><div class='ctx'> 	select CLONE_BACKWARDS</div><div class='ctx'> 	select CPU_PM if (SUSPEND || CPU_IDLE)</div><div class='ctx'> 	select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='add'>+	select EDAC_SUPPORT</div><div class='add'>+	select EDAC_ATOMIC_SCRUB</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP</div><div class='hunk'>@@ -31,8 +33,8 @@ config ARM</div><div class='ctx'> 	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL if (AEABI &amp;&amp; !OABI_COMPAT)</div><div class='ctx'> 	select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) &amp;&amp; !CPU_32v6</div><div class='del'>-	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL</div><div class='del'>-	select HAVE_ARCH_KGDB</div><div class='add'>+	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32</div><div class='add'>+	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER if (AEABI &amp;&amp; !OABI_COMPAT)</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_BPF_JIT</div><div class='hunk'>@@ -43,7 +45,7 @@ config ARM</div><div class='ctx'> 	select HAVE_DMA_API_DEBUG</div><div class='ctx'> 	select HAVE_DMA_ATTRS</div><div class='ctx'> 	select HAVE_DMA_CONTIGUOUS if MMU</div><div class='del'>-	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)</div><div class='add'>+	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) &amp;&amp; !CPU_ENDIAN_BE32</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)</div><div class='hunk'>@@ -57,10 +59,10 @@ config ARM</div><div class='ctx'> 	select HAVE_KERNEL_LZMA</div><div class='ctx'> 	select HAVE_KERNEL_LZO</div><div class='ctx'> 	select HAVE_KERNEL_XZ</div><div class='del'>-	select HAVE_KPROBES if !XIP_KERNEL</div><div class='add'>+	select HAVE_KPROBES if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32 &amp;&amp; !CPU_V7M</div><div class='ctx'> 	select HAVE_KRETPROBES if (HAVE_KPROBES)</div><div class='ctx'> 	select HAVE_MEMBLOCK</div><div class='del'>-	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND</div><div class='add'>+	select HAVE_MOD_ARCH_SPECIFIC</div><div class='ctx'> 	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)</div><div class='ctx'> 	select HAVE_OPTPROBES if !THUMB2_KERNEL</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='hunk'>@@ -171,7 +173,7 @@ config LOCKDEP_SUPPORT</div><div class='ctx'> </div><div class='ctx'> config TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'> 	bool</div><div class='del'>-	default y</div><div class='add'>+	default !CPU_V7M</div><div class='ctx'> </div><div class='ctx'> config RWSEM_XCHGADD_ALGORITHM</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -329,6 +331,20 @@ config ARCH_MULTIPLATFORM</div><div class='ctx'> 	select SPARSE_IRQ</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> </div><div class='add'>+config ARM_SINGLE_ARMV7M</div><div class='add'>+	bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"</div><div class='add'>+	depends on !MMU</div><div class='add'>+	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='add'>+	select ARM_NVIC</div><div class='add'>+	select AUTO_ZRELADDR</div><div class='add'>+	select CLKSRC_OF</div><div class='add'>+	select COMMON_CLK</div><div class='add'>+	select CPU_V7M</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select NO_IOPORT_MAP</div><div class='add'>+	select SPARSE_IRQ</div><div class='add'>+	select USE_OF</div><div class='add'>+</div><div class='ctx'> config ARCH_REALVIEW</div><div class='ctx'> 	bool "ARM Ltd. RealView family"</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='hunk'>@@ -398,24 +414,6 @@ config ARCH_EBSA110</div><div class='ctx'> 	  Ethernet interface, two PCMCIA sockets, two serial ports and a</div><div class='ctx'> 	  parallel port.</div><div class='ctx'> </div><div class='del'>-config ARCH_EFM32</div><div class='del'>-	bool "Energy Micro efm32"</div><div class='del'>-	depends on !MMU</div><div class='del'>-	select ARCH_REQUIRE_GPIOLIB</div><div class='del'>-	select ARM_NVIC</div><div class='del'>-	select AUTO_ZRELADDR</div><div class='del'>-	select CLKSRC_OF</div><div class='del'>-	select COMMON_CLK</div><div class='del'>-	select CPU_V7M</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='del'>-	select NO_DMA</div><div class='del'>-	select NO_IOPORT_MAP</div><div class='del'>-	select SPARSE_IRQ</div><div class='del'>-	select USE_OF</div><div class='del'>-	help</div><div class='del'>-	  Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko</div><div class='del'>-	  processors.</div><div class='del'>-</div><div class='ctx'> config ARCH_EP93XX</div><div class='ctx'> 	bool "EP93xx-based"</div><div class='ctx'> 	select ARCH_HAS_HOLES_MEMORYMODEL</div><div class='hunk'>@@ -606,6 +604,7 @@ config ARCH_PXA</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select ARM_CPU_SUSPEND if PM</div><div class='ctx'> 	select AUTO_ZRELADDR</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='ctx'> 	select CLKSRC_OF</div><div class='hunk'>@@ -752,8 +751,10 @@ config ARCH_OMAP1</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='ctx'> 	select HAVE_IDE</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='add'>+	select MULTI_IRQ_HANDLER</div><div class='ctx'> 	select NEED_MACH_IO_H if PCCARD</div><div class='ctx'> 	select NEED_MACH_MEMORY_H</div><div class='add'>+	select SPARSE_IRQ</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)</div><div class='ctx'> </div><div class='hunk'>@@ -937,6 +938,8 @@ source "arch/arm/mach-tegra/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-u300/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "arch/arm/mach-uniphier/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "arch/arm/mach-ux500/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-versatile/Kconfig"</div><div class='hunk'>@@ -948,8 +951,40 @@ source "arch/arm/mach-vt8500/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-w90x900/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "arch/arm/mach-zx/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "arch/arm/mach-zynq/Kconfig"</div><div class='ctx'> </div><div class='add'>+# ARMv7-M architecture</div><div class='add'>+config ARCH_EFM32</div><div class='add'>+	bool "Energy Micro efm32"</div><div class='add'>+	depends on ARM_SINGLE_ARMV7M</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	help</div><div class='add'>+	  Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko</div><div class='add'>+	  processors.</div><div class='add'>+</div><div class='add'>+config ARCH_LPC18XX</div><div class='add'>+	bool "NXP LPC18xx/LPC43xx"</div><div class='add'>+	depends on ARM_SINGLE_ARMV7M</div><div class='add'>+	select ARCH_HAS_RESET_CONTROLLER</div><div class='add'>+	select ARM_AMBA</div><div class='add'>+	select CLKSRC_LPC32XX</div><div class='add'>+	select PINCTRL</div><div class='add'>+	help</div><div class='add'>+	  Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4</div><div class='add'>+	  high performance microcontrollers.</div><div class='add'>+</div><div class='add'>+config ARCH_STM32</div><div class='add'>+	bool "STMicrolectronics STM32"</div><div class='add'>+	depends on ARM_SINGLE_ARMV7M</div><div class='add'>+	select ARCH_HAS_RESET_CONTROLLER</div><div class='add'>+	select ARMV7M_SYSTICK</div><div class='add'>+	select CLKSRC_STM32</div><div class='add'>+	select RESET_CONTROLLER</div><div class='add'>+	help</div><div class='add'>+	  Support for STMicroelectronics STM32 processors.</div><div class='add'>+</div><div class='ctx'> # Definitions to make life easier</div><div class='ctx'> config ARCH_ACORN</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -975,11 +1010,6 @@ config PLAT_PXA</div><div class='ctx'> config PLAT_VERSATILE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config ARM_TIMER_SP804</div><div class='del'>-	bool</div><div class='del'>-	select CLKSRC_MMIO</div><div class='del'>-	select CLKSRC_OF if OF</div><div class='del'>-</div><div class='ctx'> source "arch/arm/firmware/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source arch/arm/mm/Kconfig</div><div class='hunk'>@@ -1307,6 +1337,7 @@ config SMP</div><div class='ctx'> 	depends on GENERIC_CLOCKEVENTS</div><div class='ctx'> 	depends on HAVE_SMP</div><div class='ctx'> 	depends on MMU || ARM_MPU</div><div class='add'>+	select IRQ_WORK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for systems with more than one CPU. If you have</div><div class='ctx'> 	  a system with only one CPU, say N. If you have a system with more</div><div class='hunk'>@@ -1477,7 +1508,8 @@ config ARM_PSCI</div><div class='ctx'> # selected platforms.</div><div class='ctx'> config ARCH_NR_GPIO</div><div class='ctx'> 	int</div><div class='del'>-	default 1024 if ARCH_SHMOBILE || ARCH_TEGRA || ARCH_ZYNQ</div><div class='add'>+	default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \</div><div class='add'>+		ARCH_ZYNQ</div><div class='ctx'> 	default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \</div><div class='ctx'> 		SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210</div><div class='ctx'> 	default 416 if ARCH_SUNXI</div><div class='hunk'>@@ -1661,6 +1693,12 @@ config HIGHMEM</div><div class='ctx'> config HIGHPTE</div><div class='ctx'> 	bool "Allocate 2nd-level pagetables from highmem"</div><div class='ctx'> 	depends on HIGHMEM</div><div class='add'>+	help</div><div class='add'>+	  The VM uses one page of physical memory for each page table.</div><div class='add'>+	  For systems with a lot of processes, this can use a lot of</div><div class='add'>+	  precious low memory, eventually leading to low memory being</div><div class='add'>+	  consumed by page tables.  Setting this option will allow</div><div class='add'>+	  user-space 2nd level page tables to reside in high memory.</div><div class='ctx'> </div><div class='ctx'> config HW_PERF_EVENTS</div><div class='ctx'> 	bool "Enable hardware performance counter support for perf events"</div><div class='hunk'>@@ -1681,6 +1719,21 @@ config HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='ctx'> config ARCH_WANT_GENERAL_HUGETLB</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARM_MODULE_PLTS</div><div class='add'>+	bool "Use PLTs to allow module memory to spill over into vmalloc area"</div><div class='add'>+	depends on MODULES</div><div class='add'>+	help</div><div class='add'>+	  Allocate PLTs when loading modules so that jumps and calls whose</div><div class='add'>+	  targets are too far away for their relative offsets to be encoded</div><div class='add'>+	  in the instructions themselves can be bounced via veneers in the</div><div class='add'>+	  module's PLT. This allows modules to be allocated in the generic</div><div class='add'>+	  vmalloc area after the dedicated module memory area has been</div><div class='add'>+	  exhausted. The modules will use slightly more memory, but after</div><div class='add'>+	  rounding up to page size, the actual memory footprint is usually</div><div class='add'>+	  the same.</div><div class='add'>+</div><div class='add'>+	  Say y if you are getting out of memory errors while loading modules</div><div class='add'>+</div><div class='ctx'> source "mm/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config FORCE_MAX_ZONEORDER</div><div class='hunk'>@@ -1951,6 +2004,7 @@ config XIP_PHYS_ADDR</div><div class='ctx'> config KEXEC</div><div class='ctx'> 	bool "Kexec system call (EXPERIMENTAL)"</div><div class='ctx'> 	depends on (!SMP || PM_SLEEP_SMP)</div><div class='add'>+	depends on !CPU_V7M</div><div class='ctx'> 	help</div><div class='ctx'> 	  kexec is a system call that implements the ability to shutdown your</div><div class='ctx'> 	  current kernel, and to start another kernel.  It is like a reboot</div><div class='head'>diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug<br/>index 0c12ffb155a2..a2e16f940394 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Kconfig.debug?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Kconfig.debug</a></div><div class='hunk'>@@ -5,6 +5,7 @@ source "lib/Kconfig.debug"</div><div class='ctx'> config ARM_PTDUMP</div><div class='ctx'> 	bool "Export kernel pagetable layout to userspace via debugfs"</div><div class='ctx'> 	depends on DEBUG_KERNEL</div><div class='add'>+	depends on MMU</div><div class='ctx'> 	select DEBUG_FS</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Say Y here if you want to show the kernel pagetable layout in a</div><div class='hunk'>@@ -410,6 +411,13 @@ choice</div><div class='ctx'> 		  Say Y here if you want kernel low-level debugging support</div><div class='ctx'> 		  on i.MX6SX.</div><div class='ctx'> </div><div class='add'>+	config DEBUG_IMX7D_UART</div><div class='add'>+		bool "i.MX7D Debug UART"</div><div class='add'>+		depends on SOC_IMX7D</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want kernel low-level debugging support</div><div class='add'>+		  on i.MX7D.</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_KEYSTONE_UART0</div><div class='ctx'> 		bool "Kernel low-level debugging on KEYSTONE2 using UART0"</div><div class='ctx'> 		depends on ARCH_KEYSTONE</div><div class='hunk'>@@ -433,6 +441,14 @@ choice</div><div class='ctx'> 		  Say Y here if you want kernel low-level debugging support</div><div class='ctx'> 		  on KS8695.</div><div class='ctx'> </div><div class='add'>+	config DEBUG_LPC18XX_UART0</div><div class='add'>+		bool "Kernel low-level debugging via LPC18xx/43xx UART0"</div><div class='add'>+		depends on ARCH_LPC18XX</div><div class='add'>+		select DEBUG_UART_8250</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want kernel low-level debugging support</div><div class='add'>+		  on NXP LPC18xx/43xx UART0.</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_MESON_UARTAO</div><div class='ctx'> 		bool "Kernel low-level debugging via Meson6 UARTAO"</div><div class='ctx'> 		depends on ARCH_MESON</div><div class='hunk'>@@ -908,13 +924,22 @@ choice</div><div class='ctx'> 		  on SA-11x0 UART ports. The kernel will check for the first</div><div class='ctx'> 		  enabled UART in a sequence 3-1-2.</div><div class='ctx'> </div><div class='del'>-	config DEBUG_SOCFPGA_UART</div><div class='add'>+	config DEBUG_SOCFPGA_UART0</div><div class='ctx'> 		depends on ARCH_SOCFPGA</div><div class='del'>-		bool "Use SOCFPGA UART for low-level debug"</div><div class='add'>+		bool "Use SOCFPGA UART0 for low-level debug"</div><div class='ctx'> 		select DEBUG_UART_8250</div><div class='ctx'> 		help</div><div class='ctx'> 		  Say Y here if you want kernel low-level debugging support</div><div class='del'>-		  on SOCFPGA based platforms.</div><div class='add'>+		  on SOCFPGA(Cyclone 5 and Arria 5) based platforms.</div><div class='add'>+</div><div class='add'>+	config DEBUG_SOCFPGA_UART1</div><div class='add'>+		depends on ARCH_SOCFPGA</div><div class='add'>+		bool "Use SOCFPGA UART1 for low-level debug"</div><div class='add'>+		select DEBUG_UART_8250</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want kernel low-level debugging support</div><div class='add'>+		  on SOCFPGA(Arria 10) based platforms.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	config DEBUG_SUN9I_UART0</div><div class='ctx'> 		bool "Kernel low-level debugging messages via sun9i UART0"</div><div class='hunk'>@@ -1157,6 +1182,18 @@ choice</div><div class='ctx'> 		  For more details about semihosting, please see</div><div class='ctx'> 		  chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd.</div><div class='ctx'> </div><div class='add'>+	config DEBUG_ZTE_ZX</div><div class='add'>+		bool "Use ZTE ZX UART"</div><div class='add'>+		select DEBUG_UART_PL01X</div><div class='add'>+		depends on ARCH_ZX</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you are enabling ZTE ZX296702 SOC and need</div><div class='add'>+		  debug uart support.</div><div class='add'>+</div><div class='add'>+		  This option is preferred over the platform specific</div><div class='add'>+		  options; the platform specific options are deprecated</div><div class='add'>+		  and will be soon removed.</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_LL_UART_8250</div><div class='ctx'> 		bool "Kernel low-level debugging via 8250 UART"</div><div class='ctx'> 		help</div><div class='hunk'>@@ -1231,7 +1268,8 @@ config DEBUG_IMX_UART_PORT</div><div class='ctx'> 						DEBUG_IMX53_UART || \</div><div class='ctx'> 						DEBUG_IMX6Q_UART || \</div><div class='ctx'> 						DEBUG_IMX6SL_UART || \</div><div class='del'>-						DEBUG_IMX6SX_UART</div><div class='add'>+						DEBUG_IMX6SX_UART || \</div><div class='add'>+						DEBUG_IMX7D_UART</div><div class='ctx'> 	default 1</div><div class='ctx'> 	depends on ARCH_MXC</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1281,7 +1319,8 @@ config DEBUG_LL_INCLUDE</div><div class='ctx'> 				 DEBUG_IMX53_UART ||\</div><div class='ctx'> 				 DEBUG_IMX6Q_UART || \</div><div class='ctx'> 				 DEBUG_IMX6SL_UART || \</div><div class='del'>-				 DEBUG_IMX6SX_UART</div><div class='add'>+				 DEBUG_IMX6SX_UART || \</div><div class='add'>+				 DEBUG_IMX7D_UART</div><div class='ctx'> 	default "debug/ks8695.S" if DEBUG_KS8695_UART</div><div class='ctx'> 	default "debug/msm.S" if DEBUG_QCOM_UARTDM</div><div class='ctx'> 	default "debug/netx.S" if DEBUG_NETX_UART</div><div class='hunk'>@@ -1337,6 +1376,7 @@ config DEBUG_UART_PHYS</div><div class='ctx'> 	default 0x02531000 if DEBUG_KEYSTONE_UART1</div><div class='ctx'> 	default 0x03010fe0 if ARCH_RPC</div><div class='ctx'> 	default 0x07000000 if DEBUG_SUN9I_UART0</div><div class='add'>+	default 0x09405000 if DEBUG_ZTE_ZX</div><div class='ctx'> 	default 0x10009000 if DEBUG_REALVIEW_STD_PORT || \</div><div class='ctx'> 				DEBUG_VEXPRESS_UART0_CA9</div><div class='ctx'> 	default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT</div><div class='hunk'>@@ -1359,6 +1399,7 @@ config DEBUG_UART_PHYS</div><div class='ctx'> 	default 0x20201000 if DEBUG_BCM2835</div><div class='ctx'> 	default 0x3e000000 if DEBUG_BCM_KONA_UART</div><div class='ctx'> 	default 0x4000e400 if DEBUG_LL_UART_EFM32</div><div class='add'>+	default 0x40081000 if DEBUG_LPC18XX_UART0</div><div class='ctx'> 	default 0x40090000 if ARCH_LPC32XX</div><div class='ctx'> 	default 0x40100000 if DEBUG_PXA_UART1</div><div class='ctx'> 	default 0x42000000 if ARCH_GEMINI</div><div class='hunk'>@@ -1407,7 +1448,8 @@ config DEBUG_UART_PHYS</div><div class='ctx'> 	default 0xfd883000 if DEBUG_ALPINE_UART0</div><div class='ctx'> 	default 0xfe800000 if ARCH_IOP32X</div><div class='ctx'> 	default 0xff690000 if DEBUG_RK32_UART2</div><div class='del'>-	default 0xffc02000 if DEBUG_SOCFPGA_UART</div><div class='add'>+	default 0xffc02000 if DEBUG_SOCFPGA_UART0</div><div class='add'>+	default 0xffc02100 if DEBUG_SOCFPGA_UART1</div><div class='ctx'> 	default 0xffd82340 if ARCH_IOP13XX</div><div class='ctx'> 	default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0</div><div class='ctx'> 	default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2</div><div class='hunk'>@@ -1466,6 +1508,7 @@ config DEBUG_UART_VIRT</div><div class='ctx'> 	default 0xfb009000 if DEBUG_REALVIEW_STD_PORT</div><div class='ctx'> 	default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT</div><div class='ctx'> 	default 0xfc40ab00 if DEBUG_BRCMSTB_UART</div><div class='add'>+	default 0xfc705000 if DEBUG_ZTE_ZX</div><div class='ctx'> 	default 0xfcfe8600 if DEBUG_UART_BCM63XX</div><div class='ctx'> 	default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX</div><div class='ctx'> 	default 0xfd000000 if ARCH_SPEAR13XX</div><div class='hunk'>@@ -1485,7 +1528,8 @@ config DEBUG_UART_VIRT</div><div class='ctx'> 	default 0xfeb26000 if DEBUG_RK3X_UART1</div><div class='ctx'> 	default 0xfeb30c00 if DEBUG_KEYSTONE_UART0</div><div class='ctx'> 	default 0xfeb31000 if DEBUG_KEYSTONE_UART1</div><div class='del'>-	default 0xfec02000 if DEBUG_SOCFPGA_UART</div><div class='add'>+	default 0xfec02000 if DEBUG_SOCFPGA_UART0</div><div class='add'>+	default 0xfec02100 if DEBUG_SOCFPGA_UART1</div><div class='ctx'> 	default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE</div><div class='ctx'> 	default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE</div><div class='ctx'> 	default 0xfec10000 if DEBUG_SIRFATLAS7_UART0</div><div class='hunk'>@@ -1530,8 +1574,9 @@ config DEBUG_UART_8250_WORD</div><div class='ctx'> 	bool "Use 32-bit accesses for 8250 UART"</div><div class='ctx'> 	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250</div><div class='ctx'> 	depends on DEBUG_UART_8250_SHIFT &gt;= 2</div><div class='del'>-	default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \</div><div class='del'>-		ARCH_KEYSTONE || DEBUG_ALPINE_UART0 || \</div><div class='add'>+	default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART0 || \</div><div class='add'>+		DEBUG_SOCFPGA_UART1 || ARCH_KEYSTONE || \</div><div class='add'>+		DEBUG_ALPINE_UART0 || \</div><div class='ctx'> 		DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \</div><div class='ctx'> 		DEBUG_DAVINCI_DA8XX_UART2 || \</div><div class='ctx'> 		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \</div><div class='hunk'>@@ -1544,7 +1589,7 @@ config DEBUG_UART_8250_FLOW_CONTROL</div><div class='ctx'> </div><div class='ctx'> config DEBUG_UNCOMPRESS</div><div class='ctx'> 	bool</div><div class='del'>-	depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG</div><div class='add'>+	depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M</div><div class='ctx'> 	default y if DEBUG_LL &amp;&amp; !DEBUG_OMAP2PLUS_UART &amp;&amp; \</div><div class='ctx'> 		     (!DEBUG_TEGRA_UART || !ZBOOT_ROM)</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1561,7 +1606,7 @@ config DEBUG_UNCOMPRESS</div><div class='ctx'> config UNCOMPRESS_INCLUDE</div><div class='ctx'> 	string</div><div class='ctx'> 	default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \</div><div class='del'>-					PLAT_SAMSUNG || ARCH_EFM32 || \</div><div class='add'>+					PLAT_SAMSUNG || ARM_SINGLE_ARMV7M || \</div><div class='ctx'> 					ARCH_SHMOBILE_LEGACY</div><div class='ctx'> 	default "mach/uncompress.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1590,7 +1635,7 @@ config PID_IN_CONTEXTIDR</div><div class='ctx'> </div><div class='ctx'> config DEBUG_SET_MODULE_RONX</div><div class='ctx'> 	bool "Set loadable kernel module data as NX and text as RO"</div><div class='del'>-	depends on MODULES</div><div class='add'>+	depends on MODULES &amp;&amp; MMU</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This option helps catch unintended modifications to loadable</div><div class='ctx'> 	  kernel module's text and read-only data. It also prevents execution</div><div class='head'>diff --git a/arch/arm/Makefile b/arch/arm/Makefile<br/>index 985227cbbd1b..07ab3d203916 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/Makefile</a></div><div class='hunk'>@@ -19,6 +19,10 @@ LDFLAGS_vmlinux	+= --be8</div><div class='ctx'> LDFLAGS_MODULE	+= --be8</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+ifeq ($(CONFIG_ARM_MODULE_PLTS),y)</div><div class='add'>+LDFLAGS_MODULE	+= -T $(srctree)/arch/arm/kernel/module.lds</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> OBJCOPYFLAGS	:=-O binary -R .comment -S</div><div class='ctx'> GZFLAGS		:=-9</div><div class='ctx'> #KBUILD_CFLAGS	+=-pipe</div><div class='hunk'>@@ -167,6 +171,7 @@ machine-$(CONFIG_ARCH_IOP33X)		+= iop33x</div><div class='ctx'> machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx</div><div class='ctx'> machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone</div><div class='ctx'> machine-$(CONFIG_ARCH_KS8695)		+= ks8695</div><div class='add'>+machine-$(CONFIG_ARCH_LPC18XX)		+= lpc18xx</div><div class='ctx'> machine-$(CONFIG_ARCH_LPC32XX)		+= lpc32xx</div><div class='ctx'> machine-$(CONFIG_ARCH_MESON)		+= meson</div><div class='ctx'> machine-$(CONFIG_ARCH_MMP)		+= mmp</div><div class='hunk'>@@ -196,14 +201,17 @@ machine-$(CONFIG_ARCH_SHMOBILE) 	+= shmobile</div><div class='ctx'> machine-$(CONFIG_ARCH_SIRF)		+= prima2</div><div class='ctx'> machine-$(CONFIG_ARCH_SOCFPGA)		+= socfpga</div><div class='ctx'> machine-$(CONFIG_ARCH_STI)		+= sti</div><div class='add'>+machine-$(CONFIG_ARCH_STM32)		+= stm32</div><div class='ctx'> machine-$(CONFIG_ARCH_SUNXI)		+= sunxi</div><div class='ctx'> machine-$(CONFIG_ARCH_TEGRA)		+= tegra</div><div class='ctx'> machine-$(CONFIG_ARCH_U300)		+= u300</div><div class='ctx'> machine-$(CONFIG_ARCH_U8500)		+= ux500</div><div class='add'>+machine-$(CONFIG_ARCH_UNIPHIER)		+= uniphier</div><div class='ctx'> machine-$(CONFIG_ARCH_VERSATILE)	+= versatile</div><div class='ctx'> machine-$(CONFIG_ARCH_VEXPRESS)		+= vexpress</div><div class='ctx'> machine-$(CONFIG_ARCH_VT8500)		+= vt8500</div><div class='ctx'> machine-$(CONFIG_ARCH_W90X900)		+= w90x900</div><div class='add'>+machine-$(CONFIG_ARCH_ZX)		+= zx</div><div class='ctx'> machine-$(CONFIG_ARCH_ZYNQ)		+= zynq</div><div class='ctx'> machine-$(CONFIG_PLAT_SPEAR)		+= spear</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile<br/>index 6e1fb2b2ecc7..7a13aebacf81 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/compressed/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/compressed/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/compressed/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/Makefile</a></div><div class='hunk'>@@ -103,6 +103,8 @@ extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern piggy.lz4 \</div><div class='ctx'> 		 lib1funcs.S ashldi3.S bswapsdi2.S $(libfdt) $(libfdt_hdrs) \</div><div class='ctx'> 		 hyp-stub.S</div><div class='ctx'> </div><div class='add'>+KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING</div><div class='add'>+</div><div class='ctx'> ifeq ($(CONFIG_FUNCTION_TRACER),y)</div><div class='ctx'> ORIG_CFLAGS := $(KBUILD_CFLAGS)</div><div class='ctx'> KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))</div><div class='head'>diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S<br/>index 2c45b5709fa4..06e983f59980 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/compressed/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/compressed/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/head.S</a></div><div class='hunk'>@@ -130,7 +130,7 @@ start:</div><div class='ctx'> 		.endr</div><div class='ctx'>    ARM(		mov	r0, r0		)</div><div class='ctx'>    ARM(		b	1f		)</div><div class='del'>- THUMB(		adr	r12, BSYM(1f)	)</div><div class='add'>+ THUMB(		badr	r12, 1f		)</div><div class='ctx'>  THUMB(		bx	r12		)</div><div class='ctx'> </div><div class='ctx'> 		.word	_magic_sig	@ Magic numbers to help the loader</div><div class='hunk'>@@ -447,7 +447,7 @@ dtb_check_done:</div><div class='ctx'> </div><div class='ctx'> 		bl	cache_clean_flush</div><div class='ctx'> </div><div class='del'>-		adr	r0, BSYM(restart)</div><div class='add'>+		badr	r0, restart</div><div class='ctx'> 		add	r0, r0, r6</div><div class='ctx'> 		mov	pc, r0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/compressed/libfdt_env.h b/arch/arm/boot/compressed/libfdt_env.h<br/>index 1f4e71876b00..17ae0f3efac8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/compressed/libfdt_env.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/compressed/libfdt_env.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/compressed/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/compressed/libfdt_env.h</a></div><div class='hunk'>@@ -5,6 +5,10 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='add'>+typedef __be16 fdt16_t;</div><div class='add'>+typedef __be32 fdt32_t;</div><div class='add'>+typedef __be64 fdt64_t;</div><div class='add'>+</div><div class='ctx'> #define fdt16_to_cpu(x)		be16_to_cpu(x)</div><div class='ctx'> #define cpu_to_fdt16(x)		cpu_to_be16(x)</div><div class='ctx'> #define fdt32_to_cpu(x)		be32_to_cpu(x)</div><div class='head'>diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile<br/>index 992736b5229b..246473a244f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/Makefile</a></div><div class='hunk'>@@ -20,9 +20,9 @@ dtb-$(CONFIG_SOC_SAM_V4_V5) += \</div><div class='ctx'> 	tny_a9263.dtb \</div><div class='ctx'> 	usb_a9263.dtb \</div><div class='ctx'> 	at91-foxg20.dtb \</div><div class='add'>+	at91-kizbox.dtb \</div><div class='ctx'> 	at91sam9g20ek.dtb \</div><div class='ctx'> 	at91sam9g20ek_2mmc.dtb \</div><div class='del'>-	kizbox.dtb \</div><div class='ctx'> 	tny_a9g20.dtb \</div><div class='ctx'> 	usb_a9g20.dtb \</div><div class='ctx'> 	usb_a9g20_lpw.dtb \</div><div class='hunk'>@@ -31,13 +31,16 @@ dtb-$(CONFIG_SOC_SAM_V4_V5) += \</div><div class='ctx'> 	at91sam9n12ek.dtb \</div><div class='ctx'> 	at91sam9rlek.dtb \</div><div class='ctx'> 	at91-ariag25.dtb \</div><div class='add'>+	at91-ariettag25.dtb \</div><div class='ctx'> 	at91-cosino_mega2560.dtb \</div><div class='add'>+	at91-kizboxmini.dtb \</div><div class='ctx'> 	at91sam9g15ek.dtb \</div><div class='ctx'> 	at91sam9g25ek.dtb \</div><div class='ctx'> 	at91sam9g35ek.dtb \</div><div class='ctx'> 	at91sam9x25ek.dtb \</div><div class='ctx'> 	at91sam9x35ek.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_SAM_V7) += \</div><div class='add'>+	at91-kizbox2.dtb \</div><div class='ctx'> 	at91-sama5d3_xplained.dtb \</div><div class='ctx'> 	sama5d31ek.dtb \</div><div class='ctx'> 	sama5d33ek.dtb \</div><div class='hunk'>@@ -56,13 +59,18 @@ dtb-$(CONFIG_ARCH_BCM2835) += \</div><div class='ctx'> 	bcm2835-rpi-b.dtb \</div><div class='ctx'> 	bcm2835-rpi-b-plus.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_BCM_5301X) += \</div><div class='add'>+	bcm4708-asus-rt-ac56u.dtb \</div><div class='add'>+	bcm4708-asus-rt-ac68u.dtb \</div><div class='ctx'> 	bcm4708-buffalo-wzr-1750dhp.dtb \</div><div class='ctx'> 	bcm4708-luxul-xwc-1000.dtb \</div><div class='ctx'> 	bcm4708-netgear-r6250.dtb \</div><div class='ctx'> 	bcm4708-netgear-r6300-v2.dtb \</div><div class='add'>+	bcm4708-smartrg-sr400ac.dtb \</div><div class='ctx'> 	bcm47081-asus-rt-n18u.dtb \</div><div class='ctx'> 	bcm47081-buffalo-wzr-600dhp2.dtb \</div><div class='ctx'> 	bcm47081-buffalo-wzr-900dhp.dtb \</div><div class='add'>+	bcm4709-asus-rt-ac87u.dtb \</div><div class='add'>+	bcm4709-buffalo-wxr-1900dhp.dtb \</div><div class='ctx'> 	bcm4709-netgear-r8000.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_BCM_63XX) += \</div><div class='ctx'> 	bcm963138dvt.dtb</div><div class='hunk'>@@ -113,6 +121,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \</div><div class='ctx'> 	exynos5420-peach-pit.dtb \</div><div class='ctx'> 	exynos5420-smdk5420.dtb \</div><div class='ctx'> 	exynos5422-odroidxu3.dtb \</div><div class='add'>+	exynos5422-odroidxu3-lite.dtb \</div><div class='ctx'> 	exynos5440-sd5v1.dtb \</div><div class='ctx'> 	exynos5440-ssdk5440.dtb \</div><div class='ctx'> 	exynos5800-peach-pi.dtb</div><div class='hunk'>@@ -201,6 +210,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \</div><div class='ctx'> 	kirkwood-ts219-6282.dtb \</div><div class='ctx'> 	kirkwood-ts419-6281.dtb \</div><div class='ctx'> 	kirkwood-ts419-6282.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_LPC18XX) += \</div><div class='add'>+	lpc4350-hitex-eval.dtb \</div><div class='add'>+	lpc4357-ea4357-devkit.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LPC32XX) += \</div><div class='ctx'> 	ea3250.dtb phy3250.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_MESON6) += \</div><div class='hunk'>@@ -254,14 +266,18 @@ dtb-$(CONFIG_SOC_IMX53) += \</div><div class='ctx'> 	imx53-tx53-x13x.dtb \</div><div class='ctx'> 	imx53-voipac-bsb.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='add'>+	imx6dl-apf6dev.dtb \</div><div class='ctx'> 	imx6dl-aristainetos_4.dtb \</div><div class='ctx'> 	imx6dl-aristainetos_7.dtb \</div><div class='add'>+	imx6dl-aristainetos2_4.dtb \</div><div class='add'>+	imx6dl-aristainetos2_7.dtb \</div><div class='ctx'> 	imx6dl-cubox-i.dtb \</div><div class='ctx'> 	imx6dl-dfi-fs700-m60.dtb \</div><div class='ctx'> 	imx6dl-gw51xx.dtb \</div><div class='ctx'> 	imx6dl-gw52xx.dtb \</div><div class='ctx'> 	imx6dl-gw53xx.dtb \</div><div class='ctx'> 	imx6dl-gw54xx.dtb \</div><div class='add'>+	imx6dl-gw551x.dtb \</div><div class='ctx'> 	imx6dl-gw552x.dtb \</div><div class='ctx'> 	imx6dl-hummingboard.dtb \</div><div class='ctx'> 	imx6dl-nitrogen6x.dtb \</div><div class='hunk'>@@ -277,6 +293,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='ctx'> 	imx6dl-udoo.dtb \</div><div class='ctx'> 	imx6dl-wandboard.dtb \</div><div class='ctx'> 	imx6dl-wandboard-revb1.dtb \</div><div class='add'>+	imx6q-apf6dev.dtb \</div><div class='ctx'> 	imx6q-arm2.dtb \</div><div class='ctx'> 	imx6q-cm-fx6.dtb \</div><div class='ctx'> 	imx6q-cubox-i.dtb \</div><div class='hunk'>@@ -288,6 +305,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='ctx'> 	imx6q-gw53xx.dtb \</div><div class='ctx'> 	imx6q-gw5400-a.dtb \</div><div class='ctx'> 	imx6q-gw54xx.dtb \</div><div class='add'>+	imx6q-gw551x.dtb \</div><div class='ctx'> 	imx6q-gw552x.dtb \</div><div class='ctx'> 	imx6q-hummingboard.dtb \</div><div class='ctx'> 	imx6q-nitrogen6x.dtb \</div><div class='hunk'>@@ -313,12 +331,15 @@ dtb-$(CONFIG_SOC_IMX6SX) += \</div><div class='ctx'> 	imx6sx-sabreauto.dtb \</div><div class='ctx'> 	imx6sx-sdb-reva.dtb \</div><div class='ctx'> 	imx6sx-sdb.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_IMX7D) += \</div><div class='add'>+	imx7d-sdb.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_LS1021A) += \</div><div class='ctx'> 	ls1021a-qds.dtb \</div><div class='ctx'> 	ls1021a-twr.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_VF610) += \</div><div class='ctx'> 	vf500-colibri-eval-v3.dtb \</div><div class='ctx'> 	vf610-colibri-eval-v3.dtb \</div><div class='add'>+	vf610m4-colibri.dtb \</div><div class='ctx'> 	vf610-cosmic.dtb \</div><div class='ctx'> 	vf610-twr.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXS) += \</div><div class='hunk'>@@ -360,6 +381,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \</div><div class='ctx'> 	am3517-craneboard.dtb \</div><div class='ctx'> 	am3517-evm.dtb \</div><div class='ctx'> 	am3517_mt_ventoux.dtb \</div><div class='add'>+	logicpd-torpedo-37xx-devkit.dtb \</div><div class='ctx'> 	omap3430-sdp.dtb \</div><div class='ctx'> 	omap3-beagle.dtb \</div><div class='ctx'> 	omap3-beagle-xm.dtb \</div><div class='hunk'>@@ -406,9 +428,11 @@ dtb-$(CONFIG_ARCH_OMAP3) += \</div><div class='ctx'> dtb-$(CONFIG_SOC_TI81XX) += \</div><div class='ctx'> 	dm8168-evm.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_AM33XX) += \</div><div class='add'>+	am335x-baltos-ir5221.dtb \</div><div class='ctx'> 	am335x-base0033.dtb \</div><div class='ctx'> 	am335x-bone.dtb \</div><div class='ctx'> 	am335x-boneblack.dtb \</div><div class='add'>+	am335x-sl50.dtb \</div><div class='ctx'> 	am335x-evm.dtb \</div><div class='ctx'> 	am335x-evmsk.dtb \</div><div class='ctx'> 	am335x-nano.dtb \</div><div class='hunk'>@@ -496,7 +520,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \</div><div class='ctx'> 	sh73a0-kzm9g.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SOCFPGA) += \</div><div class='ctx'> 	socfpga_arria5_socdk.dtb \</div><div class='del'>-	socfpga_arria10_socdk.dtb \</div><div class='add'>+	socfpga_arria10_socdk_sdmmc.dtb \</div><div class='ctx'> 	socfpga_cyclone5_socdk.dtb \</div><div class='ctx'> 	socfpga_cyclone5_sockit.dtb \</div><div class='ctx'> 	socfpga_cyclone5_socrates.dtb \</div><div class='hunk'>@@ -520,32 +544,39 @@ dtb-$(CONFIG_ARCH_STI) += \</div><div class='ctx'> 	stih416-b2020.dtb \</div><div class='ctx'> 	stih416-b2020e.dtb \</div><div class='ctx'> 	stih418-b2199.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_STM32)+= stm32f429-disco.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN4I) += \</div><div class='ctx'> 	sun4i-a10-a1000.dtb \</div><div class='ctx'> 	sun4i-a10-ba10-tvbox.dtb \</div><div class='ctx'> 	sun4i-a10-chuwi-v7-cw0825.dtb \</div><div class='ctx'> 	sun4i-a10-cubieboard.dtb \</div><div class='add'>+	sun4i-a10-gemei-g9.dtb \</div><div class='add'>+	sun4i-a10-hackberry.dtb \</div><div class='add'>+	sun4i-a10-hyundai-a7hd.dtb \</div><div class='add'>+	sun4i-a10-inet97fv2.dtb \</div><div class='add'>+	sun4i-a10-jesurun-q5.dtb \</div><div class='ctx'> 	sun4i-a10-marsboard.dtb \</div><div class='ctx'> 	sun4i-a10-mini-xplus.dtb \</div><div class='ctx'> 	sun4i-a10-mk802.dtb \</div><div class='ctx'> 	sun4i-a10-mk802ii.dtb \</div><div class='del'>-	sun4i-a10-hackberry.dtb \</div><div class='del'>-	sun4i-a10-hyundai-a7hd.dtb \</div><div class='del'>-	sun4i-a10-inet97fv2.dtb \</div><div class='ctx'> 	sun4i-a10-olinuxino-lime.dtb \</div><div class='ctx'> 	sun4i-a10-pcduino.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN5I) += \</div><div class='add'>+	sun5i-a10s-auxtek-t004.dtb \</div><div class='ctx'> 	sun5i-a10s-mk802.dtb \</div><div class='ctx'> 	sun5i-a10s-olinuxino-micro.dtb \</div><div class='ctx'> 	sun5i-a10s-r7-tv-dongle.dtb \</div><div class='ctx'> 	sun5i-a13-hsg-h702.dtb \</div><div class='ctx'> 	sun5i-a13-olinuxino.dtb \</div><div class='del'>-	sun5i-a13-olinuxino-micro.dtb</div><div class='add'>+	sun5i-a13-olinuxino-micro.dtb \</div><div class='add'>+	sun5i-a13-utoo-p66.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN6I) += \</div><div class='ctx'> 	sun6i-a31-app4-evb1.dtb \</div><div class='ctx'> 	sun6i-a31-colombus.dtb \</div><div class='ctx'> 	sun6i-a31-hummingbird.dtb \</div><div class='add'>+	sun6i-a31-i7.dtb \</div><div class='ctx'> 	sun6i-a31-m9.dtb \</div><div class='add'>+	sun6i-a31-mele-a1000g-quad.dtb \</div><div class='ctx'> 	sun6i-a31s-cs908.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN7I) += \</div><div class='ctx'> 	sun7i-a20-bananapi.dtb \</div><div class='hunk'>@@ -555,15 +586,25 @@ dtb-$(CONFIG_MACH_SUN7I) += \</div><div class='ctx'> 	sun7i-a20-hummingbird.dtb \</div><div class='ctx'> 	sun7i-a20-i12-tvbox.dtb \</div><div class='ctx'> 	sun7i-a20-m3.dtb \</div><div class='add'>+	sun7i-a20-mk808c.dtb \</div><div class='ctx'> 	sun7i-a20-olinuxino-lime.dtb \</div><div class='ctx'> 	sun7i-a20-olinuxino-lime2.dtb \</div><div class='ctx'> 	sun7i-a20-olinuxino-micro.dtb \</div><div class='del'>-	sun7i-a20-pcduino3.dtb</div><div class='add'>+	sun7i-a20-orangepi.dtb \</div><div class='add'>+	sun7i-a20-orangepi-mini.dtb \</div><div class='add'>+	sun7i-a20-pcduino3.dtb \</div><div class='add'>+	sun7i-a20-pcduino3-nano.dtb \</div><div class='add'>+	sun7i-a20-wexler-tab7200.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='add'>+	sun8i-a23-evb.dtb \</div><div class='ctx'> 	sun8i-a23-ippo-q8h-v5.dtb \</div><div class='del'>-	sun8i-a23-ippo-q8h-v1.2.dtb</div><div class='add'>+	sun8i-a23-ippo-q8h-v1.2.dtb \</div><div class='add'>+	sun8i-a33-et-q8-v1.6.dtb \</div><div class='add'>+	sun8i-a33-ga10h-v1.1.dtb \</div><div class='add'>+	sun8i-a33-sinlinx-sina33.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN9I) += \</div><div class='del'>-	sun9i-a80-optimus.dtb</div><div class='add'>+	sun9i-a80-optimus.dtb \</div><div class='add'>+	sun9i-a80-cubieboard4.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \</div><div class='ctx'> 	tegra20-harmony.dtb \</div><div class='ctx'> 	tegra20-iris-512.dtb \</div><div class='hunk'>@@ -600,6 +641,11 @@ dtb-$(CONFIG_ARCH_U8500) += \</div><div class='ctx'> 	ste-hrefv60plus-tvk.dtb \</div><div class='ctx'> 	ste-ccu8540.dtb \</div><div class='ctx'> 	ste-ccu9540.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_UNIPHIER) += \</div><div class='add'>+	uniphier-ph1-sld3-ref.dtb \</div><div class='add'>+	uniphier-ph1-ld4-ref.dtb \</div><div class='add'>+	uniphier-ph1-pro4-ref.dtb \</div><div class='add'>+	uniphier-ph1-sld8-ref.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_VERSATILE) += \</div><div class='ctx'> 	versatile-ab.dtb \</div><div class='ctx'> 	versatile-pb.dtb</div><div class='hunk'>@@ -624,6 +670,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \</div><div class='ctx'> 	zynq-zybo.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_ARMADA_370) += \</div><div class='ctx'> 	armada-370-db.dtb \</div><div class='add'>+	armada-370-dlink-dns327l.dtb \</div><div class='ctx'> 	armada-370-mirabox.dtb \</div><div class='ctx'> 	armada-370-netgear-rn102.dtb \</div><div class='ctx'> 	armada-370-netgear-rn104.dtb \</div><div class='hunk'>@@ -633,6 +680,8 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \</div><div class='ctx'> 	armada-375-db.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_ARMADA_38X) += \</div><div class='ctx'> 	armada-385-db-ap.dtb \</div><div class='add'>+	armada-385-linksys-caiman.dtb \</div><div class='add'>+	armada-385-linksys-cobra.dtb \</div><div class='ctx'> 	armada-388-db.dtb \</div><div class='ctx'> 	armada-388-gp.dtb \</div><div class='ctx'> 	armada-388-rd.dtb</div><div class='hunk'>@@ -649,17 +698,18 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \</div><div class='ctx'> 	armada-xp-openblocks-ax3-4.dtb \</div><div class='ctx'> 	armada-xp-synology-ds414.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_DOVE) += \</div><div class='del'>-	dove-cm-a510.dtb \</div><div class='ctx'> 	dove-cubox.dtb \</div><div class='ctx'> 	dove-cubox-es.dtb \</div><div class='ctx'> 	dove-d2plug.dtb \</div><div class='ctx'> 	dove-d3plug.dtb \</div><div class='del'>-	dove-dove-db.dtb</div><div class='add'>+	dove-dove-db.dtb \</div><div class='add'>+	dove-sbc-a510.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += \</div><div class='ctx'> 	mt6589-aquaris5.dtb \</div><div class='ctx'> 	mt6592-evb.dtb \</div><div class='ctx'> 	mt8127-moose.dtb \</div><div class='ctx'> 	mt8135-evbp1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> always		:= $(dtb-y)</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts<br/>new file mode 100644<br/>index 000000000000..7d36601697da<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-baltos-ir5221.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-baltos-ir5221.dts</a></div><div class='hunk'>@@ -0,0 +1,532 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * VScom OnRISC</div><div class='add'>+ * http://www.vscom.de</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "am33xx.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "OnRISC Baltos iR 5221";</div><div class='add'>+	compatible = "vscom,onrisc", "ti,am33xx";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			cpu0-supply = &lt;&amp;vdd1_reg&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x10000000&gt;; /* 256 MB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbat: fixedregulator@0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbat";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl12xx_vmmc: fixedregulator@2 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wl12xx_gpio&gt;;</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vwl1271";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 8 0&gt;;</div><div class='add'>+		startup-delay-us = &lt;70000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;am33xx_pinmux {</div><div class='add'>+	mmc2_pins: pinmux_mmc2_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x020 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad8.mmc1_dat0_mux0 */</div><div class='add'>+			0x024 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad9.mmc1_dat1_mux0 */</div><div class='add'>+			0x028 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad10.mmc1_dat2_mux0 */</div><div class='add'>+			0x02c (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad11.mmc1_dat3_mux0 */</div><div class='add'>+			0x080 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn1.mmc1_clk_mux0 */</div><div class='add'>+			0x084 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn2.mmc1_cmd_mux0 */</div><div class='add'>+			0x1e4 (PIN_INPUT_PULLUP | MUX_MODE7)      /* emu0.gpio3[7] */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl12xx_gpio: pinmux_wl12xx_gpio {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x1e8 (PIN_OUTPUT_PULLUP | MUX_MODE7)      /* emu1.gpio3[8] */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tps65910_pins: pinmux_tps65910_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x078 (PIN_INPUT_PULLUP | MUX_MODE7)      /* gpmc_ben1.gpio1[28] */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tca6416_pins: pinmux_tca6416_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x1b4 (PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: pinmux_i2c1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x158 0x2a      /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */</div><div class='add'>+			0x15c 0x2a      /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcan1_pins: pinmux_dcan1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x168 0x0a      /* uart0_ctsn.dcan1_tx_mux0, OUTPUT | MODE2 */</div><div class='add'>+			0x16c 0x2a      /* uart0_rtsn.dcan1_rx_mux0, INPUT | MODE2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: pinmux_uart0_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */</div><div class='add'>+			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_pins: pinmux_uart1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x180 0x28      /* uart1_rxd, INPUT | MODE0 */</div><div class='add'>+			0x184 0x28      /* uart1_txd, INPUT | MODE0 */</div><div class='add'>+			/*0x178 0x28*/      /* uart1_ctsn, INPUT | MODE0 */</div><div class='add'>+			/*0x17c 0x08*/      /* uart1_rtsn, OUTPUT | MODE0 */</div><div class='add'>+			0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* uart1_ctsn, INPUT | MODE0 */</div><div class='add'>+			0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* uart1_rtsn, OUTPUT | MODE0 */</div><div class='add'>+			0x0e0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */</div><div class='add'>+			0x0e4 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */</div><div class='add'>+			0x0e8 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */</div><div class='add'>+			0x0ec (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_pins: pinmux_uart2_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x150 0x29      /* spi0_sclk.uart2_rxd_mux3, INPUT | MODE1 */</div><div class='add'>+			0x154 0x09      /* spi0_d0.uart2_txd_mux3, OUTPUT | MODE1 */</div><div class='add'>+			/*0x188 0x2a*/      /* i2c0_sda.uart2_ctsn_mux0, INPUT | MODE2 */</div><div class='add'>+			/*0x18c 0x2a*/      /* i2c0_scl.uart2_rtsn_mux0, INPUT | MODE2 */</div><div class='add'>+			0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* i2c0_sda.uart2_ctsn_mux0 */</div><div class='add'>+			0x18c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* i2c0_scl.uart2_rtsn_mux0 */</div><div class='add'>+			0x030 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */</div><div class='add'>+			0x034 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */</div><div class='add'>+			0x038 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */</div><div class='add'>+			0x03c (PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */</div><div class='add'>+</div><div class='add'>+			0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw_default: cpsw_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* Slave 1 */</div><div class='add'>+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)       /* mii1_crs.rmii1_crs_dv */</div><div class='add'>+			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_tx_en.rmii1_txen */</div><div class='add'>+			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd1.rmii1_txd1 */</div><div class='add'>+			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd0.rmii1_txd0 */</div><div class='add'>+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd1.rmii1_rxd1 */</div><div class='add'>+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd0.rmii1_rxd0 */</div><div class='add'>+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)      /* rmii1_ref_clk.rmii1_refclk */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			/* Slave 2 */</div><div class='add'>+			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */</div><div class='add'>+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */</div><div class='add'>+			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */</div><div class='add'>+			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */</div><div class='add'>+			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */</div><div class='add'>+			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */</div><div class='add'>+			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */</div><div class='add'>+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */</div><div class='add'>+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */</div><div class='add'>+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */</div><div class='add'>+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */</div><div class='add'>+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw_sleep: cpsw_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* Slave 1 reset value */</div><div class='add'>+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+</div><div class='add'>+			/* Slave 2 reset value*/</div><div class='add'>+			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	davinci_mdio_default: davinci_mdio_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* MDIO */</div><div class='add'>+			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */</div><div class='add'>+			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	davinci_mdio_sleep: davinci_mdio_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* MDIO reset value */</div><div class='add'>+			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nandflash_pins_s0: nandflash_pins_s0 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */</div><div class='add'>+			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */</div><div class='add'>+			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */</div><div class='add'>+			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */</div><div class='add'>+			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */</div><div class='add'>+			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */</div><div class='add'>+			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */</div><div class='add'>+			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */</div><div class='add'>+			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */</div><div class='add'>+			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */</div><div class='add'>+			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */</div><div class='add'>+			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */</div><div class='add'>+			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */</div><div class='add'>+			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */</div><div class='add'>+			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;elm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;nandflash_pins_s0&gt;;</div><div class='add'>+	ranges = &lt;0 0 0x08000000 0x10000000&gt;;	/* CS0: NAND */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0,0 {</div><div class='add'>+		reg = &lt;0 0 0&gt;; /* CS0, offset 0 */</div><div class='add'>+		nand-bus-width = &lt;8&gt;;</div><div class='add'>+		ti,nand-ecc-opt = "bch8";</div><div class='add'>+		ti,nand-xfer-type = "polled";</div><div class='add'>+</div><div class='add'>+		gpmc,device-nand = "true";</div><div class='add'>+		gpmc,device-width = &lt;1&gt;;</div><div class='add'>+		gpmc,sync-clk-ps = &lt;0&gt;;</div><div class='add'>+		gpmc,cs-on-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,cs-rd-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,cs-wr-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,adv-on-ns = &lt;6&gt;;</div><div class='add'>+		gpmc,adv-rd-off-ns = &lt;34&gt;;</div><div class='add'>+		gpmc,adv-wr-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,we-on-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,we-off-ns = &lt;40&gt;;</div><div class='add'>+		gpmc,oe-on-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,oe-off-ns = &lt;54&gt;;</div><div class='add'>+		gpmc,access-ns = &lt;64&gt;;</div><div class='add'>+		gpmc,rd-cycle-ns = &lt;82&gt;;</div><div class='add'>+		gpmc,wr-cycle-ns = &lt;82&gt;;</div><div class='add'>+		gpmc,wait-on-read = "true";</div><div class='add'>+		gpmc,wait-on-write = "true";</div><div class='add'>+		gpmc,bus-turnaround-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,cycle2cycle-delay-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,clk-activation-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,wait-monitoring-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,wr-access-ns = &lt;40&gt;;</div><div class='add'>+		gpmc,wr-data-mux-bus-ns = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		elm_id = &lt;&amp;elm&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	dtr-gpios = &lt;&amp;gpio2 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	dsr-gpios = &lt;&amp;gpio2 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	dcd-gpios = &lt;&amp;gpio2 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	rng-gpios = &lt;&amp;gpio2 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cts-gpios = &lt;&amp;gpio0 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio0 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='add'>+	dtr-gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	dsr-gpios = &lt;&amp;gpio1 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	dcd-gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	rng-gpios = &lt;&amp;gpio1 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cts-gpios = &lt;&amp;gpio3 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	tps: tps@2d {</div><div class='add'>+		reg = &lt;0x2d&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tps65910_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	at24@50 {</div><div class='add'>+		compatible = "at24,24c02";</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tca6416: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tca6416_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_ctrl_mod {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cppi41dma  {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "tps65910.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;tps {</div><div class='add'>+	vcc1-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc2-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc3-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc4-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc5-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc6-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vcc7-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+	vccio-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+</div><div class='add'>+	ti,en-ck32k-xtal = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		vrtc_reg: regulator@0 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vio_reg: regulator@1 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd1_reg: regulator@2 {</div><div class='add'>+			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */</div><div class='add'>+			regulator-name = "vdd_mpu";</div><div class='add'>+			regulator-min-microvolt = &lt;912500&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd2_reg: regulator@3 {</div><div class='add'>+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */</div><div class='add'>+			regulator-name = "vdd_core";</div><div class='add'>+			regulator-min-microvolt = &lt;912500&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd3_reg: regulator@4 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdig1_reg: regulator@5 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdig2_reg: regulator@6 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpll_reg: regulator@7 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdac_reg: regulator@8 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vaux1_reg: regulator@9 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vaux2_reg: regulator@10 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vaux33_reg: regulator@11 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vmmc_reg: regulator@12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;cpsw_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;cpsw_sleep&gt;;</div><div class='add'>+	dual_emac = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;davinci_mdio {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;davinci_mdio_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;davinci_mdio_sleep&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_emac0 {</div><div class='add'>+	phy_id = &lt;&amp;davinci_mdio&gt;, &lt;0&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	dual_emac_res_vlan = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_emac1 {</div><div class='add'>+	phy_id = &lt;&amp;davinci_mdio&gt;, &lt;7&gt;;</div><div class='add'>+	phy-mode = "rgmii-txid";</div><div class='add'>+	dual_emac_res_vlan = &lt;2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy_sel {</div><div class='add'>+	rmii-clock-ext = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vmmc-supply = &lt;&amp;wl12xx_vmmc&gt;;</div><div class='add'>+	ti,non-removable;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	wlcore: wlcore@2 {</div><div class='add'>+		compatible = "ti,wl1835";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sham {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aes {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	ti,no-reset-on-init;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dcan1_pins&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi<br/>index dbb3f4d2bf84..fec78349c1f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-bone-common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am335x-bone-common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-bone-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-bone-common.dtsi</a></div><div class='hunk'>@@ -81,6 +81,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c2_pins: pinmux_i2c2_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x178 (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */</div><div class='add'>+			0x17c (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.i2c2_scl */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uart0_pins: pinmux_uart0_pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */</div><div class='hunk'>@@ -218,8 +225,67 @@</div><div class='ctx'> 		reg = &lt;0x24&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	baseboard_eeprom: baseboard_eeprom@50 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		baseboard_data: baseboard_data@0 {</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+	cape_eeprom0: cape_eeprom0@54 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		cape0_data: cape_data@0 {</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cape_eeprom1: cape_eeprom1@55 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x55&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		cape1_data: cape_data@0 {</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cape_eeprom2: cape_eeprom2@56 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x56&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		cape2_data: cape_data@0 {</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cape_eeprom3: cape_eeprom3@57 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		cape3_data: cape_data@0 {</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /include/ "tps65217.dtsi"</div><div class='ctx'> </div><div class='ctx'> &amp;tps {</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts<br/>index 901739fcb85a..5c42d259fa68 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-boneblack.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am335x-boneblack.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-boneblack.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-boneblack.dts</a></div><div class='hunk'>@@ -80,3 +80,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	system-power-controller;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts<br/>index 66342515df20..765be2766eb0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am335x-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-evm.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "am33xx.dtsi"</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "TI AM335x EVM";</div><div class='hunk'>@@ -38,6 +39,20 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wlan_en_reg: fixedregulator@2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "wlan-en-regulator";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		/* WLAN_EN GPIO for this board - Bank1, pin16 */</div><div class='add'>+		gpio = &lt;&amp;gpio1 16 0&gt;;</div><div class='add'>+</div><div class='add'>+		/* WLAN card specific delay */</div><div class='add'>+		startup-delay-us = &lt;70000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	matrix_keypad: matrix_keypad@0 {</div><div class='ctx'> 		compatible = "gpio-matrix-keypad";</div><div class='ctx'> 		debounce-delay-ms = &lt;5&gt;;</div><div class='hunk'>@@ -176,6 +191,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	uart1_pins: pinmux_uart1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x178 (PIN_INPUT | MUX_MODE0)		/* uart1_ctsn.uart1_ctsn */</div><div class='add'>+			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */</div><div class='add'>+			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */</div><div class='add'>+			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	clkout2_pin: pinmux_clkout2_pin {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */</div><div class='hunk'>@@ -266,6 +290,25 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mmc3_pins: pinmux_mmc3_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x44 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */</div><div class='add'>+			0x48 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */</div><div class='add'>+			0x4C (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */</div><div class='add'>+			0x78 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */</div><div class='add'>+			0x88 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */</div><div class='add'>+			0x8C (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_pins: pinmux_wlan_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a0.gpio1_16 */</div><div class='add'>+			0x19C (PIN_INPUT | MUX_MODE7)		/* mcasp0_ahclkr.gpio3_17 */</div><div class='add'>+			0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	lcd_pins_s0: lcd_pins_s0 {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x20 (PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad8.lcd_data23 */</div><div class='hunk'>@@ -323,6 +366,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='hunk'>@@ -665,6 +715,37 @@</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio0 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	/* these are on the crossbar and are outlined in the</div><div class='add'>+	   xbar-event-map element */</div><div class='add'>+	dmas = &lt;&amp;edma 12</div><div class='add'>+		&amp;edma 13&gt;;</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	status = "okay";</div><div class='add'>+	vmmc-supply = &lt;&amp;wlan_en_reg&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins &amp;wlan_pins&gt;;</div><div class='add'>+	ti,non-removable;</div><div class='add'>+	ti,needs-special-hs-handling;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	wlcore: wlcore@0 {</div><div class='add'>+		compatible = "ti,wl1835";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edma {</div><div class='add'>+	ti,edma-xbar-event-map = /bits/ 16 &lt;1 12</div><div class='add'>+					    2 13&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sham {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts<br/>index 0d35ab64641c..7106114c7464 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-pepper.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am335x-pepper.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-pepper.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-pepper.dts</a></div><div class='hunk'>@@ -74,6 +74,7 @@</div><div class='ctx'> 	audio_codec: tlv320aic3106@1b {</div><div class='ctx'> 		compatible = "ti,tlv320aic3106";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='add'>+		ai3x-micbias-vg = &lt;0x2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	accel: lis331dlh@1d {</div><div class='hunk'>@@ -153,7 +154,7 @@</div><div class='ctx'> 	ti,audio-routing =</div><div class='ctx'> 		"Headphone Jack",	"HPLOUT",</div><div class='ctx'> 		"Headphone Jack",	"HPROUT",</div><div class='del'>-		"LINE1L",		"Line In";</div><div class='add'>+		"MIC3L",		"Mic3L Switch";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcasp0 {</div><div class='hunk'>@@ -438,41 +439,50 @@</div><div class='ctx'> 	regulators {</div><div class='ctx'> 		dcdc1_reg: regulator@0 {</div><div class='ctx'> 			/* VDD_1V8 system supply */</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dcdc2_reg: regulator@1 {</div><div class='ctx'> 			/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */</div><div class='ctx'> 			regulator-name = "vdd_core";</div><div class='ctx'> 			regulator-min-microvolt = &lt;925000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1325000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='ctx'> 			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dcdc3_reg: regulator@2 {</div><div class='ctx'> 			/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */</div><div class='ctx'> 			regulator-name = "vdd_mpu";</div><div class='ctx'> 			regulator-min-microvolt = &lt;925000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1325000&gt;;</div><div class='ctx'> 			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ldo1_reg: regulator@3 {</div><div class='ctx'> 			/* VRTC 1.8V always-on supply */</div><div class='add'>+			regulator-name = "vrtc,vdds";</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ldo2_reg: regulator@4 {</div><div class='ctx'> 			/* 3.3V rail */</div><div class='add'>+			regulator-name = "vdd_3v3aux";</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ldo3_reg: regulator@5 {</div><div class='ctx'> 			/* VDD_3V3A 3.3V rail */</div><div class='add'>+			regulator-name = "vdd_3v3a";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ldo4_reg: regulator@6 {</div><div class='ctx'> 			/* VDD_3V3B 3.3V rail */</div><div class='add'>+			regulator-name = "vdd_3v3b";</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts<br/>new file mode 100644<br/>index 000000000000..3303c281697b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am335x-sl50.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am335x-sl50.dts</a></div><div class='hunk'>@@ -0,0 +1,482 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "am33xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toby Churchill SL50 Series";</div><div class='add'>+	compatible = "tcl,am335x-sl50", "ti,am33xx";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			cpu0-supply = &lt;&amp;dcdc2_reg&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led@0 {</div><div class='add'>+			label = "sl50:green:usr0";</div><div class='add'>+			gpios = &lt;&amp;gpio1 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@1 {</div><div class='add'>+			label = "sl50:red:usr1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@2 {</div><div class='add'>+			label = "sl50:green:usr2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			label = "sl50:red:usr3";</div><div class='add'>+			gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight0: disp0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;ehrpwm1 0 500000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 10 20 30 40 50 60 70 80 90 99&gt;;</div><div class='add'>+		default-brightness-level = &lt;6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight1: disp1 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;ehrpwm1 1 500000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 10 20 30 40 50 60 70 80 90 99&gt;;</div><div class='add'>+		default-brightness-level = &lt;6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "ti,da830-evm-audio";</div><div class='add'>+		ti,model = "AM335x-SL50";</div><div class='add'>+		ti,audio-codec = &lt;&amp;audio_codec&gt;;</div><div class='add'>+		ti,mcasp-controller = &lt;&amp;mcasp0&gt;;</div><div class='add'>+		ti,codec-clock-rate = &lt;12000000&gt;;</div><div class='add'>+		ti,audio-routing =</div><div class='add'>+			"Headphone Jack",	"HPLOUT",</div><div class='add'>+			"Headphone Jack",	"HPROUT",</div><div class='add'>+			"LINE1R",               "Line In",</div><div class='add'>+			"LINE1L",		"Line In";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: pwrseq@0 {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;emmc_pwrseq_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmcsd_fixed: fixedregulator@0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmmcsd_fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;am33xx_pinmux {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;lwb_pins&gt;;</div><div class='add'>+</div><div class='add'>+	led_pins: pinmux_led_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)	/* gpmc_a5.gpio1_21 */</div><div class='add'>+			AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7)	/* gpmc_a6.gpio1_22 */</div><div class='add'>+			AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7)	/* gpmc_a7.gpio1_23 */</div><div class='add'>+			AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7)	/* gpmc_a8.gpio1_24 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: pinmux_uart0_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */</div><div class='add'>+			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_pins: pinmux_uart4_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */</div><div class='add'>+			AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: pinmux_i2c0_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */</div><div class='add'>+			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: pinmux_i2c1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rxd.i2c1_sda */</div><div class='add'>+			AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_txdi2c1_scl */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: pinmux_i2c2_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */</div><div class='add'>+			AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.i2c2_scl */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw_default: cpsw_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* Slave 1 */</div><div class='add'>+			AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxerr.mii1_rxerr */</div><div class='add'>+			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txen.mii1_txen */</div><div class='add'>+			AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxdv.mii1_rxdv */</div><div class='add'>+			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd3.mii1_txd3 */</div><div class='add'>+			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd2.mii1_txd2 */</div><div class='add'>+			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd1.mii1_txd1 */</div><div class='add'>+			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd0.mii1_txd0 */</div><div class='add'>+			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_txclk.mii1_txclk */</div><div class='add'>+			AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxclk.mii1_rxclk */</div><div class='add'>+			AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd3.mii1_rxd3 */</div><div class='add'>+			AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd2.mii1_rxd2 */</div><div class='add'>+			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd1.mii1_rxd1 */</div><div class='add'>+			AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd0.mii1_rxd0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw_sleep: cpsw_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* Slave 1 reset value */</div><div class='add'>+			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	davinci_mdio_default: davinci_mdio_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* MDIO */</div><div class='add'>+			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */</div><div class='add'>+			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	davinci_mdio_sleep: davinci_mdio_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* MDIO reset value */</div><div class='add'>+			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_pins: pinmux_mmc1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a4.gpio1_20 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pins: pinmux_emmc_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn1.mmc1_clk */</div><div class='add'>+			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */</div><div class='add'>+			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */</div><div class='add'>+			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad1.mmc1_dat1 */</div><div class='add'>+			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad2.mmc1_dat2 */</div><div class='add'>+			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad3.mmc1_dat3 */</div><div class='add'>+			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad4.mmc1_dat4 */</div><div class='add'>+			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_ad5.mmc1_dat5 */</div><div class='add'>+			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad6.mmc1_dat6 */</div><div class='add'>+			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad7.mmc1_dat7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	audio_pins: pinmux_audio_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_ahcklx.mcasp0_ahclkx */</div><div class='add'>+			AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_fsx.mcasp0_fsx */</div><div class='add'>+			AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_aclkx.mcasp0_aclkx */</div><div class='add'>+			AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_axr0.mcasp0_axr0 */</div><div class='add'>+			AM33XX_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mcasp0_ahclkr.mcasp0_axr2*/</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ehrpwm1_pins: pinmux_ehrpwm1a_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6)	/* gpmc_a2.ehrpwm1a */</div><div class='add'>+			AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6)	/* gpmc_a3.ehrpwm1b */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lwb_pins: pinmux_lwb_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)	/* SoundPA_en - mcasp0_fsr.gpio3_19 */</div><div class='add'>+			AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7)	/* nKbdOnC - gpmc_ad10.gpio0_26 */</div><div class='add'>+			AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7)	/* nKbdInt - gpmc_ad12.gpio1_12 */</div><div class='add'>+			AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7)	/* nKbdReset - gpmc_ad13.gpio1_13 */</div><div class='add'>+			AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7)	/* nDispReset - gpmc_ad14.gpio1_14 */</div><div class='add'>+			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)	/* USB1_enPower - gpmc_a1.gpio1_17 */</div><div class='add'>+			/* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */</div><div class='add'>+			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7)	/* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */</div><div class='add'>+			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7)	/* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */</div><div class='add'>+			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7)	/* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */</div><div class='add'>+			/* PDI Bus - Battery system */</div><div class='add'>+			AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7)	/* nBattReset  gpmc_a0.gpio1_16 */</div><div class='add'>+			AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7)	/* BattPDIData gpmc_ad15.gpio1_15 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	tps: tps@24 {</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom: eeprom@50 {</div><div class='add'>+		compatible = "at,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	audio_codec: tlv320aic3106@1b {</div><div class='add'>+		status = "okay";</div><div class='add'>+		compatible = "ti,tlv320aic3106";</div><div class='add'>+		reg = &lt;0x1b&gt;;</div><div class='add'>+</div><div class='add'>+		AVDD-supply = &lt;&amp;ldo4_reg&gt;;</div><div class='add'>+		IOVDD-supply = &lt;&amp;ldo4_reg&gt;;</div><div class='add'>+		DRVDD-supply = &lt;&amp;ldo4_reg&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_ctrl_mod {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cppi41dma  {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmcsd_fixed&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_pins&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmcsd_fixed&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcasp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;audio_pins&gt;;</div><div class='add'>+</div><div class='add'>+	op-mode = &lt;0&gt;;  /* MCASP_ISS_MODE */</div><div class='add'>+	tdm-slots = &lt;2&gt;;</div><div class='add'>+	serial-dir = &lt;</div><div class='add'>+		2 0 1 0</div><div class='add'>+		0 0 0 0</div><div class='add'>+		0 0 0 0</div><div class='add'>+		0 0 0 0</div><div class='add'>+	&gt;;</div><div class='add'>+	tx-num-evt = &lt;1&gt;;</div><div class='add'>+	rx-num-evt = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "tps65217.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;tps {</div><div class='add'>+	ti,pmic-shutdown-controller;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	interrupts = &lt;7&gt;;	/* NNMI */</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		dcdc1_reg: regulator@0 {</div><div class='add'>+			/* VDDS_DDR */</div><div class='add'>+			regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dcdc2_reg: regulator@1 {</div><div class='add'>+			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */</div><div class='add'>+			regulator-name = "vdd_mpu";</div><div class='add'>+			regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1325000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dcdc3_reg: regulator@2 {</div><div class='add'>+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */</div><div class='add'>+			regulator-name = "vdd_core";</div><div class='add'>+			regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ldo1_reg: regulator@3 {</div><div class='add'>+			/* VRTC / VIO / VDDS*/</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ldo2_reg: regulator@4 {</div><div class='add'>+			/* VDD_3V3AUX */</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ldo3_reg: regulator@5 {</div><div class='add'>+			/* VDD_1V8 */</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ldo4_reg: regulator@6 {</div><div class='add'>+			/* VDD_3V3A */</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_emac0 {</div><div class='add'>+	phy_id = &lt;&amp;davinci_mdio&gt;, &lt;0&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_emac1 {</div><div class='add'>+	phy_id = &lt;&amp;davinci_mdio&gt;, &lt;1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;cpsw_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;cpsw_sleep&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;davinci_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;davinci_mdio_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;davinci_mdio_sleep&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sham {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aes {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwmss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehrpwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ehrpwm1_pins&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi<br/>index f164dce08755..5e3f5e86ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am3517.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am3517.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am3517.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am3517.dtsi</a></div><div class='hunk'>@@ -60,6 +60,17 @@</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='ctx'> 			clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		omap3_pmx_core2: pinmux@480025d8 {</div><div class='add'>+			compatible = "ti,omap3-padconf", "pinctrl-single";</div><div class='add'>+			reg = &lt;0x480025d8 0x24&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			pinctrl-single,register-width = &lt;16&gt;;</div><div class='add'>+			pinctrl-single,function-mask = &lt;0xff1f&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi<br/>index c80a3e233792..ade28c790f4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am4372.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am4372.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am4372.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am4372.dtsi</a></div><div class='hunk'>@@ -132,6 +132,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		emif: emif@4c000000 {</div><div class='add'>+			compatible = "ti,emif-am4372";</div><div class='add'>+			reg = &lt;0x4c000000 0x1000000&gt;;</div><div class='add'>+			ti,hwmods = "emif";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		edma: edma@49000000 {</div><div class='ctx'> 			compatible = "ti,edma3";</div><div class='ctx'> 			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";</div><div class='hunk'>@@ -941,6 +947,7 @@</div><div class='ctx'> 				ti,hwmods = "dss_rfbi";</div><div class='ctx'> 				clocks = &lt;&amp;disp_clk&gt;;</div><div class='ctx'> 				clock-names = "fck";</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts<br/>index 26956cb50835..84aa30c3235a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am437x-gp-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am437x-gp-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am437x-gp-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am437x-gp-evm.dts</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		display0 = &amp;lcd0;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vmmcsd_fixed: fixedregulator-sd {</div><div class='hunk'>@@ -42,6 +43,15 @@</div><div class='ctx'> 		gpio = &lt;&amp;gpio5 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vmmcwl_fixed: fixedregulator-mmcwl {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmmcwl_fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;ecap0 0 50000 PWM_POLARITY_INVERTED&gt;;</div><div class='hunk'>@@ -106,9 +116,21 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* fixed 12MHz oscillator */</div><div class='add'>+	refclk: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;am43xx_pinmux {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wlan_pins_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;wlan_pins_sleep&gt;;</div><div class='add'>+</div><div class='ctx'> 	i2c0_pins: i2c0_pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */</div><div class='hunk'>@@ -340,6 +362,53 @@</div><div class='ctx'> 			0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mmc3_pins_default: pinmux_mmc3_pins_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x8c (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */</div><div class='add'>+			0x88 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */</div><div class='add'>+			0x44 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */</div><div class='add'>+			0x48 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */</div><div class='add'>+			0x4c (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */</div><div class='add'>+			0x78 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc3_pins_sleep: pinmux_mmc3_pins_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_clk.mmc2_clk */</div><div class='add'>+			0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_csn3.mmc2_cmd */</div><div class='add'>+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a1.mmc2_dat0 */</div><div class='add'>+			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a2.mmc2_dat1 */</div><div class='add'>+			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a3.mmc2_dat2 */</div><div class='add'>+			0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_be1n.mmc2_dat3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_pins_default: pinmux_wlan_pins_default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a4.gpio1_20 WL_EN */</div><div class='add'>+			0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)	/* gpmc_a7.gpio1_23 WL_IRQ*/</div><div class='add'>+			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a0.gpio1_16 BT_EN*/</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_pins_sleep: pinmux_wlan_pins_sleep {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a4.gpio1_20 WL_EN */</div><div class='add'>+			0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)	/* gpmc_a7.gpio1_23 WL_IRQ*/</div><div class='add'>+			0x40 (PIN_OUTPUT_PULLUP | MUX_MODE7)		/* gpmc_a0.gpio1_16 BT_EN*/</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_pins: uart3_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x228 (PIN_INPUT | MUX_MODE0)		/* uart3_rxd.uart3_rxd */</div><div class='add'>+			0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */</div><div class='add'>+			0x230 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_ctsn.uart3_ctsn */</div><div class='add'>+			0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c0 {</div><div class='hunk'>@@ -403,6 +472,21 @@</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ov2659@30 {</div><div class='add'>+		compatible = "ovti,ov2659";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+		clock-names = "xvclk";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ov2659_0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;vpfe1_ep&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;70000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -422,6 +506,21 @@</div><div class='ctx'> 		touchscreen-size-x = &lt;1024&gt;;</div><div class='ctx'> 		touchscreen-size-y = &lt;600&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ov2659@30 {</div><div class='add'>+		compatible = "ovti,ov2659";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+		clock-names = "xvclk";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ov2659_1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;vpfe0_ep&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;70000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;epwmss0 {</div><div class='hunk'>@@ -446,6 +545,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpio3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -468,6 +571,43 @@</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio0 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* these are on the crossbar and are outlined in the</div><div class='add'>+	   xbar-event-map element */</div><div class='add'>+	dmas = &lt;&amp;edma 30</div><div class='add'>+		&amp;edma 31&gt;;</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmcwl_fixed&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc3_pins_sleep&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	ti,non-removable;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	wlcore: wlcore@0 {</div><div class='add'>+		compatible = "ti,wl1835";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edma {</div><div class='add'>+	ti,edma-xbar-event-map = /bits/ 16 &lt;1 30</div><div class='add'>+					    2 31&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb2_phy1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -625,7 +765,7 @@</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='ctx'> 		vpfe0_ep: endpoint {</div><div class='del'>-			/* remote-endpoint = &lt;&amp;sensor&gt;; add once we have it */</div><div class='add'>+			remote-endpoint = &lt;&amp;ov2659_1&gt;;</div><div class='ctx'> 			ti,am437x-vpfe-interface = &lt;0&gt;;</div><div class='ctx'> 			bus-width = &lt;8&gt;;</div><div class='ctx'> 			hsync-active = &lt;0&gt;;</div><div class='hunk'>@@ -642,7 +782,7 @@</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='ctx'> 		vpfe1_ep: endpoint {</div><div class='del'>-			/* remote-endpoint = &lt;&amp;sensor&gt;; add once we have it */</div><div class='add'>+			remote-endpoint = &lt;&amp;ov2659_0&gt;;</div><div class='ctx'> 			ti,am437x-vpfe-interface = &lt;0&gt;;</div><div class='ctx'> 			bus-width = &lt;8&gt;;</div><div class='ctx'> 			hsync-active = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts<br/>index 7128fad991ac..a63bf78191ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/am57xx-beagle-x15.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/am57xx-beagle-x15.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/am57xx-beagle-x15.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/am57xx-beagle-x15.dts</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> 		rtc0 = &amp;mcp_rtc;</div><div class='ctx'> 		rtc1 = &amp;tps659038_rtc;</div><div class='ctx'> 		rtc2 = &amp;rtc;</div><div class='add'>+		display0 = &amp;hdmi0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -103,6 +104,51 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;extcon_usb2_pins&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	hdmi0: connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;tpd12s015_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpd12s015: encoder {</div><div class='add'>+		compatible = "ti,tpd12s015";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpd12s015_pins&gt;;</div><div class='add'>+</div><div class='add'>+		gpios = &lt;&amp;gpio7 10 GPIO_ACTIVE_HIGH&gt;,	/* gpio7_10, CT CP HPD */</div><div class='add'>+			&lt;&amp;gpio6 28 GPIO_ACTIVE_HIGH&gt;,	/* gpio6_28, LS OE */</div><div class='add'>+			&lt;&amp;gpio7 12 GPIO_ACTIVE_HIGH&gt;;	/* gpio7_12/sp1_cs2, HPD */</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				tpd12s015_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				tpd12s015_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dra7_pmx_core {</div><div class='hunk'>@@ -122,6 +168,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi_pins: pinmux_hdmi_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x408 (PIN_INPUT | MUX_MODE1)	/* i2c2_sda.hdmi1_ddc_scl */</div><div class='add'>+			0x40c (PIN_INPUT | MUX_MODE1)	/* i2c2_scl.hdmi1_ddc_sda */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c3_pins_default: i2c3_pins_default {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x2a4 (PIN_INPUT| MUX_MODE10)	/* mcasp1_aclkx.i2c3_sda */</div><div class='hunk'>@@ -278,6 +331,14 @@</div><div class='ctx'> 			0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	tpd12s015_pins: pinmux_tpd12s015_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x3b0 (PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */</div><div class='add'>+			0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14)	/* gpio7_12 HPD */</div><div class='add'>+			0x370 (PIN_OUTPUT | MUX_MODE14)		/* gpio6_28 LS_OE */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -544,6 +605,10 @@</div><div class='ctx'> 	phy-supply = &lt;&amp;ldousb_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb2_phy2 {</div><div class='add'>+	phy-supply = &lt;&amp;ldousb_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb1 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -608,3 +673,23 @@</div><div class='ctx'> 		};</div><div class='ctx'>        };</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	status = "ok";</div><div class='add'>+</div><div class='add'>+	vdda_video-supply = &lt;&amp;ldoln_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "ok";</div><div class='add'>+	vdda-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_pins&gt;;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		hdmi_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;tpd12s015_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts<br/>index ff26c7ed8c41..1bc64cda819e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/arm-realview-pb1176.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/arm-realview-pb1176.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/arm-realview-pb1176.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/arm-realview-pb1176.dts</a></div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		syscon: syscon@10000000 {</div><div class='del'>-			compatible = "arm,realview-pb1176-syscon", "syscon";</div><div class='add'>+			compatible = "arm,realview-pb1176-syscon", "syscon", "simple-mfd";</div><div class='ctx'> 			reg = &lt;0x10000000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			led@08.0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts<br/>index 19f3bf271915..03542f7b5b94 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-db.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-370-db.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-db.dts</a></div><div class='hunk'>@@ -162,7 +162,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "mx25l25635e";</div><div class='add'>+					compatible = "mx25l25635e", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts<br/>new file mode 100644<br/>index 000000000000..af4dc548c1c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-dlink-dns327l.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-dlink-dns327l.dts</a></div><div class='hunk'>@@ -0,0 +1,357 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for D-Link DNS-327L</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Andrew Andrianov &lt;andrew@ncrmnt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Remaining unsolved:</div><div class='add'>+ * There's still some unknown device on i2c address 0x13</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "armada-370.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "D-Link DNS-327L";</div><div class='add'>+	compatible = "dlink,dns327l",</div><div class='add'>+		"marvell,armada370",</div><div class='add'>+		"marvell,armada-370-xp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;; /* 512 MiB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		ranges = &lt;MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000</div><div class='add'>+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+		pcie-controller {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			pcie@1,0 {</div><div class='add'>+				/* Port 0, Lane 0 */</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie@2,0 {</div><div class='add'>+				/* Port 1, Lane 0 */</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		internal-regs {</div><div class='add'>+			sata@a0000 {</div><div class='add'>+				nr-ports = &lt;2&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb@50000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			nand@d0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				marvell,nand-keep-config;</div><div class='add'>+				marvell,nand-enable-arbiter;</div><div class='add'>+				nand-on-flash-bbt;</div><div class='add'>+				nand-ecc-strength = &lt;4&gt;;</div><div class='add'>+				nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					/* 1.0 MiB */</div><div class='add'>+					reg = &lt;0x0000000 0x100000&gt;;</div><div class='add'>+					read-only;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@100000 {</div><div class='add'>+					label = "u-boot-env";</div><div class='add'>+					/* 128 KiB */</div><div class='add'>+					reg = &lt;0x100000 0x20000&gt;;</div><div class='add'>+					read-only;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@120000 {</div><div class='add'>+					label = "uImage";</div><div class='add'>+					/* 7 MiB */</div><div class='add'>+					reg = &lt;0x120000 0x700000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@820000 {</div><div class='add'>+					label = "ubifs";</div><div class='add'>+					/* ~ 84 MiB */</div><div class='add'>+					reg = &lt;0x820000 0x54e0000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* Hardcoded into stock bootloader */</div><div class='add'>+				partition@5d00000 {</div><div class='add'>+					label = "failsafe-uImage";</div><div class='add'>+					/* 5 MiB */</div><div class='add'>+					reg = &lt;0x5d00000 0x500000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@6200000 {</div><div class='add'>+					label = "failsafe-fs";</div><div class='add'>+					/* 29 MiB */</div><div class='add'>+					reg = &lt;0x6200000 0x1d00000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@7f00000 {</div><div class='add'>+					label = "bbt";</div><div class='add'>+					/* 1 MiB for BBT */</div><div class='add'>+					reg = &lt;0x7f00000 0x100000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;</div><div class='add'>+			&amp;backup_button_pin</div><div class='add'>+			&amp;power_button_pin</div><div class='add'>+			&amp;reset_button_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-button {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		backup-button {</div><div class='add'>+			label = "Backup Button";</div><div class='add'>+			linux,code = &lt;KEY_COPY&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-button {</div><div class='add'>+			label = "Reset Button";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-0 = &lt;</div><div class='add'>+			&amp;sata_l_amber_pin</div><div class='add'>+			&amp;sata_r_amber_pin</div><div class='add'>+			&amp;backup_led_pin</div><div class='add'>+			/* Ensure these are managed by hardware */</div><div class='add'>+			&amp;sata_l_white_pin</div><div class='add'>+			&amp;sata_r_white_pin&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		sata-r-amber-pin {</div><div class='add'>+			label = "dns327l:amber:sata-r";</div><div class='add'>+			gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata-l-amber-pin {</div><div class='add'>+			label = "dns327l:amber:sata-l";</div><div class='add'>+			gpios = &lt;&amp;gpio1 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		backup-led-pin {</div><div class='add'>+			label = "dns327l:white:usb";</div><div class='add'>+			gpios = &lt;&amp;gpio1 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usb_power: regulator@1 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;xhci_pwr_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			regulator-name = "USB3.0 Port Power";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			gpio = &lt;&amp;gpio0 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata_r_power: regulator@2 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;sata_r_pwr_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			regulator-name = "SATA-R Power";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			startup-delay-us = &lt;2000000&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			gpio = &lt;&amp;gpio1 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata_l_power: regulator@3 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;sata_l_pwr_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			regulator-name = "SATA-L Power";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			startup-delay-us = &lt;4000000&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			gpio = &lt;&amp;gpio1 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	sata_l_white_pin: sata-l-white-pin {</div><div class='add'>+		marvell,pins = "mpp57";</div><div class='add'>+		marvell,function = "sata0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_r_white_pin: sata-r-white-pin {</div><div class='add'>+		marvell,pins = "mpp55";</div><div class='add'>+		marvell,function = "sata1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_r_amber_pin: sata-r-amber-pin {</div><div class='add'>+		marvell,pins = "mpp52";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_l_amber_pin: sata-l-amber-pin {</div><div class='add'>+		marvell,pins = "mpp53";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backup_led_pin: backup-led-pin {</div><div class='add'>+		marvell,pins = "mpp61";</div><div class='add'>+		marvell,function = "gpo";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xhci_pwr_pin: xhci-pwr-pin {</div><div class='add'>+		marvell,pins = "mpp13";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_r_pwr_pin: sata-r-pwr-pin {</div><div class='add'>+		marvell,pins = "mpp54";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_l_pwr_pin: sata-l-pwr-pin {</div><div class='add'>+		marvell,pins = "mpp56";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_pins: uart1-pins {</div><div class='add'>+		marvell,pins = "mpp60", "mpp61";</div><div class='add'>+		marvell,function = "uart1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	power_button_pin: power-button-pin {</div><div class='add'>+		marvell,pins = "mpp65";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backup_button_pin: backup-button-pin {</div><div class='add'>+		marvell,pins = "mpp63";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reset_button_pin: reset-button-pin {</div><div class='add'>+		marvell,pins = "mpp64";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Serial console */</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to Weltrend MCU */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	phy0: ethernet-phy@0 { /* Marvell 88E1318 */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		marvell,reg-init = &lt;0x0 0x16 0x0 0x0002&gt;,</div><div class='add'>+				&lt;0x0 0x19 0x0 0x0077&gt;,</div><div class='add'>+				&lt;0x0 0x18 0x0 0x5747&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	phy = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	compatible = "marvell,mv64xxx-i2c";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts<br/>index b42b767763aa..4f4924362bf0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-synology-ds213j.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-370-synology-ds213j.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-synology-ds213j.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-synology-ds213j.dts</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "micron,n25q064";</div><div class='add'>+					compatible = "micron,n25q064", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi<br/>index ec96f0b36346..a718866ba52d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-xp.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-370-xp.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370-xp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370-xp.dtsi</a></div><div class='hunk'>@@ -149,7 +149,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@10600 {</div><div class='del'>-				compatible = "marvell,armada-370-spi", "marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10600 0x28&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -160,7 +159,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1: spi@10680 {</div><div class='del'>-				compatible = "marvell,armada-370-spi", "marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10680 0x28&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -270,7 +268,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			eth0: ethernet@70000 {</div><div class='del'>-				compatible = "marvell,armada-370-neta";</div><div class='ctx'> 				reg = &lt;0x70000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;8&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gateclk 4&gt;;</div><div class='hunk'>@@ -286,7 +283,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			eth1: ethernet@74000 {</div><div class='del'>-				compatible = "marvell,armada-370-neta";</div><div class='ctx'> 				reg = &lt;0x74000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;10&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gateclk 3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi<br/>index 00b50db57c9c..53a1a5abe147 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-370.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-370.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-370.dtsi</a></div><div class='hunk'>@@ -139,11 +139,15 @@</div><div class='ctx'> 			 * board level if a different configuration is used.</div><div class='ctx'> 			 */</div><div class='ctx'> 			spi0: spi@10600 {</div><div class='add'>+				compatible = "marvell,armada-370-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;spi0_pins1&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1: spi@10680 {</div><div class='add'>+				compatible = "marvell,armada-370-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -307,6 +311,14 @@</div><div class='ctx'> 					dmacap,memset;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			ethernet@70000 {</div><div class='add'>+				compatible = "marvell,armada-370-neta";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@74000 {</div><div class='add'>+				compatible = "marvell,armada-370-neta";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts<br/>index 4eabc9c21f8d..5711b97e876c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-375-db.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-375-db.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-375-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-375-db.dts</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "n25q128a13";</div><div class='add'>+					compatible = "n25q128a13", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi<br/>index f076ff856d8b..67a0ab0f71e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-375.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-375.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-375.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-375.dtsi</a></div><div class='hunk'>@@ -238,7 +238,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@10600 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-375-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10600 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -249,7 +250,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1: spi@10680 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-375-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10680 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts<br/>index 7219ac3a3d90..89f5a95954ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-385-db-ap.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-385-db-ap.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-385-db-ap.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-db-ap.dts</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "st,m25p128";</div><div class='add'>+					compatible = "st,m25p128", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;54000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-385-linksys-caiman.dts b/arch/arm/boot/dts/armada-385-linksys-caiman.dts<br/>new file mode 100644<br/>index 000000000000..f3cee918d285<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-385-linksys-caiman.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys-caiman.dts</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree include for the Linksys WRT1200AC (Caiman)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2.  This program is licensed "as is" without</div><div class='add'>+ *     any warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "armada-385-linksys.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linksys WRT1200AC";</div><div class='add'>+	compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385",</div><div class='add'>+		     "marvell,armada380";</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		internal-regs{</div><div class='add'>+			i2c@11000 {</div><div class='add'>+</div><div class='add'>+				pca9635@68 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					wan_amber@0 {</div><div class='add'>+						label = "caiman:amber:wan";</div><div class='add'>+						reg = &lt;0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wan_white@1 {</div><div class='add'>+						label = "caiman:white:wan";</div><div class='add'>+						reg = &lt;0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wlan_2g@2 {</div><div class='add'>+						label = "caiman:white:wlan_2g";</div><div class='add'>+						reg = &lt;0x2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wlan_5g@3 {</div><div class='add'>+						label = "caiman:white:wlan_5g";</div><div class='add'>+						reg = &lt;0x3&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb2@5 {</div><div class='add'>+						label = "caiman:white:usb2";</div><div class='add'>+						reg = &lt;0x5&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb3_1@6 {</div><div class='add'>+						label = "caiman:white:usb3_1";</div><div class='add'>+						reg = &lt;0x6&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb3_2@7 {</div><div class='add'>+						label = "caiman:white:usb3_2";</div><div class='add'>+						reg = &lt;0x7&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wps_white@8 {</div><div class='add'>+						label = "caiman:white:wps";</div><div class='add'>+						reg = &lt;0x8&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wps_amber@9 {</div><div class='add'>+						label = "caiman:amber:wps";</div><div class='add'>+						reg = &lt;0x9&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		power {</div><div class='add'>+			label = "caiman:white:power";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata {</div><div class='add'>+			label = "caiman:white:sata";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-385-linksys-cobra.dts b/arch/arm/boot/dts/armada-385-linksys-cobra.dts<br/>new file mode 100644<br/>index 000000000000..111071860559<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-385-linksys-cobra.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys-cobra.dts</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for the Linksys WRT1900ACv2 (Cobra)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2.  This program is licensed "as is" without</div><div class='add'>+ *     any warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "armada-385-linksys.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linksys WRT1900ACv2";</div><div class='add'>+	compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385",</div><div class='add'>+		     "marvell,armada380";</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		internal-regs{</div><div class='add'>+			i2c@11000 {</div><div class='add'>+</div><div class='add'>+				pca9635@68 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					wan_amber@0 {</div><div class='add'>+						label = "cobra:amber:wan";</div><div class='add'>+						reg = &lt;0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wan_white@1 {</div><div class='add'>+						label = "cobra:white:wan";</div><div class='add'>+						reg = &lt;0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wlan_2g@2 {</div><div class='add'>+						label = "cobra:white:wlan_2g";</div><div class='add'>+						reg = &lt;0x2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wlan_5g@3 {</div><div class='add'>+						label = "cobra:white:wlan_5g";</div><div class='add'>+						reg = &lt;0x3&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb2@5 {</div><div class='add'>+						label = "cobra:white:usb2";</div><div class='add'>+						reg = &lt;0x5&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb3_1@6 {</div><div class='add'>+						label = "cobra:white:usb3_1";</div><div class='add'>+						reg = &lt;0x6&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb3_2@7 {</div><div class='add'>+						label = "cobra:white:usb3_2";</div><div class='add'>+						reg = &lt;0x7&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wps_white@8 {</div><div class='add'>+						label = "cobra:white:wps";</div><div class='add'>+						reg = &lt;0x8&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wps_amber@9 {</div><div class='add'>+						label = "cobra:amber:wps";</div><div class='add'>+						reg = &lt;0x9&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		power {</div><div class='add'>+			label = "cobra:white:power";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata {</div><div class='add'>+			label = "cobra:white:sata";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi<br/>new file mode 100644<br/>index 000000000000..74a9c6b54fa7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-385-linksys.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-385-linksys.dtsi</a></div><div class='hunk'>@@ -0,0 +1,332 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree include file for Armada 385 based Linksys boards</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2.  This program is licensed "as is" without</div><div class='add'>+ *     any warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "armada-385.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linksys boards based on Armada 385";</div><div class='add'>+	compatible = "linksys,armada385", "marvell,armada385",</div><div class='add'>+		     "marvell,armada380";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;; /* 512 MB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		ranges = &lt;MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000</div><div class='add'>+			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+		internal-regs {</div><div class='add'>+</div><div class='add'>+			spi@10600 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c@11000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				tmp421@4c {</div><div class='add'>+					compatible = "ti,tmp421";</div><div class='add'>+					reg = &lt;0x4c&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pca9635@68 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "nxp,pca9635";</div><div class='add'>+					reg = &lt;0x68&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* J10: VCC, NC, RX, NC, TX, GND  */</div><div class='add'>+			serial@12000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@70000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;1000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@34000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				phy-mode = "sgmii";</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;1000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sata@a8000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* USB part of the eSATA/USB 2.0 port */</div><div class='add'>+			usb@50000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb3@f8000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				usb-phy = &lt;&amp;usb3_phy&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flash@d0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				marvell,nand-keep-config;</div><div class='add'>+				marvell,nand-enable-arbiter;</div><div class='add'>+				nand-on-flash-bbt;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x0000000 0x200000&gt;;  /* 2MB */</div><div class='add'>+					read-only;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@100000 {</div><div class='add'>+					label = "u_env";</div><div class='add'>+					reg = &lt;0x200000 0x40000&gt;;    /* 256KB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@140000 {</div><div class='add'>+					label = "s_env";</div><div class='add'>+					reg = &lt;0x240000 0x40000&gt;;    /* 256KB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@900000 {</div><div class='add'>+					label = "devinfo";</div><div class='add'>+					reg = &lt;0x900000 0x100000&gt;;   /* 1MB */</div><div class='add'>+					read-only;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* kernel1 overlaps with rootfs1 by design */</div><div class='add'>+				partition@a00000 {</div><div class='add'>+					label = "kernel1";</div><div class='add'>+					reg = &lt;0xa00000 0x2800000&gt;;  /* 40MB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@1000000 {</div><div class='add'>+					label = "rootfs1";</div><div class='add'>+					reg = &lt;0x1000000 0x2200000&gt;;  /* 34MB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* kernel2 overlaps with rootfs2 by design */</div><div class='add'>+				partition@3200000 {</div><div class='add'>+					label = "kernel2";</div><div class='add'>+					reg = &lt;0x3200000 0x2800000&gt;; /* 40MB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@3800000 {</div><div class='add'>+					label = "rootfs2";</div><div class='add'>+					reg = &lt;0x3800000 0x2200000&gt;; /* 34MB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/*</div><div class='add'>+				 * 38MB, last MB is for the BBT, not writable</div><div class='add'>+				 */</div><div class='add'>+				partition@5a00000 {</div><div class='add'>+					label = "syscfg";</div><div class='add'>+					reg = &lt;0x5a00000 0x2600000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/*</div><div class='add'>+				 * Unused area between "s_env" and "devinfo".</div><div class='add'>+				 * Moved here because otherwise the renumbered</div><div class='add'>+				 * partitions would break the bootloader</div><div class='add'>+				 * supplied bootargs</div><div class='add'>+				 */</div><div class='add'>+				partition@180000 {</div><div class='add'>+					label = "unused_area";</div><div class='add'>+					reg = &lt;0x280000 0x680000&gt;;   /* 6.5MB */</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-controller {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			pcie@1,0 {</div><div class='add'>+				/* Marvell 88W8864, 5GHz-only */</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie@2,0 {</div><div class='add'>+				/* Marvell 88W8864, 2GHz-only */</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb3_phy: usb3_phy {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		vcc-supply = &lt;&amp;reg_xhci0_vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_xhci0_vbus: xhci0-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;xhci0_vbus_pins&gt;;</div><div class='add'>+		regulator-name = "xhci0-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;keys_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button@1 {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button@2 {</div><div class='add'>+			label = "Factory Reset Button";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-0 = &lt;&amp;power_led_pin &amp;sata_led_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata {</div><div class='add'>+			gpios = &lt;&amp;gpio1 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsa@0 {</div><div class='add'>+		compatible = "marvell,dsa";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dsa,ethernet = &lt;&amp;eth2&gt;;</div><div class='add'>+		dsa,mii-bus = &lt;&amp;mdio&gt;;</div><div class='add'>+</div><div class='add'>+		switch@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0 0&gt;;	/* MDIO address 0, switch 0 in tree */</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				label = "lan4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "lan3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				label = "lan2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				label = "lan1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				label = "wan";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				label = "cpu";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	keys_pin: keys-pin {</div><div class='add'>+		marvell,pins = "mpp24", "mpp47";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	power_led_pin: power-led-pin {</div><div class='add'>+		marvell,pins = "mpp55";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_led_pin: sata-led-pin {</div><div class='add'>+		marvell,pins = "mpp54";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xhci0_vbus_pins: xhci0-vbus-pins {</div><div class='add'>+		marvell,pins = "mpp50";</div><div class='add'>+		marvell,function = "gpio";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts<br/>index 51d1623de53e..91ac8c118f37 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-db.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-388-db.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-db.dts</a></div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "w25q32";</div><div class='add'>+					compatible = "w25q32", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts<br/>index 78514ab0b47a..fd4f6fd8a2e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-gp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-388-gp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-gp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-gp.dts</a></div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "st,m25p128";</div><div class='add'>+					compatible = "st,m25p128", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 					m25p,fast-read;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts<br/>index 1dc6e2341cc2..b657b1687e5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-rd.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-388-rd.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-388-rd.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-388-rd.dts</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "st,m25p128";</div><div class='add'>+					compatible = "st,m25p128", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi<br/>index 218a2acd36e5..04ecfe6e2bc6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-38x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-38x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-38x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-38x.dtsi</a></div><div class='hunk'>@@ -167,7 +167,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@10600 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-380-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10600 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -178,7 +179,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1: spi@10680 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-380-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10680 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -495,7 +497,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mdio@72004 {</div><div class='add'>+			mdio: mdio@72004 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				compatible = "marvell,orion-mdio";</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts<br/>index bbf83756c43c..788c3badb681 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-398-db.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-398-db.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-398-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-398-db.dts</a></div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='del'>-					compatible = "n25q128a13";</div><div class='add'>+					compatible = "n25q128a13", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi<br/>index ecd1318109ba..fc9864f85fc2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-39x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-39x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-39x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-39x.dtsi</a></div><div class='hunk'>@@ -128,7 +128,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@10600 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-390-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10600 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -139,7 +140,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1: spi@10680 {</div><div class='del'>-				compatible = "marvell,orion-spi";</div><div class='add'>+				compatible = "marvell,armada-390-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				reg = &lt;0x10680 0x50&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts<br/>index dfd782b44e50..60bbfe32bb80 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-axpwifiap.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-axpwifiap.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-axpwifiap.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-axpwifiap.dts</a></div><div class='hunk'>@@ -140,7 +140,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "n25q128a13";</div><div class='add'>+					compatible = "n25q128a13", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts<br/>index 103782407618..7dd900f158be 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-db.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-db.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-db.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-db.dts</a></div><div class='hunk'>@@ -222,7 +222,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "m25p64";</div><div class='add'>+					compatible = "m25p64", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts<br/>index 565227eacf06..bf724ca96a33 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-gp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-gp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-gp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-gp.dts</a></div><div class='hunk'>@@ -227,7 +227,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "n25q128a13";</div><div class='add'>+					compatible = "n25q128a13", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;108000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi<br/>index 8479fdc9e9c2..c5fdc99f0dbe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-mv78260.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-mv78260.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-mv78260.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-mv78260.dtsi</a></div><div class='hunk'>@@ -318,7 +318,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			eth3: ethernet@34000 {</div><div class='del'>-				compatible = "marvell,armada-370-neta";</div><div class='add'>+				compatible = "marvell,armada-xp-neta";</div><div class='ctx'> 				reg = &lt;0x34000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gateclk 1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi<br/>index 661d54c81580..0e24f1a38540 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-mv78460.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-mv78460.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-mv78460.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-mv78460.dtsi</a></div><div class='hunk'>@@ -356,7 +356,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			eth3: ethernet@34000 {</div><div class='del'>-				compatible = "marvell,armada-370-neta";</div><div class='add'>+				compatible = "marvell,armada-xp-neta";</div><div class='ctx'> 				reg = &lt;0x34000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gateclk 1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts<br/>index 6063428fa6a0..20267ad2f61e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-synology-ds414.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp-synology-ds414.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp-synology-ds414.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp-synology-ds414.dts</a></div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 				spi-flash@0 {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;1&gt;;</div><div class='del'>-					compatible = "micron,n25q064";</div><div class='add'>+					compatible = "micron,n25q064", "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;; /* Chip select 0 */</div><div class='ctx'> 					spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi<br/>index 013d63f69e36..3de9b761cc1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armada-xp.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armada-xp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armada-xp.dtsi</a></div><div class='hunk'>@@ -85,10 +85,18 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@10600 {</div><div class='add'>+				compatible = "marvell,armada-xp-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;spi0_pins&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spi1: spi@10680 {</div><div class='add'>+				compatible = "marvell,armada-xp-spi",</div><div class='add'>+						"marvell,orion-spi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 			i2c0: i2c@11000 {</div><div class='ctx'> 				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";</div><div class='ctx'> 				reg = &lt;0x11000 0x100&gt;;</div><div class='hunk'>@@ -177,7 +185,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			eth2: ethernet@30000 {</div><div class='del'>-				compatible = "marvell,armada-370-neta";</div><div class='add'>+				compatible = "marvell,armada-xp-neta";</div><div class='ctx'> 				reg = &lt;0x30000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gateclk 2&gt;;</div><div class='hunk'>@@ -220,6 +228,14 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			ethernet@70000 {</div><div class='add'>+				compatible = "marvell,armada-xp-neta";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@74000 {</div><div class='add'>+				compatible = "marvell,armada-xp-neta";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			xor@f0900 {</div><div class='ctx'> 				compatible = "marvell,orion-xor";</div><div class='ctx'> 				reg = &lt;0xF0900 0x100</div><div class='hunk'>@@ -289,7 +305,7 @@</div><div class='ctx'> 	spi0_pins: spi0-pins {</div><div class='ctx'> 		marvell,pins = "mpp36", "mpp37",</div><div class='ctx'> 			       "mpp38", "mpp39";</div><div class='del'>-		marvell,function = "spi";</div><div class='add'>+		marvell,function = "spi0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	uart2_pins: uart2-pins {</div><div class='head'>diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi<br/>index 5a660d0faf42..b1ad7cf6ac02 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/armv7-m.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/armv7-m.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/armv7-m.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/armv7-m.dtsi</a></div><div class='hunk'>@@ -8,6 +8,12 @@</div><div class='ctx'> 		reg = &lt;0xe000e100 0xc00&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	systick: timer@e000e010 {</div><div class='add'>+		compatible = "arm,armv7m-systick";</div><div class='add'>+		reg = &lt;0xe000e010 0x10&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-ariettag25.dts b/arch/arm/boot/dts/at91-ariettag25.dts<br/>new file mode 100644<br/>index 000000000000..c514502081d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-ariettag25.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-ariettag25.dts</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for Arietta G25</div><div class='add'>+ * This device tree is minimal, to activate more peripherals, see:</div><div class='add'>+ * http://dts.acmesystems.it/arietta/</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "at91sam9g25.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Acme Systems Arietta G25";</div><div class='add'>+	compatible = "acme,ariettag25", "atmel,at91sam9x5", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;dbgu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		slow_xtal {</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_xtal {</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			mmc0: mmc@f0008000 {</div><div class='add'>+				pinctrl-0 = &lt;</div><div class='add'>+				  &amp;pinctrl_mmc0_slot0_clk_cmd_dat0</div><div class='add'>+				  &amp;pinctrl_mmc0_slot0_dat1_3&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				slot@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					bus-width = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb2: gadget@f803c000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@fffffeb0 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00600000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			num-ports = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1: ehci@00700000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		arietta_led {</div><div class='add'>+			label = "arietta_led";</div><div class='add'>+			gpios = &lt;&amp;pioB 8 GPIO_ACTIVE_HIGH&gt;; /* PB8 */</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-kizbox.dts b/arch/arm/boot/dts/at91-kizbox.dts<br/>new file mode 100644<br/>index 000000000000..bf18ece0c027<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-kizbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizbox.dts</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+/*</div><div class='add'>+ * at91-kizbox.dts - Device Tree file for Overkiz Kizbox board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012-2014 Boris BREZILLON &lt;b.brezillon@overkiz.com&gt;</div><div class='add'>+ *               2014-2015 Gaël PORTAY &lt;g.portay@overkiz.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "at91sam9g20.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Overkiz Kizbox";</div><div class='add'>+	compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ubi.mtd=ubi";</div><div class='add'>+		stdout-path = &amp;dbgu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;18432000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_xtal {</div><div class='add'>+			clock-frequency = &lt;18432000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				phy-mode = "mii";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_macb_rmii</div><div class='add'>+				             &amp;pinctrl_macb_rmii_mii_alt&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart3: serial@fffd0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			watchdog@fffffd40 {</div><div class='add'>+				timeout-sec = &lt;15&gt;;</div><div class='add'>+				atmel,max-heartbeat-sec = &lt;16&gt;;</div><div class='add'>+				atmel,min-heartbeat-sec = &lt;0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			num-ports = &lt;1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			bootstrap@0 {</div><div class='add'>+				label = "bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ubi@20000 {</div><div class='add'>+				label = "ubi";</div><div class='add'>+				reg = &lt;0x20000 0x7fe0000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset {</div><div class='add'>+			label = "PB_RST";</div><div class='add'>+			gpios = &lt;&amp;pioB 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,code = &lt;0x100&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user {</div><div class='add'>+			label = "PB_USER";</div><div class='add'>+			gpios = &lt;&amp;pioB 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,code = &lt;0x101&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		rtc: pcf8563@51 {</div><div class='add'>+			compatible = "nxp,pcf8563";</div><div class='add'>+			reg = &lt;0x51&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm_leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		network_green {</div><div class='add'>+			label = "pwm:green:network";</div><div class='add'>+			pwms = &lt;&amp;tcb_pwm 2 10000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		network_red {</div><div class='add'>+			label = "pwm:red:network";</div><div class='add'>+			pwms = &lt;&amp;tcb_pwm 4 10000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user_green {</div><div class='add'>+			label = "pwm:green:user";</div><div class='add'>+			pwms = &lt;&amp;tcb_pwm 0 10000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user_red {</div><div class='add'>+			label = "pwm:red:user";</div><div class='add'>+			pwms = &lt;&amp;tcb_pwm 1 10000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tcb_pwm: pwm {</div><div class='add'>+		compatible = "atmel,tcb-pwm";</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		tc-block = &lt;1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tcb1_tioa0</div><div class='add'>+			     &amp;pinctrl_tcb1_tioa1</div><div class='add'>+			     &amp;pinctrl_tcb1_tioa2</div><div class='add'>+			     &amp;pinctrl_tcb1_tiob0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-kizbox2.dts b/arch/arm/boot/dts/at91-kizbox2.dts<br/>new file mode 100644<br/>index 000000000000..f0b1563cb3f1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-kizbox2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizbox2.dts</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+/*</div><div class='add'>+ * at91-kizbox2.dts - Device Tree file for Overkiz Kizbox 2 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014 Gaël PORTAY &lt;g.portay@overkiz.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sama5d31.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Overkiz Kizbox 2";</div><div class='add'>+	compatible = "overkiz,kizbox2", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ubi.mtd=ubi";</div><div class='add'>+		stdout-path = &amp;dbgu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		slow_xtal {</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_xtal {</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			i2c1: i2c@f0018000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				pmic: act8865@5b {</div><div class='add'>+					compatible = "active-semi,act8865";</div><div class='add'>+					reg = &lt;0x5b&gt;;</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					regulators {</div><div class='add'>+						vcc_1v8_reg: DCDC_REG1 {</div><div class='add'>+							regulator-name = "VCC_1V8";</div><div class='add'>+							regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						vcc_1v2_reg: DCDC_REG2 {</div><div class='add'>+							regulator-name = "VCC_1V2";</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						vcc_3v3_reg: DCDC_REG3 {</div><div class='add'>+							regulator-name = "VCC_3V3";</div><div class='add'>+							regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						vddfuse_reg: LDO_REG1 {</div><div class='add'>+							regulator-name = "FUSE_2V5";</div><div class='add'>+							regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						vddana_reg: LDO_REG2 {</div><div class='add'>+							regulator-name = "VDDANA";</div><div class='add'>+							regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						vled_reg: LDO_REG3 {</div><div class='add'>+							regulator-name = "VLED";</div><div class='add'>+							regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						v3v8_rf_reg: LDO_REG4 {</div><div class='add'>+							regulator-name = "V3V8_RF";</div><div class='add'>+							regulator-min-microvolt = &lt;3800000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;3800000&gt;;</div><div class='add'>+							regulator-always-on;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@f001c000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@f0020000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm0: pwm@f002c000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_pwm0_pwmh0_1</div><div class='add'>+					     &amp;pinctrl_pwm0_pwmh1_1</div><div class='add'>+					     &amp;pinctrl_pwm0_pwmh2_0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc0: adc@f8018000 {</div><div class='add'>+				atmel,adc-vref = &lt;3333&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@f8020000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb1: ethernet@f802c000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@ffffee00 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			watchdog@fffffe40 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1: ohci@00600000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2: ehci@00700000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@60000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "hw";</div><div class='add'>+			atmel,has-pmecc;</div><div class='add'>+			atmel,pmecc-cap = &lt;4&gt;;</div><div class='add'>+			atmel,pmecc-sector-size = &lt;512&gt;;</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			bootstrap@0 {</div><div class='add'>+				label = "bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ubi@20000 {</div><div class='add'>+				label = "ubi";</div><div class='add'>+				reg = &lt;0x20000 0x7fe0000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		prog {</div><div class='add'>+			label = "PB_PROG";</div><div class='add'>+			gpios = &lt;&amp;pioE 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;0x102&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset {</div><div class='add'>+			label = "PB_RST";</div><div class='add'>+			gpios = &lt;&amp;pioE 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;0x100&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user {</div><div class='add'>+			label = "PB_USER";</div><div class='add'>+			gpios = &lt;&amp;pioE 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,code = &lt;0x101&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm_leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		blue {</div><div class='add'>+			label = "pwm:blue:user";</div><div class='add'>+			pwms = &lt;&amp;pwm0 2 10000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		green {</div><div class='add'>+			label = "pwm:green:user";</div><div class='add'>+			pwms = &lt;&amp;pwm0 1 10000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		red {</div><div class='add'>+			label = "pwm:red:user";</div><div class='add'>+			pwms = &lt;&amp;pwm0 0 10000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-kizboxmini.dts b/arch/arm/boot/dts/at91-kizboxmini.dts<br/>new file mode 100644<br/>index 000000000000..9f72b4932634<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-kizboxmini.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-kizboxmini.dts</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+/*</div><div class='add'>+ * at91-kizboxmini.dts - Device Tree file for Overkiz Kizbox mini board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014 Gaël PORTAY &lt;g.portay@overkiz.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "at91sam9g25.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Overkiz Kizbox mini";</div><div class='add'>+	compatible = "overkiz,kizboxmini", "atmel,at91sam9g25", "atmel,at91sam9x5", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ubi.mtd=ubi";</div><div class='add'>+		stdout-path = &amp;dbgu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		slow_xtal {</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_xtal {</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			usart0: serial@f801c000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@f802c000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm0: pwm@f8034000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_pwm0_pwm0_1</div><div class='add'>+					     &amp;pinctrl_pwm0_pwm1_1&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			watchdog@fffffe40 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00600000 {</div><div class='add'>+			num-ports = &lt;1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1: ehci@00700000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "hw";</div><div class='add'>+			atmel,has-pmecc;</div><div class='add'>+			atmel,pmecc-cap = &lt;4&gt;;</div><div class='add'>+			atmel,pmecc-sector-size = &lt;512&gt;;</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			bootstrap@0 {</div><div class='add'>+				label = "bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ubi@20000 {</div><div class='add'>+				label = "ubi";</div><div class='add'>+				reg = &lt;0x20000 0x7fe0000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		prog {</div><div class='add'>+			label = "PB_PROG";</div><div class='add'>+			gpios = &lt;&amp;pioC 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;0x102&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset {</div><div class='add'>+			label = "PB_RST";</div><div class='add'>+			gpios = &lt;&amp;pioC 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;0x100&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm_leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		green {</div><div class='add'>+			label = "pwm:green:user";</div><div class='add'>+			pwms = &lt;&amp;pwm0 0 10000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		red {</div><div class='add'>+			label = "pwm:red:user";</div><div class='add'>+			pwms = &lt;&amp;pwm0 1 10000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts<br/>index 9991240b7438..d81474e0bcd6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d3_xplained.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91-sama5d3_xplained.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d3_xplained.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d3_xplained.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> 	compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -35,6 +35,8 @@</div><div class='ctx'> 		apb {</div><div class='ctx'> 			mmc0: mmc@f0000000 {</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pinctrl_mmc0_clk_cmd_dat0 &amp;pinctrl_mmc0_dat1_3 &amp;pinctrl_mmc0_dat4_7 &amp;pinctrl_mmc0_cd&gt;;</div><div class='add'>+				vmmc-supply = &lt;&amp;vcc_mmc0_reg&gt;;</div><div class='add'>+				vqmmc-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 				slot@0 {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='hunk'>@@ -43,6 +45,17 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			mmc1: mmc@f8000000 {</div><div class='add'>+				vmmc-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='add'>+				vqmmc-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+				slot@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					bus-width = &lt;4&gt;;</div><div class='add'>+					cd-gpios = &lt;&amp;pioE 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi0: spi@f0004000 {</div><div class='ctx'> 				cs-gpios = &lt;&amp;pioD 13 0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;&amp;pioD 16 0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='hunk'>@@ -105,7 +118,13 @@</div><div class='ctx'> </div><div class='ctx'> 			macb0: ethernet@f0028000 {</div><div class='ctx'> 				phy-mode = "rgmii";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='add'>+</div><div class='add'>+				ethernet-phy@7 {</div><div class='add'>+					reg = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm0: pwm@f002c000 {</div><div class='hunk'>@@ -215,12 +234,6 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='del'>-</div><div class='del'>-			pmc: pmc@fffffc00 {</div><div class='del'>-				main: mainck {</div><div class='del'>-					clock-frequency = &lt;12000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nand0: nand@60000000 {</div><div class='hunk'>@@ -284,6 +297,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc_mmc0_reg: fixedregulator@0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pioE 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-name = "mmc0-card-supply";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts<br/>index c740e1a2a3a5..22ad7c959103 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d4_xplained.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91-sama5d4_xplained.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d4_xplained.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d4_xplained.dts</a></div><div class='hunk'>@@ -50,7 +50,8 @@</div><div class='ctx'> 	compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 ignore_loglevel earlyprintk";</div><div class='add'>+		bootargs = "ignore_loglevel earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -106,6 +107,8 @@</div><div class='ctx'> 			mmc1: mmc@fc000000 {</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pinctrl_mmc1_clk_cmd_dat0 &amp;pinctrl_mmc1_dat1_3 &amp;pinctrl_mmc1_cd&gt;;</div><div class='add'>+				vmmc-supply = &lt;&amp;vcc_mmc1_reg&gt;;</div><div class='add'>+				vqmmc-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 				slot@0 {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='hunk'>@@ -122,6 +125,11 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spi1: spi@fc018000 {</div><div class='add'>+				cs-gpios = &lt;&amp;pioB 21 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			adc0: adc@fc034000 {</div><div class='ctx'> 				atmel,adc-vref = &lt;3300&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='hunk'>@@ -238,4 +246,22 @@</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_reg: fixedregulator@0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC 3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_mmc1_reg: fixedregulator@1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pioE 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-name = "VDD MCI1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts<br/>index 89ef4a540db5..d782f2926b73 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d4ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91-sama5d4ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91-sama5d4ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91-sama5d4ek.dts</a></div><div class='hunk'>@@ -50,7 +50,8 @@</div><div class='ctx'> 	compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 ignore_loglevel earlyprintk";</div><div class='add'>+		bootargs = "ignore_loglevel earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -108,8 +109,8 @@</div><div class='ctx'> 			mmc0: mmc@f8000000 {</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pinctrl_mmc0_clk_cmd_dat0 &amp;pinctrl_mmc0_dat1_3 &amp;pinctrl_mmc0_cd&gt;;</div><div class='del'>-				slot@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='add'>+				slot@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='ctx'> 					bus-width = &lt;4&gt;;</div><div class='ctx'> 					cd-gpios = &lt;&amp;pioE 5 0&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi<br/>index 4fb333bd1f85..e3cfb9972f54 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91rm9200.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91rm9200.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91rm9200.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91rm9200.dtsi</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ramc0: ramc@ffffff00 {</div><div class='del'>-				compatible = "atmel,at91rm9200-sdramc";</div><div class='add'>+				compatible = "atmel,at91rm9200-sdramc", "syscon";</div><div class='ctx'> 				reg = &lt;0xffffff00 0x100&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -940,8 +940,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00300000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;23 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts<br/>index 2a5d21247d7e..8dab4b75ca97 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91rm9200ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91rm9200ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91rm9200ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91rm9200ek.dts</a></div><div class='hunk'>@@ -12,6 +12,10 @@</div><div class='ctx'> 	model = "Atmel AT91RM9200 evaluation kit";</div><div class='ctx'> 	compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";</div><div class='ctx'> </div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi<br/>index d88fe62a2b2e..4bc347549102 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9260.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9260.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9260.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9260.dtsi</a></div><div class='hunk'>@@ -1008,8 +1008,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi<br/>index bf8d1856a55a..b2c44a07a3d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9261.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9261.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9261.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9261.dtsi</a></div><div class='hunk'>@@ -75,8 +75,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;hclk0&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;ohci_clk&gt;, &lt;&amp;hclk0&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts<br/>index f4a765729c7a..2e92ac020f23 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9261ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9261ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9261ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9261ek.dts</a></div><div class='hunk'>@@ -13,7 +13,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";</div><div class='add'>+		bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi<br/>index 111889b556cf..e36d966ef5e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9263.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9263.dtsi</a></div><div class='hunk'>@@ -1010,8 +1010,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00a00000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;29 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;ohci_clk&gt;, &lt;&amp;ohci_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts<br/>index 5cf93eecd8f1..23381276ffb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9263ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9263ek.dts</a></div><div class='hunk'>@@ -13,7 +13,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi<br/>index dfaacb113f2e..57548a2c5a1e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20ek_common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9g20ek_common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20ek_common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9g20ek_common.dtsi</a></div><div class='hunk'>@@ -10,7 +10,8 @@</div><div class='ctx'> / {</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi<br/>index 70e59c5ceb2f..18177f5a7464 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g45.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9g45.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g45.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9g45.dtsi</a></div><div class='hunk'>@@ -1148,7 +1148,7 @@</div><div class='ctx'> 			usb2: gadget@fff78000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "atmel,at91sam9rl-udc";</div><div class='add'>+				compatible = "atmel,at91sam9g45-udc";</div><div class='ctx'> 				reg = &lt;0x00600000 0x80000</div><div class='ctx'> 				       0xfff78000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -1291,8 +1291,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1300,8 +1300,8 @@</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00800000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;;</div><div class='add'>+			clock-names = "usb_clk", "ehci_clk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts<br/>index 33ce7ca2c404..1375d3362603 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9m10g45ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9m10g45ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9m10g45ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9m10g45ek.dts</a></div><div class='hunk'>@@ -15,7 +15,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";</div><div class='add'>+		bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi<br/>index a9e35dfc12d9..5c2a8c8c8bd4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9n12.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9n12.dtsi</a></div><div class='hunk'>@@ -949,9 +949,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x00100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;,</div><div class='del'>-				 &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts<br/>index 6e067c8a3502..eab17fcace6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12ek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9n12ek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12ek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9n12ek.dts</a></div><div class='hunk'>@@ -14,7 +14,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";</div><div class='add'>+		bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi<br/>index ebfd5ce9cb38..c9920c64791c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9rl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9rl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9rl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9rl.dtsi</a></div><div class='hunk'>@@ -1065,13 +1065,6 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			rtc@fffffeb0 {</div><div class='del'>-				compatible = "atmel,at91rm9200-rtc";</div><div class='del'>-				reg = &lt;0xfffffeb0 0x40&gt;;</div><div class='del'>-				interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			rtc@fffffd20 {</div><div class='ctx'> 				compatible = "atmel,at91sam9260-rtt";</div><div class='ctx'> 				reg = &lt;0xfffffd20 0x10&gt;;</div><div class='hunk'>@@ -1085,6 +1078,14 @@</div><div class='ctx'> 				reg = &lt;0xfffffd60 0x10&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			rtc@fffffe00 {</div><div class='add'>+				compatible = "atmel,at91rm9200-rtc";</div><div class='add'>+				reg = &lt;0xfffffe00 0x40&gt;;</div><div class='add'>+				interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts<br/>index 9be5b540eebf..558c9f220bed 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9rlek.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9rlek.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9rlek.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9rlek.dts</a></div><div class='hunk'>@@ -13,7 +13,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";</div><div class='add'>+		bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -181,13 +182,11 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pmc: pmc@fffffc00 {</div><div class='del'>-				main: mainck {</div><div class='del'>-					clock-frequency = &lt;12000000&gt;;</div><div class='del'>-				};</div><div class='add'>+			watchdog@fffffd40 {</div><div class='add'>+				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			watchdog@fffffd40 {</div><div class='add'>+			rtc@fffffe00 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi<br/>index 3aa56ae3410a..b6c8df8d380e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9x5.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9x5.dtsi</a></div><div class='hunk'>@@ -505,7 +505,7 @@</div><div class='ctx'> </div><div class='ctx'> 					pinctrl_usart1_sck: usart1_sck-0 {</div><div class='ctx'> 						atmel,pins =</div><div class='del'>-							&lt;AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;	/* PC29 periph C */</div><div class='add'>+							&lt;AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;	/* PC29 periph C */</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -694,6 +694,52 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				pwm0 {</div><div class='add'>+					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				tcb0 {</div><div class='ctx'> 					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {</div><div class='ctx'> 						atmel,pins = &lt;AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='hunk'>@@ -1062,7 +1108,7 @@</div><div class='ctx'> 			usb2: gadget@f803c000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "atmel,at91sam9rl-udc";</div><div class='add'>+				compatible = "atmel,at91sam9g45-udc";</div><div class='ctx'> 				reg = &lt;0x00500000 0x80000</div><div class='ctx'> 				       0xf803c000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;23 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -1176,8 +1222,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1185,8 +1231,8 @@</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ehci_clk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;;</div><div class='add'>+			clock-names = "usb_clk", "ehci_clk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi<br/>index cc83a37a7311..d237c462dfc6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5ek.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/at91sam9x5ek.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5ek.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/at91sam9x5ek.dtsi</a></div><div class='hunk'>@@ -13,7 +13,8 @@</div><div class='ctx'> 	compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";</div><div class='add'>+		bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahb {</div><div class='head'>diff --git a/arch/arm/boot/dts/atlas7.dtsi b/arch/arm/boot/dts/atlas7.dtsi<br/>index a753178abc85..3e21311f9514 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/atlas7.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/atlas7.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/atlas7.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/atlas7.dtsi</a></div><div class='hunk'>@@ -38,6 +38,21 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clocks {</div><div class='add'>+		xinw {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-output-names = "xinw";</div><div class='add'>+		};</div><div class='add'>+		xin {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;26000000&gt;;</div><div class='add'>+			clock-output-names = "xin";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	noc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -120,6 +135,1025 @@</div><div class='ctx'> 			compatible = "sirf,atlas7-ioc";</div><div class='ctx'> 			reg = &lt;0x18880000 0x1000&gt;,</div><div class='ctx'> 				&lt;0x10E40000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			audio_ac97_pmx: audio_ac97@0 {</div><div class='add'>+				audio_ac97 {</div><div class='add'>+					groups = "audio_ac97_grp";</div><div class='add'>+					function = "audio_ac97";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_func_dbg_pmx: audio_func_dbg@0 {</div><div class='add'>+				audio_func_dbg {</div><div class='add'>+					groups = "audio_func_dbg_grp";</div><div class='add'>+					function = "audio_func_dbg";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_i2s_pmx: audio_i2s@0 {</div><div class='add'>+				audio_i2s {</div><div class='add'>+					groups = "audio_i2s_grp";</div><div class='add'>+					function = "audio_i2s";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_i2s_2ch_pmx: audio_i2s_2ch@0 {</div><div class='add'>+				audio_i2s_2ch {</div><div class='add'>+					groups = "audio_i2s_2ch_grp";</div><div class='add'>+					function = "audio_i2s_2ch";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_i2s_extclk_pmx: audio_i2s_extclk@0 {</div><div class='add'>+				audio_i2s_extclk {</div><div class='add'>+					groups = "audio_i2s_extclk_grp";</div><div class='add'>+					function = "audio_i2s_extclk";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_uart0_pmx: audio_uart0@0 {</div><div class='add'>+				audio_uart0 {</div><div class='add'>+					groups = "audio_uart0_grp";</div><div class='add'>+					function = "audio_uart0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_uart1_pmx: audio_uart1@0 {</div><div class='add'>+				audio_uart1 {</div><div class='add'>+					groups = "audio_uart1_grp";</div><div class='add'>+					function = "audio_uart1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_uart2_pmx0: audio_uart2@0 {</div><div class='add'>+				audio_uart2_0 {</div><div class='add'>+					groups = "audio_uart2_grp0";</div><div class='add'>+					function = "audio_uart2_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio_uart2_pmx1: audio_uart2@1 {</div><div class='add'>+				audio_uart2_1 {</div><div class='add'>+					groups = "audio_uart2_grp1";</div><div class='add'>+					function = "audio_uart2_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c_can_trnsvr_pmx: c_can_trnsvr@0 {</div><div class='add'>+				c_can_trnsvr {</div><div class='add'>+					groups = "c_can_trnsvr_grp";</div><div class='add'>+					function = "c_can_trnsvr";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c0_can_pmx0: c0_can@0 {</div><div class='add'>+				c0_can_0 {</div><div class='add'>+					groups = "c0_can_grp0";</div><div class='add'>+					function = "c0_can_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c0_can_pmx1: c0_can@1 {</div><div class='add'>+				c0_can_1 {</div><div class='add'>+					groups = "c0_can_grp1";</div><div class='add'>+					function = "c0_can_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c1_can_pmx0: c1_can@0 {</div><div class='add'>+				c1_can_0 {</div><div class='add'>+					groups = "c1_can_grp0";</div><div class='add'>+					function = "c1_can_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c1_can_pmx1: c1_can@1 {</div><div class='add'>+				c1_can_1 {</div><div class='add'>+					groups = "c1_can_grp1";</div><div class='add'>+					function = "c1_can_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			c1_can_pmx2: c1_can@2 {</div><div class='add'>+				c1_can_2 {</div><div class='add'>+					groups = "c1_can_grp2";</div><div class='add'>+					function = "c1_can_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_audio_lpc_pmx: ca_audio_lpc@0 {</div><div class='add'>+				ca_audio_lpc {</div><div class='add'>+					groups = "ca_audio_lpc_grp";</div><div class='add'>+					function = "ca_audio_lpc";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_bt_lpc_pmx: ca_bt_lpc@0 {</div><div class='add'>+				ca_bt_lpc {</div><div class='add'>+					groups = "ca_bt_lpc_grp";</div><div class='add'>+					function = "ca_bt_lpc";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_coex_pmx: ca_coex@0 {</div><div class='add'>+				ca_coex {</div><div class='add'>+					groups = "ca_coex_grp";</div><div class='add'>+					function = "ca_coex";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_curator_lpc_pmx: ca_curator_lpc@0 {</div><div class='add'>+				ca_curator_lpc {</div><div class='add'>+					groups = "ca_curator_lpc_grp";</div><div class='add'>+					function = "ca_curator_lpc";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_pcm_debug_pmx: ca_pcm_debug@0 {</div><div class='add'>+				ca_pcm_debug {</div><div class='add'>+					groups = "ca_pcm_debug_grp";</div><div class='add'>+					function = "ca_pcm_debug";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_pio_pmx: ca_pio@0 {</div><div class='add'>+				ca_pio {</div><div class='add'>+					groups = "ca_pio_grp";</div><div class='add'>+					function = "ca_pio";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_sdio_debug_pmx: ca_sdio_debug@0 {</div><div class='add'>+				ca_sdio_debug {</div><div class='add'>+					groups = "ca_sdio_debug_grp";</div><div class='add'>+					function = "ca_sdio_debug";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_spi_pmx: ca_spi@0 {</div><div class='add'>+				ca_spi {</div><div class='add'>+					groups = "ca_spi_grp";</div><div class='add'>+					function = "ca_spi";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_trb_pmx: ca_trb@0 {</div><div class='add'>+				ca_trb {</div><div class='add'>+					groups = "ca_trb_grp";</div><div class='add'>+					function = "ca_trb";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ca_uart_debug_pmx: ca_uart_debug@0 {</div><div class='add'>+				ca_uart_debug {</div><div class='add'>+					groups = "ca_uart_debug_grp";</div><div class='add'>+					function = "ca_uart_debug";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clkc_pmx0: clkc@0 {</div><div class='add'>+				clkc_0 {</div><div class='add'>+					groups = "clkc_grp0";</div><div class='add'>+					function = "clkc_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clkc_pmx1: clkc@1 {</div><div class='add'>+				clkc_1 {</div><div class='add'>+					groups = "clkc_grp1";</div><div class='add'>+					function = "clkc_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_i2c_pmx: gn_gnss_i2c@0 {</div><div class='add'>+				gn_gnss_i2c {</div><div class='add'>+					groups = "gn_gnss_i2c_grp";</div><div class='add'>+					function = "gn_gnss_i2c";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_uart_nopause_pmx: gn_gnss_uart_nopause@0 {</div><div class='add'>+				gn_gnss_uart_nopause {</div><div class='add'>+					groups = "gn_gnss_uart_nopause_grp";</div><div class='add'>+					function = "gn_gnss_uart_nopause";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_uart_pmx: gn_gnss_uart@0 {</div><div class='add'>+				gn_gnss_uart {</div><div class='add'>+					groups = "gn_gnss_uart_grp";</div><div class='add'>+					function = "gn_gnss_uart";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_spi_pmx0: gn_trg_spi@0 {</div><div class='add'>+				gn_trg_spi_0 {</div><div class='add'>+					groups = "gn_trg_spi_grp0";</div><div class='add'>+					function = "gn_trg_spi_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_spi_pmx1: gn_trg_spi@1 {</div><div class='add'>+				gn_trg_spi_1 {</div><div class='add'>+					groups = "gn_trg_spi_grp1";</div><div class='add'>+					function = "gn_trg_spi_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_pmx: cvbs_dbg@0 {</div><div class='add'>+				cvbs_dbg {</div><div class='add'>+					groups = "cvbs_dbg_grp";</div><div class='add'>+					function = "cvbs_dbg";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx0: cvbs_dbg_test@0 {</div><div class='add'>+				cvbs_dbg_test_0 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp0";</div><div class='add'>+					function = "cvbs_dbg_test_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx1: cvbs_dbg_test@1 {</div><div class='add'>+				cvbs_dbg_test_1 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp1";</div><div class='add'>+					function = "cvbs_dbg_test_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx2: cvbs_dbg_test@2 {</div><div class='add'>+				cvbs_dbg_test_2 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp2";</div><div class='add'>+					function = "cvbs_dbg_test_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx3: cvbs_dbg_test@3 {</div><div class='add'>+				cvbs_dbg_test_3 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp3";</div><div class='add'>+					function = "cvbs_dbg_test_m3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx4: cvbs_dbg_test@4 {</div><div class='add'>+				cvbs_dbg_test_4 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp4";</div><div class='add'>+					function = "cvbs_dbg_test_m4";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx5: cvbs_dbg_test@5 {</div><div class='add'>+				cvbs_dbg_test_5 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp5";</div><div class='add'>+					function = "cvbs_dbg_test_m5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx6: cvbs_dbg_test@6 {</div><div class='add'>+				cvbs_dbg_test_6 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp6";</div><div class='add'>+					function = "cvbs_dbg_test_m6";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx7: cvbs_dbg_test@7 {</div><div class='add'>+				cvbs_dbg_test_7 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp7";</div><div class='add'>+					function = "cvbs_dbg_test_m7";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx8: cvbs_dbg_test@8 {</div><div class='add'>+				cvbs_dbg_test_8 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp8";</div><div class='add'>+					function = "cvbs_dbg_test_m8";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx9: cvbs_dbg_test@9 {</div><div class='add'>+				cvbs_dbg_test_9 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp9";</div><div class='add'>+					function = "cvbs_dbg_test_m9";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx10: cvbs_dbg_test@10 {</div><div class='add'>+				cvbs_dbg_test_10 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp10";</div><div class='add'>+					function = "cvbs_dbg_test_m10";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx11: cvbs_dbg_test@11 {</div><div class='add'>+				cvbs_dbg_test_11 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp11";</div><div class='add'>+					function = "cvbs_dbg_test_m11";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx12: cvbs_dbg_test@12 {</div><div class='add'>+				cvbs_dbg_test_12 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp12";</div><div class='add'>+					function = "cvbs_dbg_test_m12";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx13: cvbs_dbg_test@13 {</div><div class='add'>+				cvbs_dbg_test_13 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp13";</div><div class='add'>+					function = "cvbs_dbg_test_m13";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx14: cvbs_dbg_test@14 {</div><div class='add'>+				cvbs_dbg_test_14 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp14";</div><div class='add'>+					function = "cvbs_dbg_test_m14";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cvbs_dbg_test_pmx15: cvbs_dbg_test@15 {</div><div class='add'>+				cvbs_dbg_test_15 {</div><div class='add'>+					groups = "cvbs_dbg_test_grp15";</div><div class='add'>+					function = "cvbs_dbg_test_m15";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_power_pmx: gn_gnss_power@0 {</div><div class='add'>+				gn_gnss_power {</div><div class='add'>+					groups = "gn_gnss_power_grp";</div><div class='add'>+					function = "gn_gnss_power";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_sw_status_pmx: gn_gnss_sw_status@0 {</div><div class='add'>+				gn_gnss_sw_status {</div><div class='add'>+					groups = "gn_gnss_sw_status_grp";</div><div class='add'>+					function = "gn_gnss_sw_status";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_eclk_pmx: gn_gnss_eclk@0 {</div><div class='add'>+				gn_gnss_eclk {</div><div class='add'>+					groups = "gn_gnss_eclk_grp";</div><div class='add'>+					function = "gn_gnss_eclk";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_irq1_pmx0: gn_gnss_irq1@0 {</div><div class='add'>+				gn_gnss_irq1_0 {</div><div class='add'>+					groups = "gn_gnss_irq1_grp0";</div><div class='add'>+					function = "gn_gnss_irq1_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_irq2_pmx0: gn_gnss_irq2@0 {</div><div class='add'>+				gn_gnss_irq2_0 {</div><div class='add'>+					groups = "gn_gnss_irq2_grp0";</div><div class='add'>+					function = "gn_gnss_irq2_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_tm_pmx: gn_gnss_tm@0 {</div><div class='add'>+				gn_gnss_tm {</div><div class='add'>+					groups = "gn_gnss_tm_grp";</div><div class='add'>+					function = "gn_gnss_tm";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_gnss_tsync_pmx: gn_gnss_tsync@0 {</div><div class='add'>+				gn_gnss_tsync {</div><div class='add'>+					groups = "gn_gnss_tsync_grp";</div><div class='add'>+					function = "gn_gnss_tsync";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_io_gnsssys_sw_cfg_pmx: gn_io_gnsssys_sw_cfg@0 {</div><div class='add'>+				gn_io_gnsssys_sw_cfg {</div><div class='add'>+					groups = "gn_io_gnsssys_sw_cfg_grp";</div><div class='add'>+					function = "gn_io_gnsssys_sw_cfg";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_pmx0: gn_trg@0 {</div><div class='add'>+				gn_trg_0 {</div><div class='add'>+					groups = "gn_trg_grp0";</div><div class='add'>+					function = "gn_trg_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_pmx1: gn_trg@1 {</div><div class='add'>+				gn_trg_1 {</div><div class='add'>+					groups = "gn_trg_grp1";</div><div class='add'>+					function = "gn_trg_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_shutdown_pmx0: gn_trg_shutdown@0 {</div><div class='add'>+				gn_trg_shutdown_0 {</div><div class='add'>+					groups = "gn_trg_shutdown_grp0";</div><div class='add'>+					function = "gn_trg_shutdown_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_shutdown_pmx1: gn_trg_shutdown@1 {</div><div class='add'>+				gn_trg_shutdown_1 {</div><div class='add'>+					groups = "gn_trg_shutdown_grp1";</div><div class='add'>+					function = "gn_trg_shutdown_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_shutdown_pmx2: gn_trg_shutdown@2 {</div><div class='add'>+				gn_trg_shutdown_2 {</div><div class='add'>+					groups = "gn_trg_shutdown_grp2";</div><div class='add'>+					function = "gn_trg_shutdown_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gn_trg_shutdown_pmx3: gn_trg_shutdown@3 {</div><div class='add'>+				gn_trg_shutdown_3 {</div><div class='add'>+					groups = "gn_trg_shutdown_grp3";</div><div class='add'>+					function = "gn_trg_shutdown_m3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0_pmx: i2c0@0 {</div><div class='add'>+				i2c0 {</div><div class='add'>+					groups = "i2c0_grp";</div><div class='add'>+					function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pmx: i2c1@0 {</div><div class='add'>+				i2c1 {</div><div class='add'>+					groups = "i2c1_grp";</div><div class='add'>+					function = "i2c1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			jtag_pmx0: jtag@0 {</div><div class='add'>+				jtag_0 {</div><div class='add'>+					groups = "jtag_grp0";</div><div class='add'>+					function = "jtag_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ks_kas_spi_pmx0: ks_kas_spi@0 {</div><div class='add'>+				ks_kas_spi_0 {</div><div class='add'>+					groups = "ks_kas_spi_grp0";</div><div class='add'>+					function = "ks_kas_spi_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ld_ldd_pmx: ld_ldd@0 {</div><div class='add'>+				ld_ldd {</div><div class='add'>+					groups = "ld_ldd_grp";</div><div class='add'>+					function = "ld_ldd";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ld_ldd_16bit_pmx: ld_ldd_16bit@0 {</div><div class='add'>+				ld_ldd_16bit {</div><div class='add'>+					groups = "ld_ldd_16bit_grp";</div><div class='add'>+					function = "ld_ldd_16bit";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ld_ldd_fck_pmx: ld_ldd_fck@0 {</div><div class='add'>+				ld_ldd_fck {</div><div class='add'>+					groups = "ld_ldd_fck_grp";</div><div class='add'>+					function = "ld_ldd_fck";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ld_ldd_lck_pmx: ld_ldd_lck@0 {</div><div class='add'>+				ld_ldd_lck {</div><div class='add'>+					groups = "ld_ldd_lck_grp";</div><div class='add'>+					function = "ld_ldd_lck";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lr_lcdrom_pmx: lr_lcdrom@0 {</div><div class='add'>+				lr_lcdrom {</div><div class='add'>+					groups = "lr_lcdrom_grp";</div><div class='add'>+					function = "lr_lcdrom";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lvds_analog_pmx: lvds_analog@0 {</div><div class='add'>+				lvds_analog {</div><div class='add'>+					groups = "lvds_analog_grp";</div><div class='add'>+					function = "lvds_analog";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			nd_df_pmx: nd_df@0 {</div><div class='add'>+				nd_df {</div><div class='add'>+					groups = "nd_df_grp";</div><div class='add'>+					function = "nd_df";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			nd_df_nowp_pmx: nd_df_nowp@0 {</div><div class='add'>+				nd_df_nowp {</div><div class='add'>+					groups = "nd_df_nowp_grp";</div><div class='add'>+					function = "nd_df_nowp";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ps_pmx: ps@0 {</div><div class='add'>+				ps {</div><div class='add'>+					groups = "ps_grp";</div><div class='add'>+					function = "ps";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_core_on_pmx: pwc_core_on@0 {</div><div class='add'>+				pwc_core_on {</div><div class='add'>+					groups = "pwc_core_on_grp";</div><div class='add'>+					function = "pwc_core_on";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_ext_on_pmx: pwc_ext_on@0 {</div><div class='add'>+				pwc_ext_on {</div><div class='add'>+					groups = "pwc_ext_on_grp";</div><div class='add'>+					function = "pwc_ext_on";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_gpio3_clk_pmx: pwc_gpio3_clk@0 {</div><div class='add'>+				pwc_gpio3_clk {</div><div class='add'>+					groups = "pwc_gpio3_clk_grp";</div><div class='add'>+					function = "pwc_gpio3_clk";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_io_on_pmx: pwc_io_on@0 {</div><div class='add'>+				pwc_io_on {</div><div class='add'>+					groups = "pwc_io_on_grp";</div><div class='add'>+					function = "pwc_io_on";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_lowbatt_b_pmx0: pwc_lowbatt_b@0 {</div><div class='add'>+				pwc_lowbatt_b_0 {</div><div class='add'>+					groups = "pwc_lowbatt_b_grp0";</div><div class='add'>+					function = "pwc_lowbatt_b_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_mem_on_pmx: pwc_mem_on@0 {</div><div class='add'>+				pwc_mem_on {</div><div class='add'>+					groups = "pwc_mem_on_grp";</div><div class='add'>+					function = "pwc_mem_on";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_on_key_b_pmx0: pwc_on_key_b@0 {</div><div class='add'>+				pwc_on_key_b_0 {</div><div class='add'>+					groups = "pwc_on_key_b_grp0";</div><div class='add'>+					function = "pwc_on_key_b_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_wakeup_src0_pmx: pwc_wakeup_src0@0 {</div><div class='add'>+				pwc_wakeup_src0 {</div><div class='add'>+					groups = "pwc_wakeup_src0_grp";</div><div class='add'>+					function = "pwc_wakeup_src0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_wakeup_src1_pmx: pwc_wakeup_src1@0 {</div><div class='add'>+				pwc_wakeup_src1 {</div><div class='add'>+					groups = "pwc_wakeup_src1_grp";</div><div class='add'>+					function = "pwc_wakeup_src1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_wakeup_src2_pmx: pwc_wakeup_src2@0 {</div><div class='add'>+				pwc_wakeup_src2 {</div><div class='add'>+					groups = "pwc_wakeup_src2_grp";</div><div class='add'>+					function = "pwc_wakeup_src2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwc_wakeup_src3_pmx: pwc_wakeup_src3@0 {</div><div class='add'>+				pwc_wakeup_src3 {</div><div class='add'>+					groups = "pwc_wakeup_src3_grp";</div><div class='add'>+					function = "pwc_wakeup_src3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_cko0_pmx0: pw_cko0@0 {</div><div class='add'>+				pw_cko0_0 {</div><div class='add'>+					groups = "pw_cko0_grp0";</div><div class='add'>+					function = "pw_cko0_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_cko0_pmx1: pw_cko0@1 {</div><div class='add'>+				pw_cko0_1 {</div><div class='add'>+					groups = "pw_cko0_grp1";</div><div class='add'>+					function = "pw_cko0_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_cko0_pmx2: pw_cko0@2 {</div><div class='add'>+				pw_cko0_2 {</div><div class='add'>+					groups = "pw_cko0_grp2";</div><div class='add'>+					function = "pw_cko0_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_cko1_pmx0: pw_cko1@0 {</div><div class='add'>+				pw_cko1_0 {</div><div class='add'>+					groups = "pw_cko1_grp0";</div><div class='add'>+					function = "pw_cko1_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_cko1_pmx1: pw_cko1@1 {</div><div class='add'>+				pw_cko1_1 {</div><div class='add'>+					groups = "pw_cko1_grp1";</div><div class='add'>+					function = "pw_cko1_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_i2s01_clk_pmx0: pw_i2s01_clk@0 {</div><div class='add'>+				pw_i2s01_clk_0 {</div><div class='add'>+					groups = "pw_i2s01_clk_grp0";</div><div class='add'>+					function = "pw_i2s01_clk_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_i2s01_clk_pmx1: pw_i2s01_clk@1 {</div><div class='add'>+				pw_i2s01_clk_1 {</div><div class='add'>+					groups = "pw_i2s01_clk_grp1";</div><div class='add'>+					function = "pw_i2s01_clk_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm0_pmx: pw_pwm0@0 {</div><div class='add'>+				pw_pwm0 {</div><div class='add'>+					groups = "pw_pwm0_grp";</div><div class='add'>+					function = "pw_pwm0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm1_pmx: pw_pwm1@0 {</div><div class='add'>+				pw_pwm1 {</div><div class='add'>+					groups = "pw_pwm1_grp";</div><div class='add'>+					function = "pw_pwm1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm2_pmx0: pw_pwm2@0 {</div><div class='add'>+				pw_pwm2_0 {</div><div class='add'>+					groups = "pw_pwm2_grp0";</div><div class='add'>+					function = "pw_pwm2_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm2_pmx1: pw_pwm2@1 {</div><div class='add'>+				pw_pwm2_1 {</div><div class='add'>+					groups = "pw_pwm2_grp1";</div><div class='add'>+					function = "pw_pwm2_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm3_pmx0: pw_pwm3@0 {</div><div class='add'>+				pw_pwm3_0 {</div><div class='add'>+					groups = "pw_pwm3_grp0";</div><div class='add'>+					function = "pw_pwm3_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm3_pmx1: pw_pwm3@1 {</div><div class='add'>+				pw_pwm3_1 {</div><div class='add'>+					groups = "pw_pwm3_grp1";</div><div class='add'>+					function = "pw_pwm3_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm_cpu_vol_pmx0: pw_pwm_cpu_vol@0 {</div><div class='add'>+				pw_pwm_cpu_vol_0 {</div><div class='add'>+					groups = "pw_pwm_cpu_vol_grp0";</div><div class='add'>+					function = "pw_pwm_cpu_vol_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_pwm_cpu_vol_pmx1: pw_pwm_cpu_vol@1 {</div><div class='add'>+				pw_pwm_cpu_vol_1 {</div><div class='add'>+					groups = "pw_pwm_cpu_vol_grp1";</div><div class='add'>+					function = "pw_pwm_cpu_vol_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_backlight_pmx0: pw_backlight@0 {</div><div class='add'>+				pw_backlight_0 {</div><div class='add'>+					groups = "pw_backlight_grp0";</div><div class='add'>+					function = "pw_backlight_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pw_backlight_pmx1: pw_backlight@1 {</div><div class='add'>+				pw_backlight_1 {</div><div class='add'>+					groups = "pw_backlight_grp1";</div><div class='add'>+					function = "pw_backlight_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rg_eth_mac_pmx: rg_eth_mac@0 {</div><div class='add'>+				rg_eth_mac {</div><div class='add'>+					groups = "rg_eth_mac_grp";</div><div class='add'>+					function = "rg_eth_mac";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rg_gmac_phy_intr_n_pmx: rg_gmac_phy_intr_n@0 {</div><div class='add'>+				rg_gmac_phy_intr_n {</div><div class='add'>+					groups = "rg_gmac_phy_intr_n_grp";</div><div class='add'>+					function = "rg_gmac_phy_intr_n";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rg_rgmii_mac_pmx: rg_rgmii_mac@0 {</div><div class='add'>+				rg_rgmii_mac {</div><div class='add'>+					groups = "rg_rgmii_mac_grp";</div><div class='add'>+					function = "rg_rgmii_mac";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rg_rgmii_phy_ref_clk_pmx0: rg_rgmii_phy_ref_clk@0 {</div><div class='add'>+				rg_rgmii_phy_ref_clk_0 {</div><div class='add'>+					groups =</div><div class='add'>+						"rg_rgmii_phy_ref_clk_grp0";</div><div class='add'>+					function =</div><div class='add'>+						"rg_rgmii_phy_ref_clk_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rg_rgmii_phy_ref_clk_pmx1: rg_rgmii_phy_ref_clk@1 {</div><div class='add'>+				rg_rgmii_phy_ref_clk_1 {</div><div class='add'>+					groups =</div><div class='add'>+						"rg_rgmii_phy_ref_clk_grp1";</div><div class='add'>+					function =</div><div class='add'>+						"rg_rgmii_phy_ref_clk_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd0_pmx: sd0@0 {</div><div class='add'>+				sd0 {</div><div class='add'>+					groups = "sd0_grp";</div><div class='add'>+					function = "sd0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd0_4bit_pmx: sd0_4bit@0 {</div><div class='add'>+				sd0_4bit {</div><div class='add'>+					groups = "sd0_4bit_grp";</div><div class='add'>+					function = "sd0_4bit";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd1_pmx: sd1@0 {</div><div class='add'>+				sd1 {</div><div class='add'>+					groups = "sd1_grp";</div><div class='add'>+					function = "sd1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd1_4bit_pmx0: sd1_4bit@0 {</div><div class='add'>+				sd1_4bit_0 {</div><div class='add'>+					groups = "sd1_4bit_grp0";</div><div class='add'>+					function = "sd1_4bit_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd1_4bit_pmx1: sd1_4bit@1 {</div><div class='add'>+				sd1_4bit_1 {</div><div class='add'>+					groups = "sd1_4bit_grp1";</div><div class='add'>+					function = "sd1_4bit_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd2_pmx0: sd2@0 {</div><div class='add'>+				sd2_0 {</div><div class='add'>+					groups = "sd2_grp0";</div><div class='add'>+					function = "sd2_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd2_no_cdb_pmx0: sd2_no_cdb@0 {</div><div class='add'>+				sd2_no_cdb_0 {</div><div class='add'>+					groups = "sd2_no_cdb_grp0";</div><div class='add'>+					function = "sd2_no_cdb_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd3_pmx: sd3@0 {</div><div class='add'>+				sd3 {</div><div class='add'>+					groups = "sd3_grp";</div><div class='add'>+					function = "sd3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd5_pmx: sd5@0 {</div><div class='add'>+				sd5 {</div><div class='add'>+					groups = "sd5_grp";</div><div class='add'>+					function = "sd5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd6_pmx0: sd6@0 {</div><div class='add'>+				sd6_0 {</div><div class='add'>+					groups = "sd6_grp0";</div><div class='add'>+					function = "sd6_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd6_pmx1: sd6@1 {</div><div class='add'>+				sd6_1 {</div><div class='add'>+					groups = "sd6_grp1";</div><div class='add'>+					function = "sd6_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sp0_ext_ldo_on_pmx: sp0_ext_ldo_on@0 {</div><div class='add'>+				sp0_ext_ldo_on {</div><div class='add'>+					groups = "sp0_ext_ldo_on_grp";</div><div class='add'>+					function = "sp0_ext_ldo_on";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sp0_qspi_pmx: sp0_qspi@0 {</div><div class='add'>+				sp0_qspi {</div><div class='add'>+					groups = "sp0_qspi_grp";</div><div class='add'>+					function = "sp0_qspi";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sp1_spi_pmx: sp1_spi@0 {</div><div class='add'>+				sp1_spi {</div><div class='add'>+					groups = "sp1_spi_grp";</div><div class='add'>+					function = "sp1_spi";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpiu_trace_pmx: tpiu_trace@0 {</div><div class='add'>+				tpiu_trace {</div><div class='add'>+					groups = "tpiu_trace_grp";</div><div class='add'>+					function = "tpiu_trace";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0_pmx: uart0@0 {</div><div class='add'>+				uart0 {</div><div class='add'>+					groups = "uart0_grp";</div><div class='add'>+					function = "uart0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0_nopause_pmx: uart0_nopause@0 {</div><div class='add'>+				uart0_nopause {</div><div class='add'>+					groups = "uart0_nopause_grp";</div><div class='add'>+					function = "uart0_nopause";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1_pmx: uart1@0 {</div><div class='add'>+				uart1 {</div><div class='add'>+					groups = "uart1_grp";</div><div class='add'>+					function = "uart1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2_pmx: uart2@0 {</div><div class='add'>+				uart2 {</div><div class='add'>+					groups = "uart2_grp";</div><div class='add'>+					function = "uart2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_pmx0: uart3@0 {</div><div class='add'>+				uart3_0 {</div><div class='add'>+					groups = "uart3_grp0";</div><div class='add'>+					function = "uart3_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_pmx1: uart3@1 {</div><div class='add'>+				uart3_1 {</div><div class='add'>+					groups = "uart3_grp1";</div><div class='add'>+					function = "uart3_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_pmx2: uart3@2 {</div><div class='add'>+				uart3_2 {</div><div class='add'>+					groups = "uart3_grp2";</div><div class='add'>+					function = "uart3_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_pmx3: uart3@3 {</div><div class='add'>+				uart3_3 {</div><div class='add'>+					groups = "uart3_grp3";</div><div class='add'>+					function = "uart3_m3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_nopause_pmx0: uart3_nopause@0 {</div><div class='add'>+				uart3_nopause_0 {</div><div class='add'>+					groups = "uart3_nopause_grp0";</div><div class='add'>+					function = "uart3_nopause_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3_nopause_pmx1: uart3_nopause@1 {</div><div class='add'>+				uart3_nopause_1 {</div><div class='add'>+					groups = "uart3_nopause_grp1";</div><div class='add'>+					function = "uart3_nopause_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4_pmx0: uart4@0 {</div><div class='add'>+				uart4_0 {</div><div class='add'>+					groups = "uart4_grp0";</div><div class='add'>+					function = "uart4_m0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4_pmx1: uart4@1 {</div><div class='add'>+				uart4_1 {</div><div class='add'>+					groups = "uart4_grp1";</div><div class='add'>+					function = "uart4_m1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4_pmx2: uart4@2 {</div><div class='add'>+				uart4_2 {</div><div class='add'>+					groups = "uart4_grp2";</div><div class='add'>+					function = "uart4_m2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4_nopause_pmx: uart4_nopause@0 {</div><div class='add'>+				uart4_nopause {</div><div class='add'>+					groups = "uart4_nopause_grp";</div><div class='add'>+					function = "uart4_nopause";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb0_drvvbus_pmx: usb0_drvvbus@0 {</div><div class='add'>+				usb0_drvvbus {</div><div class='add'>+					groups = "usb0_drvvbus_grp";</div><div class='add'>+					function = "usb0_drvvbus";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1_drvvbus_pmx: usb1_drvvbus@0 {</div><div class='add'>+				usb1_drvvbus {</div><div class='add'>+					groups = "usb1_drvvbus_grp";</div><div class='add'>+					function = "usb1_drvvbus";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			visbus_dout_pmx: visbus_dout@0 {</div><div class='add'>+				visbus_dout {</div><div class='add'>+					groups = "visbus_dout_grp";</div><div class='add'>+					function = "visbus_dout";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi_vip1_pmx: vi_vip1@0 {</div><div class='add'>+				vi_vip1 {</div><div class='add'>+					groups = "vi_vip1_grp";</div><div class='add'>+					function = "vi_vip1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi_vip1_ext_pmx: vi_vip1_ext@0 {</div><div class='add'>+				vi_vip1_ext {</div><div class='add'>+					groups = "vi_vip1_ext_grp";</div><div class='add'>+					function = "vi_vip1_ext";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi_vip1_low8bit_pmx: vi_vip1_low8bit@0 {</div><div class='add'>+				vi_vip1_low8bit {</div><div class='add'>+					groups = "vi_vip1_low8bit_grp";</div><div class='add'>+					function = "vi_vip1_low8bit";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi_vip1_high8bit_pmx: vi_vip1_high8bit@0 {</div><div class='add'>+				vi_vip1_high8bit {</div><div class='add'>+					groups = "vi_vip1_high8bit_grp";</div><div class='add'>+					function = "vi_vip1_high8bit";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pmipc {</div><div class='hunk'>@@ -341,6 +1375,12 @@</div><div class='ctx'> 				clock-names = "gpio0_io";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				interrupt-controller;</div><div class='add'>+</div><div class='add'>+				gpio-banks = &lt;2&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;pinctrl 0 0 0&gt;,</div><div class='add'>+						&lt;&amp;pinctrl 32 0 0&gt;;</div><div class='add'>+				gpio-ranges-group-names = "lvds_gpio_grp",</div><div class='add'>+							"uart_nand_gpio_grp";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			nand@17050000 {</div><div class='hunk'>@@ -446,11 +1486,22 @@</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				compatible = "sirf,atlas7-gpio";</div><div class='ctx'> 				reg = &lt;0x13300000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;0 43 0&gt;, &lt;0 44 0&gt;, &lt;0 45 0&gt;;</div><div class='add'>+				interrupts = &lt;0 43 0&gt;, &lt;0 44 0&gt;,</div><div class='add'>+						&lt;0 45 0&gt;, &lt;0 46 0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;car 84&gt;;</div><div class='ctx'> 				clock-names = "gpio1_io";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				interrupt-controller;</div><div class='add'>+</div><div class='add'>+				gpio-banks = &lt;4&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;pinctrl 0 0 0&gt;,</div><div class='add'>+						&lt;&amp;pinctrl 32 0 0&gt;,</div><div class='add'>+						&lt;&amp;pinctrl 64 0 0&gt;,</div><div class='add'>+						&lt;&amp;pinctrl 96 0 0&gt;;</div><div class='add'>+				gpio-ranges-group-names = "gnss_gpio_grp",</div><div class='add'>+							"lcd_vip_gpio_grp",</div><div class='add'>+							"sdio_i2s_gpio_grp",</div><div class='add'>+							"sp_rgmii_gpio_grp";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sd2: sdhci@14200000 {</div><div class='hunk'>@@ -729,6 +1780,10 @@</div><div class='ctx'> 				interrupts = &lt;0 47 0&gt;;</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				interrupt-controller;</div><div class='add'>+</div><div class='add'>+				gpio-banks = &lt;1&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;pinctrl 0 0 0&gt;;</div><div class='add'>+				gpio-ranges-group-names = "rtc_gpio_grp";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			rtc-iobg@18840000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi<br/>index c20cf537f5a5..24c935c72e5e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/axp209.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/axp209.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/axp209.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/axp209.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi<br/>index 7b52c33ea69a..e1ac07a16f92 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm-cygnus.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm-cygnus.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm-cygnus.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm-cygnus.dtsi</a></div><div class='hunk'>@@ -212,6 +212,18 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	nand: nand@18046000 {</div><div class='add'>+		compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";</div><div class='add'>+		reg = &lt;0x18046000 0x600&gt;, &lt;0xf8105408 0x600&gt;, &lt;0x18046f00 0x20&gt;;</div><div class='add'>+		reg-names = "nand", "iproc-idm", "iproc-ext";</div><div class='add'>+		interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		brcm,nand-has-wp;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gic: interrupt-controller@19021000 {</div><div class='ctx'> 		compatible = "arm,cortex-a9-gic";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts<br/>index e479515099c3..668442b1bda5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm2835-rpi-b-plus.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi-b-plus.dts</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /dts-v1/;</div><div class='del'>-/include/ "bcm2835-rpi.dtsi"</div><div class='add'>+#include "bcm2835-rpi.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";</div><div class='hunk'>@@ -25,6 +25,6 @@</div><div class='ctx'> 	/* I2S interface */</div><div class='ctx'> 	i2s_alt0: i2s_alt0 {</div><div class='ctx'> 		brcm,pins = &lt;18 19 20 21&gt;;</div><div class='del'>-		brcm,function = &lt;4&gt;; /* alt0 */</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_ALT0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts<br/>index bafa46fc226a..ee89b79426cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi-b.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm2835-rpi-b.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi-b.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi-b.dts</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /dts-v1/;</div><div class='del'>-/include/ "bcm2835-rpi.dtsi"</div><div class='add'>+#include "bcm2835-rpi.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "raspberrypi,model-b", "brcm,bcm2835";</div><div class='hunk'>@@ -18,6 +18,6 @@</div><div class='ctx'> 	/* I2S interface */</div><div class='ctx'> 	i2s_alt2: i2s_alt2 {</div><div class='ctx'> 		brcm,pins = &lt;28 29 30 31&gt;;</div><div class='del'>-		brcm,function = &lt;6&gt;; /* alt2 */</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_ALT2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi<br/>index c7064487017d..46780bb48bbf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm2835-rpi.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835-rpi.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835-rpi.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-/include/ "bcm2835.dtsi"</div><div class='add'>+#include "bcm2835.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -21,17 +21,17 @@</div><div class='ctx'> </div><div class='ctx'> 	gpioout: gpioout {</div><div class='ctx'> 		brcm,pins = &lt;6&gt;;</div><div class='del'>-		brcm,function = &lt;1&gt;; /* GPIO out */</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_GPIO_OUT&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	alt0: alt0 {</div><div class='ctx'> 		brcm,pins = &lt;0 1 2 3 4 5 7 8 9 10 11 14 15 40 45&gt;;</div><div class='del'>-		brcm,function = &lt;4&gt;; /* alt0 */</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_ALT0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	alt3: alt3 {</div><div class='ctx'> 		brcm,pins = &lt;48 49 50 51 52 53&gt;;</div><div class='del'>-		brcm,function = &lt;7&gt;; /* alt3 */</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_ALT3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi<br/>index 3342cb1407bc..301c73f4ca33 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm2835.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm2835.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm2835.dtsi</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='del'>-/include/ "skeleton.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pinctrl/bcm2835.h&gt;</div><div class='add'>+#include "skeleton.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "brcm,bcm2835";</div><div class='hunk'>@@ -14,6 +15,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x7e000000 0x20000000 0x02000000&gt;;</div><div class='add'>+		dma-ranges = &lt;0x40000000 0x00000000 0x20000000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		timer@7e003000 {</div><div class='ctx'> 			compatible = "brcm,bcm2835-system-timer";</div><div class='hunk'>@@ -60,6 +62,13 @@</div><div class='ctx'> 			reg = &lt;0x7e104000 0x10&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mailbox: mailbox@7e00b800 {</div><div class='add'>+			compatible = "brcm,bcm2835-mbox";</div><div class='add'>+			reg = &lt;0x7e00b880 0x40&gt;;</div><div class='add'>+			interrupts = &lt;0 1&gt;;</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpio: gpio@7e200000 {</div><div class='ctx'> 			compatible = "brcm,bcm2835-gpio";</div><div class='ctx'> 			reg = &lt;0x7e200000 0xb4&gt;;</div><div class='hunk'>@@ -112,7 +121,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@20205000 {</div><div class='add'>+		i2c0: i2c@7e205000 {</div><div class='ctx'> 			compatible = "brcm,bcm2835-i2c";</div><div class='ctx'> 			reg = &lt;0x7e205000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;2 21&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts<br/>new file mode 100644<br/>index 000000000000..112a5a834ddc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X ARM platform code.</div><div class='add'>+ * DTS for Asus RT-AC56U</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "asus,rt-ac56u", "brcm,bcm4708";</div><div class='add'>+	model = "Asus RT-AC56U (BCM4708)";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		usb3 {</div><div class='add'>+			label = "bcm53xx:blue:usb3";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan {</div><div class='add'>+			label = "bcm53xx:blue:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan {</div><div class='add'>+			label = "bcm53xx:blue:lan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			label = "bcm53xx:blue:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		all {</div><div class='add'>+			label = "bcm53xx:blue:all";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		2ghz {</div><div class='add'>+			label = "bcm53xx:blue:2ghz";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		usb2 {</div><div class='add'>+			label = "bcm53xx:blue:usb2";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rfkill {</div><div class='add'>+			label = "WiFi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts<br/>new file mode 100644<br/>index 000000000000..3600f56f46f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X ARM platform code.</div><div class='add'>+ * DTS for Asus RT-AC68U</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "asus,rt-ac68u", "brcm,bcm4708";</div><div class='add'>+	model = "Asus RT-AC68U (BCM4708)";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		usb2 {</div><div class='add'>+			label = "bcm53xx:blue:usb2";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			label = "bcm53xx:blue:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		logo {</div><div class='add'>+			label = "bcm53xx:white:logo";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3 {</div><div class='add'>+			label = "bcm53xx:blue:usb3";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		brightness {</div><div class='add'>+			label = "Backlight";</div><div class='add'>+			linux,code = &lt;KEY_BRIGHTNESS_ZERO&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rfkill {</div><div class='add'>+			label = "WiFi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts<br/>index b359c1e6178e..24f0ab59bf1b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";</div><div class='hunk'>@@ -47,6 +48,12 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='add'>+		usb {</div><div class='add'>+			label = "bcm53xx:blue:usb";</div><div class='add'>+			gpios = &lt;&amp;hc595 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		power0 {</div><div class='ctx'> 			label = "bcm53xx:red:power";</div><div class='ctx'> 			gpios = &lt;&amp;hc595 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts<br/>index 946c728c4eb7..f03939311717 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "luxul,xwc-1000", "brcm,bcm4708";</div><div class='hunk'>@@ -23,12 +24,8 @@</div><div class='ctx'> 		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	axi@18000000 {</div><div class='del'>-		nand@28000 {</div><div class='del'>-			reg = &lt;0x00028000 0x1000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='add'>+	nand: nand@18028000 {</div><div class='add'>+		nandcs@0 {</div><div class='ctx'> 			partition@0 {</div><div class='ctx'> 				label = "ubi";</div><div class='ctx'> 				reg = &lt;0x00000000 0x08000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts<br/>index 2ed9e5794785..326ce8f4e49c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-netgear-r6250.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm4708-netgear-r6250.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-netgear-r6250.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-netgear-r6250.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "netgear,r6250v1", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts<br/>index 39910428246a..3a94606d042b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "netgear,r6300v2", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts<br/>new file mode 100644<br/>index 000000000000..d6a033b97c70<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X arm platform code.</div><div class='add'>+ * DTS for SmartRG SR400ac</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "smartrg,sr400ac", "brcm,bcm4708";</div><div class='add'>+	model = "SmartRG SR400ac";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		power-white {</div><div class='add'>+			label = "bcm53xx:white:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power-amber {</div><div class='add'>+			label = "bcm53xx:amber:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2 {</div><div class='add'>+			label = "bcm53xx:white:usb2";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3-white {</div><div class='add'>+			label = "bcm53xx:white:usb3";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3-green {</div><div class='add'>+			label = "bcm53xx:green:usb3";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "bcm53xx:white:wps";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		status-red {</div><div class='add'>+			label = "bcm53xx:red:status";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		status-green {</div><div class='add'>+			label = "bcm53xx:green:status";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		status-blue {</div><div class='add'>+			label = "bcm53xx:blue:status";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan-white {</div><div class='add'>+			label = "bcm53xx:white:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan-red {</div><div class='add'>+			label = "bcm53xx:red:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rfkill {</div><div class='add'>+			label = "WiFi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts<br/>index 0ee85ea10bb2..71b98cfaf944 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm47081.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "asus,rt-n18u", "brcm,bcm47081", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts<br/>index db9131e03268..bb0cb0bfafaf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm47081.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts<br/>index 7d6868acb1c6..184fd9214110 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm47081.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts<br/>new file mode 100644<br/>index 000000000000..aedf3c426e1f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X ARM platform code.</div><div class='add'>+ * DTS for Asus RT-AC87U</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708";</div><div class='add'>+	model = "Asus RT-AC87U";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "bcm53xx:blue:wps";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			label = "bcm53xx:blue:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan {</div><div class='add'>+			label = "bcm53xx:red:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts<br/>new file mode 100644<br/>index 000000000000..2a92e8d5ab34<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X ARM platform code.</div><div class='add'>+ * DTS for Buffalo WXR-1900DHP</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Felix Fietkau &lt;nbd@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "buffalo,wxr-1900dhp", "brcm,bcm4709", "brcm,bcm4708";</div><div class='add'>+	model = "Buffalo WXR-1900DHP";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		usb {</div><div class='add'>+			label = "bcm53xx:green:usb";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power-amber {</div><div class='add'>+			label = "bcm53xx:amber:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power-white {</div><div class='add'>+			label = "bcm53xx:white:power";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		router-amber {</div><div class='add'>+			label = "bcm53xx:amber:router";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		router-white {</div><div class='add'>+			label = "bcm53xx:white:router";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan-amber {</div><div class='add'>+			label = "bcm53xx:amber:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan-white {</div><div class='add'>+			label = "bcm53xx:white:wan";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wireless-amber {</div><div class='add'>+			label = "bcm53xx:amber:wireless";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wireless-white {</div><div class='add'>+			label = "bcm53xx:white:wireless";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss {</div><div class='add'>+			label = "AOSS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Commit mode set by switch? */</div><div class='add'>+		mode {</div><div class='add'>+			label = "Mode";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Switch: AP mode */</div><div class='add'>+		sw_ap {</div><div class='add'>+			label = "AP";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eject {</div><div class='add'>+			label = "USB eject";</div><div class='add'>+			linux,code = &lt;KEY_EJECTCD&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts<br/>index ea26dd3ec03a..446c586cd473 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4709-netgear-r8000.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm4709-netgear-r8000.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm4709-netgear-r8000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm4709-netgear-r8000.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "netgear,r8000", "brcm,bcm4709", "brcm,bcm4708";</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi<br/>new file mode 100644<br/>index 000000000000..d10781e36f54<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM470X / BCM5301X Nand chip defaults.</div><div class='add'>+ *</div><div class='add'>+ * This should be included if the NAND controller is on chip select 0</div><div class='add'>+ * and uses 8 bit ECC.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GNU/GPL. See COPYING for details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	nand@18028000 {</div><div class='add'>+		nandcs@0 {</div><div class='add'>+			compatible = "brcm,nandcs";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			nand-ecc-strength = &lt;8&gt;;</div><div class='add'>+			nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi<br/>index 78aec6270c2f..21fefd4cdc25 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm5301x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm5301x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm5301x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm5301x.dtsi</a></div><div class='hunk'>@@ -108,6 +108,30 @@</div><div class='ctx'> 			/* ChipCommon */</div><div class='ctx'> 			&lt;0x00000000 0 &amp;gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> </div><div class='add'>+			/* PCIe Controller 0 */</div><div class='add'>+			&lt;0x00012000 0 &amp;gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00012000 1 &amp;gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00012000 2 &amp;gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00012000 3 &amp;gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00012000 4 &amp;gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00012000 5 &amp;gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+</div><div class='add'>+			/* PCIe Controller 1 */</div><div class='add'>+			&lt;0x00013000 0 &amp;gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00013000 1 &amp;gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00013000 2 &amp;gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00013000 3 &amp;gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00013000 4 &amp;gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00013000 5 &amp;gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+</div><div class='add'>+			/* PCIe Controller 2 */</div><div class='add'>+			&lt;0x00014000 0 &amp;gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00014000 1 &amp;gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00014000 2 &amp;gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00014000 3 &amp;gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00014000 4 &amp;gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;0x00014000 5 &amp;gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+</div><div class='ctx'> 			/* USB 2.0 Controller */</div><div class='ctx'> 			&lt;0x00021000 0 &amp;gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> </div><div class='hunk'>@@ -143,4 +167,16 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	nand: nand@18028000 {</div><div class='add'>+		compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";</div><div class='add'>+		reg = &lt;0x18028000 0x600&gt;, &lt;0x1811a408 0x600&gt;, &lt;0x18028f00 0x20&gt;;</div><div class='add'>+		reg-names = "nand", "iproc-idm", "iproc-ext";</div><div class='add'>+		interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		brcm,nand-has-wp;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi<br/>index f46329c8ad75..34cd64051250 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm63138.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm63138.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm63138.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm63138.dtsi</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			enable-method = "brcm,bcm63138";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -33,6 +34,8 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+			enable-method = "brcm,bcm63138";</div><div class='add'>+			resets = &lt;&amp;pmb0 4 1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -105,6 +108,18 @@</div><div class='ctx'> 			reg = &lt;0x1e620 0x20&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pmb0: reset-controller@4800c0 {</div><div class='add'>+			compatible = "brcm,bcm63138-pmb";</div><div class='add'>+			reg = &lt;0x4800c0 0x10&gt;;</div><div class='add'>+			#reset-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmb1: reset-controller@4800e0 {</div><div class='add'>+			compatible = "brcm,bcm63138-pmb";</div><div class='add'>+			reg = &lt;0x4800e0 0x10&gt;;</div><div class='add'>+			#reset-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Legacy UBUS base */</div><div class='hunk'>@@ -114,6 +129,11 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xfffe8000 0x8100&gt;;</div><div class='ctx'> </div><div class='add'>+		timer: timer@80 {</div><div class='add'>+			compatible = "brcm,bcm6328-timer", "syscon";</div><div class='add'>+			reg = &lt;0x80 0x3c&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial0: serial@600 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='ctx'> 			reg = &lt;0x600 0x1b&gt;;</div><div class='hunk'>@@ -131,5 +151,28 @@</div><div class='ctx'> 			clock-names = "periph";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		nand: nand@2000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";</div><div class='add'>+			reg = &lt;0x2000 0x600&gt;, &lt;0xf0 0x10&gt;;</div><div class='add'>+			reg-names = "nand", "nand-int-base";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;GIC_SPI 38 0&gt;;</div><div class='add'>+			interrupt-names = "nand";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bootlut: bootlut@8000 {</div><div class='add'>+			compatible = "brcm,bcm63138-bootlut";</div><div class='add'>+			reg = &lt;0x8000 0x50&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reboot {</div><div class='add'>+			compatible = "syscon-reboot";</div><div class='add'>+			regmap = &lt;&amp;timer&gt;;</div><div class='add'>+			offset = &lt;0x34&gt;;</div><div class='add'>+			mask = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts<br/>index 9eec2ac1112f..0bb8d17e4c2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm7445-bcm97445svmb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm7445-bcm97445svmb.dts</a></div><div class='hunk'>@@ -12,3 +12,26 @@</div><div class='ctx'> 		      &lt;0x00 0x80000000 0x00 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nandcs@1 {</div><div class='add'>+		compatible = "brcm,nandcs";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+		nand-ecc-strength = &lt;8&gt;;</div><div class='add'>+		nand-on-flash-bbt;</div><div class='add'>+</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		flash1.rootfs0@0 {</div><div class='add'>+			reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flash1.rootfs1@80000000 {</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi<br/>index 39ac7840d7ee..58dcd666257c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm7445.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm7445.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm7445.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm7445.dtsi</a></div><div class='hunk'>@@ -108,6 +108,65 @@</div><div class='ctx'> 			brcm,int-map-mask = &lt;0x25c&gt;, &lt;0x7000000&gt;;</div><div class='ctx'> 			brcm,int-fwd-mask = &lt;0x70000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		hif_intr2_intc: interrupt-controller@3e1000 {</div><div class='add'>+			compatible = "brcm,l2-intc";</div><div class='add'>+			reg = &lt;0x3e1000 0x30&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0x20 0x0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupt-names = "hif";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand: nand@3e2800 {</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";</div><div class='add'>+			reg-names = "nand", "flash-dma";</div><div class='add'>+			reg = &lt;0x3e2800 0x600&gt;, &lt;0x3e3000 0x2c&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;hif_intr2_intc&gt;;</div><div class='add'>+			interrupts = &lt;24&gt;, &lt;4&gt;;</div><div class='add'>+			interrupt-names = "nand_ctlrdy", "flash_dma_done";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata@45a000 {</div><div class='add'>+			compatible = "brcm,bcm7445-ahci", "brcm,sata3-ahci";</div><div class='add'>+			reg-names = "ahci", "top-ctrl";</div><div class='add'>+			reg = &lt;0x45a000 0xa9c&gt;, &lt;0x458040 0x24&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			sata0: sata-port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				phys = &lt;&amp;sata_phy0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sata1: sata-port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				phys = &lt;&amp;sata_phy1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata_phy: sata-phy@458100 {</div><div class='add'>+			compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";</div><div class='add'>+			reg = &lt;0x458100 0x1f00&gt;;</div><div class='add'>+			reg-names = "phy";</div><div class='add'>+			#address-cells = &lt;0x1&gt;;</div><div class='add'>+			#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+			sata_phy0: sata-phy@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sata_phy1: sata-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	smpboot {</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts<br/>index c9eb8565eac5..2f63052f9d48 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm958300k.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm958300k.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm958300k.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm958300k.dts</a></div><div class='hunk'>@@ -58,4 +58,20 @@</div><div class='ctx'> 	uart3: serial@18023000 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	nand: nand@18046000 {</div><div class='add'>+		nandcs@1 {</div><div class='add'>+			compatible = "brcm,nandcs";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			nand-ecc-strength = &lt;24&gt;;</div><div class='add'>+			nand-ecc-step-size = &lt;1024&gt;;</div><div class='add'>+</div><div class='add'>+			brcm,nand-oob-sector-size = &lt;27&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts<br/>index 69c93395ecd2..370aa2cfddf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm963138dvt.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/bcm963138dvt.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/bcm963138dvt.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/bcm963138dvt.dts</a></div><div class='hunk'>@@ -28,3 +28,15 @@</div><div class='ctx'> &amp;serial1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nandcs@0 {</div><div class='add'>+		compatible = "brcm,nandcs";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		nand-ecc-strength = &lt;4&gt;;</div><div class='add'>+		nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+		brcm,nand-oob-sectors-size = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts<br/>index 86d85d8896a3..5c99fb3a4d10 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts</a></div><div class='hunk'>@@ -3,9 +3,37 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2.  This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi<br/>index 63d00a63cfa6..ef811de09908 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2.dtsi</a></div><div class='hunk'>@@ -6,9 +6,37 @@</div><div class='ctx'>  * based on GPL'ed 2.6 kernel sources</div><div class='ctx'>  *  (c) Marvell International Ltd.</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2.  This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='hunk'>@@ -56,7 +84,7 @@</div><div class='ctx'> 		sdhci0: sdhci@ab0000 {</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab0000 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SDIO0XIN&gt;, &lt;&amp;chip CLKID_SDIO0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SDIO0XIN&gt;, &lt;&amp;chip_clk CLKID_SDIO0&gt;;</div><div class='ctx'> 			clock-names = "io", "core";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -65,7 +93,7 @@</div><div class='ctx'> 		sdhci1: sdhci@ab0800 {</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab0800 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SDIO1XIN&gt;, &lt;&amp;chip CLKID_SDIO1&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SDIO1XIN&gt;, &lt;&amp;chip_clk CLKID_SDIO1&gt;;</div><div class='ctx'> 			clock-names = "io", "core";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -75,7 +103,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab1000 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_NFC_ECC&gt;, &lt;&amp;chip CLKID_NFC&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_NFC_ECC&gt;, &lt;&amp;chip_clk CLKID_NFC&gt;;</div><div class='ctx'> 			clock-names = "io", "core";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;emmc_pmux&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='hunk'>@@ -105,13 +133,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 			reg = &lt;0xad0600 0x20&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_TWD&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_TWD&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		eth1: ethernet@b90000 {</div><div class='ctx'> 			compatible = "marvell,pxa168-eth";</div><div class='ctx'> 			reg = &lt;0xb90000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_GETH1&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_GETH1&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			/* set by bootloader */</div><div class='ctx'> 			local-mac-address = [00 00 00 00 00 00];</div><div class='hunk'>@@ -134,7 +162,7 @@</div><div class='ctx'> 		eth0: ethernet@e50000 {</div><div class='ctx'> 			compatible = "marvell,pxa168-eth";</div><div class='ctx'> 			reg = &lt;0xe50000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_GETH0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_GETH0&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			/* set by bootloader */</div><div class='ctx'> 			local-mac-address = [00 00 00 00 00 00];</div><div class='hunk'>@@ -233,7 +261,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c00 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;8&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -242,7 +270,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c14 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;9&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -251,7 +279,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c28 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;10&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -260,7 +288,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c3c 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;11&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -269,7 +297,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c50 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -278,7 +306,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c64 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;13&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -287,7 +315,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c78 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -296,7 +324,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c8c 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;15&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -315,7 +343,7 @@</div><div class='ctx'> 			compatible = "marvell,berlin2-ahci", "generic-ahci";</div><div class='ctx'> 			reg = &lt;0xe90000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SATA&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SATA&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -335,7 +363,7 @@</div><div class='ctx'> 		sata_phy: phy@e900a0 {</div><div class='ctx'> 			compatible = "marvell,berlin2-sata-phy";</div><div class='ctx'> 			reg = &lt;0xe900a0 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SATA&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SATA&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='hunk'>@@ -351,16 +379,28 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		chip: chip-control@ea0000 {</div><div class='del'>-			compatible = "marvell,berlin2-chip-ctrl";</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			#reset-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "simple-mfd", "syscon";</div><div class='ctx'> 			reg = &lt;0xea0000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;refclk&gt;;</div><div class='del'>-			clock-names = "refclk";</div><div class='ctx'> </div><div class='del'>-			emmc_pmux: emmc-pmux {</div><div class='del'>-				groups = "G26";</div><div class='del'>-				function = "emmc";</div><div class='add'>+			chip_clk: clock {</div><div class='add'>+				compatible = "marvell,berlin2-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+				clock-names = "refclk";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			soc_pinctrl: pin-controller {</div><div class='add'>+				compatible = "marvell,berlin2-soc-pinctrl";</div><div class='add'>+</div><div class='add'>+				emmc_pmux: emmc-pmux {</div><div class='add'>+					groups = "G26";</div><div class='add'>+					function = "emmc";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			chip_rst: reset {</div><div class='add'>+				compatible = "marvell,berlin2-reset";</div><div class='add'>+				#reset-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -442,22 +482,24 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sysctrl: system-controller@d000 {</div><div class='del'>-				compatible = "marvell,berlin2-system-ctrl";</div><div class='add'>+				compatible = "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0xd000 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-				uart0_pmux: uart0-pmux {</div><div class='del'>-					groups = "GSM4";</div><div class='del'>-					function = "uart0";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				uart1_pmux: uart1-pmux {</div><div class='del'>-					groups = "GSM5";</div><div class='del'>-					function = "uart1";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				uart2_pmux: uart2-pmux {</div><div class='del'>-					groups = "GSM3";</div><div class='del'>-					function = "uart2";</div><div class='add'>+				sys_pinctrl: pin-controller {</div><div class='add'>+					compatible = "marvell,berlin2-system-pinctrl";</div><div class='add'>+					uart0_pmux: uart0-pmux {</div><div class='add'>+						groups = "GSM4";</div><div class='add'>+						function = "uart0";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					uart1_pmux: uart1-pmux {</div><div class='add'>+						groups = "GSM5";</div><div class='add'>+						function = "uart1";</div><div class='add'>+					};</div><div class='add'>+					uart2_pmux: uart2-pmux {</div><div class='add'>+						groups = "GSM3";</div><div class='add'>+						function = "uart2";</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts<br/>index 30270be4d0c9..772165ad0a52 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2cd-google-chromecast.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2cd-google-chromecast.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2cd-google-chromecast.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2cd-google-chromecast.dts</a></div><div class='hunk'>@@ -3,9 +3,37 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2.  This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi<br/>index 81b670ac494a..900213d78a32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2cd.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2cd.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2cd.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2cd.dtsi</a></div><div class='hunk'>@@ -6,9 +6,37 @@</div><div class='ctx'>  * based on GPL'ed 2.6 kernel sources</div><div class='ctx'>  *  (c) Marvell International Ltd.</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2.  This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='hunk'>@@ -53,7 +81,7 @@</div><div class='ctx'> 		sdhci0: sdhci@ab0000 {</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab0000 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SDIO0XIN&gt;, &lt;&amp;chip CLKID_SDIO0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SDIO0XIN&gt;, &lt;&amp;chip_clk CLKID_SDIO0&gt;;</div><div class='ctx'> 			clock-names = "io", "core";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -77,14 +105,14 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 			reg = &lt;0xad0600 0x20&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_TWD&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_TWD&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usb_phy0: usb-phy@b74000 {</div><div class='ctx'> 			compatible = "marvell,berlin2cd-usb-phy";</div><div class='ctx'> 			reg = &lt;0xb74000 0x128&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='del'>-			resets = &lt;&amp;chip 0x178 23&gt;;</div><div class='add'>+			resets = &lt;&amp;chip_rst 0x178 23&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -92,14 +120,14 @@</div><div class='ctx'> 			compatible = "marvell,berlin2cd-usb-phy";</div><div class='ctx'> 			reg = &lt;0xb78000 0x128&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='del'>-			resets = &lt;&amp;chip 0x178 24&gt;;</div><div class='add'>+			resets = &lt;&amp;chip_rst 0x178 24&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		eth1: ethernet@b90000 {</div><div class='ctx'> 			compatible = "marvell,pxa168-eth";</div><div class='ctx'> 			reg = &lt;0xb90000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_GETH1&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_GETH1&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			/* set by bootloader */</div><div class='ctx'> 			local-mac-address = [00 00 00 00 00 00];</div><div class='hunk'>@@ -117,7 +145,7 @@</div><div class='ctx'> 		eth0: ethernet@e50000 {</div><div class='ctx'> 			compatible = "marvell,pxa168-eth";</div><div class='ctx'> 			reg = &lt;0xe50000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_GETH0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_GETH0&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			/* set by bootloader */</div><div class='ctx'> 			local-mac-address = [00 00 00 00 00 00];</div><div class='hunk'>@@ -216,7 +244,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c00 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;8&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -225,7 +253,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c14 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;9&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -234,7 +262,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c28 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;10&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -243,7 +271,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c3c 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;11&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -252,7 +280,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c50 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -261,7 +289,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c64 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;13&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -270,7 +298,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c78 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -279,7 +307,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c8c 0x14&gt;;</div><div class='ctx'> 				interrupts = &lt;15&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -295,16 +323,28 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		chip: chip-control@ea0000 {</div><div class='del'>-			compatible = "marvell,berlin2cd-chip-ctrl";</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			#reset-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "simple-mfd", "syscon";</div><div class='ctx'> 			reg = &lt;0xea0000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;refclk&gt;;</div><div class='del'>-			clock-names = "refclk";</div><div class='ctx'> </div><div class='del'>-			uart0_pmux: uart0-pmux {</div><div class='del'>-				groups = "G6";</div><div class='del'>-				function = "uart0";</div><div class='add'>+			chip_clk: clock {</div><div class='add'>+				compatible = "marvell,berlin2-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+				clock-names = "refclk";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			soc_pinctrl: pin-controller {</div><div class='add'>+				compatible = "marvell,berlin2cd-soc-pinctrl";</div><div class='add'>+</div><div class='add'>+				uart0_pmux: uart0-pmux {</div><div class='add'>+					groups = "G6";</div><div class='add'>+					function = "uart0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			chip_rst: reset {</div><div class='add'>+				compatible = "marvell,berlin2-reset";</div><div class='add'>+				#reset-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -312,7 +352,7 @@</div><div class='ctx'> 			compatible = "chipidea,usb2";</div><div class='ctx'> 			reg = &lt;0xed0000 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_USB0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_USB0&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb_phy0&gt;;</div><div class='ctx'> 			phy-names = "usb-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -322,7 +362,7 @@</div><div class='ctx'> 			compatible = "chipidea,usb2";</div><div class='ctx'> 			reg = &lt;0xee0000 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_USB1&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_USB1&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb_phy1&gt;;</div><div class='ctx'> 			phy-names = "usb-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -389,8 +429,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sysctrl: system-controller@d000 {</div><div class='del'>-				compatible = "marvell,berlin2cd-system-ctrl";</div><div class='add'>+				compatible = "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0xd000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+				sys_pinctrl: pin-controller {</div><div class='add'>+					compatible = "marvell,berlin2cd-system-pinctrl";</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sic: interrupt-controller@e000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts<br/>index a98ac1bd8f65..4a749e5b3b44 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2q-marvell-dmp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2q-marvell-dmp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2q-marvell-dmp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2q-marvell-dmp.dts</a></div><div class='hunk'>@@ -1,9 +1,37 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2014 Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi<br/>index be5397288d24..63a48490e2f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2q.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/berlin2q.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/berlin2q.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/berlin2q.dtsi</a></div><div class='hunk'>@@ -1,9 +1,37 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2014 Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is licensed under the terms of the GNU General Public</div><div class='add'>+ *     License version 2. This program is licensed "as is" without any</div><div class='add'>+ *     warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/berlin2q.h&gt;</div><div class='hunk'>@@ -74,7 +102,7 @@</div><div class='ctx'> 		sdhci0: sdhci@ab0000 {</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab0000 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SDIO1XIN&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SDIO1XIN&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -82,7 +110,7 @@</div><div class='ctx'> 		sdhci1: sdhci@ab0800 {</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab0800 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SDIO1XIN&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SDIO1XIN&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -91,7 +119,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxav3-mmc";</div><div class='ctx'> 			reg = &lt;0xab1000 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_NFC_ECC&gt;, &lt;&amp;chip CLKID_NFC&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_NFC_ECC&gt;, &lt;&amp;chip_clk CLKID_NFC&gt;;</div><div class='ctx'> 			clock-names = "io", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -112,7 +140,7 @@</div><div class='ctx'> 		local-timer@ad0600 {</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 			reg = &lt;0xad0600 0x20&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_TWD&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_TWD&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -127,7 +155,7 @@</div><div class='ctx'> 			compatible = "marvell,berlin2-usb-phy";</div><div class='ctx'> 			reg = &lt;0xa2f400 0x128&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='del'>-			resets = &lt;&amp;chip 0x104 14&gt;;</div><div class='add'>+			resets = &lt;&amp;chip_rst 0x104 14&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -135,7 +163,7 @@</div><div class='ctx'> 			compatible = "chipidea,usb2";</div><div class='ctx'> 			reg = &lt;0xa30000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_USB2&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_USB2&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb_phy2&gt;;</div><div class='ctx'> 			phy-names = "usb-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -145,7 +173,7 @@</div><div class='ctx'> 			compatible = "marvell,berlin2-usb-phy";</div><div class='ctx'> 			reg = &lt;0xb74000 0x128&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='del'>-			resets = &lt;&amp;chip 0x104 12&gt;;</div><div class='add'>+			resets = &lt;&amp;chip_rst 0x104 12&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -153,14 +181,14 @@</div><div class='ctx'> 			compatible = "marvell,berlin2-usb-phy";</div><div class='ctx'> 			reg = &lt;0xb78000 0x128&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='del'>-			resets = &lt;&amp;chip 0x104 13&gt;;</div><div class='add'>+			resets = &lt;&amp;chip_rst 0x104 13&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		eth0: ethernet@b90000 {</div><div class='ctx'> 			compatible = "marvell,pxa168-eth";</div><div class='ctx'> 			reg = &lt;0xb90000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_GETH0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_GETH0&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			/* set by bootloader */</div><div class='ctx'> 			local-mac-address = [00 00 00 00 00 00];</div><div class='hunk'>@@ -267,7 +295,7 @@</div><div class='ctx'> 				reg = &lt;0x1400 0x100&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;aic&gt;;</div><div class='ctx'> 				interrupts = &lt;4&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;twsi0_pmux&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -280,7 +308,7 @@</div><div class='ctx'> 				reg = &lt;0x1800 0x100&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;aic&gt;;</div><div class='ctx'> 				interrupts = &lt;5&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;twsi1_pmux&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -289,7 +317,7 @@</div><div class='ctx'> 			timer0: timer@2c00 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c00 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				interrupts = &lt;8&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -297,14 +325,14 @@</div><div class='ctx'> 			timer1: timer@2c14 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c14 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			timer2: timer@2c28 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c28 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -312,7 +340,7 @@</div><div class='ctx'> 			timer3: timer@2c3c {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c3c 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -320,7 +348,7 @@</div><div class='ctx'> 			timer4: timer@2c50 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c50 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -328,7 +356,7 @@</div><div class='ctx'> 			timer5: timer@2c64 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c64 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -336,7 +364,7 @@</div><div class='ctx'> 			timer6: timer@2c78 {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c78 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -344,7 +372,7 @@</div><div class='ctx'> 			timer7: timer@2c8c {</div><div class='ctx'> 				compatible = "snps,dw-apb-timer";</div><div class='ctx'> 				reg = &lt;0x2c8c 0x14&gt;;</div><div class='del'>-				clocks = &lt;&amp;chip CLKID_CFG&gt;;</div><div class='add'>+				clocks = &lt;&amp;chip_clk CLKID_CFG&gt;;</div><div class='ctx'> 				clock-names = "timer";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -360,21 +388,33 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		chip: chip-control@ea0000 {</div><div class='del'>-			compatible = "marvell,berlin2q-chip-ctrl";</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			#reset-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "simple-mfd", "syscon";</div><div class='ctx'> 			reg = &lt;0xea0000 0x400&gt;, &lt;0xdd0170 0x10&gt;;</div><div class='del'>-			clocks = &lt;&amp;refclk&gt;;</div><div class='del'>-			clock-names = "refclk";</div><div class='ctx'> </div><div class='del'>-			twsi0_pmux: twsi0-pmux {</div><div class='del'>-				groups = "G6";</div><div class='del'>-				function = "twsi0";</div><div class='add'>+			chip_clk: clock {</div><div class='add'>+				compatible = "marvell,berlin2q-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+				clock-names = "refclk";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			soc_pinctrl: pin-controller {</div><div class='add'>+				compatible = "marvell,berlin2q-soc-pinctrl";</div><div class='add'>+</div><div class='add'>+				twsi0_pmux: twsi0-pmux {</div><div class='add'>+					groups = "G6";</div><div class='add'>+					function = "twsi0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				twsi1_pmux: twsi1-pmux {</div><div class='add'>+					groups = "G7";</div><div class='add'>+					function = "twsi1";</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			twsi1_pmux: twsi1-pmux {</div><div class='del'>-				groups = "G7";</div><div class='del'>-				function = "twsi1";</div><div class='add'>+			chip_rst: reset {</div><div class='add'>+				compatible = "marvell,berlin2-reset";</div><div class='add'>+				#reset-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -382,7 +422,7 @@</div><div class='ctx'> 			compatible = "marvell,berlin2q-ahci", "generic-ahci";</div><div class='ctx'> 			reg = &lt;0xe90000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SATA&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SATA&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -402,7 +442,7 @@</div><div class='ctx'> 		sata_phy: phy@e900a0 {</div><div class='ctx'> 			compatible = "marvell,berlin2q-sata-phy";</div><div class='ctx'> 			reg = &lt;0xe900a0 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_SATA&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_SATA&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='hunk'>@@ -421,7 +461,7 @@</div><div class='ctx'> 			compatible = "chipidea,usb2";</div><div class='ctx'> 			reg = &lt;0xed0000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_USB0&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_USB0&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb_phy0&gt;;</div><div class='ctx'> 			phy-names = "usb-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -431,7 +471,7 @@</div><div class='ctx'> 			compatible = "chipidea,usb2";</div><div class='ctx'> 			reg = &lt;0xee0000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;chip CLKID_USB1&gt;;</div><div class='add'>+			clocks = &lt;&amp;chip_clk CLKID_USB1&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb_phy1&gt;;</div><div class='ctx'> 			phy-names = "usb-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -526,27 +566,37 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sysctrl: pin-controller@d000 {</div><div class='del'>-				compatible = "marvell,berlin2q-system-ctrl";</div><div class='add'>+				compatible = "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0xd000 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-				uart0_pmux: uart0-pmux {</div><div class='del'>-					groups = "GSM12";</div><div class='del'>-					function = "uart0";</div><div class='del'>-				};</div><div class='add'>+				sys_pinctrl: pin-controller {</div><div class='add'>+					compatible = "marvell,berlin2q-system-pinctrl";</div><div class='ctx'> </div><div class='del'>-				uart1_pmux: uart1-pmux {</div><div class='del'>-					groups = "GSM14";</div><div class='del'>-					function = "uart1";</div><div class='del'>-				};</div><div class='add'>+					uart0_pmux: uart0-pmux {</div><div class='add'>+						groups = "GSM12";</div><div class='add'>+						function = "uart0";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					uart1_pmux: uart1-pmux {</div><div class='add'>+						groups = "GSM14";</div><div class='add'>+						function = "uart1";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					twsi2_pmux: twsi2-pmux {</div><div class='add'>+						groups = "GSM13";</div><div class='add'>+						function = "twsi2";</div><div class='add'>+					};</div><div class='ctx'> </div><div class='del'>-				twsi2_pmux: twsi2-pmux {</div><div class='del'>-					groups = "GSM13";</div><div class='del'>-					function = "twsi2";</div><div class='add'>+					twsi3_pmux: twsi3-pmux {</div><div class='add'>+						groups = "GSM14";</div><div class='add'>+						function = "twsi3";</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				twsi3_pmux: twsi3-pmux {</div><div class='del'>-					groups = "GSM14";</div><div class='del'>-					function = "twsi3";</div><div class='add'>+				adc: adc {</div><div class='add'>+					compatible = "marvell,berlin2-adc";</div><div class='add'>+					interrupts = &lt;12&gt;, &lt;14&gt;;</div><div class='add'>+					interrupt-names = "adc", "tsen";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/cros-ec-keyboard.dtsi b/arch/arm/boot/dts/cros-ec-keyboard.dtsi<br/>index 9c7fb0acae79..4e42f30cb318 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/cros-ec-keyboard.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/cros-ec-keyboard.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/cros-ec-keyboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cros-ec-keyboard.dtsi</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x02, KEY_F1)</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x03, KEY_B)</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x04, KEY_F10)</div><div class='add'>+			MATRIX_KEY(0x00, 0x05, KEY_RO)</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x06, KEY_N)</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x08, KEY_EQUAL)</div><div class='ctx'> 			MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> 			MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)</div><div class='ctx'> 			MATRIX_KEY(0x01, 0x09, KEY_F9)</div><div class='ctx'> 			MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)</div><div class='add'>+			MATRIX_KEY(0x01, 0x0c, KEY_HENKAN)</div><div class='ctx'> </div><div class='ctx'> 			MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)</div><div class='ctx'> 			MATRIX_KEY(0x02, 0x01, KEY_TAB)</div><div class='hunk'>@@ -45,6 +47,7 @@</div><div class='ctx'> 			MATRIX_KEY(0x02, 0x07, KEY_102ND)</div><div class='ctx'> 			MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)</div><div class='ctx'> 			MATRIX_KEY(0x02, 0x09, KEY_F8)</div><div class='add'>+			MATRIX_KEY(0x02, 0x0a, KEY_YEN)</div><div class='ctx'> </div><div class='ctx'> 			MATRIX_KEY(0x03, 0x01, KEY_GRAVE)</div><div class='ctx'> 			MATRIX_KEY(0x03, 0x02, KEY_F2)</div><div class='hunk'>@@ -53,6 +56,7 @@</div><div class='ctx'> 			MATRIX_KEY(0x03, 0x06, KEY_6)</div><div class='ctx'> 			MATRIX_KEY(0x03, 0x08, KEY_MINUS)</div><div class='ctx'> 			MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)</div><div class='add'>+			MATRIX_KEY(0x03, 0x0c, KEY_MUHENKAN)</div><div class='ctx'> </div><div class='ctx'> 			MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)</div><div class='ctx'> 			MATRIX_KEY(0x04, 0x01, KEY_A)</div><div class='head'>diff --git a/arch/arm/boot/dts/cx92755.dtsi b/arch/arm/boot/dts/cx92755.dtsi<br/>index 490c08075e67..af333261d046 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/cx92755.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/cx92755.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/cx92755.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cx92755.dtsi</a></div><div class='hunk'>@@ -82,6 +82,12 @@</div><div class='ctx'> 		clocks = &lt;&amp;main_clk&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	rtc@f0000c30 {</div><div class='add'>+		compatible = "cnxt,cx92755-rtc";</div><div class='add'>+		reg = &lt;0xf0000c30 0x18&gt;;</div><div class='add'>+		interrupts = &lt;25&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uc_regs: syscon@f00003a0 {</div><div class='ctx'> 		compatible = "cnxt,cx92755-uc", "syscon";</div><div class='ctx'> 		reg = &lt;0xf00003a0 0x10&gt;;</div><div class='hunk'>@@ -110,4 +116,15 @@</div><div class='ctx'> 		interrupts = &lt;46&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	i2c: i2c@f0000120 {</div><div class='add'>+		compatible = "cnxt,cx92755-i2c";</div><div class='add'>+		reg = &lt;0xf0000120 0x10&gt;;</div><div class='add'>+		interrupts = &lt;28&gt;;</div><div class='add'>+		clocks = &lt;&amp;main_clk&gt;;</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/cx92755_equinox.dts b/arch/arm/boot/dts/cx92755_equinox.dts<br/>index f33bf5635d47..90d52cc416dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/cx92755_equinox.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/cx92755_equinox.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/cx92755_equinox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/cx92755_equinox.dts</a></div><div class='hunk'>@@ -72,3 +72,7 @@</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/dove-cm-a510.dts b/arch/arm/boot/dts/dove-cm-a510.dts<br/>deleted file mode 100644<br/>index 50c0d6904497..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dove-cm-a510.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dove-cm-a510.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include "dove.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Compulab CM-A510";</div><div class='del'>-	compatible = "compulab,cm-a510", "marvell,dove";</div><div class='del'>-</div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200n8 earlyprintk";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart0 { status = "okay"; };</div><div class='del'>-&amp;uart1 { status = "okay"; };</div><div class='del'>-&amp;sdio0 { status = "okay"; };</div><div class='del'>-&amp;sdio1 { status = "okay"; };</div><div class='del'>-&amp;sata0 { status = "okay"; };</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* spi0.0: 4M Flash Winbond W25Q32BV */</div><div class='del'>-	spi-flash@0 {</div><div class='del'>-		compatible = "st,w25q32";</div><div class='del'>-		spi-max-frequency = &lt;20000000&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	  status = "okay";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/dove-cm-a510.dtsi b/arch/arm/boot/dts/dove-cm-a510.dtsi<br/>new file mode 100644<br/>index 000000000000..59b4056b478f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dove-cm-a510.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove-cm-a510.dtsi</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree include for Compulab CM-A510 System-on-Module</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; version 2 of the</div><div class='add'>+ *     License.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The CM-A510 comes with several optional components:</div><div class='add'>+ *</div><div class='add'>+ * Memory options:</div><div class='add'>+ *  D512: 512M</div><div class='add'>+ *  D1024: 1G</div><div class='add'>+ *</div><div class='add'>+ * NAND options:</div><div class='add'>+ *  N512: 512M NAND</div><div class='add'>+ *</div><div class='add'>+ * Ethernet options:</div><div class='add'>+ *  E1: PHY RTL8211D on internal GbE (SMI address 0x03)</div><div class='add'>+ *  E2: Additional ethernet NIC RTL8111D on PCIe1</div><div class='add'>+ *</div><div class='add'>+ * Audio options:</div><div class='add'>+ *  A: TI TLV320AIC23b audio codec (I2C address 0x1a)</div><div class='add'>+ *</div><div class='add'>+ * Touchscreen options:</div><div class='add'>+ *  I: TI TSC2046 touchscreen controller (on SPI1)</div><div class='add'>+ *</div><div class='add'>+ * USB options:</div><div class='add'>+ *  U2: 2 dual-role USB2.0 ports</div><div class='add'>+ *  U4: 2 additional USB2.0 host ports (via USB1)</div><div class='add'>+ *</div><div class='add'>+ * WiFi options:</div><div class='add'>+ *  W: Broadcom BCM4319 802.11b/g/n (USI WM-N-BM-01 on SDIO1)</div><div class='add'>+ *</div><div class='add'>+ * GPIOs used on CM-A510:</div><div class='add'>+ *   1 GbE PHY reset (active low)</div><div class='add'>+ *   3 WakeUp</div><div class='add'>+ *   8 PowerOff (active low)</div><div class='add'>+ *  13 Touchscreen pen irq (active low)</div><div class='add'>+ *  65 System LED (active high)</div><div class='add'>+ *  69 USB Hub reset (active low)</div><div class='add'>+ *  70 WLAN reset (active low)</div><div class='add'>+ *  71 WLAN regulator (active high)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "dove.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Compulab CM-A510";</div><div class='add'>+	compatible = "compulab,cm-a510", "marvell,dove";</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set the minimum memory size here and let the</div><div class='add'>+	 * bootloader set the real size.</div><div class='add'>+	 */</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		/* Set upper NAND data bit to GPO */</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmx_nand_gpo&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		system {</div><div class='add'>+			label = "cm-a510:system:green";</div><div class='add'>+			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		wifi_power: regulator@1 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "WiFi Power";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Optional RTL8211D GbE PHY on SMI address 0x03 */</div><div class='add'>+&amp;ethphy {</div><div class='add'>+	reg = &lt;3&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/* Optional TI TLV320AIC23b audio codec */</div><div class='add'>+	opt_audio: audio@1a {</div><div class='add'>+		compatible = "ti,tlv320aic23";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Optional RTL8111D GbE NIC on PCIe1 */</div><div class='add'>+&amp;pcie { status = "disabled"; };</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmx_pcie1_clkreq&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pmx_uart2: pmx-uart2 {</div><div class='add'>+		marvell,pins = "mpp14", "mpp15";</div><div class='add'>+		marvell,function = "uart2";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Optional Broadcom BCM4319 802.11b/g/n WiFi module */</div><div class='add'>+&amp;sdio1 {</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;wifi_power&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio2 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* 1M Flash Winbond W25Q80BL */</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "winbond,w25q80";</div><div class='add'>+		spi-max-frequency = &lt;80000000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmx_spi1_20_23&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	/* Optional TI TSC2046 touchscreen controller */</div><div class='add'>+	opt_touch: touchscreen@0 {</div><div class='add'>+		compatible = "ti,tsc2046";</div><div class='add'>+		spi-max-frequency = &lt;2500000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmx_gpio_13&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 13 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmx_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/dove-sbc-a510.dts b/arch/arm/boot/dts/dove-sbc-a510.dts<br/>new file mode 100644<br/>index 000000000000..288e707dea99<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dove-sbc-a510.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove-sbc-a510.dts</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for Compulab SBC-A510 Single Board Computer</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; version 2 of the</div><div class='add'>+ *     License.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SBC-A510 comprises a PCA9555 I2C GPIO expander its GPIO lines connected to</div><div class='add'>+ *</div><div class='add'>+ * 0.0 USB0 VBUS_EN (active high)</div><div class='add'>+ * 0.1 USB0 VBUS_GOOD</div><div class='add'>+ * 0.2 DVI transmitter TI TFP410 MSEN</div><div class='add'>+ * 0.3 DVI transmitter TI TFP410 PD# (active low power down)</div><div class='add'>+ * 0.4 LVDS transmitter DS90C365 PD# (active low power down)</div><div class='add'>+ * 0.5 LCD nRST (active low reset)</div><div class='add'>+ * 0.6 PCIe0 nRST (active low reset)</div><div class='add'>+ * 0.7 mini-PCIe slot W_DISABLE#</div><div class='add'>+ *</div><div class='add'>+ * 1.0 MMC WP</div><div class='add'>+ * 1.1 Camera Input FPC FLASH_STB and P21.5</div><div class='add'>+ * 1.2 Camera Input FPC WE        and P21.22</div><div class='add'>+ * 1.3 MMC VCC_EN (active high)   and P21.7</div><div class='add'>+ * 1.4 Camera Input FPC AFTR_RST  and P21.17</div><div class='add'>+ * 1.5 Camera Input FPC OE        and P21.19</div><div class='add'>+ * 1.6 Camera Input FPC SNPSHT    and P21.6</div><div class='add'>+ * 1.7 Camera Input FPC SHTR      and P21.10</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "dove-cm-a510.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Compulab SBC-A510";</div><div class='add'>+	compatible = "compulab,sbc-a510", "compulab,cm-a510", "marvell,dove";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		usb0_power: regulator@2 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "USB Power";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio_ext 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc_power: regulator@3 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "MMC Power";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio_ext 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ethernet0 depends on CM-A510 option E1 */</div><div class='add'>+&amp;mdio { status = "disabled"; };</div><div class='add'>+&amp;eth { status = "disabled"; };</div><div class='add'>+&amp;ethphy { status = "disabled"; };</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * USB port 0 can be powered and monitored by I2C GPIO expander:</div><div class='add'>+ *  VBUS_ENABLE on GPIO0, VBUS_GOOD on GPIO1</div><div class='add'>+ */</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vbus-supply = &lt;&amp;usb0_power&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB port 1 (and ports 2, 3 if CM-A510 has U4 option) */</div><div class='add'>+&amp;ehci1 { status = "okay"; };</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * I2C bus layout:</div><div class='add'>+ * i2c0:</div><div class='add'>+ *  - Audio Codec, 0x1a (option from CM-A510)</div><div class='add'>+ *  - DVI transmitter TI TFP410, 0x39</div><div class='add'>+ *  - HDMI/DVI DDC channel</div><div class='add'>+ * i2c1:</div><div class='add'>+ *  - GPIO expander, NXP PCA9555, 0x20</div><div class='add'>+ *  - VGA DDC channel</div><div class='add'>+ */</div><div class='add'>+&amp;i2c {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmx_i2c1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/* TI TFP410 DVI transmitter */</div><div class='add'>+	dvi: video@39 {</div><div class='add'>+		compatible = "ti,tfp410";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		powerdown-gpio = &lt;&amp;gpio_ext 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* NXP PCA9555 GPIO expander */</div><div class='add'>+	gpio_ext: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie { status = "okay"; };</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * PCIe0 can be configured by Jumper E1 to be either connected to</div><div class='add'>+ * a mini-PCIe slot or a Pericom PI7C9X111 PCIe-to-PCI bridge.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmx_pcie0_clkreq&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpios = &lt;&amp;gpio_ext 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ethernet1 depends on CM-A510 option E2 */</div><div class='add'>+&amp;pcie1 { status = "disabled"; };</div><div class='add'>+</div><div class='add'>+/* SATA connector */</div><div class='add'>+&amp;sata0 { status = "okay"; };</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SDIO0 is connected to a MMC/SD/SDIO socket, I2C GPIO expander has</div><div class='add'>+ *  VCC_MMC_ENABLE on GPIO13, MMC_WP on GPIO10</div><div class='add'>+ */</div><div class='add'>+&amp;sdio0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;mmc_power&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio_ext 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UART0 on RS232 mini-connector */</div><div class='add'>+&amp;uart0 { status = "okay"; };</div><div class='add'>+/* UART2 on pin headers */</div><div class='add'>+&amp;uart2 { status = "okay"; };</div><div class='head'>diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi<br/>index 9ad829523a13..38b1f7e6004e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dove.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dove.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dove.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dove.dtsi</a></div><div class='hunk'>@@ -33,6 +33,42 @@</div><div class='ctx'> 		marvell,tauros2-cache-features = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c-mux {</div><div class='add'>+		compatible = "i2c-mux-pinctrl";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-parent = &lt;&amp;i2c&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "i2c0", "i2c1", "i2c2";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmx_i2cmux_0&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pmx_i2cmux_1&gt;;</div><div class='add'>+		pinctrl-2 = &lt;&amp;pmx_i2cmux_2&gt;;</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			/* Requires pmx_i2c1 on i2c controller node */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			/* Requires pmx_i2c2 on i2c controller node */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mbus {</div><div class='ctx'> 		compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -123,7 +159,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			i2c0: i2c-ctrl@11000 {</div><div class='add'>+			i2c: i2c-ctrl@11000 {</div><div class='ctx'> 				compatible = "marvell,mv64xxx-i2c";</div><div class='ctx'> 				reg = &lt;0x11000 0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -132,7 +168,7 @@</div><div class='ctx'> 				clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 				timeout-ms = &lt;1000&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;core_clk 0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='add'>+				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			uart0: serial@12000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts<br/>index aa465904f6cc..096f68be99e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra7-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7-evm.dts</a></div><div class='hunk'>@@ -686,7 +686,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;dcan1 {</div><div class='ctx'> 	status = "ok";</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;dcan1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep", "active";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dcan1_pins_sleep&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;dcan1_pins_sleep&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;dcan1_pins_default&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi<br/>index f03a091cd076..8f1e25bcecbd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra7.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7.dtsi</a></div><div class='hunk'>@@ -131,6 +131,11 @@</div><div class='ctx'> 							regulator-max-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					scm_conf_clocks: clocks {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				dra7_pmx_core: pinmux@1400 {</div><div class='hunk'>@@ -1469,6 +1474,44 @@</div><div class='ctx'> 			clocks = &lt;&amp;sys_clkin1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		dss: dss@58000000 {</div><div class='add'>+			compatible = "ti,dra7-dss";</div><div class='add'>+			/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */</div><div class='add'>+			/* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */</div><div class='add'>+			status = "disabled";</div><div class='add'>+			ti,hwmods = "dss_core";</div><div class='add'>+			/* CTRL_CORE_DSS_PLL_CONTROL */</div><div class='add'>+			syscon-pll-ctrl = &lt;&amp;scm_conf 0x538&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			dispc@58001000 {</div><div class='add'>+				compatible = "ti,dra7-dispc";</div><div class='add'>+				reg = &lt;0x58001000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ti,hwmods = "dss_dispc";</div><div class='add'>+				clocks = &lt;&amp;dss_dss_clk&gt;;</div><div class='add'>+				clock-names = "fck";</div><div class='add'>+				/* CTRL_CORE_SMA_SW_1 */</div><div class='add'>+				syscon-pol = &lt;&amp;scm_conf 0x534&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi: encoder@58060000 {</div><div class='add'>+				compatible = "ti,dra7-hdmi";</div><div class='add'>+				reg = &lt;0x58040000 0x200&gt;,</div><div class='add'>+				      &lt;0x58040200 0x80&gt;,</div><div class='add'>+				      &lt;0x58040300 0x80&gt;,</div><div class='add'>+				      &lt;0x58060000 0x19000&gt;;</div><div class='add'>+				reg-names = "wp", "pll", "phy", "core";</div><div class='add'>+				interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+				ti,hwmods = "dss_hdmi";</div><div class='add'>+				clocks = &lt;&amp;dss_48mhz_clk&gt;, &lt;&amp;dss_hdmi_clk&gt;;</div><div class='add'>+				clock-names = "fck", "sys_clk";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal_zones: thermal-zones {</div><div class='head'>diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts<br/>index ce0390f081d9..803738414086 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra72-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra72-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra72-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra72-evm.dts</a></div><div class='hunk'>@@ -19,6 +19,10 @@</div><div class='ctx'> 		reg = &lt;0x80000000 0x40000000&gt;; /* 1024 MB */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		display0 = &amp;hdmi0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	evm_3v3: fixedregulator-evm_3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "evm_3v3";</div><div class='hunk'>@@ -35,6 +39,51 @@</div><div class='ctx'> 		compatible = "linux,extcon-usb-gpio";</div><div class='ctx'> 		id-gpio = &lt;&amp;pcf_gpio_21 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	hdmi0: connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;tpd12s015_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpd12s015: encoder {</div><div class='add'>+		compatible = "ti,tpd12s015";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpd12s015_pins&gt;;</div><div class='add'>+</div><div class='add'>+		gpios = &lt;&amp;pcf_hdmi 4 GPIO_ACTIVE_HIGH&gt;,	/* P4, CT CP HPD */</div><div class='add'>+			&lt;&amp;pcf_hdmi 5 GPIO_ACTIVE_HIGH&gt;,	/* P5, LS OE */</div><div class='add'>+			&lt;&amp;gpio7 12 GPIO_ACTIVE_HIGH&gt;;	/* gpio7_12/sp1_cs2, HPD */</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				tpd12s015_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				tpd12s015_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dra7_pmx_core {</div><div class='hunk'>@@ -45,6 +94,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c5_pins: pinmux_i2c5_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */</div><div class='add'>+			0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	nand_default: nand_default {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			0x0	(PIN_INPUT  | MUX_MODE0) /* gpmc_ad0 */</div><div class='hunk'>@@ -142,6 +198,19 @@</div><div class='ctx'> 			0xb8 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_cs2.qspi1_cs0 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	hdmi_pins: pinmux_hdmi_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */</div><div class='add'>+			0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpd12s015_pins: pinmux_tpd12s015_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -277,6 +346,27 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pcf_hdmi: pcf8575@26 {</div><div class='add'>+		compatible = "nxp,pcf8575";</div><div class='add'>+		reg = &lt;0x26&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * initial state is used here to keep the mdio interface</div><div class='add'>+		 * selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and</div><div class='add'>+		 * VIN2_S0 driven high otherwise Ethernet stops working</div><div class='add'>+		 * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6</div><div class='add'>+		 */</div><div class='add'>+		lines-initial-states = &lt;0x0f2b&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -497,9 +587,10 @@</div><div class='ctx'> </div><div class='ctx'> &amp;dcan1 {</div><div class='ctx'> 	status = "ok";</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;dcan1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep", "active";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dcan1_pins_sleep&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;dcan1_pins_sleep&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;dcan1_pins_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='hunk'>@@ -566,3 +657,23 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	status = "ok";</div><div class='add'>+</div><div class='add'>+	vdda_video-supply = &lt;&amp;ldo5_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "ok";</div><div class='add'>+	vdda-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_pins&gt;;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		hdmi_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;tpd12s015_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi<br/>index 03d742f8d572..eaca143faa77 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra72x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra72x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra72x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra72x.dtsi</a></div><div class='hunk'>@@ -34,3 +34,14 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	reg = &lt;0x58000000 0x80&gt;,</div><div class='add'>+	      &lt;0x58004054 0x4&gt;,</div><div class='add'>+	      &lt;0x58004300 0x20&gt;;</div><div class='add'>+	reg-names = "dss", "pll1_clkctrl", "pll1";</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;dss_dss_clk&gt;,</div><div class='add'>+		 &lt;&amp;dss_video1_clk&gt;;</div><div class='add'>+	clock-names = "fck", "video1_clk";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi<br/>index cc560a70926f..fa995d0ca1f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra74x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra74x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra74x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra74x.dtsi</a></div><div class='hunk'>@@ -73,3 +73,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	reg = &lt;0x58000000 0x80&gt;,</div><div class='add'>+	      &lt;0x58004054 0x4&gt;,</div><div class='add'>+	      &lt;0x58004300 0x20&gt;,</div><div class='add'>+	      &lt;0x58005054 0x4&gt;,</div><div class='add'>+	      &lt;0x58005300 0x20&gt;;</div><div class='add'>+	reg-names = "dss", "pll1_clkctrl", "pll1",</div><div class='add'>+		    "pll2_clkctrl", "pll2";</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;dss_dss_clk&gt;,</div><div class='add'>+		 &lt;&amp;dss_video1_clk&gt;,</div><div class='add'>+		 &lt;&amp;dss_video2_clk&gt;;</div><div class='add'>+	clock-names = "fck", "video1_clk", "video2_clk";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi<br/>index 3b933f74d000..357bedeebfac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7xx-clocks.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/dra7xx-clocks.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/dra7xx-clocks.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/dra7xx-clocks.dtsi</a></div><div class='hunk'>@@ -1531,6 +1531,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;dpll_per_h12x2_ck&gt;;</div><div class='ctx'> 		ti,bit-shift = &lt;8&gt;;</div><div class='ctx'> 		reg = &lt;0x1120&gt;;</div><div class='add'>+		ti,set-rate-parent;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dss_hdmi_clk: dss_hdmi_clk {</div><div class='hunk'>@@ -2136,3 +2137,13 @@</div><div class='ctx'> 		clocks = &lt;&amp;dpll_usb_ck&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;scm_conf_clocks {</div><div class='add'>+	dss_deshdcp_clk: dss_deshdcp_clk {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "ti,gate-clock";</div><div class='add'>+		clocks = &lt;&amp;l3_iclk_div&gt;;</div><div class='add'>+		ti,bit-shift = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x558&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts<br/>index 19446273e4a7..1dee0aa4f40c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/emev2-kzm9d.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/emev2-kzm9d.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/emev2-kzm9d.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/emev2-kzm9d.dts</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lan9220@20000000 {</div><div class='add'>+	ethernet@20000000 {</div><div class='ctx'> 		compatible = "smsc,lan9220", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x20000000 0x10000&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pfc {</div><div class='del'>-	uart1_pins: uart@e1030000 {</div><div class='add'>+	uart1_pins: serial@e1030000 {</div><div class='ctx'> 		renesas,groups = "uart1_ctrl", "uart1_data";</div><div class='ctx'> 		renesas,function = "uart1";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts<br/>index 1d483c1c8b48..a5863acc5fff 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250-monk.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos3250-monk.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250-monk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250-monk.dts</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include "exynos3250.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,s2mps11.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Samsung Monk board";</div><div class='hunk'>@@ -432,7 +433,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='del'>-	clocks = &lt;&amp;cmu CLK_RTC&gt;, &lt;&amp;s2mps14_osc 0&gt;;</div><div class='add'>+	clocks = &lt;&amp;cmu CLK_RTC&gt;, &lt;&amp;s2mps14_osc S2MPS11_CLK_AP&gt;;</div><div class='ctx'> 	clock-names = "rtc", "rtc_src";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts<br/>index 0b9906880c0c..031853b75528 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250-rinato.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos3250-rinato.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250-rinato.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250-rinato.dts</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include "exynos3250.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,s2mps11.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Samsung Rinato board";</div><div class='hunk'>@@ -567,6 +568,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;jpeg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mshc_0 {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -605,7 +610,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='del'>-	clocks = &lt;&amp;cmu CLK_RTC&gt;, &lt;&amp;s2mps14_osc 0&gt;;</div><div class='add'>+	clocks = &lt;&amp;cmu CLK_RTC&gt;, &lt;&amp;s2mps14_osc S2MPS11_CLK_AP&gt;;</div><div class='ctx'> 	clock-names = "rtc", "rtc_src";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi<br/>index e3bfb11c6ef8..d7201333e3bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos3250.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos3250.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos3250.dtsi</a></div><div class='hunk'>@@ -189,7 +189,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rtc: rtc@10070000 {</div><div class='del'>-			compatible = "samsung,exynos3250-rtc";</div><div class='add'>+			compatible = "samsung,s3c6410-rtc";</div><div class='ctx'> 			reg = &lt;0x10070000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;0 73 0&gt;, &lt;0 74 0&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='hunk'>@@ -243,6 +243,30 @@</div><div class='ctx'> 			interrupts = &lt;0 240 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		jpeg: codec@11830000 {</div><div class='add'>+			compatible = "samsung,exynos3250-jpeg";</div><div class='add'>+			reg = &lt;0x11830000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 171 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu CLK_JPEG&gt;, &lt;&amp;cmu CLK_SCLK_JPEG&gt;;</div><div class='add'>+			clock-names = "jpeg", "sclk";</div><div class='add'>+			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cmu CLK_MOUT_CAM_BLK&gt;, &lt;&amp;cmu CLK_SCLK_JPEG&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;0&gt;, &lt;150000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;cmu CLK_DIV_MPLL_PRE&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_jpeg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sysmmu_jpeg: sysmmu@11A60000 {</div><div class='add'>+			compatible = "samsung,exynos-sysmmu";</div><div class='add'>+			reg = &lt;0x11a60000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 156 0&gt;, &lt;0 161 0&gt;;</div><div class='add'>+			clock-names = "sysmmu", "master";</div><div class='add'>+			clocks = &lt;&amp;cmu CLK_SMMUJPEG&gt;, &lt;&amp;cmu CLK_JPEG&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		fimd: fimd@11c00000 {</div><div class='ctx'> 			compatible = "samsung,exynos3250-fimd";</div><div class='ctx'> 			reg = &lt;0x11c00000 0x30000&gt;;</div><div class='hunk'>@@ -251,6 +275,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cmu CLK_SCLK_FIMD0&gt;, &lt;&amp;cmu CLK_FIMD0&gt;;</div><div class='ctx'> 			clock-names = "sclk_fimd", "fimd";</div><div class='ctx'> 			power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimd0&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -270,6 +295,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sysmmu_fimd0: sysmmu@11E20000 {</div><div class='add'>+			compatible = "samsung,exynos-sysmmu";</div><div class='add'>+			reg = &lt;0x11e20000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 80 0&gt;, &lt;0 81 0&gt;;</div><div class='add'>+			clock-names = "sysmmu", "master";</div><div class='add'>+			clocks = &lt;&amp;cmu CLK_SMMUFIMD0&gt;, &lt;&amp;cmu CLK_FIMD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsotg: hsotg@12480000 {</div><div class='ctx'> 			compatible = "snps,dwc2";</div><div class='ctx'> 			reg = &lt;0x12480000 0x20000&gt;;</div><div class='hunk'>@@ -364,9 +399,20 @@</div><div class='ctx'> 			clock-names = "mfc", "sclk_mfc";</div><div class='ctx'> 			clocks = &lt;&amp;cmu CLK_MFC&gt;, &lt;&amp;cmu CLK_SCLK_MFC&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_mfc&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sysmmu_mfc: sysmmu@13620000 {</div><div class='add'>+			compatible = "samsung,exynos-sysmmu";</div><div class='add'>+			reg = &lt;0x13620000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 96 0&gt;, &lt;0 98 0&gt;;</div><div class='add'>+			clock-names = "sysmmu", "master";</div><div class='add'>+			clocks = &lt;&amp;cmu CLK_SMMUMFC_L&gt;, &lt;&amp;cmu CLK_MFC&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial_0: serial@13800000 {</div><div class='ctx'> 			compatible = "samsung,exynos4210-uart";</div><div class='ctx'> 			reg = &lt;0x13800000 0x100&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi<br/>index e20cdc24c3bb..b0d52b1a646a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4.dtsi</a></div><div class='hunk'>@@ -78,7 +78,6 @@</div><div class='ctx'> </div><div class='ctx'> 	mipi_phy: video-phy@10020710 {</div><div class='ctx'> 		compatible = "samsung,s5pv210-mipi-video-phy";</div><div class='del'>-		reg = &lt;0x10020710 8&gt;;</div><div class='ctx'> 		#phy-cells = &lt;1&gt;;</div><div class='ctx'> 		syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -167,7 +166,7 @@</div><div class='ctx'> 		phys = &lt;&amp;mipi_phy 1&gt;;</div><div class='ctx'> 		phy-names = "dsim";</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_DSIM0&gt;, &lt;&amp;clock CLK_SCLK_MIPI0&gt;;</div><div class='del'>-		clock-names = "bus_clk", "pll_clk";</div><div class='add'>+		clock-names = "bus_clk", "sclk_mipi";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -190,6 +189,7 @@</div><div class='ctx'> 			clock-names = "fimc", "sclk_fimc";</div><div class='ctx'> 			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -201,6 +201,7 @@</div><div class='ctx'> 			clock-names = "fimc", "sclk_fimc";</div><div class='ctx'> 			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -212,6 +213,7 @@</div><div class='ctx'> 			clock-names = "fimc", "sclk_fimc";</div><div class='ctx'> 			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -223,6 +225,7 @@</div><div class='ctx'> 			clock-names = "fimc", "sclk_fimc";</div><div class='ctx'> 			power-domains = &lt;&amp;pd_cam&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -257,7 +260,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	watchdog@10060000 {</div><div class='add'>+	watchdog: watchdog@10060000 {</div><div class='ctx'> 		compatible = "samsung,s3c2410-wdt";</div><div class='ctx'> 		reg = &lt;0x10060000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 43 0&gt;;</div><div class='hunk'>@@ -266,7 +269,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@10070000 {</div><div class='add'>+	rtc: rtc@10070000 {</div><div class='ctx'> 		compatible = "samsung,s3c6410-rtc";</div><div class='ctx'> 		reg = &lt;0x10070000 0x100&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='hunk'>@@ -276,7 +279,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	keypad@100A0000 {</div><div class='add'>+	keypad: keypad@100A0000 {</div><div class='ctx'> 		compatible = "samsung,s5pv210-keypad";</div><div class='ctx'> 		reg = &lt;0x100A0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 109 0&gt;;</div><div class='hunk'>@@ -285,7 +288,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12510000 {</div><div class='add'>+	sdhci_0: sdhci@12510000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-sdhci";</div><div class='ctx'> 		reg = &lt;0x12510000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 73 0&gt;;</div><div class='hunk'>@@ -294,7 +297,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12520000 {</div><div class='add'>+	sdhci_1: sdhci@12520000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-sdhci";</div><div class='ctx'> 		reg = &lt;0x12520000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 74 0&gt;;</div><div class='hunk'>@@ -303,7 +306,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12530000 {</div><div class='add'>+	sdhci_2: sdhci@12530000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-sdhci";</div><div class='ctx'> 		reg = &lt;0x12530000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 75 0&gt;;</div><div class='hunk'>@@ -312,7 +315,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12540000 {</div><div class='add'>+	sdhci_3: sdhci@12540000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-sdhci";</div><div class='ctx'> 		reg = &lt;0x12540000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 76 0&gt;;</div><div class='hunk'>@@ -331,7 +334,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hsotg@12480000 {</div><div class='add'>+	hsotg: hsotg@12480000 {</div><div class='ctx'> 		compatible = "samsung,s3c6400-hsotg";</div><div class='ctx'> 		reg = &lt;0x12480000 0x20000&gt;;</div><div class='ctx'> 		interrupts = &lt;0 71 0&gt;;</div><div class='hunk'>@@ -342,7 +345,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ehci@12580000 {</div><div class='add'>+	ehci: ehci@12580000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-ehci";</div><div class='ctx'> 		reg = &lt;0x12580000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 70 0&gt;;</div><div class='hunk'>@@ -368,7 +371,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ohci@12590000 {</div><div class='add'>+	ohci: ohci@12590000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-ohci";</div><div class='ctx'> 		reg = &lt;0x12590000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 70 0&gt;;</div><div class='hunk'>@@ -417,6 +420,8 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_MFC&gt;, &lt;&amp;clock CLK_SCLK_MFC&gt;;</div><div class='ctx'> 		clock-names = "mfc", "sclk_mfc";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_mfc_l&gt;, &lt;&amp;sysmmu_mfc_r&gt;;</div><div class='add'>+		iommu-names = "left", "right";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -621,7 +626,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pwm@139D0000 {</div><div class='add'>+	pwm: pwm@139D0000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-pwm";</div><div class='ctx'> 		reg = &lt;0x139D0000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;0 37 0&gt;, &lt;0 38 0&gt;, &lt;0 39 0&gt;, &lt;0 40 0&gt;, &lt;0 41 0&gt;;</div><div class='hunk'>@@ -681,6 +686,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_SCLK_FIMD0&gt;, &lt;&amp;clock CLK_FIMD0&gt;;</div><div class='ctx'> 		clock-names = "sclk_fimd", "fimd";</div><div class='ctx'> 		power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_fimd0&gt;;</div><div class='ctx'> 		samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -689,6 +695,15 @@</div><div class='ctx'> 		#include "exynos4412-tmu-sensor-conf.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	jpeg_codec: jpeg-codec@11840000 {</div><div class='add'>+		compatible = "samsung,exynos4210-jpeg";</div><div class='add'>+		reg = &lt;0x11840000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 88 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clock CLK_JPEG&gt;;</div><div class='add'>+		clock-names = "jpeg";</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hdmi: hdmi@12D00000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-hdmi";</div><div class='ctx'> 		reg = &lt;0x12D00000 0x70000&gt;;</div><div class='hunk'>@@ -709,6 +724,7 @@</div><div class='ctx'> 		interrupts = &lt;0 91 0&gt;;</div><div class='ctx'> 		reg = &lt;0x12C10000 0x2100&gt;, &lt;0x12c00000 0x300&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_tv&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_tv&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -819,4 +835,114 @@</div><div class='ctx'> 		clock-names = "ppmu";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_l: sysmmu@13620000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13620000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 5&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCL&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_r: sysmmu@13630000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13630000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 6&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCR&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_tv: sysmmu@12E20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12E20000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 4&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_TV&gt;, &lt;&amp;clock CLK_MIXER&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_tv&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc0: sysmmu@11A20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11A20000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC0&gt;, &lt;&amp;clock CLK_FIMC0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc1: sysmmu@11A30000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11A30000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 3&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC1&gt;, &lt;&amp;clock CLK_FIMC1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc2: sysmmu@11A40000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11A40000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 4&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC2&gt;, &lt;&amp;clock CLK_FIMC2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc3: sysmmu@11A50000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11A50000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 5&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC3&gt;, &lt;&amp;clock CLK_FIMC3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_jpeg: sysmmu@11A60000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11A60000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 6&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_JPEG&gt;, &lt;&amp;clock CLK_JPEG&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_rotator: sysmmu@12A30000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12A30000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_ROTATOR&gt;, &lt;&amp;clock CLK_ROTATOR&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimd0: sysmmu@11E20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11E20000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMD0&gt;, &lt;&amp;clock CLK_FIMD0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts<br/>index b81146141402..e0abfc3324d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-origen.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4210-origen.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-origen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-origen.dts</a></div><div class='hunk'>@@ -50,209 +50,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	watchdog@10060000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@10070000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmu@100C0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12510000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus4 &amp;sd0_cd&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	g2d@12800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	codec@13400000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@13860000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		max8997_pmic@66 {</div><div class='del'>-			compatible = "maxim,max8997-pmic";</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='del'>-			interrupts = &lt;4 0&gt;, &lt;3 0&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck1-dvs-voltage = &lt;1350000&gt;;</div><div class='del'>-			max8997,pmic-buck2-dvs-voltage = &lt;1100000&gt;;</div><div class='del'>-			max8997,pmic-buck5-dvs-voltage = &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "VDD_ABB_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo2_reg: LDO2 {</div><div class='del'>-					regulator-name = "VDD_ALIVE_1.1V";</div><div class='del'>-					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "VMIPI_1.1V";</div><div class='del'>-					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo4_reg: LDO4 {</div><div class='del'>-					regulator-name = "VDD_RTC_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "VMIPI_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "VDD_AUD_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: LDO8 {</div><div class='del'>-					regulator-name = "VADC_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: LDO9 {</div><div class='del'>-					regulator-name = "DVDD_SWB_2.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: LDO10 {</div><div class='del'>-					regulator-name = "VDD_PLL_1.1V";</div><div class='del'>-					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "VDD_AUD_3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;3000000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo14_reg: LDO14 {</div><div class='del'>-					regulator-name = "AVDD18_SWB_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo17_reg: LDO17 {</div><div class='del'>-					regulator-name = "VDD_SWB_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo21_reg: LDO21 {</div><div class='del'>-					regulator-name = "VDD_MIF_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					/*</div><div class='del'>-					* HACK: The real name is VDD_ARM_1.2V,</div><div class='del'>-					* but exynos-cpufreq does not support</div><div class='del'>-					* DT-based regulator lookup yet.</div><div class='del'>-					*/</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1350000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "VDD_INT_1.1V";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "VDD_G3D_1.1V";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "VDDQ_M1M2_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck7_reg: BUCK7 {</div><div class='del'>-					regulator-name = "VDD_LCD_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -314,12 +111,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fimd@11c00000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;lcd_en &amp;lcd_clk &amp;lcd_data24 &amp;pwm0_out&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	display-timings {</div><div class='ctx'> 		native-mode = &lt;&amp;timing0&gt;;</div><div class='ctx'> 		timing0: timing {</div><div class='hunk'>@@ -335,3 +126,212 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;lcd_en &amp;lcd_clk &amp;lcd_data24 &amp;pwm0_out&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;g2d {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	max8997_pmic@66 {</div><div class='add'>+		compatible = "maxim,max8997-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;4 0&gt;, &lt;3 0&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck1-dvs-voltage = &lt;1350000&gt;;</div><div class='add'>+		max8997,pmic-buck2-dvs-voltage = &lt;1100000&gt;;</div><div class='add'>+		max8997,pmic-buck5-dvs-voltage = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "VDD_ABB_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: LDO2 {</div><div class='add'>+				regulator-name = "VDD_ALIVE_1.1V";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "VMIPI_1.1V";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: LDO4 {</div><div class='add'>+				regulator-name = "VDD_RTC_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "VMIPI_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "VDD_AUD_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: LDO8 {</div><div class='add'>+				regulator-name = "VADC_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: LDO9 {</div><div class='add'>+				regulator-name = "DVDD_SWB_2.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: LDO10 {</div><div class='add'>+				regulator-name = "VDD_PLL_1.1V";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "VDD_AUD_3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;3000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo14_reg: LDO14 {</div><div class='add'>+				regulator-name = "AVDD18_SWB_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo17_reg: LDO17 {</div><div class='add'>+				regulator-name = "VDD_SWB_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo21_reg: LDO21 {</div><div class='add'>+				regulator-name = "VDD_MIF_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				/*</div><div class='add'>+				* HACK: The real name is VDD_ARM_1.2V,</div><div class='add'>+				* but exynos-cpufreq does not support</div><div class='add'>+				* DT-based regulator lookup yet.</div><div class='add'>+				*/</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "VDD_INT_1.1V";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "VDD_G3D_1.1V";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "VDDQ_M1M2_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck7_reg: BUCK7 {</div><div class='add'>+				regulator-name = "VDD_LCD_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci_0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus4 &amp;sd0_cd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts<br/>index 86216fff1b4f..043b03caff8f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-smdkv310.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4210-smdkv310.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-smdkv310.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-smdkv310.dts</a></div><div class='hunk'>@@ -30,181 +30,181 @@</div><div class='ctx'> 		stdout-path = &amp;serial_1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		xxti {</div><div class='add'>+			compatible = "samsung,clock-xxti";</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	g2d@12800000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+		xusbxti {</div><div class='add'>+			compatible = "samsung,clock-xusbxti";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	codec@13400000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;g2d {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "samsung,24ad0xd1";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "samsung,24ad0xd1";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;keypad {</div><div class='add'>+	samsung,keypad-num-rows = &lt;2&gt;;</div><div class='add'>+	samsung,keypad-num-columns = &lt;8&gt;;</div><div class='add'>+	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,keypad-wakeup;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	key_1 {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;3&gt;;</div><div class='add'>+		linux,code = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl@11000000 {</div><div class='del'>-		keypad_rows: keypad-rows {</div><div class='del'>-			samsung,pins = "gpx2-0", "gpx2-1";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;3&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		keypad_cols: keypad-cols {</div><div class='del'>-			samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",</div><div class='del'>-				       "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_2 {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;4&gt;;</div><div class='add'>+		linux,code = &lt;3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	keypad@100A0000 {</div><div class='del'>-		samsung,keypad-num-rows = &lt;2&gt;;</div><div class='del'>-		samsung,keypad-num-columns = &lt;8&gt;;</div><div class='del'>-		linux,keypad-no-autorepeat;</div><div class='del'>-		linux,keypad-wakeup;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_3 {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;5&gt;;</div><div class='add'>+		linux,code = &lt;4&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_1 {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;3&gt;;</div><div class='del'>-			linux,code = &lt;2&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_4 {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;6&gt;;</div><div class='add'>+		linux,code = &lt;5&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_2 {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;4&gt;;</div><div class='del'>-			linux,code = &lt;3&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_5 {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;7&gt;;</div><div class='add'>+		linux,code = &lt;6&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_3 {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;5&gt;;</div><div class='del'>-			linux,code = &lt;4&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_a {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;3&gt;;</div><div class='add'>+		linux,code = &lt;30&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_4 {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;6&gt;;</div><div class='del'>-			linux,code = &lt;5&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_b {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;4&gt;;</div><div class='add'>+		linux,code = &lt;48&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_5 {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;7&gt;;</div><div class='del'>-			linux,code = &lt;6&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_c {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;5&gt;;</div><div class='add'>+		linux,code = &lt;46&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_a {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;3&gt;;</div><div class='del'>-			linux,code = &lt;30&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_d {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;6&gt;;</div><div class='add'>+		linux,code = &lt;32&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_b {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;4&gt;;</div><div class='del'>-			linux,code = &lt;48&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_e {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;7&gt;;</div><div class='add'>+		linux,code = &lt;18&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		key_c {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;5&gt;;</div><div class='del'>-			linux,code = &lt;46&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		key_d {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;6&gt;;</div><div class='del'>-			linux,code = &lt;32&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	keypad_rows: keypad-rows {</div><div class='add'>+		samsung,pins = "gpx2-0", "gpx2-1";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;3&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_e {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;7&gt;;</div><div class='del'>-			linux,code = &lt;18&gt;;</div><div class='del'>-		};</div><div class='add'>+	keypad_cols: keypad-cols {</div><div class='add'>+		samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",</div><div class='add'>+			       "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c@13860000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		eeprom@50 {</div><div class='del'>-			compatible = "samsung,24ad0xd1";</div><div class='del'>-			reg = &lt;0x50&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		eeprom@52 {</div><div class='del'>-			compatible = "samsung,24ad0xd1";</div><div class='del'>-			reg = &lt;0x52&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	spi_2: spi@13940000 {</div><div class='del'>-		cs-gpios = &lt;&amp;gpc1 2 0&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		w25x80@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "w25x80";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			controller-data {</div><div class='del'>-				samsung,spi-feedback-delay = &lt;0&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			partition@0 {</div><div class='del'>-				label = "U-Boot";</div><div class='del'>-				reg = &lt;0x0 0x40000&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='add'>+&amp;spi_2 {</div><div class='add'>+	cs-gpios = &lt;&amp;gpc1 2 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-			partition@40000 {</div><div class='del'>-				label = "Kernel";</div><div class='del'>-				reg = &lt;0x40000 0xc0000&gt;;</div><div class='del'>-			};</div><div class='add'>+	w25x80@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "w25x80";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		controller-data {</div><div class='add'>+			samsung,spi-feedback-delay = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		xxti {</div><div class='del'>-			compatible = "samsung,clock-xxti";</div><div class='del'>-			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		partition@0 {</div><div class='add'>+			label = "U-Boot";</div><div class='add'>+			reg = &lt;0x0 0x40000&gt;;</div><div class='add'>+			read-only;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		xusbxti {</div><div class='del'>-			compatible = "samsung,clock-xusbxti";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		partition@40000 {</div><div class='add'>+			label = "Kernel";</div><div class='add'>+			reg = &lt;0x40000 0xc0000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts<br/>index 32c5fd8f6269..98f3ce65cb9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-trats.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4210-trats.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210-trats.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210-trats.dts</a></div><div class='hunk'>@@ -89,42 +89,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hsotg@12480000 {</div><div class='del'>-		vusb_d-supply = &lt;&amp;vusb_reg&gt;;</div><div class='del'>-		vusb_a-supply = &lt;&amp;vusbdac_reg&gt;;</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci_emmc: sdhci@12510000 {</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		non-removable;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus8&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;vemmc_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	exynos-usbphy@125B0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='hunk'>@@ -158,201 +122,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@13890000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c3_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		mms114-touchscreen@48 {</div><div class='del'>-			compatible = "melfas,mms114";</div><div class='del'>-			reg = &lt;0x48&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='del'>-			interrupts = &lt;4 2&gt;;</div><div class='del'>-			x-size = &lt;720&gt;;</div><div class='del'>-			y-size = &lt;1280&gt;;</div><div class='del'>-			avdd-supply = &lt;&amp;tsp_reg&gt;;</div><div class='del'>-			vdd-supply = &lt;&amp;tsp_reg&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@138B0000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c5_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		max8997_pmic@66 {</div><div class='del'>-			compatible = "maxim,max8997-pmic";</div><div class='del'>-</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck1-uses-gpio-dvs;</div><div class='del'>-			max8997,pmic-buck2-uses-gpio-dvs;</div><div class='del'>-			max8997,pmic-buck5-uses-gpio-dvs;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-ignore-gpiodvs-side-effect;</div><div class='del'>-			max8997,pmic-buck125-default-dvs-idx = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck125-dvs-gpios = &lt;&amp;gpx0 5 0&gt;,</div><div class='del'>-						         &lt;&amp;gpx0 6 0&gt;,</div><div class='del'>-							 &lt;&amp;gpl0 0 0&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck1-dvs-voltage = &lt;1350000&gt;, &lt;1300000&gt;,</div><div class='del'>-							 &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1150000&gt;, &lt;1100000&gt;,</div><div class='del'>-							 &lt;1000000&gt;, &lt;950000&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck2-dvs-voltage = &lt;1100000&gt;, &lt;1000000&gt;,</div><div class='del'>-							 &lt;950000&gt;,  &lt;900000&gt;,</div><div class='del'>-							 &lt;1100000&gt;, &lt;1000000&gt;,</div><div class='del'>-							 &lt;950000&gt;,  &lt;900000&gt;;</div><div class='del'>-</div><div class='del'>-			max8997,pmic-buck5-dvs-voltage = &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				valive_reg: LDO2 {</div><div class='del'>-				     regulator-name = "VALIVE_1.1V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vusb_reg: LDO3 {</div><div class='del'>-				     regulator-name = "VUSB_1.1V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vmipi_reg: LDO4 {</div><div class='del'>-				     regulator-name = "VMIPI_1.8V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vpda_reg: LDO6 {</div><div class='del'>-				     regulator-name = "VCC_1.8V_PDA";</div><div class='del'>-				     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vcam_reg: LDO7 {</div><div class='del'>-				     regulator-name = "CAM_ISP_1.8V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vusbdac_reg: LDO8 {</div><div class='del'>-				     regulator-name = "VUSB/VDAC_3.3V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vccpda_reg: LDO9 {</div><div class='del'>-				     regulator-name = "VCC_2.8V_PDA";</div><div class='del'>-				     regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vpll_reg: LDO10 {</div><div class='del'>-				     regulator-name = "VPLL_1.1V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vtcam_reg: LDO12 {</div><div class='del'>-				     regulator-name = "VT_CAM_1.8V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vcclcd_reg: LDO13 {</div><div class='del'>-				     regulator-name = "VCC_3.3V_LCD";</div><div class='del'>-				     regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vlcd_reg: LDO15 {</div><div class='del'>-				     regulator-name = "VLCD_2.2V";</div><div class='del'>-				     regulator-min-microvolt = &lt;2200000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;2200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				camsensor_reg: LDO16 {</div><div class='del'>-				     regulator-name = "CAM_SENSOR_IO_1.8V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vddq_reg: LDO21 {</div><div class='del'>-				     regulator-name = "VDDQ_M1M2_1.2V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				varm_breg: BUCK1 {</div><div class='del'>-				     /*</div><div class='del'>-				      * HACK: The real name is VARM_1.2V_C210,</div><div class='del'>-				      * but exynos-cpufreq does not support</div><div class='del'>-				      * DT-based regulator lookup yet.</div><div class='del'>-				      */</div><div class='del'>-				     regulator-name = "vdd_arm";</div><div class='del'>-				     regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vint_breg: BUCK2 {</div><div class='del'>-				     regulator-name = "VINT_1.1V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				camisp_breg: BUCK4 {</div><div class='del'>-				     regulator-name = "CAM_ISP_CORE_1.2V";</div><div class='del'>-				     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vmem_breg: BUCK5 {</div><div class='del'>-				     regulator-name = "VMEM_1.2V_C210";</div><div class='del'>-				     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vccsub_breg: BUCK7 {</div><div class='del'>-				     regulator-name = "VCC_SUB_2.0V";</div><div class='del'>-				     regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-				     regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				safe1_sreg: ESAFEOUT1 {</div><div class='del'>-				     regulator-name = "SAFEOUT1";</div><div class='del'>-				     regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				safe2_sreg: ESAFEOUT2 {</div><div class='del'>-				     regulator-name = "SAFEOUT2";</div><div class='del'>-				     regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	fixed-rate-clocks {</div><div class='ctx'> 		xxti {</div><div class='ctx'> 			compatible = "samsung,clock-xxti";</div><div class='hunk'>@@ -365,71 +134,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dsi_0: dsi@11C80000 {</div><div class='del'>-		vddcore-supply = &lt;&amp;vusb_reg&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;vmipi_reg&gt;;</div><div class='del'>-		samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				dsi_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='del'>-					samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='del'>-					samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		panel@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			compatible = "samsung,s6e8aa0";</div><div class='del'>-			vdd3-supply = &lt;&amp;vcclcd_reg&gt;;</div><div class='del'>-			vci-supply = &lt;&amp;vlcd_reg&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpy4 5 0&gt;;</div><div class='del'>-			power-on-delay= &lt;50&gt;;</div><div class='del'>-			reset-delay = &lt;100&gt;;</div><div class='del'>-			init-delay = &lt;100&gt;;</div><div class='del'>-			flip-horizontal;</div><div class='del'>-			flip-vertical;</div><div class='del'>-			panel-width-mm = &lt;58&gt;;</div><div class='del'>-			panel-height-mm = &lt;103&gt;;</div><div class='del'>-</div><div class='del'>-			display-timings {</div><div class='del'>-				timing-0 {</div><div class='del'>-					clock-frequency = &lt;57153600&gt;;</div><div class='del'>-					hactive = &lt;720&gt;;</div><div class='del'>-					vactive = &lt;1280&gt;;</div><div class='del'>-					hfront-porch = &lt;5&gt;;</div><div class='del'>-					hback-porch = &lt;5&gt;;</div><div class='del'>-					hsync-len = &lt;5&gt;;</div><div class='del'>-					vfront-porch = &lt;13&gt;;</div><div class='del'>-					vback-porch = &lt;1&gt;;</div><div class='del'>-					vsync-len = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				dsi_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fimd@11c00000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmu@100C0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	thermal-zones {</div><div class='ctx'> 		cpu_thermal: cpu-thermal {</div><div class='ctx'> 			cooling-maps {</div><div class='hunk'>@@ -483,3 +187,299 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dsi_0 {</div><div class='add'>+	vddcore-supply = &lt;&amp;vusb_reg&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;vmipi_reg&gt;;</div><div class='add'>+	samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dsi_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='add'>+				samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='add'>+				samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "samsung,s6e8aa0";</div><div class='add'>+		vdd3-supply = &lt;&amp;vcclcd_reg&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vlcd_reg&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpy4 5 0&gt;;</div><div class='add'>+		power-on-delay= &lt;50&gt;;</div><div class='add'>+		reset-delay = &lt;100&gt;;</div><div class='add'>+		init-delay = &lt;100&gt;;</div><div class='add'>+		flip-horizontal;</div><div class='add'>+		flip-vertical;</div><div class='add'>+		panel-width-mm = &lt;58&gt;;</div><div class='add'>+		panel-height-mm = &lt;103&gt;;</div><div class='add'>+</div><div class='add'>+		display-timings {</div><div class='add'>+			timing-0 {</div><div class='add'>+				clock-frequency = &lt;57153600&gt;;</div><div class='add'>+				hactive = &lt;720&gt;;</div><div class='add'>+				vactive = &lt;1280&gt;;</div><div class='add'>+				hfront-porch = &lt;5&gt;;</div><div class='add'>+				hback-porch = &lt;5&gt;;</div><div class='add'>+				hsync-len = &lt;5&gt;;</div><div class='add'>+				vfront-porch = &lt;13&gt;;</div><div class='add'>+				vback-porch = &lt;1&gt;;</div><div class='add'>+				vsync-len = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;exynos_usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsotg {</div><div class='add'>+	vusb_d-supply = &lt;&amp;vusb_reg&gt;;</div><div class='add'>+	vusb_a-supply = &lt;&amp;vusbdac_reg&gt;;</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_3 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mms114-touchscreen@48 {</div><div class='add'>+		compatible = "melfas,mms114";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;4 2&gt;;</div><div class='add'>+		x-size = &lt;720&gt;;</div><div class='add'>+		y-size = &lt;1280&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;tsp_reg&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;tsp_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_5 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	max8997_pmic@66 {</div><div class='add'>+		compatible = "maxim,max8997-pmic";</div><div class='add'>+</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck1-uses-gpio-dvs;</div><div class='add'>+		max8997,pmic-buck2-uses-gpio-dvs;</div><div class='add'>+		max8997,pmic-buck5-uses-gpio-dvs;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-ignore-gpiodvs-side-effect;</div><div class='add'>+		max8997,pmic-buck125-default-dvs-idx = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck125-dvs-gpios = &lt;&amp;gpx0 5 0&gt;,</div><div class='add'>+						 &lt;&amp;gpx0 6 0&gt;,</div><div class='add'>+						 &lt;&amp;gpl0 0 0&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck1-dvs-voltage = &lt;1350000&gt;, &lt;1300000&gt;,</div><div class='add'>+						 &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1150000&gt;, &lt;1100000&gt;,</div><div class='add'>+						 &lt;1000000&gt;, &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck2-dvs-voltage = &lt;1100000&gt;, &lt;1000000&gt;,</div><div class='add'>+						 &lt;950000&gt;,  &lt;900000&gt;,</div><div class='add'>+						 &lt;1100000&gt;, &lt;1000000&gt;,</div><div class='add'>+						 &lt;950000&gt;,  &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+		max8997,pmic-buck5-dvs-voltage = &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			valive_reg: LDO2 {</div><div class='add'>+			     regulator-name = "VALIVE_1.1V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vusb_reg: LDO3 {</div><div class='add'>+			     regulator-name = "VUSB_1.1V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vmipi_reg: LDO4 {</div><div class='add'>+			     regulator-name = "VMIPI_1.8V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vpda_reg: LDO6 {</div><div class='add'>+			     regulator-name = "VCC_1.8V_PDA";</div><div class='add'>+			     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcam_reg: LDO7 {</div><div class='add'>+			     regulator-name = "CAM_ISP_1.8V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vusbdac_reg: LDO8 {</div><div class='add'>+			     regulator-name = "VUSB/VDAC_3.3V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccpda_reg: LDO9 {</div><div class='add'>+			     regulator-name = "VCC_2.8V_PDA";</div><div class='add'>+			     regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vpll_reg: LDO10 {</div><div class='add'>+			     regulator-name = "VPLL_1.1V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vtcam_reg: LDO12 {</div><div class='add'>+			     regulator-name = "VT_CAM_1.8V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcclcd_reg: LDO13 {</div><div class='add'>+			     regulator-name = "VCC_3.3V_LCD";</div><div class='add'>+			     regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vlcd_reg: LDO15 {</div><div class='add'>+			     regulator-name = "VLCD_2.2V";</div><div class='add'>+			     regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			camsensor_reg: LDO16 {</div><div class='add'>+			     regulator-name = "CAM_SENSOR_IO_1.8V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_reg: LDO21 {</div><div class='add'>+			     regulator-name = "VDDQ_M1M2_1.2V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			varm_breg: BUCK1 {</div><div class='add'>+			     /*</div><div class='add'>+			      * HACK: The real name is VARM_1.2V_C210,</div><div class='add'>+			      * but exynos-cpufreq does not support</div><div class='add'>+			      * DT-based regulator lookup yet.</div><div class='add'>+			      */</div><div class='add'>+			     regulator-name = "vdd_arm";</div><div class='add'>+			     regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vint_breg: BUCK2 {</div><div class='add'>+			     regulator-name = "VINT_1.1V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			camisp_breg: BUCK4 {</div><div class='add'>+			     regulator-name = "CAM_ISP_CORE_1.2V";</div><div class='add'>+			     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vmem_breg: BUCK5 {</div><div class='add'>+			     regulator-name = "VMEM_1.2V_C210";</div><div class='add'>+			     regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccsub_breg: BUCK7 {</div><div class='add'>+			     regulator-name = "VCC_SUB_2.0V";</div><div class='add'>+			     regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+			     regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			safe1_sreg: ESAFEOUT1 {</div><div class='add'>+			     regulator-name = "SAFEOUT1";</div><div class='add'>+			     regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			safe2_sreg: ESAFEOUT2 {</div><div class='add'>+			     regulator-name = "SAFEOUT2";</div><div class='add'>+			     regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci_0 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus8&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;vemmc_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi<br/>index be89f83f70e7..10d3c173396e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4210.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4210.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4210.dtsi</a></div><div class='hunk'>@@ -52,17 +52,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu_system_controller: system-controller@10020000 {</div><div class='del'>-		clock-names = "clkout0", "clkout1", "clkout2", "clkout3",</div><div class='del'>-				"clkout4", "clkout8", "clkout9";</div><div class='del'>-		clocks = &lt;&amp;clock CLK_OUT_DMC&gt;, &lt;&amp;clock CLK_OUT_TOP&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_OUT_LEFTBUS&gt;, &lt;&amp;clock CLK_OUT_RIGHTBUS&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_OUT_CPU&gt;, &lt;&amp;clock CLK_XXTI&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sysram@02020000 {</div><div class='add'>+	sysram: sysram@02020000 {</div><div class='ctx'> 		compatible = "mmio-sram";</div><div class='ctx'> 		reg = &lt;0x02020000 0x20000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -95,19 +85,7 @@</div><div class='ctx'> 		arm,data-latency = &lt;2 2 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gic: interrupt-controller@10490000 {</div><div class='del'>-		cpu-offset = &lt;0x8000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	combiner: interrupt-controller@10440000 {</div><div class='del'>-		samsung,combiner-nr = &lt;16&gt;;</div><div class='del'>-		interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='del'>-			     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='del'>-			     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='del'>-			     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mct@10050000 {</div><div class='add'>+	mct: mct@10050000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-mct";</div><div class='ctx'> 		reg = &lt;0x10050000 0x800&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;mct_map&gt;;</div><div class='hunk'>@@ -189,12 +167,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	g2d@12800000 {</div><div class='add'>+	g2d: g2d@12800000 {</div><div class='ctx'> 		compatible = "samsung,s5pv210-g2d";</div><div class='ctx'> 		reg = &lt;0x12800000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;0 89 0&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_SCLK_FIMG2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='ctx'> 		clock-names = "sclk_fimg2d", "fimg2d";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_g2d&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -244,4 +223,47 @@</div><div class='ctx'> 		clock-names = "ppmu";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sysmmu_g2d: sysmmu@12A20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12A20000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 7&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_G2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimd1: sysmmu@12220000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		reg = &lt;0x12220000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;5 3&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_lcd1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gic {</div><div class='add'>+	cpu-offset = &lt;0x8000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combiner {</div><div class='add'>+	samsung,combiner-nr = &lt;16&gt;;</div><div class='add'>+	interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='add'>+		     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='add'>+		     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='add'>+		     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_system_controller {</div><div class='add'>+	clock-names = "clkout0", "clkout1", "clkout2", "clkout3",</div><div class='add'>+			"clkout4", "clkout8", "clkout9";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_OUT_DMC&gt;, &lt;&amp;clock CLK_OUT_TOP&gt;,</div><div class='add'>+		&lt;&amp;clock CLK_OUT_LEFTBUS&gt;, &lt;&amp;clock CLK_OUT_RIGHTBUS&gt;,</div><div class='add'>+		&lt;&amp;clock CLK_OUT_CPU&gt;, &lt;&amp;clock CLK_XXTI&gt;, &lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi<br/>index 5be03288f1ee..d9c8efeef208 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4212.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4212.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4212.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4212.dtsi</a></div><div class='hunk'>@@ -41,12 +41,12 @@</div><div class='ctx'> 			reg = &lt;0xA01&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	combiner: interrupt-controller@10440000 {</div><div class='del'>-		samsung,combiner-nr = &lt;18&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;combiner {</div><div class='add'>+	samsung,combiner-nr = &lt;18&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	gic: interrupt-controller@10490000 {</div><div class='del'>-		cpu-offset = &lt;0x8000&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;gic {</div><div class='add'>+	cpu-offset = &lt;0x8000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi<br/>index d6b49e5b32e9..ca7d168d1dd6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-odroid-common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-odroid-common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-odroid-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-odroid-common.dtsi</a></div><div class='hunk'>@@ -38,16 +38,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s0: i2s@03830000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2s0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-		clocks = &lt;&amp;clock_audss EXYNOS_I2S_BUS&gt;,</div><div class='del'>-			 &lt;&amp;clock_audss EXYNOS_DOUT_AUD_BUS&gt;,</div><div class='del'>-			 &lt;&amp;clock_audss EXYNOS_SCLK_I2S&gt;;</div><div class='del'>-		clock-names = "iis", "i2s_opclk0", "i2s_opclk1";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	sound: sound {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		assigned-clocks = &lt;&amp;clock_audss EXYNOS_MOUT_AUDSS&gt;,</div><div class='hunk'>@@ -83,427 +73,437 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpk1 2 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc@12550000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo20_reg &amp;buck8_reg&gt;;</div><div class='del'>-		mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		num-slots = &lt;1&gt;;</div><div class='del'>-		broken-cd;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		cap-mmc-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog@10060000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@10070000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		clocks = &lt;&amp;clock CLK_RTC&gt;, &lt;&amp;max77686 MAX77686_CLK_AP&gt;;</div><div class='del'>-		clock-names = "rtc", "rtc_src";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	g2d@10800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	camera {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		fimc_0: fimc@11800000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC0&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_1: fimc@11810000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC1&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC1&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		xxti {</div><div class='add'>+			compatible = "samsung,clock-xxti";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		fimc_2: fimc@11820000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC2&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC2&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+		xusbxti {</div><div class='add'>+			compatible = "samsung,clock-xusbxti";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		fimc_3: fimc@11830000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC3&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC3&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu_thermal: cpu-thermal {</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+				     /* Corresponds to 800MHz at freq_table */</div><div class='add'>+				     cooling-device = &lt;&amp;cpu0 7 7&gt;;</div><div class='add'>+				};</div><div class='add'>+				map1 {</div><div class='add'>+				     /* Corresponds to 200MHz at freq_table */</div><div class='add'>+				     cooling-device = &lt;&amp;cpu0 13 13&gt;;</div><div class='add'>+			       };</div><div class='add'>+		       };</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo4_reg &amp;ldo21_reg&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpk2 2 0&gt;;</div><div class='del'>-		cd-inverted;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+/* RSTN signal for eMMC */</div><div class='add'>+&amp;sd1_cd {</div><div class='add'>+	samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+	samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	gpio_power_key: power_key {</div><div class='add'>+		samsung,pins = "gpx1-3";</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	max77686_irq: max77686-irq {</div><div class='add'>+		samsung,pins = "gpx3-2";</div><div class='add'>+		samsung,pin-function = &lt;0&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		xxti {</div><div class='del'>-			compatible = "samsung,clock-xxti";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		xusbxti {</div><div class='del'>-			compatible = "samsung,clock-xusbxti";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	hdmi_hpd: hdmi-hpd {</div><div class='add'>+		samsung,pins = "gpx3-7";</div><div class='add'>+		samsung,pin-pud = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c@13860000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		usb3503: usb3503@08 {</div><div class='del'>-			compatible = "smsc,usb3503";</div><div class='del'>-			reg = &lt;0x08&gt;;</div><div class='add'>+&amp;exynos_usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			intn-gpios = &lt;&amp;gpx3 0 0&gt;;</div><div class='del'>-			connect-gpios = &lt;&amp;gpx3 4 0&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpx3 5 0&gt;;</div><div class='del'>-			initial-mode = &lt;1&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;fimc_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC0&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		max77686: pmic@09 {</div><div class='del'>-			compatible = "maxim,max77686";</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='del'>-			interrupts = &lt;2 0&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;max77686_irq&gt;;</div><div class='del'>-			reg = &lt;0x09&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			voltage-regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "VDD_ALIVE_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+&amp;fimc_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC1&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo2_reg: LDO2 {</div><div class='del'>-					regulator-name = "VDDQ_M1_2_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+&amp;fimc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC2&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "VDDQ_EXT_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+&amp;fimc_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC3&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo4_reg: LDO4 {</div><div class='del'>-					regulator-name = "VDDQ_MMC2_2.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+&amp;g2d {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo5_reg: LDO5 {</div><div class='del'>-					regulator-name = "VDDQ_MMC1_3_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_hpd&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+	vdd_osc-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	vdd_pll-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+	ddc = &lt;&amp;i2c_2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "VDD10_MPLL_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+&amp;hsotg {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+	vusb_d-supply = &lt;&amp;ldo15_reg&gt;;</div><div class='add'>+	vusb_a-supply = &lt;&amp;ldo12_reg&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "VDD10_XPLL_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usb3503: usb3503@08 {</div><div class='add'>+		compatible = "smsc,usb3503";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		intn-gpios = &lt;&amp;gpx3 0 0&gt;;</div><div class='add'>+		connect-gpios = &lt;&amp;gpx3 4 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpx3 5 0&gt;;</div><div class='add'>+		initial-mode = &lt;1&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-				ldo8_reg: ldo@8 {</div><div class='del'>-					regulator-compatible = "LDO8";</div><div class='del'>-					regulator-name = "VDD10_HDMI_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='add'>+	max77686: pmic@09 {</div><div class='add'>+		compatible = "maxim,max77686";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='add'>+		interrupts = &lt;2 0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;max77686_irq&gt;;</div><div class='add'>+		reg = &lt;0x09&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		voltage-regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "VDD_ALIVE_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo10_reg: ldo@10 {</div><div class='del'>-					regulator-compatible = "LDO10";</div><div class='del'>-					regulator-name = "VDDQ_MIPIHSI_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='add'>+			ldo2_reg: LDO2 {</div><div class='add'>+				regulator-name = "VDDQ_M1_2_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "VDD18_ABB1_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "VDDQ_EXT_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo12_reg: LDO12 {</div><div class='del'>-					regulator-name = "VDD33_USB_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo4_reg: LDO4 {</div><div class='add'>+				regulator-name = "VDDQ_MMC2_2.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo13_reg: LDO13 {</div><div class='del'>-					regulator-name = "VDDQ_C2C_W_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-name = "VDDQ_MMC1_3_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo14_reg: LDO14 {</div><div class='del'>-					regulator-name = "VDD18_ABB0_2_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "VDD10_MPLL_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo15_reg: LDO15 {</div><div class='del'>-					regulator-name = "VDD10_HSIC_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "VDD10_XPLL_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo16_reg: LDO16 {</div><div class='del'>-					regulator-name = "VDD18_HSIC_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo8_reg: ldo@8 {</div><div class='add'>+				regulator-compatible = "LDO8";</div><div class='add'>+				regulator-name = "VDD10_HDMI_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo20_reg: LDO20 {</div><div class='del'>-					regulator-name = "LDO20_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo10_reg: ldo@10 {</div><div class='add'>+				regulator-compatible = "LDO10";</div><div class='add'>+				regulator-name = "VDDQ_MIPIHSI_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo21_reg: LDO21 {</div><div class='del'>-					regulator-name = "LDO21_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "VDD18_ABB1_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				ldo25_reg: LDO25 {</div><div class='del'>-					regulator-name = "VDDQ_LCD_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo12_reg: LDO12 {</div><div class='add'>+				regulator-name = "VDD33_USB_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					regulator-name = "vdd_mif";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo13_reg: LDO13 {</div><div class='add'>+				regulator-name = "VDDQ_C2C_W_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo14_reg: LDO14 {</div><div class='add'>+				regulator-name = "VDD18_ABB0_2_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "vdd_int";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo15_reg: LDO15 {</div><div class='add'>+				regulator-name = "VDD10_HSIC_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck4_reg: BUCK4 {</div><div class='del'>-					regulator-name = "vdd_g3d";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-microvolt-offset = &lt;50000&gt;;</div><div class='del'>-				};</div><div class='add'>+			ldo16_reg: LDO16 {</div><div class='add'>+				regulator-name = "VDD18_HSIC_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "VDDQ_CKEM1_2_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo20_reg: LDO20 {</div><div class='add'>+				regulator-name = "LDO20_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck6_reg: BUCK6 {</div><div class='del'>-					regulator-name = "BUCK6_1.35V";</div><div class='del'>-					regulator-min-microvolt = &lt;1350000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo21_reg: LDO21 {</div><div class='add'>+				regulator-name = "LDO21_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck7_reg: BUCK7 {</div><div class='del'>-					regulator-name = "BUCK7_2.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='add'>+			ldo25_reg: LDO25 {</div><div class='add'>+				regulator-name = "VDDQ_LCD_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				buck8_reg: BUCK8 {</div><div class='del'>-					regulator-name = "BUCK8_2.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				regulator-name = "vdd_mif";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	i2c@13870000 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c1_bus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-		max98090: max98090@10 {</div><div class='del'>-			compatible = "maxim,max98090";</div><div class='del'>-			reg = &lt;0x10&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='del'>-			interrupts = &lt;0 0&gt;;</div><div class='del'>-			clocks = &lt;&amp;i2s0 CLK_I2S_CDCLK&gt;;</div><div class='del'>-			clock-names = "mclk";</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	exynos-usbphy@125B0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "vdd_int";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	hsotg@12480000 {</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-		status = "okay";</div><div class='del'>-		vusb_d-supply = &lt;&amp;ldo15_reg&gt;;</div><div class='del'>-		vusb_a-supply = &lt;&amp;ldo12_reg&gt;;</div><div class='del'>-	};</div><div class='add'>+			buck4_reg: BUCK4 {</div><div class='add'>+				regulator-name = "vdd_g3d";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-microvolt-offset = &lt;50000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	ehci: ehci@12580000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "VDDQ_CKEM1_2_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	tmu@100C0000 {</div><div class='del'>-		vtmu-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+			buck6_reg: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6_1.35V";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	thermal-zones {</div><div class='del'>-		cpu_thermal: cpu-thermal {</div><div class='del'>-			cooling-maps {</div><div class='del'>-				map0 {</div><div class='del'>-				     /* Corresponds to 800MHz at freq_table */</div><div class='del'>-				     cooling-device = &lt;&amp;cpu0 7 7&gt;;</div><div class='del'>-				};</div><div class='del'>-				map1 {</div><div class='del'>-				     /* Corresponds to 200MHz at freq_table */</div><div class='del'>-				     cooling-device = &lt;&amp;cpu0 13 13&gt;;</div><div class='del'>-			       };</div><div class='del'>-		       };</div><div class='add'>+			buck7_reg: BUCK7 {</div><div class='add'>+				regulator-name = "BUCK7_2.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck8_reg: BUCK8 {</div><div class='add'>+				regulator-name = "BUCK8_2.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	mixer: mixer@12C10000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;i2c_1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	max98090: max98090@10 {</div><div class='add'>+		compatible = "maxim,max98090";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;0 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;i2s0 CLK_I2S_CDCLK&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	hdmi@12D00000 {</div><div class='del'>-		hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hdmi_hpd&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='del'>-		vdd_osc-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-		vdd_pll-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='del'>-		ddc = &lt;&amp;hdmi_ddc&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;i2c_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_bus&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	hdmi_ddc: i2c@13880000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c2_bus&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;i2c_8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c@138E0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;clock_audss EXYNOS_I2S_BUS&gt;,</div><div class='add'>+		 &lt;&amp;clock_audss EXYNOS_DOUT_AUD_BUS&gt;,</div><div class='add'>+		 &lt;&amp;clock_audss EXYNOS_SCLK_I2S&gt;;</div><div class='add'>+	clock-names = "iis", "i2s_opclk0", "i2s_opclk1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* RSTN signal for eMMC */</div><div class='del'>-&amp;sd1_cd {</div><div class='del'>-	samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-	samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+&amp;mixer {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pinctrl_1 {</div><div class='del'>-	gpio_power_key: power_key {</div><div class='del'>-		samsung,pins = "gpx1-3";</div><div class='del'>-		samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;mshc_0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo20_reg &amp;buck8_reg&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	max77686_irq: max77686-irq {</div><div class='del'>-		samsung,pins = "gpx3-2";</div><div class='del'>-		samsung,pin-function = &lt;0&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;, &lt;&amp;max77686 MAX77686_CLK_AP&gt;;</div><div class='add'>+	clock-names = "rtc", "rtc_src";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	hdmi_hpd: hdmi-hpd {</div><div class='del'>-		samsung,pins = "gpx3-7";</div><div class='del'>-		samsung,pin-pud = &lt;1&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo4_reg &amp;ldo21_reg&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpk2 2 0&gt;;</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tmu {</div><div class='add'>+	vtmu-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts<br/>index cb1cfe7239c4..679ac103ebf6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-odroidx.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-odroidx.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-odroidx.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-odroidx.dts</a></div><div class='hunk'>@@ -38,14 +38,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;gpio_power_key &amp;gpio_home_key&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -83,3 +75,11 @@</div><div class='ctx'> 		samsung,pin-pud = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts<br/>index bd8b73077d41..84c76310b312 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-origen.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-origen.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-origen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-origen.dts</a></div><div class='hunk'>@@ -50,485 +50,485 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	watchdog@10060000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@10070000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	display-timings {</div><div class='add'>+		native-mode = &lt;&amp;timing0&gt;;</div><div class='add'>+		timing0: timing {</div><div class='add'>+			clock-frequency = &lt;47500000&gt;;</div><div class='add'>+			hactive = &lt;1024&gt;;</div><div class='add'>+			vactive = &lt;600&gt;;</div><div class='add'>+			hfront-porch = &lt;64&gt;;</div><div class='add'>+			hback-porch = &lt;16&gt;;</div><div class='add'>+			hsync-len = &lt;48&gt;;</div><div class='add'>+			vback-porch = &lt;64&gt;;</div><div class='add'>+			vfront-porch = &lt;16&gt;;</div><div class='add'>+			vsync-len = &lt;3&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl@11000000 {</div><div class='del'>-		keypad_rows: keypad-rows {</div><div class='del'>-			samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;3&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		xxti {</div><div class='add'>+			compatible = "samsung,clock-xxti";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		keypad_cols: keypad-cols {</div><div class='del'>-			samsung,pins = "gpx1-0", "gpx1-1";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+		xusbxti {</div><div class='add'>+			compatible = "samsung,clock-xusbxti";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	keypad@100A0000 {</div><div class='del'>-		samsung,keypad-num-rows = &lt;3&gt;;</div><div class='del'>-		samsung,keypad-num-columns = &lt;2&gt;;</div><div class='del'>-		linux,keypad-no-autorepeat;</div><div class='del'>-		linux,keypad-wakeup;</div><div class='del'>-		pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		key_home {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;0&gt;;</div><div class='del'>-			linux,code = &lt;KEY_HOME&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;fimd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;lcd_clk &amp;lcd_data24 &amp;pwm1_out&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		key_down {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_DOWN&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;g2d {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		key_up {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;0&gt;;</div><div class='del'>-			linux,code = &lt;KEY_UP&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s5m8767_pmic@66 {</div><div class='add'>+		compatible = "samsung,s5m8767-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck-default-dvs-idx = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck-dvs-gpios = &lt;&amp;gpx2 3 0&gt;,</div><div class='add'>+						 &lt;&amp;gpx2 4 0&gt;,</div><div class='add'>+						 &lt;&amp;gpx2 5 0&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck-ds-gpios = &lt;&amp;gpm3 5 0&gt;,</div><div class='add'>+						&lt;&amp;gpm3 6 0&gt;,</div><div class='add'>+						&lt;&amp;gpm3 7 0&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck2-dvs-voltage = &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck3-dvs-voltage = &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='add'>+						 &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='add'>+						 &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='add'>+						 &lt;1100000&gt;, &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+		s5m8767,pmic-buck4-dvs-voltage = &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='add'>+						 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "VDD_ALIVE";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		key_menu {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_MENU&gt;;</div><div class='del'>-		};</div><div class='add'>+			ldo2_reg: LDO2 {</div><div class='add'>+				regulator-name = "VDDQ_M12";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		key_back {</div><div class='del'>-			keypad,row = &lt;2&gt;;</div><div class='del'>-			keypad,column = &lt;0&gt;;</div><div class='del'>-			linux,code = &lt;KEY_BACK&gt;;</div><div class='del'>-		};</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "VDDIOAP_18";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: LDO4 {</div><div class='add'>+				regulator-name = "VDDQ_PRE";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-name = "VDD18_2M";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "VDD10_MPLL";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "VDD10_XPLL";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: LDO8 {</div><div class='add'>+				regulator-name = "VDD10_MIPI";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: LDO9 {</div><div class='add'>+				regulator-name = "VDD33_LCD";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: LDO10 {</div><div class='add'>+				regulator-name = "VDD18_MIPI";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "VDD18_ABB1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo12_reg: LDO12 {</div><div class='add'>+				regulator-name = "VDD33_UOTG";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo13_reg: LDO13 {</div><div class='add'>+				regulator-name = "VDDIOPERI_18";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo14_reg: LDO14 {</div><div class='add'>+				regulator-name = "VDD18_ABB02";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo15_reg: LDO15 {</div><div class='add'>+				regulator-name = "VDD10_USH";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo16_reg: LDO16 {</div><div class='add'>+				regulator-name = "VDD18_HSIC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo17_reg: LDO17 {</div><div class='add'>+				regulator-name = "VDDIOAP_MMC012_28";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo18_reg: LDO18 {</div><div class='add'>+				regulator-name = "VDDIOPERI_28";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo19_reg: LDO19 {</div><div class='add'>+				regulator-name = "DVDD25";</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo20_reg: LDO20 {</div><div class='add'>+				regulator-name = "VDD28_CAM";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo21_reg: LDO21 {</div><div class='add'>+				regulator-name = "VDD28_AF";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo22_reg: LDO22 {</div><div class='add'>+				regulator-name = "VDDA28_2M";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		key_enter {</div><div class='del'>-			keypad,row = &lt;2&gt;;</div><div class='del'>-			keypad,column = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+			ldo23_reg: LDO23 {</div><div class='add'>+				regulator-name = "VDD28_TF";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo24_reg: LDO24 {</div><div class='add'>+				regulator-name = "VDD33_A31";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo25_reg: LDO25 {</div><div class='add'>+				regulator-name = "VDD18_CAM";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo26_reg: LDO26 {</div><div class='add'>+				regulator-name = "VDD18_A31";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo27_reg: LDO27 {</div><div class='add'>+				regulator-name = "GPS_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo28_reg: LDO28 {</div><div class='add'>+				regulator-name = "DVDD12";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				regulator-name = "vdd_mif";</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "vdd_int";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4_reg: BUCK4 {</div><div class='add'>+				regulator-name = "vdd_g3d";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "vdd_m12";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6_reg: BUCK6 {</div><div class='add'>+				regulator-name = "vdd12_5m";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck9_reg: BUCK9 {</div><div class='add'>+				regulator-name = "vddf28_emmc";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt	= &lt;3000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	g2d@10800000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;keypad {</div><div class='add'>+	samsung,keypad-num-rows = &lt;3&gt;;</div><div class='add'>+	samsung,keypad-num-columns = &lt;2&gt;;</div><div class='add'>+	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,keypad-wakeup;</div><div class='add'>+	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	key_home {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;0&gt;;</div><div class='add'>+		linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_down {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;1&gt;;</div><div class='add'>+		linux,code = &lt;KEY_DOWN&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc@12550000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		num-slots = &lt;1&gt;;</div><div class='del'>-		broken-cd;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		cap-mmc-highspeed;</div><div class='add'>+	key_up {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;0&gt;;</div><div class='add'>+		linux,code = &lt;KEY_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	codec@13400000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_menu {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;1&gt;;</div><div class='add'>+		linux,code = &lt;KEY_MENU&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fimd@11c00000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;lcd_clk &amp;lcd_data24 &amp;pwm1_out&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_back {</div><div class='add'>+		keypad,row = &lt;2&gt;;</div><div class='add'>+		keypad,column = &lt;0&gt;;</div><div class='add'>+		linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	display-timings {</div><div class='del'>-		native-mode = &lt;&amp;timing0&gt;;</div><div class='del'>-		timing0: timing {</div><div class='del'>-			clock-frequency = &lt;47500000&gt;;</div><div class='del'>-			hactive = &lt;1024&gt;;</div><div class='del'>-			vactive = &lt;600&gt;;</div><div class='del'>-			hfront-porch = &lt;64&gt;;</div><div class='del'>-			hback-porch = &lt;16&gt;;</div><div class='del'>-			hsync-len = &lt;48&gt;;</div><div class='del'>-			vback-porch = &lt;64&gt;;</div><div class='del'>-			vfront-porch = &lt;16&gt;;</div><div class='del'>-			vsync-len = &lt;3&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_enter {</div><div class='add'>+		keypad,row = &lt;2&gt;;</div><div class='add'>+		keypad,column = &lt;1&gt;;</div><div class='add'>+		linux,code = &lt;KEY_ENTER&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;mshc_0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	keypad_rows: keypad-rows {</div><div class='add'>+		samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;3&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	keypad_cols: keypad-cols {</div><div class='add'>+		samsung,pins = "gpx1-0", "gpx1-1";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c@13860000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s5m8767_pmic@66 {</div><div class='del'>-			compatible = "samsung,s5m8767-pmic";</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck-default-dvs-idx = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck-dvs-gpios = &lt;&amp;gpx2 3 0&gt;,</div><div class='del'>-							 &lt;&amp;gpx2 4 0&gt;,</div><div class='del'>-							 &lt;&amp;gpx2 5 0&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck-ds-gpios = &lt;&amp;gpm3 5 0&gt;,</div><div class='del'>-							&lt;&amp;gpm3 6 0&gt;,</div><div class='del'>-							&lt;&amp;gpm3 7 0&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck2-dvs-voltage = &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck3-dvs-voltage = &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='del'>-							 &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='del'>-							 &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='del'>-							 &lt;1100000&gt;, &lt;1100000&gt;;</div><div class='del'>-</div><div class='del'>-			s5m8767,pmic-buck4-dvs-voltage = &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;,</div><div class='del'>-							 &lt;1200000&gt;, &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "VDD_ALIVE";</div><div class='del'>-					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo2_reg: LDO2 {</div><div class='del'>-					regulator-name = "VDDQ_M12";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "VDDIOAP_18";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo4_reg: LDO4 {</div><div class='del'>-					regulator-name = "VDDQ_PRE";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo5_reg: LDO5 {</div><div class='del'>-					regulator-name = "VDD18_2M";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "VDD10_MPLL";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "VDD10_XPLL";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: LDO8 {</div><div class='del'>-					regulator-name = "VDD10_MIPI";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: LDO9 {</div><div class='del'>-					regulator-name = "VDD33_LCD";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: LDO10 {</div><div class='del'>-					regulator-name = "VDD18_MIPI";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "VDD18_ABB1";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo12_reg: LDO12 {</div><div class='del'>-					regulator-name = "VDD33_UOTG";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo13_reg: LDO13 {</div><div class='del'>-					regulator-name = "VDDIOPERI_18";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo14_reg: LDO14 {</div><div class='del'>-					regulator-name = "VDD18_ABB02";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo15_reg: LDO15 {</div><div class='del'>-					regulator-name = "VDD10_USH";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo16_reg: LDO16 {</div><div class='del'>-					regulator-name = "VDD18_HSIC";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo17_reg: LDO17 {</div><div class='del'>-					regulator-name = "VDDIOAP_MMC012_28";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo18_reg: LDO18 {</div><div class='del'>-					regulator-name = "VDDIOPERI_28";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo19_reg: LDO19 {</div><div class='del'>-					regulator-name = "DVDD25";</div><div class='del'>-					regulator-min-microvolt = &lt;2500000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo20_reg: LDO20 {</div><div class='del'>-					regulator-name = "VDD28_CAM";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo21_reg: LDO21 {</div><div class='del'>-					regulator-name = "VDD28_AF";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo22_reg: LDO22 {</div><div class='del'>-					regulator-name = "VDDA28_2M";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo23_reg: LDO23 {</div><div class='del'>-					regulator-name = "VDD28_TF";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo24_reg: LDO24 {</div><div class='del'>-					regulator-name = "VDD33_A31";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo25_reg: LDO25 {</div><div class='del'>-					regulator-name = "VDD18_CAM";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo26_reg: LDO26 {</div><div class='del'>-					regulator-name = "VDD18_A31";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo27_reg: LDO27 {</div><div class='del'>-					regulator-name = "GPS_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo28_reg: LDO28 {</div><div class='del'>-					regulator-name = "DVDD12";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					regulator-name = "vdd_mif";</div><div class='del'>-					regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1350000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "vdd_int";</div><div class='del'>-					regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck4_reg: BUCK4 {</div><div class='del'>-					regulator-name = "vdd_g3d";</div><div class='del'>-					regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "vdd_m12";</div><div class='del'>-					regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck6_reg: BUCK6 {</div><div class='del'>-					regulator-name = "vdd12_5m";</div><div class='del'>-					regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck9_reg: BUCK9 {</div><div class='del'>-					regulator-name = "vddf28_emmc";</div><div class='del'>-					regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-					regulator-max-microvolt	= &lt;3000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					op_mode = &lt;1&gt;; /* Normal Mode */</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		xxti {</div><div class='del'>-			compatible = "samsung,clock-xxti";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;mmc_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		xusbxti {</div><div class='del'>-			compatible = "samsung,clock-xusbxti";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts<br/>index b9256afbcc68..c2421df1fa43 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-smdk4412.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-smdk4412.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-smdk4412.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-smdk4412.dts</a></div><div class='hunk'>@@ -28,135 +28,135 @@</div><div class='ctx'> 		stdout-path = &amp;serial_1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	g2d@10800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl@11000000 {</div><div class='del'>-		keypad_rows: keypad-rows {</div><div class='del'>-			samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;3&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		xxti {</div><div class='add'>+			compatible = "samsung,clock-xxti";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		keypad_cols: keypad-cols {</div><div class='del'>-			samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",</div><div class='del'>-				       "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";</div><div class='del'>-			samsung,pin-function = &lt;3&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+		xusbxti {</div><div class='add'>+			compatible = "samsung,clock-xusbxti";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	keypad@100A0000 {</div><div class='del'>-		samsung,keypad-num-rows = &lt;3&gt;;</div><div class='del'>-		samsung,keypad-num-columns = &lt;8&gt;;</div><div class='del'>-		linux,keypad-no-autorepeat;</div><div class='del'>-		linux,keypad-wakeup;</div><div class='del'>-		pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		key_1 {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;3&gt;;</div><div class='del'>-			linux,code = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key_2 {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;4&gt;;</div><div class='del'>-			linux,code = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key_3 {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;5&gt;;</div><div class='del'>-			linux,code = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key_4 {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;6&gt;;</div><div class='del'>-			linux,code = &lt;5&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;g2d {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		key_5 {</div><div class='del'>-			keypad,row = &lt;1&gt;;</div><div class='del'>-			keypad,column = &lt;7&gt;;</div><div class='del'>-			linux,code = &lt;6&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;keypad {</div><div class='add'>+	samsung,keypad-num-rows = &lt;3&gt;;</div><div class='add'>+	samsung,keypad-num-columns = &lt;8&gt;;</div><div class='add'>+	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,keypad-wakeup;</div><div class='add'>+	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	key_1 {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;3&gt;;</div><div class='add'>+		linux,code = &lt;2&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_A {</div><div class='del'>-			keypad,row = &lt;2&gt;;</div><div class='del'>-			keypad,column = &lt;6&gt;;</div><div class='del'>-			linux,code = &lt;30&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_2 {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;4&gt;;</div><div class='add'>+		linux,code = &lt;3&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_B {</div><div class='del'>-			keypad,row = &lt;2&gt;;</div><div class='del'>-			keypad,column = &lt;7&gt;;</div><div class='del'>-			linux,code = &lt;48&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_3 {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;5&gt;;</div><div class='add'>+		linux,code = &lt;4&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_C {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;5&gt;;</div><div class='del'>-			linux,code = &lt;46&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_4 {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;6&gt;;</div><div class='add'>+		linux,code = &lt;5&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_D {</div><div class='del'>-			keypad,row = &lt;2&gt;;</div><div class='del'>-			keypad,column = &lt;5&gt;;</div><div class='del'>-			linux,code = &lt;32&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_5 {</div><div class='add'>+		keypad,row = &lt;1&gt;;</div><div class='add'>+		keypad,column = &lt;7&gt;;</div><div class='add'>+		linux,code = &lt;6&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		key_E {</div><div class='del'>-			keypad,row = &lt;0&gt;;</div><div class='del'>-			keypad,column = &lt;7&gt;;</div><div class='del'>-			linux,code = &lt;18&gt;;</div><div class='del'>-		};</div><div class='add'>+	key_A {</div><div class='add'>+		keypad,row = &lt;2&gt;;</div><div class='add'>+		keypad,column = &lt;6&gt;;</div><div class='add'>+		linux,code = &lt;30&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_B {</div><div class='add'>+		keypad,row = &lt;2&gt;;</div><div class='add'>+		keypad,column = &lt;7&gt;;</div><div class='add'>+		linux,code = &lt;48&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	codec@13400000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_C {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;5&gt;;</div><div class='add'>+		linux,code = &lt;46&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_D {</div><div class='add'>+		keypad,row = &lt;2&gt;;</div><div class='add'>+		keypad,column = &lt;5&gt;;</div><div class='add'>+		linux,code = &lt;32&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_E {</div><div class='add'>+		keypad,row = &lt;0&gt;;</div><div class='add'>+		keypad,column = &lt;7&gt;;</div><div class='add'>+		linux,code = &lt;18&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	keypad_rows: keypad-rows {</div><div class='add'>+		samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;3&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='add'>+	keypad_cols: keypad-cols {</div><div class='add'>+		samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",</div><div class='add'>+			       "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";</div><div class='add'>+		samsung,pin-function = &lt;3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		xxti {</div><div class='del'>-			compatible = "samsung,clock-xxti";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		xusbxti {</div><div class='del'>-			compatible = "samsung,clock-xusbxti";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts<br/>index d46fd4c2aeaa..525684ca8dc0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-tiny4412.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-tiny4412.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-tiny4412.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-tiny4412.dts</a></div><div class='hunk'>@@ -56,33 +56,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@10070000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	fixed-rate-clocks {</div><div class='ctx'> 		xxti {</div><div class='ctx'> 			compatible = "samsung,clock-xxti";</div><div class='hunk'>@@ -95,3 +68,30 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts<br/>index 792394dd0f2a..afc199d78cb9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-trats2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412-trats2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412-trats2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412-trats2.dts</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include "exynos4412.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/maxim,max77686.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Samsung Trats 2 based on Exynos4412";</div><div class='hunk'>@@ -130,411 +131,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	adc: adc@126C0000 {</div><div class='del'>-		vdd-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@13890000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c3_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		mms114-touchscreen@48 {</div><div class='del'>-			compatible = "melfas,mms114";</div><div class='del'>-			reg = &lt;0x48&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpm2&gt;;</div><div class='del'>-			interrupts = &lt;3 2&gt;;</div><div class='del'>-			x-size = &lt;720&gt;;</div><div class='del'>-			y-size = &lt;1280&gt;;</div><div class='del'>-			avdd-supply = &lt;&amp;ldo23_reg&gt;;</div><div class='del'>-			vdd-supply = &lt;&amp;ldo24_reg&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c_0: i2c@13860000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s5c73m3@3c {</div><div class='del'>-			compatible = "samsung,s5c73m3";</div><div class='del'>-			reg = &lt;0x3c&gt;;</div><div class='del'>-			standby-gpios = &lt;&amp;gpm0 1 1&gt;;   /* ISP_STANDBY */</div><div class='del'>-			xshutdown-gpios = &lt;&amp;gpf1 3 1&gt;; /* ISP_RESET */</div><div class='del'>-			vdd-int-supply = &lt;&amp;buck9_reg&gt;;</div><div class='del'>-			vddio-cis-supply = &lt;&amp;ldo9_reg&gt;;</div><div class='del'>-			vdda-supply = &lt;&amp;ldo17_reg&gt;;</div><div class='del'>-			vddio-host-supply = &lt;&amp;ldo18_reg&gt;;</div><div class='del'>-			vdd-af-supply = &lt;&amp;cam_af_reg&gt;;</div><div class='del'>-			vdd-reg-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			/* CAM_A_CLKOUT */</div><div class='del'>-			clocks = &lt;&amp;camera 0&gt;;</div><div class='del'>-			clock-names = "cis_extclk";</div><div class='del'>-			port {</div><div class='del'>-				s5c73m3_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;csis0_ep&gt;;</div><div class='del'>-					data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@138A0000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c4_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		wm1811: wm1811@1a {</div><div class='del'>-			compatible = "wlf,wm1811";</div><div class='del'>-			reg = &lt;0x1a&gt;;</div><div class='del'>-			clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='del'>-			clock-names = "MCLK1";</div><div class='del'>-			DCVDD-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='del'>-			DBVDD1-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='del'>-			wlf,ldo1ena = &lt;&amp;gpj0 4 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@138D0000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c7_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		max77686_pmic@09 {</div><div class='del'>-			compatible = "maxim,max77686";</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='del'>-			interrupts = &lt;7 0&gt;;</div><div class='del'>-			reg = &lt;0x09&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			voltage-regulators {</div><div class='del'>-				ldo1_reg: ldo1 {</div><div class='del'>-					regulator-compatible = "LDO1";</div><div class='del'>-					regulator-name = "VALIVE_1.0V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo2_reg: ldo2 {</div><div class='del'>-					regulator-compatible = "LDO2";</div><div class='del'>-					regulator-name = "VM1M2_1.2V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: ldo3 {</div><div class='del'>-					regulator-compatible = "LDO3";</div><div class='del'>-					regulator-name = "VCC_1.8V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo4_reg: ldo4 {</div><div class='del'>-					regulator-compatible = "LDO4";</div><div class='del'>-					regulator-name = "VCC_2.8V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo5_reg: ldo5 {</div><div class='del'>-					regulator-compatible = "LDO5";</div><div class='del'>-					regulator-name = "VCC_1.8V_IO";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: ldo6 {</div><div class='del'>-					regulator-compatible = "LDO6";</div><div class='del'>-					regulator-name = "VMPLL_1.0V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: ldo7 {</div><div class='del'>-					regulator-compatible = "LDO7";</div><div class='del'>-					regulator-name = "VPLL_1.0V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: ldo8 {</div><div class='del'>-					regulator-compatible = "LDO8";</div><div class='del'>-					regulator-name = "VMIPI_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: ldo9 {</div><div class='del'>-					regulator-compatible = "LDO9";</div><div class='del'>-					regulator-name = "CAM_ISP_MIPI_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: ldo10 {</div><div class='del'>-					regulator-compatible = "LDO10";</div><div class='del'>-					regulator-name = "VMIPI_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: ldo11 {</div><div class='del'>-					regulator-compatible = "LDO11";</div><div class='del'>-					regulator-name = "VABB1_1.95V";</div><div class='del'>-					regulator-min-microvolt = &lt;1950000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1950000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo12_reg: ldo12 {</div><div class='del'>-					regulator-compatible = "LDO12";</div><div class='del'>-					regulator-name = "VUOTG_3.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo13_reg: ldo13 {</div><div class='del'>-					regulator-compatible = "LDO13";</div><div class='del'>-					regulator-name = "NFC_AVDD_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo14_reg: ldo14 {</div><div class='del'>-					regulator-compatible = "LDO14";</div><div class='del'>-					regulator-name = "VABB2_1.95V";</div><div class='del'>-					regulator-min-microvolt = &lt;1950000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1950000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo15_reg: ldo15 {</div><div class='del'>-					regulator-compatible = "LDO15";</div><div class='del'>-					regulator-name = "VHSIC_1.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo16_reg: ldo16 {</div><div class='del'>-					regulator-compatible = "LDO16";</div><div class='del'>-					regulator-name = "VHSIC_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo17_reg: ldo17 {</div><div class='del'>-					regulator-compatible = "LDO17";</div><div class='del'>-					regulator-name = "CAM_SENSOR_CORE_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo18_reg: ldo18 {</div><div class='del'>-					regulator-compatible = "LDO18";</div><div class='del'>-					regulator-name = "CAM_ISP_SEN_IO_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo19_reg: ldo19 {</div><div class='del'>-					regulator-compatible = "LDO19";</div><div class='del'>-					regulator-name = "VT_CAM_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo20_reg: ldo20 {</div><div class='del'>-					regulator-compatible = "LDO20";</div><div class='del'>-					regulator-name = "VDDQ_PRE_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo21_reg: ldo21 {</div><div class='del'>-					regulator-compatible = "LDO21";</div><div class='del'>-					regulator-name = "VTF_2.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					maxim,ena-gpios = &lt;&amp;gpy2 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo22_reg: ldo22 {</div><div class='del'>-					regulator-compatible = "LDO22";</div><div class='del'>-					regulator-name = "VMEM_VDD_2.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					maxim,ena-gpios = &lt;&amp;gpk0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo23_reg: ldo23 {</div><div class='del'>-					regulator-compatible = "LDO23";</div><div class='del'>-					regulator-name = "TSP_AVDD_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo24_reg: ldo24 {</div><div class='del'>-					regulator-compatible = "LDO24";</div><div class='del'>-					regulator-name = "TSP_VDD_1.8V";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo25_reg: ldo25 {</div><div class='del'>-					regulator-compatible = "LDO25";</div><div class='del'>-					regulator-name = "LCD_VCC_3.3V";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo26_reg: ldo26 {</div><div class='del'>-					regulator-compatible = "LDO26";</div><div class='del'>-					regulator-name = "MOTOR_VCC_3.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: buck1 {</div><div class='del'>-					regulator-compatible = "BUCK1";</div><div class='del'>-					regulator-name = "vdd_mif";</div><div class='del'>-					regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: buck2 {</div><div class='del'>-					regulator-compatible = "BUCK2";</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-on-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: buck3 {</div><div class='del'>-					regulator-compatible = "BUCK3";</div><div class='del'>-					regulator-name = "vdd_int";</div><div class='del'>-					regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1150000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck4_reg: buck4 {</div><div class='del'>-					regulator-compatible = "BUCK4";</div><div class='del'>-					regulator-name = "vdd_g3d";</div><div class='del'>-					regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1150000&gt;;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-					regulator-state-mem {</div><div class='del'>-						regulator-off-in-suspend;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: buck5 {</div><div class='del'>-					regulator-compatible = "BUCK5";</div><div class='del'>-					regulator-name = "VMEM_1.2V_AP";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck6_reg: buck6 {</div><div class='del'>-					regulator-compatible = "BUCK6";</div><div class='del'>-					regulator-name = "VCC_SUB_1.35V";</div><div class='del'>-					regulator-min-microvolt = &lt;1350000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck7_reg: buck7 {</div><div class='del'>-					regulator-compatible = "BUCK7";</div><div class='del'>-					regulator-name = "VCC_SUB_2.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck8_reg: buck8 {</div><div class='del'>-					regulator-compatible = "BUCK8";</div><div class='del'>-					regulator-name = "VMEM_VDDF_3.0V";</div><div class='del'>-					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-					maxim,ena-gpios = &lt;&amp;gpk0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck9_reg: buck9 {</div><div class='del'>-					regulator-compatible = "BUCK9";</div><div class='del'>-					regulator-name = "CAM_ISP_CORE_1.2V";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					maxim,ena-gpios = &lt;&amp;gpm0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	i2c_max77693: i2c-gpio-1 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		gpios = &lt;&amp;gpm2 0 GPIO_ACTIVE_HIGH&gt;, &lt;&amp;gpm2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -597,54 +193,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc@12550000 {</div><div class='del'>-		num-slots = &lt;1&gt;;</div><div class='del'>-		broken-cd;</div><div class='del'>-		non-removable;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo22_reg&gt;;</div><div class='del'>-		clock-frequency = &lt;400000000&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;0&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		cap-mmc-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpx3 4 0&gt;;</div><div class='del'>-		cd-inverted;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo21_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13800000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13810000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13820000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@13830000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmu@100C0000 {</div><div class='del'>-		vtmu-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	i2c_ak8975: i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		gpios = &lt;&amp;gpy2 4 0&gt;, &lt;&amp;gpy2 5 0&gt;;</div><div class='hunk'>@@ -676,90 +224,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi_1: spi@13930000 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='del'>-		cs-gpios = &lt;&amp;gpb 5 0&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s5c73m3_spi: s5c73m3 {</div><div class='del'>-			compatible = "samsung,s5c73m3";</div><div class='del'>-			spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			controller-data {</div><div class='del'>-				samsung,spi-feedback-delay = &lt;2&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwm: pwm@139D0000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;pwm0_out&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		samsung,pwm-outputs = &lt;0&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dsi_0: dsi@11C80000 {</div><div class='del'>-		vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-		samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				dsi_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='del'>-					samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='del'>-					samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		panel@0 {</div><div class='del'>-			compatible = "samsung,s6e8aa0";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			vdd3-supply = &lt;&amp;lcd_vdd3_reg&gt;;</div><div class='del'>-			vci-supply = &lt;&amp;ldo25_reg&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpy4 5 0&gt;;</div><div class='del'>-			power-on-delay= &lt;50&gt;;</div><div class='del'>-			reset-delay = &lt;100&gt;;</div><div class='del'>-			init-delay = &lt;100&gt;;</div><div class='del'>-			flip-horizontal;</div><div class='del'>-			flip-vertical;</div><div class='del'>-			panel-width-mm = &lt;58&gt;;</div><div class='del'>-			panel-height-mm = &lt;103&gt;;</div><div class='del'>-</div><div class='del'>-			display-timings {</div><div class='del'>-				timing-0 {</div><div class='del'>-					clock-frequency = &lt;57153600&gt;;</div><div class='del'>-					hactive = &lt;720&gt;;</div><div class='del'>-					vactive = &lt;1280&gt;;</div><div class='del'>-					hfront-porch = &lt;5&gt;;</div><div class='del'>-					hback-porch = &lt;5&gt;;</div><div class='del'>-					hsync-len = &lt;5&gt;;</div><div class='del'>-					vfront-porch = &lt;13&gt;;</div><div class='del'>-					vback-porch = &lt;1&gt;;</div><div class='del'>-					vsync-len = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				dsi_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fimd@11c00000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	camera: camera {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;cam_port_a_clk_active &amp;cam_port_b_clk_active&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -769,124 +233,7 @@</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;clock CLK_XUSBXTI&gt;,</div><div class='ctx'> 					 &lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='ctx'> </div><div class='del'>-		fimc_0: fimc@11800000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC0&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_1: fimc@11810000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC1&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC1&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_2: fimc@11820000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC2&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC2&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_3: fimc@11830000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC3&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_FIMC3&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		csis_0: csis@11880000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='del'>-			vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS0&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_CSIS0&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-</div><div class='del'>-			/* Camera C (3) MIPI CSI-2 (CSIS0) */</div><div class='del'>-			port@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				csis0_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;s5c73m3_ep&gt;;</div><div class='del'>-					data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-					samsung,csis-hs-settle = &lt;12&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		csis_1: csis@11890000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='del'>-			vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS1&gt;,</div><div class='del'>-					&lt;&amp;clock CLK_SCLK_CSIS1&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='del'>-</div><div class='del'>-			/* Camera D (4) MIPI CSI-2 (CSIS1) */</div><div class='del'>-			port@4 {</div><div class='del'>-				reg = &lt;4&gt;;</div><div class='del'>-				csis1_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;is_s5k6a3_ep&gt;;</div><div class='del'>-					data-lanes = &lt;1&gt;;</div><div class='del'>-					samsung,csis-hs-settle = &lt;18&gt;;</div><div class='del'>-					samsung,csis-wclk;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_lite_0: fimc-lite@12390000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_lite_1: fimc-lite@123A0000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		fimc-is@12000000 {</div><div class='del'>-			pinctrl-0 = &lt;&amp;fimc_is_uart&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			i2c1_isp: i2c-isp@12140000 {</div><div class='del'>-				pinctrl-0 = &lt;&amp;fimc_is_i2c1&gt;;</div><div class='del'>-				pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-				s5k6a3@10 {</div><div class='del'>-					compatible = "samsung,s5k6a3";</div><div class='del'>-					reg = &lt;0x10&gt;;</div><div class='del'>-					svdda-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='del'>-					svddio-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='del'>-					afvdd-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='del'>-					clock-frequency = &lt;24000000&gt;;</div><div class='del'>-					/* CAM_B_CLKOUT */</div><div class='del'>-					clocks = &lt;&amp;camera 1&gt;;</div><div class='del'>-					clock-names = "extclk";</div><div class='del'>-					samsung,camclk-out = &lt;1&gt;;</div><div class='del'>-					gpios = &lt;&amp;gpm1 6 0&gt;;</div><div class='del'>-</div><div class='del'>-					port {</div><div class='del'>-						is_s5k6a3_ep: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='del'>-							data-lanes = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2s0: i2s@03830000 {</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2s0_bus&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='hunk'>@@ -901,17 +248,6 @@</div><div class='ctx'> 			"SPK", "SPKOUTRP";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	exynos-usbphy@125B0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hsotg@12480000 {</div><div class='del'>-		vusb_d-supply = &lt;&amp;ldo15_reg&gt;;</div><div class='del'>-		vusb_a-supply = &lt;&amp;ldo12_reg&gt;;</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	thermistor-ap@0 {</div><div class='ctx'> 		compatible = "ntc,ncp15wb473";</div><div class='ctx'> 		pullup-uv = &lt;1800000&gt;;	 /* VCC_1.8V_AP */</div><div class='hunk'>@@ -944,6 +280,619 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adc {</div><div class='add'>+	vdd-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csis_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS0&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_CSIS0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+</div><div class='add'>+	/* Camera C (3) MIPI CSI-2 (CSIS0) */</div><div class='add'>+	port@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		csis0_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;s5c73m3_ep&gt;;</div><div class='add'>+			data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			samsung,csis-hs-settle = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csis_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS1&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_CSIS1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+</div><div class='add'>+	/* Camera D (4) MIPI CSI-2 (CSIS1) */</div><div class='add'>+	port@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		csis1_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;is_s5k6a3_ep&gt;;</div><div class='add'>+			data-lanes = &lt;1&gt;;</div><div class='add'>+			samsung,csis-hs-settle = &lt;18&gt;;</div><div class='add'>+			samsung,csis-wclk;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_0 {</div><div class='add'>+	vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dsi_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='add'>+				samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='add'>+				samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "samsung,s6e8aa0";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		vdd3-supply = &lt;&amp;lcd_vdd3_reg&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;ldo25_reg&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpy4 5 0&gt;;</div><div class='add'>+		power-on-delay= &lt;50&gt;;</div><div class='add'>+		reset-delay = &lt;100&gt;;</div><div class='add'>+		init-delay = &lt;100&gt;;</div><div class='add'>+		flip-horizontal;</div><div class='add'>+		flip-vertical;</div><div class='add'>+		panel-width-mm = &lt;58&gt;;</div><div class='add'>+		panel-height-mm = &lt;103&gt;;</div><div class='add'>+</div><div class='add'>+		display-timings {</div><div class='add'>+			timing-0 {</div><div class='add'>+				clock-frequency = &lt;57153600&gt;;</div><div class='add'>+				hactive = &lt;720&gt;;</div><div class='add'>+				vactive = &lt;1280&gt;;</div><div class='add'>+				hfront-porch = &lt;5&gt;;</div><div class='add'>+				hback-porch = &lt;5&gt;;</div><div class='add'>+				hsync-len = &lt;5&gt;;</div><div class='add'>+				vfront-porch = &lt;13&gt;;</div><div class='add'>+				vback-porch = &lt;1&gt;;</div><div class='add'>+				vsync-len = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;exynos_usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC0&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC1&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC2&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC3&gt;,</div><div class='add'>+			&lt;&amp;clock CLK_SCLK_FIMC3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_is {</div><div class='add'>+	pinctrl-0 = &lt;&amp;fimc_is_uart&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c1_isp: i2c-isp@12140000 {</div><div class='add'>+		pinctrl-0 = &lt;&amp;fimc_is_i2c1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		s5k6a3@10 {</div><div class='add'>+			compatible = "samsung,s5k6a3";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+			svdda-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+			svddio-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+			afvdd-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+			/* CAM_B_CLKOUT */</div><div class='add'>+			clocks = &lt;&amp;camera 1&gt;;</div><div class='add'>+			clock-names = "extclk";</div><div class='add'>+			samsung,camclk-out = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpm1 6 0&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				is_s5k6a3_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='add'>+					data-lanes = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_lite_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_lite_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsotg {</div><div class='add'>+	vusb_d-supply = &lt;&amp;ldo15_reg&gt;;</div><div class='add'>+	vusb_a-supply = &lt;&amp;ldo12_reg&gt;;</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s5c73m3@3c {</div><div class='add'>+		compatible = "samsung,s5c73m3";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;gpm0 1 1&gt;;   /* ISP_STANDBY */</div><div class='add'>+		xshutdown-gpios = &lt;&amp;gpf1 3 1&gt;; /* ISP_RESET */</div><div class='add'>+		vdd-int-supply = &lt;&amp;buck9_reg&gt;;</div><div class='add'>+		vddio-cis-supply = &lt;&amp;ldo9_reg&gt;;</div><div class='add'>+		vdda-supply = &lt;&amp;ldo17_reg&gt;;</div><div class='add'>+		vddio-host-supply = &lt;&amp;ldo18_reg&gt;;</div><div class='add'>+		vdd-af-supply = &lt;&amp;cam_af_reg&gt;;</div><div class='add'>+		vdd-reg-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		/* CAM_A_CLKOUT */</div><div class='add'>+		clocks = &lt;&amp;camera 0&gt;;</div><div class='add'>+		clock-names = "cis_extclk";</div><div class='add'>+		port {</div><div class='add'>+			s5c73m3_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csis0_ep&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_3 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mms114-touchscreen@48 {</div><div class='add'>+		compatible = "melfas,mms114";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpm2&gt;;</div><div class='add'>+		interrupts = &lt;3 2&gt;;</div><div class='add'>+		x-size = &lt;720&gt;;</div><div class='add'>+		y-size = &lt;1280&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;ldo23_reg&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;ldo24_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_4 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm1811: wm1811@1a {</div><div class='add'>+		compatible = "wlf,wm1811";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='add'>+		clock-names = "MCLK1";</div><div class='add'>+		DCVDD-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+		DBVDD1-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+		wlf,ldo1ena = &lt;&amp;gpj0 4 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_7 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-slave-addr = &lt;0x10&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c7_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	max77686: max77686_pmic@09 {</div><div class='add'>+		compatible = "maxim,max77686";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;7 0&gt;;</div><div class='add'>+		reg = &lt;0x09&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		voltage-regulators {</div><div class='add'>+			ldo1_reg: ldo1 {</div><div class='add'>+				regulator-compatible = "LDO1";</div><div class='add'>+				regulator-name = "VALIVE_1.0V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: ldo2 {</div><div class='add'>+				regulator-compatible = "LDO2";</div><div class='add'>+				regulator-name = "VM1M2_1.2V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: ldo3 {</div><div class='add'>+				regulator-compatible = "LDO3";</div><div class='add'>+				regulator-name = "VCC_1.8V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: ldo4 {</div><div class='add'>+				regulator-compatible = "LDO4";</div><div class='add'>+				regulator-name = "VCC_2.8V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: ldo5 {</div><div class='add'>+				regulator-compatible = "LDO5";</div><div class='add'>+				regulator-name = "VCC_1.8V_IO";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: ldo6 {</div><div class='add'>+				regulator-compatible = "LDO6";</div><div class='add'>+				regulator-name = "VMPLL_1.0V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: ldo7 {</div><div class='add'>+				regulator-compatible = "LDO7";</div><div class='add'>+				regulator-name = "VPLL_1.0V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: ldo8 {</div><div class='add'>+				regulator-compatible = "LDO8";</div><div class='add'>+				regulator-name = "VMIPI_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: ldo9 {</div><div class='add'>+				regulator-compatible = "LDO9";</div><div class='add'>+				regulator-name = "CAM_ISP_MIPI_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: ldo10 {</div><div class='add'>+				regulator-compatible = "LDO10";</div><div class='add'>+				regulator-name = "VMIPI_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: ldo11 {</div><div class='add'>+				regulator-compatible = "LDO11";</div><div class='add'>+				regulator-name = "VABB1_1.95V";</div><div class='add'>+				regulator-min-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo12_reg: ldo12 {</div><div class='add'>+				regulator-compatible = "LDO12";</div><div class='add'>+				regulator-name = "VUOTG_3.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo13_reg: ldo13 {</div><div class='add'>+				regulator-compatible = "LDO13";</div><div class='add'>+				regulator-name = "NFC_AVDD_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo14_reg: ldo14 {</div><div class='add'>+				regulator-compatible = "LDO14";</div><div class='add'>+				regulator-name = "VABB2_1.95V";</div><div class='add'>+				regulator-min-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo15_reg: ldo15 {</div><div class='add'>+				regulator-compatible = "LDO15";</div><div class='add'>+				regulator-name = "VHSIC_1.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo16_reg: ldo16 {</div><div class='add'>+				regulator-compatible = "LDO16";</div><div class='add'>+				regulator-name = "VHSIC_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo17_reg: ldo17 {</div><div class='add'>+				regulator-compatible = "LDO17";</div><div class='add'>+				regulator-name = "CAM_SENSOR_CORE_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo18_reg: ldo18 {</div><div class='add'>+				regulator-compatible = "LDO18";</div><div class='add'>+				regulator-name = "CAM_ISP_SEN_IO_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo19_reg: ldo19 {</div><div class='add'>+				regulator-compatible = "LDO19";</div><div class='add'>+				regulator-name = "VT_CAM_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo20_reg: ldo20 {</div><div class='add'>+				regulator-compatible = "LDO20";</div><div class='add'>+				regulator-name = "VDDQ_PRE_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo21_reg: ldo21 {</div><div class='add'>+				regulator-compatible = "LDO21";</div><div class='add'>+				regulator-name = "VTF_2.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				maxim,ena-gpios = &lt;&amp;gpy2 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo22_reg: ldo22 {</div><div class='add'>+				regulator-compatible = "LDO22";</div><div class='add'>+				regulator-name = "VMEM_VDD_2.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				maxim,ena-gpios = &lt;&amp;gpk0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo23_reg: ldo23 {</div><div class='add'>+				regulator-compatible = "LDO23";</div><div class='add'>+				regulator-name = "TSP_AVDD_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo24_reg: ldo24 {</div><div class='add'>+				regulator-compatible = "LDO24";</div><div class='add'>+				regulator-name = "TSP_VDD_1.8V";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo25_reg: ldo25 {</div><div class='add'>+				regulator-compatible = "LDO25";</div><div class='add'>+				regulator-name = "LCD_VCC_3.3V";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo26_reg: ldo26 {</div><div class='add'>+				regulator-compatible = "LDO26";</div><div class='add'>+				regulator-name = "MOTOR_VCC_3.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: buck1 {</div><div class='add'>+				regulator-compatible = "BUCK1";</div><div class='add'>+				regulator-name = "vdd_mif";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: buck2 {</div><div class='add'>+				regulator-compatible = "BUCK2";</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: buck3 {</div><div class='add'>+				regulator-compatible = "BUCK3";</div><div class='add'>+				regulator-name = "vdd_int";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4_reg: buck4 {</div><div class='add'>+				regulator-compatible = "BUCK4";</div><div class='add'>+				regulator-name = "vdd_g3d";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: buck5 {</div><div class='add'>+				regulator-compatible = "BUCK5";</div><div class='add'>+				regulator-name = "VMEM_1.2V_AP";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6_reg: buck6 {</div><div class='add'>+				regulator-compatible = "BUCK6";</div><div class='add'>+				regulator-name = "VCC_SUB_1.35V";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck7_reg: buck7 {</div><div class='add'>+				regulator-compatible = "BUCK7";</div><div class='add'>+				regulator-name = "VCC_SUB_2.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck8_reg: buck8 {</div><div class='add'>+				regulator-compatible = "BUCK8";</div><div class='add'>+				regulator-name = "VMEM_VDDF_3.0V";</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+				maxim,ena-gpios = &lt;&amp;gpk0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck9_reg: buck9 {</div><div class='add'>+				regulator-compatible = "BUCK9";</div><div class='add'>+				regulator-name = "CAM_ISP_CORE_1.2V";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				maxim,ena-gpios = &lt;&amp;gpm0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mshc_0 {</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	non-removable;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo22_reg&gt;;</div><div class='add'>+	clock-frequency = &lt;400000000&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;0&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd4_clk &amp;sd4_cmd &amp;sd4_bus4 &amp;sd4_bus8&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmu_system_controller {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='ctx'> 	assigned-clock-parents =  &lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='hunk'>@@ -1304,3 +1253,63 @@</div><div class='ctx'> 		PIN_SLP(gpv4-0, INPUT, DOWN);</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_out&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	samsung,pwm-outputs = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;, &lt;&amp;max77686 MAX77686_CLK_AP&gt;;</div><div class='add'>+	clock-names = "rtc", "rtc_src";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpx3 4 0&gt;;</div><div class='add'>+	cd-inverted;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo21_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi_1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpb 5 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s5c73m3_spi: s5c73m3 {</div><div class='add'>+		compatible = "samsung,s5c73m3";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		controller-data {</div><div class='add'>+			samsung,spi-feedback-delay = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tmu {</div><div class='add'>+	vtmu-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi<br/>index 68ad43b391ae..b78ada70bd05 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4412.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4412.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4412.dtsi</a></div><div class='hunk'>@@ -54,19 +54,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	combiner: interrupt-controller@10440000 {</div><div class='del'>-		samsung,combiner-nr = &lt;20&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pmu {</div><div class='ctx'> 		interrupts = &lt;2 2&gt;, &lt;3 2&gt;, &lt;18 2&gt;, &lt;19 2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	gic: interrupt-controller@10490000 {</div><div class='del'>-		cpu-offset = &lt;0x4000&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;pmu_system_controller {</div><div class='add'>+	compatible = "samsung,exynos4412-pmu", "syscon";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	pmu_system_controller: system-controller@10020000 {</div><div class='del'>-		compatible = "samsung,exynos4412-pmu", "syscon";</div><div class='del'>-	};</div><div class='add'>+&amp;combiner {</div><div class='add'>+	samsung,combiner-nr = &lt;20&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gic {</div><div class='add'>+	cpu-offset = &lt;0x4000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi<br/>index 5caea996e090..ad764842fff5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4415.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4415.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4415.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4415.dtsi</a></div><div class='hunk'>@@ -124,8 +124,8 @@</div><div class='ctx'> </div><div class='ctx'> 		mipi_phy: video-phy@10020710 {</div><div class='ctx'> 			compatible = "samsung,s5pv210-mipi-video-phy";</div><div class='del'>-			reg = &lt;0x10020710 8&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='add'>+			syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pd_cam: cam-power-domain@10024000 {</div><div class='hunk'>@@ -177,7 +177,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rtc: rtc@10070000 {</div><div class='del'>-			compatible = "samsung,exynos3250-rtc";</div><div class='add'>+			compatible = "samsung,s3c6410-rtc";</div><div class='ctx'> 			reg = &lt;0x10070000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;0 73 0&gt;, &lt;0 74 0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -249,6 +249,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cmu CLK_SCLK_FIMD0&gt;, &lt;&amp;cmu CLK_FIMD0&gt;;</div><div class='ctx'> 			clock-names = "sclk_fimd", "fimd";</div><div class='ctx'> 			samsung,power-domain = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimd0&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_system_controller&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -268,6 +269,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sysmmu_fimd0: sysmmu@11E20000 {</div><div class='add'>+			compatible = "samsung,exynos-sysmmu";</div><div class='add'>+			reg = &lt;0x11e20000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 80 0&gt;, &lt;0 81 0&gt;;</div><div class='add'>+			clock-names = "sysmmu", "master";</div><div class='add'>+			clocks = &lt;&amp;cmu CLK_SMMUFIMD0&gt;, &lt;&amp;cmu CLK_FIMD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsotg: hsotg@12480000 {</div><div class='ctx'> 			compatible = "samsung,s3c6400-hsotg";</div><div class='ctx'> 			reg = &lt;0x12480000 0x20000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi<br/>index c141931378e7..bac25c672789 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4x12-pinctrl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4x12-pinctrl.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	pinctrl@11400000 {</div><div class='add'>+	pinctrl_0: pinctrl@11400000 {</div><div class='ctx'> 		gpa0: gpa0 {</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -441,7 +441,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl@11000000 {</div><div class='add'>+	pinctrl_1: pinctrl@11000000 {</div><div class='ctx'> 		gpk0: gpk0 {</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -887,7 +887,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl@03860000 {</div><div class='add'>+	pinctrl_2: pinctrl@03860000 {</div><div class='ctx'> 		gpz: gpz {</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -913,7 +913,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl@106E0000 {</div><div class='add'>+	pinctrl_3: pinctrl@106E0000 {</div><div class='ctx'> 		gpv0: gpv0 {</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi<br/>index 6a6abe14fd9b..b77dac61ffb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4x12.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos4x12.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos4x12.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos4x12.dtsi</a></div><div class='hunk'>@@ -96,32 +96,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	combiner: interrupt-controller@10440000 {</div><div class='del'>-		interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='del'>-			     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='del'>-			     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='del'>-			     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;,</div><div class='del'>-			     &lt;0 107 0&gt;, &lt;0 108 0&gt;, &lt;0 48 0&gt;, &lt;0 42 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl_0: pinctrl@11400000 {</div><div class='del'>-		compatible = "samsung,exynos4x12-pinctrl";</div><div class='del'>-		reg = &lt;0x11400000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 47 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl_1: pinctrl@11000000 {</div><div class='del'>-		compatible = "samsung,exynos4x12-pinctrl";</div><div class='del'>-		reg = &lt;0x11000000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 46 0&gt;;</div><div class='del'>-</div><div class='del'>-		wakup_eint: wakeup-interrupt-controller {</div><div class='del'>-			compatible = "samsung,exynos4210-wakeup-eint";</div><div class='del'>-			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-			interrupts = &lt;0 32 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	adc: adc@126C0000 {</div><div class='ctx'> 		compatible = "samsung,exynos-adc-v1";</div><div class='ctx'> 		reg = &lt;0x126C0000 0x100&gt;;</div><div class='hunk'>@@ -135,36 +109,13 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_2: pinctrl@03860000 {</div><div class='del'>-		compatible = "samsung,exynos4x12-pinctrl";</div><div class='del'>-		reg = &lt;0x03860000 0x1000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='del'>-		interrupts = &lt;10 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl_3: pinctrl@106E0000 {</div><div class='del'>-		compatible = "samsung,exynos4x12-pinctrl";</div><div class='del'>-		reg = &lt;0x106E0000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 72 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmu_system_controller: system-controller@10020000 {</div><div class='del'>-		compatible = "samsung,exynos4212-pmu", "syscon";</div><div class='del'>-		clock-names = "clkout0", "clkout1", "clkout2", "clkout3",</div><div class='del'>-				"clkout4", "clkout8", "clkout9";</div><div class='del'>-		clocks = &lt;&amp;clock CLK_OUT_DMC&gt;, &lt;&amp;clock CLK_OUT_TOP&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_OUT_LEFTBUS&gt;, &lt;&amp;clock CLK_OUT_RIGHTBUS&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_OUT_CPU&gt;, &lt;&amp;clock CLK_XXTI&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	g2d@10800000 {</div><div class='add'>+	g2d: g2d@10800000 {</div><div class='ctx'> 		compatible = "samsung,exynos4212-g2d";</div><div class='ctx'> 		reg = &lt;0x10800000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;0 89 0&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_SCLK_FIMG2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='ctx'> 		clock-names = "sclk_fimg2d", "fimg2d";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_g2d&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -173,40 +124,7 @@</div><div class='ctx'> 			 &lt;&amp;clock CLK_PIXELASYNCM0&gt;, &lt;&amp;clock CLK_PIXELASYNCM1&gt;;</div><div class='ctx'> 		clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";</div><div class='ctx'> </div><div class='del'>-		fimc_0: fimc@11800000 {</div><div class='del'>-			compatible = "samsung,exynos4212-fimc";</div><div class='del'>-			samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='del'>-			samsung,mainscaler-ext;</div><div class='del'>-			samsung,isp-wb;</div><div class='del'>-			samsung,cam-if;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_1: fimc@11810000 {</div><div class='del'>-			compatible = "samsung,exynos4212-fimc";</div><div class='del'>-			samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='del'>-			samsung,mainscaler-ext;</div><div class='del'>-			samsung,isp-wb;</div><div class='del'>-			samsung,cam-if;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_2: fimc@11820000 {</div><div class='del'>-			compatible = "samsung,exynos4212-fimc";</div><div class='del'>-			samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='del'>-			samsung,mainscaler-ext;</div><div class='del'>-			samsung,isp-wb;</div><div class='del'>-			samsung,lcd-wb;</div><div class='del'>-			samsung,cam-if;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_3: fimc@11830000 {</div><div class='del'>-			compatible = "samsung,exynos4212-fimc";</div><div class='del'>-			samsung,pix-limits = &lt;1920 8192 1366 1920&gt;;</div><div class='del'>-			samsung,rotators = &lt;0&gt;;</div><div class='del'>-			samsung,mainscaler-ext;</div><div class='del'>-			samsung,isp-wb;</div><div class='del'>-			samsung,lcd-wb;</div><div class='del'>-		};</div><div class='del'>-</div><div class='add'>+		/* fimc_[0-3] are configured outside, under phandles */</div><div class='ctx'> 		fimc_lite_0: fimc-lite@12390000 {</div><div class='ctx'> 			compatible = "samsung,exynos4212-fimc-lite";</div><div class='ctx'> 			reg = &lt;0x12390000 0x1000&gt;;</div><div class='hunk'>@@ -214,6 +132,7 @@</div><div class='ctx'> 			power-domains = &lt;&amp;pd_isp&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clock CLK_FIMC_LITE0&gt;;</div><div class='ctx'> 			clock-names = "flite";</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc_lite0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -224,6 +143,7 @@</div><div class='ctx'> 			power-domains = &lt;&amp;pd_isp&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clock CLK_FIMC_LITE1&gt;;</div><div class='ctx'> 			clock-names = "flite";</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc_lite1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -252,6 +172,9 @@</div><div class='ctx'> 				      "mcuispdiv1", "uart", "aclk200",</div><div class='ctx'> 				      "div_aclk200", "aclk400mcuisp",</div><div class='ctx'> 				      "div_aclk400mcuisp";</div><div class='add'>+			iommus = &lt;&amp;sysmmu_fimc_isp&gt;, &lt;&amp;sysmmu_fimc_drc&gt;,</div><div class='add'>+				 &lt;&amp;sysmmu_fimc_fd&gt;, &lt;&amp;sysmmu_fimc_mcuctl&gt;;</div><div class='add'>+			iommu-names = "isp", "drc", "fd", "mcuctl";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -284,29 +207,192 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	exynos-usbphy@125B0000 {</div><div class='del'>-		compatible = "samsung,exynos4x12-usb2-phy";</div><div class='del'>-		samsung,sysreg-phandle = &lt;&amp;sys_reg&gt;;</div><div class='add'>+	sysmmu_g2d: sysmmu@10A40000{</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x10A40000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 7&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_G2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	tmu@100C0000 {</div><div class='del'>-		compatible = "samsung,exynos4412-tmu";</div><div class='add'>+	sysmmu_fimc_isp: sysmmu@12260000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12260000 0x1000&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='del'>-		interrupts = &lt;2 4&gt;;</div><div class='del'>-		reg = &lt;0x100C0000 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock 383&gt;;</div><div class='del'>-		clock-names = "tmu_apbif";</div><div class='del'>-		status = "disabled";</div><div class='add'>+		interrupts = &lt;16 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_ISP&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hdmi: hdmi@12D00000 {</div><div class='del'>-		compatible = "samsung,exynos4212-hdmi";</div><div class='add'>+	sysmmu_fimc_drc: sysmmu@12270000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12270000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;16 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_DRC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mixer: mixer@12C10000 {</div><div class='del'>-		compatible = "samsung,exynos4212-mixer";</div><div class='del'>-		clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";</div><div class='del'>-		clocks = &lt;&amp;clock CLK_MIXER&gt;, &lt;&amp;clock CLK_HDMI&gt;,</div><div class='del'>-			 &lt;&amp;clock CLK_SCLK_HDMI&gt;, &lt;&amp;clock CLK_VP&gt;;</div><div class='add'>+	sysmmu_fimc_fd: sysmmu@122A0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x122A0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;16 4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FD&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_mcuctl: sysmmu@122B0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x122B0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;16 5&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_ISPCX&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_lite0: sysmmu@123B0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x123B0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;16 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_LITE0&gt;, &lt;&amp;clock CLK_FIMC_LITE0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_lite1: sysmmu@123C0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x123C0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;16 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_LITE1&gt;, &lt;&amp;clock CLK_FIMC_LITE1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combiner {</div><div class='add'>+	interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='add'>+		     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='add'>+		     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='add'>+		     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;,</div><div class='add'>+		     &lt;0 107 0&gt;, &lt;0 108 0&gt;, &lt;0 48 0&gt;, &lt;0 42 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;exynos_usbphy {</div><div class='add'>+	compatible = "samsung,exynos4x12-usb2-phy";</div><div class='add'>+	samsung,sysreg-phandle = &lt;&amp;sys_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_0 {</div><div class='add'>+	compatible = "samsung,exynos4212-fimc";</div><div class='add'>+	samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='add'>+	samsung,mainscaler-ext;</div><div class='add'>+	samsung,isp-wb;</div><div class='add'>+	samsung,cam-if;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_1 {</div><div class='add'>+	compatible = "samsung,exynos4212-fimc";</div><div class='add'>+	samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='add'>+	samsung,mainscaler-ext;</div><div class='add'>+	samsung,isp-wb;</div><div class='add'>+	samsung,cam-if;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_2 {</div><div class='add'>+	compatible = "samsung,exynos4212-fimc";</div><div class='add'>+	samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='add'>+	samsung,mainscaler-ext;</div><div class='add'>+	samsung,isp-wb;</div><div class='add'>+	samsung,lcd-wb;</div><div class='add'>+	samsung,cam-if;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimc_3 {</div><div class='add'>+	compatible = "samsung,exynos4212-fimc";</div><div class='add'>+	samsung,pix-limits = &lt;1920 8192 1366 1920&gt;;</div><div class='add'>+	samsung,rotators = &lt;0&gt;;</div><div class='add'>+	samsung,mainscaler-ext;</div><div class='add'>+	samsung,isp-wb;</div><div class='add'>+	samsung,lcd-wb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	compatible = "samsung,exynos4212-hdmi";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;jpeg_codec {</div><div class='add'>+	compatible = "samsung,exynos4212-jpeg";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mixer {</div><div class='add'>+	compatible = "samsung,exynos4212-mixer";</div><div class='add'>+	clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_MIXER&gt;, &lt;&amp;clock CLK_HDMI&gt;,</div><div class='add'>+		 &lt;&amp;clock CLK_SCLK_HDMI&gt;, &lt;&amp;clock CLK_VP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	compatible = "samsung,exynos4x12-pinctrl";</div><div class='add'>+	reg = &lt;0x11400000 0x1000&gt;;</div><div class='add'>+	interrupts = &lt;0 47 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	compatible = "samsung,exynos4x12-pinctrl";</div><div class='add'>+	reg = &lt;0x11000000 0x1000&gt;;</div><div class='add'>+	interrupts = &lt;0 46 0&gt;;</div><div class='add'>+</div><div class='add'>+	wakup_eint: wakeup-interrupt-controller {</div><div class='add'>+		compatible = "samsung,exynos4210-wakeup-eint";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;0 32 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_2 {</div><div class='add'>+	compatible = "samsung,exynos4x12-pinctrl";</div><div class='add'>+	reg = &lt;0x03860000 0x1000&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+	interrupts = &lt;10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_3 {</div><div class='add'>+	compatible = "samsung,exynos4x12-pinctrl";</div><div class='add'>+	reg = &lt;0x106E0000 0x1000&gt;;</div><div class='add'>+	interrupts = &lt;0 72 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_system_controller {</div><div class='add'>+	compatible = "samsung,exynos4212-pmu", "syscon";</div><div class='add'>+	clock-names = "clkout0", "clkout1", "clkout2", "clkout3",</div><div class='add'>+			"clkout4", "clkout8", "clkout9";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_OUT_DMC&gt;, &lt;&amp;clock CLK_OUT_TOP&gt;,</div><div class='add'>+		&lt;&amp;clock CLK_OUT_LEFTBUS&gt;, &lt;&amp;clock CLK_OUT_RIGHTBUS&gt;,</div><div class='add'>+		&lt;&amp;clock CLK_OUT_CPU&gt;, &lt;&amp;clock CLK_XXTI&gt;, &lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='add'>+	#clock-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tmu {</div><div class='add'>+	compatible = "samsung,exynos4412-tmu";</div><div class='add'>+	interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+	interrupts = &lt;2 4&gt;;</div><div class='add'>+	reg = &lt;0x100C0000 0x100&gt;;</div><div class='add'>+	clocks = &lt;&amp;clock 383&gt;;</div><div class='add'>+	clock-names = "tmu_apbif";</div><div class='add'>+	status = "disabled";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi<br/>index a0cc0b6f8f96..110dbd4fb884 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5.dtsi</a></div><div class='hunk'>@@ -81,14 +81,14 @@</div><div class='ctx'> 		interrupts = &lt;0 54 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@101E0000 {</div><div class='add'>+	rtc: rtc@101E0000 {</div><div class='ctx'> 		compatible = "samsung,s3c6410-rtc";</div><div class='ctx'> 		reg = &lt;0x101E0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 43 0&gt;, &lt;0 44 0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fimd@14400000 {</div><div class='add'>+	fimd: fimd@14400000 {</div><div class='ctx'> 		compatible = "samsung,exynos5250-fimd";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='ctx'> 		reg = &lt;0x14400000 0x40000&gt;;</div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dp-controller@145B0000 {</div><div class='add'>+	dp: dp-controller@145B0000 {</div><div class='ctx'> 		compatible = "samsung,exynos5-dp";</div><div class='ctx'> 		reg = &lt;0x145B0000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;10 3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts<br/>index bc27cc2558fe..4fe186d01f8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a></div><div class='hunk'>@@ -131,6 +131,9 @@</div><div class='ctx'> 		reg = &lt;0x09&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='ctx'> 		interrupts = &lt;2 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;max77686_irq&gt;;</div><div class='add'>+		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		voltage-regulators {</div><div class='ctx'> 			ldo1_reg: LDO1 {</div><div class='hunk'>@@ -410,3 +413,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	max77686_irq: max77686-irq {</div><div class='add'>+		samsung,pins = "gpx3-2";</div><div class='add'>+		samsung,pin-function = &lt;0xf&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts<br/>index 1eca97ee4bd6..b7f4122df456 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-snow.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5250-snow.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-snow.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250-snow.dts</a></div><div class='hunk'>@@ -177,30 +177,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@12CD0000 {</div><div class='del'>-		ptn3460: lvds-bridge@20 {</div><div class='del'>-			compatible = "nxp,ptn3460";</div><div class='del'>-			reg = &lt;0x20&gt;;</div><div class='del'>-			powerdown-gpios = &lt;&amp;gpy2 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpx1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			edid-emulation = &lt;5&gt;;</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				port@0 {</div><div class='del'>-					bridge_out: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					bridge_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;dp_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "google,snow-audio-max98095";</div><div class='ctx'> </div><div class='hunk'>@@ -507,6 +483,28 @@</div><div class='ctx'> 	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='ctx'> 	samsung,i2c-max-bus-freq = &lt;66000&gt;;</div><div class='ctx'> </div><div class='add'>+	ptn3460: lvds-bridge@20 {</div><div class='add'>+		compatible = "nxp,ptn3460";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;gpy2 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpx1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		edid-emulation = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			port@0 {</div><div class='add'>+				bridge_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				bridge_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dp_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	max98095: codec@11 {</div><div class='ctx'> 		compatible = "maxim,max98095";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi<br/>index 257e2f10525d..bf9bee67c416 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5250.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5250.dtsi</a></div><div class='hunk'>@@ -230,6 +230,7 @@</div><div class='ctx'> 		interrupts = &lt;0 91 0&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_G2D&gt;;</div><div class='ctx'> 		clock-names = "fimg2d";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_g2d&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mfc: codec@11000000 {</div><div class='hunk'>@@ -239,13 +240,8 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_MFC&gt;;</div><div class='ctx'> 		clock-names = "mfc";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc: rtc@101E0000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_RTC&gt;;</div><div class='del'>-		clock-names = "rtc";</div><div class='del'>-		interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='del'>-		status = "disabled";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_mfc_l&gt;, &lt;&amp;sysmmu_mfc_r&gt;;</div><div class='add'>+		iommu-names = "left", "right";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tmu: tmu@10060000 {</div><div class='hunk'>@@ -276,26 +272,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@12C00000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART0&gt;, &lt;&amp;clock CLK_SCLK_UART0&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@12C10000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART1&gt;, &lt;&amp;clock CLK_SCLK_UART1&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@12C20000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART2&gt;, &lt;&amp;clock CLK_SCLK_UART2&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@12C30000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART3&gt;, &lt;&amp;clock CLK_SCLK_UART3&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	sata: sata@122F0000 {</div><div class='ctx'> 		compatible = "snps,dwc-ahci";</div><div class='ctx'> 		samsung,sata-freq = &lt;66&gt;;</div><div class='hunk'>@@ -720,6 +696,7 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='add'>+		iommu = &lt;&amp;sysmmu_gsc0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gsc_1:  gsc@13e10000 {</div><div class='hunk'>@@ -729,6 +706,7 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL1&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='add'>+		iommu = &lt;&amp;sysmmu_gsc1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gsc_2:  gsc@13e20000 {</div><div class='hunk'>@@ -738,6 +716,7 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL2&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='add'>+		iommu = &lt;&amp;sysmmu_gsc2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gsc_3:  gsc@13e30000 {</div><div class='hunk'>@@ -747,6 +726,7 @@</div><div class='ctx'> 		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL3&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='add'>+		iommu = &lt;&amp;sysmmu_gsc3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	hdmi: hdmi {</div><div class='hunk'>@@ -770,6 +750,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_MIXER&gt;, &lt;&amp;clock CLK_HDMI&gt;,</div><div class='ctx'> 			 &lt;&amp;clock CLK_SCLK_HDMI&gt;;</div><div class='ctx'> 		clock-names = "mixer", "hdmi", "sclk_hdmi";</div><div class='add'>+		iommus = &lt;&amp;sysmmu_tv&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dp_phy: video-phy@10040720 {</div><div class='hunk'>@@ -778,20 +759,6 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dp: dp-controller@145B0000 {</div><div class='del'>-		power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock CLK_DP&gt;;</div><div class='del'>-		clock-names = "dp";</div><div class='del'>-		phys = &lt;&amp;dp_phy&gt;;</div><div class='del'>-		phy-names = "dp";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fimd: fimd@14400000 {</div><div class='del'>-		power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock CLK_SCLK_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='del'>-		clock-names = "sclk_fimd", "fimd";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	adc: adc@12D10000 {</div><div class='ctx'> 		compatible = "samsung,exynos-adc-v1";</div><div class='ctx'> 		reg = &lt;0x12D10000 0x100&gt;;</div><div class='hunk'>@@ -811,4 +778,287 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_SSS&gt;;</div><div class='ctx'> 		clock-names = "secss";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sysmmu_g2d: sysmmu@10A60000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x10A60000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;24 5&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_r: sysmmu@11200000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11200000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;6 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCR&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_l: sysmmu@11210000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11210000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;8 5&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_mfc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCL&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_rotator: sysmmu@11D40000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11D40000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_ROTATOR&gt;, &lt;&amp;clock CLK_ROTATOR&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_jpeg: sysmmu@11F20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11F20000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_JPEG&gt;, &lt;&amp;clock CLK_JPEG&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_isp: sysmmu@13260000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13260000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;10 6&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_ISP&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_drc: sysmmu@13270000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13270000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;11 6&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_DRC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_fd: sysmmu@132A0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132A0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 0&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_FD&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_scc: sysmmu@13280000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13280000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 2&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_SCC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_scp: sysmmu@13290000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13290000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;3 6&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_SCP&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_mcuctl: sysmmu@132B0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132B0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 4&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_MCU&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_odc: sysmmu@132C0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132C0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;11 0&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_ODC&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_dis0: sysmmu@132D0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132D0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;10 4&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_DIS0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_dis1: sysmmu@132E0000{</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132E0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;9 4&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_DIS1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_3dnr: sysmmu@132F0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x132F0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;5 6&gt;;</div><div class='add'>+		clock-names = "sysmmu";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_3DNR&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_lite0: sysmmu@13C40000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13C40000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;3 4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_LITE0&gt;, &lt;&amp;clock CLK_CAMIF_TOP&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimc_lite1: sysmmu@13C50000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13C50000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;24 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMC_LITE1&gt;, &lt;&amp;clock CLK_CAMIF_TOP&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gsc0: sysmmu@13E80000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13E80000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL0&gt;, &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gsc1: sysmmu@13E90000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13E90000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL1&gt;, &lt;&amp;clock CLK_GSCL1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gsc2: sysmmu@13EA0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13EA0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL2&gt;, &lt;&amp;clock CLK_GSCL2&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gsc3: sysmmu@13EB0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13EB0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 6&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL3&gt;, &lt;&amp;clock CLK_GSCL3&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimd1: sysmmu@14640000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x14640000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;3 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_tv: sysmmu@14650000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x14650000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;7 4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_TV&gt;, &lt;&amp;clock CLK_MIXER&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp {</div><div class='add'>+	power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='add'>+	clocks = &lt;&amp;clock CLK_DP&gt;;</div><div class='add'>+	clock-names = "dp";</div><div class='add'>+	phys = &lt;&amp;dp_phy&gt;;</div><div class='add'>+	phy-names = "dp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	power-domains = &lt;&amp;pd_disp1&gt;;</div><div class='add'>+	clocks = &lt;&amp;clock CLK_SCLK_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+	clock-names = "sclk_fimd", "fimd";</div><div class='add'>+	iommus = &lt;&amp;sysmmu_fimd1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;;</div><div class='add'>+	clock-names = "rtc";</div><div class='add'>+	interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART0&gt;, &lt;&amp;clock CLK_SCLK_UART0&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART1&gt;, &lt;&amp;clock CLK_SCLK_UART1&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART2&gt;, &lt;&amp;clock CLK_SCLK_UART2&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART3&gt;, &lt;&amp;clock CLK_SCLK_UART3&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5260-xyref5260.dts b/arch/arm/boot/dts/exynos5260-xyref5260.dts<br/>index a803b605051b..3daef94bee38 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5260-xyref5260.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5260-xyref5260.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5260-xyref5260.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5260-xyref5260.dts</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 	broken-cd;</div><div class='ctx'> 	bypass-smu;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='del'>-	supports-hs200-mode; /* 200 Mhz */</div><div class='add'>+	supports-hs200-mode; /* 200 MHz */</div><div class='ctx'> 	card-detect-delay = &lt;200&gt;;</div><div class='ctx'> 	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='ctx'> 	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts<br/>index b82b6fa15f48..eeb4ac22cfce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-arndale-octa.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5420-arndale-octa.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-arndale-octa.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-arndale-octa.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include "exynos5420.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,s2mps11.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";</div><div class='hunk'>@@ -38,325 +39,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@101E0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	codec@11000000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc@12200000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		broken-cd;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		cap-mmc-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc@12220000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;ldo13_reg&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cap-sd-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hsi2c_4: i2c@12CA0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s2mps11_pmic@66 {</div><div class='del'>-			compatible = "samsung,s2mps11-pmic";</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			s2mps11_osc: clocks {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clock-output-names = "s2mps11_ap",</div><div class='del'>-						"s2mps11_cp", "s2mps11_bt";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "PVDD_ALIVE_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo2_reg: LDO2 {</div><div class='del'>-					regulator-name = "PVDD_APIO_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "PVDD_APIO_MMCON_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo4_reg: LDO4 {</div><div class='del'>-					regulator-name = "PVDD_ADC_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo5_reg: LDO5 {</div><div class='del'>-					regulator-name = "PVDD_PLL_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "PVDD_ANAIP_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "PVDD_ANAIP_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: LDO8 {</div><div class='del'>-					regulator-name = "PVDD_ABB_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: LDO9 {</div><div class='del'>-					regulator-name = "PVDD_USB_3V3";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: LDO10 {</div><div class='del'>-					regulator-name = "PVDD_PRE_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "PVDD_USB_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo12_reg: LDO12 {</div><div class='del'>-					regulator-name = "PVDD_HSIC_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo13_reg: LDO13 {</div><div class='del'>-					regulator-name = "PVDD_APIO_MMCOFF_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo15_reg: LDO15 {</div><div class='del'>-					regulator-name = "PVDD_PERI_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo16_reg: LDO16 {</div><div class='del'>-					regulator-name = "PVDD_PERI_3V3";</div><div class='del'>-					regulator-min-microvolt = &lt;2200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo18_reg: LDO18 {</div><div class='del'>-					regulator-name = "PVDD_EMMC_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo19_reg: LDO19 {</div><div class='del'>-					regulator-name = "PVDD_TFLASH_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo20_reg: LDO20 {</div><div class='del'>-					regulator-name = "PVDD_BTWIFI_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo21_reg: LDO21 {</div><div class='del'>-					regulator-name = "PVDD_CAM1IO_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo23_reg: LDO23 {</div><div class='del'>-					regulator-name = "PVDD_MIFS_1V1";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo24_reg: LDO24 {</div><div class='del'>-					regulator-name = "PVDD_CAM1_AVDD_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo26_reg: LDO26 {</div><div class='del'>-					regulator-name = "PVDD_CAM0_AF_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo27_reg: LDO27 {</div><div class='del'>-					regulator-name = "PVDD_G3DS_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo28_reg: LDO28 {</div><div class='del'>-					regulator-name = "PVDD_TSP_3V3";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo29_reg: LDO29 {</div><div class='del'>-					regulator-name = "PVDD_AUDIO_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo31_reg: LDO31 {</div><div class='del'>-					regulator-name = "PVDD_PERI_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo32_reg: LDO32 {</div><div class='del'>-					regulator-name = "PVDD_LCD_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo33_reg: LDO33 {</div><div class='del'>-					regulator-name = "PVDD_CAM0IO_1V8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo35_reg: LDO35 {</div><div class='del'>-					regulator-name = "PVDD_CAM0_DVDD_1V2";</div><div class='del'>-					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo38_reg: LDO38 {</div><div class='del'>-					regulator-name = "PVDD_CAM0_AVDD_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					regulator-name = "PVDD_MIF_1V1";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "PVDD_INT_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck4_reg: BUCK4 {</div><div class='del'>-					regulator-name = "PVDD_G3D_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "PVDD_LPDDR3_1V2";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck6_reg: BUCK6 {</div><div class='del'>-					regulator-name = "PVDD_KFC_1V0";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck7_reg: BUCK7 {</div><div class='del'>-					regulator-name = "VIN_LLDO_1V4";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck8_reg: BUCK8 {</div><div class='del'>-					regulator-name = "VIN_MLDO_2V0";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck9_reg: BUCK9 {</div><div class='del'>-					regulator-name = "VIN_HLDO_3V5";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck10_reg: BUCK10 {</div><div class='del'>-					regulator-name = "PVDD_EMMCF_2V8";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='hunk'>@@ -376,3 +58,335 @@</div><div class='ctx'> &amp;cci {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s2mps11_pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mps11-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;s2mps11_irq&gt;;</div><div class='add'>+</div><div class='add'>+		s2mps11_osc: clocks {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-output-names = "s2mps11_ap",</div><div class='add'>+					"s2mps11_cp", "s2mps11_bt";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "PVDD_ALIVE_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: LDO2 {</div><div class='add'>+				regulator-name = "PVDD_APIO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "PVDD_APIO_MMCON_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: LDO4 {</div><div class='add'>+				regulator-name = "PVDD_ADC_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-name = "PVDD_PLL_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "PVDD_ANAIP_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "PVDD_ANAIP_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: LDO8 {</div><div class='add'>+				regulator-name = "PVDD_ABB_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: LDO9 {</div><div class='add'>+				regulator-name = "PVDD_USB_3V3";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: LDO10 {</div><div class='add'>+				regulator-name = "PVDD_PRE_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "PVDD_USB_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo12_reg: LDO12 {</div><div class='add'>+				regulator-name = "PVDD_HSIC_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo13_reg: LDO13 {</div><div class='add'>+				regulator-name = "PVDD_APIO_MMCOFF_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo15_reg: LDO15 {</div><div class='add'>+				regulator-name = "PVDD_PERI_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo16_reg: LDO16 {</div><div class='add'>+				regulator-name = "PVDD_PERI_3V3";</div><div class='add'>+				regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo18_reg: LDO18 {</div><div class='add'>+				regulator-name = "PVDD_EMMC_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo19_reg: LDO19 {</div><div class='add'>+				regulator-name = "PVDD_TFLASH_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo20_reg: LDO20 {</div><div class='add'>+				regulator-name = "PVDD_BTWIFI_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo21_reg: LDO21 {</div><div class='add'>+				regulator-name = "PVDD_CAM1IO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo23_reg: LDO23 {</div><div class='add'>+				regulator-name = "PVDD_MIFS_1V1";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo24_reg: LDO24 {</div><div class='add'>+				regulator-name = "PVDD_CAM1_AVDD_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo26_reg: LDO26 {</div><div class='add'>+				regulator-name = "PVDD_CAM0_AF_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo27_reg: LDO27 {</div><div class='add'>+				regulator-name = "PVDD_G3DS_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo28_reg: LDO28 {</div><div class='add'>+				regulator-name = "PVDD_TSP_3V3";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo29_reg: LDO29 {</div><div class='add'>+				regulator-name = "PVDD_AUDIO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo31_reg: LDO31 {</div><div class='add'>+				regulator-name = "PVDD_PERI_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo32_reg: LDO32 {</div><div class='add'>+				regulator-name = "PVDD_LCD_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo33_reg: LDO33 {</div><div class='add'>+				regulator-name = "PVDD_CAM0IO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo35_reg: LDO35 {</div><div class='add'>+				regulator-name = "PVDD_CAM0_DVDD_1V2";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo38_reg: LDO38 {</div><div class='add'>+				regulator-name = "PVDD_CAM0_AVDD_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				regulator-name = "PVDD_MIF_1V1";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "PVDD_INT_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4_reg: BUCK4 {</div><div class='add'>+				regulator-name = "PVDD_G3D_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "PVDD_LPDDR3_1V2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6_reg: BUCK6 {</div><div class='add'>+				regulator-name = "PVDD_KFC_1V0";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck7_reg: BUCK7 {</div><div class='add'>+				regulator-name = "VIN_LLDO_1V4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck8_reg: BUCK8 {</div><div class='add'>+				regulator-name = "VIN_MLDO_2V0";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck9_reg: BUCK9 {</div><div class='add'>+				regulator-name = "VIN_HLDO_3V5";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck10_reg: BUCK10 {</div><div class='add'>+				regulator-name = "PVDD_EMMCF_2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	broken-cd;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;ldo13_reg&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	s2mps11_irq: s2mps11-irq {</div><div class='add'>+		samsung,pins = "gpx3-2";</div><div class='add'>+		samsung,pin-function = &lt;0xf&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;, &lt;&amp;s2mps11_osc S2MPS11_CLK_AP&gt;;</div><div class='add'>+	clock-names = "rtc", "rtc_src";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts<br/>index 146e71118a72..8f4d76c5e11c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-peach-pit.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5420-peach-pit.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-peach-pit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-peach-pit.dts</a></div><div class='hunk'>@@ -1027,7 +1027,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;uart_3 {</div><div class='add'>+&amp;serial_3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts<br/>index 9103f2381a6d..98871f972c8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-smdk5420.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5420-smdk5420.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420-smdk5420.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420-smdk5420.dts</a></div><div class='hunk'>@@ -64,105 +64,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@101E0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	codec@11000000 {</div><div class='del'>-		samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-		samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc@12200000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		broken-cd;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='del'>-		samsung,dw-mshc-hs400-timing = &lt;0 2&gt;;</div><div class='del'>-		samsung,read-strobe-delay = &lt;90&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8</div><div class='del'>-			     &amp;sd0_rclk&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		cap-mmc-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc@12220000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cap-sd-highspeed;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dp-controller@145B0000 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;dp_hpd&gt;;</div><div class='del'>-		samsung,color-space = &lt;0&gt;;</div><div class='del'>-		samsung,dynamic-range = &lt;0&gt;;</div><div class='del'>-		samsung,ycbcr-coeff = &lt;0&gt;;</div><div class='del'>-		samsung,color-depth = &lt;1&gt;;</div><div class='del'>-		samsung,link-rate = &lt;0x0a&gt;;</div><div class='del'>-		samsung,lane-count = &lt;4&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fimd@14400000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		display-timings {</div><div class='del'>-			native-mode = &lt;&amp;timing0&gt;;</div><div class='del'>-			timing0: timing@0 {</div><div class='del'>-				clock-frequency = &lt;50000&gt;;</div><div class='del'>-				hactive = &lt;2560&gt;;</div><div class='del'>-				vactive = &lt;1600&gt;;</div><div class='del'>-				hfront-porch = &lt;48&gt;;</div><div class='del'>-				hback-porch = &lt;80&gt;;</div><div class='del'>-				hsync-len = &lt;32&gt;;</div><div class='del'>-				vback-porch = &lt;16&gt;;</div><div class='del'>-				vfront-porch = &lt;8&gt;;</div><div class='del'>-				vsync-len = &lt;6&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl@13400000 {</div><div class='del'>-		hdmi_hpd_irq: hdmi-hpd-irq {</div><div class='del'>-			samsung,pins = "gpx3-7";</div><div class='del'>-			samsung,pin-function = &lt;0&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;1&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl@14000000 {</div><div class='del'>-		usb300_vbus_en: usb300-vbus-en {</div><div class='del'>-			samsung,pins = "gpg0-5";</div><div class='del'>-			samsung,pin-function = &lt;1&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb301_vbus_en: usb301-vbus-en {</div><div class='del'>-			samsung,pins = "gpg1-4";</div><div class='del'>-			samsung,pin-function = &lt;1&gt;;</div><div class='del'>-			samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-			samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hdmi@14530000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hdmi_hpd_irq&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	usb300_vbus_reg: regulator-usb300 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VBUS0";</div><div class='hunk'>@@ -185,238 +86,338 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	phy@12100000 {</div><div class='del'>-		vbus-supply = &lt;&amp;usb300_vbus_reg&gt;;</div><div class='del'>-	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	phy@12500000 {</div><div class='del'>-		vbus-supply = &lt;&amp;usb301_vbus_reg&gt;;</div><div class='add'>+&amp;dp {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp_hpd&gt;;</div><div class='add'>+	samsung,color-space = &lt;0&gt;;</div><div class='add'>+	samsung,dynamic-range = &lt;0&gt;;</div><div class='add'>+	samsung,ycbcr-coeff = &lt;0&gt;;</div><div class='add'>+	samsung,color-depth = &lt;1&gt;;</div><div class='add'>+	samsung,link-rate = &lt;0x0a&gt;;</div><div class='add'>+	samsung,lane-count = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	status = "okay";</div><div class='add'>+	display-timings {</div><div class='add'>+		native-mode = &lt;&amp;timing0&gt;;</div><div class='add'>+		timing0: timing@0 {</div><div class='add'>+			clock-frequency = &lt;50000&gt;;</div><div class='add'>+			hactive = &lt;2560&gt;;</div><div class='add'>+			vactive = &lt;1600&gt;;</div><div class='add'>+			hfront-porch = &lt;48&gt;;</div><div class='add'>+			hback-porch = &lt;80&gt;;</div><div class='add'>+			hsync-len = &lt;32&gt;;</div><div class='add'>+			vback-porch = &lt;16&gt;;</div><div class='add'>+			vfront-porch = &lt;8&gt;;</div><div class='add'>+			vsync-len = &lt;6&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c_2: i2c@12C80000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;66000&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_hpd_irq&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		hdmiddc@50 {</div><div class='del'>-			compatible = "samsung,exynos4210-hdmiddc";</div><div class='del'>-			reg = &lt;0x50&gt;;</div><div class='add'>+&amp;hsi2c_4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s2mps11_pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mps11-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		s2mps11_osc: clocks {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-output-names = "s2mps11_ap",</div><div class='add'>+					"s2mps11_cp", "s2mps11_bt";</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	hsi2c_4: i2c@12CA0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s2mps11_pmic@66 {</div><div class='del'>-			compatible = "samsung,s2mps11-pmic";</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			s2mps11_osc: clocks {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clock-output-names = "s2mps11_ap",</div><div class='del'>-						"s2mps11_cp", "s2mps11_bt";</div><div class='add'>+		regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "vdd_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "vdd_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-name = "vdd_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "vdd_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "vdd_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: LDO8 {</div><div class='add'>+				regulator-name = "vdd_ldo8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: LDO9 {</div><div class='add'>+				regulator-name = "vdd_ldo9";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: LDO10 {</div><div class='add'>+				regulator-name = "vdd_ldo10";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "vdd_ldo11";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo12_reg: LDO12 {</div><div class='add'>+				regulator-name = "vdd_ldo12";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "vdd_ldo1";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "vdd_ldo3";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo5_reg: LDO5 {</div><div class='del'>-					regulator-name = "vdd_ldo5";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "vdd_ldo6";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "vdd_ldo7";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: LDO8 {</div><div class='del'>-					regulator-name = "vdd_ldo8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: LDO9 {</div><div class='del'>-					regulator-name = "vdd_ldo9";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: LDO10 {</div><div class='del'>-					regulator-name = "vdd_ldo10";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "vdd_ldo11";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo12_reg: LDO12 {</div><div class='del'>-					regulator-name = "vdd_ldo12";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo13_reg: LDO13 {</div><div class='del'>-					regulator-name = "vdd_ldo13";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo15_reg: LDO15 {</div><div class='del'>-					regulator-name = "vdd_ldo15";</div><div class='del'>-					regulator-min-microvolt = &lt;3100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo16_reg: LDO16 {</div><div class='del'>-					regulator-name = "vdd_ldo16";</div><div class='del'>-					regulator-min-microvolt = &lt;2200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo17_reg: LDO17 {</div><div class='del'>-					regulator-name = "tsp_avdd";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo19_reg: LDO19 {</div><div class='del'>-					regulator-name = "vdd_sd";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo24_reg: LDO24 {</div><div class='del'>-					regulator-name = "tsp_io";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					regulator-name = "vdd_mif";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "vdd_int";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck4_reg: BUCK4 {</div><div class='del'>-					regulator-name = "vdd_g3d";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "vdd_mem";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck6_reg: BUCK6 {</div><div class='del'>-					regulator-name = "vdd_kfc";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck7_reg: BUCK7 {</div><div class='del'>-					regulator-name = "vdd_1.0v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck8_reg: BUCK8 {</div><div class='del'>-					regulator-name = "vdd_1.8v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck9_reg: BUCK9 {</div><div class='del'>-					regulator-name = "vdd_2.8v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3750000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck10_reg: BUCK10 {</div><div class='del'>-					regulator-name = "vdd_vmem";</div><div class='del'>-					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='add'>+			ldo13_reg: LDO13 {</div><div class='add'>+				regulator-name = "vdd_ldo13";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo15_reg: LDO15 {</div><div class='add'>+				regulator-name = "vdd_ldo15";</div><div class='add'>+				regulator-min-microvolt = &lt;3100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo16_reg: LDO16 {</div><div class='add'>+				regulator-name = "vdd_ldo16";</div><div class='add'>+				regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo17_reg: LDO17 {</div><div class='add'>+				regulator-name = "tsp_avdd";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo19_reg: LDO19 {</div><div class='add'>+				regulator-name = "vdd_sd";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo24_reg: LDO24 {</div><div class='add'>+				regulator-name = "tsp_io";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				regulator-name = "vdd_mif";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "vdd_int";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4_reg: BUCK4 {</div><div class='add'>+				regulator-name = "vdd_g3d";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "vdd_mem";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6_reg: BUCK6 {</div><div class='add'>+				regulator-name = "vdd_kfc";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck7_reg: BUCK7 {</div><div class='add'>+				regulator-name = "vdd_1.0v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck8_reg: BUCK8 {</div><div class='add'>+				regulator-name = "vdd_1.8v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck9_reg: BUCK9 {</div><div class='add'>+				regulator-name = "vdd_2.8v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3750000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck10_reg: BUCK10 {</div><div class='add'>+				regulator-name = "vdd_vmem";</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c_2 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;66000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hdmiddc@50 {</div><div class='add'>+		compatible = "samsung,exynos4210-hdmiddc";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	broken-cd;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='add'>+	samsung,dw-mshc-hs400-timing = &lt;0 2&gt;;</div><div class='add'>+	samsung,read-strobe-delay = &lt;90&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8</div><div class='add'>+		     &amp;sd0_rclk&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	hdmi_hpd_irq: hdmi-hpd-irq {</div><div class='add'>+		samsung,pins = "gpx3-7";</div><div class='add'>+		samsung,pin-function = &lt;0&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;1&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_2 {</div><div class='add'>+	usb300_vbus_en: usb300-vbus-en {</div><div class='add'>+		samsung,pins = "gpg0-5";</div><div class='add'>+		samsung,pin-function = &lt;1&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb301_vbus_en: usb301-vbus-en {</div><div class='add'>+		samsung,pins = "gpg1-4";</div><div class='add'>+		samsung,pin-function = &lt;1&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_phy0 {</div><div class='add'>+	vbus-supply = &lt;&amp;usb300_vbus_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;usb301_vbus_reg&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi<br/>index 45317538bbae..534f27ceb10b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5420.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5420.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5420.dtsi</a></div><div class='hunk'>@@ -179,6 +179,8 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_MFC&gt;;</div><div class='ctx'> 		clock-names = "mfc";</div><div class='ctx'> 		power-domains = &lt;&amp;mfc_pd&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_mfc_l&gt;, &lt;&amp;sysmmu_mfc_r&gt;;</div><div class='add'>+		iommu-names = "left", "right";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mmc_0: mmc@12200000 {</div><div class='hunk'>@@ -264,9 +266,8 @@</div><div class='ctx'> 	mfc_pd: power-domain@10044060 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-pd";</div><div class='ctx'> 		reg = &lt;0x10044060 0x20&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock CLK_FIN_PLL&gt;, &lt;&amp;clock CLK_MOUT_SW_ACLK333&gt;,</div><div class='del'>-			&lt;&amp;clock CLK_MOUT_USER_ACLK333&gt;;</div><div class='del'>-		clock-names = "oscclk", "pclk0", "clk0";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_FIN_PLL&gt;, &lt;&amp;clock CLK_MOUT_USER_ACLK333&gt;;</div><div class='add'>+		clock-names = "oscclk", "clk0";</div><div class='ctx'> 		#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -280,16 +281,12 @@</div><div class='ctx'> 		compatible = "samsung,exynos4210-pd";</div><div class='ctx'> 		reg = &lt;0x100440C0 0x20&gt;;</div><div class='ctx'> 		#power-domain-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock CLK_FIN_PLL&gt;, &lt;&amp;clock CLK_MOUT_SW_ACLK200&gt;,</div><div class='add'>+		clocks = &lt;&amp;clock CLK_FIN_PLL&gt;,</div><div class='ctx'> 			 &lt;&amp;clock CLK_MOUT_USER_ACLK200_DISP1&gt;,</div><div class='del'>-			 &lt;&amp;clock CLK_MOUT_SW_ACLK300&gt;,</div><div class='ctx'> 			 &lt;&amp;clock CLK_MOUT_USER_ACLK300_DISP1&gt;,</div><div class='del'>-			 &lt;&amp;clock CLK_MOUT_SW_ACLK400&gt;,</div><div class='ctx'> 			 &lt;&amp;clock CLK_MOUT_USER_ACLK400_DISP1&gt;,</div><div class='ctx'> 			 &lt;&amp;clock CLK_FIMD1&gt;, &lt;&amp;clock CLK_MIXER&gt;;</div><div class='del'>-		clock-names = "oscclk", "pclk0", "clk0",</div><div class='del'>-			      "pclk1", "clk1", "pclk2", "clk2",</div><div class='del'>-			      "asb0", "asb1";</div><div class='add'>+		clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_0: pinctrl@13400000 {</div><div class='hunk'>@@ -328,13 +325,6 @@</div><div class='ctx'> 		interrupts = &lt;0 47 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: rtc@101E0000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_RTC&gt;;</div><div class='del'>-		clock-names = "rtc";</div><div class='del'>-		interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	amba {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -416,6 +406,9 @@</div><div class='ctx'> 			&lt;&amp;clock_audss EXYNOS_I2S_BUS&gt;,</div><div class='ctx'> 			&lt;&amp;clock_audss EXYNOS_SCLK_I2S&gt;;</div><div class='ctx'> 		clock-names = "iis", "i2s_opclk0", "i2s_opclk1";</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "i2s_cdclk0";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 		samsung,idma-addr = &lt;0x03000000&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;i2s0_bus&gt;;</div><div class='hunk'>@@ -430,6 +423,9 @@</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_I2S1&gt;, &lt;&amp;clock CLK_SCLK_I2S1&gt;;</div><div class='ctx'> 		clock-names = "iis", "i2s_opclk0";</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "i2s_cdclk1";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;i2s1_bus&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -443,6 +439,9 @@</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_I2S2&gt;, &lt;&amp;clock CLK_SCLK_I2S2&gt;;</div><div class='ctx'> 		clock-names = "iis", "i2s_opclk0";</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "i2s_cdclk2";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;i2s2_bus&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -496,26 +495,6 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart_0: serial@12C00000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART0&gt;, &lt;&amp;clock CLK_SCLK_UART0&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart_1: serial@12C10000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART1&gt;, &lt;&amp;clock CLK_SCLK_UART1&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart_2: serial@12C20000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART2&gt;, &lt;&amp;clock CLK_SCLK_UART2&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart_3: serial@12C30000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_UART3&gt;, &lt;&amp;clock CLK_SCLK_UART3&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pwm: pwm@12dd0000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-pwm";</div><div class='ctx'> 		reg = &lt;0x12dd0000 0x100&gt;;</div><div class='hunk'>@@ -531,17 +510,9 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dp: dp-controller@145B0000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_DP1&gt;;</div><div class='del'>-		clock-names = "dp";</div><div class='del'>-		phys = &lt;&amp;dp_phy&gt;;</div><div class='del'>-		phy-names = "dp";</div><div class='del'>-		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	mipi_phy: video-phy@10040714 {</div><div class='ctx'> 		compatible = "samsung,s5pv210-mipi-video-phy";</div><div class='del'>-		reg = &lt;0x10040714 12&gt;;</div><div class='add'>+		syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'> 		#phy-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -558,12 +529,6 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fimd: fimd@14400000 {</div><div class='del'>-		clocks = &lt;&amp;clock CLK_SCLK_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='del'>-		clock-names = "sclk_fimd", "fimd";</div><div class='del'>-		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	adc: adc@12D10000 {</div><div class='ctx'> 		compatible = "samsung,exynos-adc-v2";</div><div class='ctx'> 		reg = &lt;0x12D10000 0x100&gt;;</div><div class='hunk'>@@ -750,6 +715,7 @@</div><div class='ctx'> 			 &lt;&amp;clock CLK_SCLK_HDMI&gt;;</div><div class='ctx'> 		clock-names = "mixer", "hdmi", "sclk_hdmi";</div><div class='ctx'> 		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_tv&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gsc_0: video-scaler@13e00000 {</div><div class='hunk'>@@ -759,6 +725,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='ctx'> 		power-domains = &lt;&amp;gsc_pd&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_gscl0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gsc_1: video-scaler@13e10000 {</div><div class='hunk'>@@ -768,6 +735,25 @@</div><div class='ctx'> 		clocks = &lt;&amp;clock CLK_GSCL1&gt;;</div><div class='ctx'> 		clock-names = "gscl";</div><div class='ctx'> 		power-domains = &lt;&amp;gsc_pd&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_gscl1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	jpeg_0: jpeg@11F50000 {</div><div class='add'>+		compatible = "samsung,exynos5420-jpeg";</div><div class='add'>+		reg = &lt;0x11F50000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 89 0&gt;;</div><div class='add'>+		clock-names = "jpeg";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_JPEG&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_jpeg0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	jpeg_1: jpeg@11F60000 {</div><div class='add'>+		compatible = "samsung,exynos5420-jpeg";</div><div class='add'>+		reg = &lt;0x11F60000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 168 0&gt;;</div><div class='add'>+		clock-names = "jpeg";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_JPEG2&gt;;</div><div class='add'>+		iommus = &lt;&amp;sysmmu_jpeg1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu_system_controller: system-controller@10040000 {</div><div class='hunk'>@@ -962,4 +948,221 @@</div><div class='ctx'> 		samsung,sysreg-phandle = &lt;&amp;sysreg_system_controller&gt;;</div><div class='ctx'> 		samsung,pmureg-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sysmmu_g2dr: sysmmu@0x10A60000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x10A60000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;24 5&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_G2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_g2dw: sysmmu@0x10A70000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x10A70000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;22 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_G2D&gt;, &lt;&amp;clock CLK_G2D&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_tv: sysmmu@0x14650000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x14650000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;7 4&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MIXER&gt;, &lt;&amp;clock CLK_MIXER&gt;;</div><div class='add'>+		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gscl0: sysmmu@0x13E80000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13E80000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL0&gt;, &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;gsc_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_gscl1: sysmmu@0x13E90000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x13E90000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;2 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_GSCL1&gt;, &lt;&amp;clock CLK_GSCL1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;gsc_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler0r: sysmmu@0x12880000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12880000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;22 4&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL0&gt;, &lt;&amp;clock CLK_MSCL0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler1r: sysmmu@0x12890000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x12890000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 186 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL1&gt;, &lt;&amp;clock CLK_MSCL1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler2r: sysmmu@0x128A0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x128A0000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 188 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL2&gt;, &lt;&amp;clock CLK_MSCL2&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler0w: sysmmu@0x128C0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x128C0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;27 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL0&gt;, &lt;&amp;clock CLK_MSCL0&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler1w: sysmmu@0x128D0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x128D0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;22 6&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL1&gt;, &lt;&amp;clock CLK_MSCL1&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_scaler2w: sysmmu@0x128E0000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x128E0000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;19 6&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MSCL2&gt;, &lt;&amp;clock CLK_MSCL2&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_jpeg0: sysmmu@0x11F10000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11F10000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;4 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_JPEG&gt;, &lt;&amp;clock CLK_JPEG&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_jpeg1: sysmmu@0x11F20000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11F20000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 169 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_JPEG2&gt;, &lt;&amp;clock CLK_JPEG2&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_l: sysmmu@0x11200000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11200000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;6 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCL&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		power-domains = &lt;&amp;mfc_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_mfc_r: sysmmu@0x11210000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x11210000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;8 5&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_MFCR&gt;, &lt;&amp;clock CLK_MFC&gt;;</div><div class='add'>+		power-domains = &lt;&amp;mfc_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimd1_0: sysmmu@0x14640000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x14640000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;3 2&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMD1M0&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sysmmu_fimd1_1: sysmmu@0x14680000 {</div><div class='add'>+		compatible = "samsung,exynos-sysmmu";</div><div class='add'>+		reg = &lt;0x14680000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='add'>+		interrupts = &lt;3 0&gt;;</div><div class='add'>+		clock-names = "sysmmu", "master";</div><div class='add'>+		clocks = &lt;&amp;clock CLK_SMMU_FIMD1M0&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_DP1&gt;;</div><div class='add'>+	clock-names = "dp";</div><div class='add'>+	phys = &lt;&amp;dp_phy&gt;;</div><div class='add'>+	phy-names = "dp";</div><div class='add'>+	power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_SCLK_FIMD1&gt;, &lt;&amp;clock CLK_FIMD1&gt;;</div><div class='add'>+	clock-names = "sclk_fimd", "fimd";</div><div class='add'>+	power-domains = &lt;&amp;disp_pd&gt;;</div><div class='add'>+	iommus = &lt;&amp;sysmmu_fimd1_0&gt;, &lt;&amp;sysmmu_fimd1_1&gt;;</div><div class='add'>+	iommu-names = "m0", "m1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;;</div><div class='add'>+	clock-names = "rtc";</div><div class='add'>+	interrupt-parent = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART0&gt;, &lt;&amp;clock CLK_SCLK_UART0&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_1 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART1&gt;, &lt;&amp;clock CLK_SCLK_UART1&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_2 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART2&gt;, &lt;&amp;clock CLK_SCLK_UART2&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_3 {</div><div class='add'>+	clocks = &lt;&amp;clock CLK_UART3&gt;, &lt;&amp;clock CLK_SCLK_UART3&gt;;</div><div class='add'>+	clock-names = "uart", "clk_uart_baud0";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi<br/>new file mode 100644<br/>index 000000000000..8adf455744e9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,479 @@</div><div class='add'>+/*</div><div class='add'>+ * Hardkernel Odroid XU3 board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2014 Collabora Ltd.</div><div class='add'>+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.</div><div class='add'>+ *		http://www.samsung.com</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,s2mps11.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/samsung-i2s.h&gt;</div><div class='add'>+#include "exynos5800.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x40000000 0x7EA00000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		linux,stdout-path = &amp;serial_2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware@02073000 {</div><div class='add'>+		compatible = "samsung,secure-firmware";</div><div class='add'>+		reg = &lt;0x02073000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		oscclk {</div><div class='add'>+			compatible = "samsung,exynos5420-oscclk";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: pwrseq {</div><div class='add'>+		pinctrl-0 = &lt;&amp;emmc_nrst_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		reset-gpios = &lt;&amp;gpd1 0 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwmleds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		greenled {</div><div class='add'>+			label = "green:mmc0";</div><div class='add'>+			pwms = &lt;&amp;pwm 1 2000000 0&gt;;</div><div class='add'>+			pwm-names = "pwm1";</div><div class='add'>+			/*</div><div class='add'>+			 * Green LED is much brighter than the others</div><div class='add'>+			 * so limit its max brightness</div><div class='add'>+			 */</div><div class='add'>+			max_brightness = &lt;127&gt;;</div><div class='add'>+			linux,default-trigger = "mmc0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blueled {</div><div class='add'>+			label = "blue:heartbeat";</div><div class='add'>+			pwms = &lt;&amp;pwm 2 2000000 0&gt;;</div><div class='add'>+			pwm-names = "pwm2";</div><div class='add'>+			max_brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpioleds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		redled {</div><div class='add'>+			label = "red:microSD";</div><div class='add'>+			gpios = &lt;&amp;gpx2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			linux,default-trigger = "mmc1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound: sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,name = "Odroid-XU3";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Speakers", "Speakers";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphone Jack", "HPL",</div><div class='add'>+			"Headphone Jack", "HPR",</div><div class='add'>+			"Headphone Jack", "MICBIAS",</div><div class='add'>+			"IN1", "Headphone Jack",</div><div class='add'>+			"Speakers", "SPKL",</div><div class='add'>+			"Speakers", "SPKR";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;link0_codec&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;link0_codec&gt;;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0 0&gt;;</div><div class='add'>+			system-clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link0_codec: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;max98090&gt;;</div><div class='add'>+			clocks = &lt;&amp;i2s0 CLK_I2S_CDCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clock_audss {</div><div class='add'>+	assigned-clocks = &lt;&amp;clock_audss EXYNOS_MOUT_AUDSS&gt;,</div><div class='add'>+			&lt;&amp;clock_audss EXYNOS_MOUT_I2S&gt;,</div><div class='add'>+			&lt;&amp;clock_audss EXYNOS_DOUT_AUD_BUS&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clock CLK_FIN_PLL&gt;,</div><div class='add'>+			&lt;&amp;clock_audss EXYNOS_MOUT_AUDSS&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;,</div><div class='add'>+			&lt;0&gt;,</div><div class='add'>+			&lt;19200000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fimd {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_hpd_irq&gt;;</div><div class='add'>+</div><div class='add'>+	vdd_osc-supply = &lt;&amp;ldo7_reg&gt;;</div><div class='add'>+	vdd_pll-supply = &lt;&amp;ldo6_reg&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;ldo6_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	s2mps11_pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mps11-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='add'>+		s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='add'>+		s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;s2mps11_irq&gt;;</div><div class='add'>+</div><div class='add'>+		s2mps11_osc: clocks {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-output-names = "s2mps11_ap",</div><div class='add'>+					"s2mps11_cp", "s2mps11_bt";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			ldo1_reg: LDO1 {</div><div class='add'>+				regulator-name = "vdd_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: LDO3 {</div><div class='add'>+				regulator-name = "vdd_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-name = "vdd_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: LDO6 {</div><div class='add'>+				regulator-name = "vdd_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: LDO7 {</div><div class='add'>+				regulator-name = "vdd_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: LDO8 {</div><div class='add'>+				regulator-name = "vdd_ldo8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: LDO9 {</div><div class='add'>+				regulator-name = "vdd_ldo9";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10_reg: LDO10 {</div><div class='add'>+				regulator-name = "vdd_ldo10";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11_reg: LDO11 {</div><div class='add'>+				regulator-name = "vdd_ldo11";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo12_reg: LDO12 {</div><div class='add'>+				regulator-name = "vdd_ldo12";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo13_reg: LDO13 {</div><div class='add'>+				regulator-name = "vdd_ldo13";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo15_reg: LDO15 {</div><div class='add'>+				regulator-name = "vdd_ldo15";</div><div class='add'>+				regulator-min-microvolt = &lt;3100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo16_reg: LDO16 {</div><div class='add'>+				regulator-name = "vdd_ldo16";</div><div class='add'>+				regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo17_reg: LDO17 {</div><div class='add'>+				regulator-name = "tsp_avdd";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo19_reg: LDO19 {</div><div class='add'>+				regulator-name = "vdd_sd";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo24_reg: LDO24 {</div><div class='add'>+				regulator-name = "tsp_io";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo26_reg: LDO26 {</div><div class='add'>+				regulator-name = "vdd_ldo26";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1_reg: BUCK1 {</div><div class='add'>+				regulator-name = "vdd_mif";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: BUCK2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: BUCK3 {</div><div class='add'>+				regulator-name = "vdd_int";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4_reg: BUCK4 {</div><div class='add'>+				regulator-name = "vdd_g3d";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5_reg: BUCK5 {</div><div class='add'>+				regulator-name = "vdd_mem";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6_reg: BUCK6 {</div><div class='add'>+				regulator-name = "vdd_kfc";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck7_reg: BUCK7 {</div><div class='add'>+				regulator-name = "vdd_1.0v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck8_reg: BUCK8 {</div><div class='add'>+				regulator-name = "vdd_1.8v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck9_reg: BUCK9 {</div><div class='add'>+				regulator-name = "vdd_2.8v_ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3750000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck10_reg: BUCK10 {</div><div class='add'>+				regulator-name = "vdd_vmem";</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	max98090: max98090@10 {</div><div class='add'>+		compatible = "maxim,max98090";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='add'>+		interrupts = &lt;2 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;i2s0 CLK_I2S_CDCLK&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_2 {</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;66000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hdmiddc@50 {</div><div class='add'>+		compatible = "samsung,exynos4210-hdmiddc";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfc {</div><div class='add'>+	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='add'>+	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpc0 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='add'>+	samsung,dw-mshc-hs400-timing = &lt;0 2&gt;;</div><div class='add'>+	samsung,read-strobe-delay = &lt;90&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8 &amp;sd0_cd &amp;sd0_rclk&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_0 {</div><div class='add'>+	hdmi_hpd_irq: hdmi-hpd-irq {</div><div class='add'>+		samsung,pins = "gpx3-7";</div><div class='add'>+		samsung,pin-function = &lt;0&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;1&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	s2mps11_irq: s2mps11-irq {</div><div class='add'>+		samsung,pins = "gpx0-4";</div><div class='add'>+		samsung,pin-function = &lt;0xf&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_1 {</div><div class='add'>+	emmc_nrst_pin: emmc-nrst {</div><div class='add'>+		samsung,pins = "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;0&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	/*</div><div class='add'>+	 * PWM 0 -- fan</div><div class='add'>+	 * PWM 1 -- Green LED</div><div class='add'>+	 * PWM 2 -- Blue LED</div><div class='add'>+	 * PWM 3 -- on MIPI connector for backlight</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_out &amp;pwm1_out &amp;pwm2_out &amp;pwm3_out&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;clock CLK_RTC&gt;, &lt;&amp;s2mps11_osc S2MPS11_CLK_AP&gt;;</div><div class='add'>+	clock-names = "rtc", "rtc_src";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_dwc3_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_dwc3_1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts<br/>new file mode 100644<br/>index 000000000000..c06882bbb822<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/*</div><div class='add'>+ * Hardkernel Odroid XU3-Lite board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Krzysztof Kozlowski</div><div class='add'>+ * Copyright (c) 2014 Collabora Ltd.</div><div class='add'>+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.</div><div class='add'>+ *		http://www.samsung.com</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos5422-odroidxu3-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Hardkernel Odroid XU3 Lite";</div><div class='add'>+	compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts<br/>index edc25cf1d717..78e6a502f320 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5422-odroidxu3.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5422-odroidxu3.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5422-odroidxu3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5422-odroidxu3.dts</a></div><div class='hunk'>@@ -11,348 +11,11 @@</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "exynos5800.dtsi"</div><div class='add'>+#include "exynos5422-odroidxu3-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Hardkernel Odroid XU3";</div><div class='ctx'> 	compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";</div><div class='del'>-</div><div class='del'>-	memory {</div><div class='del'>-		reg = &lt;0x40000000 0x7EA00000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		linux,stdout-path = &amp;serial_2;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fimd@14400000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	firmware@02073000 {</div><div class='del'>-		compatible = "samsung,secure-firmware";</div><div class='del'>-		reg = &lt;0x02073000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		oscclk {</div><div class='del'>-			compatible = "samsung,exynos5420-oscclk";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hsi2c_4: i2c@12CA0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		s2mps11_pmic@66 {</div><div class='del'>-			compatible = "samsung,s2mps11-pmic";</div><div class='del'>-			reg = &lt;0x66&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck34-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck16-ramp-delay = &lt;12&gt;;</div><div class='del'>-			s2mps11,buck6-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck2-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck3-ramp-enable = &lt;1&gt;;</div><div class='del'>-			s2mps11,buck4-ramp-enable = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			s2mps11_osc: clocks {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clock-output-names = "s2mps11_ap",</div><div class='del'>-						"s2mps11_cp", "s2mps11_bt";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				ldo1_reg: LDO1 {</div><div class='del'>-					regulator-name = "vdd_ldo1";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3_reg: LDO3 {</div><div class='del'>-					regulator-name = "vdd_ldo3";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo5_reg: LDO5 {</div><div class='del'>-					regulator-name = "vdd_ldo5";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6_reg: LDO6 {</div><div class='del'>-					regulator-name = "vdd_ldo6";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo7_reg: LDO7 {</div><div class='del'>-					regulator-name = "vdd_ldo7";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo8_reg: LDO8 {</div><div class='del'>-					regulator-name = "vdd_ldo8";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9_reg: LDO9 {</div><div class='del'>-					regulator-name = "vdd_ldo9";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo10_reg: LDO10 {</div><div class='del'>-					regulator-name = "vdd_ldo10";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo11_reg: LDO11 {</div><div class='del'>-					regulator-name = "vdd_ldo11";</div><div class='del'>-					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo12_reg: LDO12 {</div><div class='del'>-					regulator-name = "vdd_ldo12";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo13_reg: LDO13 {</div><div class='del'>-					regulator-name = "vdd_ldo13";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo15_reg: LDO15 {</div><div class='del'>-					regulator-name = "vdd_ldo15";</div><div class='del'>-					regulator-min-microvolt = &lt;3100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo16_reg: LDO16 {</div><div class='del'>-					regulator-name = "vdd_ldo16";</div><div class='del'>-					regulator-min-microvolt = &lt;2200000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2200000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo17_reg: LDO17 {</div><div class='del'>-					regulator-name = "tsp_avdd";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo19_reg: LDO19 {</div><div class='del'>-					regulator-name = "vdd_sd";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo24_reg: LDO24 {</div><div class='del'>-					regulator-name = "tsp_io";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo26_reg: LDO26 {</div><div class='del'>-					regulator-name = "vdd_ldo26";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck1_reg: BUCK1 {</div><div class='del'>-					regulator-name = "vdd_mif";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck2_reg: BUCK2 {</div><div class='del'>-					regulator-name = "vdd_arm";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck3_reg: BUCK3 {</div><div class='del'>-					regulator-name = "vdd_int";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck4_reg: BUCK4 {</div><div class='del'>-					regulator-name = "vdd_g3d";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck5_reg: BUCK5 {</div><div class='del'>-					regulator-name = "vdd_mem";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck6_reg: BUCK6 {</div><div class='del'>-					regulator-name = "vdd_kfc";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck7_reg: BUCK7 {</div><div class='del'>-					regulator-name = "vdd_1.0v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck8_reg: BUCK8 {</div><div class='del'>-					regulator-name = "vdd_1.8v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck9_reg: BUCK9 {</div><div class='del'>-					regulator-name = "vdd_2.8v_ldo";</div><div class='del'>-					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3750000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				buck10_reg: BUCK10 {</div><div class='del'>-					regulator-name = "vdd_vmem";</div><div class='del'>-					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	emmc_pwrseq: pwrseq {</div><div class='del'>-		pinctrl-0 = &lt;&amp;emmc_nrst_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		compatible = "mmc-pwrseq-emmc";</div><div class='del'>-		reset-gpios = &lt;&amp;gpd1 0 1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c_2: i2c@12C80000 {</div><div class='del'>-		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='del'>-		samsung,i2c-max-bus-freq = &lt;66000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		hdmiddc@50 {</div><div class='del'>-			compatible = "samsung,exynos4210-hdmiddc";</div><div class='del'>-			reg = &lt;0x50&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@101E0000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hdmi {</div><div class='del'>-	status = "okay";</div><div class='del'>-	hpd-gpio = &lt;&amp;gpx3 7 0&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;hdmi_hpd_irq&gt;;</div><div class='del'>-</div><div class='del'>-	vdd_osc-supply = &lt;&amp;ldo7_reg&gt;;</div><div class='del'>-	vdd_pll-supply = &lt;&amp;ldo6_reg&gt;;</div><div class='del'>-	vdd-supply = &lt;&amp;ldo6_reg&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mfc {</div><div class='del'>-	samsung,mfc-r = &lt;0x43000000 0x800000&gt;;</div><div class='del'>-	samsung,mfc-l = &lt;0x51000000 0x800000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='del'>-	broken-cd;</div><div class='del'>-	card-detect-delay = &lt;200&gt;;</div><div class='del'>-	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='del'>-	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	card-detect-delay = &lt;200&gt;;</div><div class='del'>-	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='del'>-	samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl_0 {</div><div class='del'>-	hdmi_hpd_irq: hdmi-hpd-irq {</div><div class='del'>-		samsung,pins = "gpx3-7";</div><div class='del'>-		samsung,pin-function = &lt;0&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;1&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl_1 {</div><div class='del'>-	emmc_nrst_pin: emmc-nrst {</div><div class='del'>-		samsung,pins = "gpd1-0";</div><div class='del'>-		samsung,pin-function = &lt;0&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;0&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd_dwc3_0 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd_dwc3_1 {</div><div class='del'>-	dr_mode = "otg";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c_0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts<br/>index 268609a42b2c..a98501bab6fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440-sd5v1.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5440-sd5v1.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440-sd5v1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440-sd5v1.dts</a></div><div class='hunk'>@@ -27,13 +27,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gmac: ethernet@00230000 {</div><div class='del'>-		fixed_phy;</div><div class='del'>-		phy_addr = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	spi {</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	fixed_phy;</div><div class='add'>+	phy_addr = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts<br/>index ff55dac6e219..e4443f4e6572 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440-ssdk5440.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5440-ssdk5440.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440-ssdk5440.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440-ssdk5440.dts</a></div><div class='hunk'>@@ -20,59 +20,58 @@</div><div class='ctx'> 		bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi_0: spi@D0000 {</div><div class='del'>-</div><div class='del'>-		flash: w25q128@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "winbond,w25q128";</div><div class='del'>-			spi-max-frequency = &lt;15625000&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			controller-data {</div><div class='del'>-				samsung,spi-feedback-delay = &lt;0&gt;;</div><div class='del'>-			};</div><div class='add'>+	fixed-rate-clocks {</div><div class='add'>+		xtal {</div><div class='add'>+			compatible = "samsung,clock-xtal";</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			partition@00000 {</div><div class='del'>-				label = "BootLoader";</div><div class='del'>-				reg = &lt;0x60000 0x80000&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='add'>+&amp;pcie_0 {</div><div class='add'>+	reset-gpio = &lt;&amp;pin_ctrl 5 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			partition@e0000 {</div><div class='del'>-				label = "Recovery-Kernel";</div><div class='del'>-				reg = &lt;0xe0000 0x300000&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='add'>+&amp;pcie_1 {</div><div class='add'>+	reset-gpio = &lt;&amp;pin_ctrl 22 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			partition@3e0000 {</div><div class='del'>-				label = "CRAM-FS";</div><div class='del'>-				reg = &lt;0x3e0000 0x700000&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='add'>+&amp;spi_0 {</div><div class='add'>+	flash: w25q128@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "winbond,w25q128";</div><div class='add'>+		spi-max-frequency = &lt;15625000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		controller-data {</div><div class='add'>+			samsung,spi-feedback-delay = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-			partition@ae0000 {</div><div class='del'>-				label = "User-Data";</div><div class='del'>-				reg = &lt;0xae0000 0x520000&gt;;</div><div class='del'>-			};</div><div class='add'>+		partition@00000 {</div><div class='add'>+			label = "BootLoader";</div><div class='add'>+			reg = &lt;0x60000 0x80000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='add'>+		partition@e0000 {</div><div class='add'>+			label = "Recovery-Kernel";</div><div class='add'>+			reg = &lt;0xe0000 0x300000&gt;;</div><div class='add'>+			read-only;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-	};</div><div class='add'>+		partition@3e0000 {</div><div class='add'>+			label = "CRAM-FS";</div><div class='add'>+			reg = &lt;0x3e0000 0x700000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	fixed-rate-clocks {</div><div class='del'>-		xtal {</div><div class='del'>-			compatible = "samsung,clock-xtal";</div><div class='del'>-			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		partition@ae0000 {</div><div class='add'>+			label = "User-Data";</div><div class='add'>+			reg = &lt;0xae0000 0x520000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	pcie@290000 {</div><div class='del'>-		reset-gpio = &lt;&amp;pin_ctrl 5 0&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie@2a0000 {</div><div class='del'>-		reset-gpio = &lt;&amp;pin_ctrl 22 0&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi<br/>index 59d9416b3b03..f18b51f2eeaa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5440.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5440.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5440.dtsi</a></div><div class='hunk'>@@ -279,7 +279,7 @@</div><div class='ctx'> 		clock-names = "usbhost";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie@290000 {</div><div class='add'>+	pcie_0: pcie@290000 {</div><div class='ctx'> 		compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";</div><div class='ctx'> 		reg = &lt;0x290000 0x1000</div><div class='ctx'> 			0x270000 0x1000</div><div class='hunk'>@@ -300,7 +300,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie@2a0000 {</div><div class='add'>+	pcie_1: pcie@2a0000 {</div><div class='ctx'> 		compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";</div><div class='ctx'> 		reg = &lt;0x2a0000 0x1000</div><div class='ctx'> 			0x272000 0x1000</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts<br/>index 02eb8b15374f..7d5b386b5ae6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5800-peach-pi.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/exynos5800-peach-pi.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5800-peach-pi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/exynos5800-peach-pi.dts</a></div><div class='hunk'>@@ -990,7 +990,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;uart_3 {</div><div class='add'>+&amp;serial_3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts<br/>index 82045398bf1f..a8b1c53ebe46 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23-olinuxino.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx23-olinuxino.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23-olinuxino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx23-olinuxino.dts</a></div><div class='hunk'>@@ -74,6 +74,12 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			i2c: i2c@80058000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;i2c_pins_b&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			duart: serial@80070000 {</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;duart_pins_a&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi<br/>index bbcfb5a19c77..b995333ea22b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx23.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx23.dtsi</a></div><div class='hunk'>@@ -308,6 +308,39 @@</div><div class='ctx'> 					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='ctx'> 					fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				i2c_pins_a: i2c@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;</div><div class='add'>+						MX23_PAD_I2C_SCL__I2C_SCL</div><div class='add'>+						MX23_PAD_I2C_SDA__I2C_SDA</div><div class='add'>+					&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_8mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c_pins_b: i2c@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;</div><div class='add'>+						MX23_PAD_LCD_ENABLE__I2C_SCL</div><div class='add'>+						MX23_PAD_LCD_HSYNC__I2C_SDA</div><div class='add'>+					&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_8mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c_pins_c: i2c@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;</div><div class='add'>+						MX23_PAD_SSP1_DATA1__I2C_SCL</div><div class='add'>+						MX23_PAD_SSP1_DATA2__I2C_SDA</div><div class='add'>+					&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_8mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			digctl@8001c000 {</div><div class='hunk'>@@ -435,6 +468,7 @@</div><div class='ctx'> 				interrupts = &lt;36 37 38 39 40 41 42 43 44&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spdif@80054000 {</div><div class='hunk'>@@ -444,8 +478,13 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			i2c@80058000 {</div><div class='add'>+			i2c: i2c@80058000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx23-i2c";</div><div class='ctx'> 				reg = &lt;0x80058000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;27&gt;;</div><div class='add'>+				clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 				dmas = &lt;&amp;dma_apbx 3&gt;;</div><div class='ctx'> 				dma-names = "rx-tx";</div><div class='ctx'> 				status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi<br/>index bc215e4b75fd..b69be5c499cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx27.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx27.dtsi</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt1: timer@10003000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x10003000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;26&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT1_IPG_GATE&gt;,</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt2: timer@10004000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x10004000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;25&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT2_IPG_GATE&gt;,</div><div class='hunk'>@@ -126,7 +126,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt3: timer@10005000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x10005000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;24&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT3_IPG_GATE&gt;,</div><div class='hunk'>@@ -376,7 +376,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt4: timer@10019000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x10019000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;4&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT4_IPG_GATE&gt;,</div><div class='hunk'>@@ -385,7 +385,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt5: timer@1001a000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x1001a000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;3&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT5_IPG_GATE&gt;,</div><div class='hunk'>@@ -436,7 +436,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt6: timer@1001f000 {</div><div class='del'>-				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";</div><div class='add'>+				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";</div><div class='ctx'> 				reg = &lt;0x1001f000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;2&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX27_CLK_GPT6_IPG_GATE&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts<br/>index b04b6b8850a7..570aa339a05e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx28-cfa10036.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx28-cfa10036.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx28-cfa10036.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx28-cfa10036.dts</a></div><div class='hunk'>@@ -99,6 +99,9 @@</div><div class='ctx'> 					solomon,height = &lt;32&gt;;</div><div class='ctx'> 					solomon,width = &lt;128&gt;;</div><div class='ctx'> 					solomon,page-offset = &lt;0&gt;;</div><div class='add'>+					solomon,com-lrremap;</div><div class='add'>+					solomon,com-invdir;</div><div class='add'>+					solomon,com-offset = &lt;32&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi<br/>index 181ae5ebf23f..ab4ba39f2ed9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-qsb-common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx53-qsb-common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-qsb-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx53-qsb-common.dtsi</a></div><div class='hunk'>@@ -295,9 +295,10 @@</div><div class='ctx'> &amp;tve {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_vga_sync&gt;;</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c2&gt;;</div><div class='ctx'> 	fsl,tve-mode = "vga";</div><div class='del'>-	fsl,hsync-pin = &lt;4&gt;;</div><div class='del'>-	fsl,vsync-pin = &lt;6&gt;;</div><div class='add'>+	fsl,hsync-pin = &lt;7&gt;;	/* IPU DI1 PIN7 via EIM_OE */</div><div class='add'>+	fsl,vsync-pin = &lt;8&gt;;	/* IPU DI1 PIN8 via EIM_RW */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-apf6dev.dts b/arch/arm/boot/dts/imx6dl-apf6dev.dts<br/>new file mode 100644<br/>index 000000000000..df26e542ab3a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-apf6dev.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-apf6dev.dts</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Armadeus Systems</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6dl.dtsi"</div><div class='add'>+#include "imx6qdl-apf6.dtsi"</div><div class='add'>+#include "imx6qdl-apf6dev.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Armadeus APF6 Solo Module on APF6Dev Board";</div><div class='add'>+	compatible = "armadeus,imx6dl-apf6dev", "armadeus,imx6dl-apf6", "fsl,imx6dl";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts<br/>new file mode 100644<br/>index 000000000000..bb92f309c191<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-aristainetos2_4.dts</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+/*</div><div class='add'>+ * support for the imx6 based aristainetos2 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6dl.dtsi"</div><div class='add'>+#include "imx6qdl-aristainetos2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "aristainetos2 i.MX6 Dual Lite Board 4";</div><div class='add'>+	compatible = "fsl,imx6dl";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display0: display@di0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fsl,imx-parallel-display";</div><div class='add'>+		interface-pix-fmt = "rgb24";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ipu_disp&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			display0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ipu1_di0_disp0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			display_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	lcd_panel: display@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "lg,lg4573";</div><div class='add'>+		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		power-on-delay = &lt;10&gt;;</div><div class='add'>+</div><div class='add'>+		display-timings {</div><div class='add'>+			480x800p57 {</div><div class='add'>+				native-mode;</div><div class='add'>+				clock-frequency = &lt;27000027&gt;;</div><div class='add'>+				hactive = &lt;480&gt;;</div><div class='add'>+				vactive = &lt;800&gt;;</div><div class='add'>+				hfront-porch = &lt;10&gt;;</div><div class='add'>+				hback-porch = &lt;59&gt;;</div><div class='add'>+				hsync-len = &lt;10&gt;;</div><div class='add'>+				vback-porch = &lt;15&gt;;</div><div class='add'>+				vfront-porch = &lt;15&gt;;</div><div class='add'>+				vsync-len = &lt;15&gt;;</div><div class='add'>+				hsync-active = &lt;1&gt;;</div><div class='add'>+				vsync-active = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	touch: touch@4b {</div><div class='add'>+		compatible = "atmel,maxtouch";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;9 8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ipu1_di0_disp0 {</div><div class='add'>+	remote-endpoint = &lt;&amp;display0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_ipu_disp: ipudisp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0xE1</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0xe1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0xE1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0xE1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts<br/>new file mode 100644<br/>index 000000000000..3d5ad2cc7e22<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-aristainetos2_7.dts</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * support for the imx6 based aristainetos2 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6dl.dtsi"</div><div class='add'>+#include "imx6qdl-aristainetos2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "aristainetos2 i.MX6 Dual Lite Board 7";</div><div class='add'>+	compatible = "fsl,imx6dl";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel: panel {</div><div class='add'>+		compatible = "lg,lb070wv8";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio6 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	touch: touch@4d {</div><div class='add'>+		compatible = "atmel,maxtouch";</div><div class='add'>+		reg = &lt;0x4d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;9 8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ldb {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	lvds-channel@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			lvds0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ipu1_di0_lvds0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			lvds0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts<br/>index e0b7fe8e18f8..2a43917d048e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-cubox-i.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6dl-cubox-i.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-cubox-i.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-cubox-i.dts</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-gw551x.dts b/arch/arm/boot/dts/imx6dl-gw551x.dts<br/>new file mode 100644<br/>index 000000000000..82d5f85722ea<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-gw551x.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-gw551x.dts</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Gateworks Corporation</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6dl.dtsi"</div><div class='add'>+#include "imx6qdl-gw551x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Gateworks Ventana i.MX6 DualLite/Solo GW551X";</div><div class='add'>+	compatible = "gw,imx6dl-gw551x", "gw,ventana", "fsl,imx6dl";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts<br/>index 7369d2d7da3e..d5c966031962 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-hummingboard.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6dl-hummingboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl-hummingboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl-hummingboard.dts</a></div><div class='hunk'>@@ -8,9 +8,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi<br/>index f94bf72832af..4b0ec0703825 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6dl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6dl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6dl.dtsi</a></div><div class='hunk'>@@ -106,6 +106,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpt {</div><div class='add'>+	compatible = "fsl,imx6dl-gpt", "fsl,imx6q-gpt";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hdmi {</div><div class='ctx'> 	compatible = "fsl,imx6dl-hdmi";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-apf6dev.dts b/arch/arm/boot/dts/imx6q-apf6dev.dts<br/>new file mode 100644<br/>index 000000000000..4e4de821d9e5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-apf6dev.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-apf6dev.dts</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Armadeus Systems</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6q.dtsi"</div><div class='add'>+#include "imx6qdl-apf6.dtsi"</div><div class='add'>+#include "imx6qdl-apf6dev.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Armadeus APF6 Quad / Dual Module on APF6Dev Board";</div><div class='add'>+	compatible = "armadeus,imx6q-apf6dev", "armadeus,imx6q-apf6", "fsl,imx6q";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts<br/>index 670bd8c4c847..353425edcdf4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-cubox-i.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6q-cubox-i.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-cubox-i.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-cubox-i.dts</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-gw551x.dts b/arch/arm/boot/dts/imx6q-gw551x.dts<br/>new file mode 100644<br/>index 000000000000..2c7feeef1b0e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-gw551x.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-gw551x.dts</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Gateworks Corporation</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6q.dtsi"</div><div class='add'>+#include "imx6qdl-gw551x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Gateworks Ventana i.MX6 Dual/Quad GW551X";</div><div class='add'>+	compatible = "gw,imx6q-gw551x", "gw,ventana", "fsl,imx6q";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts<br/>index 0f6044553a24..1884c16784e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-hummingboard.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6q-hummingboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-hummingboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6q-hummingboard.dts</a></div><div class='hunk'>@@ -8,9 +8,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-apf6.dtsi b/arch/arm/boot/dts/imx6qdl-apf6.dtsi<br/>new file mode 100644<br/>index 000000000000..1ebf29f43a24<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-apf6.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-apf6.dtsi</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Armadeus Systems</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-reset-duration = &lt;10&gt;;</div><div class='add'>+	phy-reset-gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bluetooth */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wi-Fi */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	wlcore: wlcore@2 {</div><div class='add'>+		compatible = "ti,wl1271";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		ref-clock-frequency = &lt;38400000&gt;;</div><div class='add'>+		tcxo-clock-frequency = &lt;38400000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	apf6 {</div><div class='add'>+		pinctrl_enet: enetgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0</div><div class='add'>+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0</div><div class='add'>+				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x130b0</div><div class='add'>+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x13030</div><div class='add'>+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030</div><div class='add'>+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1f030</div><div class='add'>+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1f030</div><div class='add'>+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart2: uart2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x130b0 /* BT_EN */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17059</div><div class='add'>+				MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	0x1b0b0 /* WL_EN */</div><div class='add'>+				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x1b0b0 /* WL_IRQ */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059</div><div class='add'>+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi<br/>new file mode 100644<br/>index 000000000000..e26ebeb5b45c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-apf6dev.dtsi</a></div><div class='hunk'>@@ -0,0 +1,479 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Armadeus Systems</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display@di0 {</div><div class='add'>+		compatible = "fsl,imx-parallel-display";</div><div class='add'>+		interface-pix-fmt = "bgr666";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ipu1_disp1&gt;;</div><div class='add'>+</div><div class='add'>+		display-timings {</div><div class='add'>+			lw700 {</div><div class='add'>+				clock-frequency = &lt;33000033&gt;;</div><div class='add'>+				hactive = &lt;800&gt;;</div><div class='add'>+				vactive = &lt;480&gt;;</div><div class='add'>+				hback-porch = &lt;96&gt;;</div><div class='add'>+				hfront-porch = &lt;96&gt;;</div><div class='add'>+				vback-porch = &lt;20&gt;;</div><div class='add'>+				vfront-porch = &lt;21&gt;;</div><div class='add'>+				hsync-len = &lt;64&gt;;</div><div class='add'>+				vsync-len = &lt;4&gt;;</div><div class='add'>+				hsync-active = &lt;1&gt;;</div><div class='add'>+				vsync-active = &lt;1&gt;;</div><div class='add'>+				de-active = &lt;1&gt;;</div><div class='add'>+				pixelclk-active = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			display_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ipu1_di0_disp0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		user-button {</div><div class='add'>+			label = "User button";</div><div class='add'>+			gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;BTN_MISC&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		user-led {</div><div class='add'>+			label = "User LED";</div><div class='add'>+			gpios = &lt;&amp;gpio7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		reg_3p3v: 3p3v {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "3P3V";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usbh1_vbus: usb-h1-vbus {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "usb_h1_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usb_otg_vbus: usb-otg-vbus {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "usb_otg_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx6-armadeus-sgtl5000",</div><div class='add'>+			     "fsl,imx-audio-sgtl5000";</div><div class='add'>+		model = "imx6-armadeus-sgtl5000";</div><div class='add'>+		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;codec&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+		mux-int-port = &lt;1&gt;;</div><div class='add'>+		mux-ext-port = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-spdif {</div><div class='add'>+		compatible = "fsl,imx-audio-spdif";</div><div class='add'>+		model = "imx-spdif";</div><div class='add'>+		spdif-controller = &lt;&amp;spdif&gt;;</div><div class='add'>+		spdif-out;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audmux {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_audmux&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	fsl,spi-num-chipselects = &lt;3&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio4 9 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio4 10 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio4 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@48 {</div><div class='add'>+		compatible = "semtech,sx8654";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touchscreen&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	codec: sgtl5000@0a {</div><div class='add'>+		compatible = "fsl,sgtl5000";</div><div class='add'>+		reg = &lt;0x0a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks 201&gt;;</div><div class='add'>+		VDDA-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ipu1_di0_disp0 {</div><div class='add'>+	remote-endpoint = &lt;&amp;display_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio6 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GPS */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GSM */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3 &amp;pinctrl_gsm&gt;;</div><div class='add'>+	fsl,uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* console */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usbh1_vbus&gt;;</div><div class='add'>+	phy_type = "utmi";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_otg_vbus&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* microSD */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spdif {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spdif&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpios&gt;;</div><div class='add'>+</div><div class='add'>+	apf6dev {</div><div class='add'>+		pinctrl_audmux: audmuxgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0</div><div class='add'>+				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1</div><div class='add'>+				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1</div><div class='add'>+				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1</div><div class='add'>+				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09  0x1b0b0</div><div class='add'>+				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0</div><div class='add'>+				MX6QDL_PAD_KEY_COL2__GPIO4_IO10  0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gpio_leds: gpioledsgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gpios: gpiosgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 	0x100b1</div><div class='add'>+				MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 	0x100b1</div><div class='add'>+				MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21  	0x100b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gsm: gsmgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x130b0 /* GSM_POKIN */</div><div class='add'>+				MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c1: i2c1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c2: i2c2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c3: i2c3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ipu1_disp1: ipu1disp1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x100b1</div><div class='add'>+				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x100b1</div><div class='add'>+				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x100b1</div><div class='add'>+				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x100b1</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x100b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_pcie: pciegrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_pwm3: pwm3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart1: uart1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart3: uart3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b0</div><div class='add'>+				MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart4: uart4grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbotg: usbotggrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='add'>+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='add'>+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='add'>+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='add'>+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='add'>+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_spdif: spdifgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_touchscreen: touchscreengrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi<br/>new file mode 100644<br/>index 000000000000..1d85de2befb3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,633 @@</div><div class='add'>+/*</div><div class='add'>+ * support for the imx6 based aristainetos2 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio6 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		reg_2p5v: 2p5v {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "2P5V";</div><div class='add'>+			regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_3p3v: 3p3v {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "3P3V";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usbh1_vbus: usb-h1-vbus {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			enable-active-high;</div><div class='add'>+			gpio = &lt;&amp;gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_aristainetos2_usbh1_vbus&gt;;</div><div class='add'>+			regulator-name = "usb_h1_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usbotg_vbus: usb-otg-vbus {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			enable-active-high;</div><div class='add'>+			gpio = &lt;&amp;gpio4 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_aristainetos2_usbotg_vbus&gt;;</div><div class='add'>+			regulator-name = "usb_otg_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audmux {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_audmux&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	fsl,spi-num-chipselects = &lt;3&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio4 9 GPIO_ACTIVE_HIGH</div><div class='add'>+		    &amp;gpio4 10 GPIO_ACTIVE_HIGH</div><div class='add'>+		    &amp;gpio4 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	fsl,spi-num-chipselects = &lt;2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio2 26 GPIO_ACTIVE_HIGH &amp;gpio2 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi4 {</div><div class='add'>+	fsl,spi-num-chipselects = &lt;2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio3 29 GPIO_ACTIVE_HIGH &amp;gpio5 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash: m25p80@1 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "micron,n25q128a11";</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@58 {</div><div class='add'>+		compatible = "dlg,da9063";</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;04 0x8&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			bcore1 {</div><div class='add'>+				regulator-name = "bcore1";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bcore2 {</div><div class='add'>+				regulator-name = "bcore2";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bpro {</div><div class='add'>+				regulator-name = "bpro";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bperi {</div><div class='add'>+				regulator-name = "bperi";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bmem {</div><div class='add'>+				regulator-name = "bmem";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2 {</div><div class='add'>+				regulator-name = "ldo2";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3 {</div><div class='add'>+				regulator-name = "ldo3";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4 {</div><div class='add'>+				regulator-name = "ldo4";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5 {</div><div class='add'>+				regulator-name = "ldo5";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6 {</div><div class='add'>+				regulator-name = "ldo6";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7 {</div><div class='add'>+				regulator-name = "ldo7";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8 {</div><div class='add'>+				regulator-name = "ldo8";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9 {</div><div class='add'>+				regulator-name = "ldo9";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo10 {</div><div class='add'>+				regulator-name = "ldo10";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo11 {</div><div class='add'>+				regulator-name = "ldo11";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bio {</div><div class='add'>+				regulator-name = "bio";</div><div class='add'>+				regulator-always-on = &lt;1&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tmp103: tmp103@71 {</div><div class='add'>+		compatible = "ti,tmp103";</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	expander: tca6416@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "dallas,m41t00";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@50{</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@57{</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-reset-gpios = &lt;&amp;gpio7 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	txd0-skew-ps = &lt;0&gt;;</div><div class='add'>+	txd1-skew-ps = &lt;0&gt;;</div><div class='add'>+	txd2-skew-ps = &lt;0&gt;;</div><div class='add'>+	txd3-skew-ps = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpmi_nand&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	reset-gpio = &lt;&amp;gpio2 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	fsl,uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	fsl,uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usbh1_vbus&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usbotg_vbus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio1 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_audmux: audmux {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_RW__GPIO2_IO26   0x100b1 /* SS0# */</div><div class='add'>+			MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x100b1 /* SS1# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi4: ecspi4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29  0x100b1 /* SS0# */</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02  0x100b1 /* SS1# */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio: gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0 /* led enable */</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x1b0b0 /* LCD power enable */</div><div class='add'>+			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x1b0b0 /* led yellow */</div><div class='add'>+			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b0 /* led red */</div><div class='add'>+			MX6QDL_PAD_EIM_A24__GPIO5_IO04		0x1b0b0 /* led green */</div><div class='add'>+			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b0 /* led blue */</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0 /* Profibus IRQ */</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b0 /* FPGA IRQ */</div><div class='add'>+			MX6QDL_PAD_EIM_A23__GPIO6_IO06		0x1b0b0 /* spi bus #2 SS driver enable */</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0 /* RST_LOC# PHY reset input (has pull-down!)*/</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x1b0b0 /* USB_OTG_ID = GPIO1_24*/</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__GPIO2_IO09		0x1b0b0 /* Touchscreen IRQ */</div><div class='add'>+			MX6QDL_PAD_EIM_A22__GPIO2_IO16		0x1b0b0 /* PCIe reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpmi_nand: gpmi-nand {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x1b0b0 /* backlight enable */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D20__UART1_RTS_B		0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__UART1_CTS_B		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D31__UART3_RTS_B	  0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D23__UART3_CTS_B	  0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x1b0b0 /* SD1 card detect input */</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x1b0b0 /* SD1 write protect input */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x71</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x71</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71</div><div class='add'>+			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x1b0b0 /* SD2 level shifter output enable */</div><div class='add'>+			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0 /* SD2 card detect input */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10		0x1b0b0 /* SD2 write protect input */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi<br/>index d033bb182060..59e5d15e3ec4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-cubox-i.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-cubox-i.dtsi</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi<br/>new file mode 100644<br/>index 000000000000..d1866a0a2f13<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-gw551x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-gw551x.dtsi</a></div><div class='hunk'>@@ -0,0 +1,314 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Gateworks Corporation</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of</div><div class='add'>+ *     the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* these are used by bootloader for disabling nodes */</div><div class='add'>+	aliases {</div><div class='add'>+		led0 = &amp;led0;</div><div class='add'>+		nand = &amp;gpmi;</div><div class='add'>+		ssi0 = &amp;ssi1;</div><div class='add'>+		usb0 = &amp;usbh1;</div><div class='add'>+		usb1 = &amp;usbotg;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttymxc1,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led0: user1 {</div><div class='add'>+			label = "user1";</div><div class='add'>+			gpios = &lt;&amp;gpio4 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reg_5p0v: regulator@0 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			regulator-name = "5P0V";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usb_h1_vbus: regulator@1 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			regulator-name = "usb_h1_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usb_otg_vbus: regulator@2 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			regulator-name = "usb_otg_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpmi_nand&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom1: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom2: eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom3: eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom4: eeprom@53 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio: pca9555@23 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: ds1672@68 {</div><div class='add'>+		compatible = "dallas,ds1672";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio_exp: pca9555@24 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_otg_vbus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_h1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	imx6qdl-gw51xx {</div><div class='add'>+		pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1</div><div class='add'>+				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1</div><div class='add'>+				MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* CAN_STBY */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gpio_leds: gpioledsgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='add'>+				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='add'>+				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='add'>+				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='add'>+				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c1: i2c1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c2: i2c2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c3: i2c3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1</div><div class='add'>+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_pcie: pciegrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0 /* PCIE RST */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart2: uart2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='add'>+				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart3: uart3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbotg: usbotggrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi<br/>index 151a3db2aea9..62a82f3eba88 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-hummingboard.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-hummingboard.dtsi</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='hunk'>@@ -192,6 +191,12 @@</div><div class='ctx'> 			&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_hummingboard_pwm1: pwm1grp {</div><div class='ctx'> 			fsl,pins = &lt;MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -245,6 +250,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hummingboard_pcie_reset&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio3 4 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwm1 {</div><div class='ctx'> 	 pinctrl-names = "default";</div><div class='ctx'> 	 pinctrl-0 = &lt;&amp;pinctrl_hummingboard_pwm1&gt;;</div><div class='hunk'>@@ -263,7 +275,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ssi1 {</div><div class='del'>-	fsl,mode = "i2s-slave";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi<br/>index 4a1820309cdb..469ef58ce4bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi</a></div><div class='hunk'>@@ -10,9 +10,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi<br/>index 349f82be816e..6d4069cc9419 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-microsom.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-microsom.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-microsom.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-microsom.dtsi</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'>  * whole.</div><div class='ctx'>  *</div><div class='ctx'>  *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of the</div><div class='del'>- *     License.</div><div class='add'>+ *     modify it under the terms of the GNU General Public License</div><div class='add'>+ *     version 2 as published by the Free Software Foundation.</div><div class='ctx'>  *</div><div class='ctx'>  *     This file is distributed in the hope that it will be useful</div><div class='ctx'>  *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='hunk'>@@ -39,15 +38,98 @@</div><div class='ctx'>  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='ctx'>  *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+/ {</div><div class='add'>+	clk_sdio: sdio-clock {</div><div class='add'>+		compatible = "gpio-gate-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_microsom_brcm_osc&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio5 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		reg_brcm: brcm-reg {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			enable-active-high;</div><div class='add'>+			gpio = &lt;&amp;gpio3 19 0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_microsom_brcm_reg&gt;;</div><div class='add'>+			regulator-name = "brcm_reg";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			startup-delay-us = &lt;200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc1_pwrseq: usdhc1_pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 26 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+			      &lt;&amp;gpio6 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_sdio&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	microsom {</div><div class='add'>+		pinctrl_microsom_brcm_bt: microsom-brcm-bt {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_microsom_brcm_osc: microsom-brcm-osc {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_microsom_brcm_reg: microsom-brcm-reg {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0</div><div class='add'>+				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_microsom_uart1: microsom-uart1 {</div><div class='ctx'> 			fsl,pins = &lt;</div><div class='ctx'> 				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='ctx'> 				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='ctx'> 			&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pinctrl_microsom_uart4: microsom-uart4 {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='add'>+				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_microsom_usdhc1: microsom-usdhc1 {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='add'>+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -56,3 +138,23 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_microsom_uart1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* UART4 - Connected to optional BRCM Wifi/BT/FM */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_microsom_brcm_bt &amp;pinctrl_microsom_uart4&gt;;</div><div class='add'>+	fsl,uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_microsom_brcm_wifi &amp;pinctrl_microsom_usdhc1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc1_pwrseq&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_brcm&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi<br/>index 08218120e770..3af16dfe417b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi</a></div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	backlight_lvds {</div><div class='add'>+	backlight_lvds: backlight_lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='hunk'>@@ -130,6 +130,17 @@</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "hannstar,hsd100pxn1";</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;audmux {</div><div class='hunk'>@@ -379,18 +390,11 @@</div><div class='ctx'> 		fsl,data-width = &lt;18&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		display-timings {</div><div class='del'>-			native-mode = &lt;&amp;timing0&gt;;</div><div class='del'>-			timing0: hsd100pxn1 {</div><div class='del'>-				clock-frequency = &lt;65000000&gt;;</div><div class='del'>-				hactive = &lt;1024&gt;;</div><div class='del'>-				vactive = &lt;768&gt;;</div><div class='del'>-				hback-porch = &lt;220&gt;;</div><div class='del'>-				hfront-porch = &lt;40&gt;;</div><div class='del'>-				vback-porch = &lt;21&gt;;</div><div class='del'>-				vfront-porch = &lt;7&gt;;</div><div class='del'>-				hsync-len = &lt;60&gt;;</div><div class='del'>-				vsync-len = &lt;10&gt;;</div><div class='add'>+		port@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			lvds0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi<br/>index 0b28a9d5241e..e00c44f6a0df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl-sabrelite.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl-sabrelite.dtsi</a></div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	backlight_lvds {</div><div class='add'>+	backlight_lvds: backlight_lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='hunk'>@@ -129,6 +129,17 @@</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "hannstar,hsd100pxn1";</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;audmux {</div><div class='hunk'>@@ -374,18 +385,11 @@</div><div class='ctx'> 		fsl,data-width = &lt;18&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		display-timings {</div><div class='del'>-			native-mode = &lt;&amp;timing0&gt;;</div><div class='del'>-			timing0: hsd100pxn1 {</div><div class='del'>-				clock-frequency = &lt;65000000&gt;;</div><div class='del'>-				hactive = &lt;1024&gt;;</div><div class='del'>-				vactive = &lt;768&gt;;</div><div class='del'>-				hback-porch = &lt;220&gt;;</div><div class='del'>-				hfront-porch = &lt;40&gt;;</div><div class='del'>-				vback-porch = &lt;21&gt;;</div><div class='del'>-				vfront-porch = &lt;7&gt;;</div><div class='del'>-				hsync-len = &lt;60&gt;;</div><div class='del'>-				vsync-len = &lt;10&gt;;</div><div class='add'>+		port@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			lvds0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi<br/>index f74a8ded515f..e6d13592080d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6qdl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6qdl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6qdl.dtsi</a></div><div class='hunk'>@@ -119,6 +119,34 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		hdmi: hdmi@0120000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x00120000 0x9000&gt;;</div><div class='add'>+			interrupts = &lt;0 115 0x04&gt;;</div><div class='add'>+			gpr = &lt;&amp;gpr&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks IMX6QDL_CLK_HDMI_IAHB&gt;,</div><div class='add'>+				 &lt;&amp;clks IMX6QDL_CLK_HDMI_ISFR&gt;;</div><div class='add'>+			clock-names = "iahb", "isfr";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_mux_0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ipu1_di0_hdmi&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_mux_1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ipu1_di1_hdmi&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		timer@00a00600 {</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 			reg = &lt;0x00a00600 0x20&gt;;</div><div class='hunk'>@@ -343,6 +371,7 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6QDL_CLK_VPU_AXI&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6QDL_CLK_MMDC_CH0_AXI&gt;;</div><div class='ctx'> 				clock-names = "per", "ahb";</div><div class='add'>+				power-domains = &lt;&amp;gpc 1&gt;;</div><div class='ctx'> 				resets = &lt;&amp;src 1&gt;;</div><div class='ctx'> 				iram = &lt;&amp;ocram&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -778,34 +807,6 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			hdmi: hdmi@0120000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x00120000 0x9000&gt;;</div><div class='del'>-				interrupts = &lt;0 115 0x04&gt;;</div><div class='del'>-				gpr = &lt;&amp;gpr&gt;;</div><div class='del'>-				clocks = &lt;&amp;clks IMX6QDL_CLK_HDMI_IAHB&gt;,</div><div class='del'>-					 &lt;&amp;clks IMX6QDL_CLK_HDMI_ISFR&gt;;</div><div class='del'>-				clock-names = "iahb", "isfr";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					hdmi_mux_0: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;ipu1_di0_hdmi&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					hdmi_mux_1: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;ipu1_di1_hdmi&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			dcic1: dcic@020e4000 {</div><div class='ctx'> 				reg = &lt;0x020e4000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6sl-warp.dts b/arch/arm/boot/dts/imx6sl-warp.dts<br/>index 64f7decf1fdc..0da906bd8df2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6sl-warp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/imx6sl-warp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6sl-warp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx6sl-warp.dts</a></div><div class='hunk'>@@ -58,40 +58,6 @@</div><div class='ctx'> 		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	regulators {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		reg_usb_otg1_vbus: regulator@0 {</div><div class='del'>-			compatible = "regulator-fixed";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			regulator-name = "usb_otg1_vbus";</div><div class='del'>-			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-			gpio = &lt;&amp;gpio4 0 0&gt;;</div><div class='del'>-			enable-active-high;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		reg_usb_otg2_vbus: regulator@1 {</div><div class='del'>-			compatible = "regulator-fixed";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			regulator-name = "usb_otg2_vbus";</div><div class='del'>-			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-			gpio = &lt;&amp;gpio4 2 0&gt;;</div><div class='del'>-			enable-active-high;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		reg_1p8v: regulator@2 {</div><div class='del'>-			compatible = "regulator-fixed";</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			regulator-name = "1P8V";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	usdhc3_pwrseq: usdhc3_pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_LOW&gt;, 	/* WL_REG_ON */</div><div class='hunk'>@@ -121,14 +87,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbotg1 {</div><div class='del'>-	vbus-supply = &lt;&amp;reg_usb_otg1_vbus&gt;;</div><div class='del'>-	dr_mode = "host";</div><div class='add'>+	dr_mode = "peripheral";</div><div class='ctx'> 	disable-over-current;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbotg2 {</div><div class='del'>-	vbus-supply = &lt;&amp;reg_usb_otg2_vbus&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='ctx'> 	disable-over-current;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx7d-pinfunc.h b/arch/arm/boot/dts/imx7d-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..a8d81497edb3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx7d-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,1038 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_IMX7D_PINFUNC_H</div><div class='add'>+#define __DTS_IMX7D_PINFUNC_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The pin function ID is a tuple of</div><div class='add'>+ * &lt;mux_reg conf_reg input_reg mux_mode input_val&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__EPDC_DATA0                          0x0034 0x02A4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD                     0x0034 0x02A4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0                        0x0034 0x02A4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__KPP_ROW3                            0x0034 0x02A4 0x0620 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__EIM_AD0                             0x0034 0x02A4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__GPIO2_IO0                           0x0034 0x02A4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__LCD_DATA0                           0x0034 0x02A4 0x0638 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA00__LCD_CLK                             0x0034 0x02A4 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__EPDC_DATA1                          0x0038 0x02A8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK                      0x0038 0x02A8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1                        0x0038 0x02A8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__KPP_COL3                            0x0038 0x02A8 0x0600 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__EIM_AD1                             0x0038 0x02A8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__GPIO2_IO1                           0x0038 0x02A8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__LCD_DATA1                           0x0038 0x02A8 0x063C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA01__LCD_ENABLE                          0x0038 0x02A8 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__EPDC_DATA2                          0x003C 0x02AC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B                    0x003C 0x02AC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2                        0x003C 0x02AC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__KPP_ROW2                            0x003C 0x02AC 0x061C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__EIM_AD2                             0x003C 0x02AC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__GPIO2_IO2                           0x003C 0x02AC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__LCD_DATA2                           0x003C 0x02AC 0x0640 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA02__LCD_VSYNC                           0x003C 0x02AC 0x0698 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__EPDC_DATA3                          0x0040 0x02B0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN                     0x0040 0x02B0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3                        0x0040 0x02B0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__KPP_COL2                            0x0040 0x02B0 0x05FC 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__EIM_AD3                             0x0040 0x02B0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__GPIO2_IO3                           0x0040 0x02B0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__LCD_DATA3                           0x0040 0x02B0 0x0644 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA03__LCD_HSYNC                           0x0040 0x02B0 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__EPDC_DATA4                          0x0044 0x02B4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD                       0x0044 0x02B4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__QSPI_A_DQS                          0x0044 0x02B4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__KPP_ROW1                            0x0044 0x02B4 0x0618 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__EIM_AD4                             0x0044 0x02B4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__GPIO2_IO4                           0x0044 0x02B4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__LCD_DATA4                           0x0044 0x02B4 0x0648 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA04__JTAG_FAIL                           0x0044 0x02B4 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__EPDC_DATA5                          0x0048 0x02B8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD                     0x0048 0x02B8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK                         0x0048 0x02B8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__KPP_COL1                            0x0048 0x02B8 0x05F8 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__EIM_AD5                             0x0048 0x02B8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__GPIO2_IO5                           0x0048 0x02B8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__LCD_DATA5                           0x0048 0x02B8 0x064C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE                         0x0048 0x02B8 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__EPDC_DATA6                          0x004C 0x02BC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK                      0x004C 0x02BC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B                        0x004C 0x02BC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__KPP_ROW0                            0x004C 0x02BC 0x0614 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__EIM_AD6                             0x004C 0x02BC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__GPIO2_IO6                           0x004C 0x02BC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__LCD_DATA6                           0x004C 0x02BC 0x0650 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA06__JTAG_DE_B                           0x004C 0x02BC 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__EPDC_DATA7                          0x0050 0x02C0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B                    0x0050 0x02C0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B                        0x0050 0x02C0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__KPP_COL0                            0x0050 0x02C0 0x05F4 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__EIM_AD7                             0x0050 0x02C0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__GPIO2_IO7                           0x0050 0x02C0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__LCD_DATA7                           0x0050 0x02C0 0x0654 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA07__JTAG_DONE                           0x0050 0x02C0 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__EPDC_DATA8                          0x0054 0x02C4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD                     0x0054 0x02C4 0x06E4 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0                        0x0054 0x02C4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__UART6_DCE_RX                        0x0054 0x02C4 0x071C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__UART6_DTE_TX                        0x0054 0x02C4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__EIM_OE                              0x0054 0x02C4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__GPIO2_IO8                           0x0054 0x02C4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__LCD_DATA8                           0x0054 0x02C4 0x0658 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__LCD_BUSY                            0x0054 0x02C4 0x0634 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA08__EPDC_SDCLK                          0x0054 0x02C4 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__EPDC_DATA9                          0x0058 0x02C8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK                      0x0058 0x02C8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1                        0x0058 0x02C8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__UART6_DCE_TX                        0x0058 0x02C8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__UART6_DTE_RX                        0x0058 0x02C8 0x071C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__EIM_RW                              0x0058 0x02C8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__GPIO2_IO9                           0x0058 0x02C8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__LCD_DATA9                           0x0058 0x02C8 0x065C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__LCD_DATA0                           0x0058 0x02C8 0x0638 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA09__EPDC_SDLE                           0x0058 0x02C8 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__EPDC_DATA10                         0x005C 0x02CC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B                    0x005C 0x02CC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2                        0x005C 0x02CC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS                       0x005C 0x02CC 0x0718 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS                       0x005C 0x02CC 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__EIM_CS0_B                           0x005C 0x02CC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__GPIO2_IO10                          0x005C 0x02CC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__LCD_DATA10                          0x005C 0x02CC 0x0660 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__LCD_DATA9                           0x005C 0x02CC 0x065C 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA10__EPDC_SDOE                           0x005C 0x02CC 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__EPDC_DATA11                         0x0060 0x02D0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN                     0x0060 0x02D0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3                        0x0060 0x02D0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS                       0x0060 0x02D0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS                       0x0060 0x02D0 0x0718 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__EIM_BCLK                            0x0060 0x02D0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__GPIO2_IO11                          0x0060 0x02D0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__LCD_DATA11                          0x0060 0x02D0 0x0664 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__LCD_DATA1                           0x0060 0x02D0 0x063C 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA11__EPDC_SDCE0                          0x0060 0x02D0 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__EPDC_DATA12                         0x0064 0x02D4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD                       0x0064 0x02D4 0x06E0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__QSPI_B_DQS                          0x0064 0x02D4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__UART7_DCE_RX                        0x0064 0x02D4 0x0724 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__UART7_DTE_TX                        0x0064 0x02D4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__EIM_LBA_B                           0x0064 0x02D4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__GPIO2_IO12                          0x0064 0x02D4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__LCD_DATA12                          0x0064 0x02D4 0x0668 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__LCD_DATA21                          0x0064 0x02D4 0x068C 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA12__EPDC_GDCLK                          0x0064 0x02D4 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__EPDC_DATA13                         0x0068 0x02D8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD                     0x0068 0x02D8 0x06EC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK                         0x0068 0x02D8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__UART7_DCE_TX                        0x0068 0x02D8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__UART7_DTE_RX                        0x0068 0x02D8 0x0724 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__EIM_WAIT                            0x0068 0x02D8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__GPIO2_IO13                          0x0068 0x02D8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__LCD_DATA13                          0x0068 0x02D8 0x066C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__LCD_CS                              0x0068 0x02D8 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA13__EPDC_GDOE                           0x0068 0x02D8 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__EPDC_DATA14                         0x006C 0x02DC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK                      0x006C 0x02DC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B                        0x006C 0x02DC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS                       0x006C 0x02DC 0x0720 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS                       0x006C 0x02DC 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__EIM_EB_B0                           0x006C 0x02DC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__GPIO2_IO14                          0x006C 0x02DC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__LCD_DATA14                          0x006C 0x02DC 0x0670 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__LCD_DATA22                          0x006C 0x02DC 0x0690 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA14__EPDC_GDSP                           0x006C 0x02DC 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__EPDC_DATA15                         0x0070 0x02E0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B                    0x0070 0x02E0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B                        0x0070 0x02E0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS                       0x0070 0x02E0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS                       0x0070 0x02E0 0x0720 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__EIM_CS1_B                           0x0070 0x02E0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__GPIO2_IO15                          0x0070 0x02E0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__LCD_DATA15                          0x0070 0x02E0 0x0674 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__LCD_WR_RWN                          0x0070 0x02E0 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM                        0x0070 0x02E0 0x0000 0x8 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK                           0x0074 0x02E4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN                      0x0074 0x02E4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0                      0x0074 0x02E4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__KPP_ROW4                             0x0074 0x02E4 0x0624 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__EIM_AD10                             0x0074 0x02E4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__GPIO2_IO16                           0x0074 0x02E4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__LCD_CLK                              0x0074 0x02E4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCLK__LCD_DATA20                           0x0074 0x02E4 0x0688 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__EPDC_SDLE                             0x0078 0x02E8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD                         0x0078 0x02E8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1                       0x0078 0x02E8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__KPP_COL4                              0x0078 0x02E8 0x0604 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__EIM_AD11                              0x0078 0x02E8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__GPIO2_IO17                            0x0078 0x02E8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__LCD_DATA16                            0x0078 0x02E8 0x0678 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDLE__LCD_DATA8                             0x0078 0x02E8 0x0658 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__EPDC_SDOE                             0x007C 0x02EC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0                        0x007C 0x02EC 0x0584 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2                       0x007C 0x02EC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__KPP_COL5                              0x007C 0x02EC 0x0608 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__EIM_AD12                              0x007C 0x02EC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__GPIO2_IO18                            0x007C 0x02EC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__LCD_DATA17                            0x007C 0x02EC 0x067C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDOE__LCD_DATA23                            0x007C 0x02EC 0x0694 0x7 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR                           0x0080 0x02F0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1                       0x0080 0x02F0 0x0588 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3                      0x0080 0x02F0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__KPP_ROW5                             0x0080 0x02F0 0x0628 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__EIM_AD13                             0x0080 0x02F0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__GPIO2_IO19                           0x0080 0x02F0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__LCD_DATA18                           0x0080 0x02F0 0x0680 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDSHR__LCD_DATA10                           0x0080 0x02F0 0x0660 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0                           0x0084 0x02F4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2                       0x0084 0x02F4 0x058C 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL                   0x0084 0x02F4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__EIM_AD14                             0x0084 0x02F4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__GPIO2_IO20                           0x0084 0x02F4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__LCD_DATA19                           0x0084 0x02F4 0x0684 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE0__LCD_DATA5                            0x0084 0x02F4 0x064C 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1                           0x0088 0x02F8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3                       0x0088 0x02F8 0x0590 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC                      0x0088 0x02F8 0x0578 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER                          0x0088 0x02F8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__EIM_AD15                             0x0088 0x02F8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__GPIO2_IO21                           0x0088 0x02F8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__LCD_DATA20                           0x0088 0x02F8 0x0688 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE1__LCD_DATA4                            0x0088 0x02F8 0x0648 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2                           0x008C 0x02FC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN                      0x008C 0x02FC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0                      0x008C 0x02FC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__KPP_COL6                             0x008C 0x02FC 0x060C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__EIM_ADDR16                           0x008C 0x02FC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__GPIO2_IO22                           0x008C 0x02FC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__LCD_DATA21                           0x008C 0x02FC 0x068C 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE2__LCD_DATA3                            0x008C 0x02FC 0x0644 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3                           0x0090 0x0300 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD                        0x0090 0x0300 0x06E8 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1                      0x0090 0x0300 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__KPP_ROW6                             0x0090 0x0300 0x062C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__EIM_ADDR17                           0x0090 0x0300 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__GPIO2_IO23                           0x0090 0x0300 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__LCD_DATA22                           0x0090 0x0300 0x0690 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_SDCE3__LCD_DATA2                            0x0090 0x0300 0x0640 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK                           0x0094 0x0304 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0                       0x0094 0x0304 0x05AC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2                      0x0094 0x0304 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__KPP_COL7                             0x0094 0x0304 0x0610 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__EIM_ADDR18                           0x0094 0x0304 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__GPIO2_IO24                           0x0094 0x0304 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__LCD_DATA23                           0x0094 0x0304 0x0694 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDCLK__LCD_DATA16                           0x0094 0x0304 0x0678 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__EPDC_GDOE                             0x0098 0x0308 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1                        0x0098 0x0308 0x05B0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3                       0x0098 0x0308 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__KPP_ROW7                              0x0098 0x0308 0x0630 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__EIM_ADDR19                            0x0098 0x0308 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__GPIO2_IO25                            0x0098 0x0308 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__LCD_WR_RWN                            0x0098 0x0308 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDOE__LCD_DATA18                            0x0098 0x0308 0x0680 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__EPDC_GDRL                             0x009C 0x030C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2                        0x009C 0x030C 0x05B4 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL                    0x009C 0x030C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__EIM_ADDR20                            0x009C 0x030C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__GPIO2_IO26                            0x009C 0x030C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__LCD_RD_E                              0x009C 0x030C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDRL__LCD_DATA19                            0x009C 0x030C 0x0684 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__EPDC_GDSP                             0x00A0 0x0310 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3                        0x00A0 0x0310 0x05B8 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC                       0x00A0 0x0310 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__ENET2_TX_ER                           0x00A0 0x0310 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__EIM_ADDR21                            0x00A0 0x0310 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__GPIO2_IO27                            0x00A0 0x0310 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__LCD_BUSY                              0x00A0 0x0310 0x0634 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_GDSP__LCD_DATA17                            0x00A0 0x0310 0x067C 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__EPDC_BDR0                             0x00A4 0x0314 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK                          0x00A4 0x0314 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2                     0x00A4 0x0314 0x0570 0x3 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__EIM_ADDR22                            0x00A4 0x0314 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__GPIO2_IO28                            0x00A4 0x0314 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__LCD_CS                                0x00A4 0x0314 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR0__LCD_DATA7                             0x00A4 0x0314 0x0654 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__EPDC_BDR1                             0x00A8 0x0318 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN                           0x00A8 0x0318 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK                          0x00A8 0x0318 0x0578 0x2 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__EIM_AD8                               0x00A8 0x0318 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__GPIO2_IO29                            0x00A8 0x0318 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__LCD_ENABLE                            0x00A8 0x0318 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_BDR1__LCD_DATA6                             0x00A8 0x0318 0x0650 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM                       0x00AC 0x031C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA                     0x00AC 0x031C 0x05CC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__ENET2_CRS                          0x00AC 0x031C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__EIM_AD9                            0x00AC 0x031C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30                         0x00AC 0x031C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC                          0x00AC 0x031C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_COM__LCD_DATA11                         0x00AC 0x031C 0x0664 0x7 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT                     0x00B0 0x0320 0x0580 0x0 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB                    0x00B0 0x0320 0x05D0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__ENET2_COL                         0x00B0 0x0320 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1                         0x00B0 0x0320 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31                        0x00B0 0x0320 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC                         0x00B0 0x0320 0x0698 0x6 0x1</div><div class='add'>+#define MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12                        0x00B0 0x0320 0x0668 0x7 0x1</div><div class='add'>+#define MX7D_PAD_LCD_CLK__LCD_CLK                                 0x00B4 0x0324 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__ECSPI4_MISO                             0x00B4 0x0324 0x0558 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN                    0x00B4 0x0324 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__CSI_DATA16                              0x00B4 0x0324 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__UART2_DCE_RX                            0x00B4 0x0324 0x06FC 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__UART2_DTE_TX                            0x00B4 0x0324 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_CLK__GPIO3_IO0                               0x00B4 0x0324 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__LCD_ENABLE                           0x00B8 0x0328 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI                          0x00B8 0x0328 0x055C 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN                 0x00B8 0x0328 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__CSI_DATA17                           0x00B8 0x0328 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__UART2_DCE_TX                         0x00B8 0x0328 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__UART2_DTE_RX                         0x00B8 0x0328 0x06FC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_LCD_ENABLE__GPIO3_IO1                            0x00B8 0x0328 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__LCD_HSYNC                             0x00BC 0x032C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK                           0x00BC 0x032C 0x0554 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN                  0x00BC 0x032C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__CSI_DATA18                            0x00BC 0x032C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS                         0x00BC 0x032C 0x06F8 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS                         0x00BC 0x032C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_HSYNC__GPIO3_IO2                             0x00BC 0x032C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__LCD_VSYNC                             0x00C0 0x0330 0x0698 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__ECSPI4_SS0                            0x00C0 0x0330 0x0560 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN                  0x00C0 0x0330 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__CSI_DATA19                            0x00C0 0x0330 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS                         0x00C0 0x0330 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS                         0x00C0 0x0330 0x06F8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_LCD_VSYNC__GPIO3_IO3                             0x00C0 0x0330 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__LCD_RESET                             0x00C4 0x0334 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__GPT1_COMPARE1                         0x00C4 0x0334 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI                   0x00C4 0x0334 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__CSI_FIELD                             0x00C4 0x0334 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__EIM_DTACK_B                           0x00C4 0x0334 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_RESET__GPIO3_IO4                             0x00C4 0x0334 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__LCD_DATA0                            0x00C8 0x0338 0x0638 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__GPT1_COMPARE2                        0x00C8 0x0338 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__CSI_DATA20                           0x00C8 0x0338 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__EIM_DATA0                            0x00C8 0x0338 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__GPIO3_IO5                            0x00C8 0x0338 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0                        0x00C8 0x0338 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__LCD_DATA1                            0x00CC 0x033C 0x063C 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__GPT1_COMPARE3                        0x00CC 0x033C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__CSI_DATA21                           0x00CC 0x033C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__EIM_DATA1                            0x00CC 0x033C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__GPIO3_IO6                            0x00CC 0x033C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1                        0x00CC 0x033C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__LCD_DATA2                            0x00D0 0x0340 0x0640 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__GPT1_CLK                             0x00D0 0x0340 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__CSI_DATA22                           0x00D0 0x0340 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__EIM_DATA2                            0x00D0 0x0340 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__GPIO3_IO7                            0x00D0 0x0340 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2                        0x00D0 0x0340 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__LCD_DATA3                            0x00D4 0x0344 0x0644 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1                        0x00D4 0x0344 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__CSI_DATA23                           0x00D4 0x0344 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__EIM_DATA3                            0x00D4 0x0344 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__GPIO3_IO8                            0x00D4 0x0344 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3                        0x00D4 0x0344 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__LCD_DATA4                            0x00D8 0x0348 0x0648 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2                        0x00D8 0x0348 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__CSI_VSYNC                            0x00D8 0x0348 0x0520 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__EIM_DATA4                            0x00D8 0x0348 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__GPIO3_IO9                            0x00D8 0x0348 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4                        0x00D8 0x0348 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA05__LCD_DATA5                            0x00DC 0x034C 0x064C 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA05__CSI_HSYNC                            0x00DC 0x034C 0x0518 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA05__EIM_DATA5                            0x00DC 0x034C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA05__GPIO3_IO10                           0x00DC 0x034C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5                        0x00DC 0x034C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA06__LCD_DATA6                            0x00E0 0x0350 0x0650 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA06__CSI_PIXCLK                           0x00E0 0x0350 0x051C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA06__EIM_DATA6                            0x00E0 0x0350 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA06__GPIO3_IO11                           0x00E0 0x0350 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6                        0x00E0 0x0350 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA07__LCD_DATA7                            0x00E4 0x0354 0x0654 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA07__CSI_MCLK                             0x00E4 0x0354 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA07__EIM_DATA7                            0x00E4 0x0354 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA07__GPIO3_IO12                           0x00E4 0x0354 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7                        0x00E4 0x0354 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA08__LCD_DATA8                            0x00E8 0x0358 0x0658 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA08__CSI_DATA9                            0x00E8 0x0358 0x0514 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA08__EIM_DATA8                            0x00E8 0x0358 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA08__GPIO3_IO13                           0x00E8 0x0358 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8                        0x00E8 0x0358 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA09__LCD_DATA9                            0x00EC 0x035C 0x065C 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA09__CSI_DATA8                            0x00EC 0x035C 0x0510 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA09__EIM_DATA9                            0x00EC 0x035C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA09__GPIO3_IO14                           0x00EC 0x035C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9                        0x00EC 0x035C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA10__LCD_DATA10                           0x00F0 0x0360 0x0660 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA10__CSI_DATA7                            0x00F0 0x0360 0x050C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA10__EIM_DATA10                           0x00F0 0x0360 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA10__GPIO3_IO15                           0x00F0 0x0360 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10                       0x00F0 0x0360 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA11__LCD_DATA11                           0x00F4 0x0364 0x0664 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA11__CSI_DATA6                            0x00F4 0x0364 0x0508 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA11__EIM_DATA11                           0x00F4 0x0364 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA11__GPIO3_IO16                           0x00F4 0x0364 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11                       0x00F4 0x0364 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA12__LCD_DATA12                           0x00F8 0x0368 0x0668 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA12__CSI_DATA5                            0x00F8 0x0368 0x0504 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA12__EIM_DATA12                           0x00F8 0x0368 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA12__GPIO3_IO17                           0x00F8 0x0368 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12                       0x00F8 0x0368 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA13__LCD_DATA13                           0x00FC 0x036C 0x066C 0x0 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA13__CSI_DATA4                            0x00FC 0x036C 0x0500 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA13__EIM_DATA13                           0x00FC 0x036C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA13__GPIO3_IO18                           0x00FC 0x036C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13                       0x00FC 0x036C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA14__LCD_DATA14                           0x0100 0x0370 0x0670 0x0 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA14__CSI_DATA3                            0x0100 0x0370 0x04FC 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA14__EIM_DATA14                           0x0100 0x0370 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA14__GPIO3_IO19                           0x0100 0x0370 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14                       0x0100 0x0370 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA15__LCD_DATA15                           0x0104 0x0374 0x0674 0x0 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA15__CSI_DATA2                            0x0104 0x0374 0x04F8 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA15__EIM_DATA15                           0x0104 0x0374 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA15__GPIO3_IO20                           0x0104 0x0374 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15                       0x0104 0x0374 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__LCD_DATA16                           0x0108 0x0378 0x0678 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4                       0x0108 0x0378 0x0594 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__CSI_DATA1                            0x0108 0x0378 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__EIM_CRE                              0x0108 0x0378 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__GPIO3_IO21                           0x0108 0x0378 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16                       0x0108 0x0378 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__LCD_DATA17                           0x010C 0x037C 0x067C 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5                       0x010C 0x037C 0x0598 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__CSI_DATA0                            0x010C 0x037C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN                     0x010C 0x037C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__GPIO3_IO22                           0x010C 0x037C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17                       0x010C 0x037C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__LCD_DATA18                           0x0110 0x0380 0x0680 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6                       0x0110 0x0380 0x059C 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO                  0x0110 0x0380 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__CSI_DATA15                           0x0110 0x0380 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__EIM_CS2_B                            0x0110 0x0380 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__GPIO3_IO23                           0x0110 0x0380 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18                       0x0110 0x0380 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__EIM_CS3_B                            0x0114 0x0384 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__GPIO3_IO24                           0x0114 0x0384 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19                       0x0114 0x0384 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__LCD_DATA19                           0x0114 0x0384 0x0684 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7                       0x0114 0x0384 0x05A0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA19__CSI_DATA14                           0x0114 0x0384 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__EIM_ADDR23                           0x0118 0x0388 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__GPIO3_IO25                           0x0118 0x0388 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__I2C3_SCL                             0x0118 0x0388 0x05E4 0x6 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__LCD_DATA20                           0x0118 0x0388 0x0688 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4                       0x0118 0x0388 0x05BC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT                0x0118 0x0388 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA20__CSI_DATA13                           0x0118 0x0388 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__LCD_DATA21                           0x011C 0x038C 0x068C 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5                       0x011C 0x038C 0x05C0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT                0x011C 0x038C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__CSI_DATA12                           0x011C 0x038C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__EIM_ADDR24                           0x011C 0x038C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__GPIO3_IO26                           0x011C 0x038C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA21__I2C3_SDA                             0x011C 0x038C 0x05E8 0x6 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__LCD_DATA22                           0x0120 0x0390 0x0690 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6                       0x0120 0x0390 0x05C4 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT                0x0120 0x0390 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__CSI_DATA11                           0x0120 0x0390 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__EIM_ADDR25                           0x0120 0x0390 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__GPIO3_IO27                           0x0120 0x0390 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA22__I2C4_SCL                             0x0120 0x0390 0x05EC 0x6 0x1</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__LCD_DATA23                           0x0124 0x0394 0x0694 0x0 0x2</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7                       0x0124 0x0394 0x05C8 0x1 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT                0x0124 0x0394 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__CSI_DATA10                           0x0124 0x0394 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__EIM_ADDR26                           0x0124 0x0394 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__GPIO3_IO28                           0x0124 0x0394 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_LCD_DATA23__I2C4_SDA                             0x0124 0x0394 0x05F0 0x6 0x1</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX                      0x0128 0x0398 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX                      0x0128 0x0398 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__I2C1_SCL                          0x0128 0x0398 0x05D4 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY                    0x0128 0x0398 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1                        0x0128 0x0398 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN              0x0128 0x0398 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__GPIO4_IO0                         0x0128 0x0398 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART1_RX_DATA__ENET1_MDIO                        0x0128 0x0398 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX                      0x012C 0x039C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX                      0x012C 0x039C 0x06F4 0x0 0x1</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__I2C1_SDA                          0x012C 0x039C 0x05D8 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__SAI3_MCLK                         0x012C 0x039C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2                        0x012C 0x039C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT             0x012C 0x039C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__GPIO4_IO1                         0x012C 0x039C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART1_TX_DATA__ENET1_MDC                         0x012C 0x039C 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX                      0x0130 0x03A0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX                      0x0130 0x03A0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__I2C2_SCL                          0x0130 0x03A0 0x05DC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK                      0x0130 0x03A0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3                        0x0130 0x03A0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN              0x0130 0x03A0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__GPIO4_IO2                         0x0130 0x03A0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART2_RX_DATA__ENET2_MDIO                        0x0130 0x03A0 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX                      0x0134 0x03A4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX                      0x0134 0x03A4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__I2C2_SDA                          0x0134 0x03A4 0x05E0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0                     0x0134 0x03A4 0x06C8 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY                        0x0134 0x03A4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT             0x0134 0x03A4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__GPIO4_IO3                         0x0134 0x03A4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART2_TX_DATA__ENET2_MDC                         0x0134 0x03A4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX                      0x0138 0x03A8 0x0704 0x0 0x2</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX                      0x0138 0x03A8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC                       0x0138 0x03A8 0x072C 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC                      0x0138 0x03A8 0x06CC 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO                       0x0138 0x03A8 0x0528 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN              0x0138 0x03A8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__GPIO4_IO4                         0x0138 0x03A8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RX_DATA__SD1_LCTL                          0x0138 0x03A8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX                      0x013C 0x03AC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX                      0x013C 0x03AC 0x0704 0x0 0x3</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR                      0x013C 0x03AC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK                      0x013C 0x03AC 0x06D0 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI                       0x013C 0x03AC 0x052C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT             0x013C 0x03AC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__GPIO4_IO5                         0x013C 0x03AC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART3_TX_DATA__SD2_LCTL                          0x013C 0x03AC 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS                       0x0140 0x03B0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS                       0x0140 0x03B0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__USB_OTG2_OC                         0x0140 0x03B0 0x0728 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0                       0x0140 0x03B0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK                         0x0140 0x03B0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN                0x0140 0x03B0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__GPIO4_IO6                           0x0140 0x03B0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART3_RTS_B__SD3_LCTL                            0x0140 0x03B0 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS                       0x0144 0x03B4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS                       0x0144 0x03B4 0x0700 0x0 0x3</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR                        0x0144 0x03B4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC                        0x0144 0x03B4 0x06D4 0x2 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__ECSPI1_SS0                          0x0144 0x03B4 0x0530 0x3 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT               0x0144 0x03B4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__GPIO4_IO7                           0x0144 0x03B4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_UART3_CTS_B__SD1_VSELECT                         0x0144 0x03B4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__I2C1_SCL                               0x0148 0x03B8 0x05D4 0x0 0x1</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__UART4_DCE_CTS                          0x0148 0x03B8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__UART4_DTE_RTS                          0x0148 0x03B8 0x0708 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__FLEXCAN1_RX                            0x0148 0x03B8 0x04DC 0x2 0x1</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__ECSPI3_MISO                            0x0148 0x03B8 0x0548 0x3 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__GPIO4_IO8                              0x0148 0x03B8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SCL__SD2_VSELECT                            0x0148 0x03B8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__I2C1_SDA                               0x014C 0x03BC 0x05D8 0x0 0x1</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__UART4_DCE_RTS                          0x014C 0x03BC 0x0708 0x1 0x1</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__UART4_DTE_CTS                          0x014C 0x03BC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__FLEXCAN1_TX                            0x014C 0x03BC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__ECSPI3_MOSI                            0x014C 0x03BC 0x054C 0x3 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1                      0x014C 0x03BC 0x0564 0x4 0x1</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__GPIO4_IO9                              0x014C 0x03BC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C1_SDA__SD3_VSELECT                            0x014C 0x03BC 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__I2C2_SCL                               0x0150 0x03C0 0x05DC 0x0 0x1</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__UART4_DCE_RX                           0x0150 0x03C0 0x070C 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__UART4_DTE_TX                           0x0150 0x03C0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B                           0x0150 0x03C0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__ECSPI3_SCLK                            0x0150 0x03C0 0x0544 0x3 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2                      0x0150 0x03C0 0x0570 0x4 0x2</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__GPIO4_IO10                             0x0150 0x03C0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SCL__SD3_CD_B                               0x0150 0x03C0 0x0738 0x6 0x1</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__I2C2_SDA                               0x0154 0x03C4 0x05E0 0x0 0x1</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__UART4_DCE_TX                           0x0154 0x03C4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__UART4_DTE_RX                           0x0154 0x03C4 0x070C 0x1 0x1</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB                   0x0154 0x03C4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__ECSPI3_SS0                             0x0154 0x03C4 0x0550 0x3 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3                      0x0154 0x03C4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__GPIO4_IO11                             0x0154 0x03C4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C2_SDA__SD3_WP                                 0x0154 0x03C4 0x073C 0x6 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__I2C3_SCL                               0x0158 0x03C8 0x05E4 0x0 0x2</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__UART5_DCE_CTS                          0x0158 0x03C8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__UART5_DTE_RTS                          0x0158 0x03C8 0x0710 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__FLEXCAN2_RX                            0x0158 0x03C8 0x04E0 0x2 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__CSI_VSYNC                              0x0158 0x03C8 0x0520 0x3 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0                        0x0158 0x03C8 0x06D8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__GPIO4_IO12                             0x0158 0x03C8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SCL__EPDC_BDR0                              0x0158 0x03C8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__I2C3_SDA                               0x015C 0x03CC 0x05E8 0x0 0x2</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__UART5_DCE_RTS                          0x015C 0x03CC 0x0710 0x1 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__UART5_DTE_CTS                          0x015C 0x03CC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__FLEXCAN2_TX                            0x015C 0x03CC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__CSI_HSYNC                              0x015C 0x03CC 0x0518 0x3 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1                        0x015C 0x03CC 0x06DC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__GPIO4_IO13                             0x015C 0x03CC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C3_SDA__EPDC_BDR1                              0x015C 0x03CC 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__I2C4_SCL                               0x0160 0x03D0 0x05EC 0x0 0x2</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__UART5_DCE_RX                           0x0160 0x03D0 0x0714 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__UART5_DTE_TX                           0x0160 0x03D0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B                           0x0160 0x03D0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__CSI_PIXCLK                             0x0160 0x03D0 0x051C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__USB_OTG1_ID                            0x0160 0x03D0 0x0734 0x4 0x1</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__GPIO4_IO14                             0x0160 0x03D0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SCL__EPDC_VCOM0                             0x0160 0x03D0 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__I2C4_SDA                               0x0164 0x03D4 0x05F0 0x0 0x2</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__UART5_DCE_TX                           0x0164 0x03D4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__UART5_DTE_RX                           0x0164 0x03D4 0x0714 0x1 0x1</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB                   0x0164 0x03D4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__CSI_MCLK                               0x0164 0x03D4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__USB_OTG2_ID                            0x0164 0x03D4 0x0730 0x4 0x1</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__GPIO4_IO15                             0x0164 0x03D4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_I2C4_SDA__EPDC_VCOM1                             0x0164 0x03D4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK                         0x0168 0x03D8 0x0524 0x0 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX                        0x0168 0x03D8 0x071C 0x1 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX                        0x0168 0x03D8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__SD2_DATA4                           0x0168 0x03D8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__CSI_DATA2                           0x0168 0x03D8 0x04F8 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16                          0x0168 0x03D8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM                        0x0168 0x03D8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI                         0x016C 0x03DC 0x052C 0x0 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX                        0x016C 0x03DC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX                        0x016C 0x03DC 0x071C 0x1 0x3</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__SD2_DATA5                           0x016C 0x03DC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__CSI_DATA3                           0x016C 0x03DC 0x04FC 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17                          0x016C 0x03DC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT                       0x016C 0x03DC 0x0580 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO                         0x0170 0x03E0 0x0528 0x0 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS                       0x0170 0x03E0 0x0718 0x1 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS                       0x0170 0x03E0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__SD2_DATA6                           0x0170 0x03E0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__CSI_DATA4                           0x0170 0x03E0 0x0500 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__GPIO4_IO18                          0x0170 0x03E0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ                        0x0170 0x03E0 0x057C 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0                           0x0174 0x03E4 0x0530 0x0 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS                        0x0174 0x03E4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS                        0x0174 0x03E4 0x0718 0x1 0x3</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__SD2_DATA7                            0x0174 0x03E4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__CSI_DATA5                            0x0174 0x03E4 0x0504 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__GPIO4_IO19                           0x0174 0x03E4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3                       0x0174 0x03E4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK                         0x0178 0x03E8 0x0534 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX                        0x0178 0x03E8 0x0724 0x1 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX                        0x0178 0x03E8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__SD1_DATA4                           0x0178 0x03E8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__CSI_DATA6                           0x0178 0x03E8 0x0508 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__LCD_DATA13                          0x0178 0x03E8 0x066C 0x4 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20                          0x0178 0x03E8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0                      0x0178 0x03E8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI                         0x017C 0x03EC 0x053C 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX                        0x017C 0x03EC 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX                        0x017C 0x03EC 0x0724 0x1 0x3</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__SD1_DATA5                           0x017C 0x03EC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__CSI_DATA7                           0x017C 0x03EC 0x050C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__LCD_DATA14                          0x017C 0x03EC 0x0670 0x4 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21                          0x017C 0x03EC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1                      0x017C 0x03EC 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__GPIO4_IO22                          0x0180 0x03F0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2                      0x0180 0x03F0 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO                         0x0180 0x03F0 0x0538 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS                       0x0180 0x03F0 0x0720 0x1 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS                       0x0180 0x03F0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__SD1_DATA6                           0x0180 0x03F0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__CSI_DATA8                           0x0180 0x03F0 0x0510 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI2_MISO__LCD_DATA15                          0x0180 0x03F0 0x0674 0x4 0x2</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0                           0x0184 0x03F4 0x0540 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS                        0x0184 0x03F4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS                        0x0184 0x03F4 0x0720 0x1 0x3</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__SD1_DATA7                            0x0184 0x03F4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__CSI_DATA9                            0x0184 0x03F4 0x0514 0x3 0x1</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__LCD_RESET                            0x0184 0x03F4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__GPIO4_IO23                           0x0184 0x03F4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE                        0x0184 0x03F4 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__SD1_CD_B                               0x0188 0x03F8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__UART6_DCE_RX                           0x0188 0x03F8 0x071C 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__UART6_DTE_TX                           0x0188 0x03F8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__ECSPI4_MISO                            0x0188 0x03F8 0x0558 0x3 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0                         0x0188 0x03F8 0x0584 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__GPIO5_IO0                              0x0188 0x03F8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CD_B__CCM_CLKO1                              0x0188 0x03F8 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_SD1_WP__SD1_WP                                   0x018C 0x03FC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_WP__UART6_DCE_TX                             0x018C 0x03FC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_WP__UART6_DTE_RX                             0x018C 0x03FC 0x071C 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SD1_WP__ECSPI4_MOSI                              0x018C 0x03FC 0x055C 0x3 0x1</div><div class='add'>+#define MX7D_PAD_SD1_WP__FLEXTIMER1_CH1                           0x018C 0x03FC 0x0588 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_WP__GPIO5_IO1                                0x018C 0x03FC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_WP__CCM_CLKO2                                0x018C 0x03FC 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__SD1_RESET_B                         0x0190 0x0400 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__SAI3_MCLK                           0x0190 0x0400 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS                       0x0190 0x0400 0x0718 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS                       0x0190 0x0400 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK                         0x0190 0x0400 0x0554 0x3 0x1</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2                      0x0190 0x0400 0x058C 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_RESET_B__GPIO5_IO2                           0x0190 0x0400 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CLK__SD1_CLK                                 0x0194 0x0404 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CLK__SAI3_RX_SYNC                            0x0194 0x0404 0x06CC 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CLK__UART6_DCE_CTS                           0x0194 0x0404 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CLK__UART6_DTE_RTS                           0x0194 0x0404 0x0718 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SD1_CLK__ECSPI4_SS0                              0x0194 0x0404 0x0560 0x3 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3                          0x0194 0x0404 0x0590 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CLK__GPIO5_IO3                               0x0194 0x0404 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CMD__SD1_CMD                                 0x0198 0x0408 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CMD__SAI3_RX_BCLK                            0x0198 0x0408 0x06C4 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CMD__ECSPI4_SS1                              0x0198 0x0408 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0                          0x0198 0x0408 0x05AC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_CMD__GPIO5_IO4                               0x0198 0x0408 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__SD1_DATA0                             0x019C 0x040C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0                         0x019C 0x040C 0x06C8 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__UART7_DCE_RX                          0x019C 0x040C 0x0724 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__UART7_DTE_TX                          0x019C 0x040C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__ECSPI4_SS2                            0x019C 0x040C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1                        0x019C 0x040C 0x05B0 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__GPIO5_IO5                             0x019C 0x040C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1                          0x019C 0x040C 0x04E4 0x6 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__SD1_DATA1                             0x01A0 0x0410 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK                          0x01A0 0x0410 0x06D0 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__UART7_DCE_TX                          0x01A0 0x0410 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__UART7_DTE_RX                          0x01A0 0x0410 0x0724 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__ECSPI4_SS3                            0x01A0 0x0410 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2                        0x01A0 0x0410 0x05B4 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__GPIO5_IO6                             0x01A0 0x0410 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2                          0x01A0 0x0410 0x04E8 0x6 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__SD1_DATA2                             0x01A4 0x0414 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC                          0x01A4 0x0414 0x06D4 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__UART7_DCE_CTS                         0x01A4 0x0414 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__UART7_DTE_RTS                         0x01A4 0x0414 0x0720 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__ECSPI4_RDY                            0x01A4 0x0414 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3                        0x01A4 0x0414 0x05B8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__GPIO5_IO7                             0x01A4 0x0414 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3                          0x01A4 0x0414 0x04EC 0x6 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__SD1_DATA3                             0x01A8 0x0418 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0                         0x01A8 0x0418 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__UART7_DCE_RTS                         0x01A8 0x0418 0x0720 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__UART7_DTE_CTS                         0x01A8 0x0418 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__ECSPI3_SS1                            0x01A8 0x0418 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA                        0x01A8 0x0418 0x05A4 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__GPIO5_IO8                             0x01A8 0x0418 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4                          0x01A8 0x0418 0x04F0 0x6 0x1</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__SD2_CD_B                               0x01AC 0x041C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__ENET1_MDIO                             0x01AC 0x041C 0x0568 0x1 0x2</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__ENET2_MDIO                             0x01AC 0x041C 0x0574 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__ECSPI3_SS2                             0x01AC 0x041C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB                         0x01AC 0x041C 0x05A8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__GPIO5_IO9                              0x01AC 0x041C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0                        0x01AC 0x041C 0x06D8 0x6 0x2</div><div class='add'>+#define MX7D_PAD_SD2_WP__SD2_WP                                   0x01B0 0x0420 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_WP__ENET1_MDC                                0x01B0 0x0420 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_WP__ENET2_MDC                                0x01B0 0x0420 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_WP__ECSPI3_SS3                               0x01B0 0x0420 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_WP__USB_OTG1_ID                              0x01B0 0x0420 0x0734 0x4 0x2</div><div class='add'>+#define MX7D_PAD_SD2_WP__GPIO5_IO10                               0x01B0 0x0420 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1                          0x01B0 0x0420 0x06DC 0x6 0x2</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__SD2_RESET_B                         0x01B4 0x0424 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__SAI2_MCLK                           0x01B4 0x0424 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__SD2_RESET                           0x01B4 0x0424 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__ECSPI3_RDY                          0x01B4 0x0424 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__USB_OTG2_ID                         0x01B4 0x0424 0x0730 0x4 0x2</div><div class='add'>+#define MX7D_PAD_SD2_RESET_B__GPIO5_IO11                          0x01B4 0x0424 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CLK__SD2_CLK                                 0x01B8 0x0428 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CLK__SAI2_RX_SYNC                            0x01B8 0x0428 0x06B8 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CLK__MQS_RIGHT                               0x01B8 0x0428 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CLK__GPT4_CLK                                0x01B8 0x0428 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CLK__GPIO5_IO12                              0x01B8 0x0428 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CMD__SD2_CMD                                 0x01BC 0x042C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CMD__SAI2_RX_BCLK                            0x01BC 0x042C 0x06B0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CMD__MQS_LEFT                                0x01BC 0x042C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CMD__GPT4_CAPTURE1                           0x01BC 0x042C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD                         0x01BC 0x042C 0x06EC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD2_CMD__GPIO5_IO13                              0x01BC 0x042C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__SD2_DATA0                             0x01C0 0x0430 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0                         0x01C0 0x0430 0x06B4 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__UART4_DCE_RX                          0x01C0 0x0430 0x070C 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__UART4_DTE_TX                          0x01C0 0x0430 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2                         0x01C0 0x0430 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK                        0x01C0 0x0430 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA0__GPIO5_IO14                            0x01C0 0x0430 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__SD2_DATA1                             0x01C4 0x0434 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK                          0x01C4 0x0434 0x06BC 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__UART4_DCE_TX                          0x01C4 0x0434 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__UART4_DTE_RX                          0x01C4 0x0434 0x070C 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__GPT4_COMPARE1                         0x01C4 0x0434 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B                      0x01C4 0x0434 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA1__GPIO5_IO15                            0x01C4 0x0434 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__SD2_DATA2                             0x01C8 0x0438 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC                          0x01C8 0x0438 0x06C0 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__UART4_DCE_CTS                         0x01C8 0x0438 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__UART4_DTE_RTS                         0x01C8 0x0438 0x0708 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__GPT4_COMPARE2                         0x01C8 0x0438 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN                       0x01C8 0x0438 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA2__GPIO5_IO16                            0x01C8 0x0438 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__SD2_DATA3                             0x01CC 0x043C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0                         0x01CC 0x043C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__UART4_DCE_RTS                         0x01CC 0x043C 0x0708 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__UART4_DTE_CTS                         0x01CC 0x043C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__GPT4_COMPARE3                         0x01CC 0x043C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD                         0x01CC 0x043C 0x06E8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SD2_DATA3__GPIO5_IO17                            0x01CC 0x043C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CLK__SD3_CLK                                 0x01D0 0x0440 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CLK__NAND_CLE                                0x01D0 0x0440 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CLK__ECSPI4_MISO                             0x01D0 0x0440 0x0558 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_CLK__SAI3_RX_SYNC                            0x01D0 0x0440 0x06CC 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SD3_CLK__GPT3_CLK                                0x01D0 0x0440 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CLK__GPIO6_IO0                               0x01D0 0x0440 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CMD__SD3_CMD                                 0x01D4 0x0444 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CMD__NAND_ALE                                0x01D4 0x0444 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CMD__ECSPI4_MOSI                             0x01D4 0x0444 0x055C 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_CMD__SAI3_RX_BCLK                            0x01D4 0x0444 0x06C4 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SD3_CMD__GPT3_CAPTURE1                           0x01D4 0x0444 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_CMD__GPIO6_IO1                               0x01D4 0x0444 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__SD3_DATA0                             0x01D8 0x0448 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__NAND_DATA00                           0x01D8 0x0448 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__ECSPI4_SS0                            0x01D8 0x0448 0x0560 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0                         0x01D8 0x0448 0x06C8 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2                         0x01D8 0x0448 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA0__GPIO6_IO2                             0x01D8 0x0448 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__SD3_DATA1                             0x01DC 0x044C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__NAND_DATA01                           0x01DC 0x044C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__ECSPI4_SCLK                           0x01DC 0x044C 0x0554 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK                          0x01DC 0x044C 0x06D0 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__GPT3_COMPARE1                         0x01DC 0x044C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA1__GPIO6_IO3                             0x01DC 0x044C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__SD3_DATA2                             0x01E0 0x0450 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__NAND_DATA02                           0x01E0 0x0450 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__I2C3_SDA                              0x01E0 0x0450 0x05E8 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC                          0x01E0 0x0450 0x06D4 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__GPT3_COMPARE2                         0x01E0 0x0450 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA2__GPIO6_IO4                             0x01E0 0x0450 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__SD3_DATA3                             0x01E4 0x0454 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__NAND_DATA03                           0x01E4 0x0454 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__I2C3_SCL                              0x01E4 0x0454 0x05E4 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0                         0x01E4 0x0454 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__GPT3_COMPARE3                         0x01E4 0x0454 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA3__GPIO6_IO5                             0x01E4 0x0454 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__SD3_DATA4                             0x01E8 0x0458 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__NAND_DATA04                           0x01E8 0x0458 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__UART3_DCE_RX                          0x01E8 0x0458 0x0704 0x3 0x4</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__UART3_DTE_TX                          0x01E8 0x0458 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__FLEXCAN2_RX                           0x01E8 0x0458 0x04E0 0x4 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA4__GPIO6_IO6                             0x01E8 0x0458 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__SD3_DATA5                             0x01EC 0x045C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__NAND_DATA05                           0x01EC 0x045C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__UART3_DCE_TX                          0x01EC 0x045C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__UART3_DTE_RX                          0x01EC 0x045C 0x0704 0x3 0x5</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__FLEXCAN1_TX                           0x01EC 0x045C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA5__GPIO6_IO7                             0x01EC 0x045C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__SD3_DATA6                             0x01F0 0x0460 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__NAND_DATA06                           0x01F0 0x0460 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__SD3_WP                                0x01F0 0x0460 0x073C 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__UART3_DCE_RTS                         0x01F0 0x0460 0x0700 0x3 0x4</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__UART3_DTE_CTS                         0x01F0 0x0460 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__FLEXCAN2_TX                           0x01F0 0x0460 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA6__GPIO6_IO8                             0x01F0 0x0460 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__SD3_DATA7                             0x01F4 0x0464 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__NAND_DATA07                           0x01F4 0x0464 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__SD3_CD_B                              0x01F4 0x0464 0x0738 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__UART3_DCE_CTS                         0x01F4 0x0464 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__UART3_DTE_RTS                         0x01F4 0x0464 0x0700 0x3 0x5</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__FLEXCAN1_RX                           0x01F4 0x0464 0x04DC 0x4 0x2</div><div class='add'>+#define MX7D_PAD_SD3_DATA7__GPIO6_IO9                             0x01F4 0x0464 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_STROBE__SD3_STROBE                           0x01F8 0x0468 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_STROBE__NAND_RE_B                            0x01F8 0x0468 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_STROBE__GPIO6_IO10                           0x01F8 0x0468 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SD3_RESET_B__SD3_RESET_B                         0x01FC 0x046C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SD3_RESET_B__NAND_WE_B                           0x01FC 0x046C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SD3_RESET_B__SD3_RESET                           0x01FC 0x046C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SD3_RESET_B__SAI3_MCLK                           0x01FC 0x046C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SD3_RESET_B__GPIO6_IO11                          0x01FC 0x046C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0                      0x0200 0x0470 0x06A0 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B                         0x0200 0x0470 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX                       0x0200 0x0470 0x0714 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX                       0x0200 0x0470 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX                        0x0200 0x0470 0x04DC 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD                    0x0200 0x0470 0x06E4 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12                         0x0200 0x0470 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET                   0x0200 0x0470 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK                       0x0204 0x0474 0x06A8 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B                         0x0204 0x0474 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX                       0x0204 0x0474 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX                       0x0204 0x0474 0x0714 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX                        0x0204 0x0474 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK                     0x0204 0x0474 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13                         0x0204 0x0474 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET                    0x0204 0x0474 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC                       0x0208 0x0478 0x06AC 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__NAND_DQS                           0x0208 0x0478 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS                      0x0208 0x0478 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS                      0x0208 0x0478 0x0710 0x2 0x2</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX                        0x0208 0x0478 0x04E0 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B                   0x0208 0x0478 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14                         0x0208 0x0478 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT                       0x0208 0x0478 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0                      0x020C 0x047C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__NAND_READY_B                       0x020C 0x047C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS                      0x020C 0x047C 0x0710 0x2 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS                      0x020C 0x047C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX                        0x020C 0x047C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN                    0x020C 0x047C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15                         0x020C 0x047C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET                   0x020C 0x047C 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC                       0x0210 0x0480 0x06A4 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B                         0x0210 0x0480 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC                       0x0210 0x0480 0x06B8 0x2 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL                           0x0210 0x0480 0x05EC 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD                      0x0210 0x0480 0x06E0 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16                         0x0210 0x0480 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT                          0x0210 0x0480 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0                   0x0210 0x0480 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK                       0x0214 0x0484 0x069C 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B                         0x0214 0x0484 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK                       0x0214 0x0484 0x06B0 0x2 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA                           0x0214 0x0484 0x05F0 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA                     0x0214 0x0484 0x05CC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17                         0x0214 0x0484 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT                           0x0214 0x0484 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1                   0x0214 0x0484 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__SAI1_MCLK                             0x0218 0x0488 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__NAND_WP_B                             0x0218 0x0488 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__SAI2_MCLK                             0x0218 0x0488 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY                        0x0218 0x0488 0x04F4 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB                        0x0218 0x0488 0x05D0 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__GPIO6_IO18                            0x0218 0x0488 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK                        0x0218 0x0488 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC                       0x021C 0x048C 0x06C0 0x0 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO                        0x021C 0x048C 0x0548 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX                       0x021C 0x048C 0x070C 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX                       0x021C 0x048C 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS                      0x021C 0x048C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS                      0x021C 0x048C 0x06F0 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4                     0x021C 0x048C 0x05BC 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19                         0x021C 0x048C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK                       0x0220 0x0490 0x06BC 0x0 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI                        0x0220 0x0490 0x054C 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX                       0x0220 0x0490 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX                       0x0220 0x0490 0x070C 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS                      0x0220 0x0490 0x06F0 0x3 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS                      0x0220 0x0490 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5                     0x0220 0x0490 0x05C0 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20                         0x0220 0x0490 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0                      0x0224 0x0494 0x06B4 0x0 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK                        0x0224 0x0494 0x0544 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS                      0x0224 0x0494 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS                      0x0224 0x0494 0x0708 0x2 0x4</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS                      0x0224 0x0494 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS                      0x0224 0x0494 0x06F8 0x3 0x2</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6                     0x0224 0x0494 0x05C4 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21                         0x0224 0x0494 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_RX_DATA__KPP_COL7                           0x0224 0x0494 0x0610 0x6 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0                      0x0228 0x0498 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0                         0x0228 0x0498 0x0550 0x1 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS                      0x0228 0x0498 0x0708 0x2 0x5</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS                      0x0228 0x0498 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS                      0x0228 0x0498 0x06F8 0x3 0x3</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS                      0x0228 0x0498 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7                     0x0228 0x0498 0x05C8 0x4 0x1</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22                         0x0228 0x0498 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_SAI2_TX_DATA__KPP_ROW7                           0x0228 0x0498 0x0630 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0                 0x022C 0x049C 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT                        0x022C 0x049C 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL                        0x022C 0x049C 0x05E4 0x2 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS                   0x022C 0x049C 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS                   0x022C 0x049C 0x06F0 0x3 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0                      0x022C 0x049C 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0                       0x022C 0x049C 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3                        0x022C 0x049C 0x0620 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1                 0x0230 0x04A0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT                        0x0230 0x04A0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA                        0x0230 0x04A0 0x05E8 0x2 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS                   0x0230 0x04A0 0x06F0 0x3 0x3</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS                   0x0230 0x04A0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1                      0x0230 0x04A0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1                       0x0230 0x04A0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3                        0x0230 0x04A0 0x0600 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2                 0x0234 0x04A4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX                     0x0234 0x04A4 0x04DC 0x1 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK                     0x0234 0x04A4 0x0534 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX                    0x0234 0x04A4 0x06F4 0x3 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX                    0x0234 0x04A4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4                      0x0234 0x04A4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2                       0x0234 0x04A4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2                        0x0234 0x04A4 0x061C 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3                 0x0238 0x04A8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX                     0x0238 0x04A8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI                     0x0238 0x04A8 0x053C 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX                    0x0238 0x04A8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX                    0x0238 0x04A8 0x06F4 0x3 0x3</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5                      0x0238 0x04A8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3                       0x0238 0x04A8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2                        0x0238 0x04A8 0x05FC 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL           0x023C 0x04AC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1                   0x023C 0x04AC 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6                   0x023C 0x04AC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4                    0x023C 0x04AC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1                     0x023C 0x04AC 0x0618 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC                 0x0240 0x04B0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER                     0x0240 0x04B0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2                      0x0240 0x04B0 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7                      0x0240 0x04B0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5                       0x0240 0x04B0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1                        0x0240 0x04B0 0x0000 0x6 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0                 0x0244 0x04B4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT                        0x0244 0x04B4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3                      0x0244 0x04B4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8                      0x0244 0x04B4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6                       0x0244 0x04B4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0                        0x0244 0x04B4 0x0614 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1                 0x0248 0x04B8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT                        0x0248 0x04B8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY                      0x0248 0x04B8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9                      0x0248 0x04B8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7                       0x0248 0x04B8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0                        0x0248 0x04B8 0x05F4 0x6 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2                 0x024C 0x04BC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX                     0x024C 0x04BC 0x04E0 0x1 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO                     0x024C 0x04BC 0x0538 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL                        0x024C 0x04BC 0x05EC 0x3 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED                      0x024C 0x04BC 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8                       0x024C 0x04BC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3                 0x0250 0x04C0 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX                     0x0250 0x04C0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0                      0x0250 0x04C0 0x0540 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA                        0x0250 0x04C0 0x05F0 0x3 0x4</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ                      0x0250 0x04C0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9                       0x0250 0x04C0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS                0x0250 0x04C0 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL           0x0254 0x04C4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC                 0x0254 0x04C4 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1                0x0254 0x04C4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2               0x0254 0x04C4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10                   0x0254 0x04C4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC                 0x0258 0x04C8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER                     0x0258 0x04C8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK                    0x0258 0x04C8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2                   0x0258 0x04C8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3                  0x0258 0x04C8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11                      0x0258 0x04C8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK                       0x025C 0x04CC 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1                  0x025C 0x04CC 0x0564 0x1 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0                      0x025C 0x04CC 0x06A0 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3                      0x025C 0x04CC 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ                       0x025C 0x04CC 0x057C 0x4 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12                         0x025C 0x04CC 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1                       0x025C 0x04CC 0x04E4 0x6 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0                     0x025C 0x04CC 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK                       0x0260 0x04D0 0x056C 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B                       0x0260 0x04D0 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK                       0x0260 0x04D0 0x06A8 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__GPT2_CLK                           0x0260 0x04D0 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE                      0x0260 0x04D0 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13                         0x0260 0x04D0 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2                       0x0260 0x04D0 0x04E8 0x6 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1                     0x0260 0x04D0 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__ENET1_CRS                             0x0264 0x04D4 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB                  0x0264 0x04D4 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC                          0x0264 0x04D4 0x06AC 0x2 0x1</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1                         0x0264 0x04D4 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0                        0x0264 0x04D4 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__GPIO7_IO14                            0x0264 0x04D4 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3                          0x0264 0x04D4 0x04EC 0x6 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2                        0x0264 0x04D4 0x0000 0x7 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__ENET1_COL                             0x0268 0x04D8 0x0000 0x0 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY                        0x0268 0x04D8 0x0000 0x1 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__SAI1_TX_DATA0                         0x0268 0x04D8 0x0000 0x2 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__GPT2_CAPTURE2                         0x0268 0x04D8 0x0000 0x3 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1                        0x0268 0x04D8 0x0000 0x4 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__GPIO7_IO15                            0x0268 0x04D8 0x0000 0x5 0x0</div><div class='add'>+#define MX7D_PAD_ENET1_COL__CCM_EXT_CLK4                          0x0268 0x04D8 0x04F0 0x6 0x2</div><div class='add'>+#define MX7D_PAD_ENET1_COL__CSU_INT_DEB                           0x0268 0x04D8 0x0000 0x7 0x0</div><div class='add'>+</div><div class='add'>+#endif /* __DTS_IMX7D_PINFUNC_H */</div><div class='head'>diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts<br/>new file mode 100644<br/>index 000000000000..4d1a4b977d84<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx7d-sdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d-sdb.dts</a></div><div class='hunk'>@@ -0,0 +1,408 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "imx7d.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Freescale i.MX7 SabreSD Board";</div><div class='add'>+	compatible = "fsl,imx7d-sdb", "fsl,imx7d";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reg_usb_otg1_vbus: regulator@0 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			regulator-name = "usb_otg1_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_usb_otg2_vbus: regulator@1 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			regulator-name = "usb_otg2_vbus";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio4 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_can2_3v3: regulator@2 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			regulator-name = "can2-3v3";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_vref_1v8: regulator@3 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			regulator-name = "vref-1v8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	arm-supply = &lt;&amp;sw1a_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pfuze3000@08 {</div><div class='add'>+		compatible = "fsl,pfuze3000";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			sw1a_reg: sw1a {</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1475000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* use sw1c_reg to align with pfuze100/pfuze200 */</div><div class='add'>+			sw1c_reg: sw1b {</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1475000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sw2_reg: sw2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sw3a_reg: sw3 {</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1650000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			swbst_reg: swbst {</div><div class='add'>+				regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;5150000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			snvs_reg: vsnvs {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vref_reg: vrefddr {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen1_reg: vldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen2_reg: vldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1550000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen3_reg: vccsd {</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen4_reg: v33 {</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen5_reg: vldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vgen6_reg: vldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	codec: wm8960@1a {</div><div class='add'>+		compatible = "wlf,wm8960";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks IMX7D_AUDIO_MCLK_ROOT_CLK&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		wlf,shared-lrclk;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX7D_UART1_ROOT_SRC&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clks IMX7D_PLL_SYS_MAIN_240M_CLK&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio5 0 0&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio5 1 0&gt;;</div><div class='add'>+	enable-sdio-wakeup;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+</div><div class='add'>+	imx7d-sdb {</div><div class='add'>+		pinctrl_hog: hoggrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_UART3_CTS_B__GPIO4_IO7		0x14</div><div class='add'>+				MX7D_PAD_ECSPI2_SS0__GPIO4_IO23		0x34  /* bt reg on */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c1: i2c1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f</div><div class='add'>+				MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c2: i2c2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f</div><div class='add'>+				MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c3: i2c3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_I2C3_SDA__I2C3_SDA		0x4000007f</div><div class='add'>+				MX7D_PAD_I2C3_SCL__I2C3_SCL		0x4000007f</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_i2c4: i2c4grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA		0x4000007f</div><div class='add'>+				MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL		0x4000007f</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		pinctrl_uart1: uart1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79</div><div class='add'>+				MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart5: uart5grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX	0x79</div><div class='add'>+				MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX	0x79</div><div class='add'>+				MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS	0x79</div><div class='add'>+				MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS	0x79</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_uart6: uart6grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	0x79</div><div class='add'>+				MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	0x79</div><div class='add'>+				MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	0x79</div><div class='add'>+				MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	0x79</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD1_CMD__SD1_CMD		0x59</div><div class='add'>+				MX7D_PAD_SD1_CLK__SD1_CLK		0x19</div><div class='add'>+				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59</div><div class='add'>+				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59</div><div class='add'>+				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59</div><div class='add'>+				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59</div><div class='add'>+				MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */</div><div class='add'>+				MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */</div><div class='add'>+				MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59 /* vmmc */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD2_CMD__SD2_CMD		0x59</div><div class='add'>+				MX7D_PAD_SD2_CLK__SD2_CLK		0x19</div><div class='add'>+				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59</div><div class='add'>+				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59</div><div class='add'>+				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59</div><div class='add'>+				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59</div><div class='add'>+				MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x59 /* WL_REG_ON */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD2_CMD__SD2_CMD		0x5a</div><div class='add'>+				MX7D_PAD_SD2_CLK__SD2_CLK		0x1a</div><div class='add'>+				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5a</div><div class='add'>+				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5a</div><div class='add'>+				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5a</div><div class='add'>+				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5a</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD2_CMD__SD2_CMD		0x5b</div><div class='add'>+				MX7D_PAD_SD2_CLK__SD2_CLK		0x1b</div><div class='add'>+				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5b</div><div class='add'>+				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5b</div><div class='add'>+				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5b</div><div class='add'>+				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5b</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD3_CMD__SD3_CMD		0x59</div><div class='add'>+				MX7D_PAD_SD3_CLK__SD3_CLK		0x19</div><div class='add'>+				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59</div><div class='add'>+				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59</div><div class='add'>+				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD3_CMD__SD3_CMD		0x5a</div><div class='add'>+				MX7D_PAD_SD3_CLK__SD3_CLK		0x1a</div><div class='add'>+				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a</div><div class='add'>+				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a</div><div class='add'>+				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1a</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX7D_PAD_SD3_CMD__SD3_CMD		0x5b</div><div class='add'>+				MX7D_PAD_SD3_CLK__SD3_CLK		0x1b</div><div class='add'>+				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b</div><div class='add'>+				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b</div><div class='add'>+				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi<br/>new file mode 100644<br/>index 000000000000..c42cf8db0451<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx7d.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/imx7d.dtsi</a></div><div class='hunk'>@@ -0,0 +1,486 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/imx7d-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include "imx7d-pinfunc.h"</div><div class='add'>+#include "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		gpio4 = &amp;gpio5;</div><div class='add'>+		gpio5 = &amp;gpio6;</div><div class='add'>+		gpio6 = &amp;gpio7;</div><div class='add'>+		i2c0 = &amp;i2c1;</div><div class='add'>+		i2c1 = &amp;i2c2;</div><div class='add'>+		i2c2 = &amp;i2c3;</div><div class='add'>+		i2c3 = &amp;i2c4;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		mmc2 = &amp;usdhc3;</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		serial3 = &amp;uart4;</div><div class='add'>+		serial4 = &amp;uart5;</div><div class='add'>+		serial5 = &amp;uart6;</div><div class='add'>+		serial6 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			operating-points = &lt;</div><div class='add'>+				/* KHz	uV */</div><div class='add'>+				996000	1075000</div><div class='add'>+				792000	975000</div><div class='add'>+			&gt;;</div><div class='add'>+			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='add'>+			clocks = &lt;&amp;clks IMX7D_ARM_A7_ROOT_CLK&gt;, &lt;&amp;clks IMX7D_ARM_A7_ROOT_SRC&gt;,</div><div class='add'>+				 &lt;&amp;clks IMX7D_PLL_ARM_MAIN_CLK&gt;, &lt;&amp;clks IMX7D_PLL_SYS_MAIN_CLK&gt;;</div><div class='add'>+			clock-names = "arm", "arm_root_src", "pll_arm", "pll_sys_main";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intc: interrupt-controller@31001000 {</div><div class='add'>+		compatible = "arm,cortex-a7-gic";</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0x31001000 0x1000&gt;,</div><div class='add'>+		      &lt;0x31002000 0x1000&gt;,</div><div class='add'>+		      &lt;0x31004000 0x2000&gt;,</div><div class='add'>+		      &lt;0x31006000 0x2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ckil: clock-cki {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "ckil";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc: clock-osc {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "osc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		aips1: aips-bus@30000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x30000000 0x400000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@30200000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30200000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;, /* GPIO1_INT15_0 */</div><div class='add'>+					     &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;; /* GPIO1_INT31_16 */</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio2: gpio@30210000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30210000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio3: gpio@30220000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30220000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio4: gpio@30230000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30230000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio5: gpio@30240000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30240000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio6: gpio@30250000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30250000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio7: gpio@30260000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";</div><div class='add'>+				reg = &lt;0x30260000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpt1: gpt@302d0000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";</div><div class='add'>+				reg = &lt;0x302d0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX7D_GPT1_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpt2: gpt@302e0000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";</div><div class='add'>+				reg = &lt;0x302e0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX7D_GPT2_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpt3: gpt@302f0000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";</div><div class='add'>+				reg = &lt;0x302f0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX7D_GPT3_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpt4: gpt@30300000 {</div><div class='add'>+				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";</div><div class='add'>+				reg = &lt;0x30300000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX7D_GPT4_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			iomuxc: iomuxc@30330000 {</div><div class='add'>+				compatible = "fsl,imx7d-iomuxc";</div><div class='add'>+				reg = &lt;0x30330000 0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpr: iomuxc-gpr@30340000 {</div><div class='add'>+				compatible = "fsl,imx7d-iomuxc-gpr", "syscon";</div><div class='add'>+				reg = &lt;0x30340000 0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ocotp: ocotp-ctrl@30350000 {</div><div class='add'>+				compatible = "syscon";</div><div class='add'>+				reg = &lt;0x30350000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			anatop: anatop@30360000 {</div><div class='add'>+				compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",</div><div class='add'>+					"syscon", "simple-bus";</div><div class='add'>+				reg = &lt;0x30360000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				reg_1p0d: regulator-vdd1p0d@210 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vdd1p0d";</div><div class='add'>+					regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					anatop-reg-offset = &lt;0x210&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;8&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;800000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;1200000&gt;;</div><div class='add'>+					anatop-enable-bit = &lt;31&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			snvs: snvs@30370000 {</div><div class='add'>+				compatible = "fsl,sec-v4.0-mon", "simple-bus";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x30370000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+				snvs-rtc-lp@34 {</div><div class='add'>+					compatible = "fsl,sec-v4.0-mon-rtc-lp";</div><div class='add'>+					reg = &lt;0x34 0x58&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						     &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clks: ccm@30380000 {</div><div class='add'>+				compatible = "fsl,imx7d-ccm";</div><div class='add'>+				reg = &lt;0x30380000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;ckil&gt;, &lt;&amp;osc&gt;;</div><div class='add'>+				clock-names = "ckil", "osc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			src: src@30390000 {</div><div class='add'>+				compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon";</div><div class='add'>+				reg = &lt;0x30390000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#reset-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips3: aips-bus@30800000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x30800000 0x400000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			uart1: serial@30860000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30860000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART1_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART1_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@30870000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30870000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART2_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART2_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: serial@30880000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30880000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART3_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART3_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@30a20000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";</div><div class='add'>+				reg = &lt;0x30a20000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_I2C1_ROOT_CLK&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@30a30000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";</div><div class='add'>+				reg = &lt;0x30a30000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_I2C2_ROOT_CLK&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@30a40000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";</div><div class='add'>+				reg = &lt;0x30a40000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_I2C3_ROOT_CLK&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@30a50000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";</div><div class='add'>+				reg = &lt;0x30a50000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_I2C4_ROOT_CLK&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@30a60000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30a60000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART4_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART4_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@30a70000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30a70000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART5_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART5_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart6: serial@30a80000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30a80000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART6_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART6_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@30a90000 {</div><div class='add'>+				compatible = "fsl,imx7d-uart",</div><div class='add'>+					     "fsl,imx6q-uart";</div><div class='add'>+				reg = &lt;0x30a90000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_UART7_ROOT_CLK&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_UART7_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc1: usdhc@30b40000 {</div><div class='add'>+				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				reg = &lt;0x30b40000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_USDHC1_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc2: usdhc@30b50000 {</div><div class='add'>+				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				reg = &lt;0x30b50000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_USDHC2_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc3: usdhc@30b60000 {</div><div class='add'>+				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				reg = &lt;0x30b60000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_CLK_DUMMY&gt;,</div><div class='add'>+					&lt;&amp;clks IMX7D_USDHC3_ROOT_CLK&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi<br/>index 28e38f8c6b0f..3807d4f46ef7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/integrator.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/integrator.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/integrator.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/integrator.dtsi</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	core-module@10000000 {</div><div class='del'>-		compatible = "arm,core-module-integrator", "syscon";</div><div class='add'>+		compatible = "arm,core-module-integrator", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x10000000 0x200&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/* Use core module LED to indicate CPU load */</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> </div><div class='ctx'> 		syscon {</div><div class='ctx'> 			/* Debug registers mapped as syscon */</div><div class='del'>-			compatible = "syscon";</div><div class='add'>+			compatible = "syscon", "simple-mfd";</div><div class='ctx'> 			reg = &lt;0x1a000000 0x10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			led@04.0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/k2e-evm.dts b/arch/arm/boot/dts/k2e-evm.dts<br/>index 560d62150ade..50c83c21d911 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2e-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2e-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2e-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e-evm.dts</a></div><div class='hunk'>@@ -141,6 +141,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdio {</div><div class='add'>+	status = "ok";</div><div class='ctx'> 	ethphy0: ethernet-phy@0 {</div><div class='ctx'> 		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/k2e-netcp.dtsi b/arch/arm/boot/dts/k2e-netcp.dtsi<br/>new file mode 100644<br/>index 000000000000..b13b3c94e7fc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2e-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e-netcp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,206 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for Keystone 2 Edison Netcp driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Texas Instruments, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+qmss: qmss@2a40000 {</div><div class='add'>+	compatible = "ti,keystone-navigator-qmss";</div><div class='add'>+	dma-coherent;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	clocks = &lt;&amp;chipclk13&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	queue-range	= &lt;0 0x2000&gt;;</div><div class='add'>+	linkram0	= &lt;0x100000 0x4000&gt;;</div><div class='add'>+	linkram1	= &lt;0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+	qmgrs {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		qmgr0 {</div><div class='add'>+			managed-queues = &lt;0 0x2000&gt;;</div><div class='add'>+			reg = &lt;0x2a40000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a06000 0x400&gt;,</div><div class='add'>+			      &lt;0x2a02000 0x1000&gt;,</div><div class='add'>+			      &lt;0x2a03000 0x1000&gt;,</div><div class='add'>+			      &lt;0x23a80000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a80000 0x20000&gt;;</div><div class='add'>+			reg-names = "peek", "status", "config",</div><div class='add'>+				    "region", "push", "pop";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	queue-pools {</div><div class='add'>+		qpend {</div><div class='add'>+			qpend-0 {</div><div class='add'>+				qrange = &lt;658 8&gt;;</div><div class='add'>+				interrupts =&lt;0 40 0xf04 0 41 0xf04 0 42 0xf04</div><div class='add'>+					     0 43 0xf04 0 44 0xf04 0 45 0xf04</div><div class='add'>+					     0 46 0xf04 0 47 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+			qpend-1 {</div><div class='add'>+				qrange = &lt;528 16&gt;;</div><div class='add'>+				interrupts = &lt;0 48 0xf04 0 49 0xf04 0 50 0xf04</div><div class='add'>+					      0 51 0xf04 0 52 0xf04 0 53 0xf04</div><div class='add'>+					      0 54 0xf04 0 55 0xf04 0 56 0xf04</div><div class='add'>+					      0 57 0xf04 0 58 0xf04 0 59 0xf04</div><div class='add'>+					      0 60 0xf04 0 61 0xf04 0 62 0xf04</div><div class='add'>+					      0 63 0xf04&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+			qpend-2 {</div><div class='add'>+				qrange = &lt;544 16&gt;;</div><div class='add'>+				interrupts = &lt;0 64 0xf04 0 65 0xf04 0 66 0xf04</div><div class='add'>+					      0 59 0xf04 0 68 0xf04 0 69 0xf04</div><div class='add'>+					      0 70 0xf04 0 71 0xf04 0 72 0xf04</div><div class='add'>+					      0 73 0xf04 0 74 0xf04 0 75 0xf04</div><div class='add'>+					      0 76 0xf04 0 77 0xf04 0 78 0xf04</div><div class='add'>+					      0 79 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		general-purpose {</div><div class='add'>+			gp-0 {</div><div class='add'>+				qrange = &lt;4000 64&gt;;</div><div class='add'>+			};</div><div class='add'>+			netcp-tx {</div><div class='add'>+				qrange = &lt;896 128&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	descriptor-regions {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		region-12 {</div><div class='add'>+			id = &lt;12&gt;;</div><div class='add'>+			region-spec = &lt;8192 128&gt;;	/* num_desc desc_size */</div><div class='add'>+			link-index = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+}; /* qmss */</div><div class='add'>+</div><div class='add'>+knav_dmas: knav_dmas@0 {</div><div class='add'>+	compatible = "ti,keystone-navigator-dma";</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	ti,navigator-cloud-address = &lt;0x23a80000 0x23a90000</div><div class='add'>+				 0x23a80000 0x23a90000&gt;;</div><div class='add'>+</div><div class='add'>+	dma_gbe: dma_gbe@0 {</div><div class='add'>+		reg = &lt;0x24186000 0x100&gt;,</div><div class='add'>+			  &lt;0x24187000 0x2a0&gt;,</div><div class='add'>+			  &lt;0x24188000 0xb60&gt;,</div><div class='add'>+			  &lt;0x24186100 0x80&gt;,</div><div class='add'>+			  &lt;0x24189000 0x1000&gt;;</div><div class='add'>+		reg-names = "global", "txchan", "rxchan",</div><div class='add'>+				"txsched", "rxflow";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+netcp: netcp@24000000 {</div><div class='add'>+	reg = &lt;0x2620110 0x8&gt;;</div><div class='add'>+	reg-names = "efuse";</div><div class='add'>+	compatible = "ti,netcp-1.0";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	/* NetCP address range */</div><div class='add'>+	ranges = &lt;0 0x24000000 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;, &lt;&amp;clkcpgmac&gt;, &lt;&amp;chipclk12&gt;;</div><div class='add'>+	dma-coherent;</div><div class='add'>+</div><div class='add'>+	ti,navigator-dmas = &lt;&amp;dma_gbe 0&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 8&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 0&gt;;</div><div class='add'>+	ti,navigator-dma-names = "netrx0", "netrx1", "nettx";</div><div class='add'>+</div><div class='add'>+	netcp-devices {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		gbe@200000 { /* ETHSS */</div><div class='add'>+			label = "netcp-gbe";</div><div class='add'>+			compatible = "ti,netcp-gbe-9";</div><div class='add'>+			reg = &lt;0x200000 0x900&gt;, &lt;0x220000 0x20000&gt;;</div><div class='add'>+			/* enable-ale; */</div><div class='add'>+			tx-queue = &lt;896&gt;;</div><div class='add'>+			tx-channel = "nettx";</div><div class='add'>+</div><div class='add'>+			interfaces {</div><div class='add'>+				gbe0: interface-0 {</div><div class='add'>+					slave-port = &lt;0&gt;;</div><div class='add'>+					link-interface	= &lt;1&gt;;</div><div class='add'>+					phy-handle	= &lt;&amp;ethphy0&gt;;</div><div class='add'>+				};</div><div class='add'>+				gbe1: interface-1 {</div><div class='add'>+					slave-port = &lt;1&gt;;</div><div class='add'>+					link-interface	= &lt;1&gt;;</div><div class='add'>+					phy-handle	= &lt;&amp;ethphy1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			secondary-slave-ports {</div><div class='add'>+				port-2 {</div><div class='add'>+					slave-port = &lt;2&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-3 {</div><div class='add'>+					slave-port = &lt;3&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-4 {</div><div class='add'>+					slave-port = &lt;4&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-5 {</div><div class='add'>+					slave-port = &lt;5&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-6 {</div><div class='add'>+					slave-port = &lt;6&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-7 {</div><div class='add'>+					slave-port = &lt;7&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	netcp-interfaces {</div><div class='add'>+		interface-0 {</div><div class='add'>+			rx-channel = "netrx0";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;528&gt;;</div><div class='add'>+			tx-completion-queue = &lt;530&gt;;</div><div class='add'>+			efuse-mac = &lt;1&gt;;</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe0&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+		interface-1 {</div><div class='add'>+			rx-channel = "netrx1";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;529&gt;;</div><div class='add'>+			tx-completion-queue = &lt;531&gt;;</div><div class='add'>+			efuse-mac = &lt;0&gt;;</div><div class='add'>+			local-mac-address = [02 18 31 7e 3e 00];</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi<br/>index 5fc14683d6df..1b6494fbdb91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2e.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2e.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2e.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2e.dtsi</a></div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 			gpio,syscon-dev = &lt;&amp;devctrl 0x240&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie@21020000 {</div><div class='add'>+		pcie1: pcie@21020000 {</div><div class='ctx'> 			compatible = "ti,keystone-pcie","snps,dw-pcie";</div><div class='ctx'> 			clocks = &lt;&amp;clkpcie1&gt;;</div><div class='ctx'> 			clock-names = "pcie";</div><div class='hunk'>@@ -96,6 +96,7 @@</div><div class='ctx'> 			ranges = &lt;0x81000000 0 0 0x23260000 0x4000 0x4000</div><div class='ctx'> 				0x82000000 0 0x60000000 0x60000000 0 0x10000000&gt;;</div><div class='ctx'> </div><div class='add'>+			status = "disabled";</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -130,6 +131,7 @@</div><div class='ctx'> 					&lt;GIC_SPI 376 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+		/include/ "k2e-netcp.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts<br/>index 3223cc152a85..660ebf58d547 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2hk-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2hk-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2hk-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk-evm.dts</a></div><div class='hunk'>@@ -169,6 +169,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdio {</div><div class='add'>+	status = "ok";</div><div class='ctx'> 	ethphy0: ethernet-phy@0 {</div><div class='ctx'> 		compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/k2hk-netcp.dtsi b/arch/arm/boot/dts/k2hk-netcp.dtsi<br/>new file mode 100644<br/>index 000000000000..77a32c3c17e4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2hk-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk-netcp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for Keystone 2 Hawking Netcp driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Texas Instruments, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+qmss: qmss@2a40000 {</div><div class='add'>+	compatible = "ti,keystone-navigator-qmss";</div><div class='add'>+	dma-coherent;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	clocks = &lt;&amp;chipclk13&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	queue-range	= &lt;0 0x4000&gt;;</div><div class='add'>+	linkram0	= &lt;0x100000 0x8000&gt;;</div><div class='add'>+	linkram1	= &lt;0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+	qmgrs {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		qmgr0 {</div><div class='add'>+			managed-queues = &lt;0 0x2000&gt;;</div><div class='add'>+			reg = &lt;0x2a40000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a06000 0x400&gt;,</div><div class='add'>+			      &lt;0x2a02000 0x1000&gt;,</div><div class='add'>+			      &lt;0x2a03000 0x1000&gt;,</div><div class='add'>+			      &lt;0x23a80000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a80000 0x20000&gt;;</div><div class='add'>+			reg-names = "peek", "status", "config",</div><div class='add'>+				    "region", "push", "pop";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qmgr1 {</div><div class='add'>+			managed-queues = &lt;0x2000 0x2000&gt;;</div><div class='add'>+			reg = &lt;0x2a60000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a06400 0x400&gt;,</div><div class='add'>+			      &lt;0x2a04000 0x1000&gt;,</div><div class='add'>+			      &lt;0x2a05000 0x1000&gt;,</div><div class='add'>+			      &lt;0x23aa0000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2aa0000 0x20000&gt;;</div><div class='add'>+			reg-names = "peek", "status", "config",</div><div class='add'>+				    "region", "push", "pop";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	queue-pools {</div><div class='add'>+		qpend {</div><div class='add'>+			qpend-0 {</div><div class='add'>+				qrange = &lt;658 8&gt;;</div><div class='add'>+				interrupts =&lt;0 40 0xf04 0 41 0xf04 0 42 0xf04</div><div class='add'>+					     0 43 0xf04 0 44 0xf04 0 45 0xf04</div><div class='add'>+					     0 46 0xf04 0 47 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+			qpend-1 {</div><div class='add'>+				qrange = &lt;8704 16&gt;;</div><div class='add'>+				interrupts = &lt;0 48 0xf04 0 49 0xf04 0 50 0xf04</div><div class='add'>+					      0 51 0xf04 0 52 0xf04 0 53 0xf04</div><div class='add'>+					      0 54 0xf04 0 55 0xf04 0 56 0xf04</div><div class='add'>+					      0 57 0xf04 0 58 0xf04 0 59 0xf04</div><div class='add'>+					      0 60 0xf04 0 61 0xf04 0 62 0xf04</div><div class='add'>+					      0 63 0xf04&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+			qpend-2 {</div><div class='add'>+				qrange = &lt;8720 16&gt;;</div><div class='add'>+				interrupts = &lt;0 64 0xf04 0 65 0xf04 0 66 0xf04</div><div class='add'>+					      0 59 0xf04 0 68 0xf04 0 69 0xf04</div><div class='add'>+					      0 70 0xf04 0 71 0xf04 0 72 0xf04</div><div class='add'>+					      0 73 0xf04 0 74 0xf04 0 75 0xf04</div><div class='add'>+					      0 76 0xf04 0 77 0xf04 0 78 0xf04</div><div class='add'>+					      0 79 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		general-purpose {</div><div class='add'>+			gp-0 {</div><div class='add'>+				qrange = &lt;4000 64&gt;;</div><div class='add'>+			};</div><div class='add'>+			netcp-tx {</div><div class='add'>+				qrange = &lt;640 9&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+			netcpx-tx {</div><div class='add'>+				qrange = &lt;8752 8&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	descriptor-regions {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		region-12 {</div><div class='add'>+			id = &lt;12&gt;;</div><div class='add'>+			region-spec = &lt;8192 128&gt;;	/* num_desc desc_size */</div><div class='add'>+			link-index = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+}; /* qmss */</div><div class='add'>+</div><div class='add'>+knav_dmas: knav_dmas@0 {</div><div class='add'>+	compatible = "ti,keystone-navigator-dma";</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	ti,navigator-cloud-address = &lt;0x23a80000 0x23a90000</div><div class='add'>+				   0x23aa0000 0x23ab0000&gt;;</div><div class='add'>+</div><div class='add'>+	dma_gbe: dma_gbe@0 {</div><div class='add'>+		reg = &lt;0x2004000 0x100&gt;,</div><div class='add'>+			  &lt;0x2004400 0x120&gt;,</div><div class='add'>+			  &lt;0x2004800 0x300&gt;,</div><div class='add'>+			  &lt;0x2004c00 0x120&gt;,</div><div class='add'>+			  &lt;0x2005000 0x400&gt;;</div><div class='add'>+		reg-names = "global", "txchan", "rxchan",</div><div class='add'>+				"txsched", "rxflow";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+netcp: netcp@2000000 {</div><div class='add'>+	reg = &lt;0x2620110 0x8&gt;;</div><div class='add'>+	reg-names = "efuse";</div><div class='add'>+	compatible = "ti,netcp-1.0";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	/* NetCP address range */</div><div class='add'>+	ranges  = &lt;0 0x2000000 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;, &lt;&amp;clkcpgmac&gt;, &lt;&amp;chipclk12&gt;;</div><div class='add'>+	dma-coherent;</div><div class='add'>+</div><div class='add'>+	ti,navigator-dmas = &lt;&amp;dma_gbe 22&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 23&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 8&gt;;</div><div class='add'>+	ti,navigator-dma-names = "netrx0", "netrx1", "nettx";</div><div class='add'>+</div><div class='add'>+	netcp-devices {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		gbe@90000 { /* ETHSS */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			label = "netcp-gbe";</div><div class='add'>+			compatible = "ti,netcp-gbe";</div><div class='add'>+			reg = &lt;0x90000 0x300&gt;, &lt;0x90400 0x400&gt;, &lt;0x90800 0x700&gt;;</div><div class='add'>+			/* enable-ale; */</div><div class='add'>+			tx-queue = &lt;648&gt;;</div><div class='add'>+			tx-channel = "nettx";</div><div class='add'>+</div><div class='add'>+			interfaces {</div><div class='add'>+				gbe0: interface-0 {</div><div class='add'>+					slave-port = &lt;0&gt;;</div><div class='add'>+					link-interface = &lt;1&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+				};</div><div class='add'>+				gbe1: interface-1 {</div><div class='add'>+					slave-port = &lt;1&gt;;</div><div class='add'>+					link-interface = &lt;1&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			secondary-slave-ports {</div><div class='add'>+				port-2 {</div><div class='add'>+					slave-port = &lt;2&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-3 {</div><div class='add'>+					slave-port = &lt;3&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	netcp-interfaces {</div><div class='add'>+		interface-0 {</div><div class='add'>+			rx-channel = "netrx0";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;8704&gt;;</div><div class='add'>+			tx-completion-queue = &lt;8706&gt;;</div><div class='add'>+			efuse-mac = &lt;1&gt;;</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe0&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+		interface-1 {</div><div class='add'>+			rx-channel = "netrx1";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;8705&gt;;</div><div class='add'>+			tx-completion-queue = &lt;8707&gt;;</div><div class='add'>+			efuse-mac = &lt;0&gt;;</div><div class='add'>+			local-mac-address = [02 18 31 7e 3e 6f];</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/k2hk.dtsi b/arch/arm/boot/dts/k2hk.dtsi<br/>index d721f4b737f7..ae6472407b22 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2hk.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2hk.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2hk.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2hk.dtsi</a></div><div class='hunk'>@@ -98,5 +98,6 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio,syscon-dev = &lt;&amp;devctrl 0x25c&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		/include/ "k2hk-netcp.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/k2l-evm.dts b/arch/arm/boot/dts/k2l-evm.dts<br/>index 85cc7f2872d7..9a69a6b55374 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2l-evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2l-evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2l-evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l-evm.dts</a></div><div class='hunk'>@@ -118,6 +118,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdio {</div><div class='add'>+	status = "ok";</div><div class='ctx'> 	ethphy0: ethernet-phy@0 {</div><div class='ctx'> 		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/k2l-netcp.dtsi b/arch/arm/boot/dts/k2l-netcp.dtsi<br/>new file mode 100644<br/>index 000000000000..6b95284d11d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2l-netcp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l-netcp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for Keystone 2 Lamarr Netcp driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Texas Instruments, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+qmss: qmss@2a40000 {</div><div class='add'>+	compatible = "ti,keystone-navigator-qmss";</div><div class='add'>+	dma-coherent;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	clocks = &lt;&amp;chipclk13&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	queue-range	= &lt;0 0x2000&gt;;</div><div class='add'>+	linkram0	= &lt;0x100000 0x4000&gt;;</div><div class='add'>+	linkram1	= &lt;0x70000000 0x10000&gt;; /* 1MB OSR mem */</div><div class='add'>+</div><div class='add'>+	qmgrs {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		qmgr0 {</div><div class='add'>+			managed-queues = &lt;0 0x2000&gt;;</div><div class='add'>+			reg = &lt;0x2a40000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a06000 0x400&gt;,</div><div class='add'>+			      &lt;0x2a02000 0x1000&gt;,</div><div class='add'>+			      &lt;0x2a03000 0x1000&gt;,</div><div class='add'>+			      &lt;0x23a80000 0x20000&gt;,</div><div class='add'>+			      &lt;0x2a80000 0x20000&gt;;</div><div class='add'>+			reg-names = "peek", "status", "config",</div><div class='add'>+				    "region", "push", "pop";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	queue-pools {</div><div class='add'>+		qpend {</div><div class='add'>+			qpend-0 {</div><div class='add'>+				qrange = &lt;658 8&gt;;</div><div class='add'>+				interrupts =&lt;0 40 0xf04 0 41 0xf04 0 42 0xf04</div><div class='add'>+					     0 43 0xf04 0 44 0xf04 0 45 0xf04</div><div class='add'>+					     0 46 0xf04 0 47 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+			qpend-1 {</div><div class='add'>+				qrange = &lt;528 16&gt;;</div><div class='add'>+				interrupts = &lt;0 48 0xf04 0 49 0xf04 0 50 0xf04</div><div class='add'>+					      0 51 0xf04 0 52 0xf04 0 53 0xf04</div><div class='add'>+					      0 54 0xf04 0 55 0xf04 0 56 0xf04</div><div class='add'>+					      0 57 0xf04 0 58 0xf04 0 59 0xf04</div><div class='add'>+					      0 60 0xf04 0 61 0xf04 0 62 0xf04</div><div class='add'>+					      0 63 0xf04&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+			qpend-2 {</div><div class='add'>+				qrange = &lt;544 16&gt;;</div><div class='add'>+				interrupts = &lt;0 64 0xf04 0 65 0xf04 0 66 0xf04</div><div class='add'>+					      0 59 0xf04 0 68 0xf04 0 69 0xf04</div><div class='add'>+					      0 70 0xf04 0 71 0xf04 0 72 0xf04</div><div class='add'>+					      0 73 0xf04 0 74 0xf04 0 75 0xf04</div><div class='add'>+					      0 76 0xf04 0 77 0xf04 0 78 0xf04</div><div class='add'>+					      0 79 0xf04&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		general-purpose {</div><div class='add'>+			gp-0 {</div><div class='add'>+				qrange = &lt;4000 64&gt;;</div><div class='add'>+			};</div><div class='add'>+			netcp-tx {</div><div class='add'>+				qrange = &lt;896 128&gt;;</div><div class='add'>+				qalloc-by-id;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	descriptor-regions {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		region-12 {</div><div class='add'>+			id = &lt;12&gt;;</div><div class='add'>+			region-spec = &lt;8192 128&gt;;	/* num_desc desc_size */</div><div class='add'>+			link-index = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+}; /* qmss */</div><div class='add'>+</div><div class='add'>+knav_dmas: knav_dmas@0 {</div><div class='add'>+	compatible = "ti,keystone-navigator-dma";</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges;</div><div class='add'>+	ti,navigator-cloud-address = &lt;0x23a80000 0x23a90000&gt;;</div><div class='add'>+</div><div class='add'>+	dma_gbe: dma_gbe@0 {</div><div class='add'>+		reg = &lt;0x26186000 0x100&gt;,</div><div class='add'>+			  &lt;0x26187000 0x2a0&gt;,</div><div class='add'>+			  &lt;0x26188000 0xb60&gt;,</div><div class='add'>+			  &lt;0x26186100 0x80&gt;,</div><div class='add'>+			  &lt;0x26189000 0x1000&gt;;</div><div class='add'>+		reg-names = "global", "txchan", "rxchan",</div><div class='add'>+				"txsched", "rxflow";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+netcp: netcp@26000000 {</div><div class='add'>+	reg = &lt;0x2620110 0x8&gt;;</div><div class='add'>+	reg-names = "efuse";</div><div class='add'>+	compatible = "ti,netcp-1.0";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	/* NetCP address range */</div><div class='add'>+	ranges = &lt;0 0x26000000 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+	clocks = &lt;&amp;papllclk&gt;, &lt;&amp;clkcpgmac&gt;, &lt;&amp;chipclk12&gt;;</div><div class='add'>+	dma-coherent;</div><div class='add'>+</div><div class='add'>+	ti,navigator-dmas = &lt;&amp;dma_gbe 0&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 8&gt;,</div><div class='add'>+			&lt;&amp;dma_gbe 0&gt;;</div><div class='add'>+	ti,navigator-dma-names = "netrx0", "netrx1", "nettx";</div><div class='add'>+</div><div class='add'>+	netcp-devices {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		gbe@200000 { /* ETHSS */</div><div class='add'>+			label = "netcp-gbe";</div><div class='add'>+			compatible = "ti,netcp-gbe-5";</div><div class='add'>+			reg = &lt;0x200000 0x900&gt;, &lt;0x220000 0x20000&gt;;</div><div class='add'>+			/* enable-ale; */</div><div class='add'>+			tx-queue = &lt;896&gt;;</div><div class='add'>+			tx-channel = "nettx";</div><div class='add'>+</div><div class='add'>+			interfaces {</div><div class='add'>+				gbe0: interface-0 {</div><div class='add'>+					slave-port = &lt;0&gt;;</div><div class='add'>+					link-interface	= &lt;1&gt;;</div><div class='add'>+					phy-handle	= &lt;&amp;ethphy0&gt;;</div><div class='add'>+				};</div><div class='add'>+				gbe1: interface-1 {</div><div class='add'>+					slave-port = &lt;1&gt;;</div><div class='add'>+					link-interface	= &lt;1&gt;;</div><div class='add'>+					phy-handle	= &lt;&amp;ethphy1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			secondary-slave-ports {</div><div class='add'>+				port-2 {</div><div class='add'>+					slave-port = &lt;2&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				port-3 {</div><div class='add'>+					slave-port = &lt;3&gt;;</div><div class='add'>+					link-interface	= &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	netcp-interfaces {</div><div class='add'>+		interface-0 {</div><div class='add'>+			rx-channel = "netrx0";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;528&gt;;</div><div class='add'>+			tx-completion-queue = &lt;530&gt;;</div><div class='add'>+			efuse-mac = &lt;1&gt;;</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe0&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+		interface-1 {</div><div class='add'>+			rx-channel = "netrx1";</div><div class='add'>+			rx-pool = &lt;1024 12&gt;;</div><div class='add'>+			tx-pool = &lt;1024 12&gt;;</div><div class='add'>+			rx-queue-depth = &lt;128 128 0 0&gt;;</div><div class='add'>+			rx-buffer-size = &lt;1518 4096 0 0&gt;;</div><div class='add'>+			rx-queue = &lt;529&gt;;</div><div class='add'>+			tx-completion-queue = &lt;531&gt;;</div><div class='add'>+			efuse-mac = &lt;0&gt;;</div><div class='add'>+			local-mac-address = [02 18 31 7e 3e 7f];</div><div class='add'>+			netcp-gbe = &lt;&amp;gbe1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/k2l.dtsi b/arch/arm/boot/dts/k2l.dtsi<br/>index e32c3baa77b8..0e007483615e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/k2l.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/k2l.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/k2l.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/k2l.dtsi</a></div><div class='hunk'>@@ -79,6 +79,7 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio,syscon-dev = &lt;&amp;devctrl 0x24c&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		/include/ "k2l-netcp.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi<br/>index c06542b2c954..e7a6f6deabb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/keystone.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/keystone.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/keystone.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/keystone.dtsi</a></div><div class='hunk'>@@ -286,7 +286,7 @@</div><div class='ctx'> 			ti,syscon-dev = &lt;&amp;devctrl 0x2a0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie@21800000 {</div><div class='add'>+		pcie0: pcie@21800000 {</div><div class='ctx'> 			compatible = "ti,keystone-pcie", "snps,dw-pcie";</div><div class='ctx'> 			clocks = &lt;&amp;clkpcie&gt;;</div><div class='ctx'> 			clock-names = "pcie";</div><div class='hunk'>@@ -296,6 +296,7 @@</div><div class='ctx'> 			ranges = &lt;0x81000000 0 0 0x23250000 0 0x4000</div><div class='ctx'> 				0x82000000 0 0x50000000 0x50000000 0 0x10000000&gt;;</div><div class='ctx'> </div><div class='add'>+			status = "disabled";</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-b3.dts b/arch/arm/boot/dts/kirkwood-b3.dts<br/>index c9247f8672ae..d2936ad3af1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-b3.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-b3.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-b3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-b3.dts</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 			m25p16@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,m25p16";</div><div class='add'>+				compatible = "st,m25p16", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;40000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-cloudbox.dts b/arch/arm/boot/dts/kirkwood-cloudbox.dts<br/>index ab6ab4933e6b..7ec76566acf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-cloudbox.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-cloudbox.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-cloudbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-cloudbox.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 			flash@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l4005a";</div><div class='add'>+				compatible = "mxicy,mx25l4005a", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-dir665.dts b/arch/arm/boot/dts/kirkwood-dir665.dts<br/>index 786959ee9cbe..0473fcc260f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dir665.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-dir665.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dir665.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-dir665.dts</a></div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 			m25p80@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l12805d";</div><div class='add'>+				compatible = "mxicy,mx25l12805d", "jedec,spi-nor";</div><div class='ctx'> 				spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts<br/>index 6467c7924195..e2abc8246bf3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dreamplug.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-dreamplug.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dreamplug.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-dreamplug.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 			m25p40@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l1606e";</div><div class='add'>+				compatible = "mxicy,mx25l1606e", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi<br/>index 53484474df1f..1d6528d82969 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-lsxl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-lsxl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-lsxl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-lsxl.dtsi</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 			m25p40@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "m25p40";</div><div class='add'>+				compatible = "m25p40", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts<br/>index f82827d6fcff..b7e7d78c484e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts</a></div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 			flash@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l12805d";</div><div class='add'>+				compatible = "mxicy,mx25l12805d", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-netxbig.dtsi b/arch/arm/boot/dts/kirkwood-netxbig.dtsi<br/>index b0cfb7cd30b9..1508b12147df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-netxbig.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-netxbig.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-netxbig.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-netxbig.dtsi</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 			flash@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l4005a";</div><div class='add'>+				compatible = "mxicy,mx25l4005a", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi<br/>index fe6c0246db1a..e832b6320264 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-ns2-common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-ns2-common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-ns2-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-ns2-common.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 			flash@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "mxicy,mx25l4005a";</div><div class='add'>+				compatible = "mxicy,mx25l4005a", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-rd88f6192.dts b/arch/arm/boot/dts/kirkwood-rd88f6192.dts<br/>index 35a29dee8dd8..e0b959396ca2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-rd88f6192.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-rd88f6192.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-rd88f6192.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-rd88f6192.dts</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 			m25p128@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,m25p128";</div><div class='add'>+				compatible = "st,m25p128", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-synology.dtsi b/arch/arm/boot/dts/kirkwood-synology.dtsi<br/>index 8be5b2e4626e..04015c174b99 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-synology.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-synology.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-synology.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-synology.dtsi</a></div><div class='hunk'>@@ -217,7 +217,7 @@</div><div class='ctx'> 			m25p80@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,m25p80";</div><div class='add'>+				compatible = "st,m25p80", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-t5325.dts b/arch/arm/boot/dts/kirkwood-t5325.dts<br/>index 610ec0f95858..ed956b849a71 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-t5325.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-t5325.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-t5325.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-t5325.dts</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 			flash@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,m25p80";</div><div class='add'>+				compatible = "st,m25p80", "jedec,spi-nor";</div><div class='ctx'> 				spi-max-frequency = &lt;86000000&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-ts219.dtsi b/arch/arm/boot/dts/kirkwood-ts219.dtsi<br/>index df7f15276575..c56ab6bbfe3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-ts219.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kirkwood-ts219.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-ts219.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/kirkwood-ts219.dtsi</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> 			m25p128@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "m25p128";</div><div class='add'>+				compatible = "m25p128", "jedec,spi-nor";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 				mode = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts<br/>deleted file mode 100644<br/>index e83e4f9310b8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kizbox.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/kizbox.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,150 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * kizbox.dts - Device Tree file for Overkiz Kizbox board</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2012 Boris BREZILLON &lt;linux-arm@overkiz.com&gt;</div><div class='del'>- *</div><div class='del'>- * Licensed under GPLv2.</div><div class='del'>- */</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "at91sam9g20.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-</div><div class='del'>-	model = "Overkiz kizbox";</div><div class='del'>-	compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "panic=5 ubi.mtd=1 rootfstype=ubifs root=ubi0:root";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory {</div><div class='del'>-		reg = &lt;0x20000000 0x2000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		main_clock: clock@0 {</div><div class='del'>-			compatible = "atmel,osc", "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;18432000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_xtal {</div><div class='del'>-			clock-frequency = &lt;18432000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ahb {</div><div class='del'>-		apb {</div><div class='del'>-			dbgu: serial@fffff200 {</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart0: serial@fffb0000 {</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart1: serial@fffb4000 {</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			macb0: ethernet@fffc4000 {</div><div class='del'>-				phy-mode = "mii";</div><div class='del'>-				pinctrl-0 = &lt;&amp;pinctrl_macb_rmii</div><div class='del'>-				             &amp;pinctrl_macb_rmii_mii_alt&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			watchdog@fffffd40 {</div><div class='del'>-				timeout-sec = &lt;15&gt;;</div><div class='del'>-				atmel,max-heartbeat-sec = &lt;16&gt;;</div><div class='del'>-				atmel,min-heartbeat-sec = &lt;0&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		nand0: nand@40000000 {</div><div class='del'>-			nand-bus-width = &lt;8&gt;;</div><div class='del'>-			nand-ecc-mode = "soft";</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			bootloaderkernel@0 {</div><div class='del'>-				label = "bootloader-kernel";</div><div class='del'>-				reg = &lt;0x0 0xc0000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ubi@c0000 {</div><div class='del'>-				label = "ubi";</div><div class='del'>-				reg = &lt;0xc0000 0x7f40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb0: ohci@00500000 {</div><div class='del'>-			num-ports = &lt;1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@0 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		pcf8563@51 {</div><div class='del'>-			/* nxp pcf8563 rtc */</div><div class='del'>-			compatible = "nxp,pcf8563";</div><div class='del'>-			reg = &lt;0x51&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		led1g {</div><div class='del'>-			label = "led1:green";</div><div class='del'>-			gpios = &lt;&amp;pioB 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "none";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led1r {</div><div class='del'>-			label = "led1:red";</div><div class='del'>-			gpios = &lt;&amp;pioB 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "none";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led2g {</div><div class='del'>-			label = "led2:green";</div><div class='del'>-			gpios = &lt;&amp;pioB 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "none";</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led2r {</div><div class='del'>-			label = "led2:red";</div><div class='del'>-			gpios = &lt;&amp;pioB 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "none";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio_keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		reset {</div><div class='del'>-			label = "reset";</div><div class='del'>-			gpios = &lt;&amp;pioB 30 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;0x100&gt;;</div><div class='del'>-			gpio-key,wakeup;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mode {</div><div class='del'>-			label = "mode";</div><div class='del'>-			gpios = &lt;&amp;pioB 31 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;0x101&gt;;</div><div class='del'>-			gpio-key,wakeup;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts<br/>new file mode 100644<br/>index 000000000000..91146c318798<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts</a></div><div class='hunk'>@@ -0,0 +1,157 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "omap36xx.dtsi"</div><div class='add'>+#include "logicpd-torpedo-som.dtsi"</div><div class='add'>+#include "omap-gpmc-smsc9221.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "LogicPD Zoom DM3730 Torpedo Development Kit";</div><div class='add'>+	compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap36xx";</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_key_pins &amp;gpio_key_pins_wkup&gt;;</div><div class='add'>+</div><div class='add'>+		sysboot2 {</div><div class='add'>+			label = "sysboot2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_LOW&gt;;	/* gpio2 */</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sysboot5 {</div><div class='add'>+			label = "sysboot5";</div><div class='add'>+			gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;	/* gpio7 */</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1 {</div><div class='add'>+			label = "gpio1";</div><div class='add'>+			gpios = &lt;&amp;gpio6 21 GPIO_ACTIVE_LOW&gt;;	/* gpio181 */</div><div class='add'>+			linux,code = &lt;BTN_2&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2 {</div><div class='add'>+			label = "gpio2";</div><div class='add'>+			gpios = &lt;&amp;gpio6 18 GPIO_ACTIVE_LOW&gt;;	/* gpio178 */</div><div class='add'>+			linux,code = &lt;BTN_3&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpio6 20 GPIO_ACTIVE_HIGH&gt;;	/* gpio180 */</div><div class='add'>+			linux,default-trigger = "cpu0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2 {</div><div class='add'>+			label = "led2";</div><div class='add'>+			gpios = &lt;&amp;gpio6 19 GPIO_ACTIVE_HIGH&gt;;	/* gpio179 */</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;charger {</div><div class='add'>+	ti,bb-uvolt = &lt;3200000&gt;;</div><div class='add'>+	ti,bb-uamp = &lt;150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmc {</div><div class='add'>+	ranges = &lt;1 0 0x08000000 0x1000000&gt;;	/* CS1: 16MB for LAN9221 */</div><div class='add'>+</div><div class='add'>+	ethernet@gpmc {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan9221_pins&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;		/* gpio129 */</div><div class='add'>+		reg = &lt;1 0 0xff&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	interrupts-extended = &lt;&amp;intc 83 &amp;omap3_pmx_core 0x11a&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins &amp;mmc1_cd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio4 31 IRQ_TYPE_LEVEL_LOW&gt;;		/* gpio127 */</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;omap3_pmx_core {</div><div class='add'>+	gpio_key_pins: pinmux_gpio_key_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_clk.gpio_178 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_cs0.gpio_181 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins: pinmux_led_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4)	/* gpio_179 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4)	/* gpio_180 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_pins: pinmux_mmc1_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;omap3_pmx_wkup {</div><div class='add'>+	gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot0.gpio_2 */</div><div class='add'>+			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot5.gpio_7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lan9221_pins: pinmux_lan9221_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)		/* reserved.gpio_129 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_cd: pinmux_mmc1_cd {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4)	/* reserved.gpio_127 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	interrupts-extended = &lt;&amp;intc 72 &amp;omap3_pmx_core OMAP3_UART1_RX&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */</div><div class='add'>+&amp;usb_otg_hs {</div><div class='add'>+	interface-type = &lt;0&gt;;</div><div class='add'>+	usb-phy = &lt;&amp;usb2_phy&gt;;</div><div class='add'>+	phys = &lt;&amp;usb2_phy&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+	mode = &lt;3&gt;;</div><div class='add'>+	power = &lt;50&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi<br/>new file mode 100644<br/>index 000000000000..36387b11451d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/logicpd-torpedo-som.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/logicpd-torpedo-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			cpu0-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		user0 {</div><div class='add'>+			label = "user0";</div><div class='add'>+			gpios = &lt;&amp;twl_gpio 18 GPIO_ACTIVE_LOW&gt;;	/* LEDA */</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl12xx_vmmc: wl12xx_vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vwl1271";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 29 0&gt;;   /* gpio157 */</div><div class='add'>+		startup-delay-us = &lt;70000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vmmc2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmc {</div><div class='add'>+	ranges = &lt;0 0 0x00000000 0x1000000&gt;;	/* CS0: 16MB for NAND */</div><div class='add'>+</div><div class='add'>+	nand@0,0 {</div><div class='add'>+		linux,mtd-name = "micron,mt29f4g16abbda3w";</div><div class='add'>+		reg = &lt;0 0 4&gt;; /* CS0, offset 0, IO size 4 */</div><div class='add'>+		nand-bus-width = &lt;16&gt;;</div><div class='add'>+		ti,nand-ecc-opt = "bch8";</div><div class='add'>+		gpmc,sync-clk-ps = &lt;0&gt;;</div><div class='add'>+		gpmc,cs-on-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,cs-rd-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,cs-wr-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,adv-on-ns = &lt;6&gt;;</div><div class='add'>+		gpmc,adv-rd-off-ns = &lt;34&gt;;</div><div class='add'>+		gpmc,adv-wr-off-ns = &lt;44&gt;;</div><div class='add'>+		gpmc,we-off-ns = &lt;40&gt;;</div><div class='add'>+		gpmc,oe-off-ns = &lt;54&gt;;</div><div class='add'>+		gpmc,access-ns = &lt;64&gt;;</div><div class='add'>+		gpmc,rd-cycle-ns = &lt;82&gt;;</div><div class='add'>+		gpmc,wr-cycle-ns = &lt;82&gt;;</div><div class='add'>+		gpmc,wr-access-ns = &lt;40&gt;;</div><div class='add'>+		gpmc,wr-data-mux-bus-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,device-width = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */</div><div class='add'>+</div><div class='add'>+		x-loader@0 {</div><div class='add'>+			label = "x-loader";</div><div class='add'>+			reg = &lt;0 0x80000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bootloaders@80000 {</div><div class='add'>+			label = "u-boot";</div><div class='add'>+			reg = &lt;0x80000 0x1e0000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bootloaders_env@260000 {</div><div class='add'>+			label = "u-boot-env";</div><div class='add'>+			reg = &lt;0x260000 0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		kernel@280000 {</div><div class='add'>+			label = "kernel";</div><div class='add'>+			reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		filesystem@680000 {</div><div class='add'>+			label = "fs";</div><div class='add'>+			reg = &lt;0x680000 0&gt;;	/* 0 = MTDPART_SIZ_FULL */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;2600000&gt;;</div><div class='add'>+</div><div class='add'>+	twl: twl@48 {</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupts = &lt;7&gt;; /* SYS_NIRQ cascaded to intc */</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Only found on the wireless SOM. For the SOM without wireless, the pins for</div><div class='add'>+ * MMC3 can be routed with jumpers to the second MMC slot on the devkit and</div><div class='add'>+ * gpio157 is not connected. So this should be OK to keep common for now,</div><div class='add'>+ * probably device tree overlays is the way to go with the various SOM and</div><div class='add'>+ * jumpering combinations for the long run.</div><div class='add'>+ */</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	interrupts-extended = &lt;&amp;intc 94 &amp;omap3_pmx_core2 0x46&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins &amp;mmc3_core2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;wl12xx_vmmc&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	wlcore: wlcore@2 {</div><div class='add'>+		compatible = "ti,wl1283";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;; /* gpio 152 */</div><div class='add'>+		ref-clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;omap3_pmx_core {</div><div class='add'>+	mmc3_pins: pinmux_mm3_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat4.sdmmc3_dat0 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat5.sdmmc3_dat1 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat2 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat3 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)	/* mcbsp1_fsr.gpio_157 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;omap3_pmx_core2 {</div><div class='add'>+	mmc3_core2_pins: pinmux_mmc3_core2_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_clk.sdmmc3_clk */</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_ctl.sdmmc3_cmd */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "twl4030.dtsi"</div><div class='add'>+#include "twl4030_omap3.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;twl {</div><div class='add'>+	twl_power: power {</div><div class='add'>+		compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";</div><div class='add'>+		ti,use_poweroff;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;twl_gpio {</div><div class='add'>+	ti,use-leds;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi<br/>new file mode 100644<br/>index 000000000000..204da5b52ef9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc18xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc18xx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+/*</div><div class='add'>+ * Common base for NXP LPC18xx and LPC43xx devices.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This code is released using a dual license strategy: BSD/GPL</div><div class='add'>+ * You can choose the licence that better fits your requirements.</div><div class='add'>+ *</div><div class='add'>+ * Released under the terms of 3-clause BSD License</div><div class='add'>+ * Released under the terms of GNU General Public License Version 2.0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "armv7-m.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-m3";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		xtal: xtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Temporary hardcode PLL1 until clk drivers are merged */</div><div class='add'>+		pll1: pll1 {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-div = &lt;1&gt;;</div><div class='add'>+			clock-mult = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		uart0: serial@40081000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x40081000 0x1000&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;24&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@40082000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x40082000 0x1000&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;25&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer0: timer@40084000 {</div><div class='add'>+			compatible = "nxp,lpc3220-timer";</div><div class='add'>+			reg = &lt;0x40084000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;12&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			clock-names = "timerclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer1: timer@40085000 {</div><div class='add'>+			compatible = "nxp,lpc3220-timer";</div><div class='add'>+			reg = &lt;0x40085000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;13&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			clock-names = "timerclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@400c1000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x400c1000 0x1000&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;26&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@400c2000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x400c2000 0x1000&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;27&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer2: timer@400c3000 {</div><div class='add'>+			compatible = "nxp,lpc3220-timer";</div><div class='add'>+			reg = &lt;0x400c3000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;14&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			clock-names = "timerclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer3: timer@400c4000 {</div><div class='add'>+			compatible = "nxp,lpc3220-timer";</div><div class='add'>+			reg = &lt;0x400c4000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;15&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll1&gt;;</div><div class='add'>+			clock-names = "timerclk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/lpc4350-hitex-eval.dts<br/>new file mode 100644<br/>index 000000000000..d04072f40817<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc4350-hitex-eval.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4350-hitex-eval.dts</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/*</div><div class='add'>+ * Hitex LPC4350 Evaluation Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Ariel D'Alessandro &lt;ariel.dalessandro@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This code is released using a dual license strategy: BSD/GPL</div><div class='add'>+ * You can choose the licence that better fits your requirements.</div><div class='add'>+ *</div><div class='add'>+ * Released under the terms of 3-clause BSD License</div><div class='add'>+ * Released under the terms of GNU General Public License Version 2.0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "lpc18xx.dtsi"</div><div class='add'>+#include "lpc4350.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Hitex LPC4350 Evaluation Board";</div><div class='add'>+	compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x28000000 0x800000&gt;; /* 8 MB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pll1 {</div><div class='add'>+	clock-mult = &lt;15&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc4350.dtsi b/arch/arm/boot/dts/lpc4350.dtsi<br/>new file mode 100644<br/>index 000000000000..c4422f587055<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc4350.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4350.dtsi</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/*</div><div class='add'>+ * NXP LPC4350 and LPC4330 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Ariel D'Alessandro &lt;ariel.dalessandro@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This code is released using a dual license strategy: BSD/GPL</div><div class='add'>+ * You can choose the licence that better fits your requirements.</div><div class='add'>+ *</div><div class='add'>+ * Released under the terms of 3-clause BSD License</div><div class='add'>+ * Released under the terms of GNU General Public License Version 2.0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nxp,lpc4350", "nxp,lpc4330";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-m4";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		sram0: sram@10000000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x10000000 0x20000&gt;; /* 96 + 32 KiB local SRAM */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram1: sram@10080000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x10080000 0x12000&gt;; /* 64 + 8 KiB local SRAM */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram2: sram@20000000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x20000000 0x10000&gt;; /* 4 x 16 KiB AHB SRAM */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts<br/>new file mode 100644<br/>index 000000000000..08a6f757f924<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4357-ea4357-devkit.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/*</div><div class='add'>+ * Embedded Artist LPC4357 Developer's Kit</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This code is released using a dual license strategy: BSD/GPL</div><div class='add'>+ * You can choose the licence that better fits your requirements.</div><div class='add'>+ *</div><div class='add'>+ * Released under the terms of 3-clause BSD License</div><div class='add'>+ * Released under the terms of GNU General Public License Version 2.0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "lpc18xx.dtsi"</div><div class='add'>+#include "lpc4357.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Embedded Artists' LPC4357 Developer's Kit";</div><div class='add'>+	compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x28000000 0x2000000&gt;; /* 32 MB */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc4357.dtsi b/arch/arm/boot/dts/lpc4357.dtsi<br/>new file mode 100644<br/>index 000000000000..fb9ecc754e8d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc4357.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/lpc4357.dtsi</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/*</div><div class='add'>+ * NXP LPC435x, LPC433x, LPC4327, LPC4325, LPC4317 and LPC4315 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This code is released using a dual license strategy: BSD/GPL</div><div class='add'>+ * You can choose the licence that better fits your requirements.</div><div class='add'>+ *</div><div class='add'>+ * Released under the terms of 3-clause BSD License</div><div class='add'>+ * Released under the terms of GNU General Public License Version 2.0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nxp,lpc4357";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-m4";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		sram0: sram@10000000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x10000000 0x8000&gt;; /* 32 KiB local SRAM */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram1: sram@10080000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x10080000 0xa000&gt;; /* 32 + 8 KiB local SRAM */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram2: sram@20000000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x20000000 0x10000&gt;; /* 4 x 16 KiB AHB SRAM */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi<br/>index aaa786233d93..ca3402e8240b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/mt8127.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/mt8127.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/mt8127.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8127.dtsi</a></div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 			      &lt;0 0x10216000 0 0x2000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@11006000 {</div><div class='add'>+		uart0: serial@11002000 {</div><div class='ctx'> 			compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11002000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart1: serial@11007000 {</div><div class='add'>+		uart1: serial@11003000 {</div><div class='ctx'> 			compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11003000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart2: serial@11008000 {</div><div class='add'>+		uart2: serial@11004000 {</div><div class='ctx'> 			compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11004000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart3: serial@11009000 {</div><div class='add'>+		uart3: serial@11005000 {</div><div class='ctx'> 			compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11005000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/mt8135-pinfunc.h b/arch/arm/boot/dts/mt8135-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..5a609875cb18<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/mt8135-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8135-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,1302 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014 MediaTek Inc.</div><div class='add'>+ * Author: Hongzhou.Yang &lt;hongzhou.yang@mediatek.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_MT8135_PINFUNC_H</div><div class='add'>+#define __DTS_MT8135_PINFUNC_H</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/mt65xx.h&gt;</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_MSDC0_DAT7 (MTK_PIN_NO(0) | 1)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_EINT49 (MTK_PIN_NO(0) | 2)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_I2SOUT_DAT (MTK_PIN_NO(0) | 3)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_DAC_DAT_OUT (MTK_PIN_NO(0) | 4)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_PCM1_DO (MTK_PIN_NO(0) | 5)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_SPI1_MO (MTK_PIN_NO(0) | 6)</div><div class='add'>+#define MT8135_PIN_0_MSDC0_DAT7__FUNC_NALE (MTK_PIN_NO(0) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_MSDC0_DAT6 (MTK_PIN_NO(1) | 1)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_EINT48 (MTK_PIN_NO(1) | 2)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_I2SIN_WS (MTK_PIN_NO(1) | 3)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_DAC_WS (MTK_PIN_NO(1) | 4)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_PCM1_WS (MTK_PIN_NO(1) | 5)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_SPI1_CSN (MTK_PIN_NO(1) | 6)</div><div class='add'>+#define MT8135_PIN_1_MSDC0_DAT6__FUNC_NCLE (MTK_PIN_NO(1) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_GPIO2 (MTK_PIN_NO(2) | 0)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_MSDC0_DAT5 (MTK_PIN_NO(2) | 1)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_EINT47 (MTK_PIN_NO(2) | 2)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_I2SIN_CK (MTK_PIN_NO(2) | 3)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_DAC_CK (MTK_PIN_NO(2) | 4)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_PCM1_CK (MTK_PIN_NO(2) | 5)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_SPI1_CLK (MTK_PIN_NO(2) | 6)</div><div class='add'>+#define MT8135_PIN_2_MSDC0_DAT5__FUNC_NLD4 (MTK_PIN_NO(2) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_GPIO3 (MTK_PIN_NO(3) | 0)</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_MSDC0_DAT4 (MTK_PIN_NO(3) | 1)</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_EINT46 (MTK_PIN_NO(3) | 2)</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_A_FUNC_CK (MTK_PIN_NO(3) | 3)</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_LSCE1B_2X (MTK_PIN_NO(3) | 6)</div><div class='add'>+#define MT8135_PIN_3_MSDC0_DAT4__FUNC_NLD5 (MTK_PIN_NO(3) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_GPIO4 (MTK_PIN_NO(4) | 0)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_MSDC0_CMD (MTK_PIN_NO(4) | 1)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_EINT41 (MTK_PIN_NO(4) | 2)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_A_FUNC_DOUT_0 (MTK_PIN_NO(4) | 3)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_USB_TEST_IO_0 (MTK_PIN_NO(4) | 5)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_LRSTB_2X (MTK_PIN_NO(4) | 6)</div><div class='add'>+#define MT8135_PIN_4_MSDC0_CMD__FUNC_NRNB (MTK_PIN_NO(4) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_GPIO5 (MTK_PIN_NO(5) | 0)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_MSDC0_CLK (MTK_PIN_NO(5) | 1)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_EINT40 (MTK_PIN_NO(5) | 2)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_A_FUNC_DOUT_1 (MTK_PIN_NO(5) | 3)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_USB_TEST_IO_1 (MTK_PIN_NO(5) | 5)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_LPTE (MTK_PIN_NO(5) | 6)</div><div class='add'>+#define MT8135_PIN_5_MSDC0_CLK__FUNC_NREB (MTK_PIN_NO(5) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_GPIO6 (MTK_PIN_NO(6) | 0)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_MSDC0_DAT3 (MTK_PIN_NO(6) | 1)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_EINT45 (MTK_PIN_NO(6) | 2)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_A_FUNC_DOUT_2 (MTK_PIN_NO(6) | 3)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_USB_TEST_IO_2 (MTK_PIN_NO(6) | 5)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_LSCE0B_2X (MTK_PIN_NO(6) | 6)</div><div class='add'>+#define MT8135_PIN_6_MSDC0_DAT3__FUNC_NLD7 (MTK_PIN_NO(6) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_GPIO7 (MTK_PIN_NO(7) | 0)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_MSDC0_DAT2 (MTK_PIN_NO(7) | 1)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_EINT44 (MTK_PIN_NO(7) | 2)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_A_FUNC_DOUT_3 (MTK_PIN_NO(7) | 3)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_USB_TEST_IO_3 (MTK_PIN_NO(7) | 5)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_LSA0_2X (MTK_PIN_NO(7) | 6)</div><div class='add'>+#define MT8135_PIN_7_MSDC0_DAT2__FUNC_NLD14 (MTK_PIN_NO(7) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_GPIO8 (MTK_PIN_NO(8) | 0)</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_MSDC0_DAT1 (MTK_PIN_NO(8) | 1)</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_EINT43 (MTK_PIN_NO(8) | 2)</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_USB_TEST_IO_4 (MTK_PIN_NO(8) | 5)</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_LSCK_2X (MTK_PIN_NO(8) | 6)</div><div class='add'>+#define MT8135_PIN_8_MSDC0_DAT1__FUNC_NLD11 (MTK_PIN_NO(8) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_9_MSDC0_DAT0__FUNC_GPIO9 (MTK_PIN_NO(9) | 0)</div><div class='add'>+#define MT8135_PIN_9_MSDC0_DAT0__FUNC_MSDC0_DAT0 (MTK_PIN_NO(9) | 1)</div><div class='add'>+#define MT8135_PIN_9_MSDC0_DAT0__FUNC_EINT42 (MTK_PIN_NO(9) | 2)</div><div class='add'>+#define MT8135_PIN_9_MSDC0_DAT0__FUNC_USB_TEST_IO_5 (MTK_PIN_NO(9) | 5)</div><div class='add'>+#define MT8135_PIN_9_MSDC0_DAT0__FUNC_LSDA_2X (MTK_PIN_NO(9) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_10_NCEB0__FUNC_GPIO10 (MTK_PIN_NO(10) | 0)</div><div class='add'>+#define MT8135_PIN_10_NCEB0__FUNC_NCEB0 (MTK_PIN_NO(10) | 1)</div><div class='add'>+#define MT8135_PIN_10_NCEB0__FUNC_EINT139 (MTK_PIN_NO(10) | 2)</div><div class='add'>+#define MT8135_PIN_10_NCEB0__FUNC_TESTA_OUT4 (MTK_PIN_NO(10) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_11_NCEB1__FUNC_GPIO11 (MTK_PIN_NO(11) | 0)</div><div class='add'>+#define MT8135_PIN_11_NCEB1__FUNC_NCEB1 (MTK_PIN_NO(11) | 1)</div><div class='add'>+#define MT8135_PIN_11_NCEB1__FUNC_EINT140 (MTK_PIN_NO(11) | 2)</div><div class='add'>+#define MT8135_PIN_11_NCEB1__FUNC_USB_DRVVBUS (MTK_PIN_NO(11) | 6)</div><div class='add'>+#define MT8135_PIN_11_NCEB1__FUNC_TESTA_OUT5 (MTK_PIN_NO(11) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_12_NRNB__FUNC_GPIO12 (MTK_PIN_NO(12) | 0)</div><div class='add'>+#define MT8135_PIN_12_NRNB__FUNC_NRNB (MTK_PIN_NO(12) | 1)</div><div class='add'>+#define MT8135_PIN_12_NRNB__FUNC_EINT141 (MTK_PIN_NO(12) | 2)</div><div class='add'>+#define MT8135_PIN_12_NRNB__FUNC_A_FUNC_DOUT_4 (MTK_PIN_NO(12) | 3)</div><div class='add'>+#define MT8135_PIN_12_NRNB__FUNC_TESTA_OUT6 (MTK_PIN_NO(12) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_GPIO13 (MTK_PIN_NO(13) | 0)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_NCLE (MTK_PIN_NO(13) | 1)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_EINT142 (MTK_PIN_NO(13) | 2)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_A_FUNC_DOUT_5 (MTK_PIN_NO(13) | 3)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_CM2PDN_1X (MTK_PIN_NO(13) | 4)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_NALE (MTK_PIN_NO(13) | 6)</div><div class='add'>+#define MT8135_PIN_13_NCLE__FUNC_TESTA_OUT7 (MTK_PIN_NO(13) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_GPIO14 (MTK_PIN_NO(14) | 0)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_NALE (MTK_PIN_NO(14) | 1)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_EINT143 (MTK_PIN_NO(14) | 2)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_A_FUNC_DOUT_6 (MTK_PIN_NO(14) | 3)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_CM2MCLK_1X (MTK_PIN_NO(14) | 4)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_IRDA_RXD (MTK_PIN_NO(14) | 5)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_NCLE (MTK_PIN_NO(14) | 6)</div><div class='add'>+#define MT8135_PIN_14_NALE__FUNC_TESTA_OUT8 (MTK_PIN_NO(14) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_GPIO15 (MTK_PIN_NO(15) | 0)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_NREB (MTK_PIN_NO(15) | 1)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_EINT144 (MTK_PIN_NO(15) | 2)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_A_FUNC_DOUT_7 (MTK_PIN_NO(15) | 3)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_CM2RST_1X (MTK_PIN_NO(15) | 4)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_IRDA_TXD (MTK_PIN_NO(15) | 5)</div><div class='add'>+#define MT8135_PIN_15_NREB__FUNC_TESTA_OUT9 (MTK_PIN_NO(15) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_GPIO16 (MTK_PIN_NO(16) | 0)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_NWEB (MTK_PIN_NO(16) | 1)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_EINT145 (MTK_PIN_NO(16) | 2)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_A_FUNC_DIN_0 (MTK_PIN_NO(16) | 3)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_CM2PCLK_1X (MTK_PIN_NO(16) | 4)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_IRDA_PDN (MTK_PIN_NO(16) | 5)</div><div class='add'>+#define MT8135_PIN_16_NWEB__FUNC_TESTA_OUT10 (MTK_PIN_NO(16) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_GPIO17 (MTK_PIN_NO(17) | 0)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_NLD0 (MTK_PIN_NO(17) | 1)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_EINT146 (MTK_PIN_NO(17) | 2)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_A_FUNC_DIN_1 (MTK_PIN_NO(17) | 3)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_CM2DAT_1X_0 (MTK_PIN_NO(17) | 4)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_I2SIN_CK (MTK_PIN_NO(17) | 5)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_DAC_CK (MTK_PIN_NO(17) | 6)</div><div class='add'>+#define MT8135_PIN_17_NLD0__FUNC_TESTA_OUT11 (MTK_PIN_NO(17) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_GPIO18 (MTK_PIN_NO(18) | 0)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_NLD1 (MTK_PIN_NO(18) | 1)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_EINT147 (MTK_PIN_NO(18) | 2)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_A_FUNC_DIN_2 (MTK_PIN_NO(18) | 3)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_CM2DAT_1X_1 (MTK_PIN_NO(18) | 4)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_I2SIN_WS (MTK_PIN_NO(18) | 5)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_DAC_WS (MTK_PIN_NO(18) | 6)</div><div class='add'>+#define MT8135_PIN_18_NLD1__FUNC_TESTA_OUT12 (MTK_PIN_NO(18) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_GPIO19 (MTK_PIN_NO(19) | 0)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_NLD2 (MTK_PIN_NO(19) | 1)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_EINT148 (MTK_PIN_NO(19) | 2)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_A_FUNC_DIN_3 (MTK_PIN_NO(19) | 3)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_CM2DAT_1X_2 (MTK_PIN_NO(19) | 4)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_I2SOUT_DAT (MTK_PIN_NO(19) | 5)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_DAC_DAT_OUT (MTK_PIN_NO(19) | 6)</div><div class='add'>+#define MT8135_PIN_19_NLD2__FUNC_TESTA_OUT13 (MTK_PIN_NO(19) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_GPIO20 (MTK_PIN_NO(20) | 0)</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_NLD3 (MTK_PIN_NO(20) | 1)</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_EINT149 (MTK_PIN_NO(20) | 2)</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_A_FUNC_DIN_4 (MTK_PIN_NO(20) | 3)</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_CM2DAT_1X_3 (MTK_PIN_NO(20) | 4)</div><div class='add'>+#define MT8135_PIN_20_NLD3__FUNC_TESTA_OUT14 (MTK_PIN_NO(20) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_GPIO21 (MTK_PIN_NO(21) | 0)</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_NLD4 (MTK_PIN_NO(21) | 1)</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_EINT150 (MTK_PIN_NO(21) | 2)</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_A_FUNC_DIN_5 (MTK_PIN_NO(21) | 3)</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_CM2DAT_1X_4 (MTK_PIN_NO(21) | 4)</div><div class='add'>+#define MT8135_PIN_21_NLD4__FUNC_TESTA_OUT15 (MTK_PIN_NO(21) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_GPIO22 (MTK_PIN_NO(22) | 0)</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_NLD5 (MTK_PIN_NO(22) | 1)</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_EINT151 (MTK_PIN_NO(22) | 2)</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_A_FUNC_DIN_6 (MTK_PIN_NO(22) | 3)</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_CM2DAT_1X_5 (MTK_PIN_NO(22) | 4)</div><div class='add'>+#define MT8135_PIN_22_NLD5__FUNC_TESTA_OUT16 (MTK_PIN_NO(22) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_GPIO23 (MTK_PIN_NO(23) | 0)</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_NLD6 (MTK_PIN_NO(23) | 1)</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_EINT152 (MTK_PIN_NO(23) | 2)</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_A_FUNC_DIN_7 (MTK_PIN_NO(23) | 3)</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_CM2DAT_1X_6 (MTK_PIN_NO(23) | 4)</div><div class='add'>+#define MT8135_PIN_23_NLD6__FUNC_TESTA_OUT17 (MTK_PIN_NO(23) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_GPIO24 (MTK_PIN_NO(24) | 0)</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_NLD7 (MTK_PIN_NO(24) | 1)</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_EINT153 (MTK_PIN_NO(24) | 2)</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_A_FUNC_DIN_8 (MTK_PIN_NO(24) | 3)</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_CM2DAT_1X_7 (MTK_PIN_NO(24) | 4)</div><div class='add'>+#define MT8135_PIN_24_NLD7__FUNC_TESTA_OUT18 (MTK_PIN_NO(24) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_25_NLD8__FUNC_GPIO25 (MTK_PIN_NO(25) | 0)</div><div class='add'>+#define MT8135_PIN_25_NLD8__FUNC_NLD8 (MTK_PIN_NO(25) | 1)</div><div class='add'>+#define MT8135_PIN_25_NLD8__FUNC_EINT154 (MTK_PIN_NO(25) | 2)</div><div class='add'>+#define MT8135_PIN_25_NLD8__FUNC_CM2DAT_1X_8 (MTK_PIN_NO(25) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_26_NLD9__FUNC_GPIO26 (MTK_PIN_NO(26) | 0)</div><div class='add'>+#define MT8135_PIN_26_NLD9__FUNC_NLD9 (MTK_PIN_NO(26) | 1)</div><div class='add'>+#define MT8135_PIN_26_NLD9__FUNC_EINT155 (MTK_PIN_NO(26) | 2)</div><div class='add'>+#define MT8135_PIN_26_NLD9__FUNC_CM2DAT_1X_9 (MTK_PIN_NO(26) | 4)</div><div class='add'>+#define MT8135_PIN_26_NLD9__FUNC_PWM1 (MTK_PIN_NO(26) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_27_NLD10__FUNC_GPIO27 (MTK_PIN_NO(27) | 0)</div><div class='add'>+#define MT8135_PIN_27_NLD10__FUNC_NLD10 (MTK_PIN_NO(27) | 1)</div><div class='add'>+#define MT8135_PIN_27_NLD10__FUNC_EINT156 (MTK_PIN_NO(27) | 2)</div><div class='add'>+#define MT8135_PIN_27_NLD10__FUNC_CM2VSYNC_1X (MTK_PIN_NO(27) | 4)</div><div class='add'>+#define MT8135_PIN_27_NLD10__FUNC_PWM2 (MTK_PIN_NO(27) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_28_NLD11__FUNC_GPIO28 (MTK_PIN_NO(28) | 0)</div><div class='add'>+#define MT8135_PIN_28_NLD11__FUNC_NLD11 (MTK_PIN_NO(28) | 1)</div><div class='add'>+#define MT8135_PIN_28_NLD11__FUNC_EINT157 (MTK_PIN_NO(28) | 2)</div><div class='add'>+#define MT8135_PIN_28_NLD11__FUNC_CM2HSYNC_1X (MTK_PIN_NO(28) | 4)</div><div class='add'>+#define MT8135_PIN_28_NLD11__FUNC_PWM3 (MTK_PIN_NO(28) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_GPIO29 (MTK_PIN_NO(29) | 0)</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_NLD12 (MTK_PIN_NO(29) | 1)</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_EINT158 (MTK_PIN_NO(29) | 2)</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_I2SIN_CK (MTK_PIN_NO(29) | 3)</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_DAC_CK (MTK_PIN_NO(29) | 4)</div><div class='add'>+#define MT8135_PIN_29_NLD12__FUNC_PCM1_CK (MTK_PIN_NO(29) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_GPIO30 (MTK_PIN_NO(30) | 0)</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_NLD13 (MTK_PIN_NO(30) | 1)</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_EINT159 (MTK_PIN_NO(30) | 2)</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_I2SIN_WS (MTK_PIN_NO(30) | 3)</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_DAC_WS (MTK_PIN_NO(30) | 4)</div><div class='add'>+#define MT8135_PIN_30_NLD13__FUNC_PCM1_WS (MTK_PIN_NO(30) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_GPIO31 (MTK_PIN_NO(31) | 0)</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_NLD14 (MTK_PIN_NO(31) | 1)</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_EINT160 (MTK_PIN_NO(31) | 2)</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_I2SOUT_DAT (MTK_PIN_NO(31) | 3)</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_DAC_DAT_OUT (MTK_PIN_NO(31) | 4)</div><div class='add'>+#define MT8135_PIN_31_NLD14__FUNC_PCM1_DO (MTK_PIN_NO(31) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_GPIO32 (MTK_PIN_NO(32) | 0)</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_NLD15 (MTK_PIN_NO(32) | 1)</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_EINT161 (MTK_PIN_NO(32) | 2)</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_DISP_PWM (MTK_PIN_NO(32) | 3)</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_PWM4 (MTK_PIN_NO(32) | 4)</div><div class='add'>+#define MT8135_PIN_32_NLD15__FUNC_PCM1_DI (MTK_PIN_NO(32) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_GPIO33 (MTK_PIN_NO(33) | 0)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_MSDC0_RSTB (MTK_PIN_NO(33) | 1)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_EINT50 (MTK_PIN_NO(33) | 2)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_I2SIN_DAT (MTK_PIN_NO(33) | 3)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_PCM1_DI (MTK_PIN_NO(33) | 5)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_SPI1_MI (MTK_PIN_NO(33) | 6)</div><div class='add'>+#define MT8135_PIN_33_MSDC0_RSTB__FUNC_NLD10 (MTK_PIN_NO(33) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_34_IDDIG__FUNC_GPIO34 (MTK_PIN_NO(34) | 0)</div><div class='add'>+#define MT8135_PIN_34_IDDIG__FUNC_IDDIG (MTK_PIN_NO(34) | 1)</div><div class='add'>+#define MT8135_PIN_34_IDDIG__FUNC_EINT34 (MTK_PIN_NO(34) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_35_SCL3__FUNC_GPIO35 (MTK_PIN_NO(35) | 0)</div><div class='add'>+#define MT8135_PIN_35_SCL3__FUNC_SCL3 (MTK_PIN_NO(35) | 1)</div><div class='add'>+#define MT8135_PIN_35_SCL3__FUNC_EINT96 (MTK_PIN_NO(35) | 2)</div><div class='add'>+#define MT8135_PIN_35_SCL3__FUNC_CLKM6 (MTK_PIN_NO(35) | 3)</div><div class='add'>+#define MT8135_PIN_35_SCL3__FUNC_PWM6 (MTK_PIN_NO(35) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_36_SDA3__FUNC_GPIO36 (MTK_PIN_NO(36) | 0)</div><div class='add'>+#define MT8135_PIN_36_SDA3__FUNC_SDA3 (MTK_PIN_NO(36) | 1)</div><div class='add'>+#define MT8135_PIN_36_SDA3__FUNC_EINT97 (MTK_PIN_NO(36) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_GPIO37 (MTK_PIN_NO(37) | 0)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_AUD_CLK (MTK_PIN_NO(37) | 1)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_ADC_CK (MTK_PIN_NO(37) | 2)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_HDMI_SDATA0 (MTK_PIN_NO(37) | 3)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_EINT19 (MTK_PIN_NO(37) | 4)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_USB_TEST_IO_6 (MTK_PIN_NO(37) | 5)</div><div class='add'>+#define MT8135_PIN_37_AUD_CLK_MOSI__FUNC_TESTA_OUT19 (MTK_PIN_NO(37) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_GPIO38 (MTK_PIN_NO(38) | 0)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_AUD_DAT_MOSI (MTK_PIN_NO(38) | 1)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_ADC_WS (MTK_PIN_NO(38) | 2)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_AUD_DAT_MISO (MTK_PIN_NO(38) | 3)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_EINT21 (MTK_PIN_NO(38) | 4)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_USB_TEST_IO_7 (MTK_PIN_NO(38) | 5)</div><div class='add'>+#define MT8135_PIN_38_AUD_DAT_MOSI__FUNC_TESTA_OUT20 (MTK_PIN_NO(38) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_GPIO39 (MTK_PIN_NO(39) | 0)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_AUD_DAT_MISO (MTK_PIN_NO(39) | 1)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_ADC_DAT_IN (MTK_PIN_NO(39) | 2)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_AUD_DAT_MOSI (MTK_PIN_NO(39) | 3)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_EINT20 (MTK_PIN_NO(39) | 4)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_USB_TEST_IO_8 (MTK_PIN_NO(39) | 5)</div><div class='add'>+#define MT8135_PIN_39_AUD_DAT_MISO__FUNC_TESTA_OUT21 (MTK_PIN_NO(39) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_GPIO40 (MTK_PIN_NO(40) | 0)</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_DAC_CK (MTK_PIN_NO(40) | 1)</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_EINT22 (MTK_PIN_NO(40) | 2)</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_HDMI_SDATA1 (MTK_PIN_NO(40) | 3)</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_USB_TEST_IO_9 (MTK_PIN_NO(40) | 5)</div><div class='add'>+#define MT8135_PIN_40_DAC_CLK__FUNC_TESTA_OUT22 (MTK_PIN_NO(40) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_GPIO41 (MTK_PIN_NO(41) | 0)</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_DAC_WS (MTK_PIN_NO(41) | 1)</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_EINT24 (MTK_PIN_NO(41) | 2)</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_HDMI_SDATA2 (MTK_PIN_NO(41) | 3)</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_USB_TEST_IO_10 (MTK_PIN_NO(41) | 5)</div><div class='add'>+#define MT8135_PIN_41_DAC_WS__FUNC_TESTA_OUT23 (MTK_PIN_NO(41) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_GPIO42 (MTK_PIN_NO(42) | 0)</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_DAC_DAT_OUT (MTK_PIN_NO(42) | 1)</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_EINT23 (MTK_PIN_NO(42) | 2)</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_HDMI_SDATA3 (MTK_PIN_NO(42) | 3)</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_USB_TEST_IO_11 (MTK_PIN_NO(42) | 5)</div><div class='add'>+#define MT8135_PIN_42_DAC_DAT_OUT__FUNC_TESTA_OUT24 (MTK_PIN_NO(42) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_43_PWRAP_SPI0_MO__FUNC_GPIO43 (MTK_PIN_NO(43) | 0)</div><div class='add'>+#define MT8135_PIN_43_PWRAP_SPI0_MO__FUNC_PWRAP_SPIDI (MTK_PIN_NO(43) | 1)</div><div class='add'>+#define MT8135_PIN_43_PWRAP_SPI0_MO__FUNC_EINT29 (MTK_PIN_NO(43) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_44_PWRAP_SPI0_MI__FUNC_GPIO44 (MTK_PIN_NO(44) | 0)</div><div class='add'>+#define MT8135_PIN_44_PWRAP_SPI0_MI__FUNC_PWRAP_SPIDO (MTK_PIN_NO(44) | 1)</div><div class='add'>+#define MT8135_PIN_44_PWRAP_SPI0_MI__FUNC_EINT28 (MTK_PIN_NO(44) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_45_PWRAP_SPI0_CSN__FUNC_GPIO45 (MTK_PIN_NO(45) | 0)</div><div class='add'>+#define MT8135_PIN_45_PWRAP_SPI0_CSN__FUNC_PWRAP_SPICS_B_I (MTK_PIN_NO(45) | 1)</div><div class='add'>+#define MT8135_PIN_45_PWRAP_SPI0_CSN__FUNC_EINT27 (MTK_PIN_NO(45) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_46_PWRAP_SPI0_CLK__FUNC_GPIO46 (MTK_PIN_NO(46) | 0)</div><div class='add'>+#define MT8135_PIN_46_PWRAP_SPI0_CLK__FUNC_PWRAP_SPICK_I (MTK_PIN_NO(46) | 1)</div><div class='add'>+#define MT8135_PIN_46_PWRAP_SPI0_CLK__FUNC_EINT26 (MTK_PIN_NO(46) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_47_PWRAP_EVENT__FUNC_GPIO47 (MTK_PIN_NO(47) | 0)</div><div class='add'>+#define MT8135_PIN_47_PWRAP_EVENT__FUNC_PWRAP_EVENT_IN (MTK_PIN_NO(47) | 1)</div><div class='add'>+#define MT8135_PIN_47_PWRAP_EVENT__FUNC_EINT25 (MTK_PIN_NO(47) | 2)</div><div class='add'>+#define MT8135_PIN_47_PWRAP_EVENT__FUNC_TESTA_OUT2 (MTK_PIN_NO(47) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_48_RTC32K_CK__FUNC_GPIO48 (MTK_PIN_NO(48) | 0)</div><div class='add'>+#define MT8135_PIN_48_RTC32K_CK__FUNC_RTC32K_CK (MTK_PIN_NO(48) | 1)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_49_WATCHDOG__FUNC_GPIO49 (MTK_PIN_NO(49) | 0)</div><div class='add'>+#define MT8135_PIN_49_WATCHDOG__FUNC_WATCHDOG (MTK_PIN_NO(49) | 1)</div><div class='add'>+#define MT8135_PIN_49_WATCHDOG__FUNC_EINT36 (MTK_PIN_NO(49) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_50_SRCLKENA__FUNC_GPIO50 (MTK_PIN_NO(50) | 0)</div><div class='add'>+#define MT8135_PIN_50_SRCLKENA__FUNC_SRCLKENA (MTK_PIN_NO(50) | 1)</div><div class='add'>+#define MT8135_PIN_50_SRCLKENA__FUNC_EINT38 (MTK_PIN_NO(50) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_51_SRCVOLTEN__FUNC_GPIO51 (MTK_PIN_NO(51) | 0)</div><div class='add'>+#define MT8135_PIN_51_SRCVOLTEN__FUNC_SRCVOLTEN (MTK_PIN_NO(51) | 1)</div><div class='add'>+#define MT8135_PIN_51_SRCVOLTEN__FUNC_EINT37 (MTK_PIN_NO(51) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_GPIO52 (MTK_PIN_NO(52) | 0)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_EINT0 (MTK_PIN_NO(52) | 1)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_PWM1 (MTK_PIN_NO(52) | 2)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_CLKM0 (MTK_PIN_NO(52) | 3)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_SPDIF_OUT (MTK_PIN_NO(52) | 4)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_USB_TEST_IO_12 (MTK_PIN_NO(52) | 5)</div><div class='add'>+#define MT8135_PIN_52_EINT0__FUNC_USB_SCL (MTK_PIN_NO(52) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_GPIO53 (MTK_PIN_NO(53) | 0)</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_URXD2 (MTK_PIN_NO(53) | 1)</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_EINT83 (MTK_PIN_NO(53) | 2)</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_HDMI_LRCK (MTK_PIN_NO(53) | 4)</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_CLKM3 (MTK_PIN_NO(53) | 5)</div><div class='add'>+#define MT8135_PIN_53_URXD2__FUNC_UTXD2 (MTK_PIN_NO(53) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_GPIO54 (MTK_PIN_NO(54) | 0)</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_UTXD2 (MTK_PIN_NO(54) | 1)</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_EINT82 (MTK_PIN_NO(54) | 2)</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_HDMI_BCK_OUT (MTK_PIN_NO(54) | 4)</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_CLKM2 (MTK_PIN_NO(54) | 5)</div><div class='add'>+#define MT8135_PIN_54_UTXD2__FUNC_URXD2 (MTK_PIN_NO(54) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_55_UCTS2__FUNC_GPIO55 (MTK_PIN_NO(55) | 0)</div><div class='add'>+#define MT8135_PIN_55_UCTS2__FUNC_UCTS2 (MTK_PIN_NO(55) | 1)</div><div class='add'>+#define MT8135_PIN_55_UCTS2__FUNC_EINT84 (MTK_PIN_NO(55) | 2)</div><div class='add'>+#define MT8135_PIN_55_UCTS2__FUNC_PWM1 (MTK_PIN_NO(55) | 5)</div><div class='add'>+#define MT8135_PIN_55_UCTS2__FUNC_URTS2 (MTK_PIN_NO(55) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_56_URTS2__FUNC_GPIO56 (MTK_PIN_NO(56) | 0)</div><div class='add'>+#define MT8135_PIN_56_URTS2__FUNC_URTS2 (MTK_PIN_NO(56) | 1)</div><div class='add'>+#define MT8135_PIN_56_URTS2__FUNC_EINT85 (MTK_PIN_NO(56) | 2)</div><div class='add'>+#define MT8135_PIN_56_URTS2__FUNC_PWM2 (MTK_PIN_NO(56) | 5)</div><div class='add'>+#define MT8135_PIN_56_URTS2__FUNC_UCTS2 (MTK_PIN_NO(56) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_57_JTCK__FUNC_GPIO57 (MTK_PIN_NO(57) | 0)</div><div class='add'>+#define MT8135_PIN_57_JTCK__FUNC_JTCK (MTK_PIN_NO(57) | 1)</div><div class='add'>+#define MT8135_PIN_57_JTCK__FUNC_EINT188 (MTK_PIN_NO(57) | 2)</div><div class='add'>+#define MT8135_PIN_57_JTCK__FUNC_DSP1_ICK (MTK_PIN_NO(57) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_58_JTDO__FUNC_GPIO58 (MTK_PIN_NO(58) | 0)</div><div class='add'>+#define MT8135_PIN_58_JTDO__FUNC_JTDO (MTK_PIN_NO(58) | 1)</div><div class='add'>+#define MT8135_PIN_58_JTDO__FUNC_EINT190 (MTK_PIN_NO(58) | 2)</div><div class='add'>+#define MT8135_PIN_58_JTDO__FUNC_DSP2_IMS (MTK_PIN_NO(58) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_59_JTRST_B__FUNC_GPIO59 (MTK_PIN_NO(59) | 0)</div><div class='add'>+#define MT8135_PIN_59_JTRST_B__FUNC_JTRST_B (MTK_PIN_NO(59) | 1)</div><div class='add'>+#define MT8135_PIN_59_JTRST_B__FUNC_EINT0 (MTK_PIN_NO(59) | 2)</div><div class='add'>+#define MT8135_PIN_59_JTRST_B__FUNC_DSP2_ICK (MTK_PIN_NO(59) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_60_JTDI__FUNC_GPIO60 (MTK_PIN_NO(60) | 0)</div><div class='add'>+#define MT8135_PIN_60_JTDI__FUNC_JTDI (MTK_PIN_NO(60) | 1)</div><div class='add'>+#define MT8135_PIN_60_JTDI__FUNC_EINT189 (MTK_PIN_NO(60) | 2)</div><div class='add'>+#define MT8135_PIN_60_JTDI__FUNC_DSP1_IMS (MTK_PIN_NO(60) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_61_JRTCK__FUNC_GPIO61 (MTK_PIN_NO(61) | 0)</div><div class='add'>+#define MT8135_PIN_61_JRTCK__FUNC_JRTCK (MTK_PIN_NO(61) | 1)</div><div class='add'>+#define MT8135_PIN_61_JRTCK__FUNC_EINT187 (MTK_PIN_NO(61) | 2)</div><div class='add'>+#define MT8135_PIN_61_JRTCK__FUNC_DSP1_ID (MTK_PIN_NO(61) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_62_JTMS__FUNC_GPIO62 (MTK_PIN_NO(62) | 0)</div><div class='add'>+#define MT8135_PIN_62_JTMS__FUNC_JTMS (MTK_PIN_NO(62) | 1)</div><div class='add'>+#define MT8135_PIN_62_JTMS__FUNC_EINT191 (MTK_PIN_NO(62) | 2)</div><div class='add'>+#define MT8135_PIN_62_JTMS__FUNC_DSP2_ID (MTK_PIN_NO(62) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_GPIO63 (MTK_PIN_NO(63) | 0)</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_MSDC1_INSI (MTK_PIN_NO(63) | 1)</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_SCL5 (MTK_PIN_NO(63) | 3)</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_PWM6 (MTK_PIN_NO(63) | 4)</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_CLKM5 (MTK_PIN_NO(63) | 5)</div><div class='add'>+#define MT8135_PIN_63_MSDC1_INSI__FUNC_TESTB_OUT6 (MTK_PIN_NO(63) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_GPIO64 (MTK_PIN_NO(64) | 0)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_MSDC1_SDWPI (MTK_PIN_NO(64) | 1)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_EINT58 (MTK_PIN_NO(64) | 2)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_SDA5 (MTK_PIN_NO(64) | 3)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_PWM7 (MTK_PIN_NO(64) | 4)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_CLKM6 (MTK_PIN_NO(64) | 5)</div><div class='add'>+#define MT8135_PIN_64_MSDC1_SDWPI__FUNC_TESTB_OUT7 (MTK_PIN_NO(64) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_65_MSDC2_INSI__FUNC_GPIO65 (MTK_PIN_NO(65) | 0)</div><div class='add'>+#define MT8135_PIN_65_MSDC2_INSI__FUNC_MSDC2_INSI (MTK_PIN_NO(65) | 1)</div><div class='add'>+#define MT8135_PIN_65_MSDC2_INSI__FUNC_USB_TEST_IO_27 (MTK_PIN_NO(65) | 5)</div><div class='add'>+#define MT8135_PIN_65_MSDC2_INSI__FUNC_TESTA_OUT3 (MTK_PIN_NO(65) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_66_MSDC2_SDWPI__FUNC_GPIO66 (MTK_PIN_NO(66) | 0)</div><div class='add'>+#define MT8135_PIN_66_MSDC2_SDWPI__FUNC_MSDC2_SDWPI (MTK_PIN_NO(66) | 1)</div><div class='add'>+#define MT8135_PIN_66_MSDC2_SDWPI__FUNC_EINT66 (MTK_PIN_NO(66) | 2)</div><div class='add'>+#define MT8135_PIN_66_MSDC2_SDWPI__FUNC_USB_TEST_IO_28 (MTK_PIN_NO(66) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_GPIO67 (MTK_PIN_NO(67) | 0)</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_URXD4 (MTK_PIN_NO(67) | 1)</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_EINT89 (MTK_PIN_NO(67) | 2)</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_URXD1 (MTK_PIN_NO(67) | 3)</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_UTXD4 (MTK_PIN_NO(67) | 6)</div><div class='add'>+#define MT8135_PIN_67_URXD4__FUNC_TESTB_OUT10 (MTK_PIN_NO(67) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_GPIO68 (MTK_PIN_NO(68) | 0)</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_UTXD4 (MTK_PIN_NO(68) | 1)</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_EINT88 (MTK_PIN_NO(68) | 2)</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_UTXD1 (MTK_PIN_NO(68) | 3)</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_URXD4 (MTK_PIN_NO(68) | 6)</div><div class='add'>+#define MT8135_PIN_68_UTXD4__FUNC_TESTB_OUT11 (MTK_PIN_NO(68) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_GPIO69 (MTK_PIN_NO(69) | 0)</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_URXD1 (MTK_PIN_NO(69) | 1)</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_EINT79 (MTK_PIN_NO(69) | 2)</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_URXD4 (MTK_PIN_NO(69) | 3)</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_UTXD1 (MTK_PIN_NO(69) | 6)</div><div class='add'>+#define MT8135_PIN_69_URXD1__FUNC_TESTB_OUT24 (MTK_PIN_NO(69) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_GPIO70 (MTK_PIN_NO(70) | 0)</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_UTXD1 (MTK_PIN_NO(70) | 1)</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_EINT78 (MTK_PIN_NO(70) | 2)</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_UTXD4 (MTK_PIN_NO(70) | 3)</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_URXD1 (MTK_PIN_NO(70) | 6)</div><div class='add'>+#define MT8135_PIN_70_UTXD1__FUNC_TESTB_OUT25 (MTK_PIN_NO(70) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_GPIO71 (MTK_PIN_NO(71) | 0)</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_UCTS1 (MTK_PIN_NO(71) | 1)</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_EINT80 (MTK_PIN_NO(71) | 2)</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_CLKM0 (MTK_PIN_NO(71) | 5)</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_URTS1 (MTK_PIN_NO(71) | 6)</div><div class='add'>+#define MT8135_PIN_71_UCTS1__FUNC_TESTB_OUT31 (MTK_PIN_NO(71) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_GPIO72 (MTK_PIN_NO(72) | 0)</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_URTS1 (MTK_PIN_NO(72) | 1)</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_EINT81 (MTK_PIN_NO(72) | 2)</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_CLKM1 (MTK_PIN_NO(72) | 5)</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_UCTS1 (MTK_PIN_NO(72) | 6)</div><div class='add'>+#define MT8135_PIN_72_URTS1__FUNC_TESTB_OUT21 (MTK_PIN_NO(72) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_GPIO73 (MTK_PIN_NO(73) | 0)</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_PWM1 (MTK_PIN_NO(73) | 1)</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_EINT73 (MTK_PIN_NO(73) | 2)</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_USB_DRVVBUS (MTK_PIN_NO(73) | 5)</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_DISP_PWM (MTK_PIN_NO(73) | 6)</div><div class='add'>+#define MT8135_PIN_73_PWM1__FUNC_TESTB_OUT8 (MTK_PIN_NO(73) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_GPIO74 (MTK_PIN_NO(74) | 0)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_PWM2 (MTK_PIN_NO(74) | 1)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_EINT74 (MTK_PIN_NO(74) | 2)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_DPI33_CK (MTK_PIN_NO(74) | 3)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_PWM5 (MTK_PIN_NO(74) | 4)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_URXD2 (MTK_PIN_NO(74) | 5)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_DISP_PWM (MTK_PIN_NO(74) | 6)</div><div class='add'>+#define MT8135_PIN_74_PWM2__FUNC_TESTB_OUT9 (MTK_PIN_NO(74) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_GPIO75 (MTK_PIN_NO(75) | 0)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_PWM3 (MTK_PIN_NO(75) | 1)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_EINT75 (MTK_PIN_NO(75) | 2)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_DPI33_D0 (MTK_PIN_NO(75) | 3)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_PWM6 (MTK_PIN_NO(75) | 4)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_UTXD2 (MTK_PIN_NO(75) | 5)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_DISP_PWM (MTK_PIN_NO(75) | 6)</div><div class='add'>+#define MT8135_PIN_75_PWM3__FUNC_TESTB_OUT12 (MTK_PIN_NO(75) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_GPIO76 (MTK_PIN_NO(76) | 0)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_PWM4 (MTK_PIN_NO(76) | 1)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_EINT76 (MTK_PIN_NO(76) | 2)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_DPI33_D1 (MTK_PIN_NO(76) | 3)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_PWM7 (MTK_PIN_NO(76) | 4)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_DISP_PWM (MTK_PIN_NO(76) | 6)</div><div class='add'>+#define MT8135_PIN_76_PWM4__FUNC_TESTB_OUT13 (MTK_PIN_NO(76) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_GPIO77 (MTK_PIN_NO(77) | 0)</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_MSDC2_DAT2 (MTK_PIN_NO(77) | 1)</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_EINT63 (MTK_PIN_NO(77) | 2)</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_DSP2_IMS (MTK_PIN_NO(77) | 4)</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_DPI33_D6 (MTK_PIN_NO(77) | 6)</div><div class='add'>+#define MT8135_PIN_77_MSDC2_DAT2__FUNC_TESTA_OUT25 (MTK_PIN_NO(77) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_GPIO78 (MTK_PIN_NO(78) | 0)</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_MSDC2_DAT3 (MTK_PIN_NO(78) | 1)</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_EINT64 (MTK_PIN_NO(78) | 2)</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_DSP2_ID (MTK_PIN_NO(78) | 4)</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_DPI33_D7 (MTK_PIN_NO(78) | 6)</div><div class='add'>+#define MT8135_PIN_78_MSDC2_DAT3__FUNC_TESTA_OUT26 (MTK_PIN_NO(78) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_GPIO79 (MTK_PIN_NO(79) | 0)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_MSDC2_CMD (MTK_PIN_NO(79) | 1)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_EINT60 (MTK_PIN_NO(79) | 2)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_DSP1_IMS (MTK_PIN_NO(79) | 4)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_PCM1_WS (MTK_PIN_NO(79) | 5)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_DPI33_D3 (MTK_PIN_NO(79) | 6)</div><div class='add'>+#define MT8135_PIN_79_MSDC2_CMD__FUNC_TESTA_OUT0 (MTK_PIN_NO(79) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_GPIO80 (MTK_PIN_NO(80) | 0)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_MSDC2_CLK (MTK_PIN_NO(80) | 1)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_EINT59 (MTK_PIN_NO(80) | 2)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_DSP1_ICK (MTK_PIN_NO(80) | 4)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_PCM1_CK (MTK_PIN_NO(80) | 5)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_DPI33_D2 (MTK_PIN_NO(80) | 6)</div><div class='add'>+#define MT8135_PIN_80_MSDC2_CLK__FUNC_TESTA_OUT1 (MTK_PIN_NO(80) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_GPIO81 (MTK_PIN_NO(81) | 0)</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_MSDC2_DAT1 (MTK_PIN_NO(81) | 1)</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_EINT62 (MTK_PIN_NO(81) | 2)</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_DSP2_ICK (MTK_PIN_NO(81) | 4)</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_PCM1_DO (MTK_PIN_NO(81) | 5)</div><div class='add'>+#define MT8135_PIN_81_MSDC2_DAT1__FUNC_DPI33_D5 (MTK_PIN_NO(81) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_GPIO82 (MTK_PIN_NO(82) | 0)</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_MSDC2_DAT0 (MTK_PIN_NO(82) | 1)</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_EINT61 (MTK_PIN_NO(82) | 2)</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_DSP1_ID (MTK_PIN_NO(82) | 4)</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_PCM1_DI (MTK_PIN_NO(82) | 5)</div><div class='add'>+#define MT8135_PIN_82_MSDC2_DAT0__FUNC_DPI33_D4 (MTK_PIN_NO(82) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_GPIO83 (MTK_PIN_NO(83) | 0)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_MSDC1_DAT0 (MTK_PIN_NO(83) | 1)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_EINT53 (MTK_PIN_NO(83) | 2)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_SCL1 (MTK_PIN_NO(83) | 3)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_PWM2 (MTK_PIN_NO(83) | 4)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_CLKM1 (MTK_PIN_NO(83) | 5)</div><div class='add'>+#define MT8135_PIN_83_MSDC1_DAT0__FUNC_TESTB_OUT2 (MTK_PIN_NO(83) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_GPIO84 (MTK_PIN_NO(84) | 0)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_MSDC1_DAT1 (MTK_PIN_NO(84) | 1)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_EINT54 (MTK_PIN_NO(84) | 2)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_SDA1 (MTK_PIN_NO(84) | 3)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_PWM3 (MTK_PIN_NO(84) | 4)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_CLKM2 (MTK_PIN_NO(84) | 5)</div><div class='add'>+#define MT8135_PIN_84_MSDC1_DAT1__FUNC_TESTB_OUT3 (MTK_PIN_NO(84) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_GPIO85 (MTK_PIN_NO(85) | 0)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_MSDC1_CMD (MTK_PIN_NO(85) | 1)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_EINT52 (MTK_PIN_NO(85) | 2)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_SDA0 (MTK_PIN_NO(85) | 3)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_PWM1 (MTK_PIN_NO(85) | 4)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_CLKM0 (MTK_PIN_NO(85) | 5)</div><div class='add'>+#define MT8135_PIN_85_MSDC1_CMD__FUNC_TESTB_OUT1 (MTK_PIN_NO(85) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_GPIO86 (MTK_PIN_NO(86) | 0)</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_MSDC1_CLK (MTK_PIN_NO(86) | 1)</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_EINT51 (MTK_PIN_NO(86) | 2)</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_SCL0 (MTK_PIN_NO(86) | 3)</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_DISP_PWM (MTK_PIN_NO(86) | 4)</div><div class='add'>+#define MT8135_PIN_86_MSDC1_CLK__FUNC_TESTB_OUT0 (MTK_PIN_NO(86) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_GPIO87 (MTK_PIN_NO(87) | 0)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_MSDC1_DAT2 (MTK_PIN_NO(87) | 1)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_EINT55 (MTK_PIN_NO(87) | 2)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_SCL4 (MTK_PIN_NO(87) | 3)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_PWM4 (MTK_PIN_NO(87) | 4)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_CLKM3 (MTK_PIN_NO(87) | 5)</div><div class='add'>+#define MT8135_PIN_87_MSDC1_DAT2__FUNC_TESTB_OUT4 (MTK_PIN_NO(87) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_GPIO88 (MTK_PIN_NO(88) | 0)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_MSDC1_DAT3 (MTK_PIN_NO(88) | 1)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_EINT56 (MTK_PIN_NO(88) | 2)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_SDA4 (MTK_PIN_NO(88) | 3)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_PWM5 (MTK_PIN_NO(88) | 4)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_CLKM4 (MTK_PIN_NO(88) | 5)</div><div class='add'>+#define MT8135_PIN_88_MSDC1_DAT3__FUNC_TESTB_OUT5 (MTK_PIN_NO(88) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_GPIO89 (MTK_PIN_NO(89) | 0)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_MSDC4_DAT0 (MTK_PIN_NO(89) | 1)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_EINT133 (MTK_PIN_NO(89) | 2)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(89) | 4)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_USB_DRVVBUS (MTK_PIN_NO(89) | 5)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_A_FUNC_DIN_9 (MTK_PIN_NO(89) | 6)</div><div class='add'>+#define MT8135_PIN_89_MSDC4_DAT0__FUNC_LPTE (MTK_PIN_NO(89) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_90_MSDC4_DAT1__FUNC_GPIO90 (MTK_PIN_NO(90) | 0)</div><div class='add'>+#define MT8135_PIN_90_MSDC4_DAT1__FUNC_MSDC4_DAT1 (MTK_PIN_NO(90) | 1)</div><div class='add'>+#define MT8135_PIN_90_MSDC4_DAT1__FUNC_EINT134 (MTK_PIN_NO(90) | 2)</div><div class='add'>+#define MT8135_PIN_90_MSDC4_DAT1__FUNC_A_FUNC_DIN_10 (MTK_PIN_NO(90) | 6)</div><div class='add'>+#define MT8135_PIN_90_MSDC4_DAT1__FUNC_LRSTB_1X (MTK_PIN_NO(90) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_GPIO91 (MTK_PIN_NO(91) | 0)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_MSDC4_DAT5 (MTK_PIN_NO(91) | 1)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_EINT136 (MTK_PIN_NO(91) | 2)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_I2SIN_WS (MTK_PIN_NO(91) | 3)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_DAC_WS (MTK_PIN_NO(91) | 4)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_PCM1_WS (MTK_PIN_NO(91) | 5)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_A_FUNC_DIN_11 (MTK_PIN_NO(91) | 6)</div><div class='add'>+#define MT8135_PIN_91_MSDC4_DAT5__FUNC_SPI1_CSN (MTK_PIN_NO(91) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_GPIO92 (MTK_PIN_NO(92) | 0)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_MSDC4_DAT6 (MTK_PIN_NO(92) | 1)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_EINT137 (MTK_PIN_NO(92) | 2)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_I2SOUT_DAT (MTK_PIN_NO(92) | 3)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_DAC_DAT_OUT (MTK_PIN_NO(92) | 4)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_PCM1_DO (MTK_PIN_NO(92) | 5)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_A_FUNC_DIN_12 (MTK_PIN_NO(92) | 6)</div><div class='add'>+#define MT8135_PIN_92_MSDC4_DAT6__FUNC_SPI1_MO (MTK_PIN_NO(92) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_GPIO93 (MTK_PIN_NO(93) | 0)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_MSDC4_DAT7 (MTK_PIN_NO(93) | 1)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_EINT138 (MTK_PIN_NO(93) | 2)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_I2SIN_DAT (MTK_PIN_NO(93) | 3)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_PCM1_DI (MTK_PIN_NO(93) | 5)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_A_FUNC_DIN_13 (MTK_PIN_NO(93) | 6)</div><div class='add'>+#define MT8135_PIN_93_MSDC4_DAT7__FUNC_SPI1_MI (MTK_PIN_NO(93) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_GPIO94 (MTK_PIN_NO(94) | 0)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_MSDC4_DAT4 (MTK_PIN_NO(94) | 1)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_EINT135 (MTK_PIN_NO(94) | 2)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_I2SIN_CK (MTK_PIN_NO(94) | 3)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_DAC_CK (MTK_PIN_NO(94) | 4)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_PCM1_CK (MTK_PIN_NO(94) | 5)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_A_FUNC_DIN_14 (MTK_PIN_NO(94) | 6)</div><div class='add'>+#define MT8135_PIN_94_MSDC4_DAT4__FUNC_SPI1_CLK (MTK_PIN_NO(94) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_GPIO95 (MTK_PIN_NO(95) | 0)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_MSDC4_DAT2 (MTK_PIN_NO(95) | 1)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_EINT131 (MTK_PIN_NO(95) | 2)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_I2SIN_WS (MTK_PIN_NO(95) | 3)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_CM2PDN_2X (MTK_PIN_NO(95) | 4)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_DAC_WS (MTK_PIN_NO(95) | 5)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_PCM1_WS (MTK_PIN_NO(95) | 6)</div><div class='add'>+#define MT8135_PIN_95_MSDC4_DAT2__FUNC_LSCE0B_1X (MTK_PIN_NO(95) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_GPIO96 (MTK_PIN_NO(96) | 0)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_MSDC4_CLK (MTK_PIN_NO(96) | 1)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_EINT129 (MTK_PIN_NO(96) | 2)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_DPI1_CK_2X (MTK_PIN_NO(96) | 3)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_CM2PCLK_2X (MTK_PIN_NO(96) | 4)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_PWM4 (MTK_PIN_NO(96) | 5)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_PCM1_DI (MTK_PIN_NO(96) | 6)</div><div class='add'>+#define MT8135_PIN_96_MSDC4_CLK__FUNC_LSCK_1X (MTK_PIN_NO(96) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_GPIO97 (MTK_PIN_NO(97) | 0)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_MSDC4_DAT3 (MTK_PIN_NO(97) | 1)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_EINT132 (MTK_PIN_NO(97) | 2)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_I2SOUT_DAT (MTK_PIN_NO(97) | 3)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_CM2RST_2X (MTK_PIN_NO(97) | 4)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_DAC_DAT_OUT (MTK_PIN_NO(97) | 5)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_PCM1_DO (MTK_PIN_NO(97) | 6)</div><div class='add'>+#define MT8135_PIN_97_MSDC4_DAT3__FUNC_LSCE1B_1X (MTK_PIN_NO(97) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_GPIO98 (MTK_PIN_NO(98) | 0)</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_MSDC4_CMD (MTK_PIN_NO(98) | 1)</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_EINT128 (MTK_PIN_NO(98) | 2)</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_DPI1_DE_2X (MTK_PIN_NO(98) | 3)</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_PWM3 (MTK_PIN_NO(98) | 5)</div><div class='add'>+#define MT8135_PIN_98_MSDC4_CMD__FUNC_LSDA_1X (MTK_PIN_NO(98) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_GPIO99 (MTK_PIN_NO(99) | 0)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_MSDC4_RSTB (MTK_PIN_NO(99) | 1)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_EINT130 (MTK_PIN_NO(99) | 2)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_I2SIN_CK (MTK_PIN_NO(99) | 3)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_CM2MCLK_2X (MTK_PIN_NO(99) | 4)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_DAC_CK (MTK_PIN_NO(99) | 5)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_PCM1_CK (MTK_PIN_NO(99) | 6)</div><div class='add'>+#define MT8135_PIN_99_MSDC4_RSTB__FUNC_LSA0_1X (MTK_PIN_NO(99) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_GPIO100 (MTK_PIN_NO(100) | 0)</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_SDA0 (MTK_PIN_NO(100) | 1)</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_EINT91 (MTK_PIN_NO(100) | 2)</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_CLKM1 (MTK_PIN_NO(100) | 3)</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_PWM1 (MTK_PIN_NO(100) | 4)</div><div class='add'>+#define MT8135_PIN_100_SDA0__FUNC_A_FUNC_DIN_15 (MTK_PIN_NO(100) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_GPIO101 (MTK_PIN_NO(101) | 0)</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_SCL0 (MTK_PIN_NO(101) | 1)</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_EINT90 (MTK_PIN_NO(101) | 2)</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_CLKM0 (MTK_PIN_NO(101) | 3)</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_DISP_PWM (MTK_PIN_NO(101) | 4)</div><div class='add'>+#define MT8135_PIN_101_SCL0__FUNC_A_FUNC_DIN_16 (MTK_PIN_NO(101) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_102_EINT10_AUXIN2__FUNC_GPIO102 (MTK_PIN_NO(102) | 0)</div><div class='add'>+#define MT8135_PIN_102_EINT10_AUXIN2__FUNC_EINT10 (MTK_PIN_NO(102) | 1)</div><div class='add'>+#define MT8135_PIN_102_EINT10_AUXIN2__FUNC_USB_TEST_IO_16 (MTK_PIN_NO(102) | 5)</div><div class='add'>+#define MT8135_PIN_102_EINT10_AUXIN2__FUNC_TESTB_OUT16 (MTK_PIN_NO(102) | 6)</div><div class='add'>+#define MT8135_PIN_102_EINT10_AUXIN2__FUNC_A_FUNC_DIN_17 (MTK_PIN_NO(102) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_103_EINT11_AUXIN3__FUNC_GPIO103 (MTK_PIN_NO(103) | 0)</div><div class='add'>+#define MT8135_PIN_103_EINT11_AUXIN3__FUNC_EINT11 (MTK_PIN_NO(103) | 1)</div><div class='add'>+#define MT8135_PIN_103_EINT11_AUXIN3__FUNC_USB_TEST_IO_17 (MTK_PIN_NO(103) | 5)</div><div class='add'>+#define MT8135_PIN_103_EINT11_AUXIN3__FUNC_TESTB_OUT17 (MTK_PIN_NO(103) | 6)</div><div class='add'>+#define MT8135_PIN_103_EINT11_AUXIN3__FUNC_A_FUNC_DIN_18 (MTK_PIN_NO(103) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_104_EINT16_AUXIN4__FUNC_GPIO104 (MTK_PIN_NO(104) | 0)</div><div class='add'>+#define MT8135_PIN_104_EINT16_AUXIN4__FUNC_EINT16 (MTK_PIN_NO(104) | 1)</div><div class='add'>+#define MT8135_PIN_104_EINT16_AUXIN4__FUNC_USB_TEST_IO_18 (MTK_PIN_NO(104) | 5)</div><div class='add'>+#define MT8135_PIN_104_EINT16_AUXIN4__FUNC_TESTB_OUT18 (MTK_PIN_NO(104) | 6)</div><div class='add'>+#define MT8135_PIN_104_EINT16_AUXIN4__FUNC_A_FUNC_DIN_19 (MTK_PIN_NO(104) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_GPIO105 (MTK_PIN_NO(105) | 0)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_I2SIN_CK (MTK_PIN_NO(105) | 1)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_EINT10 (MTK_PIN_NO(105) | 2)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_DAC_CK (MTK_PIN_NO(105) | 3)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_PCM1_CK (MTK_PIN_NO(105) | 4)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_USB_TEST_IO_19 (MTK_PIN_NO(105) | 5)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_TESTB_OUT19 (MTK_PIN_NO(105) | 6)</div><div class='add'>+#define MT8135_PIN_105_I2S_CLK__FUNC_A_FUNC_DIN_20 (MTK_PIN_NO(105) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_GPIO106 (MTK_PIN_NO(106) | 0)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_I2SIN_WS (MTK_PIN_NO(106) | 1)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_EINT13 (MTK_PIN_NO(106) | 2)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_DAC_WS (MTK_PIN_NO(106) | 3)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_PCM1_WS (MTK_PIN_NO(106) | 4)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_USB_TEST_IO_20 (MTK_PIN_NO(106) | 5)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_TESTB_OUT20 (MTK_PIN_NO(106) | 6)</div><div class='add'>+#define MT8135_PIN_106_I2S_WS__FUNC_A_FUNC_DIN_21 (MTK_PIN_NO(106) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_GPIO107 (MTK_PIN_NO(107) | 0)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_I2SIN_DAT (MTK_PIN_NO(107) | 1)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_EINT11 (MTK_PIN_NO(107) | 2)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_PCM1_DI (MTK_PIN_NO(107) | 4)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_USB_TEST_IO_21 (MTK_PIN_NO(107) | 5)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_TESTB_OUT22 (MTK_PIN_NO(107) | 6)</div><div class='add'>+#define MT8135_PIN_107_I2S_DATA_IN__FUNC_A_FUNC_DIN_22 (MTK_PIN_NO(107) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_GPIO108 (MTK_PIN_NO(108) | 0)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_I2SOUT_DAT (MTK_PIN_NO(108) | 1)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_EINT12 (MTK_PIN_NO(108) | 2)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_DAC_DAT_OUT (MTK_PIN_NO(108) | 3)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_PCM1_DO (MTK_PIN_NO(108) | 4)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_USB_TEST_IO_22 (MTK_PIN_NO(108) | 5)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_TESTB_OUT23 (MTK_PIN_NO(108) | 6)</div><div class='add'>+#define MT8135_PIN_108_I2S_DATA_OUT__FUNC_A_FUNC_DIN_23 (MTK_PIN_NO(108) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_GPIO109 (MTK_PIN_NO(109) | 0)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_EINT5 (MTK_PIN_NO(109) | 1)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_PWM5 (MTK_PIN_NO(109) | 2)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_CLKM3 (MTK_PIN_NO(109) | 3)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_GPU_JTRSTB (MTK_PIN_NO(109) | 4)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_USB_TEST_IO_23 (MTK_PIN_NO(109) | 5)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_TESTB_OUT26 (MTK_PIN_NO(109) | 6)</div><div class='add'>+#define MT8135_PIN_109_EINT5__FUNC_A_FUNC_DIN_24 (MTK_PIN_NO(109) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_GPIO110 (MTK_PIN_NO(110) | 0)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_EINT6 (MTK_PIN_NO(110) | 1)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_PWM6 (MTK_PIN_NO(110) | 2)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_CLKM4 (MTK_PIN_NO(110) | 3)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_GPU_JTMS (MTK_PIN_NO(110) | 4)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_USB_TEST_IO_24 (MTK_PIN_NO(110) | 5)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_TESTB_OUT27 (MTK_PIN_NO(110) | 6)</div><div class='add'>+#define MT8135_PIN_110_EINT6__FUNC_A_FUNC_DIN_25 (MTK_PIN_NO(110) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_GPIO111 (MTK_PIN_NO(111) | 0)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_EINT7 (MTK_PIN_NO(111) | 1)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_PWM7 (MTK_PIN_NO(111) | 2)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_CLKM5 (MTK_PIN_NO(111) | 3)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_GPU_JTDO (MTK_PIN_NO(111) | 4)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_USB_TEST_IO_25 (MTK_PIN_NO(111) | 5)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_TESTB_OUT28 (MTK_PIN_NO(111) | 6)</div><div class='add'>+#define MT8135_PIN_111_EINT7__FUNC_A_FUNC_DIN_26 (MTK_PIN_NO(111) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_GPIO112 (MTK_PIN_NO(112) | 0)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_EINT8 (MTK_PIN_NO(112) | 1)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_DISP_PWM (MTK_PIN_NO(112) | 2)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_CLKM6 (MTK_PIN_NO(112) | 3)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_GPU_JTDI (MTK_PIN_NO(112) | 4)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_USB_TEST_IO_26 (MTK_PIN_NO(112) | 5)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_TESTB_OUT29 (MTK_PIN_NO(112) | 6)</div><div class='add'>+#define MT8135_PIN_112_EINT8__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(112) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_GPIO113 (MTK_PIN_NO(113) | 0)</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_EINT9 (MTK_PIN_NO(113) | 1)</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_GPU_JTCK (MTK_PIN_NO(113) | 4)</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_USB_DRVVBUS (MTK_PIN_NO(113) | 5)</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_TESTB_OUT30 (MTK_PIN_NO(113) | 6)</div><div class='add'>+#define MT8135_PIN_113_EINT9__FUNC_A_FUNC_DIN_27 (MTK_PIN_NO(113) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_GPIO114 (MTK_PIN_NO(114) | 0)</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_LPCE1B (MTK_PIN_NO(114) | 1)</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_EINT127 (MTK_PIN_NO(114) | 2)</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_PWM2 (MTK_PIN_NO(114) | 5)</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_TESTB_OUT14 (MTK_PIN_NO(114) | 6)</div><div class='add'>+#define MT8135_PIN_114_LPCE1B__FUNC_A_FUNC_DIN_28 (MTK_PIN_NO(114) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_LPCE0B (MTK_PIN_NO(115) | 1)</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_EINT126 (MTK_PIN_NO(115) | 2)</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_PWM1 (MTK_PIN_NO(115) | 5)</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_TESTB_OUT15 (MTK_PIN_NO(115) | 6)</div><div class='add'>+#define MT8135_PIN_115_LPCE0B__FUNC_A_FUNC_DIN_29 (MTK_PIN_NO(115) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_GPIO116 (MTK_PIN_NO(116) | 0)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_DISP_PWM (MTK_PIN_NO(116) | 1)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_EINT77 (MTK_PIN_NO(116) | 2)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_LSDI (MTK_PIN_NO(116) | 3)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_PWM1 (MTK_PIN_NO(116) | 4)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_PWM2 (MTK_PIN_NO(116) | 5)</div><div class='add'>+#define MT8135_PIN_116_DISP_PWM__FUNC_PWM3 (MTK_PIN_NO(116) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_GPIO117 (MTK_PIN_NO(117) | 0)</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_EINT1 (MTK_PIN_NO(117) | 1)</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_PWM2 (MTK_PIN_NO(117) | 2)</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_CLKM1 (MTK_PIN_NO(117) | 3)</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_USB_TEST_IO_13 (MTK_PIN_NO(117) | 5)</div><div class='add'>+#define MT8135_PIN_117_EINT1__FUNC_USB_SDA (MTK_PIN_NO(117) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_GPIO118 (MTK_PIN_NO(118) | 0)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_EINT2 (MTK_PIN_NO(118) | 1)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_PWM3 (MTK_PIN_NO(118) | 2)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_CLKM2 (MTK_PIN_NO(118) | 3)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_USB_TEST_IO_14 (MTK_PIN_NO(118) | 5)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_SRCLKENAI2 (MTK_PIN_NO(118) | 6)</div><div class='add'>+#define MT8135_PIN_118_EINT2__FUNC_A_FUNC_DIN_30 (MTK_PIN_NO(118) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_119_EINT3__FUNC_GPIO119 (MTK_PIN_NO(119) | 0)</div><div class='add'>+#define MT8135_PIN_119_EINT3__FUNC_EINT3 (MTK_PIN_NO(119) | 1)</div><div class='add'>+#define MT8135_PIN_119_EINT3__FUNC_USB_TEST_IO_15 (MTK_PIN_NO(119) | 5)</div><div class='add'>+#define MT8135_PIN_119_EINT3__FUNC_SRCLKENAI1 (MTK_PIN_NO(119) | 6)</div><div class='add'>+#define MT8135_PIN_119_EINT3__FUNC_EXT_26M_CK (MTK_PIN_NO(119) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_120_EINT4__FUNC_GPIO120 (MTK_PIN_NO(120) | 0)</div><div class='add'>+#define MT8135_PIN_120_EINT4__FUNC_EINT4 (MTK_PIN_NO(120) | 1)</div><div class='add'>+#define MT8135_PIN_120_EINT4__FUNC_PWM4 (MTK_PIN_NO(120) | 2)</div><div class='add'>+#define MT8135_PIN_120_EINT4__FUNC_USB_DRVVBUS (MTK_PIN_NO(120) | 5)</div><div class='add'>+#define MT8135_PIN_120_EINT4__FUNC_A_FUNC_DIN_31 (MTK_PIN_NO(120) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_GPIO121 (MTK_PIN_NO(121) | 0)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_DPI0_DE (MTK_PIN_NO(121) | 1)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_EINT100 (MTK_PIN_NO(121) | 2)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_I2SOUT_DAT (MTK_PIN_NO(121) | 3)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_DAC_DAT_OUT (MTK_PIN_NO(121) | 4)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_PCM1_DO (MTK_PIN_NO(121) | 5)</div><div class='add'>+#define MT8135_PIN_121_DPIDE__FUNC_IRDA_TXD (MTK_PIN_NO(121) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_GPIO122 (MTK_PIN_NO(122) | 0)</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_DPI0_CK (MTK_PIN_NO(122) | 1)</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_EINT101 (MTK_PIN_NO(122) | 2)</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_I2SIN_DAT (MTK_PIN_NO(122) | 3)</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_PCM1_DI (MTK_PIN_NO(122) | 5)</div><div class='add'>+#define MT8135_PIN_122_DPICK__FUNC_IRDA_PDN (MTK_PIN_NO(122) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_123_DPIG4__FUNC_GPIO123 (MTK_PIN_NO(123) | 0)</div><div class='add'>+#define MT8135_PIN_123_DPIG4__FUNC_DPI0_G4 (MTK_PIN_NO(123) | 1)</div><div class='add'>+#define MT8135_PIN_123_DPIG4__FUNC_EINT114 (MTK_PIN_NO(123) | 2)</div><div class='add'>+#define MT8135_PIN_123_DPIG4__FUNC_CM2DAT_2X_0 (MTK_PIN_NO(123) | 4)</div><div class='add'>+#define MT8135_PIN_123_DPIG4__FUNC_DSP2_ID (MTK_PIN_NO(123) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_124_DPIG5__FUNC_GPIO124 (MTK_PIN_NO(124) | 0)</div><div class='add'>+#define MT8135_PIN_124_DPIG5__FUNC_DPI0_G5 (MTK_PIN_NO(124) | 1)</div><div class='add'>+#define MT8135_PIN_124_DPIG5__FUNC_EINT115 (MTK_PIN_NO(124) | 2)</div><div class='add'>+#define MT8135_PIN_124_DPIG5__FUNC_CM2DAT_2X_1 (MTK_PIN_NO(124) | 4)</div><div class='add'>+#define MT8135_PIN_124_DPIG5__FUNC_DSP2_ICK (MTK_PIN_NO(124) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_125_DPIR3__FUNC_GPIO125 (MTK_PIN_NO(125) | 0)</div><div class='add'>+#define MT8135_PIN_125_DPIR3__FUNC_DPI0_R3 (MTK_PIN_NO(125) | 1)</div><div class='add'>+#define MT8135_PIN_125_DPIR3__FUNC_EINT121 (MTK_PIN_NO(125) | 2)</div><div class='add'>+#define MT8135_PIN_125_DPIR3__FUNC_CM2DAT_2X_7 (MTK_PIN_NO(125) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_126_DPIG1__FUNC_GPIO126 (MTK_PIN_NO(126) | 0)</div><div class='add'>+#define MT8135_PIN_126_DPIG1__FUNC_DPI0_G1 (MTK_PIN_NO(126) | 1)</div><div class='add'>+#define MT8135_PIN_126_DPIG1__FUNC_EINT111 (MTK_PIN_NO(126) | 2)</div><div class='add'>+#define MT8135_PIN_126_DPIG1__FUNC_DSP1_ICK (MTK_PIN_NO(126) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_GPIO127 (MTK_PIN_NO(127) | 0)</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_DPI0_VSYNC (MTK_PIN_NO(127) | 1)</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_EINT98 (MTK_PIN_NO(127) | 2)</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_I2SIN_CK (MTK_PIN_NO(127) | 3)</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_DAC_CK (MTK_PIN_NO(127) | 4)</div><div class='add'>+#define MT8135_PIN_127_DPIVSYNC__FUNC_PCM1_CK (MTK_PIN_NO(127) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_GPIO128 (MTK_PIN_NO(128) | 0)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_DPI0_HSYNC (MTK_PIN_NO(128) | 1)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_EINT99 (MTK_PIN_NO(128) | 2)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_I2SIN_WS (MTK_PIN_NO(128) | 3)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_DAC_WS (MTK_PIN_NO(128) | 4)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_PCM1_WS (MTK_PIN_NO(128) | 5)</div><div class='add'>+#define MT8135_PIN_128_DPIHSYNC__FUNC_IRDA_RXD (MTK_PIN_NO(128) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_129_DPIB0__FUNC_GPIO129 (MTK_PIN_NO(129) | 0)</div><div class='add'>+#define MT8135_PIN_129_DPIB0__FUNC_DPI0_B0 (MTK_PIN_NO(129) | 1)</div><div class='add'>+#define MT8135_PIN_129_DPIB0__FUNC_EINT102 (MTK_PIN_NO(129) | 2)</div><div class='add'>+#define MT8135_PIN_129_DPIB0__FUNC_SCL0 (MTK_PIN_NO(129) | 4)</div><div class='add'>+#define MT8135_PIN_129_DPIB0__FUNC_DISP_PWM (MTK_PIN_NO(129) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_GPIO130 (MTK_PIN_NO(130) | 0)</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_DPI0_B1 (MTK_PIN_NO(130) | 1)</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_EINT103 (MTK_PIN_NO(130) | 2)</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_CLKM0 (MTK_PIN_NO(130) | 3)</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_SDA0 (MTK_PIN_NO(130) | 4)</div><div class='add'>+#define MT8135_PIN_130_DPIB1__FUNC_PWM1 (MTK_PIN_NO(130) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_GPIO131 (MTK_PIN_NO(131) | 0)</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_DPI0_B2 (MTK_PIN_NO(131) | 1)</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_EINT104 (MTK_PIN_NO(131) | 2)</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_CLKM1 (MTK_PIN_NO(131) | 3)</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_SCL1 (MTK_PIN_NO(131) | 4)</div><div class='add'>+#define MT8135_PIN_131_DPIB2__FUNC_PWM2 (MTK_PIN_NO(131) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_GPIO132 (MTK_PIN_NO(132) | 0)</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_DPI0_B3 (MTK_PIN_NO(132) | 1)</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_EINT105 (MTK_PIN_NO(132) | 2)</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_CLKM2 (MTK_PIN_NO(132) | 3)</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_SDA1 (MTK_PIN_NO(132) | 4)</div><div class='add'>+#define MT8135_PIN_132_DPIB3__FUNC_PWM3 (MTK_PIN_NO(132) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_GPIO133 (MTK_PIN_NO(133) | 0)</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_DPI0_B4 (MTK_PIN_NO(133) | 1)</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_EINT106 (MTK_PIN_NO(133) | 2)</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_CLKM3 (MTK_PIN_NO(133) | 3)</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_SCL2 (MTK_PIN_NO(133) | 4)</div><div class='add'>+#define MT8135_PIN_133_DPIB4__FUNC_PWM4 (MTK_PIN_NO(133) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_GPIO134 (MTK_PIN_NO(134) | 0)</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_DPI0_B5 (MTK_PIN_NO(134) | 1)</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_EINT107 (MTK_PIN_NO(134) | 2)</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_CLKM4 (MTK_PIN_NO(134) | 3)</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_SDA2 (MTK_PIN_NO(134) | 4)</div><div class='add'>+#define MT8135_PIN_134_DPIB5__FUNC_PWM5 (MTK_PIN_NO(134) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_GPIO135 (MTK_PIN_NO(135) | 0)</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_DPI0_B6 (MTK_PIN_NO(135) | 1)</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_EINT108 (MTK_PIN_NO(135) | 2)</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_CLKM5 (MTK_PIN_NO(135) | 3)</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_SCL3 (MTK_PIN_NO(135) | 4)</div><div class='add'>+#define MT8135_PIN_135_DPIB6__FUNC_PWM6 (MTK_PIN_NO(135) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_GPIO136 (MTK_PIN_NO(136) | 0)</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_DPI0_B7 (MTK_PIN_NO(136) | 1)</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_EINT109 (MTK_PIN_NO(136) | 2)</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_CLKM6 (MTK_PIN_NO(136) | 3)</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_SDA3 (MTK_PIN_NO(136) | 4)</div><div class='add'>+#define MT8135_PIN_136_DPIB7__FUNC_PWM7 (MTK_PIN_NO(136) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_137_DPIG0__FUNC_GPIO137 (MTK_PIN_NO(137) | 0)</div><div class='add'>+#define MT8135_PIN_137_DPIG0__FUNC_DPI0_G0 (MTK_PIN_NO(137) | 1)</div><div class='add'>+#define MT8135_PIN_137_DPIG0__FUNC_EINT110 (MTK_PIN_NO(137) | 2)</div><div class='add'>+#define MT8135_PIN_137_DPIG0__FUNC_DSP1_ID (MTK_PIN_NO(137) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_138_DPIG2__FUNC_GPIO138 (MTK_PIN_NO(138) | 0)</div><div class='add'>+#define MT8135_PIN_138_DPIG2__FUNC_DPI0_G2 (MTK_PIN_NO(138) | 1)</div><div class='add'>+#define MT8135_PIN_138_DPIG2__FUNC_EINT112 (MTK_PIN_NO(138) | 2)</div><div class='add'>+#define MT8135_PIN_138_DPIG2__FUNC_DSP1_IMS (MTK_PIN_NO(138) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_139_DPIG3__FUNC_GPIO139 (MTK_PIN_NO(139) | 0)</div><div class='add'>+#define MT8135_PIN_139_DPIG3__FUNC_DPI0_G3 (MTK_PIN_NO(139) | 1)</div><div class='add'>+#define MT8135_PIN_139_DPIG3__FUNC_EINT113 (MTK_PIN_NO(139) | 2)</div><div class='add'>+#define MT8135_PIN_139_DPIG3__FUNC_DSP2_IMS (MTK_PIN_NO(139) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_140_DPIG6__FUNC_GPIO140 (MTK_PIN_NO(140) | 0)</div><div class='add'>+#define MT8135_PIN_140_DPIG6__FUNC_DPI0_G6 (MTK_PIN_NO(140) | 1)</div><div class='add'>+#define MT8135_PIN_140_DPIG6__FUNC_EINT116 (MTK_PIN_NO(140) | 2)</div><div class='add'>+#define MT8135_PIN_140_DPIG6__FUNC_CM2DAT_2X_2 (MTK_PIN_NO(140) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_141_DPIG7__FUNC_GPIO141 (MTK_PIN_NO(141) | 0)</div><div class='add'>+#define MT8135_PIN_141_DPIG7__FUNC_DPI0_G7 (MTK_PIN_NO(141) | 1)</div><div class='add'>+#define MT8135_PIN_141_DPIG7__FUNC_EINT117 (MTK_PIN_NO(141) | 2)</div><div class='add'>+#define MT8135_PIN_141_DPIG7__FUNC_CM2DAT_2X_3 (MTK_PIN_NO(141) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_142_DPIR0__FUNC_GPIO142 (MTK_PIN_NO(142) | 0)</div><div class='add'>+#define MT8135_PIN_142_DPIR0__FUNC_DPI0_R0 (MTK_PIN_NO(142) | 1)</div><div class='add'>+#define MT8135_PIN_142_DPIR0__FUNC_EINT118 (MTK_PIN_NO(142) | 2)</div><div class='add'>+#define MT8135_PIN_142_DPIR0__FUNC_CM2DAT_2X_4 (MTK_PIN_NO(142) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_143_DPIR1__FUNC_GPIO143 (MTK_PIN_NO(143) | 0)</div><div class='add'>+#define MT8135_PIN_143_DPIR1__FUNC_DPI0_R1 (MTK_PIN_NO(143) | 1)</div><div class='add'>+#define MT8135_PIN_143_DPIR1__FUNC_EINT119 (MTK_PIN_NO(143) | 2)</div><div class='add'>+#define MT8135_PIN_143_DPIR1__FUNC_CM2DAT_2X_5 (MTK_PIN_NO(143) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_144_DPIR2__FUNC_GPIO144 (MTK_PIN_NO(144) | 0)</div><div class='add'>+#define MT8135_PIN_144_DPIR2__FUNC_DPI0_R2 (MTK_PIN_NO(144) | 1)</div><div class='add'>+#define MT8135_PIN_144_DPIR2__FUNC_EINT120 (MTK_PIN_NO(144) | 2)</div><div class='add'>+#define MT8135_PIN_144_DPIR2__FUNC_CM2DAT_2X_6 (MTK_PIN_NO(144) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_145_DPIR4__FUNC_GPIO145 (MTK_PIN_NO(145) | 0)</div><div class='add'>+#define MT8135_PIN_145_DPIR4__FUNC_DPI0_R4 (MTK_PIN_NO(145) | 1)</div><div class='add'>+#define MT8135_PIN_145_DPIR4__FUNC_EINT122 (MTK_PIN_NO(145) | 2)</div><div class='add'>+#define MT8135_PIN_145_DPIR4__FUNC_CM2DAT_2X_8 (MTK_PIN_NO(145) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_146_DPIR5__FUNC_GPIO146 (MTK_PIN_NO(146) | 0)</div><div class='add'>+#define MT8135_PIN_146_DPIR5__FUNC_DPI0_R5 (MTK_PIN_NO(146) | 1)</div><div class='add'>+#define MT8135_PIN_146_DPIR5__FUNC_EINT123 (MTK_PIN_NO(146) | 2)</div><div class='add'>+#define MT8135_PIN_146_DPIR5__FUNC_CM2DAT_2X_9 (MTK_PIN_NO(146) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_147_DPIR6__FUNC_GPIO147 (MTK_PIN_NO(147) | 0)</div><div class='add'>+#define MT8135_PIN_147_DPIR6__FUNC_DPI0_R6 (MTK_PIN_NO(147) | 1)</div><div class='add'>+#define MT8135_PIN_147_DPIR6__FUNC_EINT124 (MTK_PIN_NO(147) | 2)</div><div class='add'>+#define MT8135_PIN_147_DPIR6__FUNC_CM2VSYNC_2X (MTK_PIN_NO(147) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_148_DPIR7__FUNC_GPIO148 (MTK_PIN_NO(148) | 0)</div><div class='add'>+#define MT8135_PIN_148_DPIR7__FUNC_DPI0_R7 (MTK_PIN_NO(148) | 1)</div><div class='add'>+#define MT8135_PIN_148_DPIR7__FUNC_EINT125 (MTK_PIN_NO(148) | 2)</div><div class='add'>+#define MT8135_PIN_148_DPIR7__FUNC_CM2HSYNC_2X (MTK_PIN_NO(148) | 4)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_149_TDN3__FUNC_GPIO149 (MTK_PIN_NO(149) | 0)</div><div class='add'>+#define MT8135_PIN_149_TDN3__FUNC_EINT36 (MTK_PIN_NO(149) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_150_TDP3__FUNC_GPIO150 (MTK_PIN_NO(150) | 0)</div><div class='add'>+#define MT8135_PIN_150_TDP3__FUNC_EINT35 (MTK_PIN_NO(150) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_151_TDN2__FUNC_GPIO151 (MTK_PIN_NO(151) | 0)</div><div class='add'>+#define MT8135_PIN_151_TDN2__FUNC_EINT169 (MTK_PIN_NO(151) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_152_TDP2__FUNC_GPIO152 (MTK_PIN_NO(152) | 0)</div><div class='add'>+#define MT8135_PIN_152_TDP2__FUNC_EINT168 (MTK_PIN_NO(152) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_153_TCN__FUNC_GPIO153 (MTK_PIN_NO(153) | 0)</div><div class='add'>+#define MT8135_PIN_153_TCN__FUNC_EINT163 (MTK_PIN_NO(153) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_154_TCP__FUNC_GPIO154 (MTK_PIN_NO(154) | 0)</div><div class='add'>+#define MT8135_PIN_154_TCP__FUNC_EINT162 (MTK_PIN_NO(154) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_155_TDN1__FUNC_GPIO155 (MTK_PIN_NO(155) | 0)</div><div class='add'>+#define MT8135_PIN_155_TDN1__FUNC_EINT167 (MTK_PIN_NO(155) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_156_TDP1__FUNC_GPIO156 (MTK_PIN_NO(156) | 0)</div><div class='add'>+#define MT8135_PIN_156_TDP1__FUNC_EINT166 (MTK_PIN_NO(156) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_157_TDN0__FUNC_GPIO157 (MTK_PIN_NO(157) | 0)</div><div class='add'>+#define MT8135_PIN_157_TDN0__FUNC_EINT165 (MTK_PIN_NO(157) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_158_TDP0__FUNC_GPIO158 (MTK_PIN_NO(158) | 0)</div><div class='add'>+#define MT8135_PIN_158_TDP0__FUNC_EINT164 (MTK_PIN_NO(158) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_159_RDN3__FUNC_GPIO159 (MTK_PIN_NO(159) | 0)</div><div class='add'>+#define MT8135_PIN_159_RDN3__FUNC_EINT18 (MTK_PIN_NO(159) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_160_RDP3__FUNC_GPIO160 (MTK_PIN_NO(160) | 0)</div><div class='add'>+#define MT8135_PIN_160_RDP3__FUNC_EINT30 (MTK_PIN_NO(160) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_161_RDN2__FUNC_GPIO161 (MTK_PIN_NO(161) | 0)</div><div class='add'>+#define MT8135_PIN_161_RDN2__FUNC_EINT31 (MTK_PIN_NO(161) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_162_RDP2__FUNC_GPIO162 (MTK_PIN_NO(162) | 0)</div><div class='add'>+#define MT8135_PIN_162_RDP2__FUNC_EINT32 (MTK_PIN_NO(162) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_163_RCN__FUNC_GPIO163 (MTK_PIN_NO(163) | 0)</div><div class='add'>+#define MT8135_PIN_163_RCN__FUNC_EINT33 (MTK_PIN_NO(163) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_164_RCP__FUNC_GPIO164 (MTK_PIN_NO(164) | 0)</div><div class='add'>+#define MT8135_PIN_164_RCP__FUNC_EINT39 (MTK_PIN_NO(164) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_165_RDN1__FUNC_GPIO165 (MTK_PIN_NO(165) | 0)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_166_RDP1__FUNC_GPIO166 (MTK_PIN_NO(166) | 0)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_167_RDN0__FUNC_GPIO167 (MTK_PIN_NO(167) | 0)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_168_RDP0__FUNC_GPIO168 (MTK_PIN_NO(168) | 0)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_169_RDN1_A__FUNC_GPIO169 (MTK_PIN_NO(169) | 0)</div><div class='add'>+#define MT8135_PIN_169_RDN1_A__FUNC_CMDAT6 (MTK_PIN_NO(169) | 1)</div><div class='add'>+#define MT8135_PIN_169_RDN1_A__FUNC_EINT175 (MTK_PIN_NO(169) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_170_RDP1_A__FUNC_GPIO170 (MTK_PIN_NO(170) | 0)</div><div class='add'>+#define MT8135_PIN_170_RDP1_A__FUNC_CMDAT7 (MTK_PIN_NO(170) | 1)</div><div class='add'>+#define MT8135_PIN_170_RDP1_A__FUNC_EINT174 (MTK_PIN_NO(170) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_171_RCN_A__FUNC_GPIO171 (MTK_PIN_NO(171) | 0)</div><div class='add'>+#define MT8135_PIN_171_RCN_A__FUNC_CMDAT8 (MTK_PIN_NO(171) | 1)</div><div class='add'>+#define MT8135_PIN_171_RCN_A__FUNC_EINT171 (MTK_PIN_NO(171) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_172_RCP_A__FUNC_GPIO172 (MTK_PIN_NO(172) | 0)</div><div class='add'>+#define MT8135_PIN_172_RCP_A__FUNC_CMDAT9 (MTK_PIN_NO(172) | 1)</div><div class='add'>+#define MT8135_PIN_172_RCP_A__FUNC_EINT170 (MTK_PIN_NO(172) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_173_RDN0_A__FUNC_GPIO173 (MTK_PIN_NO(173) | 0)</div><div class='add'>+#define MT8135_PIN_173_RDN0_A__FUNC_CMHSYNC (MTK_PIN_NO(173) | 1)</div><div class='add'>+#define MT8135_PIN_173_RDN0_A__FUNC_EINT173 (MTK_PIN_NO(173) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_174_RDP0_A__FUNC_GPIO174 (MTK_PIN_NO(174) | 0)</div><div class='add'>+#define MT8135_PIN_174_RDP0_A__FUNC_CMVSYNC (MTK_PIN_NO(174) | 1)</div><div class='add'>+#define MT8135_PIN_174_RDP0_A__FUNC_EINT172 (MTK_PIN_NO(174) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_175_RDN1_B__FUNC_GPIO175 (MTK_PIN_NO(175) | 0)</div><div class='add'>+#define MT8135_PIN_175_RDN1_B__FUNC_CMDAT2 (MTK_PIN_NO(175) | 1)</div><div class='add'>+#define MT8135_PIN_175_RDN1_B__FUNC_EINT181 (MTK_PIN_NO(175) | 2)</div><div class='add'>+#define MT8135_PIN_175_RDN1_B__FUNC_CMCSD2 (MTK_PIN_NO(175) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_176_RDP1_B__FUNC_GPIO176 (MTK_PIN_NO(176) | 0)</div><div class='add'>+#define MT8135_PIN_176_RDP1_B__FUNC_CMDAT3 (MTK_PIN_NO(176) | 1)</div><div class='add'>+#define MT8135_PIN_176_RDP1_B__FUNC_EINT180 (MTK_PIN_NO(176) | 2)</div><div class='add'>+#define MT8135_PIN_176_RDP1_B__FUNC_CMCSD3 (MTK_PIN_NO(176) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_177_RCN_B__FUNC_GPIO177 (MTK_PIN_NO(177) | 0)</div><div class='add'>+#define MT8135_PIN_177_RCN_B__FUNC_CMDAT4 (MTK_PIN_NO(177) | 1)</div><div class='add'>+#define MT8135_PIN_177_RCN_B__FUNC_EINT177 (MTK_PIN_NO(177) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_178_RCP_B__FUNC_GPIO178 (MTK_PIN_NO(178) | 0)</div><div class='add'>+#define MT8135_PIN_178_RCP_B__FUNC_CMDAT5 (MTK_PIN_NO(178) | 1)</div><div class='add'>+#define MT8135_PIN_178_RCP_B__FUNC_EINT176 (MTK_PIN_NO(178) | 2)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_179_RDN0_B__FUNC_GPIO179 (MTK_PIN_NO(179) | 0)</div><div class='add'>+#define MT8135_PIN_179_RDN0_B__FUNC_CMDAT0 (MTK_PIN_NO(179) | 1)</div><div class='add'>+#define MT8135_PIN_179_RDN0_B__FUNC_EINT179 (MTK_PIN_NO(179) | 2)</div><div class='add'>+#define MT8135_PIN_179_RDN0_B__FUNC_CMCSD0 (MTK_PIN_NO(179) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_180_RDP0_B__FUNC_GPIO180 (MTK_PIN_NO(180) | 0)</div><div class='add'>+#define MT8135_PIN_180_RDP0_B__FUNC_CMDAT1 (MTK_PIN_NO(180) | 1)</div><div class='add'>+#define MT8135_PIN_180_RDP0_B__FUNC_EINT178 (MTK_PIN_NO(180) | 2)</div><div class='add'>+#define MT8135_PIN_180_RDP0_B__FUNC_CMCSD1 (MTK_PIN_NO(180) | 3)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_GPIO181 (MTK_PIN_NO(181) | 0)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_CMPCLK (MTK_PIN_NO(181) | 1)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_EINT182 (MTK_PIN_NO(181) | 2)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_CMCSK (MTK_PIN_NO(181) | 3)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_CM2MCLK_4X (MTK_PIN_NO(181) | 4)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_TS_AUXADC_SEL_3 (MTK_PIN_NO(181) | 5)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_VENC_TEST_CK (MTK_PIN_NO(181) | 6)</div><div class='add'>+#define MT8135_PIN_181_CMPCLK__FUNC_TESTA_OUT27 (MTK_PIN_NO(181) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_182_CMMCLK__FUNC_GPIO182 (MTK_PIN_NO(182) | 0)</div><div class='add'>+#define MT8135_PIN_182_CMMCLK__FUNC_CMMCLK (MTK_PIN_NO(182) | 1)</div><div class='add'>+#define MT8135_PIN_182_CMMCLK__FUNC_EINT183 (MTK_PIN_NO(182) | 2)</div><div class='add'>+#define MT8135_PIN_182_CMMCLK__FUNC_TS_AUXADC_SEL_2 (MTK_PIN_NO(182) | 5)</div><div class='add'>+#define MT8135_PIN_182_CMMCLK__FUNC_TESTA_OUT28 (MTK_PIN_NO(182) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_183_CMRST__FUNC_GPIO183 (MTK_PIN_NO(183) | 0)</div><div class='add'>+#define MT8135_PIN_183_CMRST__FUNC_CMRST (MTK_PIN_NO(183) | 1)</div><div class='add'>+#define MT8135_PIN_183_CMRST__FUNC_EINT185 (MTK_PIN_NO(183) | 2)</div><div class='add'>+#define MT8135_PIN_183_CMRST__FUNC_TS_AUXADC_SEL_1 (MTK_PIN_NO(183) | 5)</div><div class='add'>+#define MT8135_PIN_183_CMRST__FUNC_TESTA_OUT30 (MTK_PIN_NO(183) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_184_CMPDN__FUNC_GPIO184 (MTK_PIN_NO(184) | 0)</div><div class='add'>+#define MT8135_PIN_184_CMPDN__FUNC_CMPDN (MTK_PIN_NO(184) | 1)</div><div class='add'>+#define MT8135_PIN_184_CMPDN__FUNC_EINT184 (MTK_PIN_NO(184) | 2)</div><div class='add'>+#define MT8135_PIN_184_CMPDN__FUNC_TS_AUXADC_SEL_0 (MTK_PIN_NO(184) | 5)</div><div class='add'>+#define MT8135_PIN_184_CMPDN__FUNC_TESTA_OUT29 (MTK_PIN_NO(184) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_GPIO185 (MTK_PIN_NO(185) | 0)</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_CMFLASH (MTK_PIN_NO(185) | 1)</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_EINT186 (MTK_PIN_NO(185) | 2)</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_CM2MCLK_3X (MTK_PIN_NO(185) | 3)</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_MFG_TEST_CK_1 (MTK_PIN_NO(185) | 6)</div><div class='add'>+#define MT8135_PIN_185_CMFLASH__FUNC_TESTA_OUT31 (MTK_PIN_NO(185) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_GPIO186 (MTK_PIN_NO(186) | 0)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_MRG_I2S_P_CLK (MTK_PIN_NO(186) | 1)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_EINT14 (MTK_PIN_NO(186) | 2)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_I2SIN_CK (MTK_PIN_NO(186) | 3)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_PCM0_CK (MTK_PIN_NO(186) | 4)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_DSP2_ICK (MTK_PIN_NO(186) | 5)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_IMG_TEST_CK (MTK_PIN_NO(186) | 6)</div><div class='add'>+#define MT8135_PIN_186_MRG_I2S_PCM_CLK__FUNC_USB_SCL (MTK_PIN_NO(186) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_GPIO187 (MTK_PIN_NO(187) | 0)</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_MRG_I2S_SYNC (MTK_PIN_NO(187) | 1)</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_EINT16 (MTK_PIN_NO(187) | 2)</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_I2SIN_WS (MTK_PIN_NO(187) | 3)</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_PCM0_WS (MTK_PIN_NO(187) | 4)</div><div class='add'>+#define MT8135_PIN_187_MRG_I2S_PCM_SYNC__FUNC_DISP_TEST_CK (MTK_PIN_NO(187) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_GPIO188 (MTK_PIN_NO(188) | 0)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_MRG_I2S_PCM_RX (MTK_PIN_NO(188) | 1)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_EINT15 (MTK_PIN_NO(188) | 2)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_I2SIN_DAT (MTK_PIN_NO(188) | 3)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_PCM0_DI (MTK_PIN_NO(188) | 4)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_DSP2_ID (MTK_PIN_NO(188) | 5)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_MFG_TEST_CK (MTK_PIN_NO(188) | 6)</div><div class='add'>+#define MT8135_PIN_188_MRG_I2S_PCM_RX__FUNC_USB_SDA (MTK_PIN_NO(188) | 7)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_GPIO189 (MTK_PIN_NO(189) | 0)</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_MRG_I2S_PCM_TX (MTK_PIN_NO(189) | 1)</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_EINT17 (MTK_PIN_NO(189) | 2)</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_I2SOUT_DAT (MTK_PIN_NO(189) | 3)</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_PCM0_DO (MTK_PIN_NO(189) | 4)</div><div class='add'>+#define MT8135_PIN_189_MRG_I2S_PCM_TX__FUNC_VDEC_TEST_CK (MTK_PIN_NO(189) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_190_SRCLKENAI__FUNC_GPIO190 (MTK_PIN_NO(190) | 0)</div><div class='add'>+#define MT8135_PIN_190_SRCLKENAI__FUNC_SRCLKENAI (MTK_PIN_NO(190) | 1)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_GPIO191 (MTK_PIN_NO(191) | 0)</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_URXD3 (MTK_PIN_NO(191) | 1)</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_EINT87 (MTK_PIN_NO(191) | 2)</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_UTXD3 (MTK_PIN_NO(191) | 3)</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_TS_AUX_ST (MTK_PIN_NO(191) | 5)</div><div class='add'>+#define MT8135_PIN_191_URXD3__FUNC_PWM4 (MTK_PIN_NO(191) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_GPIO192 (MTK_PIN_NO(192) | 0)</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_UTXD3 (MTK_PIN_NO(192) | 1)</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_EINT86 (MTK_PIN_NO(192) | 2)</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_URXD3 (MTK_PIN_NO(192) | 3)</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_TS_AUX_CS_B (MTK_PIN_NO(192) | 5)</div><div class='add'>+#define MT8135_PIN_192_UTXD3__FUNC_PWM3 (MTK_PIN_NO(192) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_GPIO193 (MTK_PIN_NO(193) | 0)</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_SDA2 (MTK_PIN_NO(193) | 1)</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_EINT95 (MTK_PIN_NO(193) | 2)</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_CLKM5 (MTK_PIN_NO(193) | 3)</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_PWM5 (MTK_PIN_NO(193) | 4)</div><div class='add'>+#define MT8135_PIN_193_SDA2__FUNC_TS_AUX_PWDB (MTK_PIN_NO(193) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_GPIO194 (MTK_PIN_NO(194) | 0)</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_SCL2 (MTK_PIN_NO(194) | 1)</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_EINT94 (MTK_PIN_NO(194) | 2)</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_CLKM4 (MTK_PIN_NO(194) | 3)</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_PWM4 (MTK_PIN_NO(194) | 4)</div><div class='add'>+#define MT8135_PIN_194_SCL2__FUNC_TS_AUXADC_TEST_CK (MTK_PIN_NO(194) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_GPIO195 (MTK_PIN_NO(195) | 0)</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_SDA1 (MTK_PIN_NO(195) | 1)</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_EINT93 (MTK_PIN_NO(195) | 2)</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_CLKM3 (MTK_PIN_NO(195) | 3)</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_PWM3 (MTK_PIN_NO(195) | 4)</div><div class='add'>+#define MT8135_PIN_195_SDA1__FUNC_TS_AUX_SCLK_PWDB (MTK_PIN_NO(195) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_GPIO196 (MTK_PIN_NO(196) | 0)</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_SCL1 (MTK_PIN_NO(196) | 1)</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_EINT92 (MTK_PIN_NO(196) | 2)</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_CLKM2 (MTK_PIN_NO(196) | 3)</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_PWM2 (MTK_PIN_NO(196) | 4)</div><div class='add'>+#define MT8135_PIN_196_SCL1__FUNC_TS_AUX_DIN (MTK_PIN_NO(196) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_GPIO197 (MTK_PIN_NO(197) | 0)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_MSDC3_DAT2 (MTK_PIN_NO(197) | 1)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_EINT71 (MTK_PIN_NO(197) | 2)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_SCL6 (MTK_PIN_NO(197) | 3)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_PWM5 (MTK_PIN_NO(197) | 4)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_CLKM4 (MTK_PIN_NO(197) | 5)</div><div class='add'>+#define MT8135_PIN_197_MSDC3_DAT2__FUNC_MFG_TEST_CK_2 (MTK_PIN_NO(197) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_GPIO198 (MTK_PIN_NO(198) | 0)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_MSDC3_DAT3 (MTK_PIN_NO(198) | 1)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_EINT72 (MTK_PIN_NO(198) | 2)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_SDA6 (MTK_PIN_NO(198) | 3)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_PWM6 (MTK_PIN_NO(198) | 4)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_CLKM5 (MTK_PIN_NO(198) | 5)</div><div class='add'>+#define MT8135_PIN_198_MSDC3_DAT3__FUNC_MFG_TEST_CK_3 (MTK_PIN_NO(198) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_GPIO199 (MTK_PIN_NO(199) | 0)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_MSDC3_CMD (MTK_PIN_NO(199) | 1)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_EINT68 (MTK_PIN_NO(199) | 2)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_SDA2 (MTK_PIN_NO(199) | 3)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_PWM2 (MTK_PIN_NO(199) | 4)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_CLKM1 (MTK_PIN_NO(199) | 5)</div><div class='add'>+#define MT8135_PIN_199_MSDC3_CMD__FUNC_MFG_TEST_CK_4 (MTK_PIN_NO(199) | 6)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_GPIO200 (MTK_PIN_NO(200) | 0)</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_MSDC3_CLK (MTK_PIN_NO(200) | 1)</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_EINT67 (MTK_PIN_NO(200) | 2)</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_SCL2 (MTK_PIN_NO(200) | 3)</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_PWM1 (MTK_PIN_NO(200) | 4)</div><div class='add'>+#define MT8135_PIN_200_MSDC3_CLK__FUNC_CLKM0 (MTK_PIN_NO(200) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_GPIO201 (MTK_PIN_NO(201) | 0)</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_MSDC3_DAT1 (MTK_PIN_NO(201) | 1)</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_EINT70 (MTK_PIN_NO(201) | 2)</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_SDA3 (MTK_PIN_NO(201) | 3)</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_PWM4 (MTK_PIN_NO(201) | 4)</div><div class='add'>+#define MT8135_PIN_201_MSDC3_DAT1__FUNC_CLKM3 (MTK_PIN_NO(201) | 5)</div><div class='add'>+</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_GPIO202 (MTK_PIN_NO(202) | 0)</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_MSDC3_DAT0 (MTK_PIN_NO(202) | 1)</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_EINT69 (MTK_PIN_NO(202) | 2)</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_SCL3 (MTK_PIN_NO(202) | 3)</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_PWM3 (MTK_PIN_NO(202) | 4)</div><div class='add'>+#define MT8135_PIN_202_MSDC3_DAT0__FUNC_CLKM2 (MTK_PIN_NO(202) | 5)</div><div class='add'>+</div><div class='add'>+#endif /* __DTS_MT8135_PINFUNC_H */</div><div class='head'>diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi<br/>index a161e99ffcc4..0aba9eb28e2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/mt8135.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/mt8135.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/mt8135.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/mt8135.dtsi</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include "skeleton64.dtsi"</div><div class='add'>+#include "mt8135-pinfunc.h"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "mediatek,mt8135";</div><div class='hunk'>@@ -101,6 +102,29 @@</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Pinctrl access register at 0x10005000 and 0x1020c000 through</div><div class='add'>+		 * regmap. Register 0x1000b000 is used by EINT.</div><div class='add'>+		 */</div><div class='add'>+		pio: pinctrl@10005000 {</div><div class='add'>+			compatible = "mediatek,mt8135-pinctrl";</div><div class='add'>+			reg = &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='add'>+			mediatek,pctl-regmap = &lt;&amp;syscfg_pctl_a &amp;syscfg_pctl_b&gt;;</div><div class='add'>+			pins-are-numbered;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscfg_pctl_a: syscfg_pctl_a@10005000 {</div><div class='add'>+			compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0 0x10005000 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		timer: timer@10008000 {</div><div class='ctx'> 			compatible = "mediatek,mt8135-timer",</div><div class='ctx'> 					"mediatek,mt6577-timer";</div><div class='hunk'>@@ -119,6 +143,11 @@</div><div class='ctx'> 			reg = &lt;0 0x10200030 0 0x1c&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		syscfg_pctl_b: syscfg_pctl_b@1020c000 {</div><div class='add'>+			compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0 0x1020c000 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@10211000 {</div><div class='ctx'> 			compatible = "arm,cortex-a15-gic";</div><div class='ctx'> 			interrupt-controller;</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-cm-t3517.dts b/arch/arm/boot/dts/omap3-cm-t3517.dts<br/>index f5b5a1d96cd7..53ae04f9104d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-cm-t3517.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-cm-t3517.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-cm-t3517.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-cm-t3517.dts</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> </div><div class='ctx'> 	otg_drv_vbus: pinmux_otg_drv_vbus {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts<br/>index 921de6605f07..be2297116a14 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-devkit8000.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-devkit8000.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-devkit8000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-devkit8000.dts</a></div><div class='hunk'>@@ -157,3 +157,44 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gpmc {</div><div class='add'>+	ranges = &lt;6 0 0x2c000000 0x1000000&gt;;       /* CS6: 16MB for DM9000 */</div><div class='add'>+</div><div class='add'>+	ethernet@0,0 {</div><div class='add'>+		compatible = "davicom,dm9000";</div><div class='add'>+		reg =  &lt;6 0x000 2</div><div class='add'>+			6 0x400 2&gt;; /* CS6, offset 0 and 0x400, IO size 2 */</div><div class='add'>+		bank-width = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		davicom,no-eeprom;</div><div class='add'>+</div><div class='add'>+		gpmc,mux-add-data = &lt;0&gt;;</div><div class='add'>+		gpmc,device-width = &lt;1&gt;;</div><div class='add'>+		gpmc,wait-pin = &lt;0&gt;;</div><div class='add'>+		gpmc,cycle2cycle-samecsen = &lt;1&gt;;</div><div class='add'>+		gpmc,cycle2cycle-diffcsen = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		gpmc,cs-on-ns = &lt;6&gt;;</div><div class='add'>+		gpmc,cs-rd-off-ns = &lt;180&gt;;</div><div class='add'>+		gpmc,cs-wr-off-ns = &lt;180&gt;;</div><div class='add'>+		gpmc,adv-on-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,adv-rd-off-ns = &lt;18&gt;;</div><div class='add'>+		gpmc,adv-wr-off-ns = &lt;48&gt;;</div><div class='add'>+		gpmc,oe-on-ns = &lt;54&gt;;</div><div class='add'>+		gpmc,oe-off-ns = &lt;168&gt;;</div><div class='add'>+		gpmc,we-on-ns = &lt;54&gt;;</div><div class='add'>+		gpmc,we-off-ns = &lt;168&gt;;</div><div class='add'>+		gpmc,rd-cycle-ns = &lt;186&gt;;</div><div class='add'>+		gpmc,wr-cycle-ns = &lt;186&gt;;</div><div class='add'>+		gpmc,access-ns = &lt;144&gt;;</div><div class='add'>+		gpmc,page-burst-access-ns = &lt;24&gt;;</div><div class='add'>+		gpmc,bus-turnaround-ns = &lt;90&gt;;</div><div class='add'>+		gpmc,cycle2cycle-delay-ns = &lt;90&gt;;</div><div class='add'>+		gpmc,wait-monitoring-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,clk-activation-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,wr-data-mux-bus-ns = &lt;0&gt;;</div><div class='add'>+		gpmc,wr-access-ns = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi<br/>index 346552b94d9f..b2589f96d5f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-evm-common.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-evm-common.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-evm-common.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-evm-common.dtsi</a></div><div class='hunk'>@@ -96,6 +96,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mmc1 {</div><div class='add'>+	interrupts-extended = &lt;&amp;intc 83 &amp;omap3_pmx_core 0x11a&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vmmc1&gt;;</div><div class='ctx'> 	vmmc_aux-supply = &lt;&amp;vsim&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi<br/>index b9f68817bd6e..7166d8876ea8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-gta04.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-gta04.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-gta04.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-gta04.dtsi</a></div><div class='hunk'>@@ -48,6 +48,28 @@</div><div class='ctx'> 		ti,mcbsp = &lt;&amp;mcbsp2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	 /* GSM audio */</div><div class='add'>+	sound_telephony {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "GTA04 voice";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;telephony_link_master&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;telephony_link_master&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;mcbsp4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		telephony_link_master: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;gtm601_codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gtm601_codec: gsm_codec {</div><div class='add'>+		compatible = "option,gtm601";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	spi_lcd {</div><div class='ctx'> 		compatible = "spi-gpio";</div><div class='ctx'> 		#address-cells = &lt;0x1&gt;;</div><div class='hunk'>@@ -200,6 +222,12 @@</div><div class='ctx'> 			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'>        };</div><div class='add'>+</div><div class='add'>+	hdq_pins: hdq_pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;omap3_pmx_core2 {</div><div class='hunk'>@@ -517,3 +545,12 @@</div><div class='ctx'> &amp;mcbsp2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;hdqw1w {</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;hdq_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcbsp4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts<br/>index b699bc48f242..bd6e6769c7ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-ldp.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-ldp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-ldp.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-ldp.dts</a></div><div class='hunk'>@@ -34,63 +34,63 @@</div><div class='ctx'> 		key_enter {</div><div class='ctx'> 			label = "enter";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_LOW&gt;; /* gpio101 */</div><div class='del'>-			linux,code = &lt;0x0107001c&gt;; /* KEY_ENTER */</div><div class='add'>+			linux,code = &lt;KEY_ENTER&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_f1 {</div><div class='ctx'> 			label = "f1";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 6 GPIO_ACTIVE_LOW&gt;; /* gpio102 */</div><div class='del'>-			linux,code = &lt;0x0303003b&gt;; /* KEY_F1 */</div><div class='add'>+			linux,code = &lt;KEY_F1&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_f2 {</div><div class='ctx'> 			label = "f2";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 7 GPIO_ACTIVE_LOW&gt;; /* gpio103 */</div><div class='del'>-			linux,code = &lt;0x0403003c&gt;; /* KEY_F2 */</div><div class='add'>+			linux,code = &lt;KEY_F2&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_f3 {</div><div class='ctx'> 			label = "f3";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 8 GPIO_ACTIVE_LOW&gt;; /* gpio104 */</div><div class='del'>-			linux,code = &lt;0x0503003d&gt;; /* KEY_F3 */</div><div class='add'>+			linux,code = &lt;KEY_F3&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_f4 {</div><div class='ctx'> 			label = "f4";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 9 GPIO_ACTIVE_LOW&gt;; /* gpio105 */</div><div class='del'>-			linux,code = &lt;0x0704003e&gt;; /* KEY_F4 */</div><div class='add'>+			linux,code = &lt;KEY_F4&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_left {</div><div class='ctx'> 			label = "left";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 10 GPIO_ACTIVE_LOW&gt;; /* gpio106 */</div><div class='del'>-			linux,code = &lt;0x04070069&gt;; /* KEY_LEFT */</div><div class='add'>+			linux,code = &lt;KEY_LEFT&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_right {</div><div class='ctx'> 			label = "right";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 11 GPIO_ACTIVE_LOW&gt;; /* gpio107 */</div><div class='del'>-			linux,code = &lt;0x0507006a&gt;; /* KEY_RIGHT */</div><div class='add'>+			linux,code = &lt;KEY_RIGHT&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_up {</div><div class='ctx'> 			label = "up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 12 GPIO_ACTIVE_LOW&gt;; /* gpio108 */</div><div class='del'>-			linux,code = &lt;0x06070067&gt;; /* KEY_UP */</div><div class='add'>+			linux,code = &lt;KEY_UP&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key_down {</div><div class='ctx'> 			label = "down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 13 GPIO_ACTIVE_LOW&gt;; /* gpio109 */</div><div class='del'>-			linux,code = &lt;0x0707006c&gt;; /* KEY_DOWN */</div><div class='add'>+			linux,code = &lt;KEY_DOWN&gt;;</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi<br/>index 233c69e50ae3..df8908adb0cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi</a></div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> </div><div class='ctx'> 	lcd0: display@0 {</div><div class='ctx'> 		compatible = "lgphilips,lb035q02";</div><div class='del'>-		label = "lcd";</div><div class='add'>+		label = "lcd35";</div><div class='ctx'> </div><div class='ctx'> 		reg = &lt;1&gt;;					/* CS1 */</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi<br/>index f5395b7da912..048fd216970a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> </div><div class='ctx'> 	lcd0: display@0 {</div><div class='ctx'> 		compatible = "samsung,lte430wq-f0c", "panel-dpi";</div><div class='del'>-		label = "lcd";</div><div class='add'>+		label = "lcd43";</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;lte430_pins&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi<br/>index f884d6adb71e..7d31c6ff246f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap4.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap4.dtsi</a></div><div class='hunk'>@@ -551,6 +551,7 @@</div><div class='ctx'> 			reg = &lt;0x4a066000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			ti,hwmods = "mmu_dsp";</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmu_ipu: mmu@55082000 {</div><div class='hunk'>@@ -558,6 +559,7 @@</div><div class='ctx'> 			reg = &lt;0x55082000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			ti,hwmods = "mmu_ipu";</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 			ti,iommu-bus-err-back;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts<br/>index 74777a6e200a..275618f19a43 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap5-uevm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap5-uevm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap5-uevm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap5-uevm.dts</a></div><div class='hunk'>@@ -597,18 +597,20 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='del'>-        pinctrl-names = "default";</div><div class='del'>-        pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart3 {</div><div class='del'>-        pinctrl-names = "default";</div><div class='del'>-        pinctrl-0 = &lt;&amp;uart3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pins&gt;;</div><div class='add'>+	interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			      &lt;&amp;omap5_pmx_core 0x19c&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='del'>-        pinctrl-names = "default";</div><div class='del'>-        pinctrl-0 = &lt;&amp;uart5_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_pins&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi<br/>index 7d24ae0306b5..c8fd648a7108 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap5.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/omap5.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap5.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/omap5.dtsi</a></div><div class='hunk'>@@ -612,6 +612,7 @@</div><div class='ctx'> 			reg = &lt;0x4a066000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			ti,hwmods = "mmu_dsp";</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmu_ipu: mmu@55082000 {</div><div class='hunk'>@@ -619,6 +620,7 @@</div><div class='ctx'> 			reg = &lt;0x55082000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			ti,hwmods = "mmu_ipu";</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='ctx'> 			ti,iommu-bus-err-back;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi<br/>index 80fc5d7e9ef9..90b99714ad80 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa27x.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/pxa27x.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa27x.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa27x.dtsi</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* The pxa3xx skeleton simply augments the 2xx version */</div><div class='ctx'> #include "pxa2xx.dtsi"</div><div class='del'>-#include "dt-bindings/clock/pxa2xx-clock.h"</div><div class='add'>+#include "dt-bindings/clock/pxa-clock.h"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Marvell PXA27x familiy SoC";</div><div class='hunk'>@@ -12,28 +12,61 @@</div><div class='ctx'> 			marvell,intc-nr-irqs = &lt;34&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpio: gpio@40e00000 {</div><div class='add'>+			compatible = "intel,pxa27x-gpio";</div><div class='add'>+			clocks = &lt;&amp;clks CLK_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pwm0: pwm@40b00000 {</div><div class='ctx'> 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";</div><div class='ctx'> 			reg = &lt;0x40b00000 0x10&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWM0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm1: pwm@40b00010 {</div><div class='ctx'> 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";</div><div class='ctx'> 			reg = &lt;0x40b00010 0x10&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWM1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm2: pwm@40c00000 {</div><div class='ctx'> 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";</div><div class='ctx'> 			reg = &lt;0x40c00000 0x10&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWM0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm3: pwm@40c00010 {</div><div class='ctx'> 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";</div><div class='ctx'> 			reg = &lt;0x40c00010 0x10&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWM1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwri2c: i2c@40f000180 {</div><div class='add'>+			compatible = "mrvl,pxa-i2c";</div><div class='add'>+			reg = &lt;0x40f00180 0x24&gt;;</div><div class='add'>+			interrupts = &lt;6&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWRI2C&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pxa27x_udc: udc@40600000 {</div><div class='add'>+			compatible = "marvell,pxa270-udc";</div><div class='add'>+			reg = &lt;0x40600000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;11&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_USB&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		keypad: keypad@41500000 {</div><div class='add'>+			compatible = "marvell,pxa27x-keypad";</div><div class='add'>+			reg = &lt;0x41500000 0x4c&gt;;</div><div class='add'>+			interrupts = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_KEYPAD&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -46,11 +79,18 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		pxa2xx_clks: pxa2xx_clks@41300004 {</div><div class='del'>-			compatible = "marvell,pxa-clocks";</div><div class='add'>+		clks: pxa2xx_clks@41300004 {</div><div class='add'>+			compatible = "marvell,pxa270-clocks";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	timer@40a00000 {</div><div class='add'>+		compatible = "marvell,pxa-timer";</div><div class='add'>+		reg = &lt;0x40a00000 0x20&gt;;</div><div class='add'>+		interrupts = &lt;26&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks CLK_OSTIMER&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi<br/>index c08f84629aa9..71a0cd7388d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa2xx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/pxa2xx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa2xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa2xx.dtsi</a></div><div class='hunk'>@@ -6,7 +6,8 @@</div><div class='ctx'>  * Licensed under GPLv2 or later.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/include/ "skeleton.dtsi"</div><div class='add'>+#include "skeleton.dtsi"</div><div class='add'>+#include "dt-bindings/clock/pxa-clock.h"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Marvell PXA2xx family SoC";</div><div class='hunk'>@@ -79,6 +80,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxa-uart";</div><div class='ctx'> 			reg = &lt;0x40100000 0x30&gt;;</div><div class='ctx'> 			interrupts = &lt;22&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_FFUART&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +88,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxa-uart";</div><div class='ctx'> 			reg = &lt;0x40200000 0x30&gt;;</div><div class='ctx'> 			interrupts = &lt;21&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_BTUART&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -93,6 +96,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxa-uart";</div><div class='ctx'> 			reg = &lt;0x40700000 0x30&gt;;</div><div class='ctx'> 			interrupts = &lt;20&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_STUART&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -107,6 +111,7 @@</div><div class='ctx'> 			compatible = "mrvl,pxa-i2c";</div><div class='ctx'> 			reg = &lt;0x40301680 0x30&gt;;</div><div class='ctx'> 			interrupts = &lt;18&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;0x1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi<br/>index 83bb0eff697b..7ad0b1771098 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa3xx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/pxa3xx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa3xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/pxa3xx.dtsi</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* The pxa3xx skeleton simply augments the 2xx version */</div><div class='del'>-/include/ "pxa2xx.dtsi"</div><div class='add'>+#include "pxa2xx.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Marvell PXA3xx familiy SoC";</div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> 			compatible = "mrvl,pwri2c";</div><div class='ctx'> 			reg = &lt;0x40f500c0 0x30&gt;;</div><div class='ctx'> 			interrupts = &lt;6&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_PWRI2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;0x1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -19,6 +20,7 @@</div><div class='ctx'> 			compatible = "marvell,pxa3xx-nand";</div><div class='ctx'> 			reg = &lt;0x43100000 90&gt;;</div><div class='ctx'> 			interrupts = &lt;45&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_NAND&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;	</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -32,6 +34,7 @@</div><div class='ctx'> 		gpio: gpio@40e00000 {</div><div class='ctx'> 			compatible = "intel,pxa3xx-gpio";</div><div class='ctx'> 			reg = &lt;0x40e00000 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks CLK_GPIO&gt;;</div><div class='ctx'> 			interrupt-names = "gpio0", "gpio1", "gpio_mux";</div><div class='ctx'> 			interrupts = &lt;8 9 10&gt;;</div><div class='ctx'> 			gpio-controller;</div><div class='hunk'>@@ -40,4 +43,28 @@</div><div class='ctx'> 			#interrupt-cells = &lt;0x2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+	       /*</div><div class='add'>+		* The muxing of external clocks/internal dividers for osc* clock</div><div class='add'>+		* sources has been hidden under the carpet by now.</div><div class='add'>+		*/</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		clks: pxa3xx_clks@41300004 {</div><div class='add'>+			compatible = "marvell,pxa300-clocks";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer@40a00000 {</div><div class='add'>+		compatible = "marvell,pxa-timer";</div><div class='add'>+		reg = &lt;0x40a00000 0x20&gt;;</div><div class='add'>+		interrupts = &lt;26&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks CLK_OSTIMER&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts<br/>index 5d75666f7f6c..71512b3ca444 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts</a></div><div class='hunk'>@@ -14,6 +14,67 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rpm@108000 {</div><div class='add'>+			regulators {</div><div class='add'>+				vin_lvs1_3_6-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+				vin_lvs2-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vin_lvs4_5_7-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+				vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+				vdd_l24-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vdd_l25-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vdd_l26-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+				vdd_l27-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+				vdd_l28-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+				/* Buck SMPS */</div><div class='add'>+				pm8921_s1: s1 {</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s3: s3 {</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;4800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s4: s4 {</div><div class='add'>+					regulator-min-microvolt	= &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s7: s7 {</div><div class='add'>+					regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l3: l3 {</div><div class='add'>+					regulator-min-microvolt = &lt;3050000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l4: l4 {</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l23: l23 {</div><div class='add'>+					regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gsbi@12440000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			qcom,mode = &lt;GSBI_PROT_I2C&gt;;</div><div class='hunk'>@@ -40,6 +101,45 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* OTG */</div><div class='add'>+		usb1_phy: phy@12500000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3_phy: phy@12520000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4_phy: phy@12530000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gadget1: gadget@12500000 {</div><div class='add'>+			status = "ok";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* OTG */</div><div class='add'>+		usb1: usb@12500000 {</div><div class='add'>+			status = "ok";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3: usb@12520000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4: usb@12530000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		amba {</div><div class='ctx'> 			/* eMMC */</div><div class='ctx'> 			sdcc1: sdcc@12400000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts<br/>index e641001ca2a7..a7c939ba8873 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-apq8064-ifc6410.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064-ifc6410.dts</a></div><div class='hunk'>@@ -5,15 +5,12 @@</div><div class='ctx'> 	model = "Qualcomm APQ8064/IFC6410";</div><div class='ctx'> 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;gsbi7_serial;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		pinctrl@800000 {</div><div class='del'>-			i2c1_pins: i2c1 {</div><div class='del'>-				mux {</div><div class='del'>-					pins = "gpio20", "gpio21";</div><div class='del'>-					function = "gsbi1";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			card_detect: card_detect {</div><div class='ctx'> 				mux {</div><div class='ctx'> 					pins = "gpio26";</div><div class='hunk'>@@ -23,6 +20,83 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rpm@108000 {</div><div class='add'>+			regulators {</div><div class='add'>+				vin_lvs1_3_6-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+				vin_lvs2-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vin_lvs4_5_7-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+				vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+				vdd_l24-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vdd_l25-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+				vdd_l26-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+				vdd_l27-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+				vdd_l28-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+				/* Buck SMPS */</div><div class='add'>+				pm8921_s1: s1 {</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s3: s3 {</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;4800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s4: s4 {</div><div class='add'>+					regulator-min-microvolt	= &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt	= &lt;1800000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_s7: s7 {</div><div class='add'>+					regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+					qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l3: l3 {</div><div class='add'>+					regulator-min-microvolt = &lt;3050000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l4: l4 {</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l6: l6 {</div><div class='add'>+					regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pm8921_l23: l23 {</div><div class='add'>+					regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gsbi3: gsbi@16200000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			qcom,mode = &lt;GSBI_PROT_I2C&gt;;</div><div class='add'>+			i2c3: i2c@16280000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gsbi@12440000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			qcom,mode = &lt;GSBI_PROT_I2C&gt;;</div><div class='hunk'>@@ -49,6 +123,54 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sata_phy0: phy@1b400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata0: sata@29000000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			target-supply	= &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* OTG */</div><div class='add'>+		usb1_phy: phy@12500000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3_phy: phy@12520000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4_phy: phy@12530000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+			vddcx-supply	= &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+			v3p3-supply	= &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+			v1p8-supply	= &lt;&amp;pm8921_l23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gadget1: gadget@12500000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* OTG */</div><div class='add'>+		usb1: usb@12500000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3: usb@12520000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4: usb@12530000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		amba {</div><div class='ctx'> 			/* eMMC */</div><div class='ctx'> 			sdcc1: sdcc@12400000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi<br/>index 6c1511263a55..df2061ec630d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-apq8064.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-apq8064.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-apq8064.dtsi</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8960.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/qcom,gcc-msm8960.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-msm8960.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,gsbi.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -112,6 +113,20 @@</div><div class='ctx'> 					function = "ps_hold";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1 {</div><div class='add'>+				mux {</div><div class='add'>+					pins = "gpio20", "gpio21";</div><div class='add'>+					function = "gsbi1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3 {</div><div class='add'>+				mux {</div><div class='add'>+					pins = "gpio8", "gpio9";</div><div class='add'>+					function = "gsbi3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@2000000 {</div><div class='hunk'>@@ -225,6 +240,26 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gsbi3: gsbi@16200000 {</div><div class='add'>+			status = "disabled";</div><div class='add'>+			compatible = "qcom,gsbi-v1.0.0";</div><div class='add'>+			reg = &lt;0x16200000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GSBI3_H_CLK&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@16280000 {</div><div class='add'>+				compatible = "qcom,i2c-qup-v1.1.1";</div><div class='add'>+				reg = &lt;0x16280000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 151 IRQ_TYPE_NONE&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GSBI3_QUP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GSBI3_H_CLK&gt;;</div><div class='add'>+				clock-names = "core", "iface";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gsbi7: gsbi@16600000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			compatible = "qcom,gsbi-v1.0.0";</div><div class='hunk'>@@ -235,10 +270,9 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='del'>-</div><div class='ctx'> 			syscon-tcsr = &lt;&amp;tcsr&gt;;</div><div class='ctx'> </div><div class='del'>-			serial@16640000 {</div><div class='add'>+			gsbi7_serial: serial@16640000 {</div><div class='ctx'> 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='ctx'> 				reg = &lt;0x16640000 0x1000&gt;,</div><div class='ctx'> 				      &lt;0x16600000 0x1000&gt;;</div><div class='hunk'>@@ -276,6 +310,143 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		l2cc: clock-controller@2011000 {</div><div class='add'>+			compatible	= "syscon";</div><div class='add'>+			reg		= &lt;0x2011000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rpm@108000 {</div><div class='add'>+			compatible	= "qcom,rpm-apq8064";</div><div class='add'>+			reg		= &lt;0x108000 0x1000&gt;;</div><div class='add'>+			qcom,ipc	= &lt;&amp;l2cc 0x8 2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts	= &lt;GIC_SPI 19 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					  &lt;GIC_SPI 21 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					  &lt;GIC_SPI 22 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names	= "ack", "err", "wakeup";</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				compatible = "qcom,rpm-pm8921-regulators";</div><div class='add'>+</div><div class='add'>+				pm8921_hdmi_switch: hdmi-switch {</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1_phy: phy@12500000 {</div><div class='add'>+			compatible	= "qcom,usb-otg-ci";</div><div class='add'>+			reg		= &lt;0x12500000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 100 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			dr_mode		= "host";</div><div class='add'>+</div><div class='add'>+			clocks		= &lt;&amp;gcc USB_HS1_XCVR_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc USB_HS1_H_CLK&gt;;</div><div class='add'>+			clock-names	= "core", "iface";</div><div class='add'>+</div><div class='add'>+			resets		= &lt;&amp;gcc USB_HS1_RESET&gt;;</div><div class='add'>+			reset-names	= "link";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3_phy: phy@12520000 {</div><div class='add'>+			compatible	= "qcom,usb-otg-ci";</div><div class='add'>+			reg		= &lt;0x12520000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 188 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			dr_mode		= "host";</div><div class='add'>+</div><div class='add'>+			clocks		= &lt;&amp;gcc USB_HS3_XCVR_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc USB_HS3_H_CLK&gt;;</div><div class='add'>+			clock-names	= "core", "iface";</div><div class='add'>+</div><div class='add'>+			resets		= &lt;&amp;gcc USB_HS3_RESET&gt;;</div><div class='add'>+			reset-names	= "link";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4_phy: phy@12530000 {</div><div class='add'>+			compatible	= "qcom,usb-otg-ci";</div><div class='add'>+			reg		= &lt;0x12530000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 215 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			dr_mode		= "host";</div><div class='add'>+</div><div class='add'>+			clocks		= &lt;&amp;gcc USB_HS4_XCVR_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc USB_HS4_H_CLK&gt;;</div><div class='add'>+			clock-names	= "core", "iface";</div><div class='add'>+</div><div class='add'>+			resets		= &lt;&amp;gcc USB_HS4_RESET&gt;;</div><div class='add'>+			reset-names	= "link";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gadget1: gadget@12500000 {</div><div class='add'>+			compatible	= "qcom,ci-hdrc";</div><div class='add'>+			reg		= &lt;0x12500000 0x400&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			dr_mode		= "peripheral";</div><div class='add'>+			interrupts	= &lt;GIC_SPI 100 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			usb-phy		= &lt;&amp;usb1_phy&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1: usb@12500000 {</div><div class='add'>+			compatible	= "qcom,ehci-host";</div><div class='add'>+			reg		= &lt;0x12500000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 100 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			usb-phy		= &lt;&amp;usb1_phy&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3: usb@12520000 {</div><div class='add'>+			compatible	= "qcom,ehci-host";</div><div class='add'>+			reg		= &lt;0x12520000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 188 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			usb-phy		= &lt;&amp;usb3_phy&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb4: usb@12530000 {</div><div class='add'>+			compatible	= "qcom,ehci-host";</div><div class='add'>+			reg		= &lt;0x12530000 0x400&gt;;</div><div class='add'>+			interrupts	= &lt;GIC_SPI 215 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			usb-phy		= &lt;&amp;usb4_phy&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata_phy0: phy@1b400000 {</div><div class='add'>+			compatible	= "qcom,apq8064-sata-phy";</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			reg		= &lt;0x1b400000 0x200&gt;;</div><div class='add'>+			reg-names	= "phy_mem";</div><div class='add'>+			clocks		= &lt;&amp;gcc SATA_PHY_CFG_CLK&gt;;</div><div class='add'>+			clock-names	= "cfg";</div><div class='add'>+			#phy-cells	= &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata0: sata@29000000 {</div><div class='add'>+			compatible		= "generic-ahci";</div><div class='add'>+			status			= "disabled";</div><div class='add'>+			reg			= &lt;0x29000000 0x180&gt;;</div><div class='add'>+			interrupts		= &lt;GIC_SPI 209 IRQ_TYPE_NONE&gt;;</div><div class='add'>+</div><div class='add'>+			clocks			= &lt;&amp;gcc SFAB_SATA_S_H_CLK&gt;,</div><div class='add'>+						&lt;&amp;gcc SATA_H_CLK&gt;,</div><div class='add'>+						&lt;&amp;gcc SATA_A_CLK&gt;,</div><div class='add'>+						&lt;&amp;gcc SATA_RXOOB_CLK&gt;,</div><div class='add'>+						&lt;&amp;gcc SATA_PMALIVE_CLK&gt;;</div><div class='add'>+			clock-names		= "slave_iface",</div><div class='add'>+						"iface",</div><div class='add'>+						"bus",</div><div class='add'>+						"rxoob",</div><div class='add'>+						"core_pmalive";</div><div class='add'>+</div><div class='add'>+			assigned-clocks		= &lt;&amp;gcc SATA_RXOOB_CLK&gt;,</div><div class='add'>+						&lt;&amp;gcc SATA_PMALIVE_CLK&gt;;</div><div class='add'>+			assigned-clock-rates	= &lt;100000000&gt;, &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			phys			= &lt;&amp;sata_phy0&gt;;</div><div class='add'>+			phy-names		= "sata-phy";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		/* Temporary fixed regulator */</div><div class='ctx'> 		vsdcc_fixed: vsdcc-regulator {</div><div class='ctx'> 			compatible = "regulator-fixed";</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi<br/>index 20bbd19b996e..e0b2ce2910e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-msm8660.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-msm8660.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-msm8660.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-msm8660.dtsi</a></div><div class='hunk'>@@ -37,6 +37,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cpu-pmu {</div><div class='add'>+		compatible = "qcom,scorpion-mp-pmu";</div><div class='add'>+		interrupts = &lt;1 9 0x304&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi<br/>index 73813cc118f9..8f1a0b162017 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pm8841.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-pm8841.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pm8841.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pm8841.dtsi</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;spmi_bus {</div><div class='hunk'>@@ -7,6 +8,23 @@</div><div class='ctx'> 		reg = &lt;0x4 SPMI_USID&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8841_mpps: mpps@a000 {</div><div class='add'>+			compatible = "qcom,pm8841-mpp";</div><div class='add'>+			reg = &lt;0xa000 0x400&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;4 0xa0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;4 0xa1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;4 0xa2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;4 0xa3 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		temp-alarm@2400 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0x2400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;4 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usid5: pm8841@5 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi<br/>index 24c5088acea2..aa774e685018 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pm8941.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-pm8941.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pm8941.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pm8941.dtsi</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-vadc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;spmi_bus {</div><div class='hunk'>@@ -7,12 +9,141 @@</div><div class='ctx'> 		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rtc@6000 {</div><div class='add'>+			compatible = "qcom,pm8941-rtc";</div><div class='add'>+			reg = &lt;0x6000 0x100&gt;,</div><div class='add'>+			      &lt;0x6100 0x100&gt;;</div><div class='add'>+			reg-names = "rtc", "alarm";</div><div class='add'>+			interrupts = &lt;0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwrkey@800 {</div><div class='add'>+			compatible = "qcom,pm8941-pwrkey";</div><div class='add'>+			reg = &lt;0x800 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x8 0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			debounce = &lt;15625&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_gpios: gpios@c000 {</div><div class='add'>+			compatible = "qcom,pm8941-gpio";</div><div class='add'>+			reg = &lt;0xc000 0x2400&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xc0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc5 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc6 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc7 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc8 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc9 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xca 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcb 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcc 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcd 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xce 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcf 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd5 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd6 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd7 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd8 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd9 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xda 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xdb 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xdc 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xdd 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xde 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xdf 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xe0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xe1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xe2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xe3 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_mpps: mpps@a000 {</div><div class='add'>+			compatible = "qcom,pm8941-mpp";</div><div class='add'>+			reg = &lt;0xa000 0x800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xa0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa5 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa6 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa7 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_temp: temp-alarm@2400 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0x2400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			io-channels = &lt;&amp;pm8941_vadc VADC_DIE_TEMP&gt;;</div><div class='add'>+			io-channel-names = "thermal";</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_vadc: vadc@3100 {</div><div class='add'>+			compatible = "qcom,spmi-vadc";</div><div class='add'>+			reg = &lt;0x3100 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			die_temp {</div><div class='add'>+				reg = &lt;VADC_DIE_TEMP&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_625mv {</div><div class='add'>+				reg = &lt;VADC_REF_625MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_1250v {</div><div class='add'>+				reg = &lt;VADC_REF_1250MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_gnd {</div><div class='add'>+				reg = &lt;VADC_GND_REF&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_vdd {</div><div class='add'>+				reg = &lt;VADC_VDD_VADC&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_iadc: iadc@3600 {</div><div class='add'>+			compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";</div><div class='add'>+			reg = &lt;0x3600 0x100&gt;,</div><div class='add'>+				  &lt;0x12f1 0x1&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			qcom,external-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usid1: pm8941@1 {</div><div class='del'>-		compatible ="qcom,spmi-pmic";</div><div class='add'>+		compatible = "qcom,spmi-pmic";</div><div class='ctx'> 		reg = &lt;0x1 SPMI_USID&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		wled@d800 {</div><div class='add'>+			compatible = "qcom,pm8941-wled";</div><div class='add'>+			reg = &lt;0xd800 0x100&gt;;</div><div class='add'>+			label = "backlight";</div><div class='add'>+</div><div class='add'>+			qcom,cs-out;</div><div class='add'>+			qcom,current-limit = &lt;20&gt;;</div><div class='add'>+			qcom,current-boost-limit = &lt;805&gt;;</div><div class='add'>+			qcom,switching-freq = &lt;1600&gt;;</div><div class='add'>+			qcom,ovp = &lt;29&gt;;</div><div class='add'>+			qcom,num-strings = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi<br/>index a5a4fe695a46..5e240ccc08b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pma8084.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/qcom-pma8084.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/qcom-pma8084.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/qcom-pma8084.dtsi</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-vadc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;spmi_bus {</div><div class='hunk'>@@ -7,6 +9,96 @@</div><div class='ctx'> 		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rtc@6000 {</div><div class='add'>+			compatible = "qcom,pm8941-rtc";</div><div class='add'>+			reg = &lt;0x6000 0x100&gt;,</div><div class='add'>+			      &lt;0x6100 0x100&gt;;</div><div class='add'>+			reg-names = "rtc", "alarm";</div><div class='add'>+			interrupts = &lt;0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_gpios: gpios@c000 {</div><div class='add'>+			compatible = "qcom,pma8084-gpio";</div><div class='add'>+			reg = &lt;0xc000 0x1600&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xc0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc5 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc6 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc7 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc8 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc9 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xca 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcb 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcc 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcd 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xce 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xcf 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xd5 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_mpps: mpps@a000 {</div><div class='add'>+			compatible = "qcom,pma8084-mpp";</div><div class='add'>+			reg = &lt;0xa000 0x800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xa0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa3 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa4 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa5 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa6 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa7 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_temp: temp-alarm@2400 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0x2400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+			io-channels = &lt;&amp;pma8084_vadc VADC_DIE_TEMP&gt;;</div><div class='add'>+			io-channel-names = "thermal";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_vadc: vadc@3100 {</div><div class='add'>+			compatible = "qcom,spmi-vadc";</div><div class='add'>+			reg = &lt;0x3100 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			io-channel-ranges;</div><div class='add'>+</div><div class='add'>+			die_temp {</div><div class='add'>+				reg = &lt;VADC_DIE_TEMP&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_625mv {</div><div class='add'>+				reg = &lt;VADC_REF_625MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_1250v {</div><div class='add'>+				reg = &lt;VADC_REF_1250MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_buf_625mv {</div><div class='add'>+				reg = &lt;VADC_SPARE1&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_gnd {</div><div class='add'>+				reg = &lt;VADC_GND_REF&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_vdd {</div><div class='add'>+				reg = &lt;VADC_VDD_VADC&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usid1: pma8084@1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts<br/>index 81a38ceee098..a4c425923c05 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a73a4-ape6evm.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a73a4-ape6evm.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a73a4-ape6evm.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a73a4-ape6evm.dts</a></div><div class='hunk'>@@ -147,7 +147,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c5 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	vdd_dvfs: max8973@1b {</div><div class='add'>+	vdd_dvfs: regulator@1b {</div><div class='ctx'> 		compatible = "maxim,max8973";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi<br/>index 0fd889f88109..7ee22a41c6c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a73a4.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a73a4.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a73a4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a73a4.dtsi</a></div><div class='hunk'>@@ -163,6 +163,7 @@</div><div class='ctx'> 			     &lt;0 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp4_clks R8A73A4_CLK_IRQC&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_c4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -197,6 +198,7 @@</div><div class='ctx'> 			     &lt;0 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp4_clks R8A73A4_CLK_IRQC&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_c4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -724,15 +726,16 @@</div><div class='ctx'> 		mstp4_clks: mstp4_clks@e6150140 {</div><div class='ctx'> 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='ctx'> 			reg = &lt;0 0xe6150140 0 4&gt;, &lt;0 0xe615004c 0 4&gt;;</div><div class='del'>-			clocks = &lt;&amp;main_div2_clk&gt;, &lt;&amp;cpg_clocks R8A73A4_CLK_HP&gt;,</div><div class='add'>+			clocks = &lt;&amp;main_div2_clk&gt;, &lt;&amp;main_div2_clk&gt;,</div><div class='add'>+				 &lt;&amp;cpg_clocks R8A73A4_CLK_HP&gt;,</div><div class='ctx'> 				 &lt;&amp;cpg_clocks R8A73A4_CLK_HP&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clock-indices = &lt;</div><div class='del'>-				R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4</div><div class='del'>-				R8A73A4_CLK_IIC3</div><div class='add'>+				R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5</div><div class='add'>+				R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3</div><div class='ctx'> 			&gt;;</div><div class='ctx'> 			clock-output-names =</div><div class='del'>-				"iic5", "iic4", "iic3";</div><div class='add'>+				"irqc", "iic5", "iic4", "iic3";</div><div class='ctx'> 		};</div><div class='ctx'> 		mstp5_clks: mstp5_clks@e6150144 {</div><div class='ctx'> 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts<br/>index 9bd0cb439f44..2e31d8c01cbf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7740-armadillo800eva.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7740-armadillo800eva.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7740-armadillo800eva.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7740-armadillo800eva.dts</a></div><div class='hunk'>@@ -208,7 +208,7 @@</div><div class='ctx'> 		gpios = &lt;&amp;pfc 166 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wm8978: wm8978@1a {</div><div class='add'>+	wm8978: codec@1a {</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "wlf,wm8978";</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi<br/>index 83c1c3ca1b8f..d84714468cce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7740.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7740.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7740.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7740.dtsi</a></div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* irqpin0: IRQ0 - IRQ7 */</div><div class='del'>-	irqpin0: irqpin@e6900000 {</div><div class='add'>+	irqpin0: interrupt-controller@e6900000 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* irqpin1: IRQ8 - IRQ15 */</div><div class='del'>-	irqpin1: irqpin@e6900004 {</div><div class='add'>+	irqpin1: interrupt-controller@e6900004 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* irqpin2: IRQ16 - IRQ23 */</div><div class='del'>-	irqpin2: irqpin@e6900008 {</div><div class='add'>+	irqpin2: interrupt-controller@e6900008 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* irqpin3: IRQ24 - IRQ31 */</div><div class='del'>-	irqpin3: irqpin@e690000c {</div><div class='add'>+	irqpin3: interrupt-controller@e690000c {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -275,7 +275,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	scifb8: serial@e6c30000 {</div><div class='add'>+	scifb: serial@e6c30000 {</div><div class='ctx'> 		compatible = "renesas,scifb-r8a7740", "renesas,scifb";</div><div class='ctx'> 		reg = &lt;0xe6c30000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts<br/>index 04c0c37bb784..dffa6ff30360 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778-bockw-reference.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7778-bockw-reference.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778-bockw-reference.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778-bockw-reference.dts</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "spansion,s25fl008k";</div><div class='add'>+		compatible = "spansion,s25fl008k", "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts<br/>index 787fa6f9f46d..90543b12d7e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778-bockw.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7778-bockw.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778-bockw.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778-bockw.dts</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	ak4643: sound-codec@12 {</div><div class='add'>+	ak4643: codec@12 {</div><div class='ctx'> 		compatible = "asahi-kasei,ak4643";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x12&gt;;</div><div class='hunk'>@@ -186,7 +186,7 @@</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "spansion,s25fl008k";</div><div class='add'>+		compatible = "spansion,s25fl008k", "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi<br/>index 868f97309533..7ce9f5fd5865 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7778.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7778.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7778.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* irqpin: IRQ0 - IRQ3 */</div><div class='del'>-	irqpin: irqpin@fe78001c {</div><div class='add'>+	irqpin: interrupt-controller@fe78001c {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts<br/>index 540756cdf391..20afea6f06ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7779-marzen.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7779-marzen.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7779-marzen.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7779-marzen.dts</a></div><div class='hunk'>@@ -42,10 +42,10 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lan0@18000000 {</div><div class='add'>+	ethernet@18000000 {</div><div class='ctx'> 		compatible = "smsc,lan9220", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x18000000 0x100&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan0_pins&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;ethernet_pins&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		phy-mode = "mii";</div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lan0_pins: lan0 {</div><div class='add'>+	ethernet_pins: ethernet {</div><div class='ctx'> 		intc {</div><div class='ctx'> 			renesas,groups = "intc_irq1_b";</div><div class='ctx'> 			renesas,function = "intc";</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi<br/>index 5c2219b9f3eb..5c8071e87ae9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7779.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7779.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7779.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7779.dtsi</a></div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	irqpin0: irqpin@fe780010 {</div><div class='add'>+	irqpin0: interrupt-controller@fe780010 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts<br/>index aaa4f258e279..2eb8a995ae9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7790-lager.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7790-lager.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7790-lager.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7790-lager.dts</a></div><div class='hunk'>@@ -429,7 +429,7 @@</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "spansion,s25fl512s";</div><div class='add'>+		compatible = "spansion,s25fl512s", "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='hunk'>@@ -525,7 +525,7 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	ak4643: sound-codec@12 {</div><div class='add'>+	ak4643: codec@12 {</div><div class='ctx'> 		compatible = "asahi-kasei,ak4643";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x12&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi<br/>index 4bb2f4c17321..51ab8865ea37 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7790.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7790.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7790.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7790.dtsi</a></div><div class='hunk'>@@ -252,6 +252,7 @@</div><div class='ctx'> 			     &lt;0 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp4_clks R8A7790_CLK_IRQC&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dmac0: dma-controller@e6700000 {</div><div class='hunk'>@@ -370,6 +371,28 @@</div><div class='ctx'> 		dma-channels = &lt;13&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usb_dmac0: dma-controller@e65a0000 {</div><div class='add'>+		compatible = "renesas,usb-dmac";</div><div class='add'>+		reg = &lt;0 0xe65a0000 0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 109 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1";</div><div class='add'>+		clocks = &lt;&amp;mstp3_clks R8A7790_CLK_USBDMAC0&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-channels = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_dmac1: dma-controller@e65b0000 {</div><div class='add'>+		compatible = "renesas,usb-dmac";</div><div class='add'>+		reg = &lt;0 0xe65b0000 0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 110 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1";</div><div class='add'>+		clocks = &lt;&amp;mstp3_clks R8A7790_CLK_USBDMAC1&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-channels = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c0: i2c@e6508000 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -467,6 +490,7 @@</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='add'>+		max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mmcif1: mmc@ee220000 {</div><div class='hunk'>@@ -478,6 +502,7 @@</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='add'>+		max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pfc: pfc@e6060000 {</div><div class='hunk'>@@ -531,6 +556,8 @@</div><div class='ctx'> 		interrupts = &lt;0 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFA0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -540,6 +567,8 @@</div><div class='ctx'> 		interrupts = &lt;0 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFA1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x25&gt;, &lt;&amp;dmac0 0x26&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -549,6 +578,8 @@</div><div class='ctx'> 		interrupts = &lt;0 151 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFA2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x27&gt;, &lt;&amp;dmac0 0x28&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -558,6 +589,8 @@</div><div class='ctx'> 		interrupts = &lt;0 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFB0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x3d&gt;, &lt;&amp;dmac0 0x3e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -567,6 +600,8 @@</div><div class='ctx'> 		interrupts = &lt;0 149 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFB1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x19&gt;, &lt;&amp;dmac0 0x1a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -576,6 +611,8 @@</div><div class='ctx'> 		interrupts = &lt;0 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_SCIFB2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1d&gt;, &lt;&amp;dmac0 0x1e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -585,6 +622,8 @@</div><div class='ctx'> 		interrupts = &lt;0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7790_CLK_SCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x29&gt;, &lt;&amp;dmac0 0x2a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -594,6 +633,8 @@</div><div class='ctx'> 		interrupts = &lt;0 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7790_CLK_SCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2d&gt;, &lt;&amp;dmac0 0x2e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -603,6 +644,8 @@</div><div class='ctx'> 		interrupts = &lt;0 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7790_CLK_HSCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x39&gt;, &lt;&amp;dmac0 0x3a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -612,6 +655,8 @@</div><div class='ctx'> 		interrupts = &lt;0 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7790_CLK_HSCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x4d&gt;, &lt;&amp;dmac0 0x4e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -650,6 +695,9 @@</div><div class='ctx'> 		renesas,buswait = &lt;4&gt;;</div><div class='ctx'> 		phys = &lt;&amp;usb0 1&gt;;</div><div class='ctx'> 		phy-names = "usb";</div><div class='add'>+		dmas = &lt;&amp;usb_dmac0 0&gt;, &lt;&amp;usb_dmac0 1&gt;,</div><div class='add'>+		       &lt;&amp;usb_dmac1 0&gt;, &lt;&amp;usb_dmac1 1&gt;;</div><div class='add'>+		dma-names = "ch0", "ch1", "ch2", "ch3";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1158,6 +1206,14 @@</div><div class='ctx'> 				"iic0", "pciec", "iic1", "ssusb", "cmt1",</div><div class='ctx'> 				"usbdmac0", "usbdmac1";</div><div class='ctx'> 		};</div><div class='add'>+		mstp4_clks: mstp4_clks@e6150140 {</div><div class='add'>+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='add'>+			reg = &lt;0 0xe6150140 0 4&gt;, &lt;0 0xe615004c 0 4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cp_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-indices = &lt;R8A7790_CLK_IRQC&gt;;</div><div class='add'>+			clock-output-names = "irqc";</div><div class='add'>+		};</div><div class='ctx'> 		mstp5_clks: mstp5_clks@e6150144 {</div><div class='ctx'> 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='ctx'> 			reg = &lt;0 0xe6150144 0 4&gt;, &lt;0 0xe615003c 0 4&gt;;</div><div class='hunk'>@@ -1273,7 +1329,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof0: spi@e6e20000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7790";</div><div class='del'>-		reg = &lt;0 0xe6e20000 0 0x0064&gt;, &lt;0 0xe7e20000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e20000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp0_clks R8A7790_CLK_MSIOF0&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x51&gt;, &lt;&amp;dmac0 0x52&gt;;</div><div class='hunk'>@@ -1285,7 +1341,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof1: spi@e6e10000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7790";</div><div class='del'>-		reg = &lt;0 0xe6e10000 0 0x0064&gt;, &lt;0 0xe7e10000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e10000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_MSIOF1&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x55&gt;, &lt;&amp;dmac0 0x56&gt;;</div><div class='hunk'>@@ -1297,7 +1353,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof2: spi@e6e00000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7790";</div><div class='del'>-		reg = &lt;0 0xe6e00000 0 0x0064&gt;, &lt;0 0xe7e00000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e00000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 158 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_MSIOF2&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x41&gt;, &lt;&amp;dmac0 0x42&gt;;</div><div class='hunk'>@@ -1309,7 +1365,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof3: spi@e6c90000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7790";</div><div class='del'>-		reg = &lt;0 0xe6c90000 0 0x0064&gt;, &lt;0 0xe7c90000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6c90000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7790_CLK_MSIOF3&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x45&gt;, &lt;&amp;dmac0 0x46&gt;;</div><div class='hunk'>@@ -1442,7 +1498,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rcar_sound: rcar_sound@ec500000 {</div><div class='add'>+	rcar_sound: sound@ec500000 {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * #sound-dai-cells is required</div><div class='ctx'> 		 *</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts<br/>index e33e4047b0b0..655d1804e5e9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791-henninger.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7791-henninger.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791-henninger.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791-henninger.dts</a></div><div class='hunk'>@@ -226,7 +226,7 @@</div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "spansion,s25fl512s";</div><div class='add'>+		compatible = "spansion,s25fl512s", "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts<br/>index 824ddab9c3ad..cffe33ff4d16 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791-koelsch.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7791-koelsch.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791-koelsch.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791-koelsch.dts</a></div><div class='hunk'>@@ -474,7 +474,7 @@</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "spansion,s25fl512s";</div><div class='add'>+		compatible = "spansion,s25fl512s", "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='hunk'>@@ -522,7 +522,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	ak4643: sound-codec@12 {</div><div class='add'>+	ak4643: codec@12 {</div><div class='ctx'> 		compatible = "asahi-kasei,ak4643";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x12&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi<br/>index 4696062f6dde..dc1cd3f16606 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7791.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7791.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7791.dtsi</a></div><div class='hunk'>@@ -239,6 +239,7 @@</div><div class='ctx'> 			     &lt;0 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp4_clks R8A7791_CLK_IRQC&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dmac0: dma-controller@e6700000 {</div><div class='hunk'>@@ -357,6 +358,28 @@</div><div class='ctx'> 		dma-channels = &lt;13&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usb_dmac0: dma-controller@e65a0000 {</div><div class='add'>+		compatible = "renesas,usb-dmac";</div><div class='add'>+		reg = &lt;0 0xe65a0000 0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 109 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1";</div><div class='add'>+		clocks = &lt;&amp;mstp3_clks R8A7791_CLK_USBDMAC0&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-channels = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_dmac1: dma-controller@e65b0000 {</div><div class='add'>+		compatible = "renesas,usb-dmac";</div><div class='add'>+		reg = &lt;0 0xe65b0000 0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 110 IRQ_TYPE_LEVEL_HIGH</div><div class='add'>+			      0 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1";</div><div class='add'>+		clocks = &lt;&amp;mstp3_clks R8A7791_CLK_USBDMAC1&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-channels = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* The memory map in the User's Manual maps the cores to bus numbers */</div><div class='ctx'> 	i2c0: i2c@e6508000 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -471,6 +494,7 @@</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='add'>+		max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhi0: sd@ee100000 {</div><div class='hunk'>@@ -509,6 +533,8 @@</div><div class='ctx'> 		interrupts = &lt;0 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFA0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -518,6 +544,8 @@</div><div class='ctx'> 		interrupts = &lt;0 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFA1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x25&gt;, &lt;&amp;dmac0 0x26&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -527,6 +555,8 @@</div><div class='ctx'> 		interrupts = &lt;0 151 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFA2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x27&gt;, &lt;&amp;dmac0 0x28&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -536,6 +566,8 @@</div><div class='ctx'> 		interrupts = &lt;0 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7791_CLK_SCIFA3&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1b&gt;, &lt;&amp;dmac0 0x1c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -545,6 +577,8 @@</div><div class='ctx'> 		interrupts = &lt;0 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7791_CLK_SCIFA4&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1f&gt;, &lt;&amp;dmac0 0x20&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -554,6 +588,8 @@</div><div class='ctx'> 		interrupts = &lt;0 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7791_CLK_SCIFA5&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x23&gt;, &lt;&amp;dmac0 0x24&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -563,6 +599,8 @@</div><div class='ctx'> 		interrupts = &lt;0 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFB0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x3d&gt;, &lt;&amp;dmac0 0x3e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -572,6 +610,8 @@</div><div class='ctx'> 		interrupts = &lt;0 149 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFB1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x19&gt;, &lt;&amp;dmac0 0x1a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -581,6 +621,8 @@</div><div class='ctx'> 		interrupts = &lt;0 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_SCIFB2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1d&gt;, &lt;&amp;dmac0 0x1e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -590,6 +632,8 @@</div><div class='ctx'> 		interrupts = &lt;0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x29&gt;, &lt;&amp;dmac0 0x2a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -599,6 +643,8 @@</div><div class='ctx'> 		interrupts = &lt;0 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2d&gt;, &lt;&amp;dmac0 0x2e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -608,6 +654,8 @@</div><div class='ctx'> 		interrupts = &lt;0 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2b&gt;, &lt;&amp;dmac0 0x2c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -617,6 +665,8 @@</div><div class='ctx'> 		interrupts = &lt;0 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF3&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2f&gt;, &lt;&amp;dmac0 0x30&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -626,6 +676,8 @@</div><div class='ctx'> 		interrupts = &lt;0 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF4&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0xfb&gt;, &lt;&amp;dmac0 0xfc&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -635,6 +687,8 @@</div><div class='ctx'> 		interrupts = &lt;0 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_SCIF5&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0xfd&gt;, &lt;&amp;dmac0 0xfe&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -644,6 +698,8 @@</div><div class='ctx'> 		interrupts = &lt;0 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_HSCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x39&gt;, &lt;&amp;dmac0 0x3a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -653,6 +709,8 @@</div><div class='ctx'> 		interrupts = &lt;0 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_HSCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x4d&gt;, &lt;&amp;dmac0 0x4e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -662,6 +720,8 @@</div><div class='ctx'> 		interrupts = &lt;0 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7791_CLK_HSCIF2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x3b&gt;, &lt;&amp;dmac0 0x3c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -700,6 +760,9 @@</div><div class='ctx'> 		renesas,buswait = &lt;4&gt;;</div><div class='ctx'> 		phys = &lt;&amp;usb0 1&gt;;</div><div class='ctx'> 		phy-names = "usb";</div><div class='add'>+		dmas = &lt;&amp;usb_dmac0 0&gt;, &lt;&amp;usb_dmac0 1&gt;,</div><div class='add'>+		       &lt;&amp;usb_dmac1 0&gt;, &lt;&amp;usb_dmac1 1&gt;;</div><div class='add'>+		dma-names = "ch0", "ch1", "ch2", "ch3";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1160,6 +1223,14 @@</div><div class='ctx'> 				"mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",</div><div class='ctx'> 				"usbdmac0", "usbdmac1";</div><div class='ctx'> 		};</div><div class='add'>+		mstp4_clks: mstp4_clks@e6150140 {</div><div class='add'>+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='add'>+			reg = &lt;0 0xe6150140 0 4&gt;, &lt;0 0xe615004c 0 4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cp_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-indices = &lt;R8A7791_CLK_IRQC&gt;;</div><div class='add'>+			clock-output-names = "irqc";</div><div class='add'>+		};</div><div class='ctx'> 		mstp5_clks: mstp5_clks@e6150144 {</div><div class='ctx'> 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='ctx'> 			reg = &lt;0 0xe6150144 0 4&gt;, &lt;0 0xe615003c 0 4&gt;;</div><div class='hunk'>@@ -1288,7 +1359,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof0: spi@e6e20000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7791";</div><div class='del'>-		reg = &lt;0 0xe6e20000 0 0x0064&gt;, &lt;0 0xe7e20000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e20000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp0_clks R8A7791_CLK_MSIOF0&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x51&gt;, &lt;&amp;dmac0 0x52&gt;;</div><div class='hunk'>@@ -1300,7 +1371,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof1: spi@e6e10000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7791";</div><div class='del'>-		reg = &lt;0 0xe6e10000 0 0x0064&gt;, &lt;0 0xe7e10000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e10000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_MSIOF1&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x55&gt;, &lt;&amp;dmac0 0x56&gt;;</div><div class='hunk'>@@ -1312,7 +1383,7 @@</div><div class='ctx'> </div><div class='ctx'> 	msiof2: spi@e6e00000 {</div><div class='ctx'> 		compatible = "renesas,msiof-r8a7791";</div><div class='del'>-		reg = &lt;0 0xe6e00000 0 0x0064&gt;, &lt;0 0xe7e00000 0 0x0064&gt;;</div><div class='add'>+		reg = &lt;0 0xe6e00000 0 0x0064&gt;;</div><div class='ctx'> 		interrupts = &lt;0 158 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7791_CLK_MSIOF2&gt;;</div><div class='ctx'> 		dmas = &lt;&amp;dmac0 0x41&gt;, &lt;&amp;dmac0 0x42&gt;;</div><div class='hunk'>@@ -1485,7 +1556,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rcar_sound: rcar_sound@ec500000 {</div><div class='add'>+	rcar_sound: sound@ec500000 {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * #sound-dai-cells is required</div><div class='ctx'> 		 *</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi<br/>index 7a3ffa51a8bf..b73819423311 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7794.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/r8a7794.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7794.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/r8a7794.dtsi</a></div><div class='hunk'>@@ -105,6 +105,7 @@</div><div class='ctx'> 			     &lt;0 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;0 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;mstp4_clks R8A7794_CLK_IRQC&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dmac0: dma-controller@e6700000 {</div><div class='hunk'>@@ -173,6 +174,8 @@</div><div class='ctx'> 		interrupts = &lt;0 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFA0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -182,6 +185,8 @@</div><div class='ctx'> 		interrupts = &lt;0 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFA1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x25&gt;, &lt;&amp;dmac0 0x26&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -191,6 +196,8 @@</div><div class='ctx'> 		interrupts = &lt;0 151 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFA2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x27&gt;, &lt;&amp;dmac0 0x28&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -200,6 +207,8 @@</div><div class='ctx'> 		interrupts = &lt;0 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7794_CLK_SCIFA3&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1b&gt;, &lt;&amp;dmac0 0x1c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -209,6 +218,8 @@</div><div class='ctx'> 		interrupts = &lt;0 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7794_CLK_SCIFA4&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1f&gt;, &lt;&amp;dmac0 0x20&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -218,6 +229,8 @@</div><div class='ctx'> 		interrupts = &lt;0 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp11_clks R8A7794_CLK_SCIFA5&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x23&gt;, &lt;&amp;dmac0 0x24&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -227,6 +240,8 @@</div><div class='ctx'> 		interrupts = &lt;0 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFB0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x3d&gt;, &lt;&amp;dmac0 0x3e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -236,6 +251,8 @@</div><div class='ctx'> 		interrupts = &lt;0 149 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFB1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x19&gt;, &lt;&amp;dmac0 0x1a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -245,6 +262,8 @@</div><div class='ctx'> 		interrupts = &lt;0 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp2_clks R8A7794_CLK_SCIFB2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x1d&gt;, &lt;&amp;dmac0 0x1e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -254,6 +273,8 @@</div><div class='ctx'> 		interrupts = &lt;0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x29&gt;, &lt;&amp;dmac0 0x2a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -263,6 +284,8 @@</div><div class='ctx'> 		interrupts = &lt;0 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2d&gt;, &lt;&amp;dmac0 0x2e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -272,6 +295,8 @@</div><div class='ctx'> 		interrupts = &lt;0 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2b&gt;, &lt;&amp;dmac0 0x2c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -281,6 +306,8 @@</div><div class='ctx'> 		interrupts = &lt;0 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF3&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x2f&gt;, &lt;&amp;dmac0 0x30&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -290,6 +317,8 @@</div><div class='ctx'> 		interrupts = &lt;0 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF4&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0xfb&gt;, &lt;&amp;dmac0 0xfc&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -299,6 +328,8 @@</div><div class='ctx'> 		interrupts = &lt;0 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_SCIF5&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0xfd&gt;, &lt;&amp;dmac0 0xfe&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -308,6 +339,8 @@</div><div class='ctx'> 		interrupts = &lt;0 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_HSCIF0&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x39&gt;, &lt;&amp;dmac0 0x3a&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -317,6 +350,8 @@</div><div class='ctx'> 		interrupts = &lt;0 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_HSCIF1&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x4d&gt;, &lt;&amp;dmac0 0x4e&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -326,6 +361,8 @@</div><div class='ctx'> 		interrupts = &lt;0 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp7_clks R8A7794_CLK_HSCIF2&gt;;</div><div class='ctx'> 		clock-names = "sci_ick";</div><div class='add'>+		dmas = &lt;&amp;dmac0 0x3b&gt;, &lt;&amp;dmac0 0x3c&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -625,6 +662,14 @@</div><div class='ctx'> 			        "sdhi2", "sdhi1", "sdhi0",</div><div class='ctx'> 				"mmcif0", "cmt1", "usbdmac0", "usbdmac1";</div><div class='ctx'> 		};</div><div class='add'>+		mstp4_clks: mstp4_clks@e6150140 {</div><div class='add'>+			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='add'>+			reg = &lt;0 0xe6150140 0 4&gt;, &lt;0 0xe615004c 0 4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cp_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-indices = &lt;R8A7794_CLK_IRQC&gt;;</div><div class='add'>+			clock-output-names = "irqc";</div><div class='add'>+		};</div><div class='ctx'> 		mstp7_clks: mstp7_clks@e615014c {</div><div class='ctx'> 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='ctx'> 			reg = &lt;0 0xe615014c 0 4&gt;, &lt;0 0xe61501c4 0 4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts<br/>index baf21ac6ce7f..b299b26926d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3066a-bqcurie2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3066a-bqcurie2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3066a-bqcurie2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3066a-bqcurie2.dts</a></div><div class='hunk'>@@ -2,15 +2,43 @@</div><div class='ctx'>  * Copyright (c) 2013 MundoReader S.L.</div><div class='ctx'>  * Author: Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi<br/>index 41ffd4951ef3..d32229b8a996 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3066a.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3066a.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3066a.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3066a.dtsi</a></div><div class='hunk'>@@ -2,15 +2,43 @@</div><div class='ctx'>  * Copyright (c) 2013 MundoReader S.L.</div><div class='ctx'>  * Author: Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts<br/>index bdf85701987d..42faa19edb7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3188-radxarock.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3188-radxarock.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3188-radxarock.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3188-radxarock.dts</a></div><div class='hunk'>@@ -1,15 +1,43 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2013 Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -152,6 +180,7 @@</div><div class='ctx'> 		compatible = "active-semi,act8846";</div><div class='ctx'> 		reg = &lt;0x5a&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='add'>+		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;act8846_dvs0_ctl&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi<br/>index 1d4d79c6688d..0f23aedf9349 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3188.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3188.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3188.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3188.dtsi</a></div><div class='hunk'>@@ -2,15 +2,43 @@</div><div class='ctx'>  * Copyright (c) 2013 MundoReader S.L.</div><div class='ctx'>  * Author: Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts<br/>index 1687e8336994..43949a6771f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb-act8846.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-evb-act8846.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb-act8846.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb-act8846.dts</a></div><div class='hunk'>@@ -1,13 +1,41 @@</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts<br/>index f62ea78754a9..18eb6cb495f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb-rk808.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-evb-rk808.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb-rk808.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb-rk808.dts</a></div><div class='hunk'>@@ -1,13 +1,41 @@</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi<br/>index 4a457518d861..844a6fb64658 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-evb.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-evb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-evb.dtsi</a></div><div class='hunk'>@@ -1,13 +1,41 @@</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='hunk'>@@ -112,6 +140,23 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from</div><div class='add'>+	 * vcc_io directly.  Those boards won't be able to power cycle SD cards</div><div class='add'>+	 * but it shouldn't hurt to toggle this pin there anyway.</div><div class='add'>+	 */</div><div class='add'>+	vcc_sd: sdmmc-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio7 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_pwr&gt;;</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;emmc {</div><div class='hunk'>@@ -141,6 +186,8 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdmmc_clk &amp;sdmmc_cmd &amp;sdmmc_cd &amp;sdmmc_bus4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c0 {</div><div class='hunk'>@@ -232,6 +279,10 @@</div><div class='ctx'> 		sdmmc_cmd: sdmmc-cmd {</div><div class='ctx'> 			rockchip,pins = &lt;6 21 RK_FUNC_1 &amp;pcfg_pull_up_drv_8ma&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		sdmmc_pwr: sdmmc-pwr {</div><div class='add'>+			rockchip,pins = &lt;7 11 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb {</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi<br/>index b54dd78580c1..0b42372e4379 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-firefly.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-firefly.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-firefly.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-firefly.dtsi</a></div><div class='hunk'>@@ -246,6 +246,14 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_vsel&gt;, &lt;&amp;pwr_hold&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> </div><div class='add'>+		vp1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vp2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vp3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vp4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		inl1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		inl2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		inl3-supply = &lt;&amp;vcc_20&gt;;</div><div class='add'>+</div><div class='ctx'> 		regulators {</div><div class='ctx'> 			vcc_ddr: REG1 {</div><div class='ctx'> 				regulator-name = "vcc_ddr";</div><div class='hunk'>@@ -457,6 +465,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart0_xfer&gt;, &lt;&amp;uart0_cts&gt;, &lt;&amp;uart0_rts&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts<br/>index d081f0e0da36..d582811fbd7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-popmetal.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-popmetal.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-popmetal.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-popmetal.dts</a></div><div class='hunk'>@@ -406,6 +406,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;vopb {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288-thermal.dtsi b/arch/arm/boot/dts/rk3288-thermal.dtsi<br/>index 2695200c0af7..340406652186 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-thermal.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288-thermal.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288-thermal.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288-thermal.dtsi</a></div><div class='hunk'>@@ -3,9 +3,43 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd</div><div class='ctx'>  *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public License</div><div class='del'>- * version 2.  This program is licensed "as is" without any warranty of any</div><div class='del'>- * kind, whether express or implied.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi<br/>index 165968d51d8f..22316d00493e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3288.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3288.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3288.dtsi</a></div><div class='hunk'>@@ -1,13 +1,41 @@</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -44,6 +72,14 @@</div><div class='ctx'> 		spi2 = &amp;spi2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	arm-pmu {</div><div class='add'>+		compatible = "arm,cortex-a12-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -434,6 +470,7 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru HCLK_USBHOST1&gt;;</div><div class='ctx'> 		clock-names = "otg";</div><div class='add'>+		dr_mode = "host";</div><div class='ctx'> 		phys = &lt;&amp;usbphy2&gt;;</div><div class='ctx'> 		phy-names = "usb2-phy";</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -446,6 +483,11 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru HCLK_OTG0&gt;;</div><div class='ctx'> 		clock-names = "otg";</div><div class='add'>+		dr_mode = "otg";</div><div class='add'>+		g-np-tx-fifo-size = &lt;16&gt;;</div><div class='add'>+		g-rx-fifo-size = &lt;275&gt;;</div><div class='add'>+		g-tx-fifo-size = &lt;256 128 128 64 64 32&gt;;</div><div class='add'>+		g-use-dma;</div><div class='ctx'> 		phys = &lt;&amp;usbphy0&gt;;</div><div class='ctx'> 		phy-names = "usb2-phy";</div><div class='ctx'> 		status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi<br/>index c54a9715dcfa..a2ae9f32464d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3xxx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/rk3xxx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/rk3xxx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/rk3xxx.dtsi</a></div><div class='hunk'>@@ -2,15 +2,43 @@</div><div class='ctx'>  * Copyright (c) 2013 MundoReader S.L.</div><div class='ctx'>  * Author: Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='head'>diff --git a/arch/arm/boot/dts/s3c2416-smdk2416.dts b/arch/arm/boot/dts/s3c2416-smdk2416.dts<br/>index ea92fd69529a..f257926c13b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/s3c2416-smdk2416.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/s3c2416-smdk2416.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/s3c2416-smdk2416.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/s3c2416-smdk2416.dts</a></div><div class='hunk'>@@ -31,55 +31,55 @@</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@50000000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart0_data&gt;, &lt;&amp;uart0_fctl&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@50004000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart1_data&gt;, &lt;&amp;uart1_fctl&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;sdhci_0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_clk&gt;, &lt;&amp;sd1_cmd&gt;,</div><div class='add'>+			&lt;&amp;sd1_bus1&gt;, &lt;&amp;sd1_bus4&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@50008000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart2_data&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;sdhci_1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk&gt;, &lt;&amp;sd0_cmd&gt;,</div><div class='add'>+			&lt;&amp;sd0_bus1&gt;, &lt;&amp;sd0_bus4&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpf 1 0&gt;;</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serial@5000C000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart3_data&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;uart_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_data&gt;, &lt;&amp;uart0_fctl&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	watchdog@53000000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;uart_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_data&gt;, &lt;&amp;uart1_fctl&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	rtc@57000000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;uart_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_data&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	sdhci@4AC00000 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk&gt;, &lt;&amp;sd0_cmd&gt;,</div><div class='del'>-				&lt;&amp;sd0_bus1&gt;, &lt;&amp;sd0_bus4&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpf 1 0&gt;;</div><div class='del'>-		cd-inverted;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;uart_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_data&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	sdhci@4A800000 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd1_clk&gt;, &lt;&amp;sd1_cmd&gt;,</div><div class='del'>-				&lt;&amp;sd1_bus1&gt;, &lt;&amp;sd1_bus4&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		broken-cd;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi<br/>index 30b8f7e47454..a5184ff56933 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/s3c2416.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/s3c2416.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/s3c2416.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/s3c2416.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 	compatible = "samsung,s3c2416";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='del'>-		serial3 = &amp;uart3;</div><div class='add'>+		serial3 = &amp;uart_3;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 		clock-names = "timers";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@50000000 {</div><div class='add'>+	uart_0: serial@50000000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-uart";</div><div class='ctx'> 		clock-names = "uart", "clk_uart_baud2",</div><div class='ctx'> 				"clk_uart_baud3";</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 				&lt;&amp;clocks SCLK_UART&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@50004000 {</div><div class='add'>+	uart_1: serial@50004000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-uart";</div><div class='ctx'> 		clock-names = "uart", "clk_uart_baud2",</div><div class='ctx'> 				"clk_uart_baud3";</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 				&lt;&amp;clocks SCLK_UART&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@50008000 {</div><div class='add'>+	uart_2: serial@50008000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-uart";</div><div class='ctx'> 		clock-names = "uart", "clk_uart_baud2",</div><div class='ctx'> 				"clk_uart_baud3";</div><div class='hunk'>@@ -72,7 +72,7 @@</div><div class='ctx'> 				&lt;&amp;clocks SCLK_UART&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart3: serial@5000C000 {</div><div class='add'>+	uart_3: serial@5000C000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-uart";</div><div class='ctx'> 		reg = &lt;0x5000C000 0x4000&gt;;</div><div class='ctx'> 		interrupts = &lt;1 18 24 4&gt;, &lt;1 18 25 4&gt;;</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@4AC00000 {</div><div class='add'>+	sdhci_1: sdhci@4AC00000 {</div><div class='ctx'> 		compatible = "samsung,s3c6410-sdhci";</div><div class='ctx'> 		reg = &lt;0x4AC00000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 0 21 3&gt;;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@4A800000 {</div><div class='add'>+	sdhci_0: sdhci@4A800000 {</div><div class='ctx'> 		compatible = "samsung,s3c6410-sdhci";</div><div class='ctx'> 		reg = &lt;0x4A800000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 0 20 3&gt;;</div><div class='hunk'>@@ -105,13 +105,13 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	watchdog@53000000 {</div><div class='add'>+	watchdog: watchdog@53000000 {</div><div class='ctx'> 		interrupts = &lt;1 9 27 3&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clocks PCLK_WDT&gt;;</div><div class='ctx'> 		clock-names = "watchdog";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@57000000 {</div><div class='add'>+	rtc: rtc@57000000 {</div><div class='ctx'> 		compatible = "samsung,s3c2416-rtc";</div><div class='ctx'> 		clocks = &lt;&amp;clocks PCLK_RTC&gt;;</div><div class='ctx'> 		clock-names = "rtc";</div><div class='head'>diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi<br/>index 57ab8587f7b9..9e2444b07bce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d3.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sama5d3.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d3.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d3.dtsi</a></div><div class='hunk'>@@ -1321,7 +1321,7 @@</div><div class='ctx'> 		usb0: gadget@00500000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "atmel,at91sam9rl-udc";</div><div class='add'>+			compatible = "atmel,sama5d3-udc";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000</div><div class='ctx'> 			       0xf8030000 0x4000&gt;;</div><div class='ctx'> 			interrupts = &lt;33 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -1439,9 +1439,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;,</div><div class='del'>-				 &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1449,8 +1448,8 @@</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ehci_clk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;;</div><div class='add'>+			clock-names = "usb_clk", "ehci_clk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1478,7 +1477,7 @@</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				reg = &lt;</div><div class='del'>-					0x70000000 0x10000000	/* NFC Command Registers */</div><div class='add'>+					0x70000000 0x08000000	/* NFC Command Registers */</div><div class='ctx'> 					0xffffc000 0x00000070	/* NFC HSMC regs */</div><div class='ctx'> 					0x00200000 0x00100000	/* NFC SRAM banks */</div><div class='ctx'> 					&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi<br/>index 7d6babdab039..2cf9c3611db6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d3xcm.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sama5d3xcm.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d3xcm.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d3xcm.dtsi</a></div><div class='hunk'>@@ -11,7 +11,8 @@</div><div class='ctx'> 	compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs";</div><div class='add'>+		bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -67,12 +68,6 @@</div><div class='ctx'> 					rxd3-skew-ps = &lt;400&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='del'>-</div><div class='del'>-			pmc: pmc@fffffc00 {</div><div class='del'>-				main: mainck {</div><div class='del'>-					clock-frequency = &lt;12000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nand0: nand@60000000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi<br/>index 6b1bb58f9c0b..3ee22ee13c5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d4.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sama5d4.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sama5d4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sama5d4.dtsi</a></div><div class='hunk'>@@ -59,6 +59,10 @@</div><div class='ctx'> 		serial0 = &amp;usart3;</div><div class='ctx'> 		serial1 = &amp;usart4;</div><div class='ctx'> 		serial2 = &amp;usart2;</div><div class='add'>+		serial3 = &amp;usart0;</div><div class='add'>+		serial4 = &amp;usart1;</div><div class='add'>+		serial5 = &amp;uart0;</div><div class='add'>+		serial6 = &amp;uart1;</div><div class='ctx'> 		gpio0 = &amp;pioA;</div><div class='ctx'> 		gpio1 = &amp;pioB;</div><div class='ctx'> 		gpio2 = &amp;pioC;</div><div class='hunk'>@@ -123,7 +127,7 @@</div><div class='ctx'> 		usb0: gadget@00400000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "atmel,at91sam9rl-udc";</div><div class='add'>+			compatible = "atmel,sama5d3-udc";</div><div class='ctx'> 			reg = &lt;0x00400000 0x100000</div><div class='ctx'> 			       0xfc02c000 0x4000&gt;;</div><div class='ctx'> 			interrupts = &lt;47 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -254,9 +258,8 @@</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;,</div><div class='del'>-				 &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='add'>+			clock-names = "ohci_clk", "hclk", "uhpck";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -264,8 +267,8 @@</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;, &lt;&amp;uhpck&gt;;</div><div class='del'>-			clock-names = "usb_clk", "ehci_clk", "uhpck";</div><div class='add'>+			clocks = &lt;&amp;utmi&gt;, &lt;&amp;uhphs_clk&gt;;</div><div class='add'>+			clock-names = "usb_clk", "ehci_clk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -299,7 +302,7 @@</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				reg = &lt;</div><div class='del'>-					0x90000000 0x10000000	/* NFC Command Registers */</div><div class='add'>+					0x90000000 0x08000000	/* NFC Command Registers */</div><div class='ctx'> 					0xfc05c000 0x00000070	/* NFC HSMC regs */</div><div class='ctx'> 					0x00100000 0x00100000	/* NFC SRAM banks */</div><div class='ctx'>                                          &gt;;</div><div class='hunk'>@@ -847,6 +850,24 @@</div><div class='ctx'> 				clock-names = "mci_clk";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart0: serial@f8004000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf8004000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(22))&gt;,</div><div class='add'>+				       &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(23))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_uart0&gt;;</div><div class='add'>+				clocks = &lt;&amp;uart0_clk&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			ssc0: ssc@f8008000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9g45-ssc";</div><div class='ctx'> 				reg = &lt;0xf8008000 0x4000&gt;;</div><div class='hunk'>@@ -977,6 +998,42 @@</div><div class='ctx'> 				reg = &lt;0xf8028000 0x60&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			usart0: serial@f802c000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf802c000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(36))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(37))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_usart0 &amp;pinctrl_usart0_rts &amp;pinctrl_usart0_cts&gt;;</div><div class='add'>+				clocks = &lt;&amp;usart0_clk&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@f8030000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf8030000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(38))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(39))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_usart1 &amp;pinctrl_usart1_rts &amp;pinctrl_usart1_cts&gt;;</div><div class='add'>+				clocks = &lt;&amp;usart1_clk&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			mmc1: mmc@fc000000 {</div><div class='ctx'> 				compatible = "atmel,hsmci";</div><div class='ctx'> 				reg = &lt;0xfc000000 0x600&gt;;</div><div class='hunk'>@@ -994,6 +1051,24 @@</div><div class='ctx'> 				clock-names = "mci_clk";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart1: serial@fc004000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfc004000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;28 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(24))&gt;,</div><div class='add'>+				       &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(25))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+				clocks = &lt;&amp;uart1_clk&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			usart2: serial@fc008000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9260-usart";</div><div class='ctx'> 				reg = &lt;0xfc008000 0x100&gt;;</div><div class='hunk'>@@ -1066,6 +1141,46 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spi1: spi@fc018000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0xfc018000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH 3&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(12))&gt;,</div><div class='add'>+				       &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(13))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_spi1&gt;;</div><div class='add'>+				clocks = &lt;&amp;spi1_clk&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@fc01c000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0xfc01c000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;39 IRQ_TYPE_LEVEL_HIGH 3&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(14))&gt;,</div><div class='add'>+				       &lt;&amp;dma1</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(15))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_spi2&gt;;</div><div class='add'>+				clocks = &lt;&amp;spi2_clk&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			tcb1: timer@fc020000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9x5-tcb";</div><div class='ctx'> 				reg = &lt;0xfc020000 0x100&gt;;</div><div class='hunk'>@@ -1125,10 +1240,10 @@</div><div class='ctx'> 				compatible = "atmel,at91sam9g46-aes";</div><div class='ctx'> 				reg = &lt;0xfc044000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;12 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='del'>-					AT91_XDMAC_DT_PERID(41)&gt;,</div><div class='del'>-				       &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='del'>-					AT91_XDMAC_DT_PERID(40)&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(41))&gt;,</div><div class='add'>+				       &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(40))&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='ctx'> 				clocks = &lt;&amp;aes_clk&gt;;</div><div class='ctx'> 				clock-names = "aes_clk";</div><div class='hunk'>@@ -1139,10 +1254,10 @@</div><div class='ctx'> 				compatible = "atmel,at91sam9g46-tdes";</div><div class='ctx'> 				reg = &lt;0xfc04c000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='del'>-					AT91_XDMAC_DT_PERID(42)&gt;,</div><div class='del'>-				       &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='del'>-					AT91_XDMAC_DT_PERID(43)&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(42))&gt;,</div><div class='add'>+				       &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(43))&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='ctx'> 				clocks = &lt;&amp;tdes_clk&gt;;</div><div class='ctx'> 				clock-names = "tdes_clk";</div><div class='hunk'>@@ -1153,8 +1268,8 @@</div><div class='ctx'> 				compatible = "atmel,at91sam9g46-sha";</div><div class='ctx'> 				reg = &lt;0xfc050000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;15 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))</div><div class='del'>-					AT91_XDMAC_DT_PERID(44)&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+					| AT91_XDMAC_DT_PERID(44))&gt;;</div><div class='ctx'> 				dma-names = "tx";</div><div class='ctx'> 				clocks = &lt;&amp;sha_clk&gt;;</div><div class='ctx'> 				clock-names = "sha_clk";</div><div class='hunk'>@@ -1232,7 +1347,8 @@</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";</div><div class='del'>-				ranges = &lt;0xfc06a000 0xfc06a000 0x4000&gt;;</div><div class='add'>+				ranges = &lt;0xfc068000 0xfc068000 0x100</div><div class='add'>+					  0xfc06a000 0xfc06a000 0x4000&gt;;</div><div class='ctx'> 				/* WARNING: revisit as pin spec has changed */</div><div class='ctx'> 				atmel,mux-mask = &lt;</div><div class='ctx'> 					/*   A          B          C  */</div><div class='hunk'>@@ -1623,6 +1739,74 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				spi1 {</div><div class='add'>+					pinctrl_spi1: spi1-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* SPI1_MISO */</div><div class='add'>+							 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* SPI1_MOSI */</div><div class='add'>+							 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* SPI1_SPCK */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi2 {</div><div class='add'>+					pinctrl_spi2: spi2-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE	/* SPI2_MISO conflicts with RTS0 */</div><div class='add'>+							 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE	/* SPI2_MOSI conflicts with TXD0 */</div><div class='add'>+							 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE	/* SPI2_SPCK conflicts with RTS1 */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				uart0 {</div><div class='add'>+					pinctrl_uart0: uart0-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE		/* RXD */</div><div class='add'>+							 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* TXD */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				uart1 {</div><div class='add'>+					pinctrl_uart1: uart1-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE		/* RXD */</div><div class='add'>+							 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP	/* TXD */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usart0 {</div><div class='add'>+					pinctrl_usart0: usart0-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE		/* RXD */</div><div class='add'>+							 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* TXD */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_usart0_rts: usart0_rts-0 {</div><div class='add'>+						atmel,pins = &lt;AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_usart0_cts: usart0_cts-0 {</div><div class='add'>+						atmel,pins = &lt;AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usart1 {</div><div class='add'>+					pinctrl_usart1: usart1-0 {</div><div class='add'>+						atmel,pins =</div><div class='add'>+							&lt;AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE		/* RXD */</div><div class='add'>+							 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* TXD */</div><div class='add'>+							&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_usart1_rts: usart1_rts-0 {</div><div class='add'>+						atmel,pins = &lt;AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+					pinctrl_usart1_cts: usart1_cts-0 {</div><div class='add'>+						atmel,pins = &lt;AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				usart2 {</div><div class='ctx'> 					pinctrl_usart2: usart2-0 {</div><div class='ctx'> 						atmel,pins =</div><div class='head'>diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts<br/>index 022ba505f573..24b4cd24dceb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sh73a0-kzm9g.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sh73a0-kzm9g.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sh73a0-kzm9g.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sh73a0-kzm9g.dts</a></div><div class='hunk'>@@ -147,6 +147,7 @@</div><div class='ctx'> 			gpios = &lt;&amp;pcf8575 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 			label = "SW1";</div><div class='add'>+			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi<br/>index 45b539ce4d35..11e17c5f26e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sh73a0.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sh73a0.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sh73a0.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sh73a0.dtsi</a></div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	irqpin0: irqpin@e6900000 {</div><div class='add'>+	irqpin0: interrupt-controller@e6900000 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> 		control-parent;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	irqpin1: irqpin@e6900004 {</div><div class='add'>+	irqpin1: interrupt-controller@e6900004 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 		control-parent;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	irqpin2: irqpin@e6900008 {</div><div class='add'>+	irqpin2: interrupt-controller@e6900008 {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 		control-parent;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	irqpin3: irqpin@e690000c {</div><div class='add'>+	irqpin3: interrupt-controller@e690000c {</div><div class='ctx'> 		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -376,7 +376,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	scifb8: serial@e6c30000 {</div><div class='add'>+	scifb: serial@e6c30000 {</div><div class='ctx'> 		compatible = "renesas,scifb-sh73a0", "renesas,scifb";</div><div class='ctx'> 		reg = &lt;0xe6c30000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi<br/>index d9176e606173..80f924deed37 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/socfpga.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga.dtsi</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "altr,socfpga-smp";</div><div class='ctx'> </div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='hunk'>@@ -451,6 +452,14 @@</div><div class='ctx'> 						clk-phase = &lt;0 135&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='add'>+					sdmmc_clk_divided: sdmmc_clk_divided {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;sdmmc_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xa0 8&gt;;</div><div class='add'>+						fixed-divider = &lt;4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='ctx'> 					nand_x_clk: nand_x_clk {</div><div class='ctx'> 						#clock-cells = &lt;0&gt;;</div><div class='ctx'> 						compatible = "altr,socfpga-gate-clk";</div><div class='hunk'>@@ -488,6 +497,8 @@</div><div class='ctx'> 			reset-names = "stmmaceth";</div><div class='ctx'> 			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='ctx'> 			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;4096&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -504,6 +515,8 @@</div><div class='ctx'> 			reset-names = "stmmaceth";</div><div class='ctx'> 			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='ctx'> 			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;4096&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -635,7 +648,7 @@</div><div class='ctx'> 			fifo-depth = &lt;0x400&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;sdmmc_clk&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;sdmmc_clk_divided&gt;;</div><div class='ctx'> 			clock-names = "biu", "ciu";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -655,6 +668,11 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scu: snoop-control-unit@fffec000 {</div><div class='add'>+			compatible = "arm,cortex-a9-scu";</div><div class='add'>+			reg = &lt;0xfffec000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		spi1: spi@fff01000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-ssi";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi<br/>index 8a05c47fd57f..4779b07310df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_arria10.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/socfpga_arria10.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_arria10.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10.dtsi</a></div><div class='hunk'>@@ -21,21 +21,10 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac0;</div><div class='del'>-		ethernet1 = &amp;gmac1;</div><div class='del'>-		ethernet2 = &amp;gmac2;</div><div class='del'>-		serial0 = &amp;uart0;</div><div class='del'>-		serial1 = &amp;uart1;</div><div class='del'>-		timer0 = &amp;timer0;</div><div class='del'>-		timer1 = &amp;timer1;</div><div class='del'>-		timer2 = &amp;timer2;</div><div class='del'>-		timer3 = &amp;timer3;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "altr,socfpga-a10-smp";</div><div class='ctx'> </div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='hunk'>@@ -98,6 +87,21 @@</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+					cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "fixed-clock";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					cb_intosc_ls_clk: cb_intosc_ls_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "fixed-clock";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					f2s_free_clk: f2s_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "fixed-clock";</div><div class='add'>+					};</div><div class='add'>+</div><div class='ctx'> 					osc1: osc1 {</div><div class='ctx'> 						#clock-cells = &lt;0&gt;;</div><div class='ctx'> 						compatible = "fixed-clock";</div><div class='hunk'>@@ -107,47 +111,338 @@</div><div class='ctx'> 						#address-cells = &lt;1&gt;;</div><div class='ctx'> 						#size-cells = &lt;0&gt;;</div><div class='ctx'> 						#clock-cells = &lt;0&gt;;</div><div class='del'>-						compatible = "altr,socfpga-pll-clock";</div><div class='del'>-						clocks = &lt;&amp;osc1&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-pll-clock";</div><div class='add'>+						clocks = &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_ls_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;;</div><div class='add'>+						reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+						main_mpu_base_clk: main_mpu_base_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							div-reg = &lt;0x140 0 11&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_noc_base_clk: main_noc_base_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							div-reg = &lt;0x144 0 11&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_emaca_clk: main_emaca_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x68&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_emacb_clk: main_emacb_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x6C&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_emac_ptp_clk: main_emac_ptp_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x70&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_gpio_db_clk: main_gpio_db_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x74&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_sdmmc_clk: main_sdmmc_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk"</div><div class='add'>+;</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x78&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_s2f_usr0_clk: main_s2f_usr0_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x7C&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_s2f_usr1_clk: main_s2f_usr1_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x80&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_hmc_pll_ref_clk: main_hmc_pll_ref_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x84&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						main_periph_ref_clk: main_periph_ref_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;main_pll&gt;;</div><div class='add'>+							reg = &lt;0x9C&gt;;</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					periph_pll: periph_pll {</div><div class='ctx'> 						#address-cells = &lt;1&gt;;</div><div class='ctx'> 						#size-cells = &lt;0&gt;;</div><div class='ctx'> 						#clock-cells = &lt;0&gt;;</div><div class='del'>-						compatible = "altr,socfpga-pll-clock";</div><div class='del'>-						clocks = &lt;&amp;osc1&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-pll-clock";</div><div class='add'>+						clocks = &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_ls_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;, &lt;&amp;main_periph_ref_clk&gt;;</div><div class='add'>+						reg = &lt;0xC0&gt;;</div><div class='add'>+</div><div class='add'>+						peri_mpu_base_clk: peri_mpu_base_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							div-reg = &lt;0x140 16 11&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_noc_base_clk: peri_noc_base_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							div-reg = &lt;0x144 16 11&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_emaca_clk: peri_emaca_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xE8&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_emacb_clk: peri_emacb_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xEC&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_emac_ptp_clk: peri_emac_ptp_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xF0&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_gpio_db_clk: peri_gpio_db_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xF4&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_sdmmc_clk: peri_sdmmc_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xF8&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_s2f_usr0_clk: peri_s2f_usr0_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0xFC&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_s2f_usr1_clk: peri_s2f_usr1_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0x100&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						peri_hmc_pll_ref_clk: peri_hmc_pll_ref_clk {</div><div class='add'>+							#clock-cells = &lt;0&gt;;</div><div class='add'>+							compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+							clocks = &lt;&amp;periph_pll&gt;;</div><div class='add'>+							reg = &lt;0x104&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					mpu_free_clk: mpu_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+						clocks = &lt;&amp;main_mpu_base_clk&gt;, &lt;&amp;peri_mpu_base_clk&gt;,</div><div class='add'>+							 &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_hs_div2_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;;</div><div class='add'>+						reg = &lt;0x60&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					noc_free_clk: noc_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+						clocks = &lt;&amp;main_noc_base_clk&gt;, &lt;&amp;peri_noc_base_clk&gt;,</div><div class='add'>+							 &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_hs_div2_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;;</div><div class='add'>+						reg = &lt;0x64&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					s2f_user1_free_clk: s2f_user1_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+						clocks = &lt;&amp;main_s2f_usr1_clk&gt;, &lt;&amp;peri_s2f_usr1_clk&gt;,</div><div class='add'>+							 &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_hs_div2_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;;</div><div class='add'>+						reg = &lt;0x104&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					sdmmc_free_clk: sdmmc_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+						clocks = &lt;&amp;main_sdmmc_clk&gt;, &lt;&amp;peri_sdmmc_clk&gt;,</div><div class='add'>+							 &lt;&amp;osc1&gt;, &lt;&amp;cb_intosc_hs_div2_clk&gt;,</div><div class='add'>+							 &lt;&amp;f2s_free_clk&gt;;</div><div class='add'>+						fixed-divider = &lt;4&gt;;</div><div class='add'>+						reg = &lt;0xF8&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					l4_sys_free_clk: l4_sys_free_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-perip-clk";</div><div class='add'>+						clocks = &lt;&amp;noc_free_clk&gt;;</div><div class='add'>+						fixed-divider = &lt;4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					l4_main_clk: l4_main_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;noc_free_clk&gt;;</div><div class='add'>+						div-reg = &lt;0xA8 0 2&gt;;</div><div class='add'>+						clk-gate = &lt;0x48 1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					l4_mp_clk: l4_mp_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;noc_free_clk&gt;;</div><div class='add'>+						div-reg = &lt;0xA8 8 2&gt;;</div><div class='add'>+						clk-gate = &lt;0x48 2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					l4_sp_clk: l4_sp_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;noc_free_clk&gt;;</div><div class='add'>+						div-reg = &lt;0xA8 16 2&gt;;</div><div class='add'>+						clk-gate = &lt;0x48 3&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					mpu_periph_clk: mpu_periph_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;mpu_free_clk&gt;;</div><div class='add'>+						fixed-divider = &lt;4&gt;;</div><div class='add'>+						clk-gate = &lt;0x48 0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					sdmmc_clk: sdmmc_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;sdmmc_free_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 5&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					qspi_clk: qspi_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;l4_main_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 11&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					nand_clk: nand_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;l4_mp_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 10&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					spi_m_clk: spi_m_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;l4_main_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 9&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					usb_clk: usb_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;l4_mp_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 8&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					s2f_usr1_clk: s2f_usr1_clk {</div><div class='add'>+						#clock-cells = &lt;0&gt;;</div><div class='add'>+						compatible = "altr,socfpga-a10-gate-clk";</div><div class='add'>+						clocks = &lt;&amp;peri_s2f_usr1_clk&gt;;</div><div class='add'>+						clk-gate = &lt;0xC8 6&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gmac0: ethernet@ff800000 {</div><div class='ctx'> 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x44 0&gt;;</div><div class='ctx'> 			reg = &lt;0xff800000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "macirq";</div><div class='ctx'> 			/* Filled in by bootloader */</div><div class='ctx'> 			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_mp_clk&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gmac1: ethernet@ff802000 {</div><div class='ctx'> 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x48 0&gt;;</div><div class='ctx'> 		        reg = &lt;0xff802000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "macirq";</div><div class='ctx'> 			/* Filled in by bootloader */</div><div class='ctx'> 			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_mp_clk&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gmac2: ethernet@ff804000 {</div><div class='ctx'> 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x4C 0&gt;;</div><div class='ctx'> 			reg = &lt;0xff804000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "macirq";</div><div class='ctx'> 			/* Filled in by bootloader */</div><div class='ctx'> 			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_mp_clk&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -253,6 +548,17 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdr: sdr@ffc25000 {</div><div class='add'>+			compatible = "syscon";</div><div class='add'>+			reg = &lt;0xffcfb100 0x80&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdramedac {</div><div class='add'>+			compatible = "altr,sdram-edac-a10";</div><div class='add'>+			altr,sdr-syscon = &lt;&amp;sdr&gt;;</div><div class='add'>+			interrupts = &lt;0 2 4&gt;, &lt;0 0 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		L2: l2-cache@fffff000 {</div><div class='ctx'> 			compatible = "arm,pl310-cache";</div><div class='ctx'> 			reg = &lt;0xfffff000 0x1000&gt;;</div><div class='hunk'>@@ -268,6 +574,9 @@</div><div class='ctx'> 			reg = &lt;0xff808000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			fifo-depth = &lt;0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;sdmmc_free_clk&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ocram: sram@ffe00000 {</div><div class='hunk'>@@ -281,9 +590,15 @@</div><div class='ctx'> 			reg = &lt;0xffd05000 0x100&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scu: snoop-control-unit@ffffc000 {</div><div class='add'>+			compatible = "arm,cortex-a9-scu";</div><div class='add'>+			reg = &lt;0xffffc000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sysmgr: sysmgr@ffd06000 {</div><div class='ctx'> 			compatible = "altr,sys-mgr", "syscon";</div><div class='ctx'> 			reg = &lt;0xffd06000 0x300&gt;;</div><div class='add'>+			cpu1-start-addr = &lt;0xffd06230&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* Local timer */</div><div class='hunk'>@@ -291,30 +606,39 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 			reg = &lt;0xffffc600 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;1 13 0xf04&gt;;</div><div class='add'>+			clocks = &lt;&amp;mpu_periph_clk&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		timer0: timer0@ffc02700 {</div><div class='ctx'> 			compatible = "snps,dw-apb-timer";</div><div class='ctx'> 			interrupts = &lt;0 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg = &lt;0xffc02700 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sp_clk&gt;;</div><div class='add'>+			clock-names = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		timer1: timer1@ffc02800 {</div><div class='ctx'> 			compatible = "snps,dw-apb-timer";</div><div class='ctx'> 			interrupts = &lt;0 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg = &lt;0xffc02800 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sp_clk&gt;;</div><div class='add'>+			clock-names = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		timer2: timer2@ffd00000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-timer";</div><div class='ctx'> 			interrupts = &lt;0 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg = &lt;0xffd00000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sys_free_clk&gt;;</div><div class='add'>+			clock-names = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		timer3: timer3@ffd00100 {</div><div class='ctx'> 			compatible = "snps,dw-apb-timer";</div><div class='ctx'> 			interrupts = &lt;0 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg = &lt;0xffd01000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sys_free_clk&gt;;</div><div class='add'>+			clock-names = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart0: serial0@ffc02000 {</div><div class='hunk'>@@ -323,6 +647,7 @@</div><div class='ctx'> 			interrupts = &lt;0 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart1: serial1@ffc02100 {</div><div class='hunk'>@@ -331,6 +656,8 @@</div><div class='ctx'> 			interrupts = &lt;0 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sp_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usbphy0: usbphy@0 {</div><div class='hunk'>@@ -343,6 +670,8 @@</div><div class='ctx'> 			compatible = "snps,dwc2";</div><div class='ctx'> 			reg = &lt;0xffb00000 0xffff&gt;;</div><div class='ctx'> 			interrupts = &lt;0 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_clk&gt;;</div><div class='add'>+			clock-names = "otg";</div><div class='ctx'> 			phys = &lt;&amp;usbphy0&gt;;</div><div class='ctx'> 			phy-names = "usb2-phy";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -361,6 +690,7 @@</div><div class='ctx'> 			compatible = "snps,dw-wdt";</div><div class='ctx'> 			reg = &lt;0xffd00200 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;0 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sys_free_clk&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -368,6 +698,7 @@</div><div class='ctx'> 			compatible = "snps,dw-wdt";</div><div class='ctx'> 			reg = &lt;0xffd00300 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;0 120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;l4_sys_free_clk&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi<br/>index 3015ce8d3057..94a0709b2fe6 100755..100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_arria10_socdk.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/socfpga_arria10_socdk.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10_socdk.dtsi</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2014 Altera Corporation &lt;www.altera.com&gt;</div><div class='add'>+ * Copyright (C) 2015 Altera Corporation &lt;www.altera.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -14,8 +14,6 @@</div><div class='ctx'>  * You should have received a copy of the GNU General Public License</div><div class='ctx'>  * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='ctx'> #include "socfpga_arria10.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -40,9 +38,37 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		serial0@ffc02000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-addr = &lt;0xffffffff&gt;; /* probe for phy addr */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * These skews assume the user's FPGA design is adding 600ps of delay</div><div class='add'>+	 * for TX_CLK on Arria 10.</div><div class='add'>+	 *</div><div class='add'>+	 * All skews are offset since hardware skew values for the ksz9031</div><div class='add'>+	 * range from a negative skew to a positive skew.</div><div class='add'>+	 * See the micrel-ksz90x1.txt Documentation file for details.</div><div class='add'>+	 */</div><div class='add'>+	txd0-skew-ps = &lt;0&gt;; /* -420ps */</div><div class='add'>+	txd1-skew-ps = &lt;0&gt;; /* -420ps */</div><div class='add'>+	txd2-skew-ps = &lt;0&gt;; /* -420ps */</div><div class='add'>+	txd3-skew-ps = &lt;0&gt;; /* -420ps */</div><div class='add'>+	rxd0-skew-ps = &lt;420&gt;; /* 0ps */</div><div class='add'>+	rxd1-skew-ps = &lt;420&gt;; /* 0ps */</div><div class='add'>+	rxd2-skew-ps = &lt;420&gt;; /* 0ps */</div><div class='add'>+	rxd3-skew-ps = &lt;420&gt;; /* 0ps */</div><div class='add'>+	txen-skew-ps = &lt;0&gt;; /* -420ps */</div><div class='add'>+	txc-skew-ps = &lt;1860&gt;; /* 960ps */</div><div class='add'>+	rxdv-skew-ps = &lt;420&gt;; /* 0ps */</div><div class='add'>+	rxc-skew-ps = &lt;1680&gt;; /* 780ps */</div><div class='add'>+	max-frame-size = &lt;3800&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/include/linux/platform_data/irq-renesas-irqc.h b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts<br/>index 3ae17b3e00ed..dbbb751ac1ba 100644<br/>--- a/<a href='/drm-misc/tree/include/linux/platform_data/irq-renesas-irqc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>include/linux/platform_data/irq-renesas-irqc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> /*</div><div class='del'>- * Renesas IRQC Driver</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2013 Magnus Damm</div><div class='add'>+ * Copyright (C) 2014-2015 Altera Corporation &lt;www.altera.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is distributed in the hope that it will be useful,</div><div class='ctx'>  * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='hunk'>@@ -13,15 +12,15 @@</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='ctx'>  * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __IRQ_RENESAS_IRQC_H__</div><div class='del'>-#define __IRQ_RENESAS_IRQC_H__</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "socfpga_arria10_socdk.dtsi"</div><div class='ctx'> </div><div class='del'>-struct renesas_irqc_config {</div><div class='del'>-	unsigned int irq_base;</div><div class='add'>+&amp;mmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-#endif /* __IRQ_RENESAS_IRQC_H__ */</div><div class='head'>diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts<br/>index 16ea6f5f2ab8..5e17fd147728 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/socfpga_cyclone5_sockit.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_cyclone5_sockit.dts</a></div><div class='hunk'>@@ -60,6 +60,22 @@</div><div class='ctx'> 	rxc-skew-ps = &lt;2000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	accel1: accelerometer@53 {</div><div class='add'>+		compatible = "adi,adxl345";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;portc&gt;;</div><div class='add'>+		interrupts = &lt;3 2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;regulator_3_3v&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;regulator_3_3v&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts<br/>index a1814b457450..019dd2fea208 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/socfpga_cyclone5_socrates.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/socfpga_cyclone5_socrates.dts</a></div><div class='hunk'>@@ -30,12 +30,23 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000&gt;; /* 1GB */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	leds: gpio-leds {</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -45,6 +56,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;leds {</div><div class='add'>+	compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+	led@0 {</div><div class='add'>+		label = "led:green:heartbeat";</div><div class='add'>+		gpios = &lt;&amp;porta 28 1&gt;;</div><div class='add'>+		linux,default-trigger = "heartbeat";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@1 {</div><div class='add'>+		label = "led:green:D7";</div><div class='add'>+		gpios = &lt;&amp;portb 19 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@2 {</div><div class='add'>+		label = "led:green:D8";</div><div class='add'>+		gpios = &lt;&amp;portb 25 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts<br/>index d42c84b1df8d..e48857249ce7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310-evb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear1310-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1310-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr1310 Evaluation Baord</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi<br/>index 9d342920695a..54bc6d3cf290 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear1310.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1310.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for all SPEAr1310 SoCs</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts<br/>index b23e05ed1d60..c611f5606dfe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340-evb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear1340-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1340-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr1340 Evaluation Baord</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi<br/>index 13e1aa33daa2..df2232d767ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear1340.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear1340.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for all SPEAr1340 SoCs</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi<br/>index 40accc87e3a2..14594ce8c18a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear13xx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear13xx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear13xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear13xx.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for all SPEAr13xx SoCs</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts<br/>index 5de1431653e4..e859e8288bcd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300-evb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear300-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear300-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr300 Evaluation Baord</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi<br/>index f79b3dfaabe6..f4e92e599729 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear300.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear300.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr300 SoC</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts<br/>index b09632963d15..070f2c1b7851 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310-evb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear310-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear310-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr310 Evaluation Baord</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi<br/>index 95372080eea6..da210b454753 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear310.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear310.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr310 SoC</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts<br/>index fdedbb514102..1b1034477923 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320-evb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear320-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear320-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr320 Evaluation Baord</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi<br/>index ffea342aeec9..22be6e5edaac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear320.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear320.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for SPEAr320 SoC</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi<br/>index f0e3fcf8e323..118135d75899 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear3xx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/spear3xx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear3xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/spear3xx.dtsi</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DTS file for all SPEAr3xx SoCs</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2012 Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-ccu8540.dts b/arch/arm/boot/dts/ste-ccu8540.dts<br/>index 32dd55e5f4e6..6eaaf638e52e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-ccu8540.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-ccu8540.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-ccu8540.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-ccu8540.dts</a></div><div class='hunk'>@@ -17,6 +17,13 @@</div><div class='ctx'> 	model = "ST-Ericsson U8540 platform with Device Tree";</div><div class='ctx'> 	compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";</div><div class='ctx'> </div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x20000000 0x1f000000&gt;, &lt;0xc0000000 0x3f000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-ccu9540.dts b/arch/arm/boot/dts/ste-ccu9540.dts<br/>index 651c56d400a4..c8b815819cfe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-ccu9540.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-ccu9540.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-ccu9540.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-ccu9540.dts</a></div><div class='hunk'>@@ -16,6 +16,13 @@</div><div class='ctx'> 	model = "ST-Ericsson CCU9540 platform with Device Tree";</div><div class='ctx'> 	compatible = "st-ericsson,ccu9540", "st-ericsson,u9540";</div><div class='ctx'> </div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi<br/>index 2201cd5da3bb..a75f3289e653 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-dbx5x0.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-dbx5x0.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-dbx5x0.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-dbx5x0.dtsi</a></div><div class='hunk'>@@ -22,6 +22,160 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		cpus {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			cpu-map {</div><div class='add'>+				cluster0 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					};</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			CPU0: cpu@0 {</div><div class='add'>+				device_type = "cpu";</div><div class='add'>+				compatible = "arm,cortex-a9";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			CPU1: cpu@1 {</div><div class='add'>+				device_type = "cpu";</div><div class='add'>+				compatible = "arm,cortex-a9";</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ptm@801ae000 {</div><div class='add'>+			compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='add'>+			reg = &lt;0x801ae000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APETRACECLK&gt;, &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "apb_pclk", "atclk";</div><div class='add'>+			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			port {</div><div class='add'>+				ptm0_out_port: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_in_port0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ptm@801af000 {</div><div class='add'>+			compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='add'>+			reg = &lt;0x801af000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APETRACECLK&gt;, &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "apb_pclk", "atclk";</div><div class='add'>+			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			port {</div><div class='add'>+				ptm1_out_port: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_in_port1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@801a6000 {</div><div class='add'>+			compatible = "arm,coresight-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x801a6000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APETRACECLK&gt;, &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "apb_pclk", "atclk";</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				/* funnel output ports */</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					funnel_out_port: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_in_port0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* funnel input ports */</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					funnel_in_port0: endpoint {</div><div class='add'>+						slave-mode;</div><div class='add'>+						remote-endpoint = &lt;&amp;ptm0_out_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					funnel_in_port1: endpoint {</div><div class='add'>+						slave-mode;</div><div class='add'>+						remote-endpoint = &lt;&amp;ptm1_out_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator {</div><div class='add'>+			compatible = "arm,coresight-replicator";</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "atclk";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				/* replicator output ports */</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					replicator_out_port0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpiu_in_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					replicator_out_port1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etb_in_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* replicator input port */</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					replicator_in_port0: endpoint {</div><div class='add'>+						slave-mode;</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_out_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpiu@80190000 {</div><div class='add'>+			compatible = "arm,coresight-tpiu", "arm,primecell";</div><div class='add'>+			reg = &lt;0x80190000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APETRACECLK&gt;, &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "apb_pclk", "atclk";</div><div class='add'>+			port {</div><div class='add'>+				tpiu_in_port: endpoint {</div><div class='add'>+					slave-mode;</div><div class='add'>+					remote-endpoint = &lt;&amp;replicator_out_port0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etb@801a4000 {</div><div class='add'>+			compatible = "arm,coresight-etb10", "arm,primecell";</div><div class='add'>+			reg = &lt;0x801a4000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;prcmu_clk PRCMU_APETRACECLK&gt;, &lt;&amp;prcmu_clk PRCMU_APEATCLK&gt;;</div><div class='add'>+			clock-names = "apb_pclk", "atclk";</div><div class='add'>+			port {</div><div class='add'>+				etb_in_port: endpoint {</div><div class='add'>+					slave-mode;</div><div class='add'>+					remote-endpoint = &lt;&amp;replicator_out_port1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		intc: interrupt-controller@a0411000 {</div><div class='ctx'> 			compatible = "arm,cortex-a9-gic";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='hunk'>@@ -31,6 +185,20 @@</div><div class='ctx'> 			      &lt;0xa0410100 0x100&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scu@a04100000 {</div><div class='add'>+			compatible = "arm,cortex-a9-scu";</div><div class='add'>+			reg = &lt;0xa0410000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The backup RAM is used for retention during sleep</div><div class='add'>+		 * and various things like spin tables</div><div class='add'>+		 */</div><div class='add'>+		backupram@80150000 {</div><div class='add'>+			compatible = "ste,dbx500-backupram";</div><div class='add'>+			reg = &lt;0x80150000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		L2: l2-cache {</div><div class='ctx'> 			compatible = "arm,pl310-cache";</div><div class='ctx'> 			reg = &lt;0xa0412000 0x1000&gt;;</div><div class='hunk'>@@ -91,6 +259,13 @@</div><div class='ctx'> 			clocks = &lt;&amp;smp_twd_clk&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		watchdog@a0410620 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-wdt";</div><div class='add'>+			reg = &lt;0xa0410620 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 14 0x304&gt;;</div><div class='add'>+			clocks = &lt;&amp;smp_twd_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc@80154000 {</div><div class='ctx'> 			compatible = "arm,rtc-pl031", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x80154000 0x1000&gt;;</div><div class='hunk'>@@ -796,7 +971,7 @@</div><div class='ctx'> 			power-domains = &lt;&amp;pm_domains DOMAIN_VAPE&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart@80120000 {</div><div class='add'>+		ux500_serial0: uart@80120000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x80120000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -811,7 +986,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart@80121000 {</div><div class='add'>+		ux500_serial1: uart@80121000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x80121000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -826,7 +1001,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart@80007000 {</div><div class='add'>+		ux500_serial2: uart@80007000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x80007000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-href-stuib.dtsi b/arch/arm/boot/dts/ste-href-stuib.dtsi<br/>index 7d4f8184c522..78b75256c638 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href-stuib.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-href-stuib.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href-stuib.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href-stuib.dtsi</a></div><div class='hunk'>@@ -77,6 +77,34 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* Sensors mounted on this board variant */</div><div class='add'>+		i2c@80128000 {</div><div class='add'>+			lis331dl@1c {</div><div class='add'>+				/* Accelerometer */</div><div class='add'>+				compatible = "st,lis331dl-accel";</div><div class='add'>+				st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x1c&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;ab8500_ldo_aux1_reg&gt;;</div><div class='add'>+				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;accel_stuib_mode&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+				interrupts = &lt;18 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					     &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			};</div><div class='add'>+			ak8974@0f {</div><div class='add'>+				/* Magnetometer */</div><div class='add'>+				compatible = "asahi-kasei,ak8974";</div><div class='add'>+				reg = &lt;0x0f&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;ab8500_ldo_aux1_reg&gt;;</div><div class='add'>+				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;magneto_stuib_mode&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+				interrupts = &lt;0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c@80110000 {</div><div class='ctx'> 			bu21013_tp@5c {</div><div class='ctx'> 				compatible = "rohm,bu21013_tp";</div><div class='hunk'>@@ -116,6 +144,28 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+			accelerometer {</div><div class='add'>+				accel_stuib_mode: accel_stuib {</div><div class='add'>+					/* Accelerometer interrupt lines 1 &amp; 2 */</div><div class='add'>+					stuib_cfg {</div><div class='add'>+						pins = "GPIO82_C1", "GPIO83_D3";</div><div class='add'>+						ste,config = &lt;&amp;gpio_in_pu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			magnetometer {</div><div class='add'>+				magneto_stuib_mode: magneto_stuib {</div><div class='add'>+					/* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */</div><div class='add'>+					stuib_cfg1 {</div><div class='add'>+						pins = "GPIO31_V3";</div><div class='add'>+						ste,config = &lt;&amp;gpio_in_pu&gt;;</div><div class='add'>+					};</div><div class='add'>+					stuib_cfg2 {</div><div class='add'>+						pins = "GPIO32_V2";</div><div class='add'>+						ste,config = &lt;&amp;gpio_in_pd&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi<br/>index 062c6aae3afa..0e1c96943d47 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href-tvk1281618.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-href-tvk1281618.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href-tvk1281618.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href-tvk1281618.dtsi</a></div><div class='hunk'>@@ -99,10 +99,13 @@</div><div class='ctx'> 				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;accel_tvk_mode&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+				interrupts = &lt;18 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					     &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			};</div><div class='del'>-			lsm303dlm@1e {</div><div class='add'>+			lsm303dlh@1e {</div><div class='ctx'> 				/* Magnetometer */</div><div class='del'>-				compatible = "st,lsm303dlm-magn";</div><div class='add'>+				compatible = "st,lsm303dlh-magn";</div><div class='ctx'> 				reg = &lt;0x1e&gt;;</div><div class='ctx'> 				vdd-supply = &lt;&amp;ab8500_ldo_aux1_reg&gt;;</div><div class='ctx'> 				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi<br/>index 744c1e3a744d..6d8ce154347e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-href.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-href.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-href.dtsi</a></div><div class='hunk'>@@ -32,11 +32,11 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* This UART is unused and thus left disabled */</div><div class='ctx'> 		uart@80121000 {</div><div class='ctx'> 			pinctrl-names = "default", "sleep";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;uart1_default_mode&gt;;</div><div class='ctx'> 			pinctrl-1 = &lt;&amp;uart1_sleep_mode&gt;;</div><div class='del'>-			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart@80007000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefprev60-stuib.dts b/arch/arm/boot/dts/ste-hrefprev60-stuib.dts<br/>index 2b1cb5b584b6..18e9795a94f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60-stuib.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefprev60-stuib.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60-stuib.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60-stuib.dts</a></div><div class='hunk'>@@ -17,6 +17,13 @@</div><div class='ctx'> 	model = "ST-Ericsson HREF (pre-v60) and ST UIB";</div><div class='ctx'> 	compatible = "st-ericsson,mop500", "st-ericsson,u8500";</div><div class='ctx'> </div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		/* Reset line for the BU21013 touchscreen */</div><div class='ctx'> 		i2c@80110000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefprev60-tvk.dts b/arch/arm/boot/dts/ste-hrefprev60-tvk.dts<br/>index 59523f866812..24739914e689 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60-tvk.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefprev60-tvk.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60-tvk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60-tvk.dts</a></div><div class='hunk'>@@ -16,4 +16,11 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "ST-Ericsson HREF (pre-v60) and TVK1281618 UIB";</div><div class='ctx'> 	compatible = "st-ericsson,mop500", "st-ericsson,u8500";</div><div class='add'>+</div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi<br/>index 7f3975b58d16..b0278f4c486c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefprev60.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefprev60.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefprev60.dtsi</a></div><div class='hunk'>@@ -23,6 +23,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='add'>+		/* Enable UART1 on this board */</div><div class='add'>+		uart@80121000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c@80004000 {</div><div class='ctx'> 			tps61052@33 {</div><div class='ctx'> 				compatible = "tps61052";</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts b/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts<br/>index 8c6a2de56cf1..c2e1ba019a2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefv60plus-stuib.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus-stuib.dts</a></div><div class='hunk'>@@ -19,6 +19,13 @@</div><div class='ctx'> 	model = "ST-Ericsson HREF (v60+) and ST UIB";</div><div class='ctx'> 	compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";</div><div class='ctx'> </div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		/* Reset line for the BU21013 touchscreen */</div><div class='ctx'> 		i2c@80110000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts b/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts<br/>index d53cccdce776..ebd8547e98f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefv60plus-tvk.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus-tvk.dts</a></div><div class='hunk'>@@ -18,4 +18,11 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "ST-Ericsson HREF (v60+) and TVK1281618 UIB";</div><div class='ctx'> 	compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";</div><div class='add'>+</div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi<br/>index a4bc9e77d640..810cda743b6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-hrefv60plus.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-hrefv60plus.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-hrefv60plus.dtsi</a></div><div class='hunk'>@@ -43,15 +43,26 @@</div><div class='ctx'> 				  &lt;&amp;vaudio_hf_hrefv60_mode&gt;,</div><div class='ctx'> 				  &lt;&amp;gbf_hrefv60_mode&gt;,</div><div class='ctx'> 				  &lt;&amp;hdtv_hrefv60_mode&gt;,</div><div class='del'>-				  &lt;&amp;touch_hrefv60_mode&gt;;</div><div class='add'>+				  &lt;&amp;touch_hrefv60_mode&gt;,</div><div class='add'>+				  &lt;&amp;gpios_hrefv60_mode&gt;;</div><div class='ctx'> </div><div class='ctx'> 			sdi0 {</div><div class='del'>-				/* SD card detect GPIO pin, extend default state */</div><div class='ctx'> 				sdi0_default_mode: sdi0_default {</div><div class='add'>+					/* SD card detect GPIO pin, extend default state */</div><div class='ctx'> 					default_hrefv60_cfg1 {</div><div class='ctx'> 						pins = "GPIO95_E8";</div><div class='ctx'> 						ste,config = &lt;&amp;gpio_in_pu&gt;;</div><div class='ctx'> 					};</div><div class='add'>+					/* VMMCI level-shifter enable */</div><div class='add'>+					default_hrefv60_cfg2 {</div><div class='add'>+						pins = "GPIO169_D22";</div><div class='add'>+						ste,config = &lt;&amp;gpio_out_lo&gt;;</div><div class='add'>+					};</div><div class='add'>+					/* VMMCI level-shifter voltage select */</div><div class='add'>+					default_hrefv60_cfg3 {</div><div class='add'>+						pins = "GPIO5_AG6";</div><div class='add'>+						ste,config = &lt;&amp;gpio_out_hi&gt;;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 			ipgpio {</div><div class='hunk'>@@ -213,6 +224,16 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+			gpios {</div><div class='add'>+				/* Dangling GPIO pins */</div><div class='add'>+				gpios_hrefv60_mode: gpios_hrefv60 {</div><div class='add'>+					default_cfg1 {</div><div class='add'>+						/* Normally UART1 RXD, now dangling */</div><div class='add'>+						pins = "GPIO4_AH6";</div><div class='add'>+						ste,config = &lt;&amp;in_pu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi<br/>index f182f6538e90..9a5f2ba139b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-nomadik-stn8815.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-nomadik-stn8815.dtsi</a></div><div class='hunk'>@@ -722,8 +722,9 @@</div><div class='ctx'> 			   reg = &lt;0x1a&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		lis3lv02dl@1d {</div><div class='del'>-			   compatible = "st,lis3lv02dl";</div><div class='del'>-			   reg = &lt;0x1d&gt;;</div><div class='add'>+			/* Accelerometer */</div><div class='add'>+			compatible = "st,lis3lv02dl-accel";</div><div class='add'>+			reg = &lt;0x1d&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts<br/>index 1bc84ebdccaa..32a5ccb14e7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-snowball.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/ste-snowball.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ste-snowball.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/ste-snowball.dts</a></div><div class='hunk'>@@ -18,6 +18,13 @@</div><div class='ctx'> 	model = "Calao Systems Snowball platform with device tree";</div><div class='ctx'> 	compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";</div><div class='ctx'> </div><div class='add'>+	/* This stablilizes the serial port enumeration */</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;ux500_serial0;</div><div class='add'>+		serial1 = &amp;ux500_serial1;</div><div class='add'>+		serial2 = &amp;ux500_serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -223,11 +230,11 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* This UART is unused and thus left disabled */</div><div class='ctx'> 		uart@80121000 {</div><div class='ctx'> 			pinctrl-names = "default", "sleep";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;uart1_default_mode&gt;;</div><div class='ctx'> 			pinctrl-1 = &lt;&amp;uart1_sleep_mode&gt;;</div><div class='del'>-			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart@80007000 {</div><div class='hunk'>@@ -262,15 +269,19 @@</div><div class='ctx'> 				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;accel_snowball_mode&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+				interrupts = &lt;3 IRQ_TYPE_EDGE_RISING&gt;, /* INT1 */</div><div class='add'>+					     &lt;4 IRQ_TYPE_EDGE_RISING&gt;; /* INT2 */</div><div class='ctx'> 			};</div><div class='del'>-			lsm303dlm@1e {</div><div class='add'>+			lsm303dlh@1e {</div><div class='ctx'> 				/* Magnetometer */</div><div class='del'>-				compatible = "st,lsm303dlm-magn";</div><div class='add'>+				compatible = "st,lsm303dlh-magn";</div><div class='ctx'> 				reg = &lt;0x1e&gt;;</div><div class='ctx'> 				vdd-supply = &lt;&amp;ab8500_ldo_aux1_reg&gt;;</div><div class='ctx'> 				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;magneto_snowball_mode&gt;;</div><div class='add'>+				gpios = &lt;&amp;gpio5 5 0x4&gt;; /* DRDY line */</div><div class='ctx'> 			};</div><div class='ctx'> 			l3g4200d@68 {</div><div class='ctx'> 				/* Gyroscope */</div><div class='hunk'>@@ -279,6 +290,11 @@</div><div class='ctx'> 				reg = &lt;0x68&gt;;</div><div class='ctx'> 				vdd-supply = &lt;&amp;ab8500_ldo_aux1_reg&gt;;</div><div class='ctx'> 				vddio-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;gyro_snowball_mode&gt;;</div><div class='add'>+				gpios = &lt;&amp;gpio5 6 0x4&gt;; /* DRDY line */</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_EDGE_RISING&gt;; /* INT1 */</div><div class='ctx'> 			};</div><div class='ctx'> 			lsp001wm@5c {</div><div class='ctx'> 				/* Barometer/pressure sensor */</div><div class='hunk'>@@ -443,7 +459,21 @@</div><div class='ctx'> 						pins = "GPIO21_AB3"; /* DAT31DIR */</div><div class='ctx'> 						ste,config = &lt;&amp;out_hi&gt;;</div><div class='ctx'> 					};</div><div class='del'>-</div><div class='add'>+					/* SD card detect GPIO pin, extend default state */</div><div class='add'>+					snowball_cfg2 {</div><div class='add'>+						pins = "GPIO218_AH11";</div><div class='add'>+						ste,config = &lt;&amp;gpio_in_pu&gt;;</div><div class='add'>+					};</div><div class='add'>+					/* VMMCI level-shifter enable */</div><div class='add'>+					snowball_cfg3 {</div><div class='add'>+						pins = "GPIO217_AH12";</div><div class='add'>+						ste,config = &lt;&amp;gpio_out_lo&gt;;</div><div class='add'>+					};</div><div class='add'>+					/* VMMCI level-shifter voltage select */</div><div class='add'>+					snowball_cfg4 {</div><div class='add'>+						pins = "GPIO228_AJ6";</div><div class='add'>+						ste,config = &lt;&amp;gpio_out_hi&gt;;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 			ssp0 {</div><div class='hunk'>@@ -489,6 +519,16 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+			gyro {</div><div class='add'>+				gyro_snowball_mode: gyro_snowball {</div><div class='add'>+					snowball_cfg1 {</div><div class='add'>+						pins =</div><div class='add'>+						"GPIO166_A22", /* DRDY */</div><div class='add'>+						"GPIO169_D22"; /* INT */</div><div class='add'>+						ste,config = &lt;&amp;gpio_in_pu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 			magnetometer {</div><div class='ctx'> 				magneto_snowball_mode: magneto_snowball {</div><div class='ctx'> 					snowball_cfg1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts<br/>index af487145cd89..6d93475be554 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-b2120.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih407-b2120.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-b2120.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-b2120.dts</a></div><div class='hunk'>@@ -7,8 +7,8 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "stihxxx-b2120.dtsi"</div><div class='ctx'> #include "stih407.dtsi"</div><div class='add'>+#include "stihxxx-b2120.dtsi"</div><div class='ctx'> / {</div><div class='ctx'> 	model = "STiH407 B2120";</div><div class='ctx'> 	compatible = "st,stih407-b2120", "st,stih407";</div><div class='head'>diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi<br/>index c06a54681912..838b812cbda1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-family.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih407-family.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-family.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-family.dtsi</a></div><div class='hunk'>@@ -7,7 +7,10 @@</div><div class='ctx'>  * publishhed by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> #include "stih407-pinctrl.dtsi"</div><div class='add'>+#include &lt;dt-bindings/mfd/st-lpc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset-controller/stih407-resets.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq-st.h&gt;</div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -56,6 +59,12 @@</div><div class='ctx'> 		cache-level = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	arm-pmu {</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		compatible = "arm,cortex-a9-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -63,6 +72,12 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> </div><div class='add'>+		restart {</div><div class='add'>+			compatible = "st,stih407-restart";</div><div class='add'>+			st,syscfg = &lt;&amp;syscfg_sbc_reg&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		powerdown: powerdown-controller {</div><div class='ctx'> 			compatible = "st,stih407-powerdown";</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -113,6 +128,15 @@</div><div class='ctx'> 			reg = &lt;0x94b5100 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		irq-syscfg {</div><div class='add'>+			compatible    = "st,stih407-irq-syscfg";</div><div class='add'>+			st,syscfg     = &lt;&amp;syscfg_core&gt;;</div><div class='add'>+			st,irq-device = &lt;ST_IRQ_SYSCFG_PMU_0&gt;,</div><div class='add'>+					&lt;ST_IRQ_SYSCFG_PMU_1&gt;;</div><div class='add'>+			st,fiq-device = &lt;ST_IRQ_SYSCFG_DISABLED&gt;,</div><div class='add'>+					&lt;ST_IRQ_SYSCFG_DISABLED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial@9830000 {</div><div class='ctx'> 			compatible = "st,asc";</div><div class='ctx'> 			reg = &lt;0x9830000 0x2c&gt;;</div><div class='hunk'>@@ -280,7 +304,7 @@</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='ctx'> 			st,syscfg = &lt;&amp;syscfg_core 0x100 0xf4&gt;;</div><div class='ctx'> 			resets = &lt;&amp;softreset STIH407_PICOPHY_SOFTRESET&gt;,</div><div class='del'>-				 &lt;&amp;picophyreset STIH407_PICOPHY0_RESET&gt;;</div><div class='add'>+				 &lt;&amp;picophyreset STIH407_PICOPHY2_RESET&gt;;</div><div class='ctx'> 			reset-names = "global", "port";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -336,5 +360,210 @@</div><div class='ctx'> 				resets = &lt;&amp;softreset STIH407_MIPHY2_SOFTRESET&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		spi@9840000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9840000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_spi0_default&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9841000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9841000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9842000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9842000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9843000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9843000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9844000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9844000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SBC SSC */</div><div class='add'>+		spi@9540000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9540000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9541000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9541000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@9542000 {</div><div class='add'>+			compatible = "st,comms-ssc4-spi";</div><div class='add'>+			reg = &lt;0x9542000 0x110&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			clock-names = "ssc";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: sdhci@09060000 {</div><div class='add'>+			compatible = "st,sdhci-stih407", "st,sdhci";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0x09060000 0x7ff&gt;, &lt;0x9061008 0x20&gt;;</div><div class='add'>+			reg-names = "mmc", "top-mmc-delay";</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			interrupt-names = "mmcirq";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_mmc0&gt;;</div><div class='add'>+			clock-names = "mmc";</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_MMC_0&gt;;</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			non-removable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: sdhci@09080000 {</div><div class='add'>+			compatible = "st,sdhci-stih407", "st,sdhci";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0x09080000 0x7ff&gt;;</div><div class='add'>+			reg-names = "mmc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			interrupt-names = "mmcirq";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_sd1&gt;;</div><div class='add'>+			clock-names = "mmc";</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_MMC_1&gt;;</div><div class='add'>+			resets = &lt;&amp;softreset STIH407_MMC1_SOFTRESET&gt;;</div><div class='add'>+			bus-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Watchdog and Real-Time Clock */</div><div class='add'>+		lpc@8787000 {</div><div class='add'>+			compatible = "st,stih407-lpc";</div><div class='add'>+			reg = &lt;0x8787000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 129 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_d3_flexgen CLK_LPC_0&gt;;</div><div class='add'>+			timeout-sec = &lt;120&gt;;</div><div class='add'>+			st,syscfg = &lt;&amp;syscfg_core&gt;;</div><div class='add'>+			st,lpc-mode = &lt;ST_LPC_MODE_WDT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpc@8788000 {</div><div class='add'>+			compatible = "st,stih407-lpc";</div><div class='add'>+			reg = &lt;0x8788000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 130 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_s_d3_flexgen CLK_LPC_1&gt;;</div><div class='add'>+			st,lpc-mode = &lt;ST_LPC_MODE_RTC&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata0: sata@9b20000 {</div><div class='add'>+			compatible = "st,ahci";</div><div class='add'>+			reg = &lt;0x9b20000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 159 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			interrupt-names = "hostc";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;phy_port0 PHY_TYPE_SATA&gt;;</div><div class='add'>+			phy-names = "ahci_phy";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;powerdown STIH407_SATA0_POWERDOWN&gt;,</div><div class='add'>+				 &lt;&amp;softreset STIH407_SATA0_SOFTRESET&gt;,</div><div class='add'>+				 &lt;&amp;softreset STIH407_SATA0_PWR_SOFTRESET&gt;;</div><div class='add'>+			reset-names = "pwr-dwn", "sw-rst", "pwr-rst";</div><div class='add'>+</div><div class='add'>+			clock-names = "ahci_clk";</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_ICN_REG&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata1: sata@9b28000 {</div><div class='add'>+			compatible = "st,ahci";</div><div class='add'>+			reg = &lt;0x9b28000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			interrupt-names = "hostc";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;phy_port1 PHY_TYPE_SATA&gt;;</div><div class='add'>+			phy-names = "ahci_phy";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;powerdown STIH407_SATA1_POWERDOWN&gt;,</div><div class='add'>+				 &lt;&amp;softreset STIH407_SATA1_SOFTRESET&gt;,</div><div class='add'>+				 &lt;&amp;softreset STIH407_SATA1_PWR_SOFTRESET&gt;;</div><div class='add'>+			reset-names = "pwr-dwn",</div><div class='add'>+				      "sw-rst",</div><div class='add'>+				      "pwr-rst";</div><div class='add'>+</div><div class='add'>+			clock-names = "ahci_clk";</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_ICN_REG&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		st_dwc3: dwc3@8f94000 {</div><div class='add'>+			compatible	= "st,stih407-dwc3";</div><div class='add'>+			reg		= &lt;0x08f94000 0x1000&gt;, &lt;0x110 0x4&gt;;</div><div class='add'>+			reg-names	= "reg-glue", "syscfg-reg";</div><div class='add'>+			st,syscfg	= &lt;&amp;syscfg_core&gt;;</div><div class='add'>+			resets		= &lt;&amp;powerdown STIH407_USB3_POWERDOWN&gt;,</div><div class='add'>+					  &lt;&amp;softreset STIH407_MIPHY2_SOFTRESET&gt;;</div><div class='add'>+			reset-names	= "powerdown", "softreset";</div><div class='add'>+			#address-cells	= &lt;1&gt;;</div><div class='add'>+			#size-cells	= &lt;1&gt;;</div><div class='add'>+			pinctrl-names	= "default";</div><div class='add'>+			pinctrl-0	= &lt;&amp;pinctrl_usb3&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			dwc3: dwc3@9900000 {</div><div class='add'>+				compatible	= "snps,dwc3";</div><div class='add'>+				reg		= &lt;0x09900000 0x100000&gt;;</div><div class='add'>+				interrupts	= &lt;GIC_SPI 155 IRQ_TYPE_NONE&gt;;</div><div class='add'>+				dr_mode		= "host";</div><div class='add'>+				phy-names	= "usb2-phy", "usb3-phy";</div><div class='add'>+				phys		= &lt;&amp;usb2_picophy0&gt;,</div><div class='add'>+						  &lt;&amp;phy_port2 PHY_TYPE_USB3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi<br/>index 402844cb3152..0a754f275212 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-pinctrl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih407-pinctrl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407-pinctrl.dtsi</a></div><div class='hunk'>@@ -104,6 +104,7 @@</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x5000 0x100&gt;;</div><div class='ctx'> 				st,bank-name = "PIO5";</div><div class='add'>+				st,retime-pin-mask = &lt;0x3f&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			rc {</div><div class='hunk'>@@ -519,6 +520,7 @@</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x5000 0x100&gt;;</div><div class='ctx'> 				st,bank-name = "PIO35";</div><div class='add'>+				st,retime-pin-mask = &lt;0x7f&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			i2c4 {</div><div class='head'>diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi<br/>index 3efa3b2ebe90..2c560fc30503 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih407.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih407.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih407.dtsi</a></div><div class='hunk'>@@ -147,5 +147,33 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		/* COMMS PWM Module */</div><div class='add'>+		pwm0: pwm@9810000 {</div><div class='add'>+			compatible	= "st,sti-pwm";</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			#pwm-cells	= &lt;2&gt;;</div><div class='add'>+			reg		= &lt;0x9810000 0x68&gt;;</div><div class='add'>+			pinctrl-names	= "default";</div><div class='add'>+			pinctrl-0	= &lt;&amp;pinctrl_pwm0_chan0_default&gt;;</div><div class='add'>+			clock-names	= "pwm";</div><div class='add'>+			clocks		= &lt;&amp;clk_sysin&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SBC PWM Module */</div><div class='add'>+		pwm1: pwm@9510000 {</div><div class='add'>+			compatible	= "st,sti-pwm";</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			#pwm-cells	= &lt;2&gt;;</div><div class='add'>+			reg		= &lt;0x9510000 0x68&gt;;</div><div class='add'>+			pinctrl-names	= "default";</div><div class='add'>+			pinctrl-0	= &lt;&amp;pinctrl_pwm1_chan0_default</div><div class='add'>+					&amp;pinctrl_pwm1_chan1_default</div><div class='add'>+					&amp;pinctrl_pwm1_chan2_default</div><div class='add'>+					&amp;pinctrl_pwm1_chan3_default&gt;;</div><div class='add'>+			clock-names	= "pwm";</div><div class='add'>+			clocks		= &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			st,pwm-num-chan = &lt;4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts<br/>index 2f61a9960dee..16f02c5e33a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih410-b2120.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih410-b2120.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih410-b2120.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih410-b2120.dts</a></div><div class='hunk'>@@ -26,4 +26,14 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ttyAS0 = &amp;sbc_serial0;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+</div><div class='add'>+		mmc0: sdhci@09060000 {</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			sd-uhs-sdr50;</div><div class='add'>+			sd-uhs-sdr104;</div><div class='add'>+			sd-uhs-ddr50;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stih416-b2020e.dts b/arch/arm/boot/dts/stih416-b2020e.dts<br/>index 961799e1dc51..f1ceee192a0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416-b2020e.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih416-b2020e.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416-b2020e.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416-b2020e.dts</a></div><div class='hunk'>@@ -51,5 +51,15 @@</div><div class='ctx'> 		sata0: sata@fe380000{</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		/* SAS PWM Module */</div><div class='add'>+		pwm0: pwm@fed10000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SBC PWM Module */</div><div class='add'>+		pwm1: pwm@fe510000 {</div><div class='add'>+			status		= "okay";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi<br/>index 9cccf2d6aa26..051fc16f3706 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416-pinctrl.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih416-pinctrl.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416-pinctrl.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416-pinctrl.dtsi</a></div><div class='hunk'>@@ -216,6 +216,29 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			pwm1 {</div><div class='add'>+				pinctrl_pwm1_chan0_default: pwm1-0-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio3 0 ALT1 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				pinctrl_pwm1_chan1_default: pwm1-1-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio4 4 ALT1 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				pinctrl_pwm1_chan2_default: pwm1-2-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio4 6 ALT3 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				pinctrl_pwm1_chan3_default: pwm1-3-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio4 7 ALT3 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pin-controller-front {</div><div class='hunk'>@@ -310,6 +333,14 @@</div><div class='ctx'> 				st,bank-name	= "PIO31";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pwm0 {</div><div class='add'>+				pinctrl_pwm0_chan0_default: pwm0-0-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio9 7 ALT2 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			serial2-oe {</div><div class='ctx'> 				pinctrl_serial2_oe: serial2-1 {</div><div class='ctx'> 					st,pins {</div><div class='hunk'>@@ -540,6 +571,25 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			pwm0 {</div><div class='add'>+				pinctrl_pwm0_chan1_default: pwm0-1-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio13 2 ALT2 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				pinctrl_pwm0_chan2_default: pwm0-2-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio15 2 ALT4 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				pinctrl_pwm0_chan3_default: pwm0-3-default {</div><div class='add'>+					st,pins {</div><div class='add'>+						pwm-out    = &lt;&amp;pio17 4 ALT1 OUT&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pin-controller-fvdp-fe {</div><div class='head'>diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi<br/>index eeb7afecbbe6..9dca173e694a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih416.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih416.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih416.dtsi</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset-controller/stih416-resets.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq-st.h&gt;</div><div class='ctx'> / {</div><div class='ctx'> 	L2: cache-controller {</div><div class='ctx'> 		compatible = "arm,pl310-cache";</div><div class='hunk'>@@ -23,6 +24,12 @@</div><div class='ctx'> 		cache-level = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	arm-pmu {</div><div class='add'>+		compatible = "arm,cortex-a9-pmu";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -30,6 +37,12 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		compatible	= "simple-bus";</div><div class='ctx'> </div><div class='add'>+		restart {</div><div class='add'>+			compatible = "st,stih416-restart";</div><div class='add'>+			st,syscfg = &lt;&amp;syscfg_sbc&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		powerdown: powerdown-controller {</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "st,stih416-powerdown";</div><div class='hunk'>@@ -86,6 +99,15 @@</div><div class='ctx'> 			reg		= &lt;0xfe4b5100 0x8&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		irq-syscfg {</div><div class='add'>+			compatible    = "st,stih416-irq-syscfg";</div><div class='add'>+			st,syscfg     = &lt;&amp;syscfg_cpu&gt;;</div><div class='add'>+			st,irq-device = &lt;ST_IRQ_SYSCFG_PMU_0&gt;,</div><div class='add'>+					&lt;ST_IRQ_SYSCFG_PMU_1&gt;;</div><div class='add'>+			st,fiq-device = &lt;ST_IRQ_SYSCFG_DISABLED&gt;,</div><div class='add'>+					&lt;ST_IRQ_SYSCFG_DISABLED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial2: serial@fed32000{</div><div class='ctx'> 			compatible	= "st,asc";</div><div class='ctx'> 			status 		= "disabled";</div><div class='hunk'>@@ -104,7 +126,7 @@</div><div class='ctx'> 			interrupts	= &lt;0 210 0&gt;;</div><div class='ctx'> 			pinctrl-names 	= "default";</div><div class='ctx'> 			pinctrl-0 	= &lt;&amp;pinctrl_sbc_serial1&gt;;</div><div class='del'>-			clocks          = &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			clocks		= &lt;&amp;clk_sysin&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@fed40000 {</div><div class='hunk'>@@ -445,5 +467,47 @@</div><div class='ctx'> 				 &lt;&amp;softreset STIH416_USB3_SOFTRESET&gt;;</div><div class='ctx'> 			reset-names = "power", "softreset";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		/* SAS PWM Module */</div><div class='add'>+		pwm0: pwm@fed10000 {</div><div class='add'>+			compatible	= "st,sti-pwm";</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			#pwm-cells	= &lt;2&gt;;</div><div class='add'>+			reg		= &lt;0xfed10000 0x68&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names	= "default";</div><div class='add'>+			pinctrl-0 = 	&lt;&amp;pinctrl_pwm0_chan0_default</div><div class='add'>+					&amp;pinctrl_pwm0_chan1_default</div><div class='add'>+					&amp;pinctrl_pwm0_chan2_default</div><div class='add'>+					&amp;pinctrl_pwm0_chan3_default&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names	= "pwm";</div><div class='add'>+			clocks		= &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			st,pwm-num-chan = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SBC PWM Module */</div><div class='add'>+		pwm1: pwm@fe510000 {</div><div class='add'>+			compatible	= "st,sti-pwm";</div><div class='add'>+			status		= "disabled";</div><div class='add'>+			#pwm-cells	= &lt;2&gt;;</div><div class='add'>+			reg		= &lt;0xfe510000 0x68&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names	= "default";</div><div class='add'>+			pinctrl-0	= &lt;&amp;pinctrl_pwm1_chan0_default</div><div class='add'>+					/*</div><div class='add'>+					 * Shared with SBC_OBS_NOTRST.  Don't</div><div class='add'>+					 * enable unless you really know what</div><div class='add'>+					 * you're doing.</div><div class='add'>+					 *</div><div class='add'>+					 * &amp;pinctrl_pwm1_chan1_default</div><div class='add'>+					 */</div><div class='add'>+					&amp;pinctrl_pwm1_chan2_default</div><div class='add'>+					&amp;pinctrl_pwm1_chan3_default&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names	= "pwm";</div><div class='add'>+			clocks		= &lt;&amp;clk_sysin&gt;;</div><div class='add'>+			st,pwm-num-chan = &lt;3&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts<br/>index 926235c08e4d..82eee39ccb31 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stih418-b2199.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stih418-b2199.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stih418-b2199.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stih418-b2199.dts</a></div><div class='hunk'>@@ -74,5 +74,32 @@</div><div class='ctx'> 			st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='ctx'> 			st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mmc1: sdhci@09080000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: sdhci@09060000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			sd-uhs-sdr50;</div><div class='add'>+			sd-uhs-sdr104;</div><div class='add'>+			sd-uhs-ddr50;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		miphy28lp_phy: miphy28lp@9b22000 {</div><div class='add'>+</div><div class='add'>+			phy_port0: port@9b22000 {</div><div class='add'>+				st,osc-rdy;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			phy_port1: port@9b2a000 {</div><div class='add'>+				st,osc-force-ext;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		st_dwc3: dwc3@8f94000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi<br/>index c1d859092be7..f589fe487f13 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/stihxxx-b2120.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/stihxxx-b2120.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stihxxx-b2120.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stihxxx-b2120.dtsi</a></div><div class='hunk'>@@ -47,6 +47,14 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mmc0: sdhci@09060000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: sdhci@09080000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		/* SSC11 to HDMI */</div><div class='ctx'> 		hdmiddc: i2c@9541000 {</div><div class='ctx'> 			status = "okay";</div><div class='hunk'>@@ -66,5 +74,10 @@</div><div class='ctx'> 				st,osc-force-ext;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		st_dwc3: dwc3@8f94000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts<br/>new file mode 100644<br/>index 000000000000..6b9aa59d978a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stm32f429-disco.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stm32f429-disco.dts</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 - Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "stm32f429.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32F429i-DISCO board";</div><div class='add'>+	compatible = "st,stm32f429i-disco", "st,stm32f429";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200 root=/dev/ram rdinit=/linuxrc";</div><div class='add'>+		linux,stdout-path = &amp;usart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x90000000 0x800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;usart1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi<br/>new file mode 100644<br/>index 000000000000..aa73b4f4172c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/stm32f429.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/stm32f429.dtsi</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 - Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "armv7-m.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	clocks {</div><div class='add'>+		clk_sysclk: clk-sysclk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;180000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_hclk: clk-hclk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;180000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_pclk1: clk-pclk1 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;45000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_pclk2: clk-pclk2 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;90000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_pmtr1: clk-pmtr1 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;90000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_pmtr2: clk-pmtr2 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;180000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_systick: clk-systick {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;clk_hclk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-div = &lt;8&gt;;</div><div class='add'>+			clock-mult = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		timer2: timer@40000000 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40000000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;28&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer3: timer@40000400 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40000400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;29&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer4: timer@40000800 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40000800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;30&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer5: timer@40000c00 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40000c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;50&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer6: timer@40001000 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40001000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;54&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer7: timer@40001400 {</div><div class='add'>+			compatible = "st,stm32-timer";</div><div class='add'>+			reg = &lt;0x40001400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;55&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pmtr1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart2: serial@40004400 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40004400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;38&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart3: serial@40004800 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40004800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;39&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart4: serial@40004c00 {</div><div class='add'>+			compatible = "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40004c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;52&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart5: serial@40005000 {</div><div class='add'>+			compatible = "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40005000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;53&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart7: serial@40007800 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40007800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;82&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart8: serial@40007c00 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40007c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;83&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart1: serial@40011000 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40011000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;37&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usart6: serial@40011400 {</div><div class='add'>+			compatible = "st,stm32-usart", "st,stm32-uart";</div><div class='add'>+			reg = &lt;0x40011400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;71&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_pclk2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;systick {</div><div class='add'>+	clocks = &lt;&amp;clk_systick&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts<br/>index b67e5be618cf..2630d78d9e04 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-a1000.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-a1000.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-a1000.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-a1000.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,101 +53,12 @@</div><div class='ctx'> 	model = "Mele A1000";</div><div class='ctx'> 	compatible = "mele,a1000", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			phy-supply = &lt;&amp;reg_emac_3v3&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			emac_power_pin_a1000: emac_power_pin@0 {</div><div class='del'>-				allwinner,pins = "PH15";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_a1000: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH10", "PH20";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -181,12 +87,111 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	phy-supply = &lt;&amp;reg_emac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	emac_power_pin_a1000: emac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH15";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	led_pins_a1000: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH10", "PH20";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts<br/>index 490b77c9bb36..93d435670ef1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -55,94 +50,104 @@</div><div class='ctx'> 	model = "BA10 tvbox";</div><div class='ctx'> 	compatible = "allwinner,ba10-tvbox", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			usb2_vbus_pin_a: usb2_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PH12";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	usb2_vbus_pin_a: usb2_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH12";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts<br/>index 58214f249598..5878a0b11f7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -49,10 +44,19 @@</div><div class='ctx'> #include "sun4i-a10.dtsi"</div><div class='ctx'> #include "sunxi-common-regulators.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Chuwi V7 CW0825";</div><div class='ctx'> 	compatible = "chuwi,v7-cw0825", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci1 {</div><div class='hunk'>@@ -74,6 +78,32 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@800 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@1000 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@1200 {</div><div class='add'>+		label = "Back";</div><div class='add'>+		linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts<br/>index 4260c2b47607..9afb4e018593 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-cubieboard.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-cubieboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-cubieboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-cubieboard.dts</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -57,102 +52,12 @@</div><div class='ctx'> 	model = "Cubietech Cubieboard";</div><div class='ctx'> 	compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			led_pins_cubieboard: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH20", "PH21";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		spi0: spi@01c05000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spi0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -171,26 +76,100 @@</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#include "axp209.dtsi"</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-&amp;cpu0 {</div><div class='del'>-	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_cubieboard: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH20", "PH21";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;reg_dcdc2 {</div><div class='ctx'> 	regulator-always-on;</div><div class='ctx'> 	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -215,3 +194,30 @@</div><div class='ctx'> 	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 	regulator-name = "avcc";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts<br/>new file mode 100644<br/>index 000000000000..570754d8df67<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-gemei-g9.dts</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Priit Laes</div><div class='add'>+ *</div><div class='add'>+ * Priit Laes &lt;plaes@plaes.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun4i-a10.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Gemei G9 Tablet";</div><div class='add'>+	compatible = "gemei,g9", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO:</div><div class='add'>+ *   2x cameras via CSI</div><div class='add'>+ *   bma250 IRQs</div><div class='add'>+ *   AXP battery management</div><div class='add'>+ *   NAND</div><div class='add'>+ *   OTG</div><div class='add'>+ *   Touchscreen - gt801_2plus1 @ i2c adapter 2 @ 0x48</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Accelerometer */</div><div class='add'>+	bma250@18 {</div><div class='add'>+		compatible = "bosch,bma250";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: interrupt pins:</div><div class='add'>+		 * int1 - PH00</div><div class='add'>+		 * int2 - PI10</div><div class='add'>+		 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@158 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;158730&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@349 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;349206&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@1142 {</div><div class='add'>+		label = "Esc";</div><div class='add'>+		linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1142856&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH01 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;uart0  {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts<br/>index d3f73ea25567..2b17c5199151 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-hackberry.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-hackberry.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-hackberry.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-hackberry.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,100 +53,12 @@</div><div class='ctx'> 	model = "Miniand Hackberry";</div><div class='ctx'> 	compatible = "miniand,hackberry", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy0&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			phy-supply = &lt;&amp;reg_emac_3v3&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy0: ethernet-phy@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;hackberry_hogs&gt;;</div><div class='del'>-</div><div class='del'>-			hackberry_hogs: hogs@0 {</div><div class='del'>-				allwinner,pins = "PH19";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2_vbus_pin_hackberry: usb2_vbus_pin@0 {</div><div class='del'>-					allwinner,pins = "PH12";</div><div class='del'>-					allwinner,function = "gpio_out";</div><div class='del'>-					allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-					allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_emac_3v3: emac-3v3 {</div><div class='hunk'>@@ -162,14 +69,97 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	phy-supply = &lt;&amp;reg_emac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb2_vbus_pin_hackberry&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hackberry_hogs&gt;;</div><div class='add'>+</div><div class='add'>+	hackberry_hogs: hogs@0 {</div><div class='add'>+		allwinner,pins = "PH19";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_vbus_pin_hackberry: usb2_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH12";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_vbus_pin_hackberry&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts<br/>index c88382aacc36..43f58fbe161c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -53,6 +48,14 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Hyundai A7HD";</div><div class='ctx'> 	compatible = "hyundai,a7hd", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts<br/>index 482914333bba..6c927a824ba2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-inet97fv2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-inet97fv2.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -61,66 +56,68 @@</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts<br/>new file mode 100644<br/>index 000000000000..dc2f2aeaff07<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts</a></div><div class='hunk'>@@ -0,0 +1,193 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Gábor Nyers</div><div class='add'>+ *</div><div class='add'>+ * Gábor Nyers &lt;gabor.nyers@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun4i-a10.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Jesurun Q5";</div><div class='add'>+	compatible = "jesurun,q5", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_q5&gt;;</div><div class='add'>+</div><div class='add'>+		green {</div><div class='add'>+			label = "q5:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 20 GPIO_ACTIVE_HIGH&gt;;  /* PH20 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_emac_3v3: emac-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;emac_power_pin_q5&gt;;</div><div class='add'>+		regulator-name = "emac-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 7 19 GPIO_ACTIVE_HIGH&gt;;   /* PH19 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	phy-supply = &lt;&amp;reg_emac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	emac_power_pin_q5: emac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH19";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_q5: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH20";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts<br/>index 9ee86a700c2b..02158bcd64ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-marsboard.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-marsboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-marsboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-marsboard.dts</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -57,6 +52,14 @@</div><div class='ctx'> 	model = "HAOYU Electronics Marsboard A10";</div><div class='ctx'> 	compatible = "haoyu,a10-marsboard", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -96,6 +99,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;emac {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='hunk'>@@ -166,7 +173,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs0_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts<br/>index eb5fd6904a69..ebe2a04ef649 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-mini-xplus.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mini-xplus.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,79 +53,83 @@</div><div class='ctx'> 	model = "PineRiver Mini X-Plus";</div><div class='ctx'> 	compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			ir0_pins_a: ir0@0 {</div><div class='del'>-				/* The ir receiver is not always populated */</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0_rx_pins_a {</div><div class='add'>+	/* The ir receiver is not always populated */</div><div class='add'>+	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts<br/>index e9a6886f0d51..3c7eebe17088 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mk802.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-mk802.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mk802.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mk802.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -53,6 +48,14 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "MK802";</div><div class='ctx'> 	compatible = "allwinner,mk802", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-mk802ii.dts b/arch/arm/boot/dts/sun4i-a10-mk802ii.dts<br/>index 802eda494d1c..c861fa7e356c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mk802ii.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-mk802ii.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-mk802ii.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-mk802ii.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -53,6 +48,14 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "MK802ii";</div><div class='ctx'> 	compatible = "allwinner,mk802ii", "allwinner,sun4i-a10";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts<br/>index 75742f8f96f3..b64aa4eb071e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -56,136 +51,143 @@</div><div class='ctx'> 	model = "Olimex A10-OLinuXino-LIME";</div><div class='ctx'> 	compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	cpus {</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			/*</div><div class='del'>-			 * The A10-Lime is known to be unstable</div><div class='del'>-			 * when running at 1008 MHz</div><div class='del'>-			 */</div><div class='del'>-			operating-points = &lt;</div><div class='del'>-				/* kHz    uV */</div><div class='del'>-				912000  1350000</div><div class='del'>-				864000  1300000</div><div class='del'>-				624000  1250000</div><div class='del'>-				&gt;;</div><div class='del'>-			cooling-max-level = &lt;2&gt;;</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			status = "okay";</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='ctx'> </div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='add'>+		green {</div><div class='add'>+			label = "a10-olinuxino-lime:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	/*</div><div class='add'>+	 * The A10-Lime is known to be unstable when running at 1008 MHz</div><div class='add'>+	 */</div><div class='add'>+	operating-points = &lt;</div><div class='add'>+		/* kHz    uV */</div><div class='add'>+		912000  1350000</div><div class='add'>+		864000  1300000</div><div class='add'>+		624000  1250000</div><div class='add'>+		&gt;;</div><div class='add'>+	cooling-max-level = &lt;2&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='del'>-				allwinner,pins = "PC3";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxinolime: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='del'>-			label = "a10-olinuxino-lime:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pio {</div><div class='add'>+	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='add'>+		allwinner,pins = "PC3";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	led_pins_olinuxinolime: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts<br/>index 9d1e5482cf82..4e3e1b9d8217 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-pcduino.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10-pcduino.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10-pcduino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10-pcduino.dts</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,90 +53,12 @@</div><div class='ctx'> 	model = "LinkSprite pcDuino";</div><div class='ctx'> 	compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			led_pins_pcduino: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH15", "PH16";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			key_pins_pcduino: key_pins@0 {</div><div class='del'>-				allwinner,pins = "PH17", "PH18", "PH19";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -185,12 +102,100 @@</div><div class='ctx'> 			gpios = &lt;&amp;pio 7 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_pcduino: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH15", "PH16";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_pins_pcduino: key_pins@0 {</div><div class='add'>+		allwinner,pins = "PH17", "PH18", "PH19";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi<br/>index eebb7853e00b..61c03d1fe530 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun4i-a10.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun4i-a10.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun4i-a10.dtsi</a></div><div class='hunk'>@@ -2,12 +2,43 @@</div><div class='ctx'>  * Copyright 2012 Stefan Roese</div><div class='ctx'>  * Stefan Roese &lt;sr@denx.de&gt;</div><div class='ctx'>  *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ *  a) This library is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This library is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='hunk'>@@ -30,7 +61,8 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		framebuffer@0 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='ctx'> 			allwinner,pipeline = "de_be0-lcd0-hdmi";</div><div class='ctx'> 			clocks = &lt;&amp;pll5 1&gt;, &lt;&amp;ahb_gates 36&gt;, &lt;&amp;ahb_gates 43&gt;,</div><div class='ctx'> 				 &lt;&amp;ahb_gates 44&gt;;</div><div class='hunk'>@@ -38,7 +70,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		framebuffer@1 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='ctx'> 			allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";</div><div class='ctx'> 			clocks = &lt;&amp;pll5 1&gt;, &lt;&amp;ahb_gates 36&gt;, &lt;&amp;ahb_gates 43&gt;,</div><div class='ctx'> 				 &lt;&amp;ahb_gates 44&gt;, &lt;&amp;ahb_gates 46&gt;;</div><div class='hunk'>@@ -74,11 +107,11 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpu&gt;;</div><div class='ctx'> 			clock-latency = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			operating-points = &lt;</div><div class='del'>-				/* kHz    uV */</div><div class='add'>+				/* kHz	  uV */</div><div class='ctx'> 				1008000 1400000</div><div class='del'>-				912000  1350000</div><div class='del'>-				864000  1300000</div><div class='del'>-				624000  1250000</div><div class='add'>+				912000	1350000</div><div class='add'>+				864000	1300000</div><div class='add'>+				624000	1250000</div><div class='ctx'> 				&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			cooling-min-level = &lt;0&gt;;</div><div class='hunk'>@@ -398,11 +431,12 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_clk: clk@01c200cc {</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-		        #reset-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun4i-a10-usb-clk";</div><div class='ctx'> 			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pll6 1&gt;;</div><div class='del'>-			clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";</div><div class='add'>+			clock-output-names = "usb_ohci0", "usb_ohci1",</div><div class='add'>+					     "usb_phy";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spi3_clk: clk@01c200d4 {</div><div class='hunk'>@@ -420,6 +454,42 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		sram-controller@01c00000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-sram-controller";</div><div class='add'>+			reg = &lt;0x01c00000 0x30&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			sram_a: sram@00000000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00000000 0xc000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00000000 0xc000&gt;;</div><div class='add'>+</div><div class='add'>+				emac_sram: sram-section@8000 {</div><div class='add'>+					compatible = "allwinner,sun4i-a10-sram-a3-a4";</div><div class='add'>+					reg = &lt;0x8000 0x4000&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sram_d: sram@00010000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00010000 0x1000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00010000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				otg_sram: sram-section@0000 {</div><div class='add'>+					compatible = "allwinner,sun4i-a10-sram-d";</div><div class='add'>+					reg = &lt;0x0000 0x1000&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		dma: dma-controller@01c02000 {</div><div class='ctx'> 			compatible = "allwinner,sun4i-a10-dma";</div><div class='ctx'> 			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='hunk'>@@ -461,6 +531,7 @@</div><div class='ctx'> 			reg = &lt;0x01c0b000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;55&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahb_gates 17&gt;;</div><div class='add'>+			allwinner,sram = &lt;&amp;emac_sram 1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -485,6 +556,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;32&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc1: mmc@01c10000 {</div><div class='hunk'>@@ -500,6 +573,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;33&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc2: mmc@01c11000 {</div><div class='hunk'>@@ -515,6 +590,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;34&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc3: mmc@01c12000 {</div><div class='hunk'>@@ -530,6 +607,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;35&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usbphy: phy@01c13400 {</div><div class='hunk'>@@ -706,7 +785,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='add'>+				allwinner,pins = "PF0", "PF1", "PF2",</div><div class='add'>+						 "PF3", "PF4", "PF5";</div><div class='ctx'> 				allwinner,function = "mmc0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='hunk'>@@ -719,43 +799,85 @@</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ir0_pins_a: ir0@0 {</div><div class='del'>-				allwinner,pins = "PB3","PB4";</div><div class='add'>+			ir0_rx_pins_a: ir0@0 {</div><div class='add'>+				allwinner,pins = "PB4";</div><div class='ctx'> 				allwinner,function = "ir0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ir1_pins_a: ir1@0 {</div><div class='del'>-				allwinner,pins = "PB22","PB23";</div><div class='add'>+			ir0_tx_pins_a: ir0@1 {</div><div class='add'>+				allwinner,pins = "PB3";</div><div class='add'>+				allwinner,function = "ir0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ir1_rx_pins_a: ir1@0 {</div><div class='add'>+				allwinner,pins = "PB23";</div><div class='add'>+				allwinner,function = "ir1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ir1_tx_pins_a: ir1@1 {</div><div class='add'>+				allwinner,pins = "PB22";</div><div class='ctx'> 				allwinner,function = "ir1";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0_pins_a: spi0@0 {</div><div class='del'>-				allwinner,pins = "PI10", "PI11", "PI12", "PI13";</div><div class='add'>+				allwinner,pins = "PI11", "PI12", "PI13";</div><div class='add'>+				allwinner,function = "spi0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0_cs0_pins_a: spi0_cs0@0 {</div><div class='add'>+				allwinner,pins = "PI10";</div><div class='ctx'> 				allwinner,function = "spi0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1_pins_a: spi1@0 {</div><div class='del'>-				allwinner,pins = "PI16", "PI17", "PI18", "PI19";</div><div class='add'>+				allwinner,pins = "PI17", "PI18", "PI19";</div><div class='add'>+				allwinner,function = "spi1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_cs0_pins_a: spi1_cs0@0 {</div><div class='add'>+				allwinner,pins = "PI16";</div><div class='ctx'> 				allwinner,function = "spi1";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi2_pins_a: spi2@0 {</div><div class='del'>-				allwinner,pins = "PB14", "PB15", "PB16", "PB17";</div><div class='add'>+				allwinner,pins = "PC20", "PC21", "PC22";</div><div class='ctx'> 				allwinner,function = "spi2";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi2_pins_b: spi2@1 {</div><div class='del'>-				allwinner,pins = "PC19", "PC20", "PC21", "PC22";</div><div class='add'>+				allwinner,pins = "PB15", "PB16", "PB17";</div><div class='add'>+				allwinner,function = "spi2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_cs0_pins_a: spi2_cs0@0 {</div><div class='add'>+				allwinner,pins = "PC19";</div><div class='add'>+				allwinner,function = "spi2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_cs0_pins_b: spi2_cs0@1 {</div><div class='add'>+				allwinner,pins = "PB14";</div><div class='ctx'> 				allwinner,function = "spi2";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts<br/>new file mode 100644<br/>index 000000000000..2b3511ea2e5d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun5i-a10s.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Auxtek t004 A10s hdmi tv-stick";</div><div class='add'>+	compatible = "allwinner,auxtek-t004", "allwinner,sun5i-a10s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_t004&gt;;</div><div class='add'>+</div><div class='add'>+		red {</div><div class='add'>+			label = "t004-tv-dongle:red:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 1 2 GPIO_ACTIVE_HIGH&gt;; /* PB2 */</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vmmc1: vmmc1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mmc1_vcc_en_pin_t004&gt;;</div><div class='add'>+		regulator-name = "vmmc1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 1 18 GPIO_ACTIVE_HIGH&gt;; /* PB18 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_t004&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 1 GPIO_ACTIVE_HIGH&gt;; /* PG1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vmmc1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_t004: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG1";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin@0 {</div><div class='add'>+		allwinner,pins = "PB18";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_t004: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PB2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	gpio = &lt;&amp;pio 6 13 GPIO_ACTIVE_HIGH&gt;; /* PG13 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1_vbus_pin_a {</div><div class='add'>+	allwinner,pins = "PG13";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a10s-mk802.dts b/arch/arm/boot/dts/sun5i-a10s-mk802.dts<br/>index b21af87d9eae..46ff9407826d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-mk802.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a10s-mk802.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-mk802.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-mk802.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -54,6 +49,14 @@</div><div class='ctx'> 	model = "MK802-A10s";</div><div class='ctx'> 	compatible = "allwinner,a10s-mk802", "allwinner,sun5i-a10s";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts<br/>index 2bbc93b935ca..a7e19e4847f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -65,184 +60,191 @@</div><div class='ctx'> 		serial2 = &amp;uart3;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		emac: ethernet@01c0b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		mdio@01c0b080 {</div><div class='del'>-			status = "okay";</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='add'>+		green {</div><div class='add'>+			label = "a10s-olinuxino-micro:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxino_micro&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 1 GPIO_ACTIVE_HIGH&gt;; /* PG1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		mmc1: mmc@01c10000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;, &lt;&amp;mmc1_cd_pin_olinuxino_micro&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 13 GPIO_ACTIVE_HIGH&gt;; /* PG13 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;emac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emac_pins_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;emac_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG1";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG13";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxino: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PE3";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PB10";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	at24@50 {</div><div class='add'>+		compatible = "at,24c16";</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			button@191 {</div><div class='del'>-				label = "Volume Up";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;191274&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@392 {</div><div class='del'>-				label = "Volume Down";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;392644&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@601 {</div><div class='del'>-				label = "Menu";</div><div class='del'>-				linux,code = &lt;KEY_MENU&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;601151&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@795 {</div><div class='del'>-				label = "Enter";</div><div class='del'>-				linux,code = &lt;KEY_ENTER&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;795090&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@987 {</div><div class='del'>-				label = "Home";</div><div class='del'>-				linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;987387&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart2: serial@01c28800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@191 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;191274&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart3_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@392 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;392644&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@601 {</div><div class='add'>+		label = "Menu";</div><div class='add'>+		linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;601151&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			at24@50 {</div><div class='del'>-				compatible = "at,24c16";</div><div class='del'>-				pagesize = &lt;16&gt;;</div><div class='del'>-				reg = &lt;0x50&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	button@795 {</div><div class='add'>+		label = "Enter";</div><div class='add'>+		linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;795090&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@987 {</div><div class='add'>+		label = "Home";</div><div class='add'>+		linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;987387&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='del'>-			label = "a10s-olinuxino-micro:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxino_micro&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 1 GPIO_ACTIVE_HIGH&gt;; /* PG1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;, &lt;&amp;mmc1_cd_pin_olinuxino_micro&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 13 GPIO_ACTIVE_HIGH&gt;; /* PG13 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxino_m&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG1";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG13";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_olinuxino: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PE3";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PB10";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxino_m&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts<br/>index 7deddfc9df8b..3b057983c74a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -56,67 +51,12 @@</div><div class='ctx'> 	model = "R7 A10s hdmi tv-stick";</div><div class='ctx'> 	compatible = "allwinner,r7-tv-dongle", "allwinner,sun5i-a10s";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_r7&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 1 GPIO_ACTIVE_HIGH&gt;; /* PG1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1: mmc@01c10000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_r7: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG1";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_r7: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PB2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_r7: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PG13";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -130,10 +70,71 @@</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_r7&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 6 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_r7&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 1 GPIO_ACTIVE_HIGH&gt;; /* PG1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_r7: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG1";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_r7: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PB2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_r7: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PG13";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_r7&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 6 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi<br/>index 2fd8988f310c..f11efb722bbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a10s.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a10s.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a10s.dtsi</a></div><div class='hunk'>@@ -3,16 +3,49 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ *  a) This library is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This library is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='ctx'> </div><div class='add'>+#include "sun5i.dtsi"</div><div class='add'>+</div><div class='ctx'> #include &lt;dt-bindings/dma/sun4i-a10.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -29,7 +62,8 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		framebuffer@0 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='ctx'> 			allwinner,pipeline = "de_be0-lcd0-hdmi";</div><div class='ctx'> 			clocks = &lt;&amp;pll5 1&gt;, &lt;&amp;ahb_gates 36&gt;, &lt;&amp;ahb_gates 43&gt;,</div><div class='ctx'> 				 &lt;&amp;ahb_gates 44&gt;;</div><div class='hunk'>@@ -45,133 +79,23 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cpus {</div><div class='del'>-		cpu@0 {</div><div class='del'>-			compatible = "arm,cortex-a8";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory {</div><div class='del'>-		reg = &lt;0x40000000 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * This is a dummy clock, to be used as placeholder on</div><div class='del'>-		 * other mux clocks when a specific parent clock is not</div><div class='del'>-		 * yet implemented. It should be dropped when the driver</div><div class='del'>-		 * is complete.</div><div class='del'>-		 */</div><div class='del'>-		dummy: dummy {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		osc24M: clk@01c20050 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-osc-clk";</div><div class='del'>-			reg = &lt;0x01c20050 0x4&gt;;</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			clock-output-names = "osc24M";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		osc32k: clk@0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-			clock-output-names = "osc32k";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll1: clk@01c20000 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='del'>-			reg = &lt;0x01c20000 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll4: clk@01c20018 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='del'>-			reg = &lt;0x01c20018 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll4";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll5: clk@01c20020 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll5-clk";</div><div class='del'>-			reg = &lt;0x01c20020 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll5_ddr", "pll5_other";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll6: clk@01c20028 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll6-clk";</div><div class='del'>-			reg = &lt;0x01c20028 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll6_sata", "pll6_other", "pll6";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* dummy is 200M */</div><div class='del'>-		cpu: cpu@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-cpu-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll1&gt;, &lt;&amp;dummy&gt;;</div><div class='del'>-			clock-output-names = "cpu";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		axi: axi@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-axi-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpu&gt;;</div><div class='del'>-			clock-output-names = "axi";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		axi_gates: clk@01c2005c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-axi-gates-clk";</div><div class='del'>-			reg = &lt;0x01c2005c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;axi&gt;;</div><div class='del'>-			clock-output-names = "axi_dram";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahb: ahb@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ahb-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;axi&gt;;</div><div class='del'>-			clock-output-names = "ahb";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		ahb_gates: clk@01c20060 {</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";</div><div class='ctx'> 			reg = &lt;0x01c20060 0x8&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahb&gt;;</div><div class='del'>-			clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",</div><div class='del'>-				"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",</div><div class='del'>-				"ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",</div><div class='del'>-				"ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",</div><div class='del'>-				"ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve",</div><div class='del'>-				"ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi",</div><div class='del'>-				"ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb0: apb0@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb0-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb&gt;;</div><div class='del'>-			clock-output-names = "apb0";</div><div class='add'>+			clock-output-names = "ahb_usbotg", "ahb_ehci",</div><div class='add'>+					     "ahb_ohci", "ahb_ss", "ahb_dma",</div><div class='add'>+					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",</div><div class='add'>+					     "ahb_mmc2", "ahb_nand",</div><div class='add'>+					     "ahb_sdram", "ahb_emac", "ahb_ts",</div><div class='add'>+					     "ahb_spi0", "ahb_spi1", "ahb_spi2",</div><div class='add'>+					     "ahb_gps", "ahb_stimer", "ahb_ve",</div><div class='add'>+					     "ahb_tve", "ahb_lcd", "ahb_csi",</div><div class='add'>+					     "ahb_hdmi", "ahb_de_be",</div><div class='add'>+					     "ahb_de_fe", "ahb_iep",</div><div class='add'>+					     "ahb_mali400";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apb0_gates: clk@01c20068 {</div><div class='hunk'>@@ -179,16 +103,9 @@</div><div class='ctx'> 			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";</div><div class='ctx'> 			reg = &lt;0x01c20068 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb0&gt;;</div><div class='del'>-			clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio",</div><div class='del'>-				"apb0_ir", "apb0_keypad";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb1: clk@01c20058 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb1-clk";</div><div class='del'>-			reg = &lt;0x01c20058 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;osc32k&gt;;</div><div class='del'>-			clock-output-names = "apb1";</div><div class='add'>+			clock-output-names = "apb0_codec", "apb0_iis",</div><div class='add'>+					     "apb0_pio", "apb0_ir",</div><div class='add'>+					     "apb0_keypad";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apb1_gates: clk@01c2006c {</div><div class='hunk'>@@ -200,166 +117,15 @@</div><div class='ctx'> 				"apb1_i2c2", "apb1_uart0", "apb1_uart1",</div><div class='ctx'> 				"apb1_uart2", "apb1_uart3";</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		nand_clk: clk@01c20080 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20080 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "nand";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ms_clk: clk@01c20084 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20084 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ms";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0_clk: clk@01c20088 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20088 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc0",</div><div class='del'>-					     "mmc0_output",</div><div class='del'>-					     "mmc0_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1_clk: clk@01c2008c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c2008c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc1",</div><div class='del'>-					     "mmc1_output",</div><div class='del'>-					     "mmc1_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2_clk: clk@01c20090 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20090 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc2",</div><div class='del'>-					     "mmc2_output",</div><div class='del'>-					     "mmc2_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ts_clk: clk@01c20098 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20098 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ts";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ss_clk: clk@01c2009c {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c2009c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ss";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi0_clk: clk@01c200a0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a0 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi1_clk: clk@01c200a4 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a4 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2_clk: clk@01c200a8 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a8 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0_clk: clk@01c200b0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200b0 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ir0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_clk: clk@01c200cc {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-		        #reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-usb-clk";</div><div class='del'>-			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;pll6 1&gt;;</div><div class='del'>-			clock-output-names = "usb_ohci0", "usb_phy";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mbus_clk: clk@01c2015c {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mbus-clk";</div><div class='del'>-			reg = &lt;0x01c2015c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mbus";</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc@01c00000 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		dma: dma-controller@01c02000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-dma";</div><div class='del'>-			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;27&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 6&gt;;</div><div class='del'>-			#dma-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi0: spi@01c05000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c05000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;10&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 20&gt;, &lt;&amp;spi0_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 27&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 26&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi1: spi@01c06000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c06000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;11&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 21&gt;, &lt;&amp;spi1_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 9&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 8&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		emac: ethernet@01c0b000 {</div><div class='ctx'> 			compatible = "allwinner,sun4i-a10-emac";</div><div class='ctx'> 			reg = &lt;0x01c0b000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;55&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahb_gates 17&gt;;</div><div class='add'>+			allwinner,sram = &lt;&amp;emac_sram 1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -371,214 +137,6 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 8&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			interrupts = &lt;32&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1: mmc@01c10000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c10000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 9&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			interrupts = &lt;33&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2: mmc@01c11000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c11000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 10&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			interrupts = &lt;34&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-usb-phy";</div><div class='del'>-			reg = &lt;0x01c13400 0x10 0x01c14800 0x4&gt;;</div><div class='del'>-			reg-names = "phy_ctrl", "pmu1";</div><div class='del'>-			clocks = &lt;&amp;usb_clk 8&gt;;</div><div class='del'>-			clock-names = "usb_phy";</div><div class='del'>-			resets = &lt;&amp;usb_clk 0&gt;, &lt;&amp;usb_clk 1&gt;;</div><div class='del'>-			reset-names = "usb0_reset", "usb1_reset";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-ehci", "generic-ehci";</div><div class='del'>-			reg = &lt;0x01c14000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;39&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 1&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphy 1&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-ohci", "generic-ohci";</div><div class='del'>-			reg = &lt;0x01c14400 0x100&gt;;</div><div class='del'>-			interrupts = &lt;40&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb_clk 6&gt;, &lt;&amp;ahb_gates 2&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphy 1&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2: spi@01c17000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c17000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;12&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 22&gt;, &lt;&amp;spi2_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 29&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 28&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		intc: interrupt-controller@01c20400 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ic";</div><div class='del'>-			reg = &lt;0x01c20400 0x400&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-pinctrl";</div><div class='del'>-			reg = &lt;0x01c20800 0x400&gt;;</div><div class='del'>-			interrupts = &lt;28&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb0_gates 5&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#gpio-cells = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			uart0_pins_a: uart0@0 {</div><div class='del'>-				allwinner,pins = "PB19", "PB20";</div><div class='del'>-				allwinner,function = "uart0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uart2_pins_a: uart2@0 {</div><div class='del'>-				allwinner,pins = "PC18", "PC19";</div><div class='del'>-				allwinner,function = "uart2";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uart3_pins_a: uart3@0 {</div><div class='del'>-				allwinner,pins = "PG9", "PG10";</div><div class='del'>-				allwinner,function = "uart3";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			emac_pins_a: emac0@0 {</div><div class='del'>-				allwinner,pins = "PA0", "PA1", "PA2",</div><div class='del'>-						"PA3", "PA4", "PA5", "PA6",</div><div class='del'>-						"PA7", "PA8", "PA9", "PA10",</div><div class='del'>-						"PA11", "PA12", "PA13", "PA14",</div><div class='del'>-						"PA15", "PA16";</div><div class='del'>-				allwinner,function = "emac";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c0_pins_a: i2c0@0 {</div><div class='del'>-				allwinner,pins = "PB0", "PB1";</div><div class='del'>-				allwinner,function = "i2c0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c1_pins_a: i2c1@0 {</div><div class='del'>-				allwinner,pins = "PB15", "PB16";</div><div class='del'>-				allwinner,function = "i2c1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c2_pins_a: i2c2@0 {</div><div class='del'>-				allwinner,pins = "PB17", "PB18";</div><div class='del'>-				allwinner,function = "i2c2";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='del'>-				allwinner,function = "mmc0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc1_pins_a: mmc1@0 {</div><div class='del'>-				allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";</div><div class='del'>-				allwinner,function = "mmc1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timer@01c20c00 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-timer";</div><div class='del'>-			reg = &lt;0x01c20c00 0x90&gt;;</div><div class='del'>-			interrupts = &lt;22&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wdt: watchdog@01c20c90 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-wdt";</div><div class='del'>-			reg = &lt;0x01c20c90 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-lradc-keys";</div><div class='del'>-			reg = &lt;0x01c22800 0x100&gt;;</div><div class='del'>-			interrupts = &lt;31&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sid: eeprom@01c23800 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-sid";</div><div class='del'>-			reg = &lt;0x01c23800 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtp: rtp@01c25000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ts";</div><div class='del'>-			reg = &lt;0x01c25000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;29&gt;;</div><div class='del'>-			#thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		uart0: serial@01c28000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x01c28000 0x400&gt;;</div><div class='hunk'>@@ -589,16 +147,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;2&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 17&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		uart2: serial@01c28800 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x01c28800 0x400&gt;;</div><div class='hunk'>@@ -608,52 +156,57 @@</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 18&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28c00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;4&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 19&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	compatible = "allwinner,sun5i-a10s-pinctrl";</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;7&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+	uart0_pins_a: uart0@0 {</div><div class='add'>+		allwinner,pins = "PB19", "PB20";</div><div class='add'>+		allwinner,function = "uart0";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;8&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+	uart2_pins_a: uart2@0 {</div><div class='add'>+		allwinner,pins = "PC18", "PC19";</div><div class='add'>+		allwinner,function = "uart2";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;9&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+	uart3_pins_a: uart3@0 {</div><div class='add'>+		allwinner,pins = "PG9", "PG10";</div><div class='add'>+		allwinner,function = "uart3";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		timer@01c60000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-hstimer";</div><div class='del'>-			reg = &lt;0x01c60000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;82&gt;, &lt;83&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 28&gt;;</div><div class='del'>-		};</div><div class='add'>+	emac_pins_a: emac0@0 {</div><div class='add'>+		allwinner,pins = "PA0", "PA1", "PA2",</div><div class='add'>+				"PA3", "PA4", "PA5", "PA6",</div><div class='add'>+				"PA7", "PA8", "PA9", "PA10",</div><div class='add'>+				"PA11", "PA12", "PA13", "PA14",</div><div class='add'>+				"PA15", "PA16";</div><div class='add'>+		allwinner,function = "emac";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_pins_a: mmc1@0 {</div><div class='add'>+		allwinner,pins = "PG3", "PG4", "PG5",</div><div class='add'>+				 "PG6", "PG7", "PG8";</div><div class='add'>+		allwinner,function = "mmc1";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sram_a {</div><div class='add'>+	emac_sram: sram-section@8000 {</div><div class='add'>+		compatible = "allwinner,sun4i-a10-sram-a3-a4";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts<br/>index 03aa04555630..990f9d61ae4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a13-hsg-h702.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-hsg-h702.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -60,81 +55,72 @@</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_h702&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_ldo3&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_h702: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG0";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			pcf8563: rtc@51 {</div><div class='del'>-				compatible = "nxp,pcf8563";</div><div class='del'>-				reg = &lt;0x51&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#include "axp209.dtsi"</div><div class='del'>-</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcf8563: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_h702&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_h702: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG0";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;reg_dcdc2 {</div><div class='ctx'> 	regulator-always-on;</div><div class='ctx'> 	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -165,3 +151,14 @@</div><div class='ctx'> 	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	regulator-name = "vcc-wifi";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_ldo3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts<br/>index 03deb84268ce..ad84fe4276c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -61,76 +56,8 @@</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxinom&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG0";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxinom: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PG9";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PG11";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -144,10 +71,80 @@</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxinom&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 6 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxinom&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG0";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	led_pins_olinuxinom: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PG9";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PG11";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxinom&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 6 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts<br/>index 6b24876ed462..42324005eb7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-olinuxino.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a13-olinuxino.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-olinuxino.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-olinuxino.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -63,141 +58,143 @@</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxino&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='add'>+		power {</div><div class='add'>+			gpios = &lt;&amp;pio 6 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PG0";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxino: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PG9";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PG11";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			button@191 {</div><div class='del'>-				label = "Volume Up";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;191274&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@392 {</div><div class='del'>-				label = "Volume Down";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;392644&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@601 {</div><div class='del'>-				label = "Menu";</div><div class='del'>-				linux,code = &lt;KEY_MENU&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;601151&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@795 {</div><div class='del'>-				label = "Enter";</div><div class='del'>-				linux,code = &lt;KEY_ENTER&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;795090&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@987 {</div><div class='del'>-				label = "Home";</div><div class='del'>-				linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;987387&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@191 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;191274&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@392 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;392644&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='add'>+	button@601 {</div><div class='add'>+		label = "Menu";</div><div class='add'>+		linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;601151&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='del'>-			gpios = &lt;&amp;pio 6 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='add'>+	button@795 {</div><div class='add'>+		label = "Enter";</div><div class='add'>+		linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;795090&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@987 {</div><div class='add'>+		label = "Home";</div><div class='add'>+		linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;987387&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_olinuxino&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG0";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_olinuxino: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PG9";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxino&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 6 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PG11";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_olinuxino&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 6 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts<br/>new file mode 100644<br/>index 000000000000..514f159a14d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13-utoo-p66.dts</a></div><div class='hunk'>@@ -0,0 +1,226 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun5i-a13.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Utoo P66";</div><div class='add'>+	compatible = "utoo,p66", "allwinner,sun5i-a13";</div><div class='add'>+</div><div class='add'>+	i2c_lcd: i2c@0 {</div><div class='add'>+		/* The lcd panel i2c interface is hooked up via gpios */</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c_lcd_pins&gt;;</div><div class='add'>+		gpios = &lt;&amp;pio 6 12 GPIO_ACTIVE_HIGH&gt;, /* PG12, sda */</div><div class='add'>+			&lt;&amp;pio 6 10 GPIO_ACTIVE_HIGH&gt;; /* PG10, scl */</div><div class='add'>+		i2c-gpio,delay-us = &lt;5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	icn8318: touchscreen@40 {</div><div class='add'>+		compatible = "chipone,icn8318";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;; /* EINT9 (PG9) */</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_wake_pin_p66&gt;;</div><div class='add'>+		wake-gpios = &lt;&amp;pio 1 3 GPIO_ACTIVE_HIGH&gt;; /* PB3 */</div><div class='add'>+		touchscreen-size-x = &lt;800&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;480&gt;;</div><div class='add'>+		touchscreen-inverted-x;</div><div class='add'>+		touchscreen-swapped-x-y;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcf8563: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_ldo2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@200 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@400 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;400000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_p66&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_HIGH&gt;; /* PG0 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mmccard: mmccard@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "mmc-card";</div><div class='add'>+		broken-hpi;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_p66: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG0";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_lcd_pins: i2c_lcd_pin@0 {</div><div class='add'>+		allwinner,pins = "PG10", "PG12";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_wake_pin_p66: ts_wake_pin@0 {</div><div class='add'>+		allwinner,pins = "PB3";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_vbus_pin_a: usb0_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PB4";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-int-pll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo1 {</div><div class='add'>+	regulator-name = "vdd-rtc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-name = "avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo3 {</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-wifi";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb0_vbus {</div><div class='add'>+	gpio = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_ldo3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi<br/>index 883cb4873688..976d4faa2179 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun5i-a13.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i-a13.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i-a13.dtsi</a></div><div class='hunk'>@@ -3,20 +3,51 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ *  a) This library is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This library is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "skeleton.dtsi"</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+#include "sun5i.dtsi"</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/dma/sun4i-a10.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -35,31 +66,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a8";</div><div class='del'>-			reg = &lt;0x0&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpu&gt;;</div><div class='del'>-			clock-latency = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-			operating-points = &lt;</div><div class='del'>-				/* kHz    uV */</div><div class='del'>-				1008000 1400000</div><div class='del'>-				912000  1350000</div><div class='del'>-				864000  1300000</div><div class='del'>-				624000  1200000</div><div class='del'>-				576000  1200000</div><div class='del'>-				432000  1200000</div><div class='del'>-				&gt;;</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			cooling-min-level = &lt;0&gt;;</div><div class='del'>-			cooling-max-level = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	thermal-zones {</div><div class='ctx'> 		cpu_thermal {</div><div class='ctx'> 			/* milliseconds */</div><div class='hunk'>@@ -92,126 +98,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		reg = &lt;0x40000000 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * This is a dummy clock, to be used as placeholder on</div><div class='del'>-		 * other mux clocks when a specific parent clock is not</div><div class='del'>-		 * yet implemented. It should be dropped when the driver</div><div class='del'>-		 * is complete.</div><div class='del'>-		 */</div><div class='del'>-		dummy: dummy {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		osc24M: clk@01c20050 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-osc-clk";</div><div class='del'>-			reg = &lt;0x01c20050 0x4&gt;;</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			clock-output-names = "osc24M";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		osc32k: clk@0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-			clock-output-names = "osc32k";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll1: clk@01c20000 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='del'>-			reg = &lt;0x01c20000 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll4: clk@01c20018 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='del'>-			reg = &lt;0x01c20018 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll4";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll5: clk@01c20020 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll5-clk";</div><div class='del'>-			reg = &lt;0x01c20020 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll5_ddr", "pll5_other";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll6: clk@01c20028 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-pll6-clk";</div><div class='del'>-			reg = &lt;0x01c20028 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll6_sata", "pll6_other", "pll6";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* dummy is 200M */</div><div class='del'>-		cpu: cpu@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-cpu-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll1&gt;, &lt;&amp;dummy&gt;;</div><div class='del'>-			clock-output-names = "cpu";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		axi: axi@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-axi-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpu&gt;;</div><div class='del'>-			clock-output-names = "axi";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		axi_gates: clk@01c2005c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-axi-gates-clk";</div><div class='del'>-			reg = &lt;0x01c2005c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;axi&gt;;</div><div class='del'>-			clock-output-names = "axi_dram";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahb: ahb@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ahb-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;axi&gt;;</div><div class='del'>-			clock-output-names = "ahb";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		ahb_gates: clk@01c20060 {</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun5i-a13-ahb-gates-clk";</div><div class='ctx'> 			reg = &lt;0x01c20060 0x8&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahb&gt;;</div><div class='del'>-			clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",</div><div class='del'>-				"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",</div><div class='del'>-				"ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",</div><div class='del'>-				"ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer",</div><div class='del'>-				"ahb_ve", "ahb_lcd", "ahb_csi", "ahb_de_be",</div><div class='del'>-				"ahb_de_fe", "ahb_iep", "ahb_mali400";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb0: apb0@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb0-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb&gt;;</div><div class='del'>-			clock-output-names = "apb0";</div><div class='add'>+			clock-output-names = "ahb_usbotg", "ahb_ehci",</div><div class='add'>+					     "ahb_ohci", "ahb_ss", "ahb_dma",</div><div class='add'>+					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",</div><div class='add'>+					     "ahb_mmc2", "ahb_nand",</div><div class='add'>+					     "ahb_sdram", "ahb_spi0",</div><div class='add'>+					     "ahb_spi1", "ahb_spi2",</div><div class='add'>+					     "ahb_stimer", "ahb_ve", "ahb_lcd",</div><div class='add'>+					     "ahb_csi", "ahb_de_be",</div><div class='add'>+					     "ahb_de_fe", "ahb_iep",</div><div class='add'>+					     "ahb_mali400";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apb0_gates: clk@01c20068 {</div><div class='hunk'>@@ -219,15 +121,8 @@</div><div class='ctx'> 			compatible = "allwinner,sun5i-a13-apb0-gates-clk";</div><div class='ctx'> 			reg = &lt;0x01c20068 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb0&gt;;</div><div class='del'>-			clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb1: clk@01c20058 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb1-clk";</div><div class='del'>-			reg = &lt;0x01c20058 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;osc32k&gt;;</div><div class='del'>-			clock-output-names = "apb1";</div><div class='add'>+			clock-output-names = "apb0_codec", "apb0_pio",</div><div class='add'>+					     "apb0_ir";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apb1_gates: clk@01c2006c {</div><div class='hunk'>@@ -238,384 +133,39 @@</div><div class='ctx'> 			clock-output-names = "apb1_i2c0", "apb1_i2c1",</div><div class='ctx'> 				"apb1_i2c2", "apb1_uart1", "apb1_uart3";</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		nand_clk: clk@01c20080 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20080 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "nand";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ms_clk: clk@01c20084 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20084 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ms";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0_clk: clk@01c20088 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20088 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc0",</div><div class='del'>-					     "mmc0_output",</div><div class='del'>-					     "mmc0_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1_clk: clk@01c2008c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c2008c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc1",</div><div class='del'>-					     "mmc1_output",</div><div class='del'>-					     "mmc1_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2_clk: clk@01c20090 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20090 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mmc2",</div><div class='del'>-					     "mmc2_output",</div><div class='del'>-					     "mmc2_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ts_clk: clk@01c20098 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c20098 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ts";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ss_clk: clk@01c2009c {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c2009c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ss";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi0_clk: clk@01c200a0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a0 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi1_clk: clk@01c200a4 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a4 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2_clk: clk@01c200a8 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200a8 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "spi2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0_clk: clk@01c200b0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='del'>-			reg = &lt;0x01c200b0 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "ir0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_clk: clk@01c200cc {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-		        #reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-usb-clk";</div><div class='del'>-			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;pll6 1&gt;;</div><div class='del'>-			clock-output-names = "usb_ohci0", "usb_phy";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mbus_clk: clk@01c2015c {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mbus-clk";</div><div class='del'>-			reg = &lt;0x01c2015c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='del'>-			clock-output-names = "mbus";</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		dma: dma-controller@01c02000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-dma";</div><div class='del'>-			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;27&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 6&gt;;</div><div class='del'>-			#dma-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi0: spi@01c05000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c05000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;10&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 20&gt;, &lt;&amp;spi0_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 27&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 26&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi1: spi@01c06000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c06000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;11&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 21&gt;, &lt;&amp;spi1_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 9&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 8&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 8&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			interrupts = &lt;32&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2: mmc@01c11000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c11000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 10&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			interrupts = &lt;34&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun5i-a13-usb-phy";</div><div class='del'>-			reg = &lt;0x01c13400 0x10 0x01c14800 0x4&gt;;</div><div class='del'>-			reg-names = "phy_ctrl", "pmu1";</div><div class='del'>-			clocks = &lt;&amp;usb_clk 8&gt;;</div><div class='del'>-			clock-names = "usb_phy";</div><div class='del'>-			resets = &lt;&amp;usb_clk 0&gt;, &lt;&amp;usb_clk 1&gt;;</div><div class='del'>-			reset-names = "usb0_reset", "usb1_reset";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";</div><div class='del'>-			reg = &lt;0x01c14000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;39&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 1&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphy 1&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";</div><div class='del'>-			reg = &lt;0x01c14400 0x100&gt;;</div><div class='del'>-			interrupts = &lt;40&gt;;</div><div class='del'>-			clocks = &lt;&amp;usb_clk 6&gt;, &lt;&amp;ahb_gates 2&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphy 1&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2: spi@01c17000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-spi";</div><div class='del'>-			reg = &lt;0x01c17000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;12&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 22&gt;, &lt;&amp;spi2_clk&gt;;</div><div class='del'>-			clock-names = "ahb", "mod";</div><div class='del'>-			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 29&gt;,</div><div class='del'>-			       &lt;&amp;dma SUN4I_DMA_DEDICATED 28&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		intc: interrupt-controller@01c20400 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ic";</div><div class='del'>-			reg = &lt;0x01c20400 0x400&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-pinctrl";</div><div class='del'>-			reg = &lt;0x01c20800 0x400&gt;;</div><div class='del'>-			interrupts = &lt;28&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb0_gates 5&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#gpio-cells = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			uart1_pins_a: uart1@0 {</div><div class='del'>-				allwinner,pins = "PE10", "PE11";</div><div class='del'>-				allwinner,function = "uart1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uart1_pins_b: uart1@1 {</div><div class='del'>-				allwinner,pins = "PG3", "PG4";</div><div class='del'>-				allwinner,function = "uart1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c0_pins_a: i2c0@0 {</div><div class='del'>-				allwinner,pins = "PB0", "PB1";</div><div class='del'>-				allwinner,function = "i2c0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c1_pins_a: i2c1@0 {</div><div class='del'>-				allwinner,pins = "PB15", "PB16";</div><div class='del'>-				allwinner,function = "i2c1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c2_pins_a: i2c2@0 {</div><div class='del'>-				allwinner,pins = "PB17", "PB18";</div><div class='del'>-				allwinner,function = "i2c2";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='del'>-				allwinner,function = "mmc0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timer@01c20c00 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-timer";</div><div class='del'>-			reg = &lt;0x01c20c00 0x90&gt;;</div><div class='del'>-			interrupts = &lt;22&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wdt: watchdog@01c20c90 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-wdt";</div><div class='del'>-			reg = &lt;0x01c20c90 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-lradc-keys";</div><div class='del'>-			reg = &lt;0x01c22800 0x100&gt;;</div><div class='del'>-			interrupts = &lt;31&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sid: eeprom@01c23800 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-sid";</div><div class='del'>-			reg = &lt;0x01c23800 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtp: rtp@01c25000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ts";</div><div class='del'>-			reg = &lt;0x01c25000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;29&gt;;</div><div class='del'>-			#thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;2&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 17&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28c00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;4&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 19&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;7&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	clock-latency = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+	operating-points = &lt;</div><div class='add'>+		/* kHz	  uV */</div><div class='add'>+		1008000 1400000</div><div class='add'>+		912000	1350000</div><div class='add'>+		864000	1300000</div><div class='add'>+		624000	1200000</div><div class='add'>+		576000	1200000</div><div class='add'>+		432000	1200000</div><div class='add'>+		&gt;;</div><div class='add'>+	#cooling-cells = &lt;2&gt;;</div><div class='add'>+	cooling-min-level = &lt;0&gt;;</div><div class='add'>+	cooling-max-level = &lt;5&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;8&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	compatible = "allwinner,sun5i-a13-pinctrl";</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";</div><div class='del'>-			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;9&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='add'>+	uart1_pins_a: uart1@0 {</div><div class='add'>+		allwinner,pins = "PE10", "PE11";</div><div class='add'>+		allwinner,function = "uart1";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		timer@01c60000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-hstimer";</div><div class='del'>-			reg = &lt;0x01c60000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;82&gt;, &lt;83&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb_gates 28&gt;;</div><div class='del'>-		};</div><div class='add'>+	uart1_pins_b: uart1@1 {</div><div class='add'>+		allwinner,pins = "PG3", "PG4";</div><div class='add'>+		allwinner,function = "uart1";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi<br/>new file mode 100644<br/>index 000000000000..54b097830434<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun5i.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun5i.dtsi</a></div><div class='hunk'>@@ -0,0 +1,609 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012-2015 Maxime Ripard</div><div class='add'>+ *</div><div class='add'>+ * Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This library is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This library is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/dma/sun4i-a10.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a8";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * This is a dummy clock, to be used as placeholder on</div><div class='add'>+		 * other mux clocks when a specific parent clock is not</div><div class='add'>+		 * yet implemented. It should be dropped when the driver</div><div class='add'>+		 * is complete.</div><div class='add'>+		 */</div><div class='add'>+		dummy: dummy {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		osc24M: clk@01c20050 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-osc-clk";</div><div class='add'>+			reg = &lt;0x01c20050 0x4&gt;;</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+			clock-output-names = "osc24M";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		osc32k: clk@0 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-output-names = "osc32k";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll1: clk@01c20000 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='add'>+			reg = &lt;0x01c20000 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll4: clk@01c20018 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-pll1-clk";</div><div class='add'>+			reg = &lt;0x01c20018 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll5: clk@01c20020 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-pll5-clk";</div><div class='add'>+			reg = &lt;0x01c20020 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll5_ddr", "pll5_other";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll6: clk@01c20028 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-pll6-clk";</div><div class='add'>+			reg = &lt;0x01c20028 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll6_sata", "pll6_other", "pll6";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* dummy is 200M */</div><div class='add'>+		cpu: cpu@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-cpu-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll1&gt;, &lt;&amp;dummy&gt;;</div><div class='add'>+			clock-output-names = "cpu";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		axi: axi@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-axi-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpu&gt;;</div><div class='add'>+			clock-output-names = "axi";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahb: ahb@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ahb-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;axi&gt;, &lt;&amp;cpu&gt;, &lt;&amp;pll6 1&gt;;</div><div class='add'>+			clock-output-names = "ahb";</div><div class='add'>+			/*</div><div class='add'>+			 * Use PLL6 as parent, instead of CPU/AXI</div><div class='add'>+			 * which has rate changes due to cpufreq</div><div class='add'>+			 */</div><div class='add'>+			assigned-clocks = &lt;&amp;ahb&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pll6 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb0: apb0@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-apb0-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb&gt;;</div><div class='add'>+			clock-output-names = "apb0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb1: clk@01c20058 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-apb1-clk";</div><div class='add'>+			reg = &lt;0x01c20058 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;osc32k&gt;;</div><div class='add'>+			clock-output-names = "apb1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		axi_gates: clk@01c2005c {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-axi-gates-clk";</div><div class='add'>+			reg = &lt;0x01c2005c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;axi&gt;;</div><div class='add'>+			clock-output-names = "axi_dram";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand_clk: clk@01c20080 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c20080 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "nand";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ms_clk: clk@01c20084 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c20084 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "ms";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0_clk: clk@01c20088 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c20088 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "mmc0",</div><div class='add'>+					     "mmc0_output",</div><div class='add'>+					     "mmc0_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1_clk: clk@01c2008c {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c2008c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "mmc1",</div><div class='add'>+					     "mmc1_output",</div><div class='add'>+					     "mmc1_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2_clk: clk@01c20090 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c20090 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "mmc2",</div><div class='add'>+					     "mmc2_output",</div><div class='add'>+					     "mmc2_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ts_clk: clk@01c20098 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c20098 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "ts";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ss_clk: clk@01c2009c {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c2009c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "ss";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0_clk: clk@01c200a0 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c200a0 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "spi0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1_clk: clk@01c200a4 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c200a4 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "spi1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2_clk: clk@01c200a8 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c200a8 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "spi2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ir0_clk: clk@01c200b0 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='add'>+			reg = &lt;0x01c200b0 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "ir0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_clk: clk@01c200cc {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun5i-a13-usb-clk";</div><div class='add'>+			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;pll6 1&gt;;</div><div class='add'>+			clock-output-names = "usb_ohci0", "usb_phy";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbus_clk: clk@01c2015c {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mbus-clk";</div><div class='add'>+			reg = &lt;0x01c2015c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5 1&gt;;</div><div class='add'>+			clock-output-names = "mbus";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@01c00000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		sram-controller@01c00000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-sram-controller";</div><div class='add'>+			reg = &lt;0x01c00000 0x30&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			sram_a: sram@00000000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00000000 0xc000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00000000 0xc000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sram_d: sram@00010000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00010000 0x1000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00010000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				otg_sram: sram-section@0000 {</div><div class='add'>+					compatible = "allwinner,sun4i-a10-sram-d";</div><div class='add'>+					reg = &lt;0x0000 0x1000&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma: dma-controller@01c02000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-dma";</div><div class='add'>+			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;27&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 6&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@01c05000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-spi";</div><div class='add'>+			reg = &lt;0x01c05000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;10&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 20&gt;, &lt;&amp;spi0_clk&gt;;</div><div class='add'>+			clock-names = "ahb", "mod";</div><div class='add'>+			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 27&gt;,</div><div class='add'>+			       &lt;&amp;dma SUN4I_DMA_DEDICATED 26&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@01c06000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-spi";</div><div class='add'>+			reg = &lt;0x01c06000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;11&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 21&gt;, &lt;&amp;spi1_clk&gt;;</div><div class='add'>+			clock-names = "ahb", "mod";</div><div class='add'>+			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 9&gt;,</div><div class='add'>+			       &lt;&amp;dma SUN4I_DMA_DEDICATED 8&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@01c0f000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 8&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			interrupts = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@01c10000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c10000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 9&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			interrupts = &lt;33&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@01c11000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c11000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 10&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			interrupts = &lt;34&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy: phy@01c13400 {</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun5i-a13-usb-phy";</div><div class='add'>+			reg = &lt;0x01c13400 0x10 0x01c14800 0x4&gt;;</div><div class='add'>+			reg-names = "phy_ctrl", "pmu1";</div><div class='add'>+			clocks = &lt;&amp;usb_clk 8&gt;;</div><div class='add'>+			clock-names = "usb_phy";</div><div class='add'>+			resets = &lt;&amp;usb_clk 0&gt;, &lt;&amp;usb_clk 1&gt;;</div><div class='add'>+			reset-names = "usb0_reset", "usb1_reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@01c14000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x01c14000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;39&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 1&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@01c14400 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x01c14400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;40&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_clk 6&gt;, &lt;&amp;ahb_gates 2&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@01c17000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-spi";</div><div class='add'>+			reg = &lt;0x01c17000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;12&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 22&gt;, &lt;&amp;spi2_clk&gt;;</div><div class='add'>+			clock-names = "ahb", "mod";</div><div class='add'>+			dmas = &lt;&amp;dma SUN4I_DMA_DEDICATED 29&gt;,</div><div class='add'>+			       &lt;&amp;dma SUN4I_DMA_DEDICATED 28&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@01c20400 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-ic";</div><div class='add'>+			reg = &lt;0x01c20400 0x400&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pio: pinctrl@01c20800 {</div><div class='add'>+			reg = &lt;0x01c20800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;28&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb0_gates 5&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins_a: i2c0@0 {</div><div class='add'>+				allwinner,pins = "PB0", "PB1";</div><div class='add'>+				allwinner,function = "i2c0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins_a: i2c1@0 {</div><div class='add'>+				allwinner,pins = "PB15", "PB16";</div><div class='add'>+				allwinner,function = "i2c1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins_a: i2c2@0 {</div><div class='add'>+				allwinner,pins = "PB17", "PB18";</div><div class='add'>+				allwinner,function = "i2c2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc0_pins_a: mmc0@0 {</div><div class='add'>+				allwinner,pins = "PF0", "PF1", "PF2", "PF3",</div><div class='add'>+						 "PF4", "PF5";</div><div class='add'>+				allwinner,function = "mmc0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc2_pins_a: mmc2@0 {</div><div class='add'>+				allwinner,pins = "PC6", "PC7", "PC8", "PC9",</div><div class='add'>+					"PC10", "PC11", "PC12", "PC13",</div><div class='add'>+					"PC14", "PC15";</div><div class='add'>+				allwinner,function = "mmc2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@01c20c00 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-timer";</div><div class='add'>+			reg = &lt;0x01c20c00 0x90&gt;;</div><div class='add'>+			interrupts = &lt;22&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@01c20c90 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-wdt";</div><div class='add'>+			reg = &lt;0x01c20c90 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lradc: lradc@01c22800 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-lradc-keys";</div><div class='add'>+			reg = &lt;0x01c22800 0x100&gt;;</div><div class='add'>+			interrupts = &lt;31&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sid: eeprom@01c23800 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-sid";</div><div class='add'>+			reg = &lt;0x01c23800 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtp: rtp@01c25000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ts";</div><div class='add'>+			reg = &lt;0x01c25000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;29&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@01c28400 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 17&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@01c28c00 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 19&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@01c2ac00 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-i2c";</div><div class='add'>+			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;7&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@01c2b000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-i2c";</div><div class='add'>+			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;8&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@01c2b400 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-i2c";</div><div class='add'>+			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;9&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@01c60000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-hstimer";</div><div class='add'>+			reg = &lt;0x01c60000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;82&gt;, &lt;83&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb_gates 28&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts<br/>index be9f5ee6b59e..2f8cfab771e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31-app4-evb1.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-app4-evb1.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,39 +53,41 @@</div><div class='ctx'> 	model = "Allwinner A31 APP4 EVB1 Evaluation Board";</div><div class='ctx'> 	compatible = "allwinner,app4-evb1", "allwinner,sun6i-a31";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			usb1_vbus_pin_a: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PH27";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c19400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	usb1_vbus_pin_a: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH27";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c1a000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_a&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_a&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts<br/>index 84630e56acd7..0cf9926d1e93 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-colombus.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31-colombus.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-colombus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-colombus.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,79 +53,81 @@</div><div class='ctx'> 	model = "WITS A31 Colombus Evaluation Board";</div><div class='ctx'> 	compatible = "wits,colombus", "allwinner,sun6i-a31";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "fail";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_colombus&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 0 8 GPIO_ACTIVE_HIGH&gt;; /* PA8 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_colombus&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 0 8 GPIO_ACTIVE_HIGH&gt;; /* PA8 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c19400 {</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1b000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc0_cd_pin_colombus: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PA8";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2_vbus_pin_colombus: usb2_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PH24";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "fail";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;mmc0_pins_a {</div><div class='add'>+	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_colombus: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PA8";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb2_vbus_pin_colombus&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	usb2_vbus_pin_colombus: usb2_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH24";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_vbus_pin_colombus&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts<br/>index 8b61b1b342e0..d0cfadac0691 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-hummingbird.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31-hummingbird.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-hummingbird.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-hummingbird.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -58,8 +53,17 @@</div><div class='ctx'> 	model = "Merrii A31 Hummingbird";</div><div class='ctx'> 	compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 6 10 GPIO_ACTIVE_LOW&gt;; /* PG10 */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -106,10 +110,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ir {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_hummingbird&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 0 8 GPIO_ACTIVE_HIGH&gt;; /* PA8 */</div><div class='ctx'> 	cd-inverted;</div><div class='hunk'>@@ -121,6 +131,16 @@</div><div class='ctx'> 	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins_a&gt;, &lt;&amp;wifi_reset_pin_hummingbird&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_wifi&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ohci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -132,6 +152,80 @@</div><div class='ctx'> 		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wifi_reset_pin_hummingbird: wifi_reset_pin@0 {</div><div class='add'>+		allwinner,pins = "PG10";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;p2wi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp221: pmic@68 {</div><div class='add'>+		compatible = "x-powers,axp221";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		dcdc1-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+		dcdc5-supply = &lt;&amp;vcc_dram&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			x-powers,dcdc-freq = &lt;3000&gt;;</div><div class='add'>+</div><div class='add'>+			vcc_3v0: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "vcc-3v0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1320000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1320000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_sys_dll: dcdc4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-sys-dll";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_dram: dcdc5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-name = "vcc-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_wifi: aldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_wifi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc: aldo3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "avcc";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;reg_usb1_vbus {</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts b/arch/arm/boot/dts/sun6i-a31-i7.dts<br/>new file mode 100644<br/>index 000000000000..e9185dad67ee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-i7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-i7.dts</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Marcus Cooper &lt;codekipper@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun6i-a31.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Mele I7 Quad top set box";</div><div class='add'>+	compatible = "mele,i7", "allwinner,sun6i-a31";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_i7&gt;;</div><div class='add'>+</div><div class='add'>+		blue {</div><div class='add'>+			label = "i7:blue:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_i7&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_i7: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH13";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_cd_pin_i7: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH22";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_i7: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PC27";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_i7&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts<br/>index 139a21e6b695..6e0e5687a09c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-m9.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31-m9.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-m9.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-m9.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -53,100 +48,102 @@</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Mele M9 / A1000G Quad top set box";</div><div class='add'>+	model = "Mele M9 top set box";</div><div class='ctx'> 	compatible = "mele,m9", "allwinner,sun6i-a31";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_m9&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_m9&gt;;</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c19400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+		blue {</div><div class='add'>+			label = "m9:blue:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c1a000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1b000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			led_pins_m9: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH13";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc0_cd_pin_m9: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PH22";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_m9: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PC27";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c30000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;ir {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_m9&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ir@01f02000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_m9: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH13";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_m9&gt;;</div><div class='del'>-</div><div class='del'>-		blue {</div><div class='del'>-			label = "m9:blue:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='add'>+	mmc0_cd_pin_m9: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH22";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_m9&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 2 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	usb1_vbus_pin_m9: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PC27";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_m9&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts<br/>new file mode 100644<br/>index 000000000000..4404f37d132e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun6i-a31.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Mele A1000G Quad top set box";</div><div class='add'>+	compatible = "mele,a1000g-quad", "allwinner,sun6i-a31";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_m9&gt;;</div><div class='add'>+</div><div class='add'>+		blue {</div><div class='add'>+			label = "m9:blue:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_m9&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_m9: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH13";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_cd_pin_m9: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH22";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_m9: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PC27";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_m9&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi<br/>index fa2f403ccf28..008047a018cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -50,6 +45,7 @@</div><div class='ctx'> #include "skeleton.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +62,8 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		framebuffer@0 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='ctx'> 			allwinner,pipeline = "de_be0-lcd0-hdmi";</div><div class='ctx'> 			clocks = &lt;&amp;pll6 0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -96,10 +93,22 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpu&gt;;</div><div class='add'>+			clock-latency = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			operating-points = &lt;</div><div class='add'>+				/* kHz	  uV */</div><div class='add'>+				1008000	1200000</div><div class='add'>+				864000	1200000</div><div class='add'>+				720000	1100000</div><div class='add'>+				480000	1000000</div><div class='add'>+				&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cooling-min-level = &lt;0&gt;;</div><div class='add'>+			cooling-max-level = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -121,6 +130,38 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu_thermal {</div><div class='add'>+			/* milliseconds */</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;rtp&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu_alert0: cpu_alert0 {</div><div class='add'>+					/* milliCelsius */</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_crit: cpu_crit {</div><div class='add'>+					/* milliCelsius */</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -196,6 +237,14 @@</div><div class='ctx'> 			reg = &lt;0x01c20054 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;axi&gt;, &lt;&amp;pll6 0&gt;;</div><div class='ctx'> 			clock-output-names = "ahb1";</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Clock AHB1 from PLL6, instead of CPU/AXI which</div><div class='add'>+			 * has rate changes due to cpufreq. Also the DMA</div><div class='add'>+			 * controller requires AHB1 clocked from PLL6.</div><div class='add'>+			 */</div><div class='add'>+			assigned-clocks = &lt;&amp;ahb1&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pll6 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ahb1_gates: clk@01c20060 {</div><div class='hunk'>@@ -251,9 +300,10 @@</div><div class='ctx'> 			reg = &lt;0x01c2006c 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb2&gt;;</div><div class='ctx'> 			clock-output-names = "apb2_i2c0", "apb2_i2c1",</div><div class='del'>-					"apb2_i2c2", "apb2_i2c3", "apb2_uart0",</div><div class='del'>-					"apb2_uart1", "apb2_uart2", "apb2_uart3",</div><div class='del'>-					"apb2_uart4", "apb2_uart5";</div><div class='add'>+					     "apb2_i2c2", "apb2_i2c3",</div><div class='add'>+					     "apb2_uart0", "apb2_uart1",</div><div class='add'>+					     "apb2_uart2", "apb2_uart3",</div><div class='add'>+					     "apb2_uart4", "apb2_uart5";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc0_clk: clk@01c20088 {</div><div class='hunk'>@@ -330,7 +380,7 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_clk: clk@01c200cc {</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-		        #reset-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun6i-a31-usb-clk";</div><div class='ctx'> 			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;osc24M&gt;;</div><div class='hunk'>@@ -340,10 +390,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * The following two are dummy clocks, placeholders used in the gmac_tx</div><div class='del'>-		 * clock. The gmac driver will choose one parent depending on the PHY</div><div class='del'>-		 * interface mode, using clk_set_rate auto-reparenting.</div><div class='del'>-		 * The actual TX clock rate is not controlled by the gmac_tx clock.</div><div class='add'>+		 * The following two are dummy clocks, placeholders</div><div class='add'>+		 * used in the gmac_tx clock. The gmac driver will</div><div class='add'>+		 * choose one parent depending on the PHY interface</div><div class='add'>+		 * mode, using clk_set_rate auto-reparenting.</div><div class='add'>+		 *</div><div class='add'>+		 * The actual TX clock rate is not controlled by the</div><div class='add'>+		 * gmac_tx clock.</div><div class='ctx'> 		 */</div><div class='ctx'> 		mii_phy_tx_clk: clk@1 {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -381,10 +434,6 @@</div><div class='ctx'> 			clocks = &lt;&amp;ahb1_gates 6&gt;;</div><div class='ctx'> 			resets = &lt;&amp;ahb1_rst 6&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			/* DMA controller requires AHB1 clocked from PLL6 */</div><div class='del'>-			assigned-clocks = &lt;&amp;ahb1&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;pll6 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc0: mmc@01c0f000 {</div><div class='hunk'>@@ -402,6 +451,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc1: mmc@01c10000 {</div><div class='hunk'>@@ -419,6 +470,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc2: mmc@01c11000 {</div><div class='hunk'>@@ -436,6 +489,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc3: mmc@01c12000 {</div><div class='hunk'>@@ -453,6 +508,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usbphy: phy@01c19400 {</div><div class='hunk'>@@ -575,12 +632,21 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='add'>+				allwinner,pins = "PF0", "PF1", "PF2",</div><div class='add'>+						 "PF3", "PF4", "PF5";</div><div class='ctx'> 				allwinner,function = "mmc0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			mmc1_pins_a: mmc1@0 {</div><div class='add'>+				allwinner,pins = "PG0", "PG1", "PG2", "PG3",</div><div class='add'>+						 "PG4", "PG5";</div><div class='add'>+				allwinner,function = "mmc1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			gmac_pins_mii_a: gmac_mii@0 {</div><div class='ctx'> 				allwinner,pins = "PA0", "PA1", "PA2", "PA3",</div><div class='ctx'> 						"PA8", "PA9", "PA11",</div><div class='hunk'>@@ -805,7 +871,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		timer@01c60000 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer";</div><div class='add'>+			compatible = "allwinner,sun6i-a31-hstimer",</div><div class='add'>+				     "allwinner,sun7i-a20-hstimer";</div><div class='ctx'> 			reg = &lt;0x01c60000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -896,7 +963,8 @@</div><div class='ctx'> 			ar100: ar100_clk {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-ar100-clk";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;,</div><div class='add'>+					 &lt;&amp;pll6 0&gt;;</div><div class='ctx'> 				clock-output-names = "ar100";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -973,6 +1041,27 @@</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			p2wi_pins: p2wi {</div><div class='add'>+				allwinner,pins = "PL0", "PL1";</div><div class='add'>+				allwinner,function = "s_p2wi";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		p2wi: i2c@01f03400 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-p2wi";</div><div class='add'>+			reg = &lt;0x01f03400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb0_gates 3&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			resets = &lt;&amp;apb0_rst 3&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;p2wi_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts b/arch/arm/boot/dts/sun6i-a31s-cs908.dts<br/>index bc3734f67cf0..1e2411a2bcea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31s-cs908.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31s-cs908.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31s-cs908.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31s-cs908.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this library; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -53,10 +48,14 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "CSQ CS908 top set box";</div><div class='ctx'> 	compatible = "csq,cs908", "allwinner,sun6i-a31s";</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;usbphy {</div><div class='del'>-	status = "okay";</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci0 {</div><div class='hunk'>@@ -67,25 +66,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;ohci1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pio {</div><div class='del'>-	usb1_vbus_pin_csq908: usb1_vbus_pin@0 {</div><div class='del'>-		allwinner,pins = "PC27";</div><div class='del'>-		allwinner,function = "gpio_out";</div><div class='del'>-		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gmac {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='hunk'>@@ -102,3 +82,17 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ir_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun6i-a31s.dtsi b/arch/arm/boot/dts/sun6i-a31s.dtsi<br/>index eaf5ec8fd459..c17a32771b98 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31s.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun6i-a31s.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun6i-a31s.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun6i-a31s.dtsi</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this library; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts<br/>index 5dd139e7792e..9f7b472e6725 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-bananapi.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-bananapi.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-bananapi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-bananapi.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -65,160 +60,164 @@</div><div class='ctx'> 		serial2 = &amp;uart7;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		spi0: spi@01c05000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spi0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_bananapi&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 10 GPIO_ACTIVE_HIGH&gt;; /* PH10 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_bananapi&gt;;</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+		green {</div><div class='add'>+			label = "bananapi:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	reg_gmac_3v3: gmac-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac_power_pin_bananapi&gt;;</div><div class='add'>+		regulator-name = "gmac-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 7 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PH10";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gmac_power_pin_bananapi: gmac_power_pin@0 {</div><div class='del'>-				allwinner,pins = "PH23";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_bananapi: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH24";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart3_pins_b&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart7: serial@01c29c00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart7_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_bananapi&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 10 GPIO_ACTIVE_HIGH&gt;; /* PH10 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH10";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_bananapi&gt;;</div><div class='del'>-</div><div class='del'>-		green {</div><div class='del'>-			label = "bananapi:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='add'>+	gmac_power_pin_bananapi: gmac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH23";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	led_pins_bananapi: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH24";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_gmac_3v3: gmac-3v3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;gmac_power_pin_bananapi&gt;;</div><div class='del'>-		regulator-name = "gmac-3v3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;100000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;pio 7 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts<br/>index fb89fe7ed21b..18fcc87f4621 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-bananapro.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-bananapro.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-bananapro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-bananapro.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -55,6 +50,16 @@</div><div class='ctx'> 	model = "LeMaker Banana Pro";</div><div class='ctx'> 	compatible = "lemaker,bananapro", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart4;</div><div class='add'>+		serial2 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -144,7 +149,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;ir0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -233,7 +238,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs0_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi0_cs1_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -243,9 +250,9 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;uart2 {</div><div class='add'>+&amp;uart4 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_b&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts<br/>index c4ab6edb6f15..39a51d5143f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-cubieboard2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-cubieboard2.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -59,94 +54,12 @@</div><div class='ctx'> 	model = "Cubietech Cubieboard2";</div><div class='ctx'> 	compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			led_pins_cubieboard2: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH20", "PH21";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -164,26 +77,94 @@</div><div class='ctx'> 			gpios = &lt;&amp;pio 7 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#include "axp209.dtsi"</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-&amp;cpu0 {</div><div class='del'>-	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_cubieboard2: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH20", "PH21";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;reg_dcdc2 {</div><div class='ctx'> 	regulator-always-on;</div><div class='ctx'> 	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -208,3 +189,23 @@</div><div class='ctx'> 	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 	regulator-name = "avcc";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts<br/>index 8f74a649576d..4611e2f5a99e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-cubietruck.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-cubietruck.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-cubietruck.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-cubietruck.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -59,142 +54,12 @@</div><div class='ctx'> 	model = "Cubietech Cubietruck";</div><div class='ctx'> 	compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc3: mmc@01c12000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vmmc3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb0_vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc3_pins_a: mmc3@0 {</div><div class='del'>-				/* AP6210 requires pull-up */</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vmmc3_pin_cubietruck: vmmc3_pin@0 {</div><div class='del'>-				allwinner,pins = "PH9";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {</div><div class='del'>-				allwinner,pins = "PH12";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_cubietruck: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH7", "PH11", "PH20", "PH21";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb0_vbus_pin_a: usb0_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PH17";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm: pwm@01c20e00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;pwm0_pins_a&gt;, &lt;&amp;pwm1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			status = "okay";</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -223,26 +88,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		pinctrl-0 = &lt;&amp;ahci_pwr_pin_cubietruck&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb0_vbus: usb0-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb0_vbus_pin_a&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_vmmc3: vmmc3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -255,12 +100,149 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#include "axp209.dtsi"</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vmmc3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: bcrmf@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;; /* PH10 / EINT10 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3_pins_a {</div><div class='add'>+	/* AP6210 requires pull-up */</div><div class='add'>+	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vmmc3_pin_cubietruck: vmmc3_pin@0 {</div><div class='add'>+		allwinner,pins = "PH9";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {</div><div class='add'>+		allwinner,pins = "PH12";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_cubietruck: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH7", "PH11", "PH20", "PH21";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_vbus_pin_a: usb0_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH17";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_pins_a&gt;, &lt;&amp;pwm1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_cubietruck&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;reg_dcdc2 {</div><div class='ctx'> 	regulator-always-on;</div><div class='ctx'> 	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -285,3 +267,30 @@</div><div class='ctx'> 	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 	regulator-name = "avcc";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_usb0_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_vbus_pin_a&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts<br/>index 86a944ce19f8..37f4a5497452 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-hummingbird.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-hummingbird.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-hummingbird.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-hummingbird.dts</a></div><div class='hunk'>@@ -3,12 +3,43 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Wills Wang &lt;wills.wang.open@gmail.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -31,197 +62,8 @@</div><div class='ctx'> 		serial4 = &amp;uart5;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc3: mmc@01c12000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_mmc3_vdd&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 {</div><div class='del'>-				allwinner,pins = "PH15";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 {</div><div class='del'>-				allwinner,pins = "PH9";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 {</div><div class='del'>-				allwinner,pins = "PH16";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm: pwm@01c20e00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;pwm0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart2: serial@01c28800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart3_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart4: serial@01c29000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart4_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart5: serial@01c29400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart5_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c3: i2c@01c2b800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c3_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2: spi@01c17000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spi2_pins_b&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			phy-supply = &lt;&amp;reg_gmac_vdd&gt;;</div><div class='del'>-			/* phy reset config */</div><div class='del'>-			snps,reset-gpio = &lt;&amp;pio 0 17 GPIO_ACTIVE_HIGH&gt;; /* PA17 */</div><div class='del'>-			snps,reset-active-low;</div><div class='del'>-			/* wait 1s after reset, otherwise fail to read phy id */</div><div class='del'>-			snps,reset-delays-us = &lt;0 10000 1000000&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		pinctrl-0 = &lt;&amp;ahci_pwr_pin_a20_hummingbird&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 15 GPIO_ACTIVE_HIGH&gt;; /* PH15 */</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb1_vbus_pin_a20_hummingbird&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;; /* PH2 */</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_mmc3_vdd: mmc3_vdd {</div><div class='hunk'>@@ -246,3 +88,195 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 16 GPIO_ACTIVE_HIGH&gt;; /* PH16 */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_gmac_vdd&gt;;</div><div class='add'>+	/* phy reset config */</div><div class='add'>+	snps,reset-gpio = &lt;&amp;pio 0 17 GPIO_ACTIVE_HIGH&gt;; /* PA17 */</div><div class='add'>+	snps,reset-active-low;</div><div class='add'>+	/* wait 1s after reset, otherwise fail to read phy id */</div><div class='add'>+	snps,reset-delays-us = &lt;0 10000 1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_mmc3_vdd&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 {</div><div class='add'>+		allwinner,pins = "PH15";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH9";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH16";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_a20_hummingbird&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 15 GPIO_ACTIVE_HIGH&gt;; /* PH15 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_a20_hummingbird&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;; /* PH2 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2_pins_b&gt;,</div><div class='add'>+		    &lt;&amp;spi2_cs0_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts<br/>index 06148b4d000f..f32f6f20d923 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -57,123 +52,12 @@</div><div class='ctx'> 	model = "I12 / Q5 / QT840A A20 tvbox";</div><div class='ctx'> 	compatible = "allwinner,i12-tvbox", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc3: mmc@01c12000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vmmc3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc3_pins_a: mmc3@0 {</div><div class='del'>-				/* AP6210 / AP6330 requires pull-up */</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vmmc3_pin_i12_tvbox: vmmc3_pin@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vmmc3_io_pin_i12_tvbox: vmmc3_io_pin@0 {</div><div class='del'>-				allwinner,pins = "PH12";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gmac_power_pin_i12_tvbox: gmac_power_pin@0 {</div><div class='del'>-				allwinner,pins = "PH21";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_i12_tvbox: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH9", "PH20";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -192,14 +76,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_vmmc3: vmmc3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -236,3 +112,136 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vmmc3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: bcrmf@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;; /* PH10 / EINT10 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3_pins_a {</div><div class='add'>+	/* AP6210 / AP6330 requires pull-up */</div><div class='add'>+	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vmmc3_pin_i12_tvbox: vmmc3_pin@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc3_io_pin_i12_tvbox: vmmc3_io_pin@0 {</div><div class='add'>+		allwinner,pins = "PH12";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_power_pin_i12_tvbox: gmac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH21";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_i12_tvbox: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH9", "PH20";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts<br/>index 5add9f243ec3..8d9ea48dd98c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-m3.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-m3.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-m3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-m3.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -59,114 +54,120 @@</div><div class='ctx'> 	model = "Mele M3";</div><div class='ctx'> 	compatible = "mele,m3", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		mmc2: mmc@01c11000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc2_pins_a&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_m3&gt;;</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='add'>+		blue {</div><div class='add'>+			label = "m3:blue:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			led_pins_m3: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH20";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_pins_a&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_m3&gt;;</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		blue {</div><div class='del'>-			label = "m3:blue:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_m3: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH20";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-mk808c.dts b/arch/arm/boot/dts/sun7i-a20-mk808c.dts<br/>new file mode 100644<br/>index 000000000000..4f432f8ade77<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-mk808c.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-mk808c.dts</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Marcus Cooper</div><div class='add'>+ *</div><div class='add'>+ * Marcus Cooper &lt;codekipper@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *     You should have received a copy of the GNU General Public</div><div class='add'>+ *     License along with this file; if not, write to the Free</div><div class='add'>+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='add'>+ *     MA 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun7i-a20.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "mk808c";</div><div class='add'>+	compatible = "allwinner,mk808c", "allwinner,sun7i-a20";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts<br/>index 12ded69d61eb..769726dfb046 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts</a></div><div class='hunk'>@@ -19,11 +19,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -60,118 +55,124 @@</div><div class='ctx'> 	model = "Olimex A20-OLinuXino-LIME";</div><div class='ctx'> 	compatible = "olimex,a20-olinuxino-lime", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='add'>+		green {</div><div class='add'>+			label = "a20-olinuxino-lime:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='del'>-				allwinner,pins = "PC3";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxinolime: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='del'>-			label = "a20-olinuxino-lime:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='add'>+		allwinner,pins = "PC3";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	led_pins_olinuxinolime: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts<br/>index 260dbd3bf29d..8acff78272b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -57,176 +52,182 @@</div><div class='ctx'> 	model = "Olimex A20-OLinuXino-LIME2";</div><div class='ctx'> 	compatible = "olimex,a20-olinuxino-lime2", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='add'>+		green {</div><div class='add'>+			label = "a20-olinuxino-lime2:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	reg_axp_ipsout: axp_ipsout {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "axp-ipsout";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='del'>-				allwinner,pins = "PC3";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-			led_pins_olinuxinolime: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		acin-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='add'>+		ldo24in-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='add'>+		ldo3in-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_rtc: ldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+			avcc: ldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				acin-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='del'>-				vin2-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='del'>-				vin3-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='del'>-				ldo24in-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='del'>-				ldo3in-supply = &lt;&amp;reg_axp_ipsout&gt;;</div><div class='del'>-</div><div class='del'>-				regulators {</div><div class='del'>-					vdd_rtc: ldo1 {</div><div class='del'>-						regulator-min-microvolt = &lt;1300000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					avcc: ldo2 {</div><div class='del'>-						regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vcc_csi0: ldo3 {</div><div class='del'>-						regulator-min-microvolt = &lt;700000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vcc_csi1: ldo4 {</div><div class='del'>-						regulator-min-microvolt = &lt;1250000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vdd_cpu: dcdc2 {</div><div class='del'>-						regulator-min-microvolt = &lt;700000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;2275000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vdd_int: dcdc3 {</div><div class='del'>-						regulator-min-microvolt = &lt;700000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='add'>+			vcc_csi0: ldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+			vcc_csi1: ldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			status = "okay";</div><div class='add'>+			vdd_cpu: dcdc2 {</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2275000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='add'>+			vdd_int: dcdc3 {</div><div class='add'>+				regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxinolime&gt;;</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='del'>-			label = "a20-olinuxino-lime2:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pio {</div><div class='add'>+	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {</div><div class='add'>+		allwinner,pins = "PC3";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_axp_ipsout: axp_ipsout {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "axp-ipsout";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='add'>+	led_pins_olinuxinolime: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_olinuxinolime&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts<br/>index 714e15ac5416..00f8f25eccae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts</a></div><div class='hunk'>@@ -3,12 +3,43 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='ctx'>  *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -32,216 +63,220 @@</div><div class='ctx'> 		spi1 = &amp;spi2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		spi1: spi@01c06000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spi1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		mmc3: mmc@01c12000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;, &lt;&amp;mmc3_cd_pin_olinuxinom&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 11 GPIO_ACTIVE_HIGH&gt;; /* PH11 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='ctx'> </div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+		green {</div><div class='add'>+			label = "a20-olinuxino-micro:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		spi2: spi@01c17000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spi2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PH11";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_olinuxino: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			button@191 {</div><div class='del'>-				label = "Volume Up";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;191274&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@392 {</div><div class='del'>-				label = "Volume Down";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;392644&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@601 {</div><div class='del'>-				label = "Menu";</div><div class='del'>-				linux,code = &lt;KEY_MENU&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;601151&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@795 {</div><div class='del'>-				label = "Search";</div><div class='del'>-				linux,code = &lt;KEY_SEARCH&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;795090&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@987 {</div><div class='del'>-				label = "Home";</div><div class='del'>-				linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;987387&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@1184 {</div><div class='del'>-				label = "Esc";</div><div class='del'>-				linux,code = &lt;KEY_ESC&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;1184678&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			button@1398 {</div><div class='del'>-				label = "Enter";</div><div class='del'>-				linux,code = &lt;KEY_ENTER&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;1398804&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart6: serial@01c29800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart6_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		uart7: serial@01c29c00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart7_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+	button@191 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;191274&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	button@392 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;392644&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	button@601 {</div><div class='add'>+		label = "Menu";</div><div class='add'>+		linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;601151&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@795 {</div><div class='add'>+		label = "Search";</div><div class='add'>+		linux,code = &lt;KEY_SEARCH&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;795090&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@987 {</div><div class='add'>+		label = "Home";</div><div class='add'>+		linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;987387&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+	button@1184 {</div><div class='add'>+		label = "Esc";</div><div class='add'>+		linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1184678&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	button@1398 {</div><div class='add'>+		label = "Enter";</div><div class='add'>+		linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1398804&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_pins_olinuxino&gt;;</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='del'>-			label = "a20-olinuxino-micro:green:usr";</div><div class='del'>-			gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;, &lt;&amp;mmc3_cd_pin_olinuxinom&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 11 GPIO_ACTIVE_HIGH&gt;; /* PH11 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH11";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+	led_pins_olinuxino: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_20_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi1_cs0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2_pins_a&gt;,</div><div class='add'>+		    &lt;&amp;spi2_cs0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart6_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts<br/>new file mode 100644<br/>index 000000000000..73cd81ee02e3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts</a></div><div class='hunk'>@@ -0,0 +1,250 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun7i-a20.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Orange Pi Mini";</div><div class='add'>+	compatible = "xunlong,orangepi-mini", "allwinner,sun7i-a20";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_orangepi&gt;;</div><div class='add'>+</div><div class='add'>+		green {</div><div class='add'>+			label = "orangepi:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;; /* PH24 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blue {</div><div class='add'>+			label = "orangepi:blue:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 25 GPIO_ACTIVE_HIGH&gt;; /* PH25 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_gmac_3v3: gmac-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac_power_pin_orangepi&gt;;</div><div class='add'>+		regulator-name = "gmac-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 7 23 GPIO_ACTIVE_HIGH&gt;; /* PH23 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_orangepi&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 10 GPIO_ACTIVE_HIGH&gt;; /* PH10 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc3_pins_a&gt;, &lt;&amp;mmc3_cd_pin_orangepi&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 11 GPIO_ACTIVE_HIGH&gt;; /* PH11 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH10";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc3_cd_pin_orangepi: mmc3_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH11";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH22";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_power_pin_orangepi: gmac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH23";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_orangepi: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH24", "PH25";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH26";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-int-pll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo1 {</div><div class='add'>+	regulator-name = "vdd-rtc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-name = "avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_bananapro&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 26 GPIO_ACTIVE_HIGH&gt;; /* PH26 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_vbus_pin_bananapro&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts<br/>new file mode 100644<br/>index 000000000000..55a06ceb80ec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-orangepi.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-orangepi.dts</a></div><div class='hunk'>@@ -0,0 +1,228 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun7i-a20.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Orange Pi";</div><div class='add'>+	compatible = "xunlong,orangepi", "allwinner,sun7i-a20";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_orangepi&gt;;</div><div class='add'>+</div><div class='add'>+		green {</div><div class='add'>+			label = "orangepi:green:usr";</div><div class='add'>+			gpios = &lt;&amp;pio 7 24 GPIO_ACTIVE_HIGH&gt;; /* PH24 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_gmac_3v3: gmac-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac_power_pin_orangepi&gt;;</div><div class='add'>+		regulator-name = "gmac-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 7 23 GPIO_ACTIVE_HIGH&gt;; /* PH23 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_gmac_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_orangepi&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 10 GPIO_ACTIVE_HIGH&gt;; /* PH10 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH10";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH22";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_power_pin_orangepi: gmac_power_pin@0 {</div><div class='add'>+		allwinner,pins = "PH23";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_orangepi: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH24";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH26";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-int-pll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo1 {</div><div class='add'>+	regulator-name = "vdd-rtc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-name = "avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_bananapro&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 26 GPIO_ACTIVE_HIGH&gt;; /* PH26 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_vbus_pin_bananapro&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 22 GPIO_ACTIVE_HIGH&gt;; /* PH22 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts<br/>new file mode 100644<br/>index 000000000000..5361fce26b45<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Adam Sampson &lt;ats@offog.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun7i-a20.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "LinkSprite pcDuino3 Nano";</div><div class='add'>+	compatible = "linksprite,pcduino3-nano", "allwinner,sun7i-a20";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_pcduino3_nano&gt;;</div><div class='add'>+</div><div class='add'>+		/* Marked "LED3" on the PCB. */</div><div class='add'>+		usr1 {</div><div class='add'>+			label = "pcduino3-nano:green:usr1";</div><div class='add'>+			gpios = &lt;&amp;pio 7 16 GPIO_ACTIVE_LOW&gt;; /* PH16 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Marked "LED4" on the PCB. */</div><div class='add'>+		usr2 {</div><div class='add'>+			label = "pcduino3-nano:green:usr2";</div><div class='add'>+			gpios = &lt;&amp;pio 7 15 GPIO_ACTIVE_LOW&gt;; /* PH15 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_rgmii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {</div><div class='add'>+		allwinner,pins = "PH2";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins_pcduino3_nano: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH16", "PH15";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {</div><div class='add'>+		allwinner,pins = "PH11";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	pinctrl-0 = &lt;&amp;ahci_pwr_pin_pcduino3_nano&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;; /* PH2 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_pcduino3_nano&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 11 GPIO_ACTIVE_HIGH&gt;; /* PH11 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts<br/>index 0a2c2aeb4687..afc9ecebed21 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-pcduino3.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20-pcduino3.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-pcduino3.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-pcduino3.dts</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -59,103 +54,12 @@</div><div class='ctx'> 	model = "LinkSprite pcDuino3";</div><div class='ctx'> 	compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbphy: phy@01c13400 {</div><div class='del'>-			usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='del'>-			usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@01c14000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@01c14400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahci: sata@01c18000 {</div><div class='del'>-			target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@01c1c000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@01c1c400 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			ahci_pwr_pin_a: ahci_pwr_pin@0 {</div><div class='del'>-				allwinner,pins = "PH2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led_pins_pcduino3: led_pins@0 {</div><div class='del'>-				allwinner,pins = "PH15", "PH16";</div><div class='del'>-				allwinner,function = "gpio_out";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			key_pins_pcduino3: key_pins@0 {</div><div class='del'>-				allwinner,pins = "PH17", "PH18", "PH19";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ir0: ir@01c21800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;ir0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			axp209: pmic@34 {</div><div class='del'>-				compatible = "x-powers,axp209";</div><div class='del'>-				reg = &lt;0x34&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gmac: ethernet@01c50000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='del'>-			phy = &lt;&amp;phy1&gt;;</div><div class='del'>-			phy-mode = "mii";</div><div class='del'>-			status = "okay";</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -196,17 +100,114 @@</div><div class='ctx'> 			gpios = &lt;&amp;pio 7 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb1_vbus: usb1-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;ahci {</div><div class='add'>+	target-supply = &lt;&amp;reg_ahci_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ahci_pwr_pin_a {</div><div class='add'>+	allwinner,pins = "PH2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac_pins_mii_a&gt;;</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir0_rx_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	reg_usb2_vbus: usb2-vbus {</div><div class='del'>-		status = "okay";</div><div class='add'>+&amp;pio {</div><div class='add'>+	led_pins_pcduino3: led_pins@0 {</div><div class='add'>+		allwinner,pins = "PH15", "PH16";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_ahci_5v: ahci-5v {</div><div class='del'>-		gpio = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "okay";</div><div class='add'>+	key_pins_pcduino3: key_pins@0 {</div><div class='add'>+		allwinner,pins = "PH17", "PH18", "PH19";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;reg_ahci_5v {</div><div class='add'>+	gpio = &lt;&amp;pio 7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts<br/>new file mode 100644<br/>index 000000000000..83c6d3f872ff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Aleksei Mamlin</div><div class='add'>+ * Aleksei Mamlin &lt;mamlinav@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun7i-a20.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Wexler TAB7200";</div><div class='add'>+	compatible = "wexler,tab7200", "allwinner,sun7i-a20";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@571 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;571428&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@761 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;761904&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_reference_design&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_HIGH&gt;; /* PH1 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-int-dll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo1 {</div><div class='add'>+	regulator-name = "vdd-rtc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-name = "avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb2_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi<br/>index fdd181792b4b..6a63f30c9a69 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun7i-a20.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun7i-a20.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun7i-a20.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -68,7 +63,8 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		framebuffer@0 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='ctx'> 			allwinner,pipeline = "de_be0-lcd0-hdmi";</div><div class='ctx'> 			clocks = &lt;&amp;pll5 1&gt;, &lt;&amp;ahb_gates 36&gt;, &lt;&amp;ahb_gates 43&gt;,</div><div class='ctx'> 				 &lt;&amp;ahb_gates 44&gt;;</div><div class='hunk'>@@ -104,14 +100,14 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpu&gt;;</div><div class='ctx'> 			clock-latency = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			operating-points = &lt;</div><div class='del'>-				/* kHz    uV */</div><div class='del'>-				960000  1400000</div><div class='del'>-				912000  1400000</div><div class='del'>-				864000  1300000</div><div class='del'>-				720000  1200000</div><div class='del'>-				528000  1100000</div><div class='del'>-				312000  1000000</div><div class='del'>-				144000  900000</div><div class='add'>+				/* kHz	  uV */</div><div class='add'>+				960000	1400000</div><div class='add'>+				912000	1400000</div><div class='add'>+				864000	1300000</div><div class='add'>+				720000	1200000</div><div class='add'>+				528000	1100000</div><div class='add'>+				312000	1000000</div><div class='add'>+				144000	900000</div><div class='ctx'> 				&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			cooling-min-level = &lt;0&gt;;</div><div class='hunk'>@@ -224,7 +220,8 @@</div><div class='ctx'> 			compatible = "allwinner,sun4i-a10-pll6-clk";</div><div class='ctx'> 			reg = &lt;0x01c20028 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll6_sata", "pll6_other", "pll6";</div><div class='add'>+			clock-output-names = "pll6_sata", "pll6_other", "pll6",</div><div class='add'>+					     "pll6_div_4";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pll8: clk@01c20040 {</div><div class='hunk'>@@ -253,10 +250,16 @@</div><div class='ctx'> </div><div class='ctx'> 		ahb: ahb@01c20054 {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ahb-clk";</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ahb-clk";</div><div class='ctx'> 			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;axi&gt;;</div><div class='add'>+			clocks = &lt;&amp;axi&gt;, &lt;&amp;pll6 3&gt;, &lt;&amp;pll6 1&gt;;</div><div class='ctx'> 			clock-output-names = "ahb";</div><div class='add'>+			/*</div><div class='add'>+			 * Use PLL6 as parent, instead of CPU/AXI</div><div class='add'>+			 * which has rate changes due to cpufreq</div><div class='add'>+			 */</div><div class='add'>+			assigned-clocks = &lt;&amp;ahb&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pll6 3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ahb_gates: clk@01c20060 {</div><div class='hunk'>@@ -441,11 +444,12 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_clk: clk@01c200cc {</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-		        #reset-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun4i-a10-usb-clk";</div><div class='ctx'> 			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pll6 1&gt;;</div><div class='del'>-			clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";</div><div class='add'>+			clock-output-names = "usb_ohci0", "usb_ohci1",</div><div class='add'>+					     "usb_phy";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spi3_clk: clk@01c200d4 {</div><div class='hunk'>@@ -465,10 +469,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * The following two are dummy clocks, placeholders used in the gmac_tx</div><div class='del'>-		 * clock. The gmac driver will choose one parent depending on the PHY</div><div class='del'>-		 * interface mode, using clk_set_rate auto-reparenting.</div><div class='del'>-		 * The actual TX clock rate is not controlled by the gmac_tx clock.</div><div class='add'>+		 * The following two are dummy clocks, placeholders</div><div class='add'>+		 * used in the gmac_tx clock. The gmac driver will</div><div class='add'>+		 * choose one parent depending on the PHY interface</div><div class='add'>+		 * mode, using clk_set_rate auto-reparenting.</div><div class='add'>+		 *</div><div class='add'>+		 * The actual TX clock rate is not controlled by the</div><div class='add'>+		 * gmac_tx clock.</div><div class='ctx'> 		 */</div><div class='ctx'> 		mii_phy_tx_clk: clk@2 {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -527,6 +534,42 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		sram-controller@01c00000 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-sram-controller";</div><div class='add'>+			reg = &lt;0x01c00000 0x30&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			sram_a: sram@00000000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00000000 0xc000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00000000 0xc000&gt;;</div><div class='add'>+</div><div class='add'>+				emac_sram: sram-section@8000 {</div><div class='add'>+					compatible = "allwinner,sun4i-a10-sram-a3-a4";</div><div class='add'>+					reg = &lt;0x8000 0x4000&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sram_d: sram@00010000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00010000 0x1000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00010000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				otg_sram: sram-section@0000 {</div><div class='add'>+					compatible = "allwinner,sun4i-a10-sram-d";</div><div class='add'>+					reg = &lt;0x0000 0x1000&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		nmi_intc: interrupt-controller@01c00030 {</div><div class='ctx'> 			compatible = "allwinner,sun7i-a20-sc-nmi";</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -576,6 +619,7 @@</div><div class='ctx'> 			reg = &lt;0x01c0b000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahb_gates 17&gt;;</div><div class='add'>+			allwinner,sram = &lt;&amp;emac_sram 1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -600,6 +644,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc1: mmc@01c10000 {</div><div class='hunk'>@@ -615,6 +661,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc2: mmc@01c11000 {</div><div class='hunk'>@@ -630,6 +678,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc3: mmc@01c12000 {</div><div class='hunk'>@@ -645,6 +695,8 @@</div><div class='ctx'> 				      "sample";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usbphy: phy@01c13400 {</div><div class='hunk'>@@ -795,6 +847,13 @@</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart4_pins_b: uart4@1 {</div><div class='add'>+				allwinner,pins = "PH4", "PH5";</div><div class='add'>+				allwinner,function = "uart4";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart5_pins_a: uart5@0 {</div><div class='ctx'> 				allwinner,pins = "PI10", "PI11";</div><div class='ctx'> 				allwinner,function = "uart5";</div><div class='hunk'>@@ -896,35 +955,71 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0_pins_a: spi0@0 {</div><div class='del'>-				allwinner,pins = "PI10", "PI11", "PI12", "PI13", "PI14";</div><div class='add'>+				allwinner,pins = "PI11", "PI12", "PI13";</div><div class='add'>+				allwinner,function = "spi0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0_cs0_pins_a: spi0_cs0@0 {</div><div class='add'>+				allwinner,pins = "PI10";</div><div class='add'>+				allwinner,function = "spi0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0_cs1_pins_a: spi0_cs1@0 {</div><div class='add'>+				allwinner,pins = "PI14";</div><div class='ctx'> 				allwinner,function = "spi0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi1_pins_a: spi1@0 {</div><div class='del'>-				allwinner,pins = "PI16", "PI17", "PI18", "PI19";</div><div class='add'>+				allwinner,pins = "PI17", "PI18", "PI19";</div><div class='add'>+				allwinner,function = "spi1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_cs0_pins_a: spi1_cs0@0 {</div><div class='add'>+				allwinner,pins = "PI16";</div><div class='ctx'> 				allwinner,function = "spi1";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi2_pins_a: spi2@0 {</div><div class='del'>-				allwinner,pins = "PC19", "PC20", "PC21", "PC22";</div><div class='add'>+				allwinner,pins = "PC20", "PC21", "PC22";</div><div class='ctx'> 				allwinner,function = "spi2";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi2_pins_b: spi2@1 {</div><div class='del'>-				allwinner,pins = "PB14", "PB15", "PB16", "PB17";</div><div class='add'>+				allwinner,pins = "PB15", "PB16", "PB17";</div><div class='add'>+				allwinner,function = "spi2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_cs0_pins_a: spi2_cs0@0 {</div><div class='add'>+				allwinner,pins = "PC19";</div><div class='add'>+				allwinner,function = "spi2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_cs0_pins_b: spi2_cs0@1 {</div><div class='add'>+				allwinner,pins = "PB14";</div><div class='ctx'> 				allwinner,function = "spi2";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='add'>+				allwinner,pins = "PF0", "PF1", "PF2",</div><div class='add'>+						 "PF3", "PF4", "PF5";</div><div class='ctx'> 				allwinner,function = "mmc0";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='hunk'>@@ -938,28 +1033,44 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mmc2_pins_a: mmc2@0 {</div><div class='del'>-				allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11";</div><div class='add'>+				allwinner,pins = "PC6", "PC7", "PC8",</div><div class='add'>+						 "PC9", "PC10", "PC11";</div><div class='ctx'> 				allwinner,function = "mmc2";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mmc3_pins_a: mmc3@0 {</div><div class='del'>-				allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";</div><div class='add'>+				allwinner,pins = "PI4", "PI5", "PI6",</div><div class='add'>+						 "PI7", "PI8", "PI9";</div><div class='ctx'> 				allwinner,function = "mmc3";</div><div class='ctx'> 				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='ctx'> 				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ir0_pins_a: ir0@0 {</div><div class='del'>-				    allwinner,pins = "PB3","PB4";</div><div class='add'>+			ir0_rx_pins_a: ir0@0 {</div><div class='add'>+				    allwinner,pins = "PB4";</div><div class='ctx'> 				    allwinner,function = "ir0";</div><div class='ctx'> 				    allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				    allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ir1_pins_a: ir1@0 {</div><div class='del'>-				    allwinner,pins = "PB22","PB23";</div><div class='add'>+			ir0_tx_pins_a: ir0@1 {</div><div class='add'>+				    allwinner,pins = "PB3";</div><div class='add'>+				    allwinner,function = "ir0";</div><div class='add'>+				    allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				    allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ir1_rx_pins_a: ir1@0 {</div><div class='add'>+				    allwinner,pins = "PB23";</div><div class='add'>+				    allwinner,function = "ir1";</div><div class='add'>+				    allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				    allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ir1_tx_pins_a: ir1@1 {</div><div class='add'>+				    allwinner,pins = "PB22";</div><div class='ctx'> 				    allwinner,function = "ir1";</div><div class='ctx'> 				    allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 				    allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='hunk'>@@ -1042,7 +1153,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rtp: rtp@01c25000 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-ts";</div><div class='add'>+			compatible = "allwinner,sun5i-a13-ts";</div><div class='ctx'> 			reg = &lt;0x01c25000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#thermal-sensor-cells = &lt;0&gt;;</div><div class='hunk'>@@ -1129,7 +1240,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c0: i2c@01c2ac00 {</div><div class='del'>-			compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";</div><div class='add'>+			compatible = "allwinner,sun7i-a20-i2c",</div><div class='add'>+				     "allwinner,sun4i-a10-i2c";</div><div class='ctx'> 			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 0&gt;;</div><div class='hunk'>@@ -1139,7 +1251,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c1: i2c@01c2b000 {</div><div class='del'>-			compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";</div><div class='add'>+			compatible = "allwinner,sun7i-a20-i2c",</div><div class='add'>+				     "allwinner,sun4i-a10-i2c";</div><div class='ctx'> 			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 1&gt;;</div><div class='hunk'>@@ -1149,7 +1262,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c2: i2c@01c2b400 {</div><div class='del'>-			compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";</div><div class='add'>+			compatible = "allwinner,sun7i-a20-i2c",</div><div class='add'>+				     "allwinner,sun4i-a10-i2c";</div><div class='ctx'> 			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 2&gt;;</div><div class='hunk'>@@ -1159,7 +1273,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c3: i2c@01c2b800 {</div><div class='del'>-			compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";</div><div class='add'>+			compatible = "allwinner,sun7i-a20-i2c",</div><div class='add'>+				     "allwinner,sun4i-a10-i2c";</div><div class='ctx'> 			reg = &lt;0x01c2b800 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 3&gt;;</div><div class='hunk'>@@ -1169,7 +1284,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c4: i2c@01c2c000 {</div><div class='del'>-			compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";</div><div class='add'>+			compatible = "allwinner,sun7i-a20-i2c",</div><div class='add'>+				     "allwinner,sun4i-a10-i2c";</div><div class='ctx'> 			reg = &lt;0x01c2c000 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apb1_gates 15&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi<br/>new file mode 100644<br/>index 000000000000..7abd0ae3143d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-a33.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-a33.dtsi</a></div><div class='hunk'>@@ -0,0 +1,636 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Chen-Yu Tsai</div><div class='add'>+ *</div><div class='add'>+ * Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@0 {</div><div class='add'>+			compatible = "allwinner,simple-framebuffer",</div><div class='add'>+				     "simple-framebuffer";</div><div class='add'>+			allwinner,pipeline = "de_be0-lcd0";</div><div class='add'>+			clocks = &lt;&amp;pll6 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv7-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		arm,cpu-registers-not-fw-configured;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		enable-method = "allwinner,sun8i-a23";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		osc24M: osc24M_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+			clock-output-names = "osc24M";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		osc32k: osc32k_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-output-names = "osc32k";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll1: clk@01c20000 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-pll1-clk";</div><div class='add'>+			reg = &lt;0x01c20000 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* dummy clock until actually implemented */</div><div class='add'>+		pll5: pll5_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pll5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll6: clk@01c20028 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun6i-a31-pll6-clk";</div><div class='add'>+			reg = &lt;0x01c20028 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "pll6", "pll6x2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu: cpu_clk@01c20050 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-cpu-clk";</div><div class='add'>+			reg = &lt;0x01c20050 0x4&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * PLL1 is listed twice here.</div><div class='add'>+			 * While it looks suspicious, it's actually documented</div><div class='add'>+			 * that way both in the datasheet and in the code from</div><div class='add'>+			 * Allwinner.</div><div class='add'>+			 */</div><div class='add'>+			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll1&gt;, &lt;&amp;pll1&gt;;</div><div class='add'>+			clock-output-names = "cpu";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		axi: axi_clk@01c20050 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-axi-clk";</div><div class='add'>+			reg = &lt;0x01c20050 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpu&gt;;</div><div class='add'>+			clock-output-names = "axi";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahb1: ahb1_clk@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun6i-a31-ahb1-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;axi&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+			clock-output-names = "ahb1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb1: apb1_clk@01c20054 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-apb0-clk";</div><div class='add'>+			reg = &lt;0x01c20054 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1&gt;;</div><div class='add'>+			clock-output-names = "apb1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahb1_gates: clk@01c20060 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-ahb1-gates-clk";</div><div class='add'>+			reg = &lt;0x01c20060 0x8&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1&gt;;</div><div class='add'>+			clock-output-names = "ahb1_mipidsi", "ahb1_dma",</div><div class='add'>+					"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",</div><div class='add'>+					"ahb1_nand", "ahb1_sdram",</div><div class='add'>+					"ahb1_hstimer", "ahb1_spi0",</div><div class='add'>+					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",</div><div class='add'>+					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",</div><div class='add'>+					"ahb1_csi", "ahb1_be",	"ahb1_fe",</div><div class='add'>+					"ahb1_gpu", "ahb1_spinlock",</div><div class='add'>+					"ahb1_drc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb1_gates: clk@01c20068 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-apb1-gates-clk";</div><div class='add'>+			reg = &lt;0x01c20068 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb1&gt;;</div><div class='add'>+			clock-output-names = "apb1_codec", "apb1_pio",</div><div class='add'>+					"apb1_daudio0",	"apb1_daudio1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb2: clk@01c20058 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-apb1-clk";</div><div class='add'>+			reg = &lt;0x01c20058 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+			clock-output-names = "apb2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb2_gates: clk@01c2006c {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-apb2-gates-clk";</div><div class='add'>+			reg = &lt;0x01c2006c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2&gt;;</div><div class='add'>+			clock-output-names = "apb2_i2c0", "apb2_i2c1",</div><div class='add'>+					"apb2_i2c2", "apb2_uart0",</div><div class='add'>+					"apb2_uart1", "apb2_uart2",</div><div class='add'>+					"apb2_uart3", "apb2_uart4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0_clk: clk@01c20088 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c20088 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+			clock-output-names = "mmc0",</div><div class='add'>+					     "mmc0_output",</div><div class='add'>+					     "mmc0_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1_clk: clk@01c2008c {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c2008c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+			clock-output-names = "mmc1",</div><div class='add'>+					     "mmc1_output",</div><div class='add'>+					     "mmc1_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2_clk: clk@01c20090 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='add'>+			reg = &lt;0x01c20090 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='add'>+			clock-output-names = "mmc2",</div><div class='add'>+					     "mmc2_output",</div><div class='add'>+					     "mmc2_sample";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_clk: clk@01c200cc {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-usb-clk";</div><div class='add'>+			reg = &lt;0x01c200cc 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic",</div><div class='add'>+					     "usb_hsic_12M", "usb_ohci0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@01c00000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		dma: dma-controller@01c02000 {</div><div class='add'>+			compatible = "allwinner,sun8i-a23-dma";</div><div class='add'>+			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 6&gt;;</div><div class='add'>+			resets = &lt;&amp;ahb1_rst 6&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@01c0f000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 8&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc0_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			resets = &lt;&amp;ahb1_rst 8&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@01c10000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c10000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 9&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc1_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			resets = &lt;&amp;ahb1_rst 9&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@01c11000 {</div><div class='add'>+			compatible = "allwinner,sun5i-a13-mmc";</div><div class='add'>+			reg = &lt;0x01c11000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 10&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 0&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 1&gt;,</div><div class='add'>+				 &lt;&amp;mmc2_clk 2&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "mmc",</div><div class='add'>+				      "output",</div><div class='add'>+				      "sample";</div><div class='add'>+			resets = &lt;&amp;ahb1_rst 10&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pio: pinctrl@01c20800 {</div><div class='add'>+			/* compatible gets set in SoC specific dtsi file */</div><div class='add'>+			reg = &lt;0x01c20800 0x400&gt;;</div><div class='add'>+			/* interrupts get set in SoC specific dtsi file */</div><div class='add'>+			clocks = &lt;&amp;apb1_gates 5&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			uart0_pins_a: uart0@0 {</div><div class='add'>+				allwinner,pins = "PF2", "PF4";</div><div class='add'>+				allwinner,function = "uart0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc0_pins_a: mmc0@0 {</div><div class='add'>+				allwinner,pins = "PF0", "PF1", "PF2",</div><div class='add'>+						 "PF3", "PF4", "PF5";</div><div class='add'>+				allwinner,function = "mmc0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc1_pins_a: mmc1@0 {</div><div class='add'>+				allwinner,pins = "PG0", "PG1", "PG2",</div><div class='add'>+						 "PG3", "PG4", "PG5";</div><div class='add'>+				allwinner,function = "mmc1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc2_8bit_pins: mmc2_8bit {</div><div class='add'>+				allwinner,pins = "PC5", "PC6", "PC8",</div><div class='add'>+						 "PC9", "PC10", "PC11",</div><div class='add'>+						 "PC12", "PC13", "PC14",</div><div class='add'>+						 "PC15";</div><div class='add'>+				allwinner,function = "mmc2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0_pins_a: i2c0@0 {</div><div class='add'>+				allwinner,pins = "PH2", "PH3";</div><div class='add'>+				allwinner,function = "i2c0";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins_a: i2c1@0 {</div><div class='add'>+				allwinner,pins = "PH4", "PH5";</div><div class='add'>+				allwinner,function = "i2c1";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins_a: i2c2@0 {</div><div class='add'>+				allwinner,pins = "PE12", "PE13";</div><div class='add'>+				allwinner,function = "i2c2";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahb1_rst: reset@01c202c0 {</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='add'>+			reg = &lt;0x01c202c0 0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb1_rst: reset@01c202d0 {</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='add'>+			reg = &lt;0x01c202d0 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb2_rst: reset@01c202d8 {</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='add'>+			reg = &lt;0x01c202d8 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@01c20c00 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-timer";</div><div class='add'>+			reg = &lt;0x01c20c00 0xa0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt0: watchdog@01c20ca0 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-wdt";</div><div class='add'>+			reg = &lt;0x01c20ca0 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lradc: lradc@01c22800 {</div><div class='add'>+			compatible = "allwinner,sun4i-a10-lradc-keys";</div><div class='add'>+			reg = &lt;0x01c22800 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@01c28000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 16&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 16&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 6&gt;, &lt;&amp;dma 6&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@01c28400 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 17&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 17&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 7&gt;, &lt;&amp;dma 7&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@01c28800 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 18&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 18&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 8&gt;, &lt;&amp;dma 8&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@01c28c00 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c28c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 19&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 19&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 9&gt;, &lt;&amp;dma 9&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@01c29000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01c29000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 20&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 20&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 10&gt;, &lt;&amp;dma 10&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@01c2ac00 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 0&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@01c2b000 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 1&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@01c2b400 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb2_gates 2&gt;;</div><div class='add'>+			resets = &lt;&amp;apb2_rst 2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@01c81000 {</div><div class='add'>+			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";</div><div class='add'>+			reg = &lt;0x01c81000 0x1000&gt;,</div><div class='add'>+			      &lt;0x01c82000 0x1000&gt;,</div><div class='add'>+			      &lt;0x01c84000 0x2000&gt;,</div><div class='add'>+			      &lt;0x01c86000 0x2000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@01f00000 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-rtc";</div><div class='add'>+			reg = &lt;0x01f00000 0x54&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		prcm@01f01400 {</div><div class='add'>+			compatible = "allwinner,sun8i-a23-prcm";</div><div class='add'>+			reg = &lt;0x01f01400 0x200&gt;;</div><div class='add'>+</div><div class='add'>+			ar100: ar100_clk {</div><div class='add'>+				compatible = "fixed-factor-clock";</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				clock-div = &lt;1&gt;;</div><div class='add'>+				clock-mult = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc24M&gt;;</div><div class='add'>+				clock-output-names = "ar100";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ahb0: ahb0_clk {</div><div class='add'>+				compatible = "fixed-factor-clock";</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				clock-div = &lt;1&gt;;</div><div class='add'>+				clock-mult = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;ar100&gt;;</div><div class='add'>+				clock-output-names = "ahb0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apb0: apb0_clk {</div><div class='add'>+				compatible = "allwinner,sun8i-a23-apb0-clk";</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;ahb0&gt;;</div><div class='add'>+				clock-output-names = "apb0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apb0_gates: apb0_gates_clk {</div><div class='add'>+				compatible = "allwinner,sun8i-a23-apb0-gates-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;apb0&gt;;</div><div class='add'>+				clock-output-names = "apb0_pio", "apb0_timer",</div><div class='add'>+						"apb0_rsb", "apb0_uart",</div><div class='add'>+						"apb0_i2c";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apb0_rst: apb0_rst {</div><div class='add'>+				compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='add'>+				#reset-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpucfg@01f01c00 {</div><div class='add'>+			compatible = "allwinner,sun8i-a23-cpuconfig";</div><div class='add'>+			reg = &lt;0x01f01c00 0x300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_uart: serial@01f02800 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x01f02800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb0_gates 4&gt;;</div><div class='add'>+			resets = &lt;&amp;apb0_rst 4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_pio: pinctrl@01f02c00 {</div><div class='add'>+			compatible = "allwinner,sun8i-a23-r-pinctrl";</div><div class='add'>+			reg = &lt;0x01f02c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;apb0_gates 0&gt;;</div><div class='add'>+			resets = &lt;&amp;apb0_rst 0&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			r_uart_pins_a: r_uart@0 {</div><div class='add'>+				allwinner,pins = "PL2", "PL3";</div><div class='add'>+				allwinner,function = "s_uart";</div><div class='add'>+				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a23-evb.dts b/arch/arm/boot/dts/sun8i-a23-evb.dts<br/>new file mode 100644<br/>index 000000000000..610786e635fa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-evb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Maxime Ripard</div><div class='add'>+ *</div><div class='add'>+ * Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-a23.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Allwinner A23 Evaluation Board";</div><div class='add'>+	compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		serial0 = &amp;r_uart;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@190 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;190000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@390 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;390000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@600 {</div><div class='add'>+		label = "Home";</div><div class='add'>+		linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;600000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_evb&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_evb: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PB4";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The RX line has a non-populated resistance. In order to use it, you</div><div class='add'>+ * need to solder R207 on the back of the board in order to close the</div><div class='add'>+ * line and get a working UART.</div><div class='add'>+ */</div><div class='add'>+&amp;r_uart {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;r_uart_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts<br/>index dd31c53e2ab6..382d64c3b78e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts</a></div><div class='hunk'>@@ -16,11 +16,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts<br/>index 623573e46080..95134c69cfc1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -64,71 +59,69 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_q8h&gt;;</div><div class='del'>-			vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='del'>-			cd-inverted;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl@01c20800 {</div><div class='del'>-			mmc0_cd_pin_q8h: mmc0_cd_pin@0 {</div><div class='del'>-				allwinner,pins = "PB4";</div><div class='del'>-				allwinner,function = "gpio_in";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			button@200 {</div><div class='del'>-				label = "Volume Up";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;200000&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	/* pull-ups and devices require PMIC regulator */</div><div class='add'>+	status = "failed";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			button@400 {</div><div class='del'>-				label = "Volume Down";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-				channel = &lt;0&gt;;</div><div class='del'>-				voltage = &lt;400000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@200 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;200000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+	button@400 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;400000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='del'>-			/* pull-ups and devices require PMIC regulator */</div><div class='del'>-			status = "failed";</div><div class='del'>-		};</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_q8h&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		r_uart: serial@01f02800 {</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;r_uart_pins_a&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_q8h: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PB4";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;r_uart {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;r_uart_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi<br/>index 382ebd137ee4..8698f7aa31c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun8i-a23.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a23.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a23.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -47,206 +42,14 @@</div><div class='ctx'>  *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "skeleton.dtsi"</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+#include "sun8i-a23-a33.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		framebuffer@0 {</div><div class='del'>-			compatible = "allwinner,simple-framebuffer",</div><div class='del'>-				     "simple-framebuffer";</div><div class='del'>-			allwinner,pipeline = "de_be0-lcd0";</div><div class='del'>-			clocks = &lt;&amp;pll6 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu@0 {</div><div class='del'>-			compatible = "arm,cortex-a7";</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpu@1 {</div><div class='del'>-			compatible = "arm,cortex-a7";</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x40000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		osc24M: osc24M_clk {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			clock-output-names = "osc24M";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		osc32k: osc32k_clk {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-			clock-output-names = "osc32k";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll1: clk@01c20000 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun8i-a23-pll1-clk";</div><div class='del'>-			reg = &lt;0x01c20000 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* dummy clock until actually implemented */</div><div class='del'>-		pll5: pll5_clk {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;0&gt;;</div><div class='del'>-			clock-output-names = "pll5";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pll6: clk@01c20028 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun6i-a31-pll6-clk";</div><div class='del'>-			reg = &lt;0x01c20028 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-			clock-output-names = "pll6", "pll6x2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpu: cpu_clk@01c20050 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-cpu-clk";</div><div class='del'>-			reg = &lt;0x01c20050 0x4&gt;;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * PLL1 is listed twice here.</div><div class='del'>-			 * While it looks suspicious, it's actually documented</div><div class='del'>-			 * that way both in the datasheet and in the code from</div><div class='del'>-			 * Allwinner.</div><div class='del'>-			 */</div><div class='del'>-			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll1&gt;, &lt;&amp;pll1&gt;;</div><div class='del'>-			clock-output-names = "cpu";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		axi: axi_clk@01c20050 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun8i-a23-axi-clk";</div><div class='del'>-			reg = &lt;0x01c20050 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpu&gt;;</div><div class='del'>-			clock-output-names = "axi";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahb1: ahb1_clk@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun6i-a31-ahb1-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;axi&gt;, &lt;&amp;pll6 0&gt;;</div><div class='del'>-			clock-output-names = "ahb1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb1: apb1_clk@01c20054 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb0-clk";</div><div class='del'>-			reg = &lt;0x01c20054 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1&gt;;</div><div class='del'>-			clock-output-names = "apb1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahb1_gates: clk@01c20060 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun8i-a23-ahb1-gates-clk";</div><div class='del'>-			reg = &lt;0x01c20060 0x8&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1&gt;;</div><div class='del'>-			clock-output-names = "ahb1_mipidsi", "ahb1_dma",</div><div class='del'>-					"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",</div><div class='del'>-					"ahb1_nand", "ahb1_sdram",</div><div class='del'>-					"ahb1_hstimer", "ahb1_spi0",</div><div class='del'>-					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",</div><div class='del'>-					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",</div><div class='del'>-					"ahb1_csi", "ahb1_be",	"ahb1_fe",</div><div class='del'>-					"ahb1_gpu", "ahb1_spinlock",</div><div class='del'>-					"ahb1_drc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb1_gates: clk@01c20068 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun8i-a23-apb1-gates-clk";</div><div class='del'>-			reg = &lt;0x01c20068 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1&gt;;</div><div class='del'>-			clock-output-names = "apb1_codec", "apb1_pio",</div><div class='del'>-					"apb1_daudio0",	"apb1_daudio1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb2: clk@01c20058 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-apb1-clk";</div><div class='del'>-			reg = &lt;0x01c20058 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc32k&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;, &lt;&amp;pll6 0&gt;;</div><div class='del'>-			clock-output-names = "apb2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb2_gates: clk@01c2006c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun8i-a23-apb2-gates-clk";</div><div class='del'>-			reg = &lt;0x01c2006c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2&gt;;</div><div class='del'>-			clock-output-names = "apb2_i2c0", "apb2_i2c1",</div><div class='del'>-					"apb2_i2c2", "apb2_uart0",</div><div class='del'>-					"apb2_uart1", "apb2_uart2",</div><div class='del'>-					"apb2_uart3", "apb2_uart4";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0_clk: clk@01c20088 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20088 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='del'>-			clock-output-names = "mmc0",</div><div class='del'>-					     "mmc0_output",</div><div class='del'>-					     "mmc0_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1_clk: clk@01c2008c {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c2008c 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='del'>-			clock-output-names = "mmc1",</div><div class='del'>-					     "mmc1_output",</div><div class='del'>-					     "mmc1_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2_clk: clk@01c20090 {</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun4i-a10-mmc-clk";</div><div class='del'>-			reg = &lt;0x01c20090 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 0&gt;;</div><div class='del'>-			clock-output-names = "mmc2",</div><div class='del'>-					     "mmc2_output",</div><div class='del'>-					     "mmc2_sample";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		mbus_clk: clk@01c2015c {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun8i-a23-mbus-clk";</div><div class='hunk'>@@ -255,357 +58,11 @@</div><div class='ctx'> 			clock-output-names = "mbus";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@01c00000 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		dma: dma-controller@01c02000 {</div><div class='del'>-			compatible = "allwinner,sun8i-a23-dma";</div><div class='del'>-			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1_gates 6&gt;;</div><div class='del'>-			resets = &lt;&amp;ahb1_rst 6&gt;;</div><div class='del'>-			#dma-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: mmc@01c0f000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1_gates 8&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc0_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			resets = &lt;&amp;ahb1_rst 8&gt;;</div><div class='del'>-			reset-names = "ahb";</div><div class='del'>-			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1: mmc@01c10000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c10000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1_gates 9&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc1_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			resets = &lt;&amp;ahb1_rst 9&gt;;</div><div class='del'>-			reset-names = "ahb";</div><div class='del'>-			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc2: mmc@01c11000 {</div><div class='del'>-			compatible = "allwinner,sun5i-a13-mmc";</div><div class='del'>-			reg = &lt;0x01c11000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ahb1_gates 10&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 0&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 1&gt;,</div><div class='del'>-				 &lt;&amp;mmc2_clk 2&gt;;</div><div class='del'>-			clock-names = "ahb",</div><div class='del'>-				      "mmc",</div><div class='del'>-				      "output",</div><div class='del'>-				      "sample";</div><div class='del'>-			resets = &lt;&amp;ahb1_rst 10&gt;;</div><div class='del'>-			reset-names = "ahb";</div><div class='del'>-			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@01c20800 {</div><div class='del'>-			compatible = "allwinner,sun8i-a23-pinctrl";</div><div class='del'>-			reg = &lt;0x01c20800 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb1_gates 5&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#gpio-cells = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			uart0_pins_a: uart0@0 {</div><div class='del'>-				allwinner,pins = "PF2", "PF4";</div><div class='del'>-				allwinner,function = "uart0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc0_pins_a: mmc0@0 {</div><div class='del'>-				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";</div><div class='del'>-				allwinner,function = "mmc0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mmc1_pins_a: mmc1@0 {</div><div class='del'>-				allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5";</div><div class='del'>-				allwinner,function = "mmc1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_30_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c0_pins_a: i2c0@0 {</div><div class='del'>-				allwinner,pins = "PH2", "PH3";</div><div class='del'>-				allwinner,function = "i2c0";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c1_pins_a: i2c1@0 {</div><div class='del'>-				allwinner,pins = "PH4", "PH5";</div><div class='del'>-				allwinner,function = "i2c1";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2c2_pins_a: i2c2@0 {</div><div class='del'>-				allwinner,pins = "PE12", "PE13";</div><div class='del'>-				allwinner,function = "i2c2";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ahb1_rst: reset@01c202c0 {</div><div class='del'>-			#reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='del'>-			reg = &lt;0x01c202c0 0xc&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb1_rst: reset@01c202d0 {</div><div class='del'>-			#reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='del'>-			reg = &lt;0x01c202d0 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apb2_rst: reset@01c202d8 {</div><div class='del'>-			#reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='del'>-			reg = &lt;0x01c202d8 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timer@01c20c00 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-timer";</div><div class='del'>-			reg = &lt;0x01c20c00 0xa0&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wdt0: watchdog@01c20ca0 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-wdt";</div><div class='del'>-			reg = &lt;0x01c20ca0 0x20&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lradc: lradc@01c22800 {</div><div class='del'>-			compatible = "allwinner,sun4i-a10-lradc-keys";</div><div class='del'>-			reg = &lt;0x01c22800 0x100&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart0: serial@01c28000 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 16&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 16&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 6&gt;, &lt;&amp;dma 6&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart1: serial@01c28400 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 17&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 17&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 7&gt;, &lt;&amp;dma 7&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart2: serial@01c28800 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28800 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 18&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 18&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 8&gt;, &lt;&amp;dma 8&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart3: serial@01c28c00 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c28c00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 19&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 19&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 9&gt;, &lt;&amp;dma 9&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart4: serial@01c29000 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01c29000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 20&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 20&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 10&gt;, &lt;&amp;dma 10&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c0: i2c@01c2ac00 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-i2c";</div><div class='del'>-			reg = &lt;0x01c2ac00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 0&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@01c2b000 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-i2c";</div><div class='del'>-			reg = &lt;0x01c2b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 1&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@01c2b400 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-i2c";</div><div class='del'>-			reg = &lt;0x01c2b400 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb2_gates 2&gt;;</div><div class='del'>-			resets = &lt;&amp;apb2_rst 2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gic: interrupt-controller@01c81000 {</div><div class='del'>-			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";</div><div class='del'>-			reg = &lt;0x01c81000 0x1000&gt;,</div><div class='del'>-			      &lt;0x01c82000 0x1000&gt;,</div><div class='del'>-			      &lt;0x01c84000 0x2000&gt;,</div><div class='del'>-			      &lt;0x01c86000 0x2000&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;3&gt;;</div><div class='del'>-			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtc: rtc@01f00000 {</div><div class='del'>-			compatible = "allwinner,sun6i-a31-rtc";</div><div class='del'>-			reg = &lt;0x01f00000 0x54&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		prcm@01f01400 {</div><div class='del'>-			compatible = "allwinner,sun8i-a23-prcm";</div><div class='del'>-			reg = &lt;0x01f01400 0x200&gt;;</div><div class='del'>-</div><div class='del'>-			ar100: ar100_clk {</div><div class='del'>-				compatible = "fixed-factor-clock";</div><div class='del'>-				#clock-cells = &lt;0&gt;;</div><div class='del'>-				clock-div = &lt;1&gt;;</div><div class='del'>-				clock-mult = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;osc24M&gt;;</div><div class='del'>-				clock-output-names = "ar100";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ahb0: ahb0_clk {</div><div class='del'>-				compatible = "fixed-factor-clock";</div><div class='del'>-				#clock-cells = &lt;0&gt;;</div><div class='del'>-				clock-div = &lt;1&gt;;</div><div class='del'>-				clock-mult = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;ar100&gt;;</div><div class='del'>-				clock-output-names = "ahb0";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			apb0: apb0_clk {</div><div class='del'>-				compatible = "allwinner,sun8i-a23-apb0-clk";</div><div class='del'>-				#clock-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;ahb0&gt;;</div><div class='del'>-				clock-output-names = "apb0";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			apb0_gates: apb0_gates_clk {</div><div class='del'>-				compatible = "allwinner,sun8i-a23-apb0-gates-clk";</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;apb0&gt;;</div><div class='del'>-				clock-output-names = "apb0_pio", "apb0_timer",</div><div class='del'>-						"apb0_rsb", "apb0_uart",</div><div class='del'>-						"apb0_i2c";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			apb0_rst: apb0_rst {</div><div class='del'>-				compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='del'>-				#reset-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		r_uart: serial@01f02800 {</div><div class='del'>-			compatible = "snps,dw-apb-uart";</div><div class='del'>-			reg = &lt;0x01f02800 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb0_gates 4&gt;;</div><div class='del'>-			resets = &lt;&amp;apb0_rst 4&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		r_pio: pinctrl@01f02c00 {</div><div class='del'>-			compatible = "allwinner,sun8i-a23-r-pinctrl";</div><div class='del'>-			reg = &lt;0x01f02c00 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;apb0_gates 0&gt;;</div><div class='del'>-			resets = &lt;&amp;apb0_rst 0&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#gpio-cells = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			r_uart_pins_a: r_uart@0 {</div><div class='del'>-				allwinner,pins = "PL2", "PL3";</div><div class='del'>-				allwinner,function = "s_uart";</div><div class='del'>-				allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='del'>-				allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;pio {</div><div class='add'>+	compatible = "allwinner,sun8i-a23-pinctrl";</div><div class='add'>+	interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts<br/>new file mode 100644<br/>index 000000000000..19db844863bb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Vishnu Patekar</div><div class='add'>+ * Vishnu Patekar &lt;vishnupatekar0510@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-a33.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ET Q8 Quad Core Tablet (v1.6)";</div><div class='add'>+	compatible = "et,q8-v1.6", "allwinner,sun8i-a33";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@200 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@400 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;400000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts<br/>new file mode 100644<br/>index 000000000000..866703355b9c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-a33.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Allwinner GA10H Quad Core Tablet (v1.1)";</div><div class='add'>+	compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;r_uart;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@200 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@400 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@600 {</div><div class='add'>+		label = "Back";</div><div class='add'>+		linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;600000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_q8h&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_q8h: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PB4";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_uart {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;r_uart_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts<br/>new file mode 100644<br/>index 000000000000..5788c29cb56a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Chen-Yu Tsai</div><div class='add'>+ *</div><div class='add'>+ * Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-a33.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sinlinx SinA33";</div><div class='add'>+	compatible = "sinlinx,sina33", "allwinner,sun8i-a33";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button@200 {</div><div class='add'>+		label = "Volume Up";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;191011&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@400 {</div><div class='add'>+		label = "Volume Down";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;391304&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button@600 {</div><div class='add'>+		label = "Home";</div><div class='add'>+		linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;600000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_a&gt;, &lt;&amp;mmc0_cd_pin_sina33&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_8bit_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2_8bit_pins {</div><div class='add'>+	/* eMMC is missing pull-ups */</div><div class='add'>+	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_sina33: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PB4";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi<br/>new file mode 100644<br/>index 000000000000..85ee08098b7b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun8i-a33.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun8i-a33.dtsi</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Chen-Yu Tsai</div><div class='add'>+ *</div><div class='add'>+ * Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sun8i-a23-a33.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@2 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@3 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		/* Dummy clock for pll11 (DDR1) until actually implemented */</div><div class='add'>+		pll11: pll11_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pll11";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbus_clk: clk@01c2015c {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun8i-a23-mbus-clk";</div><div class='add'>+			reg = &lt;0x01c2015c 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;pll6 1&gt;, &lt;&amp;pll5&gt;, &lt;&amp;pll11&gt;;</div><div class='add'>+			clock-output-names = "mbus";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	compatible = "allwinner,sun8i-a33-pinctrl";</div><div class='add'>+	interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	uart0_pins_b: uart0@1 {</div><div class='add'>+		allwinner,pins = "PB0", "PB1";</div><div class='add'>+		allwinner,function = "uart0";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts<br/>new file mode 100644<br/>index 000000000000..6484dcf69873<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80-cubieboard4.dts</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015 Tyler Baker</div><div class='add'>+ *</div><div class='add'>+ * Tyler Baker &lt;tyler.baker@linaro.org&gt;</div><div class='add'>+ * Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun9i-a80.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/sun4i-a10.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Cubietech Cubieboard4";</div><div class='add'>+	compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {</div><div class='add'>+		allwinner,pins = "PH18";</div><div class='add'>+		allwinner,function = "gpio_in";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins&gt;, &lt;&amp;mmc0_cd_pin_cubieboard4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 7 18 GPIO_ACTIVE_HIGH&gt;; /* PH18 */</div><div class='add'>+	cd-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_8bit_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v0&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts<br/>index a3fed2bdf620..6ce4b5e8b615 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun9i-a80-optimus.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun9i-a80-optimus.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun9i-a80-optimus.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80-optimus.dts</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -64,7 +59,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "earlyprintk console=ttyS0,115200";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -86,6 +81,29 @@</div><div class='ctx'> 			gpios = &lt;&amp;pio 7 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usb3_vbus: usb3-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb3_vbus_pin_optimus&gt;;</div><div class='add'>+		regulator-name = "usb3-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 7 5 GPIO_ACTIVE_HIGH&gt;; /* PH5 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci2 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c3 {</div><div class='hunk'>@@ -99,6 +117,14 @@</div><div class='ctx'> 	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pio {</div><div class='ctx'> 	led_pins_optimus: led-pins@0 {</div><div class='ctx'> 		allwinner,pins = "PH0", "PH1";</div><div class='hunk'>@@ -113,6 +139,20 @@</div><div class='ctx'> 		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='ctx'> 		allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_pin_optimus: usb1_vbus_pin@1 {</div><div class='add'>+		allwinner,pins = "PH4";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb3_vbus_pin_optimus: usb3_vbus_pin@1 {</div><div class='add'>+		allwinner,pins = "PH5";</div><div class='add'>+		allwinner,function = "gpio_out";</div><div class='add'>+		allwinner,drive = &lt;SUN4I_PINCTRL_10_MA&gt;;</div><div class='add'>+		allwinner,pull = &lt;SUN4I_PINCTRL_NO_PULL&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='hunk'>@@ -134,6 +174,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_vbus_pin_optimus&gt;;</div><div class='add'>+	gpio = &lt;&amp;pio 7 4 GPIO_ACTIVE_HIGH&gt;; /* PH4 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart0_pins_a&gt;;</div><div class='hunk'>@@ -150,3 +196,17 @@</div><div class='ctx'> 	/* Enable internal pull-up */</div><div class='ctx'> 	allwinner,pull = &lt;SUN4I_PINCTRL_PULL_UP&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	phy-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy3 {</div><div class='add'>+	phy-supply = &lt;&amp;reg_usb3_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi<br/>index f0f6fb91f8c3..a43ad779ee2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sun9i-a80.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sun9i-a80.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sun9i-a80.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sun9i-a80.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='hunk'>@@ -114,6 +109,16 @@</div><div class='ctx'> 		reg = &lt;0 0x20000000 0x02 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv7-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		arm,cpu-registers-not-fw-configured;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	clocks {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -137,6 +142,28 @@</div><div class='ctx'> 			clock-output-names = "osc32k";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_mod_clk: clk@00a08000 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun9i-a80-usb-mod-clk";</div><div class='add'>+			reg = &lt;0x00a08000 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 1&gt;;</div><div class='add'>+			clock-output-names = "usb0_ahb", "usb_ohci0",</div><div class='add'>+					     "usb1_ahb", "usb_ohci1",</div><div class='add'>+					     "usb2_ahb", "usb_ohci2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_phy_clk: clk@00a08004 {</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "allwinner,sun9i-a80-usb-phy-clk";</div><div class='add'>+			reg = &lt;0x00a08004 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ahb1_gates 1&gt;;</div><div class='add'>+			clock-output-names = "usb_phy0", "usb_hsic1_480M",</div><div class='add'>+					     "usb_phy1", "usb_hsic2_480M",</div><div class='add'>+					     "usb_phy2", "usb_hsic_12M";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pll4: clk@0600000c {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "allwinner,sun9i-a80-pll4-clk";</div><div class='hunk'>@@ -257,7 +284,7 @@</div><div class='ctx'> 					"ahb0_ss", "ahb0_sd", "ahb0_nand1",</div><div class='ctx'> 					"ahb0_nand0", "ahb0_sdram",</div><div class='ctx'> 					"ahb0_mipi_hsi", "ahb0_sata", "ahb0_ts",</div><div class='del'>-					"ahb0_spi0","ahb0_spi1", "ahb0_spi2",</div><div class='add'>+					"ahb0_spi0", "ahb0_spi1", "ahb0_spi2",</div><div class='ctx'> 					"ahb0_spi3";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -323,6 +350,98 @@</div><div class='ctx'> 		 */</div><div class='ctx'> 		ranges = &lt;0 0 0 0x20000000&gt;;</div><div class='ctx'> </div><div class='add'>+		ehci0: usb@00a00000 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x00a00000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_mod_clk 1&gt;;</div><div class='add'>+			resets = &lt;&amp;usb_mod_clk 17&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@00a00400 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x00a00400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_mod_clk 1&gt;, &lt;&amp;usb_mod_clk 2&gt;;</div><div class='add'>+			resets = &lt;&amp;usb_mod_clk 17&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy1: phy@00a00800 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-usb-phy";</div><div class='add'>+			reg = &lt;0x00a00800 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_phy_clk 1&gt;;</div><div class='add'>+			clock-names = "phy";</div><div class='add'>+			resets = &lt;&amp;usb_phy_clk 17&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci1: usb@00a01000 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x00a01000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_mod_clk 3&gt;;</div><div class='add'>+			resets = &lt;&amp;usb_mod_clk 18&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy2: phy@00a01800 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-usb-phy";</div><div class='add'>+			reg = &lt;0x00a01800 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_phy_clk 2&gt;, &lt;&amp;usb_phy_clk 10&gt;,</div><div class='add'>+				 &lt;&amp;usb_phy_clk 3&gt;;</div><div class='add'>+			clock-names = "hsic_480M", "hsic_12M", "phy";</div><div class='add'>+			resets = &lt;&amp;usb_phy_clk 18&gt;, &lt;&amp;usb_phy_clk 19&gt;;</div><div class='add'>+			reset-names = "hsic", "phy";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			/* usb1 is always used with HSIC */</div><div class='add'>+			phy_type = "hsic";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci2: usb@00a02000 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x00a02000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_mod_clk 5&gt;;</div><div class='add'>+			resets = &lt;&amp;usb_mod_clk 19&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci2: usb@00a02400 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x00a02400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_mod_clk 5&gt;, &lt;&amp;usb_mod_clk 6&gt;;</div><div class='add'>+			resets = &lt;&amp;usb_mod_clk 19&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy3: phy@00a02800 {</div><div class='add'>+			compatible = "allwinner,sun9i-a80-usb-phy";</div><div class='add'>+			reg = &lt;0x00a02800 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;usb_phy_clk 4&gt;, &lt;&amp;usb_phy_clk 10&gt;,</div><div class='add'>+				 &lt;&amp;usb_phy_clk 5&gt;;</div><div class='add'>+			clock-names = "hsic_480M", "hsic_12M", "phy";</div><div class='add'>+			resets = &lt;&amp;usb_phy_clk 20&gt;, &lt;&amp;usb_phy_clk 21&gt;;</div><div class='add'>+			reset-names = "hsic", "phy";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mmc0: mmc@01c0f000 {</div><div class='ctx'> 			compatible = "allwinner,sun5i-a13-mmc";</div><div class='ctx'> 			reg = &lt;0x01c0f000 0x1000&gt;;</div><div class='hunk'>@@ -333,6 +452,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc1: mmc@01c10000 {</div><div class='hunk'>@@ -345,6 +466,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc2: mmc@01c11000 {</div><div class='hunk'>@@ -357,6 +480,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc3: mmc@01c12000 {</div><div class='hunk'>@@ -369,6 +494,8 @@</div><div class='ctx'> 			reset-names = "ahb";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc_config_clk: clk@01c13000 {</div><div class='hunk'>@@ -438,6 +565,12 @@</div><div class='ctx'> 			clocks = &lt;&amp;osc24M&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		wdt: watchdog@06000ca0 {</div><div class='add'>+			compatible = "allwinner,sun6i-a31-wdt";</div><div class='add'>+			reg = &lt;0x06000ca0 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pio: pinctrl@06000800 {</div><div class='ctx'> 			compatible = "allwinner,sun9i-a80-pinctrl";</div><div class='ctx'> 			reg = &lt;0x06000800 0x400&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi<br/>index e02baa66b33c..51cc8383f70f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/sunxi-common-regulators.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/sunxi-common-regulators.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sunxi-common-regulators.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/sunxi-common-regulators.dtsi</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'>  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  *     GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='ctx'>  * Or, alternatively,</div><div class='ctx'>  *</div><div class='ctx'>  *  b) Permission is hereby granted, free of charge, to any person</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts<br/>index ed8a8acd3d34..bd43ed6d6ec7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124-jetson-tk1.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra124-jetson-tk1.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124-jetson-tk1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124-jetson-tk1.dts</a></div><div class='hunk'>@@ -1647,6 +1647,10 @@</div><div class='ctx'> 		target-12v-supply = &lt;&amp;vdd_12v0_sata&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hda@0,70030000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	padctl@0,7009f000 {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;padctl_default&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts<br/>index 5c3f7813360d..79e724bb7df7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124-venice2.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra124-venice2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124-venice2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124-venice2.dts</a></div><div class='hunk'>@@ -899,6 +899,7 @@</div><div class='ctx'> 	sdhci@0,700b0600 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		bus-width = &lt;8&gt;;</div><div class='add'>+		non-removable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahub@0,70300000 {</div><div class='hunk'>@@ -1040,6 +1041,8 @@</div><div class='ctx'> 			compatible = "regulator-fixed";</div><div class='ctx'> 			reg = &lt;5&gt;;</div><div class='ctx'> 			regulator-name = "+VDD_LED";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			gpio = &lt;&amp;gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			enable-active-high;</div><div class='ctx'> 			vin-supply = &lt;&amp;vdd_mux&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi<br/>index 13cc7ca5e031..01a9f742b08f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra124.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra124.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra124.dtsi</a></div><div class='hunk'>@@ -300,7 +300,7 @@</div><div class='ctx'> 	apbmisc@0,70000800 {</div><div class='ctx'> 		compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";</div><div class='ctx'> 		reg = &lt;0x0 0x70000800 0x0 0x64&gt;,   /* Chip revision */</div><div class='del'>-		      &lt;0x0 0x7000E864 0x0 0x04&gt;;   /* Strapping options */</div><div class='add'>+		      &lt;0x0 0x7000e864 0x0 0x04&gt;;   /* Strapping options */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinmux: pinmux@0,70000868 {</div><div class='hunk'>@@ -633,11 +633,11 @@</div><div class='ctx'> 		clocks = &lt;&amp;tegra_car TEGRA124_CLK_HDA&gt;,</div><div class='ctx'> 		         &lt;&amp;tegra_car TEGRA124_CLK_HDA2HDMI&gt;,</div><div class='ctx'> 			 &lt;&amp;tegra_car TEGRA124_CLK_HDA2CODEC_2X&gt;;</div><div class='del'>-		clock-names = "hda", "hda2hdmi", "hdacodec_2x";</div><div class='add'>+		clock-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='ctx'> 		resets = &lt;&amp;tegra_car 125&gt;, /* hda */</div><div class='ctx'> 			 &lt;&amp;tegra_car 128&gt;, /* hda2hdmi */</div><div class='ctx'> 			 &lt;&amp;tegra_car 111&gt;; /* hda2codec_2x */</div><div class='del'>-		reset-names = "hda", "hda2hdmi", "hdacodec_2x";</div><div class='add'>+		reset-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts<br/>index e2fed2712249..aea8994b35f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20-seaboard.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra20-seaboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20-seaboard.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra20-seaboard.dts</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> </div><div class='ctx'> 			vdd-supply = &lt;&amp;hdmi_vdd_reg&gt;;</div><div class='ctx'> 			pll-supply = &lt;&amp;hdmi_pll_reg&gt;;</div><div class='add'>+			hdmi-supply = &lt;&amp;vdd_hdmi&gt;;</div><div class='ctx'> </div><div class='ctx'> 			nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='ctx'> 			nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7)</div><div class='hunk'>@@ -893,6 +894,17 @@</div><div class='ctx'> 			gpio = &lt;&amp;gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			enable-active-high;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		vdd_hdmi: regulator@6 {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			regulator-name = "VDDIO_HDMI";</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+			gpio = &lt;&amp;gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			enable-active-high;</div><div class='add'>+			vin-supply = &lt;&amp;vdd_5v0_reg&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi<br/>index adf6b048d0bb..f444b67f55c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra20.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra20.dtsi</a></div><div class='hunk'>@@ -563,7 +563,7 @@</div><div class='ctx'> </div><div class='ctx'> 	fuse@7000f800 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-efuse";</div><div class='del'>-		reg = &lt;0x7000F800 0x400&gt;;</div><div class='add'>+		reg = &lt;0x7000f800 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;tegra_car TEGRA20_CLK_FUSE&gt;;</div><div class='ctx'> 		clock-names = "fuse";</div><div class='ctx'> 		resets = &lt;&amp;tegra_car 39&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi<br/>index a1b682ea01bd..bb1ca158273c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30-cardhu.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra30-cardhu.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30-cardhu.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra30-cardhu.dtsi</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include "tegra30.dtsi"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -12,7 +13,7 @@</div><div class='ctx'>  * tegra30-cardhu-a04.dts.</div><div class='ctx'>  * The identification of board is done in two ways, by looking the sticker</div><div class='ctx'>  * on PCB and by reading board id eeprom.</div><div class='del'>- * The stciker will have number like 600-81291-1000-002 C.3. In this 4th</div><div class='add'>+ * The sticker will have number like 600-81291-1000-002 C.3. In this 4th</div><div class='ctx'>  * number is the fab version like here it is 002 and hence fab version A02.</div><div class='ctx'>  * The (downstream internal) U-Boot of Cardhu display the board-id as</div><div class='ctx'>  * follows:</div><div class='hunk'>@@ -615,4 +616,31 @@</div><div class='ctx'> 			 &lt;&amp;tegra_car TEGRA30_CLK_EXTERN1&gt;;</div><div class='ctx'> 		clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			interrupt-parent = &lt;&amp;pmic&gt;;</div><div class='add'>+			interrupts = &lt;2 0&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			debounce-interval = &lt;100&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi<br/>index 60e205a0f63d..782b11b2af6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/tegra30.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/tegra30.dtsi</a></div><div class='hunk'>@@ -654,6 +654,21 @@</div><div class='ctx'> 		reset-names = "fuse";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hda@70030000 {</div><div class='add'>+		compatible = "nvidia,tegra30-hda";</div><div class='add'>+		reg = &lt;0x70030000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA30_CLK_HDA&gt;,</div><div class='add'>+		         &lt;&amp;tegra_car TEGRA30_CLK_HDA2HDMI&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA30_CLK_HDA2CODEC_2X&gt;;</div><div class='add'>+		clock-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='add'>+		resets = &lt;&amp;tegra_car 125&gt;, /* hda */</div><div class='add'>+			 &lt;&amp;tegra_car 128&gt;, /* hda2hdmi */</div><div class='add'>+			 &lt;&amp;tegra_car 111&gt;; /* hda2codec_2x */</div><div class='add'>+		reset-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ahub@70080000 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-ahub";</div><div class='ctx'> 		reg = &lt;0x70080000 0x200</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts<br/>new file mode 100644<br/>index 000000000000..200b0c99ed34<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-LD4 Reference Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "uniphier-ph1-ld4.dtsi"</div><div class='add'>+/include/ "uniphier-support-card.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "UniPhier PH1-LD4 Reference Board";</div><div class='add'>+	compatible = "socionext,ph1-ld4-ref", "socionext,ph1-ld4";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+		stdout-path = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extbus {</div><div class='add'>+	ranges = &lt;0 0x00000000 0x0f000000 0x01000000</div><div class='add'>+		  1 0x00000000 0x00000000 0x08000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;support_card {</div><div class='add'>+	ranges = &lt;0x00000000 1 0x03f00000 0x00100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serialsc {</div><div class='add'>+	interrupts = &lt;0 49 4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi<br/>new file mode 100644<br/>index 000000000000..6a34c56e4693<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-ld4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-LD4 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "socionext,ph1-ld4";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		arm_timer_clk: arm_timer_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+		extbus: extbus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-bus-controller-misc@59800000 {</div><div class='add'>+			compatible = "socionext,uniphier-system-bus-controller-misc",</div><div class='add'>+				     "syscon";</div><div class='add'>+			reg = &lt;0x59800000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000200 {</div><div class='add'>+			compatible = "arm,cortex-a9-global-timer";</div><div class='add'>+			reg = &lt;0x60000200 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 11 0x104&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000600 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+			reg = &lt;0x60000600 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 13 0x104&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@60001000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x60001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x60000100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts<br/>new file mode 100644<br/>index 000000000000..d891135a70c2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-Pro4 Reference Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "uniphier-ph1-pro4.dtsi"</div><div class='add'>+/include/ "uniphier-support-card.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "UniPhier PH1-Pro4 Reference Board";</div><div class='add'>+	compatible = "socionext,ph1-pro4-ref", "socionext,ph1-pro4";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+		stdout-path = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extbus {</div><div class='add'>+	ranges = &lt;0 0x00000000 0x0f000000 0x01000000</div><div class='add'>+		  1 0x00000000 0x00000000 0x08000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;support_card {</div><div class='add'>+	ranges = &lt;0x00000000 1 0x03f00000 0x00100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serialsc {</div><div class='add'>+	interrupts = &lt;0 50 4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi<br/>new file mode 100644<br/>index 000000000000..dc633603aed2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-pro4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-Pro4 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "socionext,ph1-pro4";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "socionext,uniphier-smp";</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		arm_timer_clk: arm_timer_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+		extbus: extbus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-bus-controller-misc@59800000 {</div><div class='add'>+			compatible = "socionext,uniphier-system-bus-controller-misc",</div><div class='add'>+				     "syscon";</div><div class='add'>+			reg = &lt;0x59800000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000200 {</div><div class='add'>+			compatible = "arm,cortex-a9-global-timer";</div><div class='add'>+			reg = &lt;0x60000200 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 11 0x304&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000600 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+			reg = &lt;0x60000600 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 13 0x304&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@60001000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x60001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x60000100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts<br/>new file mode 100644<br/>index 000000000000..3ea64ae009e9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-sLD3 Reference Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "uniphier-ph1-sld3.dtsi"</div><div class='add'>+/include/ "uniphier-support-card.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "UniPhier PH1-sLD3 Reference Board";</div><div class='add'>+	compatible = "socionext,ph1-sld3-ref", "socionext,ph1-sld3";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000</div><div class='add'>+		       0xc0000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+		stdout-path = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extbus {</div><div class='add'>+	ranges = &lt;0 0x00000000 0x0f000000 0x01000000</div><div class='add'>+		  1 0x00000000 0x00000000 0x08000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;support_card {</div><div class='add'>+	ranges = &lt;0x00000000 1 0x03f00000 0x00100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serialsc {</div><div class='add'>+	interrupts = &lt;0 49 4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi<br/>new file mode 100644<br/>index 000000000000..248b1886834f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-sLD3 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "socionext,ph1-sld3";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "socionext,uniphier-smp";</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		arm_timer_clk: arm_timer_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+		extbus: extbus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@20000200 {</div><div class='add'>+			compatible = "arm,cortex-a9-global-timer";</div><div class='add'>+			reg = &lt;0x20000200 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 11 0x304&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@20000600 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+			reg = &lt;0x20000600 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 13 0x304&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@20001000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x20001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x20000100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-bus-controller-misc@59800000 {</div><div class='add'>+			compatible = "socionext,uniphier-system-bus-controller-misc",</div><div class='add'>+				     "syscon";</div><div class='add'>+			reg = &lt;0x59800000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts<br/>new file mode 100644<br/>index 000000000000..dcdc4f74387d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-sLD8 Reference Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "uniphier-ph1-sld8.dtsi"</div><div class='add'>+/include/ "uniphier-support-card.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "UniPhier PH1-sLD8 Reference Board";</div><div class='add'>+	compatible = "socionext,ph1-sld8-ref", "socionext,ph1-sld8";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200";</div><div class='add'>+		stdout-path = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serialsc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extbus {</div><div class='add'>+	ranges = &lt;0 0x00000000 0x0f000000 0x01000000</div><div class='add'>+		  1 0x00000000 0x00000000 0x08000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;support_card {</div><div class='add'>+	ranges = &lt;0x00000000 1 0x03f00000 0x00100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serialsc {</div><div class='add'>+	interrupts = &lt;0 48 4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi<br/>new file mode 100644<br/>index 000000000000..baa71e1febb8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-ph1-sld8.dtsi</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier PH1-sLD8 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "socionext,ph1-sld8";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		arm_timer_clk: arm_timer_clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+		extbus: extbus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-bus-controller-misc@59800000 {</div><div class='add'>+			compatible = "socionext,uniphier-system-bus-controller-misc",</div><div class='add'>+				     "syscon";</div><div class='add'>+			reg = &lt;0x59800000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000200 {</div><div class='add'>+			compatible = "arm,cortex-a9-global-timer";</div><div class='add'>+			reg = &lt;0x60000200 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 11 0x104&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@60000600 {</div><div class='add'>+			compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+			reg = &lt;0x60000600 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 13 0x104&gt;;</div><div class='add'>+			clocks = &lt;&amp;arm_timer_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@60001000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x60001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x60000100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi b/arch/arm/boot/dts/uniphier-support-card.dtsi<br/>new file mode 100644<br/>index 000000000000..da271e3b922a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/uniphier-support-card.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/uniphier-support-card.dtsi</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for UniPhier Support Card (Expansion Board)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful,</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively,</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use,</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;extbus {</div><div class='add'>+	support_card: support_card {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ethsc: ethernet@00000000 {</div><div class='add'>+			compatible = "smsc,lan9118", "smsc,lan9115";</div><div class='add'>+			reg = &lt;0x00000000 0x1000&gt;;</div><div class='add'>+			phy-mode = "mii";</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serialsc: uart@000b0000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x000b0000 0x20&gt;;</div><div class='add'>+			clock-frequency = &lt;12288000&gt;;</div><div class='add'>+			reg-shift = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts<br/>index 107395c32d82..17f63f7dfd9e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts</a></div><div class='hunk'>@@ -150,6 +150,16 @@</div><div class='ctx'> 			interface-type = "ace";</div><div class='ctx'> 			reg = &lt;0x5000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pmu@9000 {</div><div class='add'>+			 compatible = "arm,cci-400-pmu,r0";</div><div class='add'>+			 reg = &lt;0x9000 0x5000&gt;;</div><div class='add'>+			 interrupts = &lt;0 105 4&gt;,</div><div class='add'>+				      &lt;0 101 4&gt;,</div><div class='add'>+				      &lt;0 102 4&gt;,</div><div class='add'>+				      &lt;0 103 4&gt;,</div><div class='add'>+				      &lt;0 104 4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory-controller@7ffd0000 {</div><div class='hunk'>@@ -187,11 +197,22 @@</div><div class='ctx'> 			     &lt;1 10 0xf08&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu {</div><div class='add'>+	pmu_a15 {</div><div class='ctx'> 		compatible = "arm,cortex-a15-pmu";</div><div class='ctx'> 		interrupts = &lt;0 68 4&gt;,</div><div class='ctx'> 			     &lt;0 69 4&gt;;</div><div class='del'>-		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='add'>+				     &lt;&amp;cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu_a7 {</div><div class='add'>+		compatible = "arm,cortex-a7-pmu";</div><div class='add'>+		interrupts = &lt;0 128 4&gt;,</div><div class='add'>+			     &lt;0 129 4&gt;,</div><div class='add'>+			     &lt;0 130 4&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu2&gt;,</div><div class='add'>+				     &lt;&amp;cpu3&gt;,</div><div class='add'>+				     &lt;&amp;cpu4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	oscclk6a: oscclk6a {</div><div class='head'>diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi<br/>index fbef0828e930..68ca125b56ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vf-colibri.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/vf-colibri.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf-colibri.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf-colibri.dtsi</a></div><div class='hunk'>@@ -140,7 +140,7 @@</div><div class='ctx'> 				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='ctx'> 				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='ctx'> 				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1</div><div class='add'>+				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='head'>diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts<br/>index fd8758b639f5..5447f2594659 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-cosmic.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/vf610-cosmic.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-cosmic.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-cosmic.dts</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='ctx'> 				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='ctx'> 				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1</div><div class='add'>+				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='head'>diff --git a/arch/arm/boot/dts/vf610-pinfunc.h b/arch/arm/boot/dts/vf610-pinfunc.h<br/>index 1ee681f7ce2f..fcad7132c871 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-pinfunc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/vf610-pinfunc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-pinfunc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-pinfunc.h</a></div><div class='hunk'>@@ -369,7 +369,7 @@</div><div class='ctx'> #define VF610_PAD_PTC11__MLB_DATA		0x0E0 0x358 ALT6 0x1</div><div class='ctx'> #define VF610_PAD_PTC11__DEBUG_OUT		0x0E0 0x000 ALT7 0x0</div><div class='ctx'> #define VF610_PAD_PTC12__GPIO_57		0x0E4 0x000 ALT0 0x0</div><div class='del'>-#define VF610_PAD_PTC12__ENET_RMII_RXD1		0x0E4 0x000 ALT1 0x0</div><div class='add'>+#define VF610_PAD_PTC12__ENET_RMII1_RXD1	0x0E4 0x000 ALT1 0x0</div><div class='ctx'> #define VF610_PAD_PTC12__ESAI_SDO1		0x0E4 0x318 ALT3 0x1</div><div class='ctx'> #define VF610_PAD_PTC12__SAI2_TX_BCLK		0x0E4 0x370 ALT5 0x1</div><div class='ctx'> #define VF610_PAD_PTC12__DEBUG_OUT3		0x0E4 0x000 ALT7 0x0</div><div class='head'>diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts<br/>index f64fddce3e2a..375ab23ca743 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-twr.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/vf610-twr.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610-twr.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610-twr.dts</a></div><div class='hunk'>@@ -221,7 +221,7 @@</div><div class='ctx'> 				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='ctx'> 				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='ctx'> 				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1</div><div class='add'>+				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='ctx'> 				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='head'>diff --git a/arch/arm/boot/dts/vf610m4-colibri.dts b/arch/arm/boot/dts/vf610m4-colibri.dts<br/>new file mode 100644<br/>index 000000000000..2931a80caccb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610m4-colibri.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610m4-colibri.dts</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/*</div><div class='add'>+ * Device tree for Colibri VF61 Cortex-M4 support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Stefan Agner</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "vf610m4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "VF610 Cortex-M4";</div><div class='add'>+	compatible = "fsl,vf610m4";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw";</div><div class='add'>+		linux,stdout-path = "&amp;uart2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x8c000000 0x3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	vf610-colibri {</div><div class='add'>+		pinctrl_uart2: uart2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				VF610_PAD_PTD0__UART2_TX		0x21a2</div><div class='add'>+				VF610_PAD_PTD1__UART2_RX		0x21a1</div><div class='add'>+				VF610_PAD_PTD2__UART2_RTS		0x21a2</div><div class='add'>+				VF610_PAD_PTD3__UART2_CTS		0x21a1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/vf610m4.dtsi b/arch/arm/boot/dts/vf610m4.dtsi<br/>new file mode 100644<br/>index 000000000000..9ffe2eb68ed4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vf610m4.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/vf610m4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+/*</div><div class='add'>+ * Device tree for VF6xx Cortex-M4 support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Stefan Agner</div><div class='add'>+ *</div><div class='add'>+ * This file is dual-licensed: you can use it either under the terms</div><div class='add'>+ * of the GPL or the X11 license, at your option. Note that this dual</div><div class='add'>+ * licensing only applies to this file, and not this project as a</div><div class='add'>+ * whole.</div><div class='add'>+ *</div><div class='add'>+ *  a) This file is free software; you can redistribute it and/or</div><div class='add'>+ *     modify it under the terms of the GNU General Public License as</div><div class='add'>+ *     published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ *     License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *     This file is distributed in the hope that it will be useful</div><div class='add'>+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *     GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * Or, alternatively</div><div class='add'>+ *</div><div class='add'>+ *  b) Permission is hereby granted, free of charge, to any person</div><div class='add'>+ *     obtaining a copy of this software and associated documentation</div><div class='add'>+ *     files (the "Software"), to deal in the Software without</div><div class='add'>+ *     restriction, including without limitation the rights to use</div><div class='add'>+ *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='add'>+ *     sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ *     Software is furnished to do so, subject to the following</div><div class='add'>+ *     conditions:</div><div class='add'>+ *</div><div class='add'>+ *     The above copyright notice and this permission notice shall be</div><div class='add'>+ *     included in all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND</div><div class='add'>+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='add'>+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='add'>+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY</div><div class='add'>+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "armv7-m.dtsi"</div><div class='add'>+#include "vfxxx.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;mscm_ir {</div><div class='add'>+	interrupt-parent = &lt;&amp;nvic&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/zx296702-ad1.dts b/arch/arm/boot/dts/zx296702-ad1.dts<br/>new file mode 100644<br/>index 000000000000..081f980cfbe6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zx296702-ad1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zx296702-ad1.dts</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "zx296702.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ZTE ZX296702 AD1 Board";</div><div class='add'>+	compatible = "zte,zx296702-ad1", "zte,zx296702";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x50000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	supports-highspeed;</div><div class='add'>+	non-removable;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	slot@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	num-slots = &lt;1&gt;;</div><div class='add'>+	supports-highspeed;</div><div class='add'>+	non-removable;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	slot@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/zx296702.dtsi b/arch/arm/boot/dts/zx296702.dtsi<br/>new file mode 100644<br/>index 000000000000..d45c8fcd7ab4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zx296702.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zx296702.dtsi</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+</div><div class='add'>+#include "skeleton.dtsi"</div><div class='add'>+#include &lt;dt-bindings/clock/zx296702-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "zte,zx296702-smp";</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2cc&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2cc&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		matrix: bus-matrix@400000 {</div><div class='add'>+			compatible = "zte,zx-bus-matrix";</div><div class='add'>+			reg = &lt;0x00400000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@00801000 {</div><div class='add'>+			compatible = "arm,cortex-a9-gic";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x00801000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00800100 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		global_timer: timer@008000200 {</div><div class='add'>+			compatible = "arm,cortex-a9-global-timer";</div><div class='add'>+			reg = &lt;0x00800200 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			clocks = &lt;&amp;topclk ZX296702_A9_PERIPHCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2cc: l2-cache-controller@0x00c00000 {</div><div class='add'>+			compatible = "arm,pl310-cache";</div><div class='add'>+			reg = &lt;0x00c00000 0x1000&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			arm,data-latency = &lt;1 1 1&gt;;</div><div class='add'>+			arm,tag-latency = &lt;1 1 1&gt;;</div><div class='add'>+			arm,double-linefill = &lt;1&gt;;</div><div class='add'>+			arm,double-linefill-incr = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcu: pcu@0xa0008000 {</div><div class='add'>+			compatible = "zte,zx296702-pcu";</div><div class='add'>+			reg = &lt;0xa0008000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		topclk: topclk@0x09800000 {</div><div class='add'>+			compatible = "zte,zx296702-topcrm-clk";</div><div class='add'>+			reg = &lt;0x09800000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lsp1clk: lsp1clk@0x09400000 {</div><div class='add'>+			compatible = "zte,zx296702-lsp1crpm-clk";</div><div class='add'>+			reg = &lt;0x09400000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lsp0clk: lsp0clk@0x0b000000 {</div><div class='add'>+			compatible = "zte,zx296702-lsp0crpm-clk";</div><div class='add'>+			reg = &lt;0x0b000000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@0x09405000 {</div><div class='add'>+			compatible = "zte,zx296702-uart";</div><div class='add'>+			reg = &lt;0x09405000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lsp1clk ZX296702_UART0_WCLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@0x09406000 {</div><div class='add'>+			compatible = "zte,zx296702-uart";</div><div class='add'>+			reg = &lt;0x09406000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lsp1clk ZX296702_UART1_WCLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@0x09408000 {</div><div class='add'>+			compatible = "snps,dw-mshc";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x09408000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			fifo-depth = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;lsp1clk ZX296702_SDMMC0_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;lsp1clk ZX296702_SDMMC0_WCLK&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@0x0b003000 {</div><div class='add'>+			compatible = "snps,dw-mshc";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0b003000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			fifo-depth = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;lsp0clk ZX296702_SDMMC1_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;lsp0clk ZX296702_SDMMC1_WCLK&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sysctrl: sysctrl@0xa0007000 {</div><div class='add'>+			compatible = "zte,sysctrl", "syscon";</div><div class='add'>+			reg = &lt;0xa0007000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi<br/>index 9ea54b3dba09..06915080b875 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-7000.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-7000.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-7000.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-7000.dtsi</a></div><div class='hunk'>@@ -193,7 +193,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gem0: ethernet@e000b000 {</div><div class='del'>-			compatible = "cdns,zynq-gem";</div><div class='add'>+			compatible = "cdns,zynq-gem", "cdns,gem";</div><div class='ctx'> 			reg = &lt;0xe000b000 0x1000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			interrupts = &lt;0 22 4&gt;;</div><div class='hunk'>@@ -204,7 +204,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gem1: ethernet@e000c000 {</div><div class='del'>-			compatible = "cdns,zynq-gem";</div><div class='add'>+			compatible = "cdns,zynq-gem", "cdns,gem";</div><div class='ctx'> 			reg = &lt;0xe000c000 0x1000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			interrupts = &lt;0 45 4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts<br/>index 174571232ea5..9efd16cb2859 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-parallella.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-parallella.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-parallella.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-parallella.dts</a></div><div class='hunk'>@@ -23,14 +23,19 @@</div><div class='ctx'> 	model = "Adapteva Parallella Board";</div><div class='ctx'> 	compatible = "adapteva,parallella", "xlnx,zynq-7000";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gem0;</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";</div><div class='del'>-		linux,stdout-path = "/amba/serial@e0001000";</div><div class='add'>+		bootargs = "earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts<br/>index 1fc1d3911e9b..fb59d34e8ee6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zc702.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-zc702.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zc702.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zc702.dts</a></div><div class='hunk'>@@ -30,7 +30,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyPS0,115200 earlyprintk";</div><div class='add'>+		bootargs = "earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts<br/>index 850518d9b8ac..abf5d238ae04 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zc706.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-zc706.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zc706.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zc706.dts</a></div><div class='hunk'>@@ -30,7 +30,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyPS0,115200 earlyprintk";</div><div class='add'>+		bootargs = "earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb_phy0: phy0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts<br/>index 5658bc8434de..b9f2522012e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zed.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-zed.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zed.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zed.dts</a></div><div class='hunk'>@@ -29,7 +29,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyPS0,115200 earlyprintk";</div><div class='add'>+		bootargs = "earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb_phy0: phy0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/zynq-zybo.dts b/arch/arm/boot/dts/zynq-zybo.dts<br/>index a9a12ce5023b..16c9cacd668d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zybo.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/boot/dts/zynq-zybo.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/zynq-zybo.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/boot/dts/zynq-zybo.dts</a></div><div class='hunk'>@@ -18,13 +18,19 @@</div><div class='ctx'> 	model = "Zynq ZYBO Development Board";</div><div class='ctx'> 	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gem0;</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "console=ttyPS0,115200 earlyprintk";</div><div class='add'>+		bootargs = "earlyprintk";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile<br/>index 70b1eff477b3..6ee5959a813b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/common/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/Makefile</a></div><div class='hunk'>@@ -11,7 +11,6 @@ obj-$(CONFIG_SHARP_LOCOMO)	+= locomo.o</div><div class='ctx'> obj-$(CONFIG_SHARP_PARAM)	+= sharpsl_param.o</div><div class='ctx'> obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o</div><div class='ctx'> obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o</div><div class='del'>-obj-$(CONFIG_ARM_TIMER_SP804)	+= timer-sp.o</div><div class='ctx'> obj-$(CONFIG_MCPM)		+= mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o</div><div class='ctx'> CFLAGS_REMOVE_mcpm_entry.o	= -pg</div><div class='ctx'> AFLAGS_mcpm_head.o		:= -march=armv7-a</div><div class='head'>diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c<br/>index 5662a872689b..873dbfcc7dc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/edma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/common/edma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/edma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/edma.c</a></div><div class='hunk'>@@ -1350,6 +1350,9 @@ void edma_stop(unsigned channel)</div><div class='ctx'> 		edma_shadow0_write_array(ctlr, SH_SECR, j, mask);</div><div class='ctx'> 		edma_write_array(ctlr, EDMA_EMCR, j, mask);</div><div class='ctx'> </div><div class='add'>+		/* clear possibly pending completion interrupt */</div><div class='add'>+		edma_shadow0_write_array(ctlr, SH_ICR, j, mask);</div><div class='add'>+</div><div class='ctx'> 		pr_debug("EDMA: EER%d %08x\n", j,</div><div class='ctx'> 				edma_shadow0_read_array(ctlr, SH_EER, j));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c<br/>index 5f8a52ac7edf..a923524d1040 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/mcpm_entry.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/common/mcpm_entry.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/mcpm_entry.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/mcpm_entry.c</a></div><div class='hunk'>@@ -20,6 +20,126 @@</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The public API for this code is documented in arch/arm/include/asm/mcpm.h.</div><div class='add'>+ * For a comprehensive description of the main algorithm used here, please</div><div class='add'>+ * see Documentation/arm/cluster-pm-race-avoidance.txt.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct sync_struct mcpm_sync;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __mcpm_cpu_going_down: Indicates that the cpu is being torn down.</div><div class='add'>+ *    This must be called at the point of committing to teardown of a CPU.</div><div class='add'>+ *    The CPU cache (SCTRL.C bit) is expected to still be active.</div><div class='add'>+ */</div><div class='add'>+static void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster)</div><div class='add'>+{</div><div class='add'>+	mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN;</div><div class='add'>+	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cpus[cpu].cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __mcpm_cpu_down: Indicates that cpu teardown is complete and that the</div><div class='add'>+ *    cluster can be torn down without disrupting this CPU.</div><div class='add'>+ *    To avoid deadlocks, this must be called before a CPU is powered down.</div><div class='add'>+ *    The CPU cache (SCTRL.C bit) is expected to be off.</div><div class='add'>+ *    However L2 cache might or might not be active.</div><div class='add'>+ */</div><div class='add'>+static void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster)</div><div class='add'>+{</div><div class='add'>+	dmb();</div><div class='add'>+	mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN;</div><div class='add'>+	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cpus[cpu].cpu);</div><div class='add'>+	sev();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __mcpm_outbound_leave_critical: Leave the cluster teardown critical section.</div><div class='add'>+ * @state: the final state of the cluster:</div><div class='add'>+ *     CLUSTER_UP: no destructive teardown was done and the cluster has been</div><div class='add'>+ *         restored to the previous state (CPU cache still active); or</div><div class='add'>+ *     CLUSTER_DOWN: the cluster has been torn-down, ready for power-off</div><div class='add'>+ *         (CPU cache disabled, L2 cache either enabled or disabled).</div><div class='add'>+ */</div><div class='add'>+static void __mcpm_outbound_leave_critical(unsigned int cluster, int state)</div><div class='add'>+{</div><div class='add'>+	dmb();</div><div class='add'>+	mcpm_sync.clusters[cluster].cluster = state;</div><div class='add'>+	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cluster);</div><div class='add'>+	sev();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __mcpm_outbound_enter_critical: Enter the cluster teardown critical section.</div><div class='add'>+ * This function should be called by the last man, after local CPU teardown</div><div class='add'>+ * is complete.  CPU cache expected to be active.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *     false: the critical section was not entered because an inbound CPU was</div><div class='add'>+ *         observed, or the cluster is already being set up;</div><div class='add'>+ *     true: the critical section was entered: it is now safe to tear down the</div><div class='add'>+ *         cluster.</div><div class='add'>+ */</div><div class='add'>+static bool __mcpm_outbound_enter_critical(unsigned int cpu, unsigned int cluster)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	struct mcpm_sync_struct *c = &amp;mcpm_sync.clusters[cluster];</div><div class='add'>+</div><div class='add'>+	/* Warn inbound CPUs that the cluster is being torn down: */</div><div class='add'>+	c-&gt;cluster = CLUSTER_GOING_DOWN;</div><div class='add'>+	sync_cache_w(&amp;c-&gt;cluster);</div><div class='add'>+</div><div class='add'>+	/* Back out if the inbound cluster is already in the critical region: */</div><div class='add'>+	sync_cache_r(&amp;c-&gt;inbound);</div><div class='add'>+	if (c-&gt;inbound == INBOUND_COMING_UP)</div><div class='add'>+		goto abort;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for all CPUs to get out of the GOING_DOWN state, so that local</div><div class='add'>+	 * teardown is complete on each CPU before tearing down the cluster.</div><div class='add'>+	 *</div><div class='add'>+	 * If any CPU has been woken up again from the DOWN state, then we</div><div class='add'>+	 * shouldn't be taking the cluster down at all: abort in that case.</div><div class='add'>+	 */</div><div class='add'>+	sync_cache_r(&amp;c-&gt;cpus);</div><div class='add'>+	for (i = 0; i &lt; MAX_CPUS_PER_CLUSTER; i++) {</div><div class='add'>+		int cpustate;</div><div class='add'>+</div><div class='add'>+		if (i == cpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		while (1) {</div><div class='add'>+			cpustate = c-&gt;cpus[i].cpu;</div><div class='add'>+			if (cpustate != CPU_GOING_DOWN)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			wfe();</div><div class='add'>+			sync_cache_r(&amp;c-&gt;cpus[i].cpu);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (cpustate) {</div><div class='add'>+		case CPU_DOWN:</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			goto abort;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+abort:</div><div class='add'>+	__mcpm_outbound_leave_critical(cluster, CLUSTER_UP);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __mcpm_cluster_state(unsigned int cluster)</div><div class='add'>+{</div><div class='add'>+	sync_cache_r(&amp;mcpm_sync.clusters[cluster].cluster);</div><div class='add'>+	return mcpm_sync.clusters[cluster].cluster;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern unsigned long mcpm_entry_vectors[MAX_NR_CLUSTERS][MAX_CPUS_PER_CLUSTER];</div><div class='ctx'> </div><div class='ctx'> void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr)</div><div class='hunk'>@@ -78,16 +198,11 @@ int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster)</div><div class='ctx'> 	bool cpu_is_down, cluster_is_down;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);</div><div class='ctx'> 	if (!platform_ops)</div><div class='ctx'> 		return -EUNATCH; /* try not to shadow power_up errors */</div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='del'>-	/* backward compatibility callback */</div><div class='del'>-	if (platform_ops-&gt;power_up)</div><div class='del'>-		return platform_ops-&gt;power_up(cpu, cluster);</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Since this is called with IRQs enabled, and no arch_spin_lock_irq</div><div class='ctx'> 	 * variant exists, we need to disable IRQs manually here.</div><div class='hunk'>@@ -128,29 +243,17 @@ void mcpm_cpu_power_down(void)</div><div class='ctx'> 	bool cpu_going_down, last_man;</div><div class='ctx'> 	phys_reset_t phys_reset;</div><div class='ctx'> </div><div class='add'>+	mpidr = read_cpuid_mpidr();</div><div class='add'>+	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='add'>+	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='add'>+	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);</div><div class='ctx'> 	if (WARN_ON_ONCE(!platform_ops))</div><div class='ctx'> 	       return;</div><div class='ctx'> 	BUG_ON(!irqs_disabled());</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Do this before calling into the power_down method,</div><div class='del'>-	 * as it might not always be safe to do afterwards.</div><div class='del'>-	 */</div><div class='ctx'> 	setup_mm_for_reboot();</div><div class='ctx'> </div><div class='del'>-	/* backward compatibility callback */</div><div class='del'>-	if (platform_ops-&gt;power_down) {</div><div class='del'>-		platform_ops-&gt;power_down();</div><div class='del'>-		goto not_dead;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mpidr = read_cpuid_mpidr();</div><div class='del'>-	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='del'>-	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='del'>-	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);</div><div class='del'>-</div><div class='ctx'> 	__mcpm_cpu_going_down(cpu, cluster);</div><div class='del'>-</div><div class='ctx'> 	arch_spin_lock(&amp;mcpm_lock);</div><div class='ctx'> 	BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);</div><div class='ctx'> </div><div class='hunk'>@@ -187,7 +290,6 @@ void mcpm_cpu_power_down(void)</div><div class='ctx'> 	if (cpu_going_down)</div><div class='ctx'> 		wfi();</div><div class='ctx'> </div><div class='del'>-not_dead:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * It is possible for a power_up request to happen concurrently</div><div class='ctx'> 	 * with a power_down request for the same CPU. In this case the</div><div class='hunk'>@@ -219,22 +321,11 @@ int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mcpm_cpu_suspend(u64 expected_residency)</div><div class='add'>+void mcpm_cpu_suspend(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (WARN_ON_ONCE(!platform_ops))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* backward compatibility callback */</div><div class='del'>-	if (platform_ops-&gt;suspend) {</div><div class='del'>-		phys_reset_t phys_reset;</div><div class='del'>-		BUG_ON(!irqs_disabled());</div><div class='del'>-		setup_mm_for_reboot();</div><div class='del'>-		platform_ops-&gt;suspend(expected_residency);</div><div class='del'>-		phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);</div><div class='del'>-		phys_reset(virt_to_phys(mcpm_entry_point));</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Some platforms might have to enable special resume modes, etc. */</div><div class='ctx'> 	if (platform_ops-&gt;cpu_suspend_prepare) {</div><div class='ctx'> 		unsigned int mpidr = read_cpuid_mpidr();</div><div class='hunk'>@@ -256,12 +347,6 @@ int mcpm_cpu_powered_up(void)</div><div class='ctx'> 	if (!platform_ops)</div><div class='ctx'> 		return -EUNATCH;</div><div class='ctx'> </div><div class='del'>-	/* backward compatibility callback */</div><div class='del'>-	if (platform_ops-&gt;powered_up) {</div><div class='del'>-		platform_ops-&gt;powered_up();</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	mpidr = read_cpuid_mpidr();</div><div class='ctx'> 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='ctx'> 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='hunk'>@@ -334,120 +419,6 @@ int __init mcpm_loopback(void (*cache_disable)(void))</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-struct sync_struct mcpm_sync;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __mcpm_cpu_going_down: Indicates that the cpu is being torn down.</div><div class='del'>- *    This must be called at the point of committing to teardown of a CPU.</div><div class='del'>- *    The CPU cache (SCTRL.C bit) is expected to still be active.</div><div class='del'>- */</div><div class='del'>-void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster)</div><div class='del'>-{</div><div class='del'>-	mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN;</div><div class='del'>-	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cpus[cpu].cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __mcpm_cpu_down: Indicates that cpu teardown is complete and that the</div><div class='del'>- *    cluster can be torn down without disrupting this CPU.</div><div class='del'>- *    To avoid deadlocks, this must be called before a CPU is powered down.</div><div class='del'>- *    The CPU cache (SCTRL.C bit) is expected to be off.</div><div class='del'>- *    However L2 cache might or might not be active.</div><div class='del'>- */</div><div class='del'>-void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster)</div><div class='del'>-{</div><div class='del'>-	dmb();</div><div class='del'>-	mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN;</div><div class='del'>-	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cpus[cpu].cpu);</div><div class='del'>-	sev();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __mcpm_outbound_leave_critical: Leave the cluster teardown critical section.</div><div class='del'>- * @state: the final state of the cluster:</div><div class='del'>- *     CLUSTER_UP: no destructive teardown was done and the cluster has been</div><div class='del'>- *         restored to the previous state (CPU cache still active); or</div><div class='del'>- *     CLUSTER_DOWN: the cluster has been torn-down, ready for power-off</div><div class='del'>- *         (CPU cache disabled, L2 cache either enabled or disabled).</div><div class='del'>- */</div><div class='del'>-void __mcpm_outbound_leave_critical(unsigned int cluster, int state)</div><div class='del'>-{</div><div class='del'>-	dmb();</div><div class='del'>-	mcpm_sync.clusters[cluster].cluster = state;</div><div class='del'>-	sync_cache_w(&amp;mcpm_sync.clusters[cluster].cluster);</div><div class='del'>-	sev();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __mcpm_outbound_enter_critical: Enter the cluster teardown critical section.</div><div class='del'>- * This function should be called by the last man, after local CPU teardown</div><div class='del'>- * is complete.  CPU cache expected to be active.</div><div class='del'>- *</div><div class='del'>- * Returns:</div><div class='del'>- *     false: the critical section was not entered because an inbound CPU was</div><div class='del'>- *         observed, or the cluster is already being set up;</div><div class='del'>- *     true: the critical section was entered: it is now safe to tear down the</div><div class='del'>- *         cluster.</div><div class='del'>- */</div><div class='del'>-bool __mcpm_outbound_enter_critical(unsigned int cpu, unsigned int cluster)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-	struct mcpm_sync_struct *c = &amp;mcpm_sync.clusters[cluster];</div><div class='del'>-</div><div class='del'>-	/* Warn inbound CPUs that the cluster is being torn down: */</div><div class='del'>-	c-&gt;cluster = CLUSTER_GOING_DOWN;</div><div class='del'>-	sync_cache_w(&amp;c-&gt;cluster);</div><div class='del'>-</div><div class='del'>-	/* Back out if the inbound cluster is already in the critical region: */</div><div class='del'>-	sync_cache_r(&amp;c-&gt;inbound);</div><div class='del'>-	if (c-&gt;inbound == INBOUND_COMING_UP)</div><div class='del'>-		goto abort;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Wait for all CPUs to get out of the GOING_DOWN state, so that local</div><div class='del'>-	 * teardown is complete on each CPU before tearing down the cluster.</div><div class='del'>-	 *</div><div class='del'>-	 * If any CPU has been woken up again from the DOWN state, then we</div><div class='del'>-	 * shouldn't be taking the cluster down at all: abort in that case.</div><div class='del'>-	 */</div><div class='del'>-	sync_cache_r(&amp;c-&gt;cpus);</div><div class='del'>-	for (i = 0; i &lt; MAX_CPUS_PER_CLUSTER; i++) {</div><div class='del'>-		int cpustate;</div><div class='del'>-</div><div class='del'>-		if (i == cpu)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		while (1) {</div><div class='del'>-			cpustate = c-&gt;cpus[i].cpu;</div><div class='del'>-			if (cpustate != CPU_GOING_DOWN)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			wfe();</div><div class='del'>-			sync_cache_r(&amp;c-&gt;cpus[i].cpu);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (cpustate) {</div><div class='del'>-		case CPU_DOWN:</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			goto abort;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-</div><div class='del'>-abort:</div><div class='del'>-	__mcpm_outbound_leave_critical(cluster, CLUSTER_UP);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __mcpm_cluster_state(unsigned int cluster)</div><div class='del'>-{</div><div class='del'>-	sync_cache_r(&amp;mcpm_sync.clusters[cluster].cluster);</div><div class='del'>-	return mcpm_sync.clusters[cluster].cluster;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern unsigned long mcpm_power_up_setup_phys;</div><div class='ctx'> </div><div class='ctx'> int __init mcpm_sync_init(</div><div class='head'>diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S<br/>index e02db4b81a66..08b3bb9bc6a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/mcpm_head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/common/mcpm_head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/mcpm_head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/mcpm_head.S</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> ENTRY(mcpm_entry_point)</div><div class='ctx'> </div><div class='ctx'>  ARM_BE8(setend        be)</div><div class='del'>- THUMB(	adr	r12, BSYM(1f)	)</div><div class='add'>+ THUMB(	badr	r12, 1f		)</div><div class='ctx'>  THUMB(	bx	r12		)</div><div class='ctx'>  THUMB(	.thumb			)</div><div class='ctx'> 1:</div><div class='head'>diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c<br/>index 5cc779c8e9c6..93ee70dbbdd3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/sa1111.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/common/sa1111.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/sa1111.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/common/sa1111.c</a></div><div class='hunk'>@@ -501,8 +501,8 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)</div><div class='ctx'> 	 * Register SA1111 interrupt</div><div class='ctx'> 	 */</div><div class='ctx'> 	irq_set_irq_type(sachip-&gt;irq, IRQ_TYPE_EDGE_RISING);</div><div class='del'>-	irq_set_handler_data(sachip-&gt;irq, sachip);</div><div class='del'>-	irq_set_chained_handler(sachip-&gt;irq, sa1111_irq_handler);</div><div class='add'>+	irq_set_chained_handler_and_data(sachip-&gt;irq, sa1111_irq_handler,</div><div class='add'>+					 sachip);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(sachip-&gt;dev, "Providing IRQ%u-%u\n",</div><div class='ctx'> 		sachip-&gt;irq_base, sachip-&gt;irq_base + SA1111_IRQ_NR - 1);</div><div class='hunk'>@@ -836,8 +836,7 @@ static void __sa1111_remove(struct sa1111 *sachip)</div><div class='ctx'> 	clk_unprepare(sachip-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	if (sachip-&gt;irq != NO_IRQ) {</div><div class='del'>-		irq_set_chained_handler(sachip-&gt;irq, NULL);</div><div class='del'>-		irq_set_handler_data(sachip-&gt;irq, NULL);</div><div class='add'>+		irq_set_chained_handler_and_data(sachip-&gt;irq, NULL, NULL);</div><div class='ctx'> 		irq_free_descs(sachip-&gt;irq_base, SA1111_IRQ_NR);</div><div class='ctx'> </div><div class='ctx'> 		release_mem_region(sachip-&gt;phys + SA1111_INTC, 512);</div><div class='head'>diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig<br/>index bcef49a21801..94b5dcabdecc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/at91_dt_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/at91_dt_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/at91_dt_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/at91_dt_defconfig</a></div><div class='hunk'>@@ -131,6 +131,8 @@ CONFIG_POWER_RESET=y</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_AT91SAM9X_WATCHDOG=y</div><div class='ctx'> CONFIG_SSB=m</div><div class='add'>+CONFIG_REGULATOR=y</div><div class='add'>+CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_FB=y</div><div class='ctx'> CONFIG_FB_ATMEL=y</div><div class='ctx'> CONFIG_BACKLIGHT_LCD_SUPPORT=y</div><div class='head'>diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig<br/>index c4c17e3a8e1a..c0dac0f0f804 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/efm32_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/efm32_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/efm32_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/efm32_defconfig</a></div><div class='hunk'>@@ -16,6 +16,7 @@ CONFIG_EMBEDDED=y</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='ctx'> # CONFIG_MMU is not set</div><div class='add'>+CONFIG_ARM_SINGLE_ARMV7M=y</div><div class='ctx'> CONFIG_ARCH_EFM32=y</div><div class='ctx'> CONFIG_SET_MEM_PARAM=y</div><div class='ctx'> CONFIG_DRAM_BASE=0x88000000</div><div class='hunk'>@@ -85,7 +86,6 @@ CONFIG_GPIO_SYSFS=y</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_SPI=y</div><div class='del'>-# CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> # CONFIG_FILE_LOCKING is not set</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='head'>diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig<br/>index d034c96c039b..9504e7790288 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/exynos_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/exynos_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/exynos_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/exynos_defconfig</a></div><div class='hunk'>@@ -26,11 +26,11 @@ CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='ctx'> CONFIG_ARM_APPENDED_DTB=y</div><div class='ctx'> CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='ctx'> CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"</div><div class='add'>+CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='ctx'> CONFIG_ARM_EXYNOS_CPUIDLE=y</div><div class='ctx'> CONFIG_VFP=y</div><div class='ctx'> CONFIG_NEON=y</div><div class='del'>-CONFIG_PM=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='hunk'>@@ -40,15 +40,11 @@ CONFIG_IP_PNP=y</div><div class='ctx'> CONFIG_IP_PNP_DHCP=y</div><div class='ctx'> CONFIG_IP_PNP_BOOTP=y</div><div class='ctx'> CONFIG_IP_PNP_RARP=y</div><div class='del'>-CONFIG_WIRELESS=y</div><div class='ctx'> CONFIG_CFG80211=y</div><div class='del'>-CONFIG_MWIFIEX=y</div><div class='del'>-CONFIG_MWIFIEX_SDIO=y</div><div class='ctx'> CONFIG_RFKILL_REGULATOR=y</div><div class='ctx'> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='del'>-CONFIG_PROC_DEVICETREE=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='hunk'>@@ -66,7 +62,8 @@ CONFIG_SMSC911X=y</div><div class='ctx'> CONFIG_USB_USBNET=y</div><div class='ctx'> CONFIG_USB_NET_SMSC75XX=y</div><div class='ctx'> CONFIG_USB_NET_SMSC95XX=y</div><div class='del'>-CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_MWIFIEX=y</div><div class='add'>+CONFIG_MWIFIEX_SDIO=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_KEYBOARD_GPIO=y</div><div class='ctx'> CONFIG_KEYBOARD_CROS_EC=y</div><div class='hunk'>@@ -81,16 +78,13 @@ CONFIG_SERIAL_OF_PLATFORM=y</div><div class='ctx'> CONFIG_HW_RANDOM=y</div><div class='ctx'> CONFIG_TCG_TPM=y</div><div class='ctx'> CONFIG_TCG_TIS_I2C_INFINEON=y</div><div class='del'>-CONFIG_I2C=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_MUX=y</div><div class='ctx'> CONFIG_I2C_ARB_GPIO_CHALLENGE=y</div><div class='del'>-CONFIG_I2C_EXYNOS5=y</div><div class='ctx'> CONFIG_I2C_GPIO=y</div><div class='ctx'> CONFIG_I2C_CROS_EC_TUNNEL=y</div><div class='ctx'> CONFIG_SPI=y</div><div class='ctx'> CONFIG_SPI_S3C64XX=y</div><div class='del'>-CONFIG_I2C_S3C2410=y</div><div class='ctx'> CONFIG_DEBUG_GPIO=y</div><div class='ctx'> CONFIG_POWER_SUPPLY=y</div><div class='ctx'> CONFIG_BATTERY_SBS=y</div><div class='hunk'>@@ -99,13 +93,13 @@ CONFIG_BATTERY_MAX17042=y</div><div class='ctx'> CONFIG_CHARGER_MAX14577=y</div><div class='ctx'> CONFIG_CHARGER_MAX77693=y</div><div class='ctx'> CONFIG_CHARGER_TPS65090=y</div><div class='del'>-CONFIG_HWMON=y</div><div class='ctx'> CONFIG_SENSORS_LM90=y</div><div class='del'>-CONFIG_CPU_FREQ=y</div><div class='del'>-CONFIG_CPU_THERMAL=y</div><div class='add'>+CONFIG_SENSORS_PWM_FAN=y</div><div class='add'>+CONFIG_SENSORS_INA2XX=y</div><div class='ctx'> CONFIG_THERMAL=y</div><div class='del'>-CONFIG_EXYNOS_THERMAL=y</div><div class='add'>+CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_THERMAL_EMULATION=y</div><div class='add'>+CONFIG_EXYNOS_THERMAL=y</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_S3C2410_WATCHDOG=y</div><div class='ctx'> CONFIG_MFD_CROS_EC=y</div><div class='hunk'>@@ -123,36 +117,27 @@ CONFIG_REGULATOR_GPIO=y</div><div class='ctx'> CONFIG_REGULATOR_MAX14577=y</div><div class='ctx'> CONFIG_REGULATOR_MAX8997=y</div><div class='ctx'> CONFIG_REGULATOR_MAX77686=y</div><div class='del'>-CONFIG_REGULATOR_MAX77802=y</div><div class='ctx'> CONFIG_REGULATOR_MAX77693=y</div><div class='add'>+CONFIG_REGULATOR_MAX77802=y</div><div class='ctx'> CONFIG_REGULATOR_S2MPA01=y</div><div class='ctx'> CONFIG_REGULATOR_S2MPS11=y</div><div class='ctx'> CONFIG_REGULATOR_S5M8767=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65090=y</div><div class='ctx'> CONFIG_DRM=y</div><div class='del'>-CONFIG_DRM_EXYNOS_HDMI=y</div><div class='del'>-CONFIG_DRM_BRIDGE=y</div><div class='ctx'> CONFIG_DRM_PTN3460=y</div><div class='ctx'> CONFIG_DRM_PS8622=y</div><div class='ctx'> CONFIG_DRM_EXYNOS=y</div><div class='ctx'> CONFIG_DRM_EXYNOS_FIMD=y</div><div class='del'>-CONFIG_DRM_EXYNOS_DP=y</div><div class='del'>-CONFIG_DRM_PANEL=y</div><div class='add'>+CONFIG_DRM_EXYNOS_DSI=y</div><div class='add'>+CONFIG_DRM_EXYNOS_HDMI=y</div><div class='ctx'> CONFIG_DRM_PANEL_SIMPLE=y</div><div class='del'>-CONFIG_FB=y</div><div class='del'>-CONFIG_FB_MODE_HELPERS=y</div><div class='add'>+CONFIG_DRM_PANEL_S6E8AA0=y</div><div class='ctx'> CONFIG_FB_SIMPLE=y</div><div class='ctx'> CONFIG_EXYNOS_VIDEO=y</div><div class='ctx'> CONFIG_EXYNOS_MIPI_DSI=y</div><div class='del'>-CONFIG_BACKLIGHT_LCD_SUPPORT=y</div><div class='ctx'> CONFIG_LCD_CLASS_DEVICE=y</div><div class='ctx'> CONFIG_LCD_PLATFORM=y</div><div class='del'>-CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='del'>-CONFIG_BACKLIGHT_GENERIC=y</div><div class='ctx'> CONFIG_BACKLIGHT_PWM=y</div><div class='del'>-CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='del'>-CONFIG_FONTS=y</div><div class='del'>-CONFIG_FONT_7x14=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='ctx'> CONFIG_SOUND=y</div><div class='ctx'> CONFIG_SND=y</div><div class='hunk'>@@ -169,6 +154,7 @@ CONFIG_USB_OHCI_EXYNOS=y</div><div class='ctx'> CONFIG_USB_STORAGE=y</div><div class='ctx'> CONFIG_USB_DWC3=y</div><div class='ctx'> CONFIG_USB_HSIC_USB3503=y</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_BLOCK_MINORS=16</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='hunk'>@@ -197,11 +183,6 @@ CONFIG_EXYNOS_ADC=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_SAMSUNG=y</div><div class='ctx'> CONFIG_PHY_EXYNOS5250_SATA=y</div><div class='del'>-CONFIG_PHY_SAMSUNG_USB2=y</div><div class='del'>-CONFIG_PHY_EXYNOS4210_USB2=y</div><div class='del'>-CONFIG_PHY_EXYNOS4X12_USB2=y</div><div class='del'>-CONFIG_PHY_EXYNOS5250_USB2=y</div><div class='del'>-CONFIG_PHY_EXYNOS5_USBDRD=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='hunk'>@@ -217,15 +198,16 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='del'>-CONFIG_DETECT_HUNG_TASK=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='ctx'> CONFIG_DEBUG_RT_MUTEXES=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='del'>-CONFIG_LOCKUP_DETECTOR=y</div><div class='del'>-CONFIG_DEBUG_INFO=y</div><div class='ctx'> CONFIG_DEBUG_USER=y</div><div class='ctx'> CONFIG_CRYPTO_SHA256=y</div><div class='ctx'> CONFIG_CRC_CCITT=y</div><div class='add'>+CONFIG_FONTS=y</div><div class='add'>+CONFIG_FONT_7x14=y</div><div class='head'>diff --git a/arch/arm/configs/hisi_defconfig b/arch/arm/configs/hisi_defconfig<br/>index c34da5878b6c..5997dbc69822 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/hisi_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/hisi_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/hisi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/hisi_defconfig</a></div><div class='hunk'>@@ -33,6 +33,7 @@ CONFIG_ATA=y</div><div class='ctx'> CONFIG_SATA_AHCI_PLATFORM=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_HIX5HD2_GMAC=y</div><div class='add'>+CONFIG_HIP04_ETH=y</div><div class='ctx'> CONFIG_SERIAL_8250=y</div><div class='ctx'> CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y</div><div class='ctx'> CONFIG_SERIAL_8250_CONSOLE=y</div><div class='hunk'>@@ -51,6 +52,7 @@ CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_GPIOLIB=y</div><div class='ctx'> CONFIG_GPIO_GENERIC_PLATFORM=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='add'>+CONFIG_GPIO_DWAPB=y</div><div class='ctx'> CONFIG_MFD_SYSCON=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON=y</div><div class='ctx'> CONFIG_DRM=y</div><div class='head'>diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig<br/>index fdeb1c83dcb5..b47863d49ac6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/imx_v6_v7_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/imx_v6_v7_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/imx_v6_v7_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/imx_v6_v7_defconfig</a></div><div class='hunk'>@@ -38,7 +38,9 @@ CONFIG_SOC_IMX53=y</div><div class='ctx'> CONFIG_SOC_IMX6Q=y</div><div class='ctx'> CONFIG_SOC_IMX6SL=y</div><div class='ctx'> CONFIG_SOC_IMX6SX=y</div><div class='add'>+CONFIG_SOC_IMX7D=y</div><div class='ctx'> CONFIG_SOC_VF610=y</div><div class='add'>+CONFIG_SOC_LS1021A=y</div><div class='ctx'> CONFIG_PCI=y</div><div class='ctx'> CONFIG_PCI_IMX6=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='hunk'>@@ -73,6 +75,7 @@ CONFIG_CAN=y</div><div class='ctx'> CONFIG_CAN_FLEXCAN=y</div><div class='ctx'> CONFIG_BT=y</div><div class='ctx'> CONFIG_BT_HCIUART=y</div><div class='add'>+CONFIG_BT_HCIUART_LL=y</div><div class='ctx'> CONFIG_BT_HCIUART_3WIRE=y</div><div class='ctx'> CONFIG_CFG80211=y</div><div class='ctx'> CONFIG_MAC80211=y</div><div class='hunk'>@@ -139,6 +142,10 @@ CONFIG_USB_RTL8152=m</div><div class='ctx'> CONFIG_USB_USBNET=m</div><div class='ctx'> CONFIG_USB_NET_CDC_EEM=m</div><div class='ctx'> CONFIG_BRCMFMAC=m</div><div class='add'>+CONFIG_WL_TI=y</div><div class='add'>+CONFIG_WL12XX=m</div><div class='add'>+CONFIG_WLCORE_SDIO=m</div><div class='add'>+# CONFIG_WILINK_PLATFORM_DATA is not set</div><div class='ctx'> # CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_INPUT_EVBUG=m</div><div class='hunk'>@@ -151,6 +158,7 @@ CONFIG_TOUCHSCREEN_EGALAX=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_MC13783=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_TSC2007=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_STMPE=y</div><div class='add'>+CONFIG_TOUCHSCREEN_SX8654=y</div><div class='ctx'> CONFIG_INPUT_MISC=y</div><div class='ctx'> CONFIG_INPUT_MMA8450=y</div><div class='ctx'> CONFIG_SERIO_SERPORT=m</div><div class='hunk'>@@ -283,6 +291,7 @@ CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_INTF_DEV_UIE_EMUL=y</div><div class='ctx'> CONFIG_RTC_DRV_DS1307=y</div><div class='ctx'> CONFIG_RTC_DRV_ISL1208=y</div><div class='add'>+CONFIG_RTC_DRV_PCF8523=y</div><div class='ctx'> CONFIG_RTC_DRV_PCF8563=y</div><div class='ctx'> CONFIG_RTC_DRV_MC13XXX=y</div><div class='ctx'> CONFIG_RTC_DRV_MXC=y</div><div class='head'>diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig<br/>index f8a1c8f2c7c4..95ce1284bd42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/keystone_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/keystone_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/keystone_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/keystone_defconfig</a></div><div class='hunk'>@@ -123,6 +123,9 @@ CONFIG_EEPROM_AT24=y</div><div class='ctx'> CONFIG_SCSI=y</div><div class='ctx'> CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_TI_KEYSTONE_NETCP=y</div><div class='add'>+CONFIG_TI_KEYSTONE_NETCP_ETHSS=y</div><div class='add'>+CONFIG_PHYLIB=y</div><div class='ctx'> CONFIG_SERIAL_8250=y</div><div class='ctx'> CONFIG_SERIAL_8250_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_OF_PLATFORM=y</div><div class='hunk'>@@ -152,6 +155,9 @@ CONFIG_USB_DWC3_VERBOSE=y</div><div class='ctx'> CONFIG_KEYSTONE_USB_PHY=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_TI_EDMA=y</div><div class='add'>+CONFIG_SOC_TI=y</div><div class='add'>+CONFIG_KEYSTONE_NAVIGATOR_QMSS=y</div><div class='add'>+CONFIG_KEYSTONE_NAVIGATOR_DMA=y</div><div class='ctx'> CONFIG_MEMORY=y</div><div class='ctx'> CONFIG_TI_AEMIF=y</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='head'>diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig<br/>new file mode 100644<br/>index 000000000000..1c47f86c3970<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/lpc18xx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/lpc18xx_defconfig</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+CONFIG_CROSS_COMPILE="arm-linux-gnueabihf-"</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+# CONFIG_RD_BZIP2 is not set</div><div class='add'>+# CONFIG_RD_LZMA is not set</div><div class='add'>+# CONFIG_RD_XZ is not set</div><div class='add'>+# CONFIG_RD_LZO is not set</div><div class='add'>+# CONFIG_RD_LZ4 is not set</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+# CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_BASE_FULL is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='add'>+CONFIG_ARM_SINGLE_ARMV7M=y</div><div class='add'>+CONFIG_ARCH_LPC18XX=y</div><div class='add'>+CONFIG_SET_MEM_PARAM=y</div><div class='add'>+CONFIG_DRAM_BASE=0x28000000</div><div class='add'>+CONFIG_DRAM_SIZE=0x02000000</div><div class='add'>+CONFIG_FLASH_MEM_BASE=0x1b000000</div><div class='add'>+CONFIG_FLASH_SIZE=0x00080000</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_ARM_APPENDED_DTB=y</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_BINFMT_ZFLAT=y</div><div class='add'>+CONFIG_BINFMT_SHARED_FLAT=y</div><div class='add'>+# CONFIG_COREDUMP is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CFI=y</div><div class='add'>+CONFIG_MTD_CFI_INTELEXT=y</div><div class='add'>+CONFIG_MTD_CFI_AMDSTD=y</div><div class='add'>+CONFIG_MTD_CFI_STAA=y</div><div class='add'>+CONFIG_MTD_PHYSMAP=y</div><div class='add'>+CONFIG_MTD_PHYSMAP_OF=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_SRAM=y</div><div class='add'>+CONFIG_EEPROM_AT24=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_HISILICON is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROCHIP is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_QUALCOMM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ROCKER is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SAMSUNG is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+CONFIG_SMSC_PHY=y</div><div class='add'>+# CONFIG_USB_NET_DRIVERS is not set</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+CONFIG_KEYBOARD_GPIO=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO_POLLED=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_NONSTANDARD=y</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_PL022=y</div><div class='add'>+CONFIG_GPIO_SYSFS=y</div><div class='add'>+CONFIG_GPIO_74XX_MMIO=y</div><div class='add'>+CONFIG_SENSORS_LM75=y</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_WATCHDOG_CORE=y</div><div class='add'>+CONFIG_MFD_SYSCON=y</div><div class='add'>+CONFIG_REGULATOR=y</div><div class='add'>+CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_ARMCLCD=y</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_EHCI_ROOT_HUB_TT=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_DW=y</div><div class='add'>+CONFIG_MMC_DW_IDMAC=y</div><div class='add'>+CONFIG_NEW_LEDS=y</div><div class='add'>+CONFIG_LEDS_CLASS=y</div><div class='add'>+CONFIG_LEDS_PCA9532=y</div><div class='add'>+CONFIG_LEDS_PCA9532_GPIO=y</div><div class='add'>+CONFIG_LEDS_GPIO=y</div><div class='add'>+CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_AMBA_PL08X=y</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+# CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='add'>+CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='add'>+# CONFIG_RCU_CPU_STALL_INFO is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_DEBUG_LL=y</div><div class='add'>+CONFIG_EARLY_PRINTK=y</div><div class='add'>+CONFIG_CRC_ITU_T=y</div><div class='add'>+CONFIG_CRC7=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig<br/>index fbbb1915c6a9..5fd8df6f50ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/multi_v7_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/multi_v7_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/multi_v7_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/multi_v7_defconfig</a></div><div class='hunk'>@@ -20,6 +20,9 @@ CONFIG_MACH_ARMADA_38X=y</div><div class='ctx'> CONFIG_MACH_ARMADA_39X=y</div><div class='ctx'> CONFIG_MACH_ARMADA_XP=y</div><div class='ctx'> CONFIG_MACH_DOVE=y</div><div class='add'>+CONFIG_ARCH_AT91=y</div><div class='add'>+CONFIG_SOC_SAMA5D3=y</div><div class='add'>+CONFIG_SOC_SAMA5D4=y</div><div class='ctx'> CONFIG_ARCH_BCM=y</div><div class='ctx'> CONFIG_ARCH_BCM_CYGNUS=y</div><div class='ctx'> CONFIG_ARCH_BCM_21664=y</div><div class='hunk'>@@ -30,6 +33,7 @@ CONFIG_ARCH_BERLIN=y</div><div class='ctx'> CONFIG_MACH_BERLIN_BG2=y</div><div class='ctx'> CONFIG_MACH_BERLIN_BG2CD=y</div><div class='ctx'> CONFIG_MACH_BERLIN_BG2Q=y</div><div class='add'>+CONFIG_ARCH_DIGICOLOR=y</div><div class='ctx'> CONFIG_ARCH_HIGHBANK=y</div><div class='ctx'> CONFIG_ARCH_HISI=y</div><div class='ctx'> CONFIG_ARCH_HI3xxx=y</div><div class='hunk'>@@ -72,6 +76,7 @@ CONFIG_ARCH_EMEV2=y</div><div class='ctx'> CONFIG_ARCH_R7S72100=y</div><div class='ctx'> CONFIG_ARCH_R8A73A4=y</div><div class='ctx'> CONFIG_ARCH_R8A7740=y</div><div class='add'>+CONFIG_ARCH_R8A7778=y</div><div class='ctx'> CONFIG_ARCH_R8A7779=y</div><div class='ctx'> CONFIG_ARCH_R8A7790=y</div><div class='ctx'> CONFIG_ARCH_R8A7791=y</div><div class='hunk'>@@ -86,6 +91,7 @@ CONFIG_ARCH_TEGRA_3x_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_114_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_124_SOC=y</div><div class='ctx'> CONFIG_TEGRA_EMC_SCALING_ENABLE=y</div><div class='add'>+CONFIG_ARCH_UNIPHIER=y</div><div class='ctx'> CONFIG_ARCH_U8500=y</div><div class='ctx'> CONFIG_MACH_HREFV60=y</div><div class='ctx'> CONFIG_MACH_SNOWBALL=y</div><div class='hunk'>@@ -115,8 +121,11 @@ CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_FREQ_STAT_DETAILS=y</div><div class='ctx'> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='add'>+CONFIG_ARM_CPUIDLE=y</div><div class='ctx'> CONFIG_NEON=y</div><div class='add'>+CONFIG_KERNEL_MODE_NEON=y</div><div class='ctx'> CONFIG_ARM_ZYNQ_CPUIDLE=y</div><div class='add'>+CONFIG_ARM_EXYNOS_CPUIDLE=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='hunk'>@@ -137,6 +146,7 @@ CONFIG_CAN=y</div><div class='ctx'> CONFIG_CAN_RAW=y</div><div class='ctx'> CONFIG_CAN_BCM=y</div><div class='ctx'> CONFIG_CAN_DEV=y</div><div class='add'>+CONFIG_CAN_AT91=m</div><div class='ctx'> CONFIG_CAN_XILINXCAN=y</div><div class='ctx'> CONFIG_CAN_MCP251X=y</div><div class='ctx'> CONFIG_BT=m</div><div class='hunk'>@@ -158,13 +168,17 @@ CONFIG_MTD_CMDLINE_PARTS=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_M25P80=y</div><div class='ctx'> CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_ATMEL=y</div><div class='add'>+CONFIG_MTD_NAND_BRCMNAND=y</div><div class='ctx'> CONFIG_MTD_NAND_DAVINCI=y</div><div class='ctx'> CONFIG_MTD_SPI_NOR=y</div><div class='ctx'> CONFIG_MTD_UBI=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_AD525X_DPOT=y</div><div class='ctx'> CONFIG_AD525X_DPOT_I2C=y</div><div class='add'>+CONFIG_ATMEL_TCLIB=y</div><div class='ctx'> CONFIG_ICS932S401=y</div><div class='add'>+CONFIG_ATMEL_SSC=m</div><div class='ctx'> CONFIG_APDS9802ALS=y</div><div class='ctx'> CONFIG_ISL29003=y</div><div class='ctx'> CONFIG_EEPROM_AT24=y</div><div class='hunk'>@@ -213,12 +227,14 @@ CONFIG_MWIFIEX=m</div><div class='ctx'> CONFIG_MWIFIEX_SDIO=m</div><div class='ctx'> CONFIG_INPUT_JOYDEV=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_KEYBOARD_QT1070=m</div><div class='ctx'> CONFIG_KEYBOARD_GPIO=y</div><div class='ctx'> CONFIG_KEYBOARD_TEGRA=y</div><div class='ctx'> CONFIG_KEYBOARD_SPEAR=y</div><div class='ctx'> CONFIG_KEYBOARD_ST_KEYSCAN=y</div><div class='ctx'> CONFIG_KEYBOARD_CROS_EC=y</div><div class='ctx'> CONFIG_MOUSE_PS2_ELANTECH=y</div><div class='add'>+CONFIG_MOUSE_CYAPA=m</div><div class='ctx'> CONFIG_MOUSE_ELAN_I2C=y</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_ATMEL_MXT=y</div><div class='hunk'>@@ -237,6 +253,9 @@ CONFIG_SERIAL_8250_EM=y</div><div class='ctx'> CONFIG_SERIAL_8250_MT6577=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_ATMEL=y</div><div class='add'>+CONFIG_SERIAL_ATMEL_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_ATMEL_TTYAT=y</div><div class='ctx'> CONFIG_SERIAL_MESON=y</div><div class='ctx'> CONFIG_SERIAL_MESON_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_SAMSUNG=y</div><div class='hunk'>@@ -260,15 +279,20 @@ CONFIG_SERIAL_XILINX_PS_UART=y</div><div class='ctx'> CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_FSL_LPUART=y</div><div class='ctx'> CONFIG_SERIAL_FSL_LPUART_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_CONEXANT_DIGICOLOR=y</div><div class='add'>+CONFIG_SERIAL_CONEXANT_DIGICOLOR_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_ST_ASC=y</div><div class='ctx'> CONFIG_SERIAL_ST_ASC_CONSOLE=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_DAVINCI=y</div><div class='ctx'> CONFIG_I2C_MUX=y</div><div class='add'>+CONFIG_I2C_ARB_GPIO_CHALLENGE=m</div><div class='ctx'> CONFIG_I2C_MUX_PCA954x=y</div><div class='ctx'> CONFIG_I2C_MUX_PINCTRL=y</div><div class='add'>+CONFIG_I2C_AT91=m</div><div class='ctx'> CONFIG_I2C_CADENCE=y</div><div class='ctx'> CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+CONFIG_I2C_DIGICOLOR=m</div><div class='ctx'> CONFIG_I2C_GPIO=m</div><div class='ctx'> CONFIG_I2C_EXYNOS5=y</div><div class='ctx'> CONFIG_I2C_MV64XXX=y</div><div class='hunk'>@@ -280,13 +304,16 @@ CONFIG_I2C_ST=y</div><div class='ctx'> CONFIG_I2C_TEGRA=y</div><div class='ctx'> CONFIG_I2C_XILINX=y</div><div class='ctx'> CONFIG_I2C_RCAR=y</div><div class='add'>+CONFIG_I2C_CROS_EC_TUNNEL=m</div><div class='ctx'> CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_ATMEL=m</div><div class='ctx'> CONFIG_SPI_CADENCE=y</div><div class='ctx'> CONFIG_SPI_DAVINCI=y</div><div class='ctx'> CONFIG_SPI_OMAP24XX=y</div><div class='ctx'> CONFIG_SPI_ORION=y</div><div class='ctx'> CONFIG_SPI_PL022=y</div><div class='ctx'> CONFIG_SPI_RSPI=y</div><div class='add'>+CONFIG_SPI_S3C64XX=m</div><div class='ctx'> CONFIG_SPI_SH_MSIOF=m</div><div class='ctx'> CONFIG_SPI_SH_HSPI=y</div><div class='ctx'> CONFIG_SPI_SIRF=y</div><div class='hunk'>@@ -317,12 +344,15 @@ CONFIG_GPIO_SYSCON=y</div><div class='ctx'> CONFIG_GPIO_TPS6586X=y</div><div class='ctx'> CONFIG_GPIO_TPS65910=y</div><div class='ctx'> CONFIG_BATTERY_SBS=y</div><div class='add'>+CONFIG_BATTERY_MAX17040=m</div><div class='add'>+CONFIG_BATTERY_MAX17042=m</div><div class='add'>+CONFIG_CHARGER_MAX14577=m</div><div class='add'>+CONFIG_CHARGER_MAX77693=m</div><div class='ctx'> CONFIG_CHARGER_TPS65090=y</div><div class='ctx'> CONFIG_POWER_RESET_AS3722=y</div><div class='ctx'> CONFIG_POWER_RESET_GPIO=y</div><div class='ctx'> CONFIG_POWER_RESET_GPIO_RESTART=y</div><div class='ctx'> CONFIG_POWER_RESET_KEYSTONE=y</div><div class='del'>-CONFIG_POWER_RESET_SUN6I=y</div><div class='ctx'> CONFIG_POWER_RESET_RMOBILE=y</div><div class='ctx'> CONFIG_SENSORS_LM90=y</div><div class='ctx'> CONFIG_SENSORS_LM95245=y</div><div class='hunk'>@@ -330,13 +360,15 @@ CONFIG_THERMAL=y</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_RCAR_THERMAL=y</div><div class='ctx'> CONFIG_ARMADA_THERMAL=y</div><div class='del'>-CONFIG_DAVINCI_WATCHDOG</div><div class='add'>+CONFIG_DAVINCI_WATCHDOG=m</div><div class='add'>+CONFIG_EXYNOS_THERMAL=m</div><div class='ctx'> CONFIG_ST_THERMAL_SYSCFG=y</div><div class='ctx'> CONFIG_ST_THERMAL_MEMMAP=y</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_XILINX_WATCHDOG=y</div><div class='ctx'> CONFIG_ARM_SP805_WATCHDOG=y</div><div class='ctx'> CONFIG_ORION_WATCHDOG=y</div><div class='add'>+CONFIG_ST_LPC_WATCHDOG=y</div><div class='ctx'> CONFIG_SUNXI_WATCHDOG=y</div><div class='ctx'> CONFIG_MESON_WATCHDOG=y</div><div class='ctx'> CONFIG_MFD_AS3711=y</div><div class='hunk'>@@ -344,8 +376,11 @@ CONFIG_MFD_AS3722=y</div><div class='ctx'> CONFIG_MFD_BCM590XX=y</div><div class='ctx'> CONFIG_MFD_AXP20X=y</div><div class='ctx'> CONFIG_MFD_CROS_EC=y</div><div class='add'>+CONFIG_MFD_CROS_EC_I2C=m</div><div class='ctx'> CONFIG_MFD_CROS_EC_SPI=y</div><div class='add'>+CONFIG_MFD_MAX14577=y</div><div class='ctx'> CONFIG_MFD_MAX77686=y</div><div class='add'>+CONFIG_MFD_MAX77693=y</div><div class='ctx'> CONFIG_MFD_MAX8907=y</div><div class='ctx'> CONFIG_MFD_SEC_CORE=y</div><div class='ctx'> CONFIG_MFD_STMPE=y</div><div class='hunk'>@@ -362,9 +397,11 @@ CONFIG_REGULATOR_DA9210=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='ctx'> CONFIG_MFD_SYSCON=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON=y</div><div class='add'>+CONFIG_REGULATOR_MAX14577=m</div><div class='ctx'> CONFIG_REGULATOR_MAX8907=y</div><div class='ctx'> CONFIG_REGULATOR_MAX8973=y</div><div class='ctx'> CONFIG_REGULATOR_MAX77686=y</div><div class='add'>+CONFIG_REGULATOR_MAX77693=m</div><div class='ctx'> CONFIG_REGULATOR_PALMAS=y</div><div class='ctx'> CONFIG_REGULATOR_S2MPS11=y</div><div class='ctx'> CONFIG_REGULATOR_S5M8767=y</div><div class='hunk'>@@ -375,7 +412,7 @@ CONFIG_REGULATOR_TPS6586X=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65910=y</div><div class='ctx'> CONFIG_REGULATOR_TWL4030=y</div><div class='ctx'> CONFIG_REGULATOR_VEXPRESS=y</div><div class='del'>-CONFIG_MEDIA_SUPPORT=y</div><div class='add'>+CONFIG_MEDIA_SUPPORT=m</div><div class='ctx'> CONFIG_MEDIA_CAMERA_SUPPORT=y</div><div class='ctx'> CONFIG_MEDIA_CONTROLLER=y</div><div class='ctx'> CONFIG_VIDEO_V4L2_SUBDEV_API=y</div><div class='hunk'>@@ -390,9 +427,17 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y</div><div class='ctx'> CONFIG_VIDEO_RENESAS_VSP1=m</div><div class='ctx'> # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set</div><div class='ctx'> CONFIG_VIDEO_ADV7180=m</div><div class='add'>+CONFIG_VIDEO_ML86V7667=m</div><div class='ctx'> CONFIG_DRM=y</div><div class='add'>+CONFIG_DRM_PTN3460=m</div><div class='add'>+CONFIG_DRM_PS8622=m</div><div class='add'>+CONFIG_DRM_EXYNOS=m</div><div class='add'>+CONFIG_DRM_EXYNOS_DSI=y</div><div class='add'>+CONFIG_DRM_EXYNOS_FIMD=y</div><div class='add'>+CONFIG_DRM_EXYNOS_HDMI=y</div><div class='ctx'> CONFIG_DRM_RCAR_DU=m</div><div class='ctx'> CONFIG_DRM_TEGRA=y</div><div class='add'>+CONFIG_DRM_PANEL_S6E8AA0=m</div><div class='ctx'> CONFIG_DRM_PANEL_SIMPLE=y</div><div class='ctx'> CONFIG_FB_ARMCLCD=y</div><div class='ctx'> CONFIG_FB_WM8505=y</div><div class='hunk'>@@ -401,24 +446,27 @@ CONFIG_FB_SIMPLE=y</div><div class='ctx'> CONFIG_FB_SH_MOBILE_MERAM=y</div><div class='ctx'> CONFIG_BACKLIGHT_LCD_SUPPORT=y</div><div class='ctx'> CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='add'>+CONFIG_LCD_PLATFORM=m</div><div class='ctx'> CONFIG_BACKLIGHT_PWM=y</div><div class='ctx'> CONFIG_BACKLIGHT_AS3711=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y</div><div class='del'>-CONFIG_SOUND=y</div><div class='del'>-CONFIG_SND=y</div><div class='add'>+CONFIG_SOUND=m</div><div class='add'>+CONFIG_SND=m</div><div class='ctx'> CONFIG_SND_DYNAMIC_MINORS=y</div><div class='ctx'> CONFIG_SND_USB_AUDIO=y</div><div class='del'>-CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_SOC=m</div><div class='add'>+CONFIG_SND_ATMEL_SOC=m</div><div class='add'>+CONFIG_SND_ATMEL_SOC_WM8904=m</div><div class='ctx'> CONFIG_SND_SOC_SH4_FSI=m</div><div class='ctx'> CONFIG_SND_SOC_RCAR=m</div><div class='del'>-CONFIG_SND_SOC_TEGRA=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_RT5640=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_WM8753=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_WM8903=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_TRIMSLICE=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_ALC5632=y</div><div class='del'>-CONFIG_SND_SOC_TEGRA_MAX98090=y</div><div class='add'>+CONFIG_SND_SOC_TEGRA=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_RT5640=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_WM8753=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_WM8903=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_TRIMSLICE=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_ALC5632=m</div><div class='add'>+CONFIG_SND_SOC_TEGRA_MAX98090=m</div><div class='ctx'> CONFIG_SND_SOC_AK4642=m</div><div class='ctx'> CONFIG_SND_SOC_WM8978=m</div><div class='ctx'> CONFIG_USB=y</div><div class='hunk'>@@ -433,6 +481,7 @@ CONFIG_USB_ISP1760=y</div><div class='ctx'> CONFIG_USB_OHCI_HCD=y</div><div class='ctx'> CONFIG_USB_OHCI_HCD_STI=y</div><div class='ctx'> CONFIG_USB_OHCI_HCD_PLATFORM=y</div><div class='add'>+CONFIG_USB_OHCI_EXYNOS=m</div><div class='ctx'> CONFIG_USB_R8A66597_HCD=m</div><div class='ctx'> CONFIG_USB_RENESAS_USBHS=m</div><div class='ctx'> CONFIG_USB_STORAGE=y</div><div class='hunk'>@@ -448,7 +497,6 @@ CONFIG_USB_GPIO_VBUS=y</div><div class='ctx'> CONFIG_USB_ISP1301=y</div><div class='ctx'> CONFIG_USB_MXS_PHY=y</div><div class='ctx'> CONFIG_USB_RCAR_PHY=m</div><div class='del'>-CONFIG_USB_RCAR_GEN2_PHY=m</div><div class='ctx'> CONFIG_USB_GADGET=y</div><div class='ctx'> CONFIG_USB_RENESAS_USBHS_UDC=m</div><div class='ctx'> CONFIG_MMC=y</div><div class='hunk'>@@ -468,6 +516,7 @@ CONFIG_MMC_SDHCI_BCM_KONA=y</div><div class='ctx'> CONFIG_MMC_SDHCI_ST=y</div><div class='ctx'> CONFIG_MMC_OMAP=y</div><div class='ctx'> CONFIG_MMC_OMAP_HS=y</div><div class='add'>+CONFIG_MMC_ATMELMCI=y</div><div class='ctx'> CONFIG_MMC_MVSDIO=y</div><div class='ctx'> CONFIG_MMC_SDHI=y</div><div class='ctx'> CONFIG_MMC_DW=y</div><div class='hunk'>@@ -500,14 +549,22 @@ CONFIG_RTC_DRV_AS3722=y</div><div class='ctx'> CONFIG_RTC_DRV_DS1307=y</div><div class='ctx'> CONFIG_RTC_DRV_MAX8907=y</div><div class='ctx'> CONFIG_RTC_DRV_MAX77686=y</div><div class='add'>+CONFIG_RTC_DRV_MAX77802=m</div><div class='ctx'> CONFIG_RTC_DRV_RS5C372=m</div><div class='ctx'> CONFIG_RTC_DRV_PALMAS=y</div><div class='add'>+CONFIG_RTC_DRV_ST_LPC=y</div><div class='ctx'> CONFIG_RTC_DRV_TWL4030=y</div><div class='ctx'> CONFIG_RTC_DRV_TPS6586X=y</div><div class='ctx'> CONFIG_RTC_DRV_TPS65910=y</div><div class='ctx'> CONFIG_RTC_DRV_S35390A=m</div><div class='add'>+CONFIG_RTC_DRV_RX8581=m</div><div class='ctx'> CONFIG_RTC_DRV_EM3027=y</div><div class='add'>+CONFIG_RTC_DRV_DIGICOLOR=m</div><div class='add'>+CONFIG_RTC_DRV_S5M=m</div><div class='add'>+CONFIG_RTC_DRV_S3C=m</div><div class='ctx'> CONFIG_RTC_DRV_PL031=y</div><div class='add'>+CONFIG_RTC_DRV_AT91RM9200=m</div><div class='add'>+CONFIG_RTC_DRV_AT91SAM9=m</div><div class='ctx'> CONFIG_RTC_DRV_VT8500=y</div><div class='ctx'> CONFIG_RTC_DRV_SUN6I=y</div><div class='ctx'> CONFIG_RTC_DRV_SUNXI=y</div><div class='hunk'>@@ -515,6 +572,8 @@ CONFIG_RTC_DRV_MV=y</div><div class='ctx'> CONFIG_RTC_DRV_TEGRA=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_DW_DMAC=y</div><div class='add'>+CONFIG_AT_HDMAC=y</div><div class='add'>+CONFIG_AT_XDMAC=y</div><div class='ctx'> CONFIG_MV_XOR=y</div><div class='ctx'> CONFIG_TEGRA20_APB_DMA=y</div><div class='ctx'> CONFIG_SH_DMAE=y</div><div class='hunk'>@@ -537,8 +596,13 @@ CONFIG_SERIO_NVEC_PS2=y</div><div class='ctx'> CONFIG_NVEC_POWER=y</div><div class='ctx'> CONFIG_NVEC_PAZ00=y</div><div class='ctx'> CONFIG_QCOM_GSBI=y</div><div class='add'>+CONFIG_QCOM_PM=y</div><div class='ctx'> CONFIG_COMMON_CLK_QCOM=y</div><div class='add'>+CONFIG_CHROME_PLATFORMS=y</div><div class='add'>+CONFIG_CROS_EC_CHARDEV=m</div><div class='ctx'> CONFIG_COMMON_CLK_MAX77686=y</div><div class='add'>+CONFIG_COMMON_CLK_MAX77802=m</div><div class='add'>+CONFIG_COMMON_CLK_S2MPS11=m</div><div class='ctx'> CONFIG_APQ_MMCC_8084=y</div><div class='ctx'> CONFIG_MSM_GCC_8660=y</div><div class='ctx'> CONFIG_MSM_MMCC_8960=y</div><div class='hunk'>@@ -550,10 +614,14 @@ CONFIG_ARM_TEGRA_DEVFREQ=m</div><div class='ctx'> CONFIG_MEMORY=y</div><div class='ctx'> CONFIG_TI_AEMIF=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='add'>+CONFIG_AT91_ADC=m</div><div class='ctx'> CONFIG_XILINX_XADC=y</div><div class='ctx'> CONFIG_AK8975=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='add'>+CONFIG_PWM_ATMEL=m</div><div class='add'>+CONFIG_PWM_ATMEL_TCB=m</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='add'>+CONFIG_PWM_SAMSUNG=m</div><div class='ctx'> CONFIG_PWM_TEGRA=y</div><div class='ctx'> CONFIG_PWM_VT8500=y</div><div class='ctx'> CONFIG_PHY_HIX5HD2_SATA=y</div><div class='hunk'>@@ -561,10 +629,12 @@ CONFIG_OMAP_USB2=y</div><div class='ctx'> CONFIG_TI_PIPE3=y</div><div class='ctx'> CONFIG_PHY_MIPHY28LP=y</div><div class='ctx'> CONFIG_PHY_MIPHY365X=y</div><div class='add'>+CONFIG_PHY_RCAR_GEN2=m</div><div class='ctx'> CONFIG_PHY_STIH41X_USB=y</div><div class='ctx'> CONFIG_PHY_STIH407_USB=y</div><div class='ctx'> CONFIG_PHY_SUN4I_USB=y</div><div class='ctx'> CONFIG_PHY_SUN9I_USB=y</div><div class='add'>+CONFIG_PHY_SAMSUNG_USB2=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> CONFIG_AUTOFS4_FS=y</div><div class='ctx'> CONFIG_MSDOS_FS=y</div><div class='hunk'>@@ -590,3 +660,17 @@ CONFIG_LOCKUP_DETECTOR=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_TEGRA_AES=y</div><div class='ctx'> CONFIG_CPUFREQ_DT=y</div><div class='ctx'> CONFIG_KEYSTONE_IRQ=y</div><div class='add'>+CONFIG_ARM_CRYPTO=y</div><div class='add'>+CONFIG_CRYPTO_SHA1_ARM=m</div><div class='add'>+CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='add'>+CONFIG_CRYPTO_SHA1_ARM_CE=m</div><div class='add'>+CONFIG_CRYPTO_SHA2_ARM_CE=m</div><div class='add'>+CONFIG_CRYPTO_SHA256_ARM=m</div><div class='add'>+CONFIG_CRYPTO_SHA512_ARM=m</div><div class='add'>+CONFIG_CRYPTO_AES_ARM=m</div><div class='add'>+CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='add'>+CONFIG_CRYPTO_AES_ARM_CE=m</div><div class='add'>+CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='add'>+CONFIG_CRYPTO_DEV_ATMEL_AES=m</div><div class='add'>+CONFIG_CRYPTO_DEV_ATMEL_TDES=m</div><div class='add'>+CONFIG_CRYPTO_DEV_ATMEL_SHA=m</div><div class='head'>diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig<br/>index 3743ca221d40..ac521e764d10 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/omap2plus_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/omap2plus_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/omap2plus_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/omap2plus_defconfig</a></div><div class='hunk'>@@ -152,6 +152,7 @@ CONFIG_NETDEVICES=y</div><div class='ctx'> # CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+CONFIG_DM9000=y</div><div class='ctx'> # CONFIG_NET_VENDOR_FARADAY is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_HISILICON is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='hunk'>@@ -204,6 +205,7 @@ CONFIG_KEYBOARD_TWL4030=m</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_ADS7846=m</div><div class='ctx'> CONFIG_TOUCHSCREEN_EDT_FT5X06=m</div><div class='add'>+CONFIG_TOUCHSCREEN_PIXCIR=m</div><div class='ctx'> CONFIG_TOUCHSCREEN_TSC2005=m</div><div class='ctx'> CONFIG_TOUCHSCREEN_TSC2007=m</div><div class='ctx'> CONFIG_INPUT_MISC=y</div><div class='hunk'>@@ -401,6 +403,7 @@ CONFIG_PWM_TIECAP=m</div><div class='ctx'> CONFIG_PWM_TIEHRPWM=m</div><div class='ctx'> CONFIG_PWM_TWL=m</div><div class='ctx'> CONFIG_PWM_TWL_LED=m</div><div class='add'>+CONFIG_PHY_DM816X_USB=m</div><div class='ctx'> CONFIG_OMAP_USB2=m</div><div class='ctx'> CONFIG_TI_PIPE3=y</div><div class='ctx'> CONFIG_TWL4030_USB=m</div><div class='head'>diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig<br/>index d2f2babfd47a..e6a6f282e3de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/qcom_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/qcom_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/qcom_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/qcom_defconfig</a></div><div class='hunk'>@@ -30,6 +30,7 @@ CONFIG_CLEANCACHE=y</div><div class='ctx'> CONFIG_ARM_APPENDED_DTB=y</div><div class='ctx'> CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='add'>+CONFIG_ARM_CPUIDLE=y</div><div class='ctx'> CONFIG_VFP=y</div><div class='ctx'> CONFIG_NEON=y</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='hunk'>@@ -143,6 +144,7 @@ CONFIG_MSM_MMCC_8960=y</div><div class='ctx'> CONFIG_MSM_MMCC_8974=y</div><div class='ctx'> CONFIG_MSM_IOMMU=y</div><div class='ctx'> CONFIG_QCOM_GSBI=y</div><div class='add'>+CONFIG_QCOM_PM=y</div><div class='ctx'> CONFIG_PHY_QCOM_APQ8064_SATA=y</div><div class='ctx'> CONFIG_PHY_QCOM_IPQ806X_SATA=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='head'>diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig<br/>index 510c747c65b4..31eb951880ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/sama5_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/sama5_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/sama5_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/sama5_defconfig</a></div><div class='hunk'>@@ -136,6 +136,7 @@ CONFIG_POWER_RESET=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> CONFIG_SSB=m</div><div class='ctx'> CONFIG_REGULATOR=y</div><div class='add'>+CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_REGULATOR_ACT8865=y</div><div class='ctx'> CONFIG_MEDIA_SUPPORT=y</div><div class='ctx'> CONFIG_MEDIA_CAMERA_SUPPORT=y</div><div class='head'>diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig<br/>index b58618e2d13c..9961fbd633f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/shmobile_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/shmobile_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/shmobile_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/shmobile_defconfig</a></div><div class='hunk'>@@ -121,7 +121,6 @@ CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_DA9063_WATCHDOG=y</div><div class='ctx'> CONFIG_MFD_AS3711=y</div><div class='ctx'> CONFIG_MFD_DA9063=y</div><div class='del'>-CONFIG_REGULATOR=y</div><div class='ctx'> CONFIG_REGULATOR_AS3711=y</div><div class='ctx'> CONFIG_REGULATOR_DA9210=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='hunk'>@@ -160,7 +159,6 @@ CONFIG_USB_OHCI_HCD=y</div><div class='ctx'> CONFIG_USB_R8A66597_HCD=y</div><div class='ctx'> CONFIG_USB_RENESAS_USBHS=y</div><div class='ctx'> CONFIG_USB_RCAR_PHY=y</div><div class='del'>-CONFIG_USB_RCAR_GEN2_PHY=y</div><div class='ctx'> CONFIG_USB_GADGET=y</div><div class='ctx'> CONFIG_USB_RENESAS_USBHS_UDC=y</div><div class='ctx'> CONFIG_USB_ETH=y</div><div class='hunk'>@@ -182,6 +180,8 @@ CONFIG_IIO=y</div><div class='ctx'> CONFIG_AK8975=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='add'>+CONFIG_GENERIC_PHY=y</div><div class='add'>+CONFIG_PHY_RCAR_GEN2=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> CONFIG_MSDOS_FS=y</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='head'>diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig<br/>new file mode 100644<br/>index 000000000000..4725fab562cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/stm32_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/stm32_defconfig</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+CONFIG_NO_HZ_IDLE=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=16</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+# CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_BASE_FULL is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_SLUB_DEBUG is not set</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='add'>+CONFIG_ARM_SINGLE_ARMV7M=y</div><div class='add'>+CONFIG_ARCH_STM32=y</div><div class='add'>+CONFIG_SET_MEM_PARAM=y</div><div class='add'>+CONFIG_DRAM_BASE=0x90000000</div><div class='add'>+CONFIG_FLASH_MEM_BASE=0x08000000</div><div class='add'>+CONFIG_FLASH_SIZE=0x00200000</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_ATAGS is not set</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_XIP_KERNEL=y</div><div class='add'>+CONFIG_XIP_PHYS_ADDR=0x08008000</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_BINFMT_SHARED_FLAT=y</div><div class='add'>+# CONFIG_COREDUMP is not set</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+# CONFIG_BLK_DEV is not set</div><div class='add'>+CONFIG_EEPROM_93CX6=y</div><div class='add'>+# CONFIG_INPUT is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_NONSTANDARD=y</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_STM32=y</div><div class='add'>+CONFIG_SERIAL_STM32_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+CONFIG_NEW_LEDS=y</div><div class='add'>+CONFIG_LEDS_CLASS=y</div><div class='add'>+CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+CONFIG_NLS=y</div><div class='add'>+CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_CRC_ITU_T=y</div><div class='add'>+CONFIG_CRC7=y</div><div class='head'>diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig<br/>index 8ecba00dcd83..7ebc346bf9fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/sunxi_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/sunxi_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/sunxi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/sunxi_defconfig</a></div><div class='hunk'>@@ -2,6 +2,7 @@ CONFIG_NO_HZ=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='ctx'> CONFIG_ARCH_SUNXI=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_NR_CPUS=8</div><div class='hunk'>@@ -77,7 +78,6 @@ CONFIG_SPI_SUN6I=y</div><div class='ctx'> CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_POWER_SUPPLY=y</div><div class='ctx'> CONFIG_POWER_RESET=y</div><div class='del'>-CONFIG_POWER_RESET_SUN6I=y</div><div class='ctx'> CONFIG_THERMAL=y</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='hunk'>@@ -87,6 +87,10 @@ CONFIG_REGULATOR=y</div><div class='ctx'> CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_REGULATOR_AXP20X=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_SIMPLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='ctx'> CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='head'>diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig<br/>index d199eb249151..cdf9abb46015 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/tegra_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/tegra_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/tegra_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/tegra_defconfig</a></div><div class='hunk'>@@ -154,6 +154,8 @@ CONFIG_POWER_RESET_AS3722=y</div><div class='ctx'> CONFIG_POWER_RESET_GPIO=y</div><div class='ctx'> CONFIG_SENSORS_LM90=y</div><div class='ctx'> CONFIG_SENSORS_LM95245=y</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_TEGRA_WATCHDOG=y</div><div class='ctx'> CONFIG_MFD_AS3722=y</div><div class='ctx'> CONFIG_MFD_CROS_EC=y</div><div class='ctx'> CONFIG_MFD_CROS_EC_SPI=y</div><div class='hunk'>@@ -194,6 +196,14 @@ CONFIG_SOUND=y</div><div class='ctx'> CONFIG_SND=y</div><div class='ctx'> # CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='ctx'> # CONFIG_SND_DRIVERS is not set</div><div class='add'>+CONFIG_SND_HDA=y</div><div class='add'>+CONFIG_SND_HDA_TEGRA=y</div><div class='add'>+CONFIG_SND_HDA_INPUT_BEEP=y</div><div class='add'>+CONFIG_SND_HDA_INPUT_JACK=y</div><div class='add'>+CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI=y</div><div class='add'>+CONFIG_SND_HDA_GENERIC=y</div><div class='ctx'> # CONFIG_SND_ARM is not set</div><div class='ctx'> # CONFIG_SND_SPI is not set</div><div class='ctx'> # CONFIG_SND_USB is not set</div><div class='head'>diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig<br/>index 6a1c9898fd03..07055eacbb0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/u8500_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/configs/u8500_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/u8500_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/u8500_defconfig</a></div><div class='hunk'>@@ -4,6 +4,7 @@ CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='hunk'>@@ -134,6 +135,10 @@ CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> # CONFIG_DEBUG_PREEMPT is not set</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='ctx'> CONFIG_DEBUG_USER=y</div><div class='add'>+CONFIG_CORESIGHT=y</div><div class='add'>+CONFIG_CORESIGHT_SINK_TPIU=y</div><div class='add'>+CONFIG_CORESIGHT_SINK_ETBV10=y</div><div class='add'>+CONFIG_CORESIGHT_SOURCE_ETM3X=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_UX500=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_UX500_CRYP=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_UX500_HASH=y</div><div class='head'>diff --git a/arch/arm/configs/vf610m4_defconfig b/arch/arm/configs/vf610m4_defconfig<br/>new file mode 100644<br/>index 000000000000..aeb2482c492e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/vf610m4_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/vf610m4_defconfig</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+# CONFIG_RD_BZIP2 is not set</div><div class='add'>+# CONFIG_RD_LZMA is not set</div><div class='add'>+# CONFIG_RD_XZ is not set</div><div class='add'>+# CONFIG_RD_LZ4 is not set</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_MMU is not set</div><div class='add'>+CONFIG_ARM_SINGLE_ARMV7M=y</div><div class='add'>+CONFIG_ARCH_MXC=y</div><div class='add'>+CONFIG_SOC_VF610=y</div><div class='add'>+CONFIG_SET_MEM_PARAM=y</div><div class='add'>+CONFIG_DRAM_BASE=0x8c000000</div><div class='add'>+CONFIG_FLASH_MEM_BASE=0x8f000000</div><div class='add'>+CONFIG_FLASH_SIZE=0x01000000</div><div class='add'>+CONFIG_CMDLINE="console=/dev/ttyLP2"</div><div class='add'>+CONFIG_XIP_KERNEL=y</div><div class='add'>+CONFIG_XIP_PHYS_ADDR=0x0f000080</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_BINFMT_ZFLAT=y</div><div class='add'>+CONFIG_BINFMT_SHARED_FLAT=y</div><div class='add'>+# CONFIG_SUSPEND is not set</div><div class='add'>+# CONFIG_UEVENT_HELPER is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FIRMWARE_IN_KERNEL is not set</div><div class='add'>+# CONFIG_ALLOW_DEV_COREDUMP is not set</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_COUNT=4</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+CONFIG_SERIAL_FSL_LPUART=y</div><div class='add'>+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_MFD_SYSCON=y</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arm/configs/zx_defconfig b/arch/arm/configs/zx_defconfig<br/>new file mode 100644<br/>index 000000000000..b200bb0fecdd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/zx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/configs/zx_defconfig</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_NO_HZ=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_CGROUPS=y</div><div class='add'>+CONFIG_CGROUP_DEBUG=y</div><div class='add'>+CONFIG_CGROUP_FREEZER=y</div><div class='add'>+CONFIG_CGROUP_CPUACCT=y</div><div class='add'>+CONFIG_RESOURCE_COUNTERS=y</div><div class='add'>+CONFIG_CGROUP_SCHED=y</div><div class='add'>+CONFIG_RT_GROUP_SCHED=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+CONFIG_USER_NS=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_SYSCTL_SYSCALL=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARCH_ZX=y</div><div class='add'>+CONFIG_SOC_ZX296702=y</div><div class='add'>+# CONFIG_SWP_EMULATE is not set</div><div class='add'>+CONFIG_ARM_ERRATA_754322=y</div><div class='add'>+CONFIG_ARM_ERRATA_775420=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+CONFIG_VMSPLIT_2G=y</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_AEABI=y</div><div class='add'>+CONFIG_KSM=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_VFP=y</div><div class='add'>+CONFIG_NEON=y</div><div class='add'>+CONFIG_KERNEL_MODE_NEON=y</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+CONFIG_HIBERNATION=y</div><div class='add'>+CONFIG_PM_RUNTIME=y</div><div class='add'>+CONFIG_PM_DEBUG=y</div><div class='add'>+CONFIG_SUSPEND_TIME=y</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_CMDLINE="console=ttyAMA0,115200 debug earlyprintk root=/dev/ram rw rootwait"</div><div class='add'>+#CONFIG_NET is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+CONFIG_DMA_CMA=y</div><div class='add'>+CONFIG_CMA_SIZE_MBYTES=192</div><div class='add'>+CONFIG_BLK_DEV_LOOP=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_COUNT=1</div><div class='add'>+CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='add'>+CONFIG_UID_STAT=y</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_CHR_DEV_SG=y</div><div class='add'>+CONFIG_CHR_DEV_SCH=y</div><div class='add'>+CONFIG_SCSI_MULTI_LUN=y</div><div class='add'>+CONFIG_MD=y</div><div class='add'>+CONFIG_BLK_DEV_DM=y</div><div class='add'>+CONFIG_DM_CRYPT=y</div><div class='add'>+CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_VERITY=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_SERIO=y</div><div class='add'>+CONFIG_SERIO_LIBPS2=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+CONFIG_SERIAL_CORE=y</div><div class='add'>+CONFIG_SERIAL_CORE_CONSOLE=y</div><div class='add'>+CONFIG_CONSOLE_POLL=y</div><div class='add'>+CONFIG_SERIAL_AMBA_PL011=y</div><div class='add'>+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_UNSAFE_RESUME=y</div><div class='add'>+CONFIG_MMC_BLOCK_MINORS=16</div><div class='add'>+CONFIG_MMC_DW=y</div><div class='add'>+CONFIG_MMC_DW_IDMAC=y</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='add'>+CONFIG_EXT4_FS_SECURITY=y</div><div class='add'>+CONFIG_EXT4_DEBUG=y</div><div class='add'>+CONFIG_FUSE_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_FAT_DEFAULT_CODEPAGE=936</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_TMPFS_POSIX_ACL=y</div><div class='add'>+#CONFIG_NFS_FS is not set</div><div class='add'>+CONFIG_NLS_CODEPAGE_936=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+CONFIG_NLS_UTF8=y</div><div class='add'>+CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+CONFIG_DEBUG_KERNEL=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+CONFIG_FRAME_WARN=4096</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_DEBUG_MEMORY_INIT=y</div><div class='add'>+CONFIG_PANIC_TIMEOUT=5</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+CONFIG_SCHEDSTATS=y</div><div class='add'>+CONFIG_TIMER_STATS=y</div><div class='add'>+CONFIG_DEBUG_RT_MUTEXES=y</div><div class='add'>+CONFIG_DEBUG_SPINLOCK=y</div><div class='add'>+CONFIG_DEBUG_MUTEXES=y</div><div class='add'>+CONFIG_RCU_CPU_STALL_TIMEOUT=60</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_KGDB=y</div><div class='add'>+CONFIG_KGDB_KDB=y</div><div class='add'>+# CONFIG_ARM_UNWIND is not set</div><div class='add'>+CONFIG_DEBUG_PREEMPT=y</div><div class='add'>+CONFIG_DEBUG_USER=y</div><div class='add'>+CONFIG_DEBUG_LL=y</div><div class='add'>+CONFIG_DYNAMIC_DEBUG=y</div><div class='add'>+CONFIG_STACKTRACE=y</div><div class='add'>+CONFIG_DEBUG_ZTE_ZX=y</div><div class='add'>+CONFIG_EARLY_PRINTK=y</div><div class='add'>+CONFIG_CRYPTO_LZO=y</div><div class='add'>+CONFIG_GPIOLIB=y</div><div class='head'>diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig<br/>index 8da2207b0072..27ed1b1cd1d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/crypto/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/crypto/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/Kconfig</a></div><div class='hunk'>@@ -53,20 +53,13 @@ config CRYPTO_SHA256_ARM</div><div class='ctx'> 	  SHA-256 secure hash standard (DFIPS 180-2) implemented</div><div class='ctx'> 	  using optimized ARM assembler and NEON, when available.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA512_ARM_NEON</div><div class='del'>-	tristate "SHA384 and SHA512 digest algorithm (ARM NEON)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SHA512</div><div class='add'>+config CRYPTO_SHA512_ARM</div><div class='add'>+	tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='add'>+	depends on !CPU_V7M</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-512 secure hash standard (DFIPS 180-2) implemented</div><div class='del'>-	  using ARM NEON instructions, when available.</div><div class='del'>-</div><div class='del'>-	  This version of SHA implements a 512 bit hash with 256 bits of</div><div class='del'>-	  security against collision attacks.</div><div class='del'>-</div><div class='del'>-	  This code also includes SHA-384, a 384 bit hash with 192 bits</div><div class='del'>-	  of security against collision attacks.</div><div class='add'>+	  using optimized ARM assembler and NEON, when available.</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_ARM</div><div class='ctx'> 	tristate "AES cipher algorithms (ARM-asm)"</div><div class='head'>diff --git a/arch/arm/crypto/Makefile b/arch/arm/crypto/Makefile<br/>index 6ea828241fcb..fc5150702b64 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/crypto/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/crypto/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/Makefile</a></div><div class='hunk'>@@ -7,7 +7,7 @@ obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_ARM_NEON) += sha512-arm-neon.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o</div><div class='ctx'> </div><div class='ctx'> ce-obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o</div><div class='ctx'> ce-obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o</div><div class='hunk'>@@ -30,7 +30,8 @@ sha1-arm-y	:= sha1-armv4-large.o sha1_glue.o</div><div class='ctx'> sha1-arm-neon-y	:= sha1-armv7-neon.o sha1_neon_glue.o</div><div class='ctx'> sha256-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha256_neon_glue.o</div><div class='ctx'> sha256-arm-y	:= sha256-core.o sha256_glue.o $(sha256-arm-neon-y)</div><div class='del'>-sha512-arm-neon-y := sha512-armv7-neon.o sha512_neon_glue.o</div><div class='add'>+sha512-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha512-neon-glue.o</div><div class='add'>+sha512-arm-y	:= sha512-core.o sha512-glue.o $(sha512-arm-neon-y)</div><div class='ctx'> sha1-arm-ce-y	:= sha1-ce-core.o sha1-ce-glue.o</div><div class='ctx'> sha2-arm-ce-y	:= sha2-ce-core.o sha2-ce-glue.o</div><div class='ctx'> aes-arm-ce-y	:= aes-ce-core.o aes-ce-glue.o</div><div class='hunk'>@@ -45,4 +46,7 @@ $(src)/aesbs-core.S_shipped: $(src)/bsaes-armv7.pl</div><div class='ctx'> $(src)/sha256-core.S_shipped: $(src)/sha256-armv4.pl</div><div class='ctx'> 	$(call cmd,perl)</div><div class='ctx'> </div><div class='del'>-.PRECIOUS: $(obj)/aesbs-core.S $(obj)/sha256-core.S</div><div class='add'>+$(src)/sha512-core.S_shipped: $(src)/sha512-armv4.pl</div><div class='add'>+	$(call cmd,perl)</div><div class='add'>+</div><div class='add'>+.PRECIOUS: $(obj)/aesbs-core.S $(obj)/sha256-core.S $(obj)/sha512-core.S</div><div class='head'>diff --git a/arch/arm/crypto/aes-ce-core.S b/arch/arm/crypto/aes-ce-core.S<br/>index 8cfa468ee570..987aa632c9f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/crypto/aes-ce-core.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/crypto/aes-ce-core.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/aes-ce-core.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/aes-ce-core.S</a></div><div class='hunk'>@@ -101,15 +101,14 @@</div><div class='ctx'> 	\dround		q10, q11</div><div class='ctx'> 	blo		0f			@ AES-128: 10 rounds</div><div class='ctx'> 	vld1.8		{q10-q11}, [ip]!</div><div class='del'>-	beq		1f			@ AES-192: 12 rounds</div><div class='ctx'> 	\dround		q12, q13</div><div class='add'>+	beq		1f			@ AES-192: 12 rounds</div><div class='ctx'> 	vld1.8		{q12-q13}, [ip]</div><div class='ctx'> 	\dround		q10, q11</div><div class='ctx'> 0:	\fround		q12, q13, q14</div><div class='ctx'> 	bx		lr</div><div class='ctx'> </div><div class='del'>-1:	\dround		q12, q13</div><div class='del'>-	\fround		q10, q11, q14</div><div class='add'>+1:	\fround		q10, q11, q14</div><div class='ctx'> 	bx		lr</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -122,8 +121,8 @@</div><div class='ctx'> 	 *   q2        : third in/output block (_3x version only)</div><div class='ctx'> 	 *   q8        : first round key</div><div class='ctx'> 	 *   q9        : secound round key</div><div class='del'>-	 *   ip        : address of 3rd round key</div><div class='ctx'> 	 *   q14       : final round key</div><div class='add'>+	 *   r2        : address of round key array</div><div class='ctx'> 	 *   r3        : number of rounds</div><div class='ctx'> 	 */</div><div class='ctx'> 	.align		6</div><div class='head'>diff --git a/arch/arm/crypto/sha512-armv4.pl b/arch/arm/crypto/sha512-armv4.pl<br/>new file mode 100644<br/>index 000000000000..a2b11a844357<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/sha512-armv4.pl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-armv4.pl</a></div><div class='hunk'>@@ -0,0 +1,649 @@</div><div class='add'>+#!/usr/bin/env perl</div><div class='add'>+</div><div class='add'>+# ====================================================================</div><div class='add'>+# Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='add'>+# project. The module is, however, dual licensed under OpenSSL and</div><div class='add'>+# CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='add'>+# details see http://www.openssl.org/~appro/cryptogams/.</div><div class='add'>+#</div><div class='add'>+# Permission to use under GPL terms is granted.</div><div class='add'>+# ====================================================================</div><div class='add'>+</div><div class='add'>+# SHA512 block procedure for ARMv4. September 2007.</div><div class='add'>+</div><div class='add'>+# This code is ~4.5 (four and a half) times faster than code generated</div><div class='add'>+# by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue</div><div class='add'>+# Xscale PXA250 core].</div><div class='add'>+#</div><div class='add'>+# July 2010.</div><div class='add'>+#</div><div class='add'>+# Rescheduling for dual-issue pipeline resulted in 6% improvement on</div><div class='add'>+# Cortex A8 core and ~40 cycles per processed byte.</div><div class='add'>+</div><div class='add'>+# February 2011.</div><div class='add'>+#</div><div class='add'>+# Profiler-assisted and platform-specific optimization resulted in 7%</div><div class='add'>+# improvement on Coxtex A8 core and ~38 cycles per byte.</div><div class='add'>+</div><div class='add'>+# March 2011.</div><div class='add'>+#</div><div class='add'>+# Add NEON implementation. On Cortex A8 it was measured to process</div><div class='add'>+# one byte in 23.3 cycles or ~60% faster than integer-only code.</div><div class='add'>+</div><div class='add'>+# August 2012.</div><div class='add'>+#</div><div class='add'>+# Improve NEON performance by 12% on Snapdragon S4. In absolute</div><div class='add'>+# terms it's 22.6 cycles per byte, which is disappointing result.</div><div class='add'>+# Technical writers asserted that 3-way S4 pipeline can sustain</div><div class='add'>+# multiple NEON instructions per cycle, but dual NEON issue could</div><div class='add'>+# not be observed, see http://www.openssl.org/~appro/Snapdragon-S4.html</div><div class='add'>+# for further details. On side note Cortex-A15 processes one byte in</div><div class='add'>+# 16 cycles.</div><div class='add'>+</div><div class='add'>+# Byte order [in]dependence. =========================================</div><div class='add'>+#</div><div class='add'>+# Originally caller was expected to maintain specific *dword* order in</div><div class='add'>+# h[0-7], namely with most significant dword at *lower* address, which</div><div class='add'>+# was reflected in below two parameters as 0 and 4. Now caller is</div><div class='add'>+# expected to maintain native byte order for whole 64-bit values.</div><div class='add'>+$hi="HI";</div><div class='add'>+$lo="LO";</div><div class='add'>+# ====================================================================</div><div class='add'>+</div><div class='add'>+while (($output=shift) &amp;&amp; ($output!~/^\w[\w\-]*\.\w+$/)) {}</div><div class='add'>+open STDOUT,"&gt;$output";</div><div class='add'>+</div><div class='add'>+$ctx="r0";	# parameter block</div><div class='add'>+$inp="r1";</div><div class='add'>+$len="r2";</div><div class='add'>+</div><div class='add'>+$Tlo="r3";</div><div class='add'>+$Thi="r4";</div><div class='add'>+$Alo="r5";</div><div class='add'>+$Ahi="r6";</div><div class='add'>+$Elo="r7";</div><div class='add'>+$Ehi="r8";</div><div class='add'>+$t0="r9";</div><div class='add'>+$t1="r10";</div><div class='add'>+$t2="r11";</div><div class='add'>+$t3="r12";</div><div class='add'>+############	r13 is stack pointer</div><div class='add'>+$Ktbl="r14";</div><div class='add'>+############	r15 is program counter</div><div class='add'>+</div><div class='add'>+$Aoff=8*0;</div><div class='add'>+$Boff=8*1;</div><div class='add'>+$Coff=8*2;</div><div class='add'>+$Doff=8*3;</div><div class='add'>+$Eoff=8*4;</div><div class='add'>+$Foff=8*5;</div><div class='add'>+$Goff=8*6;</div><div class='add'>+$Hoff=8*7;</div><div class='add'>+$Xoff=8*8;</div><div class='add'>+</div><div class='add'>+sub BODY_00_15() {</div><div class='add'>+my $magic = shift;</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	@ Sigma1(x)	(ROTR((x),14) ^ ROTR((x),18)  ^ ROTR((x),41))</div><div class='add'>+	@ LO		lo&gt;&gt;14^hi&lt;&lt;18 ^ lo&gt;&gt;18^hi&lt;&lt;14 ^ hi&gt;&gt;9^lo&lt;&lt;23</div><div class='add'>+	@ HI		hi&gt;&gt;14^lo&lt;&lt;18 ^ hi&gt;&gt;18^lo&lt;&lt;14 ^ lo&gt;&gt;9^hi&lt;&lt;23</div><div class='add'>+	mov	$t0,$Elo,lsr#14</div><div class='add'>+	str	$Tlo,[sp,#$Xoff+0]</div><div class='add'>+	mov	$t1,$Ehi,lsr#14</div><div class='add'>+	str	$Thi,[sp,#$Xoff+4]</div><div class='add'>+	eor	$t0,$t0,$Ehi,lsl#18</div><div class='add'>+	ldr	$t2,[sp,#$Hoff+0]	@ h.lo</div><div class='add'>+	eor	$t1,$t1,$Elo,lsl#18</div><div class='add'>+	ldr	$t3,[sp,#$Hoff+4]	@ h.hi</div><div class='add'>+	eor	$t0,$t0,$Elo,lsr#18</div><div class='add'>+	eor	$t1,$t1,$Ehi,lsr#18</div><div class='add'>+	eor	$t0,$t0,$Ehi,lsl#14</div><div class='add'>+	eor	$t1,$t1,$Elo,lsl#14</div><div class='add'>+	eor	$t0,$t0,$Ehi,lsr#9</div><div class='add'>+	eor	$t1,$t1,$Elo,lsr#9</div><div class='add'>+	eor	$t0,$t0,$Elo,lsl#23</div><div class='add'>+	eor	$t1,$t1,$Ehi,lsl#23	@ Sigma1(e)</div><div class='add'>+	adds	$Tlo,$Tlo,$t0</div><div class='add'>+	ldr	$t0,[sp,#$Foff+0]	@ f.lo</div><div class='add'>+	adc	$Thi,$Thi,$t1		@ T += Sigma1(e)</div><div class='add'>+	ldr	$t1,[sp,#$Foff+4]	@ f.hi</div><div class='add'>+	adds	$Tlo,$Tlo,$t2</div><div class='add'>+	ldr	$t2,[sp,#$Goff+0]	@ g.lo</div><div class='add'>+	adc	$Thi,$Thi,$t3		@ T += h</div><div class='add'>+	ldr	$t3,[sp,#$Goff+4]	@ g.hi</div><div class='add'>+</div><div class='add'>+	eor	$t0,$t0,$t2</div><div class='add'>+	str	$Elo,[sp,#$Eoff+0]</div><div class='add'>+	eor	$t1,$t1,$t3</div><div class='add'>+	str	$Ehi,[sp,#$Eoff+4]</div><div class='add'>+	and	$t0,$t0,$Elo</div><div class='add'>+	str	$Alo,[sp,#$Aoff+0]</div><div class='add'>+	and	$t1,$t1,$Ehi</div><div class='add'>+	str	$Ahi,[sp,#$Aoff+4]</div><div class='add'>+	eor	$t0,$t0,$t2</div><div class='add'>+	ldr	$t2,[$Ktbl,#$lo]	@ K[i].lo</div><div class='add'>+	eor	$t1,$t1,$t3		@ Ch(e,f,g)</div><div class='add'>+	ldr	$t3,[$Ktbl,#$hi]	@ K[i].hi</div><div class='add'>+</div><div class='add'>+	adds	$Tlo,$Tlo,$t0</div><div class='add'>+	ldr	$Elo,[sp,#$Doff+0]	@ d.lo</div><div class='add'>+	adc	$Thi,$Thi,$t1		@ T += Ch(e,f,g)</div><div class='add'>+	ldr	$Ehi,[sp,#$Doff+4]	@ d.hi</div><div class='add'>+	adds	$Tlo,$Tlo,$t2</div><div class='add'>+	and	$t0,$t2,#0xff</div><div class='add'>+	adc	$Thi,$Thi,$t3		@ T += K[i]</div><div class='add'>+	adds	$Elo,$Elo,$Tlo</div><div class='add'>+	ldr	$t2,[sp,#$Boff+0]	@ b.lo</div><div class='add'>+	adc	$Ehi,$Ehi,$Thi		@ d += T</div><div class='add'>+	teq	$t0,#$magic</div><div class='add'>+</div><div class='add'>+	ldr	$t3,[sp,#$Coff+0]	@ c.lo</div><div class='add'>+#if __ARM_ARCH__&gt;=7</div><div class='add'>+	it	eq			@ Thumb2 thing, sanity check in ARM</div><div class='add'>+#endif</div><div class='add'>+	orreq	$Ktbl,$Ktbl,#1</div><div class='add'>+	@ Sigma0(x)	(ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))</div><div class='add'>+	@ LO		lo&gt;&gt;28^hi&lt;&lt;4  ^ hi&gt;&gt;2^lo&lt;&lt;30 ^ hi&gt;&gt;7^lo&lt;&lt;25</div><div class='add'>+	@ HI		hi&gt;&gt;28^lo&lt;&lt;4  ^ lo&gt;&gt;2^hi&lt;&lt;30 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='add'>+	mov	$t0,$Alo,lsr#28</div><div class='add'>+	mov	$t1,$Ahi,lsr#28</div><div class='add'>+	eor	$t0,$t0,$Ahi,lsl#4</div><div class='add'>+	eor	$t1,$t1,$Alo,lsl#4</div><div class='add'>+	eor	$t0,$t0,$Ahi,lsr#2</div><div class='add'>+	eor	$t1,$t1,$Alo,lsr#2</div><div class='add'>+	eor	$t0,$t0,$Alo,lsl#30</div><div class='add'>+	eor	$t1,$t1,$Ahi,lsl#30</div><div class='add'>+	eor	$t0,$t0,$Ahi,lsr#7</div><div class='add'>+	eor	$t1,$t1,$Alo,lsr#7</div><div class='add'>+	eor	$t0,$t0,$Alo,lsl#25</div><div class='add'>+	eor	$t1,$t1,$Ahi,lsl#25	@ Sigma0(a)</div><div class='add'>+	adds	$Tlo,$Tlo,$t0</div><div class='add'>+	and	$t0,$Alo,$t2</div><div class='add'>+	adc	$Thi,$Thi,$t1		@ T += Sigma0(a)</div><div class='add'>+</div><div class='add'>+	ldr	$t1,[sp,#$Boff+4]	@ b.hi</div><div class='add'>+	orr	$Alo,$Alo,$t2</div><div class='add'>+	ldr	$t2,[sp,#$Coff+4]	@ c.hi</div><div class='add'>+	and	$Alo,$Alo,$t3</div><div class='add'>+	and	$t3,$Ahi,$t1</div><div class='add'>+	orr	$Ahi,$Ahi,$t1</div><div class='add'>+	orr	$Alo,$Alo,$t0		@ Maj(a,b,c).lo</div><div class='add'>+	and	$Ahi,$Ahi,$t2</div><div class='add'>+	adds	$Alo,$Alo,$Tlo</div><div class='add'>+	orr	$Ahi,$Ahi,$t3		@ Maj(a,b,c).hi</div><div class='add'>+	sub	sp,sp,#8</div><div class='add'>+	adc	$Ahi,$Ahi,$Thi		@ h += T</div><div class='add'>+	tst	$Ktbl,#1</div><div class='add'>+	add	$Ktbl,$Ktbl,#8</div><div class='add'>+___</div><div class='add'>+}</div><div class='add'>+$code=&lt;&lt;___;</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+# include "arm_arch.h"</div><div class='add'>+# define VFP_ABI_PUSH	vstmdb	sp!,{d8-d15}</div><div class='add'>+# define VFP_ABI_POP	vldmia	sp!,{d8-d15}</div><div class='add'>+#else</div><div class='add'>+# define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='add'>+# define __ARM_MAX_ARCH__ 7</div><div class='add'>+# define VFP_ABI_PUSH</div><div class='add'>+# define VFP_ABI_POP</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef __ARMEL__</div><div class='add'>+# define LO 0</div><div class='add'>+# define HI 4</div><div class='add'>+# define WORD64(hi0,lo0,hi1,lo1)	.word	lo0,hi0, lo1,hi1</div><div class='add'>+#else</div><div class='add'>+# define HI 0</div><div class='add'>+# define LO 4</div><div class='add'>+# define WORD64(hi0,lo0,hi1,lo1)	.word	hi0,lo0, hi1,lo1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.text</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+.code	32</div><div class='add'>+#else</div><div class='add'>+.syntax unified</div><div class='add'>+# ifdef __thumb2__</div><div class='add'>+#  define adrl adr</div><div class='add'>+.thumb</div><div class='add'>+# else</div><div class='add'>+.code   32</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.type	K512,%object</div><div class='add'>+.align	5</div><div class='add'>+K512:</div><div class='add'>+WORD64(0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd)</div><div class='add'>+WORD64(0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc)</div><div class='add'>+WORD64(0x3956c25b,0xf348b538, 0x59f111f1,0xb605d019)</div><div class='add'>+WORD64(0x923f82a4,0xaf194f9b, 0xab1c5ed5,0xda6d8118)</div><div class='add'>+WORD64(0xd807aa98,0xa3030242, 0x12835b01,0x45706fbe)</div><div class='add'>+WORD64(0x243185be,0x4ee4b28c, 0x550c7dc3,0xd5ffb4e2)</div><div class='add'>+WORD64(0x72be5d74,0xf27b896f, 0x80deb1fe,0x3b1696b1)</div><div class='add'>+WORD64(0x9bdc06a7,0x25c71235, 0xc19bf174,0xcf692694)</div><div class='add'>+WORD64(0xe49b69c1,0x9ef14ad2, 0xefbe4786,0x384f25e3)</div><div class='add'>+WORD64(0x0fc19dc6,0x8b8cd5b5, 0x240ca1cc,0x77ac9c65)</div><div class='add'>+WORD64(0x2de92c6f,0x592b0275, 0x4a7484aa,0x6ea6e483)</div><div class='add'>+WORD64(0x5cb0a9dc,0xbd41fbd4, 0x76f988da,0x831153b5)</div><div class='add'>+WORD64(0x983e5152,0xee66dfab, 0xa831c66d,0x2db43210)</div><div class='add'>+WORD64(0xb00327c8,0x98fb213f, 0xbf597fc7,0xbeef0ee4)</div><div class='add'>+WORD64(0xc6e00bf3,0x3da88fc2, 0xd5a79147,0x930aa725)</div><div class='add'>+WORD64(0x06ca6351,0xe003826f, 0x14292967,0x0a0e6e70)</div><div class='add'>+WORD64(0x27b70a85,0x46d22ffc, 0x2e1b2138,0x5c26c926)</div><div class='add'>+WORD64(0x4d2c6dfc,0x5ac42aed, 0x53380d13,0x9d95b3df)</div><div class='add'>+WORD64(0x650a7354,0x8baf63de, 0x766a0abb,0x3c77b2a8)</div><div class='add'>+WORD64(0x81c2c92e,0x47edaee6, 0x92722c85,0x1482353b)</div><div class='add'>+WORD64(0xa2bfe8a1,0x4cf10364, 0xa81a664b,0xbc423001)</div><div class='add'>+WORD64(0xc24b8b70,0xd0f89791, 0xc76c51a3,0x0654be30)</div><div class='add'>+WORD64(0xd192e819,0xd6ef5218, 0xd6990624,0x5565a910)</div><div class='add'>+WORD64(0xf40e3585,0x5771202a, 0x106aa070,0x32bbd1b8)</div><div class='add'>+WORD64(0x19a4c116,0xb8d2d0c8, 0x1e376c08,0x5141ab53)</div><div class='add'>+WORD64(0x2748774c,0xdf8eeb99, 0x34b0bcb5,0xe19b48a8)</div><div class='add'>+WORD64(0x391c0cb3,0xc5c95a63, 0x4ed8aa4a,0xe3418acb)</div><div class='add'>+WORD64(0x5b9cca4f,0x7763e373, 0x682e6ff3,0xd6b2b8a3)</div><div class='add'>+WORD64(0x748f82ee,0x5defb2fc, 0x78a5636f,0x43172f60)</div><div class='add'>+WORD64(0x84c87814,0xa1f0ab72, 0x8cc70208,0x1a6439ec)</div><div class='add'>+WORD64(0x90befffa,0x23631e28, 0xa4506ceb,0xde82bde9)</div><div class='add'>+WORD64(0xbef9a3f7,0xb2c67915, 0xc67178f2,0xe372532b)</div><div class='add'>+WORD64(0xca273ece,0xea26619c, 0xd186b8c7,0x21c0c207)</div><div class='add'>+WORD64(0xeada7dd6,0xcde0eb1e, 0xf57d4f7f,0xee6ed178)</div><div class='add'>+WORD64(0x06f067aa,0x72176fba, 0x0a637dc5,0xa2c898a6)</div><div class='add'>+WORD64(0x113f9804,0xbef90dae, 0x1b710b35,0x131c471b)</div><div class='add'>+WORD64(0x28db77f5,0x23047d84, 0x32caab7b,0x40c72493)</div><div class='add'>+WORD64(0x3c9ebe0a,0x15c9bebc, 0x431d67c4,0x9c100d4c)</div><div class='add'>+WORD64(0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a)</div><div class='add'>+WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)</div><div class='add'>+.size	K512,.-K512</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+.LOPENSSL_armcap:</div><div class='add'>+.word	OPENSSL_armcap_P-sha512_block_data_order</div><div class='add'>+.skip	32-4</div><div class='add'>+#else</div><div class='add'>+.skip	32</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.global	sha512_block_data_order</div><div class='add'>+.type	sha512_block_data_order,%function</div><div class='add'>+sha512_block_data_order:</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+	sub	r3,pc,#8		@ sha512_block_data_order</div><div class='add'>+#else</div><div class='add'>+	adr	r3,sha512_block_data_order</div><div class='add'>+#endif</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+	ldr	r12,.LOPENSSL_armcap</div><div class='add'>+	ldr	r12,[r3,r12]		@ OPENSSL_armcap_P</div><div class='add'>+	tst	r12,#1</div><div class='add'>+	bne	.LNEON</div><div class='add'>+#endif</div><div class='add'>+	add	$len,$inp,$len,lsl#7	@ len to point at the end of inp</div><div class='add'>+	stmdb	sp!,{r4-r12,lr}</div><div class='add'>+	sub	$Ktbl,r3,#672		@ K512</div><div class='add'>+	sub	sp,sp,#9*8</div><div class='add'>+</div><div class='add'>+	ldr	$Elo,[$ctx,#$Eoff+$lo]</div><div class='add'>+	ldr	$Ehi,[$ctx,#$Eoff+$hi]</div><div class='add'>+	ldr	$t0, [$ctx,#$Goff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Goff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Hoff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Hoff+$hi]</div><div class='add'>+.Loop:</div><div class='add'>+	str	$t0, [sp,#$Goff+0]</div><div class='add'>+	str	$t1, [sp,#$Goff+4]</div><div class='add'>+	str	$t2, [sp,#$Hoff+0]</div><div class='add'>+	str	$t3, [sp,#$Hoff+4]</div><div class='add'>+	ldr	$Alo,[$ctx,#$Aoff+$lo]</div><div class='add'>+	ldr	$Ahi,[$ctx,#$Aoff+$hi]</div><div class='add'>+	ldr	$Tlo,[$ctx,#$Boff+$lo]</div><div class='add'>+	ldr	$Thi,[$ctx,#$Boff+$hi]</div><div class='add'>+	ldr	$t0, [$ctx,#$Coff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Coff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Doff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Doff+$hi]</div><div class='add'>+	str	$Tlo,[sp,#$Boff+0]</div><div class='add'>+	str	$Thi,[sp,#$Boff+4]</div><div class='add'>+	str	$t0, [sp,#$Coff+0]</div><div class='add'>+	str	$t1, [sp,#$Coff+4]</div><div class='add'>+	str	$t2, [sp,#$Doff+0]</div><div class='add'>+	str	$t3, [sp,#$Doff+4]</div><div class='add'>+	ldr	$Tlo,[$ctx,#$Foff+$lo]</div><div class='add'>+	ldr	$Thi,[$ctx,#$Foff+$hi]</div><div class='add'>+	str	$Tlo,[sp,#$Foff+0]</div><div class='add'>+	str	$Thi,[sp,#$Foff+4]</div><div class='add'>+</div><div class='add'>+.L00_15:</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+	ldrb	$Tlo,[$inp,#7]</div><div class='add'>+	ldrb	$t0, [$inp,#6]</div><div class='add'>+	ldrb	$t1, [$inp,#5]</div><div class='add'>+	ldrb	$t2, [$inp,#4]</div><div class='add'>+	ldrb	$Thi,[$inp,#3]</div><div class='add'>+	ldrb	$t3, [$inp,#2]</div><div class='add'>+	orr	$Tlo,$Tlo,$t0,lsl#8</div><div class='add'>+	ldrb	$t0, [$inp,#1]</div><div class='add'>+	orr	$Tlo,$Tlo,$t1,lsl#16</div><div class='add'>+	ldrb	$t1, [$inp],#8</div><div class='add'>+	orr	$Tlo,$Tlo,$t2,lsl#24</div><div class='add'>+	orr	$Thi,$Thi,$t3,lsl#8</div><div class='add'>+	orr	$Thi,$Thi,$t0,lsl#16</div><div class='add'>+	orr	$Thi,$Thi,$t1,lsl#24</div><div class='add'>+#else</div><div class='add'>+	ldr	$Tlo,[$inp,#4]</div><div class='add'>+	ldr	$Thi,[$inp],#8</div><div class='add'>+#ifdef __ARMEL__</div><div class='add'>+	rev	$Tlo,$Tlo</div><div class='add'>+	rev	$Thi,$Thi</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+___</div><div class='add'>+	&amp;BODY_00_15(0x94);</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	tst	$Ktbl,#1</div><div class='add'>+	beq	.L00_15</div><div class='add'>+	ldr	$t0,[sp,#`$Xoff+8*(16-1)`+0]</div><div class='add'>+	ldr	$t1,[sp,#`$Xoff+8*(16-1)`+4]</div><div class='add'>+	bic	$Ktbl,$Ktbl,#1</div><div class='add'>+.L16_79:</div><div class='add'>+	@ sigma0(x)	(ROTR((x),1)  ^ ROTR((x),8)  ^ ((x)&gt;&gt;7))</div><div class='add'>+	@ LO		lo&gt;&gt;1^hi&lt;&lt;31  ^ lo&gt;&gt;8^hi&lt;&lt;24 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='add'>+	@ HI		hi&gt;&gt;1^lo&lt;&lt;31  ^ hi&gt;&gt;8^lo&lt;&lt;24 ^ hi&gt;&gt;7</div><div class='add'>+	mov	$Tlo,$t0,lsr#1</div><div class='add'>+	ldr	$t2,[sp,#`$Xoff+8*(16-14)`+0]</div><div class='add'>+	mov	$Thi,$t1,lsr#1</div><div class='add'>+	ldr	$t3,[sp,#`$Xoff+8*(16-14)`+4]</div><div class='add'>+	eor	$Tlo,$Tlo,$t1,lsl#31</div><div class='add'>+	eor	$Thi,$Thi,$t0,lsl#31</div><div class='add'>+	eor	$Tlo,$Tlo,$t0,lsr#8</div><div class='add'>+	eor	$Thi,$Thi,$t1,lsr#8</div><div class='add'>+	eor	$Tlo,$Tlo,$t1,lsl#24</div><div class='add'>+	eor	$Thi,$Thi,$t0,lsl#24</div><div class='add'>+	eor	$Tlo,$Tlo,$t0,lsr#7</div><div class='add'>+	eor	$Thi,$Thi,$t1,lsr#7</div><div class='add'>+	eor	$Tlo,$Tlo,$t1,lsl#25</div><div class='add'>+</div><div class='add'>+	@ sigma1(x)	(ROTR((x),19) ^ ROTR((x),61) ^ ((x)&gt;&gt;6))</div><div class='add'>+	@ LO		lo&gt;&gt;19^hi&lt;&lt;13 ^ hi&gt;&gt;29^lo&lt;&lt;3 ^ lo&gt;&gt;6^hi&lt;&lt;26</div><div class='add'>+	@ HI		hi&gt;&gt;19^lo&lt;&lt;13 ^ lo&gt;&gt;29^hi&lt;&lt;3 ^ hi&gt;&gt;6</div><div class='add'>+	mov	$t0,$t2,lsr#19</div><div class='add'>+	mov	$t1,$t3,lsr#19</div><div class='add'>+	eor	$t0,$t0,$t3,lsl#13</div><div class='add'>+	eor	$t1,$t1,$t2,lsl#13</div><div class='add'>+	eor	$t0,$t0,$t3,lsr#29</div><div class='add'>+	eor	$t1,$t1,$t2,lsr#29</div><div class='add'>+	eor	$t0,$t0,$t2,lsl#3</div><div class='add'>+	eor	$t1,$t1,$t3,lsl#3</div><div class='add'>+	eor	$t0,$t0,$t2,lsr#6</div><div class='add'>+	eor	$t1,$t1,$t3,lsr#6</div><div class='add'>+	ldr	$t2,[sp,#`$Xoff+8*(16-9)`+0]</div><div class='add'>+	eor	$t0,$t0,$t3,lsl#26</div><div class='add'>+</div><div class='add'>+	ldr	$t3,[sp,#`$Xoff+8*(16-9)`+4]</div><div class='add'>+	adds	$Tlo,$Tlo,$t0</div><div class='add'>+	ldr	$t0,[sp,#`$Xoff+8*16`+0]</div><div class='add'>+	adc	$Thi,$Thi,$t1</div><div class='add'>+</div><div class='add'>+	ldr	$t1,[sp,#`$Xoff+8*16`+4]</div><div class='add'>+	adds	$Tlo,$Tlo,$t2</div><div class='add'>+	adc	$Thi,$Thi,$t3</div><div class='add'>+	adds	$Tlo,$Tlo,$t0</div><div class='add'>+	adc	$Thi,$Thi,$t1</div><div class='add'>+___</div><div class='add'>+	&amp;BODY_00_15(0x17);</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+#if __ARM_ARCH__&gt;=7</div><div class='add'>+	ittt	eq			@ Thumb2 thing, sanity check in ARM</div><div class='add'>+#endif</div><div class='add'>+	ldreq	$t0,[sp,#`$Xoff+8*(16-1)`+0]</div><div class='add'>+	ldreq	$t1,[sp,#`$Xoff+8*(16-1)`+4]</div><div class='add'>+	beq	.L16_79</div><div class='add'>+	bic	$Ktbl,$Ktbl,#1</div><div class='add'>+</div><div class='add'>+	ldr	$Tlo,[sp,#$Boff+0]</div><div class='add'>+	ldr	$Thi,[sp,#$Boff+4]</div><div class='add'>+	ldr	$t0, [$ctx,#$Aoff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Aoff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Boff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Boff+$hi]</div><div class='add'>+	adds	$t0,$Alo,$t0</div><div class='add'>+	str	$t0, [$ctx,#$Aoff+$lo]</div><div class='add'>+	adc	$t1,$Ahi,$t1</div><div class='add'>+	str	$t1, [$ctx,#$Aoff+$hi]</div><div class='add'>+	adds	$t2,$Tlo,$t2</div><div class='add'>+	str	$t2, [$ctx,#$Boff+$lo]</div><div class='add'>+	adc	$t3,$Thi,$t3</div><div class='add'>+	str	$t3, [$ctx,#$Boff+$hi]</div><div class='add'>+</div><div class='add'>+	ldr	$Alo,[sp,#$Coff+0]</div><div class='add'>+	ldr	$Ahi,[sp,#$Coff+4]</div><div class='add'>+	ldr	$Tlo,[sp,#$Doff+0]</div><div class='add'>+	ldr	$Thi,[sp,#$Doff+4]</div><div class='add'>+	ldr	$t0, [$ctx,#$Coff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Coff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Doff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Doff+$hi]</div><div class='add'>+	adds	$t0,$Alo,$t0</div><div class='add'>+	str	$t0, [$ctx,#$Coff+$lo]</div><div class='add'>+	adc	$t1,$Ahi,$t1</div><div class='add'>+	str	$t1, [$ctx,#$Coff+$hi]</div><div class='add'>+	adds	$t2,$Tlo,$t2</div><div class='add'>+	str	$t2, [$ctx,#$Doff+$lo]</div><div class='add'>+	adc	$t3,$Thi,$t3</div><div class='add'>+	str	$t3, [$ctx,#$Doff+$hi]</div><div class='add'>+</div><div class='add'>+	ldr	$Tlo,[sp,#$Foff+0]</div><div class='add'>+	ldr	$Thi,[sp,#$Foff+4]</div><div class='add'>+	ldr	$t0, [$ctx,#$Eoff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Eoff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Foff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Foff+$hi]</div><div class='add'>+	adds	$Elo,$Elo,$t0</div><div class='add'>+	str	$Elo,[$ctx,#$Eoff+$lo]</div><div class='add'>+	adc	$Ehi,$Ehi,$t1</div><div class='add'>+	str	$Ehi,[$ctx,#$Eoff+$hi]</div><div class='add'>+	adds	$t2,$Tlo,$t2</div><div class='add'>+	str	$t2, [$ctx,#$Foff+$lo]</div><div class='add'>+	adc	$t3,$Thi,$t3</div><div class='add'>+	str	$t3, [$ctx,#$Foff+$hi]</div><div class='add'>+</div><div class='add'>+	ldr	$Alo,[sp,#$Goff+0]</div><div class='add'>+	ldr	$Ahi,[sp,#$Goff+4]</div><div class='add'>+	ldr	$Tlo,[sp,#$Hoff+0]</div><div class='add'>+	ldr	$Thi,[sp,#$Hoff+4]</div><div class='add'>+	ldr	$t0, [$ctx,#$Goff+$lo]</div><div class='add'>+	ldr	$t1, [$ctx,#$Goff+$hi]</div><div class='add'>+	ldr	$t2, [$ctx,#$Hoff+$lo]</div><div class='add'>+	ldr	$t3, [$ctx,#$Hoff+$hi]</div><div class='add'>+	adds	$t0,$Alo,$t0</div><div class='add'>+	str	$t0, [$ctx,#$Goff+$lo]</div><div class='add'>+	adc	$t1,$Ahi,$t1</div><div class='add'>+	str	$t1, [$ctx,#$Goff+$hi]</div><div class='add'>+	adds	$t2,$Tlo,$t2</div><div class='add'>+	str	$t2, [$ctx,#$Hoff+$lo]</div><div class='add'>+	adc	$t3,$Thi,$t3</div><div class='add'>+	str	$t3, [$ctx,#$Hoff+$hi]</div><div class='add'>+</div><div class='add'>+	add	sp,sp,#640</div><div class='add'>+	sub	$Ktbl,$Ktbl,#640</div><div class='add'>+</div><div class='add'>+	teq	$inp,$len</div><div class='add'>+	bne	.Loop</div><div class='add'>+</div><div class='add'>+	add	sp,sp,#8*9		@ destroy frame</div><div class='add'>+#if __ARM_ARCH__&gt;=5</div><div class='add'>+	ldmia	sp!,{r4-r12,pc}</div><div class='add'>+#else</div><div class='add'>+	ldmia	sp!,{r4-r12,lr}</div><div class='add'>+	tst	lr,#1</div><div class='add'>+	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='add'>+	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='add'>+#endif</div><div class='add'>+.size	sha512_block_data_order,.-sha512_block_data_order</div><div class='add'>+___</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+my @Sigma0=(28,34,39);</div><div class='add'>+my @Sigma1=(14,18,41);</div><div class='add'>+my @sigma0=(1, 8, 7);</div><div class='add'>+my @sigma1=(19,61,6);</div><div class='add'>+</div><div class='add'>+my $Ktbl="r3";</div><div class='add'>+my $cnt="r12";	# volatile register known as ip, intra-procedure-call scratch</div><div class='add'>+</div><div class='add'>+my @X=map("d$_",(0..15));</div><div class='add'>+my @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("d$_",(16..23));</div><div class='add'>+</div><div class='add'>+sub NEON_00_15() {</div><div class='add'>+my $i=shift;</div><div class='add'>+my ($a,$b,$c,$d,$e,$f,$g,$h)=@_;</div><div class='add'>+my ($t0,$t1,$t2,$T1,$K,$Ch,$Maj)=map("d$_",(24..31));	# temps</div><div class='add'>+</div><div class='add'>+$code.=&lt;&lt;___ if ($i&lt;16 || $i&amp;1);</div><div class='add'>+	vshr.u64	$t0,$e,#@Sigma1[0]	@ $i</div><div class='add'>+#if $i&lt;16</div><div class='add'>+	vld1.64		{@X[$i%16]},[$inp]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	$t1,$e,#@Sigma1[1]</div><div class='add'>+#if $i&gt;0</div><div class='add'>+	 vadd.i64	$a,$Maj			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	$t2,$e,#@Sigma1[2]</div><div class='add'>+___</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	vld1.64		{$K},[$Ktbl,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		$t0,$e,#`64-@Sigma1[0]`</div><div class='add'>+	vsli.64		$t1,$e,#`64-@Sigma1[1]`</div><div class='add'>+	vmov		$Ch,$e</div><div class='add'>+	vsli.64		$t2,$e,#`64-@Sigma1[2]`</div><div class='add'>+#if $i&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	@X[$i],@X[$i]</div><div class='add'>+#endif</div><div class='add'>+	veor		$t1,$t0</div><div class='add'>+	vbsl		$Ch,$f,$g		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	$t0,$a,#@Sigma0[0]</div><div class='add'>+	veor		$t2,$t1			@ Sigma1(e)</div><div class='add'>+	vadd.i64	$T1,$Ch,$h</div><div class='add'>+	vshr.u64	$t1,$a,#@Sigma0[1]</div><div class='add'>+	vsli.64		$t0,$a,#`64-@Sigma0[0]`</div><div class='add'>+	vadd.i64	$T1,$t2</div><div class='add'>+	vshr.u64	$t2,$a,#@Sigma0[2]</div><div class='add'>+	vadd.i64	$K,@X[$i%16]</div><div class='add'>+	vsli.64		$t1,$a,#`64-@Sigma0[1]`</div><div class='add'>+	veor		$Maj,$a,$b</div><div class='add'>+	vsli.64		$t2,$a,#`64-@Sigma0[2]`</div><div class='add'>+	veor		$h,$t0,$t1</div><div class='add'>+	vadd.i64	$T1,$K</div><div class='add'>+	vbsl		$Maj,$c,$b		@ Maj(a,b,c)</div><div class='add'>+	veor		$h,$t2			@ Sigma0(a)</div><div class='add'>+	vadd.i64	$d,$T1</div><div class='add'>+	vadd.i64	$Maj,$T1</div><div class='add'>+	@ vadd.i64	$h,$Maj</div><div class='add'>+___</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+sub NEON_16_79() {</div><div class='add'>+my $i=shift;</div><div class='add'>+</div><div class='add'>+if ($i&amp;1)	{ &amp;NEON_00_15($i,@_); return; }</div><div class='add'>+</div><div class='add'>+# 2x-vectorized, therefore runs every 2nd round</div><div class='add'>+my @X=map("q$_",(0..7));			# view @X as 128-bit vector</div><div class='add'>+my ($t0,$t1,$s0,$s1) = map("q$_",(12..15));	# temps</div><div class='add'>+my ($d0,$d1,$d2) = map("d$_",(24..26));		# temps from NEON_00_15</div><div class='add'>+my $e=@_[4];					# $e from NEON_00_15</div><div class='add'>+$i /= 2;</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	vshr.u64	$t0,@X[($i+7)%8],#@sigma1[0]</div><div class='add'>+	vshr.u64	$t1,@X[($i+7)%8],#@sigma1[1]</div><div class='add'>+	 vadd.i64	@_[0],d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	$s1,@X[($i+7)%8],#@sigma1[2]</div><div class='add'>+	vsli.64		$t0,@X[($i+7)%8],#`64-@sigma1[0]`</div><div class='add'>+	vext.8		$s0,@X[$i%8],@X[($i+1)%8],#8	@ X[i+1]</div><div class='add'>+	vsli.64		$t1,@X[($i+7)%8],#`64-@sigma1[1]`</div><div class='add'>+	veor		$s1,$t0</div><div class='add'>+	vshr.u64	$t0,$s0,#@sigma0[0]</div><div class='add'>+	veor		$s1,$t1				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	$t1,$s0,#@sigma0[1]</div><div class='add'>+	vadd.i64	@X[$i%8],$s1</div><div class='add'>+	vshr.u64	$s1,$s0,#@sigma0[2]</div><div class='add'>+	vsli.64		$t0,$s0,#`64-@sigma0[0]`</div><div class='add'>+	vsli.64		$t1,$s0,#`64-@sigma0[1]`</div><div class='add'>+	vext.8		$s0,@X[($i+4)%8],@X[($i+5)%8],#8	@ X[i+9]</div><div class='add'>+	veor		$s1,$t0</div><div class='add'>+	vshr.u64	$d0,$e,#@Sigma1[0]		@ from NEON_00_15</div><div class='add'>+	vadd.i64	@X[$i%8],$s0</div><div class='add'>+	vshr.u64	$d1,$e,#@Sigma1[1]		@ from NEON_00_15</div><div class='add'>+	veor		$s1,$t1				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	$d2,$e,#@Sigma1[2]		@ from NEON_00_15</div><div class='add'>+	vadd.i64	@X[$i%8],$s1</div><div class='add'>+___</div><div class='add'>+	&amp;NEON_00_15(2*$i,@_);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7</div><div class='add'>+.arch	armv7-a</div><div class='add'>+.fpu	neon</div><div class='add'>+</div><div class='add'>+.global	sha512_block_data_order_neon</div><div class='add'>+.type	sha512_block_data_order_neon,%function</div><div class='add'>+.align	4</div><div class='add'>+sha512_block_data_order_neon:</div><div class='add'>+.LNEON:</div><div class='add'>+	dmb				@ errata #451034 on early Cortex A8</div><div class='add'>+	add	$len,$inp,$len,lsl#7	@ len to point at the end of inp</div><div class='add'>+	VFP_ABI_PUSH</div><div class='add'>+	adrl	$Ktbl,K512</div><div class='add'>+	vldmia	$ctx,{$A-$H}		@ load context</div><div class='add'>+.Loop_neon:</div><div class='add'>+___</div><div class='add'>+for($i=0;$i&lt;16;$i++)	{ &amp;NEON_00_15($i,@V); unshift(@V,pop(@V)); }</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	mov		$cnt,#4</div><div class='add'>+.L16_79_neon:</div><div class='add'>+	subs		$cnt,#1</div><div class='add'>+___</div><div class='add'>+for(;$i&lt;32;$i++)	{ &amp;NEON_16_79($i,@V); unshift(@V,pop(@V)); }</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+	bne		.L16_79_neon</div><div class='add'>+</div><div class='add'>+	 vadd.i64	$A,d30		@ h+=Maj from the past</div><div class='add'>+	vldmia		$ctx,{d24-d31}	@ load context to temp</div><div class='add'>+	vadd.i64	q8,q12		@ vectorized accumulate</div><div class='add'>+	vadd.i64	q9,q13</div><div class='add'>+	vadd.i64	q10,q14</div><div class='add'>+	vadd.i64	q11,q15</div><div class='add'>+	vstmia		$ctx,{$A-$H}	@ save context</div><div class='add'>+	teq		$inp,$len</div><div class='add'>+	sub		$Ktbl,#640	@ rewind K512</div><div class='add'>+	bne		.Loop_neon</div><div class='add'>+</div><div class='add'>+	VFP_ABI_POP</div><div class='add'>+	ret				@ bx lr</div><div class='add'>+.size	sha512_block_data_order_neon,.-sha512_block_data_order_neon</div><div class='add'>+#endif</div><div class='add'>+___</div><div class='add'>+}</div><div class='add'>+$code.=&lt;&lt;___;</div><div class='add'>+.asciz	"SHA512 block transform for ARMv4/NEON, CRYPTOGAMS by &lt;appro\@openssl.org&gt;"</div><div class='add'>+.align	2</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+.comm	OPENSSL_armcap_P,4,4</div><div class='add'>+#endif</div><div class='add'>+___</div><div class='add'>+</div><div class='add'>+$code =~ s/\`([^\`]*)\`/eval $1/gem;</div><div class='add'>+$code =~ s/\bbx\s+lr\b/.word\t0xe12fff1e/gm;	# make it possible to compile with -march=armv4</div><div class='add'>+$code =~ s/\bret\b/bx	lr/gm;</div><div class='add'>+</div><div class='add'>+open SELF,$0;</div><div class='add'>+while(&lt;SELF&gt;) {</div><div class='add'>+	next if (/^#!/);</div><div class='add'>+	last if (!s/^#/@/ and !/^$/);</div><div class='add'>+	print;</div><div class='add'>+}</div><div class='add'>+close SELF;</div><div class='add'>+</div><div class='add'>+print $code;</div><div class='add'>+close STDOUT; # enforce flush</div><div class='head'>diff --git a/arch/arm/crypto/sha512-armv7-neon.S b/arch/arm/crypto/sha512-armv7-neon.S<br/>deleted file mode 100644<br/>index fe99472e507c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/crypto/sha512-armv7-neon.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/crypto/sha512-armv7-neon.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,455 +0,0 @@</div><div class='del'>-/* sha512-armv7-neon.S  -  ARM/NEON assembly implementation of SHA-512 transform</div><div class='del'>- *</div><div class='del'>- * Copyright © 2013-2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the Free</div><div class='del'>- * Software Foundation; either version 2 of the License, or (at your option)</div><div class='del'>- * any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.syntax unified</div><div class='del'>-.code   32</div><div class='del'>-.fpu neon</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-/* structure of SHA512_CONTEXT */</div><div class='del'>-#define hd_a 0</div><div class='del'>-#define hd_b ((hd_a) + 8)</div><div class='del'>-#define hd_c ((hd_b) + 8)</div><div class='del'>-#define hd_d ((hd_c) + 8)</div><div class='del'>-#define hd_e ((hd_d) + 8)</div><div class='del'>-#define hd_f ((hd_e) + 8)</div><div class='del'>-#define hd_g ((hd_f) + 8)</div><div class='del'>-</div><div class='del'>-/* register macros */</div><div class='del'>-#define RK %r2</div><div class='del'>-</div><div class='del'>-#define RA d0</div><div class='del'>-#define RB d1</div><div class='del'>-#define RC d2</div><div class='del'>-#define RD d3</div><div class='del'>-#define RE d4</div><div class='del'>-#define RF d5</div><div class='del'>-#define RG d6</div><div class='del'>-#define RH d7</div><div class='del'>-</div><div class='del'>-#define RT0 d8</div><div class='del'>-#define RT1 d9</div><div class='del'>-#define RT2 d10</div><div class='del'>-#define RT3 d11</div><div class='del'>-#define RT4 d12</div><div class='del'>-#define RT5 d13</div><div class='del'>-#define RT6 d14</div><div class='del'>-#define RT7 d15</div><div class='del'>-</div><div class='del'>-#define RT01q q4</div><div class='del'>-#define RT23q q5</div><div class='del'>-#define RT45q q6</div><div class='del'>-#define RT67q q7</div><div class='del'>-</div><div class='del'>-#define RW0 d16</div><div class='del'>-#define RW1 d17</div><div class='del'>-#define RW2 d18</div><div class='del'>-#define RW3 d19</div><div class='del'>-#define RW4 d20</div><div class='del'>-#define RW5 d21</div><div class='del'>-#define RW6 d22</div><div class='del'>-#define RW7 d23</div><div class='del'>-#define RW8 d24</div><div class='del'>-#define RW9 d25</div><div class='del'>-#define RW10 d26</div><div class='del'>-#define RW11 d27</div><div class='del'>-#define RW12 d28</div><div class='del'>-#define RW13 d29</div><div class='del'>-#define RW14 d30</div><div class='del'>-#define RW15 d31</div><div class='del'>-</div><div class='del'>-#define RW01q q8</div><div class='del'>-#define RW23q q9</div><div class='del'>-#define RW45q q10</div><div class='del'>-#define RW67q q11</div><div class='del'>-#define RW89q q12</div><div class='del'>-#define RW1011q q13</div><div class='del'>-#define RW1213q q14</div><div class='del'>-#define RW1415q q15</div><div class='del'>-</div><div class='del'>-/***********************************************************************</div><div class='del'>- * ARM assembly implementation of sha512 transform</div><div class='del'>- ***********************************************************************/</div><div class='del'>-#define rounds2_0_63(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, rw01q, rw2, \</div><div class='del'>-                     rw23q, rw1415q, rw9, rw10, interleave_op, arg1) \</div><div class='del'>-	/* t1 = h + Sum1 (e) + Ch (e, f, g) + k[t] + w[t]; */ \</div><div class='del'>-	vshr.u64 RT2, re, #14; \</div><div class='del'>-	vshl.u64 RT3, re, #64 - 14; \</div><div class='del'>-	interleave_op(arg1); \</div><div class='del'>-	vshr.u64 RT4, re, #18; \</div><div class='del'>-	vshl.u64 RT5, re, #64 - 18; \</div><div class='del'>-	vld1.64 {RT0}, [RK]!; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, re, #41; \</div><div class='del'>-	vshl.u64 RT5, re, #64 - 41; \</div><div class='del'>-	vadd.u64 RT0, RT0, rw0; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vmov.64 RT7, re; \</div><div class='del'>-	veor.64 RT1, RT2, RT3; \</div><div class='del'>-	vbsl.64 RT7, rf, rg; \</div><div class='del'>-	\</div><div class='del'>-	vadd.u64 RT1, RT1, rh; \</div><div class='del'>-	vshr.u64 RT2, ra, #28; \</div><div class='del'>-	vshl.u64 RT3, ra, #64 - 28; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT0; \</div><div class='del'>-	vshr.u64 RT4, ra, #34; \</div><div class='del'>-	vshl.u64 RT5, ra, #64 - 34; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT7; \</div><div class='del'>-	\</div><div class='del'>-	/* h = Sum0 (a) + Maj (a, b, c); */ \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, ra, #39; \</div><div class='del'>-	vshl.u64 RT5, ra, #64 - 39; \</div><div class='del'>-	veor.64 RT0, ra, rb; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vbsl.64 RT0, rc, rb; \</div><div class='del'>-	vadd.u64 rd, rd, RT1; /* d+=t1; */ \</div><div class='del'>-	veor.64 rh, RT2, RT3; \</div><div class='del'>-	\</div><div class='del'>-	/* t1 = g + Sum1 (d) + Ch (d, e, f) + k[t] + w[t]; */ \</div><div class='del'>-	vshr.u64 RT2, rd, #14; \</div><div class='del'>-	vshl.u64 RT3, rd, #64 - 14; \</div><div class='del'>-	vadd.u64 rh, rh, RT0; \</div><div class='del'>-	vshr.u64 RT4, rd, #18; \</div><div class='del'>-	vshl.u64 RT5, rd, #64 - 18; \</div><div class='del'>-	vadd.u64 rh, rh, RT1; /* h+=t1; */ \</div><div class='del'>-	vld1.64 {RT0}, [RK]!; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, rd, #41; \</div><div class='del'>-	vshl.u64 RT5, rd, #64 - 41; \</div><div class='del'>-	vadd.u64 RT0, RT0, rw1; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vmov.64 RT7, rd; \</div><div class='del'>-	veor.64 RT1, RT2, RT3; \</div><div class='del'>-	vbsl.64 RT7, re, rf; \</div><div class='del'>-	\</div><div class='del'>-	vadd.u64 RT1, RT1, rg; \</div><div class='del'>-	vshr.u64 RT2, rh, #28; \</div><div class='del'>-	vshl.u64 RT3, rh, #64 - 28; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT0; \</div><div class='del'>-	vshr.u64 RT4, rh, #34; \</div><div class='del'>-	vshl.u64 RT5, rh, #64 - 34; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT7; \</div><div class='del'>-	\</div><div class='del'>-	/* g = Sum0 (h) + Maj (h, a, b); */ \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, rh, #39; \</div><div class='del'>-	vshl.u64 RT5, rh, #64 - 39; \</div><div class='del'>-	veor.64 RT0, rh, ra; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vbsl.64 RT0, rb, ra; \</div><div class='del'>-	vadd.u64 rc, rc, RT1; /* c+=t1; */ \</div><div class='del'>-	veor.64 rg, RT2, RT3; \</div><div class='del'>-	\</div><div class='del'>-	/* w[0] += S1 (w[14]) + w[9] + S0 (w[1]); */ \</div><div class='del'>-	/* w[1] += S1 (w[15]) + w[10] + S0 (w[2]); */ \</div><div class='del'>-	\</div><div class='del'>-	/**** S0(w[1:2]) */ \</div><div class='del'>-	\</div><div class='del'>-	/* w[0:1] += w[9:10] */ \</div><div class='del'>-	/* RT23q = rw1:rw2 */ \</div><div class='del'>-	vext.u64 RT23q, rw01q, rw23q, #1; \</div><div class='del'>-	vadd.u64 rw0, rw9; \</div><div class='del'>-	vadd.u64 rg, rg, RT0; \</div><div class='del'>-	vadd.u64 rw1, rw10;\</div><div class='del'>-	vadd.u64 rg, rg, RT1; /* g+=t1; */ \</div><div class='del'>-	\</div><div class='del'>-	vshr.u64 RT45q, RT23q, #1; \</div><div class='del'>-	vshl.u64 RT67q, RT23q, #64 - 1; \</div><div class='del'>-	vshr.u64 RT01q, RT23q, #8; \</div><div class='del'>-	veor.u64 RT45q, RT45q, RT67q; \</div><div class='del'>-	vshl.u64 RT67q, RT23q, #64 - 8; \</div><div class='del'>-	veor.u64 RT45q, RT45q, RT01q; \</div><div class='del'>-	vshr.u64 RT01q, RT23q, #7; \</div><div class='del'>-	veor.u64 RT45q, RT45q, RT67q; \</div><div class='del'>-	\</div><div class='del'>-	/**** S1(w[14:15]) */ \</div><div class='del'>-	vshr.u64 RT23q, rw1415q, #6; \</div><div class='del'>-	veor.u64 RT01q, RT01q, RT45q; \</div><div class='del'>-	vshr.u64 RT45q, rw1415q, #19; \</div><div class='del'>-	vshl.u64 RT67q, rw1415q, #64 - 19; \</div><div class='del'>-	veor.u64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT45q, rw1415q, #61; \</div><div class='del'>-	veor.u64 RT23q, RT23q, RT67q; \</div><div class='del'>-	vshl.u64 RT67q, rw1415q, #64 - 61; \</div><div class='del'>-	veor.u64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vadd.u64 rw01q, RT01q; /* w[0:1] += S(w[1:2]) */ \</div><div class='del'>-	veor.u64 RT01q, RT23q, RT67q;</div><div class='del'>-#define vadd_RT01q(rw01q) \</div><div class='del'>-	/* w[0:1] += S(w[14:15]) */ \</div><div class='del'>-	vadd.u64 rw01q, RT01q;</div><div class='del'>-</div><div class='del'>-#define dummy(_) /*_*/</div><div class='del'>-</div><div class='del'>-#define rounds2_64_79(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, \</div><div class='del'>-	              interleave_op1, arg1, interleave_op2, arg2) \</div><div class='del'>-	/* t1 = h + Sum1 (e) + Ch (e, f, g) + k[t] + w[t]; */ \</div><div class='del'>-	vshr.u64 RT2, re, #14; \</div><div class='del'>-	vshl.u64 RT3, re, #64 - 14; \</div><div class='del'>-	interleave_op1(arg1); \</div><div class='del'>-	vshr.u64 RT4, re, #18; \</div><div class='del'>-	vshl.u64 RT5, re, #64 - 18; \</div><div class='del'>-	interleave_op2(arg2); \</div><div class='del'>-	vld1.64 {RT0}, [RK]!; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, re, #41; \</div><div class='del'>-	vshl.u64 RT5, re, #64 - 41; \</div><div class='del'>-	vadd.u64 RT0, RT0, rw0; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vmov.64 RT7, re; \</div><div class='del'>-	veor.64 RT1, RT2, RT3; \</div><div class='del'>-	vbsl.64 RT7, rf, rg; \</div><div class='del'>-	\</div><div class='del'>-	vadd.u64 RT1, RT1, rh; \</div><div class='del'>-	vshr.u64 RT2, ra, #28; \</div><div class='del'>-	vshl.u64 RT3, ra, #64 - 28; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT0; \</div><div class='del'>-	vshr.u64 RT4, ra, #34; \</div><div class='del'>-	vshl.u64 RT5, ra, #64 - 34; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT7; \</div><div class='del'>-	\</div><div class='del'>-	/* h = Sum0 (a) + Maj (a, b, c); */ \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, ra, #39; \</div><div class='del'>-	vshl.u64 RT5, ra, #64 - 39; \</div><div class='del'>-	veor.64 RT0, ra, rb; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vbsl.64 RT0, rc, rb; \</div><div class='del'>-	vadd.u64 rd, rd, RT1; /* d+=t1; */ \</div><div class='del'>-	veor.64 rh, RT2, RT3; \</div><div class='del'>-	\</div><div class='del'>-	/* t1 = g + Sum1 (d) + Ch (d, e, f) + k[t] + w[t]; */ \</div><div class='del'>-	vshr.u64 RT2, rd, #14; \</div><div class='del'>-	vshl.u64 RT3, rd, #64 - 14; \</div><div class='del'>-	vadd.u64 rh, rh, RT0; \</div><div class='del'>-	vshr.u64 RT4, rd, #18; \</div><div class='del'>-	vshl.u64 RT5, rd, #64 - 18; \</div><div class='del'>-	vadd.u64 rh, rh, RT1; /* h+=t1; */ \</div><div class='del'>-	vld1.64 {RT0}, [RK]!; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, rd, #41; \</div><div class='del'>-	vshl.u64 RT5, rd, #64 - 41; \</div><div class='del'>-	vadd.u64 RT0, RT0, rw1; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vmov.64 RT7, rd; \</div><div class='del'>-	veor.64 RT1, RT2, RT3; \</div><div class='del'>-	vbsl.64 RT7, re, rf; \</div><div class='del'>-	\</div><div class='del'>-	vadd.u64 RT1, RT1, rg; \</div><div class='del'>-	vshr.u64 RT2, rh, #28; \</div><div class='del'>-	vshl.u64 RT3, rh, #64 - 28; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT0; \</div><div class='del'>-	vshr.u64 RT4, rh, #34; \</div><div class='del'>-	vshl.u64 RT5, rh, #64 - 34; \</div><div class='del'>-	vadd.u64 RT1, RT1, RT7; \</div><div class='del'>-	\</div><div class='del'>-	/* g = Sum0 (h) + Maj (h, a, b); */ \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vshr.u64 RT4, rh, #39; \</div><div class='del'>-	vshl.u64 RT5, rh, #64 - 39; \</div><div class='del'>-	veor.64 RT0, rh, ra; \</div><div class='del'>-	veor.64 RT23q, RT23q, RT45q; \</div><div class='del'>-	vbsl.64 RT0, rb, ra; \</div><div class='del'>-	vadd.u64 rc, rc, RT1; /* c+=t1; */ \</div><div class='del'>-	veor.64 rg, RT2, RT3;</div><div class='del'>-#define vadd_rg_RT0(rg) \</div><div class='del'>-	vadd.u64 rg, rg, RT0;</div><div class='del'>-#define vadd_rg_RT1(rg) \</div><div class='del'>-	vadd.u64 rg, rg, RT1; /* g+=t1; */</div><div class='del'>-</div><div class='del'>-.align 3</div><div class='del'>-ENTRY(sha512_transform_neon)</div><div class='del'>-	/* Input:</div><div class='del'>-	 *	%r0: SHA512_CONTEXT</div><div class='del'>-	 *	%r1: data</div><div class='del'>-	 *	%r2: u64 k[] constants</div><div class='del'>-	 *	%r3: nblks</div><div class='del'>-	 */</div><div class='del'>-	push {%lr};</div><div class='del'>-</div><div class='del'>-	mov %lr, #0;</div><div class='del'>-</div><div class='del'>-	/* Load context to d0-d7 */</div><div class='del'>-	vld1.64 {RA-RD}, [%r0]!;</div><div class='del'>-	vld1.64 {RE-RH}, [%r0];</div><div class='del'>-	sub %r0, #(4*8);</div><div class='del'>-</div><div class='del'>-	/* Load input to w[16], d16-d31 */</div><div class='del'>-	/* NOTE: Assumes that on ARMv7 unaligned accesses are always allowed. */</div><div class='del'>-	vld1.64 {RW0-RW3}, [%r1]!;</div><div class='del'>-	vld1.64 {RW4-RW7}, [%r1]!;</div><div class='del'>-	vld1.64 {RW8-RW11}, [%r1]!;</div><div class='del'>-	vld1.64 {RW12-RW15}, [%r1]!;</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	/* byteswap */</div><div class='del'>-	vrev64.8 RW01q, RW01q;</div><div class='del'>-	vrev64.8 RW23q, RW23q;</div><div class='del'>-	vrev64.8 RW45q, RW45q;</div><div class='del'>-	vrev64.8 RW67q, RW67q;</div><div class='del'>-	vrev64.8 RW89q, RW89q;</div><div class='del'>-	vrev64.8 RW1011q, RW1011q;</div><div class='del'>-	vrev64.8 RW1213q, RW1213q;</div><div class='del'>-	vrev64.8 RW1415q, RW1415q;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* EABI says that d8-d15 must be preserved by callee. */</div><div class='del'>-	/*vpush {RT0-RT7};*/</div><div class='del'>-</div><div class='del'>-.Loop:</div><div class='del'>-	rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,</div><div class='del'>-		     RW23q, RW1415q, RW9, RW10, dummy, _);</div><div class='del'>-	b .Lenter_rounds;</div><div class='del'>-</div><div class='del'>-.Loop_rounds:</div><div class='del'>-	rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,</div><div class='del'>-		     RW23q, RW1415q, RW9, RW10, vadd_RT01q, RW1415q);</div><div class='del'>-.Lenter_rounds:</div><div class='del'>-	rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3, RW23q, RW4,</div><div class='del'>-		     RW45q, RW01q, RW11, RW12, vadd_RT01q, RW01q);</div><div class='del'>-	rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, RW45q, RW6,</div><div class='del'>-		     RW67q, RW23q, RW13, RW14, vadd_RT01q, RW23q);</div><div class='del'>-	rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, RW67q, RW8,</div><div class='del'>-		     RW89q, RW45q, RW15, RW0, vadd_RT01q, RW45q);</div><div class='del'>-	rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, RW89q, RW10,</div><div class='del'>-		     RW1011q, RW67q, RW1, RW2, vadd_RT01q, RW67q);</div><div class='del'>-	rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, RW1011q, RW12,</div><div class='del'>-		     RW1213q, RW89q, RW3, RW4, vadd_RT01q, RW89q);</div><div class='del'>-	add %lr, #16;</div><div class='del'>-	rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, RW1213q, RW14,</div><div class='del'>-		     RW1415q, RW1011q, RW5, RW6, vadd_RT01q, RW1011q);</div><div class='del'>-	cmp %lr, #64;</div><div class='del'>-	rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15, RW1415q, RW0,</div><div class='del'>-		     RW01q, RW1213q, RW7, RW8, vadd_RT01q, RW1213q);</div><div class='del'>-	bne .Loop_rounds;</div><div class='del'>-</div><div class='del'>-	subs %r3, #1;</div><div class='del'>-</div><div class='del'>-	rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1,</div><div class='del'>-		      vadd_RT01q, RW1415q, dummy, _);</div><div class='del'>-	rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3,</div><div class='del'>-		      vadd_rg_RT0, RG, vadd_rg_RT1, RG);</div><div class='del'>-	beq .Lhandle_tail;</div><div class='del'>-	vld1.64 {RW0-RW3}, [%r1]!;</div><div class='del'>-	rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5,</div><div class='del'>-		      vadd_rg_RT0, RE, vadd_rg_RT1, RE);</div><div class='del'>-	rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7,</div><div class='del'>-		      vadd_rg_RT0, RC, vadd_rg_RT1, RC);</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	vrev64.8 RW01q, RW01q;</div><div class='del'>-	vrev64.8 RW23q, RW23q;</div><div class='del'>-#endif</div><div class='del'>-	vld1.64 {RW4-RW7}, [%r1]!;</div><div class='del'>-	rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9,</div><div class='del'>-		      vadd_rg_RT0, RA, vadd_rg_RT1, RA);</div><div class='del'>-	rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11,</div><div class='del'>-		      vadd_rg_RT0, RG, vadd_rg_RT1, RG);</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	vrev64.8 RW45q, RW45q;</div><div class='del'>-	vrev64.8 RW67q, RW67q;</div><div class='del'>-#endif</div><div class='del'>-	vld1.64 {RW8-RW11}, [%r1]!;</div><div class='del'>-	rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13,</div><div class='del'>-		      vadd_rg_RT0, RE, vadd_rg_RT1, RE);</div><div class='del'>-	rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15,</div><div class='del'>-		      vadd_rg_RT0, RC, vadd_rg_RT1, RC);</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	vrev64.8 RW89q, RW89q;</div><div class='del'>-	vrev64.8 RW1011q, RW1011q;</div><div class='del'>-#endif</div><div class='del'>-	vld1.64 {RW12-RW15}, [%r1]!;</div><div class='del'>-	vadd_rg_RT0(RA);</div><div class='del'>-	vadd_rg_RT1(RA);</div><div class='del'>-</div><div class='del'>-	/* Load context */</div><div class='del'>-	vld1.64 {RT0-RT3}, [%r0]!;</div><div class='del'>-	vld1.64 {RT4-RT7}, [%r0];</div><div class='del'>-	sub %r0, #(4*8);</div><div class='del'>-</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	vrev64.8 RW1213q, RW1213q;</div><div class='del'>-	vrev64.8 RW1415q, RW1415q;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	vadd.u64 RA, RT0;</div><div class='del'>-	vadd.u64 RB, RT1;</div><div class='del'>-	vadd.u64 RC, RT2;</div><div class='del'>-	vadd.u64 RD, RT3;</div><div class='del'>-	vadd.u64 RE, RT4;</div><div class='del'>-	vadd.u64 RF, RT5;</div><div class='del'>-	vadd.u64 RG, RT6;</div><div class='del'>-	vadd.u64 RH, RT7;</div><div class='del'>-</div><div class='del'>-	/* Store the first half of context */</div><div class='del'>-	vst1.64 {RA-RD}, [%r0]!;</div><div class='del'>-	sub RK, $(8*80);</div><div class='del'>-	vst1.64 {RE-RH}, [%r0]; /* Store the last half of context */</div><div class='del'>-	mov %lr, #0;</div><div class='del'>-	sub %r0, #(4*8);</div><div class='del'>-</div><div class='del'>-	b .Loop;</div><div class='del'>-</div><div class='del'>-.Lhandle_tail:</div><div class='del'>-	rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5,</div><div class='del'>-		      vadd_rg_RT0, RE, vadd_rg_RT1, RE);</div><div class='del'>-	rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7,</div><div class='del'>-		      vadd_rg_RT0, RC, vadd_rg_RT1, RC);</div><div class='del'>-	rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9,</div><div class='del'>-		      vadd_rg_RT0, RA, vadd_rg_RT1, RA);</div><div class='del'>-	rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11,</div><div class='del'>-		      vadd_rg_RT0, RG, vadd_rg_RT1, RG);</div><div class='del'>-	rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13,</div><div class='del'>-		      vadd_rg_RT0, RE, vadd_rg_RT1, RE);</div><div class='del'>-	rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15,</div><div class='del'>-		      vadd_rg_RT0, RC, vadd_rg_RT1, RC);</div><div class='del'>-</div><div class='del'>-	/* Load context to d16-d23 */</div><div class='del'>-	vld1.64 {RW0-RW3}, [%r0]!;</div><div class='del'>-	vadd_rg_RT0(RA);</div><div class='del'>-	vld1.64 {RW4-RW7}, [%r0];</div><div class='del'>-	vadd_rg_RT1(RA);</div><div class='del'>-	sub %r0, #(4*8);</div><div class='del'>-</div><div class='del'>-	vadd.u64 RA, RW0;</div><div class='del'>-	vadd.u64 RB, RW1;</div><div class='del'>-	vadd.u64 RC, RW2;</div><div class='del'>-	vadd.u64 RD, RW3;</div><div class='del'>-	vadd.u64 RE, RW4;</div><div class='del'>-	vadd.u64 RF, RW5;</div><div class='del'>-	vadd.u64 RG, RW6;</div><div class='del'>-	vadd.u64 RH, RW7;</div><div class='del'>-</div><div class='del'>-	/* Store the first half of context */</div><div class='del'>-	vst1.64 {RA-RD}, [%r0]!;</div><div class='del'>-</div><div class='del'>-	/* Clear used registers */</div><div class='del'>-	/* d16-d31 */</div><div class='del'>-	veor.u64 RW01q, RW01q;</div><div class='del'>-	veor.u64 RW23q, RW23q;</div><div class='del'>-	veor.u64 RW45q, RW45q;</div><div class='del'>-	veor.u64 RW67q, RW67q;</div><div class='del'>-	vst1.64 {RE-RH}, [%r0]; /* Store the last half of context */</div><div class='del'>-	veor.u64 RW89q, RW89q;</div><div class='del'>-	veor.u64 RW1011q, RW1011q;</div><div class='del'>-	veor.u64 RW1213q, RW1213q;</div><div class='del'>-	veor.u64 RW1415q, RW1415q;</div><div class='del'>-	/* d8-d15 */</div><div class='del'>-	/*vpop {RT0-RT7};*/</div><div class='del'>-	/* d0-d7 (q0-q3) */</div><div class='del'>-	veor.u64 %q0, %q0;</div><div class='del'>-	veor.u64 %q1, %q1;</div><div class='del'>-	veor.u64 %q2, %q2;</div><div class='del'>-	veor.u64 %q3, %q3;</div><div class='del'>-</div><div class='del'>-	pop {%pc};</div><div class='del'>-ENDPROC(sha512_transform_neon)</div><div class='head'>diff --git a/arch/arm/crypto/sha512-core.S_shipped b/arch/arm/crypto/sha512-core.S_shipped<br/>new file mode 100644<br/>index 000000000000..3694c4d4ca2b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/sha512-core.S_shipped?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-core.S_shipped</a></div><div class='hunk'>@@ -0,0 +1,1861 @@</div><div class='add'>+</div><div class='add'>+@ ====================================================================</div><div class='add'>+@ Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='add'>+@ project. The module is, however, dual licensed under OpenSSL and</div><div class='add'>+@ CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='add'>+@ details see http://www.openssl.org/~appro/cryptogams/.</div><div class='add'>+@</div><div class='add'>+@ Permission to use under GPL terms is granted.</div><div class='add'>+@ ====================================================================</div><div class='add'>+</div><div class='add'>+@ SHA512 block procedure for ARMv4. September 2007.</div><div class='add'>+</div><div class='add'>+@ This code is ~4.5 (four and a half) times faster than code generated</div><div class='add'>+@ by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue</div><div class='add'>+@ Xscale PXA250 core].</div><div class='add'>+@</div><div class='add'>+@ July 2010.</div><div class='add'>+@</div><div class='add'>+@ Rescheduling for dual-issue pipeline resulted in 6% improvement on</div><div class='add'>+@ Cortex A8 core and ~40 cycles per processed byte.</div><div class='add'>+</div><div class='add'>+@ February 2011.</div><div class='add'>+@</div><div class='add'>+@ Profiler-assisted and platform-specific optimization resulted in 7%</div><div class='add'>+@ improvement on Coxtex A8 core and ~38 cycles per byte.</div><div class='add'>+</div><div class='add'>+@ March 2011.</div><div class='add'>+@</div><div class='add'>+@ Add NEON implementation. On Cortex A8 it was measured to process</div><div class='add'>+@ one byte in 23.3 cycles or ~60% faster than integer-only code.</div><div class='add'>+</div><div class='add'>+@ August 2012.</div><div class='add'>+@</div><div class='add'>+@ Improve NEON performance by 12% on Snapdragon S4. In absolute</div><div class='add'>+@ terms it's 22.6 cycles per byte, which is disappointing result.</div><div class='add'>+@ Technical writers asserted that 3-way S4 pipeline can sustain</div><div class='add'>+@ multiple NEON instructions per cycle, but dual NEON issue could</div><div class='add'>+@ not be observed, see http://www.openssl.org/~appro/Snapdragon-S4.html</div><div class='add'>+@ for further details. On side note Cortex-A15 processes one byte in</div><div class='add'>+@ 16 cycles.</div><div class='add'>+</div><div class='add'>+@ Byte order [in]dependence. =========================================</div><div class='add'>+@</div><div class='add'>+@ Originally caller was expected to maintain specific *dword* order in</div><div class='add'>+@ h[0-7], namely with most significant dword at *lower* address, which</div><div class='add'>+@ was reflected in below two parameters as 0 and 4. Now caller is</div><div class='add'>+@ expected to maintain native byte order for whole 64-bit values.</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+# include "arm_arch.h"</div><div class='add'>+# define VFP_ABI_PUSH	vstmdb	sp!,{d8-d15}</div><div class='add'>+# define VFP_ABI_POP	vldmia	sp!,{d8-d15}</div><div class='add'>+#else</div><div class='add'>+# define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='add'>+# define __ARM_MAX_ARCH__ 7</div><div class='add'>+# define VFP_ABI_PUSH</div><div class='add'>+# define VFP_ABI_POP</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef __ARMEL__</div><div class='add'>+# define LO 0</div><div class='add'>+# define HI 4</div><div class='add'>+# define WORD64(hi0,lo0,hi1,lo1)	.word	lo0,hi0, lo1,hi1</div><div class='add'>+#else</div><div class='add'>+# define HI 0</div><div class='add'>+# define LO 4</div><div class='add'>+# define WORD64(hi0,lo0,hi1,lo1)	.word	hi0,lo0, hi1,lo1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.text</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+.code	32</div><div class='add'>+#else</div><div class='add'>+.syntax unified</div><div class='add'>+# ifdef __thumb2__</div><div class='add'>+#  define adrl adr</div><div class='add'>+.thumb</div><div class='add'>+# else</div><div class='add'>+.code   32</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.type	K512,%object</div><div class='add'>+.align	5</div><div class='add'>+K512:</div><div class='add'>+WORD64(0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd)</div><div class='add'>+WORD64(0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc)</div><div class='add'>+WORD64(0x3956c25b,0xf348b538, 0x59f111f1,0xb605d019)</div><div class='add'>+WORD64(0x923f82a4,0xaf194f9b, 0xab1c5ed5,0xda6d8118)</div><div class='add'>+WORD64(0xd807aa98,0xa3030242, 0x12835b01,0x45706fbe)</div><div class='add'>+WORD64(0x243185be,0x4ee4b28c, 0x550c7dc3,0xd5ffb4e2)</div><div class='add'>+WORD64(0x72be5d74,0xf27b896f, 0x80deb1fe,0x3b1696b1)</div><div class='add'>+WORD64(0x9bdc06a7,0x25c71235, 0xc19bf174,0xcf692694)</div><div class='add'>+WORD64(0xe49b69c1,0x9ef14ad2, 0xefbe4786,0x384f25e3)</div><div class='add'>+WORD64(0x0fc19dc6,0x8b8cd5b5, 0x240ca1cc,0x77ac9c65)</div><div class='add'>+WORD64(0x2de92c6f,0x592b0275, 0x4a7484aa,0x6ea6e483)</div><div class='add'>+WORD64(0x5cb0a9dc,0xbd41fbd4, 0x76f988da,0x831153b5)</div><div class='add'>+WORD64(0x983e5152,0xee66dfab, 0xa831c66d,0x2db43210)</div><div class='add'>+WORD64(0xb00327c8,0x98fb213f, 0xbf597fc7,0xbeef0ee4)</div><div class='add'>+WORD64(0xc6e00bf3,0x3da88fc2, 0xd5a79147,0x930aa725)</div><div class='add'>+WORD64(0x06ca6351,0xe003826f, 0x14292967,0x0a0e6e70)</div><div class='add'>+WORD64(0x27b70a85,0x46d22ffc, 0x2e1b2138,0x5c26c926)</div><div class='add'>+WORD64(0x4d2c6dfc,0x5ac42aed, 0x53380d13,0x9d95b3df)</div><div class='add'>+WORD64(0x650a7354,0x8baf63de, 0x766a0abb,0x3c77b2a8)</div><div class='add'>+WORD64(0x81c2c92e,0x47edaee6, 0x92722c85,0x1482353b)</div><div class='add'>+WORD64(0xa2bfe8a1,0x4cf10364, 0xa81a664b,0xbc423001)</div><div class='add'>+WORD64(0xc24b8b70,0xd0f89791, 0xc76c51a3,0x0654be30)</div><div class='add'>+WORD64(0xd192e819,0xd6ef5218, 0xd6990624,0x5565a910)</div><div class='add'>+WORD64(0xf40e3585,0x5771202a, 0x106aa070,0x32bbd1b8)</div><div class='add'>+WORD64(0x19a4c116,0xb8d2d0c8, 0x1e376c08,0x5141ab53)</div><div class='add'>+WORD64(0x2748774c,0xdf8eeb99, 0x34b0bcb5,0xe19b48a8)</div><div class='add'>+WORD64(0x391c0cb3,0xc5c95a63, 0x4ed8aa4a,0xe3418acb)</div><div class='add'>+WORD64(0x5b9cca4f,0x7763e373, 0x682e6ff3,0xd6b2b8a3)</div><div class='add'>+WORD64(0x748f82ee,0x5defb2fc, 0x78a5636f,0x43172f60)</div><div class='add'>+WORD64(0x84c87814,0xa1f0ab72, 0x8cc70208,0x1a6439ec)</div><div class='add'>+WORD64(0x90befffa,0x23631e28, 0xa4506ceb,0xde82bde9)</div><div class='add'>+WORD64(0xbef9a3f7,0xb2c67915, 0xc67178f2,0xe372532b)</div><div class='add'>+WORD64(0xca273ece,0xea26619c, 0xd186b8c7,0x21c0c207)</div><div class='add'>+WORD64(0xeada7dd6,0xcde0eb1e, 0xf57d4f7f,0xee6ed178)</div><div class='add'>+WORD64(0x06f067aa,0x72176fba, 0x0a637dc5,0xa2c898a6)</div><div class='add'>+WORD64(0x113f9804,0xbef90dae, 0x1b710b35,0x131c471b)</div><div class='add'>+WORD64(0x28db77f5,0x23047d84, 0x32caab7b,0x40c72493)</div><div class='add'>+WORD64(0x3c9ebe0a,0x15c9bebc, 0x431d67c4,0x9c100d4c)</div><div class='add'>+WORD64(0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a)</div><div class='add'>+WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)</div><div class='add'>+.size	K512,.-K512</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+.LOPENSSL_armcap:</div><div class='add'>+.word	OPENSSL_armcap_P-sha512_block_data_order</div><div class='add'>+.skip	32-4</div><div class='add'>+#else</div><div class='add'>+.skip	32</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.global	sha512_block_data_order</div><div class='add'>+.type	sha512_block_data_order,%function</div><div class='add'>+sha512_block_data_order:</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+	sub	r3,pc,#8		@ sha512_block_data_order</div><div class='add'>+#else</div><div class='add'>+	adr	r3,sha512_block_data_order</div><div class='add'>+#endif</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+	ldr	r12,.LOPENSSL_armcap</div><div class='add'>+	ldr	r12,[r3,r12]		@ OPENSSL_armcap_P</div><div class='add'>+	tst	r12,#1</div><div class='add'>+	bne	.LNEON</div><div class='add'>+#endif</div><div class='add'>+	add	r2,r1,r2,lsl#7	@ len to point at the end of inp</div><div class='add'>+	stmdb	sp!,{r4-r12,lr}</div><div class='add'>+	sub	r14,r3,#672		@ K512</div><div class='add'>+	sub	sp,sp,#9*8</div><div class='add'>+</div><div class='add'>+	ldr	r7,[r0,#32+LO]</div><div class='add'>+	ldr	r8,[r0,#32+HI]</div><div class='add'>+	ldr	r9, [r0,#48+LO]</div><div class='add'>+	ldr	r10, [r0,#48+HI]</div><div class='add'>+	ldr	r11, [r0,#56+LO]</div><div class='add'>+	ldr	r12, [r0,#56+HI]</div><div class='add'>+.Loop:</div><div class='add'>+	str	r9, [sp,#48+0]</div><div class='add'>+	str	r10, [sp,#48+4]</div><div class='add'>+	str	r11, [sp,#56+0]</div><div class='add'>+	str	r12, [sp,#56+4]</div><div class='add'>+	ldr	r5,[r0,#0+LO]</div><div class='add'>+	ldr	r6,[r0,#0+HI]</div><div class='add'>+	ldr	r3,[r0,#8+LO]</div><div class='add'>+	ldr	r4,[r0,#8+HI]</div><div class='add'>+	ldr	r9, [r0,#16+LO]</div><div class='add'>+	ldr	r10, [r0,#16+HI]</div><div class='add'>+	ldr	r11, [r0,#24+LO]</div><div class='add'>+	ldr	r12, [r0,#24+HI]</div><div class='add'>+	str	r3,[sp,#8+0]</div><div class='add'>+	str	r4,[sp,#8+4]</div><div class='add'>+	str	r9, [sp,#16+0]</div><div class='add'>+	str	r10, [sp,#16+4]</div><div class='add'>+	str	r11, [sp,#24+0]</div><div class='add'>+	str	r12, [sp,#24+4]</div><div class='add'>+	ldr	r3,[r0,#40+LO]</div><div class='add'>+	ldr	r4,[r0,#40+HI]</div><div class='add'>+	str	r3,[sp,#40+0]</div><div class='add'>+	str	r4,[sp,#40+4]</div><div class='add'>+</div><div class='add'>+.L00_15:</div><div class='add'>+#if __ARM_ARCH__&lt;7</div><div class='add'>+	ldrb	r3,[r1,#7]</div><div class='add'>+	ldrb	r9, [r1,#6]</div><div class='add'>+	ldrb	r10, [r1,#5]</div><div class='add'>+	ldrb	r11, [r1,#4]</div><div class='add'>+	ldrb	r4,[r1,#3]</div><div class='add'>+	ldrb	r12, [r1,#2]</div><div class='add'>+	orr	r3,r3,r9,lsl#8</div><div class='add'>+	ldrb	r9, [r1,#1]</div><div class='add'>+	orr	r3,r3,r10,lsl#16</div><div class='add'>+	ldrb	r10, [r1],#8</div><div class='add'>+	orr	r3,r3,r11,lsl#24</div><div class='add'>+	orr	r4,r4,r12,lsl#8</div><div class='add'>+	orr	r4,r4,r9,lsl#16</div><div class='add'>+	orr	r4,r4,r10,lsl#24</div><div class='add'>+#else</div><div class='add'>+	ldr	r3,[r1,#4]</div><div class='add'>+	ldr	r4,[r1],#8</div><div class='add'>+#ifdef __ARMEL__</div><div class='add'>+	rev	r3,r3</div><div class='add'>+	rev	r4,r4</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+	@ Sigma1(x)	(ROTR((x),14) ^ ROTR((x),18)  ^ ROTR((x),41))</div><div class='add'>+	@ LO		lo&gt;&gt;14^hi&lt;&lt;18 ^ lo&gt;&gt;18^hi&lt;&lt;14 ^ hi&gt;&gt;9^lo&lt;&lt;23</div><div class='add'>+	@ HI		hi&gt;&gt;14^lo&lt;&lt;18 ^ hi&gt;&gt;18^lo&lt;&lt;14 ^ lo&gt;&gt;9^hi&lt;&lt;23</div><div class='add'>+	mov	r9,r7,lsr#14</div><div class='add'>+	str	r3,[sp,#64+0]</div><div class='add'>+	mov	r10,r8,lsr#14</div><div class='add'>+	str	r4,[sp,#64+4]</div><div class='add'>+	eor	r9,r9,r8,lsl#18</div><div class='add'>+	ldr	r11,[sp,#56+0]	@ h.lo</div><div class='add'>+	eor	r10,r10,r7,lsl#18</div><div class='add'>+	ldr	r12,[sp,#56+4]	@ h.hi</div><div class='add'>+	eor	r9,r9,r7,lsr#18</div><div class='add'>+	eor	r10,r10,r8,lsr#18</div><div class='add'>+	eor	r9,r9,r8,lsl#14</div><div class='add'>+	eor	r10,r10,r7,lsl#14</div><div class='add'>+	eor	r9,r9,r8,lsr#9</div><div class='add'>+	eor	r10,r10,r7,lsr#9</div><div class='add'>+	eor	r9,r9,r7,lsl#23</div><div class='add'>+	eor	r10,r10,r8,lsl#23	@ Sigma1(e)</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	ldr	r9,[sp,#40+0]	@ f.lo</div><div class='add'>+	adc	r4,r4,r10		@ T += Sigma1(e)</div><div class='add'>+	ldr	r10,[sp,#40+4]	@ f.hi</div><div class='add'>+	adds	r3,r3,r11</div><div class='add'>+	ldr	r11,[sp,#48+0]	@ g.lo</div><div class='add'>+	adc	r4,r4,r12		@ T += h</div><div class='add'>+	ldr	r12,[sp,#48+4]	@ g.hi</div><div class='add'>+</div><div class='add'>+	eor	r9,r9,r11</div><div class='add'>+	str	r7,[sp,#32+0]</div><div class='add'>+	eor	r10,r10,r12</div><div class='add'>+	str	r8,[sp,#32+4]</div><div class='add'>+	and	r9,r9,r7</div><div class='add'>+	str	r5,[sp,#0+0]</div><div class='add'>+	and	r10,r10,r8</div><div class='add'>+	str	r6,[sp,#0+4]</div><div class='add'>+	eor	r9,r9,r11</div><div class='add'>+	ldr	r11,[r14,#LO]	@ K[i].lo</div><div class='add'>+	eor	r10,r10,r12		@ Ch(e,f,g)</div><div class='add'>+	ldr	r12,[r14,#HI]	@ K[i].hi</div><div class='add'>+</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	ldr	r7,[sp,#24+0]	@ d.lo</div><div class='add'>+	adc	r4,r4,r10		@ T += Ch(e,f,g)</div><div class='add'>+	ldr	r8,[sp,#24+4]	@ d.hi</div><div class='add'>+	adds	r3,r3,r11</div><div class='add'>+	and	r9,r11,#0xff</div><div class='add'>+	adc	r4,r4,r12		@ T += K[i]</div><div class='add'>+	adds	r7,r7,r3</div><div class='add'>+	ldr	r11,[sp,#8+0]	@ b.lo</div><div class='add'>+	adc	r8,r8,r4		@ d += T</div><div class='add'>+	teq	r9,#148</div><div class='add'>+</div><div class='add'>+	ldr	r12,[sp,#16+0]	@ c.lo</div><div class='add'>+#if __ARM_ARCH__&gt;=7</div><div class='add'>+	it	eq			@ Thumb2 thing, sanity check in ARM</div><div class='add'>+#endif</div><div class='add'>+	orreq	r14,r14,#1</div><div class='add'>+	@ Sigma0(x)	(ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))</div><div class='add'>+	@ LO		lo&gt;&gt;28^hi&lt;&lt;4  ^ hi&gt;&gt;2^lo&lt;&lt;30 ^ hi&gt;&gt;7^lo&lt;&lt;25</div><div class='add'>+	@ HI		hi&gt;&gt;28^lo&lt;&lt;4  ^ lo&gt;&gt;2^hi&lt;&lt;30 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='add'>+	mov	r9,r5,lsr#28</div><div class='add'>+	mov	r10,r6,lsr#28</div><div class='add'>+	eor	r9,r9,r6,lsl#4</div><div class='add'>+	eor	r10,r10,r5,lsl#4</div><div class='add'>+	eor	r9,r9,r6,lsr#2</div><div class='add'>+	eor	r10,r10,r5,lsr#2</div><div class='add'>+	eor	r9,r9,r5,lsl#30</div><div class='add'>+	eor	r10,r10,r6,lsl#30</div><div class='add'>+	eor	r9,r9,r6,lsr#7</div><div class='add'>+	eor	r10,r10,r5,lsr#7</div><div class='add'>+	eor	r9,r9,r5,lsl#25</div><div class='add'>+	eor	r10,r10,r6,lsl#25	@ Sigma0(a)</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	and	r9,r5,r11</div><div class='add'>+	adc	r4,r4,r10		@ T += Sigma0(a)</div><div class='add'>+</div><div class='add'>+	ldr	r10,[sp,#8+4]	@ b.hi</div><div class='add'>+	orr	r5,r5,r11</div><div class='add'>+	ldr	r11,[sp,#16+4]	@ c.hi</div><div class='add'>+	and	r5,r5,r12</div><div class='add'>+	and	r12,r6,r10</div><div class='add'>+	orr	r6,r6,r10</div><div class='add'>+	orr	r5,r5,r9		@ Maj(a,b,c).lo</div><div class='add'>+	and	r6,r6,r11</div><div class='add'>+	adds	r5,r5,r3</div><div class='add'>+	orr	r6,r6,r12		@ Maj(a,b,c).hi</div><div class='add'>+	sub	sp,sp,#8</div><div class='add'>+	adc	r6,r6,r4		@ h += T</div><div class='add'>+	tst	r14,#1</div><div class='add'>+	add	r14,r14,#8</div><div class='add'>+	tst	r14,#1</div><div class='add'>+	beq	.L00_15</div><div class='add'>+	ldr	r9,[sp,#184+0]</div><div class='add'>+	ldr	r10,[sp,#184+4]</div><div class='add'>+	bic	r14,r14,#1</div><div class='add'>+.L16_79:</div><div class='add'>+	@ sigma0(x)	(ROTR((x),1)  ^ ROTR((x),8)  ^ ((x)&gt;&gt;7))</div><div class='add'>+	@ LO		lo&gt;&gt;1^hi&lt;&lt;31  ^ lo&gt;&gt;8^hi&lt;&lt;24 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='add'>+	@ HI		hi&gt;&gt;1^lo&lt;&lt;31  ^ hi&gt;&gt;8^lo&lt;&lt;24 ^ hi&gt;&gt;7</div><div class='add'>+	mov	r3,r9,lsr#1</div><div class='add'>+	ldr	r11,[sp,#80+0]</div><div class='add'>+	mov	r4,r10,lsr#1</div><div class='add'>+	ldr	r12,[sp,#80+4]</div><div class='add'>+	eor	r3,r3,r10,lsl#31</div><div class='add'>+	eor	r4,r4,r9,lsl#31</div><div class='add'>+	eor	r3,r3,r9,lsr#8</div><div class='add'>+	eor	r4,r4,r10,lsr#8</div><div class='add'>+	eor	r3,r3,r10,lsl#24</div><div class='add'>+	eor	r4,r4,r9,lsl#24</div><div class='add'>+	eor	r3,r3,r9,lsr#7</div><div class='add'>+	eor	r4,r4,r10,lsr#7</div><div class='add'>+	eor	r3,r3,r10,lsl#25</div><div class='add'>+</div><div class='add'>+	@ sigma1(x)	(ROTR((x),19) ^ ROTR((x),61) ^ ((x)&gt;&gt;6))</div><div class='add'>+	@ LO		lo&gt;&gt;19^hi&lt;&lt;13 ^ hi&gt;&gt;29^lo&lt;&lt;3 ^ lo&gt;&gt;6^hi&lt;&lt;26</div><div class='add'>+	@ HI		hi&gt;&gt;19^lo&lt;&lt;13 ^ lo&gt;&gt;29^hi&lt;&lt;3 ^ hi&gt;&gt;6</div><div class='add'>+	mov	r9,r11,lsr#19</div><div class='add'>+	mov	r10,r12,lsr#19</div><div class='add'>+	eor	r9,r9,r12,lsl#13</div><div class='add'>+	eor	r10,r10,r11,lsl#13</div><div class='add'>+	eor	r9,r9,r12,lsr#29</div><div class='add'>+	eor	r10,r10,r11,lsr#29</div><div class='add'>+	eor	r9,r9,r11,lsl#3</div><div class='add'>+	eor	r10,r10,r12,lsl#3</div><div class='add'>+	eor	r9,r9,r11,lsr#6</div><div class='add'>+	eor	r10,r10,r12,lsr#6</div><div class='add'>+	ldr	r11,[sp,#120+0]</div><div class='add'>+	eor	r9,r9,r12,lsl#26</div><div class='add'>+</div><div class='add'>+	ldr	r12,[sp,#120+4]</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	ldr	r9,[sp,#192+0]</div><div class='add'>+	adc	r4,r4,r10</div><div class='add'>+</div><div class='add'>+	ldr	r10,[sp,#192+4]</div><div class='add'>+	adds	r3,r3,r11</div><div class='add'>+	adc	r4,r4,r12</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	adc	r4,r4,r10</div><div class='add'>+	@ Sigma1(x)	(ROTR((x),14) ^ ROTR((x),18)  ^ ROTR((x),41))</div><div class='add'>+	@ LO		lo&gt;&gt;14^hi&lt;&lt;18 ^ lo&gt;&gt;18^hi&lt;&lt;14 ^ hi&gt;&gt;9^lo&lt;&lt;23</div><div class='add'>+	@ HI		hi&gt;&gt;14^lo&lt;&lt;18 ^ hi&gt;&gt;18^lo&lt;&lt;14 ^ lo&gt;&gt;9^hi&lt;&lt;23</div><div class='add'>+	mov	r9,r7,lsr#14</div><div class='add'>+	str	r3,[sp,#64+0]</div><div class='add'>+	mov	r10,r8,lsr#14</div><div class='add'>+	str	r4,[sp,#64+4]</div><div class='add'>+	eor	r9,r9,r8,lsl#18</div><div class='add'>+	ldr	r11,[sp,#56+0]	@ h.lo</div><div class='add'>+	eor	r10,r10,r7,lsl#18</div><div class='add'>+	ldr	r12,[sp,#56+4]	@ h.hi</div><div class='add'>+	eor	r9,r9,r7,lsr#18</div><div class='add'>+	eor	r10,r10,r8,lsr#18</div><div class='add'>+	eor	r9,r9,r8,lsl#14</div><div class='add'>+	eor	r10,r10,r7,lsl#14</div><div class='add'>+	eor	r9,r9,r8,lsr#9</div><div class='add'>+	eor	r10,r10,r7,lsr#9</div><div class='add'>+	eor	r9,r9,r7,lsl#23</div><div class='add'>+	eor	r10,r10,r8,lsl#23	@ Sigma1(e)</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	ldr	r9,[sp,#40+0]	@ f.lo</div><div class='add'>+	adc	r4,r4,r10		@ T += Sigma1(e)</div><div class='add'>+	ldr	r10,[sp,#40+4]	@ f.hi</div><div class='add'>+	adds	r3,r3,r11</div><div class='add'>+	ldr	r11,[sp,#48+0]	@ g.lo</div><div class='add'>+	adc	r4,r4,r12		@ T += h</div><div class='add'>+	ldr	r12,[sp,#48+4]	@ g.hi</div><div class='add'>+</div><div class='add'>+	eor	r9,r9,r11</div><div class='add'>+	str	r7,[sp,#32+0]</div><div class='add'>+	eor	r10,r10,r12</div><div class='add'>+	str	r8,[sp,#32+4]</div><div class='add'>+	and	r9,r9,r7</div><div class='add'>+	str	r5,[sp,#0+0]</div><div class='add'>+	and	r10,r10,r8</div><div class='add'>+	str	r6,[sp,#0+4]</div><div class='add'>+	eor	r9,r9,r11</div><div class='add'>+	ldr	r11,[r14,#LO]	@ K[i].lo</div><div class='add'>+	eor	r10,r10,r12		@ Ch(e,f,g)</div><div class='add'>+	ldr	r12,[r14,#HI]	@ K[i].hi</div><div class='add'>+</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	ldr	r7,[sp,#24+0]	@ d.lo</div><div class='add'>+	adc	r4,r4,r10		@ T += Ch(e,f,g)</div><div class='add'>+	ldr	r8,[sp,#24+4]	@ d.hi</div><div class='add'>+	adds	r3,r3,r11</div><div class='add'>+	and	r9,r11,#0xff</div><div class='add'>+	adc	r4,r4,r12		@ T += K[i]</div><div class='add'>+	adds	r7,r7,r3</div><div class='add'>+	ldr	r11,[sp,#8+0]	@ b.lo</div><div class='add'>+	adc	r8,r8,r4		@ d += T</div><div class='add'>+	teq	r9,#23</div><div class='add'>+</div><div class='add'>+	ldr	r12,[sp,#16+0]	@ c.lo</div><div class='add'>+#if __ARM_ARCH__&gt;=7</div><div class='add'>+	it	eq			@ Thumb2 thing, sanity check in ARM</div><div class='add'>+#endif</div><div class='add'>+	orreq	r14,r14,#1</div><div class='add'>+	@ Sigma0(x)	(ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))</div><div class='add'>+	@ LO		lo&gt;&gt;28^hi&lt;&lt;4  ^ hi&gt;&gt;2^lo&lt;&lt;30 ^ hi&gt;&gt;7^lo&lt;&lt;25</div><div class='add'>+	@ HI		hi&gt;&gt;28^lo&lt;&lt;4  ^ lo&gt;&gt;2^hi&lt;&lt;30 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='add'>+	mov	r9,r5,lsr#28</div><div class='add'>+	mov	r10,r6,lsr#28</div><div class='add'>+	eor	r9,r9,r6,lsl#4</div><div class='add'>+	eor	r10,r10,r5,lsl#4</div><div class='add'>+	eor	r9,r9,r6,lsr#2</div><div class='add'>+	eor	r10,r10,r5,lsr#2</div><div class='add'>+	eor	r9,r9,r5,lsl#30</div><div class='add'>+	eor	r10,r10,r6,lsl#30</div><div class='add'>+	eor	r9,r9,r6,lsr#7</div><div class='add'>+	eor	r10,r10,r5,lsr#7</div><div class='add'>+	eor	r9,r9,r5,lsl#25</div><div class='add'>+	eor	r10,r10,r6,lsl#25	@ Sigma0(a)</div><div class='add'>+	adds	r3,r3,r9</div><div class='add'>+	and	r9,r5,r11</div><div class='add'>+	adc	r4,r4,r10		@ T += Sigma0(a)</div><div class='add'>+</div><div class='add'>+	ldr	r10,[sp,#8+4]	@ b.hi</div><div class='add'>+	orr	r5,r5,r11</div><div class='add'>+	ldr	r11,[sp,#16+4]	@ c.hi</div><div class='add'>+	and	r5,r5,r12</div><div class='add'>+	and	r12,r6,r10</div><div class='add'>+	orr	r6,r6,r10</div><div class='add'>+	orr	r5,r5,r9		@ Maj(a,b,c).lo</div><div class='add'>+	and	r6,r6,r11</div><div class='add'>+	adds	r5,r5,r3</div><div class='add'>+	orr	r6,r6,r12		@ Maj(a,b,c).hi</div><div class='add'>+	sub	sp,sp,#8</div><div class='add'>+	adc	r6,r6,r4		@ h += T</div><div class='add'>+	tst	r14,#1</div><div class='add'>+	add	r14,r14,#8</div><div class='add'>+#if __ARM_ARCH__&gt;=7</div><div class='add'>+	ittt	eq			@ Thumb2 thing, sanity check in ARM</div><div class='add'>+#endif</div><div class='add'>+	ldreq	r9,[sp,#184+0]</div><div class='add'>+	ldreq	r10,[sp,#184+4]</div><div class='add'>+	beq	.L16_79</div><div class='add'>+	bic	r14,r14,#1</div><div class='add'>+</div><div class='add'>+	ldr	r3,[sp,#8+0]</div><div class='add'>+	ldr	r4,[sp,#8+4]</div><div class='add'>+	ldr	r9, [r0,#0+LO]</div><div class='add'>+	ldr	r10, [r0,#0+HI]</div><div class='add'>+	ldr	r11, [r0,#8+LO]</div><div class='add'>+	ldr	r12, [r0,#8+HI]</div><div class='add'>+	adds	r9,r5,r9</div><div class='add'>+	str	r9, [r0,#0+LO]</div><div class='add'>+	adc	r10,r6,r10</div><div class='add'>+	str	r10, [r0,#0+HI]</div><div class='add'>+	adds	r11,r3,r11</div><div class='add'>+	str	r11, [r0,#8+LO]</div><div class='add'>+	adc	r12,r4,r12</div><div class='add'>+	str	r12, [r0,#8+HI]</div><div class='add'>+</div><div class='add'>+	ldr	r5,[sp,#16+0]</div><div class='add'>+	ldr	r6,[sp,#16+4]</div><div class='add'>+	ldr	r3,[sp,#24+0]</div><div class='add'>+	ldr	r4,[sp,#24+4]</div><div class='add'>+	ldr	r9, [r0,#16+LO]</div><div class='add'>+	ldr	r10, [r0,#16+HI]</div><div class='add'>+	ldr	r11, [r0,#24+LO]</div><div class='add'>+	ldr	r12, [r0,#24+HI]</div><div class='add'>+	adds	r9,r5,r9</div><div class='add'>+	str	r9, [r0,#16+LO]</div><div class='add'>+	adc	r10,r6,r10</div><div class='add'>+	str	r10, [r0,#16+HI]</div><div class='add'>+	adds	r11,r3,r11</div><div class='add'>+	str	r11, [r0,#24+LO]</div><div class='add'>+	adc	r12,r4,r12</div><div class='add'>+	str	r12, [r0,#24+HI]</div><div class='add'>+</div><div class='add'>+	ldr	r3,[sp,#40+0]</div><div class='add'>+	ldr	r4,[sp,#40+4]</div><div class='add'>+	ldr	r9, [r0,#32+LO]</div><div class='add'>+	ldr	r10, [r0,#32+HI]</div><div class='add'>+	ldr	r11, [r0,#40+LO]</div><div class='add'>+	ldr	r12, [r0,#40+HI]</div><div class='add'>+	adds	r7,r7,r9</div><div class='add'>+	str	r7,[r0,#32+LO]</div><div class='add'>+	adc	r8,r8,r10</div><div class='add'>+	str	r8,[r0,#32+HI]</div><div class='add'>+	adds	r11,r3,r11</div><div class='add'>+	str	r11, [r0,#40+LO]</div><div class='add'>+	adc	r12,r4,r12</div><div class='add'>+	str	r12, [r0,#40+HI]</div><div class='add'>+</div><div class='add'>+	ldr	r5,[sp,#48+0]</div><div class='add'>+	ldr	r6,[sp,#48+4]</div><div class='add'>+	ldr	r3,[sp,#56+0]</div><div class='add'>+	ldr	r4,[sp,#56+4]</div><div class='add'>+	ldr	r9, [r0,#48+LO]</div><div class='add'>+	ldr	r10, [r0,#48+HI]</div><div class='add'>+	ldr	r11, [r0,#56+LO]</div><div class='add'>+	ldr	r12, [r0,#56+HI]</div><div class='add'>+	adds	r9,r5,r9</div><div class='add'>+	str	r9, [r0,#48+LO]</div><div class='add'>+	adc	r10,r6,r10</div><div class='add'>+	str	r10, [r0,#48+HI]</div><div class='add'>+	adds	r11,r3,r11</div><div class='add'>+	str	r11, [r0,#56+LO]</div><div class='add'>+	adc	r12,r4,r12</div><div class='add'>+	str	r12, [r0,#56+HI]</div><div class='add'>+</div><div class='add'>+	add	sp,sp,#640</div><div class='add'>+	sub	r14,r14,#640</div><div class='add'>+</div><div class='add'>+	teq	r1,r2</div><div class='add'>+	bne	.Loop</div><div class='add'>+</div><div class='add'>+	add	sp,sp,#8*9		@ destroy frame</div><div class='add'>+#if __ARM_ARCH__&gt;=5</div><div class='add'>+	ldmia	sp!,{r4-r12,pc}</div><div class='add'>+#else</div><div class='add'>+	ldmia	sp!,{r4-r12,lr}</div><div class='add'>+	tst	lr,#1</div><div class='add'>+	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='add'>+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)</div><div class='add'>+#endif</div><div class='add'>+.size	sha512_block_data_order,.-sha512_block_data_order</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7</div><div class='add'>+.arch	armv7-a</div><div class='add'>+.fpu	neon</div><div class='add'>+</div><div class='add'>+.global	sha512_block_data_order_neon</div><div class='add'>+.type	sha512_block_data_order_neon,%function</div><div class='add'>+.align	4</div><div class='add'>+sha512_block_data_order_neon:</div><div class='add'>+.LNEON:</div><div class='add'>+	dmb				@ errata #451034 on early Cortex A8</div><div class='add'>+	add	r2,r1,r2,lsl#7	@ len to point at the end of inp</div><div class='add'>+	VFP_ABI_PUSH</div><div class='add'>+	adrl	r3,K512</div><div class='add'>+	vldmia	r0,{d16-d23}		@ load context</div><div class='add'>+.Loop_neon:</div><div class='add'>+	vshr.u64	d24,d20,#14	@ 0</div><div class='add'>+#if 0&lt;16</div><div class='add'>+	vld1.64		{d0},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d20,#18</div><div class='add'>+#if 0&gt;0</div><div class='add'>+	 vadd.i64	d16,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d20,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d20,#50</div><div class='add'>+	vsli.64		d25,d20,#46</div><div class='add'>+	vmov		d29,d20</div><div class='add'>+	vsli.64		d26,d20,#23</div><div class='add'>+#if 0&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d0,d0</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d21,d22		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d16,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d23</div><div class='add'>+	vshr.u64	d25,d16,#34</div><div class='add'>+	vsli.64		d24,d16,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d16,#39</div><div class='add'>+	vadd.i64	d28,d0</div><div class='add'>+	vsli.64		d25,d16,#30</div><div class='add'>+	veor		d30,d16,d17</div><div class='add'>+	vsli.64		d26,d16,#25</div><div class='add'>+	veor		d23,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d18,d17		@ Maj(a,b,c)</div><div class='add'>+	veor		d23,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d19,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d23,d30</div><div class='add'>+	vshr.u64	d24,d19,#14	@ 1</div><div class='add'>+#if 1&lt;16</div><div class='add'>+	vld1.64		{d1},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d19,#18</div><div class='add'>+#if 1&gt;0</div><div class='add'>+	 vadd.i64	d23,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d19,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d19,#50</div><div class='add'>+	vsli.64		d25,d19,#46</div><div class='add'>+	vmov		d29,d19</div><div class='add'>+	vsli.64		d26,d19,#23</div><div class='add'>+#if 1&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d1,d1</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d20,d21		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d23,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d22</div><div class='add'>+	vshr.u64	d25,d23,#34</div><div class='add'>+	vsli.64		d24,d23,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d23,#39</div><div class='add'>+	vadd.i64	d28,d1</div><div class='add'>+	vsli.64		d25,d23,#30</div><div class='add'>+	veor		d30,d23,d16</div><div class='add'>+	vsli.64		d26,d23,#25</div><div class='add'>+	veor		d22,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d17,d16		@ Maj(a,b,c)</div><div class='add'>+	veor		d22,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d18,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d22,d30</div><div class='add'>+	vshr.u64	d24,d18,#14	@ 2</div><div class='add'>+#if 2&lt;16</div><div class='add'>+	vld1.64		{d2},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d18,#18</div><div class='add'>+#if 2&gt;0</div><div class='add'>+	 vadd.i64	d22,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d18,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d18,#50</div><div class='add'>+	vsli.64		d25,d18,#46</div><div class='add'>+	vmov		d29,d18</div><div class='add'>+	vsli.64		d26,d18,#23</div><div class='add'>+#if 2&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d2,d2</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d19,d20		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d22,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d21</div><div class='add'>+	vshr.u64	d25,d22,#34</div><div class='add'>+	vsli.64		d24,d22,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d22,#39</div><div class='add'>+	vadd.i64	d28,d2</div><div class='add'>+	vsli.64		d25,d22,#30</div><div class='add'>+	veor		d30,d22,d23</div><div class='add'>+	vsli.64		d26,d22,#25</div><div class='add'>+	veor		d21,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d16,d23		@ Maj(a,b,c)</div><div class='add'>+	veor		d21,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d17,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d21,d30</div><div class='add'>+	vshr.u64	d24,d17,#14	@ 3</div><div class='add'>+#if 3&lt;16</div><div class='add'>+	vld1.64		{d3},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d17,#18</div><div class='add'>+#if 3&gt;0</div><div class='add'>+	 vadd.i64	d21,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d17,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d17,#50</div><div class='add'>+	vsli.64		d25,d17,#46</div><div class='add'>+	vmov		d29,d17</div><div class='add'>+	vsli.64		d26,d17,#23</div><div class='add'>+#if 3&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d3,d3</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d18,d19		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d21,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d20</div><div class='add'>+	vshr.u64	d25,d21,#34</div><div class='add'>+	vsli.64		d24,d21,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d21,#39</div><div class='add'>+	vadd.i64	d28,d3</div><div class='add'>+	vsli.64		d25,d21,#30</div><div class='add'>+	veor		d30,d21,d22</div><div class='add'>+	vsli.64		d26,d21,#25</div><div class='add'>+	veor		d20,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d23,d22		@ Maj(a,b,c)</div><div class='add'>+	veor		d20,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d16,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d20,d30</div><div class='add'>+	vshr.u64	d24,d16,#14	@ 4</div><div class='add'>+#if 4&lt;16</div><div class='add'>+	vld1.64		{d4},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d16,#18</div><div class='add'>+#if 4&gt;0</div><div class='add'>+	 vadd.i64	d20,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d16,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d16,#50</div><div class='add'>+	vsli.64		d25,d16,#46</div><div class='add'>+	vmov		d29,d16</div><div class='add'>+	vsli.64		d26,d16,#23</div><div class='add'>+#if 4&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d4,d4</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d17,d18		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d20,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d19</div><div class='add'>+	vshr.u64	d25,d20,#34</div><div class='add'>+	vsli.64		d24,d20,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d20,#39</div><div class='add'>+	vadd.i64	d28,d4</div><div class='add'>+	vsli.64		d25,d20,#30</div><div class='add'>+	veor		d30,d20,d21</div><div class='add'>+	vsli.64		d26,d20,#25</div><div class='add'>+	veor		d19,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d22,d21		@ Maj(a,b,c)</div><div class='add'>+	veor		d19,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d23,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d19,d30</div><div class='add'>+	vshr.u64	d24,d23,#14	@ 5</div><div class='add'>+#if 5&lt;16</div><div class='add'>+	vld1.64		{d5},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d23,#18</div><div class='add'>+#if 5&gt;0</div><div class='add'>+	 vadd.i64	d19,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d23,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d23,#50</div><div class='add'>+	vsli.64		d25,d23,#46</div><div class='add'>+	vmov		d29,d23</div><div class='add'>+	vsli.64		d26,d23,#23</div><div class='add'>+#if 5&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d5,d5</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d16,d17		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d19,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d18</div><div class='add'>+	vshr.u64	d25,d19,#34</div><div class='add'>+	vsli.64		d24,d19,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d19,#39</div><div class='add'>+	vadd.i64	d28,d5</div><div class='add'>+	vsli.64		d25,d19,#30</div><div class='add'>+	veor		d30,d19,d20</div><div class='add'>+	vsli.64		d26,d19,#25</div><div class='add'>+	veor		d18,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d21,d20		@ Maj(a,b,c)</div><div class='add'>+	veor		d18,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d22,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d18,d30</div><div class='add'>+	vshr.u64	d24,d22,#14	@ 6</div><div class='add'>+#if 6&lt;16</div><div class='add'>+	vld1.64		{d6},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d22,#18</div><div class='add'>+#if 6&gt;0</div><div class='add'>+	 vadd.i64	d18,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d22,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d22,#50</div><div class='add'>+	vsli.64		d25,d22,#46</div><div class='add'>+	vmov		d29,d22</div><div class='add'>+	vsli.64		d26,d22,#23</div><div class='add'>+#if 6&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d6,d6</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d23,d16		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d18,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d17</div><div class='add'>+	vshr.u64	d25,d18,#34</div><div class='add'>+	vsli.64		d24,d18,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d18,#39</div><div class='add'>+	vadd.i64	d28,d6</div><div class='add'>+	vsli.64		d25,d18,#30</div><div class='add'>+	veor		d30,d18,d19</div><div class='add'>+	vsli.64		d26,d18,#25</div><div class='add'>+	veor		d17,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d20,d19		@ Maj(a,b,c)</div><div class='add'>+	veor		d17,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d21,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d17,d30</div><div class='add'>+	vshr.u64	d24,d21,#14	@ 7</div><div class='add'>+#if 7&lt;16</div><div class='add'>+	vld1.64		{d7},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d21,#18</div><div class='add'>+#if 7&gt;0</div><div class='add'>+	 vadd.i64	d17,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d21,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d21,#50</div><div class='add'>+	vsli.64		d25,d21,#46</div><div class='add'>+	vmov		d29,d21</div><div class='add'>+	vsli.64		d26,d21,#23</div><div class='add'>+#if 7&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d7,d7</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d22,d23		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d17,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d16</div><div class='add'>+	vshr.u64	d25,d17,#34</div><div class='add'>+	vsli.64		d24,d17,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d17,#39</div><div class='add'>+	vadd.i64	d28,d7</div><div class='add'>+	vsli.64		d25,d17,#30</div><div class='add'>+	veor		d30,d17,d18</div><div class='add'>+	vsli.64		d26,d17,#25</div><div class='add'>+	veor		d16,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d19,d18		@ Maj(a,b,c)</div><div class='add'>+	veor		d16,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d20,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d16,d30</div><div class='add'>+	vshr.u64	d24,d20,#14	@ 8</div><div class='add'>+#if 8&lt;16</div><div class='add'>+	vld1.64		{d8},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d20,#18</div><div class='add'>+#if 8&gt;0</div><div class='add'>+	 vadd.i64	d16,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d20,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d20,#50</div><div class='add'>+	vsli.64		d25,d20,#46</div><div class='add'>+	vmov		d29,d20</div><div class='add'>+	vsli.64		d26,d20,#23</div><div class='add'>+#if 8&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d8,d8</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d21,d22		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d16,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d23</div><div class='add'>+	vshr.u64	d25,d16,#34</div><div class='add'>+	vsli.64		d24,d16,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d16,#39</div><div class='add'>+	vadd.i64	d28,d8</div><div class='add'>+	vsli.64		d25,d16,#30</div><div class='add'>+	veor		d30,d16,d17</div><div class='add'>+	vsli.64		d26,d16,#25</div><div class='add'>+	veor		d23,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d18,d17		@ Maj(a,b,c)</div><div class='add'>+	veor		d23,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d19,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d23,d30</div><div class='add'>+	vshr.u64	d24,d19,#14	@ 9</div><div class='add'>+#if 9&lt;16</div><div class='add'>+	vld1.64		{d9},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d19,#18</div><div class='add'>+#if 9&gt;0</div><div class='add'>+	 vadd.i64	d23,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d19,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d19,#50</div><div class='add'>+	vsli.64		d25,d19,#46</div><div class='add'>+	vmov		d29,d19</div><div class='add'>+	vsli.64		d26,d19,#23</div><div class='add'>+#if 9&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d9,d9</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d20,d21		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d23,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d22</div><div class='add'>+	vshr.u64	d25,d23,#34</div><div class='add'>+	vsli.64		d24,d23,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d23,#39</div><div class='add'>+	vadd.i64	d28,d9</div><div class='add'>+	vsli.64		d25,d23,#30</div><div class='add'>+	veor		d30,d23,d16</div><div class='add'>+	vsli.64		d26,d23,#25</div><div class='add'>+	veor		d22,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d17,d16		@ Maj(a,b,c)</div><div class='add'>+	veor		d22,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d18,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d22,d30</div><div class='add'>+	vshr.u64	d24,d18,#14	@ 10</div><div class='add'>+#if 10&lt;16</div><div class='add'>+	vld1.64		{d10},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d18,#18</div><div class='add'>+#if 10&gt;0</div><div class='add'>+	 vadd.i64	d22,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d18,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d18,#50</div><div class='add'>+	vsli.64		d25,d18,#46</div><div class='add'>+	vmov		d29,d18</div><div class='add'>+	vsli.64		d26,d18,#23</div><div class='add'>+#if 10&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d10,d10</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d19,d20		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d22,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d21</div><div class='add'>+	vshr.u64	d25,d22,#34</div><div class='add'>+	vsli.64		d24,d22,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d22,#39</div><div class='add'>+	vadd.i64	d28,d10</div><div class='add'>+	vsli.64		d25,d22,#30</div><div class='add'>+	veor		d30,d22,d23</div><div class='add'>+	vsli.64		d26,d22,#25</div><div class='add'>+	veor		d21,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d16,d23		@ Maj(a,b,c)</div><div class='add'>+	veor		d21,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d17,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d21,d30</div><div class='add'>+	vshr.u64	d24,d17,#14	@ 11</div><div class='add'>+#if 11&lt;16</div><div class='add'>+	vld1.64		{d11},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d17,#18</div><div class='add'>+#if 11&gt;0</div><div class='add'>+	 vadd.i64	d21,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d17,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d17,#50</div><div class='add'>+	vsli.64		d25,d17,#46</div><div class='add'>+	vmov		d29,d17</div><div class='add'>+	vsli.64		d26,d17,#23</div><div class='add'>+#if 11&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d11,d11</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d18,d19		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d21,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d20</div><div class='add'>+	vshr.u64	d25,d21,#34</div><div class='add'>+	vsli.64		d24,d21,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d21,#39</div><div class='add'>+	vadd.i64	d28,d11</div><div class='add'>+	vsli.64		d25,d21,#30</div><div class='add'>+	veor		d30,d21,d22</div><div class='add'>+	vsli.64		d26,d21,#25</div><div class='add'>+	veor		d20,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d23,d22		@ Maj(a,b,c)</div><div class='add'>+	veor		d20,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d16,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d20,d30</div><div class='add'>+	vshr.u64	d24,d16,#14	@ 12</div><div class='add'>+#if 12&lt;16</div><div class='add'>+	vld1.64		{d12},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d16,#18</div><div class='add'>+#if 12&gt;0</div><div class='add'>+	 vadd.i64	d20,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d16,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d16,#50</div><div class='add'>+	vsli.64		d25,d16,#46</div><div class='add'>+	vmov		d29,d16</div><div class='add'>+	vsli.64		d26,d16,#23</div><div class='add'>+#if 12&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d12,d12</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d17,d18		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d20,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d19</div><div class='add'>+	vshr.u64	d25,d20,#34</div><div class='add'>+	vsli.64		d24,d20,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d20,#39</div><div class='add'>+	vadd.i64	d28,d12</div><div class='add'>+	vsli.64		d25,d20,#30</div><div class='add'>+	veor		d30,d20,d21</div><div class='add'>+	vsli.64		d26,d20,#25</div><div class='add'>+	veor		d19,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d22,d21		@ Maj(a,b,c)</div><div class='add'>+	veor		d19,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d23,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d19,d30</div><div class='add'>+	vshr.u64	d24,d23,#14	@ 13</div><div class='add'>+#if 13&lt;16</div><div class='add'>+	vld1.64		{d13},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d23,#18</div><div class='add'>+#if 13&gt;0</div><div class='add'>+	 vadd.i64	d19,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d23,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d23,#50</div><div class='add'>+	vsli.64		d25,d23,#46</div><div class='add'>+	vmov		d29,d23</div><div class='add'>+	vsli.64		d26,d23,#23</div><div class='add'>+#if 13&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d13,d13</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d16,d17		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d19,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d18</div><div class='add'>+	vshr.u64	d25,d19,#34</div><div class='add'>+	vsli.64		d24,d19,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d19,#39</div><div class='add'>+	vadd.i64	d28,d13</div><div class='add'>+	vsli.64		d25,d19,#30</div><div class='add'>+	veor		d30,d19,d20</div><div class='add'>+	vsli.64		d26,d19,#25</div><div class='add'>+	veor		d18,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d21,d20		@ Maj(a,b,c)</div><div class='add'>+	veor		d18,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d22,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d18,d30</div><div class='add'>+	vshr.u64	d24,d22,#14	@ 14</div><div class='add'>+#if 14&lt;16</div><div class='add'>+	vld1.64		{d14},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d22,#18</div><div class='add'>+#if 14&gt;0</div><div class='add'>+	 vadd.i64	d18,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d22,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d22,#50</div><div class='add'>+	vsli.64		d25,d22,#46</div><div class='add'>+	vmov		d29,d22</div><div class='add'>+	vsli.64		d26,d22,#23</div><div class='add'>+#if 14&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d14,d14</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d23,d16		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d18,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d17</div><div class='add'>+	vshr.u64	d25,d18,#34</div><div class='add'>+	vsli.64		d24,d18,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d18,#39</div><div class='add'>+	vadd.i64	d28,d14</div><div class='add'>+	vsli.64		d25,d18,#30</div><div class='add'>+	veor		d30,d18,d19</div><div class='add'>+	vsli.64		d26,d18,#25</div><div class='add'>+	veor		d17,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d20,d19		@ Maj(a,b,c)</div><div class='add'>+	veor		d17,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d21,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d17,d30</div><div class='add'>+	vshr.u64	d24,d21,#14	@ 15</div><div class='add'>+#if 15&lt;16</div><div class='add'>+	vld1.64		{d15},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d21,#18</div><div class='add'>+#if 15&gt;0</div><div class='add'>+	 vadd.i64	d17,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d21,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d21,#50</div><div class='add'>+	vsli.64		d25,d21,#46</div><div class='add'>+	vmov		d29,d21</div><div class='add'>+	vsli.64		d26,d21,#23</div><div class='add'>+#if 15&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	d15,d15</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d22,d23		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d17,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d16</div><div class='add'>+	vshr.u64	d25,d17,#34</div><div class='add'>+	vsli.64		d24,d17,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d17,#39</div><div class='add'>+	vadd.i64	d28,d15</div><div class='add'>+	vsli.64		d25,d17,#30</div><div class='add'>+	veor		d30,d17,d18</div><div class='add'>+	vsli.64		d26,d17,#25</div><div class='add'>+	veor		d16,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d19,d18		@ Maj(a,b,c)</div><div class='add'>+	veor		d16,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d20,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d16,d30</div><div class='add'>+	mov		r12,#4</div><div class='add'>+.L16_79_neon:</div><div class='add'>+	subs		r12,#1</div><div class='add'>+	vshr.u64	q12,q7,#19</div><div class='add'>+	vshr.u64	q13,q7,#61</div><div class='add'>+	 vadd.i64	d16,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q7,#6</div><div class='add'>+	vsli.64		q12,q7,#45</div><div class='add'>+	vext.8		q14,q0,q1,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q7,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q0,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q4,q5,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d20,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q0,q14</div><div class='add'>+	vshr.u64	d25,d20,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d20,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q0,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d20,#50</div><div class='add'>+	vsli.64		d25,d20,#46</div><div class='add'>+	vmov		d29,d20</div><div class='add'>+	vsli.64		d26,d20,#23</div><div class='add'>+#if 16&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d21,d22		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d16,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d23</div><div class='add'>+	vshr.u64	d25,d16,#34</div><div class='add'>+	vsli.64		d24,d16,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d16,#39</div><div class='add'>+	vadd.i64	d28,d0</div><div class='add'>+	vsli.64		d25,d16,#30</div><div class='add'>+	veor		d30,d16,d17</div><div class='add'>+	vsli.64		d26,d16,#25</div><div class='add'>+	veor		d23,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d18,d17		@ Maj(a,b,c)</div><div class='add'>+	veor		d23,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d19,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d23,d30</div><div class='add'>+	vshr.u64	d24,d19,#14	@ 17</div><div class='add'>+#if 17&lt;16</div><div class='add'>+	vld1.64		{d1},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d19,#18</div><div class='add'>+#if 17&gt;0</div><div class='add'>+	 vadd.i64	d23,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d19,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d19,#50</div><div class='add'>+	vsli.64		d25,d19,#46</div><div class='add'>+	vmov		d29,d19</div><div class='add'>+	vsli.64		d26,d19,#23</div><div class='add'>+#if 17&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d20,d21		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d23,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d22</div><div class='add'>+	vshr.u64	d25,d23,#34</div><div class='add'>+	vsli.64		d24,d23,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d23,#39</div><div class='add'>+	vadd.i64	d28,d1</div><div class='add'>+	vsli.64		d25,d23,#30</div><div class='add'>+	veor		d30,d23,d16</div><div class='add'>+	vsli.64		d26,d23,#25</div><div class='add'>+	veor		d22,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d17,d16		@ Maj(a,b,c)</div><div class='add'>+	veor		d22,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d18,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d22,d30</div><div class='add'>+	vshr.u64	q12,q0,#19</div><div class='add'>+	vshr.u64	q13,q0,#61</div><div class='add'>+	 vadd.i64	d22,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q0,#6</div><div class='add'>+	vsli.64		q12,q0,#45</div><div class='add'>+	vext.8		q14,q1,q2,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q0,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q1,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q5,q6,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d18,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q1,q14</div><div class='add'>+	vshr.u64	d25,d18,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d18,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q1,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d18,#50</div><div class='add'>+	vsli.64		d25,d18,#46</div><div class='add'>+	vmov		d29,d18</div><div class='add'>+	vsli.64		d26,d18,#23</div><div class='add'>+#if 18&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d19,d20		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d22,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d21</div><div class='add'>+	vshr.u64	d25,d22,#34</div><div class='add'>+	vsli.64		d24,d22,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d22,#39</div><div class='add'>+	vadd.i64	d28,d2</div><div class='add'>+	vsli.64		d25,d22,#30</div><div class='add'>+	veor		d30,d22,d23</div><div class='add'>+	vsli.64		d26,d22,#25</div><div class='add'>+	veor		d21,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d16,d23		@ Maj(a,b,c)</div><div class='add'>+	veor		d21,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d17,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d21,d30</div><div class='add'>+	vshr.u64	d24,d17,#14	@ 19</div><div class='add'>+#if 19&lt;16</div><div class='add'>+	vld1.64		{d3},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d17,#18</div><div class='add'>+#if 19&gt;0</div><div class='add'>+	 vadd.i64	d21,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d17,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d17,#50</div><div class='add'>+	vsli.64		d25,d17,#46</div><div class='add'>+	vmov		d29,d17</div><div class='add'>+	vsli.64		d26,d17,#23</div><div class='add'>+#if 19&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d18,d19		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d21,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d20</div><div class='add'>+	vshr.u64	d25,d21,#34</div><div class='add'>+	vsli.64		d24,d21,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d21,#39</div><div class='add'>+	vadd.i64	d28,d3</div><div class='add'>+	vsli.64		d25,d21,#30</div><div class='add'>+	veor		d30,d21,d22</div><div class='add'>+	vsli.64		d26,d21,#25</div><div class='add'>+	veor		d20,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d23,d22		@ Maj(a,b,c)</div><div class='add'>+	veor		d20,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d16,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d20,d30</div><div class='add'>+	vshr.u64	q12,q1,#19</div><div class='add'>+	vshr.u64	q13,q1,#61</div><div class='add'>+	 vadd.i64	d20,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q1,#6</div><div class='add'>+	vsli.64		q12,q1,#45</div><div class='add'>+	vext.8		q14,q2,q3,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q1,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q2,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q6,q7,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d16,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q2,q14</div><div class='add'>+	vshr.u64	d25,d16,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d16,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q2,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d16,#50</div><div class='add'>+	vsli.64		d25,d16,#46</div><div class='add'>+	vmov		d29,d16</div><div class='add'>+	vsli.64		d26,d16,#23</div><div class='add'>+#if 20&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d17,d18		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d20,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d19</div><div class='add'>+	vshr.u64	d25,d20,#34</div><div class='add'>+	vsli.64		d24,d20,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d20,#39</div><div class='add'>+	vadd.i64	d28,d4</div><div class='add'>+	vsli.64		d25,d20,#30</div><div class='add'>+	veor		d30,d20,d21</div><div class='add'>+	vsli.64		d26,d20,#25</div><div class='add'>+	veor		d19,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d22,d21		@ Maj(a,b,c)</div><div class='add'>+	veor		d19,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d23,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d19,d30</div><div class='add'>+	vshr.u64	d24,d23,#14	@ 21</div><div class='add'>+#if 21&lt;16</div><div class='add'>+	vld1.64		{d5},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d23,#18</div><div class='add'>+#if 21&gt;0</div><div class='add'>+	 vadd.i64	d19,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d23,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d23,#50</div><div class='add'>+	vsli.64		d25,d23,#46</div><div class='add'>+	vmov		d29,d23</div><div class='add'>+	vsli.64		d26,d23,#23</div><div class='add'>+#if 21&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d16,d17		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d19,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d18</div><div class='add'>+	vshr.u64	d25,d19,#34</div><div class='add'>+	vsli.64		d24,d19,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d19,#39</div><div class='add'>+	vadd.i64	d28,d5</div><div class='add'>+	vsli.64		d25,d19,#30</div><div class='add'>+	veor		d30,d19,d20</div><div class='add'>+	vsli.64		d26,d19,#25</div><div class='add'>+	veor		d18,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d21,d20		@ Maj(a,b,c)</div><div class='add'>+	veor		d18,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d22,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d18,d30</div><div class='add'>+	vshr.u64	q12,q2,#19</div><div class='add'>+	vshr.u64	q13,q2,#61</div><div class='add'>+	 vadd.i64	d18,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q2,#6</div><div class='add'>+	vsli.64		q12,q2,#45</div><div class='add'>+	vext.8		q14,q3,q4,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q2,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q3,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q7,q0,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d22,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q3,q14</div><div class='add'>+	vshr.u64	d25,d22,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d22,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q3,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d22,#50</div><div class='add'>+	vsli.64		d25,d22,#46</div><div class='add'>+	vmov		d29,d22</div><div class='add'>+	vsli.64		d26,d22,#23</div><div class='add'>+#if 22&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d23,d16		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d18,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d17</div><div class='add'>+	vshr.u64	d25,d18,#34</div><div class='add'>+	vsli.64		d24,d18,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d18,#39</div><div class='add'>+	vadd.i64	d28,d6</div><div class='add'>+	vsli.64		d25,d18,#30</div><div class='add'>+	veor		d30,d18,d19</div><div class='add'>+	vsli.64		d26,d18,#25</div><div class='add'>+	veor		d17,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d20,d19		@ Maj(a,b,c)</div><div class='add'>+	veor		d17,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d21,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d17,d30</div><div class='add'>+	vshr.u64	d24,d21,#14	@ 23</div><div class='add'>+#if 23&lt;16</div><div class='add'>+	vld1.64		{d7},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d21,#18</div><div class='add'>+#if 23&gt;0</div><div class='add'>+	 vadd.i64	d17,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d21,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d21,#50</div><div class='add'>+	vsli.64		d25,d21,#46</div><div class='add'>+	vmov		d29,d21</div><div class='add'>+	vsli.64		d26,d21,#23</div><div class='add'>+#if 23&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d22,d23		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d17,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d16</div><div class='add'>+	vshr.u64	d25,d17,#34</div><div class='add'>+	vsli.64		d24,d17,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d17,#39</div><div class='add'>+	vadd.i64	d28,d7</div><div class='add'>+	vsli.64		d25,d17,#30</div><div class='add'>+	veor		d30,d17,d18</div><div class='add'>+	vsli.64		d26,d17,#25</div><div class='add'>+	veor		d16,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d19,d18		@ Maj(a,b,c)</div><div class='add'>+	veor		d16,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d20,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d16,d30</div><div class='add'>+	vshr.u64	q12,q3,#19</div><div class='add'>+	vshr.u64	q13,q3,#61</div><div class='add'>+	 vadd.i64	d16,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q3,#6</div><div class='add'>+	vsli.64		q12,q3,#45</div><div class='add'>+	vext.8		q14,q4,q5,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q3,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q4,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q0,q1,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d20,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q4,q14</div><div class='add'>+	vshr.u64	d25,d20,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d20,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q4,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d20,#50</div><div class='add'>+	vsli.64		d25,d20,#46</div><div class='add'>+	vmov		d29,d20</div><div class='add'>+	vsli.64		d26,d20,#23</div><div class='add'>+#if 24&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d21,d22		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d16,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d23</div><div class='add'>+	vshr.u64	d25,d16,#34</div><div class='add'>+	vsli.64		d24,d16,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d16,#39</div><div class='add'>+	vadd.i64	d28,d8</div><div class='add'>+	vsli.64		d25,d16,#30</div><div class='add'>+	veor		d30,d16,d17</div><div class='add'>+	vsli.64		d26,d16,#25</div><div class='add'>+	veor		d23,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d18,d17		@ Maj(a,b,c)</div><div class='add'>+	veor		d23,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d19,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d23,d30</div><div class='add'>+	vshr.u64	d24,d19,#14	@ 25</div><div class='add'>+#if 25&lt;16</div><div class='add'>+	vld1.64		{d9},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d19,#18</div><div class='add'>+#if 25&gt;0</div><div class='add'>+	 vadd.i64	d23,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d19,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d19,#50</div><div class='add'>+	vsli.64		d25,d19,#46</div><div class='add'>+	vmov		d29,d19</div><div class='add'>+	vsli.64		d26,d19,#23</div><div class='add'>+#if 25&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d20,d21		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d23,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d22</div><div class='add'>+	vshr.u64	d25,d23,#34</div><div class='add'>+	vsli.64		d24,d23,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d23,#39</div><div class='add'>+	vadd.i64	d28,d9</div><div class='add'>+	vsli.64		d25,d23,#30</div><div class='add'>+	veor		d30,d23,d16</div><div class='add'>+	vsli.64		d26,d23,#25</div><div class='add'>+	veor		d22,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d17,d16		@ Maj(a,b,c)</div><div class='add'>+	veor		d22,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d18,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d22,d30</div><div class='add'>+	vshr.u64	q12,q4,#19</div><div class='add'>+	vshr.u64	q13,q4,#61</div><div class='add'>+	 vadd.i64	d22,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q4,#6</div><div class='add'>+	vsli.64		q12,q4,#45</div><div class='add'>+	vext.8		q14,q5,q6,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q4,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q5,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q1,q2,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d18,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q5,q14</div><div class='add'>+	vshr.u64	d25,d18,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d18,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q5,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d18,#50</div><div class='add'>+	vsli.64		d25,d18,#46</div><div class='add'>+	vmov		d29,d18</div><div class='add'>+	vsli.64		d26,d18,#23</div><div class='add'>+#if 26&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d19,d20		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d22,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d21</div><div class='add'>+	vshr.u64	d25,d22,#34</div><div class='add'>+	vsli.64		d24,d22,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d22,#39</div><div class='add'>+	vadd.i64	d28,d10</div><div class='add'>+	vsli.64		d25,d22,#30</div><div class='add'>+	veor		d30,d22,d23</div><div class='add'>+	vsli.64		d26,d22,#25</div><div class='add'>+	veor		d21,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d16,d23		@ Maj(a,b,c)</div><div class='add'>+	veor		d21,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d17,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d21,d30</div><div class='add'>+	vshr.u64	d24,d17,#14	@ 27</div><div class='add'>+#if 27&lt;16</div><div class='add'>+	vld1.64		{d11},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d17,#18</div><div class='add'>+#if 27&gt;0</div><div class='add'>+	 vadd.i64	d21,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d17,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d17,#50</div><div class='add'>+	vsli.64		d25,d17,#46</div><div class='add'>+	vmov		d29,d17</div><div class='add'>+	vsli.64		d26,d17,#23</div><div class='add'>+#if 27&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d18,d19		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d21,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d20</div><div class='add'>+	vshr.u64	d25,d21,#34</div><div class='add'>+	vsli.64		d24,d21,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d21,#39</div><div class='add'>+	vadd.i64	d28,d11</div><div class='add'>+	vsli.64		d25,d21,#30</div><div class='add'>+	veor		d30,d21,d22</div><div class='add'>+	vsli.64		d26,d21,#25</div><div class='add'>+	veor		d20,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d23,d22		@ Maj(a,b,c)</div><div class='add'>+	veor		d20,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d16,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d20,d30</div><div class='add'>+	vshr.u64	q12,q5,#19</div><div class='add'>+	vshr.u64	q13,q5,#61</div><div class='add'>+	 vadd.i64	d20,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q5,#6</div><div class='add'>+	vsli.64		q12,q5,#45</div><div class='add'>+	vext.8		q14,q6,q7,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q5,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q6,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q2,q3,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d16,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q6,q14</div><div class='add'>+	vshr.u64	d25,d16,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d16,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q6,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d16,#50</div><div class='add'>+	vsli.64		d25,d16,#46</div><div class='add'>+	vmov		d29,d16</div><div class='add'>+	vsli.64		d26,d16,#23</div><div class='add'>+#if 28&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d17,d18		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d20,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d19</div><div class='add'>+	vshr.u64	d25,d20,#34</div><div class='add'>+	vsli.64		d24,d20,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d20,#39</div><div class='add'>+	vadd.i64	d28,d12</div><div class='add'>+	vsli.64		d25,d20,#30</div><div class='add'>+	veor		d30,d20,d21</div><div class='add'>+	vsli.64		d26,d20,#25</div><div class='add'>+	veor		d19,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d22,d21		@ Maj(a,b,c)</div><div class='add'>+	veor		d19,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d23,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d19,d30</div><div class='add'>+	vshr.u64	d24,d23,#14	@ 29</div><div class='add'>+#if 29&lt;16</div><div class='add'>+	vld1.64		{d13},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d23,#18</div><div class='add'>+#if 29&gt;0</div><div class='add'>+	 vadd.i64	d19,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d23,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d23,#50</div><div class='add'>+	vsli.64		d25,d23,#46</div><div class='add'>+	vmov		d29,d23</div><div class='add'>+	vsli.64		d26,d23,#23</div><div class='add'>+#if 29&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d16,d17		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d19,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d18</div><div class='add'>+	vshr.u64	d25,d19,#34</div><div class='add'>+	vsli.64		d24,d19,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d19,#39</div><div class='add'>+	vadd.i64	d28,d13</div><div class='add'>+	vsli.64		d25,d19,#30</div><div class='add'>+	veor		d30,d19,d20</div><div class='add'>+	vsli.64		d26,d19,#25</div><div class='add'>+	veor		d18,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d21,d20		@ Maj(a,b,c)</div><div class='add'>+	veor		d18,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d22,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d18,d30</div><div class='add'>+	vshr.u64	q12,q6,#19</div><div class='add'>+	vshr.u64	q13,q6,#61</div><div class='add'>+	 vadd.i64	d18,d30			@ h+=Maj from the past</div><div class='add'>+	vshr.u64	q15,q6,#6</div><div class='add'>+	vsli.64		q12,q6,#45</div><div class='add'>+	vext.8		q14,q7,q0,#8	@ X[i+1]</div><div class='add'>+	vsli.64		q13,q6,#3</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	q12,q14,#1</div><div class='add'>+	veor		q15,q13				@ sigma1(X[i+14])</div><div class='add'>+	vshr.u64	q13,q14,#8</div><div class='add'>+	vadd.i64	q7,q15</div><div class='add'>+	vshr.u64	q15,q14,#7</div><div class='add'>+	vsli.64		q12,q14,#63</div><div class='add'>+	vsli.64		q13,q14,#56</div><div class='add'>+	vext.8		q14,q3,q4,#8	@ X[i+9]</div><div class='add'>+	veor		q15,q12</div><div class='add'>+	vshr.u64	d24,d22,#14		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q7,q14</div><div class='add'>+	vshr.u64	d25,d22,#18		@ from NEON_00_15</div><div class='add'>+	veor		q15,q13				@ sigma0(X[i+1])</div><div class='add'>+	vshr.u64	d26,d22,#41		@ from NEON_00_15</div><div class='add'>+	vadd.i64	q7,q15</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d22,#50</div><div class='add'>+	vsli.64		d25,d22,#46</div><div class='add'>+	vmov		d29,d22</div><div class='add'>+	vsli.64		d26,d22,#23</div><div class='add'>+#if 30&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d23,d16		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d18,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d17</div><div class='add'>+	vshr.u64	d25,d18,#34</div><div class='add'>+	vsli.64		d24,d18,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d18,#39</div><div class='add'>+	vadd.i64	d28,d14</div><div class='add'>+	vsli.64		d25,d18,#30</div><div class='add'>+	veor		d30,d18,d19</div><div class='add'>+	vsli.64		d26,d18,#25</div><div class='add'>+	veor		d17,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d20,d19		@ Maj(a,b,c)</div><div class='add'>+	veor		d17,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d21,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d17,d30</div><div class='add'>+	vshr.u64	d24,d21,#14	@ 31</div><div class='add'>+#if 31&lt;16</div><div class='add'>+	vld1.64		{d15},[r1]!	@ handles unaligned</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d25,d21,#18</div><div class='add'>+#if 31&gt;0</div><div class='add'>+	 vadd.i64	d17,d30			@ h+=Maj from the past</div><div class='add'>+#endif</div><div class='add'>+	vshr.u64	d26,d21,#41</div><div class='add'>+	vld1.64		{d28},[r3,:64]!	@ K[i++]</div><div class='add'>+	vsli.64		d24,d21,#50</div><div class='add'>+	vsli.64		d25,d21,#46</div><div class='add'>+	vmov		d29,d21</div><div class='add'>+	vsli.64		d26,d21,#23</div><div class='add'>+#if 31&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='add'>+	vrev64.8	,</div><div class='add'>+#endif</div><div class='add'>+	veor		d25,d24</div><div class='add'>+	vbsl		d29,d22,d23		@ Ch(e,f,g)</div><div class='add'>+	vshr.u64	d24,d17,#28</div><div class='add'>+	veor		d26,d25			@ Sigma1(e)</div><div class='add'>+	vadd.i64	d27,d29,d16</div><div class='add'>+	vshr.u64	d25,d17,#34</div><div class='add'>+	vsli.64		d24,d17,#36</div><div class='add'>+	vadd.i64	d27,d26</div><div class='add'>+	vshr.u64	d26,d17,#39</div><div class='add'>+	vadd.i64	d28,d15</div><div class='add'>+	vsli.64		d25,d17,#30</div><div class='add'>+	veor		d30,d17,d18</div><div class='add'>+	vsli.64		d26,d17,#25</div><div class='add'>+	veor		d16,d24,d25</div><div class='add'>+	vadd.i64	d27,d28</div><div class='add'>+	vbsl		d30,d19,d18		@ Maj(a,b,c)</div><div class='add'>+	veor		d16,d26			@ Sigma0(a)</div><div class='add'>+	vadd.i64	d20,d27</div><div class='add'>+	vadd.i64	d30,d27</div><div class='add'>+	@ vadd.i64	d16,d30</div><div class='add'>+	bne		.L16_79_neon</div><div class='add'>+</div><div class='add'>+	 vadd.i64	d16,d30		@ h+=Maj from the past</div><div class='add'>+	vldmia		r0,{d24-d31}	@ load context to temp</div><div class='add'>+	vadd.i64	q8,q12		@ vectorized accumulate</div><div class='add'>+	vadd.i64	q9,q13</div><div class='add'>+	vadd.i64	q10,q14</div><div class='add'>+	vadd.i64	q11,q15</div><div class='add'>+	vstmia		r0,{d16-d23}	@ save context</div><div class='add'>+	teq		r1,r2</div><div class='add'>+	sub		r3,#640	@ rewind K512</div><div class='add'>+	bne		.Loop_neon</div><div class='add'>+</div><div class='add'>+	VFP_ABI_POP</div><div class='add'>+	bx	lr				@ .word	0xe12fff1e</div><div class='add'>+.size	sha512_block_data_order_neon,.-sha512_block_data_order_neon</div><div class='add'>+#endif</div><div class='add'>+.asciz	"SHA512 block transform for ARMv4/NEON, CRYPTOGAMS by &lt;appro@openssl.org&gt;"</div><div class='add'>+.align	2</div><div class='add'>+#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='add'>+.comm	OPENSSL_armcap_P,4,4</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/crypto/sha512-glue.c b/arch/arm/crypto/sha512-glue.c<br/>new file mode 100644<br/>index 000000000000..269a394e4a53<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/sha512-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-glue.c</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+/*</div><div class='add'>+ * sha512-glue.c - accelerated SHA-384/512 for ARM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;crypto/sha512_base.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sha512.h"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Accelerated SHA-384/SHA-512 secure hash for ARM");</div><div class='add'>+MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha384");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha512");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha384-arm");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha512-arm");</div><div class='add'>+</div><div class='add'>+asmlinkage void sha512_block_data_order(u64 *state, u8 const *src, int blocks);</div><div class='add'>+</div><div class='add'>+int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+		      unsigned int len)</div><div class='add'>+{</div><div class='add'>+	return sha512_base_do_update(desc, data, len,</div><div class='add'>+		(sha512_block_fn *)sha512_block_data_order);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sha512_arm_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	sha512_base_do_finalize(desc,</div><div class='add'>+		(sha512_block_fn *)sha512_block_data_order);</div><div class='add'>+	return sha512_base_finish(desc, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+		     unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	sha512_base_do_update(desc, data, len,</div><div class='add'>+		(sha512_block_fn *)sha512_block_data_order);</div><div class='add'>+	return sha512_arm_final(desc, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct shash_alg sha512_arm_algs[] = { {</div><div class='add'>+	.init			= sha384_base_init,</div><div class='add'>+	.update			= sha512_arm_update,</div><div class='add'>+	.final			= sha512_arm_final,</div><div class='add'>+	.finup			= sha512_arm_finup,</div><div class='add'>+	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='add'>+	.base			= {</div><div class='add'>+		.cra_name		= "sha384",</div><div class='add'>+		.cra_driver_name	= "sha384-arm",</div><div class='add'>+		.cra_priority		= 250,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	}</div><div class='add'>+},  {</div><div class='add'>+	.init			= sha512_base_init,</div><div class='add'>+	.update			= sha512_arm_update,</div><div class='add'>+	.final			= sha512_arm_final,</div><div class='add'>+	.finup			= sha512_arm_finup,</div><div class='add'>+	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='add'>+	.base			= {</div><div class='add'>+		.cra_name		= "sha512",</div><div class='add'>+		.cra_driver_name	= "sha512-arm",</div><div class='add'>+		.cra_priority		= 250,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	}</div><div class='add'>+} };</div><div class='add'>+</div><div class='add'>+static int __init sha512_arm_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_shashes(sha512_arm_algs,</div><div class='add'>+				      ARRAY_SIZE(sha512_arm_algs));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon()) {</div><div class='add'>+		err = crypto_register_shashes(sha512_neon_algs,</div><div class='add'>+					      ARRAY_SIZE(sha512_neon_algs));</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_unregister;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unregister:</div><div class='add'>+	crypto_unregister_shashes(sha512_arm_algs,</div><div class='add'>+				  ARRAY_SIZE(sha512_arm_algs));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit sha512_arm_mod_fini(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_shashes(sha512_arm_algs,</div><div class='add'>+				  ARRAY_SIZE(sha512_arm_algs));</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon())</div><div class='add'>+		crypto_unregister_shashes(sha512_neon_algs,</div><div class='add'>+					  ARRAY_SIZE(sha512_neon_algs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(sha512_arm_mod_init);</div><div class='add'>+module_exit(sha512_arm_mod_fini);</div><div class='head'>diff --git a/arch/arm/crypto/sha512-neon-glue.c b/arch/arm/crypto/sha512-neon-glue.c<br/>new file mode 100644<br/>index 000000000000..32693684a3ab<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/sha512-neon-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512-neon-glue.c</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+/*</div><div class='add'>+ * sha512-neon-glue.c - accelerated SHA-384/512 for ARM NEON</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;crypto/sha512_base.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sha512.h"</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha384-neon");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha512-neon");</div><div class='add'>+</div><div class='add'>+asmlinkage void sha512_block_data_order_neon(u64 *state, u8 const *src,</div><div class='add'>+					     int blocks);</div><div class='add'>+</div><div class='add'>+static int sha512_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+	if (!may_use_simd() ||</div><div class='add'>+	    (sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='add'>+		return sha512_arm_update(desc, data, len);</div><div class='add'>+</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	sha512_base_do_update(desc, data, len,</div><div class='add'>+		(sha512_block_fn *)sha512_block_data_order_neon);</div><div class='add'>+	kernel_neon_end();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sha512_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	if (!may_use_simd())</div><div class='add'>+		return sha512_arm_finup(desc, data, len, out);</div><div class='add'>+</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	if (len)</div><div class='add'>+		sha512_base_do_update(desc, data, len,</div><div class='add'>+			(sha512_block_fn *)sha512_block_data_order_neon);</div><div class='add'>+	sha512_base_do_finalize(desc,</div><div class='add'>+		(sha512_block_fn *)sha512_block_data_order_neon);</div><div class='add'>+	kernel_neon_end();</div><div class='add'>+</div><div class='add'>+	return sha512_base_finish(desc, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sha512_neon_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	return sha512_neon_finup(desc, NULL, 0, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct shash_alg sha512_neon_algs[] = { {</div><div class='add'>+	.init			= sha384_base_init,</div><div class='add'>+	.update			= sha512_neon_update,</div><div class='add'>+	.final			= sha512_neon_final,</div><div class='add'>+	.finup			= sha512_neon_finup,</div><div class='add'>+	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='add'>+	.base			= {</div><div class='add'>+		.cra_name		= "sha384",</div><div class='add'>+		.cra_driver_name	= "sha384-neon",</div><div class='add'>+		.cra_priority		= 300,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize		= SHA384_BLOCK_SIZE,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+},  {</div><div class='add'>+	.init			= sha512_base_init,</div><div class='add'>+	.update			= sha512_neon_update,</div><div class='add'>+	.final			= sha512_neon_final,</div><div class='add'>+	.finup			= sha512_neon_finup,</div><div class='add'>+	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='add'>+	.base			= {</div><div class='add'>+		.cra_name		= "sha512",</div><div class='add'>+		.cra_driver_name	= "sha512-neon",</div><div class='add'>+		.cra_priority		= 300,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	}</div><div class='add'>+} };</div><div class='head'>diff --git a/arch/arm/crypto/sha512.h b/arch/arm/crypto/sha512.h<br/>new file mode 100644<br/>index 000000000000..a75d9a82988a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/crypto/sha512.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/crypto/sha512.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+</div><div class='add'>+int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+		      unsigned int len);</div><div class='add'>+</div><div class='add'>+int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+		     unsigned int len, u8 *out);</div><div class='add'>+</div><div class='add'>+extern struct shash_alg sha512_neon_algs[2];</div><div class='head'>diff --git a/arch/arm/crypto/sha512_neon_glue.c b/arch/arm/crypto/sha512_neon_glue.c<br/>deleted file mode 100644<br/>index b124dce838d6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/crypto/sha512_neon_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/crypto/sha512_neon_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,305 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA512 Secure Hash Algorithm assembly implementation</div><div class='del'>- * using NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- *</div><div class='del'>- * This file is based on sha512_ssse3_glue.c:</div><div class='del'>- *   Copyright (C) 2013 Intel Corporation</div><div class='del'>- *   Author: Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the Free</div><div class='del'>- * Software Foundation; either version 2 of the License, or (at your option)</div><div class='del'>- * any later version.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/cryptohash.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const u64 sha512_k[] = {</div><div class='del'>-	0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL,</div><div class='del'>-	0xb5c0fbcfec4d3b2fULL, 0xe9b5dba58189dbbcULL,</div><div class='del'>-	0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,</div><div class='del'>-	0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL,</div><div class='del'>-	0xd807aa98a3030242ULL, 0x12835b0145706fbeULL,</div><div class='del'>-	0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,</div><div class='del'>-	0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL,</div><div class='del'>-	0x9bdc06a725c71235ULL, 0xc19bf174cf692694ULL,</div><div class='del'>-	0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,</div><div class='del'>-	0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL,</div><div class='del'>-	0x2de92c6f592b0275ULL, 0x4a7484aa6ea6e483ULL,</div><div class='del'>-	0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,</div><div class='del'>-	0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL,</div><div class='del'>-	0xb00327c898fb213fULL, 0xbf597fc7beef0ee4ULL,</div><div class='del'>-	0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,</div><div class='del'>-	0x06ca6351e003826fULL, 0x142929670a0e6e70ULL,</div><div class='del'>-	0x27b70a8546d22ffcULL, 0x2e1b21385c26c926ULL,</div><div class='del'>-	0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,</div><div class='del'>-	0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL,</div><div class='del'>-	0x81c2c92e47edaee6ULL, 0x92722c851482353bULL,</div><div class='del'>-	0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,</div><div class='del'>-	0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL,</div><div class='del'>-	0xd192e819d6ef5218ULL, 0xd69906245565a910ULL,</div><div class='del'>-	0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,</div><div class='del'>-	0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL,</div><div class='del'>-	0x2748774cdf8eeb99ULL, 0x34b0bcb5e19b48a8ULL,</div><div class='del'>-	0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,</div><div class='del'>-	0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL,</div><div class='del'>-	0x748f82ee5defb2fcULL, 0x78a5636f43172f60ULL,</div><div class='del'>-	0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,</div><div class='del'>-	0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL,</div><div class='del'>-	0xbef9a3f7b2c67915ULL, 0xc67178f2e372532bULL,</div><div class='del'>-	0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,</div><div class='del'>-	0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL,</div><div class='del'>-	0x06f067aa72176fbaULL, 0x0a637dc5a2c898a6ULL,</div><div class='del'>-	0x113f9804bef90daeULL, 0x1b710b35131c471bULL,</div><div class='del'>-	0x28db77f523047d84ULL, 0x32caab7b40c72493ULL,</div><div class='del'>-	0x3c9ebe0a15c9bebcULL, 0x431d67c49c100d4cULL,</div><div class='del'>-	0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,</div><div class='del'>-	0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-asmlinkage void sha512_transform_neon(u64 *digest, const void *data,</div><div class='del'>-				      const u64 k[], unsigned int num_blks);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int sha512_neon_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;state[0] = SHA512_H0;</div><div class='del'>-	sctx-&gt;state[1] = SHA512_H1;</div><div class='del'>-	sctx-&gt;state[2] = SHA512_H2;</div><div class='del'>-	sctx-&gt;state[3] = SHA512_H3;</div><div class='del'>-	sctx-&gt;state[4] = SHA512_H4;</div><div class='del'>-	sctx-&gt;state[5] = SHA512_H5;</div><div class='del'>-	sctx-&gt;state[6] = SHA512_H6;</div><div class='del'>-	sctx-&gt;state[7] = SHA512_H7;</div><div class='del'>-	sctx-&gt;count[0] = sctx-&gt;count[1] = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __sha512_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len, unsigned int partial)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int done = 0;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count[0] += len;</div><div class='del'>-	if (sctx-&gt;count[0] &lt; len)</div><div class='del'>-		sctx-&gt;count[1]++;</div><div class='del'>-</div><div class='del'>-	if (partial) {</div><div class='del'>-		done = SHA512_BLOCK_SIZE - partial;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, done);</div><div class='del'>-		sha512_transform_neon(sctx-&gt;state, sctx-&gt;buf, sha512_k, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len - done &gt;= SHA512_BLOCK_SIZE) {</div><div class='del'>-		const unsigned int rounds = (len - done) / SHA512_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		sha512_transform_neon(sctx-&gt;state, data + done, sha512_k,</div><div class='del'>-				      rounds);</div><div class='del'>-</div><div class='del'>-		done += rounds * SHA512_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;buf, data + done, len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = sctx-&gt;count[0] % SHA512_BLOCK_SIZE;</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	/* Handle the fast case right here */</div><div class='del'>-	if (partial + len &lt; SHA512_BLOCK_SIZE) {</div><div class='del'>-		sctx-&gt;count[0] += len;</div><div class='del'>-		if (sctx-&gt;count[0] &lt; len)</div><div class='del'>-			sctx-&gt;count[1]++;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, len);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!may_use_simd()) {</div><div class='del'>-		res = crypto_sha512_update(desc, data, len);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		res = __sha512_neon_update(desc, data, len, partial);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha512_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, index, padlen;</div><div class='del'>-	__be64 *dst = (__be64 *)out;</div><div class='del'>-	__be64 bits[2];</div><div class='del'>-	static const u8 padding[SHA512_BLOCK_SIZE] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	/* save number of bits */</div><div class='del'>-	bits[1] = cpu_to_be64(sctx-&gt;count[0] &lt;&lt; 3);</div><div class='del'>-	bits[0] = cpu_to_be64(sctx-&gt;count[1] &lt;&lt; 3 | sctx-&gt;count[0] &gt;&gt; 61);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 112 mod 128 and append length */</div><div class='del'>-	index = sctx-&gt;count[0] &amp; 0x7f;</div><div class='del'>-	padlen = (index &lt; 112) ? (112 - index) : ((128+112) - index);</div><div class='del'>-</div><div class='del'>-	if (!may_use_simd()) {</div><div class='del'>-		crypto_sha512_update(desc, padding, padlen);</div><div class='del'>-		crypto_sha512_update(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		/* We need to fill a whole block for __sha512_neon_update() */</div><div class='del'>-		if (padlen &lt;= 112) {</div><div class='del'>-			sctx-&gt;count[0] += padlen;</div><div class='del'>-			if (sctx-&gt;count[0] &lt; padlen)</div><div class='del'>-				sctx-&gt;count[1]++;</div><div class='del'>-			memcpy(sctx-&gt;buf + index, padding, padlen);</div><div class='del'>-		} else {</div><div class='del'>-			__sha512_neon_update(desc, padding, padlen, index);</div><div class='del'>-		}</div><div class='del'>-		__sha512_neon_update(desc, (const u8 *)&amp;bits,</div><div class='del'>-					sizeof(bits), 112);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be64(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_neon_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_neon_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha384_neon_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;state[0] = SHA384_H0;</div><div class='del'>-	sctx-&gt;state[1] = SHA384_H1;</div><div class='del'>-	sctx-&gt;state[2] = SHA384_H2;</div><div class='del'>-	sctx-&gt;state[3] = SHA384_H3;</div><div class='del'>-	sctx-&gt;state[4] = SHA384_H4;</div><div class='del'>-	sctx-&gt;state[5] = SHA384_H5;</div><div class='del'>-	sctx-&gt;state[6] = SHA384_H6;</div><div class='del'>-	sctx-&gt;state[7] = SHA384_H7;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count[0] = sctx-&gt;count[1] = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha384_neon_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[SHA512_DIGEST_SIZE];</div><div class='del'>-</div><div class='del'>-	sha512_neon_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, SHA384_DIGEST_SIZE);</div><div class='del'>-	memzero_explicit(D, SHA512_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha512_neon_init,</div><div class='del'>-	.update		=	sha512_neon_update,</div><div class='del'>-	.final		=	sha512_neon_final,</div><div class='del'>-	.export		=	sha512_neon_export,</div><div class='del'>-	.import		=	sha512_neon_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha512_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha512",</div><div class='del'>-		.cra_driver_name =	"sha512-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,</div><div class='del'>-		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-},  {</div><div class='del'>-	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha384_neon_init,</div><div class='del'>-	.update		=	sha512_neon_update,</div><div class='del'>-	.final		=	sha384_neon_final,</div><div class='del'>-	.export		=	sha512_neon_export,</div><div class='del'>-	.import		=	sha512_neon_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha512_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha384",</div><div class='del'>-		.cra_driver_name =	"sha384-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,</div><div class='del'>-		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha512_neon_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_neon())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha512_neon_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha512_neon_mod_init);</div><div class='del'>-module_exit(sha512_neon_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, NEON accelerated");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384");</div><div class='head'>diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild<br/>index 3c4596d0ce6c..30b3bc1666d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/Kbuild</a></div><div class='hunk'>@@ -13,6 +13,7 @@ generic-y += kdebug.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += param.h</div><div class='ctx'> generic-y += parport.h</div><div class='hunk'>@@ -20,7 +21,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='ctx'> generic-y += rwsem.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += seccomp.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='head'>diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h<br/>index 186270b3e194..4abe57279c66 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/assembler.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/assembler.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/assembler.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/assembler.h</a></div><div class='hunk'>@@ -178,6 +178,21 @@</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Assembly version of "adr rd, BSYM(sym)".  This should only be used to</div><div class='add'>+ * reference local symbols in the same assembly file which are to be</div><div class='add'>+ * resolved by the assembler.  Other usage is undefined.</div><div class='add'>+ */</div><div class='add'>+	.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo</div><div class='add'>+	.macro	badr\c, rd, sym</div><div class='add'>+#ifdef CONFIG_THUMB2_KERNEL</div><div class='add'>+	adr\c	\rd, \sym + 1</div><div class='add'>+#else</div><div class='add'>+	adr\c	\rd, \sym</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+	.endr</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Get current thread_info.</div><div class='ctx'>  */</div><div class='ctx'> 	.macro	get_thread_info, rd</div><div class='hunk'>@@ -326,7 +341,7 @@</div><div class='ctx'> THUMB(	orr	\reg , \reg , #PSR_T_BIT	)</div><div class='ctx'> 	bne	1f</div><div class='ctx'> 	orr	\reg, \reg, #PSR_A_BIT</div><div class='del'>-	adr	lr, BSYM(2f)</div><div class='add'>+	badr	lr, 2f</div><div class='ctx'> 	msr	spsr_cxsf, \reg</div><div class='ctx'> 	__MSR_ELR_HYP(14)</div><div class='ctx'> 	__ERET</div><div class='head'>diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h<br/>index d2f81e6b8c1c..6c2327e1c732 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/barrier.h</a></div><div class='hunk'>@@ -81,7 +81,7 @@ do {									\</div><div class='ctx'> #define read_barrier_depends()		do { } while(0)</div><div class='ctx'> #define smp_read_barrier_depends()	do { } while(0)</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value)	do { var = value; smp_mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define smp_mb__before_atomic()	smp_mb()</div><div class='ctx'> #define smp_mb__after_atomic()	smp_mb()</div><div class='head'>diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h<br/>index 2d46862e7bef..4812cda8fd17 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/cacheflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -482,10 +482,17 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)</div><div class='ctx'> 	: : : "r0","r1","r2","r3","r4","r5","r6","r7", \</div><div class='ctx'> 	      "r9","r10","lr","memory" )</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MMU</div><div class='ctx'> int set_memory_ro(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_rw(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_x(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_nx(unsigned long addr, int numpages);</div><div class='add'>+#else</div><div class='add'>+static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; }</div><div class='add'>+static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; }</div><div class='add'>+static inline int set_memory_x(unsigned long addr, int numpages) { return 0; }</div><div class='add'>+static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_RODATA</div><div class='ctx'> void mark_rodata_ro(void);</div><div class='head'>diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h<br/>index abb2c3769b01..1692a05d3207 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -94,6 +94,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='ctx'> 	default:</div><div class='add'>+		/* Cause a link-time error, the xchg() size is not supported */</div><div class='ctx'> 		__bad_xchg(ptr, size), ret = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -102,8 +103,10 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define xchg(ptr,x) \</div><div class='del'>-	((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))</div><div class='add'>+#define xchg(ptr, x) ({							\</div><div class='add'>+	(__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr),		\</div><div class='add'>+				   sizeof(*(ptr)));			\</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -118,14 +121,16 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size</div><div class='ctx'>  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make</div><div class='ctx'>  * them available.</div><div class='ctx'>  */</div><div class='del'>-#define cmpxchg_local(ptr, o, n)				  	       \</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\</div><div class='del'>-			(unsigned long)(n), sizeof(*(ptr))))</div><div class='add'>+#define cmpxchg_local(ptr, o, n) ({					\</div><div class='add'>+	(__typeof(*ptr))__cmpxchg_local_generic((ptr),			\</div><div class='add'>+					        (unsigned long)(o),	\</div><div class='add'>+					        (unsigned long)(n),	\</div><div class='add'>+					        sizeof(*(ptr)));	\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_SMP</div><div class='ctx'> #include &lt;asm-generic/cmpxchg.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #else	/* min ARCH &gt;= ARMv6 */</div><div class='ctx'> </div><div class='hunk'>@@ -201,11 +206,12 @@ static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define cmpxchg(ptr,o,n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg_mb((ptr),			\</div><div class='del'>-					  (unsigned long)(o),		\</div><div class='del'>-					  (unsigned long)(n),		\</div><div class='del'>-					  sizeof(*(ptr))))</div><div class='add'>+#define cmpxchg(ptr,o,n) ({						\</div><div class='add'>+	(__typeof__(*(ptr)))__cmpxchg_mb((ptr),				\</div><div class='add'>+					 (unsigned long)(o),		\</div><div class='add'>+					 (unsigned long)(n),		\</div><div class='add'>+					 sizeof(*(ptr)));		\</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long __cmpxchg_local(volatile void *ptr,</div><div class='ctx'> 					    unsigned long old,</div><div class='hunk'>@@ -227,6 +233,13 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define cmpxchg_local(ptr, o, n) ({					\</div><div class='add'>+	(__typeof(*ptr))__cmpxchg_local((ptr),				\</div><div class='add'>+				        (unsigned long)(o),		\</div><div class='add'>+				        (unsigned long)(n),		\</div><div class='add'>+				        sizeof(*(ptr)));		\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> static inline unsigned long long __cmpxchg64(unsigned long long *ptr,</div><div class='ctx'> 					     unsigned long long old,</div><div class='ctx'> 					     unsigned long long new)</div><div class='hunk'>@@ -252,6 +265,14 @@ static inline unsigned long long __cmpxchg64(unsigned long long *ptr,</div><div class='ctx'> 	return oldval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define cmpxchg64_relaxed(ptr, o, n) ({					\</div><div class='add'>+	(__typeof__(*(ptr)))__cmpxchg64((ptr),				\</div><div class='add'>+					(unsigned long long)(o),	\</div><div class='add'>+					(unsigned long long)(n));	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define cmpxchg64_local(ptr, o, n) cmpxchg64_relaxed((ptr), (o), (n))</div><div class='add'>+</div><div class='ctx'> static inline unsigned long long __cmpxchg64_mb(unsigned long long *ptr,</div><div class='ctx'> 						unsigned long long old,</div><div class='ctx'> 						unsigned long long new)</div><div class='hunk'>@@ -265,23 +286,11 @@ static inline unsigned long long __cmpxchg64_mb(unsigned long long *ptr,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define cmpxchg_local(ptr,o,n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg_local((ptr),			\</div><div class='del'>-				       (unsigned long)(o),		\</div><div class='del'>-				       (unsigned long)(n),		\</div><div class='del'>-				       sizeof(*(ptr))))</div><div class='del'>-</div><div class='del'>-#define cmpxchg64(ptr, o, n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64_mb((ptr),			\</div><div class='del'>-					(unsigned long long)(o),	\</div><div class='del'>-					(unsigned long long)(n)))</div><div class='del'>-</div><div class='del'>-#define cmpxchg64_relaxed(ptr, o, n)					\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64((ptr),				\</div><div class='del'>-					(unsigned long long)(o),	\</div><div class='del'>-					(unsigned long long)(n)))</div><div class='del'>-</div><div class='del'>-#define cmpxchg64_local(ptr, o, n)	cmpxchg64_relaxed((ptr), (o), (n))</div><div class='add'>+#define cmpxchg64(ptr, o, n) ({						\</div><div class='add'>+	(__typeof__(*(ptr)))__cmpxchg64_mb((ptr),			\</div><div class='add'>+					   (unsigned long long)(o),	\</div><div class='add'>+					   (unsigned long long)(n));	\</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> #endif	/* __LINUX_ARM_ARCH__ &gt;= 6 */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h<br/>index 99084431d6ae..bb4fa67da541 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/dma.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/dma.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/dma.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'>  * It should not be re-used except for that purpose.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/isa-dma.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h<br/>index 0df7a2c1fc3d..5189fa819b60 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/edac.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/edac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/edac.h</a></div><div class='hunk'>@@ -18,11 +18,12 @@</div><div class='ctx'> #define ASM_EDAC_H</div><div class='ctx'> /*</div><div class='ctx'>  * ECC atomic, DMA, SMP and interrupt safe scrub function.</div><div class='del'>- * Implements the per arch atomic_scrub() that EDAC use for software</div><div class='add'>+ * Implements the per arch edac_atomic_scrub() that EDAC use for software</div><div class='ctx'>  * ECC scrubbing.  It reads memory and then writes back the original</div><div class='ctx'>  * value, allowing the hardware to detect and correct memory errors.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_scrub(void *va, u32 size)</div><div class='add'>+</div><div class='add'>+static inline void edac_atomic_scrub(void *va, u32 size)</div><div class='ctx'> {</div><div class='ctx'> #if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='ctx'> 	unsigned int *virt_addr = va;</div><div class='head'>diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S<br/>index 469a2b30fa27..609184f522ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/entry-macro-multi.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/entry-macro-multi.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/entry-macro-multi.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/entry-macro-multi.S</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> 	@</div><div class='ctx'> 	@ routine called with r0 = irq number, r1 = struct pt_regs *</div><div class='ctx'> 	@</div><div class='del'>-	adrne	lr, BSYM(1b)</div><div class='add'>+	badrne	lr, 1b</div><div class='ctx'> 	bne	asm_do_IRQ</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 	ALT_SMP(test_for_ipi r0, r2, r6, lr)</div><div class='ctx'> 	ALT_UP_B(9997f)</div><div class='ctx'> 	movne	r1, sp</div><div class='del'>-	adrne	lr, BSYM(1b)</div><div class='add'>+	badrne	lr, 1b</div><div class='ctx'> 	bne	do_IPI</div><div class='ctx'> #endif</div><div class='ctx'> 9997:</div><div class='head'>diff --git a/arch/arm/include/asm/firmware.h b/arch/arm/include/asm/firmware.h<br/>index 89aefe10d66b..34c1d96ef46d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/firmware.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/firmware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/firmware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/firmware.h</a></div><div class='hunk'>@@ -34,6 +34,10 @@ struct firmware_ops {</div><div class='ctx'> 	 */</div><div class='ctx'> 	int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr);</div><div class='ctx'> 	/*</div><div class='add'>+	 * Gets boot address of specified physical CPU</div><div class='add'>+	 */</div><div class='add'>+	int (*get_cpu_boot_addr)(int cpu, unsigned long *boot_addr);</div><div class='add'>+	/*</div><div class='ctx'> 	 * Boots specified physical CPU</div><div class='ctx'> 	 */</div><div class='ctx'> 	int (*cpu_boot)(int cpu);</div><div class='head'>diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h<br/>index 4e78065a16aa..5eed82809d82 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/futex.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/futex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/futex.h</a></div><div class='hunk'>@@ -93,6 +93,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	__asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"</div><div class='ctx'> 	"1:	" TUSER(ldr) "	%1, [%4]\n"</div><div class='ctx'> 	"	teq	%1, %2\n"</div><div class='hunk'>@@ -104,6 +105,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,</div><div class='ctx'> 	: "cc", "memory");</div><div class='ctx'> </div><div class='ctx'> 	*uval = val;</div><div class='add'>+	preempt_enable();</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -124,7 +127,10 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	pagefault_disable();	/* implies preempt_disable() */</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+	preempt_disable();</div><div class='add'>+#endif</div><div class='add'>+	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case FUTEX_OP_SET:</div><div class='hunk'>@@ -146,7 +152,10 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 		ret = -ENOSYS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pagefault_enable();	/* subsumes preempt_enable() */</div><div class='add'>+	pagefault_enable();</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+	preempt_enable();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		switch (cmp) {</div><div class='head'>diff --git a/arch/arm/include/asm/hugetlb.h b/arch/arm/include/asm/hugetlb.h<br/>index 1f1b1cd112f3..7d26f6c4f0f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -53,10 +53,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int huge_pte_none(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_none(pte);</div><div class='hunk'>@@ -67,15 +63,6 @@ static inline pte_t huge_pte_wrprotect(pte_t pte)</div><div class='ctx'> 	return pte_wrprotect(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	clear_bit(PG_dcache_clean, &amp;page-&gt;flags);</div><div class='head'>diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h<br/>index db58deb00aa7..485982084fe9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/io.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/blk_types.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='hunk'>@@ -73,17 +74,16 @@ void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);</div><div class='ctx'> static inline void __raw_writew(u16 val, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile("strh %1, %0"</div><div class='del'>-		     : "+Q" (*(volatile u16 __force *)addr)</div><div class='del'>-		     : "r" (val));</div><div class='add'>+		     : : "Q" (*(volatile u16 __force *)addr), "r" (val));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __raw_readw __raw_readw</div><div class='ctx'> static inline u16 __raw_readw(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u16 val;</div><div class='del'>-	asm volatile("ldrh %1, %0"</div><div class='del'>-		     : "+Q" (*(volatile u16 __force *)addr),</div><div class='del'>-		       "=r" (val));</div><div class='add'>+	asm volatile("ldrh %0, %1"</div><div class='add'>+		     : "=r" (val)</div><div class='add'>+		     : "Q" (*(volatile u16 __force *)addr));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -92,25 +92,23 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)</div><div class='ctx'> static inline void __raw_writeb(u8 val, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile("strb %1, %0"</div><div class='del'>-		     : "+Qo" (*(volatile u8 __force *)addr)</div><div class='del'>-		     : "r" (val));</div><div class='add'>+		     : : "Qo" (*(volatile u8 __force *)addr), "r" (val));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __raw_writel __raw_writel</div><div class='ctx'> static inline void __raw_writel(u32 val, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile("str %1, %0"</div><div class='del'>-		     : "+Qo" (*(volatile u32 __force *)addr)</div><div class='del'>-		     : "r" (val));</div><div class='add'>+		     : : "Qo" (*(volatile u32 __force *)addr), "r" (val));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __raw_readb __raw_readb</div><div class='ctx'> static inline u8 __raw_readb(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u8 val;</div><div class='del'>-	asm volatile("ldrb %1, %0"</div><div class='del'>-		     : "+Qo" (*(volatile u8 __force *)addr),</div><div class='del'>-		       "=r" (val));</div><div class='add'>+	asm volatile("ldrb %0, %1"</div><div class='add'>+		     : "=r" (val)</div><div class='add'>+		     : "Qo" (*(volatile u8 __force *)addr));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -118,9 +116,9 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)</div><div class='ctx'> static inline u32 __raw_readl(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='del'>-	asm volatile("ldr %1, %0"</div><div class='del'>-		     : "+Qo" (*(volatile u32 __force *)addr),</div><div class='del'>-		       "=r" (val));</div><div class='add'>+	asm volatile("ldr %0, %1"</div><div class='add'>+		     : "=r" (val)</div><div class='add'>+		     : "Qo" (*(volatile u32 __force *)addr));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -142,16 +140,11 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)</div><div class='ctx'>  * The _caller variety takes a __builtin_return_address(0) value for</div><div class='ctx'>  * /proc/vmalloc to use - and should only be used in non-inline functions.</div><div class='ctx'>  */</div><div class='del'>-extern void __iomem *__arm_ioremap_pfn_caller(unsigned long, unsigned long,</div><div class='del'>-	size_t, unsigned int, void *);</div><div class='ctx'> extern void __iomem *__arm_ioremap_caller(phys_addr_t, size_t, unsigned int,</div><div class='ctx'> 	void *);</div><div class='del'>-</div><div class='ctx'> extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int);</div><div class='del'>-extern void __iomem *__arm_ioremap(phys_addr_t, size_t, unsigned int);</div><div class='ctx'> extern void __iomem *__arm_ioremap_exec(phys_addr_t, size_t, bool cached);</div><div class='ctx'> extern void __iounmap(volatile void __iomem *addr);</div><div class='del'>-extern void __arm_iounmap(volatile void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> extern void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t,</div><div class='ctx'> 	unsigned int, void *);</div><div class='hunk'>@@ -319,24 +312,95 @@ extern void _memset_io(volatile void __iomem *, int, size_t);</div><div class='ctx'> #define writesw(p,d,l)		__raw_writesw(p,d,l)</div><div class='ctx'> #define writesl(p,d,l)		__raw_writesl(p,d,l)</div><div class='ctx'> </div><div class='add'>+#ifndef __ARMBE__</div><div class='add'>+static inline void memset_io(volatile void __iomem *dst, unsigned c,</div><div class='add'>+	size_t count)</div><div class='add'>+{</div><div class='add'>+	extern void mmioset(void *, unsigned int, size_t);</div><div class='add'>+	mmioset((void __force *)dst, c, count);</div><div class='add'>+}</div><div class='add'>+#define memset_io(dst,c,count) memset_io(dst,c,count)</div><div class='add'>+</div><div class='add'>+static inline void memcpy_fromio(void *to, const volatile void __iomem *from,</div><div class='add'>+	size_t count)</div><div class='add'>+{</div><div class='add'>+	extern void mmiocpy(void *, const void *, size_t);</div><div class='add'>+	mmiocpy(to, (const void __force *)from, count);</div><div class='add'>+}</div><div class='add'>+#define memcpy_fromio(to,from,count) memcpy_fromio(to,from,count)</div><div class='add'>+</div><div class='add'>+static inline void memcpy_toio(volatile void __iomem *to, const void *from,</div><div class='add'>+	size_t count)</div><div class='add'>+{</div><div class='add'>+	extern void mmiocpy(void *, const void *, size_t);</div><div class='add'>+	mmiocpy((void __force *)to, from, count);</div><div class='add'>+}</div><div class='add'>+#define memcpy_toio(to,from,count) memcpy_toio(to,from,count)</div><div class='add'>+</div><div class='add'>+#else</div><div class='ctx'> #define memset_io(c,v,l)	_memset_io(c,(v),(l))</div><div class='ctx'> #define memcpy_fromio(a,c,l)	_memcpy_fromio((a),c,(l))</div><div class='ctx'> #define memcpy_toio(c,a,l)	_memcpy_toio(c,(a),(l))</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif	/* readl */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * ioremap and friends.</div><div class='add'>+ * ioremap() and friends.</div><div class='add'>+ *</div><div class='add'>+ * ioremap() takes a resource address, and size.  Due to the ARM memory</div><div class='add'>+ * types, it is important to use the correct ioremap() function as each</div><div class='add'>+ * mapping has specific properties.</div><div class='add'>+ *</div><div class='add'>+ * Function		Memory type	Cacheability	Cache hint</div><div class='add'>+ * ioremap()		Device		n/a		n/a</div><div class='add'>+ * ioremap_nocache()	Device		n/a		n/a</div><div class='add'>+ * ioremap_cache()	Normal		Writeback	Read allocate</div><div class='add'>+ * ioremap_wc()		Normal		Non-cacheable	n/a</div><div class='add'>+ * ioremap_wt()		Normal		Non-cacheable	n/a</div><div class='add'>+ *</div><div class='add'>+ * All device mappings have the following properties:</div><div class='add'>+ * - no access speculation</div><div class='add'>+ * - no repetition (eg, on return from an exception)</div><div class='add'>+ * - number, order and size of accesses are maintained</div><div class='add'>+ * - unaligned accesses are "unpredictable"</div><div class='add'>+ * - writes may be delayed before they hit the endpoint device</div><div class='ctx'>  *</div><div class='del'>- * ioremap takes a PCI memory address, as specified in</div><div class='del'>- * Documentation/io-mapping.txt.</div><div class='add'>+ * ioremap_nocache() is the same as ioremap() as there are too many device</div><div class='add'>+ * drivers using this for device registers, and documentation which tells</div><div class='add'>+ * people to use it for such for this to be any different.  This is not a</div><div class='add'>+ * safe fallback for memory-like mappings, or memory regions where the</div><div class='add'>+ * compiler may generate unaligned accesses - eg, via inlining its own</div><div class='add'>+ * memcpy.</div><div class='ctx'>  *</div><div class='add'>+ * All normal memory mappings have the following properties:</div><div class='add'>+ * - reads can be repeated with no side effects</div><div class='add'>+ * - repeated reads return the last value written</div><div class='add'>+ * - reads can fetch additional locations without side effects</div><div class='add'>+ * - writes can be repeated (in certain cases) with no side effects</div><div class='add'>+ * - writes can be merged before accessing the target</div><div class='add'>+ * - unaligned accesses can be supported</div><div class='add'>+ * - ordering is not guaranteed without explicit dependencies or barrier</div><div class='add'>+ *   instructions</div><div class='add'>+ * - writes may be delayed before they hit the endpoint memory</div><div class='add'>+ *</div><div class='add'>+ * The cache hint is only a performance hint: CPUs may alias these hints.</div><div class='add'>+ * Eg, a CPU not implementing read allocate but implementing write allocate</div><div class='add'>+ * will provide a write allocate mapping instead.</div><div class='ctx'>  */</div><div class='del'>-#define ioremap(cookie,size)		__arm_ioremap((cookie), (size), MT_DEVICE)</div><div class='del'>-#define ioremap_nocache(cookie,size)	__arm_ioremap((cookie), (size), MT_DEVICE)</div><div class='del'>-#define ioremap_cache(cookie,size)	__arm_ioremap((cookie), (size), MT_DEVICE_CACHED)</div><div class='del'>-#define ioremap_wc(cookie,size)		__arm_ioremap((cookie), (size), MT_DEVICE_WC)</div><div class='del'>-#define iounmap				__arm_iounmap</div><div class='add'>+void __iomem *ioremap(resource_size_t res_cookie, size_t size);</div><div class='add'>+#define ioremap ioremap</div><div class='add'>+#define ioremap_nocache ioremap</div><div class='add'>+</div><div class='add'>+void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size);</div><div class='add'>+#define ioremap_cache ioremap_cache</div><div class='add'>+</div><div class='add'>+void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size);</div><div class='add'>+#define ioremap_wc ioremap_wc</div><div class='add'>+#define ioremap_wt ioremap_wc</div><div class='add'>+</div><div class='add'>+void iounmap(volatile void __iomem *iomem_cookie);</div><div class='add'>+#define iounmap iounmap</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * io{read,write}{16,32}be() macros</div><div class='head'>diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h<br/>index 3b763d6652a0..43908146a5cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/irqflags.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/irqflags.h</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> #if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='ctx'> </div><div class='add'>+#define arch_local_irq_save arch_local_irq_save</div><div class='ctx'> static inline unsigned long arch_local_irq_save(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -31,6 +32,7 @@ static inline unsigned long arch_local_irq_save(void)</div><div class='ctx'> 	return flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define arch_local_irq_enable arch_local_irq_enable</div><div class='ctx'> static inline void arch_local_irq_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -40,6 +42,7 @@ static inline void arch_local_irq_enable(void)</div><div class='ctx'> 		: "memory", "cc");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define arch_local_irq_disable arch_local_irq_disable</div><div class='ctx'> static inline void arch_local_irq_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -56,6 +59,7 @@ static inline void arch_local_irq_disable(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Save the current interrupt enable state &amp; disable IRQs</div><div class='ctx'>  */</div><div class='add'>+#define arch_local_irq_save arch_local_irq_save</div><div class='ctx'> static inline unsigned long arch_local_irq_save(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags, temp;</div><div class='hunk'>@@ -73,6 +77,7 @@ static inline unsigned long arch_local_irq_save(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Enable IRQs</div><div class='ctx'>  */</div><div class='add'>+#define arch_local_irq_enable arch_local_irq_enable</div><div class='ctx'> static inline void arch_local_irq_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long temp;</div><div class='hunk'>@@ -88,6 +93,7 @@ static inline void arch_local_irq_enable(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Disable IRQs</div><div class='ctx'>  */</div><div class='add'>+#define arch_local_irq_disable arch_local_irq_disable</div><div class='ctx'> static inline void arch_local_irq_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long temp;</div><div class='hunk'>@@ -135,6 +141,7 @@ static inline void arch_local_irq_disable(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Save the current interrupt enable state.</div><div class='ctx'>  */</div><div class='add'>+#define arch_local_save_flags arch_local_save_flags</div><div class='ctx'> static inline unsigned long arch_local_save_flags(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -147,6 +154,7 @@ static inline unsigned long arch_local_save_flags(void)</div><div class='ctx'> /*</div><div class='ctx'>  * restore saved IRQ &amp; FIQ state</div><div class='ctx'>  */</div><div class='add'>+#define arch_local_irq_restore arch_local_irq_restore</div><div class='ctx'> static inline void arch_local_irq_restore(unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -156,10 +164,13 @@ static inline void arch_local_irq_restore(unsigned long flags)</div><div class='ctx'> 		: "memory", "cc");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define arch_irqs_disabled_flags arch_irqs_disabled_flags</div><div class='ctx'> static inline int arch_irqs_disabled_flags(unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	return flags &amp; IRQMASK_I_BIT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#include &lt;asm-generic/irqflags.h&gt;</div><div class='add'>+</div><div class='ctx'> #endif /* ifdef __KERNEL__ */</div><div class='ctx'> #endif /* ifndef __ASM_ARM_IRQFLAGS_H */</div><div class='head'>diff --git a/arch/arm/include/asm/kvm_asm.h b/arch/arm/include/asm/kvm_asm.h<br/>index 25410b2d8bc1..194c91b610ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/kvm_asm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/kvm_asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/kvm_asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/kvm_asm.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #define c0_MPIDR	1	/* MultiProcessor ID Register */</div><div class='ctx'> #define c0_CSSELR	2	/* Cache Size Selection Register */</div><div class='ctx'> #define c1_SCTLR	3	/* System Control Register */</div><div class='del'>-#define c1_ACTLR	4	/* Auxilliary Control Register */</div><div class='add'>+#define c1_ACTLR	4	/* Auxiliary Control Register */</div><div class='ctx'> #define c1_CPACR	5	/* Coprocessor Access Control */</div><div class='ctx'> #define c2_TTBR0	6	/* Translation Table Base Register 0 */</div><div class='ctx'> #define c2_TTBR0_high	7	/* TTBR0 top 32 bits */</div><div class='head'>diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h<br/>index d71607c16601..e896d2c196e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -218,11 +218,6 @@ static inline int kvm_arch_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void vgic_arch_setup(const struct vgic_params *vgic)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(vgic-&gt;type != VGIC_V2);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_perf_init(void);</div><div class='ctx'> int kvm_perf_teardown(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h<br/>index 0406cb3f1af7..cb3a40717edd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mach/arch.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/mach/arch.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mach/arch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/mach/arch.h</a></div><div class='hunk'>@@ -51,7 +51,7 @@ struct machine_desc {</div><div class='ctx'> 	bool			(*smp_init)(void);</div><div class='ctx'> 	void			(*fixup)(struct tag *, char **);</div><div class='ctx'> 	void			(*dt_fixup)(void);</div><div class='del'>-	void			(*init_meminfo)(void);</div><div class='add'>+	long long		(*pv_fixup)(void);</div><div class='ctx'> 	void			(*reserve)(void);/* reserve mem blocks	*/</div><div class='ctx'> 	void			(*map_io)(void);/* IO mapping function	*/</div><div class='ctx'> 	void			(*init_early)(void);</div><div class='head'>diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h<br/>index 50b378f59e08..acd4983d9b1f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mcpm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/mcpm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mcpm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/mcpm.h</a></div><div class='hunk'>@@ -137,17 +137,12 @@ int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster);</div><div class='ctx'> /**</div><div class='ctx'>  * mcpm_cpu_suspend - bring the calling CPU in a suspended state</div><div class='ctx'>  *</div><div class='del'>- * @expected_residency: duration in microseconds the CPU is expected</div><div class='del'>- *			to remain suspended, or 0 if unknown/infinity.</div><div class='del'>- *</div><div class='del'>- * The calling CPU is suspended.  The expected residency argument is used</div><div class='del'>- * as a hint by the platform specific backend to implement the appropriate</div><div class='del'>- * sleep state level according to the knowledge it has on wake-up latency</div><div class='del'>- * for the given hardware.</div><div class='add'>+ * The calling CPU is suspended.  This is similar to mcpm_cpu_power_down()</div><div class='add'>+ * except for possible extra platform specific configuration steps to allow</div><div class='add'>+ * an asynchronous wake-up e.g. with a pending interrupt.</div><div class='ctx'>  *</div><div class='ctx'>  * If this CPU is found to be the "last man standing" in the cluster</div><div class='del'>- * then the cluster may be prepared for power-down too, if the expected</div><div class='del'>- * residency makes it worthwhile.</div><div class='add'>+ * then the cluster may be prepared for power-down too.</div><div class='ctx'>  *</div><div class='ctx'>  * This must be called with interrupts disabled.</div><div class='ctx'>  *</div><div class='hunk'>@@ -157,7 +152,7 @@ int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster);</div><div class='ctx'>  * This will return if mcpm_platform_register() has not been called</div><div class='ctx'>  * previously in which case the caller should take appropriate action.</div><div class='ctx'>  */</div><div class='del'>-void mcpm_cpu_suspend(u64 expected_residency);</div><div class='add'>+void mcpm_cpu_suspend(void);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up</div><div class='hunk'>@@ -234,12 +229,6 @@ struct mcpm_platform_ops {</div><div class='ctx'> 	void (*cpu_is_up)(unsigned int cpu, unsigned int cluster);</div><div class='ctx'> 	void (*cluster_is_up)(unsigned int cluster);</div><div class='ctx'> 	int (*wait_for_powerdown)(unsigned int cpu, unsigned int cluster);</div><div class='del'>-</div><div class='del'>-	/* deprecated callbacks */</div><div class='del'>-	int (*power_up)(unsigned int cpu, unsigned int cluster);</div><div class='del'>-	void (*power_down)(void);</div><div class='del'>-	void (*suspend)(u64);</div><div class='del'>-	void (*powered_up)(void);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -251,35 +240,6 @@ struct mcpm_platform_ops {</div><div class='ctx'>  */</div><div class='ctx'> int __init mcpm_platform_register(const struct mcpm_platform_ops *ops);</div><div class='ctx'> </div><div class='del'>-/* Synchronisation structures for coordinating safe cluster setup/teardown: */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * When modifying this structure, make sure you update the MCPM_SYNC_ defines</div><div class='del'>- * to match.</div><div class='del'>- */</div><div class='del'>-struct mcpm_sync_struct {</div><div class='del'>-	/* individual CPU states */</div><div class='del'>-	struct {</div><div class='del'>-		s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='del'>-	} cpus[MAX_CPUS_PER_CLUSTER];</div><div class='del'>-</div><div class='del'>-	/* cluster state */</div><div class='del'>-	s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='del'>-</div><div class='del'>-	/* inbound-side state */</div><div class='del'>-	s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct sync_struct {</div><div class='del'>-	struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);</div><div class='del'>-void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);</div><div class='del'>-void __mcpm_outbound_leave_critical(unsigned int cluster, int state);</div><div class='del'>-bool __mcpm_outbound_enter_critical(unsigned int this_cpu, unsigned int cluster);</div><div class='del'>-int __mcpm_cluster_state(unsigned int cluster);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * mcpm_sync_init - Initialize the cluster synchronization support</div><div class='ctx'>  *</div><div class='hunk'>@@ -318,6 +278,29 @@ int __init mcpm_loopback(void (*cache_disable)(void));</div><div class='ctx'> </div><div class='ctx'> void __init mcpm_smp_set_ops(void);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Synchronisation structures for coordinating safe cluster setup/teardown.</div><div class='add'>+ * This is private to the MCPM core code and shared between C and assembly.</div><div class='add'>+ * When modifying this structure, make sure you update the MCPM_SYNC_ defines</div><div class='add'>+ * to match.</div><div class='add'>+ */</div><div class='add'>+struct mcpm_sync_struct {</div><div class='add'>+	/* individual CPU states */</div><div class='add'>+	struct {</div><div class='add'>+		s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='add'>+	} cpus[MAX_CPUS_PER_CLUSTER];</div><div class='add'>+</div><div class='add'>+	/* cluster state */</div><div class='add'>+	s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='add'>+</div><div class='add'>+	/* inbound-side state */</div><div class='add'>+	s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sync_struct {</div><div class='add'>+	struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> /* </div><div class='head'>diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h<br/>index 184def0e1652..b7f6fb462ea0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/memory.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/memory.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/memory.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/memory.h</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cache.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_NEED_MACH_MEMORY_H</div><div class='ctx'> #include &lt;mach/memory.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -133,20 +131,6 @@</div><div class='ctx'> #define phys_to_page(phys)	(pfn_to_page(__phys_to_pfn(phys)))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Minimum guaranted alignment in pgd_alloc().  The page table pointers passed</div><div class='del'>- * around in head.S and proc-*.S are shifted by this amount, in order to</div><div class='del'>- * leave spare high bits for systems with physical address extension.  This</div><div class='del'>- * does not fully accomodate the 40-bit addressing capability of ARM LPAE, but</div><div class='del'>- * gives us about 38-bits or so.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_ARM_LPAE</div><div class='del'>-#define ARCH_PGD_SHIFT		L1_CACHE_SHIFT</div><div class='del'>-#else</div><div class='del'>-#define ARCH_PGD_SHIFT		0</div><div class='del'>-#endif</div><div class='del'>-#define ARCH_PGD_MASK		((1 &lt;&lt; ARCH_PGD_SHIFT) - 1)</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical</div><div class='ctx'>  * memory.  This is used for XIP and NoMMU kernels, and on platforms that don't</div><div class='ctx'>  * have CONFIG_ARM_PATCH_PHYS_VIRT. Assembly code must always use</div><div class='hunk'>@@ -291,7 +275,7 @@ static inline void *phys_to_virt(phys_addr_t x)</div><div class='ctx'>  */</div><div class='ctx'> #define __pa(x)			__virt_to_phys((unsigned long)(x))</div><div class='ctx'> #define __va(x)			((void *)__phys_to_virt((phys_addr_t)(x)))</div><div class='del'>-#define pfn_to_kaddr(pfn)	__va((pfn) &lt;&lt; PAGE_SHIFT)</div><div class='add'>+#define pfn_to_kaddr(pfn)	__va((phys_addr_t)(pfn) &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> extern phys_addr_t (*arch_virt_to_idmap)(unsigned long x);</div><div class='ctx'> </div><div class='hunk'>@@ -302,7 +286,7 @@ extern phys_addr_t (*arch_virt_to_idmap)(unsigned long x);</div><div class='ctx'>  */</div><div class='ctx'> static inline phys_addr_t __virt_to_idmap(unsigned long x)</div><div class='ctx'> {</div><div class='del'>-	if (arch_virt_to_idmap)</div><div class='add'>+	if (IS_ENABLED(CONFIG_MMU) &amp;&amp; arch_virt_to_idmap)</div><div class='ctx'> 		return arch_virt_to_idmap(x);</div><div class='ctx'> 	else</div><div class='ctx'> 		return __virt_to_phys(x);</div><div class='head'>diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h<br/>index ed690c49ef93..e358b7966c06 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/module.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/module.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/module.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/module.h</a></div><div class='hunk'>@@ -16,11 +16,21 @@ enum {</div><div class='ctx'> 	ARM_SEC_UNLIKELY,</div><div class='ctx'> 	ARM_SEC_MAX,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> struct mod_arch_specific {</div><div class='add'>+#ifdef CONFIG_ARM_UNWIND</div><div class='ctx'> 	struct unwind_table *unwind[ARM_SEC_MAX];</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_ARM_MODULE_PLTS</div><div class='add'>+	struct elf32_shdr   *core_plt;</div><div class='add'>+	struct elf32_shdr   *init_plt;</div><div class='add'>+	int		    core_plt_count;</div><div class='add'>+	int		    init_plt_count;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Add the ARM architecture version to the version magic string</div><div class='head'>diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h<br/>index 585dc33a7a24..a5635444ca41 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pci.h</a></div><div class='hunk'>@@ -31,16 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)</div><div class='ctx'>  */</div><div class='ctx'> #define PCI_DMA_BUS_IS_PHYS     (1)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define HAVE_PCI_MMAP</div><div class='ctx'> extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'>                                enum pci_mmap_state mmap_state, int write_combine);</div><div class='head'>diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h<br/>index d9cf138fd7d4..4f9dec489931 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/perf_event.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/perf_event.h</a></div><div class='hunk'>@@ -19,4 +19,11 @@ extern unsigned long perf_misc_flags(struct pt_regs *regs);</div><div class='ctx'> #define perf_misc_flags(regs)	perf_misc_flags(regs)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define perf_arch_fetch_caller_regs(regs, __ip) { \</div><div class='add'>+	(regs)-&gt;ARM_pc = (__ip); \</div><div class='add'>+	(regs)-&gt;ARM_fp = (unsigned long) __builtin_frame_address(0); \</div><div class='add'>+	(regs)-&gt;ARM_sp = current_stack_pointer; \</div><div class='add'>+	(regs)-&gt;ARM_cpsr = SVC_MODE; \</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM_PERF_EVENT_H__ */</div><div class='head'>diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h<br/>index bfd662e49a25..aeddd28b3595 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/pgtable-2level.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/pgtable-2level.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/pgtable-2level.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pgtable-2level.h</a></div><div class='hunk'>@@ -129,7 +129,36 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are the memory types, defined to be compatible with</div><div class='del'>- * pre-ARMv6 CPUs cacheable and bufferable bits:   XXCB</div><div class='add'>+ * pre-ARMv6 CPUs cacheable and bufferable bits: n/a,n/a,C,B</div><div class='add'>+ * ARMv6+ without TEX remapping, they are a table index.</div><div class='add'>+ * ARMv6+ with TEX remapping, they correspond to n/a,TEX(0),C,B</div><div class='add'>+ *</div><div class='add'>+ * MT type		Pre-ARMv6	ARMv6+ type / cacheable status</div><div class='add'>+ * UNCACHED		Uncached	Strongly ordered</div><div class='add'>+ * BUFFERABLE		Bufferable	Normal memory / non-cacheable</div><div class='add'>+ * WRITETHROUGH		Writethrough	Normal memory / write through</div><div class='add'>+ * WRITEBACK		Writeback	Normal memory / write back, read alloc</div><div class='add'>+ * MINICACHE		Minicache	N/A</div><div class='add'>+ * WRITEALLOC		Writeback	Normal memory / write back, write alloc</div><div class='add'>+ * DEV_SHARED		Uncached	Device memory (shared)</div><div class='add'>+ * DEV_NONSHARED	Uncached	Device memory (non-shared)</div><div class='add'>+ * DEV_WC		Bufferable	Normal memory / non-cacheable</div><div class='add'>+ * DEV_CACHED		Writeback	Normal memory / write back, read alloc</div><div class='add'>+ * VECTORS		Variable	Normal memory / variable</div><div class='add'>+ *</div><div class='add'>+ * All normal memory mappings have the following properties:</div><div class='add'>+ * - reads can be repeated with no side effects</div><div class='add'>+ * - repeated reads return the last value written</div><div class='add'>+ * - reads can fetch additional locations without side effects</div><div class='add'>+ * - writes can be repeated (in certain cases) with no side effects</div><div class='add'>+ * - writes can be merged before accessing the target</div><div class='add'>+ * - unaligned accesses can be supported</div><div class='add'>+ *</div><div class='add'>+ * All device mappings have the following properties:</div><div class='add'>+ * - no access speculation</div><div class='add'>+ * - no repetition (eg, on return from an exception)</div><div class='add'>+ * - number, order and size of accesses are maintained</div><div class='add'>+ * - unaligned accesses are "unpredictable"</div><div class='ctx'>  */</div><div class='ctx'> #define L_PTE_MT_UNCACHED	(_AT(pteval_t, 0x00) &lt;&lt; 2)	/* 0000 */</div><div class='ctx'> #define L_PTE_MT_BUFFERABLE	(_AT(pteval_t, 0x01) &lt;&lt; 2)	/* 0001 */</div><div class='head'>diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h<br/>index 675e4ab79f68..3fc87dfd77e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/pmu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/pmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/pmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/pmu.h</a></div><div class='hunk'>@@ -24,22 +24,10 @@</div><div class='ctx'>  *	interrupt and passed the address of the low level handler,</div><div class='ctx'>  *	and can be used to implement any platform specific handling</div><div class='ctx'>  *	before or after calling it.</div><div class='del'>- * @runtime_resume: an optional handler which will be called by the</div><div class='del'>- *	runtime PM framework following a call to pm_runtime_get().</div><div class='del'>- *	Note that if pm_runtime_get() is called more than once in</div><div class='del'>- *	succession this handler will only be called once.</div><div class='del'>- * @runtime_suspend: an optional handler which will be called by the</div><div class='del'>- *	runtime PM framework following a call to pm_runtime_put().</div><div class='del'>- *	Note that if pm_runtime_get() is called more than once in</div><div class='del'>- *	succession this handler will only be called following the</div><div class='del'>- *	final call to pm_runtime_put() that actually disables the</div><div class='del'>- *	hardware.</div><div class='ctx'>  */</div><div class='ctx'> struct arm_pmu_platdata {</div><div class='ctx'> 	irqreturn_t (*handle_irq)(int irq, void *dev,</div><div class='ctx'> 				  irq_handler_t pmu_handler);</div><div class='del'>-	int (*runtime_resume)(struct device *dev);</div><div class='del'>-	int (*runtime_suspend)(struct device *dev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HW_PERF_EVENTS</div><div class='hunk'>@@ -92,6 +80,7 @@ struct pmu_hw_events {</div><div class='ctx'> struct arm_pmu {</div><div class='ctx'> 	struct pmu	pmu;</div><div class='ctx'> 	cpumask_t	active_irqs;</div><div class='add'>+	cpumask_t	supported_cpus;</div><div class='ctx'> 	int		*irq_affinity;</div><div class='ctx'> 	char		*name;</div><div class='ctx'> 	irqreturn_t	(*handle_irq)(int irq_num, void *dev);</div><div class='hunk'>@@ -122,8 +111,6 @@ struct arm_pmu {</div><div class='ctx'> </div><div class='ctx'> #define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu))</div><div class='ctx'> </div><div class='del'>-extern const struct dev_pm_ops armpmu_dev_pm_ops;</div><div class='del'>-</div><div class='ctx'> int armpmu_register(struct arm_pmu *armpmu, int type);</div><div class='ctx'> </div><div class='ctx'> u64 armpmu_event_update(struct perf_event *event);</div><div class='hunk'>@@ -158,6 +145,10 @@ struct pmu_probe_info {</div><div class='ctx'> #define XSCALE_PMU_PROBE(_version, _fn) \</div><div class='ctx'> 	PMU_PROBE(ARM_CPU_IMP_INTEL &lt;&lt; 24 | _version, ARM_PMU_XSCALE_MASK, _fn)</div><div class='ctx'> </div><div class='add'>+int arm_pmu_device_probe(struct platform_device *pdev,</div><div class='add'>+			 const struct of_device_id *of_table,</div><div class='add'>+			 const struct pmu_probe_info *probe_table);</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_HW_PERF_EVENTS */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARM_PMU_H__ */</div><div class='head'>diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h<br/>index 5324c1112f3a..8877ad5ffe10 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/proc-fns.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/proc-fns.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/proc-fns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/proc-fns.h</a></div><div class='hunk'>@@ -125,13 +125,6 @@ extern void cpu_resume(void);</div><div class='ctx'> 		ttbr;						\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='del'>-#define cpu_set_ttbr(nr, val)					\</div><div class='del'>-	do {							\</div><div class='del'>-		u64 ttbr = val;					\</div><div class='del'>-		__asm__("mcrr	p15, " #nr ", %Q0, %R0, c2"	\</div><div class='del'>-			: : "r" (ttbr));			\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='ctx'> #define cpu_get_pgd()	\</div><div class='ctx'> 	({						\</div><div class='ctx'> 		u64 pg = cpu_get_ttbr(0);		\</div><div class='head'>diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h<br/>index 18f5a554134f..2f3ac1ba6fb4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/smp.h</a></div><div class='hunk'>@@ -61,7 +61,7 @@ asmlinkage void secondary_start_kernel(void);</div><div class='ctx'> struct secondary_data {</div><div class='ctx'> 	union {</div><div class='ctx'> 		unsigned long mpu_rgn_szr;</div><div class='del'>-		unsigned long pgdir;</div><div class='add'>+		u64 pgdir;</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned long swapper_pg_dir;</div><div class='ctx'> 	void *stack;</div><div class='hunk'>@@ -69,6 +69,7 @@ struct secondary_data {</div><div class='ctx'> extern struct secondary_data secondary_data;</div><div class='ctx'> extern volatile int pen_release;</div><div class='ctx'> extern void secondary_startup(void);</div><div class='add'>+extern void secondary_startup_arm(void);</div><div class='ctx'> </div><div class='ctx'> extern int __cpu_disable(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h<br/>index cd20029bcd94..6c7182f32cef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/suspend.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/suspend.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/suspend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/suspend.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@ struct sleep_save_sp {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern void cpu_resume(void);</div><div class='add'>+extern void cpu_resume_arm(void);</div><div class='ctx'> extern int cpu_suspend(unsigned long, int (*)(unsigned long));</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h<br/>index 720ea0320a6d..3860cbd401ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/system_info.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/system_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/system_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/system_info.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> /* information about the system we're running on */</div><div class='ctx'> extern unsigned int system_rev;</div><div class='add'>+extern const char *system_serial;</div><div class='ctx'> extern unsigned int system_serial_low;</div><div class='ctx'> extern unsigned int system_serial_high;</div><div class='ctx'> extern unsigned int mem_fclk_21285;</div><div class='head'>diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h<br/>index 2fe85fff5cca..370f7a732900 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/topology.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@ extern struct cputopo_arm cpu_topology[NR_CPUS];</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_topology[cpu].socket_id)</div><div class='ctx'> #define topology_core_id(cpu)		(cpu_topology[cpu].core_id)</div><div class='ctx'> #define topology_core_cpumask(cpu)	(&amp;cpu_topology[cpu].core_sibling)</div><div class='del'>-#define topology_thread_cpumask(cpu)	(&amp;cpu_topology[cpu].thread_sibling)</div><div class='add'>+#define topology_sibling_cpumask(cpu)	(&amp;cpu_topology[cpu].thread_sibling)</div><div class='ctx'> </div><div class='ctx'> void init_cpu_topology(void);</div><div class='ctx'> void store_cpu_topology(unsigned int cpuid);</div><div class='head'>diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h<br/>index 200f9a7cd623..a91ae499614c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/unified.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/unified.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/unified.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/unified.h</a></div><div class='hunk'>@@ -45,7 +45,6 @@</div><div class='ctx'> #define THUMB(x...)	x</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> #define W(instr)	instr.w</div><div class='del'>-#define BSYM(sym)	sym + 1</div><div class='ctx'> #else</div><div class='ctx'> #define WASM(instr)	#instr ".w"</div><div class='ctx'> #endif</div><div class='hunk'>@@ -59,7 +58,6 @@</div><div class='ctx'> #define THUMB(x...)</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> #define W(instr)	instr</div><div class='del'>-#define BSYM(sym)	sym</div><div class='ctx'> #else</div><div class='ctx'> #define WASM(instr)	#instr</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/vfp.h b/arch/arm/include/asm/vfp.h<br/>index ee5f3084243c..22e414056a8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/vfp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/vfp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/vfp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/vfp.h</a></div><div class='hunk'>@@ -5,6 +5,9 @@</div><div class='ctx'>  * First, the standard VFP set.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifndef __ASM_VFP_H</div><div class='add'>+#define __ASM_VFP_H</div><div class='add'>+</div><div class='ctx'> #define FPSID			cr0</div><div class='ctx'> #define FPSCR			cr1</div><div class='ctx'> #define MVFR1			cr6</div><div class='hunk'>@@ -87,3 +90,9 @@</div><div class='ctx'> #define VFPOPDESC_UNUSED_BIT	(24)</div><div class='ctx'> #define VFPOPDESC_UNUSED_MASK	(0xFF &lt;&lt; VFPOPDESC_UNUSED_BIT)</div><div class='ctx'> #define VFPOPDESC_OPDESC_MASK	(~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK))</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+void vfp_disable(void);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_VFP_H */</div><div class='head'>diff --git a/arch/arm/include/asm/xen/hypervisor.h b/arch/arm/include/asm/xen/hypervisor.h<br/>index 1317ee40f4df..04ff8e7b37df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/xen/hypervisor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/xen/hypervisor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/xen/hypervisor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/xen/hypervisor.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef _ASM_ARM_XEN_HYPERVISOR_H</div><div class='ctx'> #define _ASM_ARM_XEN_HYPERVISOR_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+</div><div class='ctx'> extern struct shared_info *HYPERVISOR_shared_info;</div><div class='ctx'> extern struct start_info *xen_start_info;</div><div class='ctx'> </div><div class='hunk'>@@ -18,4 +20,10 @@ static inline enum paravirt_lazy_mode paravirt_get_lazy_mode(void)</div><div class='ctx'> </div><div class='ctx'> extern struct dma_map_ops *xen_dma_ops;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XEN</div><div class='add'>+void __init xen_early_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void xen_early_init(void) { return; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_ARM_XEN_HYPERVISOR_H */</div><div class='head'>diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h<br/>index 0b579b2f4e0e..1bee8ca12494 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/xen/page.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/asm/xen/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/xen/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/asm/xen/page.h</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;xen/interface/grant_table.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define phys_to_machine_mapping_valid(pfn) (1)</div><div class='del'>-#define mfn_to_virt(m)			(__va(mfn_to_pfn(m) &lt;&lt; PAGE_SHIFT))</div><div class='ctx'> </div><div class='ctx'> #define pte_mfn	    pte_pfn</div><div class='ctx'> #define mfn_pte	    pfn_pte</div><div class='head'>diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S<br/>index 7a2baf913aa0..7f7446f6f806 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/debug/8250.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/debug/8250.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/debug/8250.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/8250.S</a></div><div class='hunk'>@@ -16,11 +16,14 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_UART_8250_WORD</div><div class='ctx'> 		.macro	store, rd, rx:vararg</div><div class='add'>+	 ARM_BE8(rev \rd, \rd)</div><div class='ctx'> 		str	\rd, \rx</div><div class='add'>+	 ARM_BE8(rev \rd, \rd)</div><div class='ctx'> 		.endm</div><div class='ctx'> </div><div class='ctx'> 		.macro	load, rd, rx:vararg</div><div class='ctx'> 		ldr	\rd, \rx</div><div class='add'>+	ARM_BE8(rev \rd, \rd)</div><div class='ctx'> 		.endm</div><div class='ctx'> #else</div><div class='ctx'> 		.macro	store, rd, rx:vararg</div><div class='head'>diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S<br/>index 2265a199280c..660fa1e4b77b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/debug/efm32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/debug/efm32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/debug/efm32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/efm32.S</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #define	UARTn_TXDATA		0x0034</div><div class='ctx'> </div><div class='del'>-		.macro	addruart, rx, tmp</div><div class='add'>+		.macro	addruart, rx, tmp, tmp2</div><div class='ctx'> 		ldr	\rx, =(CONFIG_DEBUG_UART_PHYS)</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/arm/include/debug/imx-uart.h b/arch/arm/include/debug/imx-uart.h<br/>index 032a316eb802..66f736f74684 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/debug/imx-uart.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/debug/imx-uart.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/debug/imx-uart.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/imx-uart.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012-2015 Freescale Semiconductor, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -90,6 +90,16 @@</div><div class='ctx'> #define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR</div><div class='ctx'> #define IMX6SX_UART_BASE(n)	IMX6SX_UART_BASE_ADDR(n)</div><div class='ctx'> </div><div class='add'>+#define IMX7D_UART1_BASE_ADDR	0x30860000</div><div class='add'>+#define IMX7D_UART2_BASE_ADDR	0x30890000</div><div class='add'>+#define IMX7D_UART3_BASE_ADDR	0x30880000</div><div class='add'>+#define IMX7D_UART4_BASE_ADDR	0x30a60000</div><div class='add'>+#define IMX7D_UART5_BASE_ADDR	0x30a70000</div><div class='add'>+#define IMX7D_UART6_BASE_ADDR	0x30a80000</div><div class='add'>+#define IMX7D_UART7_BASE_ADDR	0x30a90000</div><div class='add'>+#define IMX7D_UART_BASE_ADDR(n) IMX7D_UART##n##_BASE_ADDR</div><div class='add'>+#define IMX7D_UART_BASE(n)	IMX7D_UART_BASE_ADDR(n)</div><div class='add'>+</div><div class='ctx'> #define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_IMX1_UART</div><div class='hunk'>@@ -114,6 +124,9 @@</div><div class='ctx'> #define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SL)</div><div class='ctx'> #elif defined(CONFIG_DEBUG_IMX6SX_UART)</div><div class='ctx'> #define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SX)</div><div class='add'>+#elif defined(CONFIG_DEBUG_IMX7D_UART)</div><div class='add'>+#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX7D)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __DEBUG_IMX_UART_H */</div><div class='head'>diff --git a/arch/arm/include/debug/pl01x.S b/arch/arm/include/debug/pl01x.S<br/>index 92ef808a2337..f7d8323cefcc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/debug/pl01x.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/include/debug/pl01x.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/debug/pl01x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/include/debug/pl01x.S</a></div><div class='hunk'>@@ -12,6 +12,13 @@</div><div class='ctx'> */</div><div class='ctx'> #include &lt;linux/amba/serial.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEBUG_ZTE_ZX</div><div class='add'>+#undef UART01x_DR</div><div class='add'>+#undef UART01x_FR</div><div class='add'>+#define UART01x_DR     0x04</div><div class='add'>+#define UART01x_FR     0x14</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DEBUG_UART_PHYS</div><div class='ctx'> 		.macro	addruart, rp, rv, tmp</div><div class='ctx'> 		ldr	\rp, =CONFIG_DEBUG_UART_PHYS</div><div class='head'>diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile<br/>index 752725dcbf42..e69f7a19735d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/Makefile</a></div><div class='hunk'>@@ -34,6 +34,7 @@ obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o</div><div class='ctx'> obj-$(CONFIG_ISA_DMA_API)	+= dma.o</div><div class='ctx'> obj-$(CONFIG_FIQ)		+= fiq.o fiqasm.o</div><div class='ctx'> obj-$(CONFIG_MODULES)		+= armksyms.o module.o</div><div class='add'>+obj-$(CONFIG_ARM_MODULE_PLTS)	+= module-plts.o</div><div class='ctx'> obj-$(CONFIG_ISA_DMA)		+= dma-isa.o</div><div class='ctx'> obj-$(CONFIG_PCI)		+= bios32.o isa.o</div><div class='ctx'> obj-$(CONFIG_ARM_CPU_SUSPEND)	+= sleep.o suspend.o</div><div class='hunk'>@@ -70,7 +71,9 @@ obj-$(CONFIG_CPU_PJ4)		+= pj4-cp0.o</div><div class='ctx'> obj-$(CONFIG_CPU_PJ4B)		+= pj4-cp0.o</div><div class='ctx'> obj-$(CONFIG_IWMMXT)		+= iwmmxt.o</div><div class='ctx'> obj-$(CONFIG_PERF_EVENTS)	+= perf_regs.o perf_callchain.o</div><div class='del'>-obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o perf_event_cpu.o</div><div class='add'>+obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o \</div><div class='add'>+				   perf_event_xscale.o perf_event_v6.o \</div><div class='add'>+				   perf_event_v7.o</div><div class='ctx'> CFLAGS_pj4-cp0.o		:= -marm</div><div class='ctx'> AFLAGS_iwmmxt.o			:= -Wa,-mcpu=iwmmxt</div><div class='ctx'> obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o</div><div class='head'>diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c<br/>index a88671cfe1ff..5e5a51a99e68 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/armksyms.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/armksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/armksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/armksyms.c</a></div><div class='hunk'>@@ -50,6 +50,9 @@ extern void __aeabi_ulcmp(void);</div><div class='ctx'> </div><div class='ctx'> extern void fpundefinstr(void);</div><div class='ctx'> </div><div class='add'>+void mmioset(void *, unsigned int, size_t);</div><div class='add'>+void mmiocpy(void *, const void *, size_t);</div><div class='add'>+</div><div class='ctx'> 	/* platform dependent support */</div><div class='ctx'> EXPORT_SYMBOL(arm_delay_ops);</div><div class='ctx'> </div><div class='hunk'>@@ -88,6 +91,9 @@ EXPORT_SYMBOL(memmove);</div><div class='ctx'> EXPORT_SYMBOL(memchr);</div><div class='ctx'> EXPORT_SYMBOL(__memzero);</div><div class='ctx'> </div><div class='add'>+EXPORT_SYMBOL(mmioset);</div><div class='add'>+EXPORT_SYMBOL(mmiocpy);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> EXPORT_SYMBOL(copy_page);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S<br/>index 78c91b5f97d4..ea9646cc2a0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/debug.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/debug.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/debug.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/debug.S</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_MMU */</div><div class='ctx'> 		.macro	addruart_current, rx, tmp1, tmp2</div><div class='del'>-		addruart	\rx, \tmp1</div><div class='add'>+		addruart	\rx, \tmp1, \tmp2</div><div class='ctx'> 		.endm</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_MMU */</div><div class='head'>diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S<br/>index 570306c49406..cb4fb1e69778 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-armv.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/entry-armv.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-armv.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-armv.S</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'>  *  that causes it to save wrong values...  Be aware!</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> #include &lt;asm/glue-df.h&gt;</div><div class='hunk'>@@ -40,7 +42,7 @@</div><div class='ctx'> #ifdef CONFIG_MULTI_IRQ_HANDLER</div><div class='ctx'> 	ldr	r1, =handle_arch_irq</div><div class='ctx'> 	mov	r0, sp</div><div class='del'>-	adr	lr, BSYM(9997f)</div><div class='add'>+	badr	lr, 9997f</div><div class='ctx'> 	ldr	pc, [r1]</div><div class='ctx'> #else</div><div class='ctx'> 	arch_irq_handler_default</div><div class='hunk'>@@ -273,7 +275,7 @@ __und_svc:</div><div class='ctx'> 	str	r4, [sp, #S_PC]</div><div class='ctx'> 	orr	r0, r9, r0, lsl #16</div><div class='ctx'> #endif</div><div class='del'>-	adr	r9, BSYM(__und_svc_finish)</div><div class='add'>+	badr	r9, __und_svc_finish</div><div class='ctx'> 	mov	r2, r4</div><div class='ctx'> 	bl	call_fpe</div><div class='ctx'> </div><div class='hunk'>@@ -408,7 +410,7 @@ ENDPROC(__fiq_abt)</div><div class='ctx'> 	zero_fp</div><div class='ctx'> </div><div class='ctx'> 	.if	\trace</div><div class='del'>-#ifdef CONFIG_IRQSOFF_TRACER</div><div class='add'>+#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='ctx'> 	bl	trace_hardirqs_off</div><div class='ctx'> #endif</div><div class='ctx'> 	ct_user_exit save = 0</div><div class='hunk'>@@ -469,7 +471,7 @@ __und_usr:</div><div class='ctx'> 	@ instruction, or the more conventional lr if we are to treat</div><div class='ctx'> 	@ this as a real undefined instruction</div><div class='ctx'> 	@</div><div class='del'>-	adr	r9, BSYM(ret_from_exception)</div><div class='add'>+	badr	r9, ret_from_exception</div><div class='ctx'> </div><div class='ctx'> 	@ IRQs must be enabled before attempting to read the instruction from</div><div class='ctx'> 	@ user space since that could cause a page/translation fault if the</div><div class='hunk'>@@ -486,7 +488,7 @@ __und_usr:</div><div class='ctx'> 	@ r2 = PC value for the following instruction (:= regs-&gt;ARM_pc)</div><div class='ctx'> 	@ r4 = PC value for the faulting instruction</div><div class='ctx'> 	@ lr = 32-bit undefined instruction function</div><div class='del'>-	adr	lr, BSYM(__und_usr_fault_32)</div><div class='add'>+	badr	lr, __und_usr_fault_32</div><div class='ctx'> 	b	call_fpe</div><div class='ctx'> </div><div class='ctx'> __und_usr_thumb:</div><div class='hunk'>@@ -522,7 +524,7 @@ ARM_BE8(rev16	r0, r0)				@ little endian instruction</div><div class='ctx'> 	add	r2, r2, #2			@ r2 is PC + 2, make it PC + 4</div><div class='ctx'> 	str	r2, [sp, #S_PC]			@ it's a 2x16bit instr, update</div><div class='ctx'> 	orr	r0, r0, r5, lsl #16</div><div class='del'>-	adr	lr, BSYM(__und_usr_fault_32)</div><div class='add'>+	badr	lr, __und_usr_fault_32</div><div class='ctx'> 	@ r0 = the two 16-bit Thumb instructions which caused the exception</div><div class='ctx'> 	@ r2 = PC value for the following Thumb instruction (:= regs-&gt;ARM_pc)</div><div class='ctx'> 	@ r4 = PC value for the first 16-bit Thumb instruction</div><div class='hunk'>@@ -716,7 +718,7 @@ __und_usr_fault_32:</div><div class='ctx'> __und_usr_fault_16:</div><div class='ctx'> 	mov	r1, #2</div><div class='ctx'> 1:	mov	r0, sp</div><div class='del'>-	adr	lr, BSYM(ret_from_exception)</div><div class='add'>+	badr	lr, ret_from_exception</div><div class='ctx'> 	b	__und_fault</div><div class='ctx'> ENDPROC(__und_usr_fault_32)</div><div class='ctx'> ENDPROC(__und_usr_fault_16)</div><div class='head'>diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S<br/>index 4e7f40c577e6..92828a1dec80 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-common.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/entry-common.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-common.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-common.S</a></div><div class='hunk'>@@ -90,7 +90,7 @@ ENTRY(ret_from_fork)</div><div class='ctx'> 	bl	schedule_tail</div><div class='ctx'> 	cmp	r5, #0</div><div class='ctx'> 	movne	r0, r4</div><div class='del'>-	adrne	lr, BSYM(1f)</div><div class='add'>+	badrne	lr, 1f</div><div class='ctx'> 	retne	r5</div><div class='ctx'> 1:	get_thread_info tsk</div><div class='ctx'> 	b	ret_slow_syscall</div><div class='hunk'>@@ -198,7 +198,7 @@ local_restart:</div><div class='ctx'> 	bne	__sys_trace</div><div class='ctx'> </div><div class='ctx'> 	cmp	scno, #NR_syscalls		@ check upper syscall limit</div><div class='del'>-	adr	lr, BSYM(ret_fast_syscall)	@ return address</div><div class='add'>+	badr	lr, ret_fast_syscall		@ return address</div><div class='ctx'> 	ldrcc	pc, [tbl, scno, lsl #2]		@ call sys_* routine</div><div class='ctx'> </div><div class='ctx'> 	add	r1, sp, #S_OFF</div><div class='hunk'>@@ -233,7 +233,7 @@ __sys_trace:</div><div class='ctx'> 	add	r0, sp, #S_OFF</div><div class='ctx'> 	bl	syscall_trace_enter</div><div class='ctx'> </div><div class='del'>-	adr	lr, BSYM(__sys_trace_return)	@ return address</div><div class='add'>+	badr	lr, __sys_trace_return		@ return address</div><div class='ctx'> 	mov	scno, r0			@ syscall number (possibly new)</div><div class='ctx'> 	add	r1, sp, #S_R0 + S_OFF		@ pointer to regs</div><div class='ctx'> 	cmp	scno, #NR_syscalls		@ check upper syscall limit</div><div class='head'>diff --git a/arch/arm/kernel/entry-ftrace.S b/arch/arm/kernel/entry-ftrace.S<br/>index fe57c73e70a4..c73c4030ca5d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-ftrace.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/entry-ftrace.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-ftrace.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-ftrace.S</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> </div><div class='ctx'> 1: 	mcount_get_lr	r1			@ lr of instrumented func</div><div class='ctx'> 	mcount_adjust_addr	r0, lr		@ instrumented function</div><div class='del'>-	adr	lr, BSYM(2f)</div><div class='add'>+	badr	lr, 2f</div><div class='ctx'> 	mov	pc, r2</div><div class='ctx'> 2:	mcount_exit</div><div class='ctx'> .endm</div><div class='head'>diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S<br/>index 8944f4991c3c..b6c8bb9315e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-v7m.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/entry-v7m.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-v7m.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/entry-v7m.S</a></div><div class='hunk'>@@ -117,9 +117,14 @@ ENTRY(__switch_to)</div><div class='ctx'> ENDPROC(__switch_to)</div><div class='ctx'> </div><div class='ctx'> 	.data</div><div class='del'>-	.align	8</div><div class='add'>+#if CONFIG_CPU_V7M_NUM_IRQ &lt;= 112</div><div class='add'>+	.align	9</div><div class='add'>+#else</div><div class='add'>+	.align	10</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * Vector table (64 words =&gt; 256 bytes natural alignment)</div><div class='add'>+ * Vector table (Natural alignment need to be ensured)</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(vector_table)</div><div class='ctx'> 	.long	0			@ 0 - Reset stack pointer</div><div class='hunk'>@@ -138,6 +143,6 @@ ENTRY(vector_table)</div><div class='ctx'> 	.long	__invalid_entry		@ 13 - Reserved</div><div class='ctx'> 	.long	__pendsv_entry		@ 14 - PendSV</div><div class='ctx'> 	.long	__invalid_entry		@ 15 - SysTick</div><div class='del'>-	.rept	64 - 16</div><div class='del'>-	.long	__irq_entry		@ 16..64 - External Interrupts</div><div class='add'>+	.rept	CONFIG_CPU_V7M_NUM_IRQ</div><div class='add'>+	.long	__irq_entry		@ External Interrupts</div><div class='ctx'> 	.endr</div><div class='head'>diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S<br/>index aebfbf79a1a3..9b8c5a113434 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/head-nommu.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/head-nommu.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/head-nommu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/head-nommu.S</a></div><div class='hunk'>@@ -46,7 +46,7 @@ ENTRY(stext)</div><div class='ctx'> 	.arm</div><div class='ctx'> ENTRY(stext)</div><div class='ctx'> </div><div class='del'>- THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is always entered in ARM.</div><div class='add'>+ THUMB(	badr	r9, 1f		)	@ Kernel is always entered in ARM.</div><div class='ctx'>  THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,</div><div class='ctx'>  THUMB(	.thumb			)	@ switch to Thumb now.</div><div class='ctx'>  THUMB(1:			)</div><div class='hunk'>@@ -77,13 +77,13 @@ ENTRY(stext)</div><div class='ctx'> 	orr	r6, r6, #(1 &lt;&lt; MPU_RSR_EN)	@ Set region enabled bit</div><div class='ctx'> 	bl	__setup_mpu</div><div class='ctx'> #endif</div><div class='del'>-	ldr	r13, =__mmap_switched		@ address to jump to after</div><div class='del'>-						@ initialising sctlr</div><div class='del'>-	adr	lr, BSYM(1f)			@ return (PIC) address</div><div class='add'>+</div><div class='add'>+	badr	lr, 1f				@ return (PIC) address</div><div class='ctx'> 	ldr	r12, [r10, #PROCINFO_INITFUNC]</div><div class='ctx'> 	add	r12, r12, r10</div><div class='ctx'> 	ret	r12</div><div class='del'>- 1:	b	__after_proc_init</div><div class='add'>+1:	bl	__after_proc_init</div><div class='add'>+	b	__mmap_switched</div><div class='ctx'> ENDPROC(stext)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -106,8 +106,7 @@ ENTRY(secondary_startup)</div><div class='ctx'> 	movs	r10, r5				@ invalid processor?</div><div class='ctx'> 	beq	__error_p			@ yes, error 'p'</div><div class='ctx'> </div><div class='del'>-	adr	r4, __secondary_data</div><div class='del'>-	ldmia	r4, {r7, r12}</div><div class='add'>+	ldr	r7, __secondary_data</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM_MPU</div><div class='ctx'> 	/* Use MPU region info supplied by __cpu_up */</div><div class='hunk'>@@ -115,23 +114,19 @@ ENTRY(secondary_startup)</div><div class='ctx'> 	bl      __setup_mpu			@ Initialize the MPU</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	adr	lr, BSYM(__after_proc_init)	@ return address</div><div class='del'>-	mov	r13, r12			@ __secondary_switched address</div><div class='add'>+	badr	lr, 1f				@ return (PIC) address</div><div class='ctx'> 	ldr	r12, [r10, #PROCINFO_INITFUNC]</div><div class='ctx'> 	add	r12, r12, r10</div><div class='ctx'> 	ret	r12</div><div class='del'>-ENDPROC(secondary_startup)</div><div class='del'>-</div><div class='del'>-ENTRY(__secondary_switched)</div><div class='del'>-	ldr	sp, [r7, #8]			@ set up the stack pointer</div><div class='add'>+1:	bl	__after_proc_init</div><div class='add'>+	ldr	sp, [r7, #12]			@ set up the stack pointer</div><div class='ctx'> 	mov	fp, #0</div><div class='ctx'> 	b	secondary_start_kernel</div><div class='del'>-ENDPROC(__secondary_switched)</div><div class='add'>+ENDPROC(secondary_startup)</div><div class='ctx'> </div><div class='ctx'> 	.type	__secondary_data, %object</div><div class='ctx'> __secondary_data:</div><div class='ctx'> 	.long	secondary_data</div><div class='del'>-	.long	__secondary_switched</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -164,7 +159,7 @@ __after_proc_init:</div><div class='ctx'> #endif</div><div class='ctx'> 	mcr	p15, 0, r0, c1, c0, 0		@ write control reg</div><div class='ctx'> #endif /* CONFIG_CPU_CP15 */</div><div class='del'>-	ret	r13</div><div class='add'>+	ret	lr</div><div class='ctx'> ENDPROC(__after_proc_init)</div><div class='ctx'> 	.ltorg</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S<br/>index 3637973a9708..bd755d97e459 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/head.S</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> ENTRY(stext)</div><div class='ctx'>  ARM_BE8(setend	be )			@ ensure we are in BE8 mode</div><div class='ctx'> </div><div class='del'>- THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is always entered in ARM.</div><div class='add'>+ THUMB(	badr	r9, 1f		)	@ Kernel is always entered in ARM.</div><div class='ctx'>  THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,</div><div class='ctx'>  THUMB(	.thumb			)	@ switch to Thumb now.</div><div class='ctx'>  THUMB(1:			)</div><div class='hunk'>@@ -131,13 +131,30 @@ ENTRY(stext)</div><div class='ctx'> 	 * The following calls CPU specific code in a position independent</div><div class='ctx'> 	 * manner.  See arch/arm/mm/proc-*.S for details.  r10 = base of</div><div class='ctx'> 	 * xxx_proc_info structure selected by __lookup_processor_type</div><div class='del'>-	 * above.  On return, the CPU will be ready for the MMU to be</div><div class='del'>-	 * turned on, and r0 will hold the CPU control register value.</div><div class='add'>+	 * above.</div><div class='add'>+	 *</div><div class='add'>+	 * The processor init function will be called with:</div><div class='add'>+	 *  r1 - machine type</div><div class='add'>+	 *  r2 - boot data (atags/dt) pointer</div><div class='add'>+	 *  r4 - translation table base (low word)</div><div class='add'>+	 *  r5 - translation table base (high word, if LPAE)</div><div class='add'>+	 *  r8 - translation table base 1 (pfn if LPAE)</div><div class='add'>+	 *  r9 - cpuid</div><div class='add'>+	 *  r13 - virtual address for __enable_mmu -&gt; __turn_mmu_on</div><div class='add'>+	 *</div><div class='add'>+	 * On return, the CPU will be ready for the MMU to be turned on,</div><div class='add'>+	 * r0 will hold the CPU control register value, r1, r2, r4, and</div><div class='add'>+	 * r9 will be preserved.  r5 will also be preserved if LPAE.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ldr	r13, =__mmap_switched		@ address to jump to after</div><div class='ctx'> 						@ mmu has been enabled</div><div class='del'>-	adr	lr, BSYM(1f)			@ return (PIC) address</div><div class='add'>+	badr	lr, 1f				@ return (PIC) address</div><div class='add'>+#ifdef CONFIG_ARM_LPAE</div><div class='add'>+	mov	r5, #0				@ high TTBR0</div><div class='add'>+	mov	r8, r4, lsr #12			@ TTBR1 is swapper_pg_dir pfn</div><div class='add'>+#else</div><div class='ctx'> 	mov	r8, r4				@ set TTBR1 to swapper_pg_dir</div><div class='add'>+#endif</div><div class='ctx'> 	ldr	r12, [r10, #PROCINFO_INITFUNC]</div><div class='ctx'> 	add	r12, r12, r10</div><div class='ctx'> 	ret	r12</div><div class='hunk'>@@ -158,7 +175,7 @@ ENDPROC(stext)</div><div class='ctx'>  *</div><div class='ctx'>  * Returns:</div><div class='ctx'>  *  r0, r3, r5-r7 corrupted</div><div class='del'>- *  r4 = page table (see ARCH_PGD_SHIFT in asm/memory.h)</div><div class='add'>+ *  r4 = physical page table address</div><div class='ctx'>  */</div><div class='ctx'> __create_page_tables:</div><div class='ctx'> 	pgtbl	r4, r8				@ page table address</div><div class='hunk'>@@ -333,7 +350,6 @@ __create_page_tables:</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='ctx'> 	sub	r4, r4, #0x1000		@ point to the PGD table</div><div class='del'>-	mov	r4, r4, lsr #ARCH_PGD_SHIFT</div><div class='ctx'> #endif</div><div class='ctx'> 	ret	lr</div><div class='ctx'> ENDPROC(__create_page_tables)</div><div class='hunk'>@@ -346,9 +362,9 @@ __turn_mmu_on_loc:</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_SMP)</div><div class='ctx'> 	.text</div><div class='del'>-ENTRY(secondary_startup_arm)</div><div class='ctx'> 	.arm</div><div class='del'>- THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is entered in ARM.</div><div class='add'>+ENTRY(secondary_startup_arm)</div><div class='add'>+ THUMB(	badr	r9, 1f		)	@ Kernel is entered in ARM.</div><div class='ctx'>  THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,</div><div class='ctx'>  THUMB(	.thumb			)	@ switch to Thumb now.</div><div class='ctx'>  THUMB(1:			)</div><div class='hunk'>@@ -381,10 +397,10 @@ ENTRY(secondary_startup)</div><div class='ctx'> 	adr	r4, __secondary_data</div><div class='ctx'> 	ldmia	r4, {r5, r7, r12}		@ address to jump to after</div><div class='ctx'> 	sub	lr, r4, r5			@ mmu has been enabled</div><div class='del'>-	ldr	r4, [r7, lr]			@ get secondary_data.pgdir</div><div class='del'>-	add	r7, r7, #4</div><div class='del'>-	ldr	r8, [r7, lr]			@ get secondary_data.swapper_pg_dir</div><div class='del'>-	adr	lr, BSYM(__enable_mmu)		@ return address</div><div class='add'>+	add	r3, r7, lr</div><div class='add'>+	ldrd	r4, [r3, #0]			@ get secondary_data.pgdir</div><div class='add'>+	ldr	r8, [r3, #8]			@ get secondary_data.swapper_pg_dir</div><div class='add'>+	badr	lr, __enable_mmu		@ return address</div><div class='ctx'> 	mov	r13, r12			@ __secondary_switched address</div><div class='ctx'> 	ldr	r12, [r10, #PROCINFO_INITFUNC]</div><div class='ctx'> 	add	r12, r12, r10			@ initialise processor</div><div class='hunk'>@@ -397,7 +413,7 @@ ENDPROC(secondary_startup_arm)</div><div class='ctx'> 	 * r6  = &amp;secondary_data</div><div class='ctx'> 	 */</div><div class='ctx'> ENTRY(__secondary_switched)</div><div class='del'>-	ldr	sp, [r7, #4]			@ get secondary_data.stack</div><div class='add'>+	ldr	sp, [r7, #12]			@ get secondary_data.stack</div><div class='ctx'> 	mov	fp, #0</div><div class='ctx'> 	b	secondary_start_kernel</div><div class='ctx'> ENDPROC(__secondary_switched)</div><div class='hunk'>@@ -416,12 +432,14 @@ __secondary_data:</div><div class='ctx'> /*</div><div class='ctx'>  * Setup common bits before finally enabling the MMU.  Essentially</div><div class='ctx'>  * this is just loading the page table pointer and domain access</div><div class='del'>- * registers.</div><div class='add'>+ * registers.  All these registers need to be preserved by the</div><div class='add'>+ * processor setup function (or set in the case of r0)</div><div class='ctx'>  *</div><div class='ctx'>  *  r0  = cp#15 control register</div><div class='ctx'>  *  r1  = machine ID</div><div class='ctx'>  *  r2  = atags or dtb pointer</div><div class='del'>- *  r4  = page table (see ARCH_PGD_SHIFT in asm/memory.h)</div><div class='add'>+ *  r4  = TTBR pointer (low word)</div><div class='add'>+ *  r5  = TTBR pointer (high word if LPAE)</div><div class='ctx'>  *  r9  = processor ID</div><div class='ctx'>  *  r13 = *virtual* address to jump to upon completion</div><div class='ctx'>  */</div><div class='hunk'>@@ -440,7 +458,9 @@ __enable_mmu:</div><div class='ctx'> #ifdef CONFIG_CPU_ICACHE_DISABLE</div><div class='ctx'> 	bic	r0, r0, #CR_I</div><div class='ctx'> #endif</div><div class='del'>-#ifndef CONFIG_ARM_LPAE</div><div class='add'>+#ifdef CONFIG_ARM_LPAE</div><div class='add'>+	mcrr	p15, 0, r4, r5, c2		@ load TTBR0</div><div class='add'>+#else</div><div class='ctx'> 	mov	r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \</div><div class='ctx'> 		      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \</div><div class='ctx'> 		      domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \</div><div class='head'>diff --git a/arch/arm/kernel/module-plts.c b/arch/arm/kernel/module-plts.c<br/>new file mode 100644<br/>index 000000000000..097e2e201b9f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/module-plts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module-plts.c</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/elf.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cache.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='add'>+</div><div class='add'>+#define PLT_ENT_STRIDE		L1_CACHE_BYTES</div><div class='add'>+#define PLT_ENT_COUNT		(PLT_ENT_STRIDE / sizeof(u32))</div><div class='add'>+#define PLT_ENT_SIZE		(sizeof(struct plt_entries) / PLT_ENT_COUNT)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_THUMB2_KERNEL</div><div class='add'>+#define PLT_ENT_LDR		__opcode_to_mem_thumb32(0xf8dff000 | \</div><div class='add'>+							(PLT_ENT_STRIDE - 4))</div><div class='add'>+#else</div><div class='add'>+#define PLT_ENT_LDR		__opcode_to_mem_arm(0xe59ff000 | \</div><div class='add'>+						    (PLT_ENT_STRIDE - 8))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct plt_entries {</div><div class='add'>+	u32	ldr[PLT_ENT_COUNT];</div><div class='add'>+	u32	lit[PLT_ENT_COUNT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool in_init(const struct module *mod, u32 addr)</div><div class='add'>+{</div><div class='add'>+	return addr - (u32)mod-&gt;module_init &lt; mod-&gt;init_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val)</div><div class='add'>+{</div><div class='add'>+	struct plt_entries *plt, *plt_end;</div><div class='add'>+	int c, *count;</div><div class='add'>+</div><div class='add'>+	if (in_init(mod, loc)) {</div><div class='add'>+		plt = (void *)mod-&gt;arch.init_plt-&gt;sh_addr;</div><div class='add'>+		plt_end = (void *)plt + mod-&gt;arch.init_plt-&gt;sh_size;</div><div class='add'>+		count = &amp;mod-&gt;arch.init_plt_count;</div><div class='add'>+	} else {</div><div class='add'>+		plt = (void *)mod-&gt;arch.core_plt-&gt;sh_addr;</div><div class='add'>+		plt_end = (void *)plt + mod-&gt;arch.core_plt-&gt;sh_size;</div><div class='add'>+		count = &amp;mod-&gt;arch.core_plt_count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Look for an existing entry pointing to 'val' */</div><div class='add'>+	for (c = *count; plt &lt; plt_end; c -= PLT_ENT_COUNT, plt++) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		if (!c) {</div><div class='add'>+			/* Populate a new set of entries */</div><div class='add'>+			*plt = (struct plt_entries){</div><div class='add'>+				{ [0 ... PLT_ENT_COUNT - 1] = PLT_ENT_LDR, },</div><div class='add'>+				{ val, }</div><div class='add'>+			};</div><div class='add'>+			++*count;</div><div class='add'>+			return (u32)plt-&gt;ldr;</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; PLT_ENT_COUNT; i++) {</div><div class='add'>+			if (!plt-&gt;lit[i]) {</div><div class='add'>+				plt-&gt;lit[i] = val;</div><div class='add'>+				++*count;</div><div class='add'>+			}</div><div class='add'>+			if (plt-&gt;lit[i] == val)</div><div class='add'>+				return (u32)&amp;plt-&gt;ldr[i];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	BUG();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int duplicate_rel(Elf32_Addr base, const Elf32_Rel *rel, int num,</div><div class='add'>+			   u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 *loc1, *loc2;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num; i++) {</div><div class='add'>+		if (rel[i].r_info != rel[num].r_info)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Identical relocation types against identical symbols can</div><div class='add'>+		 * still result in different PLT entries if the addend in the</div><div class='add'>+		 * place is different. So resolve the target of the relocation</div><div class='add'>+		 * to compare the values.</div><div class='add'>+		 */</div><div class='add'>+		loc1 = (u32 *)(base + rel[i].r_offset);</div><div class='add'>+		loc2 = (u32 *)(base + rel[num].r_offset);</div><div class='add'>+		if (((*loc1 ^ *loc2) &amp; mask) == 0)</div><div class='add'>+			return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Count how many PLT entries we may need */</div><div class='add'>+static unsigned int count_plts(Elf32_Addr base, const Elf32_Rel *rel, int num)</div><div class='add'>+{</div><div class='add'>+	unsigned int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sure, this is order(n^2), but it's usually short, and not</div><div class='add'>+	 * time critical</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; num; i++)</div><div class='add'>+		switch (ELF32_R_TYPE(rel[i].r_info)) {</div><div class='add'>+		case R_ARM_CALL:</div><div class='add'>+		case R_ARM_PC24:</div><div class='add'>+		case R_ARM_JUMP24:</div><div class='add'>+			if (!duplicate_rel(base, rel, i,</div><div class='add'>+					   __opcode_to_mem_arm(0x00ffffff)))</div><div class='add'>+				ret++;</div><div class='add'>+			break;</div><div class='add'>+#ifdef CONFIG_THUMB2_KERNEL</div><div class='add'>+		case R_ARM_THM_CALL:</div><div class='add'>+		case R_ARM_THM_JUMP24:</div><div class='add'>+			if (!duplicate_rel(base, rel, i,</div><div class='add'>+					   __opcode_to_mem_thumb32(0x07ff2fff)))</div><div class='add'>+				ret++;</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,</div><div class='add'>+			      char *secstrings, struct module *mod)</div><div class='add'>+{</div><div class='add'>+	unsigned long core_plts = 0, init_plts = 0;</div><div class='add'>+	Elf32_Shdr *s, *sechdrs_end = sechdrs + ehdr-&gt;e_shnum;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To store the PLTs, we expand the .text section for core module code</div><div class='add'>+	 * and the .init.text section for initialization code.</div><div class='add'>+	 */</div><div class='add'>+	for (s = sechdrs; s &lt; sechdrs_end; ++s)</div><div class='add'>+		if (strcmp(".core.plt", secstrings + s-&gt;sh_name) == 0)</div><div class='add'>+			mod-&gt;arch.core_plt = s;</div><div class='add'>+		else if (strcmp(".init.plt", secstrings + s-&gt;sh_name) == 0)</div><div class='add'>+			mod-&gt;arch.init_plt = s;</div><div class='add'>+</div><div class='add'>+	if (!mod-&gt;arch.core_plt || !mod-&gt;arch.init_plt) {</div><div class='add'>+		pr_err("%s: sections missing\n", mod-&gt;name);</div><div class='add'>+		return -ENOEXEC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (s = sechdrs + 1; s &lt; sechdrs_end; ++s) {</div><div class='add'>+		const Elf32_Rel *rels = (void *)ehdr + s-&gt;sh_offset;</div><div class='add'>+		int numrels = s-&gt;sh_size / sizeof(Elf32_Rel);</div><div class='add'>+		Elf32_Shdr *dstsec = sechdrs + s-&gt;sh_info;</div><div class='add'>+</div><div class='add'>+		if (s-&gt;sh_type != SHT_REL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (strstr(secstrings + s-&gt;sh_name, ".init"))</div><div class='add'>+			init_plts += count_plts(dstsec-&gt;sh_addr, rels, numrels);</div><div class='add'>+		else</div><div class='add'>+			core_plts += count_plts(dstsec-&gt;sh_addr, rels, numrels);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mod-&gt;arch.core_plt-&gt;sh_type = SHT_NOBITS;</div><div class='add'>+	mod-&gt;arch.core_plt-&gt;sh_flags = SHF_EXECINSTR | SHF_ALLOC;</div><div class='add'>+	mod-&gt;arch.core_plt-&gt;sh_addralign = L1_CACHE_BYTES;</div><div class='add'>+	mod-&gt;arch.core_plt-&gt;sh_size = round_up(core_plts * PLT_ENT_SIZE,</div><div class='add'>+					       sizeof(struct plt_entries));</div><div class='add'>+	mod-&gt;arch.core_plt_count = 0;</div><div class='add'>+</div><div class='add'>+	mod-&gt;arch.init_plt-&gt;sh_type = SHT_NOBITS;</div><div class='add'>+	mod-&gt;arch.init_plt-&gt;sh_flags = SHF_EXECINSTR | SHF_ALLOC;</div><div class='add'>+	mod-&gt;arch.init_plt-&gt;sh_addralign = L1_CACHE_BYTES;</div><div class='add'>+	mod-&gt;arch.init_plt-&gt;sh_size = round_up(init_plts * PLT_ENT_SIZE,</div><div class='add'>+					       sizeof(struct plt_entries));</div><div class='add'>+	mod-&gt;arch.init_plt_count = 0;</div><div class='add'>+	pr_debug("%s: core.plt=%x, init.plt=%x\n", __func__,</div><div class='add'>+		 mod-&gt;arch.core_plt-&gt;sh_size, mod-&gt;arch.init_plt-&gt;sh_size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c<br/>index af791f4a6205..efdddcb97dd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/module.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/module.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module.c</a></div><div class='hunk'>@@ -40,7 +40,12 @@</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> void *module_alloc(unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,</div><div class='add'>+	void *p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,</div><div class='add'>+				GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,</div><div class='add'>+				__builtin_return_address(0));</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p)</div><div class='add'>+		return p;</div><div class='add'>+	return __vmalloc_node_range(size, 1,  VMALLOC_START, VMALLOC_END,</div><div class='ctx'> 				GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,</div><div class='ctx'> 				__builtin_return_address(0));</div><div class='ctx'> }</div><div class='hunk'>@@ -110,6 +115,20 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,</div><div class='ctx'> 				offset -= 0x04000000;</div><div class='ctx'> </div><div class='ctx'> 			offset += sym-&gt;st_value - loc;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Route through a PLT entry if 'offset' exceeds the</div><div class='add'>+			 * supported range. Note that 'offset + loc + 8'</div><div class='add'>+			 * contains the absolute jump target, i.e.,</div><div class='add'>+			 * @sym + addend, corrected for the +8 PC bias.</div><div class='add'>+			 */</div><div class='add'>+			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &amp;&amp;</div><div class='add'>+			    (offset &lt;= (s32)0xfe000000 ||</div><div class='add'>+			     offset &gt;= (s32)0x02000000))</div><div class='add'>+				offset = get_module_plt(module, loc,</div><div class='add'>+							offset + loc + 8)</div><div class='add'>+					 - loc - 8;</div><div class='add'>+</div><div class='ctx'> 			if (offset &lt;= (s32)0xfe000000 ||</div><div class='ctx'> 			    offset &gt;= (s32)0x02000000) {</div><div class='ctx'> 				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -&gt; %#x)\n",</div><div class='hunk'>@@ -203,6 +222,17 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,</div><div class='ctx'> 				offset -= 0x02000000;</div><div class='ctx'> 			offset += sym-&gt;st_value - loc;</div><div class='ctx'> </div><div class='add'>+			/*</div><div class='add'>+			 * Route through a PLT entry if 'offset' exceeds the</div><div class='add'>+			 * supported range.</div><div class='add'>+			 */</div><div class='add'>+			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &amp;&amp;</div><div class='add'>+			    (offset &lt;= (s32)0xff000000 ||</div><div class='add'>+			     offset &gt;= (s32)0x01000000))</div><div class='add'>+				offset = get_module_plt(module, loc,</div><div class='add'>+							offset + loc + 4)</div><div class='add'>+					 - loc - 4;</div><div class='add'>+</div><div class='ctx'> 			if (offset &lt;= (s32)0xff000000 ||</div><div class='ctx'> 			    offset &gt;= (s32)0x01000000) {</div><div class='ctx'> 				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -&gt; %#x)\n",</div><div class='head'>diff --git a/arch/arm/kernel/module.lds b/arch/arm/kernel/module.lds<br/>new file mode 100644<br/>index 000000000000..3682fa107918<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/module.lds?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/module.lds</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+SECTIONS {</div><div class='add'>+        .core.plt : { BYTE(0) }</div><div class='add'>+        .init.plt : { BYTE(0) }</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c<br/>index 4a86a0133ac3..54272e0be713 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event.c</a></div><div class='hunk'>@@ -11,12 +11,18 @@</div><div class='ctx'>  */</div><div class='ctx'> #define pr_fmt(fmt) "hw perfevents: " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqdesc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='ctx'> #include &lt;asm/pmu.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -229,6 +235,10 @@ armpmu_add(struct perf_event *event, int flags)</div><div class='ctx'> 	int idx;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='add'>+	/* An event following a process won't be stopped earlier */</div><div class='add'>+	if (!cpumask_test_cpu(smp_processor_id(), &amp;armpmu-&gt;supported_cpus))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='ctx'> 	perf_pmu_disable(event-&gt;pmu);</div><div class='ctx'> </div><div class='ctx'> 	/* If we don't have a space for the counter then finish early. */</div><div class='hunk'>@@ -344,20 +354,12 @@ static void</div><div class='ctx'> armpmu_release_hardware(struct arm_pmu *armpmu)</div><div class='ctx'> {</div><div class='ctx'> 	armpmu-&gt;free_irq(armpmu);</div><div class='del'>-	pm_runtime_put_sync(&amp;armpmu-&gt;plat_device-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> armpmu_reserve_hardware(struct arm_pmu *armpmu)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-	struct platform_device *pmu_device = armpmu-&gt;plat_device;</div><div class='del'>-</div><div class='del'>-	if (!pmu_device)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pm_runtime_get_sync(&amp;pmu_device-&gt;dev);</div><div class='del'>-	err = armpmu-&gt;request_irq(armpmu, armpmu_dispatch_irq);</div><div class='add'>+	int err = armpmu-&gt;request_irq(armpmu, armpmu_dispatch_irq);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		armpmu_release_hardware(armpmu);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -454,6 +456,17 @@ static int armpmu_event_init(struct perf_event *event)</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	atomic_t *active_events = &amp;armpmu-&gt;active_events;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Reject CPU-affine events for CPUs that are of a different class to</div><div class='add'>+	 * that which this PMU handles. Process-following events (where</div><div class='add'>+	 * event-&gt;cpu == -1) can be migrated between CPUs, and thus we have to</div><div class='add'>+	 * reject them later (in armpmu_add) if they're scheduled on a</div><div class='add'>+	 * different class of CPU.</div><div class='add'>+	 */</div><div class='add'>+	if (event-&gt;cpu != -1 &amp;&amp;</div><div class='add'>+		!cpumask_test_cpu(event-&gt;cpu, &amp;armpmu-&gt;supported_cpus))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='ctx'> 	/* does not support taken branch sampling */</div><div class='ctx'> 	if (has_branch_stack(event))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -489,6 +502,10 @@ static void armpmu_enable(struct pmu *pmu)</div><div class='ctx'> 	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu-&gt;hw_events);</div><div class='ctx'> 	int enabled = bitmap_weight(hw_events-&gt;used_mask, armpmu-&gt;num_events);</div><div class='ctx'> </div><div class='add'>+	/* For task-bound events we may be called on other CPUs */</div><div class='add'>+	if (!cpumask_test_cpu(smp_processor_id(), &amp;armpmu-&gt;supported_cpus))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (enabled)</div><div class='ctx'> 		armpmu-&gt;start(armpmu);</div><div class='ctx'> }</div><div class='hunk'>@@ -496,34 +513,25 @@ static void armpmu_enable(struct pmu *pmu)</div><div class='ctx'> static void armpmu_disable(struct pmu *pmu)</div><div class='ctx'> {</div><div class='ctx'> 	struct arm_pmu *armpmu = to_arm_pmu(pmu);</div><div class='del'>-	armpmu-&gt;stop(armpmu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int armpmu_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct arm_pmu_platdata *plat = dev_get_platdata(dev);</div><div class='ctx'> </div><div class='del'>-	if (plat &amp;&amp; plat-&gt;runtime_resume)</div><div class='del'>-		return plat-&gt;runtime_resume(dev);</div><div class='add'>+	/* For task-bound events we may be called on other CPUs */</div><div class='add'>+	if (!cpumask_test_cpu(smp_processor_id(), &amp;armpmu-&gt;supported_cpus))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	armpmu-&gt;stop(armpmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int armpmu_runtime_suspend(struct device *dev)</div><div class='add'>+/*</div><div class='add'>+ * In heterogeneous systems, events are specific to a particular</div><div class='add'>+ * microarchitecture, and aren't suitable for another. Thus, only match CPUs of</div><div class='add'>+ * the same microarchitecture.</div><div class='add'>+ */</div><div class='add'>+static int armpmu_filter_match(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	struct arm_pmu_platdata *plat = dev_get_platdata(dev);</div><div class='del'>-</div><div class='del'>-	if (plat &amp;&amp; plat-&gt;runtime_suspend)</div><div class='del'>-		return plat-&gt;runtime_suspend(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	struct arm_pmu *armpmu = to_arm_pmu(event-&gt;pmu);</div><div class='add'>+	unsigned int cpu = smp_processor_id();</div><div class='add'>+	return cpumask_test_cpu(cpu, &amp;armpmu-&gt;supported_cpus);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-const struct dev_pm_ops armpmu_dev_pm_ops = {</div><div class='del'>-	SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> static void armpmu_init(struct arm_pmu *armpmu)</div><div class='ctx'> {</div><div class='hunk'>@@ -539,15 +547,350 @@ static void armpmu_init(struct arm_pmu *armpmu)</div><div class='ctx'> 		.start		= armpmu_start,</div><div class='ctx'> 		.stop		= armpmu_stop,</div><div class='ctx'> 		.read		= armpmu_read,</div><div class='add'>+		.filter_match	= armpmu_filter_match,</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int armpmu_register(struct arm_pmu *armpmu, int type)</div><div class='ctx'> {</div><div class='ctx'> 	armpmu_init(armpmu);</div><div class='del'>-	pm_runtime_enable(&amp;armpmu-&gt;plat_device-&gt;dev);</div><div class='ctx'> 	pr_info("enabled with %s PMU driver, %d counters available\n",</div><div class='ctx'> 			armpmu-&gt;name, armpmu-&gt;num_events);</div><div class='ctx'> 	return perf_pmu_register(&amp;armpmu-&gt;pmu, armpmu-&gt;name, type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Set at runtime when we know what CPU type we are. */</div><div class='add'>+static struct arm_pmu *__oprofile_cpu_pmu;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Despite the names, these two functions are CPU-specific and are used</div><div class='add'>+ * by the OProfile/perf code.</div><div class='add'>+ */</div><div class='add'>+const char *perf_pmu_name(void)</div><div class='add'>+{</div><div class='add'>+	if (!__oprofile_cpu_pmu)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return __oprofile_cpu_pmu-&gt;name;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(perf_pmu_name);</div><div class='add'>+</div><div class='add'>+int perf_num_counters(void)</div><div class='add'>+{</div><div class='add'>+	int max_events = 0;</div><div class='add'>+</div><div class='add'>+	if (__oprofile_cpu_pmu != NULL)</div><div class='add'>+		max_events = __oprofile_cpu_pmu-&gt;num_events;</div><div class='add'>+</div><div class='add'>+	return max_events;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(perf_num_counters);</div><div class='add'>+</div><div class='add'>+static void cpu_pmu_enable_percpu_irq(void *data)</div><div class='add'>+{</div><div class='add'>+	int irq = *(int *)data;</div><div class='add'>+</div><div class='add'>+	enable_percpu_irq(irq, IRQ_TYPE_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_pmu_disable_percpu_irq(void *data)</div><div class='add'>+{</div><div class='add'>+	int irq = *(int *)data;</div><div class='add'>+</div><div class='add'>+	disable_percpu_irq(irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)</div><div class='add'>+{</div><div class='add'>+	int i, irq, irqs;</div><div class='add'>+	struct platform_device *pmu_device = cpu_pmu-&gt;plat_device;</div><div class='add'>+	struct pmu_hw_events __percpu *hw_events = cpu_pmu-&gt;hw_events;</div><div class='add'>+</div><div class='add'>+	irqs = min(pmu_device-&gt;num_resources, num_possible_cpus());</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pmu_device, 0);</div><div class='add'>+	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq)) {</div><div class='add'>+		on_each_cpu(cpu_pmu_disable_percpu_irq, &amp;irq, 1);</div><div class='add'>+		free_percpu_irq(irq, &amp;hw_events-&gt;percpu_pmu);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; irqs; ++i) {</div><div class='add'>+			int cpu = i;</div><div class='add'>+</div><div class='add'>+			if (cpu_pmu-&gt;irq_affinity)</div><div class='add'>+				cpu = cpu_pmu-&gt;irq_affinity[i];</div><div class='add'>+</div><div class='add'>+			if (!cpumask_test_and_clear_cpu(cpu, &amp;cpu_pmu-&gt;active_irqs))</div><div class='add'>+				continue;</div><div class='add'>+			irq = platform_get_irq(pmu_device, i);</div><div class='add'>+			if (irq &gt;= 0)</div><div class='add'>+				free_irq(irq, per_cpu_ptr(&amp;hw_events-&gt;percpu_pmu, cpu));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)</div><div class='add'>+{</div><div class='add'>+	int i, err, irq, irqs;</div><div class='add'>+	struct platform_device *pmu_device = cpu_pmu-&gt;plat_device;</div><div class='add'>+	struct pmu_hw_events __percpu *hw_events = cpu_pmu-&gt;hw_events;</div><div class='add'>+</div><div class='add'>+	if (!pmu_device)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	irqs = min(pmu_device-&gt;num_resources, num_possible_cpus());</div><div class='add'>+	if (irqs &lt; 1) {</div><div class='add'>+		pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pmu_device, 0);</div><div class='add'>+	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq)) {</div><div class='add'>+		err = request_percpu_irq(irq, handler, "arm-pmu",</div><div class='add'>+					 &amp;hw_events-&gt;percpu_pmu);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_err("unable to request IRQ%d for ARM PMU counters\n",</div><div class='add'>+				irq);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		on_each_cpu(cpu_pmu_enable_percpu_irq, &amp;irq, 1);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; irqs; ++i) {</div><div class='add'>+			int cpu = i;</div><div class='add'>+</div><div class='add'>+			err = 0;</div><div class='add'>+			irq = platform_get_irq(pmu_device, i);</div><div class='add'>+			if (irq &lt; 0)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (cpu_pmu-&gt;irq_affinity)</div><div class='add'>+				cpu = cpu_pmu-&gt;irq_affinity[i];</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * If we have a single PMU interrupt that we can't shift,</div><div class='add'>+			 * assume that we're running on a uniprocessor machine and</div><div class='add'>+			 * continue. Otherwise, continue without this interrupt.</div><div class='add'>+			 */</div><div class='add'>+			if (irq_set_affinity(irq, cpumask_of(cpu)) &amp;&amp; irqs &gt; 1) {</div><div class='add'>+				pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",</div><div class='add'>+					irq, cpu);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			err = request_irq(irq, handler,</div><div class='add'>+					  IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",</div><div class='add'>+					  per_cpu_ptr(&amp;hw_events-&gt;percpu_pmu, cpu));</div><div class='add'>+			if (err) {</div><div class='add'>+				pr_err("unable to request IRQ%d for ARM PMU counters\n",</div><div class='add'>+					irq);</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			cpumask_set_cpu(cpu, &amp;cpu_pmu-&gt;active_irqs);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * PMU hardware loses all context when a CPU goes offline.</div><div class='add'>+ * When a CPU is hotplugged back in, since some hardware registers are</div><div class='add'>+ * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading</div><div class='add'>+ * junk values out of them.</div><div class='add'>+ */</div><div class='add'>+static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,</div><div class='add'>+			  void *hcpu)</div><div class='add'>+{</div><div class='add'>+	int cpu = (unsigned long)hcpu;</div><div class='add'>+	struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);</div><div class='add'>+</div><div class='add'>+	if ((action &amp; ~CPU_TASKS_FROZEN) != CPU_STARTING)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	if (!cpumask_test_cpu(cpu, &amp;pmu-&gt;supported_cpus))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	if (pmu-&gt;reset)</div><div class='add'>+		pmu-&gt;reset(pmu);</div><div class='add'>+	else</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpu_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	int cpu;</div><div class='add'>+	struct pmu_hw_events __percpu *cpu_hw_events;</div><div class='add'>+</div><div class='add'>+	cpu_hw_events = alloc_percpu(struct pmu_hw_events);</div><div class='add'>+	if (!cpu_hw_events)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cpu_pmu-&gt;hotplug_nb.notifier_call = cpu_pmu_notify;</div><div class='add'>+	err = register_cpu_notifier(&amp;cpu_pmu-&gt;hotplug_nb);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_hw_events;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);</div><div class='add'>+		raw_spin_lock_init(&amp;events-&gt;pmu_lock);</div><div class='add'>+		events-&gt;percpu_pmu = cpu_pmu;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_pmu-&gt;hw_events	= cpu_hw_events;</div><div class='add'>+	cpu_pmu-&gt;request_irq	= cpu_pmu_request_irq;</div><div class='add'>+	cpu_pmu-&gt;free_irq	= cpu_pmu_free_irq;</div><div class='add'>+</div><div class='add'>+	/* Ensure the PMU has sane values out of reset. */</div><div class='add'>+	if (cpu_pmu-&gt;reset)</div><div class='add'>+		on_each_cpu_mask(&amp;cpu_pmu-&gt;supported_cpus, cpu_pmu-&gt;reset,</div><div class='add'>+			 cpu_pmu, 1);</div><div class='add'>+</div><div class='add'>+	/* If no interrupts available, set the corresponding capability flag */</div><div class='add'>+	if (!platform_get_irq(cpu_pmu-&gt;plat_device, 0))</div><div class='add'>+		cpu_pmu-&gt;pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_hw_events:</div><div class='add'>+	free_percpu(cpu_hw_events);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)</div><div class='add'>+{</div><div class='add'>+	unregister_cpu_notifier(&amp;cpu_pmu-&gt;hotplug_nb);</div><div class='add'>+	free_percpu(cpu_pmu-&gt;hw_events);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CPU PMU identification and probing.</div><div class='add'>+ */</div><div class='add'>+static int probe_current_pmu(struct arm_pmu *pmu,</div><div class='add'>+			     const struct pmu_probe_info *info)</div><div class='add'>+{</div><div class='add'>+	int cpu = get_cpu();</div><div class='add'>+	unsigned int cpuid = read_cpuid_id();</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	pr_info("probing PMU on CPU %d\n", cpu);</div><div class='add'>+</div><div class='add'>+	for (; info-&gt;init != NULL; info++) {</div><div class='add'>+		if ((cpuid &amp; info-&gt;mask) != info-&gt;cpuid)</div><div class='add'>+			continue;</div><div class='add'>+		ret = info-&gt;init(pmu);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	put_cpu();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int of_pmu_irq_cfg(struct arm_pmu *pmu)</div><div class='add'>+{</div><div class='add'>+	int i, irq, *irqs;</div><div class='add'>+	struct platform_device *pdev = pmu-&gt;plat_device;</div><div class='add'>+</div><div class='add'>+	/* Don't bother with PPIs; they're already affine */</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	irqs = kcalloc(pdev-&gt;num_resources, sizeof(*irqs), GFP_KERNEL);</div><div class='add'>+	if (!irqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdev-&gt;num_resources; ++i) {</div><div class='add'>+		struct device_node *dn;</div><div class='add'>+		int cpu;</div><div class='add'>+</div><div class='add'>+		dn = of_parse_phandle(pdev-&gt;dev.of_node, "interrupt-affinity",</div><div class='add'>+				      i);</div><div class='add'>+		if (!dn) {</div><div class='add'>+			pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",</div><div class='add'>+				of_node_full_name(pdev-&gt;dev.of_node), i);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for_each_possible_cpu(cpu)</div><div class='add'>+			if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+		if (cpu &gt;= nr_cpu_ids) {</div><div class='add'>+			pr_warn("Failed to find logical CPU for %s\n",</div><div class='add'>+				dn-&gt;name);</div><div class='add'>+			of_node_put(dn);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		of_node_put(dn);</div><div class='add'>+</div><div class='add'>+		irqs[i] = cpu;</div><div class='add'>+		cpumask_set_cpu(cpu, &amp;pmu-&gt;supported_cpus);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == pdev-&gt;num_resources) {</div><div class='add'>+		pmu-&gt;irq_affinity = irqs;</div><div class='add'>+	} else {</div><div class='add'>+		kfree(irqs);</div><div class='add'>+		cpumask_setall(&amp;pmu-&gt;supported_cpus);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arm_pmu_device_probe(struct platform_device *pdev,</div><div class='add'>+			 const struct of_device_id *of_table,</div><div class='add'>+			 const struct pmu_probe_info *probe_table)</div><div class='add'>+{</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	const int (*init_fn)(struct arm_pmu *);</div><div class='add'>+	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='add'>+	struct arm_pmu *pmu;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);</div><div class='add'>+	if (!pmu) {</div><div class='add'>+		pr_info("failed to allocate PMU device!\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!__oprofile_cpu_pmu)</div><div class='add'>+		__oprofile_cpu_pmu = pmu;</div><div class='add'>+</div><div class='add'>+	pmu-&gt;plat_device = pdev;</div><div class='add'>+</div><div class='add'>+	if (node &amp;&amp; (of_id = of_match_node(of_table, pdev-&gt;dev.of_node))) {</div><div class='add'>+		init_fn = of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+		ret = of_pmu_irq_cfg(pmu);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = init_fn(pmu);</div><div class='add'>+	} else {</div><div class='add'>+		ret = probe_current_pmu(pmu, probe_table);</div><div class='add'>+		cpumask_setall(&amp;pmu-&gt;supported_cpus);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_info("failed to probe PMU!\n");</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cpu_pmu_init(pmu);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	ret = armpmu_register(pmu, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_destroy;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_destroy:</div><div class='add'>+	cpu_pmu_destroy(pmu);</div><div class='add'>+out_free:</div><div class='add'>+	pr_info("failed to register PMU devices!\n");</div><div class='add'>+	kfree(pmu);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c<br/>deleted file mode 100644<br/>index 3b8c2833c537..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_cpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/perf_event_cpu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,421 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2012 ARM Limited</div><div class='del'>- *</div><div class='del'>- * Author: Will Deacon &lt;will.deacon@arm.com&gt;</div><div class='del'>- */</div><div class='del'>-#define pr_fmt(fmt) "CPU PMU: " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/bitmap.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/irqdesc.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/cputype.h&gt;</div><div class='del'>-#include &lt;asm/irq_regs.h&gt;</div><div class='del'>-#include &lt;asm/pmu.h&gt;</div><div class='del'>-</div><div class='del'>-/* Set at runtime when we know what CPU type we are. */</div><div class='del'>-static struct arm_pmu *cpu_pmu;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Despite the names, these two functions are CPU-specific and are used</div><div class='del'>- * by the OProfile/perf code.</div><div class='del'>- */</div><div class='del'>-const char *perf_pmu_name(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_pmu)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return cpu_pmu-&gt;name;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(perf_pmu_name);</div><div class='del'>-</div><div class='del'>-int perf_num_counters(void)</div><div class='del'>-{</div><div class='del'>-	int max_events = 0;</div><div class='del'>-</div><div class='del'>-	if (cpu_pmu != NULL)</div><div class='del'>-		max_events = cpu_pmu-&gt;num_events;</div><div class='del'>-</div><div class='del'>-	return max_events;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(perf_num_counters);</div><div class='del'>-</div><div class='del'>-/* Include the PMU-specific implementations. */</div><div class='del'>-#include "perf_event_xscale.c"</div><div class='del'>-#include "perf_event_v6.c"</div><div class='del'>-#include "perf_event_v7.c"</div><div class='del'>-</div><div class='del'>-static void cpu_pmu_enable_percpu_irq(void *data)</div><div class='del'>-{</div><div class='del'>-	int irq = *(int *)data;</div><div class='del'>-</div><div class='del'>-	enable_percpu_irq(irq, IRQ_TYPE_NONE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpu_pmu_disable_percpu_irq(void *data)</div><div class='del'>-{</div><div class='del'>-	int irq = *(int *)data;</div><div class='del'>-</div><div class='del'>-	disable_percpu_irq(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	int i, irq, irqs;</div><div class='del'>-	struct platform_device *pmu_device = cpu_pmu-&gt;plat_device;</div><div class='del'>-	struct pmu_hw_events __percpu *hw_events = cpu_pmu-&gt;hw_events;</div><div class='del'>-</div><div class='del'>-	irqs = min(pmu_device-&gt;num_resources, num_possible_cpus());</div><div class='del'>-</div><div class='del'>-	irq = platform_get_irq(pmu_device, 0);</div><div class='del'>-	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq)) {</div><div class='del'>-		on_each_cpu(cpu_pmu_disable_percpu_irq, &amp;irq, 1);</div><div class='del'>-		free_percpu_irq(irq, &amp;hw_events-&gt;percpu_pmu);</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; irqs; ++i) {</div><div class='del'>-			int cpu = i;</div><div class='del'>-</div><div class='del'>-			if (cpu_pmu-&gt;irq_affinity)</div><div class='del'>-				cpu = cpu_pmu-&gt;irq_affinity[i];</div><div class='del'>-</div><div class='del'>-			if (!cpumask_test_and_clear_cpu(cpu, &amp;cpu_pmu-&gt;active_irqs))</div><div class='del'>-				continue;</div><div class='del'>-			irq = platform_get_irq(pmu_device, i);</div><div class='del'>-			if (irq &gt;= 0)</div><div class='del'>-				free_irq(irq, per_cpu_ptr(&amp;hw_events-&gt;percpu_pmu, cpu));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)</div><div class='del'>-{</div><div class='del'>-	int i, err, irq, irqs;</div><div class='del'>-	struct platform_device *pmu_device = cpu_pmu-&gt;plat_device;</div><div class='del'>-	struct pmu_hw_events __percpu *hw_events = cpu_pmu-&gt;hw_events;</div><div class='del'>-</div><div class='del'>-	if (!pmu_device)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	irqs = min(pmu_device-&gt;num_resources, num_possible_cpus());</div><div class='del'>-	if (irqs &lt; 1) {</div><div class='del'>-		pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq = platform_get_irq(pmu_device, 0);</div><div class='del'>-	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq)) {</div><div class='del'>-		err = request_percpu_irq(irq, handler, "arm-pmu",</div><div class='del'>-					 &amp;hw_events-&gt;percpu_pmu);</div><div class='del'>-		if (err) {</div><div class='del'>-			pr_err("unable to request IRQ%d for ARM PMU counters\n",</div><div class='del'>-				irq);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-		on_each_cpu(cpu_pmu_enable_percpu_irq, &amp;irq, 1);</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; irqs; ++i) {</div><div class='del'>-			int cpu = i;</div><div class='del'>-</div><div class='del'>-			err = 0;</div><div class='del'>-			irq = platform_get_irq(pmu_device, i);</div><div class='del'>-			if (irq &lt; 0)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (cpu_pmu-&gt;irq_affinity)</div><div class='del'>-				cpu = cpu_pmu-&gt;irq_affinity[i];</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * If we have a single PMU interrupt that we can't shift,</div><div class='del'>-			 * assume that we're running on a uniprocessor machine and</div><div class='del'>-			 * continue. Otherwise, continue without this interrupt.</div><div class='del'>-			 */</div><div class='del'>-			if (irq_set_affinity(irq, cpumask_of(cpu)) &amp;&amp; irqs &gt; 1) {</div><div class='del'>-				pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",</div><div class='del'>-					irq, cpu);</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			err = request_irq(irq, handler,</div><div class='del'>-					  IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",</div><div class='del'>-					  per_cpu_ptr(&amp;hw_events-&gt;percpu_pmu, cpu));</div><div class='del'>-			if (err) {</div><div class='del'>-				pr_err("unable to request IRQ%d for ARM PMU counters\n",</div><div class='del'>-					irq);</div><div class='del'>-				return err;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			cpumask_set_cpu(cpu, &amp;cpu_pmu-&gt;active_irqs);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PMU hardware loses all context when a CPU goes offline.</div><div class='del'>- * When a CPU is hotplugged back in, since some hardware registers are</div><div class='del'>- * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading</div><div class='del'>- * junk values out of them.</div><div class='del'>- */</div><div class='del'>-static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,</div><div class='del'>-			  void *hcpu)</div><div class='del'>-{</div><div class='del'>-	struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);</div><div class='del'>-</div><div class='del'>-	if ((action &amp; ~CPU_TASKS_FROZEN) != CPU_STARTING)</div><div class='del'>-		return NOTIFY_DONE;</div><div class='del'>-</div><div class='del'>-	if (pmu-&gt;reset)</div><div class='del'>-		pmu-&gt;reset(pmu);</div><div class='del'>-	else</div><div class='del'>-		return NOTIFY_DONE;</div><div class='del'>-</div><div class='del'>-	return NOTIFY_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpu_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	int cpu;</div><div class='del'>-	struct pmu_hw_events __percpu *cpu_hw_events;</div><div class='del'>-</div><div class='del'>-	cpu_hw_events = alloc_percpu(struct pmu_hw_events);</div><div class='del'>-	if (!cpu_hw_events)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	cpu_pmu-&gt;hotplug_nb.notifier_call = cpu_pmu_notify;</div><div class='del'>-	err = register_cpu_notifier(&amp;cpu_pmu-&gt;hotplug_nb);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_hw_events;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);</div><div class='del'>-		raw_spin_lock_init(&amp;events-&gt;pmu_lock);</div><div class='del'>-		events-&gt;percpu_pmu = cpu_pmu;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cpu_pmu-&gt;hw_events	= cpu_hw_events;</div><div class='del'>-	cpu_pmu-&gt;request_irq	= cpu_pmu_request_irq;</div><div class='del'>-	cpu_pmu-&gt;free_irq	= cpu_pmu_free_irq;</div><div class='del'>-</div><div class='del'>-	/* Ensure the PMU has sane values out of reset. */</div><div class='del'>-	if (cpu_pmu-&gt;reset)</div><div class='del'>-		on_each_cpu(cpu_pmu-&gt;reset, cpu_pmu, 1);</div><div class='del'>-</div><div class='del'>-	/* If no interrupts available, set the corresponding capability flag */</div><div class='del'>-	if (!platform_get_irq(cpu_pmu-&gt;plat_device, 0))</div><div class='del'>-		cpu_pmu-&gt;pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_hw_events:</div><div class='del'>-	free_percpu(cpu_hw_events);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	unregister_cpu_notifier(&amp;cpu_pmu-&gt;hotplug_nb);</div><div class='del'>-	free_percpu(cpu_pmu-&gt;hw_events);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PMU platform driver and devicetree bindings.</div><div class='del'>- */</div><div class='del'>-static const struct of_device_id cpu_pmu_of_device_ids[] = {</div><div class='del'>-	{.compatible = "arm,cortex-a17-pmu",	.data = armv7_a17_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a15-pmu",	.data = armv7_a15_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a12-pmu",	.data = armv7_a12_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a9-pmu",	.data = armv7_a9_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a8-pmu",	.data = armv7_a8_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a7-pmu",	.data = armv7_a7_pmu_init},</div><div class='del'>-	{.compatible = "arm,cortex-a5-pmu",	.data = armv7_a5_pmu_init},</div><div class='del'>-	{.compatible = "arm,arm11mpcore-pmu",	.data = armv6mpcore_pmu_init},</div><div class='del'>-	{.compatible = "arm,arm1176-pmu",	.data = armv6_1176_pmu_init},</div><div class='del'>-	{.compatible = "arm,arm1136-pmu",	.data = armv6_1136_pmu_init},</div><div class='del'>-	{.compatible = "qcom,krait-pmu",	.data = krait_pmu_init},</div><div class='del'>-	{.compatible = "qcom,scorpion-pmu",	.data = scorpion_pmu_init},</div><div class='del'>-	{.compatible = "qcom,scorpion-mp-pmu",	.data = scorpion_mp_pmu_init},</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device_id cpu_pmu_plat_device_ids[] = {</div><div class='del'>-	{.name = "arm-pmu"},</div><div class='del'>-	{.name = "armv6-pmu"},</div><div class='del'>-	{.name = "armv7-pmu"},</div><div class='del'>-	{.name = "xscale-pmu"},</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct pmu_probe_info pmu_probe_table[] = {</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),</div><div class='del'>-	ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),</div><div class='del'>-	XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),</div><div class='del'>-	XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),</div><div class='del'>-	{ /* sentinel value */ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CPU PMU identification and probing.</div><div class='del'>- */</div><div class='del'>-static int probe_current_pmu(struct arm_pmu *pmu)</div><div class='del'>-{</div><div class='del'>-	int cpu = get_cpu();</div><div class='del'>-	unsigned int cpuid = read_cpuid_id();</div><div class='del'>-	int ret = -ENODEV;</div><div class='del'>-	const struct pmu_probe_info *info;</div><div class='del'>-</div><div class='del'>-	pr_info("probing PMU on CPU %d\n", cpu);</div><div class='del'>-</div><div class='del'>-	for (info = pmu_probe_table; info-&gt;init != NULL; info++) {</div><div class='del'>-		if ((cpuid &amp; info-&gt;mask) != info-&gt;cpuid)</div><div class='del'>-			continue;</div><div class='del'>-		ret = info-&gt;init(pmu);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	put_cpu();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int of_pmu_irq_cfg(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	int i, irq;</div><div class='del'>-	int *irqs;</div><div class='del'>-</div><div class='del'>-	/* Don't bother with PPIs; they're already affine */</div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	irqs = kcalloc(pdev-&gt;num_resources, sizeof(*irqs), GFP_KERNEL);</div><div class='del'>-	if (!irqs)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pdev-&gt;num_resources; ++i) {</div><div class='del'>-		struct device_node *dn;</div><div class='del'>-		int cpu;</div><div class='del'>-</div><div class='del'>-		dn = of_parse_phandle(pdev-&gt;dev.of_node, "interrupt-affinity",</div><div class='del'>-				      i);</div><div class='del'>-		if (!dn) {</div><div class='del'>-			pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",</div><div class='del'>-				of_node_full_name(pdev-&gt;dev.of_node), i);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for_each_possible_cpu(cpu)</div><div class='del'>-			if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-		of_node_put(dn);</div><div class='del'>-		if (cpu &gt;= nr_cpu_ids) {</div><div class='del'>-			pr_warn("Failed to find logical CPU for %s\n",</div><div class='del'>-				dn-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		irqs[i] = cpu;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i == pdev-&gt;num_resources)</div><div class='del'>-		cpu_pmu-&gt;irq_affinity = irqs;</div><div class='del'>-	else</div><div class='del'>-		kfree(irqs);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpu_pmu_device_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	const struct of_device_id *of_id;</div><div class='del'>-	const int (*init_fn)(struct arm_pmu *);</div><div class='del'>-	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='del'>-	struct arm_pmu *pmu;</div><div class='del'>-	int ret = -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (cpu_pmu) {</div><div class='del'>-		pr_info("attempt to register multiple PMU devices!\n");</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);</div><div class='del'>-	if (!pmu) {</div><div class='del'>-		pr_info("failed to allocate PMU device!\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cpu_pmu = pmu;</div><div class='del'>-	cpu_pmu-&gt;plat_device = pdev;</div><div class='del'>-</div><div class='del'>-	if (node &amp;&amp; (of_id = of_match_node(cpu_pmu_of_device_ids, pdev-&gt;dev.of_node))) {</div><div class='del'>-		init_fn = of_id-&gt;data;</div><div class='del'>-</div><div class='del'>-		ret = of_pmu_irq_cfg(pdev);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = init_fn(pmu);</div><div class='del'>-	} else {</div><div class='del'>-		ret = probe_current_pmu(pmu);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_info("failed to probe PMU!\n");</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = cpu_pmu_init(cpu_pmu);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	ret = armpmu_register(cpu_pmu, -1);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_destroy;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	cpu_pmu_destroy(cpu_pmu);</div><div class='del'>-out_free:</div><div class='del'>-	pr_info("failed to register PMU devices!\n");</div><div class='del'>-	kfree(pmu);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver cpu_pmu_driver = {</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "arm-pmu",</div><div class='del'>-		.pm	= &amp;armpmu_dev_pm_ops,</div><div class='del'>-		.of_match_table = cpu_pmu_of_device_ids,</div><div class='del'>-	},</div><div class='del'>-	.probe		= cpu_pmu_device_probe,</div><div class='del'>-	.id_table	= cpu_pmu_plat_device_ids,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init register_pmu_driver(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;cpu_pmu_driver);</div><div class='del'>-}</div><div class='del'>-device_initcall(register_pmu_driver);</div><div class='head'>diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c<br/>index f2ffd5c542ed..09f83e414a72 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v6.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/perf_event_v6.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_v6.c</a></div><div class='hunk'>@@ -31,6 +31,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/irq_regs.h&gt;</div><div class='add'>+#include &lt;asm/pmu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='ctx'> enum armv6_perf_types {</div><div class='ctx'> 	ARMV6_PERFCTR_ICACHE_MISS	    = 0x0,</div><div class='ctx'> 	ARMV6_PERFCTR_IBUF_STALL	    = 0x1,</div><div class='hunk'>@@ -543,24 +551,39 @@ static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static int armv6_1136_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static int armv6_1156_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='add'>+static struct of_device_id armv6_pmu_of_device_ids[] = {</div><div class='add'>+	{.compatible = "arm,arm11mpcore-pmu",	.data = armv6mpcore_pmu_init},</div><div class='add'>+	{.compatible = "arm,arm1176-pmu",	.data = armv6_1176_pmu_init},</div><div class='add'>+	{.compatible = "arm,arm1136-pmu",	.data = armv6_1136_pmu_init},</div><div class='add'>+	{ /* sentinel value */ }</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int armv6_1176_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+static const struct pmu_probe_info armv6_pmu_probe_table[] = {</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),</div><div class='add'>+	{ /* sentinel value */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int armv6_pmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return arm_pmu_device_probe(pdev, armv6_pmu_of_device_ids,</div><div class='add'>+				    armv6_pmu_probe_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+static struct platform_driver armv6_pmu_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "armv6-pmu",</div><div class='add'>+		.of_match_table = armv6_pmu_of_device_ids,</div><div class='add'>+	},</div><div class='add'>+	.probe		= armv6_pmu_device_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init register_armv6_pmu_driver(void)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return platform_driver_register(&amp;armv6_pmu_driver);</div><div class='ctx'> }</div><div class='add'>+device_initcall(register_armv6_pmu_driver);</div><div class='ctx'> #endif	/* CONFIG_CPU_V6 || CONFIG_CPU_V6K */</div><div class='head'>diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c<br/>index f4207a4dcb01..f9b37f876e20 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v7.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/perf_event_v7.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_v7.c</a></div><div class='hunk'>@@ -19,9 +19,15 @@</div><div class='ctx'> #ifdef CONFIG_CPU_V7</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/irq_regs.h&gt;</div><div class='add'>+#include &lt;asm/pmu.h&gt;</div><div class='ctx'> #include &lt;asm/vfp.h&gt;</div><div class='ctx'> #include "../vfp/vfpinstr.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Common ARMv7 event types</div><div class='ctx'>  *</div><div class='hunk'>@@ -1056,15 +1062,22 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	cpu_pmu-&gt;max_period	= (1LLU &lt;&lt; 32) - 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u32 armv7_read_num_pmnc_events(void)</div><div class='add'>+static void armv7_read_num_pmnc_events(void *info)</div><div class='ctx'> {</div><div class='del'>-	u32 nb_cnt;</div><div class='add'>+	int *nb_cnt = info;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the nb of CNTx counters supported from PMNC */</div><div class='del'>-	nb_cnt = (armv7_pmnc_read() &gt;&gt; ARMV7_PMNC_N_SHIFT) &amp; ARMV7_PMNC_N_MASK;</div><div class='add'>+	*nb_cnt = (armv7_pmnc_read() &gt;&gt; ARMV7_PMNC_N_SHIFT) &amp; ARMV7_PMNC_N_MASK;</div><div class='ctx'> </div><div class='del'>-	/* Add the CPU cycles counter and return */</div><div class='del'>-	return nb_cnt + 1;</div><div class='add'>+	/* Add the CPU cycles counter */</div><div class='add'>+	*nb_cnt += 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int armv7_probe_num_events(struct arm_pmu *arm_pmu)</div><div class='add'>+{</div><div class='add'>+	return smp_call_function_any(&amp;arm_pmu-&gt;supported_cpus,</div><div class='add'>+				     armv7_read_num_pmnc_events,</div><div class='add'>+				     &amp;arm_pmu-&gt;num_events, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1072,8 +1085,7 @@ static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a8";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a8_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1081,8 +1093,7 @@ static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a9";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a9_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1090,8 +1101,7 @@ static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a5";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a5_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1099,9 +1109,8 @@ static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a15";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a15_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;set_event_filter = armv7pmu_set_event_filter;</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1109,9 +1118,8 @@ static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a7";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a7_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;set_event_filter = armv7pmu_set_event_filter;</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a12_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1119,16 +1127,15 @@ static int armv7_a12_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_cortex_a12";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= armv7_a12_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;set_event_filter = armv7pmu_set_event_filter;</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int armv7_a17_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> {</div><div class='del'>-	armv7_a12_pmu_init(cpu_pmu);</div><div class='add'>+	int ret = armv7_a12_pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name = "armv7_cortex_a17";</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1508,14 +1515,13 @@ static int krait_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 		cpu_pmu-&gt;map_event = krait_map_event_no_branch;</div><div class='ctx'> 	else</div><div class='ctx'> 		cpu_pmu-&gt;map_event = krait_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;set_event_filter = armv7pmu_set_event_filter;</div><div class='ctx'> 	cpu_pmu-&gt;reset		= krait_pmu_reset;</div><div class='ctx'> 	cpu_pmu-&gt;enable		= krait_pmu_enable_event;</div><div class='ctx'> 	cpu_pmu-&gt;disable	= krait_pmu_disable_event;</div><div class='ctx'> 	cpu_pmu-&gt;get_event_idx	= krait_pmu_get_event_idx;</div><div class='ctx'> 	cpu_pmu-&gt;clear_event_idx = krait_pmu_clear_event_idx;</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1833,13 +1839,12 @@ static int scorpion_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_scorpion";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= scorpion_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;reset		= scorpion_pmu_reset;</div><div class='ctx'> 	cpu_pmu-&gt;enable		= scorpion_pmu_enable_event;</div><div class='ctx'> 	cpu_pmu-&gt;disable	= scorpion_pmu_disable_event;</div><div class='ctx'> 	cpu_pmu-&gt;get_event_idx	= scorpion_pmu_get_event_idx;</div><div class='ctx'> 	cpu_pmu-&gt;clear_event_idx = scorpion_pmu_clear_event_idx;</div><div class='del'>-	return 0;</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='hunk'>@@ -1847,62 +1852,52 @@ static int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> 	armv7pmu_init(cpu_pmu);</div><div class='ctx'> 	cpu_pmu-&gt;name		= "armv7_scorpion_mp";</div><div class='ctx'> 	cpu_pmu-&gt;map_event	= scorpion_map_event;</div><div class='del'>-	cpu_pmu-&gt;num_events	= armv7_read_num_pmnc_events();</div><div class='ctx'> 	cpu_pmu-&gt;reset		= scorpion_pmu_reset;</div><div class='ctx'> 	cpu_pmu-&gt;enable		= scorpion_pmu_enable_event;</div><div class='ctx'> 	cpu_pmu-&gt;disable	= scorpion_pmu_disable_event;</div><div class='ctx'> 	cpu_pmu-&gt;get_event_idx	= scorpion_pmu_get_event_idx;</div><div class='ctx'> 	cpu_pmu-&gt;clear_event_idx = scorpion_pmu_clear_event_idx;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='add'>+	return armv7_probe_num_events(cpu_pmu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id armv7_pmu_of_device_ids[] = {</div><div class='add'>+	{.compatible = "arm,cortex-a17-pmu",	.data = armv7_a17_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a15-pmu",	.data = armv7_a15_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a12-pmu",	.data = armv7_a12_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a9-pmu",	.data = armv7_a9_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a8-pmu",	.data = armv7_a8_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a7-pmu",	.data = armv7_a7_pmu_init},</div><div class='add'>+	{.compatible = "arm,cortex-a5-pmu",	.data = armv7_a5_pmu_init},</div><div class='add'>+	{.compatible = "qcom,krait-pmu",	.data = krait_pmu_init},</div><div class='add'>+	{.compatible = "qcom,scorpion-pmu",	.data = scorpion_pmu_init},</div><div class='add'>+	{.compatible = "qcom,scorpion-mp-pmu",	.data = scorpion_mp_pmu_init},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static inline int armv7_a12_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='add'>+static const struct pmu_probe_info armv7_pmu_probe_table[] = {</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),</div><div class='add'>+	ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),</div><div class='add'>+	{ /* sentinel value */ }</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static inline int armv7_a17_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static inline int krait_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+static int armv7_pmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return arm_pmu_device_probe(pdev, armv7_pmu_of_device_ids,</div><div class='add'>+				    armv7_pmu_probe_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int scorpion_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='add'>+static struct platform_driver armv7_pmu_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "armv7-pmu",</div><div class='add'>+		.of_match_table = armv7_pmu_of_device_ids,</div><div class='add'>+	},</div><div class='add'>+	.probe		= armv7_pmu_device_probe,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static inline int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+static int __init register_armv7_pmu_driver(void)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return platform_driver_register(&amp;armv7_pmu_driver);</div><div class='ctx'> }</div><div class='add'>+device_initcall(register_armv7_pmu_driver);</div><div class='ctx'> #endif	/* CONFIG_CPU_V7 */</div><div class='head'>diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c<br/>index 8af9f1f82c68..304d056d5b25 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_xscale.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/perf_event_xscale.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_xscale.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/perf_event_xscale.c</a></div><div class='hunk'>@@ -13,6 +13,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_XSCALE</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/irq_regs.h&gt;</div><div class='add'>+#include &lt;asm/pmu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='ctx'> enum xscale_perf_types {</div><div class='ctx'> 	XSCALE_PERFCTR_ICACHE_MISS		= 0x00,</div><div class='ctx'> 	XSCALE_PERFCTR_ICACHE_NO_DELIVER	= 0x01,</div><div class='hunk'>@@ -740,14 +748,28 @@ static int xscale2pmu_init(struct arm_pmu *cpu_pmu)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static inline int xscale1pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+</div><div class='add'>+static const struct pmu_probe_info xscale_pmu_probe_table[] = {</div><div class='add'>+	XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),</div><div class='add'>+	XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),</div><div class='add'>+	{ /* sentinel value */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xscale_pmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return arm_pmu_device_probe(pdev, NULL, xscale_pmu_probe_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int xscale2pmu_init(struct arm_pmu *cpu_pmu)</div><div class='add'>+static struct platform_driver xscale_pmu_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "xscale-pmu",</div><div class='add'>+	},</div><div class='add'>+	.probe		= xscale_pmu_device_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init register_xscale_pmu_driver(void)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return platform_driver_register(&amp;xscale_pmu_driver);</div><div class='ctx'> }</div><div class='add'>+device_initcall(register_xscale_pmu_driver);</div><div class='ctx'> #endif	/* CONFIG_CPU_XSCALE */</div><div class='head'>diff --git a/arch/arm/kernel/reboot.c b/arch/arm/kernel/reboot.c<br/>index 1a4d232796be..38269358fd25 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/reboot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/reboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/reboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/reboot.c</a></div><div class='hunk'>@@ -50,7 +50,7 @@ static void __soft_restart(void *addr)</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Switch to the identity mapping. */</div><div class='del'>-	phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);</div><div class='add'>+	phys_reset = (phys_reset_t)(unsigned long)virt_to_idmap(cpu_reset);</div><div class='ctx'> 	phys_reset((unsigned long)addr);</div><div class='ctx'> </div><div class='ctx'> 	/* Should never get here. */</div><div class='head'>diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c<br/>index 6c777e908a24..36c18b73c1f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/setup.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cachetype.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/xen/hypervisor.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -75,8 +76,7 @@ __setup("fpe=", fpe_setup);</div><div class='ctx'> </div><div class='ctx'> extern void init_default_cache_policy(unsigned long);</div><div class='ctx'> extern void paging_init(const struct machine_desc *desc);</div><div class='del'>-extern void early_paging_init(const struct machine_desc *,</div><div class='del'>-			      struct proc_info_list *);</div><div class='add'>+extern void early_paging_init(const struct machine_desc *);</div><div class='ctx'> extern void sanity_check_meminfo(void);</div><div class='ctx'> extern enum reboot_mode reboot_mode;</div><div class='ctx'> extern void setup_dma_zone(const struct machine_desc *desc);</div><div class='hunk'>@@ -93,6 +93,9 @@ unsigned int __atags_pointer __initdata;</div><div class='ctx'> unsigned int system_rev;</div><div class='ctx'> EXPORT_SYMBOL(system_rev);</div><div class='ctx'> </div><div class='add'>+const char *system_serial;</div><div class='add'>+EXPORT_SYMBOL(system_serial);</div><div class='add'>+</div><div class='ctx'> unsigned int system_serial_low;</div><div class='ctx'> EXPORT_SYMBOL(system_serial_low);</div><div class='ctx'> </div><div class='hunk'>@@ -839,8 +842,25 @@ arch_initcall(customize_machine);</div><div class='ctx'> </div><div class='ctx'> static int __init init_machine_late(void)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *root;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	if (machine_desc-&gt;init_late)</div><div class='ctx'> 		machine_desc-&gt;init_late();</div><div class='add'>+</div><div class='add'>+	root = of_find_node_by_path("/");</div><div class='add'>+	if (root) {</div><div class='add'>+		ret = of_property_read_string(root, "serial-number",</div><div class='add'>+					      &amp;system_serial);</div><div class='add'>+		if (ret)</div><div class='add'>+			system_serial = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!system_serial)</div><div class='add'>+		system_serial = kasprintf(GFP_KERNEL, "%08x%08x",</div><div class='add'>+					  system_serial_high,</div><div class='add'>+					  system_serial_low);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> late_initcall(init_machine_late);</div><div class='hunk'>@@ -936,7 +956,9 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	parse_early_param();</div><div class='ctx'> </div><div class='del'>-	early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+	early_paging_init(mdesc);</div><div class='add'>+#endif</div><div class='ctx'> 	setup_dma_zone(mdesc);</div><div class='ctx'> 	sanity_check_meminfo();</div><div class='ctx'> 	arm_memblock_init(mdesc);</div><div class='hunk'>@@ -951,6 +973,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	arm_dt_init_cpu_maps();</div><div class='ctx'> 	psci_init();</div><div class='add'>+	xen_early_init();</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	if (is_smp()) {</div><div class='ctx'> 		if (!mdesc-&gt;smp_init || !mdesc-&gt;smp_init()) {</div><div class='hunk'>@@ -1109,8 +1132,7 @@ static int c_show(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "Hardware\t: %s\n", machine_name);</div><div class='ctx'> 	seq_printf(m, "Revision\t: %04x\n", system_rev);</div><div class='del'>-	seq_printf(m, "Serial\t\t: %08x%08x\n",</div><div class='del'>-		   system_serial_high, system_serial_low);</div><div class='add'>+	seq_printf(m, "Serial\t\t: %s\n", system_serial);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S<br/>index 7d37bfc50830..0f6c1000582c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/sleep.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/sleep.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/sleep.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/sleep.S</a></div><div class='hunk'>@@ -81,7 +81,7 @@ ENTRY(__cpu_suspend)</div><div class='ctx'> 	mov	r1, r4			@ size of save block</div><div class='ctx'> 	add	r0, sp, #8		@ pointer to save block</div><div class='ctx'> 	bl	__cpu_suspend_save</div><div class='del'>-	adr	lr, BSYM(cpu_suspend_abort)</div><div class='add'>+	badr	lr, cpu_suspend_abort</div><div class='ctx'> 	ldmfd	sp!, {r0, pc}		@ call suspend fn</div><div class='ctx'> ENDPROC(__cpu_suspend)</div><div class='ctx'> 	.ltorg</div><div class='hunk'>@@ -118,6 +118,16 @@ ENDPROC(cpu_resume_after_mmu)</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='ctx'> 	.align</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+	.arm</div><div class='add'>+ENTRY(cpu_resume_arm)</div><div class='add'>+ THUMB(	badr	r9, 1f		)	@ Kernel is entered in ARM.</div><div class='add'>+ THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,</div><div class='add'>+ THUMB(	.thumb			)	@ switch to Thumb now.</div><div class='add'>+ THUMB(1:			)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> ENTRY(cpu_resume)</div><div class='ctx'> ARM_BE8(setend be)			@ ensure we are in BE mode</div><div class='ctx'> #ifdef CONFIG_ARM_VIRT_EXT</div><div class='hunk'>@@ -150,6 +160,10 @@ THUMB(	mov	sp, r2			)</div><div class='ctx'> THUMB(	bx	r3			)</div><div class='ctx'> ENDPROC(cpu_resume)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+ENDPROC(cpu_resume_arm)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	.align 2</div><div class='ctx'> _sleep_save_sp:</div><div class='ctx'> 	.long	sleep_save_sp - .</div><div class='head'>diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c<br/>index cca5b8758185..3d6b7821cff8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/smp.c</a></div><div class='hunk'>@@ -86,9 +86,11 @@ void __init smp_set_ops(struct smp_operations *ops)</div><div class='ctx'> </div><div class='ctx'> static unsigned long get_arch_pgd(pgd_t *pgd)</div><div class='ctx'> {</div><div class='del'>-	phys_addr_t pgdir = virt_to_idmap(pgd);</div><div class='del'>-	BUG_ON(pgdir &amp; ARCH_PGD_MASK);</div><div class='del'>-	return pgdir &gt;&gt; ARCH_PGD_SHIFT;</div><div class='add'>+#ifdef CONFIG_ARM_LPAE</div><div class='add'>+	return __phys_to_pfn(virt_to_phys(pgd));</div><div class='add'>+#else</div><div class='add'>+	return virt_to_phys(pgd);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='hunk'>@@ -108,7 +110,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-	secondary_data.pgdir = get_arch_pgd(idmap_pgd);</div><div class='add'>+	secondary_data.pgdir = virt_to_phys(idmap_pgd);</div><div class='ctx'> 	secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);</div><div class='ctx'> #endif</div><div class='ctx'> 	sync_cache_w(&amp;secondary_data);</div><div class='hunk'>@@ -576,7 +578,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)</div><div class='ctx'> 	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='ctx'> 	if ((unsigned)ipinr &lt; NR_IPI) {</div><div class='del'>-		trace_ipi_entry(ipi_types[ipinr]);</div><div class='add'>+		trace_ipi_entry_rcuidle(ipi_types[ipinr]);</div><div class='ctx'> 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -635,7 +637,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((unsigned)ipinr &lt; NR_IPI)</div><div class='del'>-		trace_ipi_exit(ipi_types[ipinr]);</div><div class='add'>+		trace_ipi_exit_rcuidle(ipi_types[ipinr]);</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c<br/>index 7a3be1d4d0b1..b10e1360762e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/tcm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/tcm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/tcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/tcm.c</a></div><div class='hunk'>@@ -17,6 +17,9 @@</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> #include &lt;asm/system_info.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+</div><div class='add'>+#define TCMTR_FORMAT_MASK	0xe0000000U</div><div class='ctx'> </div><div class='ctx'> static struct gen_pool *tcm_pool;</div><div class='ctx'> static bool dtcm_present;</div><div class='hunk'>@@ -176,6 +179,77 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * When we are running in the non-secure world and the secure world</div><div class='add'>+ * has not explicitly given us access to the TCM we will get an</div><div class='add'>+ * undefined error when reading the TCM region register in the</div><div class='add'>+ * setup_tcm_bank function (above).</div><div class='add'>+ *</div><div class='add'>+ * There are two variants of this register read that we need to trap,</div><div class='add'>+ * the read for the data TCM and the read for the instruction TCM:</div><div class='add'>+ *  c0370628:       ee196f11        mrc     15, 0, r6, cr9, cr1, {0}</div><div class='add'>+ *  c0370674:       ee196f31        mrc     15, 0, r6, cr9, cr1, {1}</div><div class='add'>+ *</div><div class='add'>+ * Our undef hook mask explicitly matches all fields of the encoded</div><div class='add'>+ * instruction other than the destination register.  The mask also</div><div class='add'>+ * only allows operand 2 to have the values 0 or 1.</div><div class='add'>+ *</div><div class='add'>+ * The undefined hook is defined as __init and __initdata, and therefore</div><div class='add'>+ * must be removed before tcm_init returns.</div><div class='add'>+ *</div><div class='add'>+ * In this particular case (MRC with ARM condition code ALways) the</div><div class='add'>+ * Thumb-2 and ARM instruction encoding are identical, so this hook</div><div class='add'>+ * will work on a Thumb-2 kernel.</div><div class='add'>+ *</div><div class='add'>+ * See A8.8.107, DDI0406C_C ARM Architecture Reference Manual, Encoding</div><div class='add'>+ * T1/A1 for the bit-by-bit details.</div><div class='add'>+ *</div><div class='add'>+ *  mrc   p15, 0, XX, c9, c1, 0</div><div class='add'>+ *  mrc   p15, 0, XX, c9, c1, 1</div><div class='add'>+ *   |  |  |   |   |   |   |  +---- opc2           0|1 = 000|001</div><div class='add'>+ *   |  |  |   |   |   |   +------- CRm              0 = 0001</div><div class='add'>+ *   |  |  |   |   |   +----------- CRn              0 = 1001</div><div class='add'>+ *   |  |  |   |   +--------------- Rt               ? = ????</div><div class='add'>+ *   |  |  |   +------------------- opc1             0 =  000</div><div class='add'>+ *   |  |  +----------------------- coproc          15 = 1111</div><div class='add'>+ *   |  +-------------------------- condition   ALways = 1110</div><div class='add'>+ *   +----------------------------- instruction    MRC = 1110</div><div class='add'>+ *</div><div class='add'>+ * Encoding this as per A8.8.107 of DDI0406C, Encoding T1/A1, yields:</div><div class='add'>+ *  1111 1111 1111 1111 0000 1111 1101 1111 Required Mask</div><div class='add'>+ *  1110 1110 0001 1001 ???? 1111 0001 0001 mrc p15, 0, XX, c9, c1, 0</div><div class='add'>+ *  1110 1110 0001 1001 ???? 1111 0011 0001 mrc p15, 0, XX, c9, c1, 1</div><div class='add'>+ *  [  ] [  ] [ ]| [  ] [  ] [  ] [ ]| +--- CRm</div><div class='add'>+ *    |    |   | |   |    |    |   | +----- SBO</div><div class='add'>+ *    |    |   | |   |    |    |   +------- opc2</div><div class='add'>+ *    |    |   | |   |    |    +----------- coproc</div><div class='add'>+ *    |    |   | |   |    +---------------- Rt</div><div class='add'>+ *    |    |   | |   +--------------------- CRn</div><div class='add'>+ *    |    |   | +------------------------- SBO</div><div class='add'>+ *    |    |   +--------------------------- opc1</div><div class='add'>+ *    |    +------------------------------- instruction</div><div class='add'>+ *    +------------------------------------ condition</div><div class='add'>+ */</div><div class='add'>+#define TCM_REGION_READ_MASK		0xffff0fdf</div><div class='add'>+#define TCM_REGION_READ_INSTR		0xee190f11</div><div class='add'>+#define DEST_REG_SHIFT			12</div><div class='add'>+#define DEST_REG_MASK			0xf</div><div class='add'>+</div><div class='add'>+static int __init tcm_handler(struct pt_regs *regs, unsigned int instr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;uregs[(instr &gt;&gt; DEST_REG_SHIFT) &amp; DEST_REG_MASK] = 0;</div><div class='add'>+	regs-&gt;ARM_pc += 4;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct undef_hook tcm_hook __initdata = {</div><div class='add'>+	.instr_mask	= TCM_REGION_READ_MASK,</div><div class='add'>+	.instr_val	= TCM_REGION_READ_INSTR,</div><div class='add'>+	.cpsr_mask	= MODE_MASK,</div><div class='add'>+	.cpsr_val	= SVC_MODE,</div><div class='add'>+	.fn		= tcm_handler</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * This initializes the TCM memory</div><div class='ctx'>  */</div><div class='ctx'> void __init tcm_init(void)</div><div class='hunk'>@@ -204,9 +278,18 @@ void __init tcm_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tcm_status = read_cpuid_tcmstatus();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This code only supports v6-compatible TCMTR implementations.</div><div class='add'>+	 */</div><div class='add'>+	if (tcm_status &amp; TCMTR_FORMAT_MASK)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	dtcm_banks = (tcm_status &gt;&gt; 16) &amp; 0x03;</div><div class='ctx'> 	itcm_banks = (tcm_status &amp; 0x03);</div><div class='ctx'> </div><div class='add'>+	register_undef_hook(&amp;tcm_hook);</div><div class='add'>+</div><div class='ctx'> 	/* Values greater than 2 for D/ITCM banks are "reserved" */</div><div class='ctx'> 	if (dtcm_banks &gt; 2)</div><div class='ctx'> 		dtcm_banks = 0;</div><div class='hunk'>@@ -218,7 +301,7 @@ void __init tcm_init(void)</div><div class='ctx'> 		for (i = 0; i &lt; dtcm_banks; i++) {</div><div class='ctx'> 			ret = setup_tcm_bank(0, i, dtcm_banks, &amp;dtcm_end);</div><div class='ctx'> 			if (ret)</div><div class='del'>-				return;</div><div class='add'>+				goto unregister;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* This means you compiled more code than fits into DTCM */</div><div class='ctx'> 		if (dtcm_code_sz &gt; (dtcm_end - DTCM_OFFSET)) {</div><div class='hunk'>@@ -227,6 +310,12 @@ void __init tcm_init(void)</div><div class='ctx'> 				dtcm_code_sz, (dtcm_end - DTCM_OFFSET));</div><div class='ctx'> 			goto no_dtcm;</div><div class='ctx'> 		}</div><div class='add'>+		/*</div><div class='add'>+		 * This means that the DTCM sizes were 0 or the DTCM banks</div><div class='add'>+		 * were inaccessible due to TrustZone configuration.</div><div class='add'>+		 */</div><div class='add'>+		if (!(dtcm_end - DTCM_OFFSET))</div><div class='add'>+			goto no_dtcm;</div><div class='ctx'> 		dtcm_res.end = dtcm_end - 1;</div><div class='ctx'> 		request_resource(&amp;iomem_resource, &amp;dtcm_res);</div><div class='ctx'> 		dtcm_iomap[0].length = dtcm_end - DTCM_OFFSET;</div><div class='hunk'>@@ -250,15 +339,21 @@ no_dtcm:</div><div class='ctx'> 		for (i = 0; i &lt; itcm_banks; i++) {</div><div class='ctx'> 			ret = setup_tcm_bank(1, i, itcm_banks, &amp;itcm_end);</div><div class='ctx'> 			if (ret)</div><div class='del'>-				return;</div><div class='add'>+				goto unregister;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* This means you compiled more code than fits into ITCM */</div><div class='ctx'> 		if (itcm_code_sz &gt; (itcm_end - ITCM_OFFSET)) {</div><div class='ctx'> 			pr_info("CPU ITCM: %u bytes of code compiled to "</div><div class='ctx'> 				"ITCM but only %lu bytes of ITCM present\n",</div><div class='ctx'> 				itcm_code_sz, (itcm_end - ITCM_OFFSET));</div><div class='del'>-			return;</div><div class='add'>+			goto unregister;</div><div class='ctx'> 		}</div><div class='add'>+		/*</div><div class='add'>+		 * This means that the ITCM sizes were 0 or the ITCM banks</div><div class='add'>+		 * were inaccessible due to TrustZone configuration.</div><div class='add'>+		 */</div><div class='add'>+		if (!(itcm_end - ITCM_OFFSET))</div><div class='add'>+			goto unregister;</div><div class='ctx'> 		itcm_res.end = itcm_end - 1;</div><div class='ctx'> 		request_resource(&amp;iomem_resource, &amp;itcm_res);</div><div class='ctx'> 		itcm_iomap[0].length = itcm_end - ITCM_OFFSET;</div><div class='hunk'>@@ -275,6 +370,9 @@ no_dtcm:</div><div class='ctx'> 		pr_info("CPU ITCM: %u bytes of code compiled to ITCM but no "</div><div class='ctx'> 			"ITCM banks present in CPU\n", itcm_code_sz);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+unregister:</div><div class='add'>+	unregister_undef_hook(&amp;tcm_hook);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c<br/>index 3dce1a342030..d358226236f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kernel/traps.c</a></div><div class='hunk'>@@ -749,14 +749,6 @@ late_initcall(arm_mrc_hook_init);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __bad_xchg(volatile void *ptr, int size)</div><div class='del'>-{</div><div class='del'>-	pr_err("xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n",</div><div class='del'>-	       __builtin_return_address(0), ptr, size);</div><div class='del'>-	BUG();</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__bad_xchg);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * A data abort trap was taken, but we did not handle the instruction.</div><div class='ctx'>  * Try to abort the user program, or panic if it was the kernel.</div><div class='head'>diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig<br/>index f1f79d104309..bfb915d05665 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/Kconfig</a></div><div class='hunk'>@@ -28,6 +28,7 @@ config KVM</div><div class='ctx'> 	select KVM_GENERIC_DIRTYLOG_READ_PROTECT</div><div class='ctx'> 	select SRCU</div><div class='ctx'> 	select MMU_NOTIFIER</div><div class='add'>+	select KVM_VFIO</div><div class='ctx'> 	select HAVE_KVM_EVENTFD</div><div class='ctx'> 	select HAVE_KVM_IRQFD</div><div class='ctx'> 	depends on ARM_VIRT_EXT &amp;&amp; ARM_LPAE &amp;&amp; ARM_ARCH_TIMER</div><div class='head'>diff --git a/arch/arm/kvm/Makefile b/arch/arm/kvm/Makefile<br/>index 139e46c08b6e..c5eef02c52ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/Makefile</a></div><div class='hunk'>@@ -15,7 +15,7 @@ AFLAGS_init.o := -Wa,-march=armv7-a$(plus_virt)</div><div class='ctx'> AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt)</div><div class='ctx'> </div><div class='ctx'> KVM := ../../../virt/kvm</div><div class='del'>-kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o</div><div class='add'>+kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o $(KVM)/vfio.o</div><div class='ctx'> </div><div class='ctx'> obj-y += kvm-arm.o init.o interrupts.o</div><div class='ctx'> obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o</div><div class='head'>diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c<br/>index d9631ecddd56..bc738d2b8392 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/arm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/arm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/arm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/arm.c</a></div><div class='hunk'>@@ -171,7 +171,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	switch (ext) {</div><div class='ctx'> 	case KVM_CAP_IRQCHIP:</div><div class='del'>-	case KVM_CAP_IRQFD:</div><div class='ctx'> 	case KVM_CAP_IOEVENTFD:</div><div class='ctx'> 	case KVM_CAP_DEVICE_CTRL:</div><div class='ctx'> 	case KVM_CAP_USER_MEMORY:</div><div class='hunk'>@@ -532,6 +531,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 		kvm_vgic_flush_hwstate(vcpu);</div><div class='ctx'> 		kvm_timer_flush_hwstate(vcpu);</div><div class='ctx'> </div><div class='add'>+		preempt_disable();</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -544,6 +544,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> </div><div class='ctx'> 		if (ret &lt;= 0 || need_new_vmid_gen(vcpu-&gt;kvm)) {</div><div class='ctx'> 			local_irq_enable();</div><div class='add'>+			preempt_enable();</div><div class='ctx'> 			kvm_timer_sync_hwstate(vcpu);</div><div class='ctx'> 			kvm_vgic_sync_hwstate(vcpu);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -553,14 +554,16 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 		 * Enter the guest</div><div class='ctx'> 		 */</div><div class='ctx'> 		trace_kvm_entry(*vcpu_pc(vcpu));</div><div class='del'>-		kvm_guest_enter();</div><div class='add'>+		__kvm_guest_enter();</div><div class='ctx'> 		vcpu-&gt;mode = IN_GUEST_MODE;</div><div class='ctx'> </div><div class='ctx'> 		ret = kvm_call_hyp(__kvm_vcpu_run, vcpu);</div><div class='ctx'> </div><div class='ctx'> 		vcpu-&gt;mode = OUTSIDE_GUEST_MODE;</div><div class='del'>-		kvm_guest_exit();</div><div class='del'>-		trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));</div><div class='add'>+		/*</div><div class='add'>+		 * Back from guest</div><div class='add'>+		 *************************************************************/</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We may have taken a host interrupt in HYP mode (ie</div><div class='ctx'> 		 * while executing the guest). This interrupt is still</div><div class='hunk'>@@ -574,8 +577,17 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Back from guest</div><div class='del'>-		 *************************************************************/</div><div class='add'>+		 * We do local_irq_enable() before calling kvm_guest_exit() so</div><div class='add'>+		 * that if a timer interrupt hits while running the guest we</div><div class='add'>+		 * account that tick as being spent in the guest.  We enable</div><div class='add'>+		 * preemption after calling kvm_guest_exit() so that if we get</div><div class='add'>+		 * preempted we make sure ticks after that is not counted as</div><div class='add'>+		 * guest time.</div><div class='add'>+		 */</div><div class='add'>+		kvm_guest_exit();</div><div class='add'>+		trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));</div><div class='add'>+		preempt_enable();</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 		kvm_timer_sync_hwstate(vcpu);</div><div class='ctx'> 		kvm_vgic_sync_hwstate(vcpu);</div><div class='head'>diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S<br/>index 79caf79b304a..568494dbbbb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/interrupts.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/interrupts.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/interrupts.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/interrupts.S</a></div><div class='hunk'>@@ -170,13 +170,9 @@ __kvm_vcpu_return:</div><div class='ctx'> 	@ Don't trap coprocessor accesses for host kernel</div><div class='ctx'> 	set_hstr vmexit</div><div class='ctx'> 	set_hdcr vmexit</div><div class='del'>-	set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11))</div><div class='add'>+	set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11)), after_vfp_restore</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VFPv3</div><div class='del'>-	@ Save floating point registers we if let guest use them.</div><div class='del'>-	tst	r2, #(HCPTR_TCP(10) | HCPTR_TCP(11))</div><div class='del'>-	bne	after_vfp_restore</div><div class='del'>-</div><div class='ctx'> 	@ Switch VFP/NEON hardware state to the host's</div><div class='ctx'> 	add	r7, vcpu, #VCPU_VFP_GUEST</div><div class='ctx'> 	store_vfp_state r7</div><div class='hunk'>@@ -188,6 +184,8 @@ after_vfp_restore:</div><div class='ctx'> 	@ Restore FPEXC_EN which we clobbered on entry</div><div class='ctx'> 	pop	{r2}</div><div class='ctx'> 	VFPFMXR FPEXC, r2</div><div class='add'>+#else</div><div class='add'>+after_vfp_restore:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	@ Reset Hyp-role</div><div class='hunk'>@@ -309,7 +307,7 @@ ENTRY(kvm_call_hyp)</div><div class='ctx'> THUMB(	orr	r2, r2, #PSR_T_BIT	)</div><div class='ctx'> 	msr	spsr_cxsf, r2</div><div class='ctx'> 	mrs	r1, ELR_hyp</div><div class='del'>-	ldr	r2, =BSYM(panic)</div><div class='add'>+	ldr	r2, =panic</div><div class='ctx'> 	msr	ELR_hyp, r2</div><div class='ctx'> 	ldr	r0, =\panic_str</div><div class='ctx'> 	clrex				@ Clear exclusive monitor</div><div class='hunk'>@@ -483,7 +481,7 @@ switch_to_guest_vfp:</div><div class='ctx'> 	push	{r3-r7}</div><div class='ctx'> </div><div class='ctx'> 	@ NEON/VFP used.  Turn on VFP access.</div><div class='del'>-	set_hcptr vmexit, (HCPTR_TCP(10) | HCPTR_TCP(11))</div><div class='add'>+	set_hcptr vmtrap, (HCPTR_TCP(10) | HCPTR_TCP(11))</div><div class='ctx'> </div><div class='ctx'> 	@ Switch VFP/NEON hardware state to the guest's</div><div class='ctx'> 	add	r7, r0, #VCPU_VFP_HOST</div><div class='head'>diff --git a/arch/arm/kvm/interrupts_head.S b/arch/arm/kvm/interrupts_head.S<br/>index 35e4a3a0c476..702740d37465 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/interrupts_head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/interrupts_head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/interrupts_head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/interrupts_head.S</a></div><div class='hunk'>@@ -412,7 +412,6 @@ vcpu	.req	r0		@ vcpu pointer always in r0</div><div class='ctx'> 	add	r11, vcpu, #VCPU_VGIC_CPU</div><div class='ctx'> </div><div class='ctx'> 	/* Save all interesting registers */</div><div class='del'>-	ldr	r3, [r2, #GICH_HCR]</div><div class='ctx'> 	ldr	r4, [r2, #GICH_VMCR]</div><div class='ctx'> 	ldr	r5, [r2, #GICH_MISR]</div><div class='ctx'> 	ldr	r6, [r2, #GICH_EISR0]</div><div class='hunk'>@@ -420,7 +419,6 @@ vcpu	.req	r0		@ vcpu pointer always in r0</div><div class='ctx'> 	ldr	r8, [r2, #GICH_ELRSR0]</div><div class='ctx'> 	ldr	r9, [r2, #GICH_ELRSR1]</div><div class='ctx'> 	ldr	r10, [r2, #GICH_APR]</div><div class='del'>-ARM_BE8(rev	r3, r3	)</div><div class='ctx'> ARM_BE8(rev	r4, r4	)</div><div class='ctx'> ARM_BE8(rev	r5, r5	)</div><div class='ctx'> ARM_BE8(rev	r6, r6	)</div><div class='hunk'>@@ -429,7 +427,6 @@ ARM_BE8(rev	r8, r8	)</div><div class='ctx'> ARM_BE8(rev	r9, r9	)</div><div class='ctx'> ARM_BE8(rev	r10, r10	)</div><div class='ctx'> </div><div class='del'>-	str	r3, [r11, #VGIC_V2_CPU_HCR]</div><div class='ctx'> 	str	r4, [r11, #VGIC_V2_CPU_VMCR]</div><div class='ctx'> 	str	r5, [r11, #VGIC_V2_CPU_MISR]</div><div class='ctx'> #ifdef CONFIG_CPU_ENDIAN_BE8</div><div class='hunk'>@@ -591,8 +588,13 @@ ARM_BE8(rev	r6, r6  )</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /* Configures the HCPTR (Hyp Coprocessor Trap Register) on entry/return</div><div class='del'>- * (hardware reset value is 0). Keep previous value in r2. */</div><div class='del'>-.macro set_hcptr operation, mask</div><div class='add'>+ * (hardware reset value is 0). Keep previous value in r2.</div><div class='add'>+ * An ISB is emited on vmexit/vmtrap, but executed on vmexit only if</div><div class='add'>+ * VFP wasn't already enabled (always executed on vmtrap).</div><div class='add'>+ * If a label is specified with vmexit, it is branched to if VFP wasn't</div><div class='add'>+ * enabled.</div><div class='add'>+ */</div><div class='add'>+.macro set_hcptr operation, mask, label = none</div><div class='ctx'> 	mrc	p15, 4, r2, c1, c1, 2</div><div class='ctx'> 	ldr	r3, =\mask</div><div class='ctx'> 	.if \operation == vmentry</div><div class='hunk'>@@ -601,6 +603,17 @@ ARM_BE8(rev	r6, r6  )</div><div class='ctx'> 	bic	r3, r2, r3		@ Don't trap defined coproc-accesses</div><div class='ctx'> 	.endif</div><div class='ctx'> 	mcr	p15, 4, r3, c1, c1, 2</div><div class='add'>+	.if \operation != vmentry</div><div class='add'>+	.if \operation == vmexit</div><div class='add'>+	tst	r2, #(HCPTR_TCP(10) | HCPTR_TCP(11))</div><div class='add'>+	beq	1f</div><div class='add'>+	.endif</div><div class='add'>+	isb</div><div class='add'>+	.if \label != none</div><div class='add'>+	b	\label</div><div class='add'>+	.endif</div><div class='add'>+1:</div><div class='add'>+	.endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /* Configures the HDCR (Hyp Debug Configuration Register) on entry/return</div><div class='head'>diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c<br/>index 1d5accbd3dcf..7b4201294187 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/mmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/mmu.c</a></div><div class='hunk'>@@ -691,8 +691,8 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm)</div><div class='ctx'> 		 * work.  This is not used by the hardware and we have no</div><div class='ctx'> 		 * alignment requirement for this allocation.</div><div class='ctx'> 		 */</div><div class='del'>-		pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),</div><div class='del'>-				       GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+		pgd = kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),</div><div class='add'>+				GFP_KERNEL | __GFP_ZERO);</div><div class='ctx'> </div><div class='ctx'> 		if (!pgd) {</div><div class='ctx'> 			kvm_free_hwpgd(hwpgd);</div><div class='hunk'>@@ -1155,7 +1155,8 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)</div><div class='ctx'>  */</div><div class='ctx'> void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_memory_slot *memslot = id_to_memslot(kvm-&gt;memslots, slot);</div><div class='add'>+	struct kvm_memslots *slots = kvm_memslots(kvm);</div><div class='add'>+	struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);</div><div class='ctx'> 	phys_addr_t start = memslot-&gt;base_gfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	phys_addr_t end = (memslot-&gt;base_gfn + memslot-&gt;npages) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='hunk'>@@ -1718,8 +1719,9 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   const struct kvm_memory_slot *old,</div><div class='add'>+				   const struct kvm_memory_slot *new,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1733,7 +1735,7 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	hva_t hva = mem-&gt;userspace_addr;</div><div class='hunk'>@@ -1838,7 +1840,7 @@ int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_arch_memslots_updated(struct kvm *kvm)</div><div class='add'>+void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c<br/>index 02fa8eff6ae1..4b94b513168d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kvm/psci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/kvm/psci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kvm/psci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/kvm/psci.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #include &lt;asm/kvm_psci.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_host.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;uapi/linux/psci.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is an implementation of the Power State Coordination Interface</div><div class='ctx'>  * as described in ARM document number ARM DEN 0022A.</div><div class='hunk'>@@ -230,10 +232,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	case PSCI_0_2_FN64_AFFINITY_INFO:</div><div class='ctx'> 		val = kvm_psci_vcpu_affinity_info(vcpu);</div><div class='ctx'> 		break;</div><div class='del'>-	case PSCI_0_2_FN_MIGRATE:</div><div class='del'>-	case PSCI_0_2_FN64_MIGRATE:</div><div class='del'>-		val = PSCI_RET_NOT_SUPPORTED;</div><div class='del'>-		break;</div><div class='ctx'> 	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Trusted OS is MP hence does not require migration</div><div class='hunk'>@@ -242,10 +240,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 */</div><div class='ctx'> 		val = PSCI_0_2_TOS_MP;</div><div class='ctx'> 		break;</div><div class='del'>-	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:</div><div class='del'>-	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:</div><div class='del'>-		val = PSCI_RET_NOT_SUPPORTED;</div><div class='del'>-		break;</div><div class='ctx'> 	case PSCI_0_2_FN_SYSTEM_OFF:</div><div class='ctx'> 		kvm_psci_system_off(vcpu);</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -271,7 +265,8 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		val = PSCI_RET_NOT_SUPPORTED;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*vcpu_reg(vcpu, 0) = val;</div><div class='hunk'>@@ -291,12 +286,9 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	case KVM_PSCI_FN_CPU_ON:</div><div class='ctx'> 		val = kvm_psci_vcpu_on(vcpu);</div><div class='ctx'> 		break;</div><div class='del'>-	case KVM_PSCI_FN_CPU_SUSPEND:</div><div class='del'>-	case KVM_PSCI_FN_MIGRATE:</div><div class='add'>+	default:</div><div class='ctx'> 		val = PSCI_RET_NOT_SUPPORTED;</div><div class='ctx'> 		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*vcpu_reg(vcpu, 0) = val;</div><div class='head'>diff --git a/arch/arm/lib/call_with_stack.S b/arch/arm/lib/call_with_stack.S<br/>index ed1a421813cb..bf3a40889205 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/call_with_stack.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/lib/call_with_stack.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/lib/call_with_stack.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/call_with_stack.S</a></div><div class='hunk'>@@ -35,7 +35,7 @@ ENTRY(call_with_stack)</div><div class='ctx'> 	mov	r2, r0</div><div class='ctx'> 	mov	r0, r1</div><div class='ctx'> </div><div class='del'>-	adr	lr, BSYM(1f)</div><div class='add'>+	badr	lr, 1f</div><div class='ctx'> 	ret	r2</div><div class='ctx'> </div><div class='ctx'> 1:	ldr	lr, [sp]</div><div class='head'>diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S<br/>index 947567ff67f9..af2267f6a529 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/lib1funcs.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/lib/lib1funcs.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/lib/lib1funcs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/lib1funcs.S</a></div><div class='hunk'>@@ -167,7 +167,7 @@ Boston, MA 02111-1307, USA.  */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	@ Perform all needed substractions to keep only the reminder.</div><div class='add'>+	@ Perform all needed subtractions to keep only the reminder.</div><div class='ctx'> 	@ Do comparisons in batch of 4 first.</div><div class='ctx'> 	subs	\order, \order, #3		@ yes, 3 is intended here</div><div class='ctx'> 	blt	2f</div><div class='hunk'>@@ -189,7 +189,7 @@ Boston, MA 02111-1307, USA.  */</div><div class='ctx'> 	teqne	\dividend, #0</div><div class='ctx'> 	beq	5f</div><div class='ctx'> </div><div class='del'>-	@ Either 1, 2 or 3 comparison/substractions are left.</div><div class='add'>+	@ Either 1, 2 or 3 comparison/subtractions are left.</div><div class='ctx'> 2:	cmn	\order, #2</div><div class='ctx'> 	blt	4f</div><div class='ctx'> 	beq	3f</div><div class='head'>diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S<br/>index 7797e81e40e0..64111bd4440b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/memcpy.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/lib/memcpy.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/lib/memcpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/memcpy.S</a></div><div class='hunk'>@@ -61,8 +61,10 @@</div><div class='ctx'> </div><div class='ctx'> /* Prototype: void *memcpy(void *dest, const void *src, size_t n); */</div><div class='ctx'> </div><div class='add'>+ENTRY(mmiocpy)</div><div class='ctx'> ENTRY(memcpy)</div><div class='ctx'> </div><div class='ctx'> #include "copy_template.S"</div><div class='ctx'> </div><div class='ctx'> ENDPROC(memcpy)</div><div class='add'>+ENDPROC(mmiocpy)</div><div class='head'>diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S<br/>index a4ee97b5a2bf..3c65e3bd790f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/memset.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/lib/memset.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/lib/memset.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/lib/memset.S</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> 	.text</div><div class='ctx'> 	.align	5</div><div class='ctx'> </div><div class='add'>+ENTRY(mmioset)</div><div class='ctx'> ENTRY(memset)</div><div class='ctx'> UNWIND( .fnstart         )</div><div class='ctx'> 	ands	r3, r0, #3		@ 1 unaligned?</div><div class='hunk'>@@ -133,3 +134,4 @@ UNWIND( .fnstart            )</div><div class='ctx'> 	b	1b</div><div class='ctx'> UNWIND( .fnend   )</div><div class='ctx'> ENDPROC(memset)</div><div class='add'>+ENDPROC(mmioset)</div><div class='head'>diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile<br/>index 4fa8b4541e64..c5bbf8bb8c0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/Makefile</a></div><div class='hunk'>@@ -1,13 +1,8 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='del'>-ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include</div><div class='del'>-asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include</div><div class='del'>-</div><div class='ctx'> obj-y		:= soc.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_AT91SAM9)	+= sam9_smc.o</div><div class='del'>-</div><div class='ctx'> # CPU-specific support</div><div class='ctx'> obj-$(CONFIG_SOC_AT91RM9200)	+= at91rm9200.o</div><div class='ctx'> obj-$(CONFIG_SOC_AT91SAM9)	+= at91sam9.o</div><div class='head'>diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot<br/>deleted file mode 100644<br/>index 29ed0fa374ca..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile.boot?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/Makefile.boot</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-# Note: the following conditions must always be true:</div><div class='del'>-#   ZRELADDR == virt_to_phys(TEXTADDR)</div><div class='del'>-#   PARAMS_PHYS must be within 4MB of ZRELADDR</div><div class='del'>-#   INITRD_PHYS must be in RAM</div><div class='del'>-</div><div class='del'>-   zreladdr-y	+= 0x20008000</div><div class='del'>-params_phys-y	:= 0x20000100</div><div class='del'>-initrd_phys-y	:= 0x20410000</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h<br/>deleted file mode 100644<br/>index 493bc486e858..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91_ramc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/include/mach/at91_ramc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Header file for the Atmel RAM Controller</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='del'>- *</div><div class='del'>- * Under GPLv2 only</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __AT91_RAMC_H__</div><div class='del'>-#define __AT91_RAMC_H__</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-extern void __iomem *at91_ramc_base[];</div><div class='del'>-</div><div class='del'>-#define at91_ramc_read(id, field) \</div><div class='del'>-	__raw_readl(at91_ramc_base[id] + field)</div><div class='del'>-</div><div class='del'>-#define at91_ramc_write(id, field, value) \</div><div class='del'>-	__raw_writel(value, at91_ramc_base[id] + field)</div><div class='del'>-#else</div><div class='del'>-.extern at91_ramc_base</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#include &lt;soc/at91/at91rm9200_sdramc.h&gt;</div><div class='del'>-#include &lt;soc/at91/at91sam9_ddrsdr.h&gt;</div><div class='del'>-#include &lt;soc/at91/at91sam9_sdramc.h&gt;</div><div class='del'>-</div><div class='del'>-#endif /* __AT91_RAMC_H__ */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h<br/>deleted file mode 100644<br/>index aeaadfb452af..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91rm9200_mc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/include/mach/at91rm9200_mc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,116 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-at91/include/mach/at91rm9200_mc.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2005 Ivan Kokshaysky</div><div class='del'>- * Copyright (C) SAN People</div><div class='del'>- *</div><div class='del'>- * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.</div><div class='del'>- * Based on AT91RM9200 datasheet revision E.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef AT91RM9200_MC_H</div><div class='del'>-#define AT91RM9200_MC_H</div><div class='del'>-</div><div class='del'>-/* Memory Controller */</div><div class='del'>-#define AT91_MC_RCR		0x00			/* MC Remap Control Register */</div><div class='del'>-#define		AT91_MC_RCB		(1 &lt;&lt;  0)		/* Remap Command Bit */</div><div class='del'>-</div><div class='del'>-#define AT91_MC_ASR		0x04			/* MC Abort Status Register */</div><div class='del'>-#define		AT91_MC_UNADD		(1 &lt;&lt;  0)		/* Undefined Address Abort Status */</div><div class='del'>-#define		AT91_MC_MISADD		(1 &lt;&lt;  1)		/* Misaligned Address Abort Status */</div><div class='del'>-#define		AT91_MC_ABTSZ		(3 &lt;&lt;  8)		/* Abort Size Status */</div><div class='del'>-#define			AT91_MC_ABTSZ_BYTE		(0 &lt;&lt; 8)</div><div class='del'>-#define			AT91_MC_ABTSZ_HALFWORD		(1 &lt;&lt; 8)</div><div class='del'>-#define			AT91_MC_ABTSZ_WORD		(2 &lt;&lt; 8)</div><div class='del'>-#define		AT91_MC_ABTTYP		(3 &lt;&lt; 10)		/* Abort Type Status */</div><div class='del'>-#define			AT91_MC_ABTTYP_DATAREAD		(0 &lt;&lt; 10)</div><div class='del'>-#define			AT91_MC_ABTTYP_DATAWRITE	(1 &lt;&lt; 10)</div><div class='del'>-#define			AT91_MC_ABTTYP_FETCH		(2 &lt;&lt; 10)</div><div class='del'>-#define		AT91_MC_MST0		(1 &lt;&lt; 16)		/* ARM920T Abort Source */</div><div class='del'>-#define		AT91_MC_MST1		(1 &lt;&lt; 17)		/* PDC Abort Source */</div><div class='del'>-#define		AT91_MC_MST2		(1 &lt;&lt; 18)		/* UHP Abort Source */</div><div class='del'>-#define		AT91_MC_MST3		(1 &lt;&lt; 19)		/* EMAC Abort Source */</div><div class='del'>-#define		AT91_MC_SVMST0		(1 &lt;&lt; 24)		/* Saved ARM920T Abort Source */</div><div class='del'>-#define		AT91_MC_SVMST1		(1 &lt;&lt; 25)		/* Saved PDC Abort Source */</div><div class='del'>-#define		AT91_MC_SVMST2		(1 &lt;&lt; 26)		/* Saved UHP Abort Source */</div><div class='del'>-#define		AT91_MC_SVMST3		(1 &lt;&lt; 27)		/* Saved EMAC Abort Source */</div><div class='del'>-</div><div class='del'>-#define AT91_MC_AASR		0x08			/* MC Abort Address Status Register */</div><div class='del'>-</div><div class='del'>-#define AT91_MC_MPR		0x0c			/* MC Master Priority Register */</div><div class='del'>-#define		AT91_MPR_MSTP0		(7 &lt;&lt;  0)		/* ARM920T Priority */</div><div class='del'>-#define		AT91_MPR_MSTP1		(7 &lt;&lt;  4)		/* PDC Priority */</div><div class='del'>-#define		AT91_MPR_MSTP2		(7 &lt;&lt;  8)		/* UHP Priority */</div><div class='del'>-#define		AT91_MPR_MSTP3		(7 &lt;&lt; 12)		/* EMAC Priority */</div><div class='del'>-</div><div class='del'>-/* External Bus Interface (EBI) registers */</div><div class='del'>-#define AT91_EBI_CSA		0x60			/* Chip Select Assignment Register */</div><div class='del'>-#define		AT91_EBI_CS0A		(1 &lt;&lt; 0)		/* Chip Select 0 Assignment */</div><div class='del'>-#define			AT91_EBI_CS0A_SMC		(0 &lt;&lt; 0)</div><div class='del'>-#define			AT91_EBI_CS0A_BFC		(1 &lt;&lt; 0)</div><div class='del'>-#define		AT91_EBI_CS1A		(1 &lt;&lt; 1)		/* Chip Select 1 Assignment */</div><div class='del'>-#define			AT91_EBI_CS1A_SMC		(0 &lt;&lt; 1)</div><div class='del'>-#define			AT91_EBI_CS1A_SDRAMC		(1 &lt;&lt; 1)</div><div class='del'>-#define		AT91_EBI_CS3A		(1 &lt;&lt; 3)		/* Chip Select 2 Assignment */</div><div class='del'>-#define			AT91_EBI_CS3A_SMC		(0 &lt;&lt; 3)</div><div class='del'>-#define			AT91_EBI_CS3A_SMC_SMARTMEDIA	(1 &lt;&lt; 3)</div><div class='del'>-#define		AT91_EBI_CS4A		(1 &lt;&lt; 4)		/* Chip Select 3 Assignment */</div><div class='del'>-#define			AT91_EBI_CS4A_SMC		(0 &lt;&lt; 4)</div><div class='del'>-#define			AT91_EBI_CS4A_SMC_COMPACTFLASH	(1 &lt;&lt; 4)</div><div class='del'>-#define AT91_EBI_CFGR		(AT91_MC + 0x64)	/* Configuration Register */</div><div class='del'>-#define		AT91_EBI_DBPUC		(1 &lt;&lt; 0)		/* Data Bus Pull-Up Configuration */</div><div class='del'>-</div><div class='del'>-/* Static Memory Controller (SMC) registers */</div><div class='del'>-#define	AT91_SMC_CSR(n)		(0x70 + ((n) * 4))	/* SMC Chip Select Register */</div><div class='del'>-#define		AT91_SMC_NWS		(0x7f &lt;&lt;  0)		/* Number of Wait States */</div><div class='del'>-#define			AT91_SMC_NWS_(x)	((x) &lt;&lt; 0)</div><div class='del'>-#define		AT91_SMC_WSEN		(1    &lt;&lt;  7)		/* Wait State Enable */</div><div class='del'>-#define		AT91_SMC_TDF		(0xf  &lt;&lt;  8)		/* Data Float Time */</div><div class='del'>-#define			AT91_SMC_TDF_(x)	((x) &lt;&lt; 8)</div><div class='del'>-#define		AT91_SMC_BAT		(1    &lt;&lt; 12)		/* Byte Access Type */</div><div class='del'>-#define		AT91_SMC_DBW		(3    &lt;&lt; 13)		/* Data Bus Width */</div><div class='del'>-#define			AT91_SMC_DBW_16		(1 &lt;&lt; 13)</div><div class='del'>-#define			AT91_SMC_DBW_8		(2 &lt;&lt; 13)</div><div class='del'>-#define		AT91_SMC_DPR		(1 &lt;&lt; 15)		/* Data Read Protocol */</div><div class='del'>-#define		AT91_SMC_ACSS		(3 &lt;&lt; 16)		/* Address to Chip Select Setup */</div><div class='del'>-#define			AT91_SMC_ACSS_STD	(0 &lt;&lt; 16)</div><div class='del'>-#define			AT91_SMC_ACSS_1		(1 &lt;&lt; 16)</div><div class='del'>-#define			AT91_SMC_ACSS_2		(2 &lt;&lt; 16)</div><div class='del'>-#define			AT91_SMC_ACSS_3		(3 &lt;&lt; 16)</div><div class='del'>-#define		AT91_SMC_RWSETUP	(7 &lt;&lt; 24)		/* Read &amp; Write Signal Time Setup */</div><div class='del'>-#define			AT91_SMC_RWSETUP_(x)	((x) &lt;&lt; 24)</div><div class='del'>-#define		AT91_SMC_RWHOLD		(7 &lt;&lt; 28)		/* Read &amp; Write Signal Hold Time */</div><div class='del'>-#define			AT91_SMC_RWHOLD_(x)	((x) &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-/* Burst Flash Controller register */</div><div class='del'>-#define AT91_BFC_MR		0xc0			/* Mode Register */</div><div class='del'>-#define		AT91_BFC_BFCOM		(3   &lt;&lt;  0)		/* Burst Flash Controller Operating Mode */</div><div class='del'>-#define			AT91_BFC_BFCOM_DISABLED	(0 &lt;&lt; 0)</div><div class='del'>-#define			AT91_BFC_BFCOM_ASYNC	(1 &lt;&lt; 0)</div><div class='del'>-#define			AT91_BFC_BFCOM_BURST	(2 &lt;&lt; 0)</div><div class='del'>-#define		AT91_BFC_BFCC		(3   &lt;&lt;  2)		/* Burst Flash Controller Clock */</div><div class='del'>-#define			AT91_BFC_BFCC_MCK	(1 &lt;&lt; 2)</div><div class='del'>-#define			AT91_BFC_BFCC_DIV2	(2 &lt;&lt; 2)</div><div class='del'>-#define			AT91_BFC_BFCC_DIV4	(3 &lt;&lt; 2)</div><div class='del'>-#define		AT91_BFC_AVL		(0xf &lt;&lt;  4)		/* Address Valid Latency */</div><div class='del'>-#define		AT91_BFC_PAGES		(7   &lt;&lt;  8)		/* Page Size */</div><div class='del'>-#define			AT91_BFC_PAGES_NO_PAGE	(0 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_16	(1 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_32	(2 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_64	(3 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_128	(4 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_256	(5 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_512	(6 &lt;&lt; 8)</div><div class='del'>-#define			AT91_BFC_PAGES_1024	(7 &lt;&lt; 8)</div><div class='del'>-#define		AT91_BFC_OEL		(3   &lt;&lt; 12)		/* Output Enable Latency */</div><div class='del'>-#define		AT91_BFC_BAAEN		(1   &lt;&lt; 16)		/* Burst Address Advance Enable */</div><div class='del'>-#define		AT91_BFC_BFOEH		(1   &lt;&lt; 17)		/* Burst Flash Output Enable Handling */</div><div class='del'>-#define		AT91_BFC_MUXEN		(1   &lt;&lt; 18)		/* Multiplexed Bus Enable */</div><div class='del'>-#define		AT91_BFC_RDYEN		(1   &lt;&lt; 19)		/* Ready Enable Mode */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h<br/>deleted file mode 100644<br/>index ff54a0ce90e3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9_smc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/include/mach/at91sam9_smc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-at91/include/mach/at91sam9_smc.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2007 Andrew Victor</div><div class='del'>- * Copyright (C) 2007 Atmel Corporation.</div><div class='del'>- *</div><div class='del'>- * Static Memory Controllers (SMC) - System peripherals registers.</div><div class='del'>- * Based on AT91SAM9261 datasheet revision D.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef AT91SAM9_SMC_H</div><div class='del'>-#define AT91SAM9_SMC_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-struct sam9_smc_config {</div><div class='del'>-	/* Setup register */</div><div class='del'>-	u8 ncs_read_setup;</div><div class='del'>-	u8 nrd_setup;</div><div class='del'>-	u8 ncs_write_setup;</div><div class='del'>-	u8 nwe_setup;</div><div class='del'>-</div><div class='del'>-	/* Pulse register */</div><div class='del'>-	u8 ncs_read_pulse;</div><div class='del'>-	u8 nrd_pulse;</div><div class='del'>-	u8 ncs_write_pulse;</div><div class='del'>-	u8 nwe_pulse;</div><div class='del'>-</div><div class='del'>-	/* Cycle register */</div><div class='del'>-	u16 read_cycle;</div><div class='del'>-	u16 write_cycle;</div><div class='del'>-</div><div class='del'>-	/* Mode register */</div><div class='del'>-	u32 mode;</div><div class='del'>-	u8 tdf_cycles:4;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);</div><div class='del'>-extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);</div><div class='del'>-extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);</div><div class='del'>-extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define AT91_SMC_SETUP		0x00				/* Setup Register for CS n */</div><div class='del'>-#define		AT91_SMC_NWESETUP	(0x3f &lt;&lt; 0)			/* NWE Setup Length */</div><div class='del'>-#define			AT91_SMC_NWESETUP_(x)	((x) &lt;&lt; 0)</div><div class='del'>-#define		AT91_SMC_NCS_WRSETUP	(0x3f &lt;&lt; 8)			/* NCS Setup Length in Write Access */</div><div class='del'>-#define			AT91_SMC_NCS_WRSETUP_(x)	((x) &lt;&lt; 8)</div><div class='del'>-#define		AT91_SMC_NRDSETUP	(0x3f &lt;&lt; 16)			/* NRD Setup Length */</div><div class='del'>-#define			AT91_SMC_NRDSETUP_(x)	((x) &lt;&lt; 16)</div><div class='del'>-#define		AT91_SMC_NCS_RDSETUP	(0x3f &lt;&lt; 24)			/* NCS Setup Length in Read Access */</div><div class='del'>-#define			AT91_SMC_NCS_RDSETUP_(x)	((x) &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define AT91_SMC_PULSE		0x04				/* Pulse Register for CS n */</div><div class='del'>-#define		AT91_SMC_NWEPULSE	(0x7f &lt;&lt;  0)			/* NWE Pulse Length */</div><div class='del'>-#define			AT91_SMC_NWEPULSE_(x)	((x) &lt;&lt; 0)</div><div class='del'>-#define		AT91_SMC_NCS_WRPULSE	(0x7f &lt;&lt;  8)			/* NCS Pulse Length in Write Access */</div><div class='del'>-#define			AT91_SMC_NCS_WRPULSE_(x)((x) &lt;&lt; 8)</div><div class='del'>-#define		AT91_SMC_NRDPULSE	(0x7f &lt;&lt; 16)			/* NRD Pulse Length */</div><div class='del'>-#define			AT91_SMC_NRDPULSE_(x)	((x) &lt;&lt; 16)</div><div class='del'>-#define		AT91_SMC_NCS_RDPULSE	(0x7f &lt;&lt; 24)			/* NCS Pulse Length in Read Access */</div><div class='del'>-#define			AT91_SMC_NCS_RDPULSE_(x)((x) &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define AT91_SMC_CYCLE		0x08				/* Cycle Register for CS n */</div><div class='del'>-#define		AT91_SMC_NWECYCLE	(0x1ff &lt;&lt; 0 )			/* Total Write Cycle Length */</div><div class='del'>-#define			AT91_SMC_NWECYCLE_(x)	((x) &lt;&lt; 0)</div><div class='del'>-#define		AT91_SMC_NRDCYCLE	(0x1ff &lt;&lt; 16)			/* Total Read Cycle Length */</div><div class='del'>-#define			AT91_SMC_NRDCYCLE_(x)	((x) &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define AT91_SMC_MODE		0x0c				/* Mode Register for CS n */</div><div class='del'>-#define		AT91_SMC_READMODE	(1 &lt;&lt;  0)			/* Read Mode */</div><div class='del'>-#define		AT91_SMC_WRITEMODE	(1 &lt;&lt;  1)			/* Write Mode */</div><div class='del'>-#define		AT91_SMC_EXNWMODE	(3 &lt;&lt;  4)			/* NWAIT Mode */</div><div class='del'>-#define			AT91_SMC_EXNWMODE_DISABLE	(0 &lt;&lt; 4)</div><div class='del'>-#define			AT91_SMC_EXNWMODE_FROZEN	(2 &lt;&lt; 4)</div><div class='del'>-#define			AT91_SMC_EXNWMODE_READY		(3 &lt;&lt; 4)</div><div class='del'>-#define		AT91_SMC_BAT		(1 &lt;&lt;  8)			/* Byte Access Type */</div><div class='del'>-#define			AT91_SMC_BAT_SELECT		(0 &lt;&lt; 8)</div><div class='del'>-#define			AT91_SMC_BAT_WRITE		(1 &lt;&lt; 8)</div><div class='del'>-#define		AT91_SMC_DBW		(3 &lt;&lt; 12)			/* Data Bus Width */</div><div class='del'>-#define			AT91_SMC_DBW_8			(0 &lt;&lt; 12)</div><div class='del'>-#define			AT91_SMC_DBW_16			(1 &lt;&lt; 12)</div><div class='del'>-#define			AT91_SMC_DBW_32			(2 &lt;&lt; 12)</div><div class='del'>-#define		AT91_SMC_TDF		(0xf &lt;&lt; 16)			/* Data Float Time. */</div><div class='del'>-#define			AT91_SMC_TDF_(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define		AT91_SMC_TDFMODE	(1 &lt;&lt; 20)			/* TDF Optimization - Enabled */</div><div class='del'>-#define		AT91_SMC_PMEN		(1 &lt;&lt; 24)			/* Page Mode Enabled */</div><div class='del'>-#define		AT91_SMC_PS		(3 &lt;&lt; 28)			/* Page Size */</div><div class='del'>-#define			AT91_SMC_PS_4			(0 &lt;&lt; 28)</div><div class='del'>-#define			AT91_SMC_PS_8			(1 &lt;&lt; 28)</div><div class='del'>-#define			AT91_SMC_PS_16			(2 &lt;&lt; 28)</div><div class='del'>-#define			AT91_SMC_PS_32			(3 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c<br/>index 5062699cbb12..e24df77abd79 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm.c</a></div><div class='hunk'>@@ -233,7 +233,7 @@ static void at91_pm_set_standby(void (*at91_standby)(void))</div><div class='ctx'>  */</div><div class='ctx'> static void at91rm9200_standby(void)</div><div class='ctx'> {</div><div class='del'>-	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);</div><div class='add'>+	u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"b    1f\n\t"</div><div class='hunk'>@@ -244,8 +244,8 @@ static void at91rm9200_standby(void)</div><div class='ctx'> 		"    mcr    p15, 0, %0, c7, c0, 4\n\t"</div><div class='ctx'> 		"    str    %5, [%1, %2]"</div><div class='ctx'> 		:</div><div class='del'>-		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),</div><div class='del'>-		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),</div><div class='add'>+		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR),</div><div class='add'>+		  "r" (1), "r" (AT91_MC_SDRAMC_SRR),</div><div class='ctx'> 		  "r" (lpr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -369,7 +369,7 @@ static void __init at91_pm_sram_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sram_pool = dev_get_gen_pool(&amp;pdev-&gt;dev);</div><div class='add'>+	sram_pool = gen_pool_get(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!sram_pool) {</div><div class='ctx'> 		pr_warn("%s: sram pool unavailable!\n", __func__);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -414,7 +414,7 @@ void __init at91rm9200_pm_init(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.</div><div class='ctx'> 	 */</div><div class='del'>-	at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);</div><div class='add'>+	at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);</div><div class='ctx'> </div><div class='ctx'> 	at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;</div><div class='ctx'> 	at91_pm_data.memctrl = AT91_MEMCTRL_MC;</div><div class='head'>diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h<br/>index ecd875a91d52..3fcf8810f14e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/pm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm.h</a></div><div class='hunk'>@@ -13,7 +13,19 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/proc-fns.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/at91_ramc.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon/atmel-mc.h&gt;</div><div class='add'>+#include &lt;soc/at91/at91sam9_ddrsdr.h&gt;</div><div class='add'>+#include &lt;soc/at91/at91sam9_sdramc.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+extern void __iomem *at91_ramc_base[];</div><div class='add'>+</div><div class='add'>+#define at91_ramc_read(id, field) \</div><div class='add'>+	__raw_readl(at91_ramc_base[id] + field)</div><div class='add'>+</div><div class='add'>+#define at91_ramc_write(id, field, value) \</div><div class='add'>+	__raw_writel(value, at91_ramc_base[id] + field)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #define AT91_MEMCTRL_MC		0</div><div class='ctx'> #define AT91_MEMCTRL_SDRAMC	1</div><div class='head'>diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S<br/>index bd22b2c8a051..0d95f488b47a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm_suspend.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/pm_suspend.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm_suspend.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-at91/pm_suspend.S</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/clk/at91_pmc.h&gt;</div><div class='del'>-#include &lt;mach/at91_ramc.h&gt;</div><div class='ctx'> #include "pm.h"</div><div class='ctx'> </div><div class='ctx'> #define	SRAMC_SELF_FRESH_ACTIVE		0x01</div><div class='hunk'>@@ -216,7 +215,7 @@ ENTRY(at91_sramc_self_refresh)</div><div class='ctx'> </div><div class='ctx'> 	/* Active SDRAM self-refresh mode */</div><div class='ctx'> 	mov	r3, #1</div><div class='del'>-	str	r3, [r2, #AT91RM9200_SDRAMC_SRR]</div><div class='add'>+	str	r3, [r2, #AT91_MC_SDRAMC_SRR]</div><div class='ctx'> 	b	exit_sramc_sf</div><div class='ctx'> </div><div class='ctx'> ddrc_sf:</div><div class='head'>diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c<br/>deleted file mode 100644<br/>index 826315af6d11..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/sam9_smc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/sam9_smc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,136 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-at91/sam9_smc.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008 Andrew Victor</div><div class='del'>- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/at91sam9_smc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sam9_smc.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x10))</div><div class='del'>-</div><div class='del'>-static void __iomem *smc_base_addr[2];</div><div class='del'>-</div><div class='del'>-static void sam9_smc_cs_write_mode(void __iomem *base,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(config-&gt;mode</div><div class='del'>-		   | AT91_SMC_TDF_(config-&gt;tdf_cycles),</div><div class='del'>-		   base + AT91_SMC_MODE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sam9_smc_write_mode(int id, int cs,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sam9_smc_write_mode);</div><div class='del'>-</div><div class='del'>-static void sam9_smc_cs_configure(void __iomem *base,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	/* Setup register */</div><div class='del'>-	__raw_writel(AT91_SMC_NWESETUP_(config-&gt;nwe_setup)</div><div class='del'>-		   | AT91_SMC_NCS_WRSETUP_(config-&gt;ncs_write_setup)</div><div class='del'>-		   | AT91_SMC_NRDSETUP_(config-&gt;nrd_setup)</div><div class='del'>-		   | AT91_SMC_NCS_RDSETUP_(config-&gt;ncs_read_setup),</div><div class='del'>-		   base + AT91_SMC_SETUP);</div><div class='del'>-</div><div class='del'>-	/* Pulse register */</div><div class='del'>-	__raw_writel(AT91_SMC_NWEPULSE_(config-&gt;nwe_pulse)</div><div class='del'>-		   | AT91_SMC_NCS_WRPULSE_(config-&gt;ncs_write_pulse)</div><div class='del'>-		   | AT91_SMC_NRDPULSE_(config-&gt;nrd_pulse)</div><div class='del'>-		   | AT91_SMC_NCS_RDPULSE_(config-&gt;ncs_read_pulse),</div><div class='del'>-		   base + AT91_SMC_PULSE);</div><div class='del'>-</div><div class='del'>-	/* Cycle register */</div><div class='del'>-	__raw_writel(AT91_SMC_NWECYCLE_(config-&gt;write_cycle)</div><div class='del'>-		   | AT91_SMC_NRDCYCLE_(config-&gt;read_cycle),</div><div class='del'>-		   base + AT91_SMC_CYCLE);</div><div class='del'>-</div><div class='del'>-	/* Mode register */</div><div class='del'>-	sam9_smc_cs_write_mode(base, config);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sam9_smc_configure(int id, int cs,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sam9_smc_configure);</div><div class='del'>-</div><div class='del'>-static void sam9_smc_cs_read_mode(void __iomem *base,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	u32 val = __raw_readl(base + AT91_SMC_MODE);</div><div class='del'>-</div><div class='del'>-	config-&gt;mode = (val &amp; ~AT91_SMC_NWECYCLE);</div><div class='del'>-	config-&gt;tdf_cycles = (val &amp; AT91_SMC_NWECYCLE) &gt;&gt; 16 ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sam9_smc_read_mode(int id, int cs,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sam9_smc_read_mode);</div><div class='del'>-</div><div class='del'>-static void sam9_smc_cs_read(void __iomem *base,</div><div class='del'>-					struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	/* Setup register */</div><div class='del'>-	val = __raw_readl(base + AT91_SMC_SETUP);</div><div class='del'>-</div><div class='del'>-	config-&gt;nwe_setup = val &amp; AT91_SMC_NWESETUP;</div><div class='del'>-	config-&gt;ncs_write_setup = (val &amp; AT91_SMC_NCS_WRSETUP) &gt;&gt; 8;</div><div class='del'>-	config-&gt;nrd_setup = (val &amp; AT91_SMC_NRDSETUP) &gt;&gt; 16;</div><div class='del'>-	config-&gt;ncs_read_setup = (val &amp; AT91_SMC_NCS_RDSETUP) &gt;&gt; 24;</div><div class='del'>-</div><div class='del'>-	/* Pulse register */</div><div class='del'>-	val = __raw_readl(base + AT91_SMC_PULSE);</div><div class='del'>-</div><div class='del'>-	config-&gt;nwe_pulse = val &amp; AT91_SMC_NWEPULSE;</div><div class='del'>-	config-&gt;ncs_write_pulse = (val &amp; AT91_SMC_NCS_WRPULSE) &gt;&gt; 8;</div><div class='del'>-	config-&gt;nrd_pulse = (val &amp; AT91_SMC_NRDPULSE) &gt;&gt; 16;</div><div class='del'>-	config-&gt;ncs_read_pulse = (val &amp; AT91_SMC_NCS_RDPULSE) &gt;&gt; 24;</div><div class='del'>-</div><div class='del'>-	/* Cycle register */</div><div class='del'>-	val = __raw_readl(base + AT91_SMC_CYCLE);</div><div class='del'>-</div><div class='del'>-	config-&gt;write_cycle = val &amp; AT91_SMC_NWECYCLE;</div><div class='del'>-	config-&gt;read_cycle = (val &amp; AT91_SMC_NRDCYCLE) &gt;&gt; 16;</div><div class='del'>-</div><div class='del'>-	/* Mode register */</div><div class='del'>-	sam9_smc_cs_read_mode(base, config);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)</div><div class='del'>-{</div><div class='del'>-	sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init at91sam9_ioremap_smc(int id, u32 addr)</div><div class='del'>-{</div><div class='del'>-	if (id &gt; 1) {</div><div class='del'>-		pr_warn("%s: id &gt; 2\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	smc_base_addr[id] = ioremap(addr, 512);</div><div class='del'>-	if (!smc_base_addr[id])</div><div class='del'>-		pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h<br/>deleted file mode 100644<br/>index 3e52dcd4a59f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/sam9_smc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-at91/sam9_smc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-at91/sam9_smc.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008 Andrew Victor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern void __init at91sam9_ioremap_smc(int id, u32 addr);</div><div class='head'>diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig<br/>index 8b11f44bb36e..0ac9e4b3b265 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/Kconfig</a></div><div class='hunk'>@@ -144,6 +144,7 @@ config ARCH_BRCMSTB</div><div class='ctx'> 	select BRCMSTB_GISB_ARB</div><div class='ctx'> 	select BRCMSTB_L2_IRQ</div><div class='ctx'> 	select BCM7120_L2_IRQ</div><div class='add'>+	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y if you intend to run the kernel on a Broadcom ARM-based STB</div><div class='ctx'> 	  chipset.</div><div class='head'>diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile<br/>index 4c38674c73ec..4fb0da458e91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/Makefile</a></div><div class='hunk'>@@ -38,10 +38,15 @@ obj-$(CONFIG_ARCH_BCM2835)	+= board_bcm2835.o</div><div class='ctx'> obj-$(CONFIG_ARCH_BCM_5301X)	+= bcm_5301x.o</div><div class='ctx'> </div><div class='ctx'> # BCM63XXx</div><div class='del'>-obj-$(CONFIG_ARCH_BCM_63XX)	:= bcm63xx.o</div><div class='add'>+ifeq ($(CONFIG_ARCH_BCM_63XX),y)</div><div class='add'>+CFLAGS_bcm63xx_headsmp.o	+= -march=armv7-a</div><div class='add'>+obj-y				+= bcm63xx.o</div><div class='add'>+obj-$(CONFIG_SMP)		+= bcm63xx_smp.o bcm63xx_headsmp.o \</div><div class='add'>+				   bcm63xx_pmb.o</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_ARCH_BRCMSTB),y)</div><div class='ctx'> CFLAGS_platsmp-brcmstb.o	+= -march=armv7-a</div><div class='ctx'> obj-y				+= brcmstb.o</div><div class='del'>-obj-$(CONFIG_SMP)		+= headsmp-brcmstb.o platsmp-brcmstb.o</div><div class='add'>+obj-$(CONFIG_SMP)		+= platsmp-brcmstb.o</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/mach-bcm/bcm63xx_headsmp.S b/arch/arm/mach-bcm/bcm63xx_headsmp.S<br/>new file mode 100644<br/>index 000000000000..c7af397c7f14<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm63xx_headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_headsmp.S</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2015, Broadcom Corporation</div><div class='add'>+ *  All Rights Reserved</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;asm/assembler.h&gt;</div><div class='add'>+</div><div class='add'>+ENTRY(bcm63138_secondary_startup)</div><div class='add'>+ ARM_BE8(setend	be)</div><div class='add'>+	/*</div><div class='add'>+	 * L1 cache does have unpredictable contents at power-up clean its</div><div class='add'>+	 * contents without flushing</div><div class='add'>+	 */</div><div class='add'>+	bl      v7_invalidate_l1</div><div class='add'>+	nop</div><div class='add'>+</div><div class='add'>+	b	secondary_startup</div><div class='add'>+ENDPROC(bcm63138_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-bcm/bcm63xx_pmb.c b/arch/arm/mach-bcm/bcm63xx_pmb.c<br/>new file mode 100644<br/>index 000000000000..de061ec5a479<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm63xx_pmb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_pmb.c</a></div><div class='hunk'>@@ -0,0 +1,221 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM63138 PMB initialization for secondary CPU(s)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Broadcom Corporation</div><div class='add'>+ * Author: Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/reset/bcm63xx_pmb.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bcm63xx_smp.h"</div><div class='add'>+</div><div class='add'>+/* ARM Control register definitions */</div><div class='add'>+#define CORE_PWR_CTRL_SHIFT	0</div><div class='add'>+#define CORE_PWR_CTRL_MASK	0x3</div><div class='add'>+#define PLL_PWR_ON		BIT(8)</div><div class='add'>+#define PLL_LDO_PWR_ON		BIT(9)</div><div class='add'>+#define PLL_CLAMP_ON		BIT(10)</div><div class='add'>+#define CPU_RESET_N(x)		BIT(13 + (x))</div><div class='add'>+#define NEON_RESET_N		BIT(15)</div><div class='add'>+#define PWR_CTRL_STATUS_SHIFT	28</div><div class='add'>+#define PWR_CTRL_STATUS_MASK	0x3</div><div class='add'>+#define PWR_DOWN_SHIFT		30</div><div class='add'>+#define PWR_DOWN_MASK		0x3</div><div class='add'>+</div><div class='add'>+/* CPU Power control register definitions */</div><div class='add'>+#define MEM_PWR_OK		BIT(0)</div><div class='add'>+#define MEM_PWR_ON		BIT(1)</div><div class='add'>+#define MEM_CLAMP_ON		BIT(2)</div><div class='add'>+#define MEM_PWR_OK_STATUS	BIT(4)</div><div class='add'>+#define MEM_PWR_ON_STATUS	BIT(5)</div><div class='add'>+#define MEM_PDA_SHIFT		8</div><div class='add'>+#define MEM_PDA_MASK		0xf</div><div class='add'>+#define  MEM_PDA_CPU_MASK	0x1</div><div class='add'>+#define  MEM_PDA_NEON_MASK	0xf</div><div class='add'>+#define CLAMP_ON		BIT(15)</div><div class='add'>+#define PWR_OK_SHIFT		16</div><div class='add'>+#define PWR_OK_MASK		0xf</div><div class='add'>+#define PWR_ON_SHIFT		20</div><div class='add'>+#define  PWR_CPU_MASK		0x03</div><div class='add'>+#define  PWR_NEON_MASK		0x01</div><div class='add'>+#define PWR_ON_MASK		0xf</div><div class='add'>+#define PWR_OK_STATUS_SHIFT	24</div><div class='add'>+#define PWR_OK_STATUS_MASK	0xf</div><div class='add'>+#define PWR_ON_STATUS_SHIFT	28</div><div class='add'>+#define PWR_ON_STATUS_MASK	0xf</div><div class='add'>+</div><div class='add'>+#define ARM_CONTROL		0x30</div><div class='add'>+#define ARM_PWR_CONTROL_BASE	0x34</div><div class='add'>+#define ARM_PWR_CONTROL(x)	(ARM_PWR_CONTROL_BASE + (x) * 0x4)</div><div class='add'>+#define ARM_NEON_L2		0x3c</div><div class='add'>+</div><div class='add'>+/* Perform a value write, then spin until the value shifted by</div><div class='add'>+ * shift is seen, masked with mask and is different from cond.</div><div class='add'>+ */</div><div class='add'>+static int bpcm_wr_rd_mask(void __iomem *master,</div><div class='add'>+			   unsigned int addr, u32 off, u32 *val,</div><div class='add'>+			   u32 shift, u32 mask, u32 cond)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr(master, addr, off, *val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = bpcm_rd(master, addr, off, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		cpu_relax();</div><div class='add'>+	} while (((*val &gt;&gt; shift) &amp; mask) != cond);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Global lock to serialize accesses to the PMB registers while we</div><div class='add'>+ * are bringing up the secondary CPU</div><div class='add'>+ */</div><div class='add'>+static DEFINE_SPINLOCK(pmb_lock);</div><div class='add'>+</div><div class='add'>+static int bcm63xx_pmb_get_resources(struct device_node *dn,</div><div class='add'>+				     void __iomem **base,</div><div class='add'>+				     unsigned int *cpu,</div><div class='add'>+				     unsigned int *addr)</div><div class='add'>+{</div><div class='add'>+	struct device_node *pmb_dn;</div><div class='add'>+	struct of_phandle_args args;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(dn, "reg", cpu);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("CPU is missing a reg node\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_parse_phandle_with_args(dn, "resets", "#reset-cells",</div><div class='add'>+					 0, &amp;args);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("CPU is missing a resets phandle\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmb_dn = args.np;</div><div class='add'>+	if (args.args_count != 2) {</div><div class='add'>+		pr_err("reset-controller does not conform to reset-cells\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*base = of_iomap(args.np, 0);</div><div class='add'>+	if (!*base) {</div><div class='add'>+		pr_err("failed remapping PMB register\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We do not need the number of zones */</div><div class='add'>+	*addr = args.args[0];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm63xx_pmb_power_on_cpu(struct device_node *dn)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	unsigned int cpu, addr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 val, ctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bcm63xx_pmb_get_resources(dn, &amp;base, &amp;cpu, &amp;addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* We would not know how to enable a third and greater CPU */</div><div class='add'>+	WARN_ON(cpu &gt; 1);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pmb_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Check if the CPU is already on and save the ARM_CONTROL register</div><div class='add'>+	 * value since we will use it later for CPU de-assert once done with</div><div class='add'>+	 * the CPU-specific power sequence</div><div class='add'>+	 */</div><div class='add'>+	ret = bpcm_rd(base, addr, ARM_CONTROL, &amp;ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (ctrl &amp; CPU_RESET_N(cpu)) {</div><div class='add'>+		pr_info("PMB: CPU%d is already powered on\n", cpu);</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Power on PLL */</div><div class='add'>+	ret = bpcm_rd(base, addr, ARM_PWR_CONTROL(cpu), &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val |= (PWR_CPU_MASK &lt;&lt; PWR_ON_SHIFT);</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr_rd_mask(base, addr, ARM_PWR_CONTROL(cpu), &amp;val,</div><div class='add'>+			PWR_ON_STATUS_SHIFT, PWR_CPU_MASK, PWR_CPU_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val |= (PWR_CPU_MASK &lt;&lt; PWR_OK_SHIFT);</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr_rd_mask(base, addr, ARM_PWR_CONTROL(cpu), &amp;val,</div><div class='add'>+			PWR_OK_STATUS_SHIFT, PWR_CPU_MASK, PWR_CPU_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~CLAMP_ON;</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr(base, addr, ARM_PWR_CONTROL(cpu), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Power on CPU&lt;N&gt; RAM */</div><div class='add'>+	val &amp;= ~(MEM_PDA_MASK &lt;&lt; MEM_PDA_SHIFT);</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr(base, addr, ARM_PWR_CONTROL(cpu), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val |= MEM_PWR_ON;</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr_rd_mask(base, addr, ARM_PWR_CONTROL(cpu), &amp;val,</div><div class='add'>+			0, MEM_PWR_ON_STATUS, MEM_PWR_ON_STATUS);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val |= MEM_PWR_OK;</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr_rd_mask(base, addr, ARM_PWR_CONTROL(cpu), &amp;val,</div><div class='add'>+			0, MEM_PWR_OK_STATUS, MEM_PWR_OK_STATUS);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MEM_CLAMP_ON;</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr(base, addr, ARM_PWR_CONTROL(cpu), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* De-assert CPU reset */</div><div class='add'>+	ctrl |= CPU_RESET_N(cpu);</div><div class='add'>+</div><div class='add'>+	ret = bpcm_wr(base, addr, ARM_CONTROL, ctrl);</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_irqrestore(&amp;pmb_lock, flags);</div><div class='add'>+	iounmap(base);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-bcm/bcm63xx_smp.c b/arch/arm/mach-bcm/bcm63xx_smp.c<br/>new file mode 100644<br/>index 000000000000..3f014f18cea5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm63xx_smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_smp.c</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+/*</div><div class='add'>+ * Broadcom BCM63138 DSL SoCs SMP support code</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Broadcom Corporation</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the terms of the GPLv2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/smp_scu.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='add'>+#include &lt;asm/vfp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bcm63xx_smp.h"</div><div class='add'>+</div><div class='add'>+/* Size of mapped Cortex A9 SCU address space */</div><div class='add'>+#define CORTEX_A9_SCU_SIZE	0x58</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable the Cortex A9 Snoop Control Unit</div><div class='add'>+ *</div><div class='add'>+ * By the time this is called we already know there are multiple</div><div class='add'>+ * cores present.  We assume we're running on a Cortex A9 processor,</div><div class='add'>+ * so any trouble getting the base address register or getting the</div><div class='add'>+ * SCU base is a problem.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 if successful or an error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int __init scu_a9_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long config_base;</div><div class='add'>+	void __iomem *scu_base;</div><div class='add'>+	unsigned int i, ncores;</div><div class='add'>+</div><div class='add'>+	if (!scu_a9_has_base()) {</div><div class='add'>+		pr_err("no configuration base address register!\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Config base address register value is zero for uniprocessor */</div><div class='add'>+	config_base = scu_a9_get_base();</div><div class='add'>+	if (!config_base) {</div><div class='add'>+		pr_err("hardware reports only one core\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE);</div><div class='add'>+	if (!scu_base) {</div><div class='add'>+		pr_err("failed to remap config base (%lu/%u) for SCU\n",</div><div class='add'>+			config_base, CORTEX_A9_SCU_SIZE);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scu_enable(scu_base);</div><div class='add'>+</div><div class='add'>+	ncores = scu_base ? scu_get_core_count(scu_base) : 1;</div><div class='add'>+</div><div class='add'>+	if (ncores &gt; nr_cpu_ids) {</div><div class='add'>+		pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",</div><div class='add'>+				ncores, nr_cpu_ids);</div><div class='add'>+		ncores = nr_cpu_ids;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The BCM63138 SoC has two Cortex-A9 CPUs, CPU0 features a complete</div><div class='add'>+	 * and fully functional VFP unit that can be used, but CPU1 does not.</div><div class='add'>+	 * Since we will not be able to trap kernel-mode NEON to force</div><div class='add'>+	 * migration to CPU0, just do not advertise VFP support at all.</div><div class='add'>+	 *</div><div class='add'>+	 * This will make vfp_init bail out and do not attempt to use VFP at</div><div class='add'>+	 * all, for kernel-mode NEON, we do not want to introduce any</div><div class='add'>+	 * conditionals in hot-paths, so we just restrict the system to UP.</div><div class='add'>+	 */</div><div class='add'>+#ifdef CONFIG_VFP</div><div class='add'>+	if (ncores &gt; 1) {</div><div class='add'>+		pr_warn("SMP: secondary CPUs lack VFP unit, disabling VFP\n");</div><div class='add'>+		vfp_disable();</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KERNEL_MODE_NEON</div><div class='add'>+		WARN(1, "SMP: kernel-mode NEON enabled, restricting to UP\n");</div><div class='add'>+		ncores = 1;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ncores; i++)</div><div class='add'>+		set_cpu_possible(i, true);</div><div class='add'>+</div><div class='add'>+	iounmap(scu_base);	/* That's the last we'll need of this */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bcm63138_bootlut_ids[] = {</div><div class='add'>+	{ .compatible = "brcm,bcm63138-bootlut", },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BOOTLUT_RESET_VECT	0x20</div><div class='add'>+</div><div class='add'>+static int bcm63138_smp_boot_secondary(unsigned int cpu,</div><div class='add'>+				       struct task_struct *idle)</div><div class='add'>+{</div><div class='add'>+	void __iomem *bootlut_base;</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	dn = of_find_matching_node(NULL, bcm63138_bootlut_ids);</div><div class='add'>+	if (!dn) {</div><div class='add'>+		pr_err("SMP: unable to find bcm63138 boot LUT node\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bootlut_base = of_iomap(dn, 0);</div><div class='add'>+	of_node_put(dn);</div><div class='add'>+</div><div class='add'>+	if (!bootlut_base) {</div><div class='add'>+		pr_err("SMP: unable to remap boot LUT base register\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Locate the secondary CPU node */</div><div class='add'>+	dn = of_get_cpu_node(cpu_logical_map(cpu), NULL);</div><div class='add'>+	if (!dn) {</div><div class='add'>+		pr_err("SMP: failed to locate secondary CPU%d node\n", cpu);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the secondary init routine to the BootLUT reset vector */</div><div class='add'>+	val = virt_to_phys(bcm63138_secondary_startup);</div><div class='add'>+	writel_relaxed(val, bootlut_base + BOOTLUT_RESET_VECT);</div><div class='add'>+</div><div class='add'>+	/* Power up the core, will jump straight to its reset vector when we</div><div class='add'>+	 * return</div><div class='add'>+	 */</div><div class='add'>+	ret = bcm63xx_pmb_power_on_cpu(dn);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+out:</div><div class='add'>+	iounmap(bootlut_base);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init bcm63138_smp_prepare_cpus(unsigned int max_cpus)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = scu_a9_enable();</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_warn("SMP: Cortex-A9 SCU setup failed\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct smp_operations bcm63138_smp_ops __initdata = {</div><div class='add'>+	.smp_prepare_cpus	= bcm63138_smp_prepare_cpus,</div><div class='add'>+	.smp_boot_secondary	= bcm63138_smp_boot_secondary,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+CPU_METHOD_OF_DECLARE(bcm63138_smp, "brcm,bcm63138", &amp;bcm63138_smp_ops);</div><div class='head'>diff --git a/arch/arm/mach-bcm/bcm63xx_smp.h b/arch/arm/mach-bcm/bcm63xx_smp.h<br/>new file mode 100644<br/>index 000000000000..50b76044536e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm63xx_smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm63xx_smp.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+#ifndef __BCM63XX_SMP_H</div><div class='add'>+#define __BCM63XX_SMP_H</div><div class='add'>+</div><div class='add'>+struct device_node;</div><div class='add'>+</div><div class='add'>+extern void bcm63138_secondary_startup(void);</div><div class='add'>+extern int bcm63xx_pmb_power_on_cpu(struct device_node *dn);</div><div class='add'>+</div><div class='add'>+#endif /* __BCM63XX_SMP_H */</div><div class='head'>diff --git a/arch/arm/mach-bcm/bcm_5301x.c b/arch/arm/mach-bcm/bcm_5301x.c<br/>index e9bcbdbce555..7aef92720eb4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm_5301x.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/bcm_5301x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/bcm_5301x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/bcm_5301x.c</a></div><div class='hunk'>@@ -18,15 +18,16 @@ static bool first_fault = true;</div><div class='ctx'> static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,</div><div class='ctx'> 				 struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	if (fsr == 0x1c06 &amp;&amp; first_fault) {</div><div class='add'>+	if ((fsr == 0x1406 || fsr == 0x1c06) &amp;&amp; first_fault) {</div><div class='ctx'> 		first_fault = false;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * These faults with code 0x1c06 happens for no good reason,</div><div class='del'>-		 * possibly left over from the CFE boot loader.</div><div class='add'>+		 * These faults with codes 0x1406 (BCM4709) or 0x1c06 happens</div><div class='add'>+		 * for no good reason, possibly left over from the CFE boot</div><div class='add'>+		 * loader.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",</div><div class='del'>-		addr, fsr);</div><div class='add'>+			addr, fsr);</div><div class='ctx'> </div><div class='ctx'> 		/* Returning non-zero causes fault display and panic */</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/arch/arm/mach-bcm/board_bcm2835.c b/arch/arm/mach-bcm/board_bcm2835.c<br/>index 70f2f3925f0e..0f7b9eac3d15 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/board_bcm2835.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/board_bcm2835.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/board_bcm2835.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/board_bcm2835.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='hunk'>@@ -22,97 +21,10 @@</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='del'>-#define PM_RSTC				0x1c</div><div class='del'>-#define PM_RSTS				0x20</div><div class='del'>-#define PM_WDOG				0x24</div><div class='del'>-</div><div class='del'>-#define PM_PASSWORD			0x5a000000</div><div class='del'>-#define PM_RSTC_WRCFG_MASK		0x00000030</div><div class='del'>-#define PM_RSTC_WRCFG_FULL_RESET	0x00000020</div><div class='del'>-#define PM_RSTS_HADWRH_SET		0x00000040</div><div class='del'>-</div><div class='del'>-#define BCM2835_PERIPH_PHYS	0x20000000</div><div class='del'>-#define BCM2835_PERIPH_VIRT	0xf0000000</div><div class='del'>-#define BCM2835_PERIPH_SIZE	SZ_16M</div><div class='del'>-</div><div class='del'>-static void __iomem *wdt_regs;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The machine restart method can be called from an atomic context so we won't</div><div class='del'>- * be able to ioremap the regs then.</div><div class='del'>- */</div><div class='del'>-static void bcm2835_setup_restart(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np = of_find_compatible_node(NULL, NULL,</div><div class='del'>-						"brcm,bcm2835-pm-wdt");</div><div class='del'>-	if (WARN(!np, "unable to setup watchdog restart"))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	wdt_regs = of_iomap(np, 0);</div><div class='del'>-	WARN(!wdt_regs, "failed to remap watchdog regs");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcm2835_restart(enum reboot_mode mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	if (!wdt_regs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* use a timeout of 10 ticks (~150us) */</div><div class='del'>-	writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG);</div><div class='del'>-	val = readl_relaxed(wdt_regs + PM_RSTC);</div><div class='del'>-	val &amp;= ~PM_RSTC_WRCFG_MASK;</div><div class='del'>-	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;</div><div class='del'>-	writel_relaxed(val, wdt_regs + PM_RSTC);</div><div class='del'>-</div><div class='del'>-	/* No sleeping, possibly atomic. */</div><div class='del'>-	mdelay(1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We can't really power off, but if we do the normal reset scheme, and</div><div class='del'>- * indicate to bootcode.bin not to reboot, then most of the chip will be</div><div class='del'>- * powered off.</div><div class='del'>- */</div><div class='del'>-static void bcm2835_power_off(void)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We set the watchdog hard reset bit here to distinguish this reset</div><div class='del'>-	 * from the normal (full) reset. bootcode.bin will not reboot after a</div><div class='del'>-	 * hard reset.</div><div class='del'>-	 */</div><div class='del'>-	val = readl_relaxed(wdt_regs + PM_RSTS);</div><div class='del'>-	val &amp;= ~PM_RSTC_WRCFG_MASK;</div><div class='del'>-	val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;</div><div class='del'>-	writel_relaxed(val, wdt_regs + PM_RSTS);</div><div class='del'>-</div><div class='del'>-	/* Continue with normal reset mechanism */</div><div class='del'>-	bcm2835_restart(REBOOT_HARD, "");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct map_desc io_map __initdata = {</div><div class='del'>-	.virtual = BCM2835_PERIPH_VIRT,</div><div class='del'>-	.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),</div><div class='del'>-	.length = BCM2835_PERIPH_SIZE,</div><div class='del'>-	.type = MT_DEVICE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init bcm2835_map_io(void)</div><div class='del'>-{</div><div class='del'>-	iotable_init(&amp;io_map, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init bcm2835_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	bcm2835_setup_restart();</div><div class='del'>-	if (wdt_regs)</div><div class='del'>-		pm_power_off = bcm2835_power_off;</div><div class='del'>-</div><div class='ctx'> 	bcm2835_init_clocks();</div><div class='ctx'> </div><div class='ctx'> 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,</div><div class='hunk'>@@ -129,9 +41,6 @@ static const char * const bcm2835_compat[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> DT_MACHINE_START(BCM2835, "BCM2835")</div><div class='del'>-	.map_io = bcm2835_map_io,</div><div class='del'>-	.init_irq = irqchip_init,</div><div class='ctx'> 	.init_machine = bcm2835_init,</div><div class='del'>-	.restart = bcm2835_restart,</div><div class='ctx'> 	.dt_compat = bcm2835_compat</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h<br/>deleted file mode 100644<br/>index ec0c3d112b36..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/brcmstb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/brcmstb.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2013-2014 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation version 2.</div><div class='del'>- *</div><div class='del'>- * This program is distributed "as is" WITHOUT ANY WARRANTY of any</div><div class='del'>- * kind, whether express or implied; without even the implied warranty</div><div class='del'>- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __BRCMSTB_H__</div><div class='del'>-#define __BRCMSTB_H__</div><div class='del'>-</div><div class='del'>-void brcmstb_secondary_startup(void);</div><div class='del'>-</div><div class='del'>-#endif /* __BRCMSTB_H__ */</div><div class='head'>diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S<br/>deleted file mode 100644<br/>index 199c1ea58248..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/headsmp-brcmstb.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/headsmp-brcmstb.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * SMP boot code for secondary CPUs</div><div class='del'>- * Based on arch/arm/mach-tegra/headsmp.S</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 NVIDIA, Inc.</div><div class='del'>- * Copyright (C) 2013-2014 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation version 2.</div><div class='del'>- *</div><div class='del'>- * This program is distributed "as is" WITHOUT ANY WARRANTY of any</div><div class='del'>- * kind, whether express or implied; without even the implied warranty</div><div class='del'>- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-        .section ".text.head", "ax"</div><div class='del'>-</div><div class='del'>-ENTRY(brcmstb_secondary_startup)</div><div class='del'>-        /*</div><div class='del'>-         * Ensure CPU is in a sane state by disabling all IRQs and switching</div><div class='del'>-         * into SVC mode.</div><div class='del'>-         */</div><div class='del'>-        setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0</div><div class='del'>-</div><div class='del'>-        bl      v7_invalidate_l1</div><div class='del'>-        b       secondary_startup</div><div class='del'>-ENDPROC(brcmstb_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c<br/>index e209e6fc7caf..44d6bddf7a4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-bcm/platsmp-brcmstb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-bcm/platsmp-brcmstb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-bcm/platsmp-brcmstb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-bcm/platsmp-brcmstb.c</a></div><div class='hunk'>@@ -30,8 +30,6 @@</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "brcmstb.h"</div><div class='del'>-</div><div class='ctx'> enum {</div><div class='ctx'> 	ZONE_MAN_CLKEN_MASK		= BIT(0),</div><div class='ctx'> 	ZONE_MAN_RESET_CNTL_MASK	= BIT(1),</div><div class='hunk'>@@ -153,7 +151,7 @@ static void brcmstb_cpu_boot(u32 cpu)</div><div class='ctx'> 	 * Set the reset vector to point to the secondary_startup</div><div class='ctx'> 	 * routine</div><div class='ctx'> 	 */</div><div class='del'>-	cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup));</div><div class='add'>+	cpu_set_boot_addr(cpu, virt_to_phys(secondary_startup));</div><div class='ctx'> </div><div class='ctx'> 	/* Unhalt the cpu */</div><div class='ctx'> 	cpu_rst_cfg_set(cpu, 0);</div><div class='head'>diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig<br/>index 3e40a947f3ea..742d53a5f7f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-berlin/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-berlin/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-berlin/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/Kconfig</a></div><div class='hunk'>@@ -6,6 +6,7 @@ menuconfig ARCH_BERLIN</div><div class='ctx'> 	select DW_APB_ICTL</div><div class='ctx'> 	select DW_APB_TIMER_OF</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='add'>+	select MFD_SYSCON</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> </div><div class='ctx'> if ARCH_BERLIN</div><div class='head'>diff --git a/arch/arm/mach-berlin/headsmp.S b/arch/arm/mach-berlin/headsmp.S<br/>index 4a4c56a58ad3..dc82a3486b05 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-berlin/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-berlin/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-berlin/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/headsmp.S</a></div><div class='hunk'>@@ -12,12 +12,6 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> </div><div class='del'>-ENTRY(berlin_secondary_startup)</div><div class='del'>- ARM_BE8(setend be)</div><div class='del'>-	bl	v7_invalidate_l1</div><div class='del'>-	b       secondary_startup</div><div class='del'>-ENDPROC(berlin_secondary_startup)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * If the following instruction is set in the reset exception vector, CPUs</div><div class='ctx'>  * will fetch the value of the software reset address vector when being</div><div class='head'>diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c<br/>index 702e7982015a..34a3753e7356 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-berlin/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-berlin/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-berlin/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-berlin/platsmp.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #define RESET_VECT		0x00</div><div class='ctx'> #define SW_RESET_ADDR		0x94</div><div class='ctx'> </div><div class='del'>-extern void berlin_secondary_startup(void);</div><div class='ctx'> extern u32 boot_inst;</div><div class='ctx'> </div><div class='ctx'> static void __iomem *cpu_ctrl;</div><div class='hunk'>@@ -85,7 +84,7 @@ static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	 * Write the secondary startup address into the SW reset address</div><div class='ctx'> 	 * vector. This is used by boot_inst.</div><div class='ctx'> 	 */</div><div class='del'>-	writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR);</div><div class='add'>+	writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(vectors_base);</div><div class='ctx'> unmap_scu:</div><div class='head'>diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c<br/>index 45ce065e7170..3b8740c083c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/da850.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-davinci/da850.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/da850.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/da850.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'>  * is licensed "as is" without any warranty of any kind, whether express</div><div class='ctx'>  * or implied.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h<br/>index 39e58b48e826..f9f9713aacdd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/da8xx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-davinci/include/mach/da8xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/da8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/include/mach/da8xx.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@ extern void __iomem *da8xx_syscfg1_base;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade</div><div class='del'>- * (than the regular 300Mhz variant), the board code should set this up</div><div class='add'>+ * (than the regular 300MHz variant), the board code should set this up</div><div class='ctx'>  * with the supported speed before calling da850_register_cpufreq().</div><div class='ctx'>  */</div><div class='ctx'> extern unsigned int da850_max_speed;</div><div class='head'>diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c<br/>index 641edc313938..78eac2c0c146 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/pm_domain.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-davinci/pm_domain.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/pm_domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-davinci/pm_domain.c</a></div><div class='hunk'>@@ -14,39 +14,9 @@</div><div class='ctx'> #include &lt;linux/pm_clock.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int davinci_pm_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	ret = pm_generic_runtime_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pm_clk_suspend(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pm_generic_runtime_resume(dev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int davinci_pm_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	pm_clk_resume(dev);</div><div class='del'>-	return pm_generic_runtime_resume(dev);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static struct dev_pm_domain davinci_pm_domain = {</div><div class='ctx'> 	.ops = {</div><div class='del'>-		SET_RUNTIME_PM_OPS(davinci_pm_runtime_suspend,</div><div class='del'>-				   davinci_pm_runtime_resume, NULL)</div><div class='add'>+		USE_PM_CLK_RUNTIME_OPS</div><div class='ctx'> 		USE_PLATFORM_PM_SLEEP_OPS</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h<br/>index 03d401d20453..3f29e6bca058 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/include/mach/irqs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-dove/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-dove/include/mach/irqs.h</a></div><div class='hunk'>@@ -14,73 +14,73 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Dove Low Interrupt Controller</div><div class='ctx'>  */</div><div class='del'>-#define IRQ_DOVE_BRIDGE		0</div><div class='del'>-#define IRQ_DOVE_H2C		1</div><div class='del'>-#define IRQ_DOVE_C2H		2</div><div class='del'>-#define IRQ_DOVE_NAND		3</div><div class='del'>-#define IRQ_DOVE_PDMA		4</div><div class='del'>-#define IRQ_DOVE_SPI1		5</div><div class='del'>-#define IRQ_DOVE_SPI0		6</div><div class='del'>-#define IRQ_DOVE_UART_0		7</div><div class='del'>-#define IRQ_DOVE_UART_1		8</div><div class='del'>-#define IRQ_DOVE_UART_2		9</div><div class='del'>-#define IRQ_DOVE_UART_3		10</div><div class='del'>-#define IRQ_DOVE_I2C		11</div><div class='del'>-#define IRQ_DOVE_GPIO_0_7	12</div><div class='del'>-#define IRQ_DOVE_GPIO_8_15	13</div><div class='del'>-#define IRQ_DOVE_GPIO_16_23	14</div><div class='del'>-#define IRQ_DOVE_PCIE0_ERR	15</div><div class='del'>-#define IRQ_DOVE_PCIE0		16</div><div class='del'>-#define IRQ_DOVE_PCIE1_ERR	17</div><div class='del'>-#define IRQ_DOVE_PCIE1		18</div><div class='del'>-#define IRQ_DOVE_I2S0		19</div><div class='del'>-#define IRQ_DOVE_I2S0_ERR	20</div><div class='del'>-#define IRQ_DOVE_I2S1		21</div><div class='del'>-#define IRQ_DOVE_I2S1_ERR	22</div><div class='del'>-#define IRQ_DOVE_USB_ERR	23</div><div class='del'>-#define IRQ_DOVE_USB0		24</div><div class='del'>-#define IRQ_DOVE_USB1		25</div><div class='del'>-#define IRQ_DOVE_GE00_RX	26</div><div class='del'>-#define IRQ_DOVE_GE00_TX	27</div><div class='del'>-#define IRQ_DOVE_GE00_MISC	28</div><div class='del'>-#define IRQ_DOVE_GE00_SUM	29</div><div class='del'>-#define IRQ_DOVE_GE00_ERR	30</div><div class='del'>-#define IRQ_DOVE_CRYPTO		31</div><div class='add'>+#define IRQ_DOVE_BRIDGE		(1 + 0)</div><div class='add'>+#define IRQ_DOVE_H2C		(1 + 1)</div><div class='add'>+#define IRQ_DOVE_C2H		(1 + 2)</div><div class='add'>+#define IRQ_DOVE_NAND		(1 + 3)</div><div class='add'>+#define IRQ_DOVE_PDMA		(1 + 4)</div><div class='add'>+#define IRQ_DOVE_SPI1		(1 + 5)</div><div class='add'>+#define IRQ_DOVE_SPI0		(1 + 6)</div><div class='add'>+#define IRQ_DOVE_UART_0		(1 + 7)</div><div class='add'>+#define IRQ_DOVE_UART_1		(1 + 8)</div><div class='add'>+#define IRQ_DOVE_UART_2		(1 + 9)</div><div class='add'>+#define IRQ_DOVE_UART_3		(1 + 10)</div><div class='add'>+#define IRQ_DOVE_I2C		(1 + 11)</div><div class='add'>+#define IRQ_DOVE_GPIO_0_7	(1 + 12)</div><div class='add'>+#define IRQ_DOVE_GPIO_8_15	(1 + 13)</div><div class='add'>+#define IRQ_DOVE_GPIO_16_23	(1 + 14)</div><div class='add'>+#define IRQ_DOVE_PCIE0_ERR	(1 + 15)</div><div class='add'>+#define IRQ_DOVE_PCIE0		(1 + 16)</div><div class='add'>+#define IRQ_DOVE_PCIE1_ERR	(1 + 17)</div><div class='add'>+#define IRQ_DOVE_PCIE1		(1 + 18)</div><div class='add'>+#define IRQ_DOVE_I2S0		(1 + 19)</div><div class='add'>+#define IRQ_DOVE_I2S0_ERR	(1 + 20)</div><div class='add'>+#define IRQ_DOVE_I2S1		(1 + 21)</div><div class='add'>+#define IRQ_DOVE_I2S1_ERR	(1 + 22)</div><div class='add'>+#define IRQ_DOVE_USB_ERR	(1 + 23)</div><div class='add'>+#define IRQ_DOVE_USB0		(1 + 24)</div><div class='add'>+#define IRQ_DOVE_USB1		(1 + 25)</div><div class='add'>+#define IRQ_DOVE_GE00_RX	(1 + 26)</div><div class='add'>+#define IRQ_DOVE_GE00_TX	(1 + 27)</div><div class='add'>+#define IRQ_DOVE_GE00_MISC	(1 + 28)</div><div class='add'>+#define IRQ_DOVE_GE00_SUM	(1 + 29)</div><div class='add'>+#define IRQ_DOVE_GE00_ERR	(1 + 30)</div><div class='add'>+#define IRQ_DOVE_CRYPTO		(1 + 31)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Dove High Interrupt Controller</div><div class='ctx'>  */</div><div class='del'>-#define IRQ_DOVE_AC97		32</div><div class='del'>-#define IRQ_DOVE_PMU		33</div><div class='del'>-#define IRQ_DOVE_CAM		34</div><div class='del'>-#define IRQ_DOVE_SDIO0		35</div><div class='del'>-#define IRQ_DOVE_SDIO1		36</div><div class='del'>-#define IRQ_DOVE_SDIO0_WAKEUP	37</div><div class='del'>-#define IRQ_DOVE_SDIO1_WAKEUP	38</div><div class='del'>-#define IRQ_DOVE_XOR_00		39</div><div class='del'>-#define IRQ_DOVE_XOR_01		40</div><div class='del'>-#define IRQ_DOVE_XOR0_ERR	41</div><div class='del'>-#define IRQ_DOVE_XOR_10		42</div><div class='del'>-#define IRQ_DOVE_XOR_11		43</div><div class='del'>-#define IRQ_DOVE_XOR1_ERR	44</div><div class='del'>-#define IRQ_DOVE_LCD_DCON	45</div><div class='del'>-#define IRQ_DOVE_LCD1		46</div><div class='del'>-#define IRQ_DOVE_LCD0		47</div><div class='del'>-#define IRQ_DOVE_GPU		48</div><div class='del'>-#define IRQ_DOVE_PERFORM_MNTR	49</div><div class='del'>-#define IRQ_DOVE_VPRO_DMA1	51</div><div class='del'>-#define IRQ_DOVE_SSP_TIMER	54</div><div class='del'>-#define IRQ_DOVE_SSP		55</div><div class='del'>-#define IRQ_DOVE_MC_L2_ERR	56</div><div class='del'>-#define IRQ_DOVE_CRYPTO_ERR	59</div><div class='del'>-#define IRQ_DOVE_GPIO_24_31	60</div><div class='del'>-#define IRQ_DOVE_HIGH_GPIO	61</div><div class='del'>-#define IRQ_DOVE_SATA		62</div><div class='add'>+#define IRQ_DOVE_AC97		(1 + 32)</div><div class='add'>+#define IRQ_DOVE_PMU		(1 + 33)</div><div class='add'>+#define IRQ_DOVE_CAM		(1 + 34)</div><div class='add'>+#define IRQ_DOVE_SDIO0		(1 + 35)</div><div class='add'>+#define IRQ_DOVE_SDIO1		(1 + 36)</div><div class='add'>+#define IRQ_DOVE_SDIO0_WAKEUP	(1 + 37)</div><div class='add'>+#define IRQ_DOVE_SDIO1_WAKEUP	(1 + 38)</div><div class='add'>+#define IRQ_DOVE_XOR_00		(1 + 39)</div><div class='add'>+#define IRQ_DOVE_XOR_01		(1 + 40)</div><div class='add'>+#define IRQ_DOVE_XOR0_ERR	(1 + 41)</div><div class='add'>+#define IRQ_DOVE_XOR_10		(1 + 42)</div><div class='add'>+#define IRQ_DOVE_XOR_11		(1 + 43)</div><div class='add'>+#define IRQ_DOVE_XOR1_ERR	(1 + 44)</div><div class='add'>+#define IRQ_DOVE_LCD_DCON	(1 + 45)</div><div class='add'>+#define IRQ_DOVE_LCD1		(1 + 46)</div><div class='add'>+#define IRQ_DOVE_LCD0		(1 + 47)</div><div class='add'>+#define IRQ_DOVE_GPU		(1 + 48)</div><div class='add'>+#define IRQ_DOVE_PERFORM_MNTR	(1 + 49)</div><div class='add'>+#define IRQ_DOVE_VPRO_DMA1	(1 + 51)</div><div class='add'>+#define IRQ_DOVE_SSP_TIMER	(1 + 54)</div><div class='add'>+#define IRQ_DOVE_SSP		(1 + 55)</div><div class='add'>+#define IRQ_DOVE_MC_L2_ERR	(1 + 56)</div><div class='add'>+#define IRQ_DOVE_CRYPTO_ERR	(1 + 59)</div><div class='add'>+#define IRQ_DOVE_GPIO_24_31	(1 + 60)</div><div class='add'>+#define IRQ_DOVE_HIGH_GPIO	(1 + 61)</div><div class='add'>+#define IRQ_DOVE_SATA		(1 + 62)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * DOVE General Purpose Pins</div><div class='ctx'>  */</div><div class='del'>-#define IRQ_DOVE_GPIO_START	64</div><div class='add'>+#define IRQ_DOVE_GPIO_START	65</div><div class='ctx'> #define NR_GPIO_IRQS		64</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c<br/>index 4a5a7aedcb76..df0223f76fa9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-dove/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-dove/irq.c</a></div><div class='hunk'>@@ -126,14 +126,14 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);</div><div class='ctx'> 	stat &amp;= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);</div><div class='ctx'> 	if (stat) {</div><div class='del'>-		unsigned int hwirq = __fls(stat);</div><div class='add'>+		unsigned int hwirq = 1 + __fls(stat);</div><div class='ctx'> 		handle_IRQ(hwirq, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);</div><div class='ctx'> 	stat &amp;= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);</div><div class='ctx'> 	if (stat) {</div><div class='del'>-		unsigned int hwirq = 32 + __fls(stat);</div><div class='add'>+		unsigned int hwirq = 33 + __fls(stat);</div><div class='ctx'> 		handle_IRQ(hwirq, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -144,8 +144,8 @@ void __init dove_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);</div><div class='del'>-	orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);</div><div class='add'>+	orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);</div><div class='add'>+	orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MULTI_IRQ_HANDLER</div><div class='ctx'> 	set_handle_irq(dove_legacy_handle_irq);</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c<br/>index 36f22c1a31fe..3c950f5864f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/simone.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ep93xx/simone.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/simone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ep93xx/simone.c</a></div><div class='hunk'>@@ -20,9 +20,14 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/i2c-gpio.h&gt;</div><div class='add'>+#include &lt;linux/mmc/host.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/spi/mmc_spi.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/video-ep93xx.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/spi-ep93xx.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/video-ep93xx.h&gt;</div><div class='ctx'> #include &lt;mach/gpio-ep93xx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -40,6 +45,132 @@ static struct ep93xxfb_mach_info __initdata simone_fb_info = {</div><div class='ctx'> 	.flags		= EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * GPIO lines used for MMC card detection.</div><div class='add'>+ */</div><div class='add'>+#define MMC_CARD_DETECT_GPIO EP93XX_GPIO_LINE_EGPIO0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Up to v1.3, the Sim.One used SFRMOUT as SD card chip select, but this goes</div><div class='add'>+ * low between multi-message command blocks. From v1.4, it uses a GPIO instead.</div><div class='add'>+ * v1.3 parts will still work, since the signal on SFRMOUT is automatic.</div><div class='add'>+ */</div><div class='add'>+#define MMC_CHIP_SELECT_GPIO EP93XX_GPIO_LINE_EGPIO1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MMC SPI chip select GPIO handling. If you are using SFRMOUT (SFRM1) signal,</div><div class='add'>+ * you can leave these empty and pass NULL as .controller_data.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int simone_mmc_spi_setup(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	unsigned int gpio = MMC_CHIP_SELECT_GPIO;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gpio_request(gpio, spi-&gt;modalias);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = gpio_direction_output(gpio, 1);</div><div class='add'>+	if (err) {</div><div class='add'>+		gpio_free(gpio);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void simone_mmc_spi_cleanup(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	unsigned int gpio = MMC_CHIP_SELECT_GPIO;</div><div class='add'>+</div><div class='add'>+	gpio_set_value(gpio, 1);</div><div class='add'>+	gpio_direction_input(gpio);</div><div class='add'>+	gpio_free(gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void simone_mmc_spi_cs_control(struct spi_device *spi, int value)</div><div class='add'>+{</div><div class='add'>+	gpio_set_value(MMC_CHIP_SELECT_GPIO, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ep93xx_spi_chip_ops simone_mmc_spi_ops = {</div><div class='add'>+	.setup		= simone_mmc_spi_setup,</div><div class='add'>+	.cleanup	= simone_mmc_spi_cleanup,</div><div class='add'>+	.cs_control	= simone_mmc_spi_cs_control,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MMC card detection GPIO setup.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int simone_mmc_spi_init(struct device *dev,</div><div class='add'>+	irqreturn_t (*irq_handler)(int, void *), void *mmc)</div><div class='add'>+{</div><div class='add'>+	unsigned int gpio = MMC_CARD_DETECT_GPIO;</div><div class='add'>+	int irq, err;</div><div class='add'>+</div><div class='add'>+	err = gpio_request(gpio, dev_name(dev));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = gpio_direction_input(gpio);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	irq = gpio_to_irq(gpio);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	err = request_irq(irq, irq_handler, IRQF_TRIGGER_FALLING,</div><div class='add'>+			  "MMC card detect", mmc);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "%s: using irq %d for MMC card detection\n",</div><div class='add'>+	       dev_name(dev), irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	gpio_free(gpio);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void simone_mmc_spi_exit(struct device *dev, void *mmc)</div><div class='add'>+{</div><div class='add'>+	unsigned int gpio = MMC_CARD_DETECT_GPIO;</div><div class='add'>+</div><div class='add'>+	free_irq(gpio_to_irq(gpio), mmc);</div><div class='add'>+	gpio_free(gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mmc_spi_platform_data simone_mmc_spi_data = {</div><div class='add'>+	.init		= simone_mmc_spi_init,</div><div class='add'>+	.exit		= simone_mmc_spi_exit,</div><div class='add'>+	.detect_delay	= 500,</div><div class='add'>+	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spi_board_info simone_spi_devices[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.modalias		= "mmc_spi",</div><div class='add'>+		.controller_data	= &amp;simone_mmc_spi_ops,</div><div class='add'>+		.platform_data		= &amp;simone_mmc_spi_data,</div><div class='add'>+		/*</div><div class='add'>+		 * We use 10 MHz even though the maximum is 3.7 MHz. The driver</div><div class='add'>+		 * will limit it automatically to max. frequency.</div><div class='add'>+		 */</div><div class='add'>+		.max_speed_hz		= 10 * 1000 * 1000,</div><div class='add'>+		.bus_num		= 0,</div><div class='add'>+		.chip_select		= 0,</div><div class='add'>+		.mode			= SPI_MODE_3,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ep93xx_spi_info simone_spi_info __initdata = {</div><div class='add'>+	.num_chipselect	= ARRAY_SIZE(simone_spi_devices),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct i2c_gpio_platform_data __initdata simone_i2c_gpio_data = {</div><div class='ctx'> 	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,</div><div class='ctx'> 	.sda_is_open_drain	= 0,</div><div class='hunk'>@@ -74,6 +205,8 @@ static void __init simone_init_machine(void)</div><div class='ctx'> 	ep93xx_register_fb(&amp;simone_fb_info);</div><div class='ctx'> 	ep93xx_register_i2c(&amp;simone_i2c_gpio_data, simone_i2c_board_info,</div><div class='ctx'> 			    ARRAY_SIZE(simone_i2c_board_info));</div><div class='add'>+	ep93xx_register_spi(&amp;simone_spi_info, simone_spi_devices,</div><div class='add'>+			    ARRAY_SIZE(simone_spi_devices));</div><div class='ctx'> 	simone_register_audio();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h<br/>index 5f5cd562c593..e3a9256ed55f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/common.h</a></div><div class='hunk'>@@ -163,7 +163,9 @@ extern void exynos_set_delayed_reset_assertion(bool enable);</div><div class='ctx'> </div><div class='ctx'> extern void s5p_init_cpu(void __iomem *cpuid_addr);</div><div class='ctx'> extern unsigned int samsung_rev(void);</div><div class='del'>-extern void __iomem *cpu_boot_reg_base(void);</div><div class='add'>+extern void exynos_core_restart(u32 core_id);</div><div class='add'>+extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);</div><div class='add'>+extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);</div><div class='ctx'> </div><div class='ctx'> static inline void pmu_raw_writel(u32 val, u32 offset)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c<br/>index 5917a30eee33..5f8ddcdeeacf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/exynos.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/exynos.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/exynos.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/exynos.c</a></div><div class='hunk'>@@ -224,6 +224,25 @@ static void __init exynos_init_irq(void)</div><div class='ctx'> 	exynos_map_pmu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id exynos_cpufreq_matches[] = {</div><div class='add'>+	{ .compatible = "samsung,exynos4210", .data = "cpufreq-dt" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init exynos_cpufreq_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *root = of_find_node_by_path("/");</div><div class='add'>+	const struct of_device_id *match;</div><div class='add'>+</div><div class='add'>+	match = of_match_node(exynos_cpufreq_matches, root);</div><div class='add'>+	if (!match) {</div><div class='add'>+		platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_device_register_simple(match-&gt;data, -1, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init exynos_dt_machine_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -234,7 +253,8 @@ static void __init exynos_dt_machine_init(void)</div><div class='ctx'> 		exynos_sysram_init();</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_SMP) &amp;&amp; defined(CONFIG_ARM_EXYNOS_CPUIDLE)</div><div class='del'>-	if (of_machine_is_compatible("samsung,exynos4210"))</div><div class='add'>+	if (of_machine_is_compatible("samsung,exynos4210") ||</div><div class='add'>+	    of_machine_is_compatible("samsung,exynos3250"))</div><div class='ctx'> 		exynos_cpuidle.dev.platform_data = &amp;cpuidle_coupled_exynos_data;</div><div class='ctx'> #endif</div><div class='ctx'> 	if (of_machine_is_compatible("samsung,exynos4210") ||</div><div class='hunk'>@@ -245,7 +265,7 @@ static void __init exynos_dt_machine_init(void)</div><div class='ctx'> 	    of_machine_is_compatible("samsung,exynos5250"))</div><div class='ctx'> 		platform_device_register(&amp;exynos_cpuidle);</div><div class='ctx'> </div><div class='del'>-	platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);</div><div class='add'>+	exynos_cpufreq_init();</div><div class='ctx'> </div><div class='ctx'> 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c<br/>index 1bd35763f12e..245f6dec1ded 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/firmware.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/firmware.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/firmware.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/firmware.c</a></div><div class='hunk'>@@ -49,6 +49,7 @@ static int exynos_do_idle(unsigned long mode)</div><div class='ctx'> 			     sysram_ns_base_addr + 0x24);</div><div class='ctx'> 		__raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);</div><div class='ctx'> 		if (soc_is_exynos3250()) {</div><div class='add'>+			flush_cache_all();</div><div class='ctx'> 			exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,</div><div class='ctx'> 				   SMC_POWERSTATE_IDLE, 0);</div><div class='ctx'> 			exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,</div><div class='hunk'>@@ -104,6 +105,22 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)</div><div class='add'>+{</div><div class='add'>+	void __iomem *boot_reg;</div><div class='add'>+</div><div class='add'>+	if (!sysram_ns_base_addr)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	boot_reg = sysram_ns_base_addr + 0x1c;</div><div class='add'>+</div><div class='add'>+	if (soc_is_exynos4412())</div><div class='add'>+		boot_reg += 4 * cpu;</div><div class='add'>+</div><div class='add'>+	*boot_addr = __raw_readl(boot_reg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int exynos_cpu_suspend(unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	flush_cache_all();</div><div class='hunk'>@@ -138,6 +155,7 @@ static int exynos_resume(void)</div><div class='ctx'> static const struct firmware_ops exynos_firmware_ops = {</div><div class='ctx'> 	.do_idle		= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,</div><div class='ctx'> 	.set_cpu_boot_addr	= exynos_set_cpu_boot_addr,</div><div class='add'>+	.get_cpu_boot_addr	= exynos_get_cpu_boot_addr,</div><div class='ctx'> 	.cpu_boot		= exynos_cpu_boot,</div><div class='ctx'> 	.suspend		= IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,</div><div class='ctx'> 	.resume			= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,</div><div class='head'>diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c<br/>index a825bca2a2b6..58e05a2eae57 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/platsmp.c</a></div><div class='hunk'>@@ -169,7 +169,7 @@ int exynos_cluster_power_state(int cluster)</div><div class='ctx'> 		S5P_CORE_LOCAL_PWR_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __iomem *cpu_boot_reg_base(void)</div><div class='add'>+static void __iomem *cpu_boot_reg_base(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (soc_is_exynos4210() &amp;&amp; samsung_rev() == EXYNOS4210_REV_1_1)</div><div class='ctx'> 		return pmu_base_addr + S5P_INFORM5;</div><div class='hunk'>@@ -195,7 +195,7 @@ static inline void __iomem *cpu_boot_reg(int cpu)</div><div class='ctx'>  *</div><div class='ctx'>  * Currently this is needed only when booting secondary CPU on Exynos3250.</div><div class='ctx'>  */</div><div class='del'>-static void exynos_core_restart(u32 core_id)</div><div class='add'>+void exynos_core_restart(u32 core_id)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +210,6 @@ static void exynos_core_restart(u32 core_id)</div><div class='ctx'> 	val |= S5P_CORE_WAKEUP_FROM_LOCAL_CFG;</div><div class='ctx'> 	pmu_raw_writel(val, EXYNOS_ARM_CORE_STATUS(core_id));</div><div class='ctx'> </div><div class='del'>-	pr_info("CPU%u: Software reset\n", core_id);</div><div class='ctx'> 	pmu_raw_writel(EXYNOS_CORE_PO_RESET(core_id), EXYNOS_SWRESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -248,6 +247,56 @@ static void exynos_secondary_init(unsigned int cpu)</div><div class='ctx'> 	spin_unlock(&amp;boot_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Try to set boot address using firmware first</div><div class='add'>+	 * and fall back to boot register if it fails.</div><div class='add'>+	 */</div><div class='add'>+	ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);</div><div class='add'>+	if (ret &amp;&amp; ret != -ENOSYS)</div><div class='add'>+		goto fail;</div><div class='add'>+	if (ret == -ENOSYS) {</div><div class='add'>+		void __iomem *boot_reg = cpu_boot_reg(core_id);</div><div class='add'>+</div><div class='add'>+		if (IS_ERR(boot_reg)) {</div><div class='add'>+			ret = PTR_ERR(boot_reg);</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		__raw_writel(boot_addr, boot_reg);</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Try to get boot address using firmware first</div><div class='add'>+	 * and fall back to boot register if it fails.</div><div class='add'>+	 */</div><div class='add'>+	ret = call_firmware_op(get_cpu_boot_addr, core_id, boot_addr);</div><div class='add'>+	if (ret &amp;&amp; ret != -ENOSYS)</div><div class='add'>+		goto fail;</div><div class='add'>+	if (ret == -ENOSYS) {</div><div class='add'>+		void __iomem *boot_reg = cpu_boot_reg(core_id);</div><div class='add'>+</div><div class='add'>+		if (IS_ERR(boot_reg)) {</div><div class='add'>+			ret = PTR_ERR(boot_reg);</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		*boot_addr = __raw_readl(boot_reg);</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long timeout;</div><div class='hunk'>@@ -307,22 +356,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> </div><div class='ctx'> 		boot_addr = virt_to_phys(exynos4_secondary_startup);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Try to set boot address using firmware first</div><div class='del'>-		 * and fall back to boot register if it fails.</div><div class='del'>-		 */</div><div class='del'>-		ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);</div><div class='del'>-		if (ret &amp;&amp; ret != -ENOSYS)</div><div class='add'>+		ret = exynos_set_boot_addr(core_id, boot_addr);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto fail;</div><div class='del'>-		if (ret == -ENOSYS) {</div><div class='del'>-			void __iomem *boot_reg = cpu_boot_reg(core_id);</div><div class='del'>-</div><div class='del'>-			if (IS_ERR(boot_reg)) {</div><div class='del'>-				ret = PTR_ERR(boot_reg);</div><div class='del'>-				goto fail;</div><div class='del'>-			}</div><div class='del'>-			__raw_writel(boot_addr, boot_reg);</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		call_firmware_op(cpu_boot, core_id);</div><div class='ctx'> </div><div class='hunk'>@@ -337,6 +373,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 		udelay(10);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (pen_release != -1)</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * now the secondary core is starting up let it run its</div><div class='ctx'> 	 * calibrations, then wait for it to finish</div><div class='hunk'>@@ -407,16 +446,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 		core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='ctx'> 		boot_addr = virt_to_phys(exynos4_secondary_startup);</div><div class='ctx'> </div><div class='del'>-		ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);</div><div class='del'>-		if (ret &amp;&amp; ret != -ENOSYS)</div><div class='add'>+		ret = exynos_set_boot_addr(core_id, boot_addr);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			break;</div><div class='del'>-		if (ret == -ENOSYS) {</div><div class='del'>-			void __iomem *boot_reg = cpu_boot_reg(core_id);</div><div class='del'>-</div><div class='del'>-			if (IS_ERR(boot_reg))</div><div class='del'>-				break;</div><div class='del'>-			__raw_writel(boot_addr, boot_reg);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c<br/>index cc75ab448be3..9c1506b499bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pm.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/smp_scu.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -209,6 +210,8 @@ static int exynos_cpu0_enter_aftr(void)</div><div class='ctx'> 		 * sequence, let's wait for one of these to happen</div><div class='ctx'> 		 */</div><div class='ctx'> 		while (exynos_cpu_power_state(1)) {</div><div class='add'>+			unsigned long boot_addr;</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * The other cpu may skip idle and boot back</div><div class='ctx'> 			 * up again</div><div class='hunk'>@@ -221,7 +224,11 @@ static int exynos_cpu0_enter_aftr(void)</div><div class='ctx'> 			 * boot back up again, getting stuck in the</div><div class='ctx'> 			 * boot rom code</div><div class='ctx'> 			 */</div><div class='del'>-			if (__raw_readl(cpu_boot_reg_base()) == 0)</div><div class='add'>+			ret = exynos_get_boot_addr(1, &amp;boot_addr);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto fail;</div><div class='add'>+			ret = -1;</div><div class='add'>+			if (boot_addr == 0)</div><div class='ctx'> 				goto abort;</div><div class='ctx'> </div><div class='ctx'> 			cpu_relax();</div><div class='hunk'>@@ -233,11 +240,14 @@ static int exynos_cpu0_enter_aftr(void)</div><div class='ctx'> </div><div class='ctx'> abort:</div><div class='ctx'> 	if (cpu_online(1)) {</div><div class='add'>+		unsigned long boot_addr = virt_to_phys(exynos_cpu_resume);</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Set the boot vector to something non-zero</div><div class='ctx'> 		 */</div><div class='del'>-		__raw_writel(virt_to_phys(exynos_cpu_resume),</div><div class='del'>-			     cpu_boot_reg_base());</div><div class='add'>+		ret = exynos_set_boot_addr(1, boot_addr);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto fail;</div><div class='ctx'> 		dsb();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -247,22 +257,42 @@ abort:</div><div class='ctx'> 		while (exynos_cpu_power_state(1) != S5P_CORE_LOCAL_PWR_EN)</div><div class='ctx'> 			cpu_relax();</div><div class='ctx'> </div><div class='add'>+		if (soc_is_exynos3250()) {</div><div class='add'>+			while (!pmu_raw_readl(S5P_PMU_SPARE2) &amp;&amp;</div><div class='add'>+			       !atomic_read(&amp;cpu1_wakeup))</div><div class='add'>+				cpu_relax();</div><div class='add'>+</div><div class='add'>+			if (!atomic_read(&amp;cpu1_wakeup))</div><div class='add'>+				exynos_core_restart(1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		while (!atomic_read(&amp;cpu1_wakeup)) {</div><div class='add'>+			smp_rmb();</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Poke cpu1 out of the boot rom</div><div class='ctx'> 			 */</div><div class='del'>-			__raw_writel(virt_to_phys(exynos_cpu_resume),</div><div class='del'>-				     cpu_boot_reg_base());</div><div class='ctx'> </div><div class='del'>-			arch_send_wakeup_ipi_mask(cpumask_of(1));</div><div class='add'>+			ret = exynos_set_boot_addr(1, boot_addr);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto fail;</div><div class='add'>+</div><div class='add'>+			call_firmware_op(cpu_boot, 1);</div><div class='add'>+</div><div class='add'>+			if (soc_is_exynos3250())</div><div class='add'>+				dsb_sev();</div><div class='add'>+			else</div><div class='add'>+				arch_send_wakeup_ipi_mask(cpumask_of(1));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int exynos_wfi_finisher(unsigned long flags)</div><div class='ctx'> {</div><div class='add'>+	if (soc_is_exynos3250())</div><div class='add'>+		flush_cache_all();</div><div class='ctx'> 	cpu_do_idle();</div><div class='ctx'> </div><div class='ctx'> 	return -1;</div><div class='hunk'>@@ -283,6 +313,9 @@ static int exynos_cpu1_powerdown(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	exynos_cpu_power_down(1);</div><div class='ctx'> </div><div class='add'>+	if (soc_is_exynos3250())</div><div class='add'>+		pmu_raw_writel(0, S5P_PMU_SPARE2);</div><div class='add'>+</div><div class='ctx'> 	ret = cpu_suspend(0, exynos_wfi_finisher);</div><div class='ctx'> </div><div class='ctx'> 	cpu_pm_exit();</div><div class='hunk'>@@ -299,7 +332,9 @@ cpu1_aborted:</div><div class='ctx'> </div><div class='ctx'> static void exynos_pre_enter_aftr(void)</div><div class='ctx'> {</div><div class='del'>-	__raw_writel(virt_to_phys(exynos_cpu_resume), cpu_boot_reg_base());</div><div class='add'>+	unsigned long boot_addr = virt_to_phys(exynos_cpu_resume);</div><div class='add'>+</div><div class='add'>+	(void)exynos_set_boot_addr(1, boot_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void exynos_post_enter_aftr(void)</div><div class='head'>diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c<br/>index a9686535f9ed..6001f1c9d136 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm_domains.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/pm_domains.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm_domains.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pm_domains.c</a></div><div class='hunk'>@@ -62,6 +62,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)</div><div class='ctx'> 		for (i = 0; i &lt; MAX_CLK_PER_DOMAIN; i++) {</div><div class='ctx'> 			if (IS_ERR(pd-&gt;clk[i]))</div><div class='ctx'> 				break;</div><div class='add'>+			pd-&gt;pclk[i] = clk_get_parent(pd-&gt;clk[i]);</div><div class='ctx'> 			if (clk_set_parent(pd-&gt;clk[i], pd-&gt;oscclk))</div><div class='ctx'> 				pr_err("%s: error setting oscclk as parent to clock %d\n",</div><div class='ctx'> 						pd-&gt;name, i);</div><div class='hunk'>@@ -90,6 +91,9 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)</div><div class='ctx'> 		for (i = 0; i &lt; MAX_CLK_PER_DOMAIN; i++) {</div><div class='ctx'> 			if (IS_ERR(pd-&gt;clk[i]))</div><div class='ctx'> 				break;</div><div class='add'>+</div><div class='add'>+			if (IS_ERR(pd-&gt;clk[i]))</div><div class='add'>+				continue; /* Skip on first power up */</div><div class='ctx'> 			if (clk_set_parent(pd-&gt;clk[i], pd-&gt;pclk[i]))</div><div class='ctx'> 				pr_err("%s: error setting parent to clock%d\n",</div><div class='ctx'> 						pd-&gt;name, i);</div><div class='hunk'>@@ -117,27 +121,37 @@ static int exynos_pd_power_off(struct generic_pm_domain *domain)</div><div class='ctx'> </div><div class='ctx'> static __init int exynos4_pm_init_power_domain(void)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev;</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> </div><div class='ctx'> 	for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {</div><div class='ctx'> 		struct exynos_pm_domain *pd;</div><div class='ctx'> 		int on, i;</div><div class='del'>-		struct device *dev;</div><div class='del'>-</div><div class='del'>-		pdev = of_find_device_by_node(np);</div><div class='del'>-		dev = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 		pd = kzalloc(sizeof(*pd), GFP_KERNEL);</div><div class='ctx'> 		if (!pd) {</div><div class='ctx'> 			pr_err("%s: failed to allocate memory for domain\n",</div><div class='ctx'> 					__func__);</div><div class='add'>+			of_node_put(np);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		pd-&gt;pd.name = kstrdup_const(strrchr(np-&gt;full_name, '/') + 1,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!pd-&gt;pd.name) {</div><div class='add'>+			kfree(pd);</div><div class='add'>+			of_node_put(np);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pd-&gt;pd.name = kstrdup(dev_name(dev), GFP_KERNEL);</div><div class='ctx'> 		pd-&gt;name = pd-&gt;pd.name;</div><div class='ctx'> 		pd-&gt;base = of_iomap(np, 0);</div><div class='add'>+		if (!pd-&gt;base) {</div><div class='add'>+			pr_warn("%s: failed to map memory\n", __func__);</div><div class='add'>+			kfree(pd-&gt;pd.name);</div><div class='add'>+			kfree(pd);</div><div class='add'>+			of_node_put(np);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		pd-&gt;pd.power_off = exynos_pd_power_off;</div><div class='ctx'> 		pd-&gt;pd.power_on = exynos_pd_power_on;</div><div class='ctx'> </div><div class='hunk'>@@ -145,12 +159,12 @@ static __init int exynos4_pm_init_power_domain(void)</div><div class='ctx'> 			char clk_name[8];</div><div class='ctx'> </div><div class='ctx'> 			snprintf(clk_name, sizeof(clk_name), "asb%d", i);</div><div class='del'>-			pd-&gt;asb_clk[i] = clk_get(dev, clk_name);</div><div class='add'>+			pd-&gt;asb_clk[i] = of_clk_get_by_name(np, clk_name);</div><div class='ctx'> 			if (IS_ERR(pd-&gt;asb_clk[i]))</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pd-&gt;oscclk = clk_get(dev, "oscclk");</div><div class='add'>+		pd-&gt;oscclk = of_clk_get_by_name(np, "oscclk");</div><div class='ctx'> 		if (IS_ERR(pd-&gt;oscclk))</div><div class='ctx'> 			goto no_clk;</div><div class='ctx'> </div><div class='hunk'>@@ -158,16 +172,14 @@ static __init int exynos4_pm_init_power_domain(void)</div><div class='ctx'> 			char clk_name[8];</div><div class='ctx'> </div><div class='ctx'> 			snprintf(clk_name, sizeof(clk_name), "clk%d", i);</div><div class='del'>-			pd-&gt;clk[i] = clk_get(dev, clk_name);</div><div class='add'>+			pd-&gt;clk[i] = of_clk_get_by_name(np, clk_name);</div><div class='ctx'> 			if (IS_ERR(pd-&gt;clk[i]))</div><div class='ctx'> 				break;</div><div class='del'>-			snprintf(clk_name, sizeof(clk_name), "pclk%d", i);</div><div class='del'>-			pd-&gt;pclk[i] = clk_get(dev, clk_name);</div><div class='del'>-			if (IS_ERR(pd-&gt;pclk[i])) {</div><div class='del'>-				clk_put(pd-&gt;clk[i]);</div><div class='del'>-				pd-&gt;clk[i] = ERR_PTR(-EINVAL);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+			/*</div><div class='add'>+			 * Skip setting parent on first power up.</div><div class='add'>+			 * The parent at this time may not be useful at all.</div><div class='add'>+			 */</div><div class='add'>+			pd-&gt;pclk[i] = ERR_PTR(-EINVAL);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (IS_ERR(pd-&gt;clk[0]))</div><div class='hunk'>@@ -189,15 +201,15 @@ no_clk:</div><div class='ctx'> 		args.args_count = 0;</div><div class='ctx'> 		child_domain = of_genpd_get_from_provider(&amp;args);</div><div class='ctx'> 		if (IS_ERR(child_domain))</div><div class='del'>-			continue;</div><div class='add'>+			goto next_pd;</div><div class='ctx'> </div><div class='ctx'> 		if (of_parse_phandle_with_args(np, "power-domains",</div><div class='ctx'> 					 "#power-domain-cells", 0, &amp;args) != 0)</div><div class='del'>-			continue;</div><div class='add'>+			goto next_pd;</div><div class='ctx'> </div><div class='ctx'> 		parent_domain = of_genpd_get_from_provider(&amp;args);</div><div class='ctx'> 		if (IS_ERR(parent_domain))</div><div class='del'>-			continue;</div><div class='add'>+			goto next_pd;</div><div class='ctx'> </div><div class='ctx'> 		if (pm_genpd_add_subdomain(parent_domain, child_domain))</div><div class='ctx'> 			pr_warn("%s failed to add subdomain: %s\n",</div><div class='hunk'>@@ -205,9 +217,10 @@ no_clk:</div><div class='ctx'> 		else</div><div class='ctx'> 			pr_info("%s has as child subdomain: %s.\n",</div><div class='ctx'> 				parent_domain-&gt;name, child_domain-&gt;name);</div><div class='add'>+next_pd:</div><div class='ctx'> 		of_node_put(np);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(exynos4_pm_init_power_domain);</div><div class='add'>+core_initcall(exynos4_pm_init_power_domain);</div><div class='head'>diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c<br/>index c15761ca2f18..e812c1c85624 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/pmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/pmu.c</a></div><div class='hunk'>@@ -681,7 +681,7 @@ static unsigned int const exynos5420_list_disable_pmu_reg[] = {</div><div class='ctx'> 	EXYNOS5420_CMU_RESET_FSYS_SYS_PWR_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void exynos5_power_off(void)</div><div class='add'>+static void exynos_power_off(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -872,8 +872,6 @@ static void exynos5420_pmu_init(void)</div><div class='ctx'> 			EXYNOS5420_ARM_INTR_SPREAD_USE_STANDBYWFI);</div><div class='ctx'> </div><div class='ctx'> 	pmu_raw_writel(0x1, EXYNOS5420_UP_SCHEDULER);</div><div class='del'>-</div><div class='del'>-	pm_power_off = exynos5_power_off;</div><div class='ctx'> 	pr_info("EXYNOS5420 PMU initialized\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -984,6 +982,8 @@ static int exynos_pmu_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_warn(dev, "can't register restart handler err=%d\n", ret);</div><div class='ctx'> </div><div class='add'>+	pm_power_off = exynos_power_off;</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(dev, "Exynos PMU Driver probe done\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c<br/>index 7d23ce04cad5..f572219c7a40 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/suspend.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-exynos/suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-exynos/suspend.c</a></div><div class='hunk'>@@ -223,7 +223,7 @@ static int exynos_pmu_domain_alloc(struct irq_domain *domain,</div><div class='ctx'> 	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &amp;parent_args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops exynos_pmu_domain_ops = {</div><div class='add'>+static const struct irq_domain_ops exynos_pmu_domain_ops = {</div><div class='ctx'> 	.xlate	= exynos_pmu_domain_xlate,</div><div class='ctx'> 	.alloc	= exynos_pmu_domain_alloc,</div><div class='ctx'> 	.free	= irq_domain_free_irqs_common,</div><div class='hunk'>@@ -311,13 +311,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM)) {</div><div class='ctx'> 		mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Residency value passed to mcpm_cpu_suspend back-end</div><div class='del'>-		 * has to be given clear semantics. Set to 0 as a</div><div class='del'>-		 * temporary value.</div><div class='del'>-		 */</div><div class='del'>-		mcpm_cpu_suspend(0);</div><div class='add'>+		mcpm_cpu_suspend();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Failed to suspend the system\n");</div><div class='head'>diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c<br/>index e2e0df8bcee2..22536b85a81d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-footbridge/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-footbridge/dma.c</a></div><div class='hunk'>@@ -13,9 +13,9 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/dma.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/dec21285.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c<br/>index f8cb5710d6ee..3292f2e6ed6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-gemini/gpio.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-gemini/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-gemini/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-gemini/gpio.c</a></div><div class='hunk'>@@ -223,8 +223,8 @@ void __init gemini_gpio_init(void)</div><div class='ctx'> 			set_irq_flags(j, IRQF_VALID);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler);</div><div class='del'>-		irq_set_handler_data(IRQ_GPIO(i), (void *)i);</div><div class='add'>+		irq_set_chained_handler_and_data(IRQ_GPIO(i), gpio_irq_handler,</div><div class='add'>+						 (void *)i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(gpiochip_add(&amp;gemini_gpio_chip));</div><div class='head'>diff --git a/arch/arm/mach-hisi/Makefile b/arch/arm/mach-hisi/Makefile<br/>index 6b7b3033de0b..659db1933ed3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-hisi/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-hisi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-hisi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/Makefile</a></div><div class='hunk'>@@ -6,4 +6,4 @@ CFLAGS_platmcpm.o	:= -march=armv7-a</div><div class='ctx'> </div><div class='ctx'> obj-y	+= hisilicon.o</div><div class='ctx'> obj-$(CONFIG_MCPM)		+= platmcpm.o</div><div class='del'>-obj-$(CONFIG_SMP)		+= platsmp.o hotplug.o headsmp.o</div><div class='add'>+obj-$(CONFIG_SMP)		+= platsmp.o hotplug.o</div><div class='head'>diff --git a/arch/arm/mach-hisi/core.h b/arch/arm/mach-hisi/core.h<br/>index 92a682d8e939..c7648ef1825c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-hisi/core.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-hisi/core.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-hisi/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/core.h</a></div><div class='hunk'>@@ -12,7 +12,6 @@ extern void hi3xxx_cpu_die(unsigned int cpu);</div><div class='ctx'> extern int hi3xxx_cpu_kill(unsigned int cpu);</div><div class='ctx'> extern void hi3xxx_set_cpu(int cpu, bool enable);</div><div class='ctx'> </div><div class='del'>-extern void hisi_secondary_startup(void);</div><div class='ctx'> extern struct smp_operations hix5hd2_smp_ops;</div><div class='ctx'> extern void hix5hd2_set_cpu(int cpu, bool enable);</div><div class='ctx'> extern void hix5hd2_cpu_die(unsigned int cpu);</div><div class='head'>diff --git a/arch/arm/mach-hisi/headsmp.S b/arch/arm/mach-hisi/headsmp.S<br/>deleted file mode 100644<br/>index 81e35b159e75..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-hisi/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-hisi/headsmp.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (c) 2014 Hisilicon Limited.</div><div class='del'>- *  Copyright (c) 2014 Linaro Ltd.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-	__CPUINIT</div><div class='del'>-</div><div class='del'>-ENTRY(hisi_secondary_startup)</div><div class='del'>-	bl	v7_invalidate_l1</div><div class='del'>-	b	secondary_startup</div><div class='head'>diff --git a/arch/arm/mach-hisi/platmcpm.c b/arch/arm/mach-hisi/platmcpm.c<br/>index 280f3f14f77c..b5f8f5ffda79 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-hisi/platmcpm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-hisi/platmcpm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-hisi/platmcpm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/platmcpm.c</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'>  * under the terms and conditions of the GNU General Public License,</div><div class='ctx'>  * version 2, as published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='hunk'>@@ -13,7 +15,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='del'>-#include &lt;asm/mcpm.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='hunk'>@@ -94,11 +98,16 @@ static void hip04_set_snoop_filter(unsigned int cluster, unsigned int on)</div><div class='ctx'> 	} while (data != readl_relaxed(fabric + FAB_SF_MODE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hip04_mcpm_power_up(unsigned int cpu, unsigned int cluster)</div><div class='add'>+static int hip04_boot_secondary(unsigned int l_cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='add'>+	unsigned int mpidr, cpu, cluster;</div><div class='ctx'> 	unsigned long data;</div><div class='ctx'> 	void __iomem *sys_dreq, *sys_status;</div><div class='ctx'> </div><div class='add'>+	mpidr = cpu_logical_map(l_cpu);</div><div class='add'>+	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='add'>+	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='add'>+</div><div class='ctx'> 	if (!sysctrl)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	if (cluster &gt;= HIP04_MAX_CLUSTERS || cpu &gt;= HIP04_MAX_CPUS_PER_CLUSTER)</div><div class='hunk'>@@ -118,6 +127,7 @@ static int hip04_mcpm_power_up(unsigned int cpu, unsigned int cluster)</div><div class='ctx'> 			cpu_relax();</div><div class='ctx'> 			data = readl_relaxed(sys_status);</div><div class='ctx'> 		} while (data &amp; CLUSTER_DEBUG_RESET_STATUS);</div><div class='add'>+		hip04_set_snoop_filter(cluster, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	data = CORE_RESET_BIT(cpu) | NEON_RESET_BIT(cpu) | \</div><div class='hunk'>@@ -126,11 +136,15 @@ static int hip04_mcpm_power_up(unsigned int cpu, unsigned int cluster)</div><div class='ctx'> 	do {</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> 	} while (data == readl_relaxed(sys_status));</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We may fail to power up core again without this delay.</div><div class='ctx'> 	 * It's not mentioned in document. It's found by test.</div><div class='ctx'> 	 */</div><div class='ctx'> 	udelay(20);</div><div class='add'>+</div><div class='add'>+	arch_send_wakeup_ipi_mask(cpumask_of(l_cpu));</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	hip04_cpu_table[cluster][cpu]++;</div><div class='ctx'> 	spin_unlock_irq(&amp;boot_lock);</div><div class='hunk'>@@ -138,31 +152,30 @@ out:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hip04_mcpm_power_down(void)</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+static void hip04_cpu_die(unsigned int l_cpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mpidr, cpu, cluster;</div><div class='del'>-	bool skip_wfi = false, last_man = false;</div><div class='add'>+	bool last_man;</div><div class='ctx'> </div><div class='del'>-	mpidr = read_cpuid_mpidr();</div><div class='add'>+	mpidr = cpu_logical_map(l_cpu);</div><div class='ctx'> 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='ctx'> 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='ctx'> </div><div class='del'>-	__mcpm_cpu_going_down(cpu, cluster);</div><div class='del'>-</div><div class='ctx'> 	spin_lock(&amp;boot_lock);</div><div class='del'>-	BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);</div><div class='ctx'> 	hip04_cpu_table[cluster][cpu]--;</div><div class='ctx'> 	if (hip04_cpu_table[cluster][cpu] == 1) {</div><div class='ctx'> 		/* A power_up request went ahead of us. */</div><div class='del'>-		skip_wfi = true;</div><div class='add'>+		spin_unlock(&amp;boot_lock);</div><div class='add'>+		return;</div><div class='ctx'> 	} else if (hip04_cpu_table[cluster][cpu] &gt; 1) {</div><div class='ctx'> 		pr_err("Cluster %d CPU%d boots multiple times\n", cluster, cpu);</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	last_man = hip04_cluster_is_down(cluster);</div><div class='del'>-	if (last_man &amp;&amp; __mcpm_outbound_enter_critical(cpu, cluster)) {</div><div class='del'>-		spin_unlock(&amp;boot_lock);</div><div class='add'>+	spin_unlock(&amp;boot_lock);</div><div class='add'>+	if (last_man) {</div><div class='ctx'> 		/* Since it's Cortex A15, disable L2 prefetching. */</div><div class='ctx'> 		asm volatile(</div><div class='ctx'> 		"mcr	p15, 1, %0, c15, c0, 3 \n\t"</div><div class='hunk'>@@ -170,34 +183,30 @@ static void hip04_mcpm_power_down(void)</div><div class='ctx'> 		"dsb	"</div><div class='ctx'> 		: : "r" (0x400) );</div><div class='ctx'> 		v7_exit_coherency_flush(all);</div><div class='del'>-		hip04_set_snoop_filter(cluster, 0);</div><div class='del'>-		__mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN);</div><div class='ctx'> 	} else {</div><div class='del'>-		spin_unlock(&amp;boot_lock);</div><div class='ctx'> 		v7_exit_coherency_flush(louis);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__mcpm_cpu_down(cpu, cluster);</div><div class='del'>-</div><div class='del'>-	if (!skip_wfi)</div><div class='add'>+	for (;;)</div><div class='ctx'> 		wfi();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hip04_mcpm_wait_for_powerdown(unsigned int cpu, unsigned int cluster)</div><div class='add'>+static int hip04_cpu_kill(unsigned int l_cpu)</div><div class='ctx'> {</div><div class='add'>+	unsigned int mpidr, cpu, cluster;</div><div class='ctx'> 	unsigned int data, tries, count;</div><div class='del'>-	int ret = -ETIMEDOUT;</div><div class='ctx'> </div><div class='add'>+	mpidr = cpu_logical_map(l_cpu);</div><div class='add'>+	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='add'>+	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='ctx'> 	BUG_ON(cluster &gt;= HIP04_MAX_CLUSTERS ||</div><div class='ctx'> 	       cpu &gt;= HIP04_MAX_CPUS_PER_CLUSTER);</div><div class='ctx'> </div><div class='ctx'> 	count = TIMEOUT_MSEC / POLL_MSEC;</div><div class='ctx'> 	spin_lock_irq(&amp;boot_lock);</div><div class='ctx'> 	for (tries = 0; tries &lt; count; tries++) {</div><div class='del'>-		if (hip04_cpu_table[cluster][cpu]) {</div><div class='del'>-			ret = -EBUSY;</div><div class='add'>+		if (hip04_cpu_table[cluster][cpu])</div><div class='ctx'> 			goto err;</div><div class='del'>-		}</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> 		data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster));</div><div class='ctx'> 		if (data &amp; CORE_WFI_STATUS(cpu))</div><div class='hunk'>@@ -220,64 +229,22 @@ static int hip04_mcpm_wait_for_powerdown(unsigned int cpu, unsigned int cluster)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (tries &gt;= count)</div><div class='ctx'> 		goto err;</div><div class='add'>+	if (hip04_cluster_is_down(cluster))</div><div class='add'>+		hip04_set_snoop_filter(cluster, 0);</div><div class='ctx'> 	spin_unlock_irq(&amp;boot_lock);</div><div class='del'>-	return 0;</div><div class='add'>+	return 1;</div><div class='ctx'> err:</div><div class='ctx'> 	spin_unlock_irq(&amp;boot_lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hip04_mcpm_powered_up(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int mpidr, cpu, cluster;</div><div class='del'>-</div><div class='del'>-	mpidr = read_cpuid_mpidr();</div><div class='del'>-	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);</div><div class='del'>-	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;boot_lock);</div><div class='del'>-	if (!hip04_cpu_table[cluster][cpu])</div><div class='del'>-		hip04_cpu_table[cluster][cpu] = 1;</div><div class='del'>-	spin_unlock(&amp;boot_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __naked hip04_mcpm_power_up_setup(unsigned int affinity_level)</div><div class='del'>-{</div><div class='del'>-	asm volatile ("			\n"</div><div class='del'>-"	cmp	r0, #0			\n"</div><div class='del'>-"	bxeq	lr			\n"</div><div class='del'>-	/* calculate fabric phys address */</div><div class='del'>-"	adr	r2, 2f			\n"</div><div class='del'>-"	ldmia	r2, {r1, r3}		\n"</div><div class='del'>-"	sub	r0, r2, r1		\n"</div><div class='del'>-"	ldr	r2, [r0, r3]		\n"</div><div class='del'>-	/* get cluster id from MPIDR */</div><div class='del'>-"	mrc	p15, 0, r0, c0, c0, 5	\n"</div><div class='del'>-"	ubfx	r1, r0, #8, #8		\n"</div><div class='del'>-	/* 1 &lt;&lt; cluster id */</div><div class='del'>-"	mov	r0, #1			\n"</div><div class='del'>-"	mov	r3, r0, lsl r1		\n"</div><div class='del'>-"	ldr	r0, [r2, #"__stringify(FAB_SF_MODE)"]	\n"</div><div class='del'>-"	tst	r0, r3			\n"</div><div class='del'>-"	bxne	lr			\n"</div><div class='del'>-"	orr	r1, r0, r3		\n"</div><div class='del'>-"	str	r1, [r2, #"__stringify(FAB_SF_MODE)"]	\n"</div><div class='del'>-"1:	ldr	r0, [r2, #"__stringify(FAB_SF_MODE)"]	\n"</div><div class='del'>-"	tst	r0, r3			\n"</div><div class='del'>-"	beq	1b			\n"</div><div class='del'>-"	bx	lr			\n"</div><div class='del'>-</div><div class='del'>-"	.align	2			\n"</div><div class='del'>-"2:	.word	.			\n"</div><div class='del'>-"	.word	fabric_phys_addr	\n"</div><div class='del'>-	);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static const struct mcpm_platform_ops hip04_mcpm_ops = {</div><div class='del'>-	.power_up		= hip04_mcpm_power_up,</div><div class='del'>-	.power_down		= hip04_mcpm_power_down,</div><div class='del'>-	.wait_for_powerdown	= hip04_mcpm_wait_for_powerdown,</div><div class='del'>-	.powered_up		= hip04_mcpm_powered_up,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct smp_operations __initdata hip04_smp_ops = {</div><div class='add'>+	.smp_boot_secondary	= hip04_boot_secondary,</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+	.cpu_die		= hip04_cpu_die,</div><div class='add'>+	.cpu_kill		= hip04_cpu_kill,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool __init hip04_cpu_table_init(void)</div><div class='hunk'>@@ -298,7 +265,7 @@ static bool __init hip04_cpu_table_init(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init hip04_mcpm_init(void)</div><div class='add'>+static int __init hip04_smp_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np, *np_sctl, *np_fab;</div><div class='ctx'> 	struct resource fab_res;</div><div class='hunk'>@@ -353,10 +320,6 @@ static int __init hip04_mcpm_init(void)</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto err_table;</div><div class='ctx'> 	}</div><div class='del'>-	ret = mcpm_platform_register(&amp;hip04_mcpm_ops);</div><div class='del'>-	if (ret) {</div><div class='del'>-		goto err_table;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Fill the instruction address that is used after secondary core</div><div class='hunk'>@@ -364,13 +327,11 @@ static int __init hip04_mcpm_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	writel_relaxed(hip04_boot_method[0], relocation);</div><div class='ctx'> 	writel_relaxed(0xa5a5a5a5, relocation + 4);	/* magic number */</div><div class='del'>-	writel_relaxed(virt_to_phys(mcpm_entry_point), relocation + 8);</div><div class='add'>+	writel_relaxed(virt_to_phys(secondary_startup), relocation + 8);</div><div class='ctx'> 	writel_relaxed(0, relocation + 12);</div><div class='ctx'> 	iounmap(relocation);</div><div class='ctx'> </div><div class='del'>-	mcpm_sync_init(hip04_mcpm_power_up_setup);</div><div class='del'>-	mcpm_smp_set_ops();</div><div class='del'>-	pr_info("HiP04 MCPM initialized\n");</div><div class='add'>+	smp_set_ops(&amp;hip04_smp_ops);</div><div class='ctx'> 	return ret;</div><div class='ctx'> err_table:</div><div class='ctx'> 	iounmap(fabric);</div><div class='hunk'>@@ -383,4 +344,4 @@ err_reloc:</div><div class='ctx'> err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-early_initcall(hip04_mcpm_init);</div><div class='add'>+early_initcall(hip04_smp_init);</div><div class='head'>diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach-hisi/platsmp.c<br/>index 8880c8e8b296..51744127db66 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-hisi/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-hisi/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-hisi/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-hisi/platsmp.c</a></div><div class='hunk'>@@ -118,7 +118,7 @@ static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t jumpaddr;</div><div class='ctx'> </div><div class='del'>-	jumpaddr = virt_to_phys(hisi_secondary_startup);</div><div class='add'>+	jumpaddr = virt_to_phys(secondary_startup);</div><div class='ctx'> 	hix5hd2_set_scu_boot_addr(HIX5HD2_BOOT_ADDRESS, jumpaddr);</div><div class='ctx'> 	hix5hd2_set_cpu(cpu, true);</div><div class='ctx'> 	arch_send_wakeup_ipi_mask(cpumask_of(cpu));</div><div class='hunk'>@@ -156,7 +156,7 @@ static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 	struct device_node *node;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	jumpaddr = virt_to_phys(hisi_secondary_startup);</div><div class='add'>+	jumpaddr = virt_to_phys(secondary_startup);</div><div class='ctx'> 	hip01_set_boot_addr(HIP01_BOOT_ADDRESS, jumpaddr);</div><div class='ctx'> </div><div class='ctx'> 	node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");</div><div class='head'>diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig<br/>index 3a3d3e9d7bfd..573536f1bb73 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Kconfig</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> menuconfig ARCH_MXC</div><div class='del'>-	bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7</div><div class='add'>+	bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select ARM_CPU_SUSPEND if PM</div><div class='del'>-	select CLKSRC_MMIO</div><div class='add'>+	select CLKSRC_IMX_GPT</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select PM_OPP if PM</div><div class='hunk'>@@ -444,40 +444,6 @@ config MACH_MX35_3DS</div><div class='ctx'> 	  Include support for MX35PDK platform. This includes specific</div><div class='ctx'> 	  configurations for the board and its peripherals.</div><div class='ctx'> </div><div class='del'>-config MACH_EUKREA_CPUIMX35SD</div><div class='del'>-	bool "Support Eukrea CPUIMX35 Platform"</div><div class='del'>-	select IMX_HAVE_PLATFORM_FLEXCAN</div><div class='del'>-	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='del'>-	select IMX_HAVE_PLATFORM_MXC_EHCI</div><div class='del'>-	select IMX_HAVE_PLATFORM_MXC_NAND</div><div class='del'>-	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX</div><div class='del'>-	select USB_ULPI_VIEWPORT if USB_ULPI</div><div class='del'>-	select SOC_IMX35</div><div class='del'>-	help</div><div class='del'>-	  Include support for Eukrea CPUIMX35 platform. This includes</div><div class='del'>-	  specific configurations for the board and its peripherals.</div><div class='del'>-</div><div class='del'>-choice</div><div class='del'>-	prompt "Baseboard"</div><div class='del'>-	depends on MACH_EUKREA_CPUIMX35SD</div><div class='del'>-	default MACH_EUKREA_MBIMXSD35_BASEBOARD</div><div class='del'>-</div><div class='del'>-config MACH_EUKREA_MBIMXSD35_BASEBOARD</div><div class='del'>-	bool "Eukrea MBIMXSD development board"</div><div class='del'>-	select IMX_HAVE_PLATFORM_GPIO_KEYS</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='del'>-	select IMX_HAVE_PLATFORM_IPU_CORE</div><div class='del'>-	select IMX_HAVE_PLATFORM_SPI_IMX</div><div class='del'>-	select LEDS_GPIO_REGISTER</div><div class='del'>-	help</div><div class='del'>-	  This adds board specific devices that can be found on Eukrea's</div><div class='del'>-	  MBIMXSD evaluation board.</div><div class='del'>-</div><div class='del'>-endchoice</div><div class='del'>-</div><div class='ctx'> config MACH_VPR200</div><div class='ctx'> 	bool "Support VPR200 platform"</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='hunk'>@@ -496,10 +462,10 @@ config MACH_VPR200</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-if ARCH_MULTI_V5</div><div class='del'>-</div><div class='ctx'> comment "Device tree only"</div><div class='ctx'> </div><div class='add'>+if ARCH_MULTI_V5</div><div class='add'>+</div><div class='ctx'> config SOC_IMX25</div><div class='ctx'> 	bool "i.MX25 support"</div><div class='ctx'> 	select ARCH_MXC_IOMUX_V3</div><div class='hunk'>@@ -512,7 +478,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> if ARCH_MULTI_V7</div><div class='ctx'> </div><div class='del'>-comment "Device tree only"</div><div class='add'>+comment "Cortex-A platforms"</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX5</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -582,10 +548,33 @@ config SOC_IMX6SX</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX6 SoloX processor.</div><div class='ctx'> </div><div class='add'>+config SOC_IMX7D</div><div class='add'>+	bool "i.MX7 Dual support"</div><div class='add'>+	select PINCTRL_IMX7D</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select HAVE_IMX_ANATOP</div><div class='add'>+	select HAVE_IMX_MMDC</div><div class='add'>+	help</div><div class='add'>+		This enables support for Freescale i.MX7 Dual processor.</div><div class='add'>+</div><div class='add'>+config SOC_LS1021A</div><div class='add'>+	bool "Freescale LS1021A support"</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select HAVE_ARM_ARCH_TIMER</div><div class='add'>+	select PCI_DOMAINS if PCI</div><div class='add'>+	select ZONE_DMA if ARM_LPAE</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Freescale LS1021A processor.</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms"</div><div class='add'>+</div><div class='add'>+if ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M</div><div class='add'>+</div><div class='ctx'> config SOC_VF610</div><div class='ctx'> 	bool "Vybrid Family VF610 support"</div><div class='del'>-	select IRQ_DOMAIN_HIERARCHY</div><div class='del'>-	select ARM_GIC</div><div class='add'>+	select ARM_GIC if ARCH_MULTI_V7</div><div class='ctx'> 	select PINCTRL_VF610</div><div class='ctx'> 	select PL310_ERRATA_769419 if CACHE_L2X0</div><div class='ctx'> 	select SMP_ON_UP if SMP</div><div class='hunk'>@@ -599,7 +588,7 @@ choice</div><div class='ctx'> 	default VF_USE_ARM_GLOBAL_TIMER</div><div class='ctx'> </div><div class='ctx'> 	config VF_USE_ARM_GLOBAL_TIMER</div><div class='del'>-		bool "Use ARM Global Timer"</div><div class='add'>+		bool "Use ARM Global Timer" if ARCH_MULTI_V7</div><div class='ctx'> 		select ARM_GLOBAL_TIMER</div><div class='ctx'> 		select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK</div><div class='ctx'> 		help</div><div class='hunk'>@@ -613,16 +602,6 @@ choice</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='del'>-config SOC_LS1021A</div><div class='del'>-	bool "Freescale LS1021A support"</div><div class='del'>-	select ARM_GIC</div><div class='del'>-	select HAVE_ARM_ARCH_TIMER</div><div class='del'>-	select PCI_DOMAINS if PCI</div><div class='del'>-	select ZONE_DMA if ARM_LPAE</div><div class='del'>-</div><div class='del'>-	help</div><div class='del'>-	  This enables support for Freescale LS1021A processor.</div><div class='del'>-</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-imx/devices/Kconfig"</div><div class='head'>diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile<br/>index 3244cf1d2773..37c502ac9595 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Makefile</a></div><div class='hunk'>@@ -1,23 +1,18 @@</div><div class='del'>-obj-y := time.o cpu.o system.o irq-common.o</div><div class='add'>+obj-y := cpu.o system.o irq-common.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX1) += mm-imx1.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX21) += mm-imx21.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX25) += clk-imx25.o cpu-imx25.o mach-imx25.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o pm-imx3.o</div><div class='ctx'> </div><div class='ctx'> imx5-pm-$(CONFIG_PM) += pm-imx5.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o clk-imx51-imx53.o clk-cpu.o $(imx5-pm-y)</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \</div><div class='del'>-			    clk-pfd.o clk-busy.o clk.o \</div><div class='del'>-			    clk-fixup-div.o clk-fixup-mux.o \</div><div class='del'>-			    clk-gate-exclusive.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o</div><div class='ctx'> obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o</div><div class='hunk'>@@ -73,8 +68,6 @@ obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o</div><div class='ctx'> # i.MX35 based machines</div><div class='ctx'> obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o</div><div class='del'>-obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o</div><div class='del'>-obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o</div><div class='ctx'> obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o</div><div class='ctx'> obj-$(CONFIG_MACH_IMX35_DT) += imx35-dt.o</div><div class='ctx'> </div><div class='hunk'>@@ -87,13 +80,15 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a</div><div class='ctx'> obj-$(CONFIG_SMP) += headsmp.o platsmp.o</div><div class='ctx'> obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o</div><div class='ctx'> endif</div><div class='del'>-obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o mach-imx6sx.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_SUSPEND),y)</div><div class='ctx'> AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a</div><div class='ctx'> obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o</div><div class='ctx'> endif</div><div class='ctx'> obj-$(CONFIG_SOC_IMX6) += pm-imx6.o</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +96,7 @@ obj-$(CONFIG_SOC_IMX50) += mach-imx50.o</div><div class='ctx'> obj-$(CONFIG_SOC_IMX51) += mach-imx51.o</div><div class='ctx'> obj-$(CONFIG_SOC_IMX53) += mach-imx53.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o</div><div class='add'>+obj-$(CONFIG_SOC_VF610) += mach-vf610.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/Makefile.boot</a></div><div class='head'>diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c<br/>index 7f262fe4ba77..231bb250c571 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/anatop.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/anatop.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/anatop.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/anatop.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2013 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2013-2015 Freescale Semiconductor, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * The code contained herein is licensed under the GNU General Public</div><div class='ctx'>  * License. You may obtain a copy of the GNU General Public License</div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #define ANADIG_USB2_CHRG_DETECT	0x210</div><div class='ctx'> #define ANADIG_DIGPROG		0x260</div><div class='ctx'> #define ANADIG_DIGPROG_IMX6SL	0x280</div><div class='add'>+#define ANADIG_DIGPROG_IMX7D	0x800</div><div class='ctx'> </div><div class='ctx'> #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG	0x40000</div><div class='ctx'> #define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN	0x8</div><div class='hunk'>@@ -121,6 +122,8 @@ void __init imx_init_revision_from_anatop(void)</div><div class='ctx'> 	WARN_ON(!anatop_base);</div><div class='ctx'> 	if (of_device_is_compatible(np, "fsl,imx6sl-anatop"))</div><div class='ctx'> 		offset = ANADIG_DIGPROG_IMX6SL;</div><div class='add'>+	if (of_device_is_compatible(np, "fsl,imx7d-anatop"))</div><div class='add'>+		offset = ANADIG_DIGPROG_IMX7D;</div><div class='ctx'> 	digprog = readl_relaxed(anatop_base + offset);</div><div class='ctx'> 	iounmap(anatop_base);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h<br/>index 0f04e30b726d..21e4e8697a58 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/common.h</a></div><div class='hunk'>@@ -44,7 +44,6 @@ void imx27_soc_init(void);</div><div class='ctx'> void imx31_soc_init(void);</div><div class='ctx'> void imx35_soc_init(void);</div><div class='ctx'> void epit_timer_init(void __iomem *base, int irq);</div><div class='del'>-void mxc_timer_init(void __iomem *, int);</div><div class='ctx'> int mx1_clocks_init(unsigned long fref);</div><div class='ctx'> int mx21_clocks_init(unsigned long lref, unsigned long fref);</div><div class='ctx'> int mx27_clocks_init(unsigned long fref);</div><div class='hunk'>@@ -56,13 +55,10 @@ struct platform_device *mxc_register_gpio(char *name, int id,</div><div class='ctx'> void mxc_set_cpu_type(unsigned int type);</div><div class='ctx'> void mxc_restart(enum reboot_mode, const char *);</div><div class='ctx'> void mxc_arch_reset_init(void __iomem *);</div><div class='del'>-int mx51_revision(void);</div><div class='del'>-int mx53_revision(void);</div><div class='ctx'> void imx_set_aips(void __iomem *);</div><div class='ctx'> void imx_aips_allow_unprivileged_access(const char *compat);</div><div class='ctx'> int mxc_device_init(void);</div><div class='ctx'> void imx_set_soc_revision(unsigned int rev);</div><div class='del'>-unsigned int imx_get_soc_revision(void);</div><div class='ctx'> void imx_init_revision_from_anatop(void);</div><div class='ctx'> struct device *imx_soc_device_init(void);</div><div class='ctx'> void imx6_enable_rbc(bool enable);</div><div class='hunk'>@@ -87,7 +83,6 @@ enum mx3_cpu_pwr_mode {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);</div><div class='del'>-void imx_print_silicon_rev(const char *cpu, int srev);</div><div class='ctx'> </div><div class='ctx'> void imx_enable_cpu(int cpu, bool enable);</div><div class='ctx'> void imx_set_cpu_jump(int cpu, void *jump_addr);</div><div class='hunk'>@@ -111,7 +106,7 @@ void imx_gpc_hwirq_unmask(unsigned int hwirq);</div><div class='ctx'> void imx_anatop_init(void);</div><div class='ctx'> void imx_anatop_pre_suspend(void);</div><div class='ctx'> void imx_anatop_post_resume(void);</div><div class='del'>-int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);</div><div class='add'>+int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);</div><div class='ctx'> void imx6q_set_int_mem_clk_lpm(bool enable);</div><div class='ctx'> void imx6sl_set_wait_clk(bool enter);</div><div class='ctx'> int imx_mmdc_get_ddr_type(void);</div><div class='hunk'>@@ -121,26 +116,28 @@ int imx_cpu_kill(unsigned int cpu);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SUSPEND</div><div class='ctx'> void v7_cpu_resume(void);</div><div class='add'>+void imx53_suspend(void __iomem *ocram_vbase);</div><div class='add'>+extern const u32 imx53_suspend_sz;</div><div class='ctx'> void imx6_suspend(void __iomem *ocram_vbase);</div><div class='ctx'> #else</div><div class='ctx'> static inline void v7_cpu_resume(void) {}</div><div class='add'>+static inline void imx53_suspend(void __iomem *ocram_vbase) {}</div><div class='add'>+static const u32 imx53_suspend_sz;</div><div class='ctx'> static inline void imx6_suspend(void __iomem *ocram_vbase) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+void imx6_pm_ccm_init(const char *ccm_compat);</div><div class='ctx'> void imx6q_pm_init(void);</div><div class='ctx'> void imx6dl_pm_init(void);</div><div class='ctx'> void imx6sl_pm_init(void);</div><div class='ctx'> void imx6sx_pm_init(void);</div><div class='del'>-void imx6q_pm_set_ccm_base(void __iomem *base);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> void imx51_pm_init(void);</div><div class='ctx'> void imx53_pm_init(void);</div><div class='del'>-void imx5_pm_set_ccm_base(void __iomem *base);</div><div class='ctx'> #else</div><div class='ctx'> static inline void imx51_pm_init(void) {}</div><div class='ctx'> static inline void imx53_pm_init(void) {}</div><div class='del'>-static inline void imx5_pm_set_ccm_base(void __iomem *base) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NEON</div><div class='head'>diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c<br/>index df42c14ff749..a7fa92a7b1d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/cpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpu.c</a></div><div class='hunk'>@@ -130,6 +130,9 @@ struct device * __init imx_soc_device_init(void)</div><div class='ctx'> 	case MXC_CPU_IMX6Q:</div><div class='ctx'> 		soc_id = "i.MX6Q";</div><div class='ctx'> 		break;</div><div class='add'>+	case MXC_CPU_IMX7D:</div><div class='add'>+		soc_id = "i.MX7D";</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		soc_id = "Unknown";</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c<br/>index 8e21ccc1eda2..353bb8774112 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6q.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/cpuidle-imx6q.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6q.c</a></div><div class='hunk'>@@ -27,9 +27,9 @@ static int imx6q_enter_wait(struct cpuidle_device *dev,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!spin_trylock(&amp;master_lock))</div><div class='ctx'> 			goto idle;</div><div class='del'>-		imx6q_set_lpm(WAIT_UNCLOCKED);</div><div class='add'>+		imx6_set_lpm(WAIT_UNCLOCKED);</div><div class='ctx'> 		cpu_do_idle();</div><div class='del'>-		imx6q_set_lpm(WAIT_CLOCKED);</div><div class='add'>+		imx6_set_lpm(WAIT_CLOCKED);</div><div class='ctx'> 		spin_unlock(&amp;master_lock);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/mach-imx/cpuidle-imx6sl.c b/arch/arm/mach-imx/cpuidle-imx6sl.c<br/>index 5742a9fd1ef2..8d866fb674a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6sl.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/cpuidle-imx6sl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6sl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6sl.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> static int imx6sl_enter_wait(struct cpuidle_device *dev,</div><div class='ctx'> 			    struct cpuidle_driver *drv, int index)</div><div class='ctx'> {</div><div class='del'>-	imx6q_set_lpm(WAIT_UNCLOCKED);</div><div class='add'>+	imx6_set_lpm(WAIT_UNCLOCKED);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Software workaround for ERR005311, see function</div><div class='ctx'> 	 * description for details.</div><div class='hunk'>@@ -24,7 +24,7 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,</div><div class='ctx'> 	imx6sl_set_wait_clk(true);</div><div class='ctx'> 	cpu_do_idle();</div><div class='ctx'> 	imx6sl_set_wait_clk(false);</div><div class='del'>-	imx6q_set_lpm(WAIT_CLOCKED);</div><div class='add'>+	imx6_set_lpm(WAIT_CLOCKED);</div><div class='ctx'> </div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c<br/>index 2c9f1a8bf245..3c6672b3796b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6sx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/cpuidle-imx6sx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/cpuidle-imx6sx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/cpuidle-imx6sx.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@ static int imx6sx_idle_finish(unsigned long val)</div><div class='ctx'> static int imx6sx_enter_wait(struct cpuidle_device *dev,</div><div class='ctx'> 			    struct cpuidle_driver *drv, int index)</div><div class='ctx'> {</div><div class='del'>-	imx6q_set_lpm(WAIT_UNCLOCKED);</div><div class='add'>+	imx6_set_lpm(WAIT_UNCLOCKED);</div><div class='ctx'> </div><div class='ctx'> 	switch (index) {</div><div class='ctx'> 	case 1:</div><div class='hunk'>@@ -50,7 +50,7 @@ static int imx6sx_enter_wait(struct cpuidle_device *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	imx6q_set_lpm(WAIT_CLOCKED);</div><div class='add'>+	imx6_set_lpm(WAIT_CLOCKED);</div><div class='ctx'> </div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c<br/>deleted file mode 100644<br/>index 6edc940e0865..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,318 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2010 Eric Benard - eric@eukrea.com</div><div class='del'>- *</div><div class='del'>- * Based on pcm970-baseboard.c which is :</div><div class='del'>- * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;video/platform_lcd.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "devices-imx35.h"</div><div class='del'>-#include "hardware.h"</div><div class='del'>-#include "iomux-mx35.h"</div><div class='del'>-</div><div class='del'>-static const struct fb_videomode fb_modedb[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "CMO-QVGA",</div><div class='del'>-		.refresh	= 60,</div><div class='del'>-		.xres		= 320,</div><div class='del'>-		.yres		= 240,</div><div class='del'>-		.pixclock	= KHZ2PICOS(6500),</div><div class='del'>-		.left_margin	= 68,</div><div class='del'>-		.right_margin	= 20,</div><div class='del'>-		.upper_margin	= 15,</div><div class='del'>-		.lower_margin	= 4,</div><div class='del'>-		.hsync_len	= 30,</div><div class='del'>-		.vsync_len	= 3,</div><div class='del'>-		.sync		= 0,</div><div class='del'>-		.vmode		= FB_VMODE_NONINTERLACED,</div><div class='del'>-		.flag		= 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "DVI-VGA",</div><div class='del'>-		.refresh	= 60,</div><div class='del'>-		.xres		= 640,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-		.pixclock	= 32000,</div><div class='del'>-		.left_margin	= 100,</div><div class='del'>-		.right_margin	= 100,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 100,</div><div class='del'>-		.hsync_len	= 7,</div><div class='del'>-		.vsync_len	= 7,</div><div class='del'>-		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |</div><div class='del'>-				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,</div><div class='del'>-		.vmode		= FB_VMODE_NONINTERLACED,</div><div class='del'>-		.flag		= 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "DVI-SVGA",</div><div class='del'>-		.refresh	= 60,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 600,</div><div class='del'>-		.pixclock	= 25000,</div><div class='del'>-		.left_margin	= 75,</div><div class='del'>-		.right_margin	= 75,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 75,</div><div class='del'>-		.hsync_len	= 7,</div><div class='del'>-		.vsync_len	= 7,</div><div class='del'>-		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |</div><div class='del'>-				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,</div><div class='del'>-		.vmode		= FB_VMODE_NONINTERLACED,</div><div class='del'>-		.flag		= 0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct mx3fb_platform_data mx3fb_pdata __initdata = {</div><div class='del'>-	.name		= "CMO-QVGA",</div><div class='del'>-	.mode		= fb_modedb,</div><div class='del'>-	.num_modes	= ARRAY_SIZE(fb_modedb),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const iomux_v3_cfg_t eukrea_mbimxsd_pads[] __initconst = {</div><div class='del'>-	/* LCD */</div><div class='del'>-	MX35_PAD_LD0__IPU_DISPB_DAT_0,</div><div class='del'>-	MX35_PAD_LD1__IPU_DISPB_DAT_1,</div><div class='del'>-	MX35_PAD_LD2__IPU_DISPB_DAT_2,</div><div class='del'>-	MX35_PAD_LD3__IPU_DISPB_DAT_3,</div><div class='del'>-	MX35_PAD_LD4__IPU_DISPB_DAT_4,</div><div class='del'>-	MX35_PAD_LD5__IPU_DISPB_DAT_5,</div><div class='del'>-	MX35_PAD_LD6__IPU_DISPB_DAT_6,</div><div class='del'>-	MX35_PAD_LD7__IPU_DISPB_DAT_7,</div><div class='del'>-	MX35_PAD_LD8__IPU_DISPB_DAT_8,</div><div class='del'>-	MX35_PAD_LD9__IPU_DISPB_DAT_9,</div><div class='del'>-	MX35_PAD_LD10__IPU_DISPB_DAT_10,</div><div class='del'>-	MX35_PAD_LD11__IPU_DISPB_DAT_11,</div><div class='del'>-	MX35_PAD_LD12__IPU_DISPB_DAT_12,</div><div class='del'>-	MX35_PAD_LD13__IPU_DISPB_DAT_13,</div><div class='del'>-	MX35_PAD_LD14__IPU_DISPB_DAT_14,</div><div class='del'>-	MX35_PAD_LD15__IPU_DISPB_DAT_15,</div><div class='del'>-	MX35_PAD_LD16__IPU_DISPB_DAT_16,</div><div class='del'>-	MX35_PAD_LD17__IPU_DISPB_DAT_17,</div><div class='del'>-	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,</div><div class='del'>-	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,</div><div class='del'>-	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,</div><div class='del'>-	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,</div><div class='del'>-	/* Backlight */</div><div class='del'>-	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,</div><div class='del'>-	/* LCD_PWR */</div><div class='del'>-	MX35_PAD_D3_CLS__GPIO1_4,</div><div class='del'>-	/* LED */</div><div class='del'>-	MX35_PAD_LD23__GPIO3_29,</div><div class='del'>-	/* SWITCH */</div><div class='del'>-	MX35_PAD_LD19__GPIO3_25,</div><div class='del'>-	/* UART2 */</div><div class='del'>-	MX35_PAD_CTS2__UART2_CTS,</div><div class='del'>-	MX35_PAD_RTS2__UART2_RTS,</div><div class='del'>-	MX35_PAD_TXD2__UART2_TXD_MUX,</div><div class='del'>-	MX35_PAD_RXD2__UART2_RXD_MUX,</div><div class='del'>-	/* I2S */</div><div class='del'>-	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,</div><div class='del'>-	MX35_PAD_STXD4__AUDMUX_AUD4_TXD,</div><div class='del'>-	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,</div><div class='del'>-	MX35_PAD_SCK4__AUDMUX_AUD4_TXC,</div><div class='del'>-	/* CAN2 */</div><div class='del'>-	MX35_PAD_TX5_RX0__CAN2_TXCAN,</div><div class='del'>-	MX35_PAD_TX4_RX1__CAN2_RXCAN,</div><div class='del'>-	/* SDCARD */</div><div class='del'>-	MX35_PAD_SD1_CMD__ESDHC1_CMD,</div><div class='del'>-	MX35_PAD_SD1_CLK__ESDHC1_CLK,</div><div class='del'>-	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,</div><div class='del'>-	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,</div><div class='del'>-	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,</div><div class='del'>-	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,</div><div class='del'>-	/* SD1 CD */</div><div class='del'>-	MX35_PAD_LD18__GPIO3_24,</div><div class='del'>-	/* SPI */</div><div class='del'>-	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,</div><div class='del'>-	MX35_PAD_CSPI1_MISO__CSPI1_MISO,</div><div class='del'>-	MX35_PAD_CSPI1_SS0__GPIO1_18,</div><div class='del'>-	MX35_PAD_CSPI1_SS1__GPIO1_19,</div><div class='del'>-	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,</div><div class='del'>-	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define GPIO_LED1	IMX_GPIO_NR(3, 29)</div><div class='del'>-#define GPIO_SWITCH1	IMX_GPIO_NR(3, 25)</div><div class='del'>-#define GPIO_LCDPWR	IMX_GPIO_NR(1, 4)</div><div class='del'>-#define GPIO_SD1CD	IMX_GPIO_NR(3, 24)</div><div class='del'>-#define	GPIO_SPI1_SS0	IMX_GPIO_NR(1, 18)</div><div class='del'>-#define	GPIO_SPI1_SS1	IMX_GPIO_NR(1, 19)</div><div class='del'>-#define	GPIO_SPI1_IRQ	IMX_GPIO_NR(3, 5)</div><div class='del'>-</div><div class='del'>-static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,</div><div class='del'>-				   unsigned int power)</div><div class='del'>-{</div><div class='del'>-	if (power)</div><div class='del'>-		gpio_direction_output(GPIO_LCDPWR, 1);</div><div class='del'>-	else</div><div class='del'>-		gpio_direction_output(GPIO_LCDPWR, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {</div><div class='del'>-	.set_power		= eukrea_mbimxsd_lcd_power_set,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device eukrea_mbimxsd_lcd_powerdev = {</div><div class='del'>-	.name			= "platform-lcd",</div><div class='del'>-	.dev.platform_data	= &amp;eukrea_mbimxsd_lcd_power_data,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led eukrea_mbimxsd_leds[] = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "led1",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.gpio			= GPIO_LED1,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct gpio_led_platform_data</div><div class='del'>-		eukrea_mbimxsd_led_info __initconst = {</div><div class='del'>-	.leds		= eukrea_mbimxsd_leds,</div><div class='del'>-	.num_leds	= ARRAY_SIZE(eukrea_mbimxsd_leds),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio		= GPIO_SWITCH1,</div><div class='del'>-		.code		= BTN_0,</div><div class='del'>-		.desc		= "BP1",</div><div class='del'>-		.active_low	= 1,</div><div class='del'>-		.wakeup		= 1,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct gpio_keys_platform_data</div><div class='del'>-		eukrea_mbimxsd_button_data __initconst = {</div><div class='del'>-	.buttons	= eukrea_mbimxsd_gpio_buttons,</div><div class='del'>-	.nbuttons	= ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *platform_devices[] __initdata = {</div><div class='del'>-	&amp;eukrea_mbimxsd_lcd_powerdev,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='del'>-	.flags = IMXUART_HAVE_RTSCTS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {</div><div class='del'>-	{</div><div class='del'>-		I2C_BOARD_INFO("tlv320aic23", 0x1a),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const</div><div class='del'>-struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {</div><div class='del'>-	.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct esdhc_platform_data sd1_pdata = {</div><div class='del'>-	.cd_gpio = GPIO_SD1CD,</div><div class='del'>-	.cd_type = ESDHC_CD_GPIO,</div><div class='del'>-	.wp_type = ESDHC_WP_NONE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.modalias = "spidev",</div><div class='del'>-		.max_speed_hz = 20000000,</div><div class='del'>-		.bus_num = 0,</div><div class='del'>-		.chip_select = 0,</div><div class='del'>-		.mode = SPI_MODE_0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.modalias = "spidev",</div><div class='del'>-		.max_speed_hz = 20000000,</div><div class='del'>-		.bus_num = 0,</div><div class='del'>-		.chip_select = 1,</div><div class='del'>-		.mode = SPI_MODE_0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};</div><div class='del'>-</div><div class='del'>-static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {</div><div class='del'>-	.chipselect     = eukrea_mbimxsd35_spi_cs,</div><div class='del'>-	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * system init for baseboard usage. Will be called by cpuimx35 init.</div><div class='del'>- *</div><div class='del'>- * Add platform devices present on this baseboard and init</div><div class='del'>- * them from CPU side as far as required to use them later on</div><div class='del'>- */</div><div class='del'>-void __init eukrea_mbimxsd35_baseboard_init(void)</div><div class='del'>-{</div><div class='del'>-	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,</div><div class='del'>-			ARRAY_SIZE(eukrea_mbimxsd_pads)))</div><div class='del'>-		printk(KERN_ERR "error setting mbimxsd pads !\n");</div><div class='del'>-</div><div class='del'>-	imx35_add_imx_uart1(&amp;uart_pdata);</div><div class='del'>-	imx35_add_ipu_core();</div><div class='del'>-	imx35_add_mx3_sdc_fb(&amp;mx3fb_pdata);</div><div class='del'>-</div><div class='del'>-	imx35_add_imx_ssi(0, &amp;eukrea_mbimxsd_ssi_pdata);</div><div class='del'>-</div><div class='del'>-	imx35_add_flexcan1();</div><div class='del'>-	imx35_add_sdhci_esdhc_imx(0, &amp;sd1_pdata);</div><div class='del'>-</div><div class='del'>-	gpio_request(GPIO_LED1, "LED1");</div><div class='del'>-	gpio_direction_output(GPIO_LED1, 1);</div><div class='del'>-	gpio_free(GPIO_LED1);</div><div class='del'>-</div><div class='del'>-	gpio_request(GPIO_SWITCH1, "SWITCH1");</div><div class='del'>-	gpio_direction_input(GPIO_SWITCH1);</div><div class='del'>-	gpio_free(GPIO_SWITCH1);</div><div class='del'>-</div><div class='del'>-	gpio_request(GPIO_LCDPWR, "LCDPWR");</div><div class='del'>-	gpio_direction_output(GPIO_LCDPWR, 1);</div><div class='del'>-</div><div class='del'>-	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,</div><div class='del'>-				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));</div><div class='del'>-</div><div class='del'>-	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");</div><div class='del'>-	gpio_direction_input(GPIO_SPI1_IRQ);</div><div class='del'>-	gpio_free(GPIO_SPI1_IRQ);</div><div class='del'>-	imx35_add_spi_imx0(&amp;eukrea_mbimxsd35_spi0_data);</div><div class='del'>-	spi_register_board_info(eukrea_mbimxsd35_spi_board_info,</div><div class='del'>-		ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));</div><div class='del'>-</div><div class='del'>-	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));</div><div class='del'>-	gpio_led_register_device(-1, &amp;eukrea_mbimxsd_led_info);</div><div class='del'>-	imx_add_gpio_keys(&amp;eukrea_mbimxsd_button_data);</div><div class='del'>-	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c<br/>index 6d0893a3828e..8c4467fad837 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/gpc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/gpc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/gpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/gpc.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static int imx_gpc_domain_alloc(struct irq_domain *domain,</div><div class='ctx'> 	return irq_domain_alloc_irqs_parent(domain, irq, nr_irqs, &amp;parent_args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops imx_gpc_domain_ops = {</div><div class='add'>+static const struct irq_domain_ops imx_gpc_domain_ops = {</div><div class='ctx'> 	.xlate	= imx_gpc_domain_xlate,</div><div class='ctx'> 	.alloc	= imx_gpc_domain_alloc,</div><div class='ctx'> 	.free	= irq_domain_free_irqs_common,</div><div class='hunk'>@@ -291,8 +291,6 @@ void __init imx_gpc_check_dt(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_GENERIC_DOMAINS</div><div class='del'>-</div><div class='ctx'> static void _imx6q_pm_pu_power_off(struct generic_pm_domain *genpd)</div><div class='ctx'> {</div><div class='ctx'> 	int iso, iso2sw;</div><div class='hunk'>@@ -399,7 +397,6 @@ static struct genpd_onecell_data imx_gpc_onecell_data = {</div><div class='ctx'> static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *clk;</div><div class='del'>-	bool is_off;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	imx6q_pu_domain.reg = pu_reg;</div><div class='hunk'>@@ -416,18 +413,13 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)</div><div class='ctx'> 	}</div><div class='ctx'> 	imx6q_pu_domain.num_clks = i;</div><div class='ctx'> </div><div class='del'>-	is_off = IS_ENABLED(CONFIG_PM);</div><div class='del'>-	if (is_off) {</div><div class='del'>-		_imx6q_pm_pu_power_off(&amp;imx6q_pu_domain.base);</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * Enable power if compiled without CONFIG_PM in case the</div><div class='del'>-		 * bootloader disabled it.</div><div class='del'>-		 */</div><div class='del'>-		imx6q_pm_pu_power_on(&amp;imx6q_pu_domain.base);</div><div class='del'>-	}</div><div class='add'>+	/* Enable power always in case bootloader disabled it. */</div><div class='add'>+	imx6q_pm_pu_power_on(&amp;imx6q_pu_domain.base);</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	pm_genpd_init(&amp;imx6q_pu_domain.base, NULL, is_off);</div><div class='add'>+	pm_genpd_init(&amp;imx6q_pu_domain.base, NULL, false);</div><div class='ctx'> 	return of_genpd_add_provider_onecell(dev-&gt;of_node,</div><div class='ctx'> 					     &amp;imx_gpc_onecell_data);</div><div class='ctx'> </div><div class='hunk'>@@ -437,13 +429,6 @@ clk_err:</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-static inline int imx_gpc_genpd_init(struct device *dev, struct regulator *reg)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_GENERIC_DOMAINS */</div><div class='del'>-</div><div class='ctx'> static int imx_gpc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator *pu_reg;</div><div class='hunk'>@@ -474,7 +459,6 @@ static const struct of_device_id imx_gpc_dt_ids[] = {</div><div class='ctx'> static struct platform_driver imx_gpc_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "imx-gpc",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = imx_gpc_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = imx_gpc_probe,</div><div class='head'>diff --git a/arch/arm/mach-imx/hardware.h b/arch/arm/mach-imx/hardware.h<br/>index 76af2c03c241..d737f95ebb07 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/hardware.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/hardware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/hardware.h</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;soc/imx/revision.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S<br/>index de5047c8a6c8..b5e976816b63 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/headsmp.S</a></div><div class='hunk'>@@ -25,7 +25,6 @@ diag_reg_offset:</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> ENTRY(v7_secondary_startup)</div><div class='del'>-	bl	v7_invalidate_l1</div><div class='ctx'> 	set_diag_reg</div><div class='ctx'> 	b	secondary_startup</div><div class='ctx'> ENDPROC(v7_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c<br/>index d6a30753ca7c..6dd22cabf4d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/iomux-imx31.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/iomux-imx31.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/iomux-imx31.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/iomux-imx31.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ static DEFINE_SPINLOCK(gpio_mux_lock);</div><div class='ctx'> </div><div class='ctx'> #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK &amp; ~0x3)</div><div class='ctx'> </div><div class='del'>-static unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG];</div><div class='add'>+static DECLARE_BITMAP(mxc_pin_alloc_map, NB_PORTS * 32);</div><div class='ctx'> /*</div><div class='ctx'>  * set the mode for a IOMUX pin.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c<br/>deleted file mode 100644<br/>index 922ffd6ca039..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx35.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mach-cpuimx35.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,206 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2010 Eric Benard - eric@eukrea.com</div><div class='del'>- * Copyright (C) 2009 Sascha Hauer, Pengutronix</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-#include &lt;linux/memory.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/i2c/tsc2007.h&gt;</div><div class='del'>-#include &lt;linux/usb/otg.h&gt;</div><div class='del'>-#include &lt;linux/usb/ulpi.h&gt;</div><div class='del'>-#include &lt;linux/i2c-gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "devices-imx35.h"</div><div class='del'>-#include "ehci.h"</div><div class='del'>-#include "eukrea-baseboards.h"</div><div class='del'>-#include "hardware.h"</div><div class='del'>-#include "iomux-mx35.h"</div><div class='del'>-</div><div class='del'>-static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='del'>-	.flags = IMXUART_HAVE_RTSCTS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct imxi2c_platform_data</div><div class='del'>-		eukrea_cpuimx35_i2c0_data __initconst = {</div><div class='del'>-	.bitrate =		100000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TSC2007_IRQGPIO		IMX_GPIO_NR(3, 2)</div><div class='del'>-static int tsc2007_get_pendown_state(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return !gpio_get_value(TSC2007_IRQGPIO);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct tsc2007_platform_data tsc2007_info = {</div><div class='del'>-	.model			= 2007,</div><div class='del'>-	.x_plate_ohms		= 180,</div><div class='del'>-	.get_pendown_state = tsc2007_get_pendown_state,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {</div><div class='del'>-	{</div><div class='del'>-		I2C_BOARD_INFO("pcf8563", 0x51),</div><div class='del'>-	}, {</div><div class='del'>-		I2C_BOARD_INFO("tsc2007", 0x48),</div><div class='del'>-		.platform_data	= &amp;tsc2007_info,</div><div class='del'>-		/* irq number is run-time assigned */</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const iomux_v3_cfg_t eukrea_cpuimx35_pads[] __initconst = {</div><div class='del'>-	/* UART1 */</div><div class='del'>-	MX35_PAD_CTS1__UART1_CTS,</div><div class='del'>-	MX35_PAD_RTS1__UART1_RTS,</div><div class='del'>-	MX35_PAD_TXD1__UART1_TXD_MUX,</div><div class='del'>-	MX35_PAD_RXD1__UART1_RXD_MUX,</div><div class='del'>-	/* FEC */</div><div class='del'>-	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,</div><div class='del'>-	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,</div><div class='del'>-	MX35_PAD_FEC_RX_DV__FEC_RX_DV,</div><div class='del'>-	MX35_PAD_FEC_COL__FEC_COL,</div><div class='del'>-	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,</div><div class='del'>-	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,</div><div class='del'>-	MX35_PAD_FEC_TX_EN__FEC_TX_EN,</div><div class='del'>-	MX35_PAD_FEC_MDC__FEC_MDC,</div><div class='del'>-	MX35_PAD_FEC_MDIO__FEC_MDIO,</div><div class='del'>-	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,</div><div class='del'>-	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,</div><div class='del'>-	MX35_PAD_FEC_CRS__FEC_CRS,</div><div class='del'>-	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,</div><div class='del'>-	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,</div><div class='del'>-	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,</div><div class='del'>-	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,</div><div class='del'>-	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,</div><div class='del'>-	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,</div><div class='del'>-	/* I2C1 */</div><div class='del'>-	MX35_PAD_I2C1_CLK__I2C1_SCL,</div><div class='del'>-	MX35_PAD_I2C1_DAT__I2C1_SDA,</div><div class='del'>-	/* TSC2007 IRQ */</div><div class='del'>-	MX35_PAD_ATA_DA2__GPIO3_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct mxc_nand_platform_data</div><div class='del'>-		eukrea_cpuimx35_nand_board_info __initconst = {</div><div class='del'>-	.width		= 1,</div><div class='del'>-	.hw_ecc		= 1,</div><div class='del'>-	.flash_bbt	= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int eukrea_cpuimx35_otg_init(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	return mx35_initialize_usb_hw(pdev-&gt;id, MXC_EHCI_INTERFACE_DIFF_UNI);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct mxc_usbh_platform_data otg_pdata __initconst = {</div><div class='del'>-	.init	= eukrea_cpuimx35_otg_init,</div><div class='del'>-	.portsc	= MXC_EHCI_MODE_UTMI,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int eukrea_cpuimx35_usbh1_init(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	return mx35_initialize_usb_hw(pdev-&gt;id, MXC_EHCI_INTERFACE_SINGLE_UNI |</div><div class='del'>-			MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {</div><div class='del'>-	.init	= eukrea_cpuimx35_usbh1_init,</div><div class='del'>-	.portsc	= MXC_EHCI_MODE_SERIAL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {</div><div class='del'>-	.operating_mode	= FSL_USB2_DR_DEVICE,</div><div class='del'>-	.phy_mode	= FSL_USB2_PHY_UTMI,</div><div class='del'>-	.workaround	= FLS_USB2_WORKAROUND_ENGCM09152,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool otg_mode_host __initdata;</div><div class='del'>-</div><div class='del'>-static int __init eukrea_cpuimx35_otg_mode(char *options)</div><div class='del'>-{</div><div class='del'>-	if (!strcmp(options, "host"))</div><div class='del'>-		otg_mode_host = true;</div><div class='del'>-	else if (!strcmp(options, "device"))</div><div class='del'>-		otg_mode_host = false;</div><div class='del'>-	else</div><div class='del'>-		pr_info("otg_mode neither \"host\" nor \"device\". "</div><div class='del'>-			"Defaulting to device\n");</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("otg_mode=", eukrea_cpuimx35_otg_mode);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Board specific initialization.</div><div class='del'>- */</div><div class='del'>-static void __init eukrea_cpuimx35_init(void)</div><div class='del'>-{</div><div class='del'>-	imx35_soc_init();</div><div class='del'>-</div><div class='del'>-	mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads,</div><div class='del'>-			ARRAY_SIZE(eukrea_cpuimx35_pads));</div><div class='del'>-</div><div class='del'>-	imx35_add_fec(NULL);</div><div class='del'>-	imx35_add_imx2_wdt();</div><div class='del'>-</div><div class='del'>-	imx35_add_imx_uart0(&amp;uart_pdata);</div><div class='del'>-	imx35_add_mxc_nand(&amp;eukrea_cpuimx35_nand_board_info);</div><div class='del'>-</div><div class='del'>-	eukrea_cpuimx35_i2c_devices[1].irq = gpio_to_irq(TSC2007_IRQGPIO);</div><div class='del'>-	i2c_register_board_info(0, eukrea_cpuimx35_i2c_devices,</div><div class='del'>-			ARRAY_SIZE(eukrea_cpuimx35_i2c_devices));</div><div class='del'>-	imx35_add_imx_i2c0(&amp;eukrea_cpuimx35_i2c0_data);</div><div class='del'>-</div><div class='del'>-	if (otg_mode_host)</div><div class='del'>-		imx35_add_mxc_ehci_otg(&amp;otg_pdata);</div><div class='del'>-	else</div><div class='del'>-		imx35_add_fsl_usb2_udc(&amp;otg_device_pdata);</div><div class='del'>-</div><div class='del'>-	imx35_add_mxc_ehci_hs(&amp;usbh1_pdata);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD</div><div class='del'>-	eukrea_mbimxsd35_baseboard_init();</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init eukrea_cpuimx35_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	mx35_clocks_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")</div><div class='del'>-	/* Maintainer: Eukrea Electromatique */</div><div class='del'>-	.atag_offset = 0x100,</div><div class='del'>-	.map_io = mx35_map_io,</div><div class='del'>-	.init_early = imx35_init_early,</div><div class='del'>-	.init_irq = mx35_init_irq,</div><div class='del'>-	.init_time	= eukrea_cpuimx35_timer_init,</div><div class='del'>-	.init_machine = eukrea_cpuimx35_init,</div><div class='del'>-	.restart	= mxc_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c<br/>index 3ab61549ce0f..9602cc12d2f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6q.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mach-imx6q.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6q.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6q.c</a></div><div class='hunk'>@@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void)</div><div class='ctx'> 	imx_init_l2cache();</div><div class='ctx'> 	imx_src_init();</div><div class='ctx'> 	irqchip_init();</div><div class='add'>+	imx6_pm_ccm_init("fsl,imx6q-ccm");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char * const imx6q_dt_compat[] __initconst = {</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c<br/>index 12a1b098fc6a..300326373166 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6sl.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mach-imx6sl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6sl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6sl.c</a></div><div class='hunk'>@@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void)</div><div class='ctx'> 	imx_init_l2cache();</div><div class='ctx'> 	imx_src_init();</div><div class='ctx'> 	irqchip_init();</div><div class='add'>+	imx6_pm_ccm_init("fsl,imx6sl-ccm");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char * const imx6sl_dt_compat[] __initconst = {</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c<br/>index f17b7004c24b..6a0b0614de29 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6sx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mach-imx6sx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6sx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx6sx.c</a></div><div class='hunk'>@@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void)</div><div class='ctx'> 	imx_init_l2cache();</div><div class='ctx'> 	imx_src_init();</div><div class='ctx'> 	irqchip_init();</div><div class='add'>+	imx6_pm_ccm_init("fsl,imx6sx-ccm");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init imx6sx_init_late(void)</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c<br/>new file mode 100644<br/>index 000000000000..4d4a19099a43<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx7d.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-imx7d.c</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+static void __init imx7d_init_machine(void)</div><div class='add'>+{</div><div class='add'>+	struct device *parent;</div><div class='add'>+</div><div class='add'>+	parent = imx_soc_device_init();</div><div class='add'>+	if (parent == NULL)</div><div class='add'>+		pr_warn("failed to initialize soc device\n");</div><div class='add'>+</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='add'>+	imx_anatop_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init imx7d_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	imx_init_revision_from_anatop();</div><div class='add'>+	imx_src_init();</div><div class='add'>+	irqchip_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *imx7d_dt_compat[] __initconst = {</div><div class='add'>+	"fsl,imx7d",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")</div><div class='add'>+	.init_irq	= imx7d_init_irq,</div><div class='add'>+	.init_machine	= imx7d_init_machine,</div><div class='add'>+	.dt_compat	= imx7d_dt_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c<br/>index 2e7c75b66fe0..b20f6c14eda5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-vf610.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mach-vf610.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-vf610.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mach-vf610.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@ static const char * const vf610_dt_compat[] __initconst = {</div><div class='ctx'> 	"fsl,vf510",</div><div class='ctx'> 	"fsl,vf600",</div><div class='ctx'> 	"fsl,vf610",</div><div class='add'>+	"fsl,vf610m4",</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c<br/>index 0411f0664c15..db9621c718ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mmdc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mmdc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mmdc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mmdc.c</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> #define MMDC_MAPSR		0x404</div><div class='ctx'> #define BP_MMDC_MAPSR_PSD	0</div><div class='ctx'> #define BP_MMDC_MAPSR_PSS	4</div><div class='head'>diff --git a/arch/arm/mach-imx/mx27.h b/arch/arm/mach-imx/mx27.h<br/>index 8a65f192e7f3..f96bb2642677 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mx27.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mx27.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mx27.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mx27.h</a></div><div class='hunk'>@@ -231,8 +231,4 @@</div><div class='ctx'> #define MX27_DMA_REQ_SDHC3	36</div><div class='ctx'> #define MX27_DMA_REQ_NFC	37</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-extern int mx27_revision(void);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* ifndef __MACH_MX27_H__ */</div><div class='head'>diff --git a/arch/arm/mach-imx/mx3x.h b/arch/arm/mach-imx/mx3x.h<br/>index 96fb4fbc8ad7..6fec6114c2f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mx3x.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mx3x.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mx3x.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mx3x.h</a></div><div class='hunk'>@@ -185,11 +185,4 @@</div><div class='ctx'> </div><div class='ctx'> #define MX3x_PROD_SIGNATURE		0x1	/* For MX31 */</div><div class='ctx'> </div><div class='del'>-/* Mandatory defines used globally */</div><div class='del'>-</div><div class='del'>-#if !defined(__ASSEMBLY__) &amp;&amp; !defined(__MXC_BOOT_UNCOMPRESS)</div><div class='del'>-extern int mx35_revision(void);</div><div class='del'>-extern int mx31_revision(void);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* ifndef __MACH_MX3x_H__ */</div><div class='head'>diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h<br/>index 4c1343df2ba4..c4436d4fd6fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mxc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/mxc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mxc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/mxc.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='add'>+ * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.</div><div class='ctx'>  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or</div><div class='hunk'>@@ -38,22 +38,7 @@</div><div class='ctx'> #define MXC_CPU_IMX6DL		0x61</div><div class='ctx'> #define MXC_CPU_IMX6SX		0x62</div><div class='ctx'> #define MXC_CPU_IMX6Q		0x63</div><div class='del'>-</div><div class='del'>-#define IMX_CHIP_REVISION_1_0		0x10</div><div class='del'>-#define IMX_CHIP_REVISION_1_1		0x11</div><div class='del'>-#define IMX_CHIP_REVISION_1_2		0x12</div><div class='del'>-#define IMX_CHIP_REVISION_1_3		0x13</div><div class='del'>-#define IMX_CHIP_REVISION_1_4		0x14</div><div class='del'>-#define IMX_CHIP_REVISION_1_5		0x15</div><div class='del'>-#define IMX_CHIP_REVISION_2_0		0x20</div><div class='del'>-#define IMX_CHIP_REVISION_2_1		0x21</div><div class='del'>-#define IMX_CHIP_REVISION_2_2		0x22</div><div class='del'>-#define IMX_CHIP_REVISION_2_3		0x23</div><div class='del'>-#define IMX_CHIP_REVISION_3_0		0x30</div><div class='del'>-#define IMX_CHIP_REVISION_3_1		0x31</div><div class='del'>-#define IMX_CHIP_REVISION_3_2		0x32</div><div class='del'>-#define IMX_CHIP_REVISION_3_3		0x33</div><div class='del'>-#define IMX_CHIP_REVISION_UNKNOWN	0xff</div><div class='add'>+#define MXC_CPU_IMX7D		0x72</div><div class='ctx'> </div><div class='ctx'> #define IMX_DDR_TYPE_LPDDR2		1</div><div class='ctx'> </div><div class='hunk'>@@ -185,6 +170,11 @@ static inline bool cpu_is_imx6q(void)</div><div class='ctx'> 	return __mxc_cpu_type == MXC_CPU_IMX6Q;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool cpu_is_imx7d(void)</div><div class='add'>+{</div><div class='add'>+	return __mxc_cpu_type == MXC_CPU_IMX7D;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct cpu_op {</div><div class='ctx'> 	u32 cpu_rate;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c<br/>index f1f80ab73e69..1885676c23c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx5.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/pm-imx5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/pm-imx5.c</a></div><div class='hunk'>@@ -13,7 +13,14 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/genalloc.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/fncpy.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -49,29 +56,91 @@</div><div class='ctx'>  */</div><div class='ctx'> #define IMX5_DEFAULT_CPU_IDLE_STATE WAIT_UNCLOCKED_POWER_OFF</div><div class='ctx'> </div><div class='add'>+struct imx5_suspend_io_state {</div><div class='add'>+	u32	offset;</div><div class='add'>+	u32	clear;</div><div class='add'>+	u32	set;</div><div class='add'>+	u32	saved_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct imx5_pm_data {</div><div class='add'>+	phys_addr_t ccm_addr;</div><div class='ctx'> 	phys_addr_t cortex_addr;</div><div class='ctx'> 	phys_addr_t gpc_addr;</div><div class='add'>+	phys_addr_t m4if_addr;</div><div class='add'>+	phys_addr_t iomuxc_addr;</div><div class='add'>+	void (*suspend_asm)(void __iomem *ocram_vbase);</div><div class='add'>+	const u32 *suspend_asm_sz;</div><div class='add'>+	const struct imx5_suspend_io_state *suspend_io_config;</div><div class='add'>+	int suspend_io_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct imx5_suspend_io_state imx53_suspend_io_config[] = {</div><div class='add'>+#define MX53_DSE_HIGHZ_MASK (0x7 &lt;&lt; 19)</div><div class='add'>+	{.offset = 0x584, .clear = MX53_DSE_HIGHZ_MASK}, /* DQM0 */</div><div class='add'>+	{.offset = 0x594, .clear = MX53_DSE_HIGHZ_MASK}, /* DQM1 */</div><div class='add'>+	{.offset = 0x560, .clear = MX53_DSE_HIGHZ_MASK}, /* DQM2 */</div><div class='add'>+	{.offset = 0x554, .clear = MX53_DSE_HIGHZ_MASK}, /* DQM3 */</div><div class='add'>+	{.offset = 0x574, .clear = MX53_DSE_HIGHZ_MASK}, /* CAS */</div><div class='add'>+	{.offset = 0x588, .clear = MX53_DSE_HIGHZ_MASK}, /* RAS */</div><div class='add'>+	{.offset = 0x578, .clear = MX53_DSE_HIGHZ_MASK}, /* SDCLK_0 */</div><div class='add'>+	{.offset = 0x570, .clear = MX53_DSE_HIGHZ_MASK}, /* SDCLK_1 */</div><div class='add'>+</div><div class='add'>+	{.offset = 0x580, .clear = MX53_DSE_HIGHZ_MASK}, /* SDODT0 */</div><div class='add'>+	{.offset = 0x564, .clear = MX53_DSE_HIGHZ_MASK}, /* SDODT1 */</div><div class='add'>+	{.offset = 0x57c, .clear = MX53_DSE_HIGHZ_MASK}, /* SDQS0 */</div><div class='add'>+	{.offset = 0x590, .clear = MX53_DSE_HIGHZ_MASK}, /* SDQS1 */</div><div class='add'>+	{.offset = 0x568, .clear = MX53_DSE_HIGHZ_MASK}, /* SDQS2 */</div><div class='add'>+	{.offset = 0x558, .clear = MX53_DSE_HIGHZ_MASK}, /* SDSQ3 */</div><div class='add'>+	{.offset = 0x6f0, .clear = MX53_DSE_HIGHZ_MASK}, /* GRP_ADDS */</div><div class='add'>+	{.offset = 0x718, .clear = MX53_DSE_HIGHZ_MASK}, /* GRP_BODS */</div><div class='add'>+	{.offset = 0x71c, .clear = MX53_DSE_HIGHZ_MASK}, /* GRP_B1DS */</div><div class='add'>+	{.offset = 0x728, .clear = MX53_DSE_HIGHZ_MASK}, /* GRP_B2DS */</div><div class='add'>+	{.offset = 0x72c, .clear = MX53_DSE_HIGHZ_MASK}, /* GRP_B3DS */</div><div class='add'>+</div><div class='add'>+	/* Controls the CKE signal which is required to leave self refresh */</div><div class='add'>+	{.offset = 0x720, .clear = MX53_DSE_HIGHZ_MASK, .set = 1 &lt;&lt; 19}, /* CTLDS */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct imx5_pm_data imx51_pm_data __initconst = {</div><div class='add'>+	.ccm_addr = 0x73fd4000,</div><div class='ctx'> 	.cortex_addr = 0x83fa0000,</div><div class='ctx'> 	.gpc_addr = 0x73fd8000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct imx5_pm_data imx53_pm_data __initconst = {</div><div class='add'>+	.ccm_addr = 0x53fd4000,</div><div class='ctx'> 	.cortex_addr = 0x63fa0000,</div><div class='ctx'> 	.gpc_addr = 0x53fd8000,</div><div class='add'>+	.m4if_addr = 0x63fd8000,</div><div class='add'>+	.iomuxc_addr = 0x53fa8000,</div><div class='add'>+	.suspend_asm = &amp;imx53_suspend,</div><div class='add'>+	.suspend_asm_sz = &amp;imx53_suspend_sz,</div><div class='add'>+	.suspend_io_config = imx53_suspend_io_config,</div><div class='add'>+	.suspend_io_count = ARRAY_SIZE(imx53_suspend_io_config),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define MX5_MAX_SUSPEND_IOSTATE ARRAY_SIZE(imx53_suspend_io_config)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This structure is for passing necessary data for low level ocram</div><div class='add'>+ * suspend code(arch/arm/mach-imx/suspend-imx53.S), if this struct</div><div class='add'>+ * definition is changed, the offset definition in that file</div><div class='add'>+ * must be also changed accordingly otherwise, the suspend to ocram</div><div class='add'>+ * function will be broken!</div><div class='add'>+ */</div><div class='add'>+struct imx5_cpu_suspend_info {</div><div class='add'>+	void __iomem	*m4if_base;</div><div class='add'>+	void __iomem	*iomuxc_base;</div><div class='add'>+	u32		io_count;</div><div class='add'>+	struct imx5_suspend_io_state io_state[MX5_MAX_SUSPEND_IOSTATE];</div><div class='add'>+} __aligned(8);</div><div class='add'>+</div><div class='ctx'> static void __iomem *ccm_base;</div><div class='ctx'> static void __iomem *cortex_base;</div><div class='ctx'> static void __iomem *gpc_base;</div><div class='del'>-</div><div class='del'>-void __init imx5_pm_set_ccm_base(void __iomem *base)</div><div class='del'>-{</div><div class='del'>-	ccm_base = base;</div><div class='del'>-}</div><div class='add'>+static void __iomem *suspend_ocram_base;</div><div class='add'>+static void (*imx5_suspend_in_ocram_fn)(void __iomem *ocram_vbase);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * set cpu low power mode before WFI instruction. This function is called</div><div class='hunk'>@@ -161,8 +230,15 @@ static int mx5_suspend_enter(suspend_state_t state)</div><div class='ctx'> 		/*clear the EMPGC0/1 bits */</div><div class='ctx'> 		__raw_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR);</div><div class='ctx'> 		__raw_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR);</div><div class='add'>+</div><div class='add'>+		if (imx5_suspend_in_ocram_fn)</div><div class='add'>+			imx5_suspend_in_ocram_fn(suspend_ocram_base);</div><div class='add'>+		else</div><div class='add'>+			cpu_do_idle();</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		cpu_do_idle();</div><div class='ctx'> 	}</div><div class='del'>-	cpu_do_idle();</div><div class='ctx'> </div><div class='ctx'> 	/* return registers to default idle state */</div><div class='ctx'> 	mx5_cpu_lp_set(IMX5_DEFAULT_CPU_IDLE_STATE);</div><div class='hunk'>@@ -194,6 +270,111 @@ static void imx5_pm_idle(void)</div><div class='ctx'> 	imx5_cpu_do_idle();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init imx_suspend_alloc_ocram(</div><div class='add'>+				size_t size,</div><div class='add'>+				void __iomem **virt_out,</div><div class='add'>+				phys_addr_t *phys_out)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct gen_pool *ocram_pool;</div><div class='add'>+	unsigned long ocram_base;</div><div class='add'>+	void __iomem *virt;</div><div class='add'>+	phys_addr_t phys;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Copied from imx6: TODO factorize */</div><div class='add'>+	node = of_find_compatible_node(NULL, NULL, "mmio-sram");</div><div class='add'>+	if (!node) {</div><div class='add'>+		pr_warn("%s: failed to find ocram node!\n", __func__);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(node);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pr_warn("%s: failed to find ocram device!\n", __func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocram_pool = gen_pool_get(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!ocram_pool) {</div><div class='add'>+		pr_warn("%s: ocram pool unavailable!\n", __func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocram_base = gen_pool_alloc(ocram_pool, size);</div><div class='add'>+	if (!ocram_base) {</div><div class='add'>+		pr_warn("%s: unable to alloc ocram!\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);</div><div class='add'>+	virt = __arm_ioremap_exec(phys, size, false);</div><div class='add'>+	if (phys_out)</div><div class='add'>+		*phys_out = phys;</div><div class='add'>+	if (virt_out)</div><div class='add'>+		*virt_out = virt;</div><div class='add'>+</div><div class='add'>+put_node:</div><div class='add'>+	of_node_put(node);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init imx5_suspend_init(const struct imx5_pm_data *soc_data)</div><div class='add'>+{</div><div class='add'>+	struct imx5_cpu_suspend_info *suspend_info;</div><div class='add'>+	int ret;</div><div class='add'>+	/* Need this to avoid compile error due to const typeof in fncpy.h */</div><div class='add'>+	void (*suspend_asm)(void __iomem *) = soc_data-&gt;suspend_asm;</div><div class='add'>+</div><div class='add'>+	if (!suspend_asm)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!soc_data-&gt;suspend_asm_sz || !*soc_data-&gt;suspend_asm_sz)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = imx_suspend_alloc_ocram(</div><div class='add'>+		*soc_data-&gt;suspend_asm_sz + sizeof(*suspend_info),</div><div class='add'>+		&amp;suspend_ocram_base, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	suspend_info = suspend_ocram_base;</div><div class='add'>+</div><div class='add'>+	suspend_info-&gt;io_count = soc_data-&gt;suspend_io_count;</div><div class='add'>+	memcpy(suspend_info-&gt;io_state, soc_data-&gt;suspend_io_config,</div><div class='add'>+	       sizeof(*suspend_info-&gt;io_state) * soc_data-&gt;suspend_io_count);</div><div class='add'>+</div><div class='add'>+	suspend_info-&gt;m4if_base = ioremap(soc_data-&gt;m4if_addr, SZ_16K);</div><div class='add'>+	if (!suspend_info-&gt;m4if_base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto failed_map_m4if;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	suspend_info-&gt;iomuxc_base = ioremap(soc_data-&gt;iomuxc_addr, SZ_16K);</div><div class='add'>+	if (!suspend_info-&gt;iomuxc_base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto failed_map_iomuxc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	imx5_suspend_in_ocram_fn = fncpy(</div><div class='add'>+		suspend_ocram_base + sizeof(*suspend_info),</div><div class='add'>+		suspend_asm,</div><div class='add'>+		*soc_data-&gt;suspend_asm_sz);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failed_map_iomuxc:</div><div class='add'>+	iounmap(suspend_info-&gt;m4if_base);</div><div class='add'>+</div><div class='add'>+failed_map_m4if:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init imx5_pm_common_init(const struct imx5_pm_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -208,6 +389,7 @@ static int __init imx5_pm_common_init(const struct imx5_pm_data *data)</div><div class='ctx'> </div><div class='ctx'> 	arm_pm_idle = imx5_pm_idle;</div><div class='ctx'> </div><div class='add'>+	ccm_base = ioremap(data-&gt;ccm_addr, SZ_16K);</div><div class='ctx'> 	cortex_base = ioremap(data-&gt;cortex_addr, SZ_16K);</div><div class='ctx'> 	gpc_base = ioremap(data-&gt;gpc_addr, SZ_16K);</div><div class='ctx'> 	WARN_ON(!ccm_base || !cortex_base || !gpc_base);</div><div class='hunk'>@@ -219,6 +401,11 @@ static int __init imx5_pm_common_init(const struct imx5_pm_data *data)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		pr_warn("%s: cpuidle init failed %d\n", __func__, ret);</div><div class='ctx'> </div><div class='add'>+	ret = imx5_suspend_init(data);</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_warn("%s: No DDR LPM support with suspend %d!\n",</div><div class='add'>+			__func__, ret);</div><div class='add'>+</div><div class='ctx'> 	suspend_set_ops(&amp;mx5_suspend_ops);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -226,10 +413,12 @@ static int __init imx5_pm_common_init(const struct imx5_pm_data *data)</div><div class='ctx'> </div><div class='ctx'> void __init imx51_pm_init(void)</div><div class='ctx'> {</div><div class='del'>-	imx5_pm_common_init(&amp;imx51_pm_data);</div><div class='add'>+	if (IS_ENABLED(CONFIG_SOC_IMX51))</div><div class='add'>+		imx5_pm_common_init(&amp;imx51_pm_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init imx53_pm_init(void)</div><div class='ctx'> {</div><div class='del'>-	imx5_pm_common_init(&amp;imx53_pm_data);</div><div class='add'>+	if (IS_ENABLED(CONFIG_SOC_IMX53))</div><div class='add'>+		imx5_pm_common_init(&amp;imx53_pm_data);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c<br/>index 6a7c6fc780cc..93ecf559d06d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx6.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/pm-imx6.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx6.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/pm-imx6.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ static void imx6q_enable_wb(bool enable)</div><div class='ctx'> 	writel_relaxed(val, ccm_base + CCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)</div><div class='add'>+int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val = readl_relaxed(ccm_base + CLPCR);</div><div class='ctx'> </div><div class='hunk'>@@ -340,7 +340,7 @@ static int imx6q_pm_enter(suspend_state_t state)</div><div class='ctx'> {</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case PM_SUSPEND_STANDBY:</div><div class='del'>-		imx6q_set_lpm(STOP_POWER_ON);</div><div class='add'>+		imx6_set_lpm(STOP_POWER_ON);</div><div class='ctx'> 		imx6q_set_int_mem_clk_lpm(true);</div><div class='ctx'> 		imx_gpc_pre_suspend(false);</div><div class='ctx'> 		if (cpu_is_imx6sl())</div><div class='hunk'>@@ -350,10 +350,10 @@ static int imx6q_pm_enter(suspend_state_t state)</div><div class='ctx'> 		if (cpu_is_imx6sl())</div><div class='ctx'> 			imx6sl_set_wait_clk(false);</div><div class='ctx'> 		imx_gpc_post_resume();</div><div class='del'>-		imx6q_set_lpm(WAIT_CLOCKED);</div><div class='add'>+		imx6_set_lpm(WAIT_CLOCKED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PM_SUSPEND_MEM:</div><div class='del'>-		imx6q_set_lpm(STOP_POWER_OFF);</div><div class='add'>+		imx6_set_lpm(STOP_POWER_OFF);</div><div class='ctx'> 		imx6q_set_int_mem_clk_lpm(false);</div><div class='ctx'> 		imx6q_enable_wb(true);</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -373,7 +373,7 @@ static int imx6q_pm_enter(suspend_state_t state)</div><div class='ctx'> 		imx6_enable_rbc(false);</div><div class='ctx'> 		imx6q_enable_wb(false);</div><div class='ctx'> 		imx6q_set_int_mem_clk_lpm(true);</div><div class='del'>-		imx6q_set_lpm(WAIT_CLOCKED);</div><div class='add'>+		imx6_set_lpm(WAIT_CLOCKED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -392,11 +392,6 @@ static const struct platform_suspend_ops imx6q_pm_ops = {</div><div class='ctx'> 	.valid = imx6q_pm_valid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __init imx6q_pm_set_ccm_base(void __iomem *base)</div><div class='del'>-{</div><div class='del'>-	ccm_base = base;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init imx6_pm_get_base(struct imx6_pm_base *base,</div><div class='ctx'> 				const char *compat)</div><div class='ctx'> {</div><div class='hunk'>@@ -456,7 +451,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)</div><div class='ctx'> 		goto put_node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ocram_pool = dev_get_gen_pool(&amp;pdev-&gt;dev);</div><div class='add'>+	ocram_pool = gen_pool_get(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!ocram_pool) {</div><div class='ctx'> 		pr_warn("%s: ocram pool unavailable!\n", __func__);</div><div class='ctx'> 		ret = -ENODEV;</div><div class='hunk'>@@ -482,8 +477,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ccm physical address is not used by asm code currently,</div><div class='del'>-	 * so get ccm virtual address directly, as we already have</div><div class='del'>-	 * it from ccm driver.</div><div class='add'>+	 * so get ccm virtual address directly.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pm_info-&gt;ccm_base.vbase = ccm_base;</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +562,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is for SW workaround step #1 of ERR007265, see comments</div><div class='del'>-	 * in imx6q_set_lpm for details of this errata.</div><div class='add'>+	 * in imx6_set_lpm for details of this errata.</div><div class='ctx'> 	 * Force IOMUXC irq pending, so that the interrupt to GPC can be</div><div class='ctx'> 	 * used to deassert dsm_request signal when the signal gets</div><div class='ctx'> 	 * asserted unexpectedly.</div><div class='hunk'>@@ -579,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata</div><div class='ctx'> 				   IMX6Q_GPR1_GINT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init imx6_pm_ccm_init(const char *ccm_compat)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, ccm_compat);</div><div class='add'>+	ccm_base = of_iomap(np, 0);</div><div class='add'>+	BUG_ON(!ccm_base);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core</div><div class='add'>+	 * clock being shut down unexpectedly by WAIT mode.</div><div class='add'>+	 */</div><div class='add'>+	val = readl_relaxed(ccm_base + CLPCR);</div><div class='add'>+	val &amp;= ~BM_CLPCR_LPM;</div><div class='add'>+	writel_relaxed(val, ccm_base + CLPCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init imx6q_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	imx6_pm_common_init(&amp;imx6q_pm_data);</div><div class='head'>diff --git a/arch/arm/mach-imx/suspend-imx53.S b/arch/arm/mach-imx/suspend-imx53.S<br/>new file mode 100644<br/>index 000000000000..5ed078ad110a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/suspend-imx53.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-imx/suspend-imx53.S</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc.</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#define M4IF_MCR0_OFFSET			(0x008C)</div><div class='add'>+#define M4IF_MCR0_FDVFS				(0x1 &lt;&lt; 11)</div><div class='add'>+#define M4IF_MCR0_FDVACK			(0x1 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+	.align 3</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ==================== low level suspend ====================</div><div class='add'>+ *</div><div class='add'>+ * On entry</div><div class='add'>+ * r0: pm_info structure address;</div><div class='add'>+ *</div><div class='add'>+ * suspend ocram space layout:</div><div class='add'>+ * ======================== high address ======================</div><div class='add'>+ *                              .</div><div class='add'>+ *                              .</div><div class='add'>+ *                              .</div><div class='add'>+ *                              ^</div><div class='add'>+ *                              ^</div><div class='add'>+ *                              ^</div><div class='add'>+ *                      imx53_suspend code</div><div class='add'>+ *              PM_INFO structure(imx53_suspend_info)</div><div class='add'>+ * ======================== low address =======================</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Offsets of members of struct imx53_suspend_info */</div><div class='add'>+#define SUSPEND_INFO_MX53_M4IF_V_OFFSET		0x0</div><div class='add'>+#define SUSPEND_INFO_MX53_IOMUXC_V_OFFSET	0x4</div><div class='add'>+#define SUSPEND_INFO_MX53_IO_COUNT_OFFSET	0x8</div><div class='add'>+#define SUSPEND_INFO_MX53_IO_STATE_OFFSET	0xc</div><div class='add'>+</div><div class='add'>+ENTRY(imx53_suspend)</div><div class='add'>+	stmfd	sp!, {r4,r5,r6,r7}</div><div class='add'>+</div><div class='add'>+	/* Save pad config */</div><div class='add'>+	ldr	r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]</div><div class='add'>+	cmp	r1, #0</div><div class='add'>+	beq	skip_pad_conf_1</div><div class='add'>+</div><div class='add'>+	add	r2, r0, #SUSPEND_INFO_MX53_IO_STATE_OFFSET</div><div class='add'>+	ldr	r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]</div><div class='add'>+</div><div class='add'>+1:</div><div class='add'>+	ldr	r5, [r2], #12	/* IOMUXC register offset */</div><div class='add'>+	ldr	r6, [r3, r5]	/* current value */</div><div class='add'>+	str	r6, [r2], #4	/* save area */</div><div class='add'>+	subs	r1, r1, #1</div><div class='add'>+	bne	1b</div><div class='add'>+</div><div class='add'>+skip_pad_conf_1:</div><div class='add'>+	/* Set FDVFS bit of M4IF_MCR0 to request DDR to enter self-refresh */</div><div class='add'>+	ldr	r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET]</div><div class='add'>+	ldr	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+	orr	r2, r2, #M4IF_MCR0_FDVFS</div><div class='add'>+	str	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+</div><div class='add'>+	/* Poll FDVACK bit of M4IF_MCR to wait for DDR to enter self-refresh */</div><div class='add'>+wait_sr_ack:</div><div class='add'>+	ldr	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+	ands	r2, r2, #M4IF_MCR0_FDVACK</div><div class='add'>+	beq	wait_sr_ack</div><div class='add'>+</div><div class='add'>+	/* Set pad config */</div><div class='add'>+	ldr	r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]</div><div class='add'>+	cmp	r1, #0</div><div class='add'>+	beq	skip_pad_conf_2</div><div class='add'>+</div><div class='add'>+	add	r2, r0, #SUSPEND_INFO_MX53_IO_STATE_OFFSET</div><div class='add'>+	ldr	r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]</div><div class='add'>+</div><div class='add'>+2:</div><div class='add'>+	ldr	r5, [r2], #4	/* IOMUXC register offset */</div><div class='add'>+	ldr	r6, [r2], #4	/* clear */</div><div class='add'>+	ldr	r7, [r3, r5]</div><div class='add'>+	bic	r7, r7, r6</div><div class='add'>+	ldr	r6, [r2], #8	/* set */</div><div class='add'>+	orr	r7, r7, r6</div><div class='add'>+	str	r7, [r3, r5]</div><div class='add'>+	subs	r1, r1, #1</div><div class='add'>+	bne	2b</div><div class='add'>+</div><div class='add'>+skip_pad_conf_2:</div><div class='add'>+	/* Zzz, enter stop mode */</div><div class='add'>+	wfi</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+</div><div class='add'>+	/* Restore pad config */</div><div class='add'>+	ldr	r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]</div><div class='add'>+	cmp	r1, #0</div><div class='add'>+	beq	skip_pad_conf_3</div><div class='add'>+</div><div class='add'>+	add	r2, r0, #SUSPEND_INFO_MX53_IO_STATE_OFFSET</div><div class='add'>+	ldr	r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]</div><div class='add'>+</div><div class='add'>+3:</div><div class='add'>+	ldr	r5, [r2], #12	/* IOMUXC register offset */</div><div class='add'>+	ldr	r6, [r2], #4	/* saved value */</div><div class='add'>+	str	r6, [r3, r5]</div><div class='add'>+	subs	r1, r1, #1</div><div class='add'>+	bne	3b</div><div class='add'>+</div><div class='add'>+skip_pad_conf_3:</div><div class='add'>+	/* Clear FDVFS bit of M4IF_MCR0 to request DDR to exit self-refresh */</div><div class='add'>+	ldr	r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET]</div><div class='add'>+	ldr	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+	bic	r2, r2, #M4IF_MCR0_FDVFS</div><div class='add'>+	str	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+</div><div class='add'>+	/* Poll FDVACK bit of M4IF_MCR to wait for DDR to exit self-refresh */</div><div class='add'>+wait_ar_ack:</div><div class='add'>+	ldr	r2,[r1, #M4IF_MCR0_OFFSET]</div><div class='add'>+	ands	r2, r2, #M4IF_MCR0_FDVACK</div><div class='add'>+	bne	wait_ar_ack</div><div class='add'>+</div><div class='add'>+	/* Restore registers */</div><div class='add'>+	ldmfd	sp!, {r4,r5,r6,r7}</div><div class='add'>+	mov	pc, lr</div><div class='add'>+</div><div class='add'>+ENDPROC(imx53_suspend)</div><div class='add'>+</div><div class='add'>+ENTRY(imx53_suspend_sz)</div><div class='add'>+        .word   . - imx53_suspend</div><div class='head'>diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c<br/>deleted file mode 100644<br/>index 15d18e198303..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-imx/time.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,385 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/plat-mxc/time.c</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2000-2001 Deep Blue Solutions</div><div class='del'>- *  Copyright (C) 2002 Shane Nay (shane@minirl.com)</div><div class='del'>- *  Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)</div><div class='del'>- *  Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/clockchips.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/sched_clock.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "hardware.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * There are 2 versions of the timer hardware on Freescale MXC hardware.</div><div class='del'>- * Version 1: MX1/MXL, MX21, MX27.</div><div class='del'>- * Version 2: MX25, MX31, MX35, MX37, MX51</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* defines common for all i.MX */</div><div class='del'>-#define MXC_TCTL		0x00</div><div class='del'>-#define MXC_TCTL_TEN		(1 &lt;&lt; 0) /* Enable module */</div><div class='del'>-#define MXC_TPRER		0x04</div><div class='del'>-</div><div class='del'>-/* MX1, MX21, MX27 */</div><div class='del'>-#define MX1_2_TCTL_CLK_PCLK1	(1 &lt;&lt; 1)</div><div class='del'>-#define MX1_2_TCTL_IRQEN	(1 &lt;&lt; 4)</div><div class='del'>-#define MX1_2_TCTL_FRR		(1 &lt;&lt; 8)</div><div class='del'>-#define MX1_2_TCMP		0x08</div><div class='del'>-#define MX1_2_TCN		0x10</div><div class='del'>-#define MX1_2_TSTAT		0x14</div><div class='del'>-</div><div class='del'>-/* MX21, MX27 */</div><div class='del'>-#define MX2_TSTAT_CAPT		(1 &lt;&lt; 1)</div><div class='del'>-#define MX2_TSTAT_COMP		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* MX31, MX35, MX25, MX5, MX6 */</div><div class='del'>-#define V2_TCTL_WAITEN		(1 &lt;&lt; 3) /* Wait enable mode */</div><div class='del'>-#define V2_TCTL_CLK_IPG		(1 &lt;&lt; 6)</div><div class='del'>-#define V2_TCTL_CLK_PER		(2 &lt;&lt; 6)</div><div class='del'>-#define V2_TCTL_CLK_OSC_DIV8	(5 &lt;&lt; 6)</div><div class='del'>-#define V2_TCTL_FRR		(1 &lt;&lt; 9)</div><div class='del'>-#define V2_TCTL_24MEN		(1 &lt;&lt; 10)</div><div class='del'>-#define V2_TPRER_PRE24M		12</div><div class='del'>-#define V2_IR			0x0c</div><div class='del'>-#define V2_TSTAT		0x08</div><div class='del'>-#define V2_TSTAT_OF1		(1 &lt;&lt; 0)</div><div class='del'>-#define V2_TCN			0x24</div><div class='del'>-#define V2_TCMP			0x10</div><div class='del'>-</div><div class='del'>-#define V2_TIMER_RATE_OSC_DIV8	3000000</div><div class='del'>-</div><div class='del'>-#define timer_is_v1()	(cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())</div><div class='del'>-#define timer_is_v2()	(!timer_is_v1())</div><div class='del'>-</div><div class='del'>-static struct clock_event_device clockevent_mxc;</div><div class='del'>-static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;</div><div class='del'>-</div><div class='del'>-static void __iomem *timer_base;</div><div class='del'>-</div><div class='del'>-static inline void gpt_irq_disable(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int tmp;</div><div class='del'>-</div><div class='del'>-	if (timer_is_v2())</div><div class='del'>-		__raw_writel(0, timer_base + V2_IR);</div><div class='del'>-	else {</div><div class='del'>-		tmp = __raw_readl(timer_base + MXC_TCTL);</div><div class='del'>-		__raw_writel(tmp &amp; ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpt_irq_enable(void)</div><div class='del'>-{</div><div class='del'>-	if (timer_is_v2())</div><div class='del'>-		__raw_writel(1&lt;&lt;0, timer_base + V2_IR);</div><div class='del'>-	else {</div><div class='del'>-		__raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,</div><div class='del'>-			timer_base + MXC_TCTL);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gpt_irq_acknowledge(void)</div><div class='del'>-{</div><div class='del'>-	if (timer_is_v1()) {</div><div class='del'>-		if (cpu_is_mx1())</div><div class='del'>-			__raw_writel(0, timer_base + MX1_2_TSTAT);</div><div class='del'>-		else</div><div class='del'>-			__raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,</div><div class='del'>-				timer_base + MX1_2_TSTAT);</div><div class='del'>-	} else if (timer_is_v2())</div><div class='del'>-		__raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __iomem *sched_clock_reg;</div><div class='del'>-</div><div class='del'>-static u64 notrace mxc_read_sched_clock(void)</div><div class='del'>-{</div><div class='del'>-	return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct delay_timer imx_delay_timer;</div><div class='del'>-</div><div class='del'>-static unsigned long imx_read_current_timer(void)</div><div class='del'>-{</div><div class='del'>-	return __raw_readl(sched_clock_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init mxc_clocksource_init(struct clk *timer_clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int c = clk_get_rate(timer_clk);</div><div class='del'>-	void __iomem *reg = timer_base + (timer_is_v2() ? V2_TCN : MX1_2_TCN);</div><div class='del'>-</div><div class='del'>-	imx_delay_timer.read_current_timer = &amp;imx_read_current_timer;</div><div class='del'>-	imx_delay_timer.freq = c;</div><div class='del'>-	register_current_timer_delay(&amp;imx_delay_timer);</div><div class='del'>-</div><div class='del'>-	sched_clock_reg = reg;</div><div class='del'>-</div><div class='del'>-	sched_clock_register(mxc_read_sched_clock, 32, c);</div><div class='del'>-	return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,</div><div class='del'>-			clocksource_mmio_readl_up);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* clock event */</div><div class='del'>-</div><div class='del'>-static int mx1_2_set_next_event(unsigned long evt,</div><div class='del'>-			      struct clock_event_device *unused)</div><div class='del'>-{</div><div class='del'>-	unsigned long tcmp;</div><div class='del'>-</div><div class='del'>-	tcmp = __raw_readl(timer_base + MX1_2_TCN) + evt;</div><div class='del'>-</div><div class='del'>-	__raw_writel(tcmp, timer_base + MX1_2_TCMP);</div><div class='del'>-</div><div class='del'>-	return (int)(tcmp - __raw_readl(timer_base + MX1_2_TCN)) &lt; 0 ?</div><div class='del'>-				-ETIME : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int v2_set_next_event(unsigned long evt,</div><div class='del'>-			      struct clock_event_device *unused)</div><div class='del'>-{</div><div class='del'>-	unsigned long tcmp;</div><div class='del'>-</div><div class='del'>-	tcmp = __raw_readl(timer_base + V2_TCN) + evt;</div><div class='del'>-</div><div class='del'>-	__raw_writel(tcmp, timer_base + V2_TCMP);</div><div class='del'>-</div><div class='del'>-	return evt &lt; 0x7fffffff &amp;&amp;</div><div class='del'>-		(int)(tcmp - __raw_readl(timer_base + V2_TCN)) &lt; 0 ?</div><div class='del'>-				-ETIME : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-static const char *clock_event_mode_label[] = {</div><div class='del'>-	[CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC",</div><div class='del'>-	[CLOCK_EVT_MODE_ONESHOT]  = "CLOCK_EVT_MODE_ONESHOT",</div><div class='del'>-	[CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN",</div><div class='del'>-	[CLOCK_EVT_MODE_UNUSED]   = "CLOCK_EVT_MODE_UNUSED",</div><div class='del'>-	[CLOCK_EVT_MODE_RESUME]   = "CLOCK_EVT_MODE_RESUME",</div><div class='del'>-};</div><div class='del'>-#endif /* DEBUG */</div><div class='del'>-</div><div class='del'>-static void mxc_set_mode(enum clock_event_mode mode,</div><div class='del'>-				struct clock_event_device *evt)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The timer interrupt generation is disabled at least</div><div class='del'>-	 * for enough time to call mxc_set_next_event()</div><div class='del'>-	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	/* Disable interrupt in GPT module */</div><div class='del'>-	gpt_irq_disable();</div><div class='del'>-</div><div class='del'>-	if (mode != clockevent_mode) {</div><div class='del'>-		/* Set event time into far-far future */</div><div class='del'>-		if (timer_is_v2())</div><div class='del'>-			__raw_writel(__raw_readl(timer_base + V2_TCN) - 3,</div><div class='del'>-					timer_base + V2_TCMP);</div><div class='del'>-		else</div><div class='del'>-			__raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3,</div><div class='del'>-					timer_base + MX1_2_TCMP);</div><div class='del'>-</div><div class='del'>-		/* Clear pending interrupt */</div><div class='del'>-		gpt_irq_acknowledge();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-	printk(KERN_INFO "mxc_set_mode: changing mode from %s to %s\n",</div><div class='del'>-		clock_event_mode_label[clockevent_mode],</div><div class='del'>-		clock_event_mode_label[mode]);</div><div class='del'>-#endif /* DEBUG */</div><div class='del'>-</div><div class='del'>-	/* Remember timer mode */</div><div class='del'>-	clockevent_mode = mode;</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CLOCK_EVT_MODE_PERIODIC:</div><div class='del'>-		printk(KERN_ERR"mxc_set_mode: Periodic mode is not "</div><div class='del'>-				"supported for i.MX\n");</div><div class='del'>-		break;</div><div class='del'>-	case CLOCK_EVT_MODE_ONESHOT:</div><div class='del'>-	/*</div><div class='del'>-	 * Do not put overhead of interrupt enable/disable into</div><div class='del'>-	 * mxc_set_next_event(), the core has about 4 minutes</div><div class='del'>-	 * to call mxc_set_next_event() or shutdown clock after</div><div class='del'>-	 * mode switching</div><div class='del'>-	 */</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		gpt_irq_enable();</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-		break;</div><div class='del'>-	case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='del'>-	case CLOCK_EVT_MODE_UNUSED:</div><div class='del'>-	case CLOCK_EVT_MODE_RESUME:</div><div class='del'>-		/* Left event sources disabled, no more interrupts appear */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IRQ handler for the timer</div><div class='del'>- */</div><div class='del'>-static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct clock_event_device *evt = &amp;clockevent_mxc;</div><div class='del'>-	uint32_t tstat;</div><div class='del'>-</div><div class='del'>-	if (timer_is_v2())</div><div class='del'>-		tstat = __raw_readl(timer_base + V2_TSTAT);</div><div class='del'>-	else</div><div class='del'>-		tstat = __raw_readl(timer_base + MX1_2_TSTAT);</div><div class='del'>-</div><div class='del'>-	gpt_irq_acknowledge();</div><div class='del'>-</div><div class='del'>-	evt-&gt;event_handler(evt);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irqaction mxc_timer_irq = {</div><div class='del'>-	.name		= "i.MX Timer Tick",</div><div class='del'>-	.flags		= IRQF_TIMER | IRQF_IRQPOLL,</div><div class='del'>-	.handler	= mxc_timer_interrupt,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clock_event_device clockevent_mxc = {</div><div class='del'>-	.name		= "mxc_timer1",</div><div class='del'>-	.features	= CLOCK_EVT_FEAT_ONESHOT,</div><div class='del'>-	.set_mode	= mxc_set_mode,</div><div class='del'>-	.set_next_event	= mx1_2_set_next_event,</div><div class='del'>-	.rating		= 200,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mxc_clockevent_init(struct clk *timer_clk)</div><div class='del'>-{</div><div class='del'>-	if (timer_is_v2())</div><div class='del'>-		clockevent_mxc.set_next_event = v2_set_next_event;</div><div class='del'>-</div><div class='del'>-	clockevent_mxc.cpumask = cpumask_of(0);</div><div class='del'>-	clockevents_config_and_register(&amp;clockevent_mxc,</div><div class='del'>-					clk_get_rate(timer_clk),</div><div class='del'>-					0xff, 0xfffffffe);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init _mxc_timer_init(int irq,</div><div class='del'>-				   struct clk *clk_per, struct clk *clk_ipg)</div><div class='del'>-{</div><div class='del'>-	uint32_t tctl_val;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(clk_per)) {</div><div class='del'>-		pr_err("i.MX timer: unable to get clk\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!IS_ERR(clk_ipg))</div><div class='del'>-		clk_prepare_enable(clk_ipg);</div><div class='del'>-</div><div class='del'>-	clk_prepare_enable(clk_per);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise to a known state (all timers off, and timing reset)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	__raw_writel(0, timer_base + MXC_TCTL);</div><div class='del'>-	__raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */</div><div class='del'>-</div><div class='del'>-	if (timer_is_v2()) {</div><div class='del'>-		tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;</div><div class='del'>-		if (clk_get_rate(clk_per) == V2_TIMER_RATE_OSC_DIV8) {</div><div class='del'>-			tctl_val |= V2_TCTL_CLK_OSC_DIV8;</div><div class='del'>-			if (cpu_is_imx6dl() || cpu_is_imx6sx()) {</div><div class='del'>-				/* 24 / 8 = 3 MHz */</div><div class='del'>-				__raw_writel(7 &lt;&lt; V2_TPRER_PRE24M,</div><div class='del'>-					timer_base + MXC_TPRER);</div><div class='del'>-				tctl_val |= V2_TCTL_24MEN;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			tctl_val |= V2_TCTL_CLK_PER;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__raw_writel(tctl_val, timer_base + MXC_TCTL);</div><div class='del'>-</div><div class='del'>-	/* init and register the timer to the framework */</div><div class='del'>-	mxc_clocksource_init(clk_per);</div><div class='del'>-	mxc_clockevent_init(clk_per);</div><div class='del'>-</div><div class='del'>-	/* Make irqs happen */</div><div class='del'>-	setup_irq(irq, &amp;mxc_timer_irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init mxc_timer_init(void __iomem *base, int irq)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk_per = clk_get_sys("imx-gpt.0", "per");</div><div class='del'>-	struct clk *clk_ipg = clk_get_sys("imx-gpt.0", "ipg");</div><div class='del'>-</div><div class='del'>-	timer_base = base;</div><div class='del'>-</div><div class='del'>-	_mxc_timer_init(irq, clk_per, clk_ipg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init mxc_timer_init_dt(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk_per, *clk_ipg;</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	if (timer_base)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	timer_base = of_iomap(np, 0);</div><div class='del'>-	WARN_ON(!timer_base);</div><div class='del'>-	irq = irq_of_parse_and_map(np, 0);</div><div class='del'>-</div><div class='del'>-	clk_ipg = of_clk_get_by_name(np, "ipg");</div><div class='del'>-</div><div class='del'>-	/* Try osc_per first, and fall back to per otherwise */</div><div class='del'>-	clk_per = of_clk_get_by_name(np, "osc_per");</div><div class='del'>-	if (IS_ERR(clk_per))</div><div class='del'>-		clk_per = of_clk_get_by_name(np, "per");</div><div class='del'>-</div><div class='del'>-	_mxc_timer_init(irq, clk_per, clk_ipg);</div><div class='del'>-}</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx1_timer, "fsl,imx1-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx25_timer, "fsl,imx25-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx50_timer, "fsl,imx50-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx51_timer, "fsl,imx51-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx53_timer, "fsl,imx53-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx6q_timer, "fsl,imx6q-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx6sl_timer, "fsl,imx6sl-gpt", mxc_timer_init_dt);</div><div class='del'>-CLOCKSOURCE_OF_DECLARE(mx6sx_timer, "fsl,imx6sx-gpt", mxc_timer_init_dt);</div><div class='head'>diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c<br/>index 30003ba447a5..5b0e363fe5ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_ap.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-integrator/integrator_ap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_ap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-integrator/integrator_ap.c</a></div><div class='hunk'>@@ -37,7 +37,6 @@</div><div class='ctx'> #include &lt;linux/stat.h&gt;</div><div class='ctx'> #include &lt;linux/termios.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hardware/arm_timer.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/param.h&gt;		/* HZ */</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h<br/>index 15bc9bb78a6b..c871e6874594 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/include/mach/time.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-iop13xx/include/mach/time.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/include/mach/time.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-iop13xx/include/mach/time.h</a></div><div class='hunk'>@@ -42,7 +42,7 @@ static inline unsigned long iop13xx_core_freq(void)</div><div class='ctx'> 	case IOP13XX_CORE_FREQ_1200:</div><div class='ctx'> 		return 1200000000;</div><div class='ctx'> 	default:</div><div class='del'>-		printk("%s: warning unknown frequency, defaulting to 800Mhz\n",</div><div class='add'>+		printk("%s: warning unknown frequency, defaulting to 800MHz\n",</div><div class='ctx'> 			__func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h<br/>index 75c4c6572ad0..34b3d3f3f131 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/platform.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ixp4xx/include/mach/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ixp4xx/include/mach/platform.h</a></div><div class='hunk'>@@ -74,7 +74,7 @@ extern unsigned long ixp4xx_exp_bus_size;</div><div class='ctx'> /*</div><div class='ctx'>  * Clock Speed Definitions.</div><div class='ctx'>  */</div><div class='del'>-#define IXP4XX_PERIPHERAL_BUS_CLOCK 	(66) /* 66Mhzi APB BUS   */ </div><div class='add'>+#define IXP4XX_PERIPHERAL_BUS_CLOCK 	(66) /* 66MHzi APB BUS   */ </div><div class='ctx'> #define IXP4XX_UART_XTAL        	14745600</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c<br/>index 06620875813a..e288010522f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-keystone/keystone.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-keystone/keystone.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-keystone/keystone.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/keystone.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "keystone.h"</div><div class='ctx'> </div><div class='del'>-static struct notifier_block platform_nb;</div><div class='ctx'> static unsigned long keystone_dma_pfn_offset __read_mostly;</div><div class='ctx'> </div><div class='ctx'> static int keystone_platform_notifier(struct notifier_block *nb,</div><div class='hunk'>@@ -49,11 +48,18 @@ static int keystone_platform_notifier(struct notifier_block *nb,</div><div class='ctx'> 	return NOTIFY_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct notifier_block platform_nb = {</div><div class='add'>+	.notifier_call = keystone_platform_notifier,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init keystone_init(void)</div><div class='ctx'> {</div><div class='del'>-	keystone_pm_runtime_init();</div><div class='del'>-	if (platform_nb.notifier_call)</div><div class='add'>+	if (PHYS_OFFSET &gt;= KEYSTONE_HIGH_PHYS_START) {</div><div class='add'>+		keystone_dma_pfn_offset = PFN_DOWN(KEYSTONE_HIGH_PHYS_START -</div><div class='add'>+						   KEYSTONE_LOW_PHYS_START);</div><div class='ctx'> 		bus_register_notifier(&amp;platform_bus_type, &amp;platform_nb);</div><div class='add'>+	}</div><div class='add'>+	keystone_pm_runtime_init();</div><div class='ctx'> 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -62,11 +68,9 @@ static phys_addr_t keystone_virt_to_idmap(unsigned long x)</div><div class='ctx'> 	return (phys_addr_t)(x) - CONFIG_PAGE_OFFSET + KEYSTONE_LOW_PHYS_START;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init keystone_init_meminfo(void)</div><div class='add'>+static long long __init keystone_pv_fixup(void)</div><div class='ctx'> {</div><div class='del'>-	bool lpae = IS_ENABLED(CONFIG_ARM_LPAE);</div><div class='del'>-	bool pvpatch = IS_ENABLED(CONFIG_ARM_PATCH_PHYS_VIRT);</div><div class='del'>-	phys_addr_t offset = PHYS_OFFSET - KEYSTONE_LOW_PHYS_START;</div><div class='add'>+	long long offset;</div><div class='ctx'> 	phys_addr_t mem_start, mem_end;</div><div class='ctx'> </div><div class='ctx'> 	mem_start = memblock_start_of_DRAM();</div><div class='hunk'>@@ -75,32 +79,21 @@ static void __init keystone_init_meminfo(void)</div><div class='ctx'> 	/* nothing to do if we are running out of the &lt;32-bit space */</div><div class='ctx'> 	if (mem_start &gt;= KEYSTONE_LOW_PHYS_START &amp;&amp;</div><div class='ctx'> 	    mem_end   &lt;= KEYSTONE_LOW_PHYS_END)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!lpae || !pvpatch) {</div><div class='del'>-		pr_crit("Enable %s%s%s to run outside 32-bit space\n",</div><div class='del'>-		      !lpae ? __stringify(CONFIG_ARM_LPAE) : "",</div><div class='del'>-		      (!lpae &amp;&amp; !pvpatch) ? " and " : "",</div><div class='del'>-		      !pvpatch ? __stringify(CONFIG_ARM_PATCH_PHYS_VIRT) : "");</div><div class='del'>-	}</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (mem_start &lt; KEYSTONE_HIGH_PHYS_START ||</div><div class='ctx'> 	    mem_end   &gt; KEYSTONE_HIGH_PHYS_END) {</div><div class='ctx'> 		pr_crit("Invalid address space for memory (%08llx-%08llx)\n",</div><div class='del'>-		      (u64)mem_start, (u64)mem_end);</div><div class='add'>+		        (u64)mem_start, (u64)mem_end);</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	offset += KEYSTONE_HIGH_PHYS_START;</div><div class='del'>-	__pv_phys_pfn_offset = PFN_DOWN(offset);</div><div class='del'>-	__pv_offset = (offset - PAGE_OFFSET);</div><div class='add'>+	offset = KEYSTONE_HIGH_PHYS_START - KEYSTONE_LOW_PHYS_START;</div><div class='ctx'> </div><div class='ctx'> 	/* Populate the arch idmap hook */</div><div class='ctx'> 	arch_virt_to_idmap = keystone_virt_to_idmap;</div><div class='del'>-	platform_nb.notifier_call = keystone_platform_notifier;</div><div class='del'>-	keystone_dma_pfn_offset = PFN_DOWN(KEYSTONE_HIGH_PHYS_START -</div><div class='del'>-						KEYSTONE_LOW_PHYS_START);</div><div class='ctx'> </div><div class='del'>-	pr_info("Switching to high address space at 0x%llx\n", (u64)offset);</div><div class='add'>+	return offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *const keystone_match[] __initconst = {</div><div class='hunk'>@@ -115,5 +108,5 @@ DT_MACHINE_START(KEYSTONE, "Keystone")</div><div class='ctx'> 	.smp		= smp_ops(keystone_smp_ops),</div><div class='ctx'> 	.init_machine	= keystone_init,</div><div class='ctx'> 	.dt_compat	= keystone_match,</div><div class='del'>-	.init_meminfo   = keystone_init_meminfo,</div><div class='add'>+	.pv_fixup	= keystone_pv_fixup,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c<br/>index 5f46a7cf907b..4bbb18463bfd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-keystone/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-keystone/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-keystone/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/platsmp.c</a></div><div class='hunk'>@@ -39,19 +39,6 @@ static int keystone_smp_boot_secondary(unsigned int cpu,</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM_LPAE</div><div class='del'>-static void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	pgd_t *pgd0 = pgd_offset_k(0);</div><div class='del'>-	cpu_set_ttbr(1, __pa(pgd0) + TTBR1_OFFSET);</div><div class='del'>-	local_flush_tlb_all();</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)</div><div class='del'>-{}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct smp_operations keystone_smp_ops __initdata = {</div><div class='ctx'> 	.smp_boot_secondary	= keystone_smp_boot_secondary,</div><div class='del'>-	.smp_secondary_init     = keystone_smp_secondary_initmem,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c<br/>index 41bebfd296dc..edea697e8253 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-keystone/pm_domain.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-keystone/pm_domain.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-keystone/pm_domain.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-keystone/pm_domain.c</a></div><div class='hunk'>@@ -19,40 +19,9 @@</div><div class='ctx'> #include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int keystone_pm_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	ret = pm_generic_runtime_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pm_clk_suspend(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pm_generic_runtime_resume(dev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int keystone_pm_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	pm_clk_resume(dev);</div><div class='del'>-</div><div class='del'>-	return pm_generic_runtime_resume(dev);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static struct dev_pm_domain keystone_pm_domain = {</div><div class='ctx'> 	.ops = {</div><div class='del'>-		SET_RUNTIME_PM_OPS(keystone_pm_runtime_suspend,</div><div class='del'>-				   keystone_pm_runtime_resume, NULL)</div><div class='add'>+		USE_PM_CLK_RUNTIME_OPS</div><div class='ctx'> 		USE_PLATFORM_PM_SLEEP_OPS</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h<br/>index 5090338c0db2..959c748ee8bb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ks8695/include/mach/hardware.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ks8695/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ks8695/include/mach/hardware.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ks8695/include/mach/hardware.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Clocks are derived from MCLK, which is 25Mhz</div><div class='add'>+ * Clocks are derived from MCLK, which is 25MHz</div><div class='ctx'>  */</div><div class='ctx'> #define KS8695_CLOCK_RATE	25000000</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-lpc18xx/Makefile b/arch/arm/mach-lpc18xx/Makefile<br/>new file mode 100644<br/>index 000000000000..bd0b7b5d6e9d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc18xx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/Makefile</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+obj-y += board-dt.o</div><div class='head'>diff --git a/arch/arm/mach-lpc18xx/Makefile.boot b/arch/arm/mach-lpc18xx/Makefile.boot<br/>new file mode 100644<br/>index 000000000000..eacfc3f5c33e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc18xx/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/Makefile.boot</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# Empty file waiting for deletion once Makefile.boot isn't needed any more.</div><div class='add'>+# Patch waits for application at</div><div class='add'>+# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 .</div><div class='head'>diff --git a/arch/arm/mach-lpc18xx/board-dt.c b/arch/arm/mach-lpc18xx/board-dt.c<br/>new file mode 100644<br/>index 000000000000..fdcee78d1bc4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc18xx/board-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc18xx/board-dt.c</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree board file for NXP LPC18xx/43xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+</div><div class='add'>+static const char *const lpc18xx_43xx_compat[] __initconst = {</div><div class='add'>+	"nxp,lpc1850",</div><div class='add'>+	"nxp,lpc4350",</div><div class='add'>+	"nxp,lpc4370",</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(LPC18XXDT, "NXP LPC18xx/43xx (Device Tree)")</div><div class='add'>+	.dt_compat = lpc18xx_43xx_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c<br/>index dd5d6f532e8c..661c8f4b2310 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-lpc32xx/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc32xx/clock.c</a></div><div class='hunk'>@@ -1238,10 +1238,7 @@ static struct clk_lookup lookups[] = {</div><div class='ctx'> </div><div class='ctx'> static int __init clk_init(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Setup muxed SYSCLK for HCLK PLL base -this selects the</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c<br/>index 9ecb8f9c4ef5..d4f7dc87042b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-lpc32xx/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-lpc32xx/irq.c</a></div><div class='hunk'>@@ -283,25 +283,25 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	case IRQ_TYPE_EDGE_RISING:</div><div class='ctx'> 		/* Rising edge sensitive */</div><div class='ctx'> 		__lpc32xx_set_irq_type(d-&gt;hwirq, 1, 1);</div><div class='del'>-		__irq_set_handler_locked(d-&gt;hwirq, handle_edge_irq);</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_edge_irq);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_EDGE_FALLING:</div><div class='ctx'> 		/* Falling edge sensitive */</div><div class='ctx'> 		__lpc32xx_set_irq_type(d-&gt;hwirq, 0, 1);</div><div class='del'>-		__irq_set_handler_locked(d-&gt;hwirq, handle_edge_irq);</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_edge_irq);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_LEVEL_LOW:</div><div class='ctx'> 		/* Low level sensitive */</div><div class='ctx'> 		__lpc32xx_set_irq_type(d-&gt;hwirq, 0, 0);</div><div class='del'>-		__irq_set_handler_locked(d-&gt;hwirq, handle_level_irq);</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_level_irq);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_LEVEL_HIGH:</div><div class='ctx'> 		/* High level sensitive */</div><div class='ctx'> 		__lpc32xx_set_irq_type(d-&gt;hwirq, 1, 0);</div><div class='del'>-		__irq_set_handler_locked(d-&gt;hwirq, handle_level_irq);</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_level_irq);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* Other modes are not supported */</div><div class='head'>diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S<br/>index 08d5ed46b996..b093a196e801 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mvebu/headsmp-a9.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-mvebu/headsmp-a9.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mvebu/headsmp-a9.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/headsmp-a9.S</a></div><div class='hunk'>@@ -13,15 +13,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> </div><div class='del'>-	__CPUINIT</div><div class='del'>-</div><div class='ctx'> ENTRY(mvebu_cortex_a9_secondary_startup)</div><div class='ctx'> ARM_BE8(setend	be)</div><div class='del'>-	bl      v7_invalidate_l1</div><div class='ctx'> 	bl	armada_38x_scu_power_up</div><div class='ctx'> 	b	secondary_startup</div><div class='ctx'> ENDPROC(mvebu_cortex_a9_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c<br/>index df0a9cc5da59..3d5000481c11 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mvebu/platsmp-a9.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-mvebu/platsmp-a9.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mvebu/platsmp-a9.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/platsmp-a9.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> </div><div class='ctx'> extern void mvebu_cortex_a9_secondary_startup(void);</div><div class='ctx'> </div><div class='del'>-static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,</div><div class='add'>+static int mvebu_cortex_a9_boot_secondary(unsigned int cpu,</div><div class='ctx'> 						    struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, hw_cpu;</div><div class='head'>diff --git a/arch/arm/mach-mvebu/pm-board.c b/arch/arm/mach-mvebu/pm-board.c<br/>index 6dfd4ab97b2a..301ab38d38ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mvebu/pm-board.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-mvebu/pm-board.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mvebu/pm-board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-mvebu/pm-board.c</a></div><div class='hunk'>@@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)</div><div class='ctx'> 	for (i = 0; i &lt; ARMADA_XP_GP_PIC_NR_GPIOS; i++)</div><div class='ctx'> 		ackcmd |= BIT(pic_raw_gpios[i]);</div><div class='ctx'> </div><div class='add'>+	srcmd = cpu_to_le32(srcmd);</div><div class='add'>+	ackcmd = cpu_to_le32(ackcmd);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Wait a while, the PIC needs quite a bit of time between the</div><div class='ctx'> 	 * two GPIO commands.</div><div class='head'>diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c<br/>index 3445a5686805..34c2a1b32e7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-nspire/nspire.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-nspire/nspire.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-nspire/nspire.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-nspire/nspire.c</a></div><div class='hunk'>@@ -22,8 +22,6 @@</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hardware/timer-sp.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "mmio.h"</div><div class='ctx'> #include "clcd.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S<br/>index 3d1e1c250a1a..5d7fb596bf4a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/ams-delta-fiq-handler.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/ams-delta-fiq-handler.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/ams-delta-fiq-handler.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/ams-delta-fiq-handler.S</a></div><div class='hunk'>@@ -17,11 +17,10 @@</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/board-ams-delta.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='ctx'> #include &lt;mach/ams-delta-fiq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='add'>+#include "soc.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c.</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c<br/>index 2aab761ee68d..a95499ea8706 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-ams-delta.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-ams-delta.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-ams-delta.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-ams-delta.c</a></div><div class='hunk'>@@ -626,6 +626,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")</div><div class='ctx'> 	.map_io		= ams_delta_map_io,</div><div class='ctx'> 	.init_early	= omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= ams_delta_init,</div><div class='ctx'> 	.init_late	= ams_delta_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c<br/>index 702d58039cc1..0fb51d22c8b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-fsample.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-fsample.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-fsample.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-fsample.c</a></div><div class='hunk'>@@ -362,6 +362,7 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")</div><div class='ctx'> 	.map_io		= omap_fsample_map_io,</div><div class='ctx'> 	.init_early	= omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_fsample_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c<br/>index e1d9171774bc..9708629f8c5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-generic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-generic.c</a></div><div class='hunk'>@@ -82,6 +82,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")</div><div class='ctx'> 	.map_io		= omap16xx_map_io,</div><div class='ctx'> 	.init_early	= omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_generic_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c<br/>index 5b45d266d83e..8340d684d8b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h2.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-h2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h2.c</a></div><div class='hunk'>@@ -426,6 +426,7 @@ MACHINE_START(OMAP_H2, "TI-H2")</div><div class='ctx'> 	.map_io		= omap16xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= h2_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c<br/>index 17d77914d769..43aab63cbc39 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3-mmc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-h3-mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3-mmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h3-mmc.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/i2c/tps65010.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='ctx'> #include "board-h3.h"</div><div class='ctx'> #include "mmc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c<br/>index bfed4f928663..086ff34e072b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-h3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-h3.c</a></div><div class='hunk'>@@ -452,6 +452,7 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")</div><div class='ctx'> 	.map_io		= omap16xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= h3_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c<br/>index 35a2379b986f..9525ef9bc6c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-htcherald.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-htcherald.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-htcherald.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-htcherald.c</a></div><div class='hunk'>@@ -601,6 +601,7 @@ MACHINE_START(HERALD, "HTC Herald")</div><div class='ctx'> 	.map_io         = htcherald_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq       = omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine   = htcherald_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c<br/>index c49ce83cc1eb..ed4e045c2ad8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-innovator.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-innovator.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-innovator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-innovator.c</a></div><div class='hunk'>@@ -456,6 +456,7 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")</div><div class='ctx'> 	.map_io		= innovator_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= innovator_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c<br/>index 85089d821982..dd3a3ad797ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-nokia770.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-nokia770.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-nokia770.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-nokia770.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -14,7 +15,6 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/omapfb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='hunk'>@@ -294,6 +294,7 @@ MACHINE_START(NOKIA770, "Nokia 770")</div><div class='ctx'> 	.map_io		= omap16xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_nokia770_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c<br/>index 7436d4cf6596..0efd165b8227 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-osk.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-osk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-osk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-osk.c</a></div><div class='hunk'>@@ -610,6 +610,7 @@ MACHINE_START(OMAP_OSK, "TI-OSK")</div><div class='ctx'> 	.map_io		= omap16xx_map_io,</div><div class='ctx'> 	.init_early	= omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= osk_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c<br/>index 3b8e98f4353c..1142ae431fe0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmte.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-palmte.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmte.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmte.c</a></div><div class='hunk'>@@ -235,6 +235,7 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")</div><div class='ctx'> 	.map_io		= omap15xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_palmte_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c<br/>index ca501208825f..54a547a96950 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmtt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-palmtt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmtt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmtt.c</a></div><div class='hunk'>@@ -282,6 +282,7 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")</div><div class='ctx'> 	.map_io		= omap15xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_palmtt_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c<br/>index 470e12d67360..87ec04ae40dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmz71.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-palmz71.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmz71.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-palmz71.c</a></div><div class='hunk'>@@ -297,6 +297,7 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")</div><div class='ctx'> 	.map_io		= omap15xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_palmz71_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c<br/>index 8b2f7127f716..3d76f05407f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-perseus2.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-perseus2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-perseus2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-perseus2.c</a></div><div class='hunk'>@@ -324,6 +324,7 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")</div><div class='ctx'> 	.map_io		= omap_perseus2_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_perseus2_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c<br/>index 29e526235dc2..939991ea33d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-sx1.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-sx1.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-sx1.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-sx1.c</a></div><div class='hunk'>@@ -343,6 +343,7 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")</div><div class='ctx'> 	.map_io		= omap15xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_sx1_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c<br/>index 4677a9ccb3cb..e960687d0cb1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-voiceblue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/board-voiceblue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-voiceblue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/board-voiceblue.c</a></div><div class='hunk'>@@ -288,6 +288,7 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")</div><div class='ctx'> 	.map_io		= omap15xx_map_io,</div><div class='ctx'> 	.init_early     = omap1_init_early,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='add'>+	.handle_irq	= omap1_handle_irq,</div><div class='ctx'> 	.init_machine	= voiceblue_init,</div><div class='ctx'> 	.init_late	= omap1_init_late,</div><div class='ctx'> 	.init_time	= omap1_timer_init,</div><div class='head'>diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h<br/>index 732f8ee2fcd2..65bb6e8085de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/common.h</a></div><div class='hunk'>@@ -30,10 +30,14 @@</div><div class='ctx'> #include &lt;linux/i2c-omap.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/exception.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;plat/i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "soc.h"</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)</div><div class='ctx'> void omap7xx_map_io(void);</div><div class='ctx'> #else</div><div class='hunk'>@@ -73,6 +77,7 @@ static inline int omap_serial_wakeup_init(void)</div><div class='ctx'> </div><div class='ctx'> void omap1_init_early(void);</div><div class='ctx'> void omap1_init_irq(void);</div><div class='add'>+void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs);</div><div class='ctx'> void omap1_init_late(void);</div><div class='ctx'> void omap1_restart(enum reboot_mode, const char *);</div><div class='ctx'> </div><div class='hunk'>@@ -91,8 +96,6 @@ static inline int __init omap_32k_timer_init(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern u32 omap_irq_flags;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP16XX</div><div class='ctx'> extern int ocpi_enable(void);</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c<br/>index 4be601b638d7..7b02ed218a42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/dma.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include &lt;linux/omap-dma.h&gt;</div><div class='ctx'> #include &lt;mach/tc.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include "soc.h"</div><div class='ctx'> </div><div class='ctx'> #define OMAP1_DMA_BASE			(0xfffed800)</div><div class='ctx'> #define OMAP1_LOGICAL_DMA_CH_COUNT	17</div><div class='head'>diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c<br/>index 6e6ec93dcbb3..5b7a29b294d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio16xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/gpio16xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio16xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/gpio16xx.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "soc.h"</div><div class='add'>+</div><div class='ctx'> #define OMAP1610_GPIO1_BASE		0xfffbe400</div><div class='ctx'> #define OMAP1610_GPIO2_BASE		0xfffbec00</div><div class='ctx'> #define OMAP1610_GPIO3_BASE		0xfffbb400</div><div class='head'>diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c<br/>index 4612d2506a2d..0e5f68de23bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio7xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/gpio7xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio7xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/gpio7xx.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "soc.h"</div><div class='add'>+</div><div class='ctx'> #define OMAP7XX_GPIO1_BASE		0xfffbc000</div><div class='ctx'> #define OMAP7XX_GPIO2_BASE		0xfffbc800</div><div class='ctx'> #define OMAP7XX_GPIO3_BASE		0xfffbd000</div><div class='head'>diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c<br/>index 7f5761cffd2e..82887d645a6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/i2c.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/i2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/i2c.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> #define OMAP_I2C_SIZE		0x3f</div><div class='ctx'> #define OMAP1_I2C_BASE		0xfffb3800</div><div class='del'>-#define OMAP1_INT_I2C		(32 + 4)</div><div class='ctx'> </div><div class='ctx'> static const char name[] = "omap_i2c";</div><div class='ctx'> </div><div class='hunk'>@@ -67,7 +66,7 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,</div><div class='ctx'> 	res[0].start = OMAP1_I2C_BASE;</div><div class='ctx'> 	res[0].end = res[0].start + OMAP_I2C_SIZE;</div><div class='ctx'> 	res[0].flags = IORESOURCE_MEM;</div><div class='del'>-	res[1].start = OMAP1_INT_I2C;</div><div class='add'>+	res[1].start = INT_I2C;</div><div class='ctx'> 	res[1].flags = IORESOURCE_IRQ;</div><div class='ctx'> 	pdev-&gt;resource = res;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S<br/>deleted file mode 100644<br/>index 78a8c6c24764..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/entry-macro.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/include/mach/entry-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-omap1/include/mach/entry-macro.S</div><div class='del'>- *</div><div class='del'>- * Low-level IRQ helper macros for OMAP-based platforms</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 Texas Instruments</div><div class='del'>- *</div><div class='del'>- * This file is licensed under  the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-</div><div class='del'>-		.macro  get_irqnr_preamble, base, tmp</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp</div><div class='del'>-		ldr	\base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)</div><div class='del'>-		ldr	\irqnr, [\base, #IRQ_ITR_REG_OFFSET]</div><div class='del'>-		ldr	\tmp, [\base, #IRQ_MIR_REG_OFFSET]</div><div class='del'>-		mov	\irqstat, #0xffffffff</div><div class='del'>-		bic	\tmp, \irqstat, \tmp</div><div class='del'>-		tst	\irqnr, \tmp</div><div class='del'>-		beq	1510f</div><div class='del'>-</div><div class='del'>-		ldr	\irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]</div><div class='del'>-		ldr	\tmp, =omap_irq_flags	@ irq flags address</div><div class='del'>-		ldr	\tmp, [\tmp, #0]	@ irq flags value</div><div class='del'>-		cmp	\irqnr, #0</div><div class='del'>-		ldreq	\irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]</div><div class='del'>-		cmpeq	\irqnr, \tmp</div><div class='del'>-		ldreq	\base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)</div><div class='del'>-		ldreq	\irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]</div><div class='del'>-		addeqs	\irqnr, \irqnr, #32</div><div class='del'>-1510:</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h<br/>index 729992d7d26a..9050085271bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/irqs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/irqs.h</a></div><div class='hunk'>@@ -34,84 +34,84 @@</div><div class='ctx'>  * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-#define INT_CAMERA		1</div><div class='del'>-#define INT_FIQ			3</div><div class='del'>-#define INT_RTDX		6</div><div class='del'>-#define INT_DSP_MMU_ABORT	7</div><div class='del'>-#define INT_HOST		8</div><div class='del'>-#define INT_ABORT		9</div><div class='del'>-#define INT_BRIDGE_PRIV		13</div><div class='del'>-#define INT_GPIO_BANK1		14</div><div class='del'>-#define INT_UART3		15</div><div class='del'>-#define INT_TIMER3		16</div><div class='del'>-#define INT_DMA_CH0_6		19</div><div class='del'>-#define INT_DMA_CH1_7		20</div><div class='del'>-#define INT_DMA_CH2_8		21</div><div class='del'>-#define INT_DMA_CH3		22</div><div class='del'>-#define INT_DMA_CH4		23</div><div class='del'>-#define INT_DMA_CH5		24</div><div class='del'>-#define INT_TIMER1		26</div><div class='del'>-#define INT_WD_TIMER		27</div><div class='del'>-#define INT_BRIDGE_PUB		28</div><div class='del'>-#define INT_TIMER2		30</div><div class='del'>-#define INT_LCD_CTRL		31</div><div class='add'>+#define INT_CAMERA		(NR_IRQS_LEGACY + 1)</div><div class='add'>+#define INT_FIQ			(NR_IRQS_LEGACY + 3)</div><div class='add'>+#define INT_RTDX		(NR_IRQS_LEGACY + 6)</div><div class='add'>+#define INT_DSP_MMU_ABORT	(NR_IRQS_LEGACY + 7)</div><div class='add'>+#define INT_HOST		(NR_IRQS_LEGACY + 8)</div><div class='add'>+#define INT_ABORT		(NR_IRQS_LEGACY + 9)</div><div class='add'>+#define INT_BRIDGE_PRIV		(NR_IRQS_LEGACY + 13)</div><div class='add'>+#define INT_GPIO_BANK1		(NR_IRQS_LEGACY + 14)</div><div class='add'>+#define INT_UART3		(NR_IRQS_LEGACY + 15)</div><div class='add'>+#define INT_TIMER3		(NR_IRQS_LEGACY + 16)</div><div class='add'>+#define INT_DMA_CH0_6		(NR_IRQS_LEGACY + 19)</div><div class='add'>+#define INT_DMA_CH1_7		(NR_IRQS_LEGACY + 20)</div><div class='add'>+#define INT_DMA_CH2_8		(NR_IRQS_LEGACY + 21)</div><div class='add'>+#define INT_DMA_CH3		(NR_IRQS_LEGACY + 22)</div><div class='add'>+#define INT_DMA_CH4		(NR_IRQS_LEGACY + 23)</div><div class='add'>+#define INT_DMA_CH5		(NR_IRQS_LEGACY + 24)</div><div class='add'>+#define INT_TIMER1		(NR_IRQS_LEGACY + 26)</div><div class='add'>+#define INT_WD_TIMER		(NR_IRQS_LEGACY + 27)</div><div class='add'>+#define INT_BRIDGE_PUB		(NR_IRQS_LEGACY + 28)</div><div class='add'>+#define INT_TIMER2		(NR_IRQS_LEGACY + 30)</div><div class='add'>+#define INT_LCD_CTRL		(NR_IRQS_LEGACY + 31)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OMAP-1510 specific IRQ numbers for interrupt handler 1</div><div class='ctx'>  */</div><div class='del'>-#define INT_1510_IH2_IRQ	0</div><div class='del'>-#define INT_1510_RES2		2</div><div class='del'>-#define INT_1510_SPI_TX		4</div><div class='del'>-#define INT_1510_SPI_RX		5</div><div class='del'>-#define INT_1510_DSP_MAILBOX1	10</div><div class='del'>-#define INT_1510_DSP_MAILBOX2	11</div><div class='del'>-#define INT_1510_RES12		12</div><div class='del'>-#define INT_1510_LB_MMU		17</div><div class='del'>-#define INT_1510_RES18		18</div><div class='del'>-#define INT_1510_LOCAL_BUS	29</div><div class='add'>+#define INT_1510_IH2_IRQ	(NR_IRQS_LEGACY + 0)</div><div class='add'>+#define INT_1510_RES2		(NR_IRQS_LEGACY + 2)</div><div class='add'>+#define INT_1510_SPI_TX		(NR_IRQS_LEGACY + 4)</div><div class='add'>+#define INT_1510_SPI_RX		(NR_IRQS_LEGACY + 5)</div><div class='add'>+#define INT_1510_DSP_MAILBOX1	(NR_IRQS_LEGACY + 10)</div><div class='add'>+#define INT_1510_DSP_MAILBOX2	(NR_IRQS_LEGACY + 11)</div><div class='add'>+#define INT_1510_RES12		(NR_IRQS_LEGACY + 12)</div><div class='add'>+#define INT_1510_LB_MMU		(NR_IRQS_LEGACY + 17)</div><div class='add'>+#define INT_1510_RES18		(NR_IRQS_LEGACY + 18)</div><div class='add'>+#define INT_1510_LOCAL_BUS	(NR_IRQS_LEGACY + 29)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OMAP-1610 specific IRQ numbers for interrupt handler 1</div><div class='ctx'>  */</div><div class='ctx'> #define INT_1610_IH2_IRQ	INT_1510_IH2_IRQ</div><div class='del'>-#define INT_1610_IH2_FIQ	2</div><div class='del'>-#define INT_1610_McBSP2_TX	4</div><div class='del'>-#define INT_1610_McBSP2_RX	5</div><div class='del'>-#define INT_1610_DSP_MAILBOX1	10</div><div class='del'>-#define INT_1610_DSP_MAILBOX2	11</div><div class='del'>-#define INT_1610_LCD_LINE	12</div><div class='del'>-#define INT_1610_GPTIMER1	17</div><div class='del'>-#define INT_1610_GPTIMER2	18</div><div class='del'>-#define INT_1610_SSR_FIFO_0	29</div><div class='add'>+#define INT_1610_IH2_FIQ	(NR_IRQS_LEGACY + 2)</div><div class='add'>+#define INT_1610_McBSP2_TX	(NR_IRQS_LEGACY + 4)</div><div class='add'>+#define INT_1610_McBSP2_RX	(NR_IRQS_LEGACY + 5)</div><div class='add'>+#define INT_1610_DSP_MAILBOX1	(NR_IRQS_LEGACY + 10)</div><div class='add'>+#define INT_1610_DSP_MAILBOX2	(NR_IRQS_LEGACY + 11)</div><div class='add'>+#define INT_1610_LCD_LINE	(NR_IRQS_LEGACY + 12)</div><div class='add'>+#define INT_1610_GPTIMER1	(NR_IRQS_LEGACY + 17)</div><div class='add'>+#define INT_1610_GPTIMER2	(NR_IRQS_LEGACY + 18)</div><div class='add'>+#define INT_1610_SSR_FIFO_0	(NR_IRQS_LEGACY + 29)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OMAP-7xx specific IRQ numbers for interrupt handler 1</div><div class='ctx'>  */</div><div class='del'>-#define INT_7XX_IH2_FIQ		0</div><div class='del'>-#define INT_7XX_IH2_IRQ		1</div><div class='del'>-#define INT_7XX_USB_NON_ISO	2</div><div class='del'>-#define INT_7XX_USB_ISO		3</div><div class='del'>-#define INT_7XX_ICR		4</div><div class='del'>-#define INT_7XX_EAC		5</div><div class='del'>-#define INT_7XX_GPIO_BANK1	6</div><div class='del'>-#define INT_7XX_GPIO_BANK2	7</div><div class='del'>-#define INT_7XX_GPIO_BANK3	8</div><div class='del'>-#define INT_7XX_McBSP2TX	10</div><div class='del'>-#define INT_7XX_McBSP2RX	11</div><div class='del'>-#define INT_7XX_McBSP2RX_OVF	12</div><div class='del'>-#define INT_7XX_LCD_LINE	14</div><div class='del'>-#define INT_7XX_GSM_PROTECT	15</div><div class='del'>-#define INT_7XX_TIMER3		16</div><div class='del'>-#define INT_7XX_GPIO_BANK5	17</div><div class='del'>-#define INT_7XX_GPIO_BANK6	18</div><div class='del'>-#define INT_7XX_SPGIO_WR	29</div><div class='add'>+#define INT_7XX_IH2_FIQ		(NR_IRQS_LEGACY + 0)</div><div class='add'>+#define INT_7XX_IH2_IRQ		(NR_IRQS_LEGACY + 1)</div><div class='add'>+#define INT_7XX_USB_NON_ISO	(NR_IRQS_LEGACY + 2)</div><div class='add'>+#define INT_7XX_USB_ISO		(NR_IRQS_LEGACY + 3)</div><div class='add'>+#define INT_7XX_ICR		(NR_IRQS_LEGACY + 4)</div><div class='add'>+#define INT_7XX_EAC		(NR_IRQS_LEGACY + 5)</div><div class='add'>+#define INT_7XX_GPIO_BANK1	(NR_IRQS_LEGACY + 6)</div><div class='add'>+#define INT_7XX_GPIO_BANK2	(NR_IRQS_LEGACY + 7)</div><div class='add'>+#define INT_7XX_GPIO_BANK3	(NR_IRQS_LEGACY + 8)</div><div class='add'>+#define INT_7XX_McBSP2TX	(NR_IRQS_LEGACY + 10)</div><div class='add'>+#define INT_7XX_McBSP2RX	(NR_IRQS_LEGACY + 11)</div><div class='add'>+#define INT_7XX_McBSP2RX_OVF	(NR_IRQS_LEGACY + 12)</div><div class='add'>+#define INT_7XX_LCD_LINE	(NR_IRQS_LEGACY + 14)</div><div class='add'>+#define INT_7XX_GSM_PROTECT	(NR_IRQS_LEGACY + 15)</div><div class='add'>+#define INT_7XX_TIMER3		(NR_IRQS_LEGACY + 16)</div><div class='add'>+#define INT_7XX_GPIO_BANK5	(NR_IRQS_LEGACY + 17)</div><div class='add'>+#define INT_7XX_GPIO_BANK6	(NR_IRQS_LEGACY + 18)</div><div class='add'>+#define INT_7XX_SPGIO_WR	(NR_IRQS_LEGACY + 29)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * IRQ numbers for interrupt handler 2</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below</div><div class='ctx'>  */</div><div class='del'>-#define IH2_BASE		32</div><div class='add'>+#define IH2_BASE		(NR_IRQS_LEGACY + 32)</div><div class='ctx'> </div><div class='ctx'> #define INT_KEYBOARD		(1 + IH2_BASE)</div><div class='ctx'> #define INT_uWireTX		(2 + IH2_BASE)</div><div class='hunk'>@@ -255,11 +255,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> #define OMAP_FPGA_IRQ_END	(OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)</div><div class='ctx'> </div><div class='del'>-#define NR_IRQS			OMAP_FPGA_IRQ_END</div><div class='del'>-</div><div class='del'>-#define OMAP_IRQ_BIT(irq)	(1 &lt;&lt; ((irq) % 32))</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#define OMAP_IRQ_BIT(irq)	(1 &lt;&lt; ((irq - NR_IRQS_LEGACY) % 32))</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FIQ</div><div class='ctx'> #define FIQ_START		1024</div><div class='head'>diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h<br/>index 058a4f7d44c5..d43ff0f1cbf8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/memory.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/include/mach/memory.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/memory.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/memory.h</a></div><div class='hunk'>@@ -5,6 +5,9 @@</div><div class='ctx'> #ifndef __ASM_ARCH_MEMORY_H</div><div class='ctx'> #define __ASM_ARCH_MEMORY_H</div><div class='ctx'> </div><div class='add'>+/* REVISIT: omap1 legacy drivers still rely on this */</div><div class='add'>+#include &lt;mach/soc.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Bus address is physical address, except for OMAP-1510 Local Bus.</div><div class='ctx'>  * OMAP-1510 bus address is translated into a Local Bus address if the</div><div class='hunk'>@@ -14,7 +17,6 @@</div><div class='ctx'>  * because of the strncmp().</div><div class='ctx'>  */</div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP15XX) &amp;&amp; !defined(__ASSEMBLER__)</div><div class='del'>-#include &lt;mach/soc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OMAP-1510 Local Bus address offset</div><div class='head'>diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/include/mach/serial.h<br/>index 2ce6a2db470b..4700e384c3d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/include/mach/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/serial.h</a></div><div class='hunk'>@@ -27,11 +27,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define OMAP_UART_INFO_OFS	0x3ffc</div><div class='ctx'> </div><div class='del'>-/* OMAP1 serial ports */</div><div class='del'>-#define OMAP1_UART1_BASE	0xfffb0000</div><div class='del'>-#define OMAP1_UART2_BASE	0xfffb0800</div><div class='del'>-#define OMAP1_UART3_BASE	0xfffb9800</div><div class='del'>-</div><div class='ctx'> #define OMAP_PORT_SHIFT		2</div><div class='ctx'> #define OMAP7XX_PORT_SHIFT	0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h<br/>index 612bd1cc257c..3d935570eb3b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/soc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/include/mach/soc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/include/mach/soc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/include/mach/soc.h</a></div><div class='hunk'>@@ -28,6 +28,10 @@</div><div class='ctx'> #ifndef __ASM_ARCH_OMAP_CPU_H</div><div class='ctx'> #define __ASM_ARCH_OMAP_CPU_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c<br/>index a8a533df24e1..f4d346fda9da 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/irq.c</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/exception.h&gt;</div><div class='ctx'> #include &lt;asm/mach/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "soc.h"</div><div class='hunk'>@@ -56,66 +57,41 @@</div><div class='ctx'> </div><div class='ctx'> struct omap_irq_bank {</div><div class='ctx'> 	unsigned long base_reg;</div><div class='add'>+	void __iomem *va;</div><div class='ctx'> 	unsigned long trigger_map;</div><div class='ctx'> 	unsigned long wake_enable;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-u32 omap_irq_flags;</div><div class='add'>+static u32 omap_l2_irq;</div><div class='ctx'> static unsigned int irq_bank_count;</div><div class='ctx'> static struct omap_irq_bank *irq_banks;</div><div class='add'>+static struct irq_domain *domain;</div><div class='ctx'> </div><div class='del'>-static inline void irq_bank_writel(unsigned long value, int bank, int offset)</div><div class='del'>-{</div><div class='del'>-	omap_writel(value, irq_banks[bank].base_reg + offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void omap_ack_irq(struct irq_data *d)</div><div class='add'>+static inline unsigned int irq_bank_readl(int bank, int offset)</div><div class='ctx'> {</div><div class='del'>-	if (d-&gt;irq &gt; 31)</div><div class='del'>-		omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);</div><div class='del'>-</div><div class='del'>-	omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);</div><div class='add'>+	return readl_relaxed(irq_banks[bank].va + offset);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static void omap_mask_irq(struct irq_data *d)</div><div class='add'>+static inline void irq_bank_writel(unsigned long value, int bank, int offset)</div><div class='ctx'> {</div><div class='del'>-	int bank = IRQ_BANK(d-&gt;irq);</div><div class='del'>-	u32 l;</div><div class='del'>-</div><div class='del'>-	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);</div><div class='del'>-	l |= 1 &lt;&lt; IRQ_BIT(d-&gt;irq);</div><div class='del'>-	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);</div><div class='add'>+	writel_relaxed(value, irq_banks[bank].va + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap_unmask_irq(struct irq_data *d)</div><div class='add'>+static void omap_ack_irq(int irq)</div><div class='ctx'> {</div><div class='del'>-	int bank = IRQ_BANK(d-&gt;irq);</div><div class='del'>-	u32 l;</div><div class='add'>+	if (irq &gt; 31)</div><div class='add'>+		writel_relaxed(0x1, irq_banks[1].va + IRQ_CONTROL_REG_OFFSET);</div><div class='ctx'> </div><div class='del'>-	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);</div><div class='del'>-	l &amp;= ~(1 &lt;&lt; IRQ_BIT(d-&gt;irq));</div><div class='del'>-	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);</div><div class='add'>+	writel_relaxed(0x1, irq_banks[0].va + IRQ_CONTROL_REG_OFFSET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void omap_mask_ack_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	omap_mask_irq(d);</div><div class='del'>-	omap_ack_irq(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int omap_wake_irq(struct irq_data *d, unsigned int enable)</div><div class='del'>-{</div><div class='del'>-	int bank = IRQ_BANK(d-&gt;irq);</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		irq_banks[bank].wake_enable |= IRQ_BIT(d-&gt;irq);</div><div class='del'>-	else</div><div class='del'>-		irq_banks[bank].wake_enable &amp;= ~IRQ_BIT(d-&gt;irq);</div><div class='add'>+	struct irq_chip_type *ct = irq_data_get_chip_type(d);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	ct-&gt;chip.irq_mask(d);</div><div class='add'>+	omap_ack_irq(d-&gt;irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Allows tuning the IRQ type and priority</div><div class='ctx'>  *</div><div class='hunk'>@@ -165,46 +141,105 @@ static struct omap_irq_bank omap1610_irq_banks[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static struct irq_chip omap_irq_chip = {</div><div class='del'>-	.name		= "MPU",</div><div class='del'>-	.irq_ack	= omap_mask_ack_irq,</div><div class='del'>-	.irq_mask	= omap_mask_irq,</div><div class='del'>-	.irq_unmask	= omap_unmask_irq,</div><div class='del'>-	.irq_set_wake	= omap_wake_irq,</div><div class='del'>-};</div><div class='add'>+asmlinkage void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	void __iomem *l1 = irq_banks[0].va;</div><div class='add'>+	void __iomem *l2 = irq_banks[1].va;</div><div class='add'>+	u32 irqnr;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET);</div><div class='add'>+		irqnr &amp;= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) &amp; 0xffffffff);</div><div class='add'>+		if (!irqnr)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET);</div><div class='add'>+		if (irqnr)</div><div class='add'>+			goto irq;</div><div class='add'>+</div><div class='add'>+		irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET);</div><div class='add'>+		if (irqnr == omap_l2_irq) {</div><div class='add'>+			irqnr = readl_relaxed(l2 + IRQ_SIR_IRQ_REG_OFFSET);</div><div class='add'>+			if (irqnr)</div><div class='add'>+				irqnr += 32;</div><div class='add'>+		}</div><div class='add'>+irq:</div><div class='add'>+		if (irqnr)</div><div class='add'>+			handle_domain_irq(domain, irqnr, regs);</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+	} while (irqnr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init void</div><div class='add'>+omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc;</div><div class='add'>+	struct irq_chip_type *ct;</div><div class='add'>+</div><div class='add'>+	gc = irq_alloc_generic_chip("MPU", 1, irq_start, base,</div><div class='add'>+				    handle_level_irq);</div><div class='add'>+	ct = gc-&gt;chip_types;</div><div class='add'>+	ct-&gt;chip.irq_ack = omap_mask_ack_irq;</div><div class='add'>+	ct-&gt;chip.irq_mask = irq_gc_mask_set_bit;</div><div class='add'>+	ct-&gt;chip.irq_unmask = irq_gc_mask_clr_bit;</div><div class='add'>+	ct-&gt;chip.irq_set_wake = irq_gc_set_wake;</div><div class='add'>+	ct-&gt;regs.mask = IRQ_MIR_REG_OFFSET;</div><div class='add'>+	irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,</div><div class='add'>+			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void __init omap1_init_irq(void)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	struct irq_chip_type *ct;</div><div class='add'>+	struct irq_data *d = NULL;</div><div class='add'>+	int i, j, irq_base;</div><div class='add'>+	unsigned long nr_irqs;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)</div><div class='ctx'> 	if (cpu_is_omap7xx()) {</div><div class='del'>-		omap_irq_flags = INT_7XX_IH2_IRQ;</div><div class='ctx'> 		irq_banks = omap7xx_irq_banks;</div><div class='ctx'> 		irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP15XX</div><div class='ctx'> 	if (cpu_is_omap1510()) {</div><div class='del'>-		omap_irq_flags = INT_1510_IH2_IRQ;</div><div class='ctx'> 		irq_banks = omap1510_irq_banks;</div><div class='ctx'> 		irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (cpu_is_omap310()) {</div><div class='del'>-		omap_irq_flags = INT_1510_IH2_IRQ;</div><div class='ctx'> 		irq_banks = omap310_irq_banks;</div><div class='ctx'> 		irq_bank_count = ARRAY_SIZE(omap310_irq_banks);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP16XX)</div><div class='ctx'> 	if (cpu_is_omap16xx()) {</div><div class='del'>-		omap_irq_flags = INT_1510_IH2_IRQ;</div><div class='ctx'> 		irq_banks = omap1610_irq_banks;</div><div class='ctx'> 		irq_bank_count = ARRAY_SIZE(omap1610_irq_banks);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-	printk("Total of %i interrupts in %i interrupt banks\n",</div><div class='del'>-	       irq_bank_count * 32, irq_bank_count);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; irq_bank_count; i++) {</div><div class='add'>+		irq_banks[i].va = ioremap(irq_banks[i].base_reg, 0xff);</div><div class='add'>+		if (WARN_ON(!irq_banks[i].va))</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nr_irqs = irq_bank_count * 32;</div><div class='add'>+</div><div class='add'>+	irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);</div><div class='add'>+	if (irq_base &lt; 0) {</div><div class='add'>+		pr_warn("Couldn't allocate IRQ numbers\n");</div><div class='add'>+		irq_base = 0;</div><div class='add'>+	}</div><div class='add'>+	omap_l2_irq = cpu_is_omap7xx() ? irq_base + 1 : irq_base;</div><div class='add'>+	omap_l2_irq -= NR_IRQS_LEGACY;</div><div class='add'>+</div><div class='add'>+	domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0,</div><div class='add'>+				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+</div><div class='add'>+	pr_info("Total of %lu interrupts in %i interrupt banks\n",</div><div class='add'>+		nr_irqs, irq_bank_count);</div><div class='ctx'> </div><div class='ctx'> 	/* Mask and clear all interrupts */</div><div class='ctx'> 	for (i = 0; i &lt; irq_bank_count; i++) {</div><div class='hunk'>@@ -227,19 +262,15 @@ void __init omap1_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 			irq_trigger = irq_banks[i].trigger_map &gt;&gt; IRQ_BIT(j);</div><div class='ctx'> 			omap_irq_set_cfg(j, 0, 0, irq_trigger);</div><div class='del'>-</div><div class='del'>-			irq_set_chip_and_handler(j, &amp;omap_irq_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='ctx'> 			set_irq_flags(j, IRQF_VALID);</div><div class='ctx'> 		}</div><div class='add'>+		omap_alloc_gc(irq_banks[i].va, irq_base + i * 32, 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Unmask level 2 handler */</div><div class='del'>-</div><div class='del'>-	if (cpu_is_omap7xx())</div><div class='del'>-		omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));</div><div class='del'>-	else if (cpu_is_omap15xx())</div><div class='del'>-		omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));</div><div class='del'>-	else if (cpu_is_omap16xx())</div><div class='del'>-		omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));</div><div class='add'>+	d = irq_get_irq_data(irq_find_mapping(domain, omap_l2_irq));</div><div class='add'>+	if (d) {</div><div class='add'>+		ct = irq_data_get_chip_type(d);</div><div class='add'>+		ct-&gt;chip.irq_unmask(d);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c<br/>index 667ce5027f63..599490a596a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/mux.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/mux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/mux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/mux.c</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> static struct omap_mux_cfg arch_mux_cfg;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)</div><div class='del'>-static struct pin_config __initdata_or_module omap7xx_pins[] = {</div><div class='add'>+static struct pin_config omap7xx_pins[] = {</div><div class='ctx'> MUX_CFG_7XX("E2_7XX_KBR0",        12,   21,    0,   20,   1, 0)</div><div class='ctx'> MUX_CFG_7XX("J7_7XX_KBR1",        12,   25,    0,   24,   1, 0)</div><div class='ctx'> MUX_CFG_7XX("E1_7XX_KBR2",        12,   29,    0,   28,   1, 0)</div><div class='hunk'>@@ -82,7 +82,7 @@ MUX_CFG_7XX("UART_7XX_2",          8,    1,    6,    0,   0, 0)</div><div class='ctx'> #endif	/* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)</div><div class='del'>-static struct pin_config __initdata_or_module omap1xxx_pins[] = {</div><div class='add'>+static struct pin_config omap1xxx_pins[] = {</div><div class='ctx'> /*</div><div class='ctx'>  *	 description		mux  mode   mux	 pull pull  pull  pu_pd	 pu  dbg</div><div class='ctx'>  *				reg  offset mode reg  bit   ena	  reg</div><div class='hunk'>@@ -343,7 +343,7 @@ MUX_CFG("Y14_1610_CCP_DATAM",	 9,   21,    6,   2,   3,   1,    2,     0,  0)</div><div class='ctx'> #define OMAP1XXX_PINS_SZ	0</div><div class='ctx'> #endif	/* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */</div><div class='ctx'> </div><div class='del'>-static int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)</div><div class='add'>+static int omap1_cfg_reg(const struct pin_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	static DEFINE_SPINLOCK(mux_spin_lock);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -469,7 +469,7 @@ int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg)</div><div class='ctx'> /*</div><div class='ctx'>  * Sets the Omap MUX and PULL_DWN registers based on the table</div><div class='ctx'>  */</div><div class='del'>-int __init_or_module omap_cfg_reg(const unsigned long index)</div><div class='add'>+int omap_cfg_reg(const unsigned long index)</div><div class='ctx'> {</div><div class='ctx'> 	struct pin_config *reg;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c<br/>index dd94567c3628..ee5460b8ec2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/pm.c</a></div><div class='hunk'>@@ -62,6 +62,7 @@</div><div class='ctx'> #include "iomap.h"</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> #include "pm.h"</div><div class='add'>+#include "soc.h"</div><div class='ctx'> #include "sram.h"</div><div class='ctx'> </div><div class='ctx'> static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];</div><div class='head'>diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c<br/>index c40e209de65c..667c1637ff91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm_bus.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/pm_bus.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm_bus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/pm_bus.c</a></div><div class='hunk'>@@ -21,48 +21,15 @@</div><div class='ctx'> </div><div class='ctx'> #include "soc.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int omap1_pm_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	ret = pm_generic_runtime_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pm_clk_suspend(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pm_generic_runtime_resume(dev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int omap1_pm_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	pm_clk_resume(dev);</div><div class='del'>-	return pm_generic_runtime_resume(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct dev_pm_domain default_pm_domain = {</div><div class='ctx'> 	.ops = {</div><div class='del'>-		.runtime_suspend = omap1_pm_runtime_suspend,</div><div class='del'>-		.runtime_resume = omap1_pm_runtime_resume,</div><div class='add'>+		USE_PM_CLK_RUNTIME_OPS</div><div class='ctx'> 		USE_PLATFORM_PM_SLEEP_OPS</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='del'>-#define OMAP1_PM_DOMAIN (&amp;default_pm_domain)</div><div class='del'>-#else</div><div class='del'>-#define OMAP1_PM_DOMAIN NULL</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='ctx'> </div><div class='ctx'> static struct pm_clk_notifier_block platform_bus_notifier = {</div><div class='del'>-	.pm_domain = OMAP1_PM_DOMAIN,</div><div class='add'>+	.pm_domain = &amp;default_pm_domain,</div><div class='ctx'> 	.con_ids = { "ick", "fck", NULL, },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c<br/>index d1ac08016f0b..a65bd0c44296 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/serial.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/serial.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;mach/mux.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pm.h"</div><div class='add'>+#include "soc.h"</div><div class='ctx'> </div><div class='ctx'> static struct clk * uart1_ck;</div><div class='ctx'> static struct clk * uart2_ck;</div><div class='head'>diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c<br/>index bde7a35e5000..06c5ba7574a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap1/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap1/timer.c</a></div><div class='hunk'>@@ -27,10 +27,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/dmtimer-omap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;plat/dmtimer.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "soc.h"</div><div class='add'>+</div><div class='ctx'> #define OMAP1610_GPTIMER1_BASE		0xfffb1400</div><div class='ctx'> #define OMAP1610_GPTIMER2_BASE		0xfffb1c00</div><div class='ctx'> #define OMAP1610_GPTIMER3_BASE		0xfffb2400</div><div class='head'>diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig<br/>index 6468f15f060c..4a023e8d1bdb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/Kconfig</a></div><div class='hunk'>@@ -60,6 +60,7 @@ config SOC_AM43XX</div><div class='ctx'> 	select ARM_GIC</div><div class='ctx'> 	select MACH_OMAP_GENERIC</div><div class='ctx'> 	select MIGHT_HAVE_CACHE_L2X0</div><div class='add'>+	select HAVE_ARM_SCU</div><div class='ctx'> </div><div class='ctx'> config SOC_DRA7XX</div><div class='ctx'> 	bool "TI DRA7XX"</div><div class='hunk'>@@ -171,12 +172,6 @@ config MACH_OMAP2_TUSB6010</div><div class='ctx'> 	depends on ARCH_OMAP2 &amp;&amp; SOC_OMAP2420</div><div class='ctx'> 	default y if MACH_NOKIA_N8X0</div><div class='ctx'> </div><div class='del'>-config MACH_OMAP3_BEAGLE</div><div class='del'>-	bool "OMAP3 BEAGLE board"</div><div class='del'>-	depends on ARCH_OMAP3</div><div class='del'>-	default y</div><div class='del'>-	select OMAP_PACKAGE_CBB</div><div class='del'>-</div><div class='ctx'> config MACH_OMAP_LDP</div><div class='ctx'> 	bool "OMAP3 LDP board"</div><div class='ctx'> 	depends on ARCH_OMAP3</div><div class='hunk'>@@ -203,12 +198,6 @@ config MACH_OMAP3_TORPEDO</div><div class='ctx'> 	 for full description please see the products webpage at</div><div class='ctx'> 	 http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit</div><div class='ctx'> </div><div class='del'>-config MACH_OVERO</div><div class='del'>-	bool "Gumstix Overo board"</div><div class='del'>-	depends on ARCH_OMAP3</div><div class='del'>-	default y</div><div class='del'>-	select OMAP_PACKAGE_CBB</div><div class='del'>-</div><div class='ctx'> config MACH_OMAP3517EVM</div><div class='ctx'> 	bool "OMAP3517/ AM3517 EVM board"</div><div class='ctx'> 	depends on ARCH_OMAP3</div><div class='hunk'>@@ -240,16 +229,6 @@ config MACH_NOKIA_RX51</div><div class='ctx'> 	default y</div><div class='ctx'> 	select OMAP_PACKAGE_CBB</div><div class='ctx'> </div><div class='del'>-config MACH_CM_T35</div><div class='del'>-	bool "CompuLab CM-T35/CM-T3730 modules"</div><div class='del'>-	depends on ARCH_OMAP3</div><div class='del'>-	default y</div><div class='del'>-	select MACH_CM_T3730</div><div class='del'>-	select OMAP_PACKAGE_CUS</div><div class='del'>-</div><div class='del'>-config MACH_CM_T3730</div><div class='del'>-       bool</div><div class='del'>-</div><div class='ctx'> config OMAP3_SDRC_AC_TIMING</div><div class='ctx'> 	bool "Enable SDRC AC timing register changes"</div><div class='ctx'> 	depends on ARCH_OMAP3</div><div class='head'>diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile<br/>index ec002bd4af77..903c85be2897 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/Makefile</a></div><div class='hunk'>@@ -242,17 +242,14 @@ obj-$(CONFIG_SOC_OMAP2420)		+= msdi.o</div><div class='ctx'> </div><div class='ctx'> # Specific board support</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_GENERIC)		+= board-generic.o pdata-quirks.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP3_BEAGLE)		+= board-omap3beagle.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_LDP)		+= board-ldp.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o</div><div class='del'>-obj-$(CONFIG_MACH_OVERO)		+= board-overo.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP3_PANDORA)	+= board-omap3pandora.o</div><div class='ctx'> obj-$(CONFIG_MACH_NOKIA_N8X0)		+= board-n8x0.o</div><div class='ctx'> obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o sdram-nokia.o</div><div class='ctx'> obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-peripherals.o</div><div class='ctx'> obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-video.o</div><div class='del'>-obj-$(CONFIG_MACH_CM_T35)		+= board-cm-t35.o</div><div class='ctx'> </div><div class='ctx'> # Platform specific device init code</div><div class='ctx'> </div><div class='hunk'>@@ -277,8 +274,5 @@ obj-y					+= $(nand-m) $(nand-y)</div><div class='ctx'> </div><div class='ctx'> smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o</div><div class='ctx'> obj-y					+= $(smsc911x-m) $(smsc911x-y)</div><div class='del'>-ifneq ($(CONFIG_HWSPINLOCK_OMAP),)</div><div class='del'>-obj-y					+= hwspinlock.o</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> obj-y					+= common-board-devices.o twl-common.o dss-common.o</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c<br/>deleted file mode 100644<br/>index b5dfbc1b1fc6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-cm-t35.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/board-cm-t35.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,769 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * CompuLab CM-T35/CM-T3730 modules support</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009-2011 CompuLab, Ltd.</div><div class='del'>- * Authors: Mike Rapoport &lt;mike@compulab.co.il&gt;</div><div class='del'>- *	    Igor Grinberg &lt;grinberg@compulab.co.il&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk-provider.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/input/matrix_keypad.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/omap-gpmc.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/gpio-omap.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_data/at24.h&gt;</div><div class='del'>-#include &lt;linux/i2c/twl.h&gt;</div><div class='del'>-#include &lt;linux/regulator/fixed.h&gt;</div><div class='del'>-#include &lt;linux/regulator/machine.h&gt;</div><div class='del'>-#include &lt;linux/mmc/host.h&gt;</div><div class='del'>-#include &lt;linux/usb/phy.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/tdo24m.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_data/mtd-nand-omap2.h&gt;</div><div class='del'>-#include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-data.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/spi-omap2-mcspi.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "mux.h"</div><div class='del'>-#include "sdram-micron-mt46h32m32lf-6.h"</div><div class='del'>-#include "hsmmc.h"</div><div class='del'>-#include "common-board-devices.h"</div><div class='del'>-</div><div class='del'>-#define CM_T35_GPIO_PENDOWN		57</div><div class='del'>-#define SB_T35_USB_HUB_RESET_GPIO	167</div><div class='del'>-</div><div class='del'>-#define CM_T35_SMSC911X_CS	5</div><div class='del'>-#define CM_T35_SMSC911X_GPIO	163</div><div class='del'>-#define SB_T35_SMSC911X_CS	4</div><div class='del'>-#define SB_T35_SMSC911X_GPIO	65</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)</div><div class='del'>-#include &lt;linux/smsc911x.h&gt;</div><div class='del'>-#include "gpmc-smsc911x.h"</div><div class='del'>-</div><div class='del'>-static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.cs             = CM_T35_SMSC911X_CS,</div><div class='del'>-	.gpio_irq       = CM_T35_SMSC911X_GPIO,</div><div class='del'>-	.gpio_reset     = -EINVAL,</div><div class='del'>-	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.cs             = SB_T35_SMSC911X_CS,</div><div class='del'>-	.gpio_irq       = SB_T35_SMSC911X_GPIO,</div><div class='del'>-	.gpio_reset     = -EINVAL,</div><div class='del'>-	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vddvario", "smsc911x.0"),</div><div class='del'>-	REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vddvario", "smsc911x.1"),</div><div class='del'>-	REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_ethernet(void)</div><div class='del'>-{</div><div class='del'>-	regulator_register_fixed(0, cm_t35_smsc911x_supplies,</div><div class='del'>-				 ARRAY_SIZE(cm_t35_smsc911x_supplies));</div><div class='del'>-	regulator_register_fixed(1, sb_t35_smsc911x_supplies,</div><div class='del'>-				 ARRAY_SIZE(sb_t35_smsc911x_supplies));</div><div class='del'>-</div><div class='del'>-	gpmc_smsc911x_init(&amp;cm_t35_smsc911x_cfg);</div><div class='del'>-	gpmc_smsc911x_init(&amp;sb_t35_smsc911x_cfg);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void __init cm_t35_init_ethernet(void) { return; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-</div><div class='del'>-static struct gpio_led cm_t35_leds[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.gpio			= 186,</div><div class='del'>-		.name			= "cm-t35:green",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.active_low		= 0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led_platform_data cm_t35_led_pdata = {</div><div class='del'>-	.num_leds	= ARRAY_SIZE(cm_t35_leds),</div><div class='del'>-	.leds		= cm_t35_leds,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device cm_t35_led_device = {</div><div class='del'>-	.name		= "leds-gpio",</div><div class='del'>-	.id		= -1,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;cm_t35_led_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_led(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;cm_t35_led_device);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void cm_t35_init_led(void) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)</div><div class='del'>-#include &lt;linux/mtd/mtd.h&gt;</div><div class='del'>-#include &lt;linux/mtd/nand.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mtd_partition cm_t35_nand_partitions[] = {</div><div class='del'>-	{</div><div class='del'>-		.name           = "xloader",</div><div class='del'>-		.offset         = 0,			/* Offset = 0x00000 */</div><div class='del'>-		.size           = 4 * NAND_BLOCK_SIZE,</div><div class='del'>-		.mask_flags     = MTD_WRITEABLE</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "uboot",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x80000 */</div><div class='del'>-		.size           = 15 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "uboot environment",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x260000 */</div><div class='del'>-		.size           = 2 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "linux",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x2A0000 */</div><div class='del'>-		.size           = 32 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "rootfs",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x6A0000 */</div><div class='del'>-		.size           = MTDPART_SIZ_FULL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_nand_platform_data cm_t35_nand_data = {</div><div class='del'>-	.parts			= cm_t35_nand_partitions,</div><div class='del'>-	.nr_parts		= ARRAY_SIZE(cm_t35_nand_partitions),</div><div class='del'>-	.cs			= 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_nand(void)</div><div class='del'>-{</div><div class='del'>-	if (gpmc_nand_init(&amp;cm_t35_nand_data, NULL) &lt; 0)</div><div class='del'>-		pr_err("CM-T35: Unable to register NAND device\n");</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void cm_t35_init_nand(void) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define CM_T35_LCD_EN_GPIO 157</div><div class='del'>-#define CM_T35_LCD_BL_GPIO 58</div><div class='del'>-#define CM_T35_DVI_EN_GPIO 54</div><div class='del'>-</div><div class='del'>-static const struct display_timing cm_t35_lcd_videomode = {</div><div class='del'>-	.pixelclock	= { 0, 26000000, 0 },</div><div class='del'>-</div><div class='del'>-	.hactive = { 0, 480, 0 },</div><div class='del'>-	.hfront_porch = { 0, 104, 0 },</div><div class='del'>-	.hback_porch = { 0, 8, 0 },</div><div class='del'>-	.hsync_len = { 0, 8, 0 },</div><div class='del'>-</div><div class='del'>-	.vactive = { 0, 640, 0 },</div><div class='del'>-	.vfront_porch = { 0, 4, 0 },</div><div class='del'>-	.vback_porch = { 0, 2, 0 },</div><div class='del'>-	.vsync_len = { 0, 2, 0 },</div><div class='del'>-</div><div class='del'>-	.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |</div><div class='del'>-		DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct panel_dpi_platform_data cm_t35_lcd_pdata = {</div><div class='del'>-	.name                   = "lcd",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-</div><div class='del'>-	.data_lines		= 18,</div><div class='del'>-</div><div class='del'>-	.display_timing		= &amp;cm_t35_lcd_videomode,</div><div class='del'>-</div><div class='del'>-	.enable_gpio		= -1,</div><div class='del'>-	.backlight_gpio		= CM_T35_LCD_BL_GPIO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device cm_t35_lcd_device = {</div><div class='del'>-	.name                   = "panel-dpi",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;cm_t35_lcd_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct connector_dvi_platform_data cm_t35_dvi_connector_pdata = {</div><div class='del'>-	.name                   = "dvi",</div><div class='del'>-	.source                 = "tfp410.0",</div><div class='del'>-	.i2c_bus_num            = -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device cm_t35_dvi_connector_device = {</div><div class='del'>-	.name                   = "connector-dvi",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;cm_t35_dvi_connector_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct encoder_tfp410_platform_data cm_t35_tfp410_pdata = {</div><div class='del'>-	.name                   = "tfp410.0",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-	.data_lines             = 24,</div><div class='del'>-	.power_down_gpio        = CM_T35_DVI_EN_GPIO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device cm_t35_tfp410_device = {</div><div class='del'>-	.name                   = "tfp410",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;cm_t35_tfp410_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct connector_atv_platform_data cm_t35_tv_pdata = {</div><div class='del'>-	.name = "tv",</div><div class='del'>-	.source = "venc.0",</div><div class='del'>-	.connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,</div><div class='del'>-	.invert_polarity = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device cm_t35_tv_connector_device = {</div><div class='del'>-	.name                   = "connector-analog-tv",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;cm_t35_tv_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_dss_board_info cm_t35_dss_data = {</div><div class='del'>-	.default_display_name = "dvi",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_mcspi_device_config tdo24m_mcspi_config = {</div><div class='del'>-	.turbo_mode	= 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tdo24m_platform_data tdo24m_config = {</div><div class='del'>-	.model = TDO35S,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.modalias		= "tdo24m",</div><div class='del'>-		.bus_num		= 4,</div><div class='del'>-		.chip_select		= 0,</div><div class='del'>-		.max_speed_hz		= 1000000,</div><div class='del'>-		.controller_data	= &amp;tdo24m_mcspi_config,</div><div class='del'>-		.platform_data		= &amp;tdo24m_config,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_display(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	spi_register_board_info(cm_t35_lcd_spi_board_info,</div><div class='del'>-				ARRAY_SIZE(cm_t35_lcd_spi_board_info));</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW,</div><div class='del'>-			"lcd bl enable");</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("CM-T35: failed to request LCD EN GPIO\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msleep(50);</div><div class='del'>-	gpio_set_value(CM_T35_LCD_EN_GPIO, 1);</div><div class='del'>-</div><div class='del'>-	err = omap_display_init(&amp;cm_t35_dss_data);</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("CM-T35: failed to register DSS device\n");</div><div class='del'>-		gpio_free(CM_T35_LCD_EN_GPIO);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	platform_device_register(&amp;cm_t35_tfp410_device);</div><div class='del'>-	platform_device_register(&amp;cm_t35_dvi_connector_device);</div><div class='del'>-	platform_device_register(&amp;cm_t35_lcd_device);</div><div class='del'>-	platform_device_register(&amp;cm_t35_tv_connector_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply cm_t35_vsim_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply cm_t35_vio_supplies[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vcc", "spi1.0"),</div><div class='del'>-	REGULATOR_SUPPLY("vdds_dsi", "omapdss"),</div><div class='del'>-	REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),</div><div class='del'>-	REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */</div><div class='del'>-static struct regulator_init_data cm_t35_vmmc1 = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1850000,</div><div class='del'>-		.max_uV			= 3150000,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE</div><div class='del'>-					| REGULATOR_CHANGE_MODE</div><div class='del'>-					| REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(cm_t35_vmmc1_supply),</div><div class='del'>-	.consumer_supplies	= cm_t35_vmmc1_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */</div><div class='del'>-static struct regulator_init_data cm_t35_vsim = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1800000,</div><div class='del'>-		.max_uV			= 3000000,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE</div><div class='del'>-					| REGULATOR_CHANGE_MODE</div><div class='del'>-					| REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(cm_t35_vsim_supply),</div><div class='del'>-	.consumer_supplies	= cm_t35_vsim_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_init_data cm_t35_vio = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1800000,</div><div class='del'>-		.max_uV			= 1800000,</div><div class='del'>-		.apply_uV		= true,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_MODE,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(cm_t35_vio_supplies),</div><div class='del'>-	.consumer_supplies	= cm_t35_vio_supplies,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static uint32_t cm_t35_keymap[] = {</div><div class='del'>-	KEY(0, 0, KEY_A),	KEY(0, 1, KEY_B),	KEY(0, 2, KEY_LEFT),</div><div class='del'>-	KEY(1, 0, KEY_UP),	KEY(1, 1, KEY_ENTER),	KEY(1, 2, KEY_DOWN),</div><div class='del'>-	KEY(2, 0, KEY_RIGHT),	KEY(2, 1, KEY_C),	KEY(2, 2, KEY_D),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct matrix_keymap_data cm_t35_keymap_data = {</div><div class='del'>-	.keymap			= cm_t35_keymap,</div><div class='del'>-	.keymap_size		= ARRAY_SIZE(cm_t35_keymap),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct twl4030_keypad_data cm_t35_kp_data = {</div><div class='del'>-	.keymap_data	= &amp;cm_t35_keymap_data,</div><div class='del'>-	.rows		= 3,</div><div class='del'>-	.cols		= 3,</div><div class='del'>-	.rep		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_hsmmc_info mmc[] = {</div><div class='del'>-	{</div><div class='del'>-		.mmc		= 1,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='del'>-		.gpio_cd	= -EINVAL,</div><div class='del'>-		.gpio_wp	= -EINVAL,</div><div class='del'>-		.deferred	= true,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.mmc		= 2,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='del'>-		.transceiver	= 1,</div><div class='del'>-		.gpio_cd	= -EINVAL,</div><div class='del'>-		.gpio_wp	= -EINVAL,</div><div class='del'>-		.ocr_mask	= 0x00100000,	/* 3.3V */</div><div class='del'>-	},</div><div class='del'>-	{}	/* Terminator */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usbhs_phy_data phy_data[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.port = 1,</div><div class='del'>-		.reset_gpio = OMAP_MAX_GPIO_LINES + 6,</div><div class='del'>-		.vcc_gpio = -EINVAL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.port = 2,</div><div class='del'>-		.reset_gpio = OMAP_MAX_GPIO_LINES + 7,</div><div class='del'>-		.vcc_gpio = -EINVAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usbhs_omap_platform_data usbhs_bdata __initdata = {</div><div class='del'>-	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,</div><div class='del'>-	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void  __init cm_t35_init_usbh(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,</div><div class='del'>-			       GPIOF_OUT_INIT_LOW, "usb hub rst");</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);</div><div class='del'>-	} else {</div><div class='del'>-		udelay(10);</div><div class='del'>-		gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);</div><div class='del'>-		msleep(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));</div><div class='del'>-	usbhs_init(&amp;usbhs_bdata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,</div><div class='del'>-				 unsigned ngpio)</div><div class='del'>-{</div><div class='del'>-	int wlan_rst = gpio + 2;</div><div class='del'>-</div><div class='del'>-	if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {</div><div class='del'>-		gpio_export(wlan_rst, 0);</div><div class='del'>-		udelay(10);</div><div class='del'>-		gpio_set_value_cansleep(wlan_rst, 0);</div><div class='del'>-		udelay(10);</div><div class='del'>-		gpio_set_value_cansleep(wlan_rst, 1);</div><div class='del'>-	} else {</div><div class='del'>-		pr_err("CM-T35: could not obtain gpio for WiFi reset\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* gpio + 0 is "mmc0_cd" (input/IRQ) */</div><div class='del'>-	mmc[0].gpio_cd = gpio + 0;</div><div class='del'>-	omap_hsmmc_late_init(mmc);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct twl4030_gpio_platform_data cm_t35_gpio_data = {</div><div class='del'>-	.setup          = cm_t35_twl_gpio_setup,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct twl4030_power_data cm_t35_power_data = {</div><div class='del'>-	.use_poweroff	= true,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct twl4030_platform_data cm_t35_twldata = {</div><div class='del'>-	/* platform_data for children goes here */</div><div class='del'>-	.keypad		= &amp;cm_t35_kp_data,</div><div class='del'>-	.gpio		= &amp;cm_t35_gpio_data,</div><div class='del'>-	.vmmc1		= &amp;cm_t35_vmmc1,</div><div class='del'>-	.vsim		= &amp;cm_t35_vsim,</div><div class='del'>-	.vio		= &amp;cm_t35_vio,</div><div class='del'>-	.power		= &amp;cm_t35_power_data,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)</div><div class='del'>-#include &lt;media/omap3isp.h&gt;</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-static struct isp_platform_subdev cm_t35_isp_subdevs[] = {</div><div class='del'>-	{</div><div class='del'>-		.board_info = &amp;(struct i2c_board_info){</div><div class='del'>-			I2C_BOARD_INFO("mt9t001", 0x5d)</div><div class='del'>-		},</div><div class='del'>-		.i2c_adapter_id = 3,</div><div class='del'>-		.bus = &amp;(struct isp_bus_cfg){</div><div class='del'>-			.interface = ISP_INTERFACE_PARALLEL,</div><div class='del'>-			.bus = {</div><div class='del'>-				.parallel = {</div><div class='del'>-					.clk_pol = 1,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.board_info = &amp;(struct i2c_board_info){</div><div class='del'>-			I2C_BOARD_INFO("tvp5150", 0x5c),</div><div class='del'>-		},</div><div class='del'>-		.i2c_adapter_id = 3,</div><div class='del'>-		.bus = &amp;(struct isp_bus_cfg){</div><div class='del'>-			.interface = ISP_INTERFACE_PARALLEL,</div><div class='del'>-			.bus = {</div><div class='del'>-				.parallel = {</div><div class='del'>-					.clk_pol = 0,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{ 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct isp_platform_data cm_t35_isp_pdata = {</div><div class='del'>-	.subdevs = cm_t35_isp_subdevs,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply cm_t35_camera_supplies[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vaa", "3-005d"),</div><div class='del'>-	REGULATOR_SUPPLY("vdd", "3-005d"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_camera(void)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk;</div><div class='del'>-</div><div class='del'>-	clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,</div><div class='del'>-				      48000000);</div><div class='del'>-	clk_register_clkdev(clk, NULL, "3-005d");</div><div class='del'>-</div><div class='del'>-	regulator_register_fixed(2, cm_t35_camera_supplies,</div><div class='del'>-				 ARRAY_SIZE(cm_t35_camera_supplies));</div><div class='del'>-</div><div class='del'>-	if (omap3_init_camera(&amp;cm_t35_isp_pdata) &lt; 0)</div><div class='del'>-		pr_warn("CM-T3x: Failed registering camera device!\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline void cm_t35_init_camera(void) {}</div><div class='del'>-#endif /* CONFIG_VIDEO_OMAP3 */</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_i2c(void)</div><div class='del'>-{</div><div class='del'>-	omap3_pmic_get_config(&amp;cm_t35_twldata, TWL_COMMON_PDATA_USB,</div><div class='del'>-			      TWL_COMMON_REGULATOR_VDAC |</div><div class='del'>-			      TWL_COMMON_PDATA_AUDIO);</div><div class='del'>-</div><div class='del'>-	omap3_pmic_init("tps65930", &amp;cm_t35_twldata);</div><div class='del'>-</div><div class='del'>-	omap_register_i2c_bus(3, 400, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OMAP_MUX</div><div class='del'>-static struct omap_board_mux board_mux[] __initdata = {</div><div class='del'>-	/* nCS and IRQ for CM-T35 ethernet */</div><div class='del'>-	OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),</div><div class='del'>-	OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),</div><div class='del'>-</div><div class='del'>-	/* nCS and IRQ for SB-T35 ethernet */</div><div class='del'>-	OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),</div><div class='del'>-	OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),</div><div class='del'>-</div><div class='del'>-	/* PENDOWN GPIO */</div><div class='del'>-	OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),</div><div class='del'>-</div><div class='del'>-	/* mUSB */</div><div class='del'>-	OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-</div><div class='del'>-	/* MMC 2 */</div><div class='del'>-	OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),</div><div class='del'>-</div><div class='del'>-	/* McSPI 1 */</div><div class='del'>-	OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),</div><div class='del'>-</div><div class='del'>-	/* McSPI 4 */</div><div class='del'>-	OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),</div><div class='del'>-</div><div class='del'>-	/* McBSP 2 */</div><div class='del'>-	OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-</div><div class='del'>-	/* serial ports */</div><div class='del'>-	OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-</div><div class='del'>-	/* common DSS */</div><div class='del'>-	OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='del'>-</div><div class='del'>-	/* Camera */</div><div class='del'>-	OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-	OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),</div><div class='del'>-	OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),</div><div class='del'>-	OMAP3_MUX(CAM_STROBE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='del'>-</div><div class='del'>-	OMAP3_MUX(CAM_D10, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),</div><div class='del'>-	OMAP3_MUX(CAM_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),</div><div class='del'>-</div><div class='del'>-	/* display controls */</div><div class='del'>-	OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),</div><div class='del'>-	OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),</div><div class='del'>-</div><div class='del'>-	/* TPS IRQ */</div><div class='del'>-	OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \</div><div class='del'>-		  OMAP_PIN_INPUT_PULLUP),</div><div class='del'>-</div><div class='del'>-	{ .reg_offset = OMAP_MUX_TERMINATOR },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init cm_t3x_common_dss_mux_init(int mux_mode)</div><div class='del'>-{</div><div class='del'>-	omap_mux_init_signal("dss_data18", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data19", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data20", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data21", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data22", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data23", mux_mode);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init_mux(void)</div><div class='del'>-{</div><div class='del'>-	int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;</div><div class='del'>-</div><div class='del'>-	omap_mux_init_signal("dss_data0.dss_data0", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data1.dss_data1", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data2.dss_data2", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data3.dss_data3", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data4.dss_data4", mux_mode);</div><div class='del'>-	omap_mux_init_signal("dss_data5.dss_data5", mux_mode);</div><div class='del'>-	cm_t3x_common_dss_mux_init(mux_mode);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cm_t3730_init_mux(void)</div><div class='del'>-{</div><div class='del'>-	int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;</div><div class='del'>-</div><div class='del'>-	omap_mux_init_signal("sys_boot0", mux_mode);</div><div class='del'>-	omap_mux_init_signal("sys_boot1", mux_mode);</div><div class='del'>-	omap_mux_init_signal("sys_boot3", mux_mode);</div><div class='del'>-	omap_mux_init_signal("sys_boot4", mux_mode);</div><div class='del'>-	omap_mux_init_signal("sys_boot5", mux_mode);</div><div class='del'>-	omap_mux_init_signal("sys_boot6", mux_mode);</div><div class='del'>-	cm_t3x_common_dss_mux_init(mux_mode);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void cm_t35_init_mux(void) {}</div><div class='del'>-static inline void cm_t3730_init_mux(void) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void __init cm_t3x_common_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);</div><div class='del'>-	omap_serial_init();</div><div class='del'>-	omap_sdrc_init(mt46h32m32lf6_sdrc_params,</div><div class='del'>-			     mt46h32m32lf6_sdrc_params);</div><div class='del'>-	omap_hsmmc_init(mmc);</div><div class='del'>-	cm_t35_init_i2c();</div><div class='del'>-	omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);</div><div class='del'>-	cm_t35_init_ethernet();</div><div class='del'>-	cm_t35_init_led();</div><div class='del'>-	cm_t35_init_display();</div><div class='del'>-	omap_twl4030_audio_init("cm-t3x", NULL);</div><div class='del'>-</div><div class='del'>-	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");</div><div class='del'>-	usb_musb_init(NULL);</div><div class='del'>-	cm_t35_init_usbh();</div><div class='del'>-	cm_t35_init_camera();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cm_t35_init(void)</div><div class='del'>-{</div><div class='del'>-	cm_t3x_common_init();</div><div class='del'>-	cm_t35_init_mux();</div><div class='del'>-	cm_t35_init_nand();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cm_t3730_init(void)</div><div class='del'>-{</div><div class='del'>-	cm_t3x_common_init();</div><div class='del'>-	cm_t3730_init_mux();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(CM_T35, "Compulab CM-T35")</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.reserve	= omap_reserve,</div><div class='del'>-	.map_io		= omap3_map_io,</div><div class='del'>-	.init_early	= omap35xx_init_early,</div><div class='del'>-	.init_irq	= omap3_init_irq,</div><div class='del'>-	.init_machine	= cm_t35_init,</div><div class='del'>-	.init_late	= omap35xx_init_late,</div><div class='del'>-	.init_time	= omap3_sync32k_timer_init,</div><div class='del'>-	.restart	= omap3xxx_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='del'>-MACHINE_START(CM_T3730, "Compulab CM-T3730")</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.reserve	= omap_reserve,</div><div class='del'>-	.map_io		= omap3_map_io,</div><div class='del'>-	.init_early	= omap3630_init_early,</div><div class='del'>-	.init_irq	= omap3_init_irq,</div><div class='del'>-	.init_machine	= cm_t3730_init,</div><div class='del'>-	.init_late     = omap3630_init_late,</div><div class='del'>-	.init_time	= omap3_sync32k_timer_init,</div><div class='del'>-	.restart	= omap3xxx_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c<br/>deleted file mode 100644<br/>index 81de1c68b360..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3beagle.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/board-omap3beagle.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,595 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-omap2/board-omap3beagle.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008 Texas Instruments</div><div class='del'>- *</div><div class='del'>- * Modified from mach-omap2/board-3430sdp.c</div><div class='del'>- *</div><div class='del'>- * Initial code: Syed Mohammed Khasim</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-#include &lt;linux/pwm.h&gt;</div><div class='del'>-#include &lt;linux/leds_pwm.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/gpio_keys.h&gt;</div><div class='del'>-#include &lt;linux/pm_opp.h&gt;</div><div class='del'>-#include &lt;linux/cpu.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mtd/mtd.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/mtd/nand.h&gt;</div><div class='del'>-#include &lt;linux/mmc/host.h&gt;</div><div class='del'>-#include &lt;linux/usb/phy.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/regulator/machine.h&gt;</div><div class='del'>-#include &lt;linux/i2c/twl.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-data.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/mtd-nand-omap2.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "omap_device.h"</div><div class='del'>-#include "gpmc.h"</div><div class='del'>-#include "soc.h"</div><div class='del'>-#include "mux.h"</div><div class='del'>-#include "hsmmc.h"</div><div class='del'>-#include "pm.h"</div><div class='del'>-#include "board-flash.h"</div><div class='del'>-#include "common-board-devices.h"</div><div class='del'>-</div><div class='del'>-#define	NAND_CS	0</div><div class='del'>-</div><div class='del'>-static struct pwm_lookup pwm_lookup[] = {</div><div class='del'>-	/* LEDB -&gt; PMU_STAT */</div><div class='del'>-	PWM_LOOKUP("twl-pwmled", 1, "leds_pwm", "beagleboard::pmu_stat",</div><div class='del'>-		   7812500, PWM_POLARITY_NORMAL),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct led_pwm pwm_leds[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "beagleboard::pmu_stat",</div><div class='del'>-		.max_brightness	= 127,</div><div class='del'>-		.pwm_period_ns	= 7812500,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct led_pwm_platform_data pwm_data = {</div><div class='del'>-	.num_leds	= ARRAY_SIZE(pwm_leds),</div><div class='del'>-	.leds		= pwm_leds,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device leds_pwm = {</div><div class='del'>-	.name	= "leds_pwm",</div><div class='del'>-	.id	= -1,</div><div class='del'>-	.dev	= {</div><div class='del'>-		.platform_data = &amp;pwm_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * OMAP3 Beagle revision</div><div class='del'>- * Run time detection of Beagle revision is done by reading GPIO.</div><div class='del'>- * GPIO ID -</div><div class='del'>- *	AXBX	= GPIO173, GPIO172, GPIO171: 1 1 1</div><div class='del'>- *	C1_3	= GPIO173, GPIO172, GPIO171: 1 1 0</div><div class='del'>- *	C4	= GPIO173, GPIO172, GPIO171: 1 0 1</div><div class='del'>- *	XMA/XMB = GPIO173, GPIO172, GPIO171: 0 0 0</div><div class='del'>- *	XMC = GPIO173, GPIO172, GPIO171: 0 1 0</div><div class='del'>- */</div><div class='del'>-enum {</div><div class='del'>-	OMAP3BEAGLE_BOARD_UNKN = 0,</div><div class='del'>-	OMAP3BEAGLE_BOARD_AXBX,</div><div class='del'>-	OMAP3BEAGLE_BOARD_C1_3,</div><div class='del'>-	OMAP3BEAGLE_BOARD_C4,</div><div class='del'>-	OMAP3BEAGLE_BOARD_XM,</div><div class='del'>-	OMAP3BEAGLE_BOARD_XMC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u8 omap3_beagle_version;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Board-specific configuration</div><div class='del'>- * Defaults to BeagleBoard-xMC</div><div class='del'>- */</div><div class='del'>-static struct {</div><div class='del'>-	int mmc1_gpio_wp;</div><div class='del'>-	bool usb_pwr_level;	/* 0 - Active Low, 1 - Active High */</div><div class='del'>-	int dvi_pd_gpio;</div><div class='del'>-	int usr_button_gpio;</div><div class='del'>-	int mmc_caps;</div><div class='del'>-} beagle_config = {</div><div class='del'>-	.mmc1_gpio_wp = -EINVAL,</div><div class='del'>-	.usb_pwr_level = 0,</div><div class='del'>-	.dvi_pd_gpio = -EINVAL,</div><div class='del'>-	.usr_button_gpio = 4,</div><div class='del'>-	.mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio omap3_beagle_rev_gpios[] __initdata = {</div><div class='del'>-	{ 171, GPIOF_IN, "rev_id_0"    },</div><div class='del'>-	{ 172, GPIOF_IN, "rev_id_1" },</div><div class='del'>-	{ 173, GPIOF_IN, "rev_id_2"    },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init omap3_beagle_init_rev(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u16 beagle_rev = 0;</div><div class='del'>-</div><div class='del'>-	omap_mux_init_gpio(171, OMAP_PIN_INPUT_PULLUP);</div><div class='del'>-	omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP);</div><div class='del'>-	omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP);</div><div class='del'>-</div><div class='del'>-	ret = gpio_request_array(omap3_beagle_rev_gpios,</div><div class='del'>-				 ARRAY_SIZE(omap3_beagle_rev_gpios));</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		printk(KERN_ERR "Unable to get revision detection GPIO pins\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	beagle_rev = gpio_get_value(171) | (gpio_get_value(172) &lt;&lt; 1)</div><div class='del'>-			| (gpio_get_value(173) &lt;&lt; 2);</div><div class='del'>-</div><div class='del'>-	gpio_free_array(omap3_beagle_rev_gpios,</div><div class='del'>-			ARRAY_SIZE(omap3_beagle_rev_gpios));</div><div class='del'>-</div><div class='del'>-	switch (beagle_rev) {</div><div class='del'>-	case 7:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;</div><div class='del'>-		beagle_config.mmc1_gpio_wp = 29;</div><div class='del'>-		beagle_config.dvi_pd_gpio = 170;</div><div class='del'>-		beagle_config.usr_button_gpio = 7;</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;</div><div class='del'>-		beagle_config.mmc1_gpio_wp = 23;</div><div class='del'>-		beagle_config.dvi_pd_gpio = 170;</div><div class='del'>-		beagle_config.usr_button_gpio = 7;</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;</div><div class='del'>-		beagle_config.mmc1_gpio_wp = 23;</div><div class='del'>-		beagle_config.dvi_pd_gpio = 170;</div><div class='del'>-		beagle_config.usr_button_gpio = 7;</div><div class='del'>-		break;</div><div class='del'>-	case 0:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;</div><div class='del'>-		beagle_config.usb_pwr_level = 1;</div><div class='del'>-		beagle_config.mmc_caps &amp;= ~MMC_CAP_8_BIT_DATA;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n");</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC;</div><div class='del'>-		beagle_config.mmc_caps &amp;= ~MMC_CAP_8_BIT_DATA;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev);</div><div class='del'>-		omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mtd_partition omap3beagle_nand_partitions[] = {</div><div class='del'>-	/* All the partition sizes are listed in terms of NAND block size */</div><div class='del'>-	{</div><div class='del'>-		.name		= "X-Loader",</div><div class='del'>-		.offset		= 0,</div><div class='del'>-		.size		= 4 * NAND_BLOCK_SIZE,</div><div class='del'>-		.mask_flags	= MTD_WRITEABLE,	/* force read-only */</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "U-Boot",</div><div class='del'>-		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */</div><div class='del'>-		.size		= 15 * NAND_BLOCK_SIZE,</div><div class='del'>-		.mask_flags	= MTD_WRITEABLE,	/* force read-only */</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "U-Boot Env",</div><div class='del'>-		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x260000 */</div><div class='del'>-		.size		= 1 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "Kernel",</div><div class='del'>-		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */</div><div class='del'>-		.size		= 32 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "File System",</div><div class='del'>-		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x680000 */</div><div class='del'>-		.size		= MTDPART_SIZ_FULL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* DSS */</div><div class='del'>-</div><div class='del'>-static struct connector_dvi_platform_data beagle_dvi_connector_pdata = {</div><div class='del'>-	.name                   = "dvi",</div><div class='del'>-	.source                 = "tfp410.0",</div><div class='del'>-	.i2c_bus_num            = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device beagle_dvi_connector_device = {</div><div class='del'>-	.name                   = "connector-dvi",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;beagle_dvi_connector_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct encoder_tfp410_platform_data beagle_tfp410_pdata = {</div><div class='del'>-	.name                   = "tfp410.0",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-	.data_lines             = 24,</div><div class='del'>-	.power_down_gpio        = -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device beagle_tfp410_device = {</div><div class='del'>-	.name                   = "tfp410",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;beagle_tfp410_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct connector_atv_platform_data beagle_tv_pdata = {</div><div class='del'>-	.name = "tv",</div><div class='del'>-	.source = "venc.0",</div><div class='del'>-	.connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,</div><div class='del'>-	.invert_polarity = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device beagle_tv_connector_device = {</div><div class='del'>-	.name                   = "connector-analog-tv",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;beagle_tv_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_dss_board_info beagle_dss_data = {</div><div class='del'>-	.default_display_name = "dvi",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#include "sdram-micron-mt46h32m32lf-6.h"</div><div class='del'>-</div><div class='del'>-static struct omap2_hsmmc_info mmc[] = {</div><div class='del'>-	{</div><div class='del'>-		.mmc		= 1,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='del'>-		.gpio_wp	= -EINVAL,</div><div class='del'>-		.deferred	= true,</div><div class='del'>-	},</div><div class='del'>-	{}	/* Terminator */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply beagle_vmmc1_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply beagle_vsim_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led gpio_leds[];</div><div class='del'>-</div><div class='del'>-static struct usbhs_phy_data phy_data[] = {</div><div class='del'>-	{</div><div class='del'>-		.port = 2,</div><div class='del'>-		.reset_gpio = 147,</div><div class='del'>-		.vcc_gpio = -1,		/* updated in beagle_twl_gpio_setup */</div><div class='del'>-		.vcc_polarity = 1,	/* updated in beagle_twl_gpio_setup */</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int beagle_twl_gpio_setup(struct device *dev,</div><div class='del'>-		unsigned gpio, unsigned ngpio)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp;</div><div class='del'>-	/* gpio + 0 is "mmc0_cd" (input/IRQ) */</div><div class='del'>-	mmc[0].gpio_cd = gpio + 0;</div><div class='del'>-	omap_hsmmc_late_init(mmc);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active</div><div class='del'>-	 * high / others active low)</div><div class='del'>-	 * DVI reset GPIO is different between beagle revisions</div><div class='del'>-	 */</div><div class='del'>-	/* Valid for all -xM revisions */</div><div class='del'>-	if (cpu_is_omap3630()) {</div><div class='del'>-		/*</div><div class='del'>-		 * gpio + 1 on Xm controls the TFP410's enable line (active low)</div><div class='del'>-		 * gpio + 2 control varies depending on the board rev as below:</div><div class='del'>-		 * P7/P8 revisions(prototype): Camera EN</div><div class='del'>-		 * A2+ revisions (production): LDO (DVI, serial, led blocks)</div><div class='del'>-		 */</div><div class='del'>-		r = gpio_request_one(gpio + 1, GPIOF_OUT_INIT_LOW,</div><div class='del'>-				     "nDVI_PWR_EN");</div><div class='del'>-		if (r)</div><div class='del'>-			pr_err("%s: unable to configure nDVI_PWR_EN\n",</div><div class='del'>-				__func__);</div><div class='del'>-</div><div class='del'>-		beagle_config.dvi_pd_gpio = gpio + 2;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * REVISIT: need ehci-omap hooks for external VBUS</div><div class='del'>-		 * power switch and overcurrent detect</div><div class='del'>-		 */</div><div class='del'>-		if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))</div><div class='del'>-			pr_err("%s: unable to configure EHCI_nOC\n", __func__);</div><div class='del'>-	}</div><div class='del'>-	beagle_tfp410_pdata.power_down_gpio = beagle_config.dvi_pd_gpio;</div><div class='del'>-</div><div class='del'>-	platform_device_register(&amp;beagle_tfp410_device);</div><div class='del'>-	platform_device_register(&amp;beagle_dvi_connector_device);</div><div class='del'>-	platform_device_register(&amp;beagle_tv_connector_device);</div><div class='del'>-</div><div class='del'>-	/* TWL4030_GPIO_MAX i.e. LED_GPO controls HS USB Port 2 power */</div><div class='del'>-	phy_data[0].vcc_gpio = gpio + TWL4030_GPIO_MAX;</div><div class='del'>-	phy_data[0].vcc_polarity = beagle_config.usb_pwr_level;</div><div class='del'>-</div><div class='del'>-	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct twl4030_gpio_platform_data beagle_gpio_data = {</div><div class='del'>-	.use_leds	= true,</div><div class='del'>-	.pullups	= BIT(1),</div><div class='del'>-	.pulldowns	= BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)</div><div class='del'>-				| BIT(15) | BIT(16) | BIT(17),</div><div class='del'>-	.setup		= beagle_twl_gpio_setup,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */</div><div class='del'>-static struct regulator_init_data beagle_vmmc1 = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1850000,</div><div class='del'>-		.max_uV			= 3150000,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE</div><div class='del'>-					| REGULATOR_CHANGE_MODE</div><div class='del'>-					| REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(beagle_vmmc1_supply),</div><div class='del'>-	.consumer_supplies	= beagle_vmmc1_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */</div><div class='del'>-static struct regulator_init_data beagle_vsim = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1800000,</div><div class='del'>-		.max_uV			= 3000000,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE</div><div class='del'>-					| REGULATOR_CHANGE_MODE</div><div class='del'>-					| REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(beagle_vsim_supply),</div><div class='del'>-	.consumer_supplies	= beagle_vsim_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct twl4030_platform_data beagle_twldata = {</div><div class='del'>-	/* platform_data for children goes here */</div><div class='del'>-	.gpio		= &amp;beagle_gpio_data,</div><div class='del'>-	.vmmc1		= &amp;beagle_vmmc1,</div><div class='del'>-	.vsim		= &amp;beagle_vsim,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {</div><div class='del'>-       {</div><div class='del'>-               I2C_BOARD_INFO("eeprom", 0x50),</div><div class='del'>-       },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init omap3_beagle_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_pmic_get_config(&amp;beagle_twldata,</div><div class='del'>-			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |</div><div class='del'>-			TWL_COMMON_PDATA_AUDIO,</div><div class='del'>-			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);</div><div class='del'>-</div><div class='del'>-	beagle_twldata.vpll2-&gt;constraints.name = "VDVI";</div><div class='del'>-</div><div class='del'>-	omap3_pmic_init("twl4030", &amp;beagle_twldata);</div><div class='del'>-	/* Bus 3 is attached to the DVI port where devices like the pico DLP</div><div class='del'>-	 * projector don't work reliably with 400kHz */</div><div class='del'>-	omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct gpio_led gpio_leds[] = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "beagleboard::usr0",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.gpio			= 150,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "beagleboard::usr1",</div><div class='del'>-		.default_trigger	= "mmc0",</div><div class='del'>-		.gpio			= 149,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led_platform_data gpio_led_info = {</div><div class='del'>-	.leds		= gpio_leds,</div><div class='del'>-	.num_leds	= ARRAY_SIZE(gpio_leds),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device leds_gpio = {</div><div class='del'>-	.name	= "leds-gpio",</div><div class='del'>-	.id	= -1,</div><div class='del'>-	.dev	= {</div><div class='del'>-		.platform_data	= &amp;gpio_led_info,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_keys_button gpio_buttons[] = {</div><div class='del'>-	{</div><div class='del'>-		.code			= BTN_EXTRA,</div><div class='del'>-		/* Dynamically assigned depending on board */</div><div class='del'>-		.gpio			= -EINVAL,</div><div class='del'>-		.desc			= "user",</div><div class='del'>-		.wakeup			= 1,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_keys_platform_data gpio_key_info = {</div><div class='del'>-	.buttons	= gpio_buttons,</div><div class='del'>-	.nbuttons	= ARRAY_SIZE(gpio_buttons),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device keys_gpio = {</div><div class='del'>-	.name	= "gpio-keys",</div><div class='del'>-	.id	= -1,</div><div class='del'>-	.dev	= {</div><div class='del'>-		.platform_data	= &amp;gpio_key_info,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device madc_hwmon = {</div><div class='del'>-	.name	= "twl4030_madc_hwmon",</div><div class='del'>-	.id	= -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *omap3_beagle_devices[] __initdata = {</div><div class='del'>-	&amp;leds_gpio,</div><div class='del'>-	&amp;keys_gpio,</div><div class='del'>-	&amp;madc_hwmon,</div><div class='del'>-	&amp;leds_pwm,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usbhs_omap_platform_data usbhs_bdata __initdata = {</div><div class='del'>-	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OMAP_MUX</div><div class='del'>-static struct omap_board_mux board_mux[] __initdata = {</div><div class='del'>-	{ .reg_offset = OMAP_MUX_TERMINATOR },</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int __init beagle_opp_init(void)</div><div class='del'>-{</div><div class='del'>-	int r = 0;</div><div class='del'>-</div><div class='del'>-	if (!machine_is_omap3_beagle())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Initialize the omap3 opp table if not already created. */</div><div class='del'>-	r = omap3_opp_init();</div><div class='del'>-	if (r &lt; 0 &amp;&amp; (r != -EEXIST)) {</div><div class='del'>-		pr_err("%s: opp default init failed\n", __func__);</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Custom OPP enabled for all xM versions */</div><div class='del'>-	if (cpu_is_omap3630()) {</div><div class='del'>-		struct device *mpu_dev, *iva_dev;</div><div class='del'>-</div><div class='del'>-		mpu_dev = get_cpu_device(0);</div><div class='del'>-		iva_dev = omap_device_get_by_hwmod_name("iva");</div><div class='del'>-</div><div class='del'>-		if (!mpu_dev || IS_ERR(iva_dev)) {</div><div class='del'>-			pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",</div><div class='del'>-				__func__, mpu_dev, iva_dev);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		/* Enable MPU 1GHz and lower opps */</div><div class='del'>-		r = dev_pm_opp_enable(mpu_dev, 800000000);</div><div class='del'>-		/* TODO: MPU 1GHz needs SR and ABB */</div><div class='del'>-</div><div class='del'>-		/* Enable IVA 800MHz and lower opps */</div><div class='del'>-		r |= dev_pm_opp_enable(iva_dev, 660000000);</div><div class='del'>-		/* TODO: DSP 800MHz needs SR and ABB */</div><div class='del'>-		if (r) {</div><div class='del'>-			pr_err("%s: failed to enable higher opp %d\n",</div><div class='del'>-				__func__, r);</div><div class='del'>-			/*</div><div class='del'>-			 * Cleanup - disable the higher freqs - we dont care</div><div class='del'>-			 * about the results</div><div class='del'>-			 */</div><div class='del'>-			dev_pm_opp_disable(mpu_dev, 800000000);</div><div class='del'>-			dev_pm_opp_disable(iva_dev, 660000000);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-omap_device_initcall(beagle_opp_init);</div><div class='del'>-</div><div class='del'>-static void __init omap3_beagle_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);</div><div class='del'>-	omap3_beagle_init_rev();</div><div class='del'>-</div><div class='del'>-	if (gpio_is_valid(beagle_config.mmc1_gpio_wp))</div><div class='del'>-		omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);</div><div class='del'>-	mmc[0].caps = beagle_config.mmc_caps;</div><div class='del'>-	omap_hsmmc_init(mmc);</div><div class='del'>-</div><div class='del'>-	omap3_beagle_i2c_init();</div><div class='del'>-</div><div class='del'>-	gpio_buttons[0].gpio = beagle_config.usr_button_gpio;</div><div class='del'>-</div><div class='del'>-	platform_add_devices(omap3_beagle_devices,</div><div class='del'>-			ARRAY_SIZE(omap3_beagle_devices));</div><div class='del'>-	if (gpio_is_valid(beagle_config.dvi_pd_gpio))</div><div class='del'>-		omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT);</div><div class='del'>-	omap_display_init(&amp;beagle_dss_data);</div><div class='del'>-</div><div class='del'>-	omap_serial_init();</div><div class='del'>-	omap_sdrc_init(mt46h32m32lf6_sdrc_params,</div><div class='del'>-				  mt46h32m32lf6_sdrc_params);</div><div class='del'>-</div><div class='del'>-	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");</div><div class='del'>-	usb_musb_init(NULL);</div><div class='del'>-</div><div class='del'>-	usbhs_init(&amp;usbhs_bdata);</div><div class='del'>-</div><div class='del'>-	board_nand_init(omap3beagle_nand_partitions,</div><div class='del'>-			ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,</div><div class='del'>-			NAND_BUSWIDTH_16, NULL);</div><div class='del'>-	omap_twl4030_audio_init("omap3beagle", NULL);</div><div class='del'>-</div><div class='del'>-	/* Ensure msecure is mux'd to be able to set the RTC. */</div><div class='del'>-	omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH);</div><div class='del'>-</div><div class='del'>-	/* Ensure SDRC pins are mux'd for self-refresh */</div><div class='del'>-	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);</div><div class='del'>-	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);</div><div class='del'>-</div><div class='del'>-	pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")</div><div class='del'>-	/* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.reserve	= omap_reserve,</div><div class='del'>-	.map_io		= omap3_map_io,</div><div class='del'>-	.init_early	= omap3_init_early,</div><div class='del'>-	.init_irq	= omap3_init_irq,</div><div class='del'>-	.init_machine	= omap3_beagle_init,</div><div class='del'>-	.init_late	= omap3_init_late,</div><div class='del'>-	.init_time	= omap3_secure_sync32k_timer_init,</div><div class='del'>-	.restart	= omap3xxx_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c<br/>deleted file mode 100644<br/>index 2dae6ccd39bb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-overo.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/board-overo.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,571 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * board-overo.c (Gumstix Overo)</div><div class='del'>- *</div><div class='del'>- * Initial code: Steve Sakoman &lt;steve@sakoman.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='del'>- * 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/i2c/twl.h&gt;</div><div class='del'>-#include &lt;linux/regulator/machine.h&gt;</div><div class='del'>-#include &lt;linux/regulator/fixed.h&gt;</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mtd/mtd.h&gt;</div><div class='del'>-#include &lt;linux/mtd/nand.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/mmc/host.h&gt;</div><div class='del'>-#include &lt;linux/usb/phy.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_data/mtd-nand-omap2.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/spi-omap2-mcspi.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-data.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "mux.h"</div><div class='del'>-#include "sdram-micron-mt46h32m32lf-6.h"</div><div class='del'>-#include "gpmc.h"</div><div class='del'>-#include "hsmmc.h"</div><div class='del'>-#include "board-flash.h"</div><div class='del'>-#include "common-board-devices.h"</div><div class='del'>-</div><div class='del'>-#define	NAND_CS			0</div><div class='del'>-</div><div class='del'>-#define OVERO_GPIO_BT_XGATE	15</div><div class='del'>-#define OVERO_GPIO_W2W_NRESET	16</div><div class='del'>-#define OVERO_GPIO_PENDOWN	114</div><div class='del'>-#define OVERO_GPIO_BT_NRESET	164</div><div class='del'>-#define OVERO_GPIO_USBH_CPEN	168</div><div class='del'>-#define OVERO_GPIO_USBH_NRESET	183</div><div class='del'>-</div><div class='del'>-#define OVERO_SMSC911X_CS      5</div><div class='del'>-#define OVERO_SMSC911X_GPIO    176</div><div class='del'>-#define OVERO_SMSC911X_NRESET  64</div><div class='del'>-#define OVERO_SMSC911X2_CS     4</div><div class='del'>-#define OVERO_SMSC911X2_GPIO   65</div><div class='del'>-</div><div class='del'>-/* whether to register LCD35 instead of LCD43 */</div><div class='del'>-static bool overo_use_lcd35;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \</div><div class='del'>-	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)</div><div class='del'>-</div><div class='del'>-/* fixed regulator for ads7846 */</div><div class='del'>-static struct regulator_consumer_supply ads7846_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vcc", "spi1.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_init_data vads7846_regulator = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(ads7846_supply),</div><div class='del'>-	.consumer_supplies	= ads7846_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct fixed_voltage_config vads7846 = {</div><div class='del'>-	.supply_name		= "vads7846",</div><div class='del'>-	.microvolts		= 3300000, /* 3.3V */</div><div class='del'>-	.gpio			= -EINVAL,</div><div class='del'>-	.startup_delay		= 0,</div><div class='del'>-	.init_data		= &amp;vads7846_regulator,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device vads7846_device = {</div><div class='del'>-	.name		= "reg-fixed-voltage",</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;vads7846,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_ads7846_init(void)</div><div class='del'>-{</div><div class='del'>-	omap_ads7846_init(1, OVERO_GPIO_PENDOWN, 0, NULL);</div><div class='del'>-	platform_device_register(&amp;vads7846_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline void __init overo_ads7846_init(void) { return; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)</div><div class='del'>-</div><div class='del'>-#include &lt;linux/smsc911x.h&gt;</div><div class='del'>-#include "gpmc-smsc911x.h"</div><div class='del'>-</div><div class='del'>-static struct omap_smsc911x_platform_data smsc911x_cfg = {</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.cs             = OVERO_SMSC911X_CS,</div><div class='del'>-	.gpio_irq       = OVERO_SMSC911X_GPIO,</div><div class='del'>-	.gpio_reset     = OVERO_SMSC911X_NRESET,</div><div class='del'>-	.flags		= SMSC911X_USE_32BIT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_smsc911x_platform_data smsc911x2_cfg = {</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.cs             = OVERO_SMSC911X2_CS,</div><div class='del'>-	.gpio_irq       = OVERO_SMSC911X2_GPIO,</div><div class='del'>-	.gpio_reset     = -EINVAL,</div><div class='del'>-	.flags		= SMSC911X_USE_32BIT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_init_smsc911x(void)</div><div class='del'>-{</div><div class='del'>-	gpmc_smsc911x_init(&amp;smsc911x_cfg);</div><div class='del'>-	gpmc_smsc911x_init(&amp;smsc911x2_cfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline void __init overo_init_smsc911x(void) { return; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* DSS */</div><div class='del'>-#define OVERO_GPIO_LCD_EN 144</div><div class='del'>-#define OVERO_GPIO_LCD_BL 145</div><div class='del'>-</div><div class='del'>-static struct connector_atv_platform_data overo_tv_pdata = {</div><div class='del'>-	.name = "tv",</div><div class='del'>-	.source = "venc.0",</div><div class='del'>-	.connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,</div><div class='del'>-	.invert_polarity = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device overo_tv_connector_device = {</div><div class='del'>-	.name                   = "connector-analog-tv",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;overo_tv_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct display_timing overo_lcd43_videomode = {</div><div class='del'>-	.pixelclock	= { 0, 9200000, 0 },</div><div class='del'>-</div><div class='del'>-	.hactive = { 0, 480, 0 },</div><div class='del'>-	.hfront_porch = { 0, 8, 0 },</div><div class='del'>-	.hback_porch = { 0, 4, 0 },</div><div class='del'>-	.hsync_len = { 0, 41, 0 },</div><div class='del'>-</div><div class='del'>-	.vactive = { 0, 272, 0 },</div><div class='del'>-	.vfront_porch = { 0, 4, 0 },</div><div class='del'>-	.vback_porch = { 0, 2, 0 },</div><div class='del'>-	.vsync_len = { 0, 10, 0 },</div><div class='del'>-</div><div class='del'>-	.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |</div><div class='del'>-		DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct panel_dpi_platform_data overo_lcd43_pdata = {</div><div class='del'>-	.name                   = "lcd43",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-</div><div class='del'>-	.data_lines		= 24,</div><div class='del'>-</div><div class='del'>-	.display_timing		= &amp;overo_lcd43_videomode,</div><div class='del'>-</div><div class='del'>-	.enable_gpio		= OVERO_GPIO_LCD_EN,</div><div class='del'>-	.backlight_gpio		= OVERO_GPIO_LCD_BL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device overo_lcd43_device = {</div><div class='del'>-	.name                   = "panel-dpi",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;overo_lcd43_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct connector_dvi_platform_data overo_dvi_connector_pdata = {</div><div class='del'>-	.name                   = "dvi",</div><div class='del'>-	.source                 = "tfp410.0",</div><div class='del'>-	.i2c_bus_num            = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device overo_dvi_connector_device = {</div><div class='del'>-	.name                   = "connector-dvi",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;overo_dvi_connector_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct encoder_tfp410_platform_data overo_tfp410_pdata = {</div><div class='del'>-	.name                   = "tfp410.0",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-	.data_lines             = 24,</div><div class='del'>-	.power_down_gpio        = -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device overo_tfp410_device = {</div><div class='del'>-	.name                   = "tfp410",</div><div class='del'>-	.id                     = 0,</div><div class='del'>-	.dev.platform_data      = &amp;overo_tfp410_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_dss_board_info overo_dss_data = {</div><div class='del'>-	.default_display_name = "lcd43",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_display_init(void)</div><div class='del'>-{</div><div class='del'>-	omap_display_init(&amp;overo_dss_data);</div><div class='del'>-</div><div class='del'>-	if (!overo_use_lcd35)</div><div class='del'>-		platform_device_register(&amp;overo_lcd43_device);</div><div class='del'>-	platform_device_register(&amp;overo_tfp410_device);</div><div class='del'>-	platform_device_register(&amp;overo_dvi_connector_device);</div><div class='del'>-	platform_device_register(&amp;overo_tv_connector_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mtd_partition overo_nand_partitions[] = {</div><div class='del'>-	{</div><div class='del'>-		.name           = "xloader",</div><div class='del'>-		.offset         = 0,			/* Offset = 0x00000 */</div><div class='del'>-		.size           = 4 * NAND_BLOCK_SIZE,</div><div class='del'>-		.mask_flags     = MTD_WRITEABLE</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "uboot",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x80000 */</div><div class='del'>-		.size           = 14 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "uboot environment",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x240000 */</div><div class='del'>-		.size           = 2 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "linux",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x280000 */</div><div class='del'>-		.size           = 32 * NAND_BLOCK_SIZE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name           = "rootfs",</div><div class='del'>-		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x680000 */</div><div class='del'>-		.size           = MTDPART_SIZ_FULL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_hsmmc_info mmc[] = {</div><div class='del'>-	{</div><div class='del'>-		.mmc		= 1,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='del'>-		.gpio_cd	= -EINVAL,</div><div class='del'>-		.gpio_wp	= -EINVAL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.mmc		= 2,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='del'>-		.gpio_cd	= -EINVAL,</div><div class='del'>-		.gpio_wp	= -EINVAL,</div><div class='del'>-		.transceiver	= true,</div><div class='del'>-		.ocr_mask	= 0x00100000,	/* 3.3V */</div><div class='del'>-	},</div><div class='del'>-	{}	/* Terminator */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply overo_vmmc1_supply[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-</div><div class='del'>-static struct gpio_led gpio_leds[] = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "overo:red:gpio21",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.gpio			= 21,</div><div class='del'>-		.active_low		= true,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "overo:blue:gpio22",</div><div class='del'>-		.default_trigger	= "none",</div><div class='del'>-		.gpio			= 22,</div><div class='del'>-		.active_low		= true,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "overo:blue:COM",</div><div class='del'>-		.default_trigger	= "mmc0",</div><div class='del'>-		.gpio			= -EINVAL,	/* gets replaced */</div><div class='del'>-		.active_low		= true,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led_platform_data gpio_leds_pdata = {</div><div class='del'>-	.leds		= gpio_leds,</div><div class='del'>-	.num_leds	= ARRAY_SIZE(gpio_leds),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device gpio_leds_device = {</div><div class='del'>-	.name	= "leds-gpio",</div><div class='del'>-	.id	= -1,</div><div class='del'>-	.dev	= {</div><div class='del'>-		.platform_data	= &amp;gpio_leds_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_init_led(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;gpio_leds_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline void __init overo_init_led(void) { return; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/gpio_keys.h&gt;</div><div class='del'>-</div><div class='del'>-static struct gpio_keys_button gpio_buttons[] = {</div><div class='del'>-	{</div><div class='del'>-		.code			= BTN_0,</div><div class='del'>-		.gpio			= 23,</div><div class='del'>-		.desc			= "button0",</div><div class='del'>-		.wakeup			= 1,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.code			= BTN_1,</div><div class='del'>-		.gpio			= 14,</div><div class='del'>-		.desc			= "button1",</div><div class='del'>-		.wakeup			= 1,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_keys_platform_data gpio_keys_pdata = {</div><div class='del'>-	.buttons	= gpio_buttons,</div><div class='del'>-	.nbuttons	= ARRAY_SIZE(gpio_buttons),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device gpio_keys_device = {</div><div class='del'>-	.name	= "gpio-keys",</div><div class='del'>-	.id	= -1,</div><div class='del'>-	.dev	= {</div><div class='del'>-		.platform_data	= &amp;gpio_keys_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_init_keys(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;gpio_keys_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline void __init overo_init_keys(void) { return; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int overo_twl_gpio_setup(struct device *dev,</div><div class='del'>-		unsigned gpio, unsigned ngpio)</div><div class='del'>-{</div><div class='del'>-#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)</div><div class='del'>-	/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */</div><div class='del'>-	gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct twl4030_gpio_platform_data overo_gpio_data = {</div><div class='del'>-	.use_leds	= true,</div><div class='del'>-	.setup		= overo_twl_gpio_setup,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_init_data overo_vmmc1 = {</div><div class='del'>-	.constraints = {</div><div class='del'>-		.min_uV			= 1850000,</div><div class='del'>-		.max_uV			= 3150000,</div><div class='del'>-		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='del'>-					| REGULATOR_MODE_STANDBY,</div><div class='del'>-		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE</div><div class='del'>-					| REGULATOR_CHANGE_MODE</div><div class='del'>-					| REGULATOR_CHANGE_STATUS,</div><div class='del'>-	},</div><div class='del'>-	.num_consumer_supplies	= ARRAY_SIZE(overo_vmmc1_supply),</div><div class='del'>-	.consumer_supplies	= overo_vmmc1_supply,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct twl4030_platform_data overo_twldata = {</div><div class='del'>-	.gpio		= &amp;overo_gpio_data,</div><div class='del'>-	.vmmc1		= &amp;overo_vmmc1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init overo_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_pmic_get_config(&amp;overo_twldata,</div><div class='del'>-			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,</div><div class='del'>-			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);</div><div class='del'>-</div><div class='del'>-	overo_twldata.vpll2-&gt;constraints.name = "VDVI";</div><div class='del'>-</div><div class='del'>-	omap3_pmic_init("tps65950", &amp;overo_twldata);</div><div class='del'>-	/* i2c2 pins are used for gpio */</div><div class='del'>-	omap_register_i2c_bus(3, 400, NULL, 0);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_lb035q02_platform_data overo_lcd35_pdata = {</div><div class='del'>-	.name                   = "lcd35",</div><div class='del'>-	.source                 = "dpi.0",</div><div class='del'>-</div><div class='del'>-	.data_lines		= 24,</div><div class='del'>-</div><div class='del'>-	.enable_gpio		= OVERO_GPIO_LCD_EN,</div><div class='del'>-	.backlight_gpio		= OVERO_GPIO_LCD_BL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOTE: We need to add either the lgphilips panel, or the lcd43 panel. The</div><div class='del'>- * selection is done based on the overo_use_lcd35 field. If new SPI</div><div class='del'>- * devices are added here, extra work is needed to make only the lgphilips panel</div><div class='del'>- * affected by the overo_use_lcd35 field.</div><div class='del'>- */</div><div class='del'>-static struct spi_board_info overo_spi_board_info[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.modalias		= "panel_lgphilips_lb035q02",</div><div class='del'>-		.bus_num		= 1,</div><div class='del'>-		.chip_select		= 1,</div><div class='del'>-		.max_speed_hz		= 500000,</div><div class='del'>-		.mode			= SPI_MODE_3,</div><div class='del'>-		.platform_data		= &amp;overo_lcd35_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init overo_spi_init(void)</div><div class='del'>-{</div><div class='del'>-	overo_ads7846_init();</div><div class='del'>-</div><div class='del'>-	if (overo_use_lcd35) {</div><div class='del'>-		spi_register_board_info(overo_spi_board_info,</div><div class='del'>-				ARRAY_SIZE(overo_spi_board_info));</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct usbhs_phy_data phy_data[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.port = 2,</div><div class='del'>-		.reset_gpio = OVERO_GPIO_USBH_NRESET,</div><div class='del'>-		.vcc_gpio = -EINVAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usbhs_omap_platform_data usbhs_bdata __initdata = {</div><div class='del'>-	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OMAP_MUX</div><div class='del'>-static struct omap_board_mux board_mux[] __initdata = {</div><div class='del'>-	{ .reg_offset = OMAP_MUX_TERMINATOR },</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct gpio overo_bt_gpios[] __initdata = {</div><div class='del'>-	{ OVERO_GPIO_BT_XGATE,	GPIOF_OUT_INIT_LOW,	"lcd enable"    },</div><div class='del'>-	{ OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH,	"lcd bl enable" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_consumer_supply dummy_supplies[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vddvario", "smsc911x.0"),</div><div class='del'>-	REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),</div><div class='del'>-	REGULATOR_SUPPLY("vddvario", "smsc911x.1"),</div><div class='del'>-	REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init overo_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (strstr(boot_command_line, "omapdss.def_disp=lcd35"))</div><div class='del'>-		overo_use_lcd35 = true;</div><div class='del'>-</div><div class='del'>-	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));</div><div class='del'>-	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);</div><div class='del'>-	overo_i2c_init();</div><div class='del'>-	omap_hsmmc_init(mmc);</div><div class='del'>-	omap_serial_init();</div><div class='del'>-	omap_sdrc_init(mt46h32m32lf6_sdrc_params,</div><div class='del'>-				  mt46h32m32lf6_sdrc_params);</div><div class='del'>-	board_nand_init(overo_nand_partitions,</div><div class='del'>-			ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);</div><div class='del'>-	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");</div><div class='del'>-	usb_musb_init(NULL);</div><div class='del'>-</div><div class='del'>-	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));</div><div class='del'>-	usbhs_init(&amp;usbhs_bdata);</div><div class='del'>-	overo_spi_init();</div><div class='del'>-	overo_init_smsc911x();</div><div class='del'>-	overo_init_led();</div><div class='del'>-	overo_init_keys();</div><div class='del'>-	omap_twl4030_audio_init("overo", NULL);</div><div class='del'>-</div><div class='del'>-	overo_display_init();</div><div class='del'>-</div><div class='del'>-	/* Ensure SDRC pins are mux'd for self-refresh */</div><div class='del'>-	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);</div><div class='del'>-	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);</div><div class='del'>-</div><div class='del'>-	ret = gpio_request_one(OVERO_GPIO_W2W_NRESET, GPIOF_OUT_INIT_HIGH,</div><div class='del'>-			       "OVERO_GPIO_W2W_NRESET");</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		gpio_export(OVERO_GPIO_W2W_NRESET, 0);</div><div class='del'>-		gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);</div><div class='del'>-		udelay(10);</div><div class='del'>-		gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);</div><div class='del'>-	} else {</div><div class='del'>-		pr_err("could not obtain gpio for OVERO_GPIO_W2W_NRESET\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = gpio_request_array(overo_bt_gpios, ARRAY_SIZE(overo_bt_gpios));</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("%s: could not obtain BT gpios\n", __func__);</div><div class='del'>-	} else {</div><div class='del'>-		gpio_export(OVERO_GPIO_BT_XGATE, 0);</div><div class='del'>-		gpio_export(OVERO_GPIO_BT_NRESET, 0);</div><div class='del'>-		gpio_set_value(OVERO_GPIO_BT_NRESET, 0);</div><div class='del'>-		mdelay(6);</div><div class='del'>-		gpio_set_value(OVERO_GPIO_BT_NRESET, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = gpio_request_one(OVERO_GPIO_USBH_CPEN, GPIOF_OUT_INIT_HIGH,</div><div class='del'>-			       "OVERO_GPIO_USBH_CPEN");</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		gpio_export(OVERO_GPIO_USBH_CPEN, 0);</div><div class='del'>-	else</div><div class='del'>-		pr_err("could not obtain gpio for OVERO_GPIO_USBH_CPEN\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(OVERO, "Gumstix Overo")</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.reserve	= omap_reserve,</div><div class='del'>-	.map_io		= omap3_map_io,</div><div class='del'>-	.init_early	= omap35xx_init_early,</div><div class='del'>-	.init_irq	= omap3_init_irq,</div><div class='del'>-	.init_machine	= overo_init,</div><div class='del'>-	.init_late	= omap35xx_init_late,</div><div class='del'>-	.init_time	= omap3_sync32k_timer_init,</div><div class='del'>-	.restart	= omap3xxx_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c<br/>index 85e0b0c06718..b64d717bfab6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a></div><div class='hunk'>@@ -232,14 +232,12 @@ void omap2xxx_clkt_vps_init(void)</div><div class='ctx'> 	struct clk_hw_omap *hw = NULL;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	const char *parent_name = "mpu_ck";</div><div class='del'>-	struct clk_lookup *lookup = NULL;</div><div class='ctx'> </div><div class='ctx'> 	omap2xxx_clkt_vps_late_init();</div><div class='ctx'> 	omap2xxx_clkt_vps_check_bootloader_rates();</div><div class='ctx'> </div><div class='ctx'> 	hw = kzalloc(sizeof(*hw), GFP_KERNEL);</div><div class='del'>-	lookup = kzalloc(sizeof(*lookup), GFP_KERNEL);</div><div class='del'>-	if (!hw || !lookup)</div><div class='add'>+	if (!hw)</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> 	init.name = "virt_prcm_set";</div><div class='ctx'> 	init.ops = &amp;virt_prcm_set_ops;</div><div class='hunk'>@@ -249,15 +247,9 @@ void omap2xxx_clkt_vps_init(void)</div><div class='ctx'> 	hw-&gt;hw.init = &amp;init;</div><div class='ctx'> </div><div class='ctx'> 	clk = clk_register(NULL, &amp;hw-&gt;hw);</div><div class='del'>-</div><div class='del'>-	lookup-&gt;dev_id = NULL;</div><div class='del'>-	lookup-&gt;con_id = "cpufreq_ck";</div><div class='del'>-	lookup-&gt;clk = clk;</div><div class='del'>-</div><div class='del'>-	clkdev_add(lookup);</div><div class='add'>+	clkdev_create(clk, "cpufreq_ck", NULL);</div><div class='ctx'> 	return;</div><div class='ctx'> cleanup:</div><div class='ctx'> 	kfree(hw);</div><div class='del'>-	kfree(lookup);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c<br/>index af95a624fe71..f008930277ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/control.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/control.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/control.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/control.c</a></div><div class='hunk'>@@ -112,6 +112,7 @@ struct omap3_control_regs {</div><div class='ctx'> 	u32 csirxfe;</div><div class='ctx'> 	u32 iva2_bootaddr;</div><div class='ctx'> 	u32 iva2_bootmod;</div><div class='add'>+	u32 wkup_ctrl;</div><div class='ctx'> 	u32 debobs_0;</div><div class='ctx'> 	u32 debobs_1;</div><div class='ctx'> 	u32 debobs_2;</div><div class='hunk'>@@ -455,6 +456,7 @@ void omap3_control_save_context(void)</div><div class='ctx'> 			omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTADDR);</div><div class='ctx'> 	control_context.iva2_bootmod =</div><div class='ctx'> 			omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTMOD);</div><div class='add'>+	control_context.wkup_ctrl = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);</div><div class='ctx'> 	control_context.debobs_0 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(0));</div><div class='ctx'> 	control_context.debobs_1 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(1));</div><div class='ctx'> 	control_context.debobs_2 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(2));</div><div class='hunk'>@@ -512,6 +514,7 @@ void omap3_control_restore_context(void)</div><div class='ctx'> 					OMAP343X_CONTROL_IVA2_BOOTADDR);</div><div class='ctx'> 	omap_ctrl_writel(control_context.iva2_bootmod,</div><div class='ctx'> 					OMAP343X_CONTROL_IVA2_BOOTMOD);</div><div class='add'>+	omap_ctrl_writel(control_context.wkup_ctrl, OMAP34XX_CONTROL_WKUP_CTRL);</div><div class='ctx'> 	omap_ctrl_writel(control_context.debobs_0, OMAP343X_CONTROL_DEBOBS(0));</div><div class='ctx'> 	omap_ctrl_writel(control_context.debobs_1, OMAP343X_CONTROL_DEBOBS(1));</div><div class='ctx'> 	omap_ctrl_writel(control_context.debobs_2, OMAP343X_CONTROL_DEBOBS(2));</div><div class='head'>diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h<br/>index 80d2b7d8e36e..ec406bc2c6d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/control.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/control.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/control.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/control.h</a></div><div class='hunk'>@@ -231,6 +231,9 @@</div><div class='ctx'> #define OMAP343X_PADCONF_ETK_D15	OMAP343X_PADCONF_ETK(17)</div><div class='ctx'> </div><div class='ctx'> /* 34xx GENERAL_WKUP register offsets */</div><div class='add'>+#define OMAP34XX_CONTROL_WKUP_CTRL	(OMAP343X_CONTROL_GENERAL_WKUP - 0x4)</div><div class='add'>+#define OMAP36XX_GPIO_IO_PWRDNZ		BIT(6)</div><div class='add'>+</div><div class='ctx'> #define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \</div><div class='ctx'> 						0x008 + (i))</div><div class='ctx'> #define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008)</div><div class='head'>diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c<br/>index 990338fbaa59..a69bd67e9028 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/devices.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/devices.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/devices.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static int __init omap3_l3_init(void)</div><div class='ctx'> </div><div class='ctx'> 	WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);</div><div class='ctx'> </div><div class='del'>-	return PTR_RET(pdev);</div><div class='add'>+	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='ctx'> omap_postcore_initcall(omap3_l3_init);</div><div class='ctx'> </div><div class='hunk'>@@ -333,6 +333,6 @@ static int __init omap_gpmc_init(void)</div><div class='ctx'> 	pdev = omap_device_build("omap-gpmc", -1, oh, NULL, 0);</div><div class='ctx'> 	WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);</div><div class='ctx'> </div><div class='del'>-	return PTR_RET(pdev);</div><div class='add'>+	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='ctx'> omap_postcore_initcall(omap_gpmc_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c<br/>index f492ae147c6a..6ab13d18c636 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/display.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/display.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/display.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/display.c</a></div><div class='hunk'>@@ -287,6 +287,8 @@ static enum omapdss_version __init omap_display_get_version(void)</div><div class='ctx'> 		return OMAPDSS_VER_OMAP5;</div><div class='ctx'> 	else if (soc_is_am43xx())</div><div class='ctx'> 		return OMAPDSS_VER_AM43xx;</div><div class='add'>+	else if (soc_is_dra7xx())</div><div class='add'>+		return OMAPDSS_VER_DRA7xx;</div><div class='ctx'> 	else</div><div class='ctx'> 		return OMAPDSS_VER_UNKNOWN;</div><div class='ctx'> }</div><div class='hunk'>@@ -568,25 +570,25 @@ void __init omapdss_early_init_of(void)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char * const omapdss_compat_names[] __initconst = {</div><div class='add'>+	"ti,omap2-dss",</div><div class='add'>+	"ti,omap3-dss",</div><div class='add'>+	"ti,omap4-dss",</div><div class='add'>+	"ti,omap5-dss",</div><div class='add'>+	"ti,dra7-dss",</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct device_node * __init omapdss_find_dss_of_node(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *node;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");</div><div class='del'>-	if (node)</div><div class='del'>-		return node;</div><div class='del'>-</div><div class='del'>-	node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");</div><div class='del'>-	if (node)</div><div class='del'>-		return node;</div><div class='del'>-</div><div class='del'>-	node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");</div><div class='del'>-	if (node)</div><div class='del'>-		return node;</div><div class='del'>-</div><div class='del'>-	node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");</div><div class='del'>-	if (node)</div><div class='del'>-		return node;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(omapdss_compat_names); ++i) {</div><div class='add'>+		node = of_find_compatible_node(NULL, NULL,</div><div class='add'>+			omapdss_compat_names[i]);</div><div class='add'>+		if (node)</div><div class='add'>+			return node;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c<br/>index e1a56d87599e..1ed4be184a29 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/dma.c</a></div><div class='hunk'>@@ -117,7 +117,6 @@ static void omap2_show_dma_caps(void)</div><div class='ctx'> 	u8 revision = dma_read(REVISION, 0) &amp; 0xff;</div><div class='ctx'> 	printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",</div><div class='ctx'> 				revision &gt;&gt; 4, revision &amp; 0xf);</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned configure_dma_errata(void)</div><div class='head'>diff --git a/arch/arm/mach-omap2/fb.c b/arch/arm/mach-omap2/fb.c<br/>index 26e28e94f625..1f1ecf8807eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/fb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/fb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/fb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/fb.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@ int __init omap_init_vrfb(void)</div><div class='ctx'> 	pdev = platform_device_register_resndata(NULL, "omapvrfb", -1,</div><div class='ctx'> 			res, num_res, NULL, 0);</div><div class='ctx'> </div><div class='del'>-	return PTR_RET(pdev);</div><div class='add'>+	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> int __init omap_init_vrfb(void) { return 0; }</div><div class='head'>diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c<br/>index f899e77ff5e6..17a6f752a436 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc-onenand.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/gpmc-onenand.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc-onenand.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/gpmc-onenand.c</a></div><div class='hunk'>@@ -216,11 +216,11 @@ static void omap2_onenand_calc_sync_timings(struct gpmc_timings *t,</div><div class='ctx'> </div><div class='ctx'> 	div = gpmc_calc_divider(min_gpmc_clk_period);</div><div class='ctx'> 	gpmc_clk_ns = gpmc_ticks_to_ns(div);</div><div class='del'>-	if (gpmc_clk_ns &lt; 15) /* &gt;66Mhz */</div><div class='add'>+	if (gpmc_clk_ns &lt; 15) /* &gt;66MHz */</div><div class='ctx'> 		onenand_flags |= ONENAND_FLAG_HF;</div><div class='ctx'> 	else</div><div class='ctx'> 		onenand_flags &amp;= ~ONENAND_FLAG_HF;</div><div class='del'>-	if (gpmc_clk_ns &lt; 12) /* &gt;83Mhz */</div><div class='add'>+	if (gpmc_clk_ns &lt; 12) /* &gt;83MHz */</div><div class='ctx'> 		onenand_flags |= ONENAND_FLAG_VHF;</div><div class='ctx'> 	else</div><div class='ctx'> 		onenand_flags &amp;= ~ONENAND_FLAG_VHF;</div><div class='head'>diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c<br/>index 9a8611ab5dfa..cff079e563f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/hsmmc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/hsmmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/hsmmc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/hsmmc.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@ static void omap_hsmmc1_before_set_reg(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 		reg = omap_ctrl_readl(control_pbias_offset);</div><div class='ctx'> 		if (cpu_is_omap3630()) {</div><div class='del'>-			/* Set MMC I/O to 52Mhz */</div><div class='add'>+			/* Set MMC I/O to 52MHz */</div><div class='ctx'> 			prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);</div><div class='ctx'> 			prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;</div><div class='ctx'> 			omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);</div><div class='head'>diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c<br/>deleted file mode 100644<br/>index ef175acaeaa2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/hwspinlock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/hwspinlock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * OMAP hardware spinlock device initialization</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com</div><div class='del'>- *</div><div class='del'>- * Contact: Simon Que &lt;sque@ti.com&gt;</div><div class='del'>- *          Hari Kanigeri &lt;h-kanigeri2@ti.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/hwspinlock.h&gt;</div><div class='del'>-</div><div class='del'>-#include "soc.h"</div><div class='del'>-#include "omap_hwmod.h"</div><div class='del'>-#include "omap_device.h"</div><div class='del'>-</div><div class='del'>-static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = {</div><div class='del'>-	.base_id = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init hwspinlocks_init(void)</div><div class='del'>-{</div><div class='del'>-	int retval = 0;</div><div class='del'>-	struct omap_hwmod *oh;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	const char *oh_name = "spinlock";</div><div class='del'>-	const char *dev_name = "omap_hwspinlock";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Hwmod lookup will fail in case our platform doesn't support the</div><div class='del'>-	 * hardware spinlock module, so it is safe to run this initcall</div><div class='del'>-	 * on all omaps</div><div class='del'>-	 */</div><div class='del'>-	oh = omap_hwmod_lookup(oh_name);</div><div class='del'>-	if (oh == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	pdev = omap_device_build(dev_name, 0, oh, &amp;omap_hwspinlock_pdata,</div><div class='del'>-				sizeof(struct hwspinlock_pdata));</div><div class='del'>-	if (IS_ERR(pdev)) {</div><div class='del'>-		pr_err("Can't build omap_device for %s:%s\n", dev_name,</div><div class='del'>-								oh_name);</div><div class='del'>-		retval = PTR_ERR(pdev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-/* early board code might need to reserve specific hwspinlock instances */</div><div class='del'>-omap_postcore_initcall(hwspinlocks_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c<br/>index 3b56722dfd8a..8e52621b5a6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap-wakeupgen.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap-wakeupgen.c</a></div><div class='hunk'>@@ -444,7 +444,7 @@ static int wakeupgen_domain_alloc(struct irq_domain *domain,</div><div class='ctx'> 	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &amp;parent_args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops wakeupgen_domain_ops = {</div><div class='add'>+static const struct irq_domain_ops wakeupgen_domain_ops = {</div><div class='ctx'> 	.xlate	= wakeupgen_domain_xlate,</div><div class='ctx'> 	.alloc	= wakeupgen_domain_alloc,</div><div class='ctx'> 	.free	= irq_domain_free_irqs_common,</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c<br/>index 166b18f515a2..4cb8fd9f741f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_device.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_device.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_device.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_device.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,</div><div class='ctx'> 		       const char *clk_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *r;</div><div class='del'>-	struct clk_lookup *l;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk_alias || !clk_name)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -62,21 +62,15 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = clk_get(NULL, clk_name);</div><div class='del'>-	if (IS_ERR(r)) {</div><div class='del'>-		dev_err(&amp;od-&gt;pdev-&gt;dev,</div><div class='del'>-			"clk_get for %s failed\n", clk_name);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	l = clkdev_alloc(r, clk_alias, dev_name(&amp;od-&gt;pdev-&gt;dev));</div><div class='del'>-	if (!l) {</div><div class='del'>-		dev_err(&amp;od-&gt;pdev-&gt;dev,</div><div class='del'>-			"clkdev_alloc for %s failed\n", clk_alias);</div><div class='del'>-		return;</div><div class='add'>+	rc = clk_add_alias(clk_alias, dev_name(&amp;od-&gt;pdev-&gt;dev), clk_name, NULL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc == -ENODEV || rc == -ENOMEM)</div><div class='add'>+			dev_err(&amp;od-&gt;pdev-&gt;dev,</div><div class='add'>+				"clkdev_alloc for %s failed\n", clk_alias);</div><div class='add'>+		else</div><div class='add'>+			dev_err(&amp;od-&gt;pdev-&gt;dev,</div><div class='add'>+				"clk_get for %s failed\n", clk_name);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	clkdev_add(l);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -224,13 +218,13 @@ static int _omap_device_notifier_call(struct notifier_block *nb,</div><div class='ctx'>  */</div><div class='ctx'> static int _omap_device_enable_hwmods(struct omap_device *od)</div><div class='ctx'> {</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; od-&gt;hwmods_cnt; i++)</div><div class='del'>-		omap_hwmod_enable(od-&gt;hwmods[i]);</div><div class='add'>+		ret |= omap_hwmod_enable(od-&gt;hwmods[i]);</div><div class='ctx'> </div><div class='del'>-	/* XXX pass along return value here? */</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -241,13 +235,13 @@ static int _omap_device_enable_hwmods(struct omap_device *od)</div><div class='ctx'>  */</div><div class='ctx'> static int _omap_device_idle_hwmods(struct omap_device *od)</div><div class='ctx'> {</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; od-&gt;hwmods_cnt; i++)</div><div class='del'>-		omap_hwmod_idle(od-&gt;hwmods[i]);</div><div class='add'>+		ret |= omap_hwmod_idle(od-&gt;hwmods[i]);</div><div class='ctx'> </div><div class='del'>-	/* XXX pass along return value here? */</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Public functions for use by core code */</div><div class='hunk'>@@ -595,18 +589,20 @@ static int _od_runtime_suspend(struct device *dev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pm_generic_runtime_suspend(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!ret)</div><div class='del'>-		omap_device_idle(pdev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return omap_device_idle(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int _od_runtime_resume(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	omap_device_enable(pdev);</div><div class='add'>+	ret = omap_device_enable(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return pm_generic_runtime_resume(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -688,11 +684,8 @@ struct dev_pm_domain omap_device_pm_domain = {</div><div class='ctx'> 		SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,</div><div class='ctx'> 				   NULL)</div><div class='ctx'> 		USE_PLATFORM_PM_SLEEP_OPS</div><div class='del'>-		.suspend_noirq = _od_suspend_noirq,</div><div class='del'>-		.resume_noirq = _od_resume_noirq,</div><div class='del'>-		.freeze_noirq = _od_suspend_noirq,</div><div class='del'>-		.thaw_noirq = _od_resume_noirq,</div><div class='del'>-		.restore_noirq = _od_resume_noirq,</div><div class='add'>+		SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(_od_suspend_noirq,</div><div class='add'>+					      _od_resume_noirq)</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -743,7 +736,8 @@ int omap_device_enable(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = _omap_device_enable_hwmods(od);</div><div class='ctx'> </div><div class='del'>-	od-&gt;_state = OMAP_DEVICE_STATE_ENABLED;</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		od-&gt;_state = OMAP_DEVICE_STATE_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -773,7 +767,8 @@ int omap_device_idle(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = _omap_device_idle_hwmods(od);</div><div class='ctx'> </div><div class='del'>-	od-&gt;_state = OMAP_DEVICE_STATE_IDLE;</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		od-&gt;_state = OMAP_DEVICE_STATE_IDLE;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c<br/>index 752969ff9de0..d78c12e7cb5e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod.c</a></div><div class='hunk'>@@ -3318,16 +3318,17 @@ int omap_hwmod_enable(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> int omap_hwmod_idle(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='add'>+	int r;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;oh-&gt;_lock, flags);</div><div class='del'>-	_idle(oh);</div><div class='add'>+	r = _idle(oh);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;oh-&gt;_lock, flags);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3340,16 +3341,17 @@ int omap_hwmod_idle(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> int omap_hwmod_shutdown(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='add'>+	int r;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;oh-&gt;_lock, flags);</div><div class='del'>-	_shutdown(oh);</div><div class='add'>+	r = _shutdown(oh);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;oh-&gt;_lock, flags);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h<br/>index 9611c91d9b82..b5d27ec81610 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod.h</a></div><div class='hunk'>@@ -109,6 +109,12 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_OMAPUART_FLAGS	(HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OMAP_GPMC_DEBUG</div><div class='add'>+#define DEBUG_OMAP_GPMC_HWMOD_FLAGS	HWMOD_INIT_NO_RESET</div><div class='add'>+#else</div><div class='add'>+#define DEBUG_OMAP_GPMC_HWMOD_FLAGS	0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_DEBUG_OMAP2UART1)</div><div class='ctx'> #undef DEBUG_OMAP2UART1_FLAGS</div><div class='ctx'> #define DEBUG_OMAP2UART1_FLAGS DEBUG_OMAPUART_FLAGS</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c<br/>index 8821b9d6bae4..6dcfd03ced8f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a></div><div class='hunk'>@@ -762,16 +762,8 @@ struct omap_hwmod omap2xxx_gpmc_hwmod = {</div><div class='ctx'> 	.name		= "gpmc",</div><div class='ctx'> 	.class		= &amp;omap2xxx_gpmc_hwmod_class,</div><div class='ctx'> 	.main_clk	= "gpmc_fck",</div><div class='del'>-	/*</div><div class='del'>-	 * XXX HWMOD_INIT_NO_RESET should not be needed for this IP</div><div class='del'>-	 * block.  It is not being added due to any known bugs with</div><div class='del'>-	 * resetting the GPMC IP block, but rather because any timings</div><div class='del'>-	 * set by the bootloader are not being correctly programmed by</div><div class='del'>-	 * the kernel from the board file or DT data.</div><div class='del'>-	 * HWMOD_INIT_NO_RESET should be removed ASAP.</div><div class='del'>-	 */</div><div class='del'>-	.flags		= (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |</div><div class='del'>-			   HWMOD_NO_IDLEST),</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2	= {</div><div class='ctx'> 			.prcm_reg_id = 3,</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h<br/>index 130332c0534d..7f737965f543 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h</a></div><div class='hunk'>@@ -145,6 +145,7 @@ extern struct omap_hwmod am33xx_uart5_hwmod;</div><div class='ctx'> extern struct omap_hwmod am33xx_uart6_hwmod;</div><div class='ctx'> extern struct omap_hwmod am33xx_wd_timer1_hwmod;</div><div class='ctx'> </div><div class='add'>+extern struct omap_hwmod_class am33xx_emif_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class am33xx_l4_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class am33xx_wkup_m3_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class am33xx_control_hwmod_class;</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c<br/>index cabc5695b504..907a452b78ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c</a></div><div class='hunk'>@@ -203,6 +203,19 @@ struct omap_hwmod am33xx_prcm_hwmod = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * 'emif' class</div><div class='add'>+ * instance(s): emif</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_class_sysconfig am33xx_emif_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod_class am33xx_emif_hwmod_class = {</div><div class='add'>+	.name		= "emif",</div><div class='add'>+	.sysc		= &amp;am33xx_emif_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * 'aes0' class</div><div class='ctx'>  */</div><div class='ctx'> static struct omap_hwmod_class_sysconfig am33xx_aes0_sysc = {</div><div class='hunk'>@@ -668,7 +681,8 @@ struct omap_hwmod am33xx_gpmc_hwmod = {</div><div class='ctx'> 	.name		= "gpmc",</div><div class='ctx'> 	.class		= &amp;am33xx_gpmc_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "l3s_clkdm",</div><div class='del'>-	.flags		= (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> 	.main_clk	= "l3s_gclk",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap4	= {</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c<br/>index 0cf7b563dcd1..cc0791d9125b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_33xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_33xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_33xx_data.c</a></div><div class='hunk'>@@ -34,19 +34,6 @@</div><div class='ctx'>  * IP blocks</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * 'emif' class</div><div class='del'>- * instance(s): emif</div><div class='del'>- */</div><div class='del'>-static struct omap_hwmod_class_sysconfig am33xx_emif_sysc = {</div><div class='del'>-	.rev_offs	= 0x0000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_class am33xx_emif_hwmod_class = {</div><div class='del'>-	.name		= "emif",</div><div class='del'>-	.sysc		= &amp;am33xx_emif_sysc,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* emif */</div><div class='ctx'> static struct omap_hwmod am33xx_emif_hwmod = {</div><div class='ctx'> 	.name		= "emif",</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c<br/>index 4e8e93c398db..dc55f8dedf2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a></div><div class='hunk'>@@ -2169,16 +2169,8 @@ static struct omap_hwmod omap3xxx_gpmc_hwmod = {</div><div class='ctx'> 	.clkdm_name	= "core_l3_clkdm",</div><div class='ctx'> 	.mpu_irqs	= omap3xxx_gpmc_irqs,</div><div class='ctx'> 	.main_clk	= "gpmc_fck",</div><div class='del'>-	/*</div><div class='del'>-	 * XXX HWMOD_INIT_NO_RESET should not be needed for this IP</div><div class='del'>-	 * block.  It is not being added due to any known bugs with</div><div class='del'>-	 * resetting the GPMC IP block, but rather because any timings</div><div class='del'>-	 * set by the bootloader are not being correctly programmed by</div><div class='del'>-	 * the kernel from the board file or DT data.</div><div class='del'>-	 * HWMOD_INIT_NO_RESET should be removed ASAP.</div><div class='del'>-	 */</div><div class='del'>-	.flags		= (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |</div><div class='del'>-			   HWMOD_NO_IDLEST),</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3744,29 +3736,54 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> /* GP-only hwmod links */</div><div class='ctx'> static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	&amp;omap3xxx_l4_sec__timer12,</div><div class='del'>-	&amp;omap3xxx_l4_core__sham,</div><div class='del'>-	&amp;omap3xxx_l4_core__aes,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	&amp;omap3xxx_l4_sec__timer12,</div><div class='del'>-	&amp;omap3xxx_l4_core__sham,</div><div class='del'>-	&amp;omap3xxx_l4_core__aes,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	&amp;omap3xxx_l4_sec__timer12,</div><div class='del'>-	/*</div><div class='del'>-	 * Apparently the SHA/MD5 and AES accelerator IP blocks are</div><div class='del'>-	 * only present on some AM35xx chips, and no one knows which</div><div class='del'>-	 * ones.  See</div><div class='del'>-	 * http://www.spinics.net/lists/arm-kernel/msg215466.html So</div><div class='del'>-	 * if you need these IP blocks on an AM35xx, try uncommenting</div><div class='del'>-	 * the following lines.</div><div class='del'>-	 */</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* crypto hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__sham,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap34xx_aes_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__aes,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap36xx_sham_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__sham,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap36xx_aes_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__aes,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Apparently the SHA/MD5 and AES accelerator IP blocks are</div><div class='add'>+ * only present on some AM35xx chips, and no one knows which</div><div class='add'>+ * ones.  See</div><div class='add'>+ * http://www.spinics.net/lists/arm-kernel/msg215466.html So</div><div class='add'>+ * if you need these IP blocks on an AM35xx, try uncommenting</div><div class='add'>+ * the following lines.</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_ocp_if *am35xx_sham_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	/* &amp;omap3xxx_l4_core__sham, */</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *am35xx_aes_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	/* &amp;omap3xxx_l4_core__aes, */</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='hunk'>@@ -3868,10 +3885,41 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * omap3xxx_hwmod_is_hs_ip_block_usable - is a security IP block accessible?</div><div class='add'>+ * @bus: struct device_node * for the top-level OMAP DT data</div><div class='add'>+ * @dev_name: device name used in the DT file</div><div class='add'>+ *</div><div class='add'>+ * Determine whether a "secure" IP block @dev_name is usable by Linux.</div><div class='add'>+ * There doesn't appear to be a 100% reliable way to determine this,</div><div class='add'>+ * so we rely on heuristics.  If @bus is null, meaning there's no DT</div><div class='add'>+ * data, then we only assume the IP block is accessible if the OMAP is</div><div class='add'>+ * fused as a 'general-purpose' SoC.  If however DT data is present,</div><div class='add'>+ * test to see if the IP block is described in the DT data and set to</div><div class='add'>+ * 'status = "okay"'.  If so then we assume the ODM has configured the</div><div class='add'>+ * OMAP firewalls to allow access to the IP block.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if device named @dev_name is not likely to be accessible,</div><div class='add'>+ * or 1 if it is likely to be accessible.</div><div class='add'>+ */</div><div class='add'>+static int __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,</div><div class='add'>+						       const char *dev_name)</div><div class='add'>+{</div><div class='add'>+	if (!bus)</div><div class='add'>+		return (omap_type() == OMAP2_DEVICE_TYPE_GP) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	if (of_device_is_available(of_find_node_by_name(bus, dev_name)))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='del'>-	struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL;</div><div class='add'>+	struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL, **h_sham = NULL;</div><div class='add'>+	struct omap_hwmod_ocp_if **h_aes = NULL;</div><div class='add'>+	struct device_node *bus = NULL;</div><div class='ctx'> 	unsigned int rev;</div><div class='ctx'> </div><div class='ctx'> 	omap_hwmod_init();</div><div class='hunk'>@@ -3893,13 +3941,19 @@ int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> 	    rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {</div><div class='ctx'> 		h = omap34xx_hwmod_ocp_ifs;</div><div class='ctx'> 		h_gp = omap34xx_gp_hwmod_ocp_ifs;</div><div class='add'>+		h_sham = omap34xx_sham_hwmod_ocp_ifs;</div><div class='add'>+		h_aes = omap34xx_aes_hwmod_ocp_ifs;</div><div class='ctx'> 	} else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {</div><div class='ctx'> 		h = am35xx_hwmod_ocp_ifs;</div><div class='ctx'> 		h_gp = am35xx_gp_hwmod_ocp_ifs;</div><div class='add'>+		h_sham = am35xx_sham_hwmod_ocp_ifs;</div><div class='add'>+		h_aes = am35xx_aes_hwmod_ocp_ifs;</div><div class='ctx'> 	} else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||</div><div class='ctx'> 		   rev == OMAP3630_REV_ES1_2) {</div><div class='ctx'> 		h = omap36xx_hwmod_ocp_ifs;</div><div class='ctx'> 		h_gp = omap36xx_gp_hwmod_ocp_ifs;</div><div class='add'>+		h_sham = omap36xx_sham_hwmod_ocp_ifs;</div><div class='add'>+		h_aes = omap36xx_aes_hwmod_ocp_ifs;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN(1, "OMAP3 hwmod family init: unknown chip type\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -3916,6 +3970,25 @@ int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Register crypto hwmod links only if they are not disabled in DT.</div><div class='add'>+	 * If DT information is missing, enable them only for GP devices.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		bus = of_find_node_by_name(NULL, "ocp");</div><div class='add'>+</div><div class='add'>+	if (h_sham &amp;&amp; omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) {</div><div class='add'>+		r = omap_hwmod_register_links(h_sham);</div><div class='add'>+		if (r &lt; 0)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (h_aes &amp;&amp; omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) {</div><div class='add'>+		r = omap_hwmod_register_links(h_aes);</div><div class='add'>+		if (r &lt; 0)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Register hwmod links specific to certain ES levels of a</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c<br/>index 17e8004fc20f..215d5efa0dba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_43xx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_43xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_43xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_43xx_data.c</a></div><div class='hunk'>@@ -24,6 +24,20 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* IP blocks */</div><div class='add'>+static struct omap_hwmod am43xx_emif_hwmod = {</div><div class='add'>+	.name		= "emif",</div><div class='add'>+	.class		= &amp;am33xx_emif_hwmod_class,</div><div class='add'>+	.clkdm_name	= "emif_clkdm",</div><div class='add'>+	.flags		= HWMOD_INIT_NO_IDLE,</div><div class='add'>+	.main_clk	= "dpll_ddr_m2_ck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap4	= {</div><div class='add'>+			.clkctrl_offs	= AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET,</div><div class='add'>+			.modulemode	= MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct omap_hwmod am43xx_l4_hs_hwmod = {</div><div class='ctx'> 	.name		= "l4_hs",</div><div class='ctx'> 	.class		= &amp;am33xx_l4_hwmod_class,</div><div class='hunk'>@@ -583,6 +597,13 @@ static struct omap_hwmod am43xx_vpfe1_hwmod = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Interfaces */</div><div class='add'>+static struct omap_hwmod_ocp_if am43xx_l3_main__emif = {</div><div class='add'>+	.master		= &amp;am33xx_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;am43xx_emif_hwmod,</div><div class='add'>+	.clk		= "dpll_core_m4_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {</div><div class='ctx'> 	.master		= &amp;am33xx_l3_main_hwmod,</div><div class='ctx'> 	.slave		= &amp;am43xx_l4_hs_hwmod,</div><div class='hunk'>@@ -918,6 +939,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {</div><div class='ctx'> 	&amp;am33xx_l3_main__l3_instr,</div><div class='ctx'> 	&amp;am33xx_l3_main__gfx,</div><div class='ctx'> 	&amp;am33xx_l3_s__l3_main,</div><div class='add'>+	&amp;am43xx_l3_main__emif,</div><div class='ctx'> 	&amp;am33xx_pruss__l3_main,</div><div class='ctx'> 	&amp;am43xx_wkup_m3__l4_wkup,</div><div class='ctx'> 	&amp;am33xx_gfx__l3_main,</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c<br/>index f5e68a782025..43eebf2c59e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a></div><div class='hunk'>@@ -1188,15 +1188,8 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {</div><div class='ctx'> 	.name		= "gpmc",</div><div class='ctx'> 	.class		= &amp;omap44xx_gpmc_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "l3_2_clkdm",</div><div class='del'>-	/*</div><div class='del'>-	 * XXX HWMOD_INIT_NO_RESET should not be needed for this IP</div><div class='del'>-	 * block.  It is not being added due to any known bugs with</div><div class='del'>-	 * resetting the GPMC IP block, but rather because any timings</div><div class='del'>-	 * set by the bootloader are not being correctly programmed by</div><div class='del'>-	 * the kernel from the board file or DT data.</div><div class='del'>-	 * HWMOD_INIT_NO_RESET should be removed ASAP.</div><div class='del'>-	 */</div><div class='del'>-	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='ctx'> 			.clkctrl_offs = OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET,</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c<br/>index 0e64c2fac0b5..2606c6608bd8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_7xx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_7xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_7xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_7xx_data.c</a></div><div class='hunk'>@@ -49,6 +49,27 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * 'dmm' class</div><div class='add'>+ * instance(s): dmm</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_class dra7xx_dmm_hwmod_class = {</div><div class='add'>+	.name	= "dmm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dmm */</div><div class='add'>+static struct omap_hwmod dra7xx_dmm_hwmod = {</div><div class='add'>+	.name		= "dmm",</div><div class='add'>+	.class		= &amp;dra7xx_dmm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "emif_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = DRA7XX_CM_EMIF_DMM_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = DRA7XX_RM_EMIF_DMM_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * 'l3' class</div><div class='ctx'>  * instance(s): l3_instr, l3_main_1, l3_main_2</div><div class='ctx'>  */</div><div class='hunk'>@@ -438,6 +459,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='ctx'> 	{ .role = "video2_clk", .clk = "dss_video2_clk" },</div><div class='ctx'> 	{ .role = "video1_clk", .clk = "dss_video1_clk" },</div><div class='ctx'> 	{ .role = "hdmi_clk", .clk = "dss_hdmi_clk" },</div><div class='add'>+	{ .role = "hdcp_clk", .clk = "dss_deshdcp_clk" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod dra7xx_dss_hwmod = {</div><div class='hunk'>@@ -500,6 +522,7 @@ static struct omap_hwmod dra7xx_dss_dispc_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;dss_dispc_dev_attr,</div><div class='add'>+	.parent_hwmod	= &amp;dra7xx_dss_hwmod,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -541,6 +564,7 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_hdmi_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_hdmi_opt_clks),</div><div class='add'>+	.parent_hwmod	= &amp;dra7xx_dss_hwmod,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -819,8 +843,8 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {</div><div class='ctx'> 	.name		= "gpmc",</div><div class='ctx'> 	.class		= &amp;dra7xx_gpmc_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "l3main1_clkdm",</div><div class='del'>-	.flags		= (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |</div><div class='del'>-			   HWMOD_SWSUP_SIDLE),</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> 	.main_clk	= "l3_iclk_div",</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='hunk'>@@ -2321,6 +2345,14 @@ static struct omap_hwmod dra7xx_wd_timer2_hwmod = {</div><div class='ctx'>  * Interfaces</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/* l3_main_1 -&gt; dmm */</div><div class='add'>+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dmm = {</div><div class='add'>+	.master		= &amp;dra7xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;dra7xx_dmm_hwmod,</div><div class='add'>+	.clk		= "l3_iclk_div",</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* l3_main_2 -&gt; l3_instr */</div><div class='ctx'> static struct omap_hwmod_ocp_if dra7xx_l3_main_2__l3_instr = {</div><div class='ctx'> 	.master		= &amp;dra7xx_l3_main_2_hwmod,</div><div class='hunk'>@@ -3289,6 +3321,7 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;dra7xx_l3_main_1__dmm,</div><div class='ctx'> 	&amp;dra7xx_l3_main_2__l3_instr,</div><div class='ctx'> 	&amp;dra7xx_l4_cfg__l3_main_1,</div><div class='ctx'> 	&amp;dra7xx_mpu__l3_main_1,</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c<br/>index cab1eb61ac96..c92413769144 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_81xx_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/omap_hwmod_81xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_81xx_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/omap_hwmod_81xx_data.c</a></div><div class='hunk'>@@ -478,6 +478,8 @@ static struct omap_hwmod dm81xx_gpmc_hwmod = {</div><div class='ctx'> 	.clkdm_name	= "alwon_l3s_clkdm",</div><div class='ctx'> 	.class		= &amp;dm81xx_gpmc_hwmod_class,</div><div class='ctx'> 	.main_clk	= "sysclk6_ck",</div><div class='add'>+	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */</div><div class='add'>+	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='ctx'> 			.clkctrl_offs = DM816X_CM_ALWON_GPMC_CLKCTRL,</div><div class='head'>diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c<br/>index 0e75ec3e114b..b2233b72b24d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/opp2430_data.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/opp2430_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/opp2430_data.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/opp2430_data.c</a></div><div class='hunk'>@@ -116,7 +116,7 @@ const struct prcm_config omap2430_rate_table[] = {</div><div class='ctx'> 		RATE_IN_243X},</div><div class='ctx'> </div><div class='ctx'> 	/* PRCM-boot/bypass */</div><div class='del'>-	{S13M, S13M, S13M, RB_CM_CLKSEL_MPU_VAL,		/* 13Mhz */</div><div class='add'>+	{S13M, S13M, S13M, RB_CM_CLKSEL_MPU_VAL,		/* 13MHz */</div><div class='ctx'> 		RB_CM_CLKSEL_DSP_VAL, RB_CM_CLKSEL_GFX_VAL,</div><div class='ctx'> 		RB_CM_CLKSEL1_CORE_VAL, MB_CM_CLKSEL1_PLL_13_VAL,</div><div class='ctx'> 		MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,</div><div class='hunk'>@@ -124,7 +124,7 @@ const struct prcm_config omap2430_rate_table[] = {</div><div class='ctx'> 		RATE_IN_243X},</div><div class='ctx'> </div><div class='ctx'> 	/* PRCM-boot/bypass */</div><div class='del'>-	{S12M, S12M, S12M, RB_CM_CLKSEL_MPU_VAL,		/* 12Mhz */</div><div class='add'>+	{S12M, S12M, S12M, RB_CM_CLKSEL_MPU_VAL,		/* 12MHz */</div><div class='ctx'> 		RB_CM_CLKSEL_DSP_VAL, RB_CM_CLKSEL_GFX_VAL,</div><div class='ctx'> 		RB_CM_CLKSEL1_CORE_VAL, MB_CM_CLKSEL1_PLL_12_VAL,</div><div class='ctx'> 		MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,</div><div class='head'>diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c<br/>index af11511dda50..821171cf6b7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pdata-quirks.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/pdata-quirks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pdata-quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/pdata-quirks.c</a></div><div class='hunk'>@@ -44,6 +44,27 @@ static void __init omap2420_n8x0_legacy_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP3</div><div class='add'>+/*</div><div class='add'>+ * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V</div><div class='add'>+ * mode for MMC1 in case bootloader did not configure things.</div><div class='add'>+ * Note that if the pins are used for MMC1, pbias-regulator</div><div class='add'>+ * manages the IO voltage.</div><div class='add'>+ */</div><div class='add'>+static void __init omap3_gpio126_127_129(void)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE);</div><div class='add'>+	reg &amp;= ~OMAP343X_PBIASLITEVMODE1;</div><div class='add'>+	reg |= OMAP343X_PBIASLITEPWRDNZ1;</div><div class='add'>+	omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE);</div><div class='add'>+	if (cpu_is_omap3630()) {</div><div class='add'>+		reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);</div><div class='add'>+		reg |= OMAP36XX_GPIO_IO_PWRDNZ;</div><div class='add'>+		omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init hsmmc2_internal_input_clk(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='hunk'>@@ -356,6 +377,7 @@ static struct pdata_init pdata_quirks[] __initdata = {</div><div class='ctx'> 	{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },</div><div class='ctx'> 	{ "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, },</div><div class='ctx'> 	{ "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, },</div><div class='add'>+	{ "logicpd,dm3730-torpedo-devkit", omap3_gpio126_127_129, },</div><div class='ctx'> 	{ "ti,omap3-evm-37xx", omap3_evm_legacy_init, },</div><div class='ctx'> 	{ "ti,am3517-evm", am3517_evm_legacy_init, },</div><div class='ctx'> 	{ "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },</div><div class='head'>diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c<br/>index a69e9a33cb6d..d2adfebd3b3f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/pmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/pmu.c</a></div><div class='hunk'>@@ -55,7 +55,7 @@ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])</div><div class='ctx'> 	WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",</div><div class='ctx'> 	     dev_name);</div><div class='ctx'> </div><div class='del'>-	return PTR_RET(omap_pmu_dev);</div><div class='add'>+	return PTR_ERR_OR_ZERO(omap_pmu_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init omap_init_pmu(void)</div><div class='head'>diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h<br/>index d0261996db6d..7eebc27fa892 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm43xx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/prcm43xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm43xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/prcm43xx.h</a></div><div class='hunk'>@@ -146,4 +146,6 @@</div><div class='ctx'> #define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET		0x04a0</div><div class='ctx'> #define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET		0x0068</div><div class='ctx'> #define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET		0x0070</div><div class='add'>+#define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET		0x0720</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c<br/>index ae3f1553158d..339b0ecb7c32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/sdrc2xxx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/sdrc2xxx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/sdrc2xxx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sdrc2xxx.c</a></div><div class='hunk'>@@ -164,6 +164,6 @@ void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode)</div><div class='ctx'> 	mem_timings.slow_dll_ctrl |=</div><div class='ctx'> 		((mem_timings.fast_dll_ctrl &amp; 0xF) | (1 &lt;&lt; 2));</div><div class='ctx'> </div><div class='del'>-	/* 90 degree phase for anything below 133Mhz + disable DLL filter */</div><div class='add'>+	/* 90 degree phase for anything below 133MHz + disable DLL filter */</div><div class='ctx'> 	mem_timings.slow_dll_ctrl |= ((1 &lt;&lt; 1) | (3 &lt;&lt; 8));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c<br/>index 57dee0c7cd2b..5fb50fe54153 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/serial.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/serial.c</a></div><div class='hunk'>@@ -203,7 +203,7 @@ static int __init omap_serial_early_init(void)</div><div class='ctx'> 		if (cmdline_find_option(uart_name)) {</div><div class='ctx'> 			console_uart_id = uart-&gt;num;</div><div class='ctx'> </div><div class='del'>-			if (console_loglevel &gt;= 10) {</div><div class='add'>+			if (console_loglevel &gt;= CONSOLE_LOGLEVEL_DEBUG) {</div><div class='ctx'> 				uart_debug = true;</div><div class='ctx'> 				pr_info("%s used as console in debug mode: uart%d clocks will not be gated",</div><div class='ctx'> 					uart_name, uart-&gt;num);</div><div class='head'>diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S<br/>index 2c88ff2d0236..53a2537cd75a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/sram242x.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/sram242x.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/sram242x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sram242x.S</a></div><div class='hunk'>@@ -64,7 +64,7 @@ ENTRY(omap242x_sram_ddr_init)</div><div class='ctx'> 	mvn	r9, #0x4		@ mask to get clear bit2</div><div class='ctx'> 	and	r10, r10, r9		@ clear bit2 for lock mode.</div><div class='ctx'> 	orr	r10, r10, #0x8		@ make sure DLL on (es2 bit pos)</div><div class='del'>-	orr	r10, r10, #0x2		@ 90 degree phase for all below 133Mhz</div><div class='add'>+	orr	r10, r10, #0x2		@ 90 degree phase for all below 133MHz</div><div class='ctx'> 	str	r10, [r11]		@ commit to DLLA_CTRL</div><div class='ctx'> 	bl	i_dll_wait		@ wait for dll to lock</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S<br/>index d5deb9761fc7..b3edd6f7f7db 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/sram243x.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-omap2/sram243x.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/sram243x.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-omap2/sram243x.S</a></div><div class='hunk'>@@ -64,7 +64,7 @@ ENTRY(omap243x_sram_ddr_init)</div><div class='ctx'> 	mvn	r9, #0x4		@ mask to get clear bit2</div><div class='ctx'> 	and	r10, r10, r9		@ clear bit2 for lock mode.</div><div class='ctx'> 	orr	r10, r10, #0x8		@ make sure DLL on (es2 bit pos)</div><div class='del'>-	orr	r10, r10, #0x2		@ 90 degree phase for all below 133Mhz</div><div class='add'>+	orr	r10, r10, #0x2		@ 90 degree phase for all below 133MHz</div><div class='ctx'> 	str	r10, [r11]		@ commit to DLLA_CTRL</div><div class='ctx'> 	bl	i_dll_wait		@ wait for dll to lock</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig<br/>index e03d8b5c9ad0..9ab8932403e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-prima2/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/Kconfig</a></div><div class='hunk'>@@ -4,6 +4,7 @@ menuconfig ARCH_SIRF</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='ctx'> 	select NO_IOPORT_MAP</div><div class='add'>+	select REGMAP</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select PINCTRL_SIRF</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S<br/>index d86fe33c5f53..209d9fc5c16c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-prima2/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/headsmp.S</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'>  * ready for them to initialise.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(sirfsoc_secondary_startup)</div><div class='del'>-	bl v7_invalidate_l1</div><div class='ctx'>         mrc     p15, 0, r0, c0, c0, 5</div><div class='ctx'>         and     r0, r0, #15</div><div class='ctx'>         adr     r4, 1f</div><div class='head'>diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c<br/>index 8f66d8f7ca75..d4852d24dc7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/rtciobrg.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-prima2/rtciobrg.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/rtciobrg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-prima2/rtciobrg.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * RTC I/O Bridge interfaces for CSR SiRFprimaII</div><div class='add'>+ * RTC I/O Bridge interfaces for CSR SiRFprimaII/atlas7</div><div class='ctx'>  * ARM access the registers of SYSRTC, GPSRTC and PWRC through this module</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.</div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='hunk'>@@ -66,6 +67,7 @@ u32 sirfsoc_rtc_iobrg_readl(u32 addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags, val;</div><div class='ctx'> </div><div class='add'>+	/* TODO: add hwspinlock to sync with M3 */</div><div class='ctx'> 	spin_lock_irqsave(&amp;rtciobrg_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	val = __sirfsoc_rtc_iobrg_readl(addr);</div><div class='hunk'>@@ -90,6 +92,7 @@ void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	 /* TODO: add hwspinlock to sync with M3 */</div><div class='ctx'> 	spin_lock_irqsave(&amp;rtciobrg_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	sirfsoc_rtc_iobrg_pre_writel(val, addr);</div><div class='hunk'>@@ -102,6 +105,45 @@ void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+static int regmap_iobg_regwrite(void *context, unsigned int reg,</div><div class='add'>+				   unsigned int val)</div><div class='add'>+{</div><div class='add'>+	sirfsoc_rtc_iobrg_writel(val, reg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int regmap_iobg_regread(void *context, unsigned int reg,</div><div class='add'>+				  unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	*val = (u32)sirfsoc_rtc_iobrg_readl(reg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap_bus regmap_iobg = {</div><div class='add'>+	.reg_write = regmap_iobg_regwrite,</div><div class='add'>+	.reg_read = regmap_iobg_regread,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_regmap_init_iobg(): Initialise managed register map</div><div class='add'>+ *</div><div class='add'>+ * @iobg: Device that will be interacted with</div><div class='add'>+ * @config: Configuration for register map</div><div class='add'>+ *</div><div class='add'>+ * The return value will be an ERR_PTR() on error or a valid pointer</div><div class='add'>+ * to a struct regmap.  The regmap will be automatically freed by the</div><div class='add'>+ * device management code.</div><div class='add'>+ */</div><div class='add'>+struct regmap *devm_regmap_init_iobg(struct device *dev,</div><div class='add'>+				    const struct regmap_config *config)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_bus *bus = &amp;regmap_iobg;</div><div class='add'>+</div><div class='add'>+	return devm_regmap_init(dev, bus, dev, config);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_regmap_init_iobg);</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id rtciobrg_ids[] = {</div><div class='ctx'> 	{ .compatible = "sirf,prima2-rtciobg" },</div><div class='ctx'> 	{}</div><div class='hunk'>@@ -132,7 +174,7 @@ static int __init sirfsoc_rtciobrg_init(void)</div><div class='ctx'> }</div><div class='ctx'> postcore_initcall(sirfsoc_rtciobrg_init);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Zhiwu Song &lt;zhiwu.song@csr.com&gt;, "</div><div class='del'>-		"Barry Song &lt;baohua.song@csr.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Zhiwu Song &lt;zhiwu.song@csr.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Barry Song &lt;baohua.song@csr.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile<br/>index 4087d334ecdf..2ceed407eda9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/Makefile</a></div><div class='hunk'>@@ -3,16 +3,15 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # Common support (must be linked before board specific support)</div><div class='del'>-obj-y				+= clock.o devices.o generic.o irq.o \</div><div class='del'>-				   reset.o</div><div class='add'>+obj-y				+= devices.o generic.o irq.o reset.o</div><div class='ctx'> obj-$(CONFIG_PM)		+= pm.o sleep.o standby.o</div><div class='ctx'> </div><div class='ctx'> # Generic drivers that other drivers may depend upon</div><div class='ctx'> </div><div class='ctx'> # SoC-specific code</div><div class='del'>-obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o</div><div class='del'>-obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o</div><div class='del'>-obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o</div><div class='add'>+obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o pxa2xx.o pxa25x.o</div><div class='add'>+obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o pxa2xx.o pxa27x.o</div><div class='add'>+obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o</div><div class='ctx'> obj-$(CONFIG_CPU_PXA300)	+= pxa300.o</div><div class='ctx'> obj-$(CONFIG_CPU_PXA320)	+= pxa320.o</div><div class='ctx'> obj-$(CONFIG_CPU_PXA930)	+= pxa930.o</div><div class='head'>diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c<br/>index c092730749b9..bf366b39fa61 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/capc7117.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/capc7117.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/capc7117.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/capc7117.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -144,6 +145,8 @@ static void __init capc7117_init(void)</div><div class='ctx'> </div><div class='ctx'> 	capc7117_uarts_init();</div><div class='ctx'> 	capc7117_ide_init();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(CAPC7117,</div><div class='head'>diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c<br/>deleted file mode 100644<br/>index 9ee2ad6a0a07..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/clock-pxa2xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/clock-pxa2xx.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-pxa/clock-pxa2xx.c</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/syscore_ops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/pxa2xx-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='del'>-void clk_pxa2xx_cken_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	CKEN |= 1 &lt;&lt; clk-&gt;cken;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void clk_pxa2xx_cken_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	CKEN &amp;= ~(1 &lt;&lt; clk-&gt;cken);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa2xx_cken_ops = {</div><div class='del'>-	.enable		= clk_pxa2xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa2xx_cken_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static uint32_t saved_cken;</div><div class='del'>-</div><div class='del'>-static int pxa2xx_clock_suspend(void)</div><div class='del'>-{</div><div class='del'>-	saved_cken = CKEN;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pxa2xx_clock_resume(void)</div><div class='del'>-{</div><div class='del'>-	CKEN = saved_cken;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define pxa2xx_clock_suspend	NULL</div><div class='del'>-#define pxa2xx_clock_resume	NULL</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-struct syscore_ops pxa2xx_clock_syscore_ops = {</div><div class='del'>-	.suspend	= pxa2xx_clock_suspend,</div><div class='del'>-	.resume		= pxa2xx_clock_resume,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c<br/>deleted file mode 100644<br/>index d4e9499832dc..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/clock-pxa3xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/clock-pxa3xx.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,212 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-pxa/clock-pxa3xx.c</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/syscore_ops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/smemc.h&gt;</div><div class='del'>-#include &lt;mach/pxa3xx-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='del'>-/* Crystal clock: 13MHz */</div><div class='del'>-#define BASE_CLK	13000000</div><div class='del'>-</div><div class='del'>-/* Ring Oscillator Clock: 60MHz */</div><div class='del'>-#define RO_CLK		60000000</div><div class='del'>-</div><div class='del'>-#define ACCR_D0CS	(1 &lt;&lt; 26)</div><div class='del'>-#define ACCR_PCCE	(1 &lt;&lt; 11)</div><div class='del'>-</div><div class='del'>-/* crystal frequency to HSIO bus frequency multiplier (HSS) */</div><div class='del'>-static unsigned char hss_mult[4] = { 8, 12, 16, 24 };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the clock frequency as reflected by CCSR and the turbo flag.</div><div class='del'>- * We assume these values have been applied via a fcs.</div><div class='del'>- * If info is not 0 we also display the current settings.</div><div class='del'>- */</div><div class='del'>-unsigned int pxa3xx_get_clk_frequency_khz(int info)</div><div class='del'>-{</div><div class='del'>-	unsigned long acsr, xclkcfg;</div><div class='del'>-	unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;</div><div class='del'>-</div><div class='del'>-	/* Read XCLKCFG register turbo bit */</div><div class='del'>-	__asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));</div><div class='del'>-	t = xclkcfg &amp; 0x1;</div><div class='del'>-</div><div class='del'>-	acsr = ACSR;</div><div class='del'>-</div><div class='del'>-	xl  = acsr &amp; 0x1f;</div><div class='del'>-	xn  = (acsr &gt;&gt; 8) &amp; 0x7;</div><div class='del'>-	hss = (acsr &gt;&gt; 14) &amp; 0x3;</div><div class='del'>-</div><div class='del'>-	XL = xl * BASE_CLK;</div><div class='del'>-	XN = xn * XL;</div><div class='del'>-</div><div class='del'>-	ro = acsr &amp; ACCR_D0CS;</div><div class='del'>-</div><div class='del'>-	CLK = (ro) ? RO_CLK : ((t) ? XN : XL);</div><div class='del'>-	HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;</div><div class='del'>-</div><div class='del'>-	if (info) {</div><div class='del'>-		pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",</div><div class='del'>-			RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,</div><div class='del'>-			(ro) ? "" : "in");</div><div class='del'>-		pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",</div><div class='del'>-			XL / 1000000, (XL % 1000000) / 10000, xl);</div><div class='del'>-		pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",</div><div class='del'>-			XN / 1000000, (XN % 1000000) / 10000, xn,</div><div class='del'>-			(t) ? "" : "in");</div><div class='del'>-		pr_info("HSIO bus clock: %d.%02dMHz\n",</div><div class='del'>-			HSS / 1000000, (HSS % 1000000) / 10000);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return CLK / 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the current AC97 clock frequency.</div><div class='del'>- */</div><div class='del'>-static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = 312000000;</div><div class='del'>-	unsigned long ac97_div;</div><div class='del'>-</div><div class='del'>-	ac97_div = AC97_DIV;</div><div class='del'>-</div><div class='del'>-	/* This may loose precision for some rates but won't for the</div><div class='del'>-	 * standard 24.576MHz.</div><div class='del'>-	 */</div><div class='del'>-	rate /= (ac97_div &gt;&gt; 12) &amp; 0x7fff;</div><div class='del'>-	rate *= (ac97_div &amp; 0xfff);</div><div class='del'>-</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the current HSIO bus clock frequency</div><div class='del'>- */</div><div class='del'>-static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long acsr;</div><div class='del'>-	unsigned int hss, hsio_clk;</div><div class='del'>-</div><div class='del'>-	acsr = ACSR;</div><div class='del'>-</div><div class='del'>-	hss = (acsr &gt;&gt; 14) &amp; 0x3;</div><div class='del'>-	hsio_clk = (acsr &amp; ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;</div><div class='del'>-</div><div class='del'>-	return hsio_clk;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* crystal frequency to static memory controller multiplier (SMCFS) */</div><div class='del'>-static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };</div><div class='del'>-static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 };</div><div class='del'>-</div><div class='del'>-static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long acsr = ACSR;</div><div class='del'>-	unsigned long memclkcfg = __raw_readl(MEMCLKCFG);</div><div class='del'>-</div><div class='del'>-	return BASE_CLK * smcfs_mult[(acsr &gt;&gt; 23) &amp; 0x7] /</div><div class='del'>-			df_clkdiv[(memclkcfg &gt;&gt; 16) &amp; 0x3];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void clk_pxa3xx_cken_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = 1ul &lt;&lt; (clk-&gt;cken &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;cken &lt; 32)</div><div class='del'>-		CKENA |= mask;</div><div class='del'>-	else if (clk-&gt;cken &lt; 64)</div><div class='del'>-		CKENB |= mask;</div><div class='del'>-	else</div><div class='del'>-		CKENC |= mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void clk_pxa3xx_cken_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = 1ul &lt;&lt; (clk-&gt;cken &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;cken &lt; 32)</div><div class='del'>-		CKENA &amp;= ~mask;</div><div class='del'>-	else if (clk-&gt;cken &lt; 64)</div><div class='del'>-		CKENB &amp;= ~mask;</div><div class='del'>-	else</div><div class='del'>-		CKENC &amp;= ~mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa3xx_cken_ops = {</div><div class='del'>-	.enable		= clk_pxa3xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa3xx_cken_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa3xx_hsio_ops = {</div><div class='del'>-	.enable		= clk_pxa3xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa3xx_cken_disable,</div><div class='del'>-	.getrate	= clk_pxa3xx_hsio_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa3xx_ac97_ops = {</div><div class='del'>-	.enable		= clk_pxa3xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa3xx_cken_disable,</div><div class='del'>-	.getrate	= clk_pxa3xx_ac97_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa3xx_smemc_ops = {</div><div class='del'>-	.enable		= clk_pxa3xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa3xx_cken_disable,</div><div class='del'>-	.getrate	= clk_pxa3xx_smemc_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void clk_pout_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	OSCC |= OSCC_PEN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_pout_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	OSCC &amp;= ~OSCC_PEN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct clkops clk_pxa3xx_pout_ops = {</div><div class='del'>-	.enable		= clk_pout_enable,</div><div class='del'>-	.disable	= clk_pout_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static uint32_t cken[2];</div><div class='del'>-static uint32_t accr;</div><div class='del'>-</div><div class='del'>-static int pxa3xx_clock_suspend(void)</div><div class='del'>-{</div><div class='del'>-	cken[0] = CKENA;</div><div class='del'>-	cken[1] = CKENB;</div><div class='del'>-	accr = ACCR;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pxa3xx_clock_resume(void)</div><div class='del'>-{</div><div class='del'>-	ACCR = accr;</div><div class='del'>-	CKENA = cken[0];</div><div class='del'>-	CKENB = cken[1];</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define pxa3xx_clock_suspend	NULL</div><div class='del'>-#define pxa3xx_clock_resume	NULL</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-struct syscore_ops pxa3xx_clock_syscore_ops = {</div><div class='del'>-	.suspend	= pxa3xx_clock_suspend,</div><div class='del'>-	.resume		= pxa3xx_clock_resume,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c<br/>deleted file mode 100644<br/>index 4d466102a027..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,86 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mach-sa1100/clock.c</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(clocks_lock);</div><div class='del'>-</div><div class='del'>-int clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	if (clk-&gt;enabled++ == 0)</div><div class='del'>-		clk-&gt;ops-&gt;enable(clk);</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;delay)</div><div class='del'>-		udelay(clk-&gt;delay);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_enable);</div><div class='del'>-</div><div class='del'>-void clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	WARN_ON(clk-&gt;enabled == 0);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	if (--clk-&gt;enabled == 0)</div><div class='del'>-		clk-&gt;ops-&gt;disable(clk);</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_disable);</div><div class='del'>-</div><div class='del'>-unsigned long clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate;</div><div class='del'>-</div><div class='del'>-	rate = clk-&gt;rate;</div><div class='del'>-	if (clk-&gt;ops-&gt;getrate)</div><div class='del'>-		rate = clk-&gt;ops-&gt;getrate(clk);</div><div class='del'>-</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get_rate);</div><div class='del'>-</div><div class='del'>-int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;ops-&gt;setrate) {</div><div class='del'>-		spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-		ret = clk-&gt;ops-&gt;setrate(clk, rate);</div><div class='del'>-		spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_set_rate);</div><div class='del'>-</div><div class='del'>-void clk_dummy_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void clk_dummy_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct clkops clk_dummy_ops = {</div><div class='del'>-	.enable		= clk_dummy_enable,</div><div class='del'>-	.disable	= clk_dummy_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct clk clk_dummy = {</div><div class='del'>-	.ops		= &amp;clk_dummy_ops,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h<br/>deleted file mode 100644<br/>index 1f65d32c8d5e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/clock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/clock.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,80 +0,0 @@</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/syscore_ops.h&gt;</div><div class='del'>-</div><div class='del'>-struct clkops {</div><div class='del'>-	void			(*enable)(struct clk *);</div><div class='del'>-	void			(*disable)(struct clk *);</div><div class='del'>-	unsigned long		(*getrate)(struct clk *);</div><div class='del'>-	int			(*setrate)(struct clk *, unsigned long);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct clk {</div><div class='del'>-	const struct clkops	*ops;</div><div class='del'>-	unsigned long		rate;</div><div class='del'>-	unsigned int		cken;</div><div class='del'>-	unsigned int		delay;</div><div class='del'>-	unsigned int		enabled;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void clk_dummy_enable(struct clk *);</div><div class='del'>-void clk_dummy_disable(struct clk *);</div><div class='del'>-</div><div class='del'>-extern const struct clkops clk_dummy_ops;</div><div class='del'>-extern struct clk clk_dummy;</div><div class='del'>-</div><div class='del'>-#define INIT_CLKREG(_clk,_devname,_conname)		\</div><div class='del'>-	{						\</div><div class='del'>-		.clk		= _clk,			\</div><div class='del'>-		.dev_id		= _devname,		\</div><div class='del'>-		.con_id		= _conname,		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CK(_name, _cken, _ops)			\</div><div class='del'>-struct clk clk_##_name = {				\</div><div class='del'>-		.ops	= _ops,				\</div><div class='del'>-		.cken	= CKEN_##_cken,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLK(_name, _ops, _rate, _delay)		\</div><div class='del'>-struct clk clk_##_name = {				\</div><div class='del'>-		.ops	= _ops, 			\</div><div class='del'>-		.rate	= _rate,			\</div><div class='del'>-		.delay	= _delay,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay)	\</div><div class='del'>-struct clk clk_##_name = {				\</div><div class='del'>-		.ops	= &amp;clk_pxa2xx_cken_ops,		\</div><div class='del'>-		.rate	= _rate,			\</div><div class='del'>-		.cken	= CKEN_##_cken,			\</div><div class='del'>-		.delay	= _delay,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-extern const struct clkops clk_pxa2xx_cken_ops;</div><div class='del'>-</div><div class='del'>-void clk_pxa2xx_cken_enable(struct clk *clk);</div><div class='del'>-void clk_pxa2xx_cken_disable(struct clk *clk);</div><div class='del'>-</div><div class='del'>-extern struct syscore_ops pxa2xx_clock_syscore_ops;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PXA3xx)</div><div class='del'>-#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)	\</div><div class='del'>-struct clk clk_##_name = {				\</div><div class='del'>-		.ops	= &amp;clk_pxa3xx_cken_ops,		\</div><div class='del'>-		.rate	= _rate,			\</div><div class='del'>-		.cken	= CKEN_##_cken,			\</div><div class='del'>-		.delay	= _delay,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-extern const struct clkops clk_pxa3xx_cken_ops;</div><div class='del'>-extern const struct clkops clk_pxa3xx_hsio_ops;</div><div class='del'>-extern const struct clkops clk_pxa3xx_ac97_ops;</div><div class='del'>-extern const struct clkops clk_pxa3xx_pout_ops;</div><div class='del'>-extern const struct clkops clk_pxa3xx_smemc_ops;</div><div class='del'>-</div><div class='del'>-extern void clk_pxa3xx_cken_enable(struct clk *);</div><div class='del'>-extern void clk_pxa3xx_cken_disable(struct clk *);</div><div class='del'>-</div><div class='del'>-extern struct syscore_ops pxa3xx_clock_syscore_ops;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c<br/>index bb99f59a36d8..a17a91eb8e9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x2xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/cm-x2xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x2xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/cm-x2xx.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dm9000.h&gt;</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='hunk'>@@ -466,6 +467,8 @@ static void __init cmx2xx_init(void)</div><div class='ctx'> 	cmx2xx_init_ac97();</div><div class='ctx'> 	cmx2xx_init_touchscreen();</div><div class='ctx'> 	cmx2xx_init_leds();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init cmx2xx_init_irq(void)</div><div class='head'>diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c<br/>index 4d3588d26c2a..5851f4c254c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x300.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/cm-x300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/cm-x300.c</a></div><div class='hunk'>@@ -835,6 +835,8 @@ static void __init cm_x300_init(void)</div><div class='ctx'> 	cm_x300_init_ac97();</div><div class='ctx'> 	cm_x300_init_wi2wi();</div><div class='ctx'> 	cm_x300_init_bl();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init cm_x300_fixup(struct tag *tags, char **cmdline)</div><div class='head'>diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c<br/>index 5f9d9303b346..3503826333c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/colibri-pxa270.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/colibri-pxa270.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/colibri-pxa270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/colibri-pxa270.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/ucb1400.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -294,6 +295,8 @@ static void __init colibri_pxa270_init(void)</div><div class='ctx'> 		printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n",</div><div class='ctx'> 				colibri_pxa270_baseboard);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either</div><div class='head'>diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c<br/>index 51531ecffca8..9d7072b04045 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/em-x270.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/em-x270.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/em-x270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/em-x270.c</a></div><div class='hunk'>@@ -1306,6 +1306,8 @@ static void __init em_x270_init(void)</div><div class='ctx'> 	em_x270_init_i2c();</div><div class='ctx'> 	em_x270_init_camera();</div><div class='ctx'> 	em_x270_userspace_consumers_init();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(EM_X270, "Compulab EM-X270")</div><div class='head'>diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c<br/>index cfb864173ce3..16dc95f68125 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/eseries.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/eseries.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/eseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/eseries.c</a></div><div class='hunk'>@@ -10,8 +10,10 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -39,7 +41,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "devices.h"</div><div class='ctx'> #include "generic.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> /* Only e800 has 128MB RAM */</div><div class='ctx'> void __init eseries_fixup(struct tag *tags, char **cmdline)</div><div class='hunk'>@@ -125,27 +126,9 @@ struct resource eseries_tmio_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Some e-series hardware cannot control the 32K clock */</div><div class='del'>-static void clk_32k_dummy(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_32k_dummy_ops = {</div><div class='del'>-	.enable         = clk_32k_dummy,</div><div class='del'>-	.disable        = clk_32k_dummy,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk tmio_dummy_clk = {</div><div class='del'>-	.ops	= &amp;clk_32k_dummy_ops,</div><div class='del'>-	.rate	= 32768,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk_lookup eseries_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;tmio_dummy_clk, NULL, "CLK_CK32K"),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init eseries_register_clks(void)</div><div class='ctx'> {</div><div class='del'>-	clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));</div><div class='add'>+	clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, CLK_IS_ROOT, 32768);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MACH_E330</div><div class='hunk'>@@ -683,7 +666,7 @@ static unsigned long e750_pin_config[] __initdata = {</div><div class='ctx'> 	/* PC Card */</div><div class='ctx'> 	GPIO8_GPIO,   /* CD0 */</div><div class='ctx'> 	GPIO44_GPIO,  /* CD1 */</div><div class='del'>-	GPIO11_GPIO,  /* IRQ0 */</div><div class='add'>+	/* GPIO11_GPIO,  IRQ0 */</div><div class='ctx'> 	GPIO6_GPIO,   /* IRQ1 */</div><div class='ctx'> 	GPIO27_GPIO,  /* RST0 */</div><div class='ctx'> 	GPIO24_GPIO,  /* RST1 */</div><div class='hunk'>@@ -778,6 +761,9 @@ static unsigned long e800_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO29_AC97_SDATA_IN_0,</div><div class='ctx'> 	GPIO30_AC97_SDATA_OUT,</div><div class='ctx'> 	GPIO31_AC97_SYNC,</div><div class='add'>+</div><div class='add'>+	/* tc6393xb */</div><div class='add'>+	GPIO11_3_6MHz,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct w100_gen_regs e800_lcd_regs = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c<br/>index 04b013fbc98f..ec510ecf8370 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/generic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/generic.c</a></div><div class='hunk'>@@ -63,6 +63,12 @@ EXPORT_SYMBOL(get_clock_tick_rate);</div><div class='ctx'>  */</div><div class='ctx'> void __init pxa_timer_init(void)</div><div class='ctx'> {</div><div class='add'>+	if (cpu_is_pxa25x())</div><div class='add'>+		pxa25x_clocks_init();</div><div class='add'>+	if (cpu_is_pxa27x())</div><div class='add'>+		pxa27x_clocks_init();</div><div class='add'>+	if (cpu_is_pxa3xx())</div><div class='add'>+		pxa3xx_clocks_init();</div><div class='ctx'> 	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),</div><div class='ctx'> 			    get_clock_tick_rate());</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h<br/>index 7a9fa1aa4e41..0b1dbb54871a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/generic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/generic.h</a></div><div class='hunk'>@@ -26,17 +26,20 @@ extern void pxa_timer_init(void);</div><div class='ctx'> #define ARRAY_AND_SIZE(x)	(x), ARRAY_SIZE(x)</div><div class='ctx'> </div><div class='ctx'> #define pxa25x_handle_irq icip_handle_irq</div><div class='add'>+extern int __init pxa25x_clocks_init(void);</div><div class='ctx'> extern void __init pxa25x_init_irq(void);</div><div class='ctx'> extern void __init pxa25x_map_io(void);</div><div class='ctx'> extern void __init pxa26x_init_irq(void);</div><div class='ctx'> </div><div class='ctx'> #define pxa27x_handle_irq ichp_handle_irq</div><div class='add'>+extern int __init pxa27x_clocks_init(void);</div><div class='ctx'> extern void __init pxa27x_dt_init_irq(void);</div><div class='ctx'> extern unsigned	pxa27x_get_clk_frequency_khz(int);</div><div class='ctx'> extern void __init pxa27x_init_irq(void);</div><div class='ctx'> extern void __init pxa27x_map_io(void);</div><div class='ctx'> </div><div class='ctx'> #define pxa3xx_handle_irq ichp_handle_irq</div><div class='add'>+extern int __init pxa3xx_clocks_init(void);</div><div class='ctx'> extern void __init pxa3xx_dt_init_irq(void);</div><div class='ctx'> extern void __init pxa3xx_init_irq(void);</div><div class='ctx'> extern void __init pxa3xx_map_io(void);</div><div class='head'>diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c<br/>index c98511c5abd1..9b0eb0252af6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/icontrol.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/icontrol.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/icontrol.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/icontrol.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/spi/pxa2xx_spi.h&gt;</div><div class='ctx'> #include &lt;linux/can/platform/mcp251x.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> </div><div class='hunk'>@@ -185,6 +186,8 @@ static void __init icontrol_init(void)</div><div class='ctx'> 	mxm_8x10_mmc_init();</div><div class='ctx'> </div><div class='ctx'> 	icontrol_can_init();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")</div><div class='head'>diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c<br/>index 89a7c06570d3..98608c5575cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/irq.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ static int pxa_irq_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops pxa_irq_ops = {</div><div class='add'>+static const struct irq_domain_ops pxa_irq_ops = {</div><div class='ctx'> 	.map    = pxa_irq_map,</div><div class='ctx'> 	.xlate  = irq_domain_xlate_onecell,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c<br/>index 4ac9ab80d24b..6de32fa0e251 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/lubbock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/lubbock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/lubbock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/lubbock.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'>  *  it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  *  published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -57,7 +58,6 @@</div><div class='ctx'> #include &lt;mach/smemc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> #include "devices.h"</div><div class='ctx'> </div><div class='ctx'> static unsigned long lubbock_pin_config[] __initdata = {</div><div class='hunk'>@@ -102,6 +102,9 @@ static unsigned long lubbock_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO6_MMC_CLK,</div><div class='ctx'> 	GPIO8_MMC_CS0,</div><div class='ctx'> </div><div class='add'>+	/* SA1111 chip */</div><div class='add'>+	GPIO11_3_6MHz,</div><div class='add'>+</div><div class='ctx'> 	/* wakeup */</div><div class='ctx'> 	GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c<br/>index 854f1f562d6b..14f6aaf8fcc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/mp900.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/mp900.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/mp900.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/mp900.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> static void isp116x_pfm_delay(struct device *dev, int delay)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='del'>-	/* 400Mhz PXA2 = 2.5ns / instruction */</div><div class='add'>+	/* 400MHz PXA2 = 2.5ns / instruction */</div><div class='ctx'> </div><div class='ctx'> 	int cyc = delay / 10;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c<br/>index 66e4a2b6316e..23a90c62ec11 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa25x.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/pxa25x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa25x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa25x.c</a></div><div class='hunk'>@@ -38,187 +38,11 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Various clock factors driven by the CCCR register.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* Crystal Frequency to Memory Frequency Multiplier (L) */</div><div class='del'>-static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };</div><div class='del'>-</div><div class='del'>-/* Memory Frequency to Run Mode Frequency Multiplier (M) */</div><div class='del'>-static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };</div><div class='del'>-</div><div class='del'>-/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */</div><div class='del'>-/* Note: we store the value N * 2 here. */</div><div class='del'>-static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };</div><div class='del'>-</div><div class='del'>-/* Crystal clock */</div><div class='del'>-#define BASE_CLK	3686400</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the clock frequency as reflected by CCCR and the turbo flag.</div><div class='del'>- * We assume these values have been applied via a fcs.</div><div class='del'>- * If info is not 0 we also display the current settings.</div><div class='del'>- */</div><div class='del'>-unsigned int pxa25x_get_clk_frequency_khz(int info)</div><div class='del'>-{</div><div class='del'>-	unsigned long cccr, turbo;</div><div class='del'>-	unsigned int l, L, m, M, n2, N;</div><div class='del'>-</div><div class='del'>-	cccr = CCCR;</div><div class='del'>-	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );</div><div class='del'>-</div><div class='del'>-	l  =  L_clk_mult[(cccr &gt;&gt; 0) &amp; 0x1f];</div><div class='del'>-	m  =  M_clk_mult[(cccr &gt;&gt; 5) &amp; 0x03];</div><div class='del'>-	n2 = N2_clk_mult[(cccr &gt;&gt; 7) &amp; 0x07];</div><div class='del'>-</div><div class='del'>-	L = l * BASE_CLK;</div><div class='del'>-	M = m * L;</div><div class='del'>-	N = n2 * M / 2;</div><div class='del'>-</div><div class='del'>-	if(info)</div><div class='del'>-	{</div><div class='del'>-		L += 5000;</div><div class='del'>-		printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",</div><div class='del'>-			L / 1000000, (L % 1000000) / 10000, l );</div><div class='del'>-		M += 5000;</div><div class='del'>-		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",</div><div class='del'>-			M / 1000000, (M % 1000000) / 10000, m );</div><div class='del'>-		N += 5000;</div><div class='del'>-		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",</div><div class='del'>-			N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,</div><div class='del'>-			(turbo &amp; 1) ? "" : "in" );</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return (turbo &amp; 1) ? (N/1000) : (M/1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return L_clk_mult[(CCCR &gt;&gt; 0) &amp; 0x1f] * BASE_CLK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa25x_mem_ops = {</div><div class='del'>-	.enable		= clk_dummy_enable,</div><div class='del'>-	.disable	= clk_dummy_disable,</div><div class='del'>-	.getrate	= clk_pxa25x_mem_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa25x_lcd_ops = {</div><div class='del'>-	.enable		= clk_pxa2xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa2xx_cken_disable,</div><div class='del'>-	.getrate	= clk_pxa25x_mem_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long gpio12_config_32k[] = {</div><div class='del'>-	GPIO12_32KHz,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long gpio12_config_gpio[] = {</div><div class='del'>-	GPIO12_GPIO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void clk_gpio12_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	pxa2xx_mfp_config(gpio12_config_32k, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_gpio12_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	pxa2xx_mfp_config(gpio12_config_gpio, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa25x_gpio12_ops = {</div><div class='del'>-	.enable         = clk_gpio12_enable,</div><div class='del'>-	.disable        = clk_gpio12_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long gpio11_config_3m6[] = {</div><div class='del'>-	GPIO11_3_6MHz,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long gpio11_config_gpio[] = {</div><div class='del'>-	GPIO11_GPIO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void clk_gpio11_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	pxa2xx_mfp_config(gpio11_config_3m6, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_gpio11_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	pxa2xx_mfp_config(gpio11_config_gpio, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa25x_gpio11_ops = {</div><div class='del'>-	.enable         = clk_gpio11_enable,</div><div class='del'>-	.disable        = clk_gpio11_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 3.6864MHz -&gt; OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)</div><div class='del'>- * 95.842MHz -&gt; MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz</div><div class='del'>- * 147.456MHz -&gt; UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PXA 2xx clock declarations.</div><div class='del'>- */</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_btuart, BTUART, 14745600, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_stuart, STUART, 14745600, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_usb, USB, 47923000, 5);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_mmc, MMC, 19169000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_i2c, I2C, 31949000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_ssp, SSP, 3686400, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_nssp, NSSP, 3686400, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_assp, ASSP, 3686400, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_ac97, AC97, 24576000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_i2s, I2S, 14745600, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);</div><div class='del'>-</div><div class='del'>-static DEFINE_CK(pxa25x_lcd, LCD, &amp;clk_pxa25x_lcd_ops);</div><div class='del'>-static DEFINE_CLK(pxa25x_gpio11, &amp;clk_pxa25x_gpio11_ops, 3686400, 0);</div><div class='del'>-static DEFINE_CLK(pxa25x_gpio12, &amp;clk_pxa25x_gpio12_ops, 32768, 0);</div><div class='del'>-static DEFINE_CLK(pxa25x_mem, &amp;clk_pxa25x_mem_ops, 0, 0);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa25x_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_lcd, "pxa2xx-fb", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_usb, "pxa25x-udc", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_assp, "pxa25x-nssp.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_i2s, "pxa2xx-i2s", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_ac97, NULL, "AC97CLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),</div><div class='del'>-#ifdef CONFIG_CPU_PXA26x</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "pxa26x-gpio", NULL),</div><div class='del'>-#else</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "pxa25x-gpio", NULL),</div><div class='del'>-#endif</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "sa1100-rtc", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa25x_hwuart_clkreg =</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> </div><div class='ctx'> #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x</div><div class='hunk'>@@ -374,8 +198,6 @@ static int __init pxa25x_init(void)</div><div class='ctx'> </div><div class='ctx'> 		reset_status = RCSR;</div><div class='ctx'> </div><div class='del'>-		clkdev_add_table(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));</div><div class='del'>-</div><div class='ctx'> 		if ((ret = pxa_init_dma(IRQ_DMA, 16)))</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -383,7 +205,6 @@ static int __init pxa25x_init(void)</div><div class='ctx'> </div><div class='ctx'> 		register_syscore_ops(&amp;pxa_irq_syscore_ops);</div><div class='ctx'> 		register_syscore_ops(&amp;pxa2xx_mfp_syscore_ops);</div><div class='del'>-		register_syscore_ops(&amp;pxa2xx_clock_syscore_ops);</div><div class='ctx'> </div><div class='ctx'> 		pxa_register_device(&amp;pxa25x_device_gpio, &amp;pxa25x_gpio_info);</div><div class='ctx'> 		ret = platform_add_devices(pxa25x_devices,</div><div class='hunk'>@@ -392,10 +213,6 @@ static int __init pxa25x_init(void)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */</div><div class='del'>-	if (cpu_is_pxa255())</div><div class='del'>-		clkdev_add(&amp;pxa25x_hwuart_clkreg);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c<br/>index af423a48c2e3..b5abdeb5bb2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa27x.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/pxa27x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa27x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa27x.c</a></div><div class='hunk'>@@ -37,7 +37,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> </div><div class='ctx'> void pxa27x_clear_otgph(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -73,174 +74,6 @@ void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);</div><div class='ctx'> </div><div class='del'>-/* Crystal clock: 13MHz */</div><div class='del'>-#define BASE_CLK	13000000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the clock frequency as reflected by CCSR and the turbo flag.</div><div class='del'>- * We assume these values have been applied via a fcs.</div><div class='del'>- * If info is not 0 we also display the current settings.</div><div class='del'>- */</div><div class='del'>-unsigned int pxa27x_get_clk_frequency_khz(int info)</div><div class='del'>-{</div><div class='del'>-	unsigned long ccsr, clkcfg;</div><div class='del'>-	unsigned int l, L, m, M, n2, N, S;</div><div class='del'>-       	int cccr_a, t, ht, b;</div><div class='del'>-</div><div class='del'>-	ccsr = CCSR;</div><div class='del'>-	cccr_a = CCCR &amp; (1 &lt;&lt; 25);</div><div class='del'>-</div><div class='del'>-	/* Read clkcfg register: it has turbo, b, half-turbo (and f) */</div><div class='del'>-	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );</div><div class='del'>-	t  = clkcfg &amp; (1 &lt;&lt; 0);</div><div class='del'>-	ht = clkcfg &amp; (1 &lt;&lt; 2);</div><div class='del'>-	b  = clkcfg &amp; (1 &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	l  = ccsr &amp; 0x1f;</div><div class='del'>-	n2 = (ccsr&gt;&gt;7) &amp; 0xf;</div><div class='del'>-	m  = (l &lt;= 10) ? 1 : (l &lt;= 20) ? 2 : 4;</div><div class='del'>-</div><div class='del'>-	L  = l * BASE_CLK;</div><div class='del'>-	N  = (L * n2) / 2;</div><div class='del'>-	M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));</div><div class='del'>-	S  = (b) ? L : (L/2);</div><div class='del'>-</div><div class='del'>-	if (info) {</div><div class='del'>-		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",</div><div class='del'>-			L / 1000000, (L % 1000000) / 10000, l );</div><div class='del'>-		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",</div><div class='del'>-			N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,</div><div class='del'>-			(t) ? "" : "in" );</div><div class='del'>-		printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",</div><div class='del'>-			M / 1000000, (M % 1000000) / 10000, m );</div><div class='del'>-		printk( KERN_INFO "System bus clock: %d.%02dMHz \n",</div><div class='del'>-			S / 1000000, (S % 1000000) / 10000 );</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return (t) ? (N/1000) : (L/1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the current mem clock frequency as reflected by CCCR[A], B, and L</div><div class='del'>- */</div><div class='del'>-static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long ccsr, clkcfg;</div><div class='del'>-	unsigned int l, L, m, M;</div><div class='del'>-       	int cccr_a, b;</div><div class='del'>-</div><div class='del'>-	ccsr = CCSR;</div><div class='del'>-	cccr_a = CCCR &amp; (1 &lt;&lt; 25);</div><div class='del'>-</div><div class='del'>-	/* Read clkcfg register: it has turbo, b, half-turbo (and f) */</div><div class='del'>-	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );</div><div class='del'>-	b = clkcfg &amp; (1 &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	l = ccsr &amp; 0x1f;</div><div class='del'>-	m = (l &lt;= 10) ? 1 : (l &lt;= 20) ? 2 : 4;</div><div class='del'>-</div><div class='del'>-	L = l * BASE_CLK;</div><div class='del'>-	M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));</div><div class='del'>-</div><div class='del'>-	return M;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa27x_mem_ops = {</div><div class='del'>-	.enable		= clk_dummy_enable,</div><div class='del'>-	.disable	= clk_dummy_disable,</div><div class='del'>-	.getrate	= clk_pxa27x_mem_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the current LCD clock frequency in units of 10kHz as</div><div class='del'>- */</div><div class='del'>-static unsigned int pxa27x_get_lcdclk_frequency_10khz(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long ccsr;</div><div class='del'>-	unsigned int l, L, k, K;</div><div class='del'>-</div><div class='del'>-	ccsr = CCSR;</div><div class='del'>-</div><div class='del'>-	l = ccsr &amp; 0x1f;</div><div class='del'>-	k = (l &lt;= 7) ? 1 : (l &lt;= 16) ? 2 : 4;</div><div class='del'>-</div><div class='del'>-	L = l * BASE_CLK;</div><div class='del'>-	K = L / k;</div><div class='del'>-</div><div class='del'>-	return (K / 10000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return pxa27x_get_lcdclk_frequency_10khz() * 10000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clkops clk_pxa27x_lcd_ops = {</div><div class='del'>-	.enable		= clk_pxa2xx_cken_enable,</div><div class='del'>-	.disable	= clk_pxa2xx_cken_disable,</div><div class='del'>-	.getrate	= clk_pxa27x_lcd_getrate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0);</div><div class='del'>-static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);</div><div class='del'>-</div><div class='del'>-static DEFINE_CK(pxa27x_lcd, LCD, &amp;clk_pxa27x_lcd_ops);</div><div class='del'>-static DEFINE_CK(pxa27x_camera, CAMERA, &amp;clk_pxa27x_lcd_ops);</div><div class='del'>-static DEFINE_CLK(pxa27x_mem, &amp;clk_pxa27x_mem_ops, 0, 0);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa27x_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_lcd, "pxa2xx-fb", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_camera, "pxa27x-camera.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_i2s, "pxa2xx-i2s", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_usb, "pxa27x-udc", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_usbhost, "pxa27x-ohci", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_keypad, "pxa27x-keypad", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ac97, NULL, "AC97CLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_msl, NULL, "MSLCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_usim, NULL, "USIMCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_memstk, NULL, "MSTKCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_im, NULL, "IMCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_memc, NULL, "MEMCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "pxa27x-gpio", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "sa1100-rtc", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> </div><div class='ctx'> #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x</div><div class='hunk'>@@ -466,8 +299,6 @@ static int __init pxa27x_init(void)</div><div class='ctx'> </div><div class='ctx'> 		reset_status = RCSR;</div><div class='ctx'> </div><div class='del'>-		clkdev_add_table(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));</div><div class='del'>-</div><div class='ctx'> 		if ((ret = pxa_init_dma(IRQ_DMA, 32)))</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -475,10 +306,13 @@ static int __init pxa27x_init(void)</div><div class='ctx'> </div><div class='ctx'> 		register_syscore_ops(&amp;pxa_irq_syscore_ops);</div><div class='ctx'> 		register_syscore_ops(&amp;pxa2xx_mfp_syscore_ops);</div><div class='del'>-		register_syscore_ops(&amp;pxa2xx_clock_syscore_ops);</div><div class='ctx'> </div><div class='del'>-		pxa_register_device(&amp;pxa27x_device_gpio, &amp;pxa27x_gpio_info);</div><div class='del'>-		ret = platform_add_devices(devices, ARRAY_SIZE(devices));</div><div class='add'>+		if (!of_have_populated_dt()) {</div><div class='add'>+			pxa_register_device(&amp;pxa27x_device_gpio,</div><div class='add'>+					    &amp;pxa27x_gpio_info);</div><div class='add'>+			ret = platform_add_devices(devices,</div><div class='add'>+						   ARRAY_SIZE(devices));</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c<br/>index 17cbc0c7bdb8..28c5b5686638 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa300.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/pxa300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa300.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> static struct mfp_addr_map pxa300_mfp_addr_map[] __initdata = {</div><div class='ctx'> </div><div class='hunk'>@@ -84,32 +83,15 @@ static struct mfp_addr_map pxa310_mfp_addr_map[] __initdata = {</div><div class='ctx'> 	MFP_ADDR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup common_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_common_nand, "pxa3xx-nand", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_gcu, "pxa3xx-gcu", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa310_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa310_mmc3, "pxa2xx-mci.2", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __init pxa300_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu_is_pxa300() || cpu_is_pxa310()) {</div><div class='ctx'> 		mfp_init_base(io_p2v(MFPR_BASE));</div><div class='ctx'> 		mfp_init_addr(pxa300_mfp_addr_map);</div><div class='del'>-		clkdev_add_table(ARRAY_AND_SIZE(common_clkregs));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_pxa310()) {</div><div class='add'>+	if (cpu_is_pxa310())</div><div class='ctx'> 		mfp_init_addr(pxa310_mfp_addr_map);</div><div class='del'>-		clkdev_add_table(ARRAY_AND_SIZE(pxa310_clkregs));</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c<br/>index 6dc99d4f2dc6..2f55bb4b9087 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa320.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/pxa320.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa320.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {</div><div class='ctx'> </div><div class='hunk'>@@ -78,20 +77,11 @@ static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {</div><div class='ctx'> 	MFP_ADDR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa320_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa320_nand, "pxa3xx-nand", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_gcu, "pxa3xx-gcu", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __init pxa320_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu_is_pxa320()) {</div><div class='ctx'> 		mfp_init_base(io_p2v(MFPR_BASE));</div><div class='ctx'> 		mfp_init_addr(pxa320_mfp_addr_map);</div><div class='del'>-		clkdev_add_table(ARRAY_AND_SIZE(pxa320_clkregs));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c<br/>index edcbd9c0bcb2..bd4cbef15ccf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa3xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/pxa3xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pxa3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/pxa3xx.c</a></div><div class='hunk'>@@ -37,67 +37,11 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> #define PECR_IE(n)	((1 &lt;&lt; ((n) * 2)) &lt;&lt; 28)</div><div class='ctx'> #define PECR_IS(n)	((1 &lt;&lt; ((n) * 2)) &lt;&lt; 29)</div><div class='ctx'> </div><div class='ctx'> extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));</div><div class='del'>-</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_u2d, USB2, 48000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);</div><div class='del'>-static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);</div><div class='del'>-</div><div class='del'>-static DEFINE_CK(pxa3xx_lcd, LCD, &amp;clk_pxa3xx_hsio_ops);</div><div class='del'>-static DEFINE_CK(pxa3xx_smemc, SMC, &amp;clk_pxa3xx_smemc_ops);</div><div class='del'>-static DEFINE_CK(pxa3xx_camera, CAMERA, &amp;clk_pxa3xx_hsio_ops);</div><div class='del'>-static DEFINE_CK(pxa3xx_ac97, AC97, &amp;clk_pxa3xx_ac97_ops);</div><div class='del'>-static DEFINE_CLK(pxa3xx_pout, &amp;clk_pxa3xx_pout_ops, 13000000, 70);</div><div class='del'>-</div><div class='del'>-static struct clk_lookup pxa3xx_clkregs[] = {</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_pout, NULL, "CLK_POUT"),</div><div class='del'>-	/* Power I2C clock is always on */</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "pxa3xx-pwri2c.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_lcd, "pxa2xx-fb", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_camera, NULL, "CAMCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ac97, NULL, "AC97CLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_udc, "pxa27x-udc", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_usbh, "pxa27x-ohci", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_u2d, "pxa3xx-u2d", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_keypad, "pxa27x-keypad", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ssp1, "pxa3xx-ssp.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ssp2, "pxa3xx-ssp.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ssp3, "pxa3xx-ssp.2", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_ssp4, "pxa3xx-ssp.3", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_gpio, "pxa3xx-gpio", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_pxa3xx_gpio, "pxa93x-gpio", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_dummy, "sa1100-rtc", NULL),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> </div><div class='ctx'> #define ISRAM_START	0x5c000000</div><div class='hunk'>@@ -476,8 +420,6 @@ static int __init pxa3xx_init(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		ASCR &amp;= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);</div><div class='ctx'> </div><div class='del'>-		clkdev_add_table(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));</div><div class='del'>-</div><div class='ctx'> 		if ((ret = pxa_init_dma(IRQ_DMA, 32)))</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -485,7 +427,6 @@ static int __init pxa3xx_init(void)</div><div class='ctx'> </div><div class='ctx'> 		register_syscore_ops(&amp;pxa_irq_syscore_ops);</div><div class='ctx'> 		register_syscore_ops(&amp;pxa3xx_mfp_syscore_ops);</div><div class='del'>-		register_syscore_ops(&amp;pxa3xx_clock_syscore_ops);</div><div class='ctx'> </div><div class='ctx'> 		if (of_have_populated_dt())</div><div class='ctx'> 			return 0;</div><div class='head'>diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c<br/>index 6dc4f025e674..88f70c37ad0d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/raumfeld.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/raumfeld.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/raumfeld.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/raumfeld.c</a></div><div class='hunk'>@@ -56,7 +56,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> #include "devices.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> </div><div class='ctx'> /* common GPIO	definitions */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c<br/>index 7780d1faa06f..e6e27c0468e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/tosa.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/tosa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/tosa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/tosa.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -58,7 +59,6 @@</div><div class='ctx'> #include &lt;asm/mach/sharpsl_param.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='del'>-#include "clock.h"</div><div class='ctx'> #include "devices.h"</div><div class='ctx'> </div><div class='ctx'> static unsigned long tosa_pin_config[] = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c<br/>index 872dcb20e757..066e3a250ee0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/trizeps4.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/trizeps4.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/trizeps4.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/trizeps4.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/dm9000.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/i2c/pxa-i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='hunk'>@@ -534,6 +535,8 @@ static void __init trizeps4_init(void)</div><div class='ctx'> </div><div class='ctx'> 	BCR_writew(trizeps_conxs_bcr);</div><div class='ctx'> 	board_backlight_power(1);</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init trizeps4_map_io(void)</div><div class='head'>diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c<br/>index aa89488f961e..54122a983ae3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/vpac270.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/vpac270.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/vpac270.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/vpac270.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/dm9000.h&gt;</div><div class='ctx'> #include &lt;linux/ucb1400.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/max1586.h&gt;</div><div class='ctx'> #include &lt;linux/i2c/pxa-i2c.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -711,6 +712,8 @@ static void __init vpac270_init(void)</div><div class='ctx'> 	vpac270_ts_init();</div><div class='ctx'> 	vpac270_rtc_init();</div><div class='ctx'> 	vpac270_ide_init();</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(VPAC270, "Voipac PXA270")</div><div class='head'>diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c<br/>index ac2ae5c71ab4..6158566fa0f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/zeus.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-pxa/zeus.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/zeus.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-pxa/zeus.c</a></div><div class='hunk'>@@ -868,6 +868,8 @@ static void __init zeus_init(void)</div><div class='ctx'> 	i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));</div><div class='ctx'> 	pxa2xx_set_spi_info(3, &amp;pxa2xx_spi_ssp3_master_info);</div><div class='ctx'> 	spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct map_desc zeus_io_desc[] __initdata = {</div><div class='head'>diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c<br/>index c309593abdb2..44575edc44b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-realview/core.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-realview/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-realview/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-realview/core.c</a></div><div class='hunk'>@@ -35,20 +35,19 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;clocksource/timer-sp804.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/hardware/arm_timer.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/icst.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #include &lt;mach/platform.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='del'>-#include &lt;asm/hardware/timer-sp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/sched_clock.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -381,10 +380,10 @@ void __init realview_timer_init(unsigned int timer_irq)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialise to a known state (all timers off)</div><div class='ctx'> 	 */</div><div class='del'>-	writel(0, timer0_va_base + TIMER_CTRL);</div><div class='del'>-	writel(0, timer1_va_base + TIMER_CTRL);</div><div class='del'>-	writel(0, timer2_va_base + TIMER_CTRL);</div><div class='del'>-	writel(0, timer3_va_base + TIMER_CTRL);</div><div class='add'>+	sp804_timer_disable(timer0_va_base);</div><div class='add'>+	sp804_timer_disable(timer1_va_base);</div><div class='add'>+	sp804_timer_disable(timer2_va_base);</div><div class='add'>+	sp804_timer_disable(timer3_va_base);</div><div class='ctx'> </div><div class='ctx'> 	sp804_clocksource_init(timer3_va_base, "timer3");</div><div class='ctx'> 	sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");</div><div class='head'>diff --git a/arch/arm/mach-rockchip/core.h b/arch/arm/mach-rockchip/core.h<br/>index 39bca96b555a..492c048813da 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-rockchip/core.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-rockchip/core.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-rockchip/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/core.h</a></div><div class='hunk'>@@ -17,4 +17,3 @@ extern char rockchip_secondary_trampoline;</div><div class='ctx'> extern char rockchip_secondary_trampoline_end;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long rockchip_boot_fn;</div><div class='del'>-extern void rockchip_secondary_startup(void);</div><div class='head'>diff --git a/arch/arm/mach-rockchip/headsmp.S b/arch/arm/mach-rockchip/headsmp.S<br/>index 46c22dedf632..d69708b07282 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-rockchip/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-rockchip/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-rockchip/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/headsmp.S</a></div><div class='hunk'>@@ -15,14 +15,6 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='del'>-ENTRY(rockchip_secondary_startup)</div><div class='del'>-	mrc	p15, 0, r0, c0, c0, 0	@ read main ID register</div><div class='del'>-	ldr	r1, =0x00000c09		@ Cortex-A9 primary part number</div><div class='del'>-	teq	r0, r1</div><div class='del'>-	beq	v7_invalidate_l1</div><div class='del'>-	b	secondary_startup</div><div class='del'>-ENDPROC(rockchip_secondary_startup)</div><div class='del'>-</div><div class='ctx'> ENTRY(rockchip_secondary_trampoline)</div><div class='ctx'> 	ldr	pc, 1f</div><div class='ctx'> ENDPROC(rockchip_secondary_trampoline)</div><div class='head'>diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c<br/>index 5b4ca3c3c879..8fcec1cc101e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-rockchip/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-rockchip/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-rockchip/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-rockchip/platsmp.c</a></div><div class='hunk'>@@ -119,8 +119,7 @@ static int pmu_set_power_domain(int pd, bool on)</div><div class='ctx'>  * Handling of CPU cores</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int __cpuinit rockchip_boot_secondary(unsigned int cpu,</div><div class='del'>-					     struct task_struct *idle)</div><div class='add'>+static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -149,8 +148,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu,</div><div class='ctx'> 		 * sram_base_addr + 8: start address for pc</div><div class='ctx'> 		 * */</div><div class='ctx'> 		udelay(10);</div><div class='del'>-		writel(virt_to_phys(rockchip_secondary_startup),</div><div class='del'>-			sram_base_addr + 8);</div><div class='add'>+		writel(virt_to_phys(secondary_startup), sram_base_addr + 8);</div><div class='ctx'> 		writel(0xDEADBEAF, sram_base_addr + 4);</div><div class='ctx'> 		dsb_sev();</div><div class='ctx'> 	}</div><div class='hunk'>@@ -189,7 +187,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set the boot function for the sram code */</div><div class='del'>-	rockchip_boot_fn = virt_to_phys(rockchip_secondary_startup);</div><div class='add'>+	rockchip_boot_fn = virt_to_phys(secondary_startup);</div><div class='ctx'> </div><div class='ctx'> 	/* copy the trampoline to sram, that runs during startup of the core */</div><div class='ctx'> 	memcpy(sram_base_addr, &amp;rockchip_secondary_trampoline, trampoline_sz);</div><div class='head'>diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile<br/>index 61ff91e76e0a..ebc4d58e1a32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sa1100/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # Common support</div><div class='del'>-obj-y := clock.o generic.o irq.o #nmi-oopser.o</div><div class='add'>+obj-y := clock.o generic.o #nmi-oopser.o</div><div class='ctx'> </div><div class='ctx'> # Specific board support</div><div class='ctx'> obj-$(CONFIG_SA1100_ASSABET)		+= assabet.o</div><div class='head'>diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c<br/>index 40e0d8619a2d..345e63f4eb71 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sa1100/generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/generic.c</a></div><div class='hunk'>@@ -20,9 +20,12 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/irq-sa11x0.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;video/sa1100fb.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;soc/sa1100/pwer.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;asm/mach/flash.h&gt;</div><div class='hunk'>@@ -375,6 +378,18 @@ void __init sa1100_timer_init(void)</div><div class='ctx'> 	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000), 3686400);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct resource irq_resource =</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");</div><div class='add'>+</div><div class='add'>+void __init sa1100_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	request_resource(&amp;iomem_resource, &amp;irq_resource);</div><div class='add'>+</div><div class='add'>+	sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);</div><div class='add'>+</div><div class='add'>+	sa1100_init_gpio();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Disable the memory bus request/grant signals on the SA1110 to</div><div class='ctx'>  * ensure that we don't receive spurious memory requests.  We set</div><div class='hunk'>@@ -416,3 +431,25 @@ void sa1110_mb_enable(void)</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on)</div><div class='add'>+{</div><div class='add'>+	if (on)</div><div class='add'>+		PWER |= BIT(gpio);</div><div class='add'>+	else</div><div class='add'>+		PWER &amp;= ~BIT(gpio);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sa11x0_sc_set_wake(unsigned int irq, unsigned int on)</div><div class='add'>+{</div><div class='add'>+	if (BIT(irq) != IC_RTCAlrm)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		PWER |= PWER_RTC;</div><div class='add'>+	else</div><div class='add'>+		PWER &amp;= ~PWER_RTC;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c<br/>index af868d258e66..99d9a3b1bf34 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/neponset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sa1100/neponset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/neponset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sa1100/neponset.c</a></div><div class='hunk'>@@ -327,8 +327,7 @@ static int neponset_probe(struct platform_device *dev)</div><div class='ctx'> 	irq_set_chip(d-&gt;irq_base + NEP_IRQ_SA1111, &amp;nochip);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);</div><div class='del'>-	irq_set_handler_data(irq, d);</div><div class='del'>-	irq_set_chained_handler(irq, neponset_irq_handler);</div><div class='add'>+	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately</div><div class='head'>diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig<br/>index 0fb484221c90..45006479d461 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/Kconfig</a></div><div class='hunk'>@@ -139,7 +139,7 @@ config MACH_ARMADILLO800EVA</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select REGULATOR_FIXED_VOLTAGE if REGULATOR</div><div class='ctx'> 	select SMSC_PHY if SH_ETH</div><div class='del'>-	select SND_SOC_WM8978 if SND_SIMPLE_CARD</div><div class='add'>+	select SND_SOC_WM8978 if SND_SIMPLE_CARD &amp;&amp; I2C</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> </div><div class='ctx'> config MACH_BOCKW</div><div class='hunk'>@@ -148,7 +148,7 @@ config MACH_BOCKW</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select REGULATOR_FIXED_VOLTAGE if REGULATOR</div><div class='ctx'> 	select SND_SOC_AK4554 if SND_SIMPLE_CARD</div><div class='del'>-	select SND_SOC_AK4642 if SND_SIMPLE_CARD</div><div class='add'>+	select SND_SOC_AK4642 if SND_SIMPLE_CARD &amp;&amp; I2C</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> </div><div class='ctx'> config MACH_BOCKW_REFERENCE</div><div class='head'>diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h<br/>index afc60bad6fd6..476092b86c6e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/common.h</a></div><div class='hunk'>@@ -14,7 +14,6 @@ extern void shmobile_smp_sleep(void);</div><div class='ctx'> extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,</div><div class='ctx'> 			      unsigned long arg);</div><div class='ctx'> extern int shmobile_smp_cpu_disable(unsigned int cpu);</div><div class='del'>-extern void shmobile_invalidate_start(void);</div><div class='ctx'> extern void shmobile_boot_scu(void);</div><div class='ctx'> extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);</div><div class='ctx'> extern void shmobile_smp_scu_cpu_die(unsigned int cpu);</div><div class='head'>diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S<br/>index 69df8bfac167..fa5248c52399 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp-scu.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/headsmp-scu.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp-scu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/headsmp-scu.S</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'>  * Boot code for secondary CPUs.</div><div class='ctx'>  *</div><div class='ctx'>  * First we turn on L1 cache coherency for our CPU. Then we jump to</div><div class='del'>- * shmobile_invalidate_start that invalidates the cache and hands over control</div><div class='add'>+ * secondary_startup that invalidates the cache and hands over control</div><div class='ctx'>  * to the common ARM startup code.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(shmobile_boot_scu)</div><div class='hunk'>@@ -36,7 +36,7 @@ ENTRY(shmobile_boot_scu)</div><div class='ctx'> 	bic	r2, r2, r3		@ Clear bits of our CPU (Run Mode)</div><div class='ctx'> 	str	r2, [r0, #8]		@ write back</div><div class='ctx'> </div><div class='del'>-	b	shmobile_invalidate_start</div><div class='add'>+	b	secondary_startup</div><div class='ctx'> ENDPROC(shmobile_boot_scu)</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='head'>diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S<br/>index 50c491567e11..330c1fc63197 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/headsmp.S</a></div><div class='hunk'>@@ -16,13 +16,6 @@</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-ENTRY(shmobile_invalidate_start)</div><div class='del'>-	bl	v7_invalidate_l1</div><div class='del'>-	b	secondary_startup</div><div class='del'>-ENDPROC(shmobile_invalidate_start)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Reset vector for secondary CPUs.</div><div class='ctx'>  * This will be mapped at address 0 by SBAR register.</div><div class='head'>diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c<br/>index f483b560b066..b0790fc32282 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/platsmp-apmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/platsmp-apmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/platsmp-apmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/platsmp-apmu.c</a></div><div class='hunk'>@@ -133,7 +133,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,</div><div class='ctx'> int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	/* For this particular CPU register boot vector */</div><div class='del'>-	shmobile_smp_hook(cpu, virt_to_phys(shmobile_invalidate_start), 0);</div><div class='add'>+	shmobile_smp_hook(cpu, virt_to_phys(secondary_startup), 0);</div><div class='ctx'> </div><div class='ctx'> 	return apmu_wrap(cpu, apmu_power_on);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c<br/>index 9832e48396a4..00291cc1772d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7740.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-shmobile/setup-r8a7740.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7740.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-shmobile/setup-r8a7740.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -690,56 +689,6 @@ void __init r8a7740_meram_workaround(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ICCR	0x0004</div><div class='del'>-#define ICSTART	0x0070</div><div class='del'>-</div><div class='del'>-#define i2c_read(reg, offset)		ioread8(reg + offset)</div><div class='del'>-#define i2c_write(reg, offset, data)	iowrite8(data, reg + offset)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * r8a7740 chip has lasting errata on I2C I/O pad reset.</div><div class='del'>- * this is work-around for it.</div><div class='del'>- */</div><div class='del'>-static void r8a7740_i2c_workaround(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct resource *res;</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (unlikely(!res)) {</div><div class='del'>-		pr_err("r8a7740 i2c workaround fail (cannot find resource)\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = ioremap(res-&gt;start, resource_size(res));</div><div class='del'>-	if (unlikely(!reg)) {</div><div class='del'>-		pr_err("r8a7740 i2c workaround fail (cannot map IO)\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i2c_write(reg, ICCR, i2c_read(reg, ICCR) | 0x80);</div><div class='del'>-	i2c_read(reg, ICCR); /* dummy read */</div><div class='del'>-</div><div class='del'>-	i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);</div><div class='del'>-	i2c_read(reg, ICSTART); /* dummy read */</div><div class='del'>-</div><div class='del'>-	udelay(10);</div><div class='del'>-</div><div class='del'>-	i2c_write(reg, ICCR, 0x01);</div><div class='del'>-	i2c_write(reg, ICSTART, 0x00);</div><div class='del'>-</div><div class='del'>-	udelay(10);</div><div class='del'>-</div><div class='del'>-	i2c_write(reg, ICCR, 0x10);</div><div class='del'>-	udelay(10);</div><div class='del'>-	i2c_write(reg, ICCR, 0x00);</div><div class='del'>-	udelay(10);</div><div class='del'>-	i2c_write(reg, ICCR, 0x10);</div><div class='del'>-	udelay(10);</div><div class='del'>-</div><div class='del'>-	iounmap(reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init r8a7740_add_standard_devices(void)</div><div class='ctx'> {</div><div class='ctx'> 	static struct pm_domain_device domain_devices[] __initdata = {</div><div class='hunk'>@@ -766,10 +715,6 @@ void __init r8a7740_add_standard_devices(void)</div><div class='ctx'> 		{ "A3SP", &amp;usb_dma_device },</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* I2C work-around */</div><div class='del'>-	r8a7740_i2c_workaround(&amp;i2c0_device);</div><div class='del'>-	r8a7740_i2c_workaround(&amp;i2c1_device);</div><div class='del'>-</div><div class='ctx'> 	r8a7740_init_pm_domains();</div><div class='ctx'> </div><div class='ctx'> 	/* add devices */</div><div class='head'>diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig<br/>index b5f8d75d51a0..90efdeb56be5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/Kconfig</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='del'>-config ARCH_SOCFPGA</div><div class='add'>+menuconfig ARCH_SOCFPGA</div><div class='ctx'> 	bool "Altera SOCFPGA family" if ARCH_MULTI_V7</div><div class='add'>+	select ARCH_SUPPORTS_BIG_ENDIAN</div><div class='ctx'> 	select ARM_AMBA</div><div class='ctx'> 	select ARM_GIC</div><div class='ctx'> 	select CACHE_L2X0</div><div class='hunk'>@@ -8,3 +9,11 @@ config ARCH_SOCFPGA</div><div class='ctx'> 	select HAVE_ARM_SCU</div><div class='ctx'> 	select HAVE_ARM_TWD if SMP</div><div class='ctx'> 	select MFD_SYSCON</div><div class='add'>+</div><div class='add'>+if ARCH_SOCFPGA</div><div class='add'>+config SOCFPGA_SUSPEND</div><div class='add'>+	bool "Suspend to RAM on SOCFPGA"</div><div class='add'>+	help</div><div class='add'>+	  Select this if you want to enable Suspend-to-RAM on SOCFPGA</div><div class='add'>+	  platforms.</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile<br/>index 6dd7a93a90fe..b8f9e238e4ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/Makefile</a></div><div class='hunk'>@@ -4,3 +4,4 @@</div><div class='ctx'> </div><div class='ctx'> obj-y					:= socfpga.o</div><div class='ctx'> obj-$(CONFIG_SMP)	+= headsmp.o platsmp.o</div><div class='add'>+obj-$(CONFIG_SOCFPGA_SUSPEND)	+= pm.o self-refresh.o</div><div class='head'>diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h<br/>index a0f3b1cd497c..7259c3732702 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/core.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/core.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/core.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2012 Pavel Machek &lt;pavel@denx.de&gt;</div><div class='del'>- * Copyright (C) 2012 Altera Corporation</div><div class='add'>+ * Copyright (C) 2012-2015 Altera Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -25,22 +25,24 @@</div><div class='ctx'> #define SOCFPGA_RSTMGR_MODPERRST	0x14</div><div class='ctx'> #define SOCFPGA_RSTMGR_BRGMODRST	0x1c</div><div class='ctx'> </div><div class='add'>+#define SOCFPGA_A10_RSTMGR_MODMPURST	0x20</div><div class='add'>+</div><div class='ctx'> /* System Manager bits */</div><div class='ctx'> #define RSTMGR_CTRL_SWCOLDRSTREQ	0x1	/* Cold Reset */</div><div class='ctx'> #define RSTMGR_CTRL_SWWARMRSTREQ	0x2	/* Warm Reset */</div><div class='ctx'> </div><div class='ctx'> #define RSTMGR_MPUMODRST_CPU1		0x2     /* CPU1 Reset */</div><div class='ctx'> </div><div class='del'>-extern void socfpga_secondary_startup(void);</div><div class='del'>-extern void __iomem *socfpga_scu_base_addr;</div><div class='del'>-</div><div class='ctx'> extern void socfpga_init_clocks(void);</div><div class='ctx'> extern void socfpga_sysmgr_init(void);</div><div class='ctx'> </div><div class='ctx'> extern void __iomem *sys_manager_base_addr;</div><div class='ctx'> extern void __iomem *rst_manager_base_addr;</div><div class='add'>+extern void __iomem *sdr_ctl_base_addr;</div><div class='add'>+</div><div class='add'>+u32 socfpga_sdram_self_refresh(u32 sdr_base);</div><div class='add'>+extern unsigned int socfpga_sdram_self_refresh_sz;</div><div class='ctx'> </div><div class='del'>-extern struct smp_operations socfpga_smp_ops;</div><div class='ctx'> extern char secondary_trampoline, secondary_trampoline_end;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long socfpga_cpu1start_addr;</div><div class='head'>diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S<br/>index f65ea0af4af3..5d94b7a2fb10 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/headsmp.S</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='add'>+#include &lt;asm/assembler.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.arch	armv7-a</div><div class='ctx'> </div><div class='hunk'>@@ -18,20 +19,17 @@ ENTRY(secondary_trampoline)</div><div class='ctx'> 	 * Thus, we can just subtract the PAGE_OFFSET to get the physical</div><div class='ctx'> 	 * address of &amp;cpu1start_addr. This would not work for platforms</div><div class='ctx'> 	 * where the physical memory does not start at 0x0.</div><div class='del'>-	 */</div><div class='add'>+	*/</div><div class='add'>+ARM_BE8(setend	be)</div><div class='ctx'> 	adr	r0, 1f</div><div class='ctx'> 	ldmia	r0, {r1, r2}</div><div class='ctx'> 	sub	r2, r2, #PAGE_OFFSET</div><div class='ctx'> 	ldr	r3, [r2]</div><div class='ctx'> 	ldr	r4, [r3]</div><div class='add'>+ARM_BE8(rev	r4, r4)</div><div class='ctx'> 	bx	r4</div><div class='ctx'> </div><div class='ctx'> 	.align</div><div class='ctx'> 1:	.long	.</div><div class='ctx'> 	.long	socfpga_cpu1start_addr</div><div class='ctx'> ENTRY(secondary_trampoline_end)</div><div class='del'>-</div><div class='del'>-ENTRY(socfpga_secondary_startup)</div><div class='del'>-       bl      v7_invalidate_l1</div><div class='del'>-       b       secondary_startup</div><div class='del'>-ENDPROC(socfpga_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c<br/>index c64d89b7c0ca..c6f1df89f9af 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/platsmp.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> </div><div class='ctx'> 		memcpy(phys_to_virt(0), &amp;secondary_trampoline, trampoline_size);</div><div class='ctx'> </div><div class='del'>-		writel(virt_to_phys(socfpga_secondary_startup),</div><div class='add'>+		writel(virt_to_phys(secondary_startup),</div><div class='ctx'> 		       sys_manager_base_addr + (socfpga_cpu1start_addr &amp; 0x000000ff));</div><div class='ctx'> </div><div class='ctx'> 		flush_cache_all();</div><div class='hunk'>@@ -54,32 +54,43 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Initialise the CPU possible map early - this describes the CPUs</div><div class='del'>- * which may be present or become present in the system.</div><div class='del'>- */</div><div class='del'>-static void __init socfpga_smp_init_cpus(void)</div><div class='add'>+static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i, ncores;</div><div class='add'>+	int trampoline_size = &amp;secondary_trampoline_end - &amp;secondary_trampoline;</div><div class='ctx'> </div><div class='del'>-	ncores = scu_get_core_count(socfpga_scu_base_addr);</div><div class='add'>+	if (socfpga_cpu1start_addr) {</div><div class='add'>+		writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +</div><div class='add'>+		       SOCFPGA_A10_RSTMGR_MODMPURST);</div><div class='add'>+		memcpy(phys_to_virt(0), &amp;secondary_trampoline, trampoline_size);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ncores; i++)</div><div class='del'>-		set_cpu_possible(i, true);</div><div class='add'>+		writel(virt_to_phys(secondary_startup),</div><div class='add'>+		       sys_manager_base_addr + (socfpga_cpu1start_addr &amp; 0x00000fff));</div><div class='ctx'> </div><div class='del'>-	/* sanity check */</div><div class='del'>-	if (ncores &gt; num_possible_cpus()) {</div><div class='del'>-		pr_warn("socfpga: no. of cores (%d) greater than configured"</div><div class='del'>-			"maximum of %d - clipping\n", ncores, num_possible_cpus());</div><div class='del'>-		ncores = num_possible_cpus();</div><div class='add'>+		flush_cache_all();</div><div class='add'>+		smp_wmb();</div><div class='add'>+		outer_clean_range(0, trampoline_size);</div><div class='add'>+</div><div class='add'>+		/* This will release CPU #1 out of reset. */</div><div class='add'>+		writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ncores; i++)</div><div class='del'>-		set_cpu_possible(i, true);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	void __iomem *socfpga_scu_base_addr;</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");</div><div class='add'>+	if (!np) {</div><div class='add'>+		pr_err("%s: missing scu\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	socfpga_scu_base_addr = of_iomap(np, 0);</div><div class='add'>+	if (!socfpga_scu_base_addr)</div><div class='add'>+		return;</div><div class='ctx'> 	scu_enable(socfpga_scu_base_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -95,11 +106,21 @@ static void socfpga_cpu_die(unsigned int cpu)</div><div class='ctx'> 		cpu_do_idle();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct smp_operations socfpga_smp_ops __initdata = {</div><div class='del'>-	.smp_init_cpus		= socfpga_smp_init_cpus,</div><div class='add'>+static struct smp_operations socfpga_smp_ops __initdata = {</div><div class='ctx'> 	.smp_prepare_cpus	= socfpga_smp_prepare_cpus,</div><div class='ctx'> 	.smp_boot_secondary	= socfpga_boot_secondary,</div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='ctx'> 	.cpu_die		= socfpga_cpu_die,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+static struct smp_operations socfpga_a10_smp_ops __initdata = {</div><div class='add'>+	.smp_prepare_cpus	= socfpga_smp_prepare_cpus,</div><div class='add'>+	.smp_boot_secondary	= socfpga_a10_boot_secondary,</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+	.cpu_die		= socfpga_cpu_die,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+CPU_METHOD_OF_DECLARE(socfpga_smp, "altr,socfpga-smp", &amp;socfpga_smp_ops);</div><div class='add'>+CPU_METHOD_OF_DECLARE(socfpga_a10_smp, "altr,socfpga-a10-smp", &amp;socfpga_a10_smp_ops);</div><div class='head'>diff --git a/arch/arm/mach-socfpga/pm.c b/arch/arm/mach-socfpga/pm.c<br/>new file mode 100644<br/>index 000000000000..6a4199f2bffb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/pm.c</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+/*</div><div class='add'>+ *  arch/arm/mach-socfpga/pm.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2015 Altera Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * with code from pm-imx6.c</div><div class='add'>+ * Copyright 2011-2014 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2011 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/genalloc.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;asm/suspend.h&gt;</div><div class='add'>+#include &lt;asm/fncpy.h&gt;</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+/* Pointer to function copied to ocram */</div><div class='add'>+static u32 (*socfpga_sdram_self_refresh_in_ocram)(u32 sdr_base);</div><div class='add'>+</div><div class='add'>+static int socfpga_setup_ocram_self_refresh(void)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	phys_addr_t ocram_pbase;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct gen_pool *ocram_pool;</div><div class='add'>+	unsigned long ocram_base;</div><div class='add'>+	void __iomem *suspend_ocram_base;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "mmio-sram");</div><div class='add'>+	if (!np) {</div><div class='add'>+		pr_err("%s: Unable to find mmio-sram in dtb\n", __func__);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(np);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pr_warn("%s: failed to find ocram device!\n", __func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocram_pool = gen_pool_get(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!ocram_pool) {</div><div class='add'>+		pr_warn("%s: ocram pool unavailable!\n", __func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);</div><div class='add'>+	if (!ocram_base) {</div><div class='add'>+		pr_warn("%s: unable to alloc ocram!\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);</div><div class='add'>+</div><div class='add'>+	suspend_ocram_base = __arm_ioremap_exec(ocram_pbase,</div><div class='add'>+						socfpga_sdram_self_refresh_sz,</div><div class='add'>+						false);</div><div class='add'>+	if (!suspend_ocram_base) {</div><div class='add'>+		pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy the code that puts DDR in self refresh to ocram */</div><div class='add'>+	socfpga_sdram_self_refresh_in_ocram =</div><div class='add'>+		(void *)fncpy(suspend_ocram_base,</div><div class='add'>+			      &amp;socfpga_sdram_self_refresh,</div><div class='add'>+			      socfpga_sdram_self_refresh_sz);</div><div class='add'>+</div><div class='add'>+	WARN(!socfpga_sdram_self_refresh_in_ocram,</div><div class='add'>+	     "could not copy function to ocram");</div><div class='add'>+	if (!socfpga_sdram_self_refresh_in_ocram)</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+</div><div class='add'>+put_node:</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int socfpga_pm_suspend(unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	u32 ret;</div><div class='add'>+</div><div class='add'>+	if (!sdr_ctl_base_addr)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	ret = socfpga_sdram_self_refresh_in_ocram((u32)sdr_ctl_base_addr);</div><div class='add'>+</div><div class='add'>+	pr_debug("%s self-refresh loops request=%d exit=%d\n", __func__,</div><div class='add'>+		 ret &amp; 0xffff, (ret &gt;&gt; 16) &amp; 0xffff);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int socfpga_pm_enter(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case PM_SUSPEND_STANDBY:</div><div class='add'>+	case PM_SUSPEND_MEM:</div><div class='add'>+		outer_disable();</div><div class='add'>+		cpu_suspend(0, socfpga_pm_suspend);</div><div class='add'>+		outer_resume();</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct platform_suspend_ops socfpga_pm_ops = {</div><div class='add'>+	.valid	= suspend_valid_only_mem,</div><div class='add'>+	.enter	= socfpga_pm_enter,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init socfpga_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = socfpga_setup_ocram_self_refresh();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	suspend_set_ops(&amp;socfpga_pm_ops);</div><div class='add'>+	pr_info("SoCFPGA initialized for DDR self-refresh during suspend.\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+arch_initcall(socfpga_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-socfpga/self-refresh.S b/arch/arm/mach-socfpga/self-refresh.S<br/>new file mode 100644<br/>index 000000000000..f2d7f883e33d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/self-refresh.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/self-refresh.S</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2014-2015 Altera Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/assembler.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX_LOOP_COUNT		1000</div><div class='add'>+</div><div class='add'>+/* Register offset */</div><div class='add'>+#define SDR_CTRLGRP_LOWPWREQ_ADDR       0x54</div><div class='add'>+#define SDR_CTRLGRP_LOWPWRACK_ADDR      0x58</div><div class='add'>+</div><div class='add'>+/* Bitfield positions */</div><div class='add'>+#define SELFRSHREQ_POS                  3</div><div class='add'>+#define SELFRSHREQ_MASK                 0x8</div><div class='add'>+</div><div class='add'>+#define SELFRFSHACK_POS                 1</div><div class='add'>+#define SELFRFSHACK_MASK                0x2</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This code assumes that when the bootloader configured</div><div class='add'>+	 * the sdram controller for the DDR on the board it</div><div class='add'>+	 * configured the following fields depending on the DDR</div><div class='add'>+	 * vendor/configuration:</div><div class='add'>+	 *</div><div class='add'>+	 * sdr.ctrlcfg.lowpwreq.selfrfshmask</div><div class='add'>+	 * sdr.ctrlcfg.lowpwrtiming.clkdisablecycles</div><div class='add'>+	 * sdr.ctrlcfg.dramtiming4.selfrfshexit</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	.arch   armv7-a</div><div class='add'>+	.text</div><div class='add'>+	.align 3</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * socfpga_sdram_self_refresh</div><div class='add'>+	 *</div><div class='add'>+	 *  r0 : sdr_ctl_base_addr</div><div class='add'>+	 *  r1 : temp storage of return value</div><div class='add'>+	 *  r2 : temp storage of register values</div><div class='add'>+	 *  r3 : loop counter</div><div class='add'>+	 *</div><div class='add'>+	 *  return value: lower 16 bits: loop count going into self refresh</div><div class='add'>+	 *                upper 16 bits: loop count exiting self refresh</div><div class='add'>+	 */</div><div class='add'>+ENTRY(socfpga_sdram_self_refresh)</div><div class='add'>+	/* Enable dynamic clock gating in the Power Control Register. */</div><div class='add'>+	mrc	p15, 0, r2, c15, c0, 0</div><div class='add'>+	orr	r2, r2, #1</div><div class='add'>+	mcr	p15, 0, r2, c15, c0, 0</div><div class='add'>+</div><div class='add'>+	/* Enable self refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 1 */</div><div class='add'>+	ldr	r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]</div><div class='add'>+	orr	r2, r2, #SELFRSHREQ_MASK</div><div class='add'>+	str	r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]</div><div class='add'>+</div><div class='add'>+	/* Poll until sdr.ctrlgrp.lowpwrack.selfrfshack == 1 or hit max loops */</div><div class='add'>+	mov	r3, #0</div><div class='add'>+while_ack_0:</div><div class='add'>+	ldr	r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]</div><div class='add'>+	and	r2, r2, #SELFRFSHACK_MASK</div><div class='add'>+	cmp	r2, #SELFRFSHACK_MASK</div><div class='add'>+	beq	ack_1</div><div class='add'>+</div><div class='add'>+	add	r3, #1</div><div class='add'>+	cmp	r3, #MAX_LOOP_COUNT</div><div class='add'>+	bne	while_ack_0</div><div class='add'>+</div><div class='add'>+ack_1:</div><div class='add'>+	mov	r1, r3</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Execute an ISB instruction to ensure that all of the</div><div class='add'>+	 * CP15 register changes have been committed.</div><div class='add'>+	 */</div><div class='add'>+	isb</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Execute a barrier instruction to ensure that all cache,</div><div class='add'>+	 * TLB and branch predictor maintenance operations issued</div><div class='add'>+	 * by any CPU in the cluster have completed.</div><div class='add'>+	 */</div><div class='add'>+	dsb</div><div class='add'>+	dmb</div><div class='add'>+</div><div class='add'>+	wfi</div><div class='add'>+</div><div class='add'>+	/* Disable self-refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 0 */</div><div class='add'>+	ldr	r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]</div><div class='add'>+	bic	r2, r2, #SELFRSHREQ_MASK</div><div class='add'>+	str	r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]</div><div class='add'>+</div><div class='add'>+	/* Poll until sdr.ctrlgrp.lowpwrack.selfrfshack == 0 or hit max loops */</div><div class='add'>+	mov	r3, #0</div><div class='add'>+while_ack_1:</div><div class='add'>+	ldr	r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]</div><div class='add'>+	and	r2, r2, #SELFRFSHACK_MASK</div><div class='add'>+	cmp	r2, #SELFRFSHACK_MASK</div><div class='add'>+	bne	ack_0</div><div class='add'>+</div><div class='add'>+	add	r3, #1</div><div class='add'>+	cmp	r3, #MAX_LOOP_COUNT</div><div class='add'>+	bne	while_ack_1</div><div class='add'>+</div><div class='add'>+ack_0:</div><div class='add'>+	/*</div><div class='add'>+	 * Prepare return value:</div><div class='add'>+	 * Shift loop count for exiting self refresh into upper 16 bits.</div><div class='add'>+	 * Leave loop count for requesting self refresh in lower 16 bits.</div><div class='add'>+	 */</div><div class='add'>+	mov	r3, r3, lsl #16</div><div class='add'>+	add	r1, r1, r3</div><div class='add'>+</div><div class='add'>+	/* Disable dynamic clock gating in the Power Control Register. */</div><div class='add'>+	mrc	p15, 0, r2, c15, c0, 0</div><div class='add'>+	bic	r2, r2, #1</div><div class='add'>+	mcr	p15, 0, r2, c15, c0, 0</div><div class='add'>+</div><div class='add'>+	mov     r0, r1                  @ return value</div><div class='add'>+	bx	lr			@ return</div><div class='add'>+</div><div class='add'>+ENDPROC(socfpga_sdram_self_refresh)</div><div class='add'>+ENTRY(socfpga_sdram_self_refresh_sz)</div><div class='add'>+	.word	. - socfpga_sdram_self_refresh</div><div class='head'>diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c<br/>index f5e597c207b9..19643a756c48 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-socfpga/socfpga.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-socfpga/socfpga.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-socfpga/socfpga.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-socfpga/socfpga.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- *  Copyright (C) 2012 Altera Corporation</div><div class='add'>+ *  Copyright (C) 2012-2015 Altera Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -27,43 +27,11 @@</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='del'>-void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE));</div><div class='ctx'> void __iomem *sys_manager_base_addr;</div><div class='ctx'> void __iomem *rst_manager_base_addr;</div><div class='add'>+void __iomem *sdr_ctl_base_addr;</div><div class='ctx'> unsigned long socfpga_cpu1start_addr;</div><div class='ctx'> </div><div class='del'>-static struct map_desc scu_io_desc __initdata = {</div><div class='del'>-	.virtual	= SOCFPGA_SCU_VIRT_BASE,</div><div class='del'>-	.pfn		= 0, /* run-time */</div><div class='del'>-	.length		= SZ_8K,</div><div class='del'>-	.type		= MT_DEVICE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct map_desc uart_io_desc __initdata = {</div><div class='del'>-	.virtual	= 0xfec02000,</div><div class='del'>-	.pfn		= __phys_to_pfn(0xffc02000),</div><div class='del'>-	.length		= SZ_8K,</div><div class='del'>-	.type		= MT_DEVICE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init socfpga_scu_map_io(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long base;</div><div class='del'>-</div><div class='del'>-	/* Get SCU base */</div><div class='del'>-	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));</div><div class='del'>-</div><div class='del'>-	scu_io_desc.pfn = __phys_to_pfn(base);</div><div class='del'>-	iotable_init(&amp;scu_io_desc, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init socfpga_map_io(void)</div><div class='del'>-{</div><div class='del'>-	socfpga_scu_map_io();</div><div class='del'>-	iotable_init(&amp;uart_io_desc, 1);</div><div class='del'>-	early_printk("Early printk initialized\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init socfpga_sysmgr_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='hunk'>@@ -82,6 +50,9 @@ void __init socfpga_sysmgr_init(void)</div><div class='ctx'> </div><div class='ctx'> 	np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");</div><div class='ctx'> 	rst_manager_base_addr = of_iomap(np, 0);</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl");</div><div class='add'>+	sdr_ctl_base_addr = of_iomap(np, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init socfpga_init_irq(void)</div><div class='hunk'>@@ -111,8 +82,6 @@ static const char *altera_dt_match[] = {</div><div class='ctx'> DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")</div><div class='ctx'> 	.l2c_aux_val	= 0,</div><div class='ctx'> 	.l2c_aux_mask	= ~0,</div><div class='del'>-	.smp		= smp_ops(socfpga_smp_ops),</div><div class='del'>-	.map_io		= socfpga_map_io,</div><div class='ctx'> 	.init_irq	= socfpga_init_irq,</div><div class='ctx'> 	.restart	= socfpga_cyclone5_restart,</div><div class='ctx'> 	.dt_compat	= altera_dt_match,</div><div class='head'>diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h<br/>index a99d90a4d09c..06640914d9a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/generic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/generic.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='ctx'>  * Rajeev Kumar &lt;rajeev-dlh.kumar@st.com&gt;</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/include/mach/irqs.h b/arch/arm/mach-spear/include/mach/irqs.h<br/>index 92da0a8c6bce..7058720c5278 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/irqs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/irqs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/irqs.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='ctx'>  * Rajeev Kumar &lt;rajeev-dlh.kumar@st.com&gt;</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/include/mach/misc_regs.h b/arch/arm/mach-spear/include/mach/misc_regs.h<br/>index 935639ce59ba..cfaf7c665b58 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/misc_regs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/include/mach/misc_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/misc_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/misc_regs.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Miscellaneous registers definitions for SPEAr3xx machine family</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h<br/>index f2d6a0176575..5ed841ccf8a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/spear.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/include/mach/spear.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/spear.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/spear.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009,2012 ST Microelectronics</div><div class='ctx'>  * Rajeev Kumar&lt;rajeev-dlh.kumar@st.com&gt;</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/include/mach/uncompress.h b/arch/arm/mach-spear/include/mach/uncompress.h<br/>index 51b2dc93e4da..8439b9c12edb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/uncompress.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/include/mach/uncompress.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/include/mach/uncompress.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Serial port stubs for kernel decompress status messages</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/pl080.c b/arch/arm/mach-spear/pl080.c<br/>index cfa1199d0f4a..b4529f3e0ee9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/pl080.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/pl080.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/pl080.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/pl080.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * DMAC pl080 definitions for SPEAr platform</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/pl080.h b/arch/arm/mach-spear/pl080.h<br/>index eb6590ded40d..608dec6725ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/pl080.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/pl080.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/pl080.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/pl080.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * DMAC pl080 definitions for SPEAr platform</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/restart.c b/arch/arm/mach-spear/restart.c<br/>index ce5e098c4888..b4342155a783 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/restart.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/restart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/restart.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/restart.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr platform specific restart functions</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c<br/>index d9ce4d8000f0..cd5d375d91f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear1310.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear1310.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear1310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear1310.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr1310 machine source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c<br/>index 3f3c0f124bd3..94594d5a446c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear1340.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear1340.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear1340.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear1340.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr1340 machine source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c<br/>index 2e463a93468d..b7afce6795f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear13xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear13xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear13xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear13xx.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr13XX machines common source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear300.c b/arch/arm/mach-spear/spear300.c<br/>index b52e48f342f4..5b32edda2276 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear300.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear300.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear300.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr300 machine source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear310.c b/arch/arm/mach-spear/spear310.c<br/>index ed2029db391f..86a44ac7ff67 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear310.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear310.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear310.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear310.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr310 machine source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear320.c b/arch/arm/mach-spear/spear320.c<br/>index bf634b32a930..d45d751926c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear320.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear320.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear320.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear320.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr320 machine source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c<br/>index bf3b1fd8cb23..23394ac76cf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear/spear3xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-spear/spear3xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear/spear3xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-spear/spear3xx.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * SPEAr3XX machines common source file</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2012 ST Microelectronics</div><div class='del'>- * Viresh Kumar &lt;viresh.linux@gmail.com&gt;</div><div class='add'>+ * Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='head'>diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig<br/>index 3b1ac463a494..125865daaf17 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sti/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sti/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sti/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sti/Kconfig</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> menuconfig ARCH_STI</div><div class='ctx'> 	bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7</div><div class='ctx'> 	select ARM_GIC</div><div class='add'>+	select ST_IRQCHIP</div><div class='ctx'> 	select ARM_GLOBAL_TIMER</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select PINCTRL_ST</div><div class='head'>diff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile<br/>new file mode 100644<br/>index 000000000000..bd0b7b5d6e9d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-stm32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/Makefile</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+obj-y += board-dt.o</div><div class='head'>diff --git a/arch/arm/mach-stm32/Makefile.boot b/arch/arm/mach-stm32/Makefile.boot<br/>new file mode 100644<br/>index 000000000000..eacfc3f5c33e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-stm32/Makefile.boot?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/Makefile.boot</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# Empty file waiting for deletion once Makefile.boot isn't needed any more.</div><div class='add'>+# Patch waits for application at</div><div class='add'>+# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 .</div><div class='head'>diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c<br/>new file mode 100644<br/>index 000000000000..f2ad7723d034<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-stm32/board-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-stm32/board-dt.c</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) Maxime Coquelin 2015</div><div class='add'>+ * Author:  Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;</div><div class='add'>+ * License terms:  GNU General Public License (GPL), version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;asm/v7m.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+</div><div class='add'>+static const char *const stm32_compat[] __initconst = {</div><div class='add'>+	"st,stm32f429",</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(STM32DT, "STM32 (Device Tree Support)")</div><div class='add'>+	.dt_compat = stm32_compat,</div><div class='add'>+	.restart = armv7m_restart,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig<br/>index 81502b90dd91..4efe2d43a126 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sunxi/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sunxi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sunxi/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/Kconfig</a></div><div class='hunk'>@@ -35,7 +35,7 @@ config MACH_SUN7I</div><div class='ctx'> 	select SUN5I_HSTIMER</div><div class='ctx'> </div><div class='ctx'> config MACH_SUN8I</div><div class='del'>-	bool "Allwinner A23 (sun8i) SoCs support"</div><div class='add'>+	bool "Allwinner sun8i Family SoCs support"</div><div class='ctx'> 	default ARCH_SUNXI</div><div class='ctx'> 	select ARM_GIC</div><div class='ctx'> 	select MFD_SUN6I_PRCM</div><div class='head'>diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c<br/>index 587b0468efcc..e8483ec79d67 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sunxi/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sunxi/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sunxi/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/platsmp.c</a></div><div class='hunk'>@@ -121,3 +121,72 @@ static struct smp_operations sun6i_smp_ops __initdata = {</div><div class='ctx'> 	.smp_boot_secondary	= sun6i_smp_boot_secondary,</div><div class='ctx'> };</div><div class='ctx'> CPU_METHOD_OF_DECLARE(sun6i_a31_smp, "allwinner,sun6i-a31", &amp;sun6i_smp_ops);</div><div class='add'>+</div><div class='add'>+static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node;</div><div class='add'>+</div><div class='add'>+	node = of_find_compatible_node(NULL, NULL, "allwinner,sun8i-a23-prcm");</div><div class='add'>+	if (!node) {</div><div class='add'>+		pr_err("Missing A23 PRCM node in the device tree\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prcm_membase = of_iomap(node, 0);</div><div class='add'>+	if (!prcm_membase) {</div><div class='add'>+		pr_err("Couldn't map A23 PRCM registers\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	node = of_find_compatible_node(NULL, NULL,</div><div class='add'>+				       "allwinner,sun8i-a23-cpuconfig");</div><div class='add'>+	if (!node) {</div><div class='add'>+		pr_err("Missing A23 CPU config node in the device tree\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpucfg_membase = of_iomap(node, 0);</div><div class='add'>+	if (!cpucfg_membase)</div><div class='add'>+		pr_err("Couldn't map A23 CPU config registers\n");</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun8i_smp_boot_secondary(unsigned int cpu,</div><div class='add'>+				    struct task_struct *idle)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(prcm_membase &amp;&amp; cpucfg_membase))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;cpu_lock);</div><div class='add'>+</div><div class='add'>+	/* Set CPU boot address */</div><div class='add'>+	writel(virt_to_phys(secondary_startup),</div><div class='add'>+	       cpucfg_membase + CPUCFG_PRIVATE0_REG);</div><div class='add'>+</div><div class='add'>+	/* Assert the CPU core in reset */</div><div class='add'>+	writel(0, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));</div><div class='add'>+</div><div class='add'>+	/* Assert the L1 cache in reset */</div><div class='add'>+	reg = readl(cpucfg_membase + CPUCFG_GEN_CTRL_REG);</div><div class='add'>+	writel(reg &amp; ~BIT(cpu), cpucfg_membase + CPUCFG_GEN_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	/* Clear CPU power-off gating */</div><div class='add'>+	reg = readl(prcm_membase + PRCM_CPU_PWROFF_REG);</div><div class='add'>+	writel(reg &amp; ~BIT(cpu), prcm_membase + PRCM_CPU_PWROFF_REG);</div><div class='add'>+	mdelay(1);</div><div class='add'>+</div><div class='add'>+	/* Deassert the CPU core reset */</div><div class='add'>+	writel(3, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;cpu_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct smp_operations sun8i_smp_ops __initdata = {</div><div class='add'>+	.smp_prepare_cpus	= sun8i_smp_prepare_cpus,</div><div class='add'>+	.smp_boot_secondary	= sun8i_smp_boot_secondary,</div><div class='add'>+};</div><div class='add'>+CPU_METHOD_OF_DECLARE(sun8i_a23_smp, "allwinner,sun8i-a23", &amp;sun8i_smp_ops);</div><div class='head'>diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c<br/>index 1bc811a74a9f..65bab2876343 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sunxi/sunxi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-sunxi/sunxi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sunxi/sunxi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-sunxi/sunxi.c</a></div><div class='hunk'>@@ -67,10 +67,13 @@ MACHINE_END</div><div class='ctx'> </div><div class='ctx'> static const char * const sun8i_board_dt_compat[] = {</div><div class='ctx'> 	"allwinner,sun8i-a23",</div><div class='add'>+	"allwinner,sun8i-a33",</div><div class='add'>+	"allwinner,sun8i-h3",</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i (A23) Family")</div><div class='add'>+DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i Family")</div><div class='add'>+	.init_time	= sun6i_timer_init,</div><div class='ctx'> 	.dt_compat	= sun8i_board_dt_compat,</div><div class='ctx'> 	.init_late	= sunxi_dt_cpufreq_init,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile<br/>index e48a74458c25..fffad2426ee4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/Makefile</a></div><div class='hunk'>@@ -19,7 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pm-tegra30.o</div><div class='ctx'> ifeq ($(CONFIG_CPU_IDLE),y)</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= cpuidle-tegra30.o</div><div class='ctx'> endif</div><div class='del'>-obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o</div><div class='add'>+obj-$(CONFIG_SMP)			+= platsmp.o</div><div class='ctx'> obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_114_SOC)	+= sleep-tegra30.o</div><div class='head'>diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c<br/>index 88de2dce2e87..7469347b1749 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/cpuidle-tegra20.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/cpuidle-tegra20.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/cpuidle-tegra20.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/cpuidle-tegra20.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include "iomap.h"</div><div class='ctx'> #include "irq.h"</div><div class='ctx'> #include "pm.h"</div><div class='add'>+#include "reset.h"</div><div class='ctx'> #include "sleep.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='hunk'>@@ -70,15 +71,13 @@ static struct cpuidle_driver tegra_idle_driver = {</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);</div><div class='del'>-</div><div class='ctx'> static int tegra20_reset_sleeping_cpu_1(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	tegra_pen_lock();</div><div class='ctx'> </div><div class='del'>-	if (readl(pmc + PMC_SCRATCH41) == CPU_RESETTABLE)</div><div class='add'>+	if (readb(tegra20_cpu1_resettable_status) == CPU_RESETTABLE)</div><div class='ctx'> 		tegra20_cpu_shutdown(1);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = -EINVAL;</div><div class='head'>diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S<br/>deleted file mode 100644<br/>index 2072e7322c39..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/headsmp.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sleep.h"</div><div class='del'>-</div><div class='del'>-        .section ".text.head", "ax"</div><div class='del'>-</div><div class='del'>-ENTRY(tegra_secondary_startup)</div><div class='del'>-        check_cpu_part_num 0xc09, r8, r9</div><div class='del'>-        bleq    v7_invalidate_l1</div><div class='del'>-        b       secondary_startup</div><div class='del'>-ENDPROC(tegra_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S<br/>index 71be4af5e975..e3070fdab80b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset-handler.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/reset-handler.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset-handler.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset-handler.S</a></div><div class='hunk'>@@ -169,10 +169,10 @@ after_errata:</div><div class='ctx'> 	cmp	r6, #TEGRA20</div><div class='ctx'> 	bne	1f</div><div class='ctx'> 	/* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */</div><div class='del'>-	mov32	r5, TEGRA_PMC_BASE</div><div class='del'>-	mov	r0, #0</div><div class='add'>+	mov32	r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET</div><div class='add'>+	mov	r0, #CPU_NOT_RESETTABLE</div><div class='ctx'> 	cmp	r10, #0</div><div class='del'>-	strne	r0, [r5, #PMC_SCRATCH41]</div><div class='add'>+	strneb	r0, [r5, #__tegra20_cpu1_resettable_status_offset]</div><div class='ctx'> 1:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -281,6 +281,10 @@ __tegra_cpu_reset_handler_data:</div><div class='ctx'> 	.rept	TEGRA_RESET_DATA_SIZE</div><div class='ctx'> 	.long	0</div><div class='ctx'> 	.endr</div><div class='add'>+	.globl	__tegra20_cpu1_resettable_status_offset</div><div class='add'>+	.equ	__tegra20_cpu1_resettable_status_offset, \</div><div class='add'>+					. - __tegra_cpu_reset_handler_start</div><div class='add'>+	.byte	0</div><div class='ctx'> 	.align L1_CACHE_SHIFT</div><div class='ctx'> </div><div class='ctx'> ENTRY(__tegra_cpu_reset_handler_end)</div><div class='head'>diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c<br/>index 894c5c472184..6fd9db54887e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ void __init tegra_cpu_reset_handler_init(void)</div><div class='ctx'> 	__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] =</div><div class='ctx'> 		*((u32 *)cpu_possible_mask);</div><div class='ctx'> 	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_SECONDARY] =</div><div class='del'>-		virt_to_phys((void *)tegra_secondary_startup);</div><div class='add'>+		virt_to_phys((void *)secondary_startup);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='head'>diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h<br/>index 76a93434c6ee..9c479c7925b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/reset.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/reset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/reset.h</a></div><div class='hunk'>@@ -35,8 +35,8 @@ extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];</div><div class='ctx'> </div><div class='ctx'> void __tegra_cpu_reset_handler_start(void);</div><div class='ctx'> void __tegra_cpu_reset_handler(void);</div><div class='add'>+void __tegra20_cpu1_resettable_status_offset(void);</div><div class='ctx'> void __tegra_cpu_reset_handler_end(void);</div><div class='del'>-void tegra_secondary_startup(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> #define tegra_cpu_lp1_mask \</div><div class='hunk'>@@ -47,6 +47,9 @@ void tegra_secondary_startup(void);</div><div class='ctx'> 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \</div><div class='ctx'> 	((u32)&amp;__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \</div><div class='ctx'> 	 (u32)__tegra_cpu_reset_handler_start)))</div><div class='add'>+#define tegra20_cpu1_resettable_status \</div><div class='add'>+	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \</div><div class='add'>+	 (u32)__tegra20_cpu1_resettable_status_offset))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define tegra_cpu_reset_handler_offset \</div><div class='head'>diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S<br/>index be4bc5f853f5..e6b684e14322 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep-tegra20.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/sleep-tegra20.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep-tegra20.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep-tegra20.S</a></div><div class='hunk'>@@ -97,9 +97,10 @@ ENDPROC(tegra20_hotplug_shutdown)</div><div class='ctx'> ENTRY(tegra20_cpu_shutdown)</div><div class='ctx'> 	cmp	r0, #0</div><div class='ctx'> 	reteq	lr			@ must not be called for CPU 0</div><div class='del'>-	mov32	r1, TEGRA_PMC_VIRT + PMC_SCRATCH41</div><div class='add'>+	mov32	r1, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r2, =__tegra20_cpu1_resettable_status_offset</div><div class='ctx'> 	mov	r12, #CPU_RESETTABLE</div><div class='del'>-	str	r12, [r1]</div><div class='add'>+	strb	r12, [r1, r2]</div><div class='ctx'> </div><div class='ctx'> 	cpu_to_halt_reg r1, r0</div><div class='ctx'> 	ldr	r3, =TEGRA_FLOW_CTRL_VIRT</div><div class='hunk'>@@ -182,38 +183,41 @@ ENDPROC(tegra_pen_unlock)</div><div class='ctx'> /*</div><div class='ctx'>  * tegra20_cpu_clear_resettable(void)</div><div class='ctx'>  *</div><div class='del'>- * Called to clear the "resettable soon" flag in PMC_SCRATCH41 when</div><div class='add'>+ * Called to clear the "resettable soon" flag in IRAM variable when</div><div class='ctx'>  * it is expected that the secondary CPU will be idle soon.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(tegra20_cpu_clear_resettable)</div><div class='del'>-	mov32	r1, TEGRA_PMC_VIRT + PMC_SCRATCH41</div><div class='add'>+	mov32	r1, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r2, =__tegra20_cpu1_resettable_status_offset</div><div class='ctx'> 	mov	r12, #CPU_NOT_RESETTABLE</div><div class='del'>-	str	r12, [r1]</div><div class='add'>+	strb	r12, [r1, r2]</div><div class='ctx'> 	ret	lr</div><div class='ctx'> ENDPROC(tegra20_cpu_clear_resettable)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * tegra20_cpu_set_resettable_soon(void)</div><div class='ctx'>  *</div><div class='del'>- * Called to set the "resettable soon" flag in PMC_SCRATCH41 when</div><div class='add'>+ * Called to set the "resettable soon" flag in IRAM variable when</div><div class='ctx'>  * it is expected that the secondary CPU will be idle soon.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(tegra20_cpu_set_resettable_soon)</div><div class='del'>-	mov32	r1, TEGRA_PMC_VIRT + PMC_SCRATCH41</div><div class='add'>+	mov32	r1, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r2, =__tegra20_cpu1_resettable_status_offset</div><div class='ctx'> 	mov	r12, #CPU_RESETTABLE_SOON</div><div class='del'>-	str	r12, [r1]</div><div class='add'>+	strb	r12, [r1, r2]</div><div class='ctx'> 	ret	lr</div><div class='ctx'> ENDPROC(tegra20_cpu_set_resettable_soon)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * tegra20_cpu_is_resettable_soon(void)</div><div class='ctx'>  *</div><div class='del'>- * Returns true if the "resettable soon" flag in PMC_SCRATCH41 has been</div><div class='add'>+ * Returns true if the "resettable soon" flag in IRAM variable has been</div><div class='ctx'>  * set because it is expected that the secondary CPU will be idle soon.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(tegra20_cpu_is_resettable_soon)</div><div class='del'>-	mov32	r1, TEGRA_PMC_VIRT + PMC_SCRATCH41</div><div class='del'>-	ldr	r12, [r1]</div><div class='add'>+	mov32	r1, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r2, =__tegra20_cpu1_resettable_status_offset</div><div class='add'>+	ldrb	r12, [r1, r2]</div><div class='ctx'> 	cmp	r12, #CPU_RESETTABLE_SOON</div><div class='ctx'> 	moveq	r0, #1</div><div class='ctx'> 	movne	r0, #0</div><div class='hunk'>@@ -256,9 +260,10 @@ ENTRY(tegra20_sleep_cpu_secondary_finish)</div><div class='ctx'> 	mov	r0, #TEGRA_FLUSH_CACHE_LOUIS</div><div class='ctx'> 	bl	tegra_disable_clean_inv_dcache</div><div class='ctx'> </div><div class='del'>-	mov32	r0, TEGRA_PMC_VIRT + PMC_SCRATCH41</div><div class='add'>+	mov32	r0, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r4, =__tegra20_cpu1_resettable_status_offset</div><div class='ctx'> 	mov	r3, #CPU_RESETTABLE</div><div class='del'>-	str	r3, [r0]</div><div class='add'>+	strb	r3, [r0, r4]</div><div class='ctx'> </div><div class='ctx'> 	bl	tegra_cpu_do_idle</div><div class='ctx'> </div><div class='hunk'>@@ -274,10 +279,10 @@ ENTRY(tegra20_sleep_cpu_secondary_finish)</div><div class='ctx'> </div><div class='ctx'> 	bl	tegra_pen_lock</div><div class='ctx'> </div><div class='del'>-	mov32	r3, TEGRA_PMC_VIRT</div><div class='del'>-	add	r0, r3, #PMC_SCRATCH41</div><div class='add'>+	mov32	r0, TEGRA_IRAM_RESET_BASE_VIRT</div><div class='add'>+	ldr	r4, =__tegra20_cpu1_resettable_status_offset</div><div class='ctx'> 	mov	r3, #CPU_NOT_RESETTABLE</div><div class='del'>-	str	r3, [r0]</div><div class='add'>+	strb	r3, [r0, r4]</div><div class='ctx'> </div><div class='ctx'> 	bl	tegra_pen_unlock</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S<br/>index 5d8d13aeab93..9a2f0b051e10 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep-tegra30.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/sleep-tegra30.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep-tegra30.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep-tegra30.S</a></div><div class='hunk'>@@ -223,7 +223,7 @@ wfe_war:</div><div class='ctx'> 	b	__cpu_reset_again</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * 38 nop's, which fills reset of wfe cache line and</div><div class='add'>+	 * 38 nop's, which fills rest of wfe cache line and</div><div class='ctx'> 	 * 4 more cachelines with nop</div><div class='ctx'> 	 */</div><div class='ctx'> 	.rept 38</div><div class='head'>diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h<br/>index 92d46ec1361a..0d59360d891d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/sleep.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/sleep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/sleep.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #define __MACH_TEGRA_SLEEP_H</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='add'>+#include "irammap.h"</div><div class='ctx'> </div><div class='ctx'> #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \</div><div class='ctx'> 					+ IO_CPU_VIRT)</div><div class='hunk'>@@ -29,6 +30,9 @@</div><div class='ctx'> 					+ IO_APB_VIRT)</div><div class='ctx'> #define TEGRA_PMC_VIRT	(TEGRA_PMC_BASE - IO_APB_PHYS + IO_APB_VIRT)</div><div class='ctx'> </div><div class='add'>+#define TEGRA_IRAM_RESET_BASE_VIRT (IO_IRAM_VIRT + \</div><div class='add'>+				TEGRA_IRAM_RESET_HANDLER_OFFSET)</div><div class='add'>+</div><div class='ctx'> /* PMC_SCRATCH37-39 and 41 are used for tegra_pen_lock and idle */</div><div class='ctx'> #define PMC_SCRATCH37	0x130</div><div class='ctx'> #define PMC_SCRATCH38	0x134</div><div class='head'>diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c<br/>index 861d88486dbe..2378fa560a21 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-tegra/tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-tegra/tegra.c</a></div><div class='hunk'>@@ -163,6 +163,5 @@ DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")</div><div class='ctx'> 	.init_irq	= tegra_dt_init_irq,</div><div class='ctx'> 	.init_machine	= tegra_dt_init,</div><div class='ctx'> 	.init_late	= tegra_dt_init_late,</div><div class='del'>-	.restart	= tegra_pmc_restart,</div><div class='ctx'> 	.dt_compat	= tegra_dt_board_compat,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig<br/>new file mode 100644<br/>index 000000000000..b640458fd757<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-uniphier/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+config ARCH_UNIPHIER</div><div class='add'>+	bool "Socionext UniPhier SoCs"</div><div class='add'>+	depends on ARCH_MULTI_V7</div><div class='add'>+	select ARM_AMBA</div><div class='add'>+	select ARM_GLOBAL_TIMER</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select HAVE_ARM_SCU</div><div class='add'>+	select HAVE_ARM_TWD if SMP</div><div class='add'>+	help</div><div class='add'>+	  Support for UniPhier SoC family developed by Socionext Inc.</div><div class='add'>+	  (formerly, System LSI Business Division of Panasonic Corporation)</div><div class='head'>diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile<br/>new file mode 100644<br/>index 000000000000..60bd2265f753<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-uniphier/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+obj-y			:= uniphier.o</div><div class='add'>+obj-$(CONFIG_SMP)	+= platsmp.o</div><div class='head'>diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c<br/>new file mode 100644<br/>index 000000000000..5943e1cb7fe1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-uniphier/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/platsmp.c</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/smp_scu.h&gt;</div><div class='add'>+</div><div class='add'>+static struct regmap *sbcm_regmap;</div><div class='add'>+</div><div class='add'>+static void __init uniphier_smp_prepare_cpus(unsigned int max_cpus)</div><div class='add'>+{</div><div class='add'>+	static cpumask_t only_cpu_0 = { CPU_BITS_CPU0 };</div><div class='add'>+	unsigned long scu_base_phys = 0;</div><div class='add'>+	void __iomem *scu_base;</div><div class='add'>+</div><div class='add'>+	sbcm_regmap = syscon_regmap_lookup_by_compatible(</div><div class='add'>+			"socionext,uniphier-system-bus-controller-misc");</div><div class='add'>+	if (IS_ERR(sbcm_regmap)) {</div><div class='add'>+		pr_err("failed to regmap system-bus-controller-misc\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (scu_a9_has_base())</div><div class='add'>+		scu_base_phys = scu_a9_get_base();</div><div class='add'>+</div><div class='add'>+	if (!scu_base_phys) {</div><div class='add'>+		pr_err("failed to get scu base\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scu_base = ioremap(scu_base_phys, SZ_128);</div><div class='add'>+	if (!scu_base) {</div><div class='add'>+		pr_err("failed to remap scu base (0x%08lx)\n", scu_base_phys);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scu_enable(scu_base);</div><div class='add'>+	iounmap(scu_base);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	pr_warn("disabling SMP\n");</div><div class='add'>+	init_cpu_present(&amp;only_cpu_0);</div><div class='add'>+	sbcm_regmap = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __naked uniphier_secondary_startup(void)</div><div class='add'>+{</div><div class='add'>+	asm("bl		v7_invalidate_l1\n"</div><div class='add'>+	    "b		secondary_startup\n");</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int uniphier_boot_secondary(unsigned int cpu,</div><div class='add'>+				   struct task_struct *idle)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!sbcm_regmap)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(sbcm_regmap, 0x1208,</div><div class='add'>+			   virt_to_phys(uniphier_secondary_startup));</div><div class='add'>+	if (!ret)</div><div class='add'>+		asm("sev"); /* wake up secondary CPU */</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct smp_operations uniphier_smp_ops __initdata = {</div><div class='add'>+	.smp_prepare_cpus	= uniphier_smp_prepare_cpus,</div><div class='add'>+	.smp_boot_secondary	= uniphier_boot_secondary,</div><div class='add'>+};</div><div class='add'>+CPU_METHOD_OF_DECLARE(uniphier_smp, "socionext,uniphier-smp",</div><div class='add'>+		      &amp;uniphier_smp_ops);</div><div class='head'>diff --git a/arch/ia64/kernel/paravirt_patchlist.h b/arch/arm/mach-uniphier/uniphier.c<br/>index 67cffc3643a3..9be10efacb7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirt_patchlist.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirt_patchlist.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-uniphier/uniphier.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-uniphier/uniphier.c</a></div><div class='hunk'>@@ -1,8 +1,5 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * linux/arch/ia64/xen/paravirt_patchlist.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -13,12 +10,21 @@</div><div class='ctx'>  * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='ctx'>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/native/patchlist.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+</div><div class='add'>+static const char * const uniphier_dt_compat[] __initconst = {</div><div class='add'>+	"socionext,ph1-sld3",</div><div class='add'>+	"socionext,ph1-ld4",</div><div class='add'>+	"socionext,ph1-pro4",</div><div class='add'>+	"socionext,ph1-sld8",</div><div class='add'>+	"socionext,ph1-pro5",</div><div class='add'>+	"socionext,proxstream2",</div><div class='add'>+	"socionext,ph1-ld6b",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+DT_MACHINE_START(UNIPHIER, "Socionext UniPhier")</div><div class='add'>+	.dt_compat	= uniphier_dt_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c<br/>index e97ee556f92f..7557bede7ae6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cache-l2x0.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/cache-l2x0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cache-l2x0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cache-l2x0.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hardware/cache-l2x0.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -15,7 +16,14 @@</div><div class='ctx'> static int __init ux500_l2x0_unlock(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE);</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	void __iomem *l2x0_base;</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");</div><div class='add'>+	l2x0_base = of_iomap(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!l2x0_base)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions</div><div class='hunk'>@@ -30,6 +38,7 @@ static int __init ux500_l2x0_unlock(void)</div><div class='ctx'> 		writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +</div><div class='ctx'> 			       i * L2X0_LOCKDOWN_STRIDE);</div><div class='ctx'> 	}</div><div class='add'>+	iounmap(l2x0_base);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c<br/>index 6f63954c8bde..16913800bbf9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu-db8500.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/cpu-db8500.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu-db8500.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cpu-db8500.c</a></div><div class='hunk'>@@ -43,60 +43,10 @@ static struct prcmu_pdata db8500_prcmu_pdata = {</div><div class='ctx'> 	.legacy_offset	= DB8500_PRCMU_LEGACY_OFFSET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* minimum static i/o mapping required to boot U8500 platforms */</div><div class='del'>-static struct map_desc u8500_uart_io_desc[] __initdata = {</div><div class='del'>-	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),</div><div class='del'>-};</div><div class='del'>-/*  U8500 and U9540 common io_desc */</div><div class='del'>-static struct map_desc u8500_common_io_desc[] __initdata = {</div><div class='del'>-	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */</div><div class='del'>-	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),</div><div class='del'>-</div><div class='del'>-	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),</div><div class='del'>-</div><div class='del'>-	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* U8500 IO map specific description */</div><div class='del'>-static struct map_desc u8500_io_desc[] __initdata = {</div><div class='del'>-	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* U9540 IO map specific description */</div><div class='del'>-static struct map_desc u9540_io_desc[] __initdata = {</div><div class='del'>-	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),</div><div class='del'>-	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init u8500_map_io(void)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.</div><div class='del'>-	 */</div><div class='del'>-	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));</div><div class='del'>-</div><div class='del'>-	ux500_map_io();</div><div class='del'>-</div><div class='del'>-	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));</div><div class='del'>-</div><div class='del'>-	if (cpu_is_ux540_family())</div><div class='del'>-		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));</div><div class='del'>-	else</div><div class='del'>-		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));</div><div class='add'>+	debug_ll_io_init();</div><div class='add'>+	ux500_setup_id();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -125,14 +75,18 @@ static struct arm_pmu_platdata db8500_pmu_platdata = {</div><div class='ctx'> </div><div class='ctx'> static const char *db8500_read_soc_id(void)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *uid = __io_address(U8500_BB_UID_BASE);</div><div class='add'>+	void __iomem *uid;</div><div class='ctx'> </div><div class='add'>+	uid = ioremap(U8500_BB_UID_BASE, 0x20);</div><div class='add'>+	if (!uid)</div><div class='add'>+		return NULL;</div><div class='ctx'> 	/* Throw these device-specific numbers into the entropy pool */</div><div class='ctx'> 	add_device_randomness(uid, 0x14);</div><div class='ctx'> 	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",</div><div class='ctx'> 			 readl((u32 *)uid+0),</div><div class='ctx'> 			 readl((u32 *)uid+1), readl((u32 *)uid+2),</div><div class='ctx'> 			 readl((u32 *)uid+3), readl((u32 *)uid+4));</div><div class='add'>+	iounmap(uid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct device * __init db8500_soc_device_init(void)</div><div class='head'>diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c<br/>index 6ced0f680262..e31d3d61c998 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/cpu.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/stat.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip/arm-gic.h&gt;</div><div class='hunk'>@@ -52,31 +53,36 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)</div><div class='ctx'> */</div><div class='ctx'> void __init ux500_init_irq(void)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct resource r;</div><div class='add'>+</div><div class='ctx'> 	gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);</div><div class='ctx'> 	irqchip_init();</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");</div><div class='add'>+	of_address_to_resource(np, 0, &amp;r);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!r.start) {</div><div class='add'>+		pr_err("could not find PRCMU base resource\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	prcmu_early_init(r.start, r.end-r.start);</div><div class='add'>+	ux500_pm_init(r.start, r.end-r.start);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Init clocks here so that they are available for system timer</div><div class='ctx'> 	 * initialization.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_is_u8500_family()) {</div><div class='del'>-		prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);</div><div class='del'>-		ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);</div><div class='del'>-</div><div class='ctx'> 		u8500_of_clk_init(U8500_CLKRST1_BASE,</div><div class='ctx'> 				  U8500_CLKRST2_BASE,</div><div class='ctx'> 				  U8500_CLKRST3_BASE,</div><div class='ctx'> 				  U8500_CLKRST5_BASE,</div><div class='ctx'> 				  U8500_CLKRST6_BASE);</div><div class='ctx'> 	} else if (cpu_is_u9540()) {</div><div class='del'>-		prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);</div><div class='del'>-		ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);</div><div class='ctx'> 		u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,</div><div class='ctx'> 			       U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,</div><div class='ctx'> 			       U8500_CLKRST6_BASE);</div><div class='ctx'> 	} else if (cpu_is_u8540()) {</div><div class='del'>-		prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);</div><div class='del'>-		ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);</div><div class='ctx'> 		u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,</div><div class='ctx'> 			       U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,</div><div class='ctx'> 			       U8500_CLKRST6_BASE);</div><div class='head'>diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c<br/>index 392f2fdb37d0..1e81e990044b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/id.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/id.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/id.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/id.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static unsigned int partnumber(unsigned int asicid)</div><div class='ctx'>  * DB9540	0x413fc090	0xFFFFDBF4		0x009540xx</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-void __init ux500_map_io(void)</div><div class='add'>+void __init ux500_setup_id(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpuid = read_cpuid_id();</div><div class='ctx'> 	unsigned int asicid = 0;</div><div class='head'>diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c<br/>index a44967f3168c..62b1de922bd8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/platsmp.c</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='hunk'>@@ -26,6 +28,9 @@</div><div class='ctx'> #include "db8500-regs.h"</div><div class='ctx'> #include "id.h"</div><div class='ctx'> </div><div class='add'>+static void __iomem *scu_base;</div><div class='add'>+static void __iomem *backupram;</div><div class='add'>+</div><div class='ctx'> /* This is called from headsmp.S to wakeup the secondary core */</div><div class='ctx'> extern void u8500_secondary_startup(void);</div><div class='ctx'> </div><div class='hunk'>@@ -41,16 +46,6 @@ static void write_pen_release(int val)</div><div class='ctx'> 	sync_cache_w(&amp;pen_release);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __iomem *scu_base_addr(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_is_u8500_family() || cpu_is_ux540_family())</div><div class='del'>-		return __io_address(U8500_SCU_BASE);</div><div class='del'>-	else</div><div class='del'>-		ux500_unknown_soc();</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static DEFINE_SPINLOCK(boot_lock);</div><div class='ctx'> </div><div class='ctx'> static void ux500_secondary_init(unsigned int cpu)</div><div class='hunk'>@@ -104,13 +99,6 @@ static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> </div><div class='ctx'> static void __init wakeup_secondary(void)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *backupram;</div><div class='del'>-</div><div class='del'>-	if (cpu_is_u8500_family() || cpu_is_ux540_family())</div><div class='del'>-		backupram = __io_address(U8500_BACKUPRAM0_BASE);</div><div class='del'>-	else</div><div class='del'>-		ux500_unknown_soc();</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * write the address of secondary startup into the backup ram register</div><div class='ctx'> 	 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the</div><div class='hunk'>@@ -135,10 +123,16 @@ static void __init wakeup_secondary(void)</div><div class='ctx'>  */</div><div class='ctx'> static void __init ux500_smp_init_cpus(void)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *scu_base = scu_base_addr();</div><div class='ctx'> 	unsigned int i, ncores;</div><div class='add'>+	struct device_node *np;</div><div class='ctx'> </div><div class='del'>-	ncores = scu_base ? scu_get_core_count(scu_base) : 1;</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");</div><div class='add'>+	scu_base = of_iomap(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!scu_base)</div><div class='add'>+		return;</div><div class='add'>+	backupram = ioremap(U8500_BACKUPRAM0_BASE, SZ_8K);</div><div class='add'>+	ncores = scu_get_core_count(scu_base);</div><div class='ctx'> </div><div class='ctx'> 	/* sanity check */</div><div class='ctx'> 	if (ncores &gt; nr_cpu_ids) {</div><div class='hunk'>@@ -153,8 +147,7 @@ static void __init ux500_smp_init_cpus(void)</div><div class='ctx'> </div><div class='ctx'> static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> {</div><div class='del'>-</div><div class='del'>-	scu_enable(scu_base_addr());</div><div class='add'>+	scu_enable(scu_base);</div><div class='ctx'> 	wakeup_secondary();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c<br/>index 2cb587b50905..8538910db202 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/pm.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/arm-ux500-pm.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "db8500-regs.h"</div><div class='ctx'> #include "pm_domains.h"</div><div class='hunk'>@@ -42,6 +44,7 @@</div><div class='ctx'> #define PRCM_ARMITVAL127TO96	(prcmu_base + 0x26C)</div><div class='ctx'> </div><div class='ctx'> static void __iomem *prcmu_base;</div><div class='add'>+static void __iomem *dist_base;</div><div class='ctx'> </div><div class='ctx'> /* This function decouple the gic from the prcmu */</div><div class='ctx'> int prcmu_gic_decouple(void)</div><div class='hunk'>@@ -88,7 +91,6 @@ bool prcmu_gic_pending_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 pr; /* Pending register */</div><div class='ctx'> 	u32 er; /* Enable register */</div><div class='del'>-	void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* 5 registers. STI &amp; PPI not skipped */</div><div class='hunk'>@@ -143,7 +145,6 @@ bool prcmu_is_cpu_in_wfi(int cpu)</div><div class='ctx'> int prcmu_copy_gic_settings(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 er; /* Enable register */</div><div class='del'>-	void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* We skip the STI and PPI */</div><div class='hunk'>@@ -179,11 +180,21 @@ static const struct platform_suspend_ops ux500_suspend_ops = {</div><div class='ctx'> </div><div class='ctx'> void __init ux500_pm_init(u32 phy_base, u32 size)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np;</div><div class='add'>+</div><div class='ctx'> 	prcmu_base = ioremap(phy_base, size);</div><div class='ctx'> 	if (!prcmu_base) {</div><div class='ctx'> 		pr_err("could not remap PRCMU for PM functions\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");</div><div class='add'>+	dist_base = of_iomap(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!dist_base) {</div><div class='add'>+		pr_err("could not remap GIC dist base for PM functions\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On watchdog reboot the GIC is in some cases decoupled.</div><div class='ctx'> 	 * This will make sure that the GIC is correctly configured.</div><div class='head'>diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h<br/>index 2dea8b59d222..1fb6ad2789f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/setup.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-ux500/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/setup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-ux500/setup.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> void ux500_restart(enum reboot_mode mode, const char *cmd);</div><div class='ctx'> </div><div class='del'>-void __init ux500_map_io(void);</div><div class='add'>+void __init ux500_setup_id(void);</div><div class='ctx'> </div><div class='ctx'> extern void __init ux500_init_irq(void);</div><div class='ctx'> </div><div class='hunk'>@@ -26,20 +26,6 @@ extern struct device *ux500_soc_device_init(const char *soc_id);</div><div class='ctx'> </div><div class='ctx'> extern void ux500_timer_init(void);</div><div class='ctx'> </div><div class='del'>-#define __IO_DEV_DESC(x, sz)	{		\</div><div class='del'>-	.virtual	= IO_ADDRESS(x),	\</div><div class='del'>-	.pfn		= __phys_to_pfn(x),	\</div><div class='del'>-	.length		= sz,			\</div><div class='del'>-	.type		= MT_DEVICE,		\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __MEM_DEV_DESC(x, sz)	{		\</div><div class='del'>-	.virtual	= IO_ADDRESS(x),	\</div><div class='del'>-	.pfn		= __phys_to_pfn(x),	\</div><div class='del'>-	.length		= sz,			\</div><div class='del'>-	.type		= MT_MEMORY_RWX,		\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern struct smp_operations ux500_smp_ops;</div><div class='ctx'> extern void ux500_cpu_die(unsigned int cpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c<br/>index 6ea09fe53426..23a04fe5d2ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-versatile/core.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-versatile/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-versatile/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-versatile/core.c</a></div><div class='hunk'>@@ -41,8 +41,9 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;clocksource/timer-sp804.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/hardware/arm_timer.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/icst.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -52,7 +53,6 @@</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/platform.h&gt;</div><div class='del'>-#include &lt;asm/hardware/timer-sp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/sched_clock.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -798,10 +798,10 @@ void __init versatile_timer_init(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialise to a known state (all timers off)</div><div class='ctx'> 	 */</div><div class='del'>-	writel(0, TIMER0_VA_BASE + TIMER_CTRL);</div><div class='del'>-	writel(0, TIMER1_VA_BASE + TIMER_CTRL);</div><div class='del'>-	writel(0, TIMER2_VA_BASE + TIMER_CTRL);</div><div class='del'>-	writel(0, TIMER3_VA_BASE + TIMER_CTRL);</div><div class='add'>+	sp804_timer_disable(TIMER0_VA_BASE);</div><div class='add'>+	sp804_timer_disable(TIMER1_VA_BASE);</div><div class='add'>+	sp804_timer_disable(TIMER2_VA_BASE);</div><div class='add'>+	sp804_timer_disable(TIMER3_VA_BASE);</div><div class='ctx'> </div><div class='ctx'> 	sp804_clocksource_init(TIMER3_VA_BASE, "timer3");</div><div class='ctx'> 	sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0");</div><div class='head'>diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c<br/>index f61158c6ce71..5766ce2be32b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-vexpress/spc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-vexpress/spc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-vexpress/spc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-vexpress/spc.c</a></div><div class='hunk'>@@ -589,4 +589,4 @@ static int __init ve_spc_clk_init(void)</div><div class='ctx'> 	platform_device_register_simple("vexpress-spc-cpufreq", -1, NULL, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-module_init(ve_spc_clk_init);</div><div class='add'>+device_initcall(ve_spc_clk_init);</div><div class='head'>diff --git a/arch/arm/mach-zx/Kconfig b/arch/arm/mach-zx/Kconfig<br/>new file mode 100644<br/>index 000000000000..2a910dc0d15e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+menuconfig ARCH_ZX</div><div class='add'>+	bool "ZTE ZX family" if ARCH_MULTI_V7</div><div class='add'>+	help</div><div class='add'>+	  Support for ZTE ZX-based family of processors. TV</div><div class='add'>+	  set-top-box processor is supported. More will be</div><div class='add'>+	  added soon.</div><div class='add'>+</div><div class='add'>+if ARCH_ZX</div><div class='add'>+</div><div class='add'>+config SOC_ZX296702</div><div class='add'>+	def_bool y</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select ARM_GLOBAL_TIMER</div><div class='add'>+	select HAVE_ARM_SCU if SMP</div><div class='add'>+	select HAVE_ARM_TWD if SMP</div><div class='add'>+	help</div><div class='add'>+	  Support for ZTE ZX296702 SoC which is a dual core CortexA9MP</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arm/mach-zx/Makefile b/arch/arm/mach-zx/Makefile<br/>new file mode 100644<br/>index 000000000000..7c2edf6e5f8b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+obj-$(CONFIG_SOC_ZX296702) += zx296702.o</div><div class='add'>+obj-$(CONFIG_SMP) += headsmp.o platsmp.o</div><div class='head'>diff --git a/arch/arm/mach-zx/core.h b/arch/arm/mach-zx/core.h<br/>new file mode 100644<br/>index 000000000000..3efe8e038ee4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/core.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/core.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Linaro Ltd.</div><div class='add'>+ * Copyright (C) 2014 ZTE Corporation.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_ZX_CORE_H</div><div class='add'>+#define __MACH_ZX_CORE_H</div><div class='add'>+</div><div class='add'>+extern void zx_resume_jump(void);</div><div class='add'>+extern size_t zx_suspend_iram_sz;</div><div class='add'>+extern unsigned long zx_secondary_startup_pa;</div><div class='add'>+</div><div class='add'>+void zx_secondary_startup(void);</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_ZX_CORE_H */</div><div class='head'>diff --git a/arch/arm/mach-zx/headsmp.S b/arch/arm/mach-zx/headsmp.S<br/>new file mode 100644<br/>index 000000000000..a1aa4028389f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/headsmp.S</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Linaro Ltd.</div><div class='add'>+ * Copyright (C) 2014 ZTE Corporation.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+	.align 3</div><div class='add'>+	.arm</div><div class='add'>+</div><div class='add'>+/* It runs from physical address */</div><div class='add'>+ENTRY(zx_resume_jump)</div><div class='add'>+	adr	r1, zx_secondary_startup_pa</div><div class='add'>+	ldr	r0, [r1]</div><div class='add'>+	bx	r0</div><div class='add'>+ENDPROC(zx_resume_jump)</div><div class='add'>+</div><div class='add'>+ENTRY(zx_secondary_startup_pa)</div><div class='add'>+	.word	zx_secondary_startup_pa</div><div class='add'>+</div><div class='add'>+ENTRY(zx_suspend_iram_sz)</div><div class='add'>+        .word	. - zx_resume_jump</div><div class='add'>+ENDPROC(zx_secondary_startup_pa)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+ENTRY(zx_secondary_startup)</div><div class='add'>+	bl	v7_invalidate_l1</div><div class='add'>+	b	secondary_startup</div><div class='add'>+ENDPROC(zx_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-zx/platsmp.c b/arch/arm/mach-zx/platsmp.c<br/>new file mode 100644<br/>index 000000000000..a3693982d65d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/platsmp.c</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Linaro Ltd.</div><div class='add'>+ * Copyright (C) 2014 ZTE Corporation.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cp15.h&gt;</div><div class='add'>+#include &lt;asm/fncpy.h&gt;</div><div class='add'>+#include &lt;asm/proc-fns.h&gt;</div><div class='add'>+#include &lt;asm/smp_scu.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+#define AON_SYS_CTRL_RESERVED1		0xa8</div><div class='add'>+</div><div class='add'>+#define BUS_MATRIX_REMAP_CONFIG		0x00</div><div class='add'>+</div><div class='add'>+#define PCU_CPU0_CTRL			0x00</div><div class='add'>+#define PCU_CPU1_CTRL			0x04</div><div class='add'>+#define PCU_CPU1_ST			0x0c</div><div class='add'>+#define PCU_GLOBAL_CTRL			0x14</div><div class='add'>+#define PCU_EXPEND_CONTROL		0x34</div><div class='add'>+</div><div class='add'>+#define ZX_IRAM_BASE			0x00200000</div><div class='add'>+</div><div class='add'>+static void __iomem *pcu_base;</div><div class='add'>+static void __iomem *matrix_base;</div><div class='add'>+static void __iomem *scu_base;</div><div class='add'>+</div><div class='add'>+void __init zx_smp_prepare_cpus(unsigned int max_cpus)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	unsigned long base = 0;</div><div class='add'>+	void __iomem *aonsysctrl_base;</div><div class='add'>+	void __iomem *sys_iram;</div><div class='add'>+</div><div class='add'>+	base = scu_a9_get_base();</div><div class='add'>+	scu_base = ioremap(base, SZ_256);</div><div class='add'>+	if (!scu_base) {</div><div class='add'>+		pr_err("%s: failed to map scu\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scu_enable(scu_base);</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "zte,sysctrl");</div><div class='add'>+	if (!np) {</div><div class='add'>+		pr_err("%s: failed to find sysctrl node\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aonsysctrl_base = of_iomap(np, 0);</div><div class='add'>+	if (!aonsysctrl_base) {</div><div class='add'>+		pr_err("%s: failed to map aonsysctrl\n", __func__);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write the address of secondary startup into the</div><div class='add'>+	 * system-wide flags register. The BootMonitor waits</div><div class='add'>+	 * until it receives a soft interrupt, and then the</div><div class='add'>+	 * secondary CPU branches to this address.</div><div class='add'>+	 */</div><div class='add'>+	__raw_writel(virt_to_phys(zx_secondary_startup),</div><div class='add'>+		     aonsysctrl_base + AON_SYS_CTRL_RESERVED1);</div><div class='add'>+</div><div class='add'>+	iounmap(aonsysctrl_base);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "zte,zx296702-pcu");</div><div class='add'>+	pcu_base = of_iomap(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	WARN_ON(!pcu_base);</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "zte,zx-bus-matrix");</div><div class='add'>+	matrix_base = of_iomap(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	WARN_ON(!matrix_base);</div><div class='add'>+</div><div class='add'>+	/* Map the first 4 KB IRAM for suspend usage */</div><div class='add'>+	sys_iram = __arm_ioremap_exec(ZX_IRAM_BASE, PAGE_SIZE, false);</div><div class='add'>+	zx_secondary_startup_pa = virt_to_phys(zx_secondary_startup);</div><div class='add'>+	fncpy(sys_iram, &amp;zx_resume_jump, zx_suspend_iram_sz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zx_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='add'>+{</div><div class='add'>+	static bool first_boot = true;</div><div class='add'>+</div><div class='add'>+	if (first_boot) {</div><div class='add'>+		arch_send_wakeup_ipi_mask(cpumask_of(cpu));</div><div class='add'>+		first_boot = false;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Swap the base address mapping between IRAM and IROM */</div><div class='add'>+	writel_relaxed(0x1, matrix_base + BUS_MATRIX_REMAP_CONFIG);</div><div class='add'>+</div><div class='add'>+	/* Power on CPU1 */</div><div class='add'>+	writel_relaxed(0x0, pcu_base + PCU_CPU1_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Wait for power on ack */</div><div class='add'>+	while (readl_relaxed(pcu_base + PCU_CPU1_ST) &amp; 0x4)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	/* Swap back the mapping of IRAM and IROM */</div><div class='add'>+	writel_relaxed(0x0, matrix_base + BUS_MATRIX_REMAP_CONFIG);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+static inline void cpu_enter_lowpower(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int v;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+		"mcr	p15, 0, %1, c7, c5, 0\n"</div><div class='add'>+	"	mcr	p15, 0, %1, c7, c10, 4\n"</div><div class='add'>+	/*</div><div class='add'>+	 * Turn off coherency</div><div class='add'>+	 */</div><div class='add'>+	"	mrc	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	"	bic	%0, %0, %3\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	"	mrc	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	"	bic	%0, %0, %2\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	  : "=&amp;r" (v)</div><div class='add'>+	  : "r" (0), "Ir" (CR_C), "Ir" (0x40)</div><div class='add'>+	  : "cc");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zx_cpu_kill(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(2000);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(0x2, pcu_base + PCU_CPU1_CTRL);</div><div class='add'>+</div><div class='add'>+	while ((readl_relaxed(pcu_base + PCU_CPU1_ST) &amp; 0x3) != 0x0) {</div><div class='add'>+		if (time_after(jiffies, timeout)) {</div><div class='add'>+			pr_err("*** cpu1 poweroff timeout\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zx_cpu_die(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	scu_power_mode(scu_base, SCU_PM_POWEROFF);</div><div class='add'>+	cpu_enter_lowpower();</div><div class='add'>+</div><div class='add'>+	while (1)</div><div class='add'>+		cpu_do_idle();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void zx_secondary_init(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	scu_power_mode(scu_base, SCU_PM_NORMAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct smp_operations zx_smp_ops __initdata = {</div><div class='add'>+	.smp_prepare_cpus	= zx_smp_prepare_cpus,</div><div class='add'>+	.smp_secondary_init	= zx_secondary_init,</div><div class='add'>+	.smp_boot_secondary	= zx_boot_secondary,</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+	.cpu_kill		= zx_cpu_kill,</div><div class='add'>+	.cpu_die		= zx_cpu_die,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+CPU_METHOD_OF_DECLARE(zx_smp, "zte,zx296702-smp", &amp;zx_smp_ops);</div><div class='head'>diff --git a/arch/arm/mach-zx/zx296702.c b/arch/arm/mach-zx/zx296702.c<br/>new file mode 100644<br/>index 000000000000..60bb1a8e1bf1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zx/zx296702.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zx/zx296702.c</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2014 Linaro Ltd.</div><div class='add'>+ * Copyright (C) 2014 ZTE Corporation.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+</div><div class='add'>+static const char *zx296702_dt_compat[] __initconst = {</div><div class='add'>+	"zte,zx296702",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(ZX, "ZTE ZX296702 (Device Tree)")</div><div class='add'>+	.dt_compat	= zx296702_dt_compat,</div><div class='add'>+	.l2c_aux_val    = 0,</div><div class='add'>+	.l2c_aux_mask   = ~0,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c<br/>index 58ef2a700414..616d5840fc2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-zynq/common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-zynq/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zynq/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/common.c</a></div><div class='hunk'>@@ -190,11 +190,6 @@ static void __init zynq_irq_init(void)</div><div class='ctx'> 	irqchip_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void zynq_system_reset(enum reboot_mode mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	zynq_slcr_system_reset();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char * const zynq_dt_match[] = {</div><div class='ctx'> 	"xlnx,zynq-7000",</div><div class='ctx'> 	NULL</div><div class='hunk'>@@ -212,5 +207,4 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")</div><div class='ctx'> 	.init_time	= zynq_timer_init,</div><div class='ctx'> 	.dt_compat	= zynq_dt_match,</div><div class='ctx'> 	.reserve	= zynq_memory_init,</div><div class='del'>-	.restart	= zynq_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h<br/>index 382c60e9aa16..79cda2e5fa4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-zynq/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-zynq/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zynq/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/common.h</a></div><div class='hunk'>@@ -17,11 +17,8 @@</div><div class='ctx'> #ifndef __MACH_ZYNQ_COMMON_H__</div><div class='ctx'> #define __MACH_ZYNQ_COMMON_H__</div><div class='ctx'> </div><div class='del'>-void zynq_secondary_startup(void);</div><div class='del'>-</div><div class='ctx'> extern int zynq_slcr_init(void);</div><div class='ctx'> extern int zynq_early_slcr_init(void);</div><div class='del'>-extern void zynq_slcr_system_reset(void);</div><div class='ctx'> extern void zynq_slcr_cpu_stop(int cpu);</div><div class='ctx'> extern void zynq_slcr_cpu_start(int cpu);</div><div class='ctx'> extern bool zynq_slcr_cpu_state_read(int cpu);</div><div class='head'>diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S<br/>index dd8c071941e7..045c72720a4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-zynq/headsmp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-zynq/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zynq/headsmp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/headsmp.S</a></div><div class='hunk'>@@ -22,8 +22,3 @@ zynq_secondary_trampoline_jump:</div><div class='ctx'> .globl zynq_secondary_trampoline_end</div><div class='ctx'> zynq_secondary_trampoline_end:</div><div class='ctx'> ENDPROC(zynq_secondary_trampoline)</div><div class='del'>-</div><div class='del'>-ENTRY(zynq_secondary_startup)</div><div class='del'>-	bl	v7_invalidate_l1</div><div class='del'>-	b	secondary_startup</div><div class='del'>-ENDPROC(zynq_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c<br/>index 52d768ff7857..f66816c49186 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-zynq/platsmp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-zynq/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zynq/platsmp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/platsmp.c</a></div><div class='hunk'>@@ -87,10 +87,9 @@ int zynq_cpun_start(u32 address, int cpu)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(zynq_cpun_start);</div><div class='ctx'> </div><div class='del'>-static int zynq_boot_secondary(unsigned int cpu,</div><div class='del'>-						struct task_struct *idle)</div><div class='add'>+static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	return zynq_cpun_start(virt_to_phys(zynq_secondary_startup), cpu);</div><div class='add'>+	return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c<br/>index c3c24fd8b306..26320ebf3493 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-zynq/slcr.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mach-zynq/slcr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-zynq/slcr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mach-zynq/slcr.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/syscon.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='hunk'>@@ -92,20 +93,21 @@ u32 zynq_slcr_get_device_id(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * zynq_slcr_system_reset - Reset the entire system.</div><div class='add'>+ * zynq_slcr_system_restart - Restart the entire system.</div><div class='add'>+ *</div><div class='add'>+ * @nb:		Pointer to restart notifier block (unused)</div><div class='add'>+ * @action:	Reboot mode (unused)</div><div class='add'>+ * @data:	Restart handler private data (unused)</div><div class='add'>+ *</div><div class='add'>+ * Return:	0 always</div><div class='ctx'>  */</div><div class='del'>-void zynq_slcr_system_reset(void)</div><div class='add'>+static</div><div class='add'>+int zynq_slcr_system_restart(struct notifier_block *nb,</div><div class='add'>+			     unsigned long action, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reboot;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Unlock the SLCR then reset the system.</div><div class='del'>-	 * Note that this seems to require raw i/o</div><div class='del'>-	 * functions or there's a lockup?</div><div class='del'>-	 */</div><div class='del'>-	zynq_slcr_unlock();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Clear 0x0F000000 bits of reboot status register to workaround</div><div class='ctx'> 	 * the FSBL not loading the bitstream after soft-reboot</div><div class='ctx'> 	 * This is a temporary solution until we know more.</div><div class='hunk'>@@ -113,8 +115,14 @@ void zynq_slcr_system_reset(void)</div><div class='ctx'> 	zynq_slcr_read(&amp;reboot, SLCR_REBOOT_STATUS_OFFSET);</div><div class='ctx'> 	zynq_slcr_write(reboot &amp; 0xF0FFFFFF, SLCR_REBOOT_STATUS_OFFSET);</div><div class='ctx'> 	zynq_slcr_write(1, SLCR_PS_RST_CTRL_OFFSET);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct notifier_block zynq_slcr_restart_nb = {</div><div class='add'>+	.notifier_call	= zynq_slcr_system_restart,</div><div class='add'>+	.priority	= 192,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * zynq_slcr_cpu_start - Start cpu</div><div class='ctx'>  * @cpu:	cpu number</div><div class='hunk'>@@ -219,6 +227,8 @@ int __init zynq_early_slcr_init(void)</div><div class='ctx'> 	/* unlock the SLCR so that registers can be changed */</div><div class='ctx'> 	zynq_slcr_unlock();</div><div class='ctx'> </div><div class='add'>+	register_restart_handler(&amp;zynq_slcr_restart_nb);</div><div class='add'>+</div><div class='ctx'> 	pr_info("%s mapped to %p\n", np-&gt;name, zynq_slcr_base);</div><div class='ctx'> </div><div class='ctx'> 	of_node_put(np);</div><div class='head'>diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig<br/>index b4f92b9a13ac..7c6b976ab8d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ comment "Processor Type"</div><div class='ctx'> </div><div class='ctx'> # ARM7TDMI</div><div class='ctx'> config CPU_ARM7TDMI</div><div class='del'>-	bool "Support ARM7TDMI processor"</div><div class='add'>+	bool</div><div class='ctx'> 	depends on !MMU</div><div class='ctx'> 	select CPU_32v4T</div><div class='ctx'> 	select CPU_ABRT_LV4T</div><div class='hunk'>@@ -56,7 +56,7 @@ config CPU_ARM740T</div><div class='ctx'> </div><div class='ctx'> # ARM9TDMI</div><div class='ctx'> config CPU_ARM9TDMI</div><div class='del'>-	bool "Support ARM9TDMI processor"</div><div class='add'>+	bool</div><div class='ctx'> 	depends on !MMU</div><div class='ctx'> 	select CPU_32v4T</div><div class='ctx'> 	select CPU_ABRT_NOMMU</div><div class='hunk'>@@ -604,6 +604,22 @@ config CPU_USE_DOMAINS</div><div class='ctx'> 	  This option enables or disables the use of domain switching</div><div class='ctx'> 	  via the set_fs() function.</div><div class='ctx'> </div><div class='add'>+config CPU_V7M_NUM_IRQ</div><div class='add'>+	int "Number of external interrupts connected to the NVIC"</div><div class='add'>+	depends on CPU_V7M</div><div class='add'>+	default 90 if ARCH_STM32</div><div class='add'>+	default 38 if ARCH_EFM32</div><div class='add'>+	default 112 if SOC_VF610</div><div class='add'>+	default 240</div><div class='add'>+	help</div><div class='add'>+	  This option indicates the number of interrupts connected to the NVIC.</div><div class='add'>+	  The value can be larger than the real number of interrupts supported</div><div class='add'>+	  by the system, but must not be lower.</div><div class='add'>+	  The default value is 240, corresponding to the maximum number of</div><div class='add'>+	  interrupts supported by the NVIC on Cortex-M family.</div><div class='add'>+</div><div class='add'>+	  If unsure, keep default value.</div><div class='add'>+</div><div class='ctx'> #</div><div class='ctx'> # CPU supports 36-bit I/O</div><div class='ctx'> #</div><div class='hunk'>@@ -624,6 +640,10 @@ config ARM_LPAE</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config ARM_PV_FIXUP</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on ARM_LPAE &amp;&amp; ARM_PATCH_PHYS_VIRT &amp;&amp; ARCH_KEYSTONE</div><div class='add'>+</div><div class='ctx'> config ARCH_PHYS_ADDR_T_64BIT</div><div class='ctx'> 	def_bool ARM_LPAE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile<br/>index d3afdf9eb65a..57c8df500e8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/Makefile</a></div><div class='hunk'>@@ -18,6 +18,7 @@ obj-$(CONFIG_MODULES)		+= proc-syms.o</div><div class='ctx'> obj-$(CONFIG_ALIGNMENT_TRAP)	+= alignment.o</div><div class='ctx'> obj-$(CONFIG_HIGHMEM)		+= highmem.o</div><div class='ctx'> obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o</div><div class='add'>+obj-$(CONFIG_ARM_PV_FIXUP)	+= pv-fixup-asm.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CPU_ABRT_NOMMU)	+= abort-nommu.o</div><div class='ctx'> obj-$(CONFIG_CPU_ABRT_EV4)	+= abort-ev4.o</div><div class='hunk'>@@ -55,6 +56,8 @@ obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o</div><div class='ctx'> obj-$(CONFIG_CPU_XSC3)		+= copypage-xsc3.o</div><div class='ctx'> obj-$(CONFIG_CPU_COPY_FA)	+= copypage-fa.o</div><div class='ctx'> </div><div class='add'>+CFLAGS_copypage-feroceon.o := -march=armv5te</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WT)	+= tlb-v4.o</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WB)	+= tlb-v4wb.o</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WBI)	+= tlb-v4wbi.o</div><div class='head'>diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c<br/>index e309c8f35af5..71b3d3309024 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-l2x0.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/cache-l2x0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-l2x0.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/cache-l2x0.c</a></div><div class='hunk'>@@ -38,10 +38,11 @@ struct l2c_init_data {</div><div class='ctx'> 	unsigned way_size_0;</div><div class='ctx'> 	unsigned num_lock;</div><div class='ctx'> 	void (*of_parse)(const struct device_node *, u32 *, u32 *);</div><div class='del'>-	void (*enable)(void __iomem *, u32, unsigned);</div><div class='add'>+	void (*enable)(void __iomem *, unsigned);</div><div class='ctx'> 	void (*fixup)(void __iomem *, u32, struct outer_cache_fns *);</div><div class='ctx'> 	void (*save)(void __iomem *);</div><div class='ctx'> 	void (*configure)(void __iomem *);</div><div class='add'>+	void (*unlock)(void __iomem *, unsigned);</div><div class='ctx'> 	struct outer_cache_fns outer_cache;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -110,14 +111,6 @@ static inline void l2c_unlock(void __iomem *base, unsigned num)</div><div class='ctx'> </div><div class='ctx'> static void l2c_configure(void __iomem *base)</div><div class='ctx'> {</div><div class='del'>-	if (outer_cache.configure) {</div><div class='del'>-		outer_cache.configure(&amp;l2x0_saved_regs);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (l2x0_data-&gt;configure)</div><div class='del'>-		l2x0_data-&gt;configure(base);</div><div class='del'>-</div><div class='ctx'> 	l2c_write_sec(l2x0_saved_regs.aux_ctrl, base, L2X0_AUX_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -125,18 +118,16 @@ static void l2c_configure(void __iomem *base)</div><div class='ctx'>  * Enable the L2 cache controller.  This function must only be</div><div class='ctx'>  * called when the cache controller is known to be disabled.</div><div class='ctx'>  */</div><div class='del'>-static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)</div><div class='add'>+static void l2c_enable(void __iomem *base, unsigned num_lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	/* Do not touch the controller if already enabled. */</div><div class='del'>-	if (readl_relaxed(base + L2X0_CTRL) &amp; L2X0_CTRL_EN)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	l2x0_saved_regs.aux_ctrl = aux;</div><div class='del'>-	l2c_configure(base);</div><div class='add'>+	if (outer_cache.configure)</div><div class='add'>+		outer_cache.configure(&amp;l2x0_saved_regs);</div><div class='add'>+	else</div><div class='add'>+		l2x0_data-&gt;configure(base);</div><div class='ctx'> </div><div class='del'>-	l2c_unlock(base, num_lock);</div><div class='add'>+	l2x0_data-&gt;unlock(base, num_lock);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	__l2c_op_way(base + L2X0_INV_WAY);</div><div class='hunk'>@@ -163,7 +154,11 @@ static void l2c_save(void __iomem *base)</div><div class='ctx'> </div><div class='ctx'> static void l2c_resume(void)</div><div class='ctx'> {</div><div class='del'>-	l2c_enable(l2x0_base, l2x0_saved_regs.aux_ctrl, l2x0_data-&gt;num_lock);</div><div class='add'>+	void __iomem *base = l2x0_base;</div><div class='add'>+</div><div class='add'>+	/* Do not touch the controller if already enabled. */</div><div class='add'>+	if (!(readl_relaxed(base + L2X0_CTRL) &amp; L2X0_CTRL_EN))</div><div class='add'>+		l2c_enable(base, l2x0_data-&gt;num_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -252,6 +247,8 @@ static const struct l2c_init_data l2c210_data __initconst = {</div><div class='ctx'> 	.num_lock = 1,</div><div class='ctx'> 	.enable = l2c_enable,</div><div class='ctx'> 	.save = l2c_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range = l2c210_inv_range,</div><div class='ctx'> 		.clean_range = l2c210_clean_range,</div><div class='hunk'>@@ -391,16 +388,22 @@ static void l2c220_sync(void)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;l2x0_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void l2c220_enable(void __iomem *base, u32 aux, unsigned num_lock)</div><div class='add'>+static void l2c220_enable(void __iomem *base, unsigned num_lock)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Always enable non-secure access to the lockdown registers -</div><div class='ctx'> 	 * we write to them as part of the L2C enable sequence so they</div><div class='ctx'> 	 * need to be accessible.</div><div class='ctx'> 	 */</div><div class='del'>-	aux |= L220_AUX_CTRL_NS_LOCKDOWN;</div><div class='add'>+	l2x0_saved_regs.aux_ctrl |= L220_AUX_CTRL_NS_LOCKDOWN;</div><div class='ctx'> </div><div class='del'>-	l2c_enable(base, aux, num_lock);</div><div class='add'>+	l2c_enable(base, num_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void l2c220_unlock(void __iomem *base, unsigned num_lock)</div><div class='add'>+{</div><div class='add'>+	if (readl_relaxed(base + L2X0_AUX_CTRL) &amp; L220_AUX_CTRL_NS_LOCKDOWN)</div><div class='add'>+		l2c_unlock(base, num_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct l2c_init_data l2c220_data = {</div><div class='hunk'>@@ -409,6 +412,8 @@ static const struct l2c_init_data l2c220_data = {</div><div class='ctx'> 	.num_lock = 1,</div><div class='ctx'> 	.enable = l2c220_enable,</div><div class='ctx'> 	.save = l2c_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c220_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range = l2c220_inv_range,</div><div class='ctx'> 		.clean_range = l2c220_clean_range,</div><div class='hunk'>@@ -569,6 +574,8 @@ static void l2c310_configure(void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned revision;</div><div class='ctx'> </div><div class='add'>+	l2c_configure(base);</div><div class='add'>+</div><div class='ctx'> 	/* restore pl310 setup */</div><div class='ctx'> 	l2c_write_sec(l2x0_saved_regs.tag_latency, base,</div><div class='ctx'> 		      L310_TAG_LATENCY_CTRL);</div><div class='hunk'>@@ -603,10 +610,11 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v</div><div class='ctx'> 	return NOTIFY_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)</div><div class='add'>+static void __init l2c310_enable(void __iomem *base, unsigned num_lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) &amp; L2X0_CACHE_ID_RTL_MASK;</div><div class='ctx'> 	bool cortex_a9 = read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;</div><div class='add'>+	u32 aux = l2x0_saved_regs.aux_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	if (rev &gt;= L310_CACHE_ID_RTL_R2P0) {</div><div class='ctx'> 		if (cortex_a9) {</div><div class='hunk'>@@ -649,9 +657,9 @@ static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)</div><div class='ctx'> 	 * we write to them as part of the L2C enable sequence so they</div><div class='ctx'> 	 * need to be accessible.</div><div class='ctx'> 	 */</div><div class='del'>-	aux |= L310_AUX_CTRL_NS_LOCKDOWN;</div><div class='add'>+	l2x0_saved_regs.aux_ctrl = aux | L310_AUX_CTRL_NS_LOCKDOWN;</div><div class='ctx'> </div><div class='del'>-	l2c_enable(base, aux, num_lock);</div><div class='add'>+	l2c_enable(base, num_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Read back resulting AUX_CTRL value as it could have been altered. */</div><div class='ctx'> 	aux = readl_relaxed(base + L2X0_AUX_CTRL);</div><div class='hunk'>@@ -755,6 +763,12 @@ static void l2c310_resume(void)</div><div class='ctx'> 		set_auxcr(get_auxcr() | BIT(3) | BIT(2) | BIT(1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void l2c310_unlock(void __iomem *base, unsigned num_lock)</div><div class='add'>+{</div><div class='add'>+	if (readl_relaxed(base + L2X0_AUX_CTRL) &amp; L310_AUX_CTRL_NS_LOCKDOWN)</div><div class='add'>+		l2c_unlock(base, num_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct l2c_init_data l2c310_init_fns __initconst = {</div><div class='ctx'> 	.type = "L2C-310",</div><div class='ctx'> 	.way_size_0 = SZ_8K,</div><div class='hunk'>@@ -763,6 +777,7 @@ static const struct l2c_init_data l2c310_init_fns __initconst = {</div><div class='ctx'> 	.fixup = l2c310_fixup,</div><div class='ctx'> 	.save = l2c310_save,</div><div class='ctx'> 	.configure = l2c310_configure,</div><div class='add'>+	.unlock = l2c310_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range = l2c210_inv_range,</div><div class='ctx'> 		.clean_range = l2c210_clean_range,</div><div class='hunk'>@@ -856,8 +871,11 @@ static int __init __l2c_init(const struct l2c_init_data *data,</div><div class='ctx'> 	 * Check if l2x0 controller is already enabled.  If we are booting</div><div class='ctx'> 	 * in non-secure mode accessing the below registers will fault.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(readl_relaxed(l2x0_base + L2X0_CTRL) &amp; L2X0_CTRL_EN))</div><div class='del'>-		data-&gt;enable(l2x0_base, aux, data-&gt;num_lock);</div><div class='add'>+	if (!(readl_relaxed(l2x0_base + L2X0_CTRL) &amp; L2X0_CTRL_EN)) {</div><div class='add'>+		l2x0_saved_regs.aux_ctrl = aux;</div><div class='add'>+</div><div class='add'>+		data-&gt;enable(l2x0_base, data-&gt;num_lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	outer_cache = fns;</div><div class='ctx'> </div><div class='hunk'>@@ -1066,6 +1084,8 @@ static const struct l2c_init_data of_l2c210_data __initconst = {</div><div class='ctx'> 	.of_parse = l2x0_of_parse,</div><div class='ctx'> 	.enable = l2c_enable,</div><div class='ctx'> 	.save = l2c_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = l2c210_inv_range,</div><div class='ctx'> 		.clean_range = l2c210_clean_range,</div><div class='hunk'>@@ -1084,6 +1104,8 @@ static const struct l2c_init_data of_l2c220_data __initconst = {</div><div class='ctx'> 	.of_parse = l2x0_of_parse,</div><div class='ctx'> 	.enable = l2c220_enable,</div><div class='ctx'> 	.save = l2c_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c220_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = l2c220_inv_range,</div><div class='ctx'> 		.clean_range = l2c220_clean_range,</div><div class='hunk'>@@ -1199,6 +1221,26 @@ static void __init l2c310_of_parse(const struct device_node *np,</div><div class='ctx'> 		pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = of_property_read_u32(np, "prefetch-data", &amp;val);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		if (val)</div><div class='add'>+			prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH;</div><div class='add'>+		else</div><div class='add'>+			prefetch &amp;= ~L310_PREFETCH_CTRL_DATA_PREFETCH;</div><div class='add'>+	} else if (ret != -EINVAL) {</div><div class='add'>+		pr_err("L2C-310 OF prefetch-data property value is missing\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(np, "prefetch-instr", &amp;val);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		if (val)</div><div class='add'>+			prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH;</div><div class='add'>+		else</div><div class='add'>+			prefetch &amp;= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;</div><div class='add'>+	} else if (ret != -EINVAL) {</div><div class='add'>+		pr_err("L2C-310 OF prefetch-instr property value is missing\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	l2x0_saved_regs.prefetch_ctrl = prefetch;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1211,6 +1253,7 @@ static const struct l2c_init_data of_l2c310_data __initconst = {</div><div class='ctx'> 	.fixup = l2c310_fixup,</div><div class='ctx'> 	.save  = l2c310_save,</div><div class='ctx'> 	.configure = l2c310_configure,</div><div class='add'>+	.unlock = l2c310_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = l2c210_inv_range,</div><div class='ctx'> 		.clean_range = l2c210_clean_range,</div><div class='hunk'>@@ -1240,6 +1283,7 @@ static const struct l2c_init_data of_l2c310_coherent_data __initconst = {</div><div class='ctx'> 	.fixup = l2c310_fixup,</div><div class='ctx'> 	.save  = l2c310_save,</div><div class='ctx'> 	.configure = l2c310_configure,</div><div class='add'>+	.unlock = l2c310_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = l2c210_inv_range,</div><div class='ctx'> 		.clean_range = l2c210_clean_range,</div><div class='hunk'>@@ -1366,7 +1410,7 @@ static void aurora_save(void __iomem *base)</div><div class='ctx'>  * For Aurora cache in no outer mode, enable via the CP15 coprocessor</div><div class='ctx'>  * broadcasting of cache commands to L2.</div><div class='ctx'>  */</div><div class='del'>-static void __init aurora_enable_no_outer(void __iomem *base, u32 aux,</div><div class='add'>+static void __init aurora_enable_no_outer(void __iomem *base,</div><div class='ctx'> 	unsigned num_lock)</div><div class='ctx'> {</div><div class='ctx'> 	u32 u;</div><div class='hunk'>@@ -1377,7 +1421,7 @@ static void __init aurora_enable_no_outer(void __iomem *base, u32 aux,</div><div class='ctx'> </div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='del'>-	l2c_enable(base, aux, num_lock);</div><div class='add'>+	l2c_enable(base, num_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init aurora_fixup(void __iomem *base, u32 cache_id,</div><div class='hunk'>@@ -1416,6 +1460,8 @@ static const struct l2c_init_data of_aurora_with_outer_data __initconst = {</div><div class='ctx'> 	.enable = l2c_enable,</div><div class='ctx'> 	.fixup = aurora_fixup,</div><div class='ctx'> 	.save  = aurora_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = aurora_inv_range,</div><div class='ctx'> 		.clean_range = aurora_clean_range,</div><div class='hunk'>@@ -1435,6 +1481,8 @@ static const struct l2c_init_data of_aurora_no_outer_data __initconst = {</div><div class='ctx'> 	.enable = aurora_enable_no_outer,</div><div class='ctx'> 	.fixup = aurora_fixup,</div><div class='ctx'> 	.save  = aurora_save,</div><div class='add'>+	.configure = l2c_configure,</div><div class='add'>+	.unlock = l2c_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.resume      = l2c_resume,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1585,6 +1633,7 @@ static const struct l2c_init_data of_bcm_l2x0_data __initconst = {</div><div class='ctx'> 	.enable = l2c310_enable,</div><div class='ctx'> 	.save  = l2c310_save,</div><div class='ctx'> 	.configure = l2c310_configure,</div><div class='add'>+	.unlock = l2c310_unlock,</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.inv_range   = bcm_inv_range,</div><div class='ctx'> 		.clean_range = bcm_clean_range,</div><div class='hunk'>@@ -1608,6 +1657,7 @@ static void __init tauros3_save(void __iomem *base)</div><div class='ctx'> </div><div class='ctx'> static void tauros3_configure(void __iomem *base)</div><div class='ctx'> {</div><div class='add'>+	l2c_configure(base);</div><div class='ctx'> 	writel_relaxed(l2x0_saved_regs.aux2_ctrl,</div><div class='ctx'> 		       base + TAUROS3_AUX2_CTRL);</div><div class='ctx'> 	writel_relaxed(l2x0_saved_regs.prefetch_ctrl,</div><div class='hunk'>@@ -1621,6 +1671,7 @@ static const struct l2c_init_data of_tauros3_data __initconst = {</div><div class='ctx'> 	.enable = l2c_enable,</div><div class='ctx'> 	.save  = tauros3_save,</div><div class='ctx'> 	.configure = tauros3_configure,</div><div class='add'>+	.unlock = l2c_unlock,</div><div class='ctx'> 	/* Tauros3 broadcasts L1 cache operations to L2 */</div><div class='ctx'> 	.outer_cache = {</div><div class='ctx'> 		.resume      = l2c_resume,</div><div class='head'>diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c<br/>index 7e7583ddd607..cba12f34ff77 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/dma-mapping.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/dma-mapping.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/dma-mapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/dma-mapping.c</a></div><div class='hunk'>@@ -148,11 +148,14 @@ static void *arm_coherent_dma_alloc(struct device *dev, size_t size,</div><div class='ctx'> 	dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);</div><div class='ctx'> static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,</div><div class='ctx'> 				  dma_addr_t handle, struct dma_attrs *attrs);</div><div class='add'>+static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		 void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		 struct dma_attrs *attrs);</div><div class='ctx'> </div><div class='ctx'> struct dma_map_ops arm_coherent_dma_ops = {</div><div class='ctx'> 	.alloc			= arm_coherent_dma_alloc,</div><div class='ctx'> 	.free			= arm_coherent_dma_free,</div><div class='del'>-	.mmap			= arm_dma_mmap,</div><div class='add'>+	.mmap			= arm_coherent_dma_mmap,</div><div class='ctx'> 	.get_sgtable		= arm_dma_get_sgtable,</div><div class='ctx'> 	.map_page		= arm_coherent_dma_map_page,</div><div class='ctx'> 	.map_sg			= arm_dma_map_sg,</div><div class='hunk'>@@ -690,10 +693,7 @@ static void *arm_coherent_dma_alloc(struct device *dev, size_t size,</div><div class='ctx'> 			   attrs, __builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Create userspace mapping for the DMA-coherent memory.</div><div class='del'>- */</div><div class='del'>-int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='ctx'> 		 void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='ctx'> 		 struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='hunk'>@@ -704,8 +704,6 @@ int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='ctx'> 	unsigned long pfn = dma_to_pfn(dev, dma_addr);</div><div class='ctx'> 	unsigned long off = vma-&gt;vm_pgoff;</div><div class='ctx'> </div><div class='del'>-	vma-&gt;vm_page_prot = __get_dma_pgprot(attrs, vma-&gt;vm_page_prot);</div><div class='del'>-</div><div class='ctx'> 	if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &amp;ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -721,6 +719,26 @@ int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Create userspace mapping for the DMA-coherent memory.</div><div class='add'>+ */</div><div class='add'>+static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		 void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		 struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		 void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		 struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+	vma-&gt;vm_page_prot = __get_dma_pgprot(attrs, vma-&gt;vm_page_prot);</div><div class='add'>+#endif	/* CONFIG_MMU */</div><div class='add'>+	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Free a buffer as defined by the above mapping.</div><div class='ctx'>  */</div><div class='ctx'> static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,</div><div class='hunk'>@@ -1953,7 +1971,7 @@ static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)</div><div class='ctx'> {</div><div class='ctx'> 	int next_bitmap;</div><div class='ctx'> </div><div class='del'>-	if (mapping-&gt;nr_bitmaps &gt; mapping-&gt;extensions)</div><div class='add'>+	if (mapping-&gt;nr_bitmaps &gt;= mapping-&gt;extensions)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	next_bitmap = mapping-&gt;nr_bitmaps;</div><div class='head'>diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c<br/>index 6333d9c17875..0d629b8f973f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/fault.c</a></div><div class='hunk'>@@ -276,7 +276,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c<br/>index b98895d9fe57..ee8dfa793989 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/highmem.c</a></div><div class='hunk'>@@ -59,6 +59,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	void *kmap;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -121,6 +122,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> 		kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)]));</div><div class='ctx'> 	}</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='hunk'>@@ -130,6 +132,7 @@ void *kmap_atomic_pfn(unsigned long pfn)</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> 	struct page *page = pfn_to_page(pfn);</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='head'>diff --git a/arch/arm/mm/hugetlbpage.c b/arch/arm/mm/hugetlbpage.c<br/>index c72412415093..fcafb521f14e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -41,11 +41,6 @@ int pud_huge(pud_t pud)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pmd_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	return pmd_val(pmd) &amp;&amp; !(pmd_val(pmd) &amp; PMD_TABLE_BIT);</div><div class='head'>diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c<br/>index be92fa0f2f35..8a63b4cdc0f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/init.c</a></div><div class='hunk'>@@ -268,6 +268,7 @@ void __init arm_memblock_init(const struct machine_desc *mdesc)</div><div class='ctx'> 	if (mdesc-&gt;reserve)</div><div class='ctx'> 		mdesc-&gt;reserve();</div><div class='ctx'> </div><div class='add'>+	early_init_fdt_reserve_self();</div><div class='ctx'> 	early_init_fdt_scan_reserved_mem();</div><div class='ctx'> </div><div class='ctx'> 	/* reserve memory for DMA contiguous allocations */</div><div class='head'>diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c<br/>index d1e5ad7ab3bc..0c81056c1dd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/ioremap.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/ioremap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/ioremap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/ioremap.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,</div><div class='add'>+static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,</div><div class='ctx'> 	unsigned long offset, size_t size, unsigned int mtype, void *caller)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mem_type *type;</div><div class='hunk'>@@ -363,7 +363,7 @@ __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,</div><div class='ctx'> 		  unsigned int mtype)</div><div class='ctx'> {</div><div class='ctx'> 	return __arm_ioremap_pfn_caller(pfn, offset, size, mtype,</div><div class='del'>-			__builtin_return_address(0));</div><div class='add'>+					__builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__arm_ioremap_pfn);</div><div class='ctx'> </div><div class='hunk'>@@ -371,13 +371,26 @@ void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t,</div><div class='ctx'> 				      unsigned int, void *) =</div><div class='ctx'> 	__arm_ioremap_caller;</div><div class='ctx'> </div><div class='del'>-void __iomem *</div><div class='del'>-__arm_ioremap(phys_addr_t phys_addr, size_t size, unsigned int mtype)</div><div class='add'>+void __iomem *ioremap(resource_size_t res_cookie, size_t size)</div><div class='add'>+{</div><div class='add'>+	return arch_ioremap_caller(res_cookie, size, MT_DEVICE,</div><div class='add'>+				   __builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ioremap);</div><div class='add'>+</div><div class='add'>+void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size)</div><div class='add'>+{</div><div class='add'>+	return arch_ioremap_caller(res_cookie, size, MT_DEVICE_CACHED,</div><div class='add'>+				   __builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ioremap_cache);</div><div class='add'>+</div><div class='add'>+void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size)</div><div class='ctx'> {</div><div class='del'>-	return arch_ioremap_caller(phys_addr, size, mtype,</div><div class='del'>-		__builtin_return_address(0));</div><div class='add'>+	return arch_ioremap_caller(res_cookie, size, MT_DEVICE_WC,</div><div class='add'>+				   __builtin_return_address(0));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__arm_ioremap);</div><div class='add'>+EXPORT_SYMBOL(ioremap_wc);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Remap an arbitrary physical address space into the kernel virtual</div><div class='hunk'>@@ -431,11 +444,11 @@ void __iounmap(volatile void __iomem *io_addr)</div><div class='ctx'> </div><div class='ctx'> void (*arch_iounmap)(volatile void __iomem *) = __iounmap;</div><div class='ctx'> </div><div class='del'>-void __arm_iounmap(volatile void __iomem *io_addr)</div><div class='add'>+void iounmap(volatile void __iomem *cookie)</div><div class='ctx'> {</div><div class='del'>-	arch_iounmap(io_addr);</div><div class='add'>+	arch_iounmap(cookie);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__arm_iounmap);</div><div class='add'>+EXPORT_SYMBOL(iounmap);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> static int pci_ioremap_mem_type = MT_DEVICE;</div><div class='head'>diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c<br/>index 7186382672b5..870838a46d52 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/mmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/mmu.c</a></div><div class='hunk'>@@ -1072,6 +1072,7 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 	int highmem = 0;</div><div class='ctx'> 	phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1;</div><div class='ctx'> 	struct memblock_region *reg;</div><div class='add'>+	bool should_use_highmem = false;</div><div class='ctx'> </div><div class='ctx'> 	for_each_memblock(memory, reg) {</div><div class='ctx'> 		phys_addr_t block_start = reg-&gt;base;</div><div class='hunk'>@@ -1090,6 +1091,7 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 				pr_notice("Ignoring RAM at %pa-%pa (!CONFIG_HIGHMEM)\n",</div><div class='ctx'> 					  &amp;block_start, &amp;block_end);</div><div class='ctx'> 				memblock_remove(reg-&gt;base, reg-&gt;size);</div><div class='add'>+				should_use_highmem = true;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -1100,6 +1102,7 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 					  &amp;block_start, &amp;block_end, &amp;vmalloc_limit);</div><div class='ctx'> 				memblock_remove(vmalloc_limit, overlap_size);</div><div class='ctx'> 				block_end = vmalloc_limit;</div><div class='add'>+				should_use_highmem = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1134,6 +1137,9 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (should_use_highmem)</div><div class='add'>+		pr_notice("Consider using a HIGHMEM enabled kernel.\n");</div><div class='add'>+</div><div class='ctx'> 	high_memory = __va(arm_lowmem_limit - 1) + 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1387,123 +1393,98 @@ static void __init map_lowmem(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM_LPAE</div><div class='add'>+#ifdef CONFIG_ARM_PV_FIXUP</div><div class='add'>+extern unsigned long __atags_pointer;</div><div class='add'>+typedef void pgtables_remap(long long offset, unsigned long pgd, void *bdata);</div><div class='add'>+pgtables_remap lpae_pgtables_remap_asm;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * early_paging_init() recreates boot time page table setup, allowing machines</div><div class='ctx'>  * to switch over to a high (&gt;4G) address space on LPAE systems</div><div class='ctx'>  */</div><div class='del'>-void __init early_paging_init(const struct machine_desc *mdesc,</div><div class='del'>-			      struct proc_info_list *procinfo)</div><div class='add'>+void __init early_paging_init(const struct machine_desc *mdesc)</div><div class='ctx'> {</div><div class='del'>-	pmdval_t pmdprot = procinfo-&gt;__cpu_mm_mmu_flags;</div><div class='del'>-	unsigned long map_start, map_end;</div><div class='del'>-	pgd_t *pgd0, *pgdk;</div><div class='del'>-	pud_t *pud0, *pudk, *pud_start;</div><div class='del'>-	pmd_t *pmd0, *pmdk;</div><div class='del'>-	phys_addr_t phys;</div><div class='del'>-	int i;</div><div class='add'>+	pgtables_remap *lpae_pgtables_remap;</div><div class='add'>+	unsigned long pa_pgd;</div><div class='add'>+	unsigned int cr, ttbcr;</div><div class='add'>+	long long offset;</div><div class='add'>+	void *boot_data;</div><div class='ctx'> </div><div class='del'>-	if (!(mdesc-&gt;init_meminfo))</div><div class='add'>+	if (!mdesc-&gt;pv_fixup)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* remap kernel code and data */</div><div class='del'>-	map_start = init_mm.start_code &amp; PMD_MASK;</div><div class='del'>-	map_end   = ALIGN(init_mm.brk, PMD_SIZE);</div><div class='add'>+	offset = mdesc-&gt;pv_fixup();</div><div class='add'>+	if (offset == 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* get a handle on things... */</div><div class='del'>-	pgd0 = pgd_offset_k(0);</div><div class='del'>-	pud_start = pud0 = pud_offset(pgd0, 0);</div><div class='del'>-	pmd0 = pmd_offset(pud0, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * Get the address of the remap function in the 1:1 identity</div><div class='add'>+	 * mapping setup by the early page table assembly code.  We</div><div class='add'>+	 * must get this prior to the pv update.  The following barrier</div><div class='add'>+	 * ensures that this is complete before we fixup any P:V offsets.</div><div class='add'>+	 */</div><div class='add'>+	lpae_pgtables_remap = (pgtables_remap *)(unsigned long)__pa(lpae_pgtables_remap_asm);</div><div class='add'>+	pa_pgd = __pa(swapper_pg_dir);</div><div class='add'>+	boot_data = __va(__atags_pointer);</div><div class='add'>+	barrier();</div><div class='ctx'> </div><div class='del'>-	pgdk = pgd_offset_k(map_start);</div><div class='del'>-	pudk = pud_offset(pgdk, map_start);</div><div class='del'>-	pmdk = pmd_offset(pudk, map_start);</div><div class='add'>+	pr_info("Switching physical address space to 0x%08llx\n",</div><div class='add'>+		(u64)PHYS_OFFSET + offset);</div><div class='ctx'> </div><div class='del'>-	mdesc-&gt;init_meminfo();</div><div class='add'>+	/* Re-set the phys pfn offset, and the pv offset */</div><div class='add'>+	__pv_offset += offset;</div><div class='add'>+	__pv_phys_pfn_offset += PFN_DOWN(offset);</div><div class='ctx'> </div><div class='ctx'> 	/* Run the patch stub to update the constants */</div><div class='ctx'> 	fixup_pv_table(&amp;__pv_table_begin,</div><div class='ctx'> 		(&amp;__pv_table_end - &amp;__pv_table_begin) &lt;&lt; 2);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Cache cleaning operations for self-modifying code</div><div class='del'>-	 * We should clean the entries by MVA but running a</div><div class='del'>-	 * for loop over every pv_table entry pointer would</div><div class='del'>-	 * just complicate the code.</div><div class='del'>-	 */</div><div class='del'>-	flush_cache_louis();</div><div class='del'>-	dsb(ishst);</div><div class='del'>-	isb();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: This code is not architecturally compliant: we modify</div><div class='del'>-	 * the mappings in-place, indeed while they are in use by this</div><div class='del'>-	 * very same code.  This may lead to unpredictable behaviour of</div><div class='del'>-	 * the CPU.</div><div class='del'>-	 *</div><div class='del'>-	 * Even modifying the mappings in a separate page table does</div><div class='del'>-	 * not resolve this.</div><div class='del'>-	 *</div><div class='del'>-	 * The architecture strongly recommends that when a mapping is</div><div class='del'>-	 * changed, that it is changed by first going via an invalid</div><div class='del'>-	 * mapping and back to the new mapping.  This is to ensure that</div><div class='del'>-	 * no TLB conflicts (caused by the TLB having more than one TLB</div><div class='del'>-	 * entry match a translation) can occur.  However, doing that</div><div class='del'>-	 * here will result in unmapping the code we are running.</div><div class='del'>-	 */</div><div class='del'>-	pr_warn("WARNING: unsafe modification of in-place page tables - tainting kernel\n");</div><div class='del'>-	add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Remap level 1 table.  This changes the physical addresses</div><div class='del'>-	 * used to refer to the level 2 page tables to the high</div><div class='del'>-	 * physical address alias, leaving everything else the same.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; PTRS_PER_PGD; pud0++, i++) {</div><div class='del'>-		set_pud(pud0,</div><div class='del'>-			__pud(__pa(pmd0) | PMD_TYPE_TABLE | L_PGD_SWAPPER));</div><div class='del'>-		pmd0 += PTRS_PER_PMD;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Remap the level 2 table, pointing the mappings at the high</div><div class='del'>-	 * physical address alias of these pages.</div><div class='del'>-	 */</div><div class='del'>-	phys = __pa(map_start);</div><div class='del'>-	do {</div><div class='del'>-		*pmdk++ = __pmd(phys | pmdprot);</div><div class='del'>-		phys += PMD_SIZE;</div><div class='del'>-	} while (phys &lt; map_end);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure that the above updates are flushed out of the cache.</div><div class='del'>-	 * This is not strictly correct; on a system where the caches</div><div class='del'>-	 * are coherent with each other, but the MMU page table walks</div><div class='del'>-	 * may not be coherent, flush_cache_all() may be a no-op, and</div><div class='del'>-	 * this will fail.</div><div class='add'>+	 * We changing not only the virtual to physical mapping, but also</div><div class='add'>+	 * the physical addresses used to access memory.  We need to flush</div><div class='add'>+	 * all levels of cache in the system with caching disabled to</div><div class='add'>+	 * ensure that all data is written back, and nothing is prefetched</div><div class='add'>+	 * into the caches.  We also need to prevent the TLB walkers</div><div class='add'>+	 * allocating into the caches too.  Note that this is ARMv7 LPAE</div><div class='add'>+	 * specific.</div><div class='ctx'> 	 */</div><div class='add'>+	cr = get_cr();</div><div class='add'>+	set_cr(cr &amp; ~(CR_I | CR_C));</div><div class='add'>+	asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));</div><div class='add'>+	asm volatile("mcr p15, 0, %0, c2, c0, 2"</div><div class='add'>+		: : "r" (ttbcr &amp; ~(3 &lt;&lt; 8 | 3 &lt;&lt; 10)));</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Re-write the TTBR values to point them at the high physical</div><div class='del'>-	 * alias of the page tables.  We expect __va() will work on</div><div class='del'>-	 * cpu_get_pgd(), which returns the value of TTBR0.</div><div class='add'>+	 * Fixup the page tables - this must be in the idmap region as</div><div class='add'>+	 * we need to disable the MMU to do this safely, and hence it</div><div class='add'>+	 * needs to be assembly.  It's fairly simple, as we're using the</div><div class='add'>+	 * temporary tables setup by the initial assembly code.</div><div class='ctx'> 	 */</div><div class='del'>-	cpu_switch_mm(pgd0, &amp;init_mm);</div><div class='del'>-	cpu_set_ttbr(1, __pa(pgd0) + TTBR1_OFFSET);</div><div class='add'>+	lpae_pgtables_remap(offset, pa_pgd, boot_data);</div><div class='ctx'> </div><div class='del'>-	/* Finally flush any stale TLB values. */</div><div class='del'>-	local_flush_bp_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	/* Re-enable the caches and cacheable TLB walks */</div><div class='add'>+	asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));</div><div class='add'>+	set_cr(cr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-void __init early_paging_init(const struct machine_desc *mdesc,</div><div class='del'>-			      struct proc_info_list *procinfo)</div><div class='add'>+void __init early_paging_init(const struct machine_desc *mdesc)</div><div class='ctx'> {</div><div class='del'>-	if (mdesc-&gt;init_meminfo)</div><div class='del'>-		mdesc-&gt;init_meminfo();</div><div class='add'>+	long long offset;</div><div class='add'>+</div><div class='add'>+	if (!mdesc-&gt;pv_fixup)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = mdesc-&gt;pv_fixup();</div><div class='add'>+	if (offset == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pr_crit("Physical address space modification is only to support Keystone2.\n");</div><div class='add'>+	pr_crit("Please enable ARM_LPAE and ARM_PATCH_PHYS_VIRT support to use this\n");</div><div class='add'>+	pr_crit("feature. Your kernel may crash now, have a good day.\n");</div><div class='add'>+	add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='hunk'>@@ -1519,6 +1500,7 @@ void __init paging_init(const struct machine_desc *mdesc)</div><div class='ctx'> 	build_mem_type_table();</div><div class='ctx'> 	prepare_page_table();</div><div class='ctx'> 	map_lowmem();</div><div class='add'>+	memblock_set_current_limit(arm_lowmem_limit);</div><div class='ctx'> 	dma_contiguous_remap();</div><div class='ctx'> 	devicemaps_init(mdesc);</div><div class='ctx'> 	kmap_init();</div><div class='head'>diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c<br/>index a014dfacd5ca..1dd10936d68d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/nommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/nommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/nommu.c</a></div><div class='hunk'>@@ -304,15 +304,6 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * early_paging_init() recreates boot time page table setup, allowing machines</div><div class='del'>- * to switch over to a high (&gt;4G) address space on LPAE systems</div><div class='del'>- */</div><div class='del'>-void __init early_paging_init(const struct machine_desc *mdesc,</div><div class='del'>-			      struct proc_info_list *procinfo)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * paging_init() sets up the page tables, initialises the zone memory</div><div class='ctx'>  * maps, and sets up the zero page, bad page and bad page tables.</div><div class='ctx'>  */</div><div class='hunk'>@@ -360,30 +351,43 @@ void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__arm_ioremap_pfn);</div><div class='ctx'> </div><div class='del'>-void __iomem *__arm_ioremap_pfn_caller(unsigned long pfn, unsigned long offset,</div><div class='del'>-			   size_t size, unsigned int mtype, void *caller)</div><div class='add'>+void __iomem *__arm_ioremap_caller(phys_addr_t phys_addr, size_t size,</div><div class='add'>+				   unsigned int mtype, void *caller)</div><div class='ctx'> {</div><div class='del'>-	return __arm_ioremap_pfn(pfn, offset, size, mtype);</div><div class='add'>+	return (void __iomem *)phys_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __iomem *__arm_ioremap(phys_addr_t phys_addr, size_t size,</div><div class='del'>-			    unsigned int mtype)</div><div class='add'>+void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t, unsigned int, void *);</div><div class='add'>+</div><div class='add'>+void __iomem *ioremap(resource_size_t res_cookie, size_t size)</div><div class='ctx'> {</div><div class='del'>-	return (void __iomem *)phys_addr;</div><div class='add'>+	return __arm_ioremap_caller(res_cookie, size, MT_DEVICE,</div><div class='add'>+				    __builtin_return_address(0));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__arm_ioremap);</div><div class='add'>+EXPORT_SYMBOL(ioremap);</div><div class='ctx'> </div><div class='del'>-void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t, unsigned int, void *);</div><div class='add'>+void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size)</div><div class='add'>+{</div><div class='add'>+	return __arm_ioremap_caller(res_cookie, size, MT_DEVICE_CACHED,</div><div class='add'>+				    __builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ioremap_cache);</div><div class='ctx'> </div><div class='del'>-void __iomem *__arm_ioremap_caller(phys_addr_t phys_addr, size_t size,</div><div class='del'>-				   unsigned int mtype, void *caller)</div><div class='add'>+void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size)</div><div class='add'>+{</div><div class='add'>+	return __arm_ioremap_caller(res_cookie, size, MT_DEVICE_WC,</div><div class='add'>+				    __builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ioremap_wc);</div><div class='add'>+</div><div class='add'>+void __iounmap(volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='del'>-	return __arm_ioremap(phys_addr, size, mtype);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(__iounmap);</div><div class='ctx'> </div><div class='ctx'> void (*arch_iounmap)(volatile void __iomem *);</div><div class='ctx'> </div><div class='del'>-void __arm_iounmap(volatile void __iomem *addr)</div><div class='add'>+void iounmap(volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__arm_iounmap);</div><div class='add'>+EXPORT_SYMBOL(iounmap);</div><div class='head'>diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S<br/>index 10405b8d31af..c6141a5435c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-2level.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/proc-v7-2level.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-2level.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7-2level.S</a></div><div class='hunk'>@@ -36,14 +36,16 @@</div><div class='ctx'>  *</div><div class='ctx'>  *	It is assumed that:</div><div class='ctx'>  *	- we are not using split page tables</div><div class='add'>+ *</div><div class='add'>+ *	Note that we always need to flush BTAC/BTB if IBE is set</div><div class='add'>+ *	even on Cortex-A8 revisions not affected by 430973.</div><div class='add'>+ *	If IBE is not set, the flush BTAC/BTB won't do anything.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(cpu_ca8_switch_mm)</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> 	mov	r2, #0</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_430973</div><div class='ctx'> 	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB</div><div class='ctx'> #endif</div><div class='del'>-#endif</div><div class='ctx'> ENTRY(cpu_v7_switch_mm)</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> 	mmid	r1, r1				@ get mm-&gt;context.id</div><div class='hunk'>@@ -148,10 +150,10 @@ ENDPROC(cpu_v7_set_pte_ext)</div><div class='ctx'> 	 * Macro for setting up the TTBRx and TTBCR registers.</div><div class='ctx'> 	 * - \ttb0 and \ttb1 updated with the corresponding flags.</div><div class='ctx'> 	 */</div><div class='del'>-	.macro	v7_ttb_setup, zero, ttbr0, ttbr1, tmp</div><div class='add'>+	.macro	v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp</div><div class='ctx'> 	mcr	p15, 0, \zero, c2, c0, 2	@ TTB control register</div><div class='del'>-	ALT_SMP(orr	\ttbr0, \ttbr0, #TTB_FLAGS_SMP)</div><div class='del'>-	ALT_UP(orr	\ttbr0, \ttbr0, #TTB_FLAGS_UP)</div><div class='add'>+	ALT_SMP(orr	\ttbr0l, \ttbr0l, #TTB_FLAGS_SMP)</div><div class='add'>+	ALT_UP(orr	\ttbr0l, \ttbr0l, #TTB_FLAGS_UP)</div><div class='ctx'> 	ALT_SMP(orr	\ttbr1, \ttbr1, #TTB_FLAGS_SMP)</div><div class='ctx'> 	ALT_UP(orr	\ttbr1, \ttbr1, #TTB_FLAGS_UP)</div><div class='ctx'> 	mcr	p15, 0, \ttbr1, c2, c0, 1	@ load TTB1</div><div class='head'>diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S<br/>index d3daed0ae0ad..5e5720e8bc5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-3level.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/proc-v7-3level.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-3level.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7-3level.S</a></div><div class='hunk'>@@ -126,11 +126,10 @@ ENDPROC(cpu_v7_set_pte_ext)</div><div class='ctx'> 	 * Macro for setting up the TTBRx and TTBCR registers.</div><div class='ctx'> 	 * - \ttbr1 updated.</div><div class='ctx'> 	 */</div><div class='del'>-	.macro	v7_ttb_setup, zero, ttbr0, ttbr1, tmp</div><div class='add'>+	.macro	v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp</div><div class='ctx'> 	ldr	\tmp, =swapper_pg_dir		@ swapper_pg_dir virtual address</div><div class='del'>-	mov	\tmp, \tmp, lsr #ARCH_PGD_SHIFT</div><div class='del'>-	cmp	\ttbr1, \tmp			@ PHYS_OFFSET &gt; PAGE_OFFSET?</div><div class='del'>-	mrc	p15, 0, \tmp, c2, c0, 2		@ TTB control register</div><div class='add'>+	cmp	\ttbr1, \tmp, lsr #12		@ PHYS_OFFSET &gt; PAGE_OFFSET?</div><div class='add'>+	mrc	p15, 0, \tmp, c2, c0, 2		@ TTB control egister</div><div class='ctx'> 	orr	\tmp, \tmp, #TTB_EAE</div><div class='ctx'> 	ALT_SMP(orr	\tmp, \tmp, #TTB_FLAGS_SMP)</div><div class='ctx'> 	ALT_UP(orr	\tmp, \tmp, #TTB_FLAGS_UP)</div><div class='hunk'>@@ -143,13 +142,10 @@ ENDPROC(cpu_v7_set_pte_ext)</div><div class='ctx'> 	 */</div><div class='ctx'> 	orrls	\tmp, \tmp, #TTBR1_SIZE				@ TTBCR.T1SZ</div><div class='ctx'> 	mcr	p15, 0, \tmp, c2, c0, 2				@ TTBCR</div><div class='del'>-	mov	\tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT)	@ upper bits</div><div class='del'>-	mov	\ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT		@ lower bits</div><div class='add'>+	mov	\tmp, \ttbr1, lsr #20</div><div class='add'>+	mov	\ttbr1, \ttbr1, lsl #12</div><div class='ctx'> 	addls	\ttbr1, \ttbr1, #TTBR1_OFFSET</div><div class='ctx'> 	mcrr	p15, 1, \ttbr1, \tmp, c2			@ load TTBR1</div><div class='del'>-	mov	\tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT)	@ upper bits</div><div class='del'>-	mov	\ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT		@ lower bits</div><div class='del'>-	mcrr	p15, 0, \ttbr0, \tmp, c2			@ load TTBR0</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S<br/>index 3d1054f11a8a..de2b246fed38 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-v7.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/proc-v7.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-v7.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7.S</a></div><div class='hunk'>@@ -252,6 +252,12 @@ ENDPROC(cpu_pj4b_do_resume)</div><div class='ctx'>  *	Initialise TLB, Caches, and MMU state ready to switch the MMU</div><div class='ctx'>  *	on.  Return in r0 the new CP15 C1 control register setting.</div><div class='ctx'>  *</div><div class='add'>+ *	r1, r2, r4, r5, r9, r13 must be preserved - r13 is not a stack</div><div class='add'>+ *	r4: TTBR0 (low word)</div><div class='add'>+ *	r5: TTBR0 (high word if LPAE)</div><div class='add'>+ *	r8: TTBR1</div><div class='add'>+ *	r9: Main ID register</div><div class='add'>+ *</div><div class='ctx'>  *	This should be able to cover all ARMv7 cores.</div><div class='ctx'>  *</div><div class='ctx'>  *	It is assumed that:</div><div class='hunk'>@@ -268,7 +274,10 @@ __v7_ca15mp_setup:</div><div class='ctx'> __v7_b15mp_setup:</div><div class='ctx'> __v7_ca17mp_setup:</div><div class='ctx'> 	mov	r10, #0</div><div class='del'>-1:</div><div class='add'>+1:	adr	r12, __v7_setup_stack		@ the local stack</div><div class='add'>+	stmia	r12, {r0-r5, lr}		@ v7_invalidate_l1 touches r0-r6</div><div class='add'>+	bl      v7_invalidate_l1</div><div class='add'>+	ldmia	r12, {r0-r5, lr}</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	ALT_SMP(mrc	p15, 0, r0, c1, c0, 1)</div><div class='ctx'> 	ALT_UP(mov	r0, #(1 &lt;&lt; 6))		@ fake it for UP</div><div class='hunk'>@@ -277,7 +286,79 @@ __v7_ca17mp_setup:</div><div class='ctx'> 	orreq	r0, r0, r10			@ Enable CPU-specific SMP bits</div><div class='ctx'> 	mcreq	p15, 0, r0, c1, c0, 1</div><div class='ctx'> #endif</div><div class='del'>-	b	__v7_setup</div><div class='add'>+	b	__v7_setup_cont</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Errata:</div><div class='add'>+ *  r0, r10 available for use</div><div class='add'>+ *  r1, r2, r4, r5, r9, r13: must be preserved</div><div class='add'>+ *  r3: contains MIDR rX number in bits 23-20</div><div class='add'>+ *  r6: contains MIDR rXpY as 8-bit XY number</div><div class='add'>+ *  r9: MIDR</div><div class='add'>+ */</div><div class='add'>+__ca8_errata:</div><div class='add'>+#if defined(CONFIG_ARM_ERRATA_430973) &amp;&amp; !defined(CONFIG_ARCH_MULTIPLATFORM)</div><div class='add'>+	teq	r3, #0x00100000			@ only present in r1p*</div><div class='add'>+	mrceq	p15, 0, r0, c1, c0, 1		@ read aux control register</div><div class='add'>+	orreq	r0, r0, #(1 &lt;&lt; 6)		@ set IBE to 1</div><div class='add'>+	mcreq	p15, 0, r0, c1, c0, 1		@ write aux control register</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_458693</div><div class='add'>+	teq	r6, #0x20			@ only present in r2p0</div><div class='add'>+	mrceq	p15, 0, r0, c1, c0, 1		@ read aux control register</div><div class='add'>+	orreq	r0, r0, #(1 &lt;&lt; 5)		@ set L1NEON to 1</div><div class='add'>+	orreq	r0, r0, #(1 &lt;&lt; 9)		@ set PLDNOP to 1</div><div class='add'>+	mcreq	p15, 0, r0, c1, c0, 1		@ write aux control register</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_460075</div><div class='add'>+	teq	r6, #0x20			@ only present in r2p0</div><div class='add'>+	mrceq	p15, 1, r0, c9, c0, 2		@ read L2 cache aux ctrl register</div><div class='add'>+	tsteq	r0, #1 &lt;&lt; 22</div><div class='add'>+	orreq	r0, r0, #(1 &lt;&lt; 22)		@ set the Write Allocate disable bit</div><div class='add'>+	mcreq	p15, 1, r0, c9, c0, 2		@ write the L2 cache aux ctrl register</div><div class='add'>+#endif</div><div class='add'>+	b	__errata_finish</div><div class='add'>+</div><div class='add'>+__ca9_errata:</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_742230</div><div class='add'>+	cmp	r6, #0x22			@ only present up to r2p2</div><div class='add'>+	mrcle	p15, 0, r0, c15, c0, 1		@ read diagnostic register</div><div class='add'>+	orrle	r0, r0, #1 &lt;&lt; 4			@ set bit #4</div><div class='add'>+	mcrle	p15, 0, r0, c15, c0, 1		@ write diagnostic register</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_742231</div><div class='add'>+	teq	r6, #0x20			@ present in r2p0</div><div class='add'>+	teqne	r6, #0x21			@ present in r2p1</div><div class='add'>+	teqne	r6, #0x22			@ present in r2p2</div><div class='add'>+	mrceq	p15, 0, r0, c15, c0, 1		@ read diagnostic register</div><div class='add'>+	orreq	r0, r0, #1 &lt;&lt; 12		@ set bit #12</div><div class='add'>+	orreq	r0, r0, #1 &lt;&lt; 22		@ set bit #22</div><div class='add'>+	mcreq	p15, 0, r0, c15, c0, 1		@ write diagnostic register</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_743622</div><div class='add'>+	teq	r3, #0x00200000			@ only present in r2p*</div><div class='add'>+	mrceq	p15, 0, r0, c15, c0, 1		@ read diagnostic register</div><div class='add'>+	orreq	r0, r0, #1 &lt;&lt; 6			@ set bit #6</div><div class='add'>+	mcreq	p15, 0, r0, c15, c0, 1		@ write diagnostic register</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_ARM_ERRATA_751472) &amp;&amp; defined(CONFIG_SMP)</div><div class='add'>+	ALT_SMP(cmp r6, #0x30)			@ present prior to r3p0</div><div class='add'>+	ALT_UP_B(1f)</div><div class='add'>+	mrclt	p15, 0, r0, c15, c0, 1		@ read diagnostic register</div><div class='add'>+	orrlt	r0, r0, #1 &lt;&lt; 11		@ set bit #11</div><div class='add'>+	mcrlt	p15, 0, r0, c15, c0, 1		@ write diagnostic register</div><div class='add'>+1:</div><div class='add'>+#endif</div><div class='add'>+	b	__errata_finish</div><div class='add'>+</div><div class='add'>+__ca15_errata:</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_773022</div><div class='add'>+	cmp	r6, #0x4			@ only present up to r0p4</div><div class='add'>+	mrcle	p15, 0, r0, c1, c0, 1		@ read aux control register</div><div class='add'>+	orrle	r0, r0, #1 &lt;&lt; 1			@ disable loop buffer</div><div class='add'>+	mcrle	p15, 0, r0, c1, c0, 1		@ write aux control register</div><div class='add'>+#endif</div><div class='add'>+	b	__errata_finish</div><div class='ctx'> </div><div class='ctx'> __v7_pj4b_setup:</div><div class='ctx'> #ifdef CONFIG_CPU_PJ4B</div><div class='hunk'>@@ -335,100 +416,43 @@ __v7_pj4b_setup:</div><div class='ctx'> </div><div class='ctx'> __v7_setup:</div><div class='ctx'> 	adr	r12, __v7_setup_stack		@ the local stack</div><div class='del'>-	stmia	r12, {r0-r5, r7, r9, r11, lr}</div><div class='del'>-	bl      v7_flush_dcache_louis</div><div class='del'>-	ldmia	r12, {r0-r5, r7, r9, r11, lr}</div><div class='del'>-</div><div class='del'>-	mrc	p15, 0, r0, c0, c0, 0		@ read main ID register</div><div class='del'>-	and	r10, r0, #0xff000000		@ ARM?</div><div class='del'>-	teq	r10, #0x41000000</div><div class='del'>-	bne	3f</div><div class='del'>-	and	r5, r0, #0x00f00000		@ variant</div><div class='del'>-	and	r6, r0, #0x0000000f		@ revision</div><div class='del'>-	orr	r6, r6, r5, lsr #20-4		@ combine variant and revision</div><div class='del'>-	ubfx	r0, r0, #4, #12			@ primary part number</div><div class='add'>+	stmia	r12, {r0-r5, lr}		@ v7_invalidate_l1 touches r0-r6</div><div class='add'>+	bl      v7_invalidate_l1</div><div class='add'>+	ldmia	r12, {r0-r5, lr}</div><div class='add'>+</div><div class='add'>+__v7_setup_cont:</div><div class='add'>+	and	r0, r9, #0xff000000		@ ARM?</div><div class='add'>+	teq	r0, #0x41000000</div><div class='add'>+	bne	__errata_finish</div><div class='add'>+	and	r3, r9, #0x00f00000		@ variant</div><div class='add'>+	and	r6, r9, #0x0000000f		@ revision</div><div class='add'>+	orr	r6, r6, r3, lsr #20-4		@ combine variant and revision</div><div class='add'>+	ubfx	r0, r9, #4, #12			@ primary part number</div><div class='ctx'> </div><div class='ctx'> 	/* Cortex-A8 Errata */</div><div class='ctx'> 	ldr	r10, =0x00000c08		@ Cortex-A8 primary part number</div><div class='ctx'> 	teq	r0, r10</div><div class='del'>-	bne	2f</div><div class='del'>-#if defined(CONFIG_ARM_ERRATA_430973) &amp;&amp; !defined(CONFIG_ARCH_MULTIPLATFORM)</div><div class='del'>-</div><div class='del'>-	teq	r5, #0x00100000			@ only present in r1p*</div><div class='del'>-	mrceq	p15, 0, r10, c1, c0, 1		@ read aux control register</div><div class='del'>-	orreq	r10, r10, #(1 &lt;&lt; 6)		@ set IBE to 1</div><div class='del'>-	mcreq	p15, 0, r10, c1, c0, 1		@ write aux control register</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_458693</div><div class='del'>-	teq	r6, #0x20			@ only present in r2p0</div><div class='del'>-	mrceq	p15, 0, r10, c1, c0, 1		@ read aux control register</div><div class='del'>-	orreq	r10, r10, #(1 &lt;&lt; 5)		@ set L1NEON to 1</div><div class='del'>-	orreq	r10, r10, #(1 &lt;&lt; 9)		@ set PLDNOP to 1</div><div class='del'>-	mcreq	p15, 0, r10, c1, c0, 1		@ write aux control register</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_460075</div><div class='del'>-	teq	r6, #0x20			@ only present in r2p0</div><div class='del'>-	mrceq	p15, 1, r10, c9, c0, 2		@ read L2 cache aux ctrl register</div><div class='del'>-	tsteq	r10, #1 &lt;&lt; 22</div><div class='del'>-	orreq	r10, r10, #(1 &lt;&lt; 22)		@ set the Write Allocate disable bit</div><div class='del'>-	mcreq	p15, 1, r10, c9, c0, 2		@ write the L2 cache aux ctrl register</div><div class='del'>-#endif</div><div class='del'>-	b	3f</div><div class='add'>+	beq	__ca8_errata</div><div class='ctx'> </div><div class='ctx'> 	/* Cortex-A9 Errata */</div><div class='del'>-2:	ldr	r10, =0x00000c09		@ Cortex-A9 primary part number</div><div class='add'>+	ldr	r10, =0x00000c09		@ Cortex-A9 primary part number</div><div class='ctx'> 	teq	r0, r10</div><div class='del'>-	bne	3f</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_742230</div><div class='del'>-	cmp	r6, #0x22			@ only present up to r2p2</div><div class='del'>-	mrcle	p15, 0, r10, c15, c0, 1		@ read diagnostic register</div><div class='del'>-	orrle	r10, r10, #1 &lt;&lt; 4		@ set bit #4</div><div class='del'>-	mcrle	p15, 0, r10, c15, c0, 1		@ write diagnostic register</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_742231</div><div class='del'>-	teq	r6, #0x20			@ present in r2p0</div><div class='del'>-	teqne	r6, #0x21			@ present in r2p1</div><div class='del'>-	teqne	r6, #0x22			@ present in r2p2</div><div class='del'>-	mrceq	p15, 0, r10, c15, c0, 1		@ read diagnostic register</div><div class='del'>-	orreq	r10, r10, #1 &lt;&lt; 12		@ set bit #12</div><div class='del'>-	orreq	r10, r10, #1 &lt;&lt; 22		@ set bit #22</div><div class='del'>-	mcreq	p15, 0, r10, c15, c0, 1		@ write diagnostic register</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_743622</div><div class='del'>-	teq	r5, #0x00200000			@ only present in r2p*</div><div class='del'>-	mrceq	p15, 0, r10, c15, c0, 1		@ read diagnostic register</div><div class='del'>-	orreq	r10, r10, #1 &lt;&lt; 6		@ set bit #6</div><div class='del'>-	mcreq	p15, 0, r10, c15, c0, 1		@ write diagnostic register</div><div class='del'>-#endif</div><div class='del'>-#if defined(CONFIG_ARM_ERRATA_751472) &amp;&amp; defined(CONFIG_SMP)</div><div class='del'>-	ALT_SMP(cmp r6, #0x30)			@ present prior to r3p0</div><div class='del'>-	ALT_UP_B(1f)</div><div class='del'>-	mrclt	p15, 0, r10, c15, c0, 1		@ read diagnostic register</div><div class='del'>-	orrlt	r10, r10, #1 &lt;&lt; 11		@ set bit #11</div><div class='del'>-	mcrlt	p15, 0, r10, c15, c0, 1		@ write diagnostic register</div><div class='del'>-1:</div><div class='del'>-#endif</div><div class='add'>+	beq	__ca9_errata</div><div class='ctx'> </div><div class='ctx'> 	/* Cortex-A15 Errata */</div><div class='del'>-3:	ldr	r10, =0x00000c0f		@ Cortex-A15 primary part number</div><div class='add'>+	ldr	r10, =0x00000c0f		@ Cortex-A15 primary part number</div><div class='ctx'> 	teq	r0, r10</div><div class='del'>-	bne	4f</div><div class='add'>+	beq	__ca15_errata</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_773022</div><div class='del'>-	cmp	r6, #0x4			@ only present up to r0p4</div><div class='del'>-	mrcle	p15, 0, r10, c1, c0, 1		@ read aux control register</div><div class='del'>-	orrle	r10, r10, #1 &lt;&lt; 1		@ disable loop buffer</div><div class='del'>-	mcrle	p15, 0, r10, c1, c0, 1		@ write aux control register</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-4:	mov	r10, #0</div><div class='add'>+__errata_finish:</div><div class='add'>+	mov	r10, #0</div><div class='ctx'> 	mcr	p15, 0, r10, c7, c5, 0		@ I+BTB cache invalidate</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> 	mcr	p15, 0, r10, c8, c7, 0		@ invalidate I + D TLBs</div><div class='del'>-	v7_ttb_setup r10, r4, r8, r5		@ TTBCR, TTBRx setup</div><div class='del'>-	ldr	r5, =PRRR			@ PRRR</div><div class='add'>+	v7_ttb_setup r10, r4, r5, r8, r3	@ TTBCR, TTBRx setup</div><div class='add'>+	ldr	r3, =PRRR			@ PRRR</div><div class='ctx'> 	ldr	r6, =NMRR			@ NMRR</div><div class='del'>-	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR</div><div class='add'>+	mcr	p15, 0, r3, c10, c2, 0		@ write PRRR</div><div class='ctx'> 	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR</div><div class='ctx'> #endif</div><div class='ctx'> 	dsb					@ Complete invalidations</div><div class='hunk'>@@ -437,22 +461,22 @@ __v7_setup:</div><div class='ctx'> 	and	r0, r0, #(0xf &lt;&lt; 12)		@ ThumbEE enabled field</div><div class='ctx'> 	teq	r0, #(1 &lt;&lt; 12)			@ check if ThumbEE is present</div><div class='ctx'> 	bne	1f</div><div class='del'>-	mov	r5, #0</div><div class='del'>-	mcr	p14, 6, r5, c1, c0, 0		@ Initialize TEEHBR to 0</div><div class='add'>+	mov	r3, #0</div><div class='add'>+	mcr	p14, 6, r3, c1, c0, 0		@ Initialize TEEHBR to 0</div><div class='ctx'> 	mrc	p14, 6, r0, c0, c0, 0		@ load TEECR</div><div class='ctx'> 	orr	r0, r0, #1			@ set the 1st bit in order to</div><div class='ctx'> 	mcr	p14, 6, r0, c0, c0, 0		@ stop userspace TEEHBR access</div><div class='ctx'> 1:</div><div class='ctx'> #endif</div><div class='del'>-	adr	r5, v7_crval</div><div class='del'>-	ldmia	r5, {r5, r6}</div><div class='add'>+	adr	r3, v7_crval</div><div class='add'>+	ldmia	r3, {r3, r6}</div><div class='ctx'>  ARM_BE8(orr	r6, r6, #1 &lt;&lt; 25)		@ big-endian page tables</div><div class='ctx'> #ifdef CONFIG_SWP_EMULATE</div><div class='del'>-	orr     r5, r5, #(1 &lt;&lt; 10)              @ set SW bit in "clear"</div><div class='add'>+	orr     r3, r3, #(1 &lt;&lt; 10)              @ set SW bit in "clear"</div><div class='ctx'> 	bic     r6, r6, #(1 &lt;&lt; 10)              @ clear it in "mmuset"</div><div class='ctx'> #endif</div><div class='ctx'>    	mrc	p15, 0, r0, c1, c0, 0		@ read control register</div><div class='del'>-	bic	r0, r0, r5			@ clear bits them</div><div class='add'>+	bic	r0, r0, r3			@ clear bits them</div><div class='ctx'> 	orr	r0, r0, r6			@ set them</div><div class='ctx'>  THUMB(	orr	r0, r0, #1 &lt;&lt; 30	)	@ Thumb exceptions</div><div class='ctx'> 	ret	lr				@ return to head.S:__ret</div><div class='hunk'>@@ -460,7 +484,7 @@ ENDPROC(__v7_setup)</div><div class='ctx'> </div><div class='ctx'> 	.align	2</div><div class='ctx'> __v7_setup_stack:</div><div class='del'>-	.space	4 * 11				@ 11 registers</div><div class='add'>+	.space	4 * 7				@ 12 registers</div><div class='ctx'> </div><div class='ctx'> 	__INITDATA</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S<br/>index e08e1f2bab76..67d9209077c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-v7m.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/mm/proc-v7m.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-v7m.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/proc-v7m.S</a></div><div class='hunk'>@@ -98,7 +98,7 @@ __v7m_setup:</div><div class='ctx'> 	str	r5, [r0, V7M_SCB_SHPR3]	@ set PendSV priority</div><div class='ctx'> </div><div class='ctx'> 	@ SVC to run the kernel in this mode</div><div class='del'>-	adr	r1, BSYM(1f)</div><div class='add'>+	badr	r1, 1f</div><div class='ctx'> 	ldr	r5, [r12, #11 * 4]	@ read the SVC vector entry</div><div class='ctx'> 	str	r1, [r12, #11 * 4]	@ write the temporary SVC vector entry</div><div class='ctx'> 	mov	r6, lr			@ save LR</div><div class='head'>diff --git a/arch/arm/mm/pv-fixup-asm.S b/arch/arm/mm/pv-fixup-asm.S<br/>new file mode 100644<br/>index 000000000000..1867f3e43016<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/pv-fixup-asm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/mm/pv-fixup-asm.S</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2015 Russell King</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This assembly is required to safely remap the physical address space</div><div class='add'>+ * for Keystone 2</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/cp15.h&gt;</div><div class='add'>+#include &lt;asm/memory.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+</div><div class='add'>+	.section ".idmap.text", "ax"</div><div class='add'>+</div><div class='add'>+#define L1_ORDER 3</div><div class='add'>+#define L2_ORDER 3</div><div class='add'>+</div><div class='add'>+ENTRY(lpae_pgtables_remap_asm)</div><div class='add'>+	stmfd	sp!, {r4-r8, lr}</div><div class='add'>+</div><div class='add'>+	mrc	p15, 0, r8, c1, c0, 0		@ read control reg</div><div class='add'>+	bic	ip, r8, #CR_M			@ disable caches and MMU</div><div class='add'>+	mcr	p15, 0, ip, c1, c0, 0</div><div class='add'>+	dsb</div><div class='add'>+	isb</div><div class='add'>+</div><div class='add'>+	/* Update level 2 entries covering the kernel */</div><div class='add'>+	ldr	r6, =(_end - 1)</div><div class='add'>+	add	r7, r2, #0x1000</div><div class='add'>+	add	r6, r7, r6, lsr #SECTION_SHIFT - L2_ORDER</div><div class='add'>+	add	r7, r7, #PAGE_OFFSET &gt;&gt; (SECTION_SHIFT - L2_ORDER)</div><div class='add'>+1:	ldrd	r4, [r7]</div><div class='add'>+	adds	r4, r4, r0</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	strd	r4, [r7], #1 &lt;&lt; L2_ORDER</div><div class='add'>+	cmp	r7, r6</div><div class='add'>+	bls	1b</div><div class='add'>+</div><div class='add'>+	/* Update level 2 entries for the boot data */</div><div class='add'>+	add	r7, r2, #0x1000</div><div class='add'>+	add	r7, r7, r3, lsr #SECTION_SHIFT - L2_ORDER</div><div class='add'>+	bic	r7, r7, #(1 &lt;&lt; L2_ORDER) - 1</div><div class='add'>+	ldrd	r4, [r7]</div><div class='add'>+	adds	r4, r4, r0</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	strd	r4, [r7], #1 &lt;&lt; L2_ORDER</div><div class='add'>+	ldrd	r4, [r7]</div><div class='add'>+	adds	r4, r4, r0</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	strd	r4, [r7]</div><div class='add'>+</div><div class='add'>+	/* Update level 1 entries */</div><div class='add'>+	mov	r6, #4</div><div class='add'>+	mov	r7, r2</div><div class='add'>+2:	ldrd	r4, [r7]</div><div class='add'>+	adds	r4, r4, r0</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	strd	r4, [r7], #1 &lt;&lt; L1_ORDER</div><div class='add'>+	subs	r6, r6, #1</div><div class='add'>+	bne	2b</div><div class='add'>+</div><div class='add'>+	mrrc	p15, 0, r4, r5, c2		@ read TTBR0</div><div class='add'>+	adds	r4, r4, r0			@ update physical address</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	mcrr	p15, 0, r4, r5, c2		@ write back TTBR0</div><div class='add'>+	mrrc	p15, 1, r4, r5, c2		@ read TTBR1</div><div class='add'>+	adds	r4, r4, r0			@ update physical address</div><div class='add'>+	adc	r5, r5, r1</div><div class='add'>+	mcrr	p15, 1, r4, r5, c2		@ write back TTBR1</div><div class='add'>+</div><div class='add'>+	dsb</div><div class='add'>+</div><div class='add'>+	mov	ip, #0</div><div class='add'>+	mcr	p15, 0, ip, c7, c5, 0		@ I+BTB cache invalidate</div><div class='add'>+	mcr	p15, 0, ip, c8, c7, 0		@ local_flush_tlb_all()</div><div class='add'>+	dsb</div><div class='add'>+	isb</div><div class='add'>+</div><div class='add'>+	mcr	p15, 0, r8, c1, c0, 0		@ re-enable MMU</div><div class='add'>+	dsb</div><div class='add'>+	isb</div><div class='add'>+</div><div class='add'>+	ldmfd	sp!, {r4-r8, pc}</div><div class='add'>+ENDPROC(lpae_pgtables_remap_asm)</div><div class='head'>diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c<br/>index e0e23582c8b4..4550d247e308 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/net/bpf_jit_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/net/bpf_jit_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/net/bpf_jit_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/net/bpf_jit_32.c</a></div><div class='hunk'>@@ -873,6 +873,16 @@ b_epilogue:</div><div class='ctx'> 			off = offsetof(struct sk_buff, queue_mapping);</div><div class='ctx'> 			emit(ARM_LDRH_I(r_A, r_skb, off), ctx);</div><div class='ctx'> 			break;</div><div class='add'>+		case BPF_LDX | BPF_W | BPF_ABS:</div><div class='add'>+			/*</div><div class='add'>+			 * load a 32bit word from struct seccomp_data.</div><div class='add'>+			 * seccomp_check_filter() will already have checked</div><div class='add'>+			 * that k is 32bit aligned and lies within the</div><div class='add'>+			 * struct seccomp_data.</div><div class='add'>+			 */</div><div class='add'>+			ctx-&gt;seen |= SEEN_SKB;</div><div class='add'>+			emit(ARM_LDR_I(r_A, r_skb, k), ctx);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c<br/>index 6416e03b4482..1e460b4ee3b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/plat-omap/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-omap/dma.c</a></div><div class='hunk'>@@ -38,6 +38,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/omap-dma.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARCH_OMAP1</div><div class='add'>+#include &lt;mach/soc.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA</div><div class='ctx'>  * channels that an instance of the SDMA IP block can support.  Used</div><div class='head'>diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c<br/>index f5b00f41c4f6..2235081a04ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/plat-orion/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-orion/common.c</a></div><div class='hunk'>@@ -28,11 +28,7 @@</div><div class='ctx'> void __init orion_clkdev_add(const char *con_id, const char *dev_id,</div><div class='ctx'> 			     struct clk *clk)</div><div class='ctx'> {</div><div class='del'>-	struct clk_lookup *cl;</div><div class='del'>-</div><div class='del'>-	cl = clkdev_alloc(clk, con_id, dev_id);</div><div class='del'>-	if (cl)</div><div class='del'>-		clkdev_add(cl);</div><div class='add'>+	clkdev_create(clk, con_id, "%s", dev_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Create clkdev entries for all orion platforms except kirkwood.</div><div class='head'>diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c<br/>index e2be70df06c6..efa6e85619ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/adc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/plat-samsung/adc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/adc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/plat-samsung/adc.c</a></div><div class='hunk'>@@ -389,7 +389,7 @@ static int s3c_adc_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	clk_enable(adc-&gt;clk);</div><div class='add'>+	clk_prepare_enable(adc-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	tmp = adc-&gt;prescale | S3C2410_ADCCON_PRSCEN;</div><div class='ctx'> </div><div class='hunk'>@@ -413,7 +413,7 @@ static int s3c_adc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adc_device *adc = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	clk_disable(adc-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(adc-&gt;clk);</div><div class='ctx'> 	regulator_disable(adc-&gt;vdd);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -475,7 +475,7 @@ static int s3c_adc_resume(struct device *dev)</div><div class='ctx'> #define s3c_adc_resume NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static struct platform_device_id s3c_adc_driver_ids[] = {</div><div class='add'>+static const struct platform_device_id s3c_adc_driver_ids[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name           = "s3c24xx-adc",</div><div class='ctx'> 		.driver_data    = TYPE_ADCV1,</div><div class='head'>diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile<br/>index 8aa791051029..9d259d94e429 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/vdso/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/vdso/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vdso/Makefile</a></div><div class='hunk'>@@ -6,9 +6,15 @@ obj-vdso := vgettimeofday.o datapage.o</div><div class='ctx'> targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.so.raw vdso.lds</div><div class='ctx'> obj-vdso := $(addprefix $(obj)/, $(obj-vdso))</div><div class='ctx'> </div><div class='del'>-ccflags-y := -shared -fPIC -fno-common -fno-builtin -fno-stack-protector</div><div class='del'>-ccflags-y += -nostdlib -Wl,-soname=linux-vdso.so.1 -DDISABLE_BRANCH_PROFILING</div><div class='del'>-ccflags-y += -Wl,--no-undefined $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)</div><div class='add'>+ccflags-y := -fPIC -fno-common -fno-builtin -fno-stack-protector</div><div class='add'>+ccflags-y += -DDISABLE_BRANCH_PROFILING</div><div class='add'>+</div><div class='add'>+VDSO_LDFLAGS := -Wl,-Bsymbolic -Wl,--no-undefined -Wl,-soname=linux-vdso.so.1</div><div class='add'>+VDSO_LDFLAGS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096</div><div class='add'>+VDSO_LDFLAGS += -nostdlib -shared</div><div class='add'>+VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)</div><div class='add'>+VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--build-id)</div><div class='add'>+VDSO_LDFLAGS += $(call cc-option, -fuse-ld=bfd)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VDSO) += vdso.o</div><div class='ctx'> extra-$(CONFIG_VDSO) += vdso.lds</div><div class='hunk'>@@ -40,10 +46,8 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE</div><div class='ctx'> </div><div class='ctx'> # Actual build commands</div><div class='ctx'> quiet_cmd_vdsold = VDSO    $@</div><div class='del'>-      cmd_vdsold = $(CC) $(c_flags) -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) \</div><div class='del'>-                   $(call cc-ldoption, -Wl$(comma)--build-id) \</div><div class='del'>-                   -Wl,-Bsymbolic -Wl,-z,max-page-size=4096 \</div><div class='del'>-                   -Wl,-z,common-page-size=4096 -o $@</div><div class='add'>+      cmd_vdsold = $(CC) $(c_flags) $(VDSO_LDFLAGS) \</div><div class='add'>+                   -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) -o $@</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_vdsomunge = MUNGE   $@</div><div class='ctx'>       cmd_vdsomunge = $(objtree)/$(obj)/vdsomunge $&lt; $@</div><div class='head'>diff --git a/arch/arm/vdso/vdsomunge.c b/arch/arm/vdso/vdsomunge.c<br/>index 9005b07296c8..aedec81d1198 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/vdso/vdsomunge.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/vdso/vdsomunge.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/vdso/vdsomunge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vdso/vdsomunge.c</a></div><div class='hunk'>@@ -45,13 +45,11 @@</div><div class='ctx'>  * it does.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define _GNU_SOURCE</div><div class='del'>-</div><div class='ctx'> #include &lt;byteswap.h&gt;</div><div class='ctx'> #include &lt;elf.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='del'>-#include &lt;error.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;stdarg.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='hunk'>@@ -82,11 +80,25 @@</div><div class='ctx'> #define EF_ARM_ABI_FLOAT_HARD 0x400</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int failed;</div><div class='add'>+static const char *argv0;</div><div class='ctx'> static const char *outfile;</div><div class='ctx'> </div><div class='add'>+static void fail(const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	failed = 1;</div><div class='add'>+	fprintf(stderr, "%s: ", argv0);</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	vfprintf(stderr, fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+	exit(EXIT_FAILURE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void cleanup(void)</div><div class='ctx'> {</div><div class='del'>-	if (error_message_count &gt; 0 &amp;&amp; outfile != NULL)</div><div class='add'>+	if (failed &amp;&amp; outfile != NULL)</div><div class='ctx'> 		unlink(outfile);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -119,68 +131,66 @@ int main(int argc, char **argv)</div><div class='ctx'> 	int infd;</div><div class='ctx'> </div><div class='ctx'> 	atexit(cleanup);</div><div class='add'>+	argv0 = argv[0];</div><div class='ctx'> </div><div class='ctx'> 	if (argc != 3)</div><div class='del'>-		error(EXIT_FAILURE, 0, "Usage: %s [infile] [outfile]", argv[0]);</div><div class='add'>+		fail("Usage: %s [infile] [outfile]\n", argv[0]);</div><div class='ctx'> </div><div class='ctx'> 	infile = argv[1];</div><div class='ctx'> 	outfile = argv[2];</div><div class='ctx'> </div><div class='ctx'> 	infd = open(infile, O_RDONLY);</div><div class='ctx'> 	if (infd &lt; 0)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Cannot open %s", infile);</div><div class='add'>+		fail("Cannot open %s: %s\n", infile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	if (fstat(infd, &amp;stat) != 0)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Failed stat for %s", infile);</div><div class='add'>+		fail("Failed stat for %s: %s\n", infile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	inbuf = mmap(NULL, stat.st_size, PROT_READ, MAP_PRIVATE, infd, 0);</div><div class='ctx'> 	if (inbuf == MAP_FAILED)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Failed to map %s", infile);</div><div class='add'>+		fail("Failed to map %s: %s\n", infile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	close(infd);</div><div class='ctx'> </div><div class='ctx'> 	inhdr = inbuf;</div><div class='ctx'> </div><div class='ctx'> 	if (memcmp(&amp;inhdr-&gt;e_ident, ELFMAG, SELFMAG) != 0)</div><div class='del'>-		error(EXIT_FAILURE, 0, "Not an ELF file");</div><div class='add'>+		fail("Not an ELF file\n");</div><div class='ctx'> </div><div class='ctx'> 	if (inhdr-&gt;e_ident[EI_CLASS] != ELFCLASS32)</div><div class='del'>-		error(EXIT_FAILURE, 0, "Unsupported ELF class");</div><div class='add'>+		fail("Unsupported ELF class\n");</div><div class='ctx'> </div><div class='ctx'> 	swap = inhdr-&gt;e_ident[EI_DATA] != HOST_ORDER;</div><div class='ctx'> </div><div class='ctx'> 	if (read_elf_half(inhdr-&gt;e_type, swap) != ET_DYN)</div><div class='del'>-		error(EXIT_FAILURE, 0, "Not a shared object");</div><div class='add'>+		fail("Not a shared object\n");</div><div class='ctx'> </div><div class='del'>-	if (read_elf_half(inhdr-&gt;e_machine, swap) != EM_ARM) {</div><div class='del'>-		error(EXIT_FAILURE, 0, "Unsupported architecture %#x",</div><div class='del'>-		      inhdr-&gt;e_machine);</div><div class='del'>-	}</div><div class='add'>+	if (read_elf_half(inhdr-&gt;e_machine, swap) != EM_ARM)</div><div class='add'>+		fail("Unsupported architecture %#x\n", inhdr-&gt;e_machine);</div><div class='ctx'> </div><div class='ctx'> 	e_flags = read_elf_word(inhdr-&gt;e_flags, swap);</div><div class='ctx'> </div><div class='ctx'> 	if (EF_ARM_EABI_VERSION(e_flags) != EF_ARM_EABI_VER5) {</div><div class='del'>-		error(EXIT_FAILURE, 0, "Unsupported EABI version %#x",</div><div class='del'>-		      EF_ARM_EABI_VERSION(e_flags));</div><div class='add'>+		fail("Unsupported EABI version %#x\n",</div><div class='add'>+		     EF_ARM_EABI_VERSION(e_flags));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (e_flags &amp; EF_ARM_ABI_FLOAT_HARD)</div><div class='del'>-		error(EXIT_FAILURE, 0,</div><div class='del'>-		      "Unexpected hard-float flag set in e_flags");</div><div class='add'>+		fail("Unexpected hard-float flag set in e_flags\n");</div><div class='ctx'> </div><div class='ctx'> 	clear_soft_float = !!(e_flags &amp; EF_ARM_ABI_FLOAT_SOFT);</div><div class='ctx'> </div><div class='ctx'> 	outfd = open(outfile, O_RDWR | O_CREAT | O_TRUNC, S_IRUSR | S_IWUSR);</div><div class='ctx'> 	if (outfd &lt; 0)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Cannot open %s", outfile);</div><div class='add'>+		fail("Cannot open %s: %s\n", outfile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	if (ftruncate(outfd, stat.st_size) != 0)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Cannot truncate %s", outfile);</div><div class='add'>+		fail("Cannot truncate %s: %s\n", outfile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	outbuf = mmap(NULL, stat.st_size, PROT_READ | PROT_WRITE, MAP_SHARED,</div><div class='ctx'> 		      outfd, 0);</div><div class='ctx'> 	if (outbuf == MAP_FAILED)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Failed to map %s", outfile);</div><div class='add'>+		fail("Failed to map %s: %s\n", outfile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	close(outfd);</div><div class='ctx'> </div><div class='hunk'>@@ -195,7 +205,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (msync(outbuf, stat.st_size, MS_SYNC) != 0)</div><div class='del'>-		error(EXIT_FAILURE, errno, "Failed to sync %s", outfile);</div><div class='add'>+		fail("Failed to sync %s: %s\n", outfile, strerror(errno));</div><div class='ctx'> </div><div class='ctx'> 	return EXIT_SUCCESS;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c<br/>index f6e4d56eda00..2a61e4b04600 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/vfp/vfpmodule.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/vfp/vfpmodule.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/vfp/vfpmodule.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/vfp/vfpmodule.c</a></div><div class='hunk'>@@ -445,6 +445,19 @@ static void vfp_enable(void *unused)</div><div class='ctx'> 	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Called by platforms on which we want to disable VFP because it may not be</div><div class='add'>+ * present on all CPUs within a SMP complex. Needs to be called prior to</div><div class='add'>+ * vfp_init().</div><div class='add'>+ */</div><div class='add'>+void vfp_disable(void)</div><div class='add'>+{</div><div class='add'>+	if (VFP_arch) {</div><div class='add'>+		pr_debug("%s: should be called prior to vfp_init\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	VFP_arch = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_CPU_PM</div><div class='ctx'> static int vfp_pm_suspend(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c<br/>index 7d0f07020c80..6c09cc440a2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/xen/enlighten.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/xen/enlighten.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/xen/enlighten.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/enlighten.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/cpuidle.h&gt;</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +52,9 @@ EXPORT_SYMBOL_GPL(xen_have_vector_callback);</div><div class='ctx'> int xen_platform_pci_unplug = XEN_UNPLUG_ALL;</div><div class='ctx'> EXPORT_SYMBOL_GPL(xen_platform_pci_unplug);</div><div class='ctx'> </div><div class='del'>-static __read_mostly int xen_events_irq = -1;</div><div class='add'>+static __read_mostly unsigned int xen_events_irq;</div><div class='add'>+</div><div class='add'>+static __initdata struct device_node *xen_node;</div><div class='ctx'> </div><div class='ctx'> int xen_remap_domain_mfn_array(struct vm_area_struct *vma,</div><div class='ctx'> 			       unsigned long addr,</div><div class='hunk'>@@ -150,40 +153,28 @@ static irqreturn_t xen_arm_callback(int irq, void *arg)</div><div class='ctx'>  * documentation of the Xen Device Tree format.</div><div class='ctx'>  */</div><div class='ctx'> #define GRANT_TABLE_PHYSADDR 0</div><div class='del'>-static int __init xen_guest_init(void)</div><div class='add'>+void __init xen_early_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct xen_add_to_physmap xatp;</div><div class='del'>-	static struct shared_info *shared_info_page = 0;</div><div class='del'>-	struct device_node *node;</div><div class='ctx'> 	int len;</div><div class='ctx'> 	const char *s = NULL;</div><div class='ctx'> 	const char *version = NULL;</div><div class='ctx'> 	const char *xen_prefix = "xen,xen-";</div><div class='del'>-	struct resource res;</div><div class='del'>-	phys_addr_t grant_frames;</div><div class='ctx'> </div><div class='del'>-	node = of_find_compatible_node(NULL, NULL, "xen,xen");</div><div class='del'>-	if (!node) {</div><div class='add'>+	xen_node = of_find_compatible_node(NULL, NULL, "xen,xen");</div><div class='add'>+	if (!xen_node) {</div><div class='ctx'> 		pr_debug("No Xen support\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-	s = of_get_property(node, "compatible", &amp;len);</div><div class='add'>+	s = of_get_property(xen_node, "compatible", &amp;len);</div><div class='ctx'> 	if (strlen(xen_prefix) + 3  &lt; len &amp;&amp;</div><div class='ctx'> 			!strncmp(xen_prefix, s, strlen(xen_prefix)))</div><div class='ctx'> 		version = s + strlen(xen_prefix);</div><div class='ctx'> 	if (version == NULL) {</div><div class='ctx'> 		pr_debug("Xen version not found\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (of_address_to_resource(node, GRANT_TABLE_PHYSADDR, &amp;res))</div><div class='del'>-		return 0;</div><div class='del'>-	grant_frames = res.start;</div><div class='del'>-	xen_events_irq = irq_of_parse_and_map(node, 0);</div><div class='del'>-	pr_info("Xen %s support found, events_irq=%d gnttab_frame=%pa\n",</div><div class='del'>-			version, xen_events_irq, &amp;grant_frames);</div><div class='ctx'> </div><div class='del'>-	if (xen_events_irq &lt; 0)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	pr_info("Xen %s support found\n", version);</div><div class='ctx'> </div><div class='ctx'> 	xen_domain_type = XEN_HVM_DOMAIN;</div><div class='ctx'> </div><div class='hunk'>@@ -194,9 +185,34 @@ static int __init xen_guest_init(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		xen_start_info-&gt;flags &amp;= ~(SIF_INITDOMAIN|SIF_PRIVILEGED);</div><div class='ctx'> </div><div class='del'>-	if (!shared_info_page)</div><div class='del'>-		shared_info_page = (struct shared_info *)</div><div class='del'>-			get_zeroed_page(GFP_KERNEL);</div><div class='add'>+	if (!console_set_on_cmdline &amp;&amp; !xen_initial_domain())</div><div class='add'>+		add_preferred_console("hvc", 0, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init xen_guest_init(void)</div><div class='add'>+{</div><div class='add'>+	struct xen_add_to_physmap xatp;</div><div class='add'>+	struct shared_info *shared_info_page = NULL;</div><div class='add'>+	struct resource res;</div><div class='add'>+	phys_addr_t grant_frames;</div><div class='add'>+</div><div class='add'>+	if (!xen_domain())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (of_address_to_resource(xen_node, GRANT_TABLE_PHYSADDR, &amp;res)) {</div><div class='add'>+		pr_err("Xen grant table base address not found\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	grant_frames = res.start;</div><div class='add'>+</div><div class='add'>+	xen_events_irq = irq_of_parse_and_map(xen_node, 0);</div><div class='add'>+	if (!xen_events_irq) {</div><div class='add'>+		pr_err("Xen event channel interrupt not found\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	shared_info_page = (struct shared_info *)get_zeroed_page(GFP_KERNEL);</div><div class='add'>+</div><div class='ctx'> 	if (!shared_info_page) {</div><div class='ctx'> 		pr_err("not enough memory\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/xen/mm.c b/arch/arm/xen/mm.c<br/>index 498325074a06..03e75fef15b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/xen/mm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/xen/mm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/xen/mm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/mm.c</a></div><div class='hunk'>@@ -15,10 +15,10 @@</div><div class='ctx'> #include &lt;xen/xen.h&gt;</div><div class='ctx'> #include &lt;xen/interface/grant_table.h&gt;</div><div class='ctx'> #include &lt;xen/interface/memory.h&gt;</div><div class='add'>+#include &lt;xen/page.h&gt;</div><div class='ctx'> #include &lt;xen/swiotlb-xen.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/xen/page.h&gt;</div><div class='ctx'> #include &lt;asm/xen/hypercall.h&gt;</div><div class='ctx'> #include &lt;asm/xen/interface.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c<br/>index cb7a14c5cd69..887596c67b12 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/xen/p2m.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm/xen/p2m.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/xen/p2m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm/xen/p2m.c</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;xen/xen.h&gt;</div><div class='ctx'> #include &lt;xen/interface/memory.h&gt;</div><div class='add'>+#include &lt;xen/page.h&gt;</div><div class='ctx'> #include &lt;xen/swiotlb-xen.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/xen/page.h&gt;</div><div class='ctx'> #include &lt;asm/xen/hypercall.h&gt;</div><div class='ctx'> #include &lt;asm/xen/interface.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig<br/>index 7796af4b1d6f..318175f62c24 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/Kconfig</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> config ARM64</div><div class='ctx'> 	def_bool y</div><div class='add'>+	select ACPI_CCA_REQUIRED if ACPI</div><div class='ctx'> 	select ACPI_GENERIC_GSI if ACPI</div><div class='ctx'> 	select ACPI_REDUCED_HARDWARE_ONLY if ACPI</div><div class='ctx'> 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='hunk'>@@ -24,6 +25,7 @@ config ARM64</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select CPU_PM if (SUSPEND || CPU_IDLE)</div><div class='ctx'> 	select DCACHE_WORD_ACCESS</div><div class='add'>+	select EDAC_SUPPORT</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP</div><div class='hunk'>@@ -71,6 +73,7 @@ config ARM64</div><div class='ctx'> 	select HAVE_RCU_TABLE_FREE</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='add'>+	select IRQ_FORCED_THREADING</div><div class='ctx'> 	select MODULES_USE_ELF_RELA</div><div class='ctx'> 	select NO_BOOTMEM</div><div class='ctx'> 	select OF</div><div class='hunk'>@@ -181,6 +184,11 @@ config ARCH_FSL_LS2085A</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale LS2085A SOC.</div><div class='ctx'> </div><div class='add'>+config ARCH_HISI</div><div class='add'>+	bool "Hisilicon SoC Family"</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Hisilicon ARMv8 SoC family</div><div class='add'>+</div><div class='ctx'> config ARCH_MEDIATEK</div><div class='ctx'> 	bool "Mediatek MT65xx &amp; MT81xx ARMv8 SoC"</div><div class='ctx'> 	select ARM_GIC</div><div class='head'>diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile<br/>index ad26a752b976..38913be23695 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/Makefile</a></div><div class='hunk'>@@ -4,6 +4,7 @@ dts-dirs += arm</div><div class='ctx'> dts-dirs += cavium</div><div class='ctx'> dts-dirs += exynos</div><div class='ctx'> dts-dirs += freescale</div><div class='add'>+dts-dirs += hisilicon</div><div class='ctx'> dts-dirs += mediatek</div><div class='ctx'> dts-dirs += qcom</div><div class='ctx'> dts-dirs += sprd</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts<br/>index 83578e766b94..4c55833d8a41 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/apm/apm-mustang.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/apm/apm-mustang.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/apm/apm-mustang.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/apm/apm-mustang.dts</a></div><div class='hunk'>@@ -23,6 +23,16 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt; 0x1 0x00000000 0x0 0x80000000 &gt;; /* Updated by bootloader */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		button@1 {</div><div class='add'>+			label = "POWER";</div><div class='add'>+			linux,code = &lt;116&gt;;</div><div class='add'>+			linux,input-type = &lt;0x1&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x2d 0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie0clk {</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi<br/>index c8d3e0e86678..0689c3fb56e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></div><div class='hunk'>@@ -374,6 +374,111 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		msi: msi@79000000 {</div><div class='add'>+			compatible = "apm,xgene1-msi";</div><div class='add'>+			msi-controller;</div><div class='add'>+			reg = &lt;0x00 0x79000000 0x0 0x900000&gt;;</div><div class='add'>+			interrupts = &lt;  0x0 0x10 0x4</div><div class='add'>+					0x0 0x11 0x4</div><div class='add'>+					0x0 0x12 0x4</div><div class='add'>+					0x0 0x13 0x4</div><div class='add'>+					0x0 0x14 0x4</div><div class='add'>+					0x0 0x15 0x4</div><div class='add'>+					0x0 0x16 0x4</div><div class='add'>+					0x0 0x17 0x4</div><div class='add'>+					0x0 0x18 0x4</div><div class='add'>+					0x0 0x19 0x4</div><div class='add'>+					0x0 0x1a 0x4</div><div class='add'>+					0x0 0x1b 0x4</div><div class='add'>+					0x0 0x1c 0x4</div><div class='add'>+					0x0 0x1d 0x4</div><div class='add'>+					0x0 0x1e 0x4</div><div class='add'>+					0x0 0x1f 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		csw: csw@7e200000 {</div><div class='add'>+			compatible = "apm,xgene-csw", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x7e200000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcba: mcba@7e700000 {</div><div class='add'>+			compatible = "apm,xgene-mcb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x7e700000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcbb: mcbb@7e720000 {</div><div class='add'>+			compatible = "apm,xgene-mcb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x7e720000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		efuse: efuse@1054a000 {</div><div class='add'>+			compatible = "apm,xgene-efuse", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x1054a000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edac@78800000 {</div><div class='add'>+			compatible = "apm,xgene-edac";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			regmap-csw = &lt;&amp;csw&gt;;</div><div class='add'>+			regmap-mcba = &lt;&amp;mcba&gt;;</div><div class='add'>+			regmap-mcbb = &lt;&amp;mcbb&gt;;</div><div class='add'>+			regmap-efuse = &lt;&amp;efuse&gt;;</div><div class='add'>+			reg = &lt;0x0 0x78800000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x20 0x4&gt;,</div><div class='add'>+				     &lt;0x0 0x21 0x4&gt;,</div><div class='add'>+				     &lt;0x0 0x27 0x4&gt;;</div><div class='add'>+</div><div class='add'>+			edacmc@7e800000 {</div><div class='add'>+				compatible = "apm,xgene-edac-mc";</div><div class='add'>+				reg = &lt;0x0 0x7e800000 0x0 0x1000&gt;;</div><div class='add'>+				memory-controller = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacmc@7e840000 {</div><div class='add'>+				compatible = "apm,xgene-edac-mc";</div><div class='add'>+				reg = &lt;0x0 0x7e840000 0x0 0x1000&gt;;</div><div class='add'>+				memory-controller = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacmc@7e880000 {</div><div class='add'>+				compatible = "apm,xgene-edac-mc";</div><div class='add'>+				reg = &lt;0x0 0x7e880000 0x0 0x1000&gt;;</div><div class='add'>+				memory-controller = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacmc@7e8c0000 {</div><div class='add'>+				compatible = "apm,xgene-edac-mc";</div><div class='add'>+				reg = &lt;0x0 0x7e8c0000 0x0 0x1000&gt;;</div><div class='add'>+				memory-controller = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacpmd@7c000000 {</div><div class='add'>+				compatible = "apm,xgene-edac-pmd";</div><div class='add'>+				reg = &lt;0x0 0x7c000000 0x0 0x200000&gt;;</div><div class='add'>+				pmd-controller = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacpmd@7c200000 {</div><div class='add'>+				compatible = "apm,xgene-edac-pmd";</div><div class='add'>+				reg = &lt;0x0 0x7c200000 0x0 0x200000&gt;;</div><div class='add'>+				pmd-controller = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacpmd@7c400000 {</div><div class='add'>+				compatible = "apm,xgene-edac-pmd";</div><div class='add'>+				reg = &lt;0x0 0x7c400000 0x0 0x200000&gt;;</div><div class='add'>+				pmd-controller = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edacpmd@7c600000 {</div><div class='add'>+				compatible = "apm,xgene-edac-pmd";</div><div class='add'>+				reg = &lt;0x0 0x7c600000 0x0 0x200000&gt;;</div><div class='add'>+				pmd-controller = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie0: pcie@1f2b0000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			device_type = "pci";</div><div class='hunk'>@@ -395,6 +500,7 @@</div><div class='ctx'> 					 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xc5 0x1&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			clocks = &lt;&amp;pcie0clk 0&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1: pcie@1f2c0000 {</div><div class='hunk'>@@ -418,6 +524,7 @@</div><div class='ctx'> 					 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xcb 0x1&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			clocks = &lt;&amp;pcie1clk 0&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2: pcie@1f2d0000 {</div><div class='hunk'>@@ -441,6 +548,7 @@</div><div class='ctx'> 					 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xd1 0x1&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			clocks = &lt;&amp;pcie2clk 0&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie3: pcie@1f500000 {</div><div class='hunk'>@@ -464,6 +572,7 @@</div><div class='ctx'> 					 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xd7 0x1&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			clocks = &lt;&amp;pcie3clk 0&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie4: pcie@1f510000 {</div><div class='hunk'>@@ -487,6 +596,7 @@</div><div class='ctx'> 					 0x0 0x0 0x0 0x4 &amp;gic 0x0 0xdd 0x1&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			clocks = &lt;&amp;pcie4clk 0&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serial0: serial@1c020000 {</div><div class='hunk'>@@ -607,6 +717,19 @@</div><div class='ctx'> 			phy-names = "sata-phy";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sbgpio: sbgpio@17001000{</div><div class='add'>+			compatible = "apm,xgene-gpio-sb";</div><div class='add'>+			reg = &lt;0x0 0x17001000 0x0 0x400&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			interrupts = 	&lt;0x0 0x28 0x1&gt;,</div><div class='add'>+					&lt;0x0 0x29 0x1&gt;,</div><div class='add'>+					&lt;0x0 0x2a 0x1&gt;,</div><div class='add'>+					&lt;0x0 0x2b 0x1&gt;,</div><div class='add'>+					&lt;0x0 0x2c 0x1&gt;,</div><div class='add'>+					&lt;0x0 0x2d 0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc: rtc@10510000 {</div><div class='ctx'> 			compatible = "apm,xgene-rtc";</div><div class='ctx'> 			reg = &lt;0x0 0x10510000 0x0 0x400&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile<br/>index 301a0dada1fe..bb3c07209676 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/arm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/Makefile</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb</div><div class='ctx'> </div><div class='ctx'> always		:= $(dtb-y)</div><div class='ctx'> subdir-y	:= $(dts-dirs)</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi<br/>new file mode 100644<br/>index 000000000000..e3ee96036eca<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-base.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+	/*</div><div class='add'>+	 *  Devices shared by all Juno boards</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	memtimer: timer@2a810000 {</div><div class='add'>+		compatible = "arm,armv7-timer-mem";</div><div class='add'>+		reg = &lt;0x0 0x2a810000 0x0 0x10000&gt;;</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		status = "disabled";</div><div class='add'>+		frame@2a830000 {</div><div class='add'>+			frame-number = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;0 60 4&gt;;</div><div class='add'>+			reg = &lt;0x0 0x2a830000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@2c010000 {</div><div class='add'>+		compatible = "arm,gic-400", "arm,cortex-a15-gic";</div><div class='add'>+		reg = &lt;0x0 0x2c010000 0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0x2c02f000 0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x2c04f000 0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x2c06f000 0 0x2000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0x2c1c0000 0 0x40000&gt;;</div><div class='add'>+		v2m_0: v2m@0 {</div><div class='add'>+			compatible = "arm,gic-v2m-frame";</div><div class='add'>+			msi-controller;</div><div class='add'>+			reg = &lt;0 0 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/include/ "juno-clocks.dtsi"</div><div class='add'>+</div><div class='add'>+	dma@7ff00000 {</div><div class='add'>+		compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+		reg = &lt;0x0 0x7ff00000 0 0x1000&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		#dma-channels = &lt;8&gt;;</div><div class='add'>+		#dma-requests = &lt;32&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_faxiclk&gt;;</div><div class='add'>+		clock-names = "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc_uart0: uart@7ff80000 {</div><div class='add'>+		compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+		reg = &lt;0x0 0x7ff80000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_uartclk&gt;, &lt;&amp;soc_refclk100mhz&gt;;</div><div class='add'>+		clock-names = "uartclk", "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7ffa0000 {</div><div class='add'>+		compatible = "snps,designware-i2c";</div><div class='add'>+		reg = &lt;0x0 0x7ffa0000 0x0 0x1000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+		i2c-sda-hold-time-ns = &lt;500&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+</div><div class='add'>+		dvi0: dvi-transmitter@70 {</div><div class='add'>+			compatible = "nxp,tda998x";</div><div class='add'>+			reg = &lt;0x70&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dvi1: dvi-transmitter@71 {</div><div class='add'>+			compatible = "nxp,tda998x";</div><div class='add'>+			reg = &lt;0x71&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ohci@7ffb0000 {</div><div class='add'>+		compatible = "generic-ohci";</div><div class='add'>+		reg = &lt;0x0 0x7ffb0000 0x0 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_usb48mhz&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ehci@7ffc0000 {</div><div class='add'>+		compatible = "generic-ehci";</div><div class='add'>+		reg = &lt;0x0 0x7ffc0000 0x0 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_usb48mhz&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7ffd0000 {</div><div class='add'>+		compatible = "arm,pl354", "arm,primecell";</div><div class='add'>+		reg = &lt;0 0x7ffd0000 0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+		clock-names = "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* last 16MB of the first memory area is reserved for secure world use by firmware */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x0 0x7f000000&gt;,</div><div class='add'>+		      &lt;0x00000008 0x80000000 0x1 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0x08000000 0x04000000&gt;,</div><div class='add'>+			 &lt;1 0 0 0x14000000 0x04000000&gt;,</div><div class='add'>+			 &lt;2 0 0 0x18000000 0x04000000&gt;,</div><div class='add'>+			 &lt;3 0 0 0x1c000000 0x04000000&gt;,</div><div class='add'>+			 &lt;4 0 0 0x0c000000 0x04000000&gt;,</div><div class='add'>+			 &lt;5 0 0 0x10000000 0x04000000&gt;;</div><div class='add'>+</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 15&gt;;</div><div class='add'>+		interrupt-map = &lt;0 0  0 &amp;gic 0 0 0  68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  1 &amp;gic 0 0 0  69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  2 &amp;gic 0 0 0  70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  3 &amp;gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  4 &amp;gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  5 &amp;gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  6 &amp;gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  7 &amp;gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  8 &amp;gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  9 &amp;gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 10 &amp;gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 11 &amp;gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 12 &amp;gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/include/ "juno-motherboard.dtsi"</div><div class='add'>+	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-clocks.dtsi b/arch/arm64/boot/dts/arm/juno-clocks.dtsi<br/>index c9b89efe0f56..25352ed943e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-clocks.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/arm/juno-clocks.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-clocks.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-clocks.dtsi</a></div><div class='hunk'>@@ -36,9 +36,9 @@</div><div class='ctx'> 		clock-output-names = "apb_pclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc_faxiclk: refclk533mhz {</div><div class='add'>+	soc_faxiclk: refclk400mhz {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;533000000&gt;;</div><div class='add'>+		clock-frequency = &lt;400000000&gt;;</div><div class='ctx'> 		clock-output-names = "faxi_clk";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi<br/>index 351c95bda89e..021e0f40f419 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-motherboard.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/arm/juno-motherboard.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-motherboard.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-motherboard.dtsi</a></div><div class='hunk'>@@ -54,6 +54,55 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			gpio_keys {</div><div class='add'>+				compatible = "gpio-keys";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				button@1 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;116&gt;;</div><div class='add'>+					label = "POWER";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 0 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				button@2 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;102&gt;;</div><div class='add'>+					label = "HOME";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 1 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				button@3 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;152&gt;;</div><div class='add'>+					label = "RLOCK";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 2 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				button@4 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;115&gt;;</div><div class='add'>+					label = "VOL+";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 3 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				button@5 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;114&gt;;</div><div class='add'>+					label = "VOL-";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 4 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				button@6 {</div><div class='add'>+					debounce_interval = &lt;50&gt;;</div><div class='add'>+					wakeup = &lt;1&gt;;</div><div class='add'>+					linux,code = &lt;99&gt;;</div><div class='add'>+					label = "NMI";</div><div class='add'>+					gpios = &lt;&amp;iofpga_gpio0 5 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			ethernet@2,00000000 {</div><div class='ctx'> 				compatible = "smsc,lan9118", "smsc,lan9115";</div><div class='ctx'> 				reg = &lt;2 0x00000000 0x10000&gt;;</div><div class='hunk'>@@ -89,6 +138,74 @@</div><div class='ctx'> 					clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				apbregs@010000 {</div><div class='add'>+					compatible = "syscon", "simple-mfd";</div><div class='add'>+					reg = &lt;0x010000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+					led@08.0 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x01&gt;;</div><div class='add'>+						label = "vexpress:0";</div><div class='add'>+						linux,default-trigger = "heartbeat";</div><div class='add'>+						default-state = "on";</div><div class='add'>+					};</div><div class='add'>+					led@08.1 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x02&gt;;</div><div class='add'>+						label = "vexpress:1";</div><div class='add'>+						linux,default-trigger = "mmc0";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.2 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x04&gt;;</div><div class='add'>+						label = "vexpress:2";</div><div class='add'>+						linux,default-trigger = "cpu0";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.3 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x08&gt;;</div><div class='add'>+						label = "vexpress:3";</div><div class='add'>+						linux,default-trigger = "cpu1";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.4 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x10&gt;;</div><div class='add'>+						label = "vexpress:4";</div><div class='add'>+						linux,default-trigger = "cpu2";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.5 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x20&gt;;</div><div class='add'>+						label = "vexpress:5";</div><div class='add'>+						linux,default-trigger = "cpu3";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.6 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x40&gt;;</div><div class='add'>+						label = "vexpress:6";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+					led@08.7 {</div><div class='add'>+						compatible = "register-bit-led";</div><div class='add'>+						offset = &lt;0x08&gt;;</div><div class='add'>+						mask = &lt;0x80&gt;;</div><div class='add'>+						label = "vexpress:7";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				mmci@050000 {</div><div class='ctx'> 					compatible = "arm,pl180", "arm,primecell";</div><div class='ctx'> 					reg = &lt;0x050000 0x1000&gt;;</div><div class='hunk'>@@ -148,5 +265,17 @@</div><div class='ctx'> 					clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='ctx'> 					clock-names = "apb_pclk";</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				iofpga_gpio0: gpio@1d0000 {</div><div class='add'>+					compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+					reg = &lt;0x1d0000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;6&gt;;</div><div class='add'>+					clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+					clock-names = "apb_pclk";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts<br/>new file mode 100644<br/>index 000000000000..c62751153a4f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno-r1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno-r1.dts</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+/*</div><div class='add'>+ * ARM Ltd. Juno Platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 ARM Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under a dual GPLv2 or BSD license.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ARM Juno development board (r1)";</div><div class='add'>+	compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;soc_uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		A57_0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a57","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A57_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A57_1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a57","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A57_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A53_0: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a53","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A53_1: cpu@101 {</div><div class='add'>+			compatible = "arm,cortex-a53","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x101&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A53_2: cpu@102 {</div><div class='add'>+			compatible = "arm,cortex-a53","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x102&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A53_3: cpu@103 {</div><div class='add'>+			compatible = "arm,cortex-a53","arm,armv8";</div><div class='add'>+			reg = &lt;0x0 0x103&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A57_L2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A53_L2: l2-cache1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		interrupts = &lt;GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;A57_0&gt;,</div><div class='add'>+				     &lt;&amp;A57_1&gt;,</div><div class='add'>+				     &lt;&amp;A53_0&gt;,</div><div class='add'>+				     &lt;&amp;A53_1&gt;,</div><div class='add'>+				     &lt;&amp;A53_2&gt;,</div><div class='add'>+				     &lt;&amp;A53_3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	#include "juno-base.dtsi"</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;memtimer {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts<br/>index 5e9110a3353d..d7cbdd482a61 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/arm/juno.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/juno.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/juno.dts</a></div><div class='hunk'>@@ -91,33 +91,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		/* last 16MB of the first memory area is reserved for secure world use by firmware */</div><div class='del'>-		reg = &lt;0x00000000 0x80000000 0x0 0x7f000000&gt;,</div><div class='del'>-		      &lt;0x00000008 0x80000000 0x1 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gic: interrupt-controller@2c001000 {</div><div class='del'>-		compatible = "arm,gic-400", "arm,cortex-a15-gic";</div><div class='del'>-		reg = &lt;0x0 0x2c010000 0 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0x2c02f000 0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x2c04f000 0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x2c06f000 0 0x2000&gt;;</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pmu {</div><div class='ctx'> 		compatible = "arm,armv8-pmuv3";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -134,105 +107,5 @@</div><div class='ctx'> 				     &lt;&amp;A53_3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/include/ "juno-clocks.dtsi"</div><div class='del'>-</div><div class='del'>-	dma@7ff00000 {</div><div class='del'>-		compatible = "arm,pl330", "arm,primecell";</div><div class='del'>-		reg = &lt;0x0 0x7ff00000 0 0x1000&gt;;</div><div class='del'>-		#dma-cells = &lt;1&gt;;</div><div class='del'>-		#dma-channels = &lt;8&gt;;</div><div class='del'>-		#dma-requests = &lt;32&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_faxiclk&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	soc_uart0: uart@7ff80000 {</div><div class='del'>-		compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-		reg = &lt;0x0 0x7ff80000 0x0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_uartclk&gt;, &lt;&amp;soc_refclk100mhz&gt;;</div><div class='del'>-		clock-names = "uartclk", "apb_pclk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7ffa0000 {</div><div class='del'>-		compatible = "snps,designware-i2c";</div><div class='del'>-		reg = &lt;0x0 0x7ffa0000 0x0 0x1000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='del'>-		i2c-sda-hold-time-ns = &lt;500&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='del'>-</div><div class='del'>-		dvi0: dvi-transmitter@70 {</div><div class='del'>-			compatible = "nxp,tda998x";</div><div class='del'>-			reg = &lt;0x70&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dvi1: dvi-transmitter@71 {</div><div class='del'>-			compatible = "nxp,tda998x";</div><div class='del'>-			reg = &lt;0x71&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ohci@7ffb0000 {</div><div class='del'>-		compatible = "generic-ohci";</div><div class='del'>-		reg = &lt;0x0 0x7ffb0000 0x0 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_usb48mhz&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ehci@7ffc0000 {</div><div class='del'>-		compatible = "generic-ehci";</div><div class='del'>-		reg = &lt;0x0 0x7ffc0000 0x0 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_usb48mhz&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory-controller@7ffd0000 {</div><div class='del'>-		compatible = "arm,pl354", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x7ffd0000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	smb {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0 0 0 0x08000000 0x04000000&gt;,</div><div class='del'>-			 &lt;1 0 0 0x14000000 0x04000000&gt;,</div><div class='del'>-			 &lt;2 0 0 0x18000000 0x04000000&gt;,</div><div class='del'>-			 &lt;3 0 0 0x1c000000 0x04000000&gt;,</div><div class='del'>-			 &lt;4 0 0 0x0c000000 0x04000000&gt;,</div><div class='del'>-			 &lt;5 0 0 0x10000000 0x04000000&gt;;</div><div class='del'>-</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 15&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0  0 &amp;gic 0  68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  1 &amp;gic 0  69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  2 &amp;gic 0  70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  3 &amp;gic 0 160 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  4 &amp;gic 0 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  5 &amp;gic 0 162 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  6 &amp;gic 0 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  7 &amp;gic 0 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  8 &amp;gic 0 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0  9 &amp;gic 0 166 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0 10 &amp;gic 0 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0 11 &amp;gic 0 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0 0 12 &amp;gic 0 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		/include/ "juno-motherboard.dtsi"</div><div class='del'>-	};</div><div class='add'>+	#include "juno-base.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts<br/>new file mode 100644<br/>index 000000000000..5b1d0181023b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts</a></div><div class='hunk'>@@ -0,0 +1,191 @@</div><div class='add'>+/*</div><div class='add'>+ * ARM Ltd. Versatile Express</div><div class='add'>+ *</div><div class='add'>+ * LogicTile Express 20MG</div><div class='add'>+ * V2F-1XV7</div><div class='add'>+ *</div><div class='add'>+ * Cortex-A53 (2 cores) Soft Macrocell Model</div><div class='add'>+ *</div><div class='add'>+ * HBI-0247C</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "V2F-1XV7 Cortex-A53x2 SMM";</div><div class='add'>+	arm,hbi = &lt;0x247&gt;;</div><div class='add'>+	arm,vexpress,site = &lt;0xf&gt;;</div><div class='add'>+	compatible = "arm,vexpress,v2f-1xv7,ca53x2", "arm,vexpress,v2f-1xv7", "arm,vexpress";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:38400n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;v2m_serial0;</div><div class='add'>+		serial1 = &amp;v2m_serial1;</div><div class='add'>+		serial2 = &amp;v2m_serial2;</div><div class='add'>+		serial3 = &amp;v2m_serial3;</div><div class='add'>+		i2c0 = &amp;v2m_i2c_dvi;</div><div class='add'>+		i2c1 = &amp;v2m_i2c_pcie;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			reg = &lt;0 0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			reg = &lt;0 1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		L2_0: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x80000000 0 0x80000000&gt;; /* 2GB @ 2GB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@2c001000 {</div><div class='add'>+		compatible = "arm,gic-400";</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0 0x2c001000 0 0x1000&gt;,</div><div class='add'>+		      &lt;0 0x2c002000 0 0x2000&gt;,</div><div class='add'>+		      &lt;0 0x2c004000 0 0x2000&gt;,</div><div class='add'>+		      &lt;0 0x2c006000 0 0x2000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcc {</div><div class='add'>+		compatible = "arm,vexpress,config-bus";</div><div class='add'>+		arm,vexpress,config-bridge = &lt;&amp;v2m_sysreg&gt;;</div><div class='add'>+</div><div class='add'>+		smbclk: osc@4 {</div><div class='add'>+			/* SMC clock */</div><div class='add'>+			compatible = "arm,vexpress-osc";</div><div class='add'>+			arm,vexpress-sysreg,func = &lt;1 4&gt;;</div><div class='add'>+			freq-range = &lt;40000000 40000000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "smclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volt@0 {</div><div class='add'>+			/* VIO to expansion board above */</div><div class='add'>+			compatible = "arm,vexpress-volt";</div><div class='add'>+			arm,vexpress-sysreg,func = &lt;2 0&gt;;</div><div class='add'>+			regulator-name = "VIO_UP";</div><div class='add'>+			regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volt@1 {</div><div class='add'>+			/* 12V from power connector J6 */</div><div class='add'>+			compatible = "arm,vexpress-volt";</div><div class='add'>+			arm,vexpress-sysreg,func = &lt;2 1&gt;;</div><div class='add'>+			regulator-name = "12";</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		temp@0 {</div><div class='add'>+			/* FPGA temperature */</div><div class='add'>+			compatible = "arm,vexpress-temp";</div><div class='add'>+			arm,vexpress-sysreg,func = &lt;4 0&gt;;</div><div class='add'>+			label = "FPGA";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0x08000000 0x04000000&gt;,</div><div class='add'>+			 &lt;1 0 0 0x14000000 0x04000000&gt;,</div><div class='add'>+			 &lt;2 0 0 0x18000000 0x04000000&gt;,</div><div class='add'>+			 &lt;3 0 0 0x1c000000 0x04000000&gt;,</div><div class='add'>+			 &lt;4 0 0 0x0c000000 0x04000000&gt;,</div><div class='add'>+			 &lt;5 0 0 0x10000000 0x04000000&gt;;</div><div class='add'>+</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 63&gt;;</div><div class='add'>+		interrupt-map = &lt;0 0  0 &amp;gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  1 &amp;gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  2 &amp;gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  3 &amp;gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  4 &amp;gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  5 &amp;gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  6 &amp;gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  7 &amp;gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  8 &amp;gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0  9 &amp;gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 10 &amp;gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 11 &amp;gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 12 &amp;gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 13 &amp;gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 14 &amp;gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 15 &amp;gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 16 &amp;gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 17 &amp;gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 18 &amp;gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 19 &amp;gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 20 &amp;gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 21 &amp;gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 22 &amp;gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 23 &amp;gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 24 &amp;gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 25 &amp;gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 26 &amp;gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 27 &amp;gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 28 &amp;gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 29 &amp;gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 30 &amp;gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 31 &amp;gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 32 &amp;gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 33 &amp;gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 34 &amp;gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 35 &amp;gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 36 &amp;gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 37 &amp;gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 38 &amp;gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 39 &amp;gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 40 &amp;gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 41 &amp;gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 42 &amp;gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi<br/>index d8c0bdc51882..9cb7cf94284a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a></div><div class='hunk'>@@ -376,10 +376,19 @@</div><div class='ctx'> 		gic0: interrupt-controller@8010,00000000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x8010 0x00000000 0x0 0x010000&gt;, /* GICD */</div><div class='ctx'> 			      &lt;0x8010 0x80000000 0x0 0x600000&gt;; /* GICR */</div><div class='ctx'> 			interrupts = &lt;1 9 0xf04&gt;;</div><div class='add'>+</div><div class='add'>+			its: gic-its@8010,00020000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				msi-controller;</div><div class='add'>+				reg = &lt;0x8010 0x20000 0x0 0x200000&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uaa0: serial@87e0,24000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile<br/>new file mode 100644<br/>index 000000000000..fa81a6ee6473<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/hisilicon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb</div><div class='add'>+</div><div class='add'>+always		:= $(dtb-y)</div><div class='add'>+subdir-y	:= $(dts-dirs)</div><div class='add'>+clean-files	:= *.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts<br/>new file mode 100644<br/>index 000000000000..e36a539468a5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/*</div><div class='add'>+ * dts file for Hisilicon HiKey Development Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Hisilicon Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/*Reserved 1MB memory for MCU*/</div><div class='add'>+/memreserve/ 0x05e00000 0x00100000;</div><div class='add'>+</div><div class='add'>+#include "hi6220.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HiKey Development Board";</div><div class='add'>+	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi<br/>new file mode 100644<br/>index 000000000000..3f03380815b6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/*</div><div class='add'>+ * dts file for Hisilicon Hi6220 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, Hisilicon Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "hisilicon,hi6220";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@101 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@102 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@103 {</div><div class='add'>+			compatible = "arm,cortex-a53", "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@f6801000 {</div><div class='add'>+		compatible = "arm,gic-400";</div><div class='add'>+		reg = &lt;0x0 0xf6801000 0 0x1000&gt;, /* GICD */</div><div class='add'>+		      &lt;0x0 0xf6802000 0 0x2000&gt;, /* GICC */</div><div class='add'>+		      &lt;0x0 0xf6804000 0 0x2000&gt;, /* GICH */</div><div class='add'>+		      &lt;0x0 0xf6806000 0 0x2000&gt;; /* GICV */</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ao_ctrl: ao_ctrl@f7800000 {</div><div class='add'>+			compatible = "hisilicon,hi6220-aoctrl", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xf7800000 0x0 0x2000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_ctrl: sys_ctrl@f7030000 {</div><div class='add'>+			compatible = "hisilicon,hi6220-sysctrl", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xf7030000 0x0 0x2000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		media_ctrl: media_ctrl@f4410000 {</div><div class='add'>+			compatible = "hisilicon,hi6220-mediactrl", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xf4410000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm_ctrl: pm_ctrl@f7032000 {</div><div class='add'>+			compatible = "hisilicon,hi6220-pmctrl", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xf7032000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: uart@f8015000 {	/* console */</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xf8015000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ao_ctrl 36&gt;, &lt;&amp;ao_ctrl 36&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi<br/>index 924fdb6673ff..27237a1c1a87 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a></div><div class='hunk'>@@ -91,13 +91,13 @@</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13</div><div class='del'>-			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 14</div><div class='del'>-			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 11</div><div class='del'>-			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10</div><div class='del'>-			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+			      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='hunk'>@@ -106,14 +106,13 @@</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		syscfg_pctl_a: syscfg_pctl_a@10005000 {</div><div class='del'>-			compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";</div><div class='del'>-			reg = &lt;0 0x10005000 0 0x1000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pio: pinctrl@0x10005000 {</div><div class='add'>+		/*</div><div class='add'>+		 * Pinctrl access register at 0x10005000 through regmap.</div><div class='add'>+		 * Register 0x1000b000 is used by EINT.</div><div class='add'>+		 */</div><div class='add'>+		pio: pinctrl@10005000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-pinctrl";</div><div class='del'>-			reg = &lt;0 0x1000B000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='ctx'> 			mediatek,pctl-regmap = &lt;&amp;syscfg_pctl_a&gt;;</div><div class='ctx'> 			pins-are-numbered;</div><div class='ctx'> 			gpio-controller;</div><div class='hunk'>@@ -121,13 +120,18 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-						&lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-						&lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscfg_pctl_a: syscfg_pctl_a@10005000 {</div><div class='add'>+			compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0 0x10005000 0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysirq: intpol-controller@10200620 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-sysirq",</div><div class='del'>-					"mediatek,mt6577-sysirq";</div><div class='add'>+				     "mediatek,mt6577-sysirq";</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='hunk'>@@ -149,7 +153,7 @@</div><div class='ctx'> </div><div class='ctx'> 		uart0: serial@11002000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-uart",</div><div class='del'>-					"mediatek,mt6577-uart";</div><div class='add'>+				     "mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11002000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;uart_clk&gt;;</div><div class='hunk'>@@ -158,7 +162,7 @@</div><div class='ctx'> </div><div class='ctx'> 		uart1: serial@11003000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-uart",</div><div class='del'>-					"mediatek,mt6577-uart";</div><div class='add'>+				     "mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11003000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;uart_clk&gt;;</div><div class='hunk'>@@ -167,7 +171,7 @@</div><div class='ctx'> </div><div class='ctx'> 		uart2: serial@11004000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-uart",</div><div class='del'>-					"mediatek,mt6577-uart";</div><div class='add'>+				     "mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11004000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;uart_clk&gt;;</div><div class='hunk'>@@ -176,13 +180,12 @@</div><div class='ctx'> </div><div class='ctx'> 		uart3: serial@11005000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-uart",</div><div class='del'>-					"mediatek,mt6577-uart";</div><div class='add'>+				     "mediatek,mt6577-uart";</div><div class='ctx'> 			reg = &lt;0 0x11005000 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;uart_clk&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi<br/>new file mode 100644<br/>index 000000000000..535532b9287f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;pm8916_gpios {</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pm8916_gpios_default&gt;;</div><div class='add'>+</div><div class='add'>+	pm8916_gpios_default: default {</div><div class='add'>+		usb_hub_reset_pm {</div><div class='add'>+			pins = "gpio1";</div><div class='add'>+			function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+		usb_sw_sel_pm {</div><div class='add'>+			pins = "gpio2";</div><div class='add'>+			function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+			input-disable;</div><div class='add'>+		};</div><div class='add'>+		usr_led_3_ctrl {</div><div class='add'>+			pins = "gpio3";</div><div class='add'>+			function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+		usr_led_4_ctrl {</div><div class='add'>+			pins = "gpio4";</div><div class='add'>+			function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi<br/>new file mode 100644<br/>index 000000000000..5f7023f90df7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;msmgpio {</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;soc_gpios_default&gt;;</div><div class='add'>+</div><div class='add'>+	soc_gpios_default: default {</div><div class='add'>+		usr_led_1_ctrl_default: usr_led_1_ctrl_default {</div><div class='add'>+			pins = "gpio21";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+		usr_led_2_ctrl_default: usr_led_2_ctrl_default {</div><div class='add'>+			pins = "gpio120";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi<br/>index 703a4f16e711..98abece6b233 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi</a></div><div class='hunk'>@@ -12,6 +12,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "msm8916.dtsi"</div><div class='add'>+#include "pm8916.dtsi"</div><div class='add'>+#include "apq8016-sbc-soc-pins.dtsi"</div><div class='add'>+#include "apq8016-sbc-pmic-pins.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi<br/>index bea871b0df13..a1aa0b201e92 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "msm8916.dtsi"</div><div class='add'>+#include "pm8916.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi<br/>index f212b8303d04..0f49ebd0aa8b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/msm8916.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/msm8916.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a></div><div class='hunk'>@@ -77,7 +77,12 @@</div><div class='ctx'> 		ranges = &lt;0 0 0 0xffffffff&gt;;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> </div><div class='del'>-		pinctrl@1000000 {</div><div class='add'>+		restart@4ab000 {</div><div class='add'>+			compatible = "qcom,pshold";</div><div class='add'>+			reg = &lt;0x4ab000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msmgpio: pinctrl@1000000 {</div><div class='ctx'> 			compatible = "qcom,msm8916-pinctrl";</div><div class='ctx'> 			reg = &lt;0x1000000 0x300000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -192,5 +197,23 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		spmi_bus: spmi@200f000 {</div><div class='add'>+			compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x200f000 0x001000&gt;,</div><div class='add'>+			      &lt;0x2400000 0x400000&gt;,</div><div class='add'>+			      &lt;0x2c00000 0x400000&gt;,</div><div class='add'>+			      &lt;0x3800000 0x200000&gt;,</div><div class='add'>+			      &lt;0x200a000 0x002100&gt;;</div><div class='add'>+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";</div><div class='add'>+			interrupt-names = "periph_irq";</div><div class='add'>+			interrupts = &lt;GIC_SPI 190 IRQ_TYPE_NONE&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi<br/>new file mode 100644<br/>index 000000000000..b222ece7e3d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/boot/dts/qcom/pm8916.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/boot/dts/qcom/pm8916.dtsi</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-vadc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+</div><div class='add'>+	usid0: pm8916@0 {</div><div class='add'>+		compatible = "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rtc@6000 {</div><div class='add'>+			compatible = "qcom,pm8941-rtc";</div><div class='add'>+			reg = &lt;0x6000 0x6100&gt;;</div><div class='add'>+			reg-names = "rtc", "alarm";</div><div class='add'>+			interrupts = &lt;0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwrkey@800 {</div><div class='add'>+			compatible = "qcom,pm8941-pwrkey";</div><div class='add'>+			reg = &lt;0x800&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x8 0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			debounce = &lt;15625&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8916_gpios: gpios@c000 {</div><div class='add'>+			compatible = "qcom,pm8916-gpio";</div><div class='add'>+			reg = &lt;0xc000 0x400&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xc0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xc3 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8916_mpps: mpps@a000 {</div><div class='add'>+			compatible = "qcom,pm8916-mpp";</div><div class='add'>+			reg = &lt;0xa000 0x400&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;0 0xa0 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa1 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa2 0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 0xa3 0 IRQ_TYPE_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8916_temp: temp-alarm@2400 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0x2400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			io-channels = &lt;&amp;pm8916_vadc VADC_DIE_TEMP&gt;;</div><div class='add'>+			io-channel-names = "thermal";</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8916_vadc: vadc@3100 {</div><div class='add'>+			compatible = "qcom,spmi-vadc";</div><div class='add'>+			reg = &lt;0x3100 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			usb_in {</div><div class='add'>+				reg = &lt;VADC_USBIN&gt;;</div><div class='add'>+				qcom,pre-scaling = &lt;1 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			vph_pwr {</div><div class='add'>+				reg = &lt;VADC_VSYS&gt;;</div><div class='add'>+				qcom,pre-scaling = &lt;1 3&gt;;</div><div class='add'>+			};</div><div class='add'>+			die_temp {</div><div class='add'>+				reg = &lt;VADC_DIE_TEMP&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_625mv {</div><div class='add'>+				reg = &lt;VADC_REF_625MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_1250v {</div><div class='add'>+				reg = &lt;VADC_REF_1250MV&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_gnd {</div><div class='add'>+				reg = &lt;VADC_GND_REF&gt;;</div><div class='add'>+			};</div><div class='add'>+			ref_vdd {</div><div class='add'>+				reg = &lt;VADC_VDD_VADC&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usid1: pm8916@1 {</div><div class='add'>+		compatible = "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x1 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/skeleton.dtsi b/arch/arm64/boot/dts/skeleton.dtsi<br/>deleted file mode 100644<br/>index 38ead821bb42..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm64/boot/dts/skeleton.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/boot/dts/skeleton.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Skeleton device tree; the bare minimum needed to boot; just include and</div><div class='del'>- * add a compatible value.  The bootloader will typically populate the memory</div><div class='del'>- * node.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-	chosen { };</div><div class='del'>-	aliases { };</div><div class='del'>-	memory { device_type = "memory"; reg = &lt;0 0 0&gt;; };</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig<br/>index 2ed7449d9273..4e17e7ede33d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/configs/defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/configs/defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/configs/defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/configs/defconfig</a></div><div class='hunk'>@@ -33,6 +33,7 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> CONFIG_ARCH_EXYNOS7=y</div><div class='ctx'> CONFIG_ARCH_FSL_LS2085A=y</div><div class='add'>+CONFIG_ARCH_HISI=y</div><div class='ctx'> CONFIG_ARCH_MEDIATEK=y</div><div class='ctx'> CONFIG_ARCH_SEATTLE=y</div><div class='ctx'> CONFIG_ARCH_TEGRA=y</div><div class='hunk'>@@ -82,6 +83,7 @@ CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_ATA=y</div><div class='ctx'> CONFIG_SATA_AHCI=y</div><div class='ctx'> CONFIG_SATA_AHCI_PLATFORM=y</div><div class='add'>+CONFIG_AHCI_CEVA=y</div><div class='ctx'> CONFIG_AHCI_XGENE=y</div><div class='ctx'> CONFIG_PATA_PLATFORM=y</div><div class='ctx'> CONFIG_PATA_OF_PLATFORM=y</div><div class='hunk'>@@ -94,6 +96,7 @@ CONFIG_SMC91X=y</div><div class='ctx'> CONFIG_SMSC911X=y</div><div class='ctx'> # CONFIG_WLAN is not set</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO=y</div><div class='ctx'> # CONFIG_SERIO_SERPORT is not set</div><div class='ctx'> CONFIG_SERIO_AMBAKMI=y</div><div class='ctx'> CONFIG_LEGACY_PTY_COUNT=16</div><div class='hunk'>@@ -138,6 +141,12 @@ CONFIG_MMC_ARMMMCI=y</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='ctx'> CONFIG_MMC_SDHCI_PLTFM=y</div><div class='ctx'> CONFIG_MMC_SPI=y</div><div class='add'>+CONFIG_NEW_LEDS=y</div><div class='add'>+CONFIG_LEDS_CLASS=y</div><div class='add'>+CONFIG_LEDS_SYSCON=y</div><div class='add'>+CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_CPU=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_EFI=y</div><div class='ctx'> CONFIG_RTC_DRV_XGENE=y</div><div class='hunk'>@@ -180,6 +189,7 @@ CONFIG_LOCKUP_DETECTOR=y</div><div class='ctx'> # CONFIG_SCHED_DEBUG is not set</div><div class='ctx'> # CONFIG_DEBUG_PREEMPT is not set</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_MEMTEST=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> CONFIG_ARM64_CRYPTO=y</div><div class='head'>diff --git a/arch/arm64/crypto/aes-ce-ccm-glue.c b/arch/arm64/crypto/aes-ce-ccm-glue.c<br/>index 6c348df5bf36..3303e8a7b837 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/crypto/aes-ce-ccm-glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/crypto/aes-ce-ccm-glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/crypto/aes-ce-ccm-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/crypto/aes-ce-ccm-glue.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aes-ce-setkey.h"</div><div class='head'>diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild<br/>index 55103e50c51b..70fd9ffb58cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/Kbuild</a></div><div class='hunk'>@@ -25,6 +25,7 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += msi.h</div><div class='hunk'>@@ -35,7 +36,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='ctx'> generic-y += rwsem.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='head'>diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h<br/>index 59c05d8ea4a0..406485ed110a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/acpi.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/acpi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/acpi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/acpi.h</a></div><div class='hunk'>@@ -16,8 +16,17 @@</div><div class='ctx'> #include &lt;linux/irqchip/arm-gic-acpi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/psci.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> </div><div class='add'>+/* Macros for consistency checks of the GICC subtable of MADT */</div><div class='add'>+#define ACPI_MADT_GICC_LENGTH	\</div><div class='add'>+	(acpi_gbl_FADT.header.revision &lt; 6 ? 76 : 80)</div><div class='add'>+</div><div class='add'>+#define BAD_MADT_GICC_ENTRY(entry, end)						\</div><div class='add'>+	(!(entry) || (unsigned long)(entry) + sizeof(*(entry)) &gt; (end) ||	\</div><div class='add'>+	 (entry)-&gt;header.length != ACPI_MADT_GICC_LENGTH)</div><div class='add'>+</div><div class='ctx'> /* Basic configuration for ACPI */</div><div class='ctx'> #ifdef	CONFIG_ACPI</div><div class='ctx'> /* ACPI table mapping after acpi_gbl_permanent_mmap is set */</div><div class='hunk'>@@ -39,18 +48,6 @@ extern int acpi_disabled;</div><div class='ctx'> extern int acpi_noirq;</div><div class='ctx'> extern int acpi_pci_disabled;</div><div class='ctx'> </div><div class='del'>-/* 1 to indicate PSCI 0.2+ is implemented */</div><div class='del'>-static inline bool acpi_psci_present(void)</div><div class='del'>-{</div><div class='del'>-	return acpi_gbl_FADT.arm_boot_flags &amp; ACPI_FADT_PSCI_COMPLIANT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* 1 to indicate HVC must be used instead of SMC as the PSCI conduit */</div><div class='del'>-static inline bool acpi_psci_use_hvc(void)</div><div class='del'>-{</div><div class='del'>-	return acpi_gbl_FADT.arm_boot_flags &amp; ACPI_FADT_PSCI_USE_HVC;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void disable_acpi(void)</div><div class='ctx'> {</div><div class='ctx'> 	acpi_disabled = 1;</div><div class='hunk'>@@ -88,9 +85,11 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) { }</div><div class='ctx'> void __init acpi_init_cpus(void);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='del'>-static inline bool acpi_psci_present(void) { return false; }</div><div class='del'>-static inline bool acpi_psci_use_hvc(void) { return false; }</div><div class='ctx'> static inline void acpi_init_cpus(void) { }</div><div class='ctx'> #endif /* CONFIG_ACPI */</div><div class='ctx'> </div><div class='add'>+static inline const char *acpi_get_enable_method(int cpu)</div><div class='add'>+{</div><div class='add'>+	return acpi_psci_present() ? "psci" : NULL;</div><div class='add'>+}</div><div class='ctx'> #endif /*_ASM_ACPI_H*/</div><div class='head'>diff --git a/arch/arm64/include/asm/alternative-asm.h b/arch/arm64/include/asm/alternative-asm.h<br/>deleted file mode 100644<br/>index 919a67855b63..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/alternative-asm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/alternative-asm.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-#ifndef __ASM_ALTERNATIVE_ASM_H</div><div class='del'>-#define __ASM_ALTERNATIVE_ASM_H</div><div class='del'>-</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len</div><div class='del'>-	.word \orig_offset - .</div><div class='del'>-	.word \alt_offset - .</div><div class='del'>-	.hword \feature</div><div class='del'>-	.byte \orig_len</div><div class='del'>-	.byte \alt_len</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro alternative_insn insn1 insn2 cap</div><div class='del'>-661:	\insn1</div><div class='del'>-662:	.pushsection .altinstructions, "a"</div><div class='del'>-	altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f</div><div class='del'>-	.popsection</div><div class='del'>-	.pushsection .altinstr_replacement, "ax"</div><div class='del'>-663:	\insn2</div><div class='del'>-664:	.popsection</div><div class='del'>-	.if ((664b-663b) != (662b-661b))</div><div class='del'>-		.error "Alternatives instruction length mismatch"</div><div class='del'>-	.endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#endif  /*  __ASSEMBLY__  */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_ALTERNATIVE_ASM_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h<br/>index d261f01e2bae..c385a0c4057f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/alternative.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/alternative.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/alternative.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/alternative.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef __ASM_ALTERNATIVE_H</div><div class='ctx'> #define __ASM_ALTERNATIVE_H</div><div class='ctx'> </div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -24,7 +26,20 @@ void free_alternatives_memory(void);</div><div class='ctx'> 	" .byte 662b-661b\n"				/* source len      */ \</div><div class='ctx'> 	" .byte 664f-663f\n"				/* replacement len */</div><div class='ctx'> </div><div class='del'>-/* alternative assembly primitive: */</div><div class='add'>+/*</div><div class='add'>+ * alternative assembly primitive:</div><div class='add'>+ *</div><div class='add'>+ * If any of these .org directive fail, it means that insn1 and insn2</div><div class='add'>+ * don't have the same length. This used to be written as</div><div class='add'>+ *</div><div class='add'>+ * .if ((664b-663b) != (662b-661b))</div><div class='add'>+ * 	.error "Alternatives instruction length mismatch"</div><div class='add'>+ * .endif</div><div class='add'>+ *</div><div class='add'>+ * but most assemblers die if insn1 or insn2 have a .inst. This should</div><div class='add'>+ * be fixed in a binutils release posterior to 2.25.51.0.2 (anything</div><div class='add'>+ * containing commit 4e4d08cf7399b606 or c1baaddf8861).</div><div class='add'>+ */</div><div class='ctx'> #define ALTERNATIVE(oldinstr, newinstr, feature)			\</div><div class='ctx'> 	"661:\n\t"							\</div><div class='ctx'> 	oldinstr "\n"							\</div><div class='hunk'>@@ -37,8 +52,31 @@ void free_alternatives_memory(void);</div><div class='ctx'> 	newinstr "\n"							\</div><div class='ctx'> 	"664:\n\t"							\</div><div class='ctx'> 	".popsection\n\t"						\</div><div class='del'>-	".if ((664b-663b) != (662b-661b))\n\t"				\</div><div class='del'>-	"	.error \"Alternatives instruction length mismatch\"\n\t"\</div><div class='del'>-	".endif\n"</div><div class='add'>+	".org	. - (664b-663b) + (662b-661b)\n\t"			\</div><div class='add'>+	".org	. - (662b-661b) + (664b-663b)\n"</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len</div><div class='add'>+	.word \orig_offset - .</div><div class='add'>+	.word \alt_offset - .</div><div class='add'>+	.hword \feature</div><div class='add'>+	.byte \orig_len</div><div class='add'>+	.byte \alt_len</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro alternative_insn insn1 insn2 cap</div><div class='add'>+661:	\insn1</div><div class='add'>+662:	.pushsection .altinstructions, "a"</div><div class='add'>+	altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f</div><div class='add'>+	.popsection</div><div class='add'>+	.pushsection .altinstr_replacement, "ax"</div><div class='add'>+663:	\insn2</div><div class='add'>+664:	.popsection</div><div class='add'>+	.org	. - (664b-663b) + (662b-661b)</div><div class='add'>+	.org	. - (662b-661b) + (664b-663b)</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif  /*  __ASSEMBLY__  */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ALTERNATIVE_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h<br/>index 71f19c4dc0de..0fa47c4275cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/barrier.h</a></div><div class='hunk'>@@ -114,7 +114,7 @@ do {									\</div><div class='ctx'> #define read_barrier_depends()		do { } while(0)</div><div class='ctx'> #define smp_read_barrier_depends()	do { } while(0)</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value)	do { var = value; smp_mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)</div><div class='ctx'> #define nop()		asm volatile("nop");</div><div class='ctx'> </div><div class='ctx'> #define smp_mb__before_atomic()	smp_mb()</div><div class='head'>diff --git a/arch/arm64/include/asm/boot.h b/arch/arm64/include/asm/boot.h<br/>new file mode 100644<br/>index 000000000000..81151b67b26b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/boot.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/boot.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_BOOT_H</div><div class='add'>+#define __ASM_BOOT_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/sizes.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * arm64 requires the DTB to be 8 byte aligned and</div><div class='add'>+ * not exceed 2MB in size.</div><div class='add'>+ */</div><div class='add'>+#define MIN_FDT_ALIGN		8</div><div class='add'>+#define MAX_FDT_SIZE		SZ_2M</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h<br/>index 67d309cc3b6b..c75b8d027eb1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/cacheflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -40,10 +40,6 @@</div><div class='ctx'>  *	the implementation assumes non-aliasing VIPT D-cache and (aliasing)</div><div class='ctx'>  *	VIPT or ASID-tagged VIVT I-cache.</div><div class='ctx'>  *</div><div class='del'>- *	flush_cache_all()</div><div class='del'>- *</div><div class='del'>- *		Unconditionally clean and invalidate the entire cache.</div><div class='del'>- *</div><div class='ctx'>  *	flush_cache_mm(mm)</div><div class='ctx'>  *</div><div class='ctx'>  *		Clean and invalidate all user space cache entries</div><div class='hunk'>@@ -69,7 +65,6 @@</div><div class='ctx'>  *		- kaddr  - page address</div><div class='ctx'>  *		- size   - region size</div><div class='ctx'>  */</div><div class='del'>-extern void flush_cache_all(void);</div><div class='ctx'> extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);</div><div class='ctx'> extern void flush_icache_range(unsigned long start, unsigned long end);</div><div class='ctx'> extern void __flush_dcache_area(void *addr, size_t len);</div><div class='head'>diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h<br/>index 5a31d6716914..8f03446cf89f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/cpu_ops.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/cpu_ops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/cpu_ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpu_ops.h</a></div><div class='hunk'>@@ -19,15 +19,15 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> </div><div class='del'>-struct device_node;</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct cpu_operations - Callback operations for hotplugging CPUs.</div><div class='ctx'>  *</div><div class='ctx'>  * @name:	Name of the property as appears in a devicetree cpu node's</div><div class='del'>- *		enable-method property.</div><div class='del'>- * @cpu_init:	Reads any data necessary for a specific enable-method from the</div><div class='del'>- *		devicetree, for a given cpu node and proposed logical id.</div><div class='add'>+ *		enable-method property. On systems booting with ACPI, @name</div><div class='add'>+ *		identifies the struct cpu_operations entry corresponding to</div><div class='add'>+ *		the boot protocol specified in the ACPI MADT table.</div><div class='add'>+ * @cpu_init:	Reads any data necessary for a specific enable-method for a</div><div class='add'>+ *		proposed logical id.</div><div class='ctx'>  * @cpu_prepare: Early one-time preparation step for a cpu. If there is a</div><div class='ctx'>  *		mechanism for doing so, tests whether it is possible to boot</div><div class='ctx'>  *		the given CPU.</div><div class='hunk'>@@ -40,15 +40,15 @@ struct device_node;</div><div class='ctx'>  * @cpu_die:	Makes a cpu leave the kernel. Must not fail. Called from the</div><div class='ctx'>  *		cpu being killed.</div><div class='ctx'>  * @cpu_kill:  Ensures a cpu has left the kernel. Called from another cpu.</div><div class='del'>- * @cpu_init_idle: Reads any data necessary to initialize CPU idle states from</div><div class='del'>- *		devicetree, for a given cpu node and proposed logical id.</div><div class='add'>+ * @cpu_init_idle: Reads any data necessary to initialize CPU idle states for</div><div class='add'>+ *		   a proposed logical id.</div><div class='ctx'>  * @cpu_suspend: Suspends a cpu and saves the required context. May fail owing</div><div class='ctx'>  *               to wrong parameters or error conditions. Called from the</div><div class='ctx'>  *               CPU being suspended. Must be called with IRQs disabled.</div><div class='ctx'>  */</div><div class='ctx'> struct cpu_operations {</div><div class='ctx'> 	const char	*name;</div><div class='del'>-	int		(*cpu_init)(struct device_node *, unsigned int);</div><div class='add'>+	int		(*cpu_init)(unsigned int);</div><div class='ctx'> 	int		(*cpu_prepare)(unsigned int);</div><div class='ctx'> 	int		(*cpu_boot)(unsigned int);</div><div class='ctx'> 	void		(*cpu_postboot)(void);</div><div class='hunk'>@@ -58,14 +58,17 @@ struct cpu_operations {</div><div class='ctx'> 	int		(*cpu_kill)(unsigned int cpu);</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_IDLE</div><div class='del'>-	int		(*cpu_init_idle)(struct device_node *, unsigned int);</div><div class='add'>+	int		(*cpu_init_idle)(unsigned int);</div><div class='ctx'> 	int		(*cpu_suspend)(unsigned long);</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern const struct cpu_operations *cpu_ops[NR_CPUS];</div><div class='del'>-int __init cpu_read_ops(struct device_node *dn, int cpu);</div><div class='del'>-void __init cpu_read_bootcpu_ops(void);</div><div class='del'>-const struct cpu_operations *cpu_get_ops(const char *name);</div><div class='add'>+int __init cpu_read_ops(int cpu);</div><div class='add'>+</div><div class='add'>+static inline void __init cpu_read_bootcpu_ops(void)</div><div class='add'>+{</div><div class='add'>+	cpu_read_ops(0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* ifndef __ASM_CPU_OPS_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h<br/>index 82cb9f98ba1a..c1044218a63a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/cpufeature.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/cpufeature.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/cpufeature.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -24,8 +24,9 @@</div><div class='ctx'> #define ARM64_WORKAROUND_CLEAN_CACHE		0</div><div class='ctx'> #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE	1</div><div class='ctx'> #define ARM64_WORKAROUND_845719			2</div><div class='add'>+#define ARM64_HAS_SYSREG_GIC_CPUIF		3</div><div class='ctx'> </div><div class='del'>-#define ARM64_NCAPS				3</div><div class='add'>+#define ARM64_NCAPS				4</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +39,11 @@ struct arm64_cpu_capabilities {</div><div class='ctx'> 			u32 midr_model;</div><div class='ctx'> 			u32 midr_range_min, midr_range_max;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		struct {	/* Feature register checking */</div><div class='add'>+			u64 register_mask;</div><div class='add'>+			u64 register_value;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/cpuidle.h b/arch/arm64/include/asm/cpuidle.h<br/>index 141b2fcabaa6..0f74f05d662a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/cpuidle.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/cpuidle.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/cpuidle.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/cpuidle.h</a></div><div class='hunk'>@@ -5,20 +5,16 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_IDLE</div><div class='ctx'> extern int arm_cpuidle_init(unsigned int cpu);</div><div class='del'>-extern int cpu_suspend(unsigned long arg);</div><div class='add'>+extern int arm_cpuidle_suspend(int index);</div><div class='ctx'> #else</div><div class='ctx'> static inline int arm_cpuidle_init(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int cpu_suspend(unsigned long arg)</div><div class='add'>+static inline int arm_cpuidle_suspend(int index)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='del'>-static inline int arm_cpuidle_suspend(int index)</div><div class='del'>-{</div><div class='del'>-	return cpu_suspend(index);</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h<br/>index 9437e3dc5833..f0d6d0bfe55c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -28,13 +29,23 @@</div><div class='ctx'> </div><div class='ctx'> #define DMA_ERROR_CODE	(~(dma_addr_t)0)</div><div class='ctx'> extern struct dma_map_ops *dma_ops;</div><div class='add'>+extern struct dma_map_ops dummy_dma_ops;</div><div class='ctx'> </div><div class='ctx'> static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(!dev) || !dev-&gt;archdata.dma_ops)</div><div class='add'>+	if (unlikely(!dev))</div><div class='ctx'> 		return dma_ops;</div><div class='del'>-	else</div><div class='add'>+	else if (dev-&gt;archdata.dma_ops)</div><div class='ctx'> 		return dev-&gt;archdata.dma_ops;</div><div class='add'>+	else if (acpi_disabled)</div><div class='add'>+		return dma_ops;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When ACPI is enabled, if arch_set_dma_ops is not called,</div><div class='add'>+	 * we will disable device DMA capability by setting it</div><div class='add'>+	 * to dummy_dma_ops.</div><div class='add'>+	 */</div><div class='add'>+	return &amp;dummy_dma_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='hunk'>@@ -48,6 +59,9 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='ctx'> static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,</div><div class='ctx'> 				      struct iommu_ops *iommu, bool coherent)</div><div class='ctx'> {</div><div class='add'>+	if (!acpi_disabled &amp;&amp; !dev-&gt;archdata.dma_ops)</div><div class='add'>+		dev-&gt;archdata.dma_ops = dma_ops;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;archdata.dma_coherent = coherent;</div><div class='ctx'> }</div><div class='ctx'> #define arch_setup_dma_ops	arch_setup_dma_ops</div><div class='head'>diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h<br/>index 95e6b6dcbe37..c0739187a920 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/fixmap.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/fixmap.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/fixmap.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/fixmap.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;asm/boot.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -32,6 +33,20 @@</div><div class='ctx'>  */</div><div class='ctx'> enum fixed_addresses {</div><div class='ctx'> 	FIX_HOLE,</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reserve a virtual window for the FDT that is 2 MB larger than the</div><div class='add'>+	 * maximum supported size, and put it at the top of the fixmap region.</div><div class='add'>+	 * The additional space ensures that any FDT that does not exceed</div><div class='add'>+	 * MAX_FDT_SIZE can be mapped regardless of whether it crosses any</div><div class='add'>+	 * 2 MB alignment boundaries.</div><div class='add'>+	 *</div><div class='add'>+	 * Keep this at the top so it remains 2 MB aligned.</div><div class='add'>+	 */</div><div class='add'>+#define FIX_FDT_SIZE		(MAX_FDT_SIZE + SZ_2M)</div><div class='add'>+	FIX_FDT_END,</div><div class='add'>+	FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1,</div><div class='add'>+</div><div class='ctx'> 	FIX_EARLYCON_MEM_BASE,</div><div class='ctx'> 	FIX_TEXT_POKE0,</div><div class='ctx'> 	__end_of_permanent_fixed_addresses,</div><div class='head'>diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h<br/>index 5f750dc96e0f..74069b3bd919 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/futex.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/futex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/futex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/futex.h</a></div><div class='hunk'>@@ -58,7 +58,7 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	pagefault_disable();	/* implies preempt_disable() */</div><div class='add'>+	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case FUTEX_OP_SET:</div><div class='hunk'>@@ -85,7 +85,7 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 		ret = -ENOSYS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pagefault_enable();	/* subsumes preempt_enable() */</div><div class='add'>+	pagefault_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		switch (cmp) {</div><div class='head'>diff --git a/arch/arm64/include/asm/hugetlb.h b/arch/arm64/include/asm/hugetlb.h<br/>index 5b7ca8ace95f..2fd9b14ca295 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -86,10 +86,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int huge_pte_none(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_none(pte);</div><div class='hunk'>@@ -100,15 +96,6 @@ static inline pte_t huge_pte_wrprotect(pte_t pte)</div><div class='ctx'> 	return pte_wrprotect(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	clear_bit(PG_dcache_clean, &amp;page-&gt;flags);</div><div class='head'>diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h<br/>index f81b328d9cf4..30e50eb54a67 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/insn.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/insn.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/insn.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/insn.h</a></div><div class='hunk'>@@ -281,6 +281,7 @@ __AARCH64_INSN_FUNCS(ret,	0xFFFFFC1F, 0xD65F0000)</div><div class='ctx'> #undef	__AARCH64_INSN_FUNCS</div><div class='ctx'> </div><div class='ctx'> bool aarch64_insn_is_nop(u32 insn);</div><div class='add'>+bool aarch64_insn_is_branch_imm(u32 insn);</div><div class='ctx'> </div><div class='ctx'> int aarch64_insn_read(void *addr, u32 *insnp);</div><div class='ctx'> int aarch64_insn_write(void *addr, u32 insn);</div><div class='hunk'>@@ -351,6 +352,8 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,</div><div class='ctx'> 					 int shift,</div><div class='ctx'> 					 enum aarch64_insn_variant variant,</div><div class='ctx'> 					 enum aarch64_insn_logic_type type);</div><div class='add'>+s32 aarch64_get_branch_offset(u32 insn);</div><div class='add'>+u32 aarch64_set_branch_offset(u32 insn, s32 offset);</div><div class='ctx'> </div><div class='ctx'> bool aarch64_insn_hotpatch_safe(u32 old_insn, u32 new_insn);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h<br/>index 540f7c0aea82..44be1e03ed65 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/io.h</a></div><div class='hunk'>@@ -117,10 +117,10 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)</div><div class='ctx'>  * ordering rules but do not guarantee any ordering relative to Normal memory</div><div class='ctx'>  * accesses.</div><div class='ctx'>  */</div><div class='del'>-#define readb_relaxed(c)	({ u8  __v = __raw_readb(c); __v; })</div><div class='del'>-#define readw_relaxed(c)	({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; })</div><div class='del'>-#define readl_relaxed(c)	({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; })</div><div class='del'>-#define readq_relaxed(c)	({ u64 __v = le64_to_cpu((__force __le64)__raw_readq(c)); __v; })</div><div class='add'>+#define readb_relaxed(c)	({ u8  __r = __raw_readb(c); __r; })</div><div class='add'>+#define readw_relaxed(c)	({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })</div><div class='add'>+#define readl_relaxed(c)	({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })</div><div class='add'>+#define readq_relaxed(c)	({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; })</div><div class='ctx'> </div><div class='ctx'> #define writeb_relaxed(v,c)	((void)__raw_writeb((v),(c)))</div><div class='ctx'> #define writew_relaxed(v,c)	((void)__raw_writew((__force u16)cpu_to_le16(v),(c)))</div><div class='hunk'>@@ -170,6 +170,7 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);</div><div class='ctx'> #define ioremap(addr, size)		__ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))</div><div class='ctx'> #define ioremap_nocache(addr, size)	__ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))</div><div class='ctx'> #define ioremap_wc(addr, size)		__ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))</div><div class='add'>+#define ioremap_wt(addr, size)		__ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))</div><div class='ctx'> #define iounmap				__iounmap</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h<br/>index 4f7310fa77f0..3c5fe685a2d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/kvm_asm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/kvm_asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/kvm_asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/kvm_asm.h</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> #define	MPIDR_EL1	1	/* MultiProcessor Affinity Register */</div><div class='ctx'> #define	CSSELR_EL1	2	/* Cache Size Selection Register */</div><div class='ctx'> #define	SCTLR_EL1	3	/* System Control Register */</div><div class='del'>-#define	ACTLR_EL1	4	/* Auxilliary Control Register */</div><div class='add'>+#define	ACTLR_EL1	4	/* Auxiliary Control Register */</div><div class='ctx'> #define	CPACR_EL1	5	/* Coprocessor Access Control */</div><div class='ctx'> #define	TTBR0_EL1	6	/* Translation Table Base Register 0 */</div><div class='ctx'> #define	TTBR1_EL1	7	/* Translation Table Base Register 1 */</div><div class='hunk'>@@ -132,11 +132,6 @@ extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> extern u64 __vgic_v3_get_ich_vtr_el2(void);</div><div class='ctx'> </div><div class='del'>-extern char __save_vgic_v2_state[];</div><div class='del'>-extern char __restore_vgic_v2_state[];</div><div class='del'>-extern char __save_vgic_v3_state[];</div><div class='del'>-extern char __restore_vgic_v3_state[];</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARM_KVM_ASM_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h<br/>index f0f58c9beec0..2709db2a7eac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -221,29 +221,6 @@ struct vgic_sr_vectors {</div><div class='ctx'> 	void	*restore_vgic;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void vgic_arch_setup(const struct vgic_params *vgic)</div><div class='del'>-{</div><div class='del'>-	extern struct vgic_sr_vectors __vgic_sr_vectors;</div><div class='del'>-</div><div class='del'>-	switch(vgic-&gt;type)</div><div class='del'>-	{</div><div class='del'>-	case VGIC_V2:</div><div class='del'>-		__vgic_sr_vectors.save_vgic	= __save_vgic_v2_state;</div><div class='del'>-		__vgic_sr_vectors.restore_vgic	= __restore_vgic_v2_state;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARM_GIC_V3</div><div class='del'>-	case VGIC_V3:</div><div class='del'>-		__vgic_sr_vectors.save_vgic	= __save_vgic_v3_state;</div><div class='del'>-		__vgic_sr_vectors.restore_vgic	= __restore_vgic_v3_state;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void kvm_arch_hardware_disable(void) {}</div><div class='ctx'> static inline void kvm_arch_hardware_unsetup(void) {}</div><div class='ctx'> static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='head'>diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h<br/>index 3d311761e3c2..79fcfb048884 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/mmu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/mmu.h</a></div><div class='hunk'>@@ -34,5 +34,6 @@ extern void init_mem_pgprot(void);</div><div class='ctx'> extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,</div><div class='ctx'> 			       unsigned long virt, phys_addr_t size,</div><div class='ctx'> 			       pgprot_t prot);</div><div class='add'>+extern void *fixmap_remap_fdt(phys_addr_t dt_phys);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/perf_event.h<br/>index d26d1d53c0d7..6471773db6fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/perf_event.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/perf_event.h</a></div><div class='hunk'>@@ -24,4 +24,11 @@ extern unsigned long perf_misc_flags(struct pt_regs *regs);</div><div class='ctx'> #define perf_misc_flags(regs)	perf_misc_flags(regs)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define perf_arch_fetch_caller_regs(regs, __ip) { \</div><div class='add'>+	(regs)-&gt;pc = (__ip);    \</div><div class='add'>+	(regs)-&gt;regs[29] = (unsigned long) __builtin_frame_address(0); \</div><div class='add'>+	(regs)-&gt;sp = current_stack_pointer; \</div><div class='add'>+	(regs)-&gt;pstate = PSR_MODE_EL1h;	\</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/proc-fns.h b/arch/arm64/include/asm/proc-fns.h<br/>index 220633b791b8..14ad6e4e87d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/proc-fns.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/proc-fns.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/proc-fns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/proc-fns.h</a></div><div class='hunk'>@@ -28,12 +28,8 @@</div><div class='ctx'> struct mm_struct;</div><div class='ctx'> struct cpu_suspend_ctx;</div><div class='ctx'> </div><div class='del'>-extern void cpu_cache_off(void);</div><div class='ctx'> extern void cpu_do_idle(void);</div><div class='ctx'> extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);</div><div class='del'>-extern void cpu_reset(unsigned long addr) __attribute__((noreturn));</div><div class='del'>-void cpu_soft_restart(phys_addr_t cpu_reset,</div><div class='del'>-		unsigned long addr) __attribute__((noreturn));</div><div class='ctx'> extern void cpu_do_suspend(struct cpu_suspend_ctx *ptr);</div><div class='ctx'> extern u64 cpu_do_resume(phys_addr_t ptr, u64 idmap_ttbr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h<br/>index d2c37a1df0eb..e4c893e54f01 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/processor.h</a></div><div class='hunk'>@@ -78,13 +78,30 @@ struct cpu_context {</div><div class='ctx'> </div><div class='ctx'> struct thread_struct {</div><div class='ctx'> 	struct cpu_context	cpu_context;	/* cpu context */</div><div class='del'>-	unsigned long		tp_value;</div><div class='add'>+	unsigned long		tp_value;	/* TLS register */</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+	unsigned long		tp2_value;</div><div class='add'>+#endif</div><div class='ctx'> 	struct fpsimd_state	fpsimd_state;</div><div class='ctx'> 	unsigned long		fault_address;	/* fault info */</div><div class='ctx'> 	unsigned long		fault_code;	/* ESR_EL1 value */</div><div class='ctx'> 	struct debug_info	debug;		/* debugging */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+#define task_user_tls(t)						\</div><div class='add'>+({									\</div><div class='add'>+	unsigned long *__tls;						\</div><div class='add'>+	if (is_compat_thread(task_thread_info(t)))			\</div><div class='add'>+		__tls = &amp;(t)-&gt;thread.tp2_value;				\</div><div class='add'>+	else								\</div><div class='add'>+		__tls = &amp;(t)-&gt;thread.tp_value;				\</div><div class='add'>+	__tls;								\</div><div class='add'>+ })</div><div class='add'>+#else</div><div class='add'>+#define task_user_tls(t)	(&amp;(t)-&gt;thread.tp_value)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define INIT_THREAD  {	}</div><div class='ctx'> </div><div class='ctx'> static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)</div><div class='head'>diff --git a/arch/arm64/include/asm/psci.h b/arch/arm64/include/asm/psci.h<br/>index 2454bc59c916..49d7e1aaebdc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/psci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/psci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/psci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/psci.h</a></div><div class='hunk'>@@ -14,7 +14,15 @@</div><div class='ctx'> #ifndef __ASM_PSCI_H</div><div class='ctx'> #define __ASM_PSCI_H</div><div class='ctx'> </div><div class='del'>-int psci_dt_init(void);</div><div class='del'>-int psci_acpi_init(void);</div><div class='add'>+int __init psci_dt_init(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+int __init psci_acpi_init(void);</div><div class='add'>+bool __init acpi_psci_present(void);</div><div class='add'>+bool __init acpi_psci_use_hvc(void);</div><div class='add'>+#else</div><div class='add'>+static inline int psci_acpi_init(void) { return 0; }</div><div class='add'>+static inline bool acpi_psci_present(void) { return false; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PSCI_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h<br/>index bf22650b1a78..db02be81b90a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/smp.h</a></div><div class='hunk'>@@ -42,7 +42,7 @@ extern void handle_IPI(int ipinr, struct pt_regs *regs);</div><div class='ctx'>  * Discover the set of possible CPUs and determine their</div><div class='ctx'>  * SMP operations.</div><div class='ctx'>  */</div><div class='del'>-extern void of_smp_init_cpus(void);</div><div class='add'>+extern void smp_init_cpus(void);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Provide a function to raise an IPI cross call on CPUs in callmap.</div><div class='head'>diff --git a/arch/arm64/include/asm/smp_plat.h b/arch/arm64/include/asm/smp_plat.h<br/>index 8dcd61e32176..7abf7570c00f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/smp_plat.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/smp_plat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/smp_plat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/smp_plat.h</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'> #ifndef __ASM_SMP_PLAT_H</div><div class='ctx'> #define __ASM_SMP_PLAT_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mpidr_hash {</div><div class='hunk'>@@ -39,6 +41,20 @@ static inline u32 mpidr_hash_size(void)</div><div class='ctx'>  */</div><div class='ctx'> extern u64 __cpu_logical_map[NR_CPUS];</div><div class='ctx'> #define cpu_logical_map(cpu)    __cpu_logical_map[cpu]</div><div class='add'>+/*</div><div class='add'>+ * Retrieve logical cpu index corresponding to a given MPIDR.Aff*</div><div class='add'>+ *  - mpidr: MPIDR.Aff* bits to be used for the look-up</div><div class='add'>+ *</div><div class='add'>+ * Returns the cpu logical index or -EINVAL on look-up error</div><div class='add'>+ */</div><div class='add'>+static inline int get_logical_index(u64 mpidr)</div><div class='add'>+{</div><div class='add'>+	int cpu;</div><div class='add'>+	for (cpu = 0; cpu &lt; nr_cpu_ids; cpu++)</div><div class='add'>+		if (cpu_logical_map(cpu) == mpidr)</div><div class='add'>+			return cpu;</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void __init do_post_cpus_up_work(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/suspend.h b/arch/arm64/include/asm/suspend.h<br/>index 003802f58963..59a5b0f1e81c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/suspend.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/suspend.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/suspend.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/suspend.h</a></div><div class='hunk'>@@ -21,6 +21,6 @@ struct sleep_save_sp {</div><div class='ctx'> 	phys_addr_t save_ptr_stash_phys;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long));</div><div class='add'>+extern int cpu_suspend(unsigned long arg, int (*fn)(unsigned long));</div><div class='ctx'> extern void cpu_resume(void);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/system_misc.h b/arch/arm64/include/asm/system_misc.h<br/>index 7a18fabbe0f6..57f110bea6a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/system_misc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/system_misc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/system_misc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/system_misc.h</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/irqflags.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct pt_regs;</div><div class='hunk'>@@ -41,9 +43,19 @@ struct mm_struct;</div><div class='ctx'> extern void show_pte(struct mm_struct *mm, unsigned long addr);</div><div class='ctx'> extern void __show_regs(struct pt_regs *);</div><div class='ctx'> </div><div class='del'>-void soft_restart(unsigned long);</div><div class='ctx'> extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);</div><div class='ctx'> </div><div class='add'>+#define show_unhandled_signals_ratelimited()				\</div><div class='add'>+({									\</div><div class='add'>+	static DEFINE_RATELIMIT_STATE(_rs,				\</div><div class='add'>+				      DEFAULT_RATELIMIT_INTERVAL,	\</div><div class='add'>+				      DEFAULT_RATELIMIT_BURST);		\</div><div class='add'>+	bool __show_ratelimited = false;				\</div><div class='add'>+	if (show_unhandled_signals &amp;&amp; __ratelimit(&amp;_rs))		\</div><div class='add'>+		__show_ratelimited = true;				\</div><div class='add'>+	__show_ratelimited;						\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #define UDBG_UNDEFINED	(1 &lt;&lt; 0)</div><div class='ctx'> #define UDBG_SYSCALL	(1 &lt;&lt; 1)</div><div class='ctx'> #define UDBG_BADABORT	(1 &lt;&lt; 2)</div><div class='head'>diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h<br/>index c3bb05b98616..934815d45eda 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/tlbflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/tlbflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -28,8 +28,6 @@</div><div class='ctx'>  *	TLB Management</div><div class='ctx'>  *	==============</div><div class='ctx'>  *</div><div class='del'>- *	The arch/arm64/mm/tlb.S files implement these methods.</div><div class='del'>- *</div><div class='ctx'>  *	The TLB specific code is expected to perform whatever tests it needs</div><div class='ctx'>  *	to determine if it should invalidate the TLB for each call.  Start</div><div class='ctx'>  *	addresses are inclusive and end addresses are exclusive; it is safe to</div><div class='head'>diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h<br/>index 7ebcd31ce51c..225ec3524fbf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/include/asm/topology.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@ extern struct cpu_topology cpu_topology[NR_CPUS];</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_topology[cpu].cluster_id)</div><div class='ctx'> #define topology_core_id(cpu)		(cpu_topology[cpu].core_id)</div><div class='ctx'> #define topology_core_cpumask(cpu)	(&amp;cpu_topology[cpu].core_sibling)</div><div class='del'>-#define topology_thread_cpumask(cpu)	(&amp;cpu_topology[cpu].thread_sibling)</div><div class='add'>+#define topology_sibling_cpumask(cpu)	(&amp;cpu_topology[cpu].thread_sibling)</div><div class='ctx'> </div><div class='ctx'> void init_cpu_topology(void);</div><div class='ctx'> void store_cpu_topology(unsigned int cpuid);</div><div class='head'>diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c<br/>index 8b839558838e..19de7537e7d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/acpi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/acpi.c</a></div><div class='hunk'>@@ -36,12 +36,6 @@ EXPORT_SYMBOL(acpi_disabled);</div><div class='ctx'> int acpi_pci_disabled = 1;	/* skip ACPI PCI scan and IRQ initialization */</div><div class='ctx'> EXPORT_SYMBOL(acpi_pci_disabled);</div><div class='ctx'> </div><div class='del'>-/* Processors with enabled flag and sane MPIDR */</div><div class='del'>-static int enabled_cpus;</div><div class='del'>-</div><div class='del'>-/* Boot CPU is valid or not in MADT */</div><div class='del'>-static bool bootcpu_valid  __initdata;</div><div class='del'>-</div><div class='ctx'> static bool param_acpi_off __initdata;</div><div class='ctx'> static bool param_acpi_force __initdata;</div><div class='ctx'> </div><div class='hunk'>@@ -95,122 +89,15 @@ void __init __acpi_unmap_table(char *map, unsigned long size)</div><div class='ctx'> 	early_memunmap(map, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * acpi_map_gic_cpu_interface - generates a logical cpu number</div><div class='del'>- * and map to MPIDR represented by GICC structure</div><div class='del'>- */</div><div class='del'>-static void __init</div><div class='del'>-acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)</div><div class='add'>+bool __init acpi_psci_present(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	u64 mpidr = processor-&gt;arm_mpidr &amp; MPIDR_HWID_BITMASK;</div><div class='del'>-	bool enabled = !!(processor-&gt;flags &amp; ACPI_MADT_ENABLED);</div><div class='del'>-</div><div class='del'>-	if (mpidr == INVALID_HWID) {</div><div class='del'>-		pr_info("Skip MADT cpu entry with invalid MPIDR\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	total_cpus++;</div><div class='del'>-	if (!enabled)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (enabled_cpus &gt;=  NR_CPUS) {</div><div class='del'>-		pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n",</div><div class='del'>-			NR_CPUS, total_cpus, mpidr);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check if GICC structure of boot CPU is available in the MADT */</div><div class='del'>-	if (cpu_logical_map(0) == mpidr) {</div><div class='del'>-		if (bootcpu_valid) {</div><div class='del'>-			pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",</div><div class='del'>-			       mpidr);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		bootcpu_valid = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Duplicate MPIDRs are a recipe for disaster. Scan</div><div class='del'>-	 * all initialized entries and check for</div><div class='del'>-	 * duplicates. If any is found just ignore the CPU.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 1; i &lt; enabled_cpus; i++) {</div><div class='del'>-		if (cpu_logical_map(i) == mpidr) {</div><div class='del'>-			pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",</div><div class='del'>-			       mpidr);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!acpi_psci_present())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	cpu_ops[enabled_cpus] = cpu_get_ops("psci");</div><div class='del'>-	/* CPU 0 was already initialized */</div><div class='del'>-	if (enabled_cpus) {</div><div class='del'>-		if (!cpu_ops[enabled_cpus])</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		if (cpu_ops[enabled_cpus]-&gt;cpu_init(NULL, enabled_cpus))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		/* map the logical cpu id to cpu MPIDR */</div><div class='del'>-		cpu_logical_map(enabled_cpus) = mpidr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	enabled_cpus++;</div><div class='add'>+	return acpi_gbl_FADT.arm_boot_flags &amp; ACPI_FADT_PSCI_COMPLIANT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init</div><div class='del'>-acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,</div><div class='del'>-				const unsigned long end)</div><div class='add'>+/* Whether HVC must be used instead of SMC as the PSCI conduit */</div><div class='add'>+bool __init acpi_psci_use_hvc(void)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_madt_generic_interrupt *processor;</div><div class='del'>-</div><div class='del'>-	processor = (struct acpi_madt_generic_interrupt *)header;</div><div class='del'>-</div><div class='del'>-	if (BAD_MADT_ENTRY(processor, end))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	acpi_table_print_madt_entry(header);</div><div class='del'>-	acpi_map_gic_cpu_interface(processor);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Parse GIC cpu interface entries in MADT for SMP init */</div><div class='del'>-void __init acpi_init_cpus(void)</div><div class='del'>-{</div><div class='del'>-	int count, i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * do a partial walk of MADT to determine how many CPUs</div><div class='del'>-	 * we have including disabled CPUs, and get information</div><div class='del'>-	 * we need for SMP init</div><div class='del'>-	 */</div><div class='del'>-	count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,</div><div class='del'>-			acpi_parse_gic_cpu_interface, 0);</div><div class='del'>-</div><div class='del'>-	if (!count) {</div><div class='del'>-		pr_err("No GIC CPU interface entries present\n");</div><div class='del'>-		return;</div><div class='del'>-	} else if (count &lt; 0) {</div><div class='del'>-		pr_err("Error parsing GIC CPU interface entry\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!bootcpu_valid) {</div><div class='del'>-		pr_err("MADT missing boot CPU MPIDR, not enabling secondaries\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; enabled_cpus; i++)</div><div class='del'>-		set_cpu_possible(i, true);</div><div class='del'>-</div><div class='del'>-	/* Make boot-up look pretty */</div><div class='del'>-	pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);</div><div class='add'>+	return acpi_gbl_FADT.arm_boot_flags &amp; ACPI_FADT_PSCI_USE_HVC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c<br/>index 28f8365edc4c..221b98312f0c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/alternative.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/alternative.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/alternative.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/alternative.c</a></div><div class='hunk'>@@ -24,8 +24,13 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> </div><div class='add'>+#define __ALT_PTR(a,f)		(u32 *)((void *)&amp;(a)-&gt;f + (a)-&gt;f)</div><div class='add'>+#define ALT_ORIG_PTR(a)		__ALT_PTR(a, orig_offset)</div><div class='add'>+#define ALT_REPL_PTR(a)		__ALT_PTR(a, alt_offset)</div><div class='add'>+</div><div class='ctx'> extern struct alt_instr __alt_instructions[], __alt_instructions_end[];</div><div class='ctx'> </div><div class='ctx'> struct alt_region {</div><div class='hunk'>@@ -33,13 +38,63 @@ struct alt_region {</div><div class='ctx'> 	struct alt_instr *end;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Check if the target PC is within an alternative block.</div><div class='add'>+ */</div><div class='add'>+static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)</div><div class='add'>+{</div><div class='add'>+	unsigned long replptr;</div><div class='add'>+</div><div class='add'>+	if (kernel_text_address(pc))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	replptr = (unsigned long)ALT_REPL_PTR(alt);</div><div class='add'>+	if (pc &gt;= replptr &amp;&amp; pc &lt;= (replptr + alt-&gt;alt_len))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Branching into *another* alternate sequence is doomed, and</div><div class='add'>+	 * we're not even trying to fix it up.</div><div class='add'>+	 */</div><div class='add'>+	BUG();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr)</div><div class='add'>+{</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	insn = le32_to_cpu(*altinsnptr);</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_branch_imm(insn)) {</div><div class='add'>+		s32 offset = aarch64_get_branch_offset(insn);</div><div class='add'>+		unsigned long target;</div><div class='add'>+</div><div class='add'>+		target = (unsigned long)altinsnptr + offset;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If we're branching inside the alternate sequence,</div><div class='add'>+		 * do not rewrite the instruction, as it is already</div><div class='add'>+		 * correct. Otherwise, generate the new instruction.</div><div class='add'>+		 */</div><div class='add'>+		if (branch_insn_requires_update(alt, target)) {</div><div class='add'>+			offset = target - (unsigned long)insnptr;</div><div class='add'>+			insn = aarch64_set_branch_offset(insn, offset);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return insn;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __apply_alternatives(void *alt_region)</div><div class='ctx'> {</div><div class='ctx'> 	struct alt_instr *alt;</div><div class='ctx'> 	struct alt_region *region = alt_region;</div><div class='del'>-	u8 *origptr, *replptr;</div><div class='add'>+	u32 *origptr, *replptr;</div><div class='ctx'> </div><div class='ctx'> 	for (alt = region-&gt;begin; alt &lt; region-&gt;end; alt++) {</div><div class='add'>+		u32 insn;</div><div class='add'>+		int i, nr_inst;</div><div class='add'>+</div><div class='ctx'> 		if (!cpus_have_cap(alt-&gt;cpufeature))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -47,11 +102,17 @@ static int __apply_alternatives(void *alt_region)</div><div class='ctx'> </div><div class='ctx'> 		pr_info_once("patching kernel code\n");</div><div class='ctx'> </div><div class='del'>-		origptr = (u8 *)&amp;alt-&gt;orig_offset + alt-&gt;orig_offset;</div><div class='del'>-		replptr = (u8 *)&amp;alt-&gt;alt_offset + alt-&gt;alt_offset;</div><div class='del'>-		memcpy(origptr, replptr, alt-&gt;alt_len);</div><div class='add'>+		origptr = ALT_ORIG_PTR(alt);</div><div class='add'>+		replptr = ALT_REPL_PTR(alt);</div><div class='add'>+		nr_inst = alt-&gt;alt_len / sizeof(insn);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; nr_inst; i++) {</div><div class='add'>+			insn = get_alt_insn(alt, origptr + i, replptr + i);</div><div class='add'>+			*(origptr + i) = cpu_to_le32(insn);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		flush_icache_range((uintptr_t)origptr,</div><div class='del'>-				   (uintptr_t)(origptr + alt-&gt;alt_len));</div><div class='add'>+				   (uintptr_t)(origptr + nr_inst));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c<br/>index da675cc5dfae..c99701a34d7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/asm-offsets.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -127,7 +127,6 @@ int main(void)</div><div class='ctx'>   DEFINE(VCPU_VGIC_CPU,		offsetof(struct kvm_vcpu, arch.vgic_cpu));</div><div class='ctx'>   DEFINE(VGIC_SAVE_FN,		offsetof(struct vgic_sr_vectors, save_vgic));</div><div class='ctx'>   DEFINE(VGIC_RESTORE_FN,	offsetof(struct vgic_sr_vectors, restore_vgic));</div><div class='del'>-  DEFINE(VGIC_SR_VECTOR_SZ,	sizeof(struct vgic_sr_vectors));</div><div class='ctx'>   DEFINE(VGIC_V2_CPU_HCR,	offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));</div><div class='ctx'>   DEFINE(VGIC_V2_CPU_VMCR,	offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));</div><div class='ctx'>   DEFINE(VGIC_V2_CPU_MISR,	offsetof(struct vgic_cpu, vgic_v2.vgic_misr));</div><div class='head'>diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c<br/>index fb8ff9ba467a..5ea337dd2f15 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/cpu_ops.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/cpu_ops.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/cpu_ops.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpu_ops.c</a></div><div class='hunk'>@@ -16,11 +16,13 @@</div><div class='ctx'>  * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpu_ops.h&gt;</div><div class='del'>-#include &lt;asm/smp_plat.h&gt;</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;asm/acpi.h&gt;</div><div class='add'>+#include &lt;asm/cpu_ops.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern const struct cpu_operations smp_spin_table_ops;</div><div class='ctx'> extern const struct cpu_operations cpu_psci_ops;</div><div class='hunk'>@@ -35,7 +37,7 @@ static const struct cpu_operations *supported_cpu_ops[] __initconst = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct cpu_operations * __init cpu_get_ops(const char *name)</div><div class='add'>+static const struct cpu_operations * __init cpu_get_ops(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	const struct cpu_operations **ops = supported_cpu_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -49,39 +51,53 @@ const struct cpu_operations * __init cpu_get_ops(const char *name)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *__init cpu_read_enable_method(int cpu)</div><div class='add'>+{</div><div class='add'>+	const char *enable_method;</div><div class='add'>+</div><div class='add'>+	if (acpi_disabled) {</div><div class='add'>+		struct device_node *dn = of_get_cpu_node(cpu, NULL);</div><div class='add'>+</div><div class='add'>+		if (!dn) {</div><div class='add'>+			if (!cpu)</div><div class='add'>+				pr_err("Failed to find device node for boot cpu\n");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		enable_method = of_get_property(dn, "enable-method", NULL);</div><div class='add'>+		if (!enable_method) {</div><div class='add'>+			/*</div><div class='add'>+			 * The boot CPU may not have an enable method (e.g.</div><div class='add'>+			 * when spin-table is used for secondaries).</div><div class='add'>+			 * Don't warn spuriously.</div><div class='add'>+			 */</div><div class='add'>+			if (cpu != 0)</div><div class='add'>+				pr_err("%s: missing enable-method property\n",</div><div class='add'>+					dn-&gt;full_name);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		enable_method = acpi_get_enable_method(cpu);</div><div class='add'>+		if (!enable_method)</div><div class='add'>+			pr_err("Unsupported ACPI enable-method\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return enable_method;</div><div class='add'>+}</div><div class='ctx'> /*</div><div class='del'>- * Read a cpu's enable method from the device tree and record it in cpu_ops.</div><div class='add'>+ * Read a cpu's enable method and record it in cpu_ops.</div><div class='ctx'>  */</div><div class='del'>-int __init cpu_read_ops(struct device_node *dn, int cpu)</div><div class='add'>+int __init cpu_read_ops(int cpu)</div><div class='ctx'> {</div><div class='del'>-	const char *enable_method = of_get_property(dn, "enable-method", NULL);</div><div class='del'>-	if (!enable_method) {</div><div class='del'>-		/*</div><div class='del'>-		 * The boot CPU may not have an enable method (e.g. when</div><div class='del'>-		 * spin-table is used for secondaries). Don't warn spuriously.</div><div class='del'>-		 */</div><div class='del'>-		if (cpu != 0)</div><div class='del'>-			pr_err("%s: missing enable-method property\n",</div><div class='del'>-				dn-&gt;full_name);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='add'>+	const char *enable_method = cpu_read_enable_method(cpu);</div><div class='add'>+</div><div class='add'>+	if (!enable_method)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	cpu_ops[cpu] = cpu_get_ops(enable_method);</div><div class='ctx'> 	if (!cpu_ops[cpu]) {</div><div class='del'>-		pr_warn("%s: unsupported enable-method property: %s\n",</div><div class='del'>-			dn-&gt;full_name, enable_method);</div><div class='add'>+		pr_warn("Unsupported enable-method: %s\n", enable_method);</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void __init cpu_read_bootcpu_ops(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn = of_get_cpu_node(0, NULL);</div><div class='del'>-	if (!dn) {</div><div class='del'>-		pr_err("Failed to find device node for boot cpu\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	cpu_read_ops(dn, 0);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c<br/>index 3d9967e43d89..5ad86ceac010 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/cpufeature.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/cpufeature.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/cpufeature.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpufeature.c</a></div><div class='hunk'>@@ -22,7 +22,23 @@</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	val = read_cpuid(id_aa64pfr0_el1);</div><div class='add'>+	return (val &amp; entry-&gt;register_mask) == entry-&gt;register_value;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='add'>+	{</div><div class='add'>+		.desc = "GIC system register CPU interface",</div><div class='add'>+		.capability = ARM64_HAS_SYSREG_GIC_CPUIF,</div><div class='add'>+		.matches = has_id_aa64pfr0_feature,</div><div class='add'>+		.register_mask = (0xf &lt;&lt; 24),</div><div class='add'>+		.register_value = (1 &lt;&lt; 24),</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/cpuidle.c b/arch/arm64/kernel/cpuidle.c<br/>index a78143a5c99f..9047cab68fd3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/cpuidle.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/cpuidle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/cpuidle.c</a></div><div class='hunk'>@@ -15,18 +15,13 @@</div><div class='ctx'> #include &lt;asm/cpuidle.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_ops.h&gt;</div><div class='ctx'> </div><div class='del'>-int arm_cpuidle_init(unsigned int cpu)</div><div class='add'>+int __init arm_cpuidle_init(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='del'>-	struct device_node *cpu_node = of_cpu_device_node_get(cpu);</div><div class='del'>-</div><div class='del'>-	if (!cpu_node)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_ops[cpu] &amp;&amp; cpu_ops[cpu]-&gt;cpu_init_idle)</div><div class='del'>-		ret = cpu_ops[cpu]-&gt;cpu_init_idle(cpu_node, cpu);</div><div class='add'>+		ret = cpu_ops[cpu]-&gt;cpu_init_idle(cpu);</div><div class='ctx'> </div><div class='del'>-	of_node_put(cpu_node);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +32,7 @@ int arm_cpuidle_init(unsigned int cpu)</div><div class='ctx'>  * Return: 0 on success, -EOPNOTSUPP if CPU suspend hook not initialized, CPU</div><div class='ctx'>  * operations back-end error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-int cpu_suspend(unsigned long arg)</div><div class='add'>+int arm_cpuidle_suspend(int index)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='hunk'>@@ -47,5 +42,5 @@ int cpu_suspend(unsigned long arg)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!cpu_ops[cpu] || !cpu_ops[cpu]-&gt;cpu_suspend)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='del'>-	return cpu_ops[cpu]-&gt;cpu_suspend(arg);</div><div class='add'>+	return cpu_ops[cpu]-&gt;cpu_suspend(index);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c<br/>index ab21e0d58278..9d4aa18f2a82 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/efi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/efi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/efi.c</a></div><div class='hunk'>@@ -158,6 +158,7 @@ static __init int is_reserve_region(efi_memory_desc_t *md)</div><div class='ctx'> 	case EFI_BOOT_SERVICES_CODE:</div><div class='ctx'> 	case EFI_BOOT_SERVICES_DATA:</div><div class='ctx'> 	case EFI_CONVENTIONAL_MEMORY:</div><div class='add'>+	case EFI_PERSISTENT_MEMORY:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S<br/>index 959fe8733560..f860bfda454a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/entry.S</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/alternative-asm.h&gt;</div><div class='add'>+#include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='hunk'>@@ -124,21 +124,24 @@</div><div class='ctx'> 	msr	sp_el0, x23</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_ERRATUM_845719</div><div class='del'>-	alternative_insn						\</div><div class='del'>-	"nop",								\</div><div class='del'>-	"tbz x22, #4, 1f",						\</div><div class='del'>-	ARM64_WORKAROUND_845719</div><div class='add'>+</div><div class='add'>+#undef SEQUENCE_ORG</div><div class='add'>+#undef SEQUENCE_ALT</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PID_IN_CONTEXTIDR</div><div class='del'>-	alternative_insn						\</div><div class='del'>-	"nop; nop",							\</div><div class='del'>-	"mrs x29, contextidr_el1; msr contextidr_el1, x29; 1:",		\</div><div class='del'>-	ARM64_WORKAROUND_845719</div><div class='add'>+</div><div class='add'>+#define SEQUENCE_ORG	"nop ; nop ; nop"</div><div class='add'>+#define SEQUENCE_ALT	"tbz x22, #4, 1f ; mrs x29, contextidr_el1; msr contextidr_el1, x29; 1:"</div><div class='add'>+</div><div class='ctx'> #else</div><div class='del'>-	alternative_insn						\</div><div class='del'>-	"nop",								\</div><div class='del'>-	"msr contextidr_el1, xzr; 1:",					\</div><div class='del'>-	ARM64_WORKAROUND_845719</div><div class='add'>+</div><div class='add'>+#define SEQUENCE_ORG	"nop ; nop"</div><div class='add'>+#define SEQUENCE_ALT	"tbz x22, #4, 1f ; msr contextidr_el1, xzr; 1:"</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	alternative_insn SEQUENCE_ORG, SEQUENCE_ALT, ARM64_WORKAROUND_845719</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> 	.endif</div><div class='ctx'> 	msr	elr_el1, x21			// set up the return data</div><div class='hunk'>@@ -349,8 +352,8 @@ el1_inv:</div><div class='ctx'> 	// TODO: add support for undefined instructions in kernel mode</div><div class='ctx'> 	enable_dbg</div><div class='ctx'> 	mov	x0, sp</div><div class='add'>+	mov	x2, x1</div><div class='ctx'> 	mov	x1, #BAD_SYNC</div><div class='del'>-	mrs	x2, esr_el1</div><div class='ctx'> 	b	bad_mode</div><div class='ctx'> ENDPROC(el1_sync)</div><div class='ctx'> </div><div class='hunk'>@@ -517,6 +520,7 @@ el0_sp_pc:</div><div class='ctx'> 	mrs	x26, far_el1</div><div class='ctx'> 	// enable interrupts before calling the main handler</div><div class='ctx'> 	enable_dbg_and_irq</div><div class='add'>+	ct_user_exit</div><div class='ctx'> 	mov	x0, x26</div><div class='ctx'> 	mov	x1, x25</div><div class='ctx'> 	mov	x2, sp</div><div class='hunk'>@@ -549,7 +553,7 @@ el0_inv:</div><div class='ctx'> 	ct_user_exit</div><div class='ctx'> 	mov	x0, sp</div><div class='ctx'> 	mov	x1, #BAD_SYNC</div><div class='del'>-	mrs	x2, esr_el1</div><div class='add'>+	mov	x2, x25</div><div class='ctx'> 	bl	bad_mode</div><div class='ctx'> 	b	ret_to_user</div><div class='ctx'> ENDPROC(el0_sync)</div><div class='hunk'>@@ -608,11 +612,16 @@ ENDPROC(cpu_switch_to)</div><div class='ctx'>  */</div><div class='ctx'> ret_fast_syscall:</div><div class='ctx'> 	disable_irq				// disable interrupts</div><div class='del'>-	ldr	x1, [tsk, #TI_FLAGS]</div><div class='add'>+	ldr	x1, [tsk, #TI_FLAGS]		// re-check for syscall tracing</div><div class='add'>+	and	x2, x1, #_TIF_SYSCALL_WORK</div><div class='add'>+	cbnz	x2, ret_fast_syscall_trace</div><div class='ctx'> 	and	x2, x1, #_TIF_WORK_MASK</div><div class='ctx'> 	cbnz	x2, fast_work_pending</div><div class='ctx'> 	enable_step_tsk x1, x2</div><div class='ctx'> 	kernel_exit 0, ret = 1</div><div class='add'>+ret_fast_syscall_trace:</div><div class='add'>+	enable_irq				// enable interrupts</div><div class='add'>+	b	__sys_trace_return</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Ok, we need to do extra processing, enter the slow path.</div><div class='head'>diff --git a/arch/arm64/kernel/entry32.S b/arch/arm64/kernel/entry32.S<br/>index bd9bfaa9269b..f332d5d1f6b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/entry32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/entry32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/entry32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/entry32.S</a></div><div class='hunk'>@@ -32,13 +32,11 @@</div><div class='ctx'> </div><div class='ctx'> ENTRY(compat_sys_sigreturn_wrapper)</div><div class='ctx'> 	mov	x0, sp</div><div class='del'>-	mov	x27, #0		// prevent syscall restart handling (why)</div><div class='ctx'> 	b	compat_sys_sigreturn</div><div class='ctx'> ENDPROC(compat_sys_sigreturn_wrapper)</div><div class='ctx'> </div><div class='ctx'> ENTRY(compat_sys_rt_sigreturn_wrapper)</div><div class='ctx'> 	mov	x0, sp</div><div class='del'>-	mov	x27, #0		// prevent syscall restart handling (why)</div><div class='ctx'> 	b	compat_sys_rt_sigreturn</div><div class='ctx'> ENDPROC(compat_sys_rt_sigreturn_wrapper)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c<br/>index 3dca15634e69..44d6f7545505 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/fpsimd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/fpsimd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/fpsimd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/fpsimd.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'>  * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/cpu_pm.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -296,6 +297,35 @@ static void fpsimd_pm_init(void)</div><div class='ctx'> static inline void fpsimd_pm_init(void) { }</div><div class='ctx'> #endif /* CONFIG_CPU_PM */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+static int fpsimd_cpu_hotplug_notifier(struct notifier_block *nfb,</div><div class='add'>+				       unsigned long action,</div><div class='add'>+				       void *hcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu = (long)hcpu;</div><div class='add'>+</div><div class='add'>+	switch (action) {</div><div class='add'>+	case CPU_DEAD:</div><div class='add'>+	case CPU_DEAD_FROZEN:</div><div class='add'>+		per_cpu(fpsimd_last_state, cpu) = NULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block fpsimd_cpu_hotplug_notifier_block = {</div><div class='add'>+	.notifier_call = fpsimd_cpu_hotplug_notifier,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void fpsimd_hotplug_init(void)</div><div class='add'>+{</div><div class='add'>+	register_cpu_notifier(&amp;fpsimd_cpu_hotplug_notifier_block);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static inline void fpsimd_hotplug_init(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * FP/SIMD support code initialisation.</div><div class='ctx'>  */</div><div class='hunk'>@@ -315,6 +345,7 @@ static int __init fpsimd_init(void)</div><div class='ctx'> 		elf_hwcap |= HWCAP_ASIMD;</div><div class='ctx'> </div><div class='ctx'> 	fpsimd_pm_init();</div><div class='add'>+	fpsimd_hotplug_init();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S<br/>index 19f915e8f6e0..c0ff3ce4299e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/head.S</a></div><div class='hunk'>@@ -237,8 +237,6 @@ ENTRY(stext)</div><div class='ctx'> 	bl	el2_setup			// Drop to EL1, w20=cpu_boot_mode</div><div class='ctx'> 	adrp	x24, __PHYS_OFFSET</div><div class='ctx'> 	bl	set_cpu_boot_mode_flag</div><div class='del'>-</div><div class='del'>-	bl	__vet_fdt</div><div class='ctx'> 	bl	__create_page_tables		// x25=TTBR0, x26=TTBR1</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The following calls CPU setup code, see arch/arm64/mm/proc.S for</div><div class='hunk'>@@ -270,24 +268,6 @@ preserve_boot_args:</div><div class='ctx'> ENDPROC(preserve_boot_args)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Determine validity of the x21 FDT pointer.</div><div class='del'>- * The dtb must be 8-byte aligned and live in the first 512M of memory.</div><div class='del'>- */</div><div class='del'>-__vet_fdt:</div><div class='del'>-	tst	x21, #0x7</div><div class='del'>-	b.ne	1f</div><div class='del'>-	cmp	x21, x24</div><div class='del'>-	b.lt	1f</div><div class='del'>-	mov	x0, #(1 &lt;&lt; 29)</div><div class='del'>-	add	x0, x0, x24</div><div class='del'>-	cmp	x21, x0</div><div class='del'>-	b.ge	1f</div><div class='del'>-	ret</div><div class='del'>-1:</div><div class='del'>-	mov	x21, #0</div><div class='del'>-	ret</div><div class='del'>-ENDPROC(__vet_fdt)</div><div class='del'>-/*</div><div class='ctx'>  * Macro to create a table entry to the next page.</div><div class='ctx'>  *</div><div class='ctx'>  *	tbl:	page table address</div><div class='hunk'>@@ -348,8 +328,7 @@ ENDPROC(__vet_fdt)</div><div class='ctx'>  * required to get the kernel running. The following sections are required:</div><div class='ctx'>  *   - identity mapping to enable the MMU (low address, TTBR0)</div><div class='ctx'>  *   - first few MB of the kernel linear mapping to jump to once the MMU has</div><div class='del'>- *     been enabled, including the FDT blob (TTBR1)</div><div class='del'>- *   - pgd entry for fixed mappings (TTBR1)</div><div class='add'>+ *     been enabled</div><div class='ctx'>  */</div><div class='ctx'> __create_page_tables:</div><div class='ctx'> 	adrp	x25, idmap_pg_dir</div><div class='hunk'>@@ -382,7 +361,7 @@ __create_page_tables:</div><div class='ctx'> 	 * Create the identity mapping.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mov	x0, x25				// idmap_pg_dir</div><div class='del'>-	adrp	x3, KERNEL_START		// __pa(KERNEL_START)</div><div class='add'>+	adrp	x3, __idmap_text_start		// __pa(__idmap_text_start)</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_ARM64_VA_BITS_48</div><div class='ctx'> #define EXTRA_SHIFT	(PGDIR_SHIFT + PAGE_SHIFT - 3)</div><div class='hunk'>@@ -405,11 +384,11 @@ __create_page_tables:</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Calculate the maximum allowed value for TCR_EL1.T0SZ so that the</div><div class='del'>-	 * entire kernel image can be ID mapped. As T0SZ == (64 - #bits used),</div><div class='add'>+	 * entire ID map region can be mapped. As T0SZ == (64 - #bits used),</div><div class='ctx'> 	 * this number conveniently equals the number of leading zeroes in</div><div class='del'>-	 * the physical address of KERNEL_END.</div><div class='add'>+	 * the physical address of __idmap_text_end.</div><div class='ctx'> 	 */</div><div class='del'>-	adrp	x5, KERNEL_END</div><div class='add'>+	adrp	x5, __idmap_text_end</div><div class='ctx'> 	clz	x5, x5</div><div class='ctx'> 	cmp	x5, TCR_T0SZ(VA_BITS)	// default T0SZ small enough?</div><div class='ctx'> 	b.ge	1f			// .. then skip additional level</div><div class='hunk'>@@ -424,8 +403,8 @@ __create_page_tables:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	create_pgd_entry x0, x3, x5, x6</div><div class='del'>-	mov	x5, x3				// __pa(KERNEL_START)</div><div class='del'>-	adr_l	x6, KERNEL_END			// __pa(KERNEL_END)</div><div class='add'>+	mov	x5, x3				// __pa(__idmap_text_start)</div><div class='add'>+	adr_l	x6, __idmap_text_end		// __pa(__idmap_text_end)</div><div class='ctx'> 	create_block_map x0, x7, x3, x5, x6</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -439,22 +418,6 @@ __create_page_tables:</div><div class='ctx'> 	create_block_map x0, x7, x3, x5, x6</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Map the FDT blob (maximum 2MB; must be within 512MB of</div><div class='del'>-	 * PHYS_OFFSET).</div><div class='del'>-	 */</div><div class='del'>-	mov	x3, x21				// FDT phys address</div><div class='del'>-	and	x3, x3, #~((1 &lt;&lt; 21) - 1)	// 2MB aligned</div><div class='del'>-	mov	x6, #PAGE_OFFSET</div><div class='del'>-	sub	x5, x3, x24			// subtract PHYS_OFFSET</div><div class='del'>-	tst	x5, #~((1 &lt;&lt; 29) - 1)		// within 512MB?</div><div class='del'>-	csel	x21, xzr, x21, ne		// zero the FDT pointer</div><div class='del'>-	b.ne	1f</div><div class='del'>-	add	x5, x5, x6			// __va(FDT blob)</div><div class='del'>-	add	x6, x5, #1 &lt;&lt; 21		// 2MB for the FDT blob</div><div class='del'>-	sub	x6, x6, #1			// inclusive range</div><div class='del'>-	create_block_map x0, x7, x3, x5, x6</div><div class='del'>-1:</div><div class='del'>-	/*</div><div class='ctx'> 	 * Since the page tables have been populated with non-cacheable</div><div class='ctx'> 	 * accesses (MMU disabled), invalidate the idmap and swapper page</div><div class='ctx'> 	 * tables again to remove any speculatively loaded cache lines.</div><div class='hunk'>@@ -669,6 +632,7 @@ ENDPROC(__secondary_switched)</div><div class='ctx'>  *</div><div class='ctx'>  * other registers depend on the function called upon completion</div><div class='ctx'>  */</div><div class='add'>+	.section	".idmap.text", "ax"</div><div class='ctx'> __enable_mmu:</div><div class='ctx'> 	ldr	x5, =vectors</div><div class='ctx'> 	msr	vbar_el1, x5</div><div class='head'>diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c<br/>index e7d934d3afe0..7a1a5da6c8c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/hw_breakpoint.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/hw_breakpoint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/hw_breakpoint.h&gt;</div><div class='del'>-#include &lt;asm/kdebug.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='head'>diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c<br/>index 924902083e47..dd9671cd0bb2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/insn.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/insn.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/insn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/insn.c</a></div><div class='hunk'>@@ -77,6 +77,14 @@ bool __kprobes aarch64_insn_is_nop(u32 insn)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool aarch64_insn_is_branch_imm(u32 insn)</div><div class='add'>+{</div><div class='add'>+	return (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn) ||</div><div class='add'>+		aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn) ||</div><div class='add'>+		aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) ||</div><div class='add'>+		aarch64_insn_is_bcond(insn));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static DEFINE_SPINLOCK(patch_lock);</div><div class='ctx'> </div><div class='ctx'> static void __kprobes *patch_map(void *addr, int fixmap)</div><div class='hunk'>@@ -1057,6 +1065,58 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,</div><div class='ctx'> 	return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Decode the imm field of a branch, and return the byte offset as a</div><div class='add'>+ * signed value (so it can be used when computing a new branch</div><div class='add'>+ * target).</div><div class='add'>+ */</div><div class='add'>+s32 aarch64_get_branch_offset(u32 insn)</div><div class='add'>+{</div><div class='add'>+	s32 imm;</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn)) {</div><div class='add'>+		imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_26, insn);</div><div class='add'>+		return (imm &lt;&lt; 6) &gt;&gt; 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) ||</div><div class='add'>+	    aarch64_insn_is_bcond(insn)) {</div><div class='add'>+		imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_19, insn);</div><div class='add'>+		return (imm &lt;&lt; 13) &gt;&gt; 11;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn)) {</div><div class='add'>+		imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_14, insn);</div><div class='add'>+		return (imm &lt;&lt; 18) &gt;&gt; 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Unhandled instruction */</div><div class='add'>+	BUG();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encode the displacement of a branch in the imm field and return the</div><div class='add'>+ * updated instruction.</div><div class='add'>+ */</div><div class='add'>+u32 aarch64_set_branch_offset(u32 insn, s32 offset)</div><div class='add'>+{</div><div class='add'>+	if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn))</div><div class='add'>+		return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_26, insn,</div><div class='add'>+						     offset &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) ||</div><div class='add'>+	    aarch64_insn_is_bcond(insn))</div><div class='add'>+		return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_19, insn,</div><div class='add'>+						     offset &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn))</div><div class='add'>+		return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_14, insn,</div><div class='add'>+						     offset &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	/* Unhandled instruction */</div><div class='add'>+	BUG();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool aarch32_insn_is_wide(u32 insn)</div><div class='ctx'> {</div><div class='ctx'> 	return insn &gt;= 0xe800;</div><div class='head'>diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c<br/>index cce18c85d2e8..b31e9a4b6275 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/perf_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/perf_event.c</a></div><div class='hunk'>@@ -488,7 +488,7 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			err = request_irq(irq, armpmu-&gt;handle_irq,</div><div class='del'>-					IRQF_NOBALANCING,</div><div class='add'>+					IRQF_NOBALANCING | IRQF_NO_THREAD,</div><div class='ctx'> 					"arm-pmu", armpmu);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				pr_err("unable to request IRQ%d for ARM PMU counters\n",</div><div class='hunk'>@@ -1318,7 +1318,7 @@ static int armpmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Don't bother with PPIs; they're already affine */</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (irq &gt;= 0 &amp;&amp; irq_is_percpu(irq))</div><div class='del'>-		return 0;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	irqs = kcalloc(pdev-&gt;num_resources, sizeof(*irqs), GFP_KERNEL);</div><div class='ctx'> 	if (!irqs)</div><div class='hunk'>@@ -1340,12 +1340,13 @@ static int armpmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> 			if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-		of_node_put(dn);</div><div class='ctx'> 		if (cpu &gt;= nr_cpu_ids) {</div><div class='ctx'> 			pr_warn("Failed to find logical CPU for %s\n",</div><div class='ctx'> 				dn-&gt;name);</div><div class='add'>+			of_node_put(dn);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		of_node_put(dn);</div><div class='ctx'> </div><div class='ctx'> 		irqs[i] = cpu;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1355,6 +1356,7 @@ static int armpmu_device_probe(struct platform_device *pdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		kfree(irqs);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	cpu_pmu-&gt;plat_device = pdev;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c<br/>index c6b1f3b96f45..223b093c9440 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/process.c</a></div><div class='hunk'>@@ -58,14 +58,6 @@ unsigned long __stack_chk_guard __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(__stack_chk_guard);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void soft_restart(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	setup_mm_for_reboot();</div><div class='del'>-	cpu_soft_restart(virt_to_phys(cpu_reset), addr);</div><div class='del'>-	/* Should never get here */</div><div class='del'>-	BUG();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Function pointers to optional machine specific functions</div><div class='ctx'>  */</div><div class='hunk'>@@ -136,9 +128,7 @@ void machine_power_off(void)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Restart requires that the secondary CPUs stop performing any activity</div><div class='del'>- * while the primary CPU resets the system. Systems with a single CPU can</div><div class='del'>- * use soft_restart() as their machine descriptor's .restart hook, since that</div><div class='del'>- * will cause the only available CPU to reset. Systems with multiple CPUs must</div><div class='add'>+ * while the primary CPU resets the system. Systems with multiple CPUs must</div><div class='ctx'>  * provide a HW restart implementation, to ensure that all CPUs reset at once.</div><div class='ctx'>  * This is required so that any code running after reset on the primary CPU</div><div class='ctx'>  * doesn't have to co-ordinate with other CPUs to ensure they aren't still</div><div class='hunk'>@@ -243,7 +233,8 @@ void release_thread(struct task_struct *dead_task)</div><div class='ctx'> </div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	fpsimd_preserve_current_state();</div><div class='add'>+	if (current-&gt;mm)</div><div class='add'>+		fpsimd_preserve_current_state();</div><div class='ctx'> 	*dst = *src;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -254,35 +245,35 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,</div><div class='ctx'> 		unsigned long stk_sz, struct task_struct *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *childregs = task_pt_regs(p);</div><div class='del'>-	unsigned long tls = p-&gt;thread.tp_value;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;p-&gt;thread.cpu_context, 0, sizeof(struct cpu_context));</div><div class='ctx'> </div><div class='ctx'> 	if (likely(!(p-&gt;flags &amp; PF_KTHREAD))) {</div><div class='ctx'> 		*childregs = *current_pt_regs();</div><div class='ctx'> 		childregs-&gt;regs[0] = 0;</div><div class='del'>-		if (is_compat_thread(task_thread_info(p))) {</div><div class='del'>-			if (stack_start)</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Read the current TLS pointer from tpidr_el0 as it may be</div><div class='add'>+		 * out-of-sync with the saved value.</div><div class='add'>+		 */</div><div class='add'>+		asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p)));</div><div class='add'>+</div><div class='add'>+		if (stack_start) {</div><div class='add'>+			if (is_compat_thread(task_thread_info(p)))</div><div class='ctx'> 				childregs-&gt;compat_sp = stack_start;</div><div class='del'>-		} else {</div><div class='del'>-			/*</div><div class='del'>-			 * Read the current TLS pointer from tpidr_el0 as it may be</div><div class='del'>-			 * out-of-sync with the saved value.</div><div class='del'>-			 */</div><div class='del'>-			asm("mrs %0, tpidr_el0" : "=r" (tls));</div><div class='del'>-			if (stack_start) {</div><div class='del'>-				/* 16-byte aligned stack mandatory on AArch64 */</div><div class='del'>-				if (stack_start &amp; 15)</div><div class='del'>-					return -EINVAL;</div><div class='add'>+			/* 16-byte aligned stack mandatory on AArch64 */</div><div class='add'>+			else if (stack_start &amp; 15)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			else</div><div class='ctx'> 				childregs-&gt;sp = stack_start;</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If a TLS pointer was passed to clone (4th argument), use it</div><div class='ctx'> 		 * for the new thread.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (clone_flags &amp; CLONE_SETTLS)</div><div class='del'>-			tls = childregs-&gt;regs[3];</div><div class='add'>+			p-&gt;thread.tp_value = childregs-&gt;regs[3];</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memset(childregs, 0, sizeof(struct pt_regs));</div><div class='ctx'> 		childregs-&gt;pstate = PSR_MODE_EL1h;</div><div class='hunk'>@@ -291,7 +282,6 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,</div><div class='ctx'> 	}</div><div class='ctx'> 	p-&gt;thread.cpu_context.pc = (unsigned long)ret_from_fork;</div><div class='ctx'> 	p-&gt;thread.cpu_context.sp = (unsigned long)childregs;</div><div class='del'>-	p-&gt;thread.tp_value = tls;</div><div class='ctx'> </div><div class='ctx'> 	ptrace_hw_copy_thread(p);</div><div class='ctx'> </div><div class='hunk'>@@ -302,18 +292,12 @@ static void tls_thread_switch(struct task_struct *next)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long tpidr, tpidrro;</div><div class='ctx'> </div><div class='del'>-	if (!is_compat_task()) {</div><div class='del'>-		asm("mrs %0, tpidr_el0" : "=r" (tpidr));</div><div class='del'>-		current-&gt;thread.tp_value = tpidr;</div><div class='del'>-	}</div><div class='add'>+	asm("mrs %0, tpidr_el0" : "=r" (tpidr));</div><div class='add'>+	*task_user_tls(current) = tpidr;</div><div class='ctx'> </div><div class='del'>-	if (is_compat_thread(task_thread_info(next))) {</div><div class='del'>-		tpidr = 0;</div><div class='del'>-		tpidrro = next-&gt;thread.tp_value;</div><div class='del'>-	} else {</div><div class='del'>-		tpidr = next-&gt;thread.tp_value;</div><div class='del'>-		tpidrro = 0;</div><div class='del'>-	}</div><div class='add'>+	tpidr = *task_user_tls(next);</div><div class='add'>+	tpidrro = is_compat_thread(task_thread_info(next)) ?</div><div class='add'>+		  next-&gt;thread.tp_value : 0;</div><div class='ctx'> </div><div class='ctx'> 	asm(</div><div class='ctx'> 	"	msr	tpidr_el0, %0\n"</div><div class='head'>diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c<br/>index ea18cb53921e..869f202748e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/psci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/psci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/psci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/psci.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "psci: " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='hunk'>@@ -25,8 +24,8 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/psci.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/compiler.h&gt;</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_ops.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/psci.h&gt;</div><div class='hunk'>@@ -37,16 +36,31 @@</div><div class='ctx'> #define PSCI_POWER_STATE_TYPE_STANDBY		0</div><div class='ctx'> #define PSCI_POWER_STATE_TYPE_POWER_DOWN	1</div><div class='ctx'> </div><div class='del'>-struct psci_power_state {</div><div class='del'>-	u16	id;</div><div class='del'>-	u8	type;</div><div class='del'>-	u8	affinity_level;</div><div class='del'>-};</div><div class='add'>+static bool psci_power_state_loses_context(u32 state)</div><div class='add'>+{</div><div class='add'>+	return state &amp; PSCI_0_2_POWER_STATE_TYPE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool psci_power_state_is_valid(u32 state)</div><div class='add'>+{</div><div class='add'>+	const u32 valid_mask = PSCI_0_2_POWER_STATE_ID_MASK |</div><div class='add'>+			       PSCI_0_2_POWER_STATE_TYPE_MASK |</div><div class='add'>+			       PSCI_0_2_POWER_STATE_AFFL_MASK;</div><div class='add'>+</div><div class='add'>+	return !(state &amp; ~valid_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The CPU any Trusted OS is resident on. The trusted OS may reject CPU_OFF</div><div class='add'>+ * calls to its resident CPU, so we must avoid issuing those. We never migrate</div><div class='add'>+ * a Trusted OS even if it claims to be capable of migration -- doing so will</div><div class='add'>+ * require cooperation with a Trusted OS driver.</div><div class='add'>+ */</div><div class='add'>+static int resident_cpu = -1;</div><div class='ctx'> </div><div class='ctx'> struct psci_operations {</div><div class='del'>-	int (*cpu_suspend)(struct psci_power_state state,</div><div class='del'>-			   unsigned long entry_point);</div><div class='del'>-	int (*cpu_off)(struct psci_power_state state);</div><div class='add'>+	int (*cpu_suspend)(u32 state, unsigned long entry_point);</div><div class='add'>+	int (*cpu_off)(u32 state);</div><div class='ctx'> 	int (*cpu_on)(unsigned long cpuid, unsigned long entry_point);</div><div class='ctx'> 	int (*migrate)(unsigned long cpuid);</div><div class='ctx'> 	int (*affinity_info)(unsigned long target_affinity,</div><div class='hunk'>@@ -56,23 +70,21 @@ struct psci_operations {</div><div class='ctx'> </div><div class='ctx'> static struct psci_operations psci_ops;</div><div class='ctx'> </div><div class='del'>-static int (*invoke_psci_fn)(u64, u64, u64, u64);</div><div class='del'>-typedef int (*psci_initcall_t)(const struct device_node *);</div><div class='del'>-</div><div class='del'>-asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64);</div><div class='del'>-asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64);</div><div class='add'>+typedef unsigned long (psci_fn)(unsigned long, unsigned long,</div><div class='add'>+				unsigned long, unsigned long);</div><div class='add'>+asmlinkage psci_fn __invoke_psci_fn_hvc;</div><div class='add'>+asmlinkage psci_fn __invoke_psci_fn_smc;</div><div class='add'>+static psci_fn *invoke_psci_fn;</div><div class='ctx'> </div><div class='ctx'> enum psci_function {</div><div class='ctx'> 	PSCI_FN_CPU_SUSPEND,</div><div class='ctx'> 	PSCI_FN_CPU_ON,</div><div class='ctx'> 	PSCI_FN_CPU_OFF,</div><div class='ctx'> 	PSCI_FN_MIGRATE,</div><div class='del'>-	PSCI_FN_AFFINITY_INFO,</div><div class='del'>-	PSCI_FN_MIGRATE_INFO_TYPE,</div><div class='ctx'> 	PSCI_FN_MAX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU_READ_MOSTLY(struct psci_power_state *, psci_power_state);</div><div class='add'>+static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state);</div><div class='ctx'> </div><div class='ctx'> static u32 psci_function_id[PSCI_FN_MAX];</div><div class='ctx'> </div><div class='hunk'>@@ -92,56 +104,28 @@ static int psci_to_linux_errno(int errno)</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 psci_power_state_pack(struct psci_power_state state)</div><div class='del'>-{</div><div class='del'>-	return ((state.id &lt;&lt; PSCI_0_2_POWER_STATE_ID_SHIFT)</div><div class='del'>-			&amp; PSCI_0_2_POWER_STATE_ID_MASK) |</div><div class='del'>-		((state.type &lt;&lt; PSCI_0_2_POWER_STATE_TYPE_SHIFT)</div><div class='del'>-		 &amp; PSCI_0_2_POWER_STATE_TYPE_MASK) |</div><div class='del'>-		((state.affinity_level &lt;&lt; PSCI_0_2_POWER_STATE_AFFL_SHIFT)</div><div class='del'>-		 &amp; PSCI_0_2_POWER_STATE_AFFL_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void psci_power_state_unpack(u32 power_state,</div><div class='del'>-				    struct psci_power_state *state)</div><div class='del'>-{</div><div class='del'>-	state-&gt;id = (power_state &amp; PSCI_0_2_POWER_STATE_ID_MASK) &gt;&gt;</div><div class='del'>-			PSCI_0_2_POWER_STATE_ID_SHIFT;</div><div class='del'>-	state-&gt;type = (power_state &amp; PSCI_0_2_POWER_STATE_TYPE_MASK) &gt;&gt;</div><div class='del'>-			PSCI_0_2_POWER_STATE_TYPE_SHIFT;</div><div class='del'>-	state-&gt;affinity_level =</div><div class='del'>-			(power_state &amp; PSCI_0_2_POWER_STATE_AFFL_MASK) &gt;&gt;</div><div class='del'>-			PSCI_0_2_POWER_STATE_AFFL_SHIFT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int psci_get_version(void)</div><div class='add'>+static u32 psci_get_version(void)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0);</div><div class='del'>-	return err;</div><div class='add'>+	return invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int psci_cpu_suspend(struct psci_power_state state,</div><div class='del'>-			    unsigned long entry_point)</div><div class='add'>+static int psci_cpu_suspend(u32 state, unsigned long entry_point)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	u32 fn, power_state;</div><div class='add'>+	u32 fn;</div><div class='ctx'> </div><div class='ctx'> 	fn = psci_function_id[PSCI_FN_CPU_SUSPEND];</div><div class='del'>-	power_state = psci_power_state_pack(state);</div><div class='del'>-	err = invoke_psci_fn(fn, power_state, entry_point, 0);</div><div class='add'>+	err = invoke_psci_fn(fn, state, entry_point, 0);</div><div class='ctx'> 	return psci_to_linux_errno(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int psci_cpu_off(struct psci_power_state state)</div><div class='add'>+static int psci_cpu_off(u32 state)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	u32 fn, power_state;</div><div class='add'>+	u32 fn;</div><div class='ctx'> </div><div class='ctx'> 	fn = psci_function_id[PSCI_FN_CPU_OFF];</div><div class='del'>-	power_state = psci_power_state_pack(state);</div><div class='del'>-	err = invoke_psci_fn(fn, power_state, 0, 0);</div><div class='add'>+	err = invoke_psci_fn(fn, state, 0, 0);</div><div class='ctx'> 	return psci_to_linux_errno(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -168,30 +152,29 @@ static int psci_migrate(unsigned long cpuid)</div><div class='ctx'> static int psci_affinity_info(unsigned long target_affinity,</div><div class='ctx'> 		unsigned long lowest_affinity_level)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-	u32 fn;</div><div class='del'>-</div><div class='del'>-	fn = psci_function_id[PSCI_FN_AFFINITY_INFO];</div><div class='del'>-	err = invoke_psci_fn(fn, target_affinity, lowest_affinity_level, 0);</div><div class='del'>-	return err;</div><div class='add'>+	return invoke_psci_fn(PSCI_0_2_FN64_AFFINITY_INFO, target_affinity,</div><div class='add'>+			      lowest_affinity_level, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int psci_migrate_info_type(void)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-	u32 fn;</div><div class='add'>+	return invoke_psci_fn(PSCI_0_2_FN_MIGRATE_INFO_TYPE, 0, 0, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	fn = psci_function_id[PSCI_FN_MIGRATE_INFO_TYPE];</div><div class='del'>-	err = invoke_psci_fn(fn, 0, 0, 0);</div><div class='del'>-	return err;</div><div class='add'>+static unsigned long psci_migrate_info_up_cpu(void)</div><div class='add'>+{</div><div class='add'>+	return invoke_psci_fn(PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU, 0, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused cpu_psci_cpu_init_idle(struct device_node *cpu_node,</div><div class='del'>-						 unsigned int cpu)</div><div class='add'>+static int __maybe_unused cpu_psci_cpu_init_idle(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret, count = 0;</div><div class='del'>-	struct psci_power_state *psci_states;</div><div class='del'>-	struct device_node *state_node;</div><div class='add'>+	u32 *psci_states;</div><div class='add'>+	struct device_node *state_node, *cpu_node;</div><div class='add'>+</div><div class='add'>+	cpu_node = of_get_cpu_node(cpu, NULL);</div><div class='add'>+	if (!cpu_node)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the PSCI cpu_suspend function hook has not been initialized</div><div class='hunk'>@@ -215,13 +198,13 @@ static int __maybe_unused cpu_psci_cpu_init_idle(struct device_node *cpu_node,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		u32 psci_power_state;</div><div class='add'>+		u32 state;</div><div class='ctx'> </div><div class='ctx'> 		state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i);</div><div class='ctx'> </div><div class='ctx'> 		ret = of_property_read_u32(state_node,</div><div class='ctx'> 					   "arm,psci-suspend-param",</div><div class='del'>-					   &amp;psci_power_state);</div><div class='add'>+					   &amp;state);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			pr_warn(" * %s missing arm,psci-suspend-param property\n",</div><div class='ctx'> 				state_node-&gt;full_name);</div><div class='hunk'>@@ -230,9 +213,13 @@ static int __maybe_unused cpu_psci_cpu_init_idle(struct device_node *cpu_node,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		of_node_put(state_node);</div><div class='del'>-		pr_debug("psci-power-state %#x index %d\n", psci_power_state,</div><div class='del'>-							    i);</div><div class='del'>-		psci_power_state_unpack(psci_power_state, &amp;psci_states[i]);</div><div class='add'>+		pr_debug("psci-power-state %#x index %d\n", state, i);</div><div class='add'>+		if (!psci_power_state_is_valid(state)) {</div><div class='add'>+			pr_warn("Invalid PSCI power state %#x\n", state);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto free_mem;</div><div class='add'>+		}</div><div class='add'>+		psci_states[i] = state;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Idle states parsed correctly, initialize per-cpu pointer */</div><div class='ctx'> 	per_cpu(psci_power_state, cpu) = psci_states;</div><div class='hunk'>@@ -275,6 +262,46 @@ static void psci_sys_poweroff(void)</div><div class='ctx'> 	invoke_psci_fn(PSCI_0_2_FN_SYSTEM_OFF, 0, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Detect the presence of a resident Trusted OS which may cause CPU_OFF to</div><div class='add'>+ * return DENIED (which would be fatal).</div><div class='add'>+ */</div><div class='add'>+static void __init psci_init_migrate(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long cpuid;</div><div class='add'>+	int type, cpu;</div><div class='add'>+</div><div class='add'>+	type = psci_ops.migrate_info_type();</div><div class='add'>+</div><div class='add'>+	if (type == PSCI_0_2_TOS_MP) {</div><div class='add'>+		pr_info("Trusted OS migration not required\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type == PSCI_RET_NOT_SUPPORTED) {</div><div class='add'>+		pr_info("MIGRATE_INFO_TYPE not supported.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type != PSCI_0_2_TOS_UP_MIGRATE &amp;&amp;</div><div class='add'>+	    type != PSCI_0_2_TOS_UP_NO_MIGRATE) {</div><div class='add'>+		pr_err("MIGRATE_INFO_TYPE returned unknown type (%d)\n", type);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuid = psci_migrate_info_up_cpu();</div><div class='add'>+	if (cpuid &amp; ~MPIDR_HWID_BITMASK) {</div><div class='add'>+		pr_warn("MIGRATE_INFO_UP_CPU reported invalid physical ID (0x%lx)\n",</div><div class='add'>+			cpuid);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu = get_logical_index(cpuid);</div><div class='add'>+	resident_cpu = cpu &gt;= 0 ? cpu : -1;</div><div class='add'>+</div><div class='add'>+	pr_info("Trusted OS resident on physical CPU 0x%lx\n", cpuid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init psci_0_2_set_functions(void)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("Using standard PSCI v0.2 function IDs\n");</div><div class='hunk'>@@ -290,11 +317,8 @@ static void __init psci_0_2_set_functions(void)</div><div class='ctx'> 	psci_function_id[PSCI_FN_MIGRATE] = PSCI_0_2_FN64_MIGRATE;</div><div class='ctx'> 	psci_ops.migrate = psci_migrate;</div><div class='ctx'> </div><div class='del'>-	psci_function_id[PSCI_FN_AFFINITY_INFO] = PSCI_0_2_FN64_AFFINITY_INFO;</div><div class='ctx'> 	psci_ops.affinity_info = psci_affinity_info;</div><div class='ctx'> </div><div class='del'>-	psci_function_id[PSCI_FN_MIGRATE_INFO_TYPE] =</div><div class='del'>-		PSCI_0_2_FN_MIGRATE_INFO_TYPE;</div><div class='ctx'> 	psci_ops.migrate_info_type = psci_migrate_info_type;</div><div class='ctx'> </div><div class='ctx'> 	arm_pm_restart = psci_sys_reset;</div><div class='hunk'>@@ -307,32 +331,26 @@ static void __init psci_0_2_set_functions(void)</div><div class='ctx'>  */</div><div class='ctx'> static int __init psci_probe(void)</div><div class='ctx'> {</div><div class='del'>-	int ver = psci_get_version();</div><div class='del'>-</div><div class='del'>-	if (ver == PSCI_RET_NOT_SUPPORTED) {</div><div class='del'>-		/*</div><div class='del'>-		 * PSCI versions &gt;=0.2 mandates implementation of</div><div class='del'>-		 * PSCI_VERSION.</div><div class='del'>-		 */</div><div class='del'>-		pr_err("PSCI firmware does not comply with the v0.2 spec.\n");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	} else {</div><div class='del'>-		pr_info("PSCIv%d.%d detected in firmware.\n",</div><div class='del'>-				PSCI_VERSION_MAJOR(ver),</div><div class='del'>-				PSCI_VERSION_MINOR(ver));</div><div class='del'>-</div><div class='del'>-		if (PSCI_VERSION_MAJOR(ver) == 0 &amp;&amp;</div><div class='del'>-				PSCI_VERSION_MINOR(ver) &lt; 2) {</div><div class='del'>-			pr_err("Conflicting PSCI version detected.\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='add'>+	u32 ver = psci_get_version();</div><div class='add'>+</div><div class='add'>+	pr_info("PSCIv%d.%d detected in firmware.\n",</div><div class='add'>+			PSCI_VERSION_MAJOR(ver),</div><div class='add'>+			PSCI_VERSION_MINOR(ver));</div><div class='add'>+</div><div class='add'>+	if (PSCI_VERSION_MAJOR(ver) == 0 &amp;&amp; PSCI_VERSION_MINOR(ver) &lt; 2) {</div><div class='add'>+		pr_err("Conflicting PSCI version detected.\n");</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	psci_0_2_set_functions();</div><div class='ctx'> </div><div class='add'>+	psci_init_migrate();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+typedef int (*psci_initcall_t)(const struct device_node *);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * PSCI init function for PSCI versions &gt;=0.2</div><div class='ctx'>  *</div><div class='hunk'>@@ -421,6 +439,7 @@ int __init psci_dt_init(void)</div><div class='ctx'> 	return init_fn(np);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='ctx'> /*</div><div class='ctx'>  * We use PSCI 0.2+ when ACPI is deployed on ARM64 and it's</div><div class='ctx'>  * explicitly clarified in SBBR</div><div class='hunk'>@@ -441,10 +460,11 @@ int __init psci_acpi_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return psci_probe();</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> </div><div class='del'>-static int __init cpu_psci_cpu_init(struct device_node *dn, unsigned int cpu)</div><div class='add'>+static int __init cpu_psci_cpu_init(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -469,11 +489,21 @@ static int cpu_psci_cpu_boot(unsigned int cpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+static bool psci_tos_resident_on(int cpu)</div><div class='add'>+{</div><div class='add'>+	return cpu == resident_cpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int cpu_psci_cpu_disable(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	/* Fail early if we don't have CPU_OFF support */</div><div class='ctx'> 	if (!psci_ops.cpu_off)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Trusted OS will deny CPU_OFF */</div><div class='add'>+	if (psci_tos_resident_on(cpu))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -484,9 +514,8 @@ static void cpu_psci_cpu_die(unsigned int cpu)</div><div class='ctx'> 	 * There are no known implementations of PSCI actually using the</div><div class='ctx'> 	 * power state field, pass a sensible default for now.</div><div class='ctx'> 	 */</div><div class='del'>-	struct psci_power_state state = {</div><div class='del'>-		.type = PSCI_POWER_STATE_TYPE_POWER_DOWN,</div><div class='del'>-	};</div><div class='add'>+	u32 state = PSCI_POWER_STATE_TYPE_POWER_DOWN &lt;&lt;</div><div class='add'>+		    PSCI_0_2_POWER_STATE_TYPE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	ret = psci_ops.cpu_off(state);</div><div class='ctx'> </div><div class='hunk'>@@ -498,7 +527,7 @@ static int cpu_psci_cpu_kill(unsigned int cpu)</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	if (!psci_ops.affinity_info)</div><div class='del'>-		return 1;</div><div class='add'>+		return 0;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * cpu_kill could race with cpu_die and we can</div><div class='ctx'> 	 * potentially end up declaring this cpu undead</div><div class='hunk'>@@ -509,7 +538,7 @@ static int cpu_psci_cpu_kill(unsigned int cpu)</div><div class='ctx'> 		err = psci_ops.affinity_info(cpu_logical_map(cpu), 0);</div><div class='ctx'> 		if (err == PSCI_0_2_AFFINITY_LEVEL_OFF) {</div><div class='ctx'> 			pr_info("CPU%d killed.\n", cpu);</div><div class='del'>-			return 1;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		msleep(10);</div><div class='hunk'>@@ -518,15 +547,14 @@ static int cpu_psci_cpu_kill(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	pr_warn("CPU%d may not have shut down cleanly (AFFINITY_INFO reports %d)\n",</div><div class='ctx'> 			cpu, err);</div><div class='del'>-	/* Make op_cpu_kill() fail. */</div><div class='del'>-	return 0;</div><div class='add'>+	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int psci_suspend_finisher(unsigned long index)</div><div class='ctx'> {</div><div class='del'>-	struct psci_power_state *state = __this_cpu_read(psci_power_state);</div><div class='add'>+	u32 *state = __this_cpu_read(psci_power_state);</div><div class='ctx'> </div><div class='ctx'> 	return psci_ops.cpu_suspend(state[index - 1],</div><div class='ctx'> 				    virt_to_phys(cpu_resume));</div><div class='hunk'>@@ -535,7 +563,7 @@ static int psci_suspend_finisher(unsigned long index)</div><div class='ctx'> static int __maybe_unused cpu_psci_cpu_suspend(unsigned long index)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct psci_power_state *state = __this_cpu_read(psci_power_state);</div><div class='add'>+	u32 *state = __this_cpu_read(psci_power_state);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * idle state index 0 corresponds to wfi, should never be called</div><div class='ctx'> 	 * from the cpu_suspend operations</div><div class='hunk'>@@ -543,10 +571,10 @@ static int __maybe_unused cpu_psci_cpu_suspend(unsigned long index)</div><div class='ctx'> 	if (WARN_ON_ONCE(!index))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (state[index - 1].type == PSCI_POWER_STATE_TYPE_STANDBY)</div><div class='add'>+	if (!psci_power_state_loses_context(state[index - 1]))</div><div class='ctx'> 		ret = psci_ops.cpu_suspend(state[index - 1], 0);</div><div class='ctx'> 	else</div><div class='del'>-		ret = __cpu_suspend(index, psci_suspend_finisher);</div><div class='add'>+		ret = cpu_suspend(index, psci_suspend_finisher);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c<br/>index 74753132c3ac..f3067d4d4e35 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/setup.c</a></div><div class='hunk'>@@ -64,6 +64,7 @@</div><div class='ctx'> #include &lt;asm/psci.h&gt;</div><div class='ctx'> #include &lt;asm/efi.h&gt;</div><div class='ctx'> #include &lt;asm/virt.h&gt;</div><div class='add'>+#include &lt;asm/xen/hypervisor.h&gt;</div><div class='ctx'> </div><div class='ctx'> unsigned long elf_hwcap __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL_GPL(elf_hwcap);</div><div class='hunk'>@@ -105,18 +106,6 @@ static struct resource mem_res[] = {</div><div class='ctx'> #define kernel_code mem_res[0]</div><div class='ctx'> #define kernel_data mem_res[1]</div><div class='ctx'> </div><div class='del'>-void __init early_print(const char *str, ...)</div><div class='del'>-{</div><div class='del'>-	char buf[256];</div><div class='del'>-	va_list ap;</div><div class='del'>-</div><div class='del'>-	va_start(ap, str);</div><div class='del'>-	vsnprintf(buf, sizeof(buf), str, ap);</div><div class='del'>-	va_end(ap);</div><div class='del'>-</div><div class='del'>-	printk("%s", buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The recorded values of x0 .. x3 upon kernel entry.</div><div class='ctx'>  */</div><div class='hunk'>@@ -326,12 +315,14 @@ static void __init setup_processor(void)</div><div class='ctx'> </div><div class='ctx'> static void __init setup_machine_fdt(phys_addr_t dt_phys)</div><div class='ctx'> {</div><div class='del'>-	if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) {</div><div class='del'>-		early_print("\n"</div><div class='del'>-			"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"</div><div class='del'>-			"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"</div><div class='del'>-			"\nPlease check your bootloader.\n",</div><div class='del'>-			dt_phys, phys_to_virt(dt_phys));</div><div class='add'>+	void *dt_virt = fixmap_remap_fdt(dt_phys);</div><div class='add'>+</div><div class='add'>+	if (!dt_virt || !early_init_dt_scan(dt_virt)) {</div><div class='add'>+		pr_crit("\n"</div><div class='add'>+			"Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"</div><div class='add'>+			"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"</div><div class='add'>+			"\nPlease check your bootloader.",</div><div class='add'>+			&amp;dt_phys, dt_virt);</div><div class='ctx'> </div><div class='ctx'> 		while (true)</div><div class='ctx'> 			cpu_relax();</div><div class='hunk'>@@ -374,8 +365,6 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> {</div><div class='ctx'> 	setup_processor();</div><div class='ctx'> </div><div class='del'>-	setup_machine_fdt(__fdt_pointer);</div><div class='del'>-</div><div class='ctx'> 	init_mm.start_code = (unsigned long) _text;</div><div class='ctx'> 	init_mm.end_code   = (unsigned long) _etext;</div><div class='ctx'> 	init_mm.end_data   = (unsigned long) _edata;</div><div class='hunk'>@@ -386,6 +375,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	early_fixmap_init();</div><div class='ctx'> 	early_ioremap_init();</div><div class='ctx'> </div><div class='add'>+	setup_machine_fdt(__fdt_pointer);</div><div class='add'>+</div><div class='ctx'> 	parse_early_param();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -408,16 +399,14 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	if (acpi_disabled) {</div><div class='ctx'> 		unflatten_device_tree();</div><div class='ctx'> 		psci_dt_init();</div><div class='del'>-		cpu_read_bootcpu_ops();</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-		of_smp_init_cpus();</div><div class='del'>-#endif</div><div class='ctx'> 	} else {</div><div class='ctx'> 		psci_acpi_init();</div><div class='del'>-		acpi_init_cpus();</div><div class='ctx'> 	}</div><div class='add'>+	xen_early_init();</div><div class='ctx'> </div><div class='add'>+	cpu_read_bootcpu_ops();</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+	smp_init_cpus();</div><div class='ctx'> 	smp_build_mpidr_hash();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c<br/>index d26fcd4cd6e6..1670f15ef69e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/signal32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/signal32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/signal32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/signal32.c</a></div><div class='hunk'>@@ -370,7 +370,7 @@ badframe:</div><div class='ctx'> 	if (show_unhandled_signals)</div><div class='ctx'> 		pr_info_ratelimited("%s[%d]: bad frame in %s: pc=%08llx sp=%08llx\n",</div><div class='ctx'> 				    current-&gt;comm, task_pid_nr(current), __func__,</div><div class='del'>-				    regs-&gt;pc, regs-&gt;sp);</div><div class='add'>+				    regs-&gt;pc, regs-&gt;compat_sp);</div><div class='ctx'> 	force_sig(SIGSEGV, current);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -407,7 +407,7 @@ badframe:</div><div class='ctx'> 	if (show_unhandled_signals)</div><div class='ctx'> 		pr_info_ratelimited("%s[%d]: bad frame in %s: pc=%08llx sp=%08llx\n",</div><div class='ctx'> 				    current-&gt;comm, task_pid_nr(current), __func__,</div><div class='del'>-				    regs-&gt;pc, regs-&gt;sp);</div><div class='add'>+				    regs-&gt;pc, regs-&gt;compat_sp);</div><div class='ctx'> 	force_sig(SIGSEGV, current);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S<br/>index ede186cdd452..803cfea41962 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/sleep.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/sleep.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/sleep.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/sleep.S</a></div><div class='hunk'>@@ -130,12 +130,14 @@ ENDPROC(__cpu_suspend_enter)</div><div class='ctx'> /*</div><div class='ctx'>  * x0 must contain the sctlr value retrieved from restored context</div><div class='ctx'>  */</div><div class='add'>+	.pushsection	".idmap.text", "ax"</div><div class='ctx'> ENTRY(cpu_resume_mmu)</div><div class='ctx'> 	ldr	x3, =cpu_resume_after_mmu</div><div class='ctx'> 	msr	sctlr_el1, x0		// restore sctlr_el1</div><div class='ctx'> 	isb</div><div class='ctx'> 	br	x3			// global jump to virtual address</div><div class='ctx'> ENDPROC(cpu_resume_mmu)</div><div class='add'>+	.popsection</div><div class='ctx'> cpu_resume_after_mmu:</div><div class='ctx'> 	mov	x0, #0			// return zero on success</div><div class='ctx'> 	ldp	x19, x20, [sp, #16]</div><div class='hunk'>@@ -162,15 +164,12 @@ ENTRY(cpu_resume)</div><div class='ctx'> #else</div><div class='ctx'> 	mov	x7, xzr</div><div class='ctx'> #endif</div><div class='del'>-	adrp	x0, sleep_save_sp</div><div class='del'>-	add	x0, x0, #:lo12:sleep_save_sp</div><div class='del'>-	ldr	x0, [x0, #SLEEP_SAVE_SP_PHYS]</div><div class='add'>+	ldr_l	x0, sleep_save_sp + SLEEP_SAVE_SP_PHYS</div><div class='ctx'> 	ldr	x0, [x0, x7, lsl #3]</div><div class='ctx'> 	/* load sp from context */</div><div class='ctx'> 	ldr	x2, [x0, #CPU_CTX_SP]</div><div class='del'>-	adrp	x1, sleep_idmap_phys</div><div class='ctx'> 	/* load physical address of identity map page table in x1 */</div><div class='del'>-	ldr	x1, [x1, #:lo12:sleep_idmap_phys]</div><div class='add'>+	adrp	x1, idmap_pg_dir</div><div class='ctx'> 	mov	sp, x2</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * cpu_do_resume expects x0 to contain context physical address</div><div class='head'>diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c<br/>index 2cb008177252..50fb4696654e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/smp.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'>  * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='hunk'>@@ -248,20 +249,20 @@ static int op_cpu_kill(unsigned int cpu)</div><div class='ctx'> 	 * time and hope that it's dead, so let's skip the wait and just hope.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!cpu_ops[cpu]-&gt;cpu_kill)</div><div class='del'>-		return 1;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return cpu_ops[cpu]-&gt;cpu_kill(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DECLARE_COMPLETION(cpu_died);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * called on the thread which is asking for a CPU to be shutdown -</div><div class='ctx'>  * waits until shutdown has completed, or it is timed out.</div><div class='ctx'>  */</div><div class='ctx'> void __cpu_die(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	if (!wait_for_completion_timeout(&amp;cpu_died, msecs_to_jiffies(5000))) {</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!cpu_wait_death(cpu, 5)) {</div><div class='ctx'> 		pr_crit("CPU%u: cpu didn't die\n", cpu);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -273,8 +274,10 @@ void __cpu_die(unsigned int cpu)</div><div class='ctx'> 	 * verify that it has really left the kernel before we consider</div><div class='ctx'> 	 * clobbering anything it might still be using.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!op_cpu_kill(cpu))</div><div class='del'>-		pr_warn("CPU%d may not have shut down cleanly\n", cpu);</div><div class='add'>+	err = op_cpu_kill(cpu);</div><div class='add'>+	if (err)</div><div class='add'>+		pr_warn("CPU%d may not have shut down cleanly: %d\n",</div><div class='add'>+			cpu, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -294,7 +297,7 @@ void cpu_die(void)</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	/* Tell __cpu_die() that this CPU is now safe to dispose of */</div><div class='del'>-	complete(&amp;cpu_died);</div><div class='add'>+	(void)cpu_report_death();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Actually shutdown the CPU. This must never fail. The specific hotplug</div><div class='hunk'>@@ -318,57 +321,158 @@ void __init smp_prepare_boot_cpu(void)</div><div class='ctx'> 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 __init of_get_cpu_mpidr(struct device_node *dn)</div><div class='add'>+{</div><div class='add'>+	const __be32 *cell;</div><div class='add'>+	u64 hwid;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A cpu node with missing "reg" property is</div><div class='add'>+	 * considered invalid to build a cpu_logical_map</div><div class='add'>+	 * entry.</div><div class='add'>+	 */</div><div class='add'>+	cell = of_get_property(dn, "reg", NULL);</div><div class='add'>+	if (!cell) {</div><div class='add'>+		pr_err("%s: missing reg property\n", dn-&gt;full_name);</div><div class='add'>+		return INVALID_HWID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwid = of_read_number(cell, of_n_addr_cells(dn));</div><div class='add'>+	/*</div><div class='add'>+	 * Non affinity bits must be set to 0 in the DT</div><div class='add'>+	 */</div><div class='add'>+	if (hwid &amp; ~MPIDR_HWID_BITMASK) {</div><div class='add'>+		pr_err("%s: invalid reg property\n", dn-&gt;full_name);</div><div class='add'>+		return INVALID_HWID;</div><div class='add'>+	}</div><div class='add'>+	return hwid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Duplicate MPIDRs are a recipe for disaster. Scan all initialized</div><div class='add'>+ * entries and check for duplicates. If any is found just ignore the</div><div class='add'>+ * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid</div><div class='add'>+ * matching valid MPIDR values.</div><div class='add'>+ */</div><div class='add'>+static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 1; (i &lt; cpu) &amp;&amp; (i &lt; NR_CPUS); i++)</div><div class='add'>+		if (cpu_logical_map(i) == hwid)</div><div class='add'>+			return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize cpu operations for a logical cpu and</div><div class='add'>+ * set it in the possible mask on success</div><div class='add'>+ */</div><div class='add'>+static int __init smp_cpu_setup(int cpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu_read_ops(cpu))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (cpu_ops[cpu]-&gt;cpu_init(cpu))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	set_cpu_possible(cpu, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bootcpu_valid __initdata;</div><div class='add'>+static unsigned int cpu_count = 1;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+/*</div><div class='add'>+ * acpi_map_gic_cpu_interface - parse processor MADT entry</div><div class='add'>+ *</div><div class='add'>+ * Carry out sanity checks on MADT processor entry and initialize</div><div class='add'>+ * cpu_logical_map on success</div><div class='add'>+ */</div><div class='add'>+static void __init</div><div class='add'>+acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)</div><div class='add'>+{</div><div class='add'>+	u64 hwid = processor-&gt;arm_mpidr;</div><div class='add'>+</div><div class='add'>+	if (!(processor-&gt;flags &amp; ACPI_MADT_ENABLED)) {</div><div class='add'>+		pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hwid &amp; ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {</div><div class='add'>+		pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_mpidr_duplicate(cpu_count, hwid)) {</div><div class='add'>+		pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if GICC structure of boot CPU is available in the MADT */</div><div class='add'>+	if (cpu_logical_map(0) == hwid) {</div><div class='add'>+		if (bootcpu_valid) {</div><div class='add'>+			pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",</div><div class='add'>+			       hwid);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		bootcpu_valid = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_count &gt;= NR_CPUS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* map the logical cpu id to cpu MPIDR */</div><div class='add'>+	cpu_logical_map(cpu_count) = hwid;</div><div class='add'>+</div><div class='add'>+	cpu_count++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init</div><div class='add'>+acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,</div><div class='add'>+			     const unsigned long end)</div><div class='add'>+{</div><div class='add'>+	struct acpi_madt_generic_interrupt *processor;</div><div class='add'>+</div><div class='add'>+	processor = (struct acpi_madt_generic_interrupt *)header;</div><div class='add'>+	if (BAD_MADT_GICC_ENTRY(processor, end))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	acpi_table_print_madt_entry(header);</div><div class='add'>+</div><div class='add'>+	acpi_map_gic_cpu_interface(processor);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define acpi_table_parse_madt(...)	do { } while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Enumerate the possible CPU set from the device tree and build the</div><div class='ctx'>  * cpu logical map array containing MPIDR values related to logical</div><div class='ctx'>  * cpus. Assumes that cpu_logical_map(0) has already been initialized.</div><div class='ctx'>  */</div><div class='del'>-void __init of_smp_init_cpus(void)</div><div class='add'>+void __init of_parse_and_init_cpus(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dn = NULL;</div><div class='del'>-	unsigned int i, cpu = 1;</div><div class='del'>-	bool bootcpu_valid = false;</div><div class='ctx'> </div><div class='ctx'> 	while ((dn = of_find_node_by_type(dn, "cpu"))) {</div><div class='del'>-		const u32 *cell;</div><div class='del'>-		u64 hwid;</div><div class='add'>+		u64 hwid = of_get_cpu_mpidr(dn);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * A cpu node with missing "reg" property is</div><div class='del'>-		 * considered invalid to build a cpu_logical_map</div><div class='del'>-		 * entry.</div><div class='del'>-		 */</div><div class='del'>-		cell = of_get_property(dn, "reg", NULL);</div><div class='del'>-		if (!cell) {</div><div class='del'>-			pr_err("%s: missing reg property\n", dn-&gt;full_name);</div><div class='add'>+		if (hwid == INVALID_HWID)</div><div class='ctx'> 			goto next;</div><div class='del'>-		}</div><div class='del'>-		hwid = of_read_number(cell, of_n_addr_cells(dn));</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Non affinity bits must be set to 0 in the DT</div><div class='del'>-		 */</div><div class='del'>-		if (hwid &amp; ~MPIDR_HWID_BITMASK) {</div><div class='del'>-			pr_err("%s: invalid reg property\n", dn-&gt;full_name);</div><div class='add'>+		if (is_mpidr_duplicate(cpu_count, hwid)) {</div><div class='add'>+			pr_err("%s: duplicate cpu reg properties in the DT\n",</div><div class='add'>+				dn-&gt;full_name);</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Duplicate MPIDRs are a recipe for disaster. Scan</div><div class='del'>-		 * all initialized entries and check for</div><div class='del'>-		 * duplicates. If any is found just ignore the cpu.</div><div class='del'>-		 * cpu_logical_map was initialized to INVALID_HWID to</div><div class='del'>-		 * avoid matching valid MPIDR values.</div><div class='del'>-		 */</div><div class='del'>-		for (i = 1; (i &lt; cpu) &amp;&amp; (i &lt; NR_CPUS); i++) {</div><div class='del'>-			if (cpu_logical_map(i) == hwid) {</div><div class='del'>-				pr_err("%s: duplicate cpu reg properties in the DT\n",</div><div class='del'>-					dn-&gt;full_name);</div><div class='del'>-				goto next;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='ctx'> 		 * The numbering scheme requires that the boot CPU</div><div class='ctx'> 		 * must be assigned logical id 0. Record it so that</div><div class='ctx'> 		 * the logical map built from DT is validated and can</div><div class='hunk'>@@ -392,38 +496,58 @@ void __init of_smp_init_cpus(void)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (cpu &gt;= NR_CPUS)</div><div class='del'>-			goto next;</div><div class='del'>-</div><div class='del'>-		if (cpu_read_ops(dn, cpu) != 0)</div><div class='del'>-			goto next;</div><div class='del'>-</div><div class='del'>-		if (cpu_ops[cpu]-&gt;cpu_init(dn, cpu))</div><div class='add'>+		if (cpu_count &gt;= NR_CPUS)</div><div class='ctx'> 			goto next;</div><div class='ctx'> </div><div class='ctx'> 		pr_debug("cpu logical map 0x%llx\n", hwid);</div><div class='del'>-		cpu_logical_map(cpu) = hwid;</div><div class='add'>+		cpu_logical_map(cpu_count) = hwid;</div><div class='ctx'> next:</div><div class='del'>-		cpu++;</div><div class='add'>+		cpu_count++;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enumerate the possible CPU set from the device tree or ACPI and build the</div><div class='add'>+ * cpu logical map array containing MPIDR values related to logical</div><div class='add'>+ * cpus. Assumes that cpu_logical_map(0) has already been initialized.</div><div class='add'>+ */</div><div class='add'>+void __init smp_init_cpus(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	/* sanity check */</div><div class='del'>-	if (cpu &gt; NR_CPUS)</div><div class='del'>-		pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",</div><div class='del'>-			   cpu, NR_CPUS);</div><div class='add'>+	if (acpi_disabled)</div><div class='add'>+		of_parse_and_init_cpus();</div><div class='add'>+	else</div><div class='add'>+		/*</div><div class='add'>+		 * do a walk of MADT to determine how many CPUs</div><div class='add'>+		 * we have including disabled CPUs, and get information</div><div class='add'>+		 * we need for SMP init</div><div class='add'>+		 */</div><div class='add'>+		acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,</div><div class='add'>+				      acpi_parse_gic_cpu_interface, 0);</div><div class='add'>+</div><div class='add'>+	if (cpu_count &gt; NR_CPUS)</div><div class='add'>+		pr_warn("no. of cores (%d) greater than configured maximum of %d - clipping\n",</div><div class='add'>+			cpu_count, NR_CPUS);</div><div class='ctx'> </div><div class='ctx'> 	if (!bootcpu_valid) {</div><div class='del'>-		pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");</div><div class='add'>+		pr_err("missing boot CPU MPIDR, not enabling secondaries\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * All the cpus that made it to the cpu_logical_map have been</div><div class='del'>-	 * validated so set them as possible cpus.</div><div class='add'>+	 * We need to set the cpu_logical_map entries before enabling</div><div class='add'>+	 * the cpus so that cpu processor description entries (DT cpu nodes</div><div class='add'>+	 * and ACPI MADT entries) can be retrieved by matching the cpu hwid</div><div class='add'>+	 * with entries in cpu_logical_map while initializing the cpus.</div><div class='add'>+	 * If the cpu set-up fails, invalidate the cpu_logical_map entry.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; NR_CPUS; i++)</div><div class='del'>-		if (cpu_logical_map(i) != INVALID_HWID)</div><div class='del'>-			set_cpu_possible(i, true);</div><div class='add'>+	for (i = 1; i &lt; NR_CPUS; i++) {</div><div class='add'>+		if (cpu_logical_map(i) != INVALID_HWID) {</div><div class='add'>+			if (smp_cpu_setup(i))</div><div class='add'>+				cpu_logical_map(i) = INVALID_HWID;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='hunk'>@@ -569,7 +693,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)</div><div class='ctx'> 	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='ctx'> 	if ((unsigned)ipinr &lt; NR_IPI) {</div><div class='del'>-		trace_ipi_entry(ipi_types[ipinr]);</div><div class='add'>+		trace_ipi_entry_rcuidle(ipi_types[ipinr]);</div><div class='ctx'> 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -612,7 +736,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((unsigned)ipinr &lt; NR_IPI)</div><div class='del'>-		trace_ipi_exit(ipi_types[ipinr]);</div><div class='add'>+		trace_ipi_exit_rcuidle(ipi_types[ipinr]);</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c<br/>index 14944e5b28da..aef3605a8c47 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/smp_spin_table.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/smp_spin_table.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/smp_spin_table.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/smp_spin_table.c</a></div><div class='hunk'>@@ -49,8 +49,14 @@ static void write_pen_release(u64 val)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)</div><div class='add'>+static int smp_spin_table_cpu_init(unsigned int cpu)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+</div><div class='add'>+	dn = of_get_cpu_node(cpu, NULL);</div><div class='add'>+	if (!dn)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Determine the address from which the CPU is polling.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c<br/>index d7daf45ae7a2..8297d502217e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/suspend.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/suspend.c</a></div><div class='hunk'>@@ -51,13 +51,13 @@ void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * __cpu_suspend</div><div class='add'>+ * cpu_suspend</div><div class='ctx'>  *</div><div class='ctx'>  * arg: argument to pass to the finisher function</div><div class='ctx'>  * fn: finisher function pointer</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long))</div><div class='add'>+int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;active_mm;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -82,7 +82,7 @@ int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long))</div><div class='ctx'> 		 * We are resuming from reset with TTBR0_EL1 set to the</div><div class='ctx'> 		 * idmap to enable the MMU; restore the active_mm mappings in</div><div class='ctx'> 		 * TTBR0_EL1 unless the active_mm == &amp;init_mm, in which case</div><div class='del'>-		 * the thread entered __cpu_suspend with TTBR0_EL1 set to</div><div class='add'>+		 * the thread entered cpu_suspend with TTBR0_EL1 set to</div><div class='ctx'> 		 * reserved TTBR0 page tables and should be restored as such.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (mm == &amp;init_mm)</div><div class='hunk'>@@ -118,7 +118,6 @@ int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long))</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sleep_save_sp sleep_save_sp;</div><div class='del'>-phys_addr_t sleep_idmap_phys;</div><div class='ctx'> </div><div class='ctx'> static int __init cpu_suspend_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -132,9 +131,7 @@ static int __init cpu_suspend_init(void)</div><div class='ctx'> </div><div class='ctx'> 	sleep_save_sp.save_ptr_stash = ctx_ptr;</div><div class='ctx'> 	sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);</div><div class='del'>-	sleep_idmap_phys = virt_to_phys(idmap_pg_dir);</div><div class='ctx'> 	__flush_dcache_area(&amp;sleep_save_sp, sizeof(struct sleep_save_sp));</div><div class='del'>-	__flush_dcache_area(&amp;sleep_idmap_phys, sizeof(sleep_idmap_phys));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c<br/>index 1ef2940df13c..566bc4c35040 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/traps.c</a></div><div class='hunk'>@@ -335,8 +335,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)</div><div class='ctx'> 	if (call_undef_hook(regs) == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (show_unhandled_signals &amp;&amp; unhandled_signal(current, SIGILL) &amp;&amp;</div><div class='del'>-	    printk_ratelimit()) {</div><div class='add'>+	if (unhandled_signal(current, SIGILL) &amp;&amp; show_unhandled_signals_ratelimited()) {</div><div class='ctx'> 		pr_info("%s[%d]: undefined instruction: pc=%p\n",</div><div class='ctx'> 			current-&gt;comm, task_pid_nr(current), pc);</div><div class='ctx'> 		dump_instr(KERN_INFO, regs);</div><div class='hunk'>@@ -363,7 +362,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (show_unhandled_signals &amp;&amp; printk_ratelimit()) {</div><div class='add'>+	if (show_unhandled_signals_ratelimited()) {</div><div class='ctx'> 		pr_info("%s[%d]: syscall %d\n", current-&gt;comm,</div><div class='ctx'> 			task_pid_nr(current), (int)regs-&gt;syscallno);</div><div class='ctx'> 		dump_instr("", regs);</div><div class='head'>diff --git a/arch/arm64/kernel/vdso/Makefile b/arch/arm64/kernel/vdso/Makefile<br/>index ff3bddea482d..f6fe17d88da5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/vdso/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/vdso/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/vdso/Makefile</a></div><div class='hunk'>@@ -15,6 +15,10 @@ ccflags-y := -shared -fno-common -fno-builtin</div><div class='ctx'> ccflags-y += -nostdlib -Wl,-soname=linux-vdso.so.1 \</div><div class='ctx'> 		$(call cc-ldoption, -Wl$(comma)--hash-style=sysv)</div><div class='ctx'> </div><div class='add'>+# Workaround for bare-metal (ELF) toolchains that neglect to pass -shared</div><div class='add'>+# down to collect2, resulting in silent corruption of the vDSO image.</div><div class='add'>+ccflags-y += -Wl,-shared</div><div class='add'>+</div><div class='ctx'> obj-y += vdso.o</div><div class='ctx'> extra-y += vdso.lds vdso-offsets.h</div><div class='ctx'> CPPFLAGS_vdso.lds += -P -C -U$(ARCH)</div><div class='head'>diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S<br/>index a2c29865c3fe..98073332e2d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kernel/vmlinux.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -38,6 +38,12 @@ jiffies = jiffies_64;</div><div class='ctx'> 	*(.hyp.text)					\</div><div class='ctx'> 	VMLINUX_SYMBOL(__hyp_text_end) = .;</div><div class='ctx'> </div><div class='add'>+#define IDMAP_TEXT					\</div><div class='add'>+	. = ALIGN(SZ_4K);				\</div><div class='add'>+	VMLINUX_SYMBOL(__idmap_text_start) = .;		\</div><div class='add'>+	*(.idmap.text)					\</div><div class='add'>+	VMLINUX_SYMBOL(__idmap_text_end) = .;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The size of the PE/COFF section that covers the kernel image, which</div><div class='ctx'>  * runs from stext to _edata, must be a round multiple of the PE/COFF</div><div class='hunk'>@@ -95,6 +101,7 @@ SECTIONS</div><div class='ctx'> 			SCHED_TEXT</div><div class='ctx'> 			LOCK_TEXT</div><div class='ctx'> 			HYPERVISOR_TEXT</div><div class='add'>+			IDMAP_TEXT</div><div class='ctx'> 			*(.fixup)</div><div class='ctx'> 			*(.gnu.warning)</div><div class='ctx'> 		. = ALIGN(16);</div><div class='hunk'>@@ -167,11 +174,13 @@ SECTIONS</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The HYP init code can't be more than a page long,</div><div class='add'>+ * The HYP init code and ID map text can't be longer than a page each,</div><div class='ctx'>  * and should not cross a page boundary.</div><div class='ctx'>  */</div><div class='ctx'> ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start &amp; ~(SZ_4K - 1)) &lt;= SZ_4K,</div><div class='ctx'> 	"HYP init code too big or misaligned")</div><div class='add'>+ASSERT(__idmap_text_end - (__idmap_text_start &amp; ~(SZ_4K - 1)) &lt;= SZ_4K,</div><div class='add'>+	"ID map text too big or misaligned")</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * If padding is applied before .head.text, virt&lt;-&gt;phys conversions will fail.</div><div class='head'>diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig<br/>index 5105e297ed5f..bfffe8f4bd53 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kvm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kvm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/Kconfig</a></div><div class='hunk'>@@ -28,6 +28,7 @@ config KVM</div><div class='ctx'> 	select KVM_ARM_HOST</div><div class='ctx'> 	select KVM_GENERIC_DIRTYLOG_READ_PROTECT</div><div class='ctx'> 	select SRCU</div><div class='add'>+	select KVM_VFIO</div><div class='ctx'> 	select HAVE_KVM_EVENTFD</div><div class='ctx'> 	select HAVE_KVM_IRQFD</div><div class='ctx'> 	---help---</div><div class='head'>diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile<br/>index d5904f876cdb..f90f4aa7f88d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kvm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kvm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/Makefile</a></div><div class='hunk'>@@ -11,7 +11,7 @@ ARM=../../../arch/arm/kvm</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KVM_ARM_HOST) += kvm.o</div><div class='ctx'> </div><div class='del'>-kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o</div><div class='add'>+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o $(KVM)/vfio.o</div><div class='ctx'> kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/arm.o $(ARM)/mmu.o $(ARM)/mmio.o</div><div class='ctx'> kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/psci.o $(ARM)/perf.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S<br/>index 5befd010e232..17a8fb14f428 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kvm/hyp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kvm/hyp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kvm/hyp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/hyp.S</a></div><div class='hunk'>@@ -17,8 +17,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/esr.h&gt;</div><div class='ctx'> #include &lt;asm/fpsimdmacros.h&gt;</div><div class='hunk'>@@ -50,8 +52,8 @@</div><div class='ctx'> 	stp	x29, lr, [x3, #80]</div><div class='ctx'> </div><div class='ctx'> 	mrs	x19, sp_el0</div><div class='del'>-	mrs	x20, elr_el2		// EL1 PC</div><div class='del'>-	mrs	x21, spsr_el2		// EL1 pstate</div><div class='add'>+	mrs	x20, elr_el2		// pc before entering el2</div><div class='add'>+	mrs	x21, spsr_el2		// pstate before entering el2</div><div class='ctx'> </div><div class='ctx'> 	stp	x19, x20, [x3, #96]</div><div class='ctx'> 	str	x21, [x3, #112]</div><div class='hunk'>@@ -82,8 +84,8 @@</div><div class='ctx'> 	ldr	x21, [x3, #16]</div><div class='ctx'> </div><div class='ctx'> 	msr	sp_el0, x19</div><div class='del'>-	msr	elr_el2, x20 				// EL1 PC</div><div class='del'>-	msr	spsr_el2, x21 				// EL1 pstate</div><div class='add'>+	msr	elr_el2, x20 		// pc on return from el2</div><div class='add'>+	msr	spsr_el2, x21 		// pstate on return from el2</div><div class='ctx'> </div><div class='ctx'> 	add	x3, x2, #CPU_XREG_OFFSET(19)</div><div class='ctx'> 	ldp	x19, x20, [x3]</div><div class='hunk'>@@ -808,10 +810,7 @@</div><div class='ctx'>  * Call into the vgic backend for state saving</div><div class='ctx'>  */</div><div class='ctx'> .macro save_vgic_state</div><div class='del'>-	adr	x24, __vgic_sr_vectors</div><div class='del'>-	ldr	x24, [x24, VGIC_SAVE_FN]</div><div class='del'>-	kern_hyp_va	x24</div><div class='del'>-	blr	x24</div><div class='add'>+	alternative_insn "bl __save_vgic_v2_state", "bl __save_vgic_v3_state", ARM64_HAS_SYSREG_GIC_CPUIF</div><div class='ctx'> 	mrs	x24, hcr_el2</div><div class='ctx'> 	mov	x25, #HCR_INT_OVERRIDE</div><div class='ctx'> 	neg	x25, x25</div><div class='hunk'>@@ -828,10 +827,7 @@</div><div class='ctx'> 	orr	x24, x24, #HCR_INT_OVERRIDE</div><div class='ctx'> 	orr	x24, x24, x25</div><div class='ctx'> 	msr	hcr_el2, x24</div><div class='del'>-	adr	x24, __vgic_sr_vectors</div><div class='del'>-	ldr	x24, [x24, #VGIC_RESTORE_FN]</div><div class='del'>-	kern_hyp_va	x24</div><div class='del'>-	blr	x24</div><div class='add'>+	alternative_insn "bl __restore_vgic_v2_state", "bl __restore_vgic_v3_state", ARM64_HAS_SYSREG_GIC_CPUIF</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro save_timer_state</div><div class='hunk'>@@ -1062,12 +1058,6 @@ ENTRY(__kvm_flush_vm_context)</div><div class='ctx'> 	ret</div><div class='ctx'> ENDPROC(__kvm_flush_vm_context)</div><div class='ctx'> </div><div class='del'>-	// struct vgic_sr_vectors __vgi_sr_vectors;</div><div class='del'>-	.align 3</div><div class='del'>-ENTRY(__vgic_sr_vectors)</div><div class='del'>-	.skip	VGIC_SR_VECTOR_SZ</div><div class='del'>-ENDPROC(__vgic_sr_vectors)</div><div class='del'>-</div><div class='ctx'> __kvm_hyp_panic:</div><div class='ctx'> 	// Guess the context by looking at VTTBR:</div><div class='ctx'> 	// If zero, then we're already a host.</div><div class='head'>diff --git a/arch/arm64/kvm/vgic-v2-switch.S b/arch/arm64/kvm/vgic-v2-switch.S<br/>index f002fe1c3700..3f000712a85d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kvm/vgic-v2-switch.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kvm/vgic-v2-switch.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kvm/vgic-v2-switch.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/vgic-v2-switch.S</a></div><div class='hunk'>@@ -47,7 +47,6 @@ __save_vgic_v2_state:</div><div class='ctx'> 	add	x3, x0, #VCPU_VGIC_CPU</div><div class='ctx'> </div><div class='ctx'> 	/* Save all interesting registers */</div><div class='del'>-	ldr	w4, [x2, #GICH_HCR]</div><div class='ctx'> 	ldr	w5, [x2, #GICH_VMCR]</div><div class='ctx'> 	ldr	w6, [x2, #GICH_MISR]</div><div class='ctx'> 	ldr	w7, [x2, #GICH_EISR0]</div><div class='hunk'>@@ -55,7 +54,6 @@ __save_vgic_v2_state:</div><div class='ctx'> 	ldr	w9, [x2, #GICH_ELRSR0]</div><div class='ctx'> 	ldr	w10, [x2, #GICH_ELRSR1]</div><div class='ctx'> 	ldr	w11, [x2, #GICH_APR]</div><div class='del'>-CPU_BE(	rev	w4,  w4  )</div><div class='ctx'> CPU_BE(	rev	w5,  w5  )</div><div class='ctx'> CPU_BE(	rev	w6,  w6  )</div><div class='ctx'> CPU_BE(	rev	w7,  w7  )</div><div class='hunk'>@@ -64,7 +62,6 @@ CPU_BE(	rev	w9,  w9  )</div><div class='ctx'> CPU_BE(	rev	w10, w10 )</div><div class='ctx'> CPU_BE(	rev	w11, w11 )</div><div class='ctx'> </div><div class='del'>-	str	w4, [x3, #VGIC_V2_CPU_HCR]</div><div class='ctx'> 	str	w5, [x3, #VGIC_V2_CPU_VMCR]</div><div class='ctx'> 	str	w6, [x3, #VGIC_V2_CPU_MISR]</div><div class='ctx'> CPU_LE(	str	w7, [x3, #VGIC_V2_CPU_EISR] )</div><div class='head'>diff --git a/arch/arm64/kvm/vgic-v3-switch.S b/arch/arm64/kvm/vgic-v3-switch.S<br/>index 617a012a0107..3c20730ddff5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/kvm/vgic-v3-switch.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/kvm/vgic-v3-switch.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/kvm/vgic-v3-switch.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/kvm/vgic-v3-switch.S</a></div><div class='hunk'>@@ -48,13 +48,11 @@</div><div class='ctx'> 	dsb	st</div><div class='ctx'> </div><div class='ctx'> 	// Save all interesting registers</div><div class='del'>-	mrs_s	x4, ICH_HCR_EL2</div><div class='ctx'> 	mrs_s	x5, ICH_VMCR_EL2</div><div class='ctx'> 	mrs_s	x6, ICH_MISR_EL2</div><div class='ctx'> 	mrs_s	x7, ICH_EISR_EL2</div><div class='ctx'> 	mrs_s	x8, ICH_ELSR_EL2</div><div class='ctx'> </div><div class='del'>-	str	w4, [x3, #VGIC_V3_CPU_HCR]</div><div class='ctx'> 	str	w5, [x3, #VGIC_V3_CPU_VMCR]</div><div class='ctx'> 	str	w6, [x3, #VGIC_V3_CPU_MISR]</div><div class='ctx'> 	str	w7, [x3, #VGIC_V3_CPU_EISR]</div><div class='head'>diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S<br/>index 2560e1e1562e..bdeb5d38c2dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/cache.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/cache.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/cache.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/cache.S</a></div><div class='hunk'>@@ -22,84 +22,11 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/alternative-asm.h&gt;</div><div class='add'>+#include &lt;asm/alternative.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "proc-macros.S"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- *	__flush_dcache_all()</div><div class='del'>- *</div><div class='del'>- *	Flush the whole D-cache.</div><div class='del'>- *</div><div class='del'>- *	Corrupted registers: x0-x7, x9-x11</div><div class='del'>- */</div><div class='del'>-__flush_dcache_all:</div><div class='del'>-	dmb	sy				// ensure ordering with previous memory accesses</div><div class='del'>-	mrs	x0, clidr_el1			// read clidr</div><div class='del'>-	and	x3, x0, #0x7000000		// extract loc from clidr</div><div class='del'>-	lsr	x3, x3, #23			// left align loc bit field</div><div class='del'>-	cbz	x3, finished			// if loc is 0, then no need to clean</div><div class='del'>-	mov	x10, #0				// start clean at cache level 0</div><div class='del'>-loop1:</div><div class='del'>-	add	x2, x10, x10, lsr #1		// work out 3x current cache level</div><div class='del'>-	lsr	x1, x0, x2			// extract cache type bits from clidr</div><div class='del'>-	and	x1, x1, #7			// mask of the bits for current cache only</div><div class='del'>-	cmp	x1, #2				// see what cache we have at this level</div><div class='del'>-	b.lt	skip				// skip if no cache, or just i-cache</div><div class='del'>-	save_and_disable_irqs x9		// make CSSELR and CCSIDR access atomic</div><div class='del'>-	msr	csselr_el1, x10			// select current cache level in csselr</div><div class='del'>-	isb					// isb to sych the new cssr&amp;csidr</div><div class='del'>-	mrs	x1, ccsidr_el1			// read the new ccsidr</div><div class='del'>-	restore_irqs x9</div><div class='del'>-	and	x2, x1, #7			// extract the length of the cache lines</div><div class='del'>-	add	x2, x2, #4			// add 4 (line length offset)</div><div class='del'>-	mov	x4, #0x3ff</div><div class='del'>-	and	x4, x4, x1, lsr #3		// find maximum number on the way size</div><div class='del'>-	clz	w5, w4				// find bit position of way size increment</div><div class='del'>-	mov	x7, #0x7fff</div><div class='del'>-	and	x7, x7, x1, lsr #13		// extract max number of the index size</div><div class='del'>-loop2:</div><div class='del'>-	mov	x9, x4				// create working copy of max way size</div><div class='del'>-loop3:</div><div class='del'>-	lsl	x6, x9, x5</div><div class='del'>-	orr	x11, x10, x6			// factor way and cache number into x11</div><div class='del'>-	lsl	x6, x7, x2</div><div class='del'>-	orr	x11, x11, x6			// factor index number into x11</div><div class='del'>-	dc	cisw, x11			// clean &amp; invalidate by set/way</div><div class='del'>-	subs	x9, x9, #1			// decrement the way</div><div class='del'>-	b.ge	loop3</div><div class='del'>-	subs	x7, x7, #1			// decrement the index</div><div class='del'>-	b.ge	loop2</div><div class='del'>-skip:</div><div class='del'>-	add	x10, x10, #2			// increment cache number</div><div class='del'>-	cmp	x3, x10</div><div class='del'>-	b.gt	loop1</div><div class='del'>-finished:</div><div class='del'>-	mov	x10, #0				// swith back to cache level 0</div><div class='del'>-	msr	csselr_el1, x10			// select current cache level in csselr</div><div class='del'>-	dsb	sy</div><div class='del'>-	isb</div><div class='del'>-	ret</div><div class='del'>-ENDPROC(__flush_dcache_all)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	flush_cache_all()</div><div class='del'>- *</div><div class='del'>- *	Flush the entire cache system.  The data cache flush is now achieved</div><div class='del'>- *	using atomic clean / invalidates working outwards from L1 cache. This</div><div class='del'>- *	is done using Set/Way based cache maintainance instructions.  The</div><div class='del'>- *	instruction cache can still be invalidated back to the point of</div><div class='del'>- *	unification in a single instruction.</div><div class='del'>- */</div><div class='del'>-ENTRY(flush_cache_all)</div><div class='del'>-	mov	x12, lr</div><div class='del'>-	bl	__flush_dcache_all</div><div class='del'>-	mov	x0, #0</div><div class='del'>-	ic	ialluis				// I+BTB cache invalidate</div><div class='del'>-	ret	x12</div><div class='del'>-ENDPROC(flush_cache_all)</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  *	flush_icache_range(start,end)</div><div class='ctx'>  *</div><div class='ctx'>  *	Ensure that the I and D caches are coherent within specified region.</div><div class='head'>diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c<br/>index baa758d37021..76c1e6cd36fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/context.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/context.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/context.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/context.c</a></div><div class='hunk'>@@ -92,6 +92,14 @@ static void reset_context(void *info)</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;active_mm;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * current-&gt;active_mm could be init_mm for the idle thread immediately</div><div class='add'>+	 * after secondary CPU boot or hotplug. TTBR0_EL1 is already set to</div><div class='add'>+	 * the reserved value, so no need to reset any context.</div><div class='add'>+	 */</div><div class='add'>+	if (mm == &amp;init_mm)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> 	asid = cpu_last_asid + cpu;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c<br/>index b0bd4e5fd5cf..d16a1cead23f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/dma-mapping.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/dma-mapping.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/dma-mapping.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/dma-mapping.c</a></div><div class='hunk'>@@ -414,6 +414,98 @@ out:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/********************************************</div><div class='add'>+ * The following APIs are for dummy DMA ops *</div><div class='add'>+ ********************************************/</div><div class='add'>+</div><div class='add'>+static void *__dummy_alloc(struct device *dev, size_t size,</div><div class='add'>+			   dma_addr_t *dma_handle, gfp_t flags,</div><div class='add'>+			   struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dummy_free(struct device *dev, size_t size,</div><div class='add'>+			 void *vaddr, dma_addr_t dma_handle,</div><div class='add'>+			 struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __dummy_mmap(struct device *dev,</div><div class='add'>+			struct vm_area_struct *vma,</div><div class='add'>+			void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+			struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return -ENXIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t __dummy_map_page(struct device *dev, struct page *page,</div><div class='add'>+				   unsigned long offset, size_t size,</div><div class='add'>+				   enum dma_data_direction dir,</div><div class='add'>+				   struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return DMA_ERROR_CODE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dummy_unmap_page(struct device *dev, dma_addr_t dev_addr,</div><div class='add'>+			       size_t size, enum dma_data_direction dir,</div><div class='add'>+			       struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __dummy_map_sg(struct device *dev, struct scatterlist *sgl,</div><div class='add'>+			  int nelems, enum dma_data_direction dir,</div><div class='add'>+			  struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dummy_unmap_sg(struct device *dev,</div><div class='add'>+			     struct scatterlist *sgl, int nelems,</div><div class='add'>+			     enum dma_data_direction dir,</div><div class='add'>+			     struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dummy_sync_single(struct device *dev,</div><div class='add'>+				dma_addr_t dev_addr, size_t size,</div><div class='add'>+				enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dummy_sync_sg(struct device *dev,</div><div class='add'>+			    struct scatterlist *sgl, int nelems,</div><div class='add'>+			    enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __dummy_mapping_error(struct device *hwdev, dma_addr_t dma_addr)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __dummy_dma_supported(struct device *hwdev, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct dma_map_ops dummy_dma_ops = {</div><div class='add'>+	.alloc                  = __dummy_alloc,</div><div class='add'>+	.free                   = __dummy_free,</div><div class='add'>+	.mmap                   = __dummy_mmap,</div><div class='add'>+	.map_page               = __dummy_map_page,</div><div class='add'>+	.unmap_page             = __dummy_unmap_page,</div><div class='add'>+	.map_sg                 = __dummy_map_sg,</div><div class='add'>+	.unmap_sg               = __dummy_unmap_sg,</div><div class='add'>+	.sync_single_for_cpu    = __dummy_sync_single,</div><div class='add'>+	.sync_single_for_device = __dummy_sync_single,</div><div class='add'>+	.sync_sg_for_cpu        = __dummy_sync_sg,</div><div class='add'>+	.sync_sg_for_device     = __dummy_sync_sg,</div><div class='add'>+	.mapping_error          = __dummy_mapping_error,</div><div class='add'>+	.dma_supported          = __dummy_dma_supported,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(dummy_dma_ops);</div><div class='add'>+</div><div class='ctx'> static int __init arm64_dma_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c<br/>index 96da13167d4a..94d98cd1aad8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/fault.c</a></div><div class='hunk'>@@ -115,8 +115,7 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr,</div><div class='ctx'> {</div><div class='ctx'> 	struct siginfo si;</div><div class='ctx'> </div><div class='del'>-	if (show_unhandled_signals &amp;&amp; unhandled_signal(tsk, sig) &amp;&amp;</div><div class='del'>-	    printk_ratelimit()) {</div><div class='add'>+	if (unhandled_signal(tsk, sig) &amp;&amp; show_unhandled_signals_ratelimited()) {</div><div class='ctx'> 		pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x\n",</div><div class='ctx'> 			tsk-&gt;comm, task_pid_nr(tsk), fault_name(esr), sig,</div><div class='ctx'> 			addr, esr);</div><div class='hunk'>@@ -211,7 +210,7 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,</div><div class='ctx'> 	 * If we're in an interrupt or have no user context, we must not take</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='hunk'>@@ -478,12 +477,19 @@ asmlinkage void __exception do_sp_pc_abort(unsigned long addr,</div><div class='ctx'> 					   struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct siginfo info;</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+</div><div class='add'>+	if (show_unhandled_signals &amp;&amp; unhandled_signal(tsk, SIGBUS))</div><div class='add'>+		pr_info_ratelimited("%s[%d]: %s exception: pc=%p sp=%p\n",</div><div class='add'>+				    tsk-&gt;comm, task_pid_nr(tsk),</div><div class='add'>+				    esr_get_class_string(esr), (void *)regs-&gt;pc,</div><div class='add'>+				    (void *)regs-&gt;sp);</div><div class='ctx'> </div><div class='ctx'> 	info.si_signo = SIGBUS;</div><div class='ctx'> 	info.si_errno = 0;</div><div class='ctx'> 	info.si_code  = BUS_ADRALN;</div><div class='ctx'> 	info.si_addr  = (void __user *)addr;</div><div class='del'>-	arm64_notify_die("", regs, &amp;info, esr);</div><div class='add'>+	arm64_notify_die("Oops - SP/PC alignment exception", regs, &amp;info, esr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct fault_info debug_fault_info[] = {</div><div class='head'>diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c<br/>index b6f14e8d2121..4dfa3975ce5b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/flush.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/flush.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/flush.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/flush.c</a></div><div class='hunk'>@@ -102,7 +102,6 @@ EXPORT_SYMBOL(flush_dcache_page);</div><div class='ctx'> /*</div><div class='ctx'>  * Additional functions defined in assembly.</div><div class='ctx'>  */</div><div class='del'>-EXPORT_SYMBOL(flush_cache_all);</div><div class='ctx'> EXPORT_SYMBOL(flush_icache_range);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='head'>diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c<br/>index 2de9d2e59d96..831ec534d449 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -31,22 +31,15 @@</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_ARCH_WANT_HUGE_PMD_SHARE</div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> int pmd_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return !(pmd_val(pmd) &amp; PMD_TABLE_BIT);</div><div class='add'>+	return pmd_val(pmd) &amp;&amp; !(pmd_val(pmd) &amp; PMD_TABLE_BIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pud_huge(pud_t pud)</div><div class='ctx'> {</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='del'>-	return !(pud_val(pud) &amp; PUD_TABLE_BIT);</div><div class='add'>+	return pud_val(pud) &amp;&amp; !(pud_val(pud) &amp; PUD_TABLE_BIT);</div><div class='ctx'> #else</div><div class='ctx'> 	return 0;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c<br/>index 597831bdddf3..ad87ce826cce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/init.c</a></div><div class='hunk'>@@ -262,7 +262,7 @@ static void __init free_unused_memmap(void)</div><div class='ctx'> 		 * memmap entries are valid from the bank end aligned to</div><div class='ctx'> 		 * MAX_ORDER_NR_PAGES.</div><div class='ctx'> 		 */</div><div class='del'>-		prev_end = ALIGN(start + __phys_to_pfn(reg-&gt;size),</div><div class='add'>+		prev_end = ALIGN(__phys_to_pfn(reg-&gt;base + reg-&gt;size),</div><div class='ctx'> 				 MAX_ORDER_NR_PAGES);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c<br/>index 5b8b664422d3..a4ede4e2ddd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/mmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/mmu.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/libfdt.h&gt;</div><div class='ctx'> #include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;linux/nodemask.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='hunk'>@@ -116,7 +117,7 @@ void split_pud(pud_t *old_pud, pmd_t *pmd)</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		set_pmd(pmd, __pmd(addr | prot));</div><div class='add'>+		set_pmd(pmd, __pmd(addr | pgprot_val(prot)));</div><div class='ctx'> 		addr += PMD_SIZE;</div><div class='ctx'> 	} while (pmd++, i++, i &lt; PTRS_PER_PMD);</div><div class='ctx'> }</div><div class='hunk'>@@ -643,3 +644,68 @@ void __set_fixmap(enum fixed_addresses idx,</div><div class='ctx'> 		flush_tlb_kernel_range(addr, addr+PAGE_SIZE);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void *__init fixmap_remap_fdt(phys_addr_t dt_phys)</div><div class='add'>+{</div><div class='add'>+	const u64 dt_virt_base = __fix_to_virt(FIX_FDT);</div><div class='add'>+	pgprot_t prot = PAGE_KERNEL | PTE_RDONLY;</div><div class='add'>+	int granularity, size, offset;</div><div class='add'>+	void *dt_virt;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check whether the physical FDT address is set and meets the minimum</div><div class='add'>+	 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be</div><div class='add'>+	 * at least 8 bytes so that we can always access the size field of the</div><div class='add'>+	 * FDT header after mapping the first chunk, double check here if that</div><div class='add'>+	 * is indeed the case.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(MIN_FDT_ALIGN &lt; 8);</div><div class='add'>+	if (!dt_phys || dt_phys % MIN_FDT_ALIGN)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure that the FDT region can be mapped without the need to</div><div class='add'>+	 * allocate additional translation table pages, so that it is safe</div><div class='add'>+	 * to call create_mapping() this early.</div><div class='add'>+	 *</div><div class='add'>+	 * On 64k pages, the FDT will be mapped using PTEs, so we need to</div><div class='add'>+	 * be in the same PMD as the rest of the fixmap.</div><div class='add'>+	 * On 4k pages, we'll use section mappings for the FDT so we only</div><div class='add'>+	 * have to be in the same PUD.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(dt_virt_base % SZ_2M);</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARM64_64K_PAGES)) {</div><div class='add'>+		BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) &gt;&gt; PMD_SHIFT !=</div><div class='add'>+			     __fix_to_virt(FIX_BTMAP_BEGIN) &gt;&gt; PMD_SHIFT);</div><div class='add'>+</div><div class='add'>+		granularity = PAGE_SIZE;</div><div class='add'>+	} else {</div><div class='add'>+		BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) &gt;&gt; PUD_SHIFT !=</div><div class='add'>+			     __fix_to_virt(FIX_BTMAP_BEGIN) &gt;&gt; PUD_SHIFT);</div><div class='add'>+</div><div class='add'>+		granularity = PMD_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = dt_phys % granularity;</div><div class='add'>+	dt_virt = (void *)dt_virt_base + offset;</div><div class='add'>+</div><div class='add'>+	/* map the first chunk so we can read the size from the header */</div><div class='add'>+	create_mapping(round_down(dt_phys, granularity), dt_virt_base,</div><div class='add'>+		       granularity, prot);</div><div class='add'>+</div><div class='add'>+	if (fdt_check_header(dt_virt) != 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	size = fdt_totalsize(dt_virt);</div><div class='add'>+	if (size &gt; MAX_FDT_SIZE)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (offset + size &gt; granularity)</div><div class='add'>+		create_mapping(round_down(dt_phys, granularity), dt_virt_base,</div><div class='add'>+			       round_up(offset + size, granularity), prot);</div><div class='add'>+</div><div class='add'>+	memblock_reserve(dt_phys, size);</div><div class='add'>+</div><div class='add'>+	return dt_virt;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S<br/>index cdd754e19b9b..39139a3aa16d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/mm/proc.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/mm/proc.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/mm/proc.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/mm/proc.S</a></div><div class='hunk'>@@ -46,52 +46,6 @@</div><div class='ctx'> #define MAIR(attr, mt)	((attr) &lt;&lt; ((mt) * 8))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- *	cpu_cache_off()</div><div class='del'>- *</div><div class='del'>- *	Turn the CPU D-cache off.</div><div class='del'>- */</div><div class='del'>-ENTRY(cpu_cache_off)</div><div class='del'>-	mrs	x0, sctlr_el1</div><div class='del'>-	bic	x0, x0, #1 &lt;&lt; 2			// clear SCTLR.C</div><div class='del'>-	msr	sctlr_el1, x0</div><div class='del'>-	isb</div><div class='del'>-	ret</div><div class='del'>-ENDPROC(cpu_cache_off)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	cpu_reset(loc)</div><div class='del'>- *</div><div class='del'>- *	Perform a soft reset of the system.  Put the CPU into the same state</div><div class='del'>- *	as it would be if it had been reset, and branch to what would be the</div><div class='del'>- *	reset vector. It must be executed with the flat identity mapping.</div><div class='del'>- *</div><div class='del'>- *	- loc   - location to jump to for soft reset</div><div class='del'>- */</div><div class='del'>-	.align	5</div><div class='del'>-ENTRY(cpu_reset)</div><div class='del'>-	mrs	x1, sctlr_el1</div><div class='del'>-	bic	x1, x1, #1</div><div class='del'>-	msr	sctlr_el1, x1			// disable the MMU</div><div class='del'>-	isb</div><div class='del'>-	ret	x0</div><div class='del'>-ENDPROC(cpu_reset)</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_soft_restart)</div><div class='del'>-	/* Save address of cpu_reset() and reset address */</div><div class='del'>-	mov	x19, x0</div><div class='del'>-	mov	x20, x1</div><div class='del'>-</div><div class='del'>-	/* Turn D-cache off */</div><div class='del'>-	bl	cpu_cache_off</div><div class='del'>-</div><div class='del'>-	/* Push out all dirty data, and ensure cache is empty */</div><div class='del'>-	bl	flush_cache_all</div><div class='del'>-</div><div class='del'>-	mov	x0, x20</div><div class='del'>-	ret	x19</div><div class='del'>-ENDPROC(cpu_soft_restart)</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  *	cpu_do_idle()</div><div class='ctx'>  *</div><div class='ctx'>  *	Idle the processor (wait for interrupt).</div><div class='head'>diff --git a/arch/arm64/net/bpf_jit.h b/arch/arm64/net/bpf_jit.h<br/>index de0a81a539a0..98a26ce82d26 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/net/bpf_jit.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/net/bpf_jit.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/net/bpf_jit.h</a></div><div class='hunk'>@@ -110,6 +110,10 @@</div><div class='ctx'> /* Rd = Rn &gt;&gt; shift; signed */</div><div class='ctx'> #define A64_ASR(sf, Rd, Rn, shift) A64_SBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31)</div><div class='ctx'> </div><div class='add'>+/* Zero extend */</div><div class='add'>+#define A64_UXTH(sf, Rd, Rn) A64_UBFM(sf, Rd, Rn, 0, 15)</div><div class='add'>+#define A64_UXTW(sf, Rd, Rn) A64_UBFM(sf, Rd, Rn, 0, 31)</div><div class='add'>+</div><div class='ctx'> /* Move wide (immediate) */</div><div class='ctx'> #define A64_MOVEW(sf, Rd, imm16, shift, type) \</div><div class='ctx'> 	aarch64_insn_gen_movewide(Rd, imm16, shift, \</div><div class='head'>diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c<br/>index dc6a4842683a..c047598b09e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm64/net/bpf_jit_comp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/arm64/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm64/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/arm64/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -113,9 +113,9 @@ static inline void emit_a64_mov_i(const int is64, const int reg,</div><div class='ctx'> static inline int bpf2a64_offset(int bpf_to, int bpf_from,</div><div class='ctx'> 				 const struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	int to = ctx-&gt;offset[bpf_to + 1];</div><div class='add'>+	int to = ctx-&gt;offset[bpf_to];</div><div class='ctx'> 	/* -1 to account for the Branch instruction */</div><div class='del'>-	int from = ctx-&gt;offset[bpf_from + 1] - 1;</div><div class='add'>+	int from = ctx-&gt;offset[bpf_from] - 1;</div><div class='ctx'> </div><div class='ctx'> 	return to - from;</div><div class='ctx'> }</div><div class='hunk'>@@ -289,23 +289,41 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> 	case BPF_ALU | BPF_END | BPF_FROM_BE:</div><div class='ctx'> #ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='ctx'> 		if (BPF_SRC(code) == BPF_FROM_BE)</div><div class='del'>-			break;</div><div class='add'>+			goto emit_bswap_uxt;</div><div class='ctx'> #else /* !CONFIG_CPU_BIG_ENDIAN */</div><div class='ctx'> 		if (BPF_SRC(code) == BPF_FROM_LE)</div><div class='del'>-			break;</div><div class='add'>+			goto emit_bswap_uxt;</div><div class='ctx'> #endif</div><div class='ctx'> 		switch (imm) {</div><div class='ctx'> 		case 16:</div><div class='ctx'> 			emit(A64_REV16(is64, dst, dst), ctx);</div><div class='add'>+			/* zero-extend 16 bits into 64 bits */</div><div class='add'>+			emit(A64_UXTH(is64, dst, dst), ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 32:</div><div class='ctx'> 			emit(A64_REV32(is64, dst, dst), ctx);</div><div class='add'>+			/* upper 32 bits already cleared */</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 64:</div><div class='ctx'> 			emit(A64_REV64(dst, dst), ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+emit_bswap_uxt:</div><div class='add'>+		switch (imm) {</div><div class='add'>+		case 16:</div><div class='add'>+			/* zero-extend 16 bits into 64 bits */</div><div class='add'>+			emit(A64_UXTH(is64, dst, dst), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case 32:</div><div class='add'>+			/* zero-extend 32 bits into 64 bits */</div><div class='add'>+			emit(A64_UXTW(is64, dst, dst), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case 64:</div><div class='add'>+			/* nop */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	/* dst = imm */</div><div class='ctx'> 	case BPF_ALU | BPF_MOV | BPF_K:</div><div class='ctx'> 	case BPF_ALU64 | BPF_MOV | BPF_K:</div><div class='hunk'>@@ -640,10 +658,11 @@ static int build_body(struct jit_ctx *ctx)</div><div class='ctx'> 		const struct bpf_insn *insn = &amp;prog-&gt;insnsi[i];</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='add'>+		ret = build_insn(insn, ctx);</div><div class='add'>+</div><div class='ctx'> 		if (ctx-&gt;image == NULL)</div><div class='ctx'> 			ctx-&gt;offset[i] = ctx-&gt;idx;</div><div class='ctx'> </div><div class='del'>-		ret = build_insn(insn, ctx);</div><div class='ctx'> 		if (ret &gt; 0) {</div><div class='ctx'> 			i++;</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild<br/>index 528d70d47a54..f61f2dd67464 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/Kbuild</a></div><div class='hunk'>@@ -12,10 +12,10 @@ generic-y += irq_work.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += param.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += topology.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/avr32/include/asm/cmpxchg.h b/arch/avr32/include/asm/cmpxchg.h<br/>index 962a6aeab787..366bbeaeb405 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -70,8 +70,6 @@ extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(</div><div class='ctx'>    if something tries to do an invalid cmpxchg().  */</div><div class='ctx'> extern void __cmpxchg_called_with_bad_pointer(void);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,</div><div class='ctx'> 				      unsigned long new, int size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h<br/>index b3d18f9f3e8d..ae7ac9205d20 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -209,17 +209,18 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,</div><div class='ctx'>  * the same here.</div><div class='ctx'>  */</div><div class='ctx'> static inline int</div><div class='del'>-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,</div><div class='ctx'> 	   enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++) {</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='ctx'> 		char *virt;</div><div class='ctx'> </div><div class='del'>-		sg[i].dma_address = page_to_bus(sg_page(&amp;sg[i])) + sg[i].offset;</div><div class='del'>-		virt = sg_virt(&amp;sg[i]);</div><div class='del'>-		dma_cache_sync(dev, virt, sg[i].length, direction);</div><div class='add'>+		sg-&gt;dma_address = page_to_bus(sg_page(sg)) + sg-&gt;offset;</div><div class='add'>+		virt = sg_virt(sg);</div><div class='add'>+		dma_cache_sync(dev, virt, sg-&gt;length, direction);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return nents;</div><div class='hunk'>@@ -321,14 +322,14 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,</div><div class='add'>+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,</div><div class='ctx'> 		       int nents, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++) {</div><div class='del'>-		dma_cache_sync(dev, sg_virt(&amp;sg[i]), sg[i].length, direction);</div><div class='del'>-	}</div><div class='add'>+	for_each_sg(sglist, sg, nents, i)</div><div class='add'>+		dma_cache_sync(dev, sg_virt(sg), sg-&gt;length, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Now for the API extensions over the pci_ one */</div><div class='head'>diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h<br/>index 4f5ec2bb7172..e998ff5d8e1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/io.h</a></div><div class='hunk'>@@ -296,6 +296,7 @@ extern void __iounmap(void __iomem *addr);</div><div class='ctx'> 	__iounmap(addr)</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc ioremap_nocache</div><div class='add'>+#define ioremap_wt ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> #define cached(addr) P1SEGADDR(addr)</div><div class='ctx'> #define uncached(addr) P2SEGADDR(addr)</div><div class='head'>diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h<br/>index a46f7cf3e1ea..68cf638faf48 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/include/asm/uaccess.h</a></div><div class='hunk'>@@ -97,7 +97,8 @@ static inline __kernel_size_t __copy_from_user(void *to,</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -116,7 +117,8 @@ static inline __kernel_size_t __copy_from_user(void *to,</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -136,7 +138,8 @@ static inline __kernel_size_t __copy_from_user(void *to,</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -158,7 +161,8 @@ static inline __kernel_size_t __copy_from_user(void *to,</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='head'>diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c<br/>index cfb298d66305..2d48b6a46166 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/mach-at32ap/extint.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/mach-at32ap/extint.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/mach-at32ap/extint.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/mach-at32ap/extint.c</a></div><div class='hunk'>@@ -231,8 +231,7 @@ static int __init eic_probe(struct platform_device *pdev)</div><div class='ctx'> 		irq_set_chip_data(eic-&gt;first_irq + i, eic);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_set_chained_handler(int_irq, demux_eic_irq);</div><div class='del'>-	irq_set_handler_data(int_irq, eic);</div><div class='add'>+	irq_set_chained_handler_and_data(int_irq, demux_eic_irq, eic);</div><div class='ctx'> </div><div class='ctx'> 	if (pdev-&gt;id == 0) {</div><div class='ctx'> 		nmi_eic = eic;</div><div class='head'>diff --git a/arch/avr32/mm/fault.c b/arch/avr32/mm/fault.c<br/>index d223a8b57c1e..c03533937a9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/avr32/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/avr32/mm/fault.c</a></div><div class='hunk'>@@ -14,11 +14,11 @@</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KPROBES</div><div class='ctx'> static inline int notify_page_fault(struct pt_regs *regs, int trap)</div><div class='hunk'>@@ -81,7 +81,7 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)</div><div class='ctx'> 	 * If we're in an interrupt or have no user context, we must</div><div class='ctx'> 	 * not take the fault...</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm || regs-&gt;sr &amp; SYSREG_BIT(GM))</div><div class='add'>+	if (faulthandler_disabled() || !mm || regs-&gt;sr &amp; SYSREG_BIT(GM))</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_enable();</div><div class='head'>diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild<br/>index 4bd3c3cfc9ab..61cd1e786a14 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/blackfin/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/Kbuild</a></div><div class='hunk'>@@ -21,6 +21,7 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += mutex.h</div><div class='hunk'>@@ -29,7 +30,6 @@ generic-y += percpu.h</div><div class='ctx'> generic-y += pgalloc.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += serial.h</div><div class='ctx'> generic-y += setup.h</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h<br/>index d00d732784b1..b550ada7321b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/blackfin/include/asm/bfin_serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/bfin_serial.h</a></div><div class='hunk'>@@ -22,9 +22,9 @@</div><div class='ctx'>     defined(CONFIG_BFIN_UART2_CTSRTS) || \</div><div class='ctx'>     defined(CONFIG_BFIN_UART3_CTSRTS)</div><div class='ctx'> # if defined(BFIN_UART_BF54X_STYLE) || defined(BFIN_UART_BF60X_STYLE)</div><div class='del'>-#  define CONFIG_SERIAL_BFIN_HARD_CTSRTS</div><div class='add'>+#  define SERIAL_BFIN_HARD_CTSRTS</div><div class='ctx'> # else</div><div class='del'>-#  define CONFIG_SERIAL_BFIN_CTSRTS</div><div class='add'>+#  define SERIAL_BFIN_CTSRTS</div><div class='ctx'> # endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -50,8 +50,8 @@ struct bfin_serial_port {</div><div class='ctx'> #elif ANOMALY_05000363</div><div class='ctx'> 	unsigned int anomaly_threshold;</div><div class='ctx'> #endif</div><div class='del'>-#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \</div><div class='del'>-	defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)</div><div class='add'>+#if defined(SERIAL_BFIN_CTSRTS) || \</div><div class='add'>+	defined(SERIAL_BFIN_HARD_CTSRTS)</div><div class='ctx'> 	int cts_pin;</div><div class='ctx'> 	int rts_pin;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h<br/>index c737909fba47..14efc0db1ade 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/blackfin/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/include/asm/pci.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #ifndef _ASM_BFIN_PCI_H</div><div class='ctx'> #define _ASM_BFIN_PCI_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c<br/>index c36efa0c7163..719dd796c12c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/trace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/blackfin/kernel/trace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/blackfin/kernel/trace.c</a></div><div class='hunk'>@@ -136,7 +136,7 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> 				struct file *file = vma-&gt;vm_file;</div><div class='ctx'> </div><div class='ctx'> 				if (file) {</div><div class='del'>-					char *d_name = d_path(&amp;file-&gt;f_path, _tmpbuf,</div><div class='add'>+					char *d_name = file_path(file, _tmpbuf,</div><div class='ctx'> 						      sizeof(_tmpbuf));</div><div class='ctx'> 					if (!IS_ERR(d_name))</div><div class='ctx'> 						name = d_name;</div><div class='head'>diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild<br/>index ae0a51f5376c..f17c4dc6050c 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/c6x/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/c6x/include/asm/Kbuild</a></div><div class='hunk'>@@ -26,6 +26,7 @@ generic-y += kdebug.h</div><div class='ctx'> generic-y += kmap_types.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += mmu.h</div><div class='ctx'> generic-y += mmu_context.h</div><div class='hunk'>@@ -38,7 +39,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += serial.h</div><div class='head'>diff --git a/arch/cris/arch-v10/drivers/eeprom.c b/arch/cris/arch-v10/drivers/eeprom.c<br/>index 5047a33043bd..f679a19dfeb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/drivers/eeprom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/arch-v10/drivers/eeprom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/drivers/eeprom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v10/drivers/eeprom.c</a></div><div class='hunk'>@@ -848,5 +848,4 @@ static void eeprom_disable_write_protect(void)</div><div class='ctx'>     /* Write protect disabled */</div><div class='ctx'>   }</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(eeprom_init);</div><div class='add'>+device_initcall(eeprom_init);</div><div class='head'>diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c<br/>index 4dda9bd6b8fb..e989cee77414 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/drivers/sync_serial.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/arch-v32/drivers/sync_serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/drivers/sync_serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v32/drivers/sync_serial.c</a></div><div class='hunk'>@@ -1464,7 +1464,7 @@ static inline void handle_rx_packet(struct sync_port *port)</div><div class='ctx'> 		if (port-&gt;write_ts_idx == NBR_IN_DESCR)</div><div class='ctx'> 			port-&gt;write_ts_idx = 0;</div><div class='ctx'> 		idx = port-&gt;write_ts_idx++;</div><div class='del'>-		do_posix_clock_monotonic_gettime(&amp;port-&gt;timestamp[idx]);</div><div class='add'>+		ktime_get_ts(&amp;port-&gt;timestamp[idx]);</div><div class='ctx'> 		port-&gt;in_buffer_len += port-&gt;inbufchunk;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;port-&gt;lock, flags);</div><div class='head'>diff --git a/arch/cris/arch-v32/mm/intmem.c b/arch/cris/arch-v32/mm/intmem.c<br/>index 1b17d92cef8e..9ef56092a4c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/mm/intmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/arch-v32/mm/intmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/mm/intmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/arch-v32/mm/intmem.c</a></div><div class='hunk'>@@ -145,6 +145,5 @@ unsigned long crisv32_intmem_virt_to_phys(void* addr)</div><div class='ctx'> 		(unsigned long)intmem_virtual + MEM_INTMEM_START +</div><div class='ctx'> 		RESERVED_SIZE);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(crisv32_intmem_init);</div><div class='add'>+device_initcall(crisv32_intmem_init);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild<br/>index 057e51859b0a..ad2244f35bca 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/Kbuild</a></div><div class='hunk'>@@ -18,10 +18,10 @@ generic-y += linkage.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += topology.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/cris/include/asm/dma-mapping.h b/arch/cris/include/asm/dma-mapping.h<br/>index 2f0f654f1b44..57f794ee6039 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)</div><div class='ctx'> #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)</div><div class='head'>diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h<br/>index cc2399c175e9..c15b4b4baafa 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/include/asm/pci.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@ int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c<br/>index 83f12f2ed9e3..3066d40a6db1 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/cris/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/cris/mm/fault.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;arch/system.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern int find_fixup_code(struct pt_regs *);</div><div class='hunk'>@@ -109,11 +109,11 @@ do_page_fault(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 	info.si_code = SEGV_MAPERR;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If we're in an interrupt or "atomic" operation or have no</div><div class='add'>+	 * If we're in an interrupt, have pagefaults disabled or have no</div><div class='ctx'> 	 * user context, we must not take the fault.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild<br/>index e3f81b53578e..8e47b832cc76 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/Kbuild</a></div><div class='hunk'>@@ -4,6 +4,6 @@ generic-y += cputime.h</div><div class='ctx'> generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h<br/>index 1746a2b8e6e7..2840adcd6d92 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -2,9 +2,9 @@</div><div class='ctx'> #define _ASM_DMA_MAPPING_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/frv/include/asm/io.h b/arch/frv/include/asm/io.h<br/>index 0b78bc89e840..a31b63ec4930 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/io.h</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#define ARCH_HAS_IOREMAP_WT</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;asm/virtconvert.h&gt;</div><div class='ctx'> #include &lt;asm/string.h&gt;</div><div class='hunk'>@@ -265,7 +267,7 @@ static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned lon</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size)</div><div class='add'>+static inline void __iomem *ioremap_wt(unsigned long physaddr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h<br/>index 2035a4d3f9b9..e43d22c58ad5 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/pci.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #define _ASM_FRV_PCI_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -41,16 +41,6 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,</div><div class='ctx'> /* Return the index of the PCI controller for device PDEV. */</div><div class='ctx'> #define pci_controller_num(PDEV)	(0)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  *	These are pretty much arbitrary with the CoMEM implementation.</div><div class='ctx'>  *	We have the whole address space to ourselves.</div><div class='head'>diff --git a/arch/frv/include/asm/sections.h b/arch/frv/include/asm/sections.h<br/>index 17d0fb171bba..d03fb64e93e9 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/sections.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/include/asm/sections.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/sections.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/include/asm/sections.h</a></div><div class='hunk'>@@ -35,12 +35,6 @@ extern unsigned long __nongprelbss memory_start;</div><div class='ctx'> extern unsigned long __nongprelbss memory_end;</div><div class='ctx'> extern unsigned long __nongprelbss rom_length;</div><div class='ctx'> </div><div class='del'>-/* determine if we're running from ROM */</div><div class='del'>-static inline int is_in_rom(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return 0; /* default case: not in ROM */</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* _ASM_SECTIONS_H */</div><div class='head'>diff --git a/arch/frv/mb93090-mb00/flash.c b/arch/frv/mb93090-mb00/flash.c<br/>index c0e3707c2299..e1cf802d1639 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/flash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/mb93090-mb00/flash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/flash.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'>  * 2 of the Licence, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='head'>diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c<br/>index b99c2a7cc7a4..8eeea0d77aad 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/pci-dma-nommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/mb93090-mb00/pci-dma-nommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/pci-dma-nommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/pci-dma-nommu.c</a></div><div class='hunk'>@@ -119,14 +119,16 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(dma_map_single);</div><div class='ctx'> </div><div class='del'>-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,</div><div class='ctx'> 	       enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i=0; i&lt;nents; i++)</div><div class='del'>-		frv_cache_wback_inv(sg_dma_address(&amp;sg[i]),</div><div class='del'>-				    sg_dma_address(&amp;sg[i]) + sg_dma_len(&amp;sg[i]));</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='add'>+		frv_cache_wback_inv(sg_dma_address(sg),</div><div class='add'>+				    sg_dma_address(sg) + sg_dma_len(sg));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(direction == DMA_NONE);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c<br/>index 82478979ac9a..4d1f01dc46e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/pci-dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/mb93090-mb00/pci-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/mb93090-mb00/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mb93090-mb00/pci-dma.c</a></div><div class='hunk'>@@ -50,19 +50,20 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(dma_map_single);</div><div class='ctx'> </div><div class='del'>-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,</div><div class='ctx'> 	       enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long dampr2;</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(direction == DMA_NONE);</div><div class='ctx'> </div><div class='ctx'> 	dampr2 = __get_DAMPR(2);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++) {</div><div class='del'>-		vaddr = kmap_atomic_primary(sg_page(&amp;sg[i]));</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='add'>+		vaddr = kmap_atomic_primary(sg_page(sg));</div><div class='ctx'> </div><div class='ctx'> 		frv_dcache_writeback((unsigned long) vaddr,</div><div class='ctx'> 				     (unsigned long) vaddr + PAGE_SIZE);</div><div class='head'>diff --git a/arch/frv/mm/fault.c b/arch/frv/mm/fault.c<br/>index ec4917ddf678..61d99767fe16 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mm/fault.c</a></div><div class='hunk'>@@ -19,9 +19,9 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/gdb-stub.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************/</div><div class='hunk'>@@ -78,7 +78,7 @@ asmlinkage void do_page_fault(int datammu, unsigned long esr0, unsigned long ear</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(__frame))</div><div class='head'>diff --git a/arch/frv/mm/highmem.c b/arch/frv/mm/highmem.c<br/>index bed9a9bd3c10..785344bbdc07 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/frv/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/frv/mm/highmem.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	unsigned long paddr;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	type = kmap_atomic_idx_push();</div><div class='ctx'> 	paddr = page_to_phys(page);</div><div class='hunk'>@@ -85,5 +86,6 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> 	}</div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='head'>diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig<br/>new file mode 100644<br/>index 000000000000..db589167838c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+config H8300</div><div class='add'>+        def_bool y</div><div class='add'>+	select GENERIC_ATOMIC64</div><div class='add'>+	select HAVE_UID16</div><div class='add'>+	select VIRT_TO_BUS</div><div class='add'>+	select GENERIC_IRQ_SHOW</div><div class='add'>+	select FRAME_POINTER</div><div class='add'>+	select GENERIC_CPU_DEVICES</div><div class='add'>+	select MODULES_USE_ELF_RELA</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select CLKDEV_LOOKUP</div><div class='add'>+	select COMMON_CLK</div><div class='add'>+	select ARCH_WANT_FRAME_POINTERS</div><div class='add'>+	select OF</div><div class='add'>+	select OF_IRQ</div><div class='add'>+	select OF_EARLY_FLATTREE</div><div class='add'>+	select HAVE_MEMBLOCK</div><div class='add'>+	select HAVE_DMA_ATTRS</div><div class='add'>+</div><div class='add'>+config RWSEM_GENERIC_SPINLOCK</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='add'>+config GENERIC_HWEIGHT</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='add'>+config NO_IOPORT_MAP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='add'>+config GENERIC_CSUM</div><div class='add'>+        def_bool y</div><div class='add'>+</div><div class='add'>+config HZ</div><div class='add'>+	int</div><div class='add'>+	default 100</div><div class='add'>+</div><div class='add'>+config NR_CPUS</div><div class='add'>+	int</div><div class='add'>+	default 1</div><div class='add'>+</div><div class='add'>+source "init/Kconfig"</div><div class='add'>+</div><div class='add'>+source "kernel/Kconfig.freezer"</div><div class='add'>+</div><div class='add'>+source "arch/h8300/Kconfig.cpu"</div><div class='add'>+</div><div class='add'>+menu "Kernel Features"</div><div class='add'>+</div><div class='add'>+source "kernel/Kconfig.preempt"</div><div class='add'>+</div><div class='add'>+source "mm/Kconfig"</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+menu "Executable file formats"</div><div class='add'>+</div><div class='add'>+source "fs/Kconfig.binfmt"</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+source "net/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/Kconfig"</div><div class='add'>+</div><div class='add'>+source "fs/Kconfig"</div><div class='add'>+</div><div class='add'>+menu "Kernel hacking"</div><div class='add'>+</div><div class='add'>+source "lib/Kconfig.debug"</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+source "security/Kconfig"</div><div class='add'>+</div><div class='add'>+source "crypto/Kconfig"</div><div class='add'>+</div><div class='add'>+source "lib/Kconfig"</div><div class='head'>diff --git a/arch/h8300/Kconfig.cpu b/arch/h8300/Kconfig.cpu<br/>new file mode 100644<br/>index 000000000000..8d0ff20c749a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/Kconfig.cpu?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Kconfig.cpu</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+config CPU_H8300H</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config CPU_H8S</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config H83069</div><div class='add'>+	bool</div><div class='add'>+	select CPU_H8300H</div><div class='add'>+	select H8300_TMR16</div><div class='add'>+	select RENESAS_H8300H_INTC</div><div class='add'>+</div><div class='add'>+config H8S2678</div><div class='add'>+	bool</div><div class='add'>+	select CPU_H8S</div><div class='add'>+	select H8300_TPU</div><div class='add'>+	select RENESAS_H8S_INTC</div><div class='add'>+</div><div class='add'>+config RAMKERNEL</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config ROMKERNEL</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+menu "Processor type and features"</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+prompt "H8/300 platform"</div><div class='add'>+</div><div class='add'>+config H8300_AE3068</div><div class='add'>+	bool "AE-3068/69"</div><div class='add'>+	select H83069</div><div class='add'>+	select RAMKERNEL</div><div class='add'>+	help</div><div class='add'>+	  AKI-H8/3068F / AKI-H8/3069F Flashmicom LAN Board Support</div><div class='add'>+	  More Information. (Japanese Only)</div><div class='add'>+	  &lt;http://akizukidenshi.com/catalog/default.aspx&gt;</div><div class='add'>+	  AE-3068/69 Evaluation Board Support</div><div class='add'>+	  More Information.</div><div class='add'>+	  &lt;http://www.microtronique.com/ae3069lan.htm&gt;</div><div class='add'>+</div><div class='add'>+config H8300_H8MAX</div><div class='add'>+	bool "H8MAX"</div><div class='add'>+	select H83069</div><div class='add'>+	select RAMKERNEL</div><div class='add'>+	select HAVE_IDE</div><div class='add'>+	help</div><div class='add'>+	  H8MAX Evaluation Board Support</div><div class='add'>+	  More Information. (Japanese Only)</div><div class='add'>+	  &lt;http://strawberry-linux.com/h8/index.html&gt;</div><div class='add'>+</div><div class='add'>+config H8300_KANEBEBE</div><div class='add'>+	bool "KaneBebe"</div><div class='add'>+	select H83069</div><div class='add'>+	select RAMKERNEL</div><div class='add'>+	help</div><div class='add'>+	  KaneBebe Evalition Board Support</div><div class='add'>+	  More Information. (Japanese Only)</div><div class='add'>+	  &lt;http://www.nissin-tech.com/2009/10/uclinuxkane-bebe-h83069f.html&gt;</div><div class='add'>+</div><div class='add'>+config H8300H_SIM</div><div class='add'>+	bool "H8/300H GDB Simulator"</div><div class='add'>+	select H83069</div><div class='add'>+	select ROMKERNEL</div><div class='add'>+	help</div><div class='add'>+	  GDB Simulator Support</div><div class='add'>+	  More Information.</div><div class='add'>+	  &lt;http://sourceware.org/sid/&gt;</div><div class='add'>+</div><div class='add'>+config H8S_EDOSK2674</div><div class='add'>+	bool "EDOSK-2674"</div><div class='add'>+	select H8S2678</div><div class='add'>+	select RAMKERNEL</div><div class='add'>+	help</div><div class='add'>+	  Renesas EDOSK-2674 Evaluation Board Support</div><div class='add'>+	  More Information.</div><div class='add'>+	  &lt;http://www.azpower.com/H8-uClinux/index.html&gt;</div><div class='add'>+	  &lt;http://www.renesas.eu/products/tools/introductory_evaluation_tools/evaluation_development_os_kits/edosk2674r/edosk2674r_software_tools_root.jsp&gt;</div><div class='add'>+</div><div class='add'>+config H8S_SIM</div><div class='add'>+	bool "H8S GDB Simulator"</div><div class='add'>+	select H8S2678</div><div class='add'>+	select ROMKERNEL</div><div class='add'>+	help</div><div class='add'>+	  GDB Simulator Support</div><div class='add'>+	  More Information.</div><div class='add'>+	  &lt;http://sourceware.org/sid/&gt;</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+config H8300_BUILTIN_DTB</div><div class='add'>+        string "Builtin DTB"</div><div class='add'>+	default ""</div><div class='add'>+</div><div class='add'>+config OFFSET</div><div class='add'>+        hex "Load offset"</div><div class='add'>+	default 0</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='head'>diff --git a/arch/h8300/Makefile b/arch/h8300/Makefile<br/>new file mode 100644<br/>index 000000000000..0d2d96e52d9f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/Makefile</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+#</div><div class='add'>+# arch/h8300/Makefile</div><div class='add'>+#</div><div class='add'>+# This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+# License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+# for more details.</div><div class='add'>+#</div><div class='add'>+# (C) Copyright 2002-2015 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+cflags-$(CONFIG_CPU_H8300H)	:= -mh</div><div class='add'>+aflags-$(CONFIG_CPU_H8300H)	:= -mh -Wa,--mach=h8300h</div><div class='add'>+ldflags-$(CONFIG_CPU_H8300H)	:= -mh8300helf_linux</div><div class='add'>+cflags-$(CONFIG_CPU_H8S)	:= -ms</div><div class='add'>+aflags-$(CONFIG_CPU_H8S)	:= -ms -Wa,--mach=h8300s</div><div class='add'>+ldflags-$(CONFIG_CPU_H8S)	:= -mh8300self_linux</div><div class='add'>+</div><div class='add'>+KBUILD_CFLAGS += $(cflags-y)</div><div class='add'>+KBUILD_CFLAGS += -mint32 -fno-builtin</div><div class='add'>+KBUILD_CFLAGS += -D__linux__</div><div class='add'>+KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"</div><div class='add'>+KBUILD_AFLAGS += $(aflags-y)</div><div class='add'>+LDFLAGS += $(ldflags-y)</div><div class='add'>+</div><div class='add'>+CROSS_COMPILE := h8300-unknown-linux-</div><div class='add'>+</div><div class='add'>+core-y	+= arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/</div><div class='add'>+ifneq '$(CONFIG_H8300_BUILTIN_DTB)' '""'</div><div class='add'>+core-y += arch/h8300/boot/dts/</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+libs-y	+= arch/$(ARCH)/lib/</div><div class='add'>+</div><div class='add'>+boot := arch/h8300/boot</div><div class='add'>+</div><div class='add'>+%.dtb %.dtb.S %.dtb.o: | scripts</div><div class='add'>+	$(Q)$(MAKE) $(build)=arch/h8300/boot/dts arch/h8300/boot/dts/$@</div><div class='add'>+</div><div class='add'>+PHONY += dtbs</div><div class='add'>+dtbs: scripts</div><div class='add'>+	$(Q)$(MAKE) $(build)=arch/h8300/boot/dts</div><div class='add'>+</div><div class='add'>+archmrproper:</div><div class='add'>+</div><div class='add'>+archclean:</div><div class='add'>+	$(Q)$(MAKE) $(clean)=$(boot)</div><div class='add'>+</div><div class='add'>+vmlinux.srec vmlinux.bin zImage uImage.bin: vmlinux</div><div class='add'>+	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@</div><div class='add'>+</div><div class='add'>+define archhelp</div><div class='add'>+  @echo  'vmlinux.bin  - Create raw binary'</div><div class='add'>+  @echo  'vmlinux.srec - Create srec binary'</div><div class='add'>+  @echo  'zImage       - Compressed kernel image'</div><div class='add'>+endef</div><div class='head'>diff --git a/arch/h8300/boot/Makefile b/arch/h8300/boot/Makefile<br/>new file mode 100644<br/>index 000000000000..2f6393a5da57<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/Makefile</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# arch/h8300/boot/Makefile</div><div class='add'>+</div><div class='add'>+targets := vmlinux.srec vmlinux.bin zImage</div><div class='add'>+subdir- := compressed</div><div class='add'>+</div><div class='add'>+OBJCOPYFLAGS_vmlinux.srec := -Osrec</div><div class='add'>+OBJCOPYFLAGS_vmlinux.bin  := -Obinary</div><div class='add'>+OBJCOPYFLAGS_zImage := -O binary -R .note -R .comment -R .stab -R .stabstr -S</div><div class='add'>+</div><div class='add'>+UIMAGE_LOADADDR = $(CONFIG_RAMBASE)</div><div class='add'>+UIMAGE_ENTRYADDR = $(shell /bin/bash -c 'printf "0x%08x" \</div><div class='add'>+	$$[$(CONFIG_RAMBASE) + $(CONFIG_OFFSET)]')</div><div class='add'>+</div><div class='add'>+$(obj)/vmlinux.srec $(obj)/vmlinux.bin:  vmlinux FORCE</div><div class='add'>+	$(call if_changed,objcopy)</div><div class='add'>+</div><div class='add'>+$(obj)/zImage: $(obj)/compressed/vmlinux FORCE</div><div class='add'>+	$(call if_changed,objcopy)</div><div class='add'>+</div><div class='add'>+$(obj)/compressed/vmlinux: FORCE</div><div class='add'>+	$(Q)$(MAKE) $(build)=$(obj)/compressed $@</div><div class='add'>+</div><div class='add'>+$(obj)/uImage.bin: $(obj)/vmlinux.bin</div><div class='add'>+	$(call if_changed,uimage,none)</div><div class='add'>+</div><div class='add'>+CLEAN_FILES += arch/$(ARCH)/vmlinux.bin arch/$(ARCH)/vmlinux.srec arch/$(ARCH)/uImage.bin</div><div class='head'>diff --git a/arch/h8300/boot/compressed/Makefile b/arch/h8300/boot/compressed/Makefile<br/>new file mode 100644<br/>index 000000000000..87d03b7ee97e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/compressed/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/Makefile</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+#</div><div class='add'>+# linux/arch/sh/boot/compressed/Makefile</div><div class='add'>+#</div><div class='add'>+# create a compressed vmlinux image from the original vmlinux</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+targets		:= vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o</div><div class='add'>+</div><div class='add'>+OBJECTS = $(obj)/head.o $(obj)/misc.o</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# IMAGE_OFFSET is the load offset of the compression loader</div><div class='add'>+# Assign dummy values if these 2 variables are not defined,</div><div class='add'>+# in order to suppress error message.</div><div class='add'>+#</div><div class='add'>+CONFIG_MEMORY_START     ?= 0x00400000</div><div class='add'>+CONFIG_BOOT_LINK_OFFSET ?= 0x00140000</div><div class='add'>+IMAGE_OFFSET := $(shell printf "0x%08x" $$(($(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET))))</div><div class='add'>+</div><div class='add'>+LIBGCC := $(shell $(CROSS-COMPILE)$(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)</div><div class='add'>+LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -estartup $(obj)/vmlinux.lds</div><div class='add'>+</div><div class='add'>+$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE</div><div class='add'>+	$(call if_changed,ld)</div><div class='add'>+	@:</div><div class='add'>+</div><div class='add'>+$(obj)/vmlinux.bin: vmlinux FORCE</div><div class='add'>+	$(call if_changed,objcopy)</div><div class='add'>+</div><div class='add'>+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE</div><div class='add'>+	$(call if_changed,gzip)</div><div class='add'>+</div><div class='add'>+LDFLAGS_piggy.o := -r --format binary --oformat elf32-h8300-linux -T</div><div class='add'>+OBJCOPYFLAGS := -O binary</div><div class='add'>+</div><div class='add'>+$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE</div><div class='add'>+	$(call if_changed,ld)</div><div class='head'>diff --git a/arch/h8300/boot/compressed/head.S b/arch/h8300/boot/compressed/head.S<br/>new file mode 100644<br/>index 000000000000..74c0d8cc40ba<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/head.S</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/boot/compressed/head.S</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2006 Yoshinori Sato</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+	.section	.text..startup,"ax"</div><div class='add'>+	.global	startup</div><div class='add'>+startup:</div><div class='add'>+	mov.l	er0, er4</div><div class='add'>+	mov.l	er0, sp</div><div class='add'>+	mov.l	#__sbss, er0</div><div class='add'>+	mov.l	#__ebss, er1</div><div class='add'>+	sub.l	er0, er1</div><div class='add'>+	shlr	er1</div><div class='add'>+	shlr	er1</div><div class='add'>+	sub.l	er2, er2</div><div class='add'>+1:</div><div class='add'>+	mov.l	er2, @er0</div><div class='add'>+	adds	#4, er0</div><div class='add'>+	dec.l	#1, er1</div><div class='add'>+	bne	1b</div><div class='add'>+	jsr	@decompress_kernel</div><div class='add'>+	mov.l	er4, er0</div><div class='add'>+	jmp	@0x400000</div><div class='add'>+</div><div class='add'>+	.align	9</div><div class='add'>+fake_headers_as_bzImage:</div><div class='add'>+	.word	0</div><div class='add'>+	.ascii	"HdrS"		; header signature</div><div class='add'>+	.word	0x0202		; header version number (&gt;= 0x0105)</div><div class='add'>+				; or else old loadlin-1.5 will fail)</div><div class='add'>+	.word	0		; default_switch</div><div class='add'>+	.word	0		; SETUPSEG</div><div class='add'>+	.word	0x1000</div><div class='add'>+	.word	0		; pointing to kernel version string</div><div class='add'>+	.byte	0		; = 0, old one (LILO, Loadlin,</div><div class='add'>+				; 0xTV: T=0 for LILO</div><div class='add'>+				;       V = version</div><div class='add'>+	.byte	1		; Load flags bzImage=1</div><div class='add'>+	.word	0x8000		; size to move, when setup is not</div><div class='add'>+	.long	0x100000	; 0x100000 = default for big kernel</div><div class='add'>+	.long	0		; address of loaded ramdisk image</div><div class='add'>+	.long	0		; its size in bytes</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/boot/compressed/misc.c b/arch/h8300/boot/compressed/misc.c<br/>new file mode 100644<br/>index 000000000000..704274127c07<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/compressed/misc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/misc.c</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/h8300/boot/compressed/misc.c</div><div class='add'>+ *</div><div class='add'>+ * This is a collection of several routines from gzip-1.0.3</div><div class='add'>+ * adapted for Linux.</div><div class='add'>+ *</div><div class='add'>+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994</div><div class='add'>+ *</div><div class='add'>+ * Adapted for h8300 by Yoshinori Sato 2006</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * gzip declarations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define OF(args)  args</div><div class='add'>+#define STATIC static</div><div class='add'>+</div><div class='add'>+#undef memset</div><div class='add'>+#undef memcpy</div><div class='add'>+#define memzero(s, n)     memset((s), (0), (n))</div><div class='add'>+</div><div class='add'>+extern int _end;</div><div class='add'>+static unsigned long free_mem_ptr;</div><div class='add'>+static unsigned long free_mem_end_ptr;</div><div class='add'>+</div><div class='add'>+extern char input_data[];</div><div class='add'>+extern int input_len;</div><div class='add'>+static unsigned char *output;</div><div class='add'>+</div><div class='add'>+#define HEAP_SIZE             0x10000</div><div class='add'>+</div><div class='add'>+#include "../../../../lib/decompress_inflate.c"</div><div class='add'>+</div><div class='add'>+void *memset(void *s, int c, size_t n)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	char *ss = (char *)s;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n; i++)</div><div class='add'>+		ss[i] = c;</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *memcpy(void *dest, const void *src, size_t n)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	char *d = (char *)dest, *s = (char *)src;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n; i++)</div><div class='add'>+		d[i] = s[i];</div><div class='add'>+	return dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void error(char *x)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	while (1)</div><div class='add'>+		;	/* Halt */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define STACK_SIZE (4096)</div><div class='add'>+long user_stack[STACK_SIZE];</div><div class='add'>+long *stack_start = &amp;user_stack[STACK_SIZE];</div><div class='add'>+</div><div class='add'>+void decompress_kernel(void)</div><div class='add'>+{</div><div class='add'>+	free_mem_ptr = (unsigned long)&amp;_end;</div><div class='add'>+	free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;</div><div class='add'>+</div><div class='add'>+	decompress(input_data, input_len, NULL, NULL, output, NULL, error);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/boot/compressed/vmlinux.lds b/arch/h8300/boot/compressed/vmlinux.lds<br/>new file mode 100644<br/>index 000000000000..a0a3a0ed54ef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/compressed/vmlinux.lds?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/vmlinux.lds</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+SECTIONS</div><div class='add'>+{</div><div class='add'>+        .text :</div><div class='add'>+        {</div><div class='add'>+        __stext = . ;</div><div class='add'>+	__text = .;</div><div class='add'>+	       *(.text..startup)</div><div class='add'>+	       *(.text)</div><div class='add'>+        __etext = . ;</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+	.rodata :</div><div class='add'>+	{</div><div class='add'>+		*(.rodata)</div><div class='add'>+	}</div><div class='add'>+        .data :</div><div class='add'>+</div><div class='add'>+        {</div><div class='add'>+        __sdata = . ;</div><div class='add'>+        ___data_start = . ;</div><div class='add'>+                *(.data.*)</div><div class='add'>+	}</div><div class='add'>+        .bss :</div><div class='add'>+        {</div><div class='add'>+        . = ALIGN(0x4) ;</div><div class='add'>+        __sbss = . ;</div><div class='add'>+                *(.bss*)</div><div class='add'>+        . = ALIGN(0x4) ;</div><div class='add'>+        __ebss = . ;</div><div class='add'>+        __end = . ;</div><div class='add'>+        }</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/boot/compressed/vmlinux.scr b/arch/h8300/boot/compressed/vmlinux.scr<br/>new file mode 100644<br/>index 000000000000..a084903603fe<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/compressed/vmlinux.scr?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/compressed/vmlinux.scr</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+SECTIONS</div><div class='add'>+{</div><div class='add'>+  .data : {</div><div class='add'>+	input_len = .;</div><div class='add'>+	LONG(input_data_end - input_data) input_data = .;</div><div class='add'>+	*(.data)</div><div class='add'>+	input_data_end = .;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/boot/dts/Makefile b/arch/h8300/boot/dts/Makefile<br/>new file mode 100644<br/>index 000000000000..0abaf1ad830e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/Makefile</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+ifneq '$(CONFIG_H8300_BUILTIN_DTB)' '""'</div><div class='add'>+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_H8300_BUILTIN_DTB)).dtb.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-y += $(BUILTIN_DTB)</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_H8300H_SIM) := h8300h_sim.dtb</div><div class='add'>+dtb-$(CONFIG_H8S_SIM) := h8s_sim.dtb</div><div class='add'>+dtb-$(CONFIG_H8S_EDOSK2674) := edosk2674.dtb</div><div class='add'>+</div><div class='add'>+always	    := $(dtb-y)</div><div class='add'>+clean-files := *.dtb.S *.dtb</div><div class='head'>diff --git a/arch/h8300/boot/dts/edosk2674.dts b/arch/h8300/boot/dts/edosk2674.dts<br/>new file mode 100644<br/>index 000000000000..dfb5c102f8da<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/dts/edosk2674.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/edosk2674.dts</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,edosk2674";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;h8intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttySC2,38400";</div><div class='add'>+		stdout-path = &lt;&amp;sci2&gt;;</div><div class='add'>+	};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;sci0;</div><div class='add'>+		serial1 = &amp;sci1;</div><div class='add'>+		serial2 = &amp;sci2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xclk: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;33333333&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+	};</div><div class='add'>+	pllclk: pllclk {</div><div class='add'>+		compatible = "renesas,h8s2678-pll-clock";</div><div class='add'>+		clocks = &lt;&amp;xclk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfee03b 2&gt;, &lt;0xfee045 2&gt;;</div><div class='add'>+	};</div><div class='add'>+	core_clk: core_clk {</div><div class='add'>+		compatible = "renesas,h8300-div-clock";</div><div class='add'>+		clocks = &lt;&amp;pllclk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfee03b 2&gt;;</div><div class='add'>+		renesas,width = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+	fclk: fclk {</div><div class='add'>+		compatible = "fixed-factor-clock";</div><div class='add'>+		clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-div = &lt;1&gt;;</div><div class='add'>+		clock-mult = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@400000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x400000 0x800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "renesas,h8300";</div><div class='add'>+			clock-frequency = &lt;33333333&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	h8intc: interrupt-controller@fffe00 {</div><div class='add'>+		compatible = "renesas,h8s-intc", "renesas,h8300-intc";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xfffe00 24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bsc: memory-controller@fffec0 {</div><div class='add'>+		compatible = "renesas,h8s-bsc", "renesas,h8300-bsc";</div><div class='add'>+		reg = &lt;0xfffec0 24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpu: timer@ffffe0 {</div><div class='add'>+		compatible = "renesas,tpu";</div><div class='add'>+		reg = &lt;0xffffe0 16&gt;, &lt;0xfffff0 12&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer8: timer@ffffb0 {</div><div class='add'>+		compatible = "renesas,8bit-timer";</div><div class='add'>+		reg = &lt;0xffffb0 10&gt;;</div><div class='add'>+		interrupts = &lt;72 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sci0: serial@ffff78 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffff78 8&gt;;</div><div class='add'>+		interrupts = &lt;88 0&gt;, &lt;89 0&gt;, &lt;90 0&gt;, &lt;91 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+	sci1: serial@ffff80 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffff80 8&gt;;</div><div class='add'>+		interrupts = &lt;92 0&gt;, &lt;93 0&gt;, &lt;94 0&gt;, &lt;95 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+	sci2: serial@ffff88 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffff88 8&gt;;</div><div class='add'>+		interrupts = &lt;96 0&gt;, &lt;97 0&gt;, &lt;98 0&gt;, &lt;99 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/h8300/boot/dts/h8300h_sim.dts b/arch/h8300/boot/dts/h8300h_sim.dts<br/>new file mode 100644<br/>index 000000000000..545bfb57af9a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/dts/h8300h_sim.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/h8300h_sim.dts</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+/ {</div><div class='add'>+	compatible = "gnu,gdbsim";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;h8intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlyprintk=h8300-sim";</div><div class='add'>+		stdout-path = &lt;&amp;sci0&gt;;</div><div class='add'>+	};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;sci0;</div><div class='add'>+		serial1 = &amp;sci1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xclk: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;20000000&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+	};</div><div class='add'>+	core_clk: core_clk {</div><div class='add'>+		compatible = "renesas,h8300-div-clock";</div><div class='add'>+		clocks = &lt;&amp;xclk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfee01b 2&gt;;</div><div class='add'>+		renesas,width = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+	fclk: fclk {</div><div class='add'>+		compatible = "fixed-factor-clock";</div><div class='add'>+		clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-div = &lt;1&gt;;</div><div class='add'>+		clock-mult = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@400000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x400000 0x400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "renesas,h8300";</div><div class='add'>+			clock-frequency = &lt;20000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	h8intc: interrupt-controller@fee012 {</div><div class='add'>+		compatible = "renesas,h8300h-intc", "renesas,h8300-intc";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xfee012 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bsc: memory-controller@fee01e {</div><div class='add'>+		compatible = "renesas,h8300h-bsc", "renesas,h8300-bsc";</div><div class='add'>+		reg = &lt;0xfee01e 8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer8: timer@ffff80 {</div><div class='add'>+		compatible = "renesas,8bit-timer";</div><div class='add'>+		reg = &lt;0xffff80 10&gt;;</div><div class='add'>+		interrupts = &lt;36 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer16: timer@ffff68 {</div><div class='add'>+		compatible = "renesas,16bit-timer";</div><div class='add'>+		reg = &lt;0xffff68 8&gt;, &lt;0xffff60 8&gt;;</div><div class='add'>+		interrupts = &lt;24 0&gt;;</div><div class='add'>+		renesas,channel = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sci0: serial@ffffb0 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffffb0 8&gt;;</div><div class='add'>+		interrupts = &lt;52 0&gt;, &lt;53 0&gt;, &lt;54 0&gt;, &lt;55 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sci1: serial@ffffb8 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffffb8 8&gt;;</div><div class='add'>+		interrupts = &lt;56 0&gt;, &lt;57 0&gt;, &lt;58 0&gt;, &lt;59 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/h8300/boot/dts/h8s_sim.dts b/arch/h8300/boot/dts/h8s_sim.dts<br/>new file mode 100644<br/>index 000000000000..bcedba5a3ce7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/boot/dts/h8s_sim.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/boot/dts/h8s_sim.dts</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+/ {</div><div class='add'>+	compatible = "gnu,gdbsim";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;h8intc&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlyprintk=h8300-sim";</div><div class='add'>+		stdout-path = &lt;&amp;sci0&gt;;</div><div class='add'>+	};</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;sci0;</div><div class='add'>+		serial1 = &amp;sci1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xclk: oscillator {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;33333333&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+	};</div><div class='add'>+	pllclk: pllclk {</div><div class='add'>+		compatible = "renesas,h8s2678-pll-clock";</div><div class='add'>+		clocks = &lt;&amp;xclk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfee03b 2&gt;, &lt;0xfee045 2&gt;;</div><div class='add'>+	};</div><div class='add'>+	core_clk: core_clk {</div><div class='add'>+		compatible = "renesas,h8300-div-clock";</div><div class='add'>+		clocks = &lt;&amp;pllclk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0xfee03b 2&gt;;</div><div class='add'>+		renesas,width = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+	fclk: fclk {</div><div class='add'>+		compatible = "fixed-factor-clock";</div><div class='add'>+		clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-div = &lt;1&gt;;</div><div class='add'>+		clock-mult = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@400000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x400000 0x800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "renesas,h8300";</div><div class='add'>+			clock-frequency = &lt;33333333&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	h8intc: interrupt-controller@fffe00 {</div><div class='add'>+		compatible = "renesas,h8s-intc", "renesas,h8300-intc";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0xfffe00 24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bsc: memory-controller@fffec0 {</div><div class='add'>+		compatible = "renesas,h8s-bsc", "renesas,h8300-bsc";</div><div class='add'>+		reg = &lt;0xfffec0 24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpu: timer@ffffe0 {</div><div class='add'>+		compatible = "renesas,tpu";</div><div class='add'>+		reg = &lt;0xffffe0 16&gt;, &lt;0xfffff0 12&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer8: timer@ffffb0 {</div><div class='add'>+		compatible = "renesas,8bit-timer";</div><div class='add'>+		reg = &lt;0xffffb0 10&gt;;</div><div class='add'>+		interrupts = &lt;72 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sci0: serial@ffff78 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffff78 8&gt;;</div><div class='add'>+		interrupts = &lt;88 0&gt;, &lt;89 0&gt;, &lt;90 0&gt;, &lt;91 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+	sci1: serial@ffff80 {</div><div class='add'>+		compatible = "renesas,sci";</div><div class='add'>+		reg = &lt;0xffff80 8&gt;;</div><div class='add'>+		interrupts = &lt;92 0&gt;, &lt;93 0&gt;, &lt;94 0&gt;, &lt;95 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;fclk&gt;;</div><div class='add'>+		clock-names = "sci_ick";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/h8300/configs/edosk2674_defconfig b/arch/h8300/configs/edosk2674_defconfig<br/>new file mode 100644<br/>index 000000000000..29fda12d5da9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/configs/edosk2674_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/edosk2674_defconfig</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+# CONFIG_USELIB is not set</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+# CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_SYSFS_SYSCALL is not set</div><div class='add'>+# CONFIG_KALLSYMS is not set</div><div class='add'>+# CONFIG_BASE_FULL is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_TIMERFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+# CONFIG_ADVISE_SYSCALLS is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_SLOB=y</div><div class='add'>+# CONFIG_BLOCK is not set</div><div class='add'>+CONFIG_H8S_SIM=y</div><div class='add'>+CONFIG_H8300_BUILTIN_DTB="h8s_sim"</div><div class='add'>+# CONFIG_BINFMT_SCRIPT is not set</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+# CONFIG_COREDUMP is not set</div><div class='add'>+# CONFIG_UEVENT_HELPER is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+# CONFIG_ALLOW_DEV_COREDUMP is not set</div><div class='add'>+# CONFIG_INPUT is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+# CONFIG_PROC_FS is not set</div><div class='add'>+# CONFIG_SYSFS is not set</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='head'>diff --git a/arch/h8300/configs/h8300h-sim_defconfig b/arch/h8300/configs/h8300h-sim_defconfig<br/>new file mode 100644<br/>index 000000000000..067bfe9c49b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/configs/h8300h-sim_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/h8300h-sim_defconfig</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+# CONFIG_USELIB is not set</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+# CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_SYSFS_SYSCALL is not set</div><div class='add'>+# CONFIG_KALLSYMS is not set</div><div class='add'>+# CONFIG_BASE_FULL is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_TIMERFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+# CONFIG_ADVISE_SYSCALLS is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_SLOB=y</div><div class='add'>+# CONFIG_BLOCK is not set</div><div class='add'>+CONFIG_H8300H_SIM=y</div><div class='add'>+CONFIG_H8300_BUILTIN_DTB="h8300h_sim"</div><div class='add'>+# CONFIG_BINFMT_SCRIPT is not set</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+# CONFIG_COREDUMP is not set</div><div class='add'>+# CONFIG_UEVENT_HELPER is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+# CONFIG_ALLOW_DEV_COREDUMP is not set</div><div class='add'>+# CONFIG_INPUT is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+# CONFIG_PROC_FS is not set</div><div class='add'>+# CONFIG_SYSFS is not set</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='head'>diff --git a/arch/h8300/configs/h8s-sim_defconfig b/arch/h8300/configs/h8s-sim_defconfig<br/>new file mode 100644<br/>index 000000000000..29fda12d5da9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/configs/h8s-sim_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/configs/h8s-sim_defconfig</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+# CONFIG_USELIB is not set</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+# CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_SYSFS_SYSCALL is not set</div><div class='add'>+# CONFIG_KALLSYMS is not set</div><div class='add'>+# CONFIG_BASE_FULL is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_TIMERFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+# CONFIG_ADVISE_SYSCALLS is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_SLOB=y</div><div class='add'>+# CONFIG_BLOCK is not set</div><div class='add'>+CONFIG_H8S_SIM=y</div><div class='add'>+CONFIG_H8300_BUILTIN_DTB="h8s_sim"</div><div class='add'>+# CONFIG_BINFMT_SCRIPT is not set</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+# CONFIG_COREDUMP is not set</div><div class='add'>+# CONFIG_UEVENT_HELPER is not set</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+# CONFIG_ALLOW_DEV_COREDUMP is not set</div><div class='add'>+# CONFIG_INPUT is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+# CONFIG_PROC_FS is not set</div><div class='add'>+# CONFIG_SYSFS is not set</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='head'>diff --git a/arch/h8300/include/asm/Kbuild b/arch/h8300/include/asm/Kbuild<br/>new file mode 100644<br/>index 000000000000..70e6ae1e7006<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/Kbuild</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+generic-y += asm-offsets.h</div><div class='add'>+generic-y += auxvec.h</div><div class='add'>+generic-y += barrier.h</div><div class='add'>+generic-y += bugs.h</div><div class='add'>+generic-y += cacheflush.h</div><div class='add'>+generic-y += checksum.h</div><div class='add'>+generic-y += clkdev.h</div><div class='add'>+generic-y += cputime.h</div><div class='add'>+generic-y += current.h</div><div class='add'>+generic-y += delay.h</div><div class='add'>+generic-y += device.h</div><div class='add'>+generic-y += div64.h</div><div class='add'>+generic-y += dma.h</div><div class='add'>+generic-y += emergency-restart.h</div><div class='add'>+generic-y += errno.h</div><div class='add'>+generic-y += exec.h</div><div class='add'>+generic-y += fb.h</div><div class='add'>+generic-y += fcntl.h</div><div class='add'>+generic-y += ftrace.h</div><div class='add'>+generic-y += futex.h</div><div class='add'>+generic-y += hardirq.h</div><div class='add'>+generic-y += hash.h</div><div class='add'>+generic-y += hw_irq.h</div><div class='add'>+generic-y += ioctl.h</div><div class='add'>+generic-y += ioctls.h</div><div class='add'>+generic-y += ipcbuf.h</div><div class='add'>+generic-y += irq_regs.h</div><div class='add'>+generic-y += irq_work.h</div><div class='add'>+generic-y += kdebug.h</div><div class='add'>+generic-y += kmap_types.h</div><div class='add'>+generic-y += kvm_para.h</div><div class='add'>+generic-y += linkage.h</div><div class='add'>+generic-y += local.h</div><div class='add'>+generic-y += local64.h</div><div class='add'>+generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='add'>+generic-y += mman.h</div><div class='add'>+generic-y += mmu.h</div><div class='add'>+generic-y += mmu_context.h</div><div class='add'>+generic-y += module.h</div><div class='add'>+generic-y += msgbuf.h</div><div class='add'>+generic-y += param.h</div><div class='add'>+generic-y += parport.h</div><div class='add'>+generic-y += percpu.h</div><div class='add'>+generic-y += pgalloc.h</div><div class='add'>+generic-y += poll.h</div><div class='add'>+generic-y += posix_types.h</div><div class='add'>+generic-y += preempt.h</div><div class='add'>+generic-y += resource.h</div><div class='add'>+generic-y += scatterlist.h</div><div class='add'>+generic-y += sections.h</div><div class='add'>+generic-y += sembuf.h</div><div class='add'>+generic-y += serial.h</div><div class='add'>+generic-y += setup.h</div><div class='add'>+generic-y += shmbuf.h</div><div class='add'>+generic-y += shmparam.h</div><div class='add'>+generic-y += siginfo.h</div><div class='add'>+generic-y += sizes.h</div><div class='add'>+generic-y += socket.h</div><div class='add'>+generic-y += sockios.h</div><div class='add'>+generic-y += spinlock.h</div><div class='add'>+generic-y += stat.h</div><div class='add'>+generic-y += statfs.h</div><div class='add'>+generic-y += swab.h</div><div class='add'>+generic-y += termbits.h</div><div class='add'>+generic-y += termios.h</div><div class='add'>+generic-y += timex.h</div><div class='add'>+generic-y += tlbflush.h</div><div class='add'>+generic-y += trace_clock.h</div><div class='add'>+generic-y += topology.h</div><div class='add'>+generic-y += types.h</div><div class='add'>+generic-y += uaccess.h</div><div class='add'>+generic-y += ucontext.h</div><div class='add'>+generic-y += unaligned.h</div><div class='add'>+generic-y += vga.h</div><div class='add'>+generic-y += xor.h</div><div class='head'>diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h<br/>new file mode 100644<br/>index 000000000000..7ca73f8546cc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/atomic.h</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+#ifndef __ARCH_H8300_ATOMIC__</div><div class='add'>+#define __ARCH_H8300_ATOMIC__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/cmpxchg.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Atomic operations that C can't guarantee us.  Useful for</div><div class='add'>+ * resource counting etc..</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define ATOMIC_INIT(i)	{ (i) }</div><div class='add'>+</div><div class='add'>+#define atomic_read(v)		ACCESS_ONCE((v)-&gt;counter)</div><div class='add'>+#define atomic_set(v, i)	(((v)-&gt;counter) = i)</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int atomic_add_return(int i, atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	ret = v-&gt;counter += i;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define atomic_add(i, v) atomic_add_return(i, v)</div><div class='add'>+#define atomic_add_negative(a, v)	(atomic_add_return((a), (v)) &lt; 0)</div><div class='add'>+</div><div class='add'>+static inline int atomic_sub_return(int i, atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	ret = v-&gt;counter -= i;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define atomic_sub(i, v) atomic_sub_return(i, v)</div><div class='add'>+#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)</div><div class='add'>+</div><div class='add'>+static inline int atomic_inc_return(atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	v-&gt;counter++;</div><div class='add'>+	ret = v-&gt;counter;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define atomic_inc(v) atomic_inc_return(v)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * atomic_inc_and_test - increment and test</div><div class='add'>+ * @v: pointer of type atomic_t</div><div class='add'>+ *</div><div class='add'>+ * Atomically increments @v by 1</div><div class='add'>+ * and returns true if the result is zero, or false for all</div><div class='add'>+ * other cases.</div><div class='add'>+ */</div><div class='add'>+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)</div><div class='add'>+</div><div class='add'>+static inline int atomic_dec_return(atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	--v-&gt;counter;</div><div class='add'>+	ret = v-&gt;counter;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define atomic_dec(v) atomic_dec_return(v)</div><div class='add'>+</div><div class='add'>+static inline int atomic_dec_and_test(atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	--v-&gt;counter;</div><div class='add'>+	ret = v-&gt;counter;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret == 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	ret = v-&gt;counter;</div><div class='add'>+	if (likely(ret == old))</div><div class='add'>+		v-&gt;counter = new;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __atomic_add_unless(atomic_t *v, int a, int u)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='add'>+	ret = v-&gt;counter;</div><div class='add'>+	if (ret != u)</div><div class='add'>+		v-&gt;counter += a;</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)</div><div class='add'>+{</div><div class='add'>+	unsigned char ccr;</div><div class='add'>+	unsigned long tmp;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("stc ccr,%w3\n\t"</div><div class='add'>+			     "orc #0x80,ccr\n\t"</div><div class='add'>+			     "mov.l %0,%1\n\t"</div><div class='add'>+			     "and.l %2,%1\n\t"</div><div class='add'>+			     "mov.l %1,%0\n\t"</div><div class='add'>+			     "ldc %w3,ccr"</div><div class='add'>+			     : "=m"(*v), "=r"(tmp)</div><div class='add'>+			     : "g"(~(mask)), "r"(ccr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void atomic_set_mask(unsigned long mask, unsigned long *v)</div><div class='add'>+{</div><div class='add'>+	unsigned char ccr;</div><div class='add'>+	unsigned long tmp;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("stc ccr,%w3\n\t"</div><div class='add'>+			     "orc #0x80,ccr\n\t"</div><div class='add'>+			     "mov.l %0,%1\n\t"</div><div class='add'>+			     "or.l %2,%1\n\t"</div><div class='add'>+			     "mov.l %1,%0\n\t"</div><div class='add'>+			     "ldc %w3,ccr"</div><div class='add'>+			     : "=m"(*v), "=r"(tmp)</div><div class='add'>+			     : "g"(~(mask)), "r"(ccr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Atomic operations are already serializing */</div><div class='add'>+#define smp_mb__before_atomic_dec()    barrier()</div><div class='add'>+#define smp_mb__after_atomic_dec() barrier()</div><div class='add'>+#define smp_mb__before_atomic_inc()    barrier()</div><div class='add'>+#define smp_mb__after_atomic_inc() barrier()</div><div class='add'>+</div><div class='add'>+#endif /* __ARCH_H8300_ATOMIC __ */</div><div class='head'>diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h<br/>new file mode 100644<br/>index 000000000000..05999aba1d6a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bitops.h</a></div><div class='hunk'>@@ -0,0 +1,185 @@</div><div class='add'>+#ifndef _H8300_BITOPS_H</div><div class='add'>+#define _H8300_BITOPS_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 1992, Linus Torvalds.</div><div class='add'>+ * Copyright 2002, Yoshinori Sato</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#ifndef _LINUX_BITOPS_H</div><div class='add'>+#error only &lt;linux/bitops.h&gt; can be included directly</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function prototypes to keep gcc -Wall happy</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ffz = Find First Zero in word. Undefined if no zero exists,</div><div class='add'>+ * so code should check against ~0UL first..</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long ffz(unsigned long word)</div><div class='add'>+{</div><div class='add'>+	unsigned long result;</div><div class='add'>+</div><div class='add'>+	result = -1;</div><div class='add'>+	__asm__("1:\n\t"</div><div class='add'>+		"shlr.l %2\n\t"</div><div class='add'>+		"adds #1,%0\n\t"</div><div class='add'>+		"bcs 1b"</div><div class='add'>+		: "=r"(result)</div><div class='add'>+		: "0"(result), "r"(word));</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define H8300_GEN_BITOP(FNAME, OP)				\</div><div class='add'>+static inline void FNAME(int nr, volatile unsigned long *addr)	\</div><div class='add'>+{								\</div><div class='add'>+	unsigned char *b_addr;					\</div><div class='add'>+	unsigned char bit = nr &amp; 7;				\</div><div class='add'>+								\</div><div class='add'>+	b_addr = (unsigned char *)addr + ((nr &gt;&gt; 3) ^ 3);	\</div><div class='add'>+	if (__builtin_constant_p(nr)) {				\</div><div class='add'>+		__asm__(OP " %1,%0" : "+WU"(*b_addr) : "i"(nr &amp; 7));	\</div><div class='add'>+	} else {						\</div><div class='add'>+		__asm__(OP " %s1,%0" : "+WU"(*b_addr) : "r"(bit));	\</div><div class='add'>+	}							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * clear_bit() doesn't provide any barrier for the compiler.</div><div class='add'>+ */</div><div class='add'>+#define smp_mb__before_clear_bit()	barrier()</div><div class='add'>+#define smp_mb__after_clear_bit()	barrier()</div><div class='add'>+</div><div class='add'>+H8300_GEN_BITOP(set_bit,    "bset")</div><div class='add'>+H8300_GEN_BITOP(clear_bit,  "bclr")</div><div class='add'>+H8300_GEN_BITOP(change_bit, "bnot")</div><div class='add'>+#define __set_bit(nr, addr)    set_bit((nr), (addr))</div><div class='add'>+#define __clear_bit(nr, addr)  clear_bit((nr), (addr))</div><div class='add'>+#define __change_bit(nr, addr) change_bit((nr), (addr))</div><div class='add'>+</div><div class='add'>+#undef H8300_GEN_BITOP</div><div class='add'>+</div><div class='add'>+static inline int test_bit(int nr, const unsigned long *addr)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned char *b_addr;</div><div class='add'>+	unsigned char bit = nr &amp; 7;</div><div class='add'>+</div><div class='add'>+	b_addr = (unsigned char *)addr + ((nr &gt;&gt; 3) ^ 3);</div><div class='add'>+	if (__builtin_constant_p(nr)) {</div><div class='add'>+		__asm__("bld %Z2,%1\n\t"</div><div class='add'>+			"rotxl %0\n\t"</div><div class='add'>+			: "=r"(ret)</div><div class='add'>+			: "WU"(*b_addr), "i"(nr &amp; 7), "0"(ret) : "cc");</div><div class='add'>+	} else {</div><div class='add'>+		__asm__("btst %w2,%1\n\t"</div><div class='add'>+			"beq 1f\n\t"</div><div class='add'>+			"inc.l #1,%0\n"</div><div class='add'>+			"1:"</div><div class='add'>+			: "=r"(ret)</div><div class='add'>+			: "WU"(*b_addr), "r"(bit), "0"(ret) : "cc");</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __test_bit(nr, addr) test_bit(nr, addr)</div><div class='add'>+</div><div class='add'>+#define H8300_GEN_TEST_BITOP(FNNAME, OP)				\</div><div class='add'>+static inline int FNNAME(int nr, void *addr)				\</div><div class='add'>+{									\</div><div class='add'>+	int retval = 0;							\</div><div class='add'>+	char ccrsave;							\</div><div class='add'>+	unsigned char *b_addr;						\</div><div class='add'>+	unsigned char bit = nr &amp; 7;					\</div><div class='add'>+									\</div><div class='add'>+	b_addr = (unsigned char *)addr + ((nr &gt;&gt; 3) ^ 3);		\</div><div class='add'>+	if (__builtin_constant_p(nr)) {					\</div><div class='add'>+		__asm__("stc ccr,%s2\n\t"				\</div><div class='add'>+			"orc #0x80,ccr\n\t"				\</div><div class='add'>+			"bld %4,%1\n\t"					\</div><div class='add'>+			OP " %4,%1\n\t"					\</div><div class='add'>+			"rotxl.l %0\n\t"				\</div><div class='add'>+			"ldc %s2,ccr"					\</div><div class='add'>+			: "=r"(retval), "+WU" (*b_addr), "=&amp;r"(ccrsave)	\</div><div class='add'>+			: "0"(retval), "i"(nr &amp; 7) : "cc");		\</div><div class='add'>+	} else {							\</div><div class='add'>+		__asm__("stc ccr,%t3\n\t"				\</div><div class='add'>+			"orc #0x80,ccr\n\t"				\</div><div class='add'>+			"btst %s3,%1\n\t"				\</div><div class='add'>+			OP " %s3,%1\n\t"				\</div><div class='add'>+			"beq 1f\n\t"					\</div><div class='add'>+			"inc.l #1,%0\n\t"				\</div><div class='add'>+			"1:\n"						\</div><div class='add'>+			"ldc %t3,ccr"					\</div><div class='add'>+			: "=r"(retval), "+WU" (*b_addr)			\</div><div class='add'>+			: "0" (retval), "r"(bit) : "cc");		\</div><div class='add'>+	}								\</div><div class='add'>+	return retval;							\</div><div class='add'>+}									\</div><div class='add'>+									\</div><div class='add'>+static inline int __ ## FNNAME(int nr, void *addr)			\</div><div class='add'>+{									\</div><div class='add'>+	int retval = 0;							\</div><div class='add'>+	unsigned char *b_addr;						\</div><div class='add'>+	unsigned char bit = nr &amp; 7;					\</div><div class='add'>+									\</div><div class='add'>+	b_addr = (unsigned char *)addr + ((nr &gt;&gt; 3) ^ 3);		\</div><div class='add'>+	if (__builtin_constant_p(nr)) {					\</div><div class='add'>+		__asm__("bld %3,%1\n\t"					\</div><div class='add'>+			OP " %3,%1\n\t"					\</div><div class='add'>+			"rotxl.l %0\n\t"				\</div><div class='add'>+			: "=r"(retval), "+WU"(*b_addr)			\</div><div class='add'>+			: "0" (retval), "i"(nr &amp; 7));			\</div><div class='add'>+	} else {							\</div><div class='add'>+		__asm__("btst %s3,%1\n\t"				\</div><div class='add'>+			OP " %s3,%1\n\t"				\</div><div class='add'>+			"beq 1f\n\t"					\</div><div class='add'>+			"inc.l #1,%0\n\t"				\</div><div class='add'>+			"1:"						\</div><div class='add'>+			: "=r"(retval), "+WU"(*b_addr)			\</div><div class='add'>+			: "0" (retval), "r"(bit));			\</div><div class='add'>+	}								\</div><div class='add'>+	return retval;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+H8300_GEN_TEST_BITOP(test_and_set_bit,	  "bset")</div><div class='add'>+H8300_GEN_TEST_BITOP(test_and_clear_bit,  "bclr")</div><div class='add'>+H8300_GEN_TEST_BITOP(test_and_change_bit, "bnot")</div><div class='add'>+#undef H8300_GEN_TEST_BITOP</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/bitops/ffs.h&gt;</div><div class='add'>+</div><div class='add'>+static inline unsigned long __ffs(unsigned long word)</div><div class='add'>+{</div><div class='add'>+	unsigned long result;</div><div class='add'>+</div><div class='add'>+	result = -1;</div><div class='add'>+	__asm__("1:\n\t"</div><div class='add'>+		"shlr.l %2\n\t"</div><div class='add'>+		"adds #1,%0\n\t"</div><div class='add'>+		"bcc 1b"</div><div class='add'>+		: "=r" (result)</div><div class='add'>+		: "0"(result), "r"(word));</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/bitops/find.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/sched.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/hweight.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/lock.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/le.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/ext2-atomic.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/bitops/fls.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/__fls.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitops/fls64.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_BITOPS_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/bitsperlong.h b/arch/h8300/include/asm/bitsperlong.h<br/>new file mode 100644<br/>index 000000000000..e140e46729ac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/bitsperlong.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bitsperlong.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+#ifndef __ASM_H8300_BITS_PER_LONG</div><div class='add'>+#define __ASM_H8300_BITS_PER_LONG</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/bitsperlong.h&gt;</div><div class='add'>+</div><div class='add'>+#if !defined(__ASSEMBLY__)</div><div class='add'>+/* h8300-unknown-linux required long */</div><div class='add'>+#define __kernel_size_t __kernel_size_t</div><div class='add'>+typedef unsigned long	__kernel_size_t;</div><div class='add'>+typedef long		__kernel_ssize_t;</div><div class='add'>+typedef long		__kernel_ptrdiff_t;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_H8300_BITS_PER_LONG */</div><div class='head'>diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h<br/>new file mode 100644<br/>index 000000000000..1e1be8119935<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/bug.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/bug.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+#ifndef _H8300_BUG_H</div><div class='add'>+#define _H8300_BUG_H</div><div class='add'>+</div><div class='add'>+/* always true */</div><div class='add'>+#define is_valid_bugaddr(addr) (1)</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/bug.h&gt;</div><div class='add'>+</div><div class='add'>+struct pt_regs;</div><div class='add'>+extern void die(const char *str, struct pt_regs *fp, unsigned long err);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/byteorder.h b/arch/h8300/include/asm/byteorder.h<br/>new file mode 100644<br/>index 000000000000..888478a38145<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/byteorder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/byteorder.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#ifndef __H8300_BYTEORDER_H__</div><div class='add'>+#define __H8300_BYTEORDER_H__</div><div class='add'>+</div><div class='add'>+#define __BIG_ENDIAN __ORDER_BIG_ENDIAN__</div><div class='add'>+#include &lt;linux/byteorder/big_endian.h&gt;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h<br/>new file mode 100644<br/>index 000000000000..0ef1edc5a6a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/cache.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/cache.h</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+#ifndef __ARCH_H8300_CACHE_H</div><div class='add'>+#define __ARCH_H8300_CACHE_H</div><div class='add'>+</div><div class='add'>+/* bytes per L1 cache line */</div><div class='add'>+#define        L1_CACHE_SHIFT  2</div><div class='add'>+#define        L1_CACHE_BYTES  (1 &lt;&lt; L1_CACHE_SHIFT)</div><div class='add'>+</div><div class='add'>+#define __cacheline_aligned</div><div class='add'>+#define ____cacheline_aligned</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/cmpxchg.h b/arch/h8300/include/asm/cmpxchg.h<br/>new file mode 100644<br/>index 000000000000..95fec4cd1081<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+#ifndef __ARCH_H8300_CMPXCHG__</div><div class='add'>+#define __ARCH_H8300_CMPXCHG__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irqflags.h&gt;</div><div class='add'>+</div><div class='add'>+#define xchg(ptr, x) \</div><div class='add'>+	((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \</div><div class='add'>+				    sizeof(*(ptr))))</div><div class='add'>+</div><div class='add'>+struct __xchg_dummy { unsigned long a[100]; };</div><div class='add'>+#define __xg(x) ((volatile struct __xchg_dummy *)(x))</div><div class='add'>+</div><div class='add'>+static inline unsigned long __xchg(unsigned long x,</div><div class='add'>+				   volatile void *ptr, int size)</div><div class='add'>+{</div><div class='add'>+	unsigned long tmp, flags;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		__asm__ __volatile__</div><div class='add'>+			("mov.b %2,%0\n\t"</div><div class='add'>+			 "mov.b %1,%2"</div><div class='add'>+			 : "=&amp;r" (tmp) : "r" (x), "m" (*__xg(ptr)));</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		__asm__ __volatile__</div><div class='add'>+			("mov.w %2,%0\n\t"</div><div class='add'>+			 "mov.w %1,%2"</div><div class='add'>+			 : "=&amp;r" (tmp) : "r" (x), "m" (*__xg(ptr)));</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		__asm__ __volatile__</div><div class='add'>+			("mov.l %2,%0\n\t"</div><div class='add'>+			 "mov.l %1,%2"</div><div class='add'>+			 : "=&amp;r" (tmp) : "r" (x), "m" (*__xg(ptr)));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		tmp = 0;</div><div class='add'>+	}</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make</div><div class='add'>+ * them available.</div><div class='add'>+ */</div><div class='add'>+#define cmpxchg_local(ptr, o, n)					 \</div><div class='add'>+	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr),		 \</div><div class='add'>+						     (unsigned long)(o), \</div><div class='add'>+						     (unsigned long)(n), \</div><div class='add'>+						     sizeof(*(ptr))))</div><div class='add'>+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+#include &lt;asm-generic/cmpxchg.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define atomic_xchg(v, new) (xchg(&amp;((v)-&gt;counter), new))</div><div class='add'>+</div><div class='add'>+#endif /* __ARCH_H8300_CMPXCHG__ */</div><div class='head'>diff --git a/arch/h8300/include/asm/dma-mapping.h b/arch/h8300/include/asm/dma-mapping.h<br/>new file mode 100644<br/>index 000000000000..6e67a90902f2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+#ifndef _H8300_DMA_MAPPING_H</div><div class='add'>+#define _H8300_DMA_MAPPING_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/dma-coherent.h&gt;</div><div class='add'>+</div><div class='add'>+extern struct dma_map_ops h8300_dma_map_ops;</div><div class='add'>+</div><div class='add'>+static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return &amp;h8300_dma_map_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/dma-mapping-common.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int dma_supported(struct device *dev, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int dma_set_mask(struct device *dev, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)</div><div class='add'>+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)</div><div class='add'>+</div><div class='add'>+#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)</div><div class='add'>+</div><div class='add'>+static inline void *dma_alloc_attrs(struct device *dev, size_t size,</div><div class='add'>+				    dma_addr_t *dma_handle, gfp_t flag,</div><div class='add'>+				    struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	void *memory;</div><div class='add'>+</div><div class='add'>+	memory = ops-&gt;alloc(dev, size, dma_handle, flag, attrs);</div><div class='add'>+	return memory;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)</div><div class='add'>+</div><div class='add'>+static inline void dma_free_attrs(struct device *dev, size_t size,</div><div class='add'>+				  void *cpu_addr, dma_addr_t dma_handle,</div><div class='add'>+				  struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+</div><div class='add'>+	ops-&gt;free(dev, size, cpu_addr, dma_handle, attrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/elf.h b/arch/h8300/include/asm/elf.h<br/>new file mode 100644<br/>index 000000000000..09031d0127a3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/elf.h</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+#ifndef __ASM_H8300_ELF_H</div><div class='add'>+#define __ASM_H8300_ELF_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ELF register definitions..</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/user.h&gt;</div><div class='add'>+</div><div class='add'>+typedef unsigned long elf_greg_t;</div><div class='add'>+</div><div class='add'>+#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))</div><div class='add'>+typedef elf_greg_t elf_gregset_t[ELF_NGREG];</div><div class='add'>+typedef unsigned long elf_fpregset_t;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is used to ensure we don't load something for the wrong architecture.</div><div class='add'>+ */</div><div class='add'>+#define elf_check_arch(x) ((x)-&gt;e_machine == EM_H8_300)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These are used to set parameters in the core dumps.</div><div class='add'>+ */</div><div class='add'>+#define ELF_CLASS	ELFCLASS32</div><div class='add'>+#define ELF_DATA	ELFDATA2MSB</div><div class='add'>+#define ELF_ARCH	EM_H8_300</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define ELF_CORE_EFLAGS 0x810000</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+#define ELF_CORE_EFLAGS 0x820000</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define ELF_PLAT_INIT(_r) do { (_r)-&gt;er1 = 0; } while (0)</div><div class='add'>+</div><div class='add'>+#define ELF_EXEC_PAGESIZE	4096</div><div class='add'>+</div><div class='add'>+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical</div><div class='add'>+   use of this is to invoke "./ld.so someprog" to test out a new version of</div><div class='add'>+   the loader.  We need to make sure that it is out of the way of the program</div><div class='add'>+   that it will "exec", and that there is sufficient room for the brk.  */</div><div class='add'>+</div><div class='add'>+#define ELF_ET_DYN_BASE         0xD0000000UL</div><div class='add'>+</div><div class='add'>+/* This yields a mask that user programs can use to figure out what</div><div class='add'>+   instruction set this cpu supports.  */</div><div class='add'>+</div><div class='add'>+#define ELF_HWCAP	(0)</div><div class='add'>+</div><div class='add'>+/* This yields a string that ld.so will use to load implementation</div><div class='add'>+   specific libraries for optimization.  This is more specific in</div><div class='add'>+   intent than poking at uname or /proc/cpuinfo.  */</div><div class='add'>+</div><div class='add'>+#define ELF_PLATFORM  (NULL)</div><div class='add'>+</div><div class='add'>+#define R_H8_NONE       0</div><div class='add'>+#define R_H8_DIR32      1</div><div class='add'>+#define R_H8_DIR32_28   2</div><div class='add'>+#define R_H8_DIR32_24   3</div><div class='add'>+#define R_H8_DIR32_16   4</div><div class='add'>+#define R_H8_DIR32U     6</div><div class='add'>+#define R_H8_DIR32U_28  7</div><div class='add'>+#define R_H8_DIR32U_24  8</div><div class='add'>+#define R_H8_DIR32U_20  9</div><div class='add'>+#define R_H8_DIR32U_16 10</div><div class='add'>+#define R_H8_DIR24     11</div><div class='add'>+#define R_H8_DIR24_20  12</div><div class='add'>+#define R_H8_DIR24_16  13</div><div class='add'>+#define R_H8_DIR24U    14</div><div class='add'>+#define R_H8_DIR24U_20 15</div><div class='add'>+#define R_H8_DIR24U_16 16</div><div class='add'>+#define R_H8_DIR16     17</div><div class='add'>+#define R_H8_DIR16U    18</div><div class='add'>+#define R_H8_DIR16S_32 19</div><div class='add'>+#define R_H8_DIR16S_28 20</div><div class='add'>+#define R_H8_DIR16S_24 21</div><div class='add'>+#define R_H8_DIR16S_20 22</div><div class='add'>+#define R_H8_DIR16S    23</div><div class='add'>+#define R_H8_DIR8      24</div><div class='add'>+#define R_H8_DIR8U     25</div><div class='add'>+#define R_H8_DIR8Z_32  26</div><div class='add'>+#define R_H8_DIR8Z_28  27</div><div class='add'>+#define R_H8_DIR8Z_24  28</div><div class='add'>+#define R_H8_DIR8Z_20  29</div><div class='add'>+#define R_H8_DIR8Z_16  30</div><div class='add'>+#define R_H8_PCREL16   31</div><div class='add'>+#define R_H8_PCREL8    32</div><div class='add'>+#define R_H8_BPOS      33</div><div class='add'>+#define R_H8_PCREL32   34</div><div class='add'>+#define R_H8_GOT32O    35</div><div class='add'>+#define R_H8_GOT16O    36</div><div class='add'>+#define R_H8_DIR16A8   59</div><div class='add'>+#define R_H8_DIR16R8   60</div><div class='add'>+#define R_H8_DIR24A8   61</div><div class='add'>+#define R_H8_DIR24R8   62</div><div class='add'>+#define R_H8_DIR32A16  63</div><div class='add'>+#define R_H8_ABS32     65</div><div class='add'>+#define R_H8_ABS32A16 127</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/flat.h b/arch/h8300/include/asm/flat.h<br/>new file mode 100644<br/>index 000000000000..a4898eccf2bf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/flat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/flat.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/h8300/asm/include/flat.h -- uClinux flat-format executables</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __H8300_FLAT_H__</div><div class='add'>+#define __H8300_FLAT_H__</div><div class='add'>+</div><div class='add'>+#define	flat_argvp_envp_on_stack()		1</div><div class='add'>+#define	flat_old_ram_flag(flags)		1</div><div class='add'>+#define	flat_reloc_valid(reloc, size)		((reloc) &lt;= (size))</div><div class='add'>+#define	flat_set_persistent(relval, p)		0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * on the H8 a couple of the relocations have an instruction in the</div><div class='add'>+ * top byte.  As there can only be 24bits of address space,  we just</div><div class='add'>+ * always preserve that 8bits at the top,  when it isn't an instruction</div><div class='add'>+ * is is 0 (davidm@snapgear.com)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define	flat_get_relocate_addr(rel)		(rel &amp; ~0x00000001)</div><div class='add'>+#define flat_get_addr_from_rp(rp, relval, flags, persistent) \</div><div class='add'>+	({(void)persistent; \</div><div class='add'>+		get_unaligned(rp) &amp; (((flags) &amp; FLAT_FLAG_GOTPIC) ?	\</div><div class='add'>+				     0xffffffff : 0x00ffffff); })</div><div class='add'>+#define flat_put_addr_at_rp(rp, addr, rel) \</div><div class='add'>+	put_unaligned(((*(char *)(rp)) &lt;&lt; 24) | ((addr) &amp; 0x00ffffff), (rp))</div><div class='add'>+</div><div class='add'>+#endif /* __H8300_FLAT_H__ */</div><div class='head'>diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h<br/>new file mode 100644<br/>index 000000000000..1d09b2f2e0fe<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/io.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+#ifndef _H8300_IO_H</div><div class='add'>+#define _H8300_IO_H</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/io.h&gt;</div><div class='add'>+</div><div class='add'>+/* H8/300 internal I/O functions */</div><div class='add'>+static inline unsigned char ctrl_inb(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return *(volatile unsigned char *)addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned short ctrl_inw(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return *(volatile unsigned short *)addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long ctrl_inl(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return *(volatile unsigned long *)addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ctrl_outb(unsigned char b, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile unsigned char *)addr = b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ctrl_outw(unsigned short b, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile unsigned short *)addr = b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ctrl_outl(unsigned long b, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile unsigned long *)addr = b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ctrl_bclr(int b, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	if (__builtin_constant_p(b))</div><div class='add'>+		__asm__("bclr %1,%0" : : "WU"(addr), "i"(b));</div><div class='add'>+	else</div><div class='add'>+		__asm__("bclr %w1,%0" : : "WU"(addr), "r"(b));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ctrl_bset(int b, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	if (__builtin_constant_p(b))</div><div class='add'>+		__asm__("bset %1,%0" : : "WU"(addr), "i"(b));</div><div class='add'>+	else</div><div class='add'>+		__asm__("bset %w1,%0" : : "WU"(addr), "r"(b));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_IO_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/irq.h b/arch/h8300/include/asm/irq.h<br/>new file mode 100644<br/>index 000000000000..69f23f0981b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/irq.h</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+#ifndef _H8300_IRQ_H_</div><div class='add'>+#define _H8300_IRQ_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define NR_IRQS 64</div><div class='add'>+#define IRQ_CHIP h8300h_irq_chip</div><div class='add'>+#define EXT_IRQ0 12</div><div class='add'>+#define EXT_IRQS 6</div><div class='add'>+#elif defined(CONFIG_CPU_H8S)</div><div class='add'>+#define NR_IRQS 128</div><div class='add'>+#define IRQ_CHIP h8s_irq_chip</div><div class='add'>+#define EXT_IRQ0 16</div><div class='add'>+#define EXT_IRQS 16</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline int irq_canonicalize(int irq)</div><div class='add'>+{</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void h8300_init_ipr(void);</div><div class='add'>+extern struct irq_chip h8300h_irq_chip;</div><div class='add'>+extern struct irq_chip h8s_irq_chip;</div><div class='add'>+#endif /* _H8300_IRQ_H_ */</div><div class='head'>diff --git a/arch/h8300/include/asm/irqflags.h b/arch/h8300/include/asm/irqflags.h<br/>new file mode 100644<br/>index 000000000000..5e1e3242e470<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/irqflags.h</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+#ifndef _H8300_IRQFLAGS_H</div><div class='add'>+#define _H8300_IRQFLAGS_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_H8300H</div><div class='add'>+typedef unsigned char h8300flags;</div><div class='add'>+</div><div class='add'>+static inline h8300flags arch_local_save_flags(void)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	__asm__ volatile ("stc ccr,%w0" : "=r" (flags));</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_disable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("orc  #0xc0,ccr");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_enable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("andc #0x3f,ccr");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline h8300flags arch_local_irq_save(void)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	__asm__ volatile ("stc ccr,%w0\n\t"</div><div class='add'>+		      "orc  #0xc0,ccr" : "=r" (flags));</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_restore(h8300flags flags)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("ldc %w0,ccr" : : "r" (flags) : "cc");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int arch_irqs_disabled_flags(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	return (flags &amp; 0xc0) == 0xc0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_CPU_H8S</div><div class='add'>+typedef unsigned short h8300flags;</div><div class='add'>+</div><div class='add'>+static inline h8300flags arch_local_save_flags(void)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	__asm__ volatile ("stc ccr,%w0\n\tstc exr,%x0" : "=r" (flags));</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_disable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("orc #0x80,ccr\n\t");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_enable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("andc #0x7f,ccr\n\t"</div><div class='add'>+		      "andc #0xf0,exr\n\t");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline h8300flags arch_local_irq_save(void)</div><div class='add'>+{</div><div class='add'>+	h8300flags flags;</div><div class='add'>+</div><div class='add'>+	__asm__ volatile ("stc ccr,%w0\n\t"</div><div class='add'>+		      "stc exr,%x0\n\t"</div><div class='add'>+		      "orc  #0x80,ccr\n\t"</div><div class='add'>+		      : "=r" (flags));</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_local_irq_restore(h8300flags flags)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("ldc %w0,ccr\n\t"</div><div class='add'>+		      "ldc %x0,exr"</div><div class='add'>+		      : : "r" (flags) : "cc");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int arch_irqs_disabled_flags(h8300flags flags)</div><div class='add'>+{</div><div class='add'>+	return (flags &amp; 0x0080) == 0x0080;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline int arch_irqs_disabled(void)</div><div class='add'>+{</div><div class='add'>+	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_IRQFLAGS_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/mc146818rtc.h b/arch/h8300/include/asm/mc146818rtc.h<br/>new file mode 100644<br/>index 000000000000..ab9d9646d241<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/mc146818rtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/mc146818rtc.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+/*</div><div class='add'>+ * Machine dependent access functions for RTC registers.</div><div class='add'>+ */</div><div class='add'>+#ifndef _H8300_MC146818RTC_H</div><div class='add'>+#define _H8300_MC146818RTC_H</div><div class='add'>+</div><div class='add'>+/* empty include file to satisfy the include in genrtc.c/ide-geometry.c */</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_MC146818RTC_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/mutex.h b/arch/h8300/include/asm/mutex.h<br/>new file mode 100644<br/>index 000000000000..458c1f7fbc18<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/mutex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/mutex.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+/*</div><div class='add'>+ * Pull in the generic implementation for the mutex fastpath.</div><div class='add'>+ *</div><div class='add'>+ * TODO: implement optimized primitives instead, or leave the generic</div><div class='add'>+ * implementation in place, or pick the atomic_xchg() based generic</div><div class='add'>+ * implementation. (see asm-generic/mutex-xchg.h for details)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/mutex-dec.h&gt;</div><div class='head'>diff --git a/arch/h8300/include/asm/page.h b/arch/h8300/include/asm/page.h<br/>new file mode 100644<br/>index 000000000000..3a987a567258<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/page.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+#ifndef _H8300_PAGE_H</div><div class='add'>+#define _H8300_PAGE_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/page.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAP_NR(addr) (((uintptr_t)(addr)-PAGE_OFFSET) &gt;&gt; PAGE_SHIFT)</div><div class='add'>+#define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \</div><div class='add'>+				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+extern unsigned long rom_length;</div><div class='add'>+extern unsigned long memory_start;</div><div class='add'>+extern unsigned long memory_end;</div><div class='add'>+extern unsigned long _ramend;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/page_offset.h b/arch/h8300/include/asm/page_offset.h<br/>new file mode 100644<br/>index 000000000000..888576d7cc2a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/page_offset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/page_offset.h</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+</div><div class='add'>+#define PAGE_OFFSET_RAW		0x00000000</div><div class='head'>diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h<br/>new file mode 100644<br/>index 000000000000..0b2acaa3dd84<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/pci.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#ifndef _ASM_H8300_PCI_H</div><div class='add'>+#define _ASM_H8300_PCI_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * asm-h8300/pci.h - H8/300 specific PCI declarations.</div><div class='add'>+ *</div><div class='add'>+ * Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pcibios_assign_all_busses()	0</div><div class='add'>+</div><div class='add'>+static inline void pcibios_penalize_isa_irq(int irq, int active)</div><div class='add'>+{</div><div class='add'>+	/* We don't do dynamic PCI IRQ allocation */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define PCI_DMA_BUS_IS_PHYS	(1)</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_H8300_PCI_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/pgtable.h b/arch/h8300/include/asm/pgtable.h<br/>new file mode 100644<br/>index 000000000000..8341db67821d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/pgtable.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+#ifndef _H8300_PGTABLE_H</div><div class='add'>+#define _H8300_PGTABLE_H</div><div class='add'>+#include &lt;asm-generic/pgtable-nopud.h&gt;</div><div class='add'>+#include &lt;asm-generic/pgtable.h&gt;</div><div class='add'>+#define pgtable_cache_init()   do { } while (0)</div><div class='add'>+extern void paging_init(void);</div><div class='add'>+#define PAGE_NONE		__pgprot(0)    /* these mean nothing to NO_MM */</div><div class='add'>+#define PAGE_SHARED		__pgprot(0)    /* these mean nothing to NO_MM */</div><div class='add'>+#define PAGE_COPY		__pgprot(0)    /* these mean nothing to NO_MM */</div><div class='add'>+#define PAGE_READONLY	__pgprot(0)    /* these mean nothing to NO_MM */</div><div class='add'>+#define PAGE_KERNEL		__pgprot(0)    /* these mean nothing to NO_MM */</div><div class='add'>+#define __swp_type(x)		(0)</div><div class='add'>+#define __swp_offset(x)		(0)</div><div class='add'>+#define __swp_entry(typ, off)	((swp_entry_t) { ((typ) | ((off) &lt;&lt; 7)) })</div><div class='add'>+#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='add'>+#define __swp_entry_to_pte(x)	((pte_t) { (x).val })</div><div class='add'>+#define kern_addr_valid(addr)	(1)</div><div class='add'>+#define pgprot_writecombine(prot)  (prot)</div><div class='add'>+#define pgprot_noncached pgprot_writecombine</div><div class='add'>+</div><div class='add'>+static inline int pte_file(pte_t pte) { return 0; }</div><div class='add'>+#define swapper_pg_dir ((pgd_t *) 0)</div><div class='add'>+/*</div><div class='add'>+ * ZERO_PAGE is a global shared page that is always zero: used</div><div class='add'>+ * for zero-mapped memory areas etc..</div><div class='add'>+ */</div><div class='add'>+#define ZERO_PAGE(vaddr)	(virt_to_page(0))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These would be in other places but having them here reduces the diffs.</div><div class='add'>+ */</div><div class='add'>+extern unsigned int kobjsize(const void *objp);</div><div class='add'>+extern int is_in_rom(unsigned long);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * No page table caches to initialise</div><div class='add'>+ */</div><div class='add'>+#define pgtable_cache_init()   do { } while (0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All 32bit addresses are effectively valid for vmalloc...</div><div class='add'>+ * Sort of meaningless for non-VM targets.</div><div class='add'>+ */</div><div class='add'>+#define	VMALLOC_START	0</div><div class='add'>+#define	VMALLOC_END	0xffffffff</div><div class='add'>+</div><div class='add'>+#define arch_enter_lazy_cpu_mode()    do {} while (0)</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_PGTABLE_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h<br/>new file mode 100644<br/>index 000000000000..54e3fd83c336<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/processor.h</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+/*</div><div class='add'>+ * include/asm-h8300/processor.h</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2002 Yoshinori Sato</div><div class='add'>+ *</div><div class='add'>+ * Based on: linux/asm-m68nommu/processor.h</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 1995 Hamish Macdonald</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_H8300_PROCESSOR_H</div><div class='add'>+#define __ASM_H8300_PROCESSOR_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Default implementation of macro that returns current</div><div class='add'>+ * instruction pointer ("program counter").</div><div class='add'>+ */</div><div class='add'>+#define current_text_addr() ({ __label__ _l; _l: &amp;&amp;_l; })</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/current.h&gt;</div><div class='add'>+</div><div class='add'>+static inline unsigned long rdusp(void)</div><div class='add'>+{</div><div class='add'>+	extern unsigned int	_sw_usp;</div><div class='add'>+</div><div class='add'>+	return _sw_usp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wrusp(unsigned long usp)</div><div class='add'>+{</div><div class='add'>+	extern unsigned int	_sw_usp;</div><div class='add'>+</div><div class='add'>+	_sw_usp = usp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * User space process size: 3.75GB. This is hardcoded into a few places,</div><div class='add'>+ * so don't change it unless you know what you are doing.</div><div class='add'>+ */</div><div class='add'>+#define TASK_SIZE	(0xFFFFFFFFUL)</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+#define STACK_TOP	TASK_SIZE</div><div class='add'>+#define STACK_TOP_MAX	STACK_TOP</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This decides where the kernel will search for a free chunk of vm</div><div class='add'>+ * space during mmap's. We won't be using it</div><div class='add'>+ */</div><div class='add'>+#define TASK_UNMAPPED_BASE	0</div><div class='add'>+</div><div class='add'>+struct thread_struct {</div><div class='add'>+	unsigned long  ksp;		/* kernel stack pointer */</div><div class='add'>+	unsigned long  usp;		/* user stack pointer */</div><div class='add'>+	unsigned long  ccr;		/* saved status register */</div><div class='add'>+	unsigned long  esp0;            /* points to SR of stack frame */</div><div class='add'>+	struct {</div><div class='add'>+		unsigned short *addr;</div><div class='add'>+		unsigned short inst;</div><div class='add'>+	} breakinfo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define INIT_THREAD  {						\</div><div class='add'>+	.ksp  = sizeof(init_stack) + (unsigned long)init_stack, \</div><div class='add'>+	.usp  = 0,						\</div><div class='add'>+	.ccr  = PS_S,						\</div><div class='add'>+	.esp0 = 0,						\</div><div class='add'>+	.breakinfo = {						\</div><div class='add'>+		.addr = (unsigned short *)-1,			\</div><div class='add'>+		.inst = 0					\</div><div class='add'>+	}							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Do necessary setup to start up a newly executed thread.</div><div class='add'>+ *</div><div class='add'>+ * pass the data segment into user programs if it exists,</div><div class='add'>+ * it can't hurt anything as far as I can tell</div><div class='add'>+ */</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define start_thread(_regs, _pc, _usp)				\</div><div class='add'>+do {								\</div><div class='add'>+	(_regs)-&gt;pc = (_pc);					\</div><div class='add'>+	(_regs)-&gt;ccr = 0x00;	   /* clear all flags */	\</div><div class='add'>+	(_regs)-&gt;er5 = current-&gt;mm-&gt;start_data;	/* GOT base */	\</div><div class='add'>+	(_regs)-&gt;sp = ((unsigned long)(_usp)) - sizeof(unsigned long) * 3; \</div><div class='add'>+} while (0)</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+#define start_thread(_regs, _pc, _usp)				\</div><div class='add'>+do {								\</div><div class='add'>+	(_regs)-&gt;pc = (_pc);					\</div><div class='add'>+	(_regs)-&gt;ccr = 0x00;	   /* clear kernel flag */	\</div><div class='add'>+	(_regs)-&gt;exr = 0x78;	   /* enable all interrupts */	\</div><div class='add'>+	(_regs)-&gt;er5 = current-&gt;mm-&gt;start_data;	/* GOT base */	\</div><div class='add'>+	/* 14 = space for retaddr(4), vector(4), er0(4) and exr(2) on stack */ \</div><div class='add'>+	(_regs)-&gt;sp = ((unsigned long)(_usp)) - 14;		\</div><div class='add'>+} while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Forward declaration, a strange C thing */</div><div class='add'>+struct task_struct;</div><div class='add'>+</div><div class='add'>+/* Free all resources held by a thread. */</div><div class='add'>+static inline void release_thread(struct task_struct *dead_task)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Free current thread data structures etc..</div><div class='add'>+ */</div><div class='add'>+static inline void exit_thread(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return saved PC of a blocked thread.</div><div class='add'>+ */</div><div class='add'>+unsigned long thread_saved_pc(struct task_struct *tsk);</div><div class='add'>+unsigned long get_wchan(struct task_struct *p);</div><div class='add'>+</div><div class='add'>+#define	KSTK_EIP(tsk)	\</div><div class='add'>+	({			 \</div><div class='add'>+		unsigned long eip = 0;	      \</div><div class='add'>+		if ((tsk)-&gt;thread.esp0 &gt; PAGE_SIZE &amp;&amp;	\</div><div class='add'>+		    MAP_NR((tsk)-&gt;thread.esp0) &lt; max_mapnr)	 \</div><div class='add'>+			eip = ((struct pt_regs *) (tsk)-&gt;thread.esp0)-&gt;pc; \</div><div class='add'>+		eip; })</div><div class='add'>+</div><div class='add'>+#define	KSTK_ESP(tsk)	((tsk) == current ? rdusp() : (tsk)-&gt;thread.usp)</div><div class='add'>+</div><div class='add'>+#define cpu_relax()    barrier()</div><div class='add'>+#define cpu_relax_lowlatency()	cpu_relax()</div><div class='add'>+</div><div class='add'>+#define HARD_RESET_NOW() ({		\</div><div class='add'>+	local_irq_disable();		\</div><div class='add'>+	asm("jmp @@0");			\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/ptrace.h b/arch/h8300/include/asm/ptrace.h<br/>new file mode 100644<br/>index 000000000000..e693fb463ea8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/ptrace.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+#ifndef _H8300_PTRACE_H</div><div class='add'>+#define _H8300_PTRACE_H</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef PS_S</div><div class='add'>+#define PS_S  (0x10)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define H8300_REGS_NO 11</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+#define H8300_REGS_NO 12</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define arch_has_single_step()	(1)</div><div class='add'>+</div><div class='add'>+#define user_mode(regs) (!((regs)-&gt;ccr &amp; PS_S))</div><div class='add'>+#define instruction_pointer(regs) ((regs)-&gt;pc)</div><div class='add'>+#define profile_pc(regs) instruction_pointer(regs)</div><div class='add'>+#define user_stack_pointer(regs) ((regs)-&gt;sp)</div><div class='add'>+#define current_pt_regs() ((struct pt_regs *) \</div><div class='add'>+	(THREAD_SIZE + (unsigned long)current_thread_info()) - 1)</div><div class='add'>+#define signal_pt_regs() ((struct pt_regs *)current-&gt;thread.esp0)</div><div class='add'>+#define current_user_stack_pointer() rdusp()</div><div class='add'>+#define task_pt_regs(task) \</div><div class='add'>+	((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)</div><div class='add'>+</div><div class='add'>+extern long h8300_get_reg(struct task_struct *task, int regno);</div><div class='add'>+extern int h8300_put_reg(struct task_struct *task, int regno,</div><div class='add'>+			 unsigned long data);</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* _H8300_PTRACE_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/segment.h b/arch/h8300/include/asm/segment.h<br/>new file mode 100644<br/>index 000000000000..48424c6e169f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/segment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/segment.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+#ifndef _H8300_SEGMENT_H</div><div class='add'>+#define _H8300_SEGMENT_H</div><div class='add'>+</div><div class='add'>+/* define constants */</div><div class='add'>+#define USER_DATA     (1)</div><div class='add'>+#ifndef __USER_DS</div><div class='add'>+#define __USER_DS     (USER_DATA)</div><div class='add'>+#endif</div><div class='add'>+#define USER_PROGRAM  (2)</div><div class='add'>+#define SUPER_DATA    (3)</div><div class='add'>+#ifndef __KERNEL_DS</div><div class='add'>+#define __KERNEL_DS   (SUPER_DATA)</div><div class='add'>+#endif</div><div class='add'>+#define SUPER_PROGRAM (4)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+	unsigned long seg;</div><div class='add'>+} mm_segment_t;</div><div class='add'>+</div><div class='add'>+#define MAKE_MM_SEG(s)	((mm_segment_t) { (s) })</div><div class='add'>+#define USER_DS		MAKE_MM_SEG(__USER_DS)</div><div class='add'>+#define KERNEL_DS	MAKE_MM_SEG(__KERNEL_DS)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get/set the SFC/DFC registers for MOVES instructions</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline mm_segment_t get_fs(void)</div><div class='add'>+{</div><div class='add'>+	return USER_DS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline mm_segment_t get_ds(void)</div><div class='add'>+{</div><div class='add'>+	/* return the supervisor data space code */</div><div class='add'>+	return KERNEL_DS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define segment_eq(a, b)	((a).seg == (b).seg)</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_SEGMENT_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/signal.h b/arch/h8300/include/asm/signal.h<br/>new file mode 100644<br/>index 000000000000..5870835c0470<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/signal.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+#ifndef _H8300_SIGNAL_H</div><div class='add'>+#define _H8300_SIGNAL_H</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/asm/signal.h&gt;</div><div class='add'>+</div><div class='add'>+/* Most things should be clean enough to redefine this at will, if care</div><div class='add'>+   is taken to make libc match.  */</div><div class='add'>+</div><div class='add'>+#define _NSIG		64</div><div class='add'>+#define _NSIG_BPW	32</div><div class='add'>+#define _NSIG_WORDS	(_NSIG / _NSIG_BPW)</div><div class='add'>+</div><div class='add'>+typedef unsigned long old_sigset_t;		/* at least 32 bits */</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+	unsigned long sig[_NSIG_WORDS];</div><div class='add'>+} sigset_t;</div><div class='add'>+</div><div class='add'>+#define __ARCH_HAS_SA_RESTORER</div><div class='add'>+#include &lt;asm/sigcontext.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_SIGNAL_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/smp.h b/arch/h8300/include/asm/smp.h<br/>new file mode 100644<br/>index 000000000000..9e9bd7e58922<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/smp.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+/* nothing required here yet */</div><div class='head'>diff --git a/arch/h8300/include/asm/string.h b/arch/h8300/include/asm/string.h<br/>new file mode 100644<br/>index 000000000000..5dc5a8ac0544<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/string.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/string.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+#ifndef _H8300_STRING_H_</div><div class='add'>+#define _H8300_STRING_H_</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__ /* only set these up for kernel code */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_MEMSET</div><div class='add'>+extern void *memset(void *s, int c, size_t count);</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_MEMCPY</div><div class='add'>+extern void *memcpy(void *d, const void *s, size_t count);</div><div class='add'>+</div><div class='add'>+#endif /* KERNEL */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/switch_to.h b/arch/h8300/include/asm/switch_to.h<br/>new file mode 100644<br/>index 000000000000..7ad1bf92dbc3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/switch_to.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/switch_to.h</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+#ifndef _H8300_SWITCH_TO_H</div><div class='add'>+#define _H8300_SWITCH_TO_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * switch_to(n) should switch tasks to task ptr, first checking that</div><div class='add'>+ * ptr isn't the current task, in which case it does nothing.  This</div><div class='add'>+ * also clears the TS-flag if the task we switched to has used the</div><div class='add'>+ * math co-processor latest.</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * switch_to() saves the extra registers, that are not saved</div><div class='add'>+ * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and</div><div class='add'>+ * a0-a1. Some of these are used by schedule() and its predecessors</div><div class='add'>+ * and so we might get see unexpected behaviors when a task returns</div><div class='add'>+ * with unexpected register values.</div><div class='add'>+ *</div><div class='add'>+ * syscall stores these registers itself and none of them are used</div><div class='add'>+ * by syscall after the function in the syscall has been called.</div><div class='add'>+ *</div><div class='add'>+ * Beware that resume now expects *next to be in d1 and the offset of</div><div class='add'>+ * tss to be in a1. This saves a few instructions as we no longer have</div><div class='add'>+ * to push them onto the stack and read them back right after.</div><div class='add'>+ *</div><div class='add'>+ * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)</div><div class='add'>+ *</div><div class='add'>+ * Changed 96/09/19 by Andreas Schwab</div><div class='add'>+ * pass prev in a0, next in a1, offset of tss in d1, and whether</div><div class='add'>+ * the mm structures are shared in d2 (to avoid atc flushing).</div><div class='add'>+ *</div><div class='add'>+ * H8/300 Porting 2002/09/04 Yoshinori Sato</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+asmlinkage void resume(void);</div><div class='add'>+#define switch_to(prev, next, last) \</div><div class='add'>+do {			     \</div><div class='add'>+	void *_last;					    \</div><div class='add'>+	__asm__ __volatile__(				    \</div><div class='add'>+		"mov.l	%1, er0\n\t"			    \</div><div class='add'>+		"mov.l	%2, er1\n\t"			    \</div><div class='add'>+		"mov.l	%3, er2\n\t"			    \</div><div class='add'>+		"jsr @_resume\n\t"			    \</div><div class='add'>+		"mov.l	er2,%0\n\t"			    \</div><div class='add'>+		: "=r" (_last)				    \</div><div class='add'>+		: "r" (&amp;(prev-&gt;thread)),		    \</div><div class='add'>+		  "r" (&amp;(next-&gt;thread)),		    \</div><div class='add'>+		  "g" (prev)				    \</div><div class='add'>+		: "cc", "er0", "er1", "er2", "er3");	    \</div><div class='add'>+	(last) = _last;					    \</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_SWITCH_TO_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/syscall.h b/arch/h8300/include/asm/syscall.h<br/>new file mode 100644<br/>index 000000000000..b41f688d02cf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/syscall.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/syscall.h</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+#ifndef __ASM_H8300_SYSCALLS_32_H</div><div class='add'>+#define __ASM_H8300_SYSCALLS_32_H</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+syscall_get_nr(struct task_struct *task, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return regs-&gt;orig_er0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='add'>+		      unsigned int i, unsigned int n, unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(i + n &gt; 6);</div><div class='add'>+</div><div class='add'>+	while (n &gt; 0) {</div><div class='add'>+		switch (i) {</div><div class='add'>+		case 0:</div><div class='add'>+			*args++ = regs-&gt;er1;</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			*args++ = regs-&gt;er2;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			*args++ = regs-&gt;er3;</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			*args++ = regs-&gt;er4;</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			*args++ = regs-&gt;er5;</div><div class='add'>+			break;</div><div class='add'>+		case 5:</div><div class='add'>+			*args++ = regs-&gt;er6;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+		n--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Misc syscall related bits */</div><div class='add'>+asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);</div><div class='add'>+asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+#endif /* __ASM_H8300_SYSCALLS_32_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/thread_info.h b/arch/h8300/include/asm/thread_info.h<br/>new file mode 100644<br/>index 000000000000..544c30785ad4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/thread_info.h</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+/* thread_info.h: h8300 low-level thread information</div><div class='add'>+ * adapted from the i386 and PPC versions by Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2002  David Howells (dhowells@redhat.com)</div><div class='add'>+ * - Incorporating suggestions made by Linus Torvalds and Dave Miller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_THREAD_INFO_H</div><div class='add'>+#define _ASM_THREAD_INFO_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * low level task data.</div><div class='add'>+ * If you change this, change the TI_* offsets below to match.</div><div class='add'>+ */</div><div class='add'>+struct thread_info {</div><div class='add'>+	struct task_struct *task;		/* main task structure */</div><div class='add'>+	unsigned long	   flags;		/* low level flags */</div><div class='add'>+	int		   cpu;			/* cpu we're on */</div><div class='add'>+	int		   preempt_count;	/* 0 =&gt; preemptable, &lt;0 =&gt; BUG */</div><div class='add'>+	mm_segment_t		addr_limit;</div><div class='add'>+	struct restart_block restart_block;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * macros/functions for gaining access to the thread information structure</div><div class='add'>+ */</div><div class='add'>+#define INIT_THREAD_INFO(tsk)			\</div><div class='add'>+{						\</div><div class='add'>+	.task =		&amp;tsk,			\</div><div class='add'>+	.flags =	0,			\</div><div class='add'>+	.cpu =		0,			\</div><div class='add'>+	.preempt_count = INIT_PREEMPT_COUNT,	\</div><div class='add'>+	.addr_limit	= KERNEL_DS,		\</div><div class='add'>+	.restart_block	= {			\</div><div class='add'>+		.fn = do_no_restart_syscall,	\</div><div class='add'>+	},					\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define init_thread_info	(init_thread_union.thread_info)</div><div class='add'>+#define init_stack		(init_thread_union.stack)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Size of kernel stack for each process. This must be a power of 2...</div><div class='add'>+ */</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='add'>+#define THREAD_SIZE		8192	/* 2 pages */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* how to get the thread information struct from C */</div><div class='add'>+static inline struct thread_info *current_thread_info(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti;</div><div class='add'>+</div><div class='add'>+	__asm__("mov.l	sp, %0\n\t"</div><div class='add'>+		"and.w	%1, %T0"</div><div class='add'>+		: "=&amp;r"(ti)</div><div class='add'>+		: "i" (~(THREAD_SIZE-1) &amp; 0xffff));</div><div class='add'>+	return ti;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * thread information flag bit numbers</div><div class='add'>+ */</div><div class='add'>+#define TIF_SYSCALL_TRACE	0	/* syscall trace active */</div><div class='add'>+#define TIF_SIGPENDING		1	/* signal pending */</div><div class='add'>+#define TIF_NEED_RESCHED	2	/* rescheduling necessary */</div><div class='add'>+#define TIF_SINGLESTEP		3	/* singlestepping active */</div><div class='add'>+#define TIF_MEMDIE		4	/* is terminating due to OOM killer */</div><div class='add'>+#define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */</div><div class='add'>+#define TIF_NOTIFY_RESUME	6	/* callback before returning to user */</div><div class='add'>+#define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */</div><div class='add'>+#define TIF_SYSCALL_TRACEPOINT	8	/* for ftrace syscall instrumentation */</div><div class='add'>+#define TIF_POLLING_NRFLAG	9	/* true if poll_idle() is polling TIF_NEED_RESCHED */</div><div class='add'>+</div><div class='add'>+/* as above, but as bit values */</div><div class='add'>+#define _TIF_SYSCALL_TRACE	(1 &lt;&lt; TIF_SYSCALL_TRACE)</div><div class='add'>+#define _TIF_SIGPENDING		(1 &lt;&lt; TIF_SIGPENDING)</div><div class='add'>+#define _TIF_NEED_RESCHED	(1 &lt;&lt; TIF_NEED_RESCHED)</div><div class='add'>+#define _TIF_NOTIFY_RESUME	(1 &lt;&lt; TIF_NOTIFY_RESUME)</div><div class='add'>+#define _TIF_SINGLESTEP		(1 &lt;&lt; TIF_SINGLESTEP)</div><div class='add'>+#define _TIF_SYSCALL_AUDIT	(1 &lt;&lt; TIF_SYSCALL_AUDIT)</div><div class='add'>+#define _TIF_SYSCALL_TRACEPOINT	(1 &lt;&lt; TIF_SYSCALL_TRACEPOINT)</div><div class='add'>+#define _TIF_POLLING_NRFLAG	(1 &lt;&lt; TIF_POLLING_NRFLAG)</div><div class='add'>+</div><div class='add'>+/* work to do in syscall trace */</div><div class='add'>+#define _TIF_WORK_SYSCALL_MASK	(_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \</div><div class='add'>+				 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)</div><div class='add'>+</div><div class='add'>+/* work to do on any return to u-space */</div><div class='add'>+#define _TIF_ALLWORK_MASK	(_TIF_SYSCALL_TRACE | _TIF_SIGPENDING      | \</div><div class='add'>+				 _TIF_NEED_RESCHED  | _TIF_SYSCALL_AUDIT   | \</div><div class='add'>+				 _TIF_SINGLESTEP    | _TIF_NOTIFY_RESUME   | \</div><div class='add'>+				 _TIF_SYSCALL_TRACEPOINT)</div><div class='add'>+</div><div class='add'>+/* work to do on interrupt/exception return */</div><div class='add'>+#define _TIF_WORK_MASK		(_TIF_ALLWORK_MASK &amp; ~(_TIF_SYSCALL_TRACE | \</div><div class='add'>+				 _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP))</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_THREAD_INFO_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/tlb.h b/arch/h8300/include/asm/tlb.h<br/>new file mode 100644<br/>index 000000000000..2c6fa4eed448<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/tlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/tlb.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+#ifndef __H8300_TLB_H__</div><div class='add'>+#define __H8300_TLB_H__</div><div class='add'>+</div><div class='add'>+#define tlb_flush(tlb)	do { } while (0)</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/tlb.h&gt;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/asm/traps.h b/arch/h8300/include/asm/traps.h<br/>new file mode 100644<br/>index 000000000000..aa34e75fd767<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/traps.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/include/asm-h8300/traps.h</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2003 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _H8300_TRAPS_H</div><div class='add'>+#define _H8300_TRAPS_H</div><div class='add'>+</div><div class='add'>+extern void _system_call(void);</div><div class='add'>+extern void _interrupt_entry(void);</div><div class='add'>+extern void _trace_break(void);</div><div class='add'>+extern void _nmi(void);</div><div class='add'>+extern void _interrupt_entry(void);</div><div class='add'>+</div><div class='add'>+extern unsigned long *_interrupt_redirect_table;</div><div class='add'>+</div><div class='add'>+#define JMP_OP 0x5a000000</div><div class='add'>+#define JSR_OP 0x5e000000</div><div class='add'>+#define VECTOR(address) ((JMP_OP)|((unsigned long)address))</div><div class='add'>+#define REDIRECT(address) ((JSR_OP)|((unsigned long)address))</div><div class='add'>+#define CPU_VECTOR ((unsigned long *)0x000000)</div><div class='add'>+#define ADDR_MASK (0xffffff)</div><div class='add'>+</div><div class='add'>+#define TRACE_VEC 5</div><div class='add'>+</div><div class='add'>+#define TRAP0_VEC 8</div><div class='add'>+#define TRAP1_VEC 9</div><div class='add'>+#define TRAP2_VEC 10</div><div class='add'>+#define TRAP3_VEC 11</div><div class='add'>+</div><div class='add'>+extern char _start, _etext;</div><div class='add'>+#define check_kernel_text(addr) \</div><div class='add'>+	((addr &gt;= (unsigned long)(&amp;_start)) &amp;&amp; \</div><div class='add'>+	 (addr &lt;  (unsigned long)(&amp;_etext)))</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_TRAPS_H */</div><div class='head'>diff --git a/arch/h8300/include/asm/user.h b/arch/h8300/include/asm/user.h<br/>new file mode 100644<br/>index 000000000000..2e3555f451f0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/asm/user.h</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+#ifndef _H8300_USER_H</div><div class='add'>+#define _H8300_USER_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+/* Core file format: The core file is written in such a way that gdb</div><div class='add'>+   can understand it and provide useful information to the user (under</div><div class='add'>+   linux we use the 'trad-core' bfd).  There are quite a number of</div><div class='add'>+   obstacles to being able to view the contents of the floating point</div><div class='add'>+   registers, and until these are solved you will not be able to view the</div><div class='add'>+   contents of them.  Actually, you can read in the core file and look at</div><div class='add'>+   the contents of the user struct to find out what the floating point</div><div class='add'>+   registers contain.</div><div class='add'>+   The actual file contents are as follows:</div><div class='add'>+   UPAGE: 1 page consisting of a user struct that tells gdb what is present</div><div class='add'>+   in the file.  Directly after this is a copy of the task_struct, which</div><div class='add'>+   is currently not used by gdb, but it may come in useful at some point.</div><div class='add'>+   All of the registers are stored as part of the upage.  The upage should</div><div class='add'>+   always be only one page.</div><div class='add'>+   DATA: The data area is stored.  We use current-&gt;end_text to</div><div class='add'>+   current-&gt;brk to pick up all of the user variables, plus any memory</div><div class='add'>+   that may have been malloced.  No attempt is made to determine if a page</div><div class='add'>+   is demand-zero or if a page is totally unused, we just cover the entire</div><div class='add'>+   range.  All of the addresses are rounded in such a way that an integral</div><div class='add'>+   number of pages is written.</div><div class='add'>+   STACK: We need the stack information in order to get a meaningful</div><div class='add'>+   backtrace.  We need to write the data from (esp) to</div><div class='add'>+   current-&gt;start_stack, so we round each of these off in order to be able</div><div class='add'>+   to write an integer number of pages.</div><div class='add'>+   The minimum core file size is 3 pages, or 12288 bytes.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+/* This is the old layout of "struct pt_regs" as of Linux 1.x, and</div><div class='add'>+   is still the layout used by user (the new pt_regs doesn't have</div><div class='add'>+   all registers). */</div><div class='add'>+struct user_regs_struct {</div><div class='add'>+	long er1, er2, er3, er4, er5, er6;</div><div class='add'>+	long er0;</div><div class='add'>+	long usp;</div><div class='add'>+	long orig_er0;</div><div class='add'>+	long ccr;</div><div class='add'>+	long pc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* When the kernel dumps core, it starts by dumping the user struct -</div><div class='add'>+   this will be used by gdb to figure out where the data and stack segments</div><div class='add'>+   are within the file, and what virtual addresses to use. */</div><div class='add'>+struct user {</div><div class='add'>+/* We start with the registers, to mimic the way that "memory" is returned</div><div class='add'>+   from the ptrace(3,...) function.  */</div><div class='add'>+	struct user_regs_struct regs;	/* Where the registers are actually stored */</div><div class='add'>+/* ptrace does not yet supply these.  Someday.... */</div><div class='add'>+/* The rest of this junk is to help gdb figure out what goes where */</div><div class='add'>+	unsigned long int u_tsize;	/* Text segment size (pages). */</div><div class='add'>+	unsigned long int u_dsize;	/* Data segment size (pages). */</div><div class='add'>+	unsigned long int u_ssize;	/* Stack segment size (pages). */</div><div class='add'>+	unsigned long start_code;     /* Starting virtual address of text. */</div><div class='add'>+	unsigned long start_stack;	/* Starting virtual address of stack area.</div><div class='add'>+					   This is actually the bottom of the stack,</div><div class='add'>+					   the top of the stack is always found in the</div><div class='add'>+					   esp register.  */</div><div class='add'>+	long int signal;		/* Signal that caused the core dump. */</div><div class='add'>+	int reserved;			/* No longer used */</div><div class='add'>+	unsigned long u_ar0;		/* Used by gdb to help find the values for */</div><div class='add'>+	/* the registers. */</div><div class='add'>+	unsigned long magic;		/* To uniquely identify a core file */</div><div class='add'>+	char u_comm[32];		/* User command that was responsible */</div><div class='add'>+};</div><div class='add'>+#define NBPG PAGE_SIZE</div><div class='add'>+#define UPAGES 1</div><div class='add'>+#define HOST_TEXT_START_ADDR (u.start_code)</div><div class='add'>+#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/Kbuild b/arch/h8300/include/uapi/asm/Kbuild<br/>new file mode 100644<br/>index 000000000000..fb6101a5d4f1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/Kbuild</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# UAPI Header export list</div><div class='add'>+include include/uapi/asm-generic/Kbuild.asm</div><div class='add'>+</div><div class='add'>+header-y += auxvec.h</div><div class='add'>+header-y += bitsperlong.h</div><div class='add'>+header-y += errno.h</div><div class='add'>+header-y += fcntl.h</div><div class='add'>+header-y += ioctl.h</div><div class='add'>+header-y += ioctls.h</div><div class='add'>+header-y += ipcbuf.h</div><div class='add'>+header-y += kvm_para.h</div><div class='add'>+header-y += mman.h</div><div class='add'>+header-y += msgbuf.h</div><div class='add'>+header-y += param.h</div><div class='add'>+header-y += poll.h</div><div class='add'>+header-y += posix_types.h</div><div class='add'>+header-y += resource.h</div><div class='add'>+header-y += sembuf.h</div><div class='add'>+header-y += setup.h</div><div class='add'>+header-y += shmbuf.h</div><div class='add'>+header-y += siginfo.h</div><div class='add'>+header-y += socket.h</div><div class='add'>+header-y += sockios.h</div><div class='add'>+header-y += stat.h</div><div class='add'>+header-y += statfs.h</div><div class='add'>+header-y += swab.h</div><div class='add'>+header-y += termbits.h</div><div class='add'>+header-y += termios.h</div><div class='add'>+header-y += types.h</div><div class='add'>+header-y += unistd.h</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/byteorder.h b/arch/h8300/include/uapi/asm/byteorder.h<br/>new file mode 100644<br/>index 000000000000..13539da99efd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/byteorder.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/byteorder.h</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+#ifndef _H8300_BYTEORDER_H</div><div class='add'>+#define _H8300_BYTEORDER_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/byteorder/big_endian.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _H8300_BYTEORDER_H */</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/ptrace.h b/arch/h8300/include/uapi/asm/ptrace.h<br/>new file mode 100644<br/>index 000000000000..e132670d70ec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/ptrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+#ifndef _UAPI_H8300_PTRACE_H</div><div class='add'>+#define _UAPI_H8300_PTRACE_H</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+#define PT_ER1	   0</div><div class='add'>+#define PT_ER2	   1</div><div class='add'>+#define PT_ER3	   2</div><div class='add'>+#define PT_ER4	   3</div><div class='add'>+#define PT_ER5	   4</div><div class='add'>+#define PT_ER6	   5</div><div class='add'>+#define PT_ER0	   6</div><div class='add'>+#define PT_USP	   7</div><div class='add'>+#define PT_ORIG_ER0	   8</div><div class='add'>+#define PT_CCR	   9</div><div class='add'>+#define PT_PC	   10</div><div class='add'>+#define PT_EXR     11</div><div class='add'>+</div><div class='add'>+/* this struct defines the way the registers are stored on the</div><div class='add'>+   stack during a system call. */</div><div class='add'>+</div><div class='add'>+struct pt_regs {</div><div class='add'>+	long     retpc;</div><div class='add'>+	long     er4;</div><div class='add'>+	long     er5;</div><div class='add'>+	long     er6;</div><div class='add'>+	long     er3;</div><div class='add'>+	long     er2;</div><div class='add'>+	long     er1;</div><div class='add'>+	long     orig_er0;</div><div class='add'>+	long	 sp;</div><div class='add'>+	unsigned short	 ccr;</div><div class='add'>+	long     er0;</div><div class='add'>+	long     vector;</div><div class='add'>+#if defined(__H8300S__)</div><div class='add'>+	unsigned short	 exr;</div><div class='add'>+#endif</div><div class='add'>+	unsigned long  pc;</div><div class='add'>+} __attribute__((aligned(2), packed));</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* _UAPI_H8300_PTRACE_H */</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/sigcontext.h b/arch/h8300/include/uapi/asm/sigcontext.h<br/>new file mode 100644<br/>index 000000000000..c41fdaa04657<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/sigcontext.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+#ifndef _ASM_H8300_SIGCONTEXT_H</div><div class='add'>+#define _ASM_H8300_SIGCONTEXT_H</div><div class='add'>+</div><div class='add'>+struct sigcontext {</div><div class='add'>+	unsigned long  sc_mask;		/* old sigmask */</div><div class='add'>+	unsigned long  sc_usp;		/* old user stack pointer */</div><div class='add'>+	unsigned long  sc_er0;</div><div class='add'>+	unsigned long  sc_er1;</div><div class='add'>+	unsigned long  sc_er2;</div><div class='add'>+	unsigned long  sc_er3;</div><div class='add'>+	unsigned long  sc_er4;</div><div class='add'>+	unsigned long  sc_er5;</div><div class='add'>+	unsigned long  sc_er6;</div><div class='add'>+	unsigned short sc_ccr;</div><div class='add'>+	unsigned long  sc_pc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/signal.h b/arch/h8300/include/uapi/asm/signal.h<br/>new file mode 100644<br/>index 000000000000..af3a6c37fee6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/signal.h</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+#ifndef _UAPI_H8300_SIGNAL_H</div><div class='add'>+#define _UAPI_H8300_SIGNAL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Avoid too many header ordering problems.  */</div><div class='add'>+struct siginfo;</div><div class='add'>+</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+/* Here we must cater to libcs that poke about in kernel headers.  */</div><div class='add'>+</div><div class='add'>+#define NSIG		32</div><div class='add'>+typedef unsigned long sigset_t;</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+</div><div class='add'>+#define SIGHUP		 1</div><div class='add'>+#define SIGINT		 2</div><div class='add'>+#define SIGQUIT		 3</div><div class='add'>+#define SIGILL		 4</div><div class='add'>+#define SIGTRAP		 5</div><div class='add'>+#define SIGABRT		 6</div><div class='add'>+#define SIGIOT		 6</div><div class='add'>+#define SIGBUS		 7</div><div class='add'>+#define SIGFPE		 8</div><div class='add'>+#define SIGKILL		 9</div><div class='add'>+#define SIGUSR1		10</div><div class='add'>+#define SIGSEGV		11</div><div class='add'>+#define SIGUSR2		12</div><div class='add'>+#define SIGPIPE		13</div><div class='add'>+#define SIGALRM		14</div><div class='add'>+#define SIGTERM		15</div><div class='add'>+#define SIGSTKFLT	16</div><div class='add'>+#define SIGCHLD		17</div><div class='add'>+#define SIGCONT		18</div><div class='add'>+#define SIGSTOP		19</div><div class='add'>+#define SIGTSTP		20</div><div class='add'>+#define SIGTTIN		21</div><div class='add'>+#define SIGTTOU		22</div><div class='add'>+#define SIGURG		23</div><div class='add'>+#define SIGXCPU		24</div><div class='add'>+#define SIGXFSZ		25</div><div class='add'>+#define SIGVTALRM	26</div><div class='add'>+#define SIGPROF		27</div><div class='add'>+#define SIGWINCH	28</div><div class='add'>+#define SIGIO		29</div><div class='add'>+#define SIGPOLL		SIGIO</div><div class='add'>+/*</div><div class='add'>+#define SIGLOST		29</div><div class='add'>+*/</div><div class='add'>+#define SIGPWR		30</div><div class='add'>+#define SIGSYS		31</div><div class='add'>+#define	SIGUNUSED	31</div><div class='add'>+</div><div class='add'>+/* These should not be considered constants from userland.  */</div><div class='add'>+#define SIGRTMIN	32</div><div class='add'>+#define SIGRTMAX	_NSIG</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SA_FLAGS values:</div><div class='add'>+ *</div><div class='add'>+ * SA_ONSTACK indicates that a registered stack_t will be used.</div><div class='add'>+ * SA_RESTART flag to get restarting signals (which were the default long ago)</div><div class='add'>+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.</div><div class='add'>+ * SA_RESETHAND clears the handler when the signal is delivered.</div><div class='add'>+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.</div><div class='add'>+ * SA_NODEFER prevents the current signal from being masked in the handler.</div><div class='add'>+ *</div><div class='add'>+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single</div><div class='add'>+ * Unix names RESETHAND and NODEFER respectively.</div><div class='add'>+ */</div><div class='add'>+#define SA_NOCLDSTOP	0x00000001</div><div class='add'>+#define SA_NOCLDWAIT	0x00000002 /* not supported yet */</div><div class='add'>+#define SA_SIGINFO	0x00000004</div><div class='add'>+#define SA_ONSTACK	0x08000000</div><div class='add'>+#define SA_RESTART	0x10000000</div><div class='add'>+#define SA_NODEFER	0x40000000</div><div class='add'>+#define SA_RESETHAND	0x80000000</div><div class='add'>+</div><div class='add'>+#define SA_NOMASK	SA_NODEFER</div><div class='add'>+#define SA_ONESHOT	SA_RESETHAND</div><div class='add'>+</div><div class='add'>+#define SA_RESTORER	0x04000000</div><div class='add'>+</div><div class='add'>+#define MINSIGSTKSZ	2048</div><div class='add'>+#define SIGSTKSZ	8192</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/signal-defs.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+/* Here we must cater to libcs that poke about in kernel headers.  */</div><div class='add'>+</div><div class='add'>+struct sigaction {</div><div class='add'>+	union {</div><div class='add'>+	  __sighandler_t _sa_handler;</div><div class='add'>+	  void (*_sa_sigaction)(int, struct siginfo *, void *);</div><div class='add'>+	} _u;</div><div class='add'>+	sigset_t sa_mask;</div><div class='add'>+	unsigned long sa_flags;</div><div class='add'>+	void (*sa_restorer)(void);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define sa_handler	_u._sa_handler</div><div class='add'>+#define sa_sigaction	_u._sa_sigaction</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+</div><div class='add'>+typedef struct sigaltstack {</div><div class='add'>+	void *ss_sp;</div><div class='add'>+	int ss_flags;</div><div class='add'>+	size_t ss_size;</div><div class='add'>+} stack_t;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_H8300_SIGNAL_H */</div><div class='head'>diff --git a/arch/h8300/include/uapi/asm/unistd.h b/arch/h8300/include/uapi/asm/unistd.h<br/>new file mode 100644<br/>index 000000000000..7a2eb698def3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/uapi/asm/unistd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/include/uapi/asm/unistd.h</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+#define __ARCH_NOMMU</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/unistd.h&gt;</div><div class='head'>diff --git a/arch/h8300/kernel/Makefile b/arch/h8300/kernel/Makefile<br/>new file mode 100644<br/>index 000000000000..5bc33f2fcc08<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/Makefile</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the linux kernel.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+extra-y := vmlinux.lds</div><div class='add'>+</div><div class='add'>+obj-y := process.o traps.o ptrace.o \</div><div class='add'>+	 signal.o setup.o syscalls.o \</div><div class='add'>+	 irq.o entry.o dma.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ROMKERNEL) += head_rom.o</div><div class='add'>+obj-$(CONFIG_RAMKERNEL) += head_ram.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o</div><div class='add'>+obj-$(CONFIG_H8300H_SIM) += sim-console.o</div><div class='add'>+obj-$(CONFIG_H8S_SIM) += sim-console.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CPU_H8300H) += ptrace_h.o</div><div class='add'>+obj-$(CONFIG_CPU_H8S) += ptrace_s.o</div><div class='head'>diff --git a/arch/h8300/kernel/asm-offsets.c b/arch/h8300/kernel/asm-offsets.c<br/>new file mode 100644<br/>index 000000000000..dc2d16ce8a0d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is used to generate definitions needed by</div><div class='add'>+ * assembly language modules.</div><div class='add'>+ *</div><div class='add'>+ * We use the technique used in the OSF Mach kernel code:</div><div class='add'>+ * generate asm statements containing #defines,</div><div class='add'>+ * compile this file to assembler, and then extract the</div><div class='add'>+ * #defines from the assembly-language output.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/stddef.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/kernel_stat.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/kbuild.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+int main(void)</div><div class='add'>+{</div><div class='add'>+	/* offsets into the task struct */</div><div class='add'>+	OFFSET(TASK_STATE, task_struct, state);</div><div class='add'>+	OFFSET(TASK_FLAGS, task_struct, flags);</div><div class='add'>+	OFFSET(TASK_PTRACE, task_struct, ptrace);</div><div class='add'>+	OFFSET(TASK_BLOCKED, task_struct, blocked);</div><div class='add'>+	OFFSET(TASK_THREAD, task_struct, thread);</div><div class='add'>+	OFFSET(TASK_THREAD_INFO, task_struct, stack);</div><div class='add'>+	OFFSET(TASK_MM, task_struct, mm);</div><div class='add'>+	OFFSET(TASK_ACTIVE_MM, task_struct, active_mm);</div><div class='add'>+</div><div class='add'>+	/* offsets into the irq_cpustat_t struct */</div><div class='add'>+	DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t,</div><div class='add'>+						 __softirq_pending));</div><div class='add'>+</div><div class='add'>+	/* offsets into the thread struct */</div><div class='add'>+	OFFSET(THREAD_KSP, thread_struct, ksp);</div><div class='add'>+	OFFSET(THREAD_USP, thread_struct, usp);</div><div class='add'>+	OFFSET(THREAD_CCR, thread_struct, ccr);</div><div class='add'>+</div><div class='add'>+	/* offsets into the pt_regs struct */</div><div class='add'>+	DEFINE(LER0,  offsetof(struct pt_regs, er0)      - sizeof(long));</div><div class='add'>+	DEFINE(LER1,  offsetof(struct pt_regs, er1)      - sizeof(long));</div><div class='add'>+	DEFINE(LER2,  offsetof(struct pt_regs, er2)      - sizeof(long));</div><div class='add'>+	DEFINE(LER3,  offsetof(struct pt_regs, er3)      - sizeof(long));</div><div class='add'>+	DEFINE(LER4,  offsetof(struct pt_regs, er4)      - sizeof(long));</div><div class='add'>+	DEFINE(LER5,  offsetof(struct pt_regs, er5)      - sizeof(long));</div><div class='add'>+	DEFINE(LER6,  offsetof(struct pt_regs, er6)      - sizeof(long));</div><div class='add'>+	DEFINE(LORIG, offsetof(struct pt_regs, orig_er0) - sizeof(long));</div><div class='add'>+	DEFINE(LSP,   offsetof(struct pt_regs, sp)       - sizeof(long));</div><div class='add'>+	DEFINE(LCCR,  offsetof(struct pt_regs, ccr)      - sizeof(long));</div><div class='add'>+	DEFINE(LVEC,  offsetof(struct pt_regs, vector)   - sizeof(long));</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	DEFINE(LEXR,  offsetof(struct pt_regs, exr)      - sizeof(long));</div><div class='add'>+#endif</div><div class='add'>+	DEFINE(LRET,  offsetof(struct pt_regs, pc)       - sizeof(long));</div><div class='add'>+</div><div class='add'>+	DEFINE(PT_PTRACED, PT_PTRACED);</div><div class='add'>+</div><div class='add'>+	/* offsets in thread_info structure */</div><div class='add'>+	OFFSET(TI_TASK, thread_info, task);</div><div class='add'>+	OFFSET(TI_FLAGS, thread_info, flags);</div><div class='add'>+	OFFSET(TI_CPU, thread_info, cpu);</div><div class='add'>+	OFFSET(TI_PRE, thread_info, preempt_count);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/dma.c b/arch/h8300/kernel/dma.c<br/>new file mode 100644<br/>index 000000000000..eeb13d3f2424<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/dma.c</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+</div><div class='add'>+static void *dma_alloc(struct device *dev, size_t size,</div><div class='add'>+		       dma_addr_t *dma_handle, gfp_t gfp,</div><div class='add'>+		       struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	void *ret;</div><div class='add'>+</div><div class='add'>+	/* ignore region specifiers */</div><div class='add'>+	gfp &amp;= ~(__GFP_DMA | __GFP_HIGHMEM);</div><div class='add'>+</div><div class='add'>+	if (dev == NULL || (*dev-&gt;dma_mask &lt; 0xffffffff))</div><div class='add'>+		gfp |= GFP_DMA;</div><div class='add'>+	ret = (void *)__get_free_pages(gfp, get_order(size));</div><div class='add'>+</div><div class='add'>+	if (ret != NULL) {</div><div class='add'>+		memset(ret, 0, size);</div><div class='add'>+		*dma_handle = virt_to_phys(ret);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dma_free(struct device *dev, size_t size,</div><div class='add'>+		     void *vaddr, dma_addr_t dma_handle,</div><div class='add'>+		     struct dma_attrs *attrs)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	free_pages((unsigned long)vaddr, get_order(size));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t map_page(struct device *dev, struct page *page,</div><div class='add'>+				  unsigned long offset, size_t size,</div><div class='add'>+				  enum dma_data_direction direction,</div><div class='add'>+				  struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	return page_to_phys(page) + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int map_sg(struct device *dev, struct scatterlist *sgl,</div><div class='add'>+		  int nents, enum dma_data_direction direction,</div><div class='add'>+		  struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sgl, sg, nents, i) {</div><div class='add'>+		sg-&gt;dma_address = sg_phys(sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nents;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct dma_map_ops h8300_dma_map_ops = {</div><div class='add'>+	.alloc = dma_alloc,</div><div class='add'>+	.free = dma_free,</div><div class='add'>+	.map_page = map_page,</div><div class='add'>+	.map_sg = map_sg,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(h8300_dma_map_ops);</div><div class='head'>diff --git a/arch/h8300/kernel/entry.S b/arch/h8300/kernel/entry.S<br/>new file mode 100644<br/>index 000000000000..797dfa8ddeb2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/entry.S</a></div><div class='hunk'>@@ -0,0 +1,414 @@</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/h8300/kernel/entry.S</div><div class='add'>+ *</div><div class='add'>+ *  Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *  David McCullough &lt;davidm@snapgear.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *  entry.S</div><div class='add'>+ *  include exception/interrupt gateway</div><div class='add'>+ *          system call entry</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sys.h&gt;</div><div class='add'>+#include &lt;asm/unistd.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define USERRET 8</div><div class='add'>+INTERRUPTS = 64</div><div class='add'>+	.h8300h</div><div class='add'>+	.macro	SHLL2 reg</div><div class='add'>+	shll.l	\reg</div><div class='add'>+	shll.l	\reg</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SHLR2 reg</div><div class='add'>+	shlr.l	\reg</div><div class='add'>+	shlr.l	\reg</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SAVEREGS</div><div class='add'>+	mov.l	er0,@-sp</div><div class='add'>+	mov.l	er1,@-sp</div><div class='add'>+	mov.l	er2,@-sp</div><div class='add'>+	mov.l	er3,@-sp</div><div class='add'>+	.endm</div><div class='add'>+	.macro	RESTOREREGS</div><div class='add'>+	mov.l	@sp+,er3</div><div class='add'>+	mov.l	@sp+,er2</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SAVEEXR</div><div class='add'>+	.endm</div><div class='add'>+	.macro	RESTOREEXR</div><div class='add'>+	.endm</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+#define USERRET 10</div><div class='add'>+#define USEREXR 8</div><div class='add'>+INTERRUPTS = 128</div><div class='add'>+	.h8300s</div><div class='add'>+	.macro	SHLL2 reg</div><div class='add'>+	shll.l	#2,\reg</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SHLR2 reg</div><div class='add'>+	shlr.l	#2,\reg</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SAVEREGS</div><div class='add'>+	stm.l	er0-er3,@-sp</div><div class='add'>+	.endm</div><div class='add'>+	.macro	RESTOREREGS</div><div class='add'>+	ldm.l	@sp+,er2-er3</div><div class='add'>+	.endm</div><div class='add'>+	.macro	SAVEEXR</div><div class='add'>+	mov.w	@(USEREXR:16,er0),r1</div><div class='add'>+	mov.w	r1,@(LEXR-LER3:16,sp)		/* copy EXR */</div><div class='add'>+	.endm</div><div class='add'>+	.macro	RESTOREEXR</div><div class='add'>+	mov.w	@(LEXR-LER1:16,sp),r1		/* restore EXR */</div><div class='add'>+	mov.b	r1l,r1h</div><div class='add'>+	mov.w	r1,@(USEREXR:16,er0)</div><div class='add'>+	.endm</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* CPU context save/restore macros. */</div><div class='add'>+</div><div class='add'>+	.macro	SAVE_ALL</div><div class='add'>+	mov.l	er0,@-sp</div><div class='add'>+	stc	ccr,r0l				/* check kernel mode */</div><div class='add'>+	btst	#4,r0l</div><div class='add'>+	bne	5f</div><div class='add'>+</div><div class='add'>+	/* user mode */</div><div class='add'>+	mov.l	sp,@_sw_usp</div><div class='add'>+	mov.l	@sp,er0				/* restore saved er0 */</div><div class='add'>+	orc	#0x10,ccr			/* switch kernel stack */</div><div class='add'>+	mov.l	@_sw_ksp,sp</div><div class='add'>+	sub.l	#(LRET-LORIG),sp		/* allocate LORIG - LRET */</div><div class='add'>+	SAVEREGS</div><div class='add'>+	mov.l   @_sw_usp,er0</div><div class='add'>+	mov.l   @(USERRET:16,er0),er1           /* copy the RET addr */</div><div class='add'>+	mov.l   er1,@(LRET-LER3:16,sp)</div><div class='add'>+	SAVEEXR</div><div class='add'>+</div><div class='add'>+	mov.l	@(LORIG-LER3:16,sp),er0</div><div class='add'>+	mov.l	er0,@(LER0-LER3:16,sp)		/* copy ER0 */</div><div class='add'>+	mov.w	e1,r1				/* e1 highbyte = ccr */</div><div class='add'>+	and	#0xef,r1h			/* mask mode? flag */</div><div class='add'>+	bra	6f</div><div class='add'>+5:</div><div class='add'>+	/* kernel mode */</div><div class='add'>+	mov.l	@sp,er0				/* restore saved er0 */</div><div class='add'>+	subs	#2,sp				/* set dummy ccr */</div><div class='add'>+	subs	#4,sp				/* set dummp sp */</div><div class='add'>+	SAVEREGS</div><div class='add'>+	mov.w	@(LRET-LER3:16,sp),r1		/* copy old ccr */</div><div class='add'>+6:</div><div class='add'>+	mov.b	r1h,r1l</div><div class='add'>+	mov.b	#0,r1h</div><div class='add'>+	mov.w	r1,@(LCCR-LER3:16,sp)		/* set ccr */</div><div class='add'>+	mov.l	@_sw_usp,er2</div><div class='add'>+	mov.l	er2,@(LSP-LER3:16,sp)		/* set usp */</div><div class='add'>+	mov.l	er6,@-sp			/* syscall arg #6 */</div><div class='add'>+	mov.l	er5,@-sp			/* syscall arg #5 */</div><div class='add'>+	mov.l	er4,@-sp			/* syscall arg #4 */</div><div class='add'>+	.endm					/* r1 = ccr */</div><div class='add'>+</div><div class='add'>+	.macro	RESTORE_ALL</div><div class='add'>+	mov.l	@sp+,er4</div><div class='add'>+	mov.l	@sp+,er5</div><div class='add'>+	mov.l	@sp+,er6</div><div class='add'>+	RESTOREREGS</div><div class='add'>+	mov.w	@(LCCR-LER1:16,sp),r0		/* check kernel mode */</div><div class='add'>+	btst	#4,r0l</div><div class='add'>+	bne	7f</div><div class='add'>+</div><div class='add'>+	orc	#0xc0,ccr</div><div class='add'>+	mov.l	@(LSP-LER1:16,sp),er0</div><div class='add'>+	mov.l	@(LER0-LER1:16,sp),er1		/* restore ER0 */</div><div class='add'>+	mov.l	er1,@er0</div><div class='add'>+	RESTOREEXR</div><div class='add'>+	mov.w	@(LCCR-LER1:16,sp),r1		/* restore the RET addr */</div><div class='add'>+	mov.b	r1l,r1h</div><div class='add'>+	mov.b	@(LRET+1-LER1:16,sp),r1l</div><div class='add'>+	mov.w	r1,e1</div><div class='add'>+	mov.w	@(LRET+2-LER1:16,sp),r1</div><div class='add'>+	mov.l	er1,@(USERRET:16,er0)</div><div class='add'>+</div><div class='add'>+	mov.l	@sp+,er1</div><div class='add'>+	add.l	#(LRET-LER1),sp			/* remove LORIG - LRET */</div><div class='add'>+	mov.l	sp,@_sw_ksp</div><div class='add'>+	andc	#0xef,ccr			/* switch to user mode */</div><div class='add'>+	mov.l	er0,sp</div><div class='add'>+	bra	8f</div><div class='add'>+7:</div><div class='add'>+	mov.l	@sp+,er1</div><div class='add'>+	add.l	#10,sp</div><div class='add'>+8:</div><div class='add'>+	mov.l	@sp+,er0</div><div class='add'>+	adds	#4,sp				/* remove the sw created LVEC */</div><div class='add'>+	rte</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+.globl _system_call</div><div class='add'>+.globl ret_from_exception</div><div class='add'>+.globl ret_from_fork</div><div class='add'>+.globl ret_from_kernel_thread</div><div class='add'>+.globl ret_from_interrupt</div><div class='add'>+.globl _interrupt_redirect_table</div><div class='add'>+.globl _sw_ksp,_sw_usp</div><div class='add'>+.globl _resume</div><div class='add'>+.globl _interrupt_entry</div><div class='add'>+.globl _trace_break</div><div class='add'>+.globl _nmi</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+	.section .int_redirect,"ax"</div><div class='add'>+_interrupt_redirect_table:</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.rept	7</div><div class='add'>+	.long	0</div><div class='add'>+	.endr</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.rept	5</div><div class='add'>+	.long	0</div><div class='add'>+	.endr</div><div class='add'>+	jmp	@_trace_break</div><div class='add'>+	.long	0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	jsr	@_interrupt_entry		/* NMI */</div><div class='add'>+	jmp	@_system_call			/* TRAPA #0 (System call) */</div><div class='add'>+	.long	0</div><div class='add'>+	.long	0</div><div class='add'>+	jmp	@_trace_break			/* TRAPA #3 (breakpoint) */</div><div class='add'>+	.rept	INTERRUPTS-12</div><div class='add'>+	jsr	@_interrupt_entry</div><div class='add'>+	.endr</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_RAMKERNEL)</div><div class='add'>+.globl _interrupt_redirect_table</div><div class='add'>+	.section .bss</div><div class='add'>+_interrupt_redirect_table:</div><div class='add'>+	.space	4</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	.section .text</div><div class='add'>+	.align	2</div><div class='add'>+_interrupt_entry:</div><div class='add'>+	SAVE_ALL</div><div class='add'>+/* r1l is saved ccr */</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	add.l	#LVEC,er0</div><div class='add'>+	btst	#4,r1l</div><div class='add'>+	bne	1f</div><div class='add'>+	/* user LVEC */</div><div class='add'>+	mov.l	@_sw_usp,er0</div><div class='add'>+	adds	#4,er0</div><div class='add'>+1:</div><div class='add'>+	mov.l	@er0,er0			/* LVEC address */</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+	sub.l	#_interrupt_redirect_table,er0</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_RAMKERNEL)</div><div class='add'>+	mov.l	@_interrupt_redirect_table,er1</div><div class='add'>+	sub.l	er1,er0</div><div class='add'>+#endif</div><div class='add'>+	SHLR2	er0</div><div class='add'>+	dec.l	#1,er0</div><div class='add'>+	mov.l	sp,er1</div><div class='add'>+	subs	#4,er1				/* adjust ret_pc */</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	orc	#7,exr</div><div class='add'>+#endif</div><div class='add'>+	jsr	@do_IRQ</div><div class='add'>+	jmp	@ret_from_interrupt</div><div class='add'>+</div><div class='add'>+_system_call:</div><div class='add'>+	subs	#4,sp				/* dummy LVEC */</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	/* er0: syscall nr */</div><div class='add'>+	andc	#0xbf,ccr</div><div class='add'>+	mov.l	er0,er4</div><div class='add'>+</div><div class='add'>+	/* save top of frame */</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@set_esp0</div><div class='add'>+	mov.l	sp,er2</div><div class='add'>+	and.w	#0xe000,r2</div><div class='add'>+	mov.l	@(TI_FLAGS:16,er2),er2</div><div class='add'>+	and.w	#_TIF_WORK_SYSCALL_MASK,r2</div><div class='add'>+	beq	1f</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@do_syscall_trace_enter</div><div class='add'>+1:</div><div class='add'>+	cmp.l	#__NR_syscalls,er4</div><div class='add'>+	bcc	badsys</div><div class='add'>+	SHLL2	er4</div><div class='add'>+	mov.l	#_sys_call_table,er0</div><div class='add'>+	add.l	er4,er0</div><div class='add'>+	mov.l	@er0,er4</div><div class='add'>+	beq	ret_from_exception:16</div><div class='add'>+	mov.l	@(LER1:16,sp),er0</div><div class='add'>+	mov.l	@(LER2:16,sp),er1</div><div class='add'>+	mov.l	@(LER3:16,sp),er2</div><div class='add'>+	jsr	@er4</div><div class='add'>+	mov.l	er0,@(LER0:16,sp)		/* save the return value */</div><div class='add'>+	mov.l	sp,er2</div><div class='add'>+	and.w	#0xe000,r2</div><div class='add'>+	mov.l	@(TI_FLAGS:16,er2),er2</div><div class='add'>+	and.w	#_TIF_WORK_SYSCALL_MASK,r2</div><div class='add'>+	beq	2f</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@do_syscall_trace_leave</div><div class='add'>+2:</div><div class='add'>+	orc	#0xc0,ccr</div><div class='add'>+	bra	resume_userspace</div><div class='add'>+</div><div class='add'>+badsys:</div><div class='add'>+	mov.l	#-ENOSYS,er0</div><div class='add'>+	mov.l	er0,@(LER0:16,sp)</div><div class='add'>+	bra	resume_userspace</div><div class='add'>+</div><div class='add'>+#if !defined(CONFIG_PREEMPT)</div><div class='add'>+#define resume_kernel restore_all</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ret_from_exception:</div><div class='add'>+#if defined(CONFIG_PREEMPT)</div><div class='add'>+	orc	#0xc0,ccr</div><div class='add'>+#endif</div><div class='add'>+ret_from_interrupt:</div><div class='add'>+	mov.b	@(LCCR+1:16,sp),r0l</div><div class='add'>+	btst	#4,r0l</div><div class='add'>+	bne	resume_kernel:16	/* return from kernel */</div><div class='add'>+resume_userspace:</div><div class='add'>+	andc	#0xbf,ccr</div><div class='add'>+	mov.l	sp,er4</div><div class='add'>+	and.w	#0xe000,r4		/* er4 &lt;- current thread info */</div><div class='add'>+	mov.l	@(TI_FLAGS:16,er4),er1</div><div class='add'>+	and.l	#_TIF_WORK_MASK,er1</div><div class='add'>+	beq	restore_all:8</div><div class='add'>+work_pending:</div><div class='add'>+	btst	#TIF_NEED_RESCHED,r1l</div><div class='add'>+	bne	work_resched:8</div><div class='add'>+	/* work notifysig */</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	subs	#4,er0			/* er0: pt_regs */</div><div class='add'>+	jsr	@do_notify_resume</div><div class='add'>+	bra	resume_userspace:8</div><div class='add'>+work_resched:</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@set_esp0</div><div class='add'>+	jsr	@schedule</div><div class='add'>+	bra	resume_userspace:8</div><div class='add'>+restore_all:</div><div class='add'>+	RESTORE_ALL			/* Does RTE */</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PREEMPT)</div><div class='add'>+resume_kernel:</div><div class='add'>+	mov.l	@(TI_PRE_COUNT:16,er4),er0</div><div class='add'>+	bne	restore_all:8</div><div class='add'>+need_resched:</div><div class='add'>+	mov.l	@(TI_FLAGS:16,er4),er0</div><div class='add'>+	btst	#TIF_NEED_RESCHED,r0l</div><div class='add'>+	beq	restore_all:8</div><div class='add'>+	mov.b	@(LCCR+1:16,sp),r0l	/* Interrupt Enabled? */</div><div class='add'>+	bmi	restore_all:8</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@set_esp0</div><div class='add'>+	jsr	@preempt_schedule_irq</div><div class='add'>+	bra	need_resched:8</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ret_from_fork:</div><div class='add'>+	mov.l	er2,er0</div><div class='add'>+	jsr	@schedule_tail</div><div class='add'>+	jmp	@ret_from_exception</div><div class='add'>+</div><div class='add'>+ret_from_kernel_thread:</div><div class='add'>+	mov.l	er2,er0</div><div class='add'>+	jsr	@schedule_tail</div><div class='add'>+	mov.l	@(LER4:16,sp),er0</div><div class='add'>+	mov.l	@(LER5:16,sp),er1</div><div class='add'>+	jsr	@er1</div><div class='add'>+	jmp	@ret_from_exception</div><div class='add'>+</div><div class='add'>+_resume:</div><div class='add'>+	/*</div><div class='add'>+	 * Beware - when entering resume, offset of tss is in d1,</div><div class='add'>+	 * prev (the current task) is in a0, next (the new task)</div><div class='add'>+	 * is in a1 and d2.b is non-zero if the mm structure is</div><div class='add'>+	 * shared between the tasks, so don't change these</div><div class='add'>+	 * registers until their contents are no longer needed.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* save sr */</div><div class='add'>+	sub.w	r3,r3</div><div class='add'>+	stc	ccr,r3l</div><div class='add'>+	mov.w	r3,@(THREAD_CCR+2:16,er0)</div><div class='add'>+</div><div class='add'>+	/* disable interrupts */</div><div class='add'>+	orc	#0xc0,ccr</div><div class='add'>+	mov.l	@_sw_usp,er3</div><div class='add'>+	mov.l	er3,@(THREAD_USP:16,er0)</div><div class='add'>+	mov.l	sp,@(THREAD_KSP:16,er0)</div><div class='add'>+</div><div class='add'>+	/* Skip address space switching if they are the same. */</div><div class='add'>+	/* FIXME: what did we hack out of here, this does nothing! */</div><div class='add'>+</div><div class='add'>+	mov.l	@(THREAD_USP:16,er1),er0</div><div class='add'>+	mov.l	er0,@_sw_usp</div><div class='add'>+	mov.l	@(THREAD_KSP:16,er1),sp</div><div class='add'>+</div><div class='add'>+	/* restore status register */</div><div class='add'>+	mov.w	@(THREAD_CCR+2:16,er1),r3</div><div class='add'>+</div><div class='add'>+	ldc	r3l,ccr</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+_trace_break:</div><div class='add'>+	subs	#4,sp</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	sub.l	er1,er1</div><div class='add'>+	dec.l	#1,er1</div><div class='add'>+	mov.l	er1,@(LORIG,sp)</div><div class='add'>+	mov.l	sp,er0</div><div class='add'>+	jsr	@set_esp0</div><div class='add'>+	mov.l	@_sw_usp,er0</div><div class='add'>+	mov.l	@er0,er1</div><div class='add'>+	mov.w	@(-2:16,er1),r2</div><div class='add'>+	cmp.w	#0x5730,r2</div><div class='add'>+	beq	1f</div><div class='add'>+	subs	#2,er1</div><div class='add'>+	mov.l	er1,@er0</div><div class='add'>+1:</div><div class='add'>+	and.w	#0xff,e1</div><div class='add'>+	mov.l	er1,er0</div><div class='add'>+	jsr	@trace_trap</div><div class='add'>+	jmp	@ret_from_exception</div><div class='add'>+</div><div class='add'>+_nmi:</div><div class='add'>+	subs	#4, sp</div><div class='add'>+	mov.l	er0, @-sp</div><div class='add'>+	mov.l	@_interrupt_redirect_table, er0</div><div class='add'>+	add.l	#8*4, er0</div><div class='add'>+	mov.l	er0, @(4,sp)</div><div class='add'>+	mov.l	@sp+, er0</div><div class='add'>+	jmp	@_interrupt_entry</div><div class='add'>+</div><div class='add'>+	.section	.bss</div><div class='add'>+_sw_ksp:</div><div class='add'>+	.space	4</div><div class='add'>+_sw_usp:</div><div class='add'>+	.space	4</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/kernel/h8300_ksyms.c b/arch/h8300/kernel/h8300_ksyms.c<br/>new file mode 100644<br/>index 000000000000..a9033c838968<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/h8300_ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/h8300_ksyms.c</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * libgcc functions - functions that are used internally by the</div><div class='add'>+ * compiler...  (prototypes are not correct though, but that</div><div class='add'>+ * doesn't really matter since they're not versioned).</div><div class='add'>+ */</div><div class='add'>+asmlinkage long __ucmpdi2(long long, long long);</div><div class='add'>+asmlinkage long long __ashldi3(long long, int);</div><div class='add'>+asmlinkage long long __ashrdi3(long long, int);</div><div class='add'>+asmlinkage long long __lshrdi3(long long, int);</div><div class='add'>+asmlinkage long __divsi3(long, long);</div><div class='add'>+asmlinkage long __modsi3(long, long);</div><div class='add'>+asmlinkage unsigned long __umodsi3(unsigned long, unsigned long);</div><div class='add'>+asmlinkage long long __muldi3(long long, long long);</div><div class='add'>+asmlinkage long __mulsi3(long, long);</div><div class='add'>+asmlinkage long __udivsi3(long, long);</div><div class='add'>+asmlinkage void *memcpy(void *, const void *, size_t);</div><div class='add'>+asmlinkage void *memset(void *, int, size_t);</div><div class='add'>+asmlinkage long strncpy_from_user(void *to, void *from, size_t n);</div><div class='add'>+</div><div class='add'>+	/* gcc lib functions */</div><div class='add'>+EXPORT_SYMBOL(__ucmpdi2);</div><div class='add'>+EXPORT_SYMBOL(__ashldi3);</div><div class='add'>+EXPORT_SYMBOL(__ashrdi3);</div><div class='add'>+EXPORT_SYMBOL(__lshrdi3);</div><div class='add'>+EXPORT_SYMBOL(__divsi3);</div><div class='add'>+EXPORT_SYMBOL(__modsi3);</div><div class='add'>+EXPORT_SYMBOL(__umodsi3);</div><div class='add'>+EXPORT_SYMBOL(__muldi3);</div><div class='add'>+EXPORT_SYMBOL(__mulsi3);</div><div class='add'>+EXPORT_SYMBOL(__udivsi3);</div><div class='add'>+EXPORT_SYMBOL(memcpy);</div><div class='add'>+EXPORT_SYMBOL(memset);</div><div class='add'>+EXPORT_SYMBOL(strncpy_from_user);</div><div class='head'>diff --git a/arch/h8300/kernel/head_ram.S b/arch/h8300/kernel/head_ram.S<br/>new file mode 100644<br/>index 000000000000..84ac5c3ed31a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/head_ram.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/head_ram.S</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sys.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;asm/unistd.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.h8300h</div><div class='add'>+#define SYSCR 0xfee012</div><div class='add'>+#define IRAMTOP 0xffff20</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.h8300s</div><div class='add'>+#define INTCR 0xffff31</div><div class='add'>+#define IRAMTOP 0xffc000</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	__HEAD</div><div class='add'>+	.global	_start</div><div class='add'>+_start:</div><div class='add'>+	mov.l	#IRAMTOP,sp</div><div class='add'>+	/* .bss clear */</div><div class='add'>+	mov.l	#_sbss,er5</div><div class='add'>+	mov.l	#_ebss,er4</div><div class='add'>+	sub.l	er5,er4</div><div class='add'>+	shlr	er4</div><div class='add'>+	shlr	er4</div><div class='add'>+	sub.l	er2,er2</div><div class='add'>+1:</div><div class='add'>+	mov.l	er2,@er5</div><div class='add'>+	adds	#4,er5</div><div class='add'>+	dec.l	#1,er4</div><div class='add'>+	bne	1b</div><div class='add'>+	jsr	@h8300_fdt_init</div><div class='add'>+</div><div class='add'>+	/* linux kernel start */</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	ldc	#0xd0,ccr	/* running kernel */</div><div class='add'>+	mov.l	#SYSCR,er0</div><div class='add'>+	bclr	#3,@er0</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	ldc	#0x07,exr</div><div class='add'>+	bclr	#4,@INTCR:8</div><div class='add'>+	bset	#5,@INTCR:8	/* Interrupt mode 2 */</div><div class='add'>+	ldc	#0x90,ccr	/* running kernel */</div><div class='add'>+#endif</div><div class='add'>+	mov.l	#init_thread_union,sp</div><div class='add'>+	add.l	#0x2000,sp</div><div class='add'>+	jsr	@start_kernel</div><div class='add'>+</div><div class='add'>+1:</div><div class='add'>+	bra	1b</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/kernel/head_rom.S b/arch/h8300/kernel/head_rom.S<br/>new file mode 100644<br/>index 000000000000..9868a4121a1f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/head_rom.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/head_rom.S</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.h8300h</div><div class='add'>+#define SYSCR 0xfee012</div><div class='add'>+#define IRAMTOP 0xffff20</div><div class='add'>+#define NR_INT 64</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.h8300s</div><div class='add'>+#define INTCR 0xffff31</div><div class='add'>+#define IRAMTOP 0xffc000</div><div class='add'>+#define NR_INT 128</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	__HEAD</div><div class='add'>+	.global	_start</div><div class='add'>+_start:</div><div class='add'>+	mov.l	#IRAMTOP,sp</div><div class='add'>+#if !defined(CONFIG_H8300H_SIM) &amp;&amp; \</div><div class='add'>+    !defined(CONFIG_H8S_SIM)</div><div class='add'>+	jsr	@lowlevel_init</div><div class='add'>+</div><div class='add'>+	/* copy .data */</div><div class='add'>+	mov.l	#_begin_data,er5</div><div class='add'>+	mov.l	#_sdata,er6</div><div class='add'>+	mov.l	#_edata,er4</div><div class='add'>+	sub.l	er6,er4</div><div class='add'>+	shlr.l	er4</div><div class='add'>+	shlr.l	er4</div><div class='add'>+1:</div><div class='add'>+	mov.l	@er5+,er0</div><div class='add'>+	mov.l	er0,@er6</div><div class='add'>+	adds	#4,er6</div><div class='add'>+	dec.l	#1,er4</div><div class='add'>+	bne	1b</div><div class='add'>+	/* .bss clear */</div><div class='add'>+	mov.l	#_sbss,er5</div><div class='add'>+	mov.l	#_ebss,er4</div><div class='add'>+	sub.l	er5,er4</div><div class='add'>+	shlr	er4</div><div class='add'>+	shlr	er4</div><div class='add'>+	sub.l	er0,er0</div><div class='add'>+1:</div><div class='add'>+	mov.l	er0,@er5</div><div class='add'>+	adds	#4,er5</div><div class='add'>+	dec.l	#1,er4</div><div class='add'>+	bne	1b</div><div class='add'>+#else</div><div class='add'>+	/* get cmdline from gdb */</div><div class='add'>+	jsr	@0xcc</div><div class='add'>+	;; er0 - argc</div><div class='add'>+	;; er1 - argv</div><div class='add'>+	mov.l	#command_line,er3</div><div class='add'>+	adds	#4,er1</div><div class='add'>+	dec.l	#1,er0</div><div class='add'>+	beq	4f</div><div class='add'>+1:</div><div class='add'>+	mov.l	@er1+,er2</div><div class='add'>+2:</div><div class='add'>+	mov.b	@er2+,r4l</div><div class='add'>+	beq	3f</div><div class='add'>+	mov.b	r4l,@er3</div><div class='add'>+	adds	#1,er3</div><div class='add'>+	bra	2b</div><div class='add'>+3:</div><div class='add'>+	mov.b	#' ',r4l</div><div class='add'>+	mov.b	r4l,@er3</div><div class='add'>+	adds	#1,er3</div><div class='add'>+	dec.l	#1,er0</div><div class='add'>+	bne	1b</div><div class='add'>+	subs	#1,er3</div><div class='add'>+	mov.b	#0,r4l</div><div class='add'>+	mov.b	r4l,@er3</div><div class='add'>+4:</div><div class='add'>+#endif</div><div class='add'>+	sub.l	er0,er0</div><div class='add'>+	jsr	@h8300_fdt_init</div><div class='add'>+	/* linux kernel start */</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	ldc	#0xd0,ccr	/* running kernel */</div><div class='add'>+	mov.l	#SYSCR,er0</div><div class='add'>+	bclr	#3,@er0</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	ldc	#0x07,exr</div><div class='add'>+	bclr	#4,@INTCR:8</div><div class='add'>+	bset	#5,@INTCR:8	/* Interrupt mode 2 */</div><div class='add'>+	ldc	#0x90,ccr	/* running kernel */</div><div class='add'>+#endif</div><div class='add'>+	mov.l	#init_thread_union,sp</div><div class='add'>+	add.l	#0x2000,sp</div><div class='add'>+	jsr	@start_kernel</div><div class='add'>+</div><div class='add'>+1:</div><div class='add'>+	bra	1b</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+	/* interrupt vector */</div><div class='add'>+	.section .vectors,"ax"</div><div class='add'>+	.long	_start</div><div class='add'>+	.long	_start</div><div class='add'>+vector	=	2</div><div class='add'>+	.rept	NR_INT - 2</div><div class='add'>+	.long	_interrupt_redirect_table+vector*4</div><div class='add'>+vector	=	vector + 1</div><div class='add'>+	.endr</div><div class='add'>+#endif</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c<br/>new file mode 100644<br/>index 000000000000..da79f9521699<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/irq.c</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * linux/arch/h8300/kernel/irq.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014-2015 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_RAMKERNEL</div><div class='add'>+typedef void (*h8300_vector)(void);</div><div class='add'>+</div><div class='add'>+static const h8300_vector __initconst trap_table[] = {</div><div class='add'>+	0, 0, 0, 0,</div><div class='add'>+	_trace_break,</div><div class='add'>+	0, 0,</div><div class='add'>+	_nmi,</div><div class='add'>+	_system_call,</div><div class='add'>+	0, 0,</div><div class='add'>+	_trace_break,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long __init *get_vector_address(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long *rom_vector = CPU_VECTOR;</div><div class='add'>+	unsigned long base, tmp;</div><div class='add'>+	int vec_no;</div><div class='add'>+</div><div class='add'>+	base = rom_vector[EXT_IRQ0] &amp; ADDR_MASK;</div><div class='add'>+</div><div class='add'>+	/* check romvector format */</div><div class='add'>+	for (vec_no = EXT_IRQ0 + 1; vec_no &lt;= EXT_IRQ0+EXT_IRQS; vec_no++) {</div><div class='add'>+		if ((base+(vec_no - EXT_IRQ0)*4) !=</div><div class='add'>+		    (rom_vector[vec_no] &amp; ADDR_MASK))</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ramvector base address */</div><div class='add'>+	base -= EXT_IRQ0*4;</div><div class='add'>+</div><div class='add'>+	/* writerble? */</div><div class='add'>+	tmp = ~(*(volatile unsigned long *)base);</div><div class='add'>+	(*(volatile unsigned long *)base) = tmp;</div><div class='add'>+	if ((*(volatile unsigned long *)base) != tmp)</div><div class='add'>+		return NULL;</div><div class='add'>+	return (unsigned long *)base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init setup_vector(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long *ramvec, *ramvec_p;</div><div class='add'>+	const h8300_vector *trap_entry;</div><div class='add'>+</div><div class='add'>+	ramvec = get_vector_address();</div><div class='add'>+	if (ramvec == NULL)</div><div class='add'>+		panic("interrupt vector serup failed.");</div><div class='add'>+	else</div><div class='add'>+		pr_debug("virtual vector at 0x%p\n", ramvec);</div><div class='add'>+</div><div class='add'>+	/* create redirect table */</div><div class='add'>+	ramvec_p = ramvec;</div><div class='add'>+	trap_entry = trap_table;</div><div class='add'>+	for (i = 0; i &lt; NR_IRQS; i++) {</div><div class='add'>+		if (i &lt; 12) {</div><div class='add'>+			if (*trap_entry)</div><div class='add'>+				*ramvec_p = VECTOR(*trap_entry);</div><div class='add'>+			ramvec_p++;</div><div class='add'>+			trap_entry++;</div><div class='add'>+		} else</div><div class='add'>+			*ramvec_p++ = REDIRECT(_interrupt_entry);</div><div class='add'>+	}</div><div class='add'>+	_interrupt_redirect_table = ramvec;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+void setup_vector(void)</div><div class='add'>+{</div><div class='add'>+	/* noting do */</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void __init init_IRQ(void)</div><div class='add'>+{</div><div class='add'>+	setup_vector();</div><div class='add'>+	irqchip_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void do_IRQ(int irq)</div><div class='add'>+{</div><div class='add'>+	irq_enter();</div><div class='add'>+	generic_handle_irq(irq);</div><div class='add'>+	irq_exit();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/module.c b/arch/h8300/kernel/module.c<br/>new file mode 100644<br/>index 000000000000..515f6c4e8d80<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/module.c</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+#include &lt;linux/moduleloader.h&gt;</div><div class='add'>+#include &lt;linux/elf.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+int apply_relocate_add(Elf32_Shdr *sechdrs,</div><div class='add'>+		       const char *strtab,</div><div class='add'>+		       unsigned int symindex,</div><div class='add'>+		       unsigned int relsec,</div><div class='add'>+		       struct module *me)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;</div><div class='add'>+</div><div class='add'>+	pr_debug("Applying relocate section %u to %u\n", relsec,</div><div class='add'>+	       sechdrs[relsec].sh_info);</div><div class='add'>+	for (i = 0; i &lt; sechdrs[relsec].sh_size / sizeof(*rela); i++) {</div><div class='add'>+		/* This is where to make the change */</div><div class='add'>+		uint32_t *loc =</div><div class='add'>+			(uint32_t *)(sechdrs[sechdrs[relsec].sh_info].sh_addr</div><div class='add'>+					     + rela[i].r_offset);</div><div class='add'>+		/* This is the symbol it is referring to.  Note that all</div><div class='add'>+		   undefined symbols have been resolved.  */</div><div class='add'>+		Elf32_Sym *sym = (Elf32_Sym *)sechdrs[symindex].sh_addr</div><div class='add'>+			+ ELF32_R_SYM(rela[i].r_info);</div><div class='add'>+		uint32_t v = sym-&gt;st_value + rela[i].r_addend;</div><div class='add'>+</div><div class='add'>+		switch (ELF32_R_TYPE(rela[i].r_info)) {</div><div class='add'>+		case R_H8_DIR24R8:</div><div class='add'>+			loc = (uint32_t *)((uint32_t)loc - 1);</div><div class='add'>+			*loc = (*loc &amp; 0xff000000) | ((*loc &amp; 0xffffff) + v);</div><div class='add'>+			break;</div><div class='add'>+		case R_H8_DIR24A8:</div><div class='add'>+			if (ELF32_R_SYM(rela[i].r_info))</div><div class='add'>+				*loc += v;</div><div class='add'>+			break;</div><div class='add'>+		case R_H8_DIR32:</div><div class='add'>+		case R_H8_DIR32A16:</div><div class='add'>+			*loc += v;</div><div class='add'>+			break;</div><div class='add'>+		case R_H8_PCREL16:</div><div class='add'>+			v -= (unsigned long)loc + 2;</div><div class='add'>+			if ((Elf32_Sword)v &gt; 0x7fff ||</div><div class='add'>+			    (Elf32_Sword)v &lt; -(Elf32_Sword)0x8000)</div><div class='add'>+				goto overflow;</div><div class='add'>+			else</div><div class='add'>+				*(unsigned short *)loc = v;</div><div class='add'>+			break;</div><div class='add'>+		case R_H8_PCREL8:</div><div class='add'>+			v -= (unsigned long)loc + 1;</div><div class='add'>+			if ((Elf32_Sword)v &gt; 0x7f ||</div><div class='add'>+			    (Elf32_Sword)v &lt; -(Elf32_Sword)0x80)</div><div class='add'>+				goto overflow;</div><div class='add'>+			else</div><div class='add'>+				*(unsigned char *)loc = v;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pr_err("module %s: Unknown relocation: %u\n",</div><div class='add'>+			       me-&gt;name, ELF32_R_TYPE(rela[i].r_info));</div><div class='add'>+			return -ENOEXEC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+ overflow:</div><div class='add'>+	pr_err("module %s: relocation offset overflow: %08x\n",</div><div class='add'>+	       me-&gt;name, rela[i].r_offset);</div><div class='add'>+	return -ENOEXEC;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c<br/>new file mode 100644<br/>index 000000000000..dee41256922c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/process.c</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/kernel/process.c</div><div class='add'>+ *</div><div class='add'>+ * Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ *  Based on:</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68knommu/kernel/process.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1998  D. Jeff Dionne &lt;jeff@ryeham.ee.ryerson.ca&gt;,</div><div class='add'>+ *                      Kenneth Albanowski &lt;kjahds@kjahds.com&gt;,</div><div class='add'>+ *                      The Silver Hammer Group, Ltd.</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68k/kernel/process.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1995  Hamish Macdonald</div><div class='add'>+ *</div><div class='add'>+ *  68060 fixes by Jesper Skov</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file handles the architecture-dependent parts of process handling..</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/stddef.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/user.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/rcupdate.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+</div><div class='add'>+void (*pm_power_off)(void) = NULL;</div><div class='add'>+EXPORT_SYMBOL(pm_power_off);</div><div class='add'>+</div><div class='add'>+asmlinkage void ret_from_fork(void);</div><div class='add'>+asmlinkage void ret_from_kernel_thread(void);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The idle loop on an H8/300..</div><div class='add'>+ */</div><div class='add'>+void arch_cpu_idle(void)</div><div class='add'>+{</div><div class='add'>+	local_irq_enable();</div><div class='add'>+	__asm__("sleep");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void machine_restart(char *__unused)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	__asm__("jmp @@0");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void machine_halt(void)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	__asm__("sleep");</div><div class='add'>+	for (;;)</div><div class='add'>+		;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void machine_power_off(void)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	__asm__("sleep");</div><div class='add'>+	for (;;)</div><div class='add'>+		;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void show_regs(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	show_regs_print_info(KERN_DEFAULT);</div><div class='add'>+</div><div class='add'>+	pr_notice("\n");</div><div class='add'>+	pr_notice("PC: %08lx  Status: %02x\n",</div><div class='add'>+	       regs-&gt;pc, regs-&gt;ccr);</div><div class='add'>+	pr_notice("ORIG_ER0: %08lx ER0: %08lx ER1: %08lx\n",</div><div class='add'>+	       regs-&gt;orig_er0, regs-&gt;er0, regs-&gt;er1);</div><div class='add'>+	pr_notice("ER2: %08lx ER3: %08lx ER4: %08lx ER5: %08lx\n",</div><div class='add'>+	       regs-&gt;er2, regs-&gt;er3, regs-&gt;er4, regs-&gt;er5);</div><div class='add'>+	pr_notice("ER6' %08lx ", regs-&gt;er6);</div><div class='add'>+	if (user_mode(regs))</div><div class='add'>+		printk("USP: %08lx\n", rdusp());</div><div class='add'>+	else</div><div class='add'>+		printk("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flush_thread(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int copy_thread(unsigned long clone_flags,</div><div class='add'>+		unsigned long usp, unsigned long topstk,</div><div class='add'>+		struct task_struct *p)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *childregs;</div><div class='add'>+</div><div class='add'>+	childregs = (struct pt_regs *) (THREAD_SIZE + task_stack_page(p)) - 1;</div><div class='add'>+</div><div class='add'>+	if (unlikely(p-&gt;flags &amp; PF_KTHREAD)) {</div><div class='add'>+		memset(childregs, 0, sizeof(struct pt_regs));</div><div class='add'>+		childregs-&gt;retpc = (unsigned long) ret_from_kernel_thread;</div><div class='add'>+		childregs-&gt;er4 = topstk; /* arg */</div><div class='add'>+		childregs-&gt;er5 = usp; /* fn */</div><div class='add'>+	}  else {</div><div class='add'>+		*childregs = *current_pt_regs();</div><div class='add'>+		childregs-&gt;er0 = 0;</div><div class='add'>+		childregs-&gt;retpc = (unsigned long) ret_from_fork;</div><div class='add'>+		p-&gt;thread.usp = usp ?: rdusp();</div><div class='add'>+	}</div><div class='add'>+	p-&gt;thread.ksp = (unsigned long)childregs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long thread_saved_pc(struct task_struct *tsk)</div><div class='add'>+{</div><div class='add'>+	return ((struct pt_regs *)tsk-&gt;thread.esp0)-&gt;pc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long get_wchan(struct task_struct *p)</div><div class='add'>+{</div><div class='add'>+	unsigned long fp, pc;</div><div class='add'>+	unsigned long stack_page;</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	if (!p || p == current || p-&gt;state == TASK_RUNNING)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	stack_page = (unsigned long)p;</div><div class='add'>+	fp = ((struct pt_regs *)p-&gt;thread.ksp)-&gt;er6;</div><div class='add'>+	do {</div><div class='add'>+		if (fp &lt; stack_page+sizeof(struct thread_info) ||</div><div class='add'>+		    fp &gt;= 8184+stack_page)</div><div class='add'>+			return 0;</div><div class='add'>+		pc = ((unsigned long *)fp)[1];</div><div class='add'>+		if (!in_sched_functions(pc))</div><div class='add'>+			return pc;</div><div class='add'>+		fp = *(unsigned long *) fp;</div><div class='add'>+	} while (count++ &lt; 16);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* generic sys_clone is not enough registers */</div><div class='add'>+asmlinkage int sys_clone(unsigned long __user *args)</div><div class='add'>+{</div><div class='add'>+	unsigned long clone_flags;</div><div class='add'>+	unsigned long  newsp;</div><div class='add'>+	uintptr_t parent_tidptr;</div><div class='add'>+	uintptr_t child_tidptr;</div><div class='add'>+</div><div class='add'>+	get_user(clone_flags, &amp;args[0]);</div><div class='add'>+	get_user(newsp, &amp;args[1]);</div><div class='add'>+	get_user(parent_tidptr, &amp;args[2]);</div><div class='add'>+	get_user(child_tidptr, &amp;args[3]);</div><div class='add'>+	return do_fork(clone_flags, newsp, 0,</div><div class='add'>+		       (int __user *)parent_tidptr, (int __user *)child_tidptr);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c<br/>new file mode 100644<br/>index 000000000000..92075544a19a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace.c</a></div><div class='hunk'>@@ -0,0 +1,203 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/kernel/ptrace.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright 2015 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License.  See the file COPYING in the main directory of</div><div class='add'>+ * this archive for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/audit.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='add'>+#include &lt;linux/regset.h&gt;</div><div class='add'>+#include &lt;linux/elf.h&gt;</div><div class='add'>+</div><div class='add'>+#define CCR_MASK 0x6f    /* mode/imask not set */</div><div class='add'>+#define EXR_MASK 0x80    /* modify only T */</div><div class='add'>+</div><div class='add'>+#define PT_REG(r) offsetof(struct pt_regs, r)</div><div class='add'>+</div><div class='add'>+extern void user_disable_single_step(struct task_struct *child);</div><div class='add'>+</div><div class='add'>+/* Mapping from PT_xxx to the stack offset at which the register is</div><div class='add'>+   saved.  Notice that usp has no stack-slot and needs to be treated</div><div class='add'>+   specially (see get_reg/put_reg below). */</div><div class='add'>+static const int register_offset[] = {</div><div class='add'>+	PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),</div><div class='add'>+	PT_REG(er5), PT_REG(er6), PT_REG(er0), -1,</div><div class='add'>+	PT_REG(orig_er0), PT_REG(ccr), PT_REG(pc),</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	PT_REG(exr),</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* read register */</div><div class='add'>+long h8300_get_reg(struct task_struct *task, int regno)</div><div class='add'>+{</div><div class='add'>+	switch (regno) {</div><div class='add'>+	case PT_USP:</div><div class='add'>+		return task-&gt;thread.usp + sizeof(long)*2;</div><div class='add'>+	case PT_CCR:</div><div class='add'>+	case PT_EXR:</div><div class='add'>+	    return *(unsigned short *)(task-&gt;thread.esp0 +</div><div class='add'>+				       register_offset[regno]);</div><div class='add'>+	default:</div><div class='add'>+	    return *(unsigned long *)(task-&gt;thread.esp0 +</div><div class='add'>+				      register_offset[regno]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)</div><div class='add'>+{</div><div class='add'>+	unsigned short oldccr;</div><div class='add'>+	unsigned short oldexr;</div><div class='add'>+</div><div class='add'>+	switch (regno) {</div><div class='add'>+	case PT_USP:</div><div class='add'>+		task-&gt;thread.usp = data - sizeof(long)*2;</div><div class='add'>+	case PT_CCR:</div><div class='add'>+		oldccr = *(unsigned short *)(task-&gt;thread.esp0 +</div><div class='add'>+					     register_offset[regno]);</div><div class='add'>+		oldccr &amp;= ~CCR_MASK;</div><div class='add'>+		data &amp;= CCR_MASK;</div><div class='add'>+		data |= oldccr;</div><div class='add'>+		*(unsigned short *)(task-&gt;thread.esp0 +</div><div class='add'>+				    register_offset[regno]) = data;</div><div class='add'>+		break;</div><div class='add'>+	case PT_EXR:</div><div class='add'>+		oldexr = *(unsigned short *)(task-&gt;thread.esp0 +</div><div class='add'>+					     register_offset[regno]);</div><div class='add'>+		oldccr &amp;= ~EXR_MASK;</div><div class='add'>+		data &amp;= EXR_MASK;</div><div class='add'>+		data |= oldexr;</div><div class='add'>+		*(unsigned short *)(task-&gt;thread.esp0 +</div><div class='add'>+				    register_offset[regno]) = data;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*(unsigned long *)(task-&gt;thread.esp0 +</div><div class='add'>+				   register_offset[regno]) = data;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int regs_get(struct task_struct *target,</div><div class='add'>+		    const struct user_regset *regset,</div><div class='add'>+		    unsigned int pos, unsigned int count,</div><div class='add'>+		    void *kbuf, void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	struct user_regs_struct regs;</div><div class='add'>+	long *reg = (long *)&amp;regs;</div><div class='add'>+</div><div class='add'>+	/* build user regs in buffer */</div><div class='add'>+	for (r = 0; r &lt; ARRAY_SIZE(register_offset); r++)</div><div class='add'>+		*reg++ = h8300_get_reg(target, r);</div><div class='add'>+</div><div class='add'>+	return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+				   &amp;regs, 0, sizeof(regs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int regs_set(struct task_struct *target,</div><div class='add'>+		    const struct user_regset *regset,</div><div class='add'>+		    unsigned int pos, unsigned int count,</div><div class='add'>+		    const void *kbuf, const void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	int ret;</div><div class='add'>+	struct user_regs_struct regs;</div><div class='add'>+	long *reg;</div><div class='add'>+</div><div class='add'>+	/* build user regs in buffer */</div><div class='add'>+	for (reg = (long *)&amp;regs, r = 0; r &lt; ARRAY_SIZE(register_offset); r++)</div><div class='add'>+		*reg++ = h8300_get_reg(target, r);</div><div class='add'>+</div><div class='add'>+	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+				 &amp;regs, 0, sizeof(regs));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* write back to pt_regs */</div><div class='add'>+	for (reg = (long *)&amp;regs, r = 0; r &lt; ARRAY_SIZE(register_offset); r++)</div><div class='add'>+		h8300_put_reg(target, r, *reg++);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum h8300_regset {</div><div class='add'>+	REGSET_GENERAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct user_regset h8300_regsets[] = {</div><div class='add'>+	[REGSET_GENERAL] = {</div><div class='add'>+		.core_note_type	= NT_PRSTATUS,</div><div class='add'>+		.n		= ELF_NGREG,</div><div class='add'>+		.size		= sizeof(long),</div><div class='add'>+		.align		= sizeof(long),</div><div class='add'>+		.get		= regs_get,</div><div class='add'>+		.set		= regs_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct user_regset_view user_h8300_native_view = {</div><div class='add'>+	.name = "h8300",</div><div class='add'>+	.e_machine = EM_H8_300,</div><div class='add'>+	.regsets = h8300_regsets,</div><div class='add'>+	.n = ARRAY_SIZE(h8300_regsets),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct user_regset_view *task_user_regset_view(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	return &amp;user_h8300_native_view;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ptrace_disable(struct task_struct *child)</div><div class='add'>+{</div><div class='add'>+	user_disable_single_step(child);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+long arch_ptrace(struct task_struct *child, long request,</div><div class='add'>+		 unsigned long addr, unsigned long data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (request) {</div><div class='add'>+	default:</div><div class='add'>+		ret = ptrace_request(child, request, addr, data);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	long ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_thread_flag(TIF_SYSCALL_TRACE) &amp;&amp;</div><div class='add'>+	    tracehook_report_syscall_entry(regs))</div><div class='add'>+		/*</div><div class='add'>+		 * Tracing decided this syscall should not happen.</div><div class='add'>+		 * We'll return a bogus call number to get an ENOSYS</div><div class='add'>+		 * error, but leave the original number in regs-&gt;regs[0].</div><div class='add'>+		 */</div><div class='add'>+		ret = -1L;</div><div class='add'>+</div><div class='add'>+	audit_syscall_entry(regs-&gt;er1, regs-&gt;er2, regs-&gt;er3,</div><div class='add'>+			    regs-&gt;er4, regs-&gt;er5);</div><div class='add'>+</div><div class='add'>+	return ret ?: regs-&gt;er0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int step;</div><div class='add'>+</div><div class='add'>+	audit_syscall_exit(regs);</div><div class='add'>+</div><div class='add'>+	step = test_thread_flag(TIF_SINGLESTEP);</div><div class='add'>+	if (step || test_thread_flag(TIF_SYSCALL_TRACE))</div><div class='add'>+		tracehook_report_syscall_exit(regs, step);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/ptrace_h.c b/arch/h8300/kernel/ptrace_h.c<br/>new file mode 100644<br/>index 000000000000..fe3b5673baba<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/ptrace_h.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace_h.c</a></div><div class='hunk'>@@ -0,0 +1,256 @@</div><div class='add'>+/*</div><div class='add'>+ *    ptrace cpu depend helper functions</div><div class='add'>+ *</div><div class='add'>+ *  Copyright 2003, 2015 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License.  See the file COPYING in the main directory of</div><div class='add'>+ * this archive for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#define BREAKINST 0x5730 /* trapa #3 */</div><div class='add'>+</div><div class='add'>+/* disable singlestep */</div><div class='add'>+void user_disable_single_step(struct task_struct *child)</div><div class='add'>+{</div><div class='add'>+	if ((long)child-&gt;thread.breakinfo.addr != -1L) {</div><div class='add'>+		*(child-&gt;thread.breakinfo.addr) = child-&gt;thread.breakinfo.inst;</div><div class='add'>+		child-&gt;thread.breakinfo.addr = (unsigned short *)-1L;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* calculate next pc */</div><div class='add'>+enum jump_type {none,	 /* normal instruction */</div><div class='add'>+		jabs,	 /* absolute address jump */</div><div class='add'>+		ind,	 /* indirect address jump */</div><div class='add'>+		ret,	 /* return to subrutine */</div><div class='add'>+		reg,	 /* register indexed jump */</div><div class='add'>+		relb,	 /* pc relative jump (byte offset) */</div><div class='add'>+		relw,	 /* pc relative jump (word offset) */</div><div class='add'>+	       };</div><div class='add'>+</div><div class='add'>+/* opcode decode table define</div><div class='add'>+   ptn: opcode pattern</div><div class='add'>+   msk: opcode bitmask</div><div class='add'>+   len: instruction length (&lt;0 next table index)</div><div class='add'>+   jmp: jump operation mode */</div><div class='add'>+struct optable {</div><div class='add'>+	unsigned char bitpattern;</div><div class='add'>+	unsigned char bitmask;</div><div class='add'>+	signed char length;</div><div class='add'>+	signed char type;</div><div class='add'>+} __packed __aligned(1);</div><div class='add'>+</div><div class='add'>+#define OPTABLE(ptn, msk, len, jmp)	\</div><div class='add'>+	{				\</div><div class='add'>+		.bitpattern = ptn,	\</div><div class='add'>+		.bitmask    = msk,	\</div><div class='add'>+		.length	    = len,	\</div><div class='add'>+		.type	    = jmp,	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static const struct optable optable_0[] = {</div><div class='add'>+	OPTABLE(0x00, 0xff,  1, none), /* 0x00 */</div><div class='add'>+	OPTABLE(0x01, 0xff, -1, none), /* 0x01 */</div><div class='add'>+	OPTABLE(0x02, 0xfe,  1, none), /* 0x02-0x03 */</div><div class='add'>+	OPTABLE(0x04, 0xee,  1, none), /* 0x04-0x05/0x14-0x15 */</div><div class='add'>+	OPTABLE(0x06, 0xfe,  1, none), /* 0x06-0x07 */</div><div class='add'>+	OPTABLE(0x08, 0xea,  1, none), /* 0x08-0x09/0x0c-0x0d/0x18-0x19/0x1c-0x1d */</div><div class='add'>+	OPTABLE(0x0a, 0xee,  1, none), /* 0x0a-0x0b/0x1a-0x1b */</div><div class='add'>+	OPTABLE(0x0e, 0xee,  1, none), /* 0x0e-0x0f/0x1e-0x1f */</div><div class='add'>+	OPTABLE(0x10, 0xfc,  1, none), /* 0x10-0x13 */</div><div class='add'>+	OPTABLE(0x16, 0xfe,  1, none), /* 0x16-0x17 */</div><div class='add'>+	OPTABLE(0x20, 0xe0,  1, none), /* 0x20-0x3f */</div><div class='add'>+	OPTABLE(0x40, 0xf0,  1, relb), /* 0x40-0x4f */</div><div class='add'>+	OPTABLE(0x50, 0xfc,  1, none), /* 0x50-0x53 */</div><div class='add'>+	OPTABLE(0x54, 0xfd,  1, ret), /* 0x54/0x56 */</div><div class='add'>+	OPTABLE(0x55, 0xff,  1, relb), /* 0x55 */</div><div class='add'>+	OPTABLE(0x57, 0xff,  1, none), /* 0x57 */</div><div class='add'>+	OPTABLE(0x58, 0xfb,  2, relw), /* 0x58/0x5c */</div><div class='add'>+	OPTABLE(0x59, 0xfb,  1, reg), /* 0x59/0x5b */</div><div class='add'>+	OPTABLE(0x5a, 0xfb,  2, jabs), /* 0x5a/0x5e */</div><div class='add'>+	OPTABLE(0x5b, 0xfb,  2, ind), /* 0x5b/0x5f */</div><div class='add'>+	OPTABLE(0x60, 0xe8,  1, none), /* 0x60-0x67/0x70-0x77 */</div><div class='add'>+	OPTABLE(0x68, 0xfa,  1, none), /* 0x68-0x69/0x6c-0x6d */</div><div class='add'>+	OPTABLE(0x6a, 0xfe, -2, none), /* 0x6a-0x6b */</div><div class='add'>+	OPTABLE(0x6e, 0xfe,  2, none), /* 0x6e-0x6f */</div><div class='add'>+	OPTABLE(0x78, 0xff,  4, none), /* 0x78 */</div><div class='add'>+	OPTABLE(0x79, 0xff,  2, none), /* 0x79 */</div><div class='add'>+	OPTABLE(0x7a, 0xff,  3, none), /* 0x7a */</div><div class='add'>+	OPTABLE(0x7b, 0xff,  2, none), /* 0x7b */</div><div class='add'>+	OPTABLE(0x7c, 0xfc,  2, none), /* 0x7c-0x7f */</div><div class='add'>+	OPTABLE(0x80, 0x80,  1, none), /* 0x80-0xff */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct optable optable_1[] = {</div><div class='add'>+	OPTABLE(0x00, 0xff, -3, none), /* 0x0100 */</div><div class='add'>+	OPTABLE(0x40, 0xf0, -3, none), /* 0x0140-0x14f */</div><div class='add'>+	OPTABLE(0x80, 0xf0,  1, none), /* 0x0180-0x018f */</div><div class='add'>+	OPTABLE(0xc0, 0xc0,  2, none), /* 0x01c0-0x01ff */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct optable optable_2[] = {</div><div class='add'>+	OPTABLE(0x00, 0x20,  2, none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */</div><div class='add'>+	OPTABLE(0x20, 0x20,  3, none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct optable optable_3[] = {</div><div class='add'>+	OPTABLE(0x69, 0xfb,  2, none), /* 0x010069/0x01006d/014069/0x01406d */</div><div class='add'>+	OPTABLE(0x6b, 0xff, -4, none), /* 0x01006b/0x01406b */</div><div class='add'>+	OPTABLE(0x6f, 0xff,  3, none), /* 0x01006f/0x01406f */</div><div class='add'>+	OPTABLE(0x78, 0xff,  5, none), /* 0x010078/0x014078 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct optable optable_4[] = {</div><div class='add'>+/* 0x0100690?/0x01006d0?/0140690?/0x01406d0?/</div><div class='add'>+   0x0100698?/0x01006d8?/0140698?/0x01406d8? */</div><div class='add'>+	OPTABLE(0x00, 0x78, 3, none),</div><div class='add'>+/* 0x0100692?/0x01006d2?/0140692?/0x01406d2?/</div><div class='add'>+   0x010069a?/0x01006da?/014069a?/0x01406da? */</div><div class='add'>+	OPTABLE(0x20, 0x78, 4, none),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct optables_list {</div><div class='add'>+	const struct optable *ptr;</div><div class='add'>+	int size;</div><div class='add'>+} optables[] = {</div><div class='add'>+#define OPTABLES(no)                                                   \</div><div class='add'>+	{                                                              \</div><div class='add'>+		.ptr  = optable_##no,                                  \</div><div class='add'>+		.size = sizeof(optable_##no) / sizeof(struct optable), \</div><div class='add'>+	}</div><div class='add'>+	OPTABLES(0),</div><div class='add'>+	OPTABLES(1),</div><div class='add'>+	OPTABLES(2),</div><div class='add'>+	OPTABLES(3),</div><div class='add'>+	OPTABLES(4),</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const unsigned char condmask[] = {</div><div class='add'>+	0x00, 0x40, 0x01, 0x04, 0x02, 0x08, 0x10, 0x20</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int isbranch(struct task_struct *task, int reson)</div><div class='add'>+{</div><div class='add'>+	unsigned char cond = h8300_get_reg(task, PT_CCR);</div><div class='add'>+</div><div class='add'>+	/* encode complex conditions */</div><div class='add'>+	/* B4: N^V</div><div class='add'>+	   B5: Z|(N^V)</div><div class='add'>+	   B6: C|Z */</div><div class='add'>+	__asm__("bld #3,%w0\n\t"</div><div class='add'>+		"bxor #1,%w0\n\t"</div><div class='add'>+		"bst #4,%w0\n\t"</div><div class='add'>+		"bor #2,%w0\n\t"</div><div class='add'>+		"bst #5,%w0\n\t"</div><div class='add'>+		"bld #2,%w0\n\t"</div><div class='add'>+		"bor #0,%w0\n\t"</div><div class='add'>+		"bst #6,%w0\n\t"</div><div class='add'>+		: "=&amp;r"(cond) : "0"(cond) : "cc");</div><div class='add'>+	cond &amp;= condmask[reson &gt;&gt; 1];</div><div class='add'>+	if (!(reson &amp; 1))</div><div class='add'>+		return cond == 0;</div><div class='add'>+	else</div><div class='add'>+		return cond != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned short *decode(struct task_struct *child,</div><div class='add'>+			      const struct optable *op,</div><div class='add'>+			      char *fetch_p, unsigned short *pc,</div><div class='add'>+			      unsigned char inst)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr;</div><div class='add'>+	unsigned long *sp;</div><div class='add'>+	int regno;</div><div class='add'>+</div><div class='add'>+	switch (op-&gt;type) {</div><div class='add'>+	case none:</div><div class='add'>+		return (unsigned short *)pc + op-&gt;length;</div><div class='add'>+	case jabs:</div><div class='add'>+		addr = *(unsigned long *)pc;</div><div class='add'>+		return (unsigned short *)(addr &amp; 0x00ffffff);</div><div class='add'>+	case ind:</div><div class='add'>+		addr = *pc &amp; 0xff;</div><div class='add'>+		return (unsigned short *)(*(unsigned long *)addr);</div><div class='add'>+	case ret:</div><div class='add'>+		sp = (unsigned long *)h8300_get_reg(child, PT_USP);</div><div class='add'>+		/* user stack frames</div><div class='add'>+		   |   er0  | temporary saved</div><div class='add'>+		   +--------+</div><div class='add'>+		   |   exp  | exception stack frames</div><div class='add'>+		   +--------+</div><div class='add'>+		   | ret pc | userspace return address</div><div class='add'>+		*/</div><div class='add'>+		return (unsigned short *)(*(sp+2) &amp; 0x00ffffff);</div><div class='add'>+	case reg:</div><div class='add'>+		regno = (*pc &gt;&gt; 4) &amp; 0x07;</div><div class='add'>+		if (regno == 0)</div><div class='add'>+			addr = h8300_get_reg(child, PT_ER0);</div><div class='add'>+		else</div><div class='add'>+			addr = h8300_get_reg(child, regno-1 + PT_ER1);</div><div class='add'>+		return (unsigned short *)addr;</div><div class='add'>+	case relb:</div><div class='add'>+		if (inst == 0x55 || isbranch(child, inst &amp; 0x0f))</div><div class='add'>+			pc = (unsigned short *)((unsigned long)pc +</div><div class='add'>+						((signed char)(*fetch_p)));</div><div class='add'>+		return pc+1; /* skip myself */</div><div class='add'>+	case relw:</div><div class='add'>+		if (inst == 0x5c || isbranch(child, (*fetch_p &amp; 0xf0) &gt;&gt; 4))</div><div class='add'>+			pc = (unsigned short *)((unsigned long)pc +</div><div class='add'>+						((signed short)(*(pc+1))));</div><div class='add'>+		return pc+2; /* skip myself */</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned short *nextpc(struct task_struct *child, unsigned short *pc)</div><div class='add'>+{</div><div class='add'>+	const struct optable *op;</div><div class='add'>+	unsigned char *fetch_p;</div><div class='add'>+	int op_len;</div><div class='add'>+	unsigned char inst;</div><div class='add'>+</div><div class='add'>+	op = optables[0].ptr;</div><div class='add'>+	op_len = optables[0].size;</div><div class='add'>+	fetch_p = (unsigned char *)pc;</div><div class='add'>+	inst = *fetch_p++;</div><div class='add'>+	do {</div><div class='add'>+		if ((inst &amp; op-&gt;bitmask) == op-&gt;bitpattern) {</div><div class='add'>+			if (op-&gt;length &lt; 0) {</div><div class='add'>+				op = optables[-op-&gt;length].ptr;</div><div class='add'>+				op_len = optables[-op-&gt;length].size + 1;</div><div class='add'>+				inst = *fetch_p++;</div><div class='add'>+			} else</div><div class='add'>+				return decode(child, op, fetch_p, pc, inst);</div><div class='add'>+		} else</div><div class='add'>+			op++;</div><div class='add'>+	} while (--op_len &gt; 0);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set breakpoint(s) to simulate a single step from the current PC.  */</div><div class='add'>+</div><div class='add'>+void user_enable_single_step(struct task_struct *child)</div><div class='add'>+{</div><div class='add'>+	unsigned short *next;</div><div class='add'>+</div><div class='add'>+	next = nextpc(child, (unsigned short *)h8300_get_reg(child, PT_PC));</div><div class='add'>+	child-&gt;thread.breakinfo.addr = next;</div><div class='add'>+	child-&gt;thread.breakinfo.inst = *next;</div><div class='add'>+	*next = BREAKINST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void trace_trap(unsigned long bp)</div><div class='add'>+{</div><div class='add'>+	if ((unsigned long)current-&gt;thread.breakinfo.addr == bp) {</div><div class='add'>+		user_disable_single_step(current);</div><div class='add'>+		force_sig(SIGTRAP, current);</div><div class='add'>+	} else</div><div class='add'>+		force_sig(SIGILL, current);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/ptrace_s.c b/arch/h8300/kernel/ptrace_s.c<br/>new file mode 100644<br/>index 000000000000..ef5a9c13e76d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/ptrace_s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/ptrace_s.c</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/kernel/ptrace_h8s.c</div><div class='add'>+ *    ptrace cpu depend helper functions</div><div class='add'>+ *</div><div class='add'>+ *  Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License.  See the file COPYING in the main directory of</div><div class='add'>+ * this archive for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#define CCR_MASK  0x6f</div><div class='add'>+#define EXR_TRACE 0x80</div><div class='add'>+</div><div class='add'>+/* disable singlestep */</div><div class='add'>+void user_disable_single_step(struct task_struct *child)</div><div class='add'>+{</div><div class='add'>+	unsigned char exr;</div><div class='add'>+</div><div class='add'>+	exr = h8300_get_reg(child, PT_EXR);</div><div class='add'>+	exr &amp;= ~EXR_TRACE;</div><div class='add'>+	h8300_put_reg(child, PT_EXR, exr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* enable singlestep */</div><div class='add'>+void user_enable_single_step(struct task_struct *child)</div><div class='add'>+{</div><div class='add'>+	unsigned char exr;</div><div class='add'>+</div><div class='add'>+	exr = h8300_get_reg(child, PT_EXR);</div><div class='add'>+	exr |= EXR_TRACE;</div><div class='add'>+	h8300_put_reg(child, PT_EXR, exr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void trace_trap(unsigned long bp)</div><div class='add'>+{</div><div class='add'>+	(void)bp;</div><div class='add'>+	force_sig(SIGTRAP, current);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c<br/>new file mode 100644<br/>index 000000000000..0fd1fe65c0b8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/setup.c</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/kernel/setup.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2001-2014 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file handles the architecture-dependent parts of system setup</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/bootmem.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/screen_info.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define CPU "H8/300H"</div><div class='add'>+#elif defined(CONFIG_CPU_H8S)</div><div class='add'>+#define CPU "H8S"</div><div class='add'>+#else</div><div class='add'>+#define CPU "Unknown"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+unsigned long memory_start;</div><div class='add'>+unsigned long memory_end;</div><div class='add'>+EXPORT_SYMBOL(memory_end);</div><div class='add'>+static unsigned long freq;</div><div class='add'>+extern char __dtb_start[];</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_VT</div><div class='add'>+struct screen_info screen_info;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+char __initdata command_line[COMMAND_LINE_SIZE];</div><div class='add'>+</div><div class='add'>+void sim_console_register(void);</div><div class='add'>+</div><div class='add'>+void __init h8300_fdt_init(void *fdt, char *bootargs)</div><div class='add'>+{</div><div class='add'>+	if (!fdt)</div><div class='add'>+		fdt = __dtb_start;</div><div class='add'>+	else</div><div class='add'>+		strcpy(command_line, bootargs);</div><div class='add'>+</div><div class='add'>+	early_init_dt_scan(fdt);</div><div class='add'>+	memblock_allow_resize();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init bootmem_init(void)</div><div class='add'>+{</div><div class='add'>+	int bootmap_size;</div><div class='add'>+	unsigned long ram_start_pfn;</div><div class='add'>+	unsigned long free_ram_start_pfn;</div><div class='add'>+	unsigned long ram_end_pfn;</div><div class='add'>+	struct memblock_region *region;</div><div class='add'>+</div><div class='add'>+	memory_end = memory_start = 0;</div><div class='add'>+</div><div class='add'>+	/* Find main memory where is the kernel */</div><div class='add'>+	for_each_memblock(memory, region) {</div><div class='add'>+		memory_start = region-&gt;base;</div><div class='add'>+		memory_end = region-&gt;base + region-&gt;size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!memory_end)</div><div class='add'>+		panic("No memory!");</div><div class='add'>+</div><div class='add'>+	ram_start_pfn = PFN_UP(memory_start);</div><div class='add'>+	/* free_ram_start_pfn is first page after kernel */</div><div class='add'>+	free_ram_start_pfn = PFN_UP(__pa(_end));</div><div class='add'>+	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());</div><div class='add'>+</div><div class='add'>+	max_pfn = ram_end_pfn;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * give all the memory to the bootmap allocator,  tell it to put the</div><div class='add'>+	 * boot mem_map at the start of memory</div><div class='add'>+	 */</div><div class='add'>+	bootmap_size = init_bootmem_node(NODE_DATA(0),</div><div class='add'>+					 free_ram_start_pfn,</div><div class='add'>+					 0,</div><div class='add'>+					 ram_end_pfn);</div><div class='add'>+	/*</div><div class='add'>+	 * free the usable memory,  we have to make sure we do not free</div><div class='add'>+	 * the bootmem bitmap so we then reserve it after freeing it :-)</div><div class='add'>+	 */</div><div class='add'>+	free_bootmem(PFN_PHYS(free_ram_start_pfn),</div><div class='add'>+		     (ram_end_pfn - free_ram_start_pfn) &lt;&lt; PAGE_SHIFT);</div><div class='add'>+	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,</div><div class='add'>+			BOOTMEM_DEFAULT);</div><div class='add'>+</div><div class='add'>+	for_each_memblock(reserved, region) {</div><div class='add'>+		reserve_bootmem(region-&gt;base, region-&gt;size, BOOTMEM_DEFAULT);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init setup_arch(char **cmdline_p)</div><div class='add'>+{</div><div class='add'>+	unflatten_and_copy_device_tree();</div><div class='add'>+</div><div class='add'>+	init_mm.start_code = (unsigned long) _stext;</div><div class='add'>+	init_mm.end_code = (unsigned long) _etext;</div><div class='add'>+	init_mm.end_data = (unsigned long) _edata;</div><div class='add'>+	init_mm.brk = (unsigned long) 0;</div><div class='add'>+</div><div class='add'>+	pr_notice("\r\n\nuClinux " CPU "\n");</div><div class='add'>+	pr_notice("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");</div><div class='add'>+</div><div class='add'>+	if (*command_line)</div><div class='add'>+		strcpy(boot_command_line, command_line);</div><div class='add'>+	*cmdline_p = boot_command_line;</div><div class='add'>+</div><div class='add'>+	parse_early_param();</div><div class='add'>+</div><div class='add'>+	bootmem_init();</div><div class='add'>+#if defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)</div><div class='add'>+	sim_console_register();</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	early_platform_driver_probe("earlyprintk", 1, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * get kmalloc into gear</div><div class='add'>+	 */</div><div class='add'>+	paging_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Get CPU information for use by the procfs.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='add'>+{</div><div class='add'>+	char *cpu;</div><div class='add'>+</div><div class='add'>+	cpu = CPU;</div><div class='add'>+</div><div class='add'>+	seq_printf(m,  "CPU:\t\t%s\n"</div><div class='add'>+		   "Clock:\t\t%lu.%1luMHz\n"</div><div class='add'>+		   "BogoMips:\t%lu.%02lu\n"</div><div class='add'>+		   "Calibration:\t%lu loops\n",</div><div class='add'>+		   cpu,</div><div class='add'>+		   freq/1000, freq%1000,</div><div class='add'>+		   (loops_per_jiffy*HZ)/500000,</div><div class='add'>+		   ((loops_per_jiffy*HZ)/5000)%100,</div><div class='add'>+		   (loops_per_jiffy*HZ));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *c_start(struct seq_file *m, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	return *pos &lt; num_possible_cpus() ?</div><div class='add'>+		((void *) 0x12345678) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *c_next(struct seq_file *m, void *v, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	++*pos;</div><div class='add'>+	return c_start(m, pos);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_stop(struct seq_file *m, void *v)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct seq_operations cpuinfo_op = {</div><div class='add'>+	.start	= c_start,</div><div class='add'>+	.next	= c_next,</div><div class='add'>+	.stop	= c_stop,</div><div class='add'>+	.show	= show_cpuinfo,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init device_probe(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, NULL, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+device_initcall(device_probe);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+#define get_wait(base, addr) ({		\</div><div class='add'>+	int baddr;			\</div><div class='add'>+	baddr = ((addr) / 0x200000 * 2);			     \</div><div class='add'>+	w *= (ctrl_inw((unsigned long)(base) + 2) &amp; (3 &lt;&lt; baddr)) + 1;	\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+#define get_wait(base, addr) ({		\</div><div class='add'>+	int baddr;			\</div><div class='add'>+	baddr = ((addr) / 0x200000 * 16);			     \</div><div class='add'>+	w *= (ctrl_inl((unsigned long)(base) + 2) &amp; (7 &lt;&lt; baddr)) + 1;	\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static __init int access_timing(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *bsc;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	unsigned long addr = (unsigned long)&amp;__delay;</div><div class='add'>+	int bit = 1 &lt;&lt; (addr / 0x200000);</div><div class='add'>+	int w;</div><div class='add'>+</div><div class='add'>+	bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");</div><div class='add'>+	base = of_iomap(bsc, 0);</div><div class='add'>+	w = (ctrl_inb((unsigned long)base + 0) &amp; bit)?2:1;</div><div class='add'>+	if (ctrl_inb((unsigned long)base + 1) &amp; bit)</div><div class='add'>+		w *= get_wait(base, addr);</div><div class='add'>+	else</div><div class='add'>+		w *= 2;</div><div class='add'>+	return w * 3 / 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init calibrate_delay(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *cpu;</div><div class='add'>+	int freq;</div><div class='add'>+</div><div class='add'>+	cpu = of_find_compatible_node(NULL, NULL, "renesas,h8300");</div><div class='add'>+	of_property_read_s32(cpu, "clock-frequency", &amp;freq);</div><div class='add'>+	loops_per_jiffy = freq / HZ / (access_timing() * 2);</div><div class='add'>+	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",</div><div class='add'>+		loops_per_jiffy / (500000 / HZ),</div><div class='add'>+		(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void __init time_init(void)</div><div class='add'>+{</div><div class='add'>+	of_clk_init(NULL);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c<br/>new file mode 100644<br/>index 000000000000..380fffd081b2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/signal.c</a></div><div class='hunk'>@@ -0,0 +1,289 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/kernel/signal.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * uClinux H8/300 support by Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *                and David McCullough &lt;davidm@snapgear.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on</div><div class='add'>+ * Linux/m68k by Hamish Macdonald</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ++roman (07/09/96): implemented signal stacks (specially for tosemu on</div><div class='add'>+ * Atari :-) Current limitation: Only one sigstack can be active at one time.</div><div class='add'>+ * If a second signal with SA_ONSTACK set arrives while working on a sigstack,</div><div class='add'>+ * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested</div><div class='add'>+ * signal handlers!</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/syscalls.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+#include &lt;linux/stddef.h&gt;</div><div class='add'>+#include &lt;linux/highuid.h&gt;</div><div class='add'>+#include &lt;linux/personality.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/binfmts.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/ucontext.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Do a signal return; undo the signal stack.</div><div class='add'>+ *</div><div class='add'>+ * Keep the return code on the stack quadword aligned!</div><div class='add'>+ * That makes the cache flush below easier.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct rt_sigframe {</div><div class='add'>+	long dummy_er0;</div><div class='add'>+	long dummy_vector;</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	short dummy_exr;</div><div class='add'>+#endif</div><div class='add'>+	long dummy_pc;</div><div class='add'>+	char *pretcode;</div><div class='add'>+	struct siginfo *pinfo;</div><div class='add'>+	void *puc;</div><div class='add'>+	unsigned char retcode[8];</div><div class='add'>+	struct siginfo info;</div><div class='add'>+	struct ucontext uc;</div><div class='add'>+	int sig;</div><div class='add'>+} __packed __aligned(2);</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+restore_sigcontext(struct sigcontext *usc, int *pd0)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = current_pt_regs();</div><div class='add'>+	int err = 0;</div><div class='add'>+	unsigned int ccr;</div><div class='add'>+	unsigned int usp;</div><div class='add'>+	unsigned int er0;</div><div class='add'>+</div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='add'>+	/* restore passed registers */</div><div class='add'>+#define COPY(r)  do { err |= get_user(regs-&gt;r, &amp;usc-&gt;sc_##r); } while (0)</div><div class='add'>+	COPY(er1);</div><div class='add'>+	COPY(er2);</div><div class='add'>+	COPY(er3);</div><div class='add'>+	COPY(er5);</div><div class='add'>+	COPY(pc);</div><div class='add'>+	ccr = regs-&gt;ccr &amp; 0x10;</div><div class='add'>+	COPY(ccr);</div><div class='add'>+#undef COPY</div><div class='add'>+	regs-&gt;ccr &amp;= 0xef;</div><div class='add'>+	regs-&gt;ccr |= ccr;</div><div class='add'>+	regs-&gt;orig_er0 = -1;		/* disable syscall checks */</div><div class='add'>+	err |= __get_user(usp, &amp;usc-&gt;sc_usp);</div><div class='add'>+	wrusp(usp);</div><div class='add'>+</div><div class='add'>+	err |= __get_user(er0, &amp;usc-&gt;sc_er0);</div><div class='add'>+	*pd0 = er0;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage int sys_rt_sigreturn(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long usp = rdusp();</div><div class='add'>+	struct rt_sigframe *frame = (struct rt_sigframe *)(usp - 4);</div><div class='add'>+	sigset_t set;</div><div class='add'>+	int er0;</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='add'>+		goto badframe;</div><div class='add'>+	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='add'>+</div><div class='add'>+	if (restore_sigcontext(&amp;frame-&gt;uc.uc_mcontext, &amp;er0))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	if (restore_altstack(&amp;frame-&gt;uc.uc_stack))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	return er0;</div><div class='add'>+</div><div class='add'>+badframe:</div><div class='add'>+	force_sig(SIGSEGV, current);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,</div><div class='add'>+			     unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err |= __put_user(regs-&gt;er0, &amp;sc-&gt;sc_er0);</div><div class='add'>+	err |= __put_user(regs-&gt;er1, &amp;sc-&gt;sc_er1);</div><div class='add'>+	err |= __put_user(regs-&gt;er2, &amp;sc-&gt;sc_er2);</div><div class='add'>+	err |= __put_user(regs-&gt;er3, &amp;sc-&gt;sc_er3);</div><div class='add'>+	err |= __put_user(regs-&gt;er4, &amp;sc-&gt;sc_er4);</div><div class='add'>+	err |= __put_user(regs-&gt;er5, &amp;sc-&gt;sc_er5);</div><div class='add'>+	err |= __put_user(regs-&gt;er6, &amp;sc-&gt;sc_er6);</div><div class='add'>+	err |= __put_user(rdusp(),   &amp;sc-&gt;sc_usp);</div><div class='add'>+	err |= __put_user(regs-&gt;pc,  &amp;sc-&gt;sc_pc);</div><div class='add'>+	err |= __put_user(regs-&gt;ccr, &amp;sc-&gt;sc_ccr);</div><div class='add'>+	err |= __put_user(mask,      &amp;sc-&gt;sc_mask);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __user *</div><div class='add'>+get_sigframe(struct ksignal *ksig, struct pt_regs *regs, size_t frame_size)</div><div class='add'>+{</div><div class='add'>+	return (void __user *)((sigsp(rdusp(), ksig) - frame_size) &amp; -8UL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,</div><div class='add'>+			  struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct rt_sigframe *frame;</div><div class='add'>+	int err = 0;</div><div class='add'>+	unsigned char *ret;</div><div class='add'>+</div><div class='add'>+	frame = get_sigframe(ksig, regs, sizeof(*frame));</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (ksig-&gt;ka.sa.sa_flags &amp; SA_SIGINFO)</div><div class='add'>+		err |= copy_siginfo_to_user(&amp;frame-&gt;info, &amp;ksig-&gt;info);</div><div class='add'>+</div><div class='add'>+	/* Create the ucontext.  */</div><div class='add'>+	err |= __put_user(0, &amp;frame-&gt;uc.uc_flags);</div><div class='add'>+	err |= __put_user(0, &amp;frame-&gt;uc.uc_link);</div><div class='add'>+	err |= __save_altstack(&amp;frame-&gt;uc.uc_stack, rdusp());</div><div class='add'>+	err |= setup_sigcontext(&amp;frame-&gt;uc.uc_mcontext, regs, set-&gt;sig[0]);</div><div class='add'>+	err |= copy_to_user(&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* Set up to return from userspace.  */</div><div class='add'>+	ret = frame-&gt;retcode;</div><div class='add'>+	if (ksig-&gt;ka.sa.sa_flags &amp; SA_RESTORER)</div><div class='add'>+		ret = (unsigned char *)(ksig-&gt;ka.sa.sa_restorer);</div><div class='add'>+	else {</div><div class='add'>+		/* sub.l er0,er0; mov.b #__NR_rt_sigreturn,r0l; trapa #0 */</div><div class='add'>+		err |= __put_user(0x1a80f800 + (__NR_rt_sigreturn &amp; 0xff),</div><div class='add'>+				  (unsigned long *)(frame-&gt;retcode + 0));</div><div class='add'>+		err |= __put_user(0x5700,</div><div class='add'>+				  (unsigned short *)(frame-&gt;retcode + 4));</div><div class='add'>+	}</div><div class='add'>+	err |= __put_user(ret, &amp;frame-&gt;pretcode);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* Set up registers for signal handler */</div><div class='add'>+	wrusp((unsigned long) frame);</div><div class='add'>+	regs-&gt;pc  = (unsigned long) ksig-&gt;ka.sa.sa_handler;</div><div class='add'>+	regs-&gt;er0 = ksig-&gt;sig;</div><div class='add'>+	regs-&gt;er1 = (unsigned long)&amp;(frame-&gt;info);</div><div class='add'>+	regs-&gt;er2 = (unsigned long)&amp;frame-&gt;uc;</div><div class='add'>+	regs-&gt;er5 = current-&gt;mm-&gt;start_data;	/* GOT base */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+handle_restart(struct pt_regs *regs, struct k_sigaction *ka)</div><div class='add'>+{</div><div class='add'>+	switch (regs-&gt;er0) {</div><div class='add'>+	case -ERESTARTNOHAND:</div><div class='add'>+		if (!ka)</div><div class='add'>+			goto do_restart;</div><div class='add'>+		regs-&gt;er0 = -EINTR;</div><div class='add'>+		break;</div><div class='add'>+	case -ERESTART_RESTARTBLOCK:</div><div class='add'>+		if (!ka) {</div><div class='add'>+			regs-&gt;er0 = __NR_restart_syscall;</div><div class='add'>+			regs-&gt;pc -= 2;</div><div class='add'>+		} else</div><div class='add'>+			regs-&gt;er0 = -EINTR;</div><div class='add'>+		break;</div><div class='add'>+	case -ERESTARTSYS:</div><div class='add'>+		if (!(ka-&gt;sa.sa_flags &amp; SA_RESTART)) {</div><div class='add'>+			regs-&gt;er0 = -EINTR;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* fallthrough */</div><div class='add'>+	case -ERESTARTNOINTR:</div><div class='add'>+do_restart:</div><div class='add'>+		regs-&gt;er0 = regs-&gt;orig_er0;</div><div class='add'>+		regs-&gt;pc -= 2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * OK, we're invoking a handler</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='add'>+	int ret;</div><div class='add'>+	/* are we from a system call? */</div><div class='add'>+	if (regs-&gt;orig_er0 &gt;= 0)</div><div class='add'>+		handle_restart(regs, &amp;ksig-&gt;ka);</div><div class='add'>+</div><div class='add'>+	ret = setup_rt_frame(ksig, oldset, regs);</div><div class='add'>+</div><div class='add'>+	signal_setup_done(ret, ksig, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Note that 'init' is a special process: it doesn't get signals it doesn't</div><div class='add'>+ * want to handle. Thus you cannot kill init even with a SIGKILL even by</div><div class='add'>+ * mistake.</div><div class='add'>+ */</div><div class='add'>+static void do_signal(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct ksignal ksig;</div><div class='add'>+</div><div class='add'>+	current-&gt;thread.esp0 = (unsigned long) regs;</div><div class='add'>+</div><div class='add'>+	if (get_signal(&amp;ksig)) {</div><div class='add'>+		/* Whee!  Actually deliver the signal.  */</div><div class='add'>+		handle_signal(&amp;ksig, regs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* Did we come from a system call? */</div><div class='add'>+	if (regs-&gt;orig_er0 &gt;= 0)</div><div class='add'>+		handle_restart(regs, NULL);</div><div class='add'>+</div><div class='add'>+	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='add'>+	restore_saved_sigmask();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)</div><div class='add'>+{</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='add'>+		do_signal(regs);</div><div class='add'>+</div><div class='add'>+	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='add'>+		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/sim-console.c b/arch/h8300/kernel/sim-console.c<br/>new file mode 100644<br/>index 000000000000..a15edf0565d9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/sim-console.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/sim-console.c</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/h8300/kernel/early_printk.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2009 Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+static void sim_write(struct console *co, const char *ptr,</div><div class='add'>+				 unsigned len)</div><div class='add'>+{</div><div class='add'>+	register const int fd __asm__("er0") = 1; /* stdout */</div><div class='add'>+	register const char *_ptr __asm__("er1") = ptr;</div><div class='add'>+	register const unsigned _len __asm__("er2") = len;</div><div class='add'>+</div><div class='add'>+	__asm__(".byte 0x5e,0x00,0x00,0xc7\n\t" /* jsr @0xc7 (sys_write) */</div><div class='add'>+		: : "g"(fd), "g"(_ptr), "g"(_len));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct console sim_console = {</div><div class='add'>+	.name		= "sim_console",</div><div class='add'>+	.write		= sim_write,</div><div class='add'>+	.setup		= NULL,</div><div class='add'>+	.flags		= CON_PRINTBUFFER,</div><div class='add'>+	.index		= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static char sim_console_buf[32];</div><div class='add'>+</div><div class='add'>+static int sim_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	if (sim_console.data)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	if (!strstr(sim_console_buf, "keep"))</div><div class='add'>+		sim_console.flags |= CON_BOOT;</div><div class='add'>+</div><div class='add'>+	register_console(&amp;sim_console);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sim_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver sim_driver = {</div><div class='add'>+	.probe		= sim_probe,</div><div class='add'>+	.remove		= sim_remove,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "h8300-sim",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+early_platform_init_buffer("earlyprintk", &amp;sim_driver,</div><div class='add'>+			   sim_console_buf, ARRAY_SIZE(sim_console_buf));</div><div class='add'>+</div><div class='add'>+static struct platform_device sim_console_device = {</div><div class='add'>+	.name		= "h8300-sim",</div><div class='add'>+	.id		= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *devices[] __initdata = {</div><div class='add'>+	&amp;sim_console_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init sim_console_register(void)</div><div class='add'>+{</div><div class='add'>+	early_platform_add_devices(devices,</div><div class='add'>+				   ARRAY_SIZE(devices));</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/syscalls.c b/arch/h8300/kernel/syscalls.c<br/>new file mode 100644<br/>index 000000000000..1f9123a013d3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/syscalls.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/syscalls.c</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+#include &lt;linux/syscalls.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+</div><div class='add'>+#undef __SYSCALL</div><div class='add'>+#define __SYSCALL(nr, call) [nr] = (call),</div><div class='add'>+</div><div class='add'>+#define sys_mmap2 sys_mmap_pgoff</div><div class='add'>+</div><div class='add'>+asmlinkage int sys_rt_sigreturn(void);</div><div class='add'>+</div><div class='add'>+void *_sys_call_table[__NR_syscalls] = {</div><div class='add'>+#include &lt;asm/unistd.h&gt;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c<br/>new file mode 100644<br/>index 000000000000..1b2d7cdd6591<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/traps.c</a></div><div class='hunk'>@@ -0,0 +1,161 @@</div><div class='add'>+/*</div><div class='add'>+ * linux/arch/h8300/boot/traps.c -- general exception handling code</div><div class='add'>+ * H8/300 support Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * Cloned from Linux/m68k.</div><div class='add'>+ *</div><div class='add'>+ * No original Copyright holder listed,</div><div class='add'>+ * Probable original (C) Roman Zippel (assigned DJD, 1999)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 1999-2000 D. Jeff Dionne, &lt;jeff@rt-control.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(die_lock);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * this must be called very early as the kernel might</div><div class='add'>+ * use some instruction that are emulated on the 060</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void __init base_trap_init(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init trap_init(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void set_esp0(unsigned long ssp)</div><div class='add'>+{</div><div class='add'>+	current-&gt;thread.esp0 = ssp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Generic dumping code. Used for panic and debug.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void dump(struct pt_regs *fp)</div><div class='add'>+{</div><div class='add'>+	unsigned long	*sp;</div><div class='add'>+	unsigned char	*tp;</div><div class='add'>+	int		i;</div><div class='add'>+</div><div class='add'>+	pr_info("\nCURRENT PROCESS:\n\n");</div><div class='add'>+	pr_info("COMM=%s PID=%d\n", current-&gt;comm, current-&gt;pid);</div><div class='add'>+	if (current-&gt;mm) {</div><div class='add'>+		pr_info("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n",</div><div class='add'>+			(int) current-&gt;mm-&gt;start_code,</div><div class='add'>+			(int) current-&gt;mm-&gt;end_code,</div><div class='add'>+			(int) current-&gt;mm-&gt;start_data,</div><div class='add'>+			(int) current-&gt;mm-&gt;end_data,</div><div class='add'>+			(int) current-&gt;mm-&gt;end_data,</div><div class='add'>+			(int) current-&gt;mm-&gt;brk);</div><div class='add'>+		pr_info("USER-STACK=%08x  KERNEL-STACK=%08lx\n\n",</div><div class='add'>+			(int) current-&gt;mm-&gt;start_stack,</div><div class='add'>+			(int) PAGE_SIZE+(unsigned long)current);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	show_regs(fp);</div><div class='add'>+	pr_info("\nCODE:");</div><div class='add'>+	tp = ((unsigned char *) fp-&gt;pc) - 0x20;</div><div class='add'>+	for (sp = (unsigned long *) tp, i = 0; (i &lt; 0x40);  i += 4) {</div><div class='add'>+		if ((i % 0x10) == 0)</div><div class='add'>+			pr_info("\n%08x: ", (int) (tp + i));</div><div class='add'>+		pr_info("%08x ", (int) *sp++);</div><div class='add'>+	}</div><div class='add'>+	pr_info("\n");</div><div class='add'>+</div><div class='add'>+	pr_info("\nKERNEL STACK:");</div><div class='add'>+	tp = ((unsigned char *) fp) - 0x40;</div><div class='add'>+	for (sp = (unsigned long *) tp, i = 0; (i &lt; 0xc0); i += 4) {</div><div class='add'>+		if ((i % 0x10) == 0)</div><div class='add'>+			pr_info("\n%08x: ", (int) (tp + i));</div><div class='add'>+		pr_info("%08x ", (int) *sp++);</div><div class='add'>+	}</div><div class='add'>+	pr_info("\n");</div><div class='add'>+	if (STACK_MAGIC != *(unsigned long *)((unsigned long)current+PAGE_SIZE))</div><div class='add'>+		pr_info("(Possibly corrupted stack page??)\n");</div><div class='add'>+</div><div class='add'>+	pr_info("\n\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void die(const char *str, struct pt_regs *fp, unsigned long err)</div><div class='add'>+{</div><div class='add'>+	static int diecount;</div><div class='add'>+</div><div class='add'>+	oops_enter();</div><div class='add'>+</div><div class='add'>+	console_verbose();</div><div class='add'>+	spin_lock_irq(&amp;die_lock);</div><div class='add'>+	report_bug(fp-&gt;pc, fp);</div><div class='add'>+	pr_crit("%s: %04lx [#%d] ", str, err &amp; 0xffff, ++diecount);</div><div class='add'>+	dump(fp);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;die_lock);</div><div class='add'>+	do_exit(SIGSEGV);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kstack_depth_to_print = 24;</div><div class='add'>+</div><div class='add'>+void show_stack(struct task_struct *task, unsigned long *esp)</div><div class='add'>+{</div><div class='add'>+	unsigned long *stack,  addr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (esp == NULL)</div><div class='add'>+		esp = (unsigned long *) &amp;esp;</div><div class='add'>+</div><div class='add'>+	stack = esp;</div><div class='add'>+</div><div class='add'>+	pr_info("Stack from %08lx:", (unsigned long)stack);</div><div class='add'>+	for (i = 0; i &lt; kstack_depth_to_print; i++) {</div><div class='add'>+		if (((unsigned long)stack &amp; (THREAD_SIZE - 1)) == 0)</div><div class='add'>+			break;</div><div class='add'>+		if (i % 8 == 0)</div><div class='add'>+			pr_info("\n       ");</div><div class='add'>+		pr_info(" %08lx", *stack++);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("\nCall Trace:");</div><div class='add'>+	i = 0;</div><div class='add'>+	stack = esp;</div><div class='add'>+	while (((unsigned long)stack &amp; (THREAD_SIZE - 1)) != 0) {</div><div class='add'>+		addr = *stack++;</div><div class='add'>+		/*</div><div class='add'>+		 * If the address is either in the text segment of the</div><div class='add'>+		 * kernel, or in the region which contains vmalloc'ed</div><div class='add'>+		 * memory, it *may* be the address of a calling</div><div class='add'>+		 * routine; if so, print it so that someone tracing</div><div class='add'>+		 * down the cause of the crash will be able to figure</div><div class='add'>+		 * out the call path that was taken.</div><div class='add'>+		 */</div><div class='add'>+		if (check_kernel_text(addr)) {</div><div class='add'>+			if (i % 4 == 0)</div><div class='add'>+				pr_info("\n       ");</div><div class='add'>+			pr_info(" [&lt;%08lx&gt;]", addr);</div><div class='add'>+			i++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	pr_info("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void show_trace_task(struct task_struct *tsk)</div><div class='add'>+{</div><div class='add'>+	show_stack(tsk, (unsigned long *)tsk-&gt;thread.esp0);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/kernel/vmlinux.lds.S b/arch/h8300/kernel/vmlinux.lds.S<br/>new file mode 100644<br/>index 000000000000..7c302dcf5249<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+#include &lt;asm-generic/vmlinux.lds.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+#define ROMTOP 0x000000</div><div class='add'>+#define RAMTOP 0x400000</div><div class='add'>+</div><div class='add'>+jiffies = jiffies_64 + 4;</div><div class='add'>+</div><div class='add'>+ENTRY(_start)</div><div class='add'>+</div><div class='add'>+SECTIONS</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+	. = ROMTOP;</div><div class='add'>+	.vectors :</div><div class='add'>+	{</div><div class='add'>+	_vector = . ;</div><div class='add'>+		*(.vector*)</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	. = RAMTOP;</div><div class='add'>+	_ramstart = .;</div><div class='add'>+	. = . + CONFIG_OFFSET;</div><div class='add'>+#endif</div><div class='add'>+	_text = .;</div><div class='add'>+	HEAD_TEXT_SECTION</div><div class='add'>+	.text : {</div><div class='add'>+	_stext = . ;</div><div class='add'>+		TEXT_TEXT</div><div class='add'>+		SCHED_TEXT</div><div class='add'>+		LOCK_TEXT</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+		*(.int_redirect)</div><div class='add'>+#endif</div><div class='add'>+	_etext = . ;</div><div class='add'>+	}</div><div class='add'>+	EXCEPTION_TABLE(16)</div><div class='add'>+	NOTES</div><div class='add'>+	RO_DATA_SECTION(4)</div><div class='add'>+	ROMEND = .;</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+	. = RAMTOP;</div><div class='add'>+	_ramstart = .;</div><div class='add'>+#define ADDR(x) ROMEND</div><div class='add'>+#else</div><div class='add'>+#endif</div><div class='add'>+	_sdata = . ;</div><div class='add'>+	__data_start = . ;</div><div class='add'>+	RW_DATA_SECTION(0,0,0)</div><div class='add'>+#if defined(CONFIG_ROMKERNEL)</div><div class='add'>+#undef ADDR</div><div class='add'>+#endif</div><div class='add'>+	. = ALIGN(0x4) ;</div><div class='add'>+	__init_begin = .;</div><div class='add'>+	INIT_TEXT_SECTION(4)</div><div class='add'>+	INIT_DATA_SECTION(4)</div><div class='add'>+	SECURITY_INIT</div><div class='add'>+	__init_end = .;</div><div class='add'>+	_edata = . ;</div><div class='add'>+	_begin_data = LOADADDR(.data);</div><div class='add'>+	_sbss =.;</div><div class='add'>+	BSS_SECTION(0, 0 ,0)</div><div class='add'>+	_ebss =.;</div><div class='add'>+	_ramend = .;</div><div class='add'>+	_end = .;</div><div class='add'>+	DISCARDS</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/Makefile b/arch/h8300/lib/Makefile<br/>new file mode 100644<br/>index 000000000000..28ff560d825f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for H8/300-specific library files..</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+lib-y  = memcpy.o memset.o abs.o strncpy.o \</div><div class='add'>+	 mulsi3.o udivsi3.o muldi3.o moddivsi3.o \</div><div class='add'>+	 ashldi3.o lshrdi3.o ashrdi3.o ucmpdi2.o \</div><div class='add'>+	 delay.o</div><div class='head'>diff --git a/arch/h8300/lib/abs.S b/arch/h8300/lib/abs.S<br/>new file mode 100644<br/>index 000000000000..efda749db03e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/abs.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/abs.S</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+;;; abs.S</div><div class='add'>+</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.h8300h</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.h8300s</div><div class='add'>+#endif</div><div class='add'>+	.text</div><div class='add'>+.global _abs</div><div class='add'>+</div><div class='add'>+;;; int abs(int n)</div><div class='add'>+_abs:</div><div class='add'>+	mov.l	er0,er0</div><div class='add'>+	bpl	1f</div><div class='add'>+	neg.l	er0</div><div class='add'>+1:</div><div class='add'>+	rts</div><div class='head'>diff --git a/arch/h8300/lib/ashldi3.c b/arch/h8300/lib/ashldi3.c<br/>new file mode 100644<br/>index 000000000000..c6aa8ea5f4be<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/ashldi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ashldi3.c</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+DWtype</div><div class='add'>+__ashldi3(DWtype u, word_type b)</div><div class='add'>+{</div><div class='add'>+	const DWunion uu = {.ll = u};</div><div class='add'>+	const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;</div><div class='add'>+	DWunion w;</div><div class='add'>+</div><div class='add'>+	if (b == 0)</div><div class='add'>+		return u;</div><div class='add'>+</div><div class='add'>+	if (bm &lt;= 0) {</div><div class='add'>+		w.s.low = 0;</div><div class='add'>+		w.s.high = (UWtype) uu.s.low &lt;&lt; -bm;</div><div class='add'>+	} else {</div><div class='add'>+		const UWtype carries = (UWtype) uu.s.low &gt;&gt; bm;</div><div class='add'>+</div><div class='add'>+		w.s.low = (UWtype) uu.s.low &lt;&lt; b;</div><div class='add'>+		w.s.high = ((UWtype) uu.s.high &lt;&lt; b) | carries;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return w.ll;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/ashrdi3.c b/arch/h8300/lib/ashrdi3.c<br/>new file mode 100644<br/>index 000000000000..070adf96d3b6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/ashrdi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ashrdi3.c</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+DWtype __ashrdi3(DWtype u, word_type b)</div><div class='add'>+{</div><div class='add'>+	const DWunion uu = {.ll = u};</div><div class='add'>+	const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;</div><div class='add'>+	DWunion w;</div><div class='add'>+</div><div class='add'>+	if (b == 0)</div><div class='add'>+		return u;</div><div class='add'>+</div><div class='add'>+	if (bm &lt;= 0) {</div><div class='add'>+		/* w.s.high = 1..1 or 0..0 */</div><div class='add'>+		w.s.high = uu.s.high &gt;&gt; (sizeof (Wtype) * BITS_PER_UNIT - 1);</div><div class='add'>+		w.s.low = uu.s.high &gt;&gt; -bm;</div><div class='add'>+	} else {</div><div class='add'>+		const UWtype carries = (UWtype) uu.s.high &lt;&lt; bm;</div><div class='add'>+</div><div class='add'>+		w.s.high = uu.s.high &gt;&gt; b;</div><div class='add'>+		w.s.low = ((UWtype) uu.s.low &gt;&gt; b) | carries;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return w.ll;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/delay.c b/arch/h8300/lib/delay.c<br/>new file mode 100644<br/>index 000000000000..463f6b3afb52<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/delay.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/delay.c</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/*</div><div class='add'>+ * delay loops</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Yoshinori Sato</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;asm/param.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/timex.h&gt;</div><div class='add'>+</div><div class='add'>+void __delay(unsigned long cycles)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile ("1: dec.l #1,%0\n\t"</div><div class='add'>+			  "bne 1b":"=r"(cycles):"0"(cycles));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__delay);</div><div class='add'>+</div><div class='add'>+void __const_udelay(unsigned long xloops)</div><div class='add'>+{</div><div class='add'>+	u64 loops;</div><div class='add'>+</div><div class='add'>+	loops = (u64)xloops * loops_per_jiffy * HZ;</div><div class='add'>+</div><div class='add'>+	__delay(loops &gt;&gt; 32);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__const_udelay);</div><div class='add'>+</div><div class='add'>+void __udelay(unsigned long usecs)</div><div class='add'>+{</div><div class='add'>+	__const_udelay(usecs * 0x10C7UL); /* 2**32 / 1000000 (rounded up) */</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__udelay);</div><div class='add'>+</div><div class='add'>+void __ndelay(unsigned long nsecs)</div><div class='add'>+{</div><div class='add'>+	__const_udelay(nsecs * 0x5UL); /* 2**32 / 1000000000 (rounded up) */</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__ndelay);</div><div class='head'>diff --git a/arch/h8300/lib/libgcc.h b/arch/h8300/lib/libgcc.h<br/>new file mode 100644<br/>index 000000000000..468a8f78197a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/libgcc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/libgcc.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+#ifndef __H8300_LIBGCC_H__</div><div class='add'>+#define __H8300_LIBGCC_H__</div><div class='add'>+</div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+#define A0 r0</div><div class='add'>+#define A0L r0l</div><div class='add'>+#define A0H r0h</div><div class='add'>+</div><div class='add'>+#define A1 r1</div><div class='add'>+#define A1L r1l</div><div class='add'>+#define A1H r1h</div><div class='add'>+</div><div class='add'>+#define A2 r2</div><div class='add'>+#define A2L r2l</div><div class='add'>+#define A2H r2h</div><div class='add'>+</div><div class='add'>+#define A3 r3</div><div class='add'>+#define A3L r3l</div><div class='add'>+#define A3H r3h</div><div class='add'>+</div><div class='add'>+#define S0 r4</div><div class='add'>+#define S0L r4l</div><div class='add'>+#define S0H r4h</div><div class='add'>+</div><div class='add'>+#define S1 r5</div><div class='add'>+#define S1L r5l</div><div class='add'>+#define S1H r5h</div><div class='add'>+</div><div class='add'>+#define S2 r6</div><div class='add'>+#define S2L r6l</div><div class='add'>+#define S2H r6h</div><div class='add'>+</div><div class='add'>+#define PUSHP	push.l</div><div class='add'>+#define POPP	pop.l</div><div class='add'>+</div><div class='add'>+#define A0P	er0</div><div class='add'>+#define A1P	er1</div><div class='add'>+#define A2P	er2</div><div class='add'>+#define A3P	er3</div><div class='add'>+#define S0P	er4</div><div class='add'>+#define S1P	er5</div><div class='add'>+#define S2P	er6</div><div class='add'>+</div><div class='add'>+#define A0E	e0</div><div class='add'>+#define A1E	e1</div><div class='add'>+#define A2E	e2</div><div class='add'>+#define A3E	e3</div><div class='add'>+#else</div><div class='add'>+#define Wtype   SItype</div><div class='add'>+#define UWtype  USItype</div><div class='add'>+#define HWtype  SItype</div><div class='add'>+#define UHWtype USItype</div><div class='add'>+#define DWtype  DItype</div><div class='add'>+#define UDWtype UDItype</div><div class='add'>+#define UWtype  USItype</div><div class='add'>+#define Wtype   SItype</div><div class='add'>+#define UWtype  USItype</div><div class='add'>+#define W_TYPE_SIZE (4 * BITS_PER_UNIT)</div><div class='add'>+#define BITS_PER_UNIT (8)</div><div class='add'>+</div><div class='add'>+typedef          int SItype     __attribute__ ((mode (SI)));</div><div class='add'>+typedef unsigned int USItype    __attribute__ ((mode (SI)));</div><div class='add'>+typedef		 int DItype	__attribute__ ((mode (DI)));</div><div class='add'>+typedef unsigned int UDItype	__attribute__ ((mode (DI)));</div><div class='add'>+struct DWstruct {</div><div class='add'>+	Wtype high, low;</div><div class='add'>+};</div><div class='add'>+typedef union {</div><div class='add'>+	struct DWstruct s;</div><div class='add'>+	DWtype ll;</div><div class='add'>+} DWunion;</div><div class='add'>+</div><div class='add'>+typedef int word_type __attribute__ ((mode (__word__)));</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/h8300/lib/lshrdi3.c b/arch/h8300/lib/lshrdi3.c<br/>new file mode 100644<br/>index 000000000000..a86bbe395f17<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/lshrdi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/lshrdi3.c</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+DWtype __lshrdi3(DWtype u, word_type b)</div><div class='add'>+{</div><div class='add'>+	const DWunion uu = {.ll = u};</div><div class='add'>+	const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;</div><div class='add'>+	DWunion w;</div><div class='add'>+</div><div class='add'>+	if (b == 0)</div><div class='add'>+		return u;</div><div class='add'>+</div><div class='add'>+	if (bm &lt;= 0) {</div><div class='add'>+		w.s.high = 0;</div><div class='add'>+		w.s.low = (UWtype) uu.s.high &gt;&gt; -bm;</div><div class='add'>+	} else {</div><div class='add'>+		const UWtype carries = (UWtype) uu.s.high &lt;&lt; bm;</div><div class='add'>+</div><div class='add'>+		w.s.high = (UWtype) uu.s.high &gt;&gt; b;</div><div class='add'>+		w.s.low = ((UWtype) uu.s.low &gt;&gt; b) | carries;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return w.ll;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/memcpy.S b/arch/h8300/lib/memcpy.S<br/>new file mode 100644<br/>index 000000000000..0c9a51fcdea1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/memcpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/memcpy.S</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+;;; memcpy.S</div><div class='add'>+</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.h8300h</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.h8300s</div><div class='add'>+#endif</div><div class='add'>+	.text</div><div class='add'>+.global memcpy</div><div class='add'>+</div><div class='add'>+;;; void *memcpy(void *to, void *from, size_t n)</div><div class='add'>+memcpy:</div><div class='add'>+	mov.l	er2,er2</div><div class='add'>+	bne	1f</div><div class='add'>+	rts</div><div class='add'>+1:</div><div class='add'>+	;; address check</div><div class='add'>+	bld	#0,r0l</div><div class='add'>+	bxor	#0,r1l</div><div class='add'>+	bcs	4f</div><div class='add'>+	mov.l	er4,@-sp</div><div class='add'>+	mov.l	er0,@-sp</div><div class='add'>+	btst	#0,r0l</div><div class='add'>+	beq	1f</div><div class='add'>+	;; (aligned even) odd address</div><div class='add'>+	mov.b	@er1,r3l</div><div class='add'>+	mov.b	r3l,@er0</div><div class='add'>+	adds	#1,er1</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	beq	3f</div><div class='add'>+1:</div><div class='add'>+	;; n &lt; sizeof(unsigned long) check</div><div class='add'>+	sub.l	er4,er4</div><div class='add'>+	adds	#4,er4		; loop count check value</div><div class='add'>+	cmp.l	er4,er2</div><div class='add'>+	blo	2f</div><div class='add'>+	;; unsigned long copy</div><div class='add'>+1:</div><div class='add'>+	mov.l	@er1,er3</div><div class='add'>+	mov.l	er3,@er0</div><div class='add'>+	adds	#4,er0</div><div class='add'>+	adds	#4,er1</div><div class='add'>+	subs	#4,er2</div><div class='add'>+	cmp.l	er4,er2</div><div class='add'>+	bcc	1b</div><div class='add'>+	;; rest</div><div class='add'>+2:</div><div class='add'>+	mov.l	er2,er2</div><div class='add'>+	beq	3f</div><div class='add'>+1:</div><div class='add'>+	mov.b	@er1,r3l</div><div class='add'>+	mov.b	r3l,@er0</div><div class='add'>+	adds	#1,er1</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	bne	1b</div><div class='add'>+3:</div><div class='add'>+	mov.l	@sp+,er0</div><div class='add'>+	mov.l	@sp+,er4</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	;; odd &lt;- even / even &lt;- odd</div><div class='add'>+4:</div><div class='add'>+	mov.l	er4,er3</div><div class='add'>+	mov.l	er2,er4</div><div class='add'>+	mov.l	er5,er2</div><div class='add'>+	mov.l	er1,er5</div><div class='add'>+	mov.l	er6,er1</div><div class='add'>+	mov.l	er0,er6</div><div class='add'>+1:</div><div class='add'>+	eepmov.w</div><div class='add'>+	mov.w	r4,r4</div><div class='add'>+	bne	1b</div><div class='add'>+	dec.w	#1,e4</div><div class='add'>+	bpl	1b</div><div class='add'>+	mov.l	er1,er6</div><div class='add'>+	mov.l	er2,er5</div><div class='add'>+	mov.l	er3,er4</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/lib/memset.S b/arch/h8300/lib/memset.S<br/>new file mode 100644<br/>index 000000000000..18d4e709b5f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/memset.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/memset.S</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+/* memset.S */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	.h8300h</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	.h8300s</div><div class='add'>+#endif</div><div class='add'>+	.text</div><div class='add'>+</div><div class='add'>+.global	memset</div><div class='add'>+.global	clear_user</div><div class='add'>+</div><div class='add'>+;;void *memset(*ptr, int c, size_t count)</div><div class='add'>+;; ptr = er0</div><div class='add'>+;; c   = er1(r1l)</div><div class='add'>+;; count = er2</div><div class='add'>+memset:</div><div class='add'>+	btst	#0,r0l</div><div class='add'>+	beq	2f</div><div class='add'>+</div><div class='add'>+	;; odd address</div><div class='add'>+1:</div><div class='add'>+	mov.b	r1l,@er0</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	beq	6f</div><div class='add'>+</div><div class='add'>+	;; even address</div><div class='add'>+2:</div><div class='add'>+	mov.l	er2,er3</div><div class='add'>+	cmp.l	#4,er2</div><div class='add'>+	blo	4f</div><div class='add'>+	;; count&gt;=4 -&gt; count/4</div><div class='add'>+#if defined(CONFIG_CPU_H8300H)</div><div class='add'>+	shlr.l	er2</div><div class='add'>+	shlr.l	er2</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_CPU_H8S)</div><div class='add'>+	shlr.l	#2,er2</div><div class='add'>+#endif</div><div class='add'>+	;; byte -&gt; long</div><div class='add'>+	mov.b	r1l,r1h</div><div class='add'>+	mov.w	r1,e1</div><div class='add'>+3:</div><div class='add'>+	mov.l	er1,@er0</div><div class='add'>+	adds	#4,er0</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	bne	3b</div><div class='add'>+4:</div><div class='add'>+	;; count % 4</div><div class='add'>+	and.b	#3,r3l</div><div class='add'>+	beq	6f</div><div class='add'>+5:</div><div class='add'>+	mov.b	r1l,@er0</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	dec.b	r3l</div><div class='add'>+	bne	5b</div><div class='add'>+6:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+clear_user:</div><div class='add'>+	mov.l	er1, er2</div><div class='add'>+	sub.l	er1, er1</div><div class='add'>+	bra	memset</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/lib/moddivsi3.S b/arch/h8300/lib/moddivsi3.S<br/>new file mode 100644<br/>index 000000000000..c803129e877f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/moddivsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/moddivsi3.S</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+; numerator in A0/A1</div><div class='add'>+; denominator in A2/A3</div><div class='add'>+	.global	__modsi3</div><div class='add'>+__modsi3:</div><div class='add'>+	PUSHP	S2P</div><div class='add'>+	bsr	modnorm</div><div class='add'>+	bsr	__divsi3</div><div class='add'>+	mov.l	er3,er0</div><div class='add'>+	bra	exitdiv</div><div class='add'>+</div><div class='add'>+	.global	__umodsi3</div><div class='add'>+__umodsi3:</div><div class='add'>+	bsr	__udivsi3:16</div><div class='add'>+	mov.l	er3,er0</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.global	__divsi3</div><div class='add'>+__divsi3:</div><div class='add'>+	PUSHP	S2P</div><div class='add'>+	bsr	divnorm</div><div class='add'>+	bsr	__udivsi3:16</div><div class='add'>+</div><div class='add'>+	; examine what the sign should be</div><div class='add'>+exitdiv:</div><div class='add'>+	btst	#3,S2L</div><div class='add'>+	beq	reti</div><div class='add'>+</div><div class='add'>+	; should be -ve</div><div class='add'>+	neg.l	A0P</div><div class='add'>+</div><div class='add'>+reti:</div><div class='add'>+	POPP	S2P</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+divnorm:</div><div class='add'>+	mov.l	A0P,A0P		; is the numerator -ve</div><div class='add'>+	stc	ccr,S2L		; keep the sign in bit 3 of S2L</div><div class='add'>+	bge	postive</div><div class='add'>+</div><div class='add'>+	neg.l	A0P		; negate arg</div><div class='add'>+</div><div class='add'>+postive:</div><div class='add'>+	mov.l	A1P,A1P		; is the denominator -ve</div><div class='add'>+	bge	postive2</div><div class='add'>+</div><div class='add'>+	neg.l	A1P		; negate arg</div><div class='add'>+	xor.b	#0x08,S2L	; toggle the result sign</div><div class='add'>+</div><div class='add'>+postive2:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+;; Basically the same, except that the sign of the divisor determines</div><div class='add'>+;; the sign.</div><div class='add'>+modnorm:</div><div class='add'>+	mov.l	A0P,A0P		; is the numerator -ve</div><div class='add'>+	stc	ccr,S2L		; keep the sign in bit 3 of S2L</div><div class='add'>+	bge	mpostive</div><div class='add'>+</div><div class='add'>+	neg.l	A0P		; negate arg</div><div class='add'>+</div><div class='add'>+mpostive:</div><div class='add'>+	mov.l	A1P,A1P		; is the denominator -ve</div><div class='add'>+	bge	mpostive2</div><div class='add'>+</div><div class='add'>+	neg.l	A1P		; negate arg</div><div class='add'>+</div><div class='add'>+mpostive2:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/lib/modsi3.S b/arch/h8300/lib/modsi3.S<br/>new file mode 100644<br/>index 000000000000..68b1dfc32824<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/modsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/modsi3.S</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+; numerator in A0/A1</div><div class='add'>+; denominator in A2/A3</div><div class='add'>+	.global	__modsi3</div><div class='add'>+__modsi3:</div><div class='add'>+	PUSHP	S2P</div><div class='add'>+	bsr	modnorm</div><div class='add'>+	bsr	__divsi3</div><div class='add'>+	mov.l	er3,er0</div><div class='add'>+	bra	exitdiv</div><div class='add'>+</div><div class='add'>+	.global	__umodsi3</div><div class='add'>+__umodsi3:</div><div class='add'>+	bsr	__udivsi3</div><div class='add'>+	mov.l	er3,er0</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.global	__divsi3</div><div class='add'>+__divsi3:</div><div class='add'>+	PUSHP	S2P</div><div class='add'>+	jsr	divnorm</div><div class='add'>+	bsr	__udivsi3</div><div class='add'>+</div><div class='add'>+	; examine what the sign should be</div><div class='add'>+exitdiv:</div><div class='add'>+	btst	#3,S2L</div><div class='add'>+	beq	reti</div><div class='add'>+</div><div class='add'>+	; should be -ve</div><div class='add'>+	neg.l	A0P</div><div class='add'>+</div><div class='add'>+reti:</div><div class='add'>+	POPP	S2P</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+divnorm:</div><div class='add'>+	mov.l	A0P,A0P		; is the numerator -ve</div><div class='add'>+	stc	ccr,S2L		; keep the sign in bit 3 of S2L</div><div class='add'>+	bge	postive</div><div class='add'>+</div><div class='add'>+	neg.l	A0P		; negate arg</div><div class='add'>+</div><div class='add'>+postive:</div><div class='add'>+	mov.l	A1P,A1P		; is the denominator -ve</div><div class='add'>+	bge	postive2</div><div class='add'>+</div><div class='add'>+	neg.l	A1P		; negate arg</div><div class='add'>+	xor.b	#0x08,S2L	; toggle the result sign</div><div class='add'>+</div><div class='add'>+postive2:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+;; Basically the same, except that the sign of the divisor determines</div><div class='add'>+;; the sign.</div><div class='add'>+modnorm:</div><div class='add'>+	mov.l	A0P,A0P		; is the numerator -ve</div><div class='add'>+	stc	ccr,S2L		; keep the sign in bit 3 of S2L</div><div class='add'>+	bge	mpostive</div><div class='add'>+</div><div class='add'>+	neg.l	A0P		; negate arg</div><div class='add'>+</div><div class='add'>+mpostive:</div><div class='add'>+	mov.l	A1P,A1P		; is the denominator -ve</div><div class='add'>+	bge	mpostive2</div><div class='add'>+</div><div class='add'>+	neg.l	A1P		; negate arg</div><div class='add'>+</div><div class='add'>+mpostive2:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/lib/muldi3.c b/arch/h8300/lib/muldi3.c<br/>new file mode 100644<br/>index 000000000000..790512243531<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/muldi3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/muldi3.c</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+#define __ll_B ((UWtype) 1 &lt;&lt; (W_TYPE_SIZE / 2))</div><div class='add'>+#define __ll_lowpart(t) ((UWtype) (t) &amp; (__ll_B - 1))</div><div class='add'>+#define __ll_highpart(t) ((UWtype) (t) &gt;&gt; (W_TYPE_SIZE / 2))</div><div class='add'>+</div><div class='add'>+#define umul_ppmm(w1, w0, u, v) \</div><div class='add'>+	do {			   \</div><div class='add'>+		UWtype __x0, __x1, __x2, __x3;	\</div><div class='add'>+		UHWtype __ul, __vl, __uh, __vh; \</div><div class='add'>+		__ul = __ll_lowpart(u);	\</div><div class='add'>+		__uh = __ll_highpart(u);	\</div><div class='add'>+		__vl = __ll_lowpart(v);	\</div><div class='add'>+		__vh = __ll_highpart(v);	\</div><div class='add'>+		__x0 = (UWtype) __ul * __vl;	\</div><div class='add'>+		__x1 = (UWtype) __ul * __vh;	\</div><div class='add'>+		__x2 = (UWtype) __uh * __vl;	\</div><div class='add'>+		__x3 = (UWtype) __uh * __vh;	\</div><div class='add'>+		__x1 += __ll_highpart(__x0);	\</div><div class='add'>+		__x1 += __x2;			\</div><div class='add'>+		if (__x1 &lt; __x2)		\</div><div class='add'>+			__x3 += __ll_B;		\</div><div class='add'>+		(w1) = __x3 + __ll_highpart(__x1);	       \</div><div class='add'>+		(w0) = __ll_lowpart(__x1) * __ll_B + __ll_lowpart(__x0); \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define __umulsidi3(u, v) (			\</div><div class='add'>+		{				\</div><div class='add'>+			DWunion __w;		\</div><div class='add'>+			umul_ppmm(__w.s.high, __w.s.low, u, v);	\</div><div class='add'>+			__w.ll; }					\</div><div class='add'>+		)</div><div class='add'>+</div><div class='add'>+DWtype __muldi3(DWtype u, DWtype v)</div><div class='add'>+{</div><div class='add'>+	const DWunion uu = {.ll = u};</div><div class='add'>+	const DWunion vv = {.ll = v};</div><div class='add'>+	DWunion w = {.ll = __umulsidi3(uu.s.low, vv.s.low)};</div><div class='add'>+</div><div class='add'>+	w.s.high += ((UWtype) uu.s.low * (UWtype) vv.s.high</div><div class='add'>+		     + (UWtype) uu.s.high * (UWtype) vv.s.low);</div><div class='add'>+</div><div class='add'>+	return w.ll;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/mulsi3.S b/arch/h8300/lib/mulsi3.S<br/>new file mode 100644<br/>index 000000000000..451f0e0538ee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/mulsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/mulsi3.S</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+;</div><div class='add'>+; mulsi3 for H8/300H - based on Renesas SH implementation</div><div class='add'>+;</div><div class='add'>+; by Toshiyasu Morita</div><div class='add'>+;</div><div class='add'>+; Old code:</div><div class='add'>+;</div><div class='add'>+; 16b * 16b = 372 states (worst case)</div><div class='add'>+; 32b * 32b = 724 states (worst case)</div><div class='add'>+;</div><div class='add'>+; New code:</div><div class='add'>+;</div><div class='add'>+; 16b * 16b =  48 states</div><div class='add'>+; 16b * 32b =  72 states</div><div class='add'>+; 32b * 32b =  92 states</div><div class='add'>+;</div><div class='add'>+</div><div class='add'>+	.global __mulsi3</div><div class='add'>+__mulsi3:</div><div class='add'>+	mov.w	r1,r2   ; ( 2 states) b * d</div><div class='add'>+	mulxu	r0,er2  ; (22 states)</div><div class='add'>+</div><div class='add'>+	mov.w	e0,r3   ; ( 2 states) a * d</div><div class='add'>+	beq	L_skip1 ; ( 4 states)</div><div class='add'>+	mulxu	r1,er3  ; (22 states)</div><div class='add'>+	add.w	r3,e2   ; ( 2 states)</div><div class='add'>+</div><div class='add'>+L_skip1:</div><div class='add'>+	mov.w	e1,r3   ; ( 2 states) c * b</div><div class='add'>+	beq	L_skip2 ; ( 4 states)</div><div class='add'>+	mulxu	r0,er3  ; (22 states)</div><div class='add'>+	add.w	r3,e2   ; ( 2 states)</div><div class='add'>+</div><div class='add'>+L_skip2:</div><div class='add'>+	mov.l	er2,er0	; ( 2 states)</div><div class='add'>+	rts		; (10 states)</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/lib/strncpy.S b/arch/h8300/lib/strncpy.S<br/>new file mode 100644<br/>index 000000000000..d00396a378f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/strncpy.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/strncpy.S</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+;;; strncpy.S</div><div class='add'>+</div><div class='add'>+#include &lt;asm/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+	.text</div><div class='add'>+.global strncpy_from_user</div><div class='add'>+</div><div class='add'>+;;; long strncpy_from_user(void *to, void *from, size_t n)</div><div class='add'>+strncpy_from_user:</div><div class='add'>+	mov.l	er2,er2</div><div class='add'>+	bne	1f</div><div class='add'>+	sub.l	er0,er0</div><div class='add'>+	rts</div><div class='add'>+1:</div><div class='add'>+	mov.l	er4,@-sp</div><div class='add'>+	sub.l	er3,er3</div><div class='add'>+2:</div><div class='add'>+	mov.b	@er1+,r4l</div><div class='add'>+	mov.b	r4l,@er0</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	beq	3f</div><div class='add'>+	inc.l	#1,er3</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	bne	2b</div><div class='add'>+3:</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+4:</div><div class='add'>+	mov.b	r4l,@er0</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	dec.l	#1,er2</div><div class='add'>+	bne	4b</div><div class='add'>+	mov.l	er3,er0</div><div class='add'>+	mov.l	@sp+,er4</div><div class='add'>+	rts</div><div class='head'>diff --git a/arch/h8300/lib/ucmpdi2.c b/arch/h8300/lib/ucmpdi2.c<br/>new file mode 100644<br/>index 000000000000..772399d705cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/ucmpdi2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/ucmpdi2.c</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+word_type __ucmpdi2(DWtype a, DWtype b)</div><div class='add'>+{</div><div class='add'>+	const DWunion au = {.ll = a};</div><div class='add'>+	const DWunion bu = {.ll = b};</div><div class='add'>+</div><div class='add'>+	if ((UWtype) au.s.high &lt; (UWtype) bu.s.high)</div><div class='add'>+		return 0;</div><div class='add'>+	else if ((UWtype) au.s.high &gt; (UWtype) bu.s.high)</div><div class='add'>+		return 2;</div><div class='add'>+	if ((UWtype) au.s.low &lt; (UWtype) bu.s.low)</div><div class='add'>+		return 0;</div><div class='add'>+	else if ((UWtype) au.s.low &gt; (UWtype) bu.s.low)</div><div class='add'>+		return 2;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/lib/udivsi3.S b/arch/h8300/lib/udivsi3.S<br/>new file mode 100644<br/>index 000000000000..bbe65610f316<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/lib/udivsi3.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/lib/udivsi3.S</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+	;; This function also computes the remainder and stores it in er3.</div><div class='add'>+	.global	__udivsi3</div><div class='add'>+__udivsi3:</div><div class='add'>+	mov.w	A1E,A1E		; denominator top word 0?</div><div class='add'>+	bne	DenHighNonZero</div><div class='add'>+</div><div class='add'>+	; do it the easy way, see page 107 in manual</div><div class='add'>+	mov.w	A0E,A2</div><div class='add'>+	extu.l	A2P</div><div class='add'>+	divxu.w	A1,A2P</div><div class='add'>+	mov.w	A2E,A0E</div><div class='add'>+	divxu.w	A1,A0P</div><div class='add'>+	mov.w	A0E,A3</div><div class='add'>+	mov.w	A2,A0E</div><div class='add'>+	extu.l	A3P</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	; er0 = er0 / er1</div><div class='add'>+	; er3 = er0 % er1</div><div class='add'>+	; trashes er1 er2</div><div class='add'>+	; expects er1 &gt;= 2^16</div><div class='add'>+DenHighNonZero:</div><div class='add'>+	mov.l	er0,er3</div><div class='add'>+	mov.l	er1,er2</div><div class='add'>+#ifdef CONFIG_CPU_H8300H</div><div class='add'>+divmod_L21:</div><div class='add'>+	shlr.l	er0</div><div class='add'>+	shlr.l	er2		; make divisor &lt; 2^16</div><div class='add'>+	mov.w	e2,e2</div><div class='add'>+	bne	divmod_L21</div><div class='add'>+#else</div><div class='add'>+	shlr.l	#2,er2		; make divisor &lt; 2^16</div><div class='add'>+	mov.w	e2,e2</div><div class='add'>+	beq	divmod_L22A</div><div class='add'>+divmod_L21:</div><div class='add'>+	shlr.l	#2,er0</div><div class='add'>+divmod_L22:</div><div class='add'>+	shlr.l	#2,er2		; make divisor &lt; 2^16</div><div class='add'>+	mov.w	e2,e2</div><div class='add'>+	bne	divmod_L21</div><div class='add'>+divmod_L22A:</div><div class='add'>+	rotxl.w	r2</div><div class='add'>+	bcs	divmod_L23</div><div class='add'>+	shlr.l	er0</div><div class='add'>+	bra	divmod_L24</div><div class='add'>+divmod_L23:</div><div class='add'>+	rotxr.w	r2</div><div class='add'>+	shlr.l	#2,er0</div><div class='add'>+divmod_L24:</div><div class='add'>+#endif</div><div class='add'>+	;; At this point,</div><div class='add'>+	;;  er0 contains shifted dividend</div><div class='add'>+	;;  er1 contains divisor</div><div class='add'>+	;;  er2 contains shifted divisor</div><div class='add'>+	;;  er3 contains dividend, later remainder</div><div class='add'>+	divxu.w	r2,er0		; r0 now contains the approximate quotient (AQ)</div><div class='add'>+	extu.l	er0</div><div class='add'>+	beq	divmod_L25</div><div class='add'>+	subs	#1,er0		; er0 = AQ - 1</div><div class='add'>+	mov.w	e1,r2</div><div class='add'>+	mulxu.w	r0,er2		; er2 = upper (AQ - 1) * divisor</div><div class='add'>+	sub.w	r2,e3		; dividend - 65536 * er2</div><div class='add'>+	mov.w	r1,r2</div><div class='add'>+	mulxu.w	r0,er2		; compute er3 = remainder (tentative)</div><div class='add'>+	sub.l	er2,er3		; er3 = dividend - (AQ - 1) * divisor</div><div class='add'>+divmod_L25:</div><div class='add'>+	cmp.l	er1,er3		; is divisor &lt; remainder?</div><div class='add'>+	blo	divmod_L26</div><div class='add'>+	adds	#1,er0</div><div class='add'>+	sub.l	er1,er3		; correct the remainder</div><div class='add'>+divmod_L26:</div><div class='add'>+	rts</div><div class='add'>+</div><div class='add'>+	.end</div><div class='head'>diff --git a/arch/h8300/mm/Makefile b/arch/h8300/mm/Makefile<br/>new file mode 100644<br/>index 000000000000..508697f0d97c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the linux h8300-specific parts of the memory manager.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y	 := init.o fault.o memory.o</div><div class='head'>diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c<br/>new file mode 100644<br/>index 000000000000..5924ff555ded<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/fault.c</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/mm/fault.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1998  D. Jeff Dionne &lt;jeff@lineo.ca&gt;,</div><div class='add'>+ *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)</div><div class='add'>+ *</div><div class='add'>+ *  Based on:</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68knommu/mm/fault.c</div><div class='add'>+ *  linux/arch/m68k/mm/fault.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1995  Hamish Macdonald</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mman.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+</div><div class='add'>+void die(const char *str, struct pt_regs *fp, unsigned long err);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This routine handles page faults.  It determines the problem, and</div><div class='add'>+ * then passes it off to one of the appropriate routines.</div><div class='add'>+ *</div><div class='add'>+ * error_code:</div><div class='add'>+ *	bit 0 == 0 means no page found, 1 means protection fault</div><div class='add'>+ *	bit 1 == 0 means read, 1 means write</div><div class='add'>+ *</div><div class='add'>+ * If this routine detects a bad access, it returns 1, otherwise it</div><div class='add'>+ * returns 0.</div><div class='add'>+ */</div><div class='add'>+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='add'>+			      unsigned long error_code)</div><div class='add'>+{</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+	pr_debug("regs-&gt;sr=%#x, regs-&gt;pc=%#lx, address=%#lx, %ld\n",</div><div class='add'>+		 regs-&gt;sr, regs-&gt;pc, address, error_code);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Oops. The kernel tried to access some bad page. We'll have to</div><div class='add'>+ * terminate things with extreme prejudice.</div><div class='add'>+ */</div><div class='add'>+	if ((unsigned long) address &lt; PAGE_SIZE)</div><div class='add'>+		pr_alert("Unable to handle kernel NULL pointer dereference");</div><div class='add'>+	else</div><div class='add'>+		pr_alert("Unable to handle kernel access");</div><div class='add'>+	printk(" at virtual address %08lx\n", address);</div><div class='add'>+	if (!user_mode(regs))</div><div class='add'>+		die("Oops", regs, error_code);</div><div class='add'>+	do_exit(SIGKILL);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/mm/init.c b/arch/h8300/mm/init.c<br/>new file mode 100644<br/>index 000000000000..495a3d6b539b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/init.c</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/mm/init.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1998  D. Jeff Dionne &lt;jeff@lineo.ca&gt;,</div><div class='add'>+ *                      Kenneth Albanowski &lt;kjahds@kjahds.com&gt;,</div><div class='add'>+ *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)</div><div class='add'>+ *</div><div class='add'>+ *  Based on:</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68knommu/mm/init.c</div><div class='add'>+ *  linux/arch/m68k/mm/init.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1995  Hamish Macdonald</div><div class='add'>+ *</div><div class='add'>+ *  JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com)</div><div class='add'>+ *  DEC/2000 -- linux 2.4 support &lt;davidm@snapgear.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/mman.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/swap.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/highmem.h&gt;</div><div class='add'>+#include &lt;linux/pagemap.h&gt;</div><div class='add'>+#include &lt;linux/bootmem.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * BAD_PAGE is the page that is used for page faults when linux</div><div class='add'>+ * is out-of-memory. Older versions of linux just did a</div><div class='add'>+ * do_exit(), but using this instead means there is less risk</div><div class='add'>+ * for a process dying in kernel mode, possibly leaving a inode</div><div class='add'>+ * unused etc..</div><div class='add'>+ *</div><div class='add'>+ * BAD_PAGETABLE is the accompanying page-table: it is initialized</div><div class='add'>+ * to point to BAD_PAGE entries.</div><div class='add'>+ *</div><div class='add'>+ * ZERO_PAGE is a special page that is used for zero-initialized</div><div class='add'>+ * data and COW.</div><div class='add'>+ */</div><div class='add'>+static unsigned long empty_bad_page_table;</div><div class='add'>+static unsigned long empty_bad_page;</div><div class='add'>+unsigned long empty_zero_page;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * paging_init() continues the virtual memory environment setup which</div><div class='add'>+ * was begun by the code in arch/head.S.</div><div class='add'>+ * The parameters are pointers to where to stick the starting and ending</div><div class='add'>+ * addresses of available kernel virtual memory.</div><div class='add'>+ */</div><div class='add'>+void __init paging_init(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure start_mem is page aligned,  otherwise bootmem and</div><div class='add'>+	 * page_alloc get different views og the world.</div><div class='add'>+	 */</div><div class='add'>+	unsigned long start_mem = PAGE_ALIGN(memory_start);</div><div class='add'>+	unsigned long end_mem   = memory_end &amp; PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	pr_debug("start_mem is %#lx\nvirtual_end is %#lx\n",</div><div class='add'>+		 start_mem, end_mem);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize the bad page table and bad page to point</div><div class='add'>+	 * to a couple of allocated pages.</div><div class='add'>+	 */</div><div class='add'>+	empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);</div><div class='add'>+	empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);</div><div class='add'>+	empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);</div><div class='add'>+	memset((void *)empty_zero_page, 0, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up SFC/DFC registers (user data space).</div><div class='add'>+	 */</div><div class='add'>+	set_fs(USER_DS);</div><div class='add'>+</div><div class='add'>+	pr_debug("before free_area_init\n");</div><div class='add'>+</div><div class='add'>+	pr_debug("free_area_init -&gt; start_mem is %#lx\nvirtual_end is %#lx\n",</div><div class='add'>+		 start_mem, end_mem);</div><div class='add'>+</div><div class='add'>+	{</div><div class='add'>+		unsigned long zones_size[MAX_NR_ZONES] = {0, };</div><div class='add'>+</div><div class='add'>+		zones_size[ZONE_NORMAL] = (end_mem - PAGE_OFFSET) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		free_area_init(zones_size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init mem_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_devel("Mem_init: start=%lx, end=%lx\n", memory_start, memory_end);</div><div class='add'>+</div><div class='add'>+	high_memory = (void *) (memory_end &amp; PAGE_MASK);</div><div class='add'>+	max_mapnr = MAP_NR(high_memory);</div><div class='add'>+</div><div class='add'>+	/* this will put all low memory onto the freelists */</div><div class='add'>+	free_all_bootmem();</div><div class='add'>+</div><div class='add'>+	mem_init_print_info(NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BLK_DEV_INITRD</div><div class='add'>+void free_initrd_mem(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	free_reserved_area((void *)start, (void *)end, -1, "initrd");</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+free_initmem(void)</div><div class='add'>+{</div><div class='add'>+	free_initmem_default(-1);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/h8300/mm/memory.c b/arch/h8300/mm/memory.c<br/>new file mode 100644<br/>index 000000000000..4974aa40bcb8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/mm/memory.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/h8300/mm/memory.c</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/h8300/mm/memory.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2002  Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;,</div><div class='add'>+ *</div><div class='add'>+ *  Based on:</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68knommu/mm/memory.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1998  Kenneth Albanowski &lt;kjahds@kjahds.com&gt;,</div><div class='add'>+ *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)</div><div class='add'>+ *</div><div class='add'>+ *  Based on:</div><div class='add'>+ *</div><div class='add'>+ *  linux/arch/m68k/mm/memory.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1995  Hamish Macdonald</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+void cache_clear(unsigned long paddr, int len)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void cache_push(unsigned long paddr, int len)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cache_push_v(unsigned long vaddr, int len)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Map some physical address range into the kernel address space.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+unsigned long kernel_map(unsigned long paddr, unsigned long size,</div><div class='add'>+			 int nocacheflag, unsigned long *memavailp)</div><div class='add'>+{</div><div class='add'>+	return paddr;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild<br/>index c7a99f860b40..daee37bd0999 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/hexagon/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/Kbuild</a></div><div class='hunk'>@@ -28,6 +28,7 @@ generic-y += kmap_types.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += pci.h</div><div class='hunk'>@@ -37,7 +38,6 @@ generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='ctx'> generic-y += rwsem.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='head'>diff --git a/arch/hexagon/include/asm/cmpxchg.h b/arch/hexagon/include/asm/cmpxchg.h<br/>index 9e7802911a57..a6e34e2acbba 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/hexagon/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -64,7 +64,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,</div><div class='ctx'>  *  looks just like atomic_cmpxchg on our arch currently with a bunch of</div><div class='ctx'>  *  variable casting.</div><div class='ctx'>  */</div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='ctx'> </div><div class='ctx'> #define cmpxchg(ptr, old, new)					\</div><div class='ctx'> ({								\</div><div class='head'>diff --git a/arch/hexagon/include/asm/uaccess.h b/arch/hexagon/include/asm/uaccess.h<br/>index e4127e4d6a5b..f000a382bc7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/hexagon/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/hexagon/include/asm/uaccess.h</a></div><div class='hunk'>@@ -36,7 +36,8 @@</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig<br/>index 76d25b2cfbbe..42a91a7aa2b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/Kconfig</a></div><div class='hunk'>@@ -137,29 +137,6 @@ config AUDIT_ARCH</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-menuconfig PARAVIRT_GUEST</div><div class='del'>-	bool "Paravirtualized guest support"</div><div class='del'>-	depends on BROKEN</div><div class='del'>-	help</div><div class='del'>-	  Say Y here to get to see options related to running Linux under</div><div class='del'>-	  various hypervisors.  This option alone does not add any kernel code.</div><div class='del'>-</div><div class='del'>-	  If you say N, all options in this submenu will be skipped and disabled.</div><div class='del'>-</div><div class='del'>-if PARAVIRT_GUEST</div><div class='del'>-</div><div class='del'>-config PARAVIRT</div><div class='del'>-	bool "Enable paravirtualization code"</div><div class='del'>-	depends on PARAVIRT_GUEST</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  This changes the kernel so it can modify itself when it is run</div><div class='del'>-	  under a hypervisor, potentially improving performance significantly</div><div class='del'>-	  over full virtualization.  However, when run without a hypervisor</div><div class='del'>-	  the kernel is theoretically slower and slightly larger.</div><div class='del'>-</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "System type"</div><div class='ctx'> 	default IA64_GENERIC</div><div class='head'>diff --git a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c<br/>index 3a428f19a001..085047f3a545 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/hp/sim/simscsi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/hp/sim/simscsi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/hp/sim/simscsi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/hp/sim/simscsi.c</a></div><div class='hunk'>@@ -368,13 +368,4 @@ simscsi_init(void)</div><div class='ctx'> 	scsi_host_put(host);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static void __exit</div><div class='del'>-simscsi_exit(void)</div><div class='del'>-{</div><div class='del'>-	scsi_remove_host(host);</div><div class='del'>-	scsi_host_put(host);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(simscsi_init);</div><div class='del'>-module_exit(simscsi_exit);</div><div class='add'>+device_initcall(simscsi_init);</div><div class='head'>diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild<br/>index 9b41b4bcc073..9de3ba12f6b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/Kbuild</a></div><div class='hunk'>@@ -4,7 +4,7 @@ generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='ctx'> generic-y += vtime.h</div><div class='head'>diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h<br/>index f6769eb2bbf9..843ba435e43b 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/barrier.h</a></div><div class='hunk'>@@ -77,12 +77,7 @@ do {									\</div><div class='ctx'> 	___p1;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * XXX check on this ---I suspect what Linus really wants here is</div><div class='del'>- * acquire vs release semantics but we can't discuss this stuff with</div><div class='del'>- * Linus just yet.  Grrr...</div><div class='del'>- */</div><div class='del'>-#define set_mb(var, value)	do { (var) = (value); mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The group barrier in front of the rsm &amp; ssm are necessary to ensure</div><div class='head'>diff --git a/arch/ia64/include/asm/hugetlb.h b/arch/ia64/include/asm/hugetlb.h<br/>index aa910054b8e7..ef65f026b11e 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -20,10 +20,6 @@ static inline int is_hugepage_only_range(struct mm_struct *mm,</div><div class='ctx'> 		REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				   pte_t *ptep, pte_t pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -69,15 +65,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h<br/>index 668786e84af8..74347ebf7d68 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/hw_irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/hw_irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/hw_irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/hw_irq.h</a></div><div class='hunk'>@@ -15,11 +15,7 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_PARAVIRT</div><div class='ctx'> typedef u8 ia64_vector;</div><div class='del'>-#else</div><div class='del'>-typedef u16 ia64_vector;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * 0 special</div><div class='hunk'>@@ -114,15 +110,11 @@ DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);</div><div class='ctx'> </div><div class='ctx'> extern struct irq_chip irq_type_ia64_lsapic;	/* CPU-internal interrupt controller */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PARAVIRT_GUEST</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-#else</div><div class='ctx'> #define ia64_register_ipi	ia64_native_register_ipi</div><div class='ctx'> #define assign_irq_vector	ia64_native_assign_irq_vector</div><div class='ctx'> #define free_irq_vector		ia64_native_free_irq_vector</div><div class='ctx'> #define register_percpu_irq	ia64_native_register_percpu_irq</div><div class='ctx'> #define ia64_resend_irq		ia64_native_resend_irq</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> extern void ia64_native_register_ipi(void);</div><div class='ctx'> extern int bind_irq_vector(int irq, int vector, cpumask_t domain);</div><div class='head'>diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h<br/>index 20477ea111ba..ec970a920132 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/intrinsics.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/intrinsics.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/intrinsics.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/intrinsics.h</a></div><div class='hunk'>@@ -7,19 +7,6 @@</div><div class='ctx'> #ifndef _ASM_IA64_INTRINSICS_H</div><div class='ctx'> #define _ASM_IA64_INTRINSICS_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/paravirt_privop.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/intrinsics.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#if defined(CONFIG_PARAVIRT)</div><div class='del'>-# undef IA64_INTRINSIC_API</div><div class='del'>-# undef IA64_INTRINSIC_MACRO</div><div class='del'>-# ifdef ASM_SUPPORTED</div><div class='del'>-#  define IA64_INTRINSIC_API(name)	paravirt_ ## name</div><div class='del'>-# else</div><div class='del'>-#  define IA64_INTRINSIC_API(name)	pv_cpu_ops.name</div><div class='del'>-# endif</div><div class='del'>-#define IA64_INTRINSIC_MACRO(name)	paravirt_ ## name</div><div class='del'>-#endif</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='ctx'> #endif /* _ASM_IA64_INTRINSICS_H */</div><div class='head'>diff --git a/arch/ia64/include/asm/iosapic.h b/arch/ia64/include/asm/iosapic.h<br/>index 94c89a2d97fe..4ae1fbd7f10e 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/iosapic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/iosapic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/iosapic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/iosapic.h</a></div><div class='hunk'>@@ -55,14 +55,10 @@</div><div class='ctx'> </div><div class='ctx'> #define NR_IOSAPICS			256</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PARAVIRT_GUEST</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-#else</div><div class='ctx'> #define iosapic_pcat_compat_init	ia64_native_iosapic_pcat_compat_init</div><div class='ctx'> #define __iosapic_read			__ia64_native_iosapic_read</div><div class='ctx'> #define __iosapic_write			__ia64_native_iosapic_write</div><div class='ctx'> #define iosapic_get_irq_chip		ia64_native_iosapic_get_irq_chip</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> extern void __init ia64_native_iosapic_pcat_compat_init(void);</div><div class='ctx'> extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);</div><div class='head'>diff --git a/arch/ia64/include/asm/irq_remapping.h b/arch/ia64/include/asm/irq_remapping.h<br/>index e3b3556e2e1b..a8687b1d8906 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/irq_remapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/irq_remapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/irq_remapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/irq_remapping.h</a></div><div class='hunk'>@@ -1,6 +1,4 @@</div><div class='ctx'> #ifndef __IA64_INTR_REMAPPING_H</div><div class='ctx'> #define __IA64_INTR_REMAPPING_H</div><div class='ctx'> #define irq_remapping_enabled 0</div><div class='del'>-#define dmar_alloc_hwirq	create_irq</div><div class='del'>-#define dmar_free_hwirq		destroy_irq</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/ia64/include/asm/module.h b/arch/ia64/include/asm/module.h<br/>index dfba22a872c3..f31894b2a354 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/module.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/module.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/module.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/module.h</a></div><div class='hunk'>@@ -18,12 +18,6 @@ struct mod_arch_specific {</div><div class='ctx'> 	struct elf64_shdr *got;		/* global offset table */</div><div class='ctx'> 	struct elf64_shdr *opd;		/* official procedure descriptors */</div><div class='ctx'> 	struct elf64_shdr *unwind;	/* unwind-table section */</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-	struct elf64_shdr *paravirt_bundles;</div><div class='del'>-					/* paravirt_alt_bundle_patch table */</div><div class='del'>-	struct elf64_shdr *paravirt_insts;</div><div class='del'>-					/* paravirt_alt_inst_patch table */</div><div class='del'>-#endif</div><div class='ctx'> 	unsigned long gp;		/* global-pointer for module */</div><div class='ctx'> </div><div class='ctx'> 	void *core_unw_table;		/* core unwind-table cookie returned by unwinder */</div><div class='head'>diff --git a/arch/ia64/include/asm/native/inst.h b/arch/ia64/include/asm/native/inst.h<br/>index d2d46efb3e6e..7e08f17accd5 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/native/inst.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/native/inst.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/native/inst.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/native/inst.h</a></div><div class='hunk'>@@ -22,32 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DO_SAVE_MIN		IA64_NATIVE_DO_SAVE_MIN</div><div class='ctx'> </div><div class='del'>-#define __paravirt_switch_to			ia64_native_switch_to</div><div class='del'>-#define __paravirt_leave_syscall		ia64_native_leave_syscall</div><div class='del'>-#define __paravirt_work_processed_syscall	ia64_native_work_processed_syscall</div><div class='del'>-#define __paravirt_leave_kernel			ia64_native_leave_kernel</div><div class='del'>-#define __paravirt_pending_syscall_end		ia64_work_pending_syscall_end</div><div class='del'>-#define __paravirt_work_processed_syscall_target \</div><div class='del'>-						ia64_work_processed_syscall</div><div class='del'>-</div><div class='del'>-#define paravirt_fsyscall_table			ia64_native_fsyscall_table</div><div class='del'>-#define paravirt_fsys_bubble_down		ia64_native_fsys_bubble_down</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK</div><div class='del'>-# define PARAVIRT_POISON	0xdeadbeefbaadf00d</div><div class='del'>-# define CLOBBER(clob)				\</div><div class='del'>-	;;					\</div><div class='del'>-	movl clob = PARAVIRT_POISON;		\</div><div class='del'>-	;;</div><div class='del'>-# define CLOBBER_PRED(pred_clob)		\</div><div class='del'>-	;;					\</div><div class='del'>-	cmp.eq pred_clob, p0 = r0, r0		\</div><div class='del'>-	;;</div><div class='del'>-#else</div><div class='del'>-# define CLOBBER(clob)			/* nothing */</div><div class='del'>-# define CLOBBER_PRED(pred_clob)	/* nothing */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define MOV_FROM_IFA(reg)	\</div><div class='ctx'> 	mov reg = cr.ifa</div><div class='ctx'> </div><div class='hunk'>@@ -70,106 +44,76 @@</div><div class='ctx'> 	mov reg = cr.iip</div><div class='ctx'> </div><div class='ctx'> #define MOV_FROM_IVR(reg, clob)	\</div><div class='del'>-	mov reg = cr.ivr	\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+	mov reg = cr.ivr</div><div class='ctx'> </div><div class='ctx'> #define MOV_FROM_PSR(pred, reg, clob)	\</div><div class='del'>-(pred)	mov reg = psr			\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	mov reg = psr</div><div class='ctx'> </div><div class='ctx'> #define MOV_FROM_ITC(pred, pred_clob, reg, clob)	\</div><div class='del'>-(pred)	mov reg = ar.itc				\</div><div class='del'>-	CLOBBER(clob)					\</div><div class='del'>-	CLOBBER_PRED(pred_clob)</div><div class='add'>+(pred)	mov reg = ar.itc</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_IFA(reg, clob)	\</div><div class='del'>-	mov cr.ifa = reg	\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+	mov cr.ifa = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_ITIR(pred, reg, clob)	\</div><div class='del'>-(pred)	mov cr.itir = reg		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	mov cr.itir = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_IHA(pred, reg, clob)	\</div><div class='del'>-(pred)	mov cr.iha = reg		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	mov cr.iha = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_IPSR(pred, reg, clob)		\</div><div class='del'>-(pred)	mov cr.ipsr = reg			\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	mov cr.ipsr = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_IFS(pred, reg, clob)	\</div><div class='del'>-(pred)	mov cr.ifs = reg		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	mov cr.ifs = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_IIP(reg, clob)	\</div><div class='del'>-	mov cr.iip = reg	\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+	mov cr.iip = reg</div><div class='ctx'> </div><div class='ctx'> #define MOV_TO_KR(kr, reg, clob0, clob1)	\</div><div class='del'>-	mov IA64_KR(kr) = reg			\</div><div class='del'>-	CLOBBER(clob0)				\</div><div class='del'>-	CLOBBER(clob1)</div><div class='add'>+	mov IA64_KR(kr) = reg</div><div class='ctx'> </div><div class='ctx'> #define ITC_I(pred, reg, clob)	\</div><div class='del'>-(pred)	itc.i reg		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	itc.i reg</div><div class='ctx'> </div><div class='ctx'> #define ITC_D(pred, reg, clob)	\</div><div class='del'>-(pred)	itc.d reg		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	itc.d reg</div><div class='ctx'> </div><div class='ctx'> #define ITC_I_AND_D(pred_i, pred_d, reg, clob)	\</div><div class='ctx'> (pred_i) itc.i reg;				\</div><div class='del'>-(pred_d) itc.d reg				\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred_d) itc.d reg</div><div class='ctx'> </div><div class='ctx'> #define THASH(pred, reg0, reg1, clob)		\</div><div class='del'>-(pred)	thash reg0 = reg1			\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+(pred)	thash reg0 = reg1</div><div class='ctx'> </div><div class='ctx'> #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1)		\</div><div class='ctx'> 	ssm psr.ic | PSR_DEFAULT_BITS					\</div><div class='del'>-	CLOBBER(clob0)							\</div><div class='del'>-	CLOBBER(clob1)							\</div><div class='ctx'> 	;;								\</div><div class='ctx'> 	srlz.i /* guarantee that interruption collectin is on */	\</div><div class='ctx'> 	;;</div><div class='ctx'> </div><div class='ctx'> #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1)	\</div><div class='ctx'> 	ssm psr.ic				\</div><div class='del'>-	CLOBBER(clob0)				\</div><div class='del'>-	CLOBBER(clob1)				\</div><div class='ctx'> 	;;					\</div><div class='ctx'> 	srlz.d</div><div class='ctx'> </div><div class='ctx'> #define RSM_PSR_IC(clob)	\</div><div class='del'>-	rsm psr.ic		\</div><div class='del'>-	CLOBBER(clob)</div><div class='add'>+	rsm psr.ic</div><div class='ctx'> </div><div class='ctx'> #define SSM_PSR_I(pred, pred_clob, clob)	\</div><div class='del'>-(pred)	ssm psr.i				\</div><div class='del'>-	CLOBBER(clob)				\</div><div class='del'>-	CLOBBER_PRED(pred_clob)</div><div class='add'>+(pred)	ssm psr.i</div><div class='ctx'> </div><div class='ctx'> #define RSM_PSR_I(pred, clob0, clob1)	\</div><div class='del'>-(pred)	rsm psr.i			\</div><div class='del'>-	CLOBBER(clob0)			\</div><div class='del'>-	CLOBBER(clob1)</div><div class='add'>+(pred)	rsm psr.i</div><div class='ctx'> </div><div class='ctx'> #define RSM_PSR_I_IC(clob0, clob1, clob2)	\</div><div class='del'>-	rsm psr.i | psr.ic			\</div><div class='del'>-	CLOBBER(clob0)				\</div><div class='del'>-	CLOBBER(clob1)				\</div><div class='del'>-	CLOBBER(clob2)</div><div class='add'>+	rsm psr.i | psr.ic</div><div class='ctx'> </div><div class='ctx'> #define RSM_PSR_DT		\</div><div class='ctx'> 	rsm psr.dt</div><div class='ctx'> </div><div class='ctx'> #define RSM_PSR_BE_I(clob0, clob1)	\</div><div class='del'>-	rsm psr.be | psr.i		\</div><div class='del'>-	CLOBBER(clob0)			\</div><div class='del'>-	CLOBBER(clob1)</div><div class='add'>+	rsm psr.be | psr.i</div><div class='ctx'> </div><div class='ctx'> #define SSM_PSR_DT_AND_SRLZ_I	\</div><div class='ctx'> 	ssm psr.dt		\</div><div class='hunk'>@@ -177,15 +121,10 @@</div><div class='ctx'> 	srlz.i</div><div class='ctx'> </div><div class='ctx'> #define BSW_0(clob0, clob1, clob2)	\</div><div class='del'>-	bsw.0				\</div><div class='del'>-	CLOBBER(clob0)			\</div><div class='del'>-	CLOBBER(clob1)			\</div><div class='del'>-	CLOBBER(clob2)</div><div class='add'>+	bsw.0</div><div class='ctx'> </div><div class='ctx'> #define BSW_1(clob0, clob1)	\</div><div class='del'>-	bsw.1			\</div><div class='del'>-	CLOBBER(clob0)		\</div><div class='del'>-	CLOBBER(clob1)</div><div class='add'>+	bsw.1</div><div class='ctx'> </div><div class='ctx'> #define COVER	\</div><div class='ctx'> 	cover</div><div class='head'>diff --git a/arch/ia64/include/asm/native/pvchk_inst.h b/arch/ia64/include/asm/native/pvchk_inst.h<br/>deleted file mode 100644<br/>index 8d72962ec838..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/native/pvchk_inst.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/native/pvchk_inst.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,271 +0,0 @@</div><div class='del'>-#ifndef _ASM_NATIVE_PVCHK_INST_H</div><div class='del'>-#define _ASM_NATIVE_PVCHK_INST_H</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * arch/ia64/include/asm/native/pvchk_inst.h</div><div class='del'>- * Checker for paravirtualizations of privileged operations.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2005 Hewlett-Packard Co</div><div class='del'>- *      Dan Magenheimer &lt;dan.magenheimer@hp.com&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * Instructions paravirtualized for correctness</div><div class='del'>- **********************************************/</div><div class='del'>-</div><div class='del'>-/* "fc" and "thash" are privilege-sensitive instructions, meaning they</div><div class='del'>- *  may have different semantics depending on whether they are executed</div><div class='del'>- *  at PL0 vs PL!=0.  When paravirtualized, these instructions mustn't</div><div class='del'>- *  be allowed to execute directly, lest incorrect semantics result.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define fc	.error "fc should not be used directly."</div><div class='del'>-#define thash	.error "thash should not be used directly."</div><div class='del'>-</div><div class='del'>-/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"</div><div class='del'>- * is not currently used (though it may be in a long-format VHPT system!)</div><div class='del'>- * and the semantics of cover only change if psr.ic is off which is very</div><div class='del'>- * rare (and currently non-existent outside of assembly code</div><div class='del'>- */</div><div class='del'>-#define ttag	.error "ttag should not be used directly."</div><div class='del'>-#define cover	.error "cover should not be used directly."</div><div class='del'>-</div><div class='del'>-/* There are also privilege-sensitive registers.  These registers are</div><div class='del'>- * readable at any privilege level but only writable at PL0.</div><div class='del'>- */</div><div class='del'>-#define cpuid	.error "cpuid should not be used directly."</div><div class='del'>-#define pmd	.error "pmd should not be used directly."</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mov ar.eflag =</div><div class='del'>- * mov = ar.eflag</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * Instructions paravirtualized for performance</div><div class='del'>- **********************************************/</div><div class='del'>-/*</div><div class='del'>- * Those instructions include '.' which can't be handled by cpp.</div><div class='del'>- * or can't be handled by cpp easily.</div><div class='del'>- * They are handled by sed instead of cpp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* for .S</div><div class='del'>- * itc.i</div><div class='del'>- * itc.d</div><div class='del'>- *</div><div class='del'>- * bsw.0</div><div class='del'>- * bsw.1</div><div class='del'>- *</div><div class='del'>- * ssm psr.ic | PSR_DEFAULT_BITS</div><div class='del'>- * ssm psr.ic</div><div class='del'>- * rsm psr.ic</div><div class='del'>- * ssm psr.i</div><div class='del'>- * rsm psr.i</div><div class='del'>- * rsm psr.i | psr.ic</div><div class='del'>- * rsm psr.dt</div><div class='del'>- * ssm psr.dt</div><div class='del'>- *</div><div class='del'>- * mov = cr.ifa</div><div class='del'>- * mov = cr.itir</div><div class='del'>- * mov = cr.isr</div><div class='del'>- * mov = cr.iha</div><div class='del'>- * mov = cr.ipsr</div><div class='del'>- * mov = cr.iim</div><div class='del'>- * mov = cr.iip</div><div class='del'>- * mov = cr.ivr</div><div class='del'>- * mov = psr</div><div class='del'>- *</div><div class='del'>- * mov cr.ifa =</div><div class='del'>- * mov cr.itir =</div><div class='del'>- * mov cr.iha =</div><div class='del'>- * mov cr.ipsr =</div><div class='del'>- * mov cr.ifs =</div><div class='del'>- * mov cr.iip =</div><div class='del'>- * mov cr.kr =</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* for intrinsics</div><div class='del'>- * ssm psr.i</div><div class='del'>- * rsm psr.i</div><div class='del'>- * mov = psr</div><div class='del'>- * mov = ivr</div><div class='del'>- * mov = tpr</div><div class='del'>- * mov cr.itm =</div><div class='del'>- * mov eoi =</div><div class='del'>- * mov rr[] =</div><div class='del'>- * mov = rr[]</div><div class='del'>- * mov = kr</div><div class='del'>- * mov kr =</div><div class='del'>- * ptc.ga</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*************************************************************</div><div class='del'>- * define paravirtualized instrcution macros as nop to ingore.</div><div class='del'>- * and check whether arguments are appropriate.</div><div class='del'>- *************************************************************/</div><div class='del'>-</div><div class='del'>-/* check whether reg is a regular register */</div><div class='del'>-.macro is_rreg_in reg</div><div class='del'>-	.ifc "\reg", "r0"</div><div class='del'>-		nop 0</div><div class='del'>-		.exitm</div><div class='del'>-	.endif</div><div class='del'>-	;;</div><div class='del'>-	mov \reg = r0</div><div class='del'>-	;;</div><div class='del'>-.endm</div><div class='del'>-#define IS_RREG_IN(reg)	is_rreg_in reg ;</div><div class='del'>-</div><div class='del'>-#define IS_RREG_OUT(reg)			\</div><div class='del'>-	;;					\</div><div class='del'>-	mov reg = r0				\</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-#define IS_RREG_CLOB(reg)	IS_RREG_OUT(reg)</div><div class='del'>-</div><div class='del'>-/* check whether pred is a predicate register */</div><div class='del'>-#define IS_PRED_IN(pred)			\</div><div class='del'>-	;;					\</div><div class='del'>-	(pred)	nop 0				\</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-#define IS_PRED_OUT(pred)			\</div><div class='del'>-	;;					\</div><div class='del'>-	cmp.eq pred, p0 = r0, r0		\</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-#define IS_PRED_CLOB(pred)	IS_PRED_OUT(pred)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define DO_SAVE_MIN(__COVER, SAVE_IFS, EXTRA, WORKAROUND)	\</div><div class='del'>-	nop 0</div><div class='del'>-#define MOV_FROM_IFA(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_ITIR(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_ISR(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_IHA(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_IPSR(pred, reg)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_IIM(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_IIP(reg)			\</div><div class='del'>-	IS_RREG_OUT(reg)</div><div class='del'>-#define MOV_FROM_IVR(reg, clob)			\</div><div class='del'>-	IS_RREG_OUT(reg)			\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_FROM_PSR(pred, reg, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_OUT(reg)			\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_FROM_ITC(pred, pred_clob, reg, clob)	\</div><div class='del'>-	IS_PRED_IN(pred)				\</div><div class='del'>-	IS_PRED_CLOB(pred_clob)				\</div><div class='del'>-	IS_RREG_OUT(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_IFA(reg, clob)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_ITIR(pred, reg, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_IHA(pred, reg, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_IPSR(pred, reg, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_IFS(pred, reg, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_IIP(reg, clob)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define MOV_TO_KR(kr, reg, clob0, clob1)	\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define ITC_I(pred, reg, clob)			\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define ITC_D(pred, reg, clob)			\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define ITC_I_AND_D(pred_i, pred_d, reg, clob)	\</div><div class='del'>-	IS_PRED_IN(pred_i)			\</div><div class='del'>-	IS_PRED_IN(pred_d)			\</div><div class='del'>-	IS_RREG_IN(reg)				\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define THASH(pred, reg0, reg1, clob)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_OUT(reg0)			\</div><div class='del'>-	IS_RREG_IN(reg1)			\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1)	\</div><div class='del'>-	IS_RREG_CLOB(clob0)					\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1)	\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define RSM_PSR_IC(clob)			\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define SSM_PSR_I(pred, pred_clob, clob)	\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_PRED_CLOB(pred_clob)			\</div><div class='del'>-	IS_RREG_CLOB(clob)</div><div class='del'>-#define RSM_PSR_I(pred, clob0, clob1)		\</div><div class='del'>-	IS_PRED_IN(pred)			\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define RSM_PSR_I_IC(clob0, clob1, clob2)	\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)			\</div><div class='del'>-	IS_RREG_CLOB(clob2)</div><div class='del'>-#define RSM_PSR_DT				\</div><div class='del'>-	nop 0</div><div class='del'>-#define RSM_PSR_BE_I(clob0, clob1)		\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define SSM_PSR_DT_AND_SRLZ_I			\</div><div class='del'>-	nop 0</div><div class='del'>-#define BSW_0(clob0, clob1, clob2)		\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)			\</div><div class='del'>-	IS_RREG_CLOB(clob2)</div><div class='del'>-#define BSW_1(clob0, clob1)			\</div><div class='del'>-	IS_RREG_CLOB(clob0)			\</div><div class='del'>-	IS_RREG_CLOB(clob1)</div><div class='del'>-#define COVER					\</div><div class='del'>-	nop 0</div><div class='del'>-#define RFI					\</div><div class='del'>-	br.ret.sptk.many rp /* defining nop causes dependency error */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_NATIVE_PVCHK_INST_H */</div><div class='head'>diff --git a/arch/ia64/include/asm/paravirt.h b/arch/ia64/include/asm/paravirt.h<br/>deleted file mode 100644<br/>index b53518a98026..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/paravirt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/paravirt.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,321 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_PARAVIRT_H</div><div class='del'>-#define __ASM_PARAVIRT_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-/******************************************************************************</div><div class='del'>- * fsys related addresses</div><div class='del'>- */</div><div class='del'>-struct pv_fsys_data {</div><div class='del'>-	unsigned long *fsyscall_table;</div><div class='del'>-	void *fsys_bubble_down;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_fsys_data pv_fsys_data;</div><div class='del'>-</div><div class='del'>-unsigned long *paravirt_get_fsyscall_table(void);</div><div class='del'>-char *paravirt_get_fsys_bubble_down(void);</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * patchlist addresses for gate page</div><div class='del'>- */</div><div class='del'>-enum pv_gate_patchlist {</div><div class='del'>-	PV_GATE_START_FSYSCALL,</div><div class='del'>-	PV_GATE_END_FSYSCALL,</div><div class='del'>-</div><div class='del'>-	PV_GATE_START_BRL_FSYS_BUBBLE_DOWN,</div><div class='del'>-	PV_GATE_END_BRL_FSYS_BUBBLE_DOWN,</div><div class='del'>-</div><div class='del'>-	PV_GATE_START_VTOP,</div><div class='del'>-	PV_GATE_END_VTOP,</div><div class='del'>-</div><div class='del'>-	PV_GATE_START_MCKINLEY_E9,</div><div class='del'>-	PV_GATE_END_MCKINLEY_E9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pv_patchdata {</div><div class='del'>-	unsigned long start_fsyscall_patchlist;</div><div class='del'>-	unsigned long end_fsyscall_patchlist;</div><div class='del'>-	unsigned long start_brl_fsys_bubble_down_patchlist;</div><div class='del'>-	unsigned long end_brl_fsys_bubble_down_patchlist;</div><div class='del'>-	unsigned long start_vtop_patchlist;</div><div class='del'>-	unsigned long end_vtop_patchlist;</div><div class='del'>-	unsigned long start_mckinley_e9_patchlist;</div><div class='del'>-	unsigned long end_mckinley_e9_patchlist;</div><div class='del'>-</div><div class='del'>-	void *gate_section;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_patchdata pv_patchdata;</div><div class='del'>-</div><div class='del'>-unsigned long paravirt_get_gate_patchlist(enum pv_gate_patchlist type);</div><div class='del'>-void *paravirt_get_gate_section(void);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT_GUEST</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_HYPERVISOR_TYPE_DEFAULT	0</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hw_irq.h&gt;</div><div class='del'>-#include &lt;asm/meminit.h&gt;</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * general info</div><div class='del'>- */</div><div class='del'>-struct pv_info {</div><div class='del'>-	unsigned int kernel_rpl;</div><div class='del'>-	int paravirt_enabled;</div><div class='del'>-	const char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_info pv_info;</div><div class='del'>-</div><div class='del'>-static inline int paravirt_enabled(void)</div><div class='del'>-{</div><div class='del'>-	return pv_info.paravirt_enabled;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_kernel_rpl(void)</div><div class='del'>-{</div><div class='del'>-	return pv_info.kernel_rpl;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * initialization hooks.</div><div class='del'>- */</div><div class='del'>-struct rsvd_region;</div><div class='del'>-</div><div class='del'>-struct pv_init_ops {</div><div class='del'>-	void (*banner)(void);</div><div class='del'>-</div><div class='del'>-	int (*reserve_memory)(struct rsvd_region *region);</div><div class='del'>-</div><div class='del'>-	void (*arch_setup_early)(void);</div><div class='del'>-	void (*arch_setup_console)(char **cmdline_p);</div><div class='del'>-	int (*arch_setup_nomca)(void);</div><div class='del'>-</div><div class='del'>-	void (*post_smp_prepare_boot_cpu)(void);</div><div class='del'>-</div><div class='del'>-#ifdef ASM_SUPPORTED</div><div class='del'>-	unsigned long (*patch_bundle)(void *sbundle, void *ebundle,</div><div class='del'>-				      unsigned long type);</div><div class='del'>-	unsigned long (*patch_inst)(unsigned long stag, unsigned long etag,</div><div class='del'>-				    unsigned long type);</div><div class='del'>-#endif</div><div class='del'>-	void (*patch_branch)(unsigned long tag, unsigned long type);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_init_ops pv_init_ops;</div><div class='del'>-</div><div class='del'>-static inline void paravirt_banner(void)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.banner)</div><div class='del'>-		pv_init_ops.banner();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int paravirt_reserve_memory(struct rsvd_region *region)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.reserve_memory)</div><div class='del'>-		return pv_init_ops.reserve_memory(region);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void paravirt_arch_setup_early(void)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.arch_setup_early)</div><div class='del'>-		pv_init_ops.arch_setup_early();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void paravirt_arch_setup_console(char **cmdline_p)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.arch_setup_console)</div><div class='del'>-		pv_init_ops.arch_setup_console(cmdline_p);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int paravirt_arch_setup_nomca(void)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.arch_setup_nomca)</div><div class='del'>-		return pv_init_ops.arch_setup_nomca();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void paravirt_post_smp_prepare_boot_cpu(void)</div><div class='del'>-{</div><div class='del'>-	if (pv_init_ops.post_smp_prepare_boot_cpu)</div><div class='del'>-		pv_init_ops.post_smp_prepare_boot_cpu();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of iosapic operations.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct pv_iosapic_ops {</div><div class='del'>-	void (*pcat_compat_init)(void);</div><div class='del'>-</div><div class='del'>-	struct irq_chip *(*__get_irq_chip)(unsigned long trigger);</div><div class='del'>-</div><div class='del'>-	unsigned int (*__read)(char __iomem *iosapic, unsigned int reg);</div><div class='del'>-	void (*__write)(char __iomem *iosapic, unsigned int reg, u32 val);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_iosapic_ops pv_iosapic_ops;</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-iosapic_pcat_compat_init(void)</div><div class='del'>-{</div><div class='del'>-	if (pv_iosapic_ops.pcat_compat_init)</div><div class='del'>-		pv_iosapic_ops.pcat_compat_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct irq_chip*</div><div class='del'>-iosapic_get_irq_chip(unsigned long trigger)</div><div class='del'>-{</div><div class='del'>-	return pv_iosapic_ops.__get_irq_chip(trigger);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int</div><div class='del'>-__iosapic_read(char __iomem *iosapic, unsigned int reg)</div><div class='del'>-{</div><div class='del'>-	return pv_iosapic_ops.__read(iosapic, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-__iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)</div><div class='del'>-{</div><div class='del'>-	return pv_iosapic_ops.__write(iosapic, reg, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of irq operations.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct pv_irq_ops {</div><div class='del'>-	void (*register_ipi)(void);</div><div class='del'>-</div><div class='del'>-	int (*assign_irq_vector)(int irq);</div><div class='del'>-	void (*free_irq_vector)(int vector);</div><div class='del'>-</div><div class='del'>-	void (*register_percpu_irq)(ia64_vector vec,</div><div class='del'>-				    struct irqaction *action);</div><div class='del'>-</div><div class='del'>-	void (*resend_irq)(unsigned int vector);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_irq_ops pv_irq_ops;</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-ia64_register_ipi(void)</div><div class='del'>-{</div><div class='del'>-	pv_irq_ops.register_ipi();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-assign_irq_vector(int irq)</div><div class='del'>-{</div><div class='del'>-	return pv_irq_ops.assign_irq_vector(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-free_irq_vector(int vector)</div><div class='del'>-{</div><div class='del'>-	return pv_irq_ops.free_irq_vector(vector);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-register_percpu_irq(ia64_vector vec, struct irqaction *action)</div><div class='del'>-{</div><div class='del'>-	pv_irq_ops.register_percpu_irq(vec, action);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-ia64_resend_irq(unsigned int vector)</div><div class='del'>-{</div><div class='del'>-	pv_irq_ops.resend_irq(vector);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of time operations.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern struct itc_jitter_data_t itc_jitter_data;</div><div class='del'>-extern volatile int time_keeper_id;</div><div class='del'>-</div><div class='del'>-struct pv_time_ops {</div><div class='del'>-	void (*init_missing_ticks_accounting)(int cpu);</div><div class='del'>-	int (*do_steal_accounting)(unsigned long *new_itm);</div><div class='del'>-</div><div class='del'>-	void (*clocksource_resume)(void);</div><div class='del'>-</div><div class='del'>-	unsigned long long (*sched_clock)(void);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_time_ops pv_time_ops;</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-paravirt_init_missing_ticks_accounting(int cpu)</div><div class='del'>-{</div><div class='del'>-	if (pv_time_ops.init_missing_ticks_accounting)</div><div class='del'>-		pv_time_ops.init_missing_ticks_accounting(cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct static_key;</div><div class='del'>-extern struct static_key paravirt_steal_enabled;</div><div class='del'>-extern struct static_key paravirt_steal_rq_enabled;</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-paravirt_do_steal_accounting(unsigned long *new_itm)</div><div class='del'>-{</div><div class='del'>-	return pv_time_ops.do_steal_accounting(new_itm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long long paravirt_sched_clock(void)</div><div class='del'>-{</div><div class='del'>-	return pv_time_ops.sched_clock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-/* fallback for native case */</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#define paravirt_banner()				do { } while (0)</div><div class='del'>-#define paravirt_reserve_memory(region)			0</div><div class='del'>-</div><div class='del'>-#define paravirt_arch_setup_early()			do { } while (0)</div><div class='del'>-#define paravirt_arch_setup_console(cmdline_p)		do { } while (0)</div><div class='del'>-#define paravirt_arch_setup_nomca()			0</div><div class='del'>-#define paravirt_post_smp_prepare_boot_cpu()		do { } while (0)</div><div class='del'>-</div><div class='del'>-#define paravirt_init_missing_ticks_accounting(cpu)	do { } while (0)</div><div class='del'>-#define paravirt_do_steal_accounting(new_itm)		0</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_PARAVIRT_GUEST */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_PARAVIRT_H */</div><div class='head'>diff --git a/arch/ia64/include/asm/paravirt_patch.h b/arch/ia64/include/asm/paravirt_patch.h<br/>deleted file mode 100644<br/>index 128ff5db6e67..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/paravirt_patch.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/paravirt_patch.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_PARAVIRT_PATCH_H</div><div class='del'>-#define __ASM_PARAVIRT_PATCH_H</div><div class='del'>-</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-	.section .paravirt_branches, "a"</div><div class='del'>-	.previous</div><div class='del'>-#define PARAVIRT_PATCH_SITE_BR(type)		\</div><div class='del'>-	{					\</div><div class='del'>-	[1:] ;					\</div><div class='del'>-	br.cond.sptk.many 2f ;			\</div><div class='del'>-	nop.b 0 ;				\</div><div class='del'>-	nop.b 0;; ;				\</div><div class='del'>-	} ;					\</div><div class='del'>-	2:					\</div><div class='del'>-	.xdata8 ".paravirt_branches", 1b, type</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#include &lt;linux/stringify.h&gt;</div><div class='del'>-#include &lt;asm/intrinsics.h&gt;</div><div class='del'>-</div><div class='del'>-/* for binary patch */</div><div class='del'>-struct paravirt_patch_site_bundle {</div><div class='del'>-	void		*sbundle;</div><div class='del'>-	void		*ebundle;</div><div class='del'>-	unsigned long	type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* label means the beginning of new bundle */</div><div class='del'>-#define paravirt_alt_bundle(instr, privop)				\</div><div class='del'>-	"\t998:\n"							\</div><div class='del'>-	"\t" instr "\n"							\</div><div class='del'>-	"\t999:\n"							\</div><div class='del'>-	"\t.pushsection .paravirt_bundles, \"a\"\n"			\</div><div class='del'>-	"\t.popsection\n"						\</div><div class='del'>-	"\t.xdata8 \".paravirt_bundles\", 998b, 999b, "			\</div><div class='del'>-	__stringify(privop) "\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct paravirt_patch_bundle_elem {</div><div class='del'>-	const void	*sbundle;</div><div class='del'>-	const void	*ebundle;</div><div class='del'>-	unsigned long	type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct paravirt_patch_site_inst {</div><div class='del'>-	unsigned long	stag;</div><div class='del'>-	unsigned long	etag;</div><div class='del'>-	unsigned long	type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define paravirt_alt_inst(instr, privop)				\</div><div class='del'>-	"\t[998:]\n"							\</div><div class='del'>-	"\t" instr "\n"							\</div><div class='del'>-	"\t[999:]\n"							\</div><div class='del'>-	"\t.pushsection .paravirt_insts, \"a\"\n"			\</div><div class='del'>-	"\t.popsection\n"						\</div><div class='del'>-	"\t.xdata8 \".paravirt_insts\", 998b, 999b, "			\</div><div class='del'>-	__stringify(privop) "\n"</div><div class='del'>-</div><div class='del'>-struct paravirt_patch_site_branch {</div><div class='del'>-	unsigned long	tag;</div><div class='del'>-	unsigned long	type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct paravirt_patch_branch_target {</div><div class='del'>-	const void	*entry;</div><div class='del'>-	unsigned long	type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-__paravirt_patch_apply_branch(</div><div class='del'>-	unsigned long tag, unsigned long type,</div><div class='del'>-	const struct paravirt_patch_branch_target *entries,</div><div class='del'>-	unsigned int nr_entries);</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-paravirt_patch_reloc_br(unsigned long tag, const void *target);</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-paravirt_patch_reloc_brl(unsigned long tag, const void *target);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#if defined(ASM_SUPPORTED) &amp;&amp; defined(CONFIG_PARAVIRT)</div><div class='del'>-unsigned long</div><div class='del'>-ia64_native_patch_bundle(void *sbundle, void *ebundle, unsigned long type);</div><div class='del'>-</div><div class='del'>-unsigned long</div><div class='del'>-__paravirt_patch_apply_bundle(void *sbundle, void *ebundle, unsigned long type,</div><div class='del'>-			      const struct paravirt_patch_bundle_elem *elems,</div><div class='del'>-			      unsigned long nelems,</div><div class='del'>-			      const struct paravirt_patch_bundle_elem **found);</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-paravirt_patch_apply_bundle(const struct paravirt_patch_site_bundle *start,</div><div class='del'>-			    const struct paravirt_patch_site_bundle *end);</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-paravirt_patch_apply_inst(const struct paravirt_patch_site_inst *start,</div><div class='del'>-			  const struct paravirt_patch_site_inst *end);</div><div class='del'>-</div><div class='del'>-void paravirt_patch_apply(void);</div><div class='del'>-#else</div><div class='del'>-#define paravirt_patch_apply_bundle(start, end)	do { } while (0)</div><div class='del'>-#define paravirt_patch_apply_inst(start, end)	do { } while (0)</div><div class='del'>-#define paravirt_patch_apply()			do { } while (0)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLEY__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_PARAVIRT_PATCH_H */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- * mode: C</div><div class='del'>- * c-set-style: "linux"</div><div class='del'>- * c-basic-offset: 8</div><div class='del'>- * tab-width: 8</div><div class='del'>- * indent-tabs-mode: t</div><div class='del'>- * End:</div><div class='del'>- */</div><div class='head'>diff --git a/arch/ia64/include/asm/paravirt_privop.h b/arch/ia64/include/asm/paravirt_privop.h<br/>deleted file mode 100644<br/>index 8f6cb11c9fae..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/paravirt_privop.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/paravirt_privop.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,479 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_IA64_PARAVIRT_PRIVOP_H</div><div class='del'>-#define _ASM_IA64_PARAVIRT_PRIVOP_H</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/kregs.h&gt; /* for IA64_PSR_I */</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of intrinsics operations.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct pv_cpu_ops {</div><div class='del'>-	void (*fc)(void *addr);</div><div class='del'>-	unsigned long (*thash)(unsigned long addr);</div><div class='del'>-	unsigned long (*get_cpuid)(int index);</div><div class='del'>-	unsigned long (*get_pmd)(int index);</div><div class='del'>-	unsigned long (*getreg)(int reg);</div><div class='del'>-	void (*setreg)(int reg, unsigned long val);</div><div class='del'>-	void (*ptcga)(unsigned long addr, unsigned long size);</div><div class='del'>-	unsigned long (*get_rr)(unsigned long index);</div><div class='del'>-	void (*set_rr)(unsigned long index, unsigned long val);</div><div class='del'>-	void (*set_rr0_to_rr4)(unsigned long val0, unsigned long val1,</div><div class='del'>-			       unsigned long val2, unsigned long val3,</div><div class='del'>-			       unsigned long val4);</div><div class='del'>-	void (*ssm_i)(void);</div><div class='del'>-	void (*rsm_i)(void);</div><div class='del'>-	unsigned long (*get_psr_i)(void);</div><div class='del'>-	void (*intrin_local_irq_restore)(unsigned long flags);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct pv_cpu_ops pv_cpu_ops;</div><div class='del'>-</div><div class='del'>-extern void ia64_native_setreg_func(int regnum, unsigned long val);</div><div class='del'>-extern unsigned long ia64_native_getreg_func(int regnum);</div><div class='del'>-</div><div class='del'>-/************************************************/</div><div class='del'>-/* Instructions paravirtualized for performance */</div><div class='del'>-/************************************************/</div><div class='del'>-</div><div class='del'>-#ifndef ASM_SUPPORTED</div><div class='del'>-#define paravirt_ssm_i()	pv_cpu_ops.ssm_i()</div><div class='del'>-#define paravirt_rsm_i()	pv_cpu_ops.rsm_i()</div><div class='del'>-#define __paravirt_getreg()	pv_cpu_ops.getreg()</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* mask for ia64_native_ssm/rsm() must be constant.("i" constraing).</div><div class='del'>- * static inline function doesn't satisfy it. */</div><div class='del'>-#define paravirt_ssm(mask)			\</div><div class='del'>-	do {					\</div><div class='del'>-		if ((mask) == IA64_PSR_I)	\</div><div class='del'>-			paravirt_ssm_i();	\</div><div class='del'>-		else				\</div><div class='del'>-			ia64_native_ssm(mask);	\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define paravirt_rsm(mask)			\</div><div class='del'>-	do {					\</div><div class='del'>-		if ((mask) == IA64_PSR_I)	\</div><div class='del'>-			paravirt_rsm_i();	\</div><div class='del'>-		else				\</div><div class='del'>-			ia64_native_rsm(mask);	\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-/* returned ip value should be the one in the caller,</div><div class='del'>- * not in __paravirt_getreg() */</div><div class='del'>-#define paravirt_getreg(reg)					\</div><div class='del'>-	({							\</div><div class='del'>-		unsigned long res;				\</div><div class='del'>-		if ((reg) == _IA64_REG_IP)			\</div><div class='del'>-			res = ia64_native_getreg(_IA64_REG_IP); \</div><div class='del'>-		else						\</div><div class='del'>-			res = __paravirt_getreg(reg);		\</div><div class='del'>-		res;						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of hand written assembly codes.</div><div class='del'>- */</div><div class='del'>-struct pv_cpu_asm_switch {</div><div class='del'>-	unsigned long switch_to;</div><div class='del'>-	unsigned long leave_syscall;</div><div class='del'>-	unsigned long work_processed_syscall;</div><div class='del'>-	unsigned long leave_kernel;</div><div class='del'>-};</div><div class='del'>-void paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch);</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#define IA64_PARAVIRT_ASM_FUNC(name)	paravirt_ ## name</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-/* fallback for native case */</div><div class='del'>-#define IA64_PARAVIRT_ASM_FUNC(name)	ia64_native_ ## name</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_PARAVIRT */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PARAVIRT) &amp;&amp; defined(ASM_SUPPORTED)</div><div class='del'>-#define paravirt_dv_serialize_data()	ia64_dv_serialize_data()</div><div class='del'>-#else</div><div class='del'>-#define paravirt_dv_serialize_data()	/* nothing */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* these routines utilize privilege-sensitive or performance-sensitive</div><div class='del'>- * privileged instructions so the code must be replaced with</div><div class='del'>- * paravirtualized versions */</div><div class='del'>-#define ia64_switch_to			IA64_PARAVIRT_ASM_FUNC(switch_to)</div><div class='del'>-#define ia64_leave_syscall		IA64_PARAVIRT_ASM_FUNC(leave_syscall)</div><div class='del'>-#define ia64_work_processed_syscall	\</div><div class='del'>-	IA64_PARAVIRT_ASM_FUNC(work_processed_syscall)</div><div class='del'>-#define ia64_leave_kernel		IA64_PARAVIRT_ASM_FUNC(leave_kernel)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PARAVIRT)</div><div class='del'>-/******************************************************************************</div><div class='del'>- * binary patching infrastructure</div><div class='del'>- */</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_FC				1</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_THASH			2</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_GET_CPUID			3</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_GET_PMD			4</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_PTCGA			5</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_GET_RR			6</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_SET_RR			7</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_SET_RR0_TO_RR4		8</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_SSM_I			9</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_RSM_I			10</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_GET_PSR_I			11</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_INTRIN_LOCAL_IRQ_RESTORE	12</div><div class='del'>-</div><div class='del'>-/* PARAVIRT_PATY_TYPE_[GS]ETREG + _IA64_REG_xxx */</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_GETREG			0x10000000</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_SETREG			0x20000000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct task_struct* (*ia64_switch_to)(void* next_task);</div><div class='del'>- * void *ia64_leave_syscall;</div><div class='del'>- * void *ia64_work_processed_syscall</div><div class='del'>- * void *ia64_leave_kernel;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_BR_START			0x30000000</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_BR_SWITCH_TO		\</div><div class='del'>-	(PARAVIRT_PATCH_TYPE_BR_START + 0)</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_BR_LEAVE_SYSCALL		\</div><div class='del'>-	(PARAVIRT_PATCH_TYPE_BR_START + 1)</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_BR_WORK_PROCESSED_SYSCALL	\</div><div class='del'>-	(PARAVIRT_PATCH_TYPE_BR_START + 2)</div><div class='del'>-#define PARAVIRT_PATCH_TYPE_BR_LEAVE_KERNEL		\</div><div class='del'>-	(PARAVIRT_PATCH_TYPE_BR_START + 3)</div><div class='del'>-</div><div class='del'>-#ifdef ASM_SUPPORTED</div><div class='del'>-#include &lt;asm/paravirt_patch.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * pv_cpu_ops calling stub.</div><div class='del'>- * normal function call convension can't be written by gcc</div><div class='del'>- * inline assembly.</div><div class='del'>- *</div><div class='del'>- * from the caller's point of view,</div><div class='del'>- * the following registers will be clobbered.</div><div class='del'>- * r2, r3</div><div class='del'>- * r8-r15</div><div class='del'>- * r16, r17</div><div class='del'>- * b6, b7</div><div class='del'>- * p6-p15</div><div class='del'>- * ar.ccv</div><div class='del'>- *</div><div class='del'>- * from the callee's point of view ,</div><div class='del'>- * the following registers can be used.</div><div class='del'>- * r2, r3: scratch</div><div class='del'>- * r8: scratch, input argument0 and return value</div><div class='del'>- * r0-r15: scratch, input argument1-5</div><div class='del'>- * b6: return pointer</div><div class='del'>- * b7: scratch</div><div class='del'>- * p6-p15: scratch</div><div class='del'>- * ar.ccv: scratch</div><div class='del'>- *</div><div class='del'>- * other registers must not be changed. especially</div><div class='del'>- * b0: rp: preserved. gcc ignores b0 in clobbered register.</div><div class='del'>- * r16: saved gp</div><div class='del'>- */</div><div class='del'>-/* 5 bundles */</div><div class='del'>-#define __PARAVIRT_BR							\</div><div class='del'>-	";;\n"								\</div><div class='del'>-	"{ .mlx\n"							\</div><div class='del'>-	"nop 0\n"							\</div><div class='del'>-	"movl r2 = %[op_addr]\n"/* get function pointer address */	\</div><div class='del'>-	";;\n"								\</div><div class='del'>-	"}\n"								\</div><div class='del'>-	"1:\n"								\</div><div class='del'>-	"{ .mii\n"							\</div><div class='del'>-	"ld8 r2 = [r2]\n"	/* load function descriptor address */	\</div><div class='del'>-	"mov r17 = ip\n"	/* get ip to calc return address */	\</div><div class='del'>-	"mov r16 = gp\n"	/* save gp */				\</div><div class='del'>-	";;\n"								\</div><div class='del'>-	"}\n"								\</div><div class='del'>-	"{ .mii\n"							\</div><div class='del'>-	"ld8 r3 = [r2], 8\n"	/* load entry address */		\</div><div class='del'>-	"adds r17 =  1f - 1b, r17\n"	/* calculate return address */	\</div><div class='del'>-	";;\n"								\</div><div class='del'>-	"mov b7 = r3\n"		/* set entry address */			\</div><div class='del'>-	"}\n"								\</div><div class='del'>-	"{ .mib\n"							\</div><div class='del'>-	"ld8 gp = [r2]\n"	/* load gp value */			\</div><div class='del'>-	"mov b6 = r17\n"	/* set return address */		\</div><div class='del'>-	"br.cond.sptk.few b7\n"	/* intrinsics are very short isns */	\</div><div class='del'>-	"}\n"								\</div><div class='del'>-	"1:\n"								\</div><div class='del'>-	"{ .mii\n"							\</div><div class='del'>-	"mov gp = r16\n"	/* restore gp value */			\</div><div class='del'>-	"nop 0\n"							\</div><div class='del'>-	"nop 0\n"							\</div><div class='del'>-	";;\n"								\</div><div class='del'>-	"}\n"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_OP(op)				\</div><div class='del'>-	[op_addr] "i"(&amp;pv_cpu_ops.op)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_TYPE(type)			\</div><div class='del'>-	PARAVIRT_PATCH_TYPE_ ## type</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_REG_CLOBBERS0					\</div><div class='del'>-	"r2", "r3", /*"r8",*/ "r9", "r10", "r11", "r14",	\</div><div class='del'>-		"r15", "r16", "r17"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_REG_CLOBBERS1					\</div><div class='del'>-	"r2","r3", /*"r8",*/ "r9", "r10", "r11", "r14",		\</div><div class='del'>-		"r15", "r16", "r17"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_REG_CLOBBERS2					\</div><div class='del'>-	"r2", "r3", /*"r8", "r9",*/ "r10", "r11", "r14",	\</div><div class='del'>-		"r15", "r16", "r17"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_REG_CLOBBERS5					\</div><div class='del'>-	"r2", "r3", /*"r8", "r9", "r10", "r11", "r14",*/	\</div><div class='del'>-		"r15", "r16", "r17"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR_CLOBBERS			\</div><div class='del'>-	"b6", "b7"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_PR_CLOBBERS						\</div><div class='del'>-	"p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_AR_CLOBBERS			\</div><div class='del'>-	"ar.ccv"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_CLOBBERS0			\</div><div class='del'>-		PARAVIRT_REG_CLOBBERS0,		\</div><div class='del'>-		PARAVIRT_BR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_PR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_AR_CLOBBERS,		\</div><div class='del'>-		"memory"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_CLOBBERS1			\</div><div class='del'>-		PARAVIRT_REG_CLOBBERS1,		\</div><div class='del'>-		PARAVIRT_BR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_PR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_AR_CLOBBERS,		\</div><div class='del'>-		"memory"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_CLOBBERS2			\</div><div class='del'>-		PARAVIRT_REG_CLOBBERS2,		\</div><div class='del'>-		PARAVIRT_BR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_PR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_AR_CLOBBERS,		\</div><div class='del'>-		"memory"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_CLOBBERS5			\</div><div class='del'>-		PARAVIRT_REG_CLOBBERS5,		\</div><div class='del'>-		PARAVIRT_BR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_PR_CLOBBERS,		\</div><div class='del'>-		PARAVIRT_AR_CLOBBERS,		\</div><div class='del'>-		"memory"</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR0(op, type)					\</div><div class='del'>-	register unsigned long ia64_clobber asm ("r8");		\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-					  PARAVIRT_TYPE(type))	\</div><div class='del'>-		      :	"=r"(ia64_clobber)			\</div><div class='del'>-		      : PARAVIRT_OP(op)				\</div><div class='del'>-		      : PARAVIRT_CLOBBERS0)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR0_RET(op, type)				\</div><div class='del'>-	register unsigned long ia64_intri_res asm ("r8");	\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-					  PARAVIRT_TYPE(type))	\</div><div class='del'>-		      : "=r"(ia64_intri_res)			\</div><div class='del'>-		      : PARAVIRT_OP(op)				\</div><div class='del'>-		      : PARAVIRT_CLOBBERS0)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR1(op, type, arg1)				\</div><div class='del'>-	register unsigned long __##arg1 asm ("r8") = arg1;	\</div><div class='del'>-	register unsigned long ia64_clobber asm ("r8");		\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-					  PARAVIRT_TYPE(type))	\</div><div class='del'>-		      :	"=r"(ia64_clobber)			\</div><div class='del'>-		      : PARAVIRT_OP(op), "0"(__##arg1)		\</div><div class='del'>-		      : PARAVIRT_CLOBBERS1)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR1_RET(op, type, arg1)			\</div><div class='del'>-	register unsigned long ia64_intri_res asm ("r8");	\</div><div class='del'>-	register unsigned long __##arg1 asm ("r8") = arg1;	\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-					  PARAVIRT_TYPE(type))	\</div><div class='del'>-		      : "=r"(ia64_intri_res)			\</div><div class='del'>-		      : PARAVIRT_OP(op), "0"(__##arg1)		\</div><div class='del'>-		      : PARAVIRT_CLOBBERS1)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR1_VOID(op, type, arg1)			\</div><div class='del'>-	register void *__##arg1 asm ("r8") = arg1;		\</div><div class='del'>-	register unsigned long ia64_clobber asm ("r8");		\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-					  PARAVIRT_TYPE(type))	\</div><div class='del'>-		      :	"=r"(ia64_clobber)			\</div><div class='del'>-		      : PARAVIRT_OP(op), "0"(__##arg1)		\</div><div class='del'>-		      : PARAVIRT_CLOBBERS1)</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_BR2(op, type, arg1, arg2)				\</div><div class='del'>-	register unsigned long __##arg1 asm ("r8") = arg1;		\</div><div class='del'>-	register unsigned long __##arg2 asm ("r9") = arg2;		\</div><div class='del'>-	register unsigned long ia64_clobber1 asm ("r8");		\</div><div class='del'>-	register unsigned long ia64_clobber2 asm ("r9");		\</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,		\</div><div class='del'>-					  PARAVIRT_TYPE(type))		\</div><div class='del'>-		      : "=r"(ia64_clobber1), "=r"(ia64_clobber2)	\</div><div class='del'>-		      : PARAVIRT_OP(op), "0"(__##arg1), "1"(__##arg2)	\</div><div class='del'>-		      : PARAVIRT_CLOBBERS2)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP0(op, type)		\</div><div class='del'>-	static inline void				\</div><div class='del'>-	paravirt_ ## op (void)				\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR0(op, type);			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP0_RET(op, type)		\</div><div class='del'>-	static inline unsigned long			\</div><div class='del'>-	paravirt_ ## op (void)				\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR0_RET(op, type);		\</div><div class='del'>-		return ia64_intri_res;			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP1_VOID(op, type)		\</div><div class='del'>-	static inline void				\</div><div class='del'>-	paravirt_ ## op (void *arg1)			\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR1_VOID(op, type, arg1);	\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP1(op, type)		\</div><div class='del'>-	static inline void				\</div><div class='del'>-	paravirt_ ## op (unsigned long arg1)		\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR1(op, type, arg1);		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP1_RET(op, type)		\</div><div class='del'>-	static inline unsigned long			\</div><div class='del'>-	paravirt_ ## op (unsigned long arg1)		\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR1_RET(op, type, arg1);	\</div><div class='del'>-		return ia64_intri_res;			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define PARAVIRT_DEFINE_CPU_OP2(op, type)		\</div><div class='del'>-	static inline void				\</div><div class='del'>-	paravirt_ ## op (unsigned long arg1,		\</div><div class='del'>-			 unsigned long arg2)		\</div><div class='del'>-	{						\</div><div class='del'>-		PARAVIRT_BR2(op, type, arg1, arg2);	\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1_VOID(fc, FC);</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1_RET(thash, THASH)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1_RET(get_cpuid, GET_CPUID)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1_RET(get_pmd, GET_PMD)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP2(ptcga, PTCGA)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1_RET(get_rr, GET_RR)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP2(set_rr, SET_RR)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP0(ssm_i, SSM_I)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP0(rsm_i, RSM_I)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP0_RET(get_psr_i, GET_PSR_I)</div><div class='del'>-PARAVIRT_DEFINE_CPU_OP1(intrin_local_irq_restore, INTRIN_LOCAL_IRQ_RESTORE)</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-paravirt_set_rr0_to_rr4(unsigned long val0, unsigned long val1,</div><div class='del'>-			unsigned long val2, unsigned long val3,</div><div class='del'>-			unsigned long val4)</div><div class='del'>-{</div><div class='del'>-	register unsigned long __val0 asm ("r8") = val0;</div><div class='del'>-	register unsigned long __val1 asm ("r9") = val1;</div><div class='del'>-	register unsigned long __val2 asm ("r10") = val2;</div><div class='del'>-	register unsigned long __val3 asm ("r11") = val3;</div><div class='del'>-	register unsigned long __val4 asm ("r14") = val4;</div><div class='del'>-</div><div class='del'>-	register unsigned long ia64_clobber0 asm ("r8");</div><div class='del'>-	register unsigned long ia64_clobber1 asm ("r9");</div><div class='del'>-	register unsigned long ia64_clobber2 asm ("r10");</div><div class='del'>-	register unsigned long ia64_clobber3 asm ("r11");</div><div class='del'>-	register unsigned long ia64_clobber4 asm ("r14");</div><div class='del'>-</div><div class='del'>-	asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,</div><div class='del'>-					  PARAVIRT_TYPE(SET_RR0_TO_RR4))</div><div class='del'>-		      : "=r"(ia64_clobber0),</div><div class='del'>-			"=r"(ia64_clobber1),</div><div class='del'>-			"=r"(ia64_clobber2),</div><div class='del'>-			"=r"(ia64_clobber3),</div><div class='del'>-			"=r"(ia64_clobber4)</div><div class='del'>-		      : PARAVIRT_OP(set_rr0_to_rr4),</div><div class='del'>-			"0"(__val0), "1"(__val1), "2"(__val2),</div><div class='del'>-			"3"(__val3), "4"(__val4)</div><div class='del'>-		      : PARAVIRT_CLOBBERS5);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* unsigned long paravirt_getreg(int reg) */</div><div class='del'>-#define __paravirt_getreg(reg)						\</div><div class='del'>-	({								\</div><div class='del'>-		register unsigned long ia64_intri_res asm ("r8");	\</div><div class='del'>-		register unsigned long __reg asm ("r8") = (reg);	\</div><div class='del'>-									\</div><div class='del'>-		asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-						  PARAVIRT_TYPE(GETREG) \</div><div class='del'>-						  + (reg))		\</div><div class='del'>-			      : "=r"(ia64_intri_res)			\</div><div class='del'>-			      : PARAVIRT_OP(getreg), "0"(__reg)		\</div><div class='del'>-			      : PARAVIRT_CLOBBERS1);			\</div><div class='del'>-									\</div><div class='del'>-		ia64_intri_res;						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-/* void paravirt_setreg(int reg, unsigned long val) */</div><div class='del'>-#define paravirt_setreg(reg, val)					\</div><div class='del'>-	do {								\</div><div class='del'>-		register unsigned long __val asm ("r8") = val;		\</div><div class='del'>-		register unsigned long __reg asm ("r9") = reg;		\</div><div class='del'>-		register unsigned long ia64_clobber1 asm ("r8");	\</div><div class='del'>-		register unsigned long ia64_clobber2 asm ("r9");	\</div><div class='del'>-									\</div><div class='del'>-		asm volatile (paravirt_alt_bundle(__PARAVIRT_BR,	\</div><div class='del'>-						  PARAVIRT_TYPE(SETREG) \</div><div class='del'>-						  + (reg))		\</div><div class='del'>-			      : "=r"(ia64_clobber1),			\</div><div class='del'>-				"=r"(ia64_clobber2)			\</div><div class='del'>-			      : PARAVIRT_OP(setreg),			\</div><div class='del'>-				"1"(__reg), "0"(__val)			\</div><div class='del'>-			      : PARAVIRT_CLOBBERS2);			\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#endif /* ASM_SUPPORTED */</div><div class='del'>-#endif /* CONFIG_PARAVIRT &amp;&amp; ASM_SUPPOTED */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_IA64_PARAVIRT_PRIVOP_H */</div><div class='head'>diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h<br/>index 52af5ed9f60b..36d2c1e3928b 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/pci.h</a></div><div class='hunk'>@@ -6,9 +6,9 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct pci_vector_struct {</div><div class='hunk'>@@ -52,25 +52,6 @@ extern unsigned long ia64_max_iommu_merge_mask;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = 1024;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = (int) byte * 4;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_MULTIPLE;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define HAVE_PCI_MMAP</div><div class='ctx'> extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'> 				enum pci_mmap_state mmap_state, int write_combine);</div><div class='hunk'>@@ -108,19 +89,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)</div><div class='ctx'> 	return (pci_domain_nr(bus) != 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct resource *</div><div class='del'>-pcibios_select_root(struct pci_dev *pdev, struct resource *res)</div><div class='del'>-{</div><div class='del'>-	struct resource *root = NULL;</div><div class='del'>-</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_IO)</div><div class='del'>-		root = &amp;ioport_resource;</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_MEM)</div><div class='del'>-		root = &amp;iomem_resource;</div><div class='del'>-</div><div class='del'>-	return root;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ</div><div class='ctx'> static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h<br/>index 6437ca21f61b..3ad8f6988363 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/asm/topology.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@ void build_cpu_to_node_map(void);</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_data(cpu)-&gt;socket_id)</div><div class='ctx'> #define topology_core_id(cpu)			(cpu_data(cpu)-&gt;core_id)</div><div class='ctx'> #define topology_core_cpumask(cpu)		(&amp;cpu_core_map[cpu])</div><div class='del'>-#define topology_thread_cpumask(cpu)		(&amp;per_cpu(cpu_sibling_map, cpu))</div><div class='add'>+#define topology_sibling_cpumask(cpu)		(&amp;per_cpu(cpu_sibling_map, cpu))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern void arch_fix_phys_package_id(int num, u32 slot);</div><div class='head'>diff --git a/arch/ia64/include/uapi/asm/cmpxchg.h b/arch/ia64/include/uapi/asm/cmpxchg.h<br/>index f35109b1d907..a0e3620f8f13 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/uapi/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/include/uapi/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/uapi/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/include/uapi/asm/cmpxchg.h</a></div><div class='hunk'>@@ -61,8 +61,6 @@ extern void ia64_xchg_called_with_bad_pointer(void);</div><div class='ctx'>  * indicated by comparing RETURN with OLD.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This function doesn't exist, so you'll get a linker error</div><div class='ctx'>  * if something tries to do an invalid cmpxchg().</div><div class='head'>diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile<br/>index d68b5cf81e31..3686d6abafde 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/Makefile</a></div><div class='hunk'>@@ -9,7 +9,7 @@ endif</div><div class='ctx'> extra-y	:= head.o init_task.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y := entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o	\</div><div class='del'>-	 irq_lsapic.o ivt.o machvec.o pal.o paravirt_patchlist.o patch.o process.o perfmon.o ptrace.o sal.o		\</div><div class='add'>+	 irq_lsapic.o ivt.o machvec.o pal.o patch.o process.o perfmon.o ptrace.o sal.o		\</div><div class='ctx'> 	 salinfo.o setup.o signal.o sys_ia64.o time.o traps.o unaligned.o \</div><div class='ctx'> 	 unwind.o mca.o mca_asm.o topology.o dma-mapping.o</div><div class='ctx'> </div><div class='hunk'>@@ -35,9 +35,6 @@ mca_recovery-y			+= mca_drv.o mca_drv_asm.o</div><div class='ctx'> obj-$(CONFIG_IA64_MC_ERR_INJECT)+= err_inject.o</div><div class='ctx'> obj-$(CONFIG_STACKTRACE)	+= stacktrace.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_PARAVIRT)		+= paravirt.o paravirtentry.o \</div><div class='del'>-				   paravirt_patch.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_IA64_ESI)		+= esi.o</div><div class='ctx'> ifneq ($(CONFIG_IA64_ESI),)</div><div class='ctx'> obj-y				+= esi_stub.o	# must be in kernel proper</div><div class='hunk'>@@ -52,8 +49,6 @@ CFLAGS_traps.o  += -mfixed-range=f2-f5,f16-f31</div><div class='ctx'> </div><div class='ctx'> # The gate DSO image is built using a special linker script.</div><div class='ctx'> include $(src)/Makefile.gate</div><div class='del'>-# tell compiled for native</div><div class='del'>-CPPFLAGS_gate.lds += -D__IA64_GATE_PARAVIRTUALIZED_NATIVE</div><div class='ctx'> </div><div class='ctx'> # Calculate NR_IRQ = max(IA64_NATIVE_NR_IRQS, XEN_NR_IRQS, ...) based on config</div><div class='ctx'> define sed-y</div><div class='hunk'>@@ -84,30 +79,3 @@ arch/$(SRCARCH)/kernel/nr-irqs.s: arch/$(SRCARCH)/kernel/nr-irqs.c</div><div class='ctx'> include/generated/nr-irqs.h: arch/$(SRCARCH)/kernel/nr-irqs.s</div><div class='ctx'> 	$(Q)mkdir -p $(dir $@)</div><div class='ctx'> 	$(call cmd,nr_irqs)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# native ivt.S, entry.S and fsys.S</div><div class='del'>-#</div><div class='del'>-ASM_PARAVIRT_OBJS = ivt.o entry.o fsys.o</div><div class='del'>-define paravirtualized_native</div><div class='del'>-AFLAGS_$(1) += -D__IA64_ASM_PARAVIRTUALIZED_NATIVE</div><div class='del'>-AFLAGS_pvchk-sed-$(1) += -D__IA64_ASM_PARAVIRTUALIZED_PVCHECK</div><div class='del'>-extra-y += pvchk-$(1)</div><div class='del'>-endef</div><div class='del'>-$(foreach obj,$(ASM_PARAVIRT_OBJS),$(eval $(call paravirtualized_native,$(obj))))</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# Checker for paravirtualizations of privileged operations.</div><div class='del'>-#</div><div class='del'>-quiet_cmd_pv_check_sed = PVCHK   $@</div><div class='del'>-define cmd_pv_check_sed</div><div class='del'>-	sed -f $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed $&lt; &gt; $@</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-$(obj)/pvchk-sed-%.s: $(src)/%.S $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed FORCE</div><div class='del'>-	$(call if_changed_dep,as_s_S)</div><div class='del'>-$(obj)/pvchk-%.s: $(obj)/pvchk-sed-%.s FORCE</div><div class='del'>-	$(call if_changed,pv_check_sed)</div><div class='del'>-$(obj)/pvchk-%.o: $(obj)/pvchk-%.s FORCE</div><div class='del'>-	$(call if_changed,as_o_S)</div><div class='del'>-.PRECIOUS: $(obj)/pvchk-sed-%.s $(obj)/pvchk-%.s $(obj)/pvchk-%.o</div><div class='head'>diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c<br/>index c52d7540dc05..caae3f4e4341 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/efi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/efi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/efi.c</a></div><div class='hunk'>@@ -464,7 +464,6 @@ efi_map_pal_code (void)</div><div class='ctx'> 		 GRANULEROUNDDOWN((unsigned long) pal_vaddr),</div><div class='ctx'> 		 pte_val(pfn_pte(__pa(pal_vaddr) &gt;&gt; PAGE_SHIFT, PAGE_KERNEL)),</div><div class='ctx'> 		 IA64_GRANULE_SHIFT);</div><div class='del'>-	paravirt_dv_serialize_data();</div><div class='ctx'> 	ia64_set_psr(psr);		/* restore psr */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1223,6 +1222,10 @@ efi_initialize_iomem_resources(struct resource *code_resource,</div><div class='ctx'> 				flags |= IORESOURCE_DISABLED;</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			case EFI_PERSISTENT_MEMORY:</div><div class='add'>+				name = "Persistent Memory";</div><div class='add'>+				break;</div><div class='add'>+</div><div class='ctx'> 			case EFI_RESERVED_TYPE:</div><div class='ctx'> 			case EFI_RUNTIME_SERVICES_CODE:</div><div class='ctx'> 			case EFI_RUNTIME_SERVICES_DATA:</div><div class='head'>diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S<br/>index fcf8b8cbca0b..ae0de7bf5525 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/entry.S</a></div><div class='hunk'>@@ -51,7 +51,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "minstate.h"</div><div class='ctx'> </div><div class='del'>-#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * execve() is special because in case of success, we need to</div><div class='ctx'> 	 * setup a null register window frame.</div><div class='hunk'>@@ -161,7 +160,6 @@ GLOBAL_ENTRY(sys_clone)</div><div class='ctx'> 	mov rp=loc0</div><div class='ctx'> 	br.ret.sptk.many rp</div><div class='ctx'> END(sys_clone)</div><div class='del'>-#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * prev_task &lt;- ia64_switch_to(struct task_struct *next)</div><div class='hunk'>@@ -169,7 +167,7 @@ END(sys_clone)</div><div class='ctx'>  *	called.  The code starting at .map relies on this.  The rest of the code</div><div class='ctx'>  *	doesn't care about the interrupt masking status.</div><div class='ctx'>  */</div><div class='del'>-GLOBAL_ENTRY(__paravirt_switch_to)</div><div class='add'>+GLOBAL_ENTRY(ia64_switch_to)</div><div class='ctx'> 	.prologue</div><div class='ctx'> 	alloc r16=ar.pfs,1,0,0,0</div><div class='ctx'> 	DO_SAVE_SWITCH_STACK</div><div class='hunk'>@@ -221,9 +219,8 @@ GLOBAL_ENTRY(__paravirt_switch_to)</div><div class='ctx'> 	itr.d dtr[r25]=r23		// wire in new mapping...</div><div class='ctx'> 	SSM_PSR_IC_AND_SRLZ_D(r8, r9)	// reenable the psr.ic bit</div><div class='ctx'> 	br.cond.sptk .done</div><div class='del'>-END(__paravirt_switch_to)</div><div class='add'>+END(ia64_switch_to)</div><div class='ctx'> </div><div class='del'>-#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE</div><div class='ctx'> /*</div><div class='ctx'>  * Note that interrupts are enabled during save_switch_stack and load_switch_stack.  This</div><div class='ctx'>  * means that we may get an interrupt with "sp" pointing to the new kernel stack while</div><div class='hunk'>@@ -639,16 +636,8 @@ GLOBAL_ENTRY(ia64_ret_from_syscall)</div><div class='ctx'> 	adds r2=PT(R8)+16,sp			// r2 = &amp;pt_regs.r8</div><div class='ctx'> 	mov r10=r0				// clear error indication in r10</div><div class='ctx'> (p7)	br.cond.spnt handle_syscall_error	// handle potential syscall failure</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-	;;</div><div class='del'>-	br.cond.sptk.few ia64_leave_syscall</div><div class='del'>-	;;</div><div class='del'>-#endif /* CONFIG_PARAVIRT */</div><div class='ctx'> END(ia64_ret_from_syscall)</div><div class='del'>-#ifndef CONFIG_PARAVIRT</div><div class='ctx'> 	// fall through</div><div class='del'>-#endif</div><div class='del'>-#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't</div><div class='hunk'>@@ -694,7 +683,7 @@ END(ia64_ret_from_syscall)</div><div class='ctx'>  *	      ar.csd: cleared</div><div class='ctx'>  *	      ar.ssd: cleared</div><div class='ctx'>  */</div><div class='del'>-GLOBAL_ENTRY(__paravirt_leave_syscall)</div><div class='add'>+GLOBAL_ENTRY(ia64_leave_syscall)</div><div class='ctx'> 	PT_REGS_UNWIND_INFO(0)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * work.need_resched etc. mustn't get changed by this CPU before it returns to</div><div class='hunk'>@@ -722,8 +711,8 @@ GLOBAL_ENTRY(__paravirt_leave_syscall)</div><div class='ctx'> 	cmp.eq pLvSys,p0=r0,r0		// pLvSys=1: leave from syscall</div><div class='ctx'> (pUStk)	cmp.eq.unc p6,p0=r0,r0		// p6 &lt;- pUStk</div><div class='ctx'> #endif</div><div class='del'>-.global __paravirt_work_processed_syscall;</div><div class='del'>-__paravirt_work_processed_syscall:</div><div class='add'>+.global ia64_work_processed_syscall;</div><div class='add'>+ia64_work_processed_syscall:</div><div class='ctx'> #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE</div><div class='ctx'> 	adds r2=PT(LOADRS)+16,r12</div><div class='ctx'> 	MOV_FROM_ITC(pUStk, p9, r22, r19)	// fetch time at leave</div><div class='hunk'>@@ -836,9 +825,9 @@ __paravirt_work_processed_syscall:</div><div class='ctx'> 	mov.m ar.ssd=r0			// M2   clear ar.ssd</div><div class='ctx'> 	mov f11=f0			// F    clear f11</div><div class='ctx'> 	br.cond.sptk.many rbs_switch	// B</div><div class='del'>-END(__paravirt_leave_syscall)</div><div class='add'>+END(ia64_leave_syscall)</div><div class='ctx'> </div><div class='del'>-GLOBAL_ENTRY(__paravirt_leave_kernel)</div><div class='add'>+GLOBAL_ENTRY(ia64_leave_kernel)</div><div class='ctx'> 	PT_REGS_UNWIND_INFO(0)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * work.need_resched etc. mustn't get changed by this CPU before it returns to</div><div class='hunk'>@@ -1171,26 +1160,25 @@ skip_rbs_switch:</div><div class='ctx'> (p6)	br.cond.sptk.few .notify</div><div class='ctx'> 	br.call.spnt.many rp=preempt_schedule_irq</div><div class='ctx'> .ret9:	cmp.eq p6,p0=r0,r0	// p6 &lt;- 1 (re-check)</div><div class='del'>-(pLvSys)br.cond.sptk.few  __paravirt_pending_syscall_end</div><div class='add'>+(pLvSys)br.cond.sptk.few  ia64_work_pending_syscall_end</div><div class='ctx'> 	br.cond.sptk.many .work_processed_kernel</div><div class='ctx'> </div><div class='ctx'> .notify:</div><div class='ctx'> (pUStk)	br.call.spnt.many rp=notify_resume_user</div><div class='ctx'> .ret10:	cmp.ne p6,p0=r0,r0	// p6 &lt;- 0 (don't re-check)</div><div class='del'>-(pLvSys)br.cond.sptk.few  __paravirt_pending_syscall_end</div><div class='add'>+(pLvSys)br.cond.sptk.few  ia64_work_pending_syscall_end</div><div class='ctx'> 	br.cond.sptk.many .work_processed_kernel</div><div class='ctx'> </div><div class='del'>-.global __paravirt_pending_syscall_end;</div><div class='del'>-__paravirt_pending_syscall_end:</div><div class='add'>+.global ia64_work_pending_syscall_end;</div><div class='add'>+ia64_work_pending_syscall_end:</div><div class='ctx'> 	adds r2=PT(R8)+16,r12</div><div class='ctx'> 	adds r3=PT(R10)+16,r12</div><div class='ctx'> 	;;</div><div class='ctx'> 	ld8 r8=[r2]</div><div class='ctx'> 	ld8 r10=[r3]</div><div class='del'>-	br.cond.sptk.many __paravirt_work_processed_syscall_target</div><div class='del'>-END(__paravirt_leave_kernel)</div><div class='add'>+	br.cond.sptk.many ia64_work_processed_syscall</div><div class='add'>+END(ia64_leave_kernel)</div><div class='ctx'> </div><div class='del'>-#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE</div><div class='ctx'> ENTRY(handle_syscall_error)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could</div><div class='hunk'>@@ -1294,7 +1282,7 @@ ENTRY(sys_rt_sigreturn)</div><div class='ctx'> 	adds sp=16,sp</div><div class='ctx'> 	;;</div><div class='ctx'> 	ld8 r9=[sp]				// load new ar.unat</div><div class='del'>-	mov.sptk b7=r8,ia64_native_leave_kernel</div><div class='add'>+	mov.sptk b7=r8,ia64_leave_kernel</div><div class='ctx'> 	;;</div><div class='ctx'> 	mov ar.unat=r9</div><div class='ctx'> 	br.many b7</div><div class='hunk'>@@ -1782,4 +1770,3 @@ sys_call_table:</div><div class='ctx'> 	data8 sys_execveat</div><div class='ctx'> </div><div class='ctx'> 	.org sys_call_table + 8*NR_syscalls	// guard against failures to increase NR_syscalls</div><div class='del'>-#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */</div><div class='head'>diff --git a/arch/ia64/kernel/fsys.S b/arch/ia64/kernel/fsys.S<br/>index abc6dee3799c..edbf7af95849 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/fsys.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/fsys.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/fsys.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/fsys.S</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "entry.h"</div><div class='del'>-#include "paravirt_inst.h"</div><div class='add'>+#include &lt;asm/native/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * See Documentation/ia64/fsys.txt for details on fsyscalls.</div><div class='hunk'>@@ -402,7 +402,7 @@ ENTRY(fsys_fallback_syscall)</div><div class='ctx'> 	mov r26=ar.pfs</div><div class='ctx'> END(fsys_fallback_syscall)</div><div class='ctx'> 	/* FALL THROUGH */</div><div class='del'>-GLOBAL_ENTRY(paravirt_fsys_bubble_down)</div><div class='add'>+GLOBAL_ENTRY(fsys_bubble_down)</div><div class='ctx'> 	.prologue</div><div class='ctx'> 	.altrp b6</div><div class='ctx'> 	.body</div><div class='hunk'>@@ -440,7 +440,7 @@ GLOBAL_ENTRY(paravirt_fsys_bubble_down)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * PSR.BE : already is turned off in __kernel_syscall_via_epc()</div><div class='ctx'> 	 * PSR.AC : don't care (kernel normally turns PSR.AC on)</div><div class='del'>-	 * PSR.I  : already turned off by the time paravirt_fsys_bubble_down gets</div><div class='add'>+	 * PSR.I  : already turned off by the time fsys_bubble_down gets</div><div class='ctx'> 	 *	    invoked</div><div class='ctx'> 	 * PSR.DFL: always 0 (kernel never turns it on)</div><div class='ctx'> 	 * PSR.DFH: don't care --- kernel never touches f32-f127 on its own</div><div class='hunk'>@@ -450,7 +450,7 @@ GLOBAL_ENTRY(paravirt_fsys_bubble_down)</div><div class='ctx'> 	 * PSR.DB : don't care --- kernel never enables kernel-level</div><div class='ctx'> 	 *	    breakpoints</div><div class='ctx'> 	 * PSR.TB : must be 0 already; if it wasn't zero on entry to</div><div class='del'>-	 *          __kernel_syscall_via_epc, the branch to paravirt_fsys_bubble_down</div><div class='add'>+	 *          __kernel_syscall_via_epc, the branch to fsys_bubble_down</div><div class='ctx'> 	 *          will trigger a taken branch; the taken-trap-handler then</div><div class='ctx'> 	 *          converts the syscall into a break-based system-call.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -541,14 +541,14 @@ GLOBAL_ENTRY(paravirt_fsys_bubble_down)</div><div class='ctx'> 	nop.m 0</div><div class='ctx'> (p8)	br.call.sptk.many b6=b6			// B    (ignore return address)</div><div class='ctx'> 	br.cond.spnt ia64_trace_syscall		// B</div><div class='del'>-END(paravirt_fsys_bubble_down)</div><div class='add'>+END(fsys_bubble_down)</div><div class='ctx'> </div><div class='ctx'> 	.rodata</div><div class='ctx'> 	.align 8</div><div class='del'>-	.globl paravirt_fsyscall_table</div><div class='add'>+	.globl fsyscall_table</div><div class='ctx'> </div><div class='del'>-	data8 paravirt_fsys_bubble_down</div><div class='del'>-paravirt_fsyscall_table:</div><div class='add'>+	data8 fsys_bubble_down</div><div class='add'>+fsyscall_table:</div><div class='ctx'> 	data8 fsys_ni_syscall</div><div class='ctx'> 	data8 0				// exit			// 1025</div><div class='ctx'> 	data8 0				// read</div><div class='hunk'>@@ -833,4 +833,4 @@ paravirt_fsyscall_table:</div><div class='ctx'> </div><div class='ctx'> 	// fill in zeros for the remaining entries</div><div class='ctx'> 	.zero:</div><div class='del'>-	.space paravirt_fsyscall_table + 8*NR_syscalls - .zero, 0</div><div class='add'>+	.space fsyscall_table + 8*NR_syscalls - .zero, 0</div><div class='head'>diff --git a/arch/ia64/kernel/gate.S b/arch/ia64/kernel/gate.S<br/>index b5f8bdd8618e..0bd1b3bfaf1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/gate.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/gate.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/gate.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/gate.S</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/kregs.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include "paravirt_inst.h"</div><div class='add'>+#include &lt;asm/native/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We can't easily refer to symbols inside the kernel.  To avoid full runtime relocation,</div><div class='hunk'>@@ -376,11 +376,4 @@ GLOBAL_ENTRY(__kernel_syscall_via_epc)</div><div class='ctx'> (p9)	mov r8=ENOSYS</div><div class='ctx'> 	FSYS_RETURN</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-	/*</div><div class='del'>-	 * padd to make the size of this symbol constant</div><div class='del'>-	 * independent of paravirtualization.</div><div class='del'>-	 */</div><div class='del'>-	.align PAGE_SIZE / 8</div><div class='del'>-#endif</div><div class='ctx'> END(__kernel_syscall_via_epc)</div><div class='head'>diff --git a/arch/ia64/kernel/gate.lds.S b/arch/ia64/kernel/gate.lds.S<br/>index e518f7902af6..3e8271e85a1e 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/gate.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/gate.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/gate.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/gate.lds.S</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include "paravirt_patchlist.h"</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='hunk'>@@ -33,21 +32,21 @@ SECTIONS</div><div class='ctx'> 	. = GATE_ADDR + 0x600;</div><div class='ctx'> </div><div class='ctx'> 	.data..patch		: {</div><div class='del'>-		__paravirt_start_gate_mckinley_e9_patchlist = .;</div><div class='add'>+		__start_gate_mckinley_e9_patchlist = .;</div><div class='ctx'> 		*(.data..patch.mckinley_e9)</div><div class='del'>-		__paravirt_end_gate_mckinley_e9_patchlist = .;</div><div class='add'>+		__end_gate_mckinley_e9_patchlist = .;</div><div class='ctx'> </div><div class='del'>-		__paravirt_start_gate_vtop_patchlist = .;</div><div class='add'>+		__start_gate_vtop_patchlist = .;</div><div class='ctx'> 		*(.data..patch.vtop)</div><div class='del'>-		__paravirt_end_gate_vtop_patchlist = .;</div><div class='add'>+		__end_gate_vtop_patchlist = .;</div><div class='ctx'> </div><div class='del'>-		__paravirt_start_gate_fsyscall_patchlist = .;</div><div class='add'>+		__start_gate_fsyscall_patchlist = .;</div><div class='ctx'> 		*(.data..patch.fsyscall_table)</div><div class='del'>-		__paravirt_end_gate_fsyscall_patchlist = .;</div><div class='add'>+		__end_gate_fsyscall_patchlist = .;</div><div class='ctx'> </div><div class='del'>-		__paravirt_start_gate_brl_fsys_bubble_down_patchlist = .;</div><div class='add'>+		__start_gate_brl_fsys_bubble_down_patchlist = .;</div><div class='ctx'> 		*(.data..patch.brl_fsys_bubble_down)</div><div class='del'>-		__paravirt_end_gate_brl_fsys_bubble_down_patchlist = .;</div><div class='add'>+		__end_gate_brl_fsys_bubble_down_patchlist = .;</div><div class='ctx'> 	}						:readable</div><div class='ctx'> </div><div class='ctx'> 	.IA_64.unwind_info	: { *(.IA_64.unwind_info*) }</div><div class='head'>diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S<br/>index a4acddad0c78..bb748c596443 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/head.S</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/pal.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='hunk'>@@ -394,41 +393,6 @@ start_ap:</div><div class='ctx'> 	;;</div><div class='ctx'> (isBP)	st8 [r2]=r28		// save the address of the boot param area passed by the bootloader</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-</div><div class='del'>-	movl r14=hypervisor_setup_hooks</div><div class='del'>-	movl r15=hypervisor_type</div><div class='del'>-	mov r16=num_hypervisor_hooks</div><div class='del'>-	;;</div><div class='del'>-	ld8 r2=[r15]</div><div class='del'>-	;;</div><div class='del'>-	cmp.ltu p7,p0=r2,r16	// array size check</div><div class='del'>-	shladd r8=r2,3,r14</div><div class='del'>-	;;</div><div class='del'>-(p7)	ld8 r9=[r8]</div><div class='del'>-	;;</div><div class='del'>-(p7)	mov b1=r9</div><div class='del'>-(p7)	cmp.ne.unc p7,p0=r9,r0	// no actual branch to NULL</div><div class='del'>-	;;</div><div class='del'>-(p7)	br.call.sptk.many rp=b1</div><div class='del'>-</div><div class='del'>-	__INITDATA</div><div class='del'>-</div><div class='del'>-default_setup_hook = 0		// Currently nothing needs to be done.</div><div class='del'>-</div><div class='del'>-	.global hypervisor_type</div><div class='del'>-hypervisor_type:</div><div class='del'>-	data8		PARAVIRT_HYPERVISOR_TYPE_DEFAULT</div><div class='del'>-</div><div class='del'>-	// must have the same order with PARAVIRT_HYPERVISOR_TYPE_xxx</div><div class='del'>-</div><div class='del'>-hypervisor_setup_hooks:</div><div class='del'>-	data8		default_setup_hook</div><div class='del'>-num_hypervisor_hooks = (. - hypervisor_setup_hooks) / 8</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> (isAP)	br.call.sptk.many rp=start_secondary</div><div class='ctx'> .ret0:</div><div class='hunk'>@@ -1063,12 +1027,6 @@ GLOBAL_ENTRY(ia64_native_sched_clock)</div><div class='ctx'> 	shrp r8=r9,r8,IA64_NSEC_PER_CYC_SHIFT</div><div class='ctx'> 	br.ret.sptk.many rp</div><div class='ctx'> END(ia64_native_sched_clock)</div><div class='del'>-#ifndef CONFIG_PARAVIRT</div><div class='del'>-	//unsigned long long</div><div class='del'>-	//sched_clock(void) __attribute__((alias("ia64_native_sched_clock")));</div><div class='del'>-	.global sched_clock</div><div class='del'>-sched_clock = ia64_native_sched_clock</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE</div><div class='ctx'> GLOBAL_ENTRY(cycle_to_cputime)</div><div class='head'>diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c<br/>index 5b7791dd3965..096731049538 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/ia64_ksyms.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/ia64_ksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/ia64_ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/ia64_ksyms.c</a></div><div class='hunk'>@@ -96,3 +96,6 @@ EXPORT_SYMBOL(ia64_ivt);</div><div class='ctx'> /* mcount is defined in assembly */</div><div class='ctx'> EXPORT_SYMBOL(_mcount);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+EXPORT_SYMBOL_GPL(flush_icache_range);</div><div class='head'>diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S<br/>index e42bf7a913f3..b1c3cfc93e71 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/ivt.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/ivt.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/ivt.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/ivt.S</a></div><div class='hunk'>@@ -937,7 +937,6 @@ END(interrupt)</div><div class='ctx'> 	 *	- ar.fpsr: set to kernel settings</div><div class='ctx'> 	 *	-  b6: preserved (same as on entry)</div><div class='ctx'> 	 */</div><div class='del'>-#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE</div><div class='ctx'> GLOBAL_ENTRY(ia64_syscall_setup)</div><div class='ctx'> #if PT(B6) != 0</div><div class='ctx'> # error This code assumes that b6 is the first field in pt_regs.</div><div class='hunk'>@@ -1029,7 +1028,6 @@ GLOBAL_ENTRY(ia64_syscall_setup)</div><div class='ctx'> (p10)	mov r8=-EINVAL</div><div class='ctx'> 	br.ret.sptk.many b7</div><div class='ctx'> END(ia64_syscall_setup)</div><div class='del'>-#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */</div><div class='ctx'> </div><div class='ctx'> 	.org ia64_ivt+0x3c00</div><div class='ctx'> /////////////////////////////////////////////////////////////////////////////////////////</div><div class='hunk'>@@ -1043,7 +1041,7 @@ END(ia64_syscall_setup)</div><div class='ctx'> 	DBG_FAULT(16)</div><div class='ctx'> 	FAULT(16)</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE) &amp;&amp; defined(__IA64_ASM_PARAVIRTUALIZED_NATIVE)</div><div class='add'>+#if defined(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * There is no particular reason for this code to be here, other than</div><div class='ctx'> 	 * that there happens to be space here that would go unused otherwise.</div><div class='head'>diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c<br/>index dd5801eb4c69..2889412e03eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/mca.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/mca.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/mca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/mca.c</a></div><div class='hunk'>@@ -2117,8 +2117,7 @@ ia64_mca_late_init(void)</div><div class='ctx'> 	register_hotcpu_notifier(&amp;mca_cpu_notifier);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the CMCI/P vector and handler */</div><div class='del'>-	init_timer(&amp;cmc_poll_timer);</div><div class='del'>-	cmc_poll_timer.function = ia64_mca_cmc_poll;</div><div class='add'>+	setup_timer(&amp;cmc_poll_timer, ia64_mca_cmc_poll, 0UL);</div><div class='ctx'> </div><div class='ctx'> 	/* Unmask/enable the vector */</div><div class='ctx'> 	cmc_polling_enabled = 0;</div><div class='hunk'>@@ -2129,8 +2128,7 @@ ia64_mca_late_init(void)</div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	/* Setup the CPEI/P vector and handler */</div><div class='ctx'> 	cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);</div><div class='del'>-	init_timer(&amp;cpe_poll_timer);</div><div class='del'>-	cpe_poll_timer.function = ia64_mca_cpe_poll;</div><div class='add'>+	setup_timer(&amp;cpe_poll_timer, ia64_mca_cpe_poll, 0UL);</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 		unsigned int irq;</div><div class='head'>diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h<br/>index cc82a7d744c9..5704700fb703 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/minstate.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/minstate.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/minstate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/minstate.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "entry.h"</div><div class='del'>-#include "paravirt_inst.h"</div><div class='add'>+#include &lt;asm/native/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE</div><div class='ctx'> /* read ar.itc in advance, and use it before leaving bank 0 */</div><div class='head'>diff --git a/arch/ia64/kernel/module.c b/arch/ia64/kernel/module.c<br/>index 29754aae5177..b15933c31b2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/module.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/module.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/module.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/module.c</a></div><div class='hunk'>@@ -439,14 +439,6 @@ module_frob_arch_sections (Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, char *secstrings,</div><div class='ctx'> 			mod-&gt;arch.opd = s;</div><div class='ctx'> 		else if (strcmp(".IA_64.unwind", secstrings + s-&gt;sh_name) == 0)</div><div class='ctx'> 			mod-&gt;arch.unwind = s;</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-		else if (strcmp(".paravirt_bundles",</div><div class='del'>-				secstrings + s-&gt;sh_name) == 0)</div><div class='del'>-			mod-&gt;arch.paravirt_bundles = s;</div><div class='del'>-		else if (strcmp(".paravirt_insts",</div><div class='del'>-				secstrings + s-&gt;sh_name) == 0)</div><div class='del'>-			mod-&gt;arch.paravirt_insts = s;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	if (!mod-&gt;arch.core_plt || !mod-&gt;arch.init_plt || !mod-&gt;arch.got || !mod-&gt;arch.opd) {</div><div class='ctx'> 		printk(KERN_ERR "%s: sections missing\n", mod-&gt;name);</div><div class='hunk'>@@ -914,30 +906,6 @@ module_finalize (const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *mo</div><div class='ctx'> 	DEBUGP("%s: init: entry=%p\n", __func__, mod-&gt;init);</div><div class='ctx'> 	if (mod-&gt;arch.unwind)</div><div class='ctx'> 		register_unwind_table(mod);</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-        if (mod-&gt;arch.paravirt_bundles) {</div><div class='del'>-                struct paravirt_patch_site_bundle *start =</div><div class='del'>-                        (struct paravirt_patch_site_bundle *)</div><div class='del'>-                        mod-&gt;arch.paravirt_bundles-&gt;sh_addr;</div><div class='del'>-                struct paravirt_patch_site_bundle *end =</div><div class='del'>-                        (struct paravirt_patch_site_bundle *)</div><div class='del'>-                        (mod-&gt;arch.paravirt_bundles-&gt;sh_addr +</div><div class='del'>-                         mod-&gt;arch.paravirt_bundles-&gt;sh_size);</div><div class='del'>-</div><div class='del'>-                paravirt_patch_apply_bundle(start, end);</div><div class='del'>-        }</div><div class='del'>-        if (mod-&gt;arch.paravirt_insts) {</div><div class='del'>-                struct paravirt_patch_site_inst *start =</div><div class='del'>-                        (struct paravirt_patch_site_inst *)</div><div class='del'>-                        mod-&gt;arch.paravirt_insts-&gt;sh_addr;</div><div class='del'>-                struct paravirt_patch_site_inst *end =</div><div class='del'>-                        (struct paravirt_patch_site_inst *)</div><div class='del'>-                        (mod-&gt;arch.paravirt_insts-&gt;sh_addr +</div><div class='del'>-                         mod-&gt;arch.paravirt_insts-&gt;sh_size);</div><div class='del'>-</div><div class='del'>-                paravirt_patch_apply_inst(start, end);</div><div class='del'>-        }</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c<br/>index 9dd7464f8c17..d70bf15c690a 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/msi_ia64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/msi_ia64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/msi_ia64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/msi_ia64.c</a></div><div class='hunk'>@@ -165,7 +165,7 @@ static struct irq_chip dmar_msi_type = {</div><div class='ctx'> 	.irq_retrigger = ia64_msi_retrigger_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_cfg *cfg = irq_cfg + irq;</div><div class='hunk'>@@ -186,21 +186,29 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)</div><div class='ctx'> 		MSI_DATA_LEVEL_ASSERT |</div><div class='ctx'> 		MSI_DATA_DELIVERY_FIXED |</div><div class='ctx'> 		MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int arch_setup_dmar_msi(unsigned int irq)</div><div class='add'>+int dmar_alloc_hwirq(int id, int node, void *arg)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int irq;</div><div class='ctx'> 	struct msi_msg msg;</div><div class='ctx'> </div><div class='del'>-	ret = msi_compose_msg(NULL, irq, &amp;msg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	dmar_msi_write(irq, &amp;msg);</div><div class='del'>-	irq_set_chip_and_handler_name(irq, &amp;dmar_msi_type, handle_edge_irq,</div><div class='del'>-				      "edge");</div><div class='del'>-	return 0;</div><div class='add'>+	irq = create_irq();</div><div class='add'>+	if (irq &gt; 0) {</div><div class='add'>+		irq_set_handler_data(irq, arg);</div><div class='add'>+		irq_set_chip_and_handler_name(irq, &amp;dmar_msi_type,</div><div class='add'>+					      handle_edge_irq, "edge");</div><div class='add'>+		msi_compose_msg(NULL, irq, &amp;msg);</div><div class='add'>+		dmar_msi_write(irq, &amp;msg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dmar_free_hwirq(int irq)</div><div class='add'>+{</div><div class='add'>+	irq_set_handler_data(irq, NULL);</div><div class='add'>+	destroy_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_INTEL_IOMMU */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kernel/paravirt.c b/arch/ia64/kernel/paravirt.c<br/>deleted file mode 100644<br/>index 1b22f6de2932..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirt.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,902 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * arch/ia64/kernel/paravirt.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *     Yaozu (Eddie) Dong &lt;eddie.dong@intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/iosapic.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * general info</div><div class='del'>- */</div><div class='del'>-struct pv_info pv_info = {</div><div class='del'>-	.kernel_rpl = 0,</div><div class='del'>-	.paravirt_enabled = 0,</div><div class='del'>-	.name = "bare hardware"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * pv_init_ops</div><div class='del'>- * initialization hooks.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-ia64_native_patch_branch(unsigned long tag, unsigned long type);</div><div class='del'>-</div><div class='del'>-struct pv_init_ops pv_init_ops =</div><div class='del'>-{</div><div class='del'>-#ifdef ASM_SUPPORTED</div><div class='del'>-	.patch_bundle = ia64_native_patch_bundle,</div><div class='del'>-#endif</div><div class='del'>-	.patch_branch = ia64_native_patch_branch,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * pv_cpu_ops</div><div class='del'>- * intrinsics hooks.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef ASM_SUPPORTED</div><div class='del'>-/* ia64_native_xxx are macros so that we have to make them real functions */</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC1(name)					\</div><div class='del'>-	static void						\</div><div class='del'>-	ia64_native_ ## name ## _func(unsigned long arg)	\</div><div class='del'>-	{							\</div><div class='del'>-		ia64_native_ ## name(arg);			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC1_VOID(name)				\</div><div class='del'>-	static void						\</div><div class='del'>-	ia64_native_ ## name ## _func(void *arg)		\</div><div class='del'>-	{							\</div><div class='del'>-		ia64_native_ ## name(arg);			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC2(name)					\</div><div class='del'>-	static void						\</div><div class='del'>-	ia64_native_ ## name ## _func(unsigned long arg0,	\</div><div class='del'>-				      unsigned long arg1)	\</div><div class='del'>-	{							\</div><div class='del'>-		ia64_native_ ## name(arg0, arg1);		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_FUNC0(name)			\</div><div class='del'>-	static unsigned long			\</div><div class='del'>-	ia64_native_ ## name ## _func(void)	\</div><div class='del'>-	{					\</div><div class='del'>-		return ia64_native_ ## name();	\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_FUNC1(name, type)			\</div><div class='del'>-	static unsigned long				\</div><div class='del'>-	ia64_native_ ## name ## _func(type arg)		\</div><div class='del'>-	{						\</div><div class='del'>-		return ia64_native_ ## name(arg);	\</div><div class='del'>-	}						\</div><div class='del'>-</div><div class='del'>-DEFINE_VOID_FUNC1_VOID(fc);</div><div class='del'>-DEFINE_VOID_FUNC1(intrin_local_irq_restore);</div><div class='del'>-</div><div class='del'>-DEFINE_VOID_FUNC2(ptcga);</div><div class='del'>-DEFINE_VOID_FUNC2(set_rr);</div><div class='del'>-</div><div class='del'>-DEFINE_FUNC0(get_psr_i);</div><div class='del'>-</div><div class='del'>-DEFINE_FUNC1(thash, unsigned long);</div><div class='del'>-DEFINE_FUNC1(get_cpuid, int);</div><div class='del'>-DEFINE_FUNC1(get_pmd, int);</div><div class='del'>-DEFINE_FUNC1(get_rr, unsigned long);</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ia64_native_ssm_i_func(void)</div><div class='del'>-{</div><div class='del'>-	ia64_native_ssm(IA64_PSR_I);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ia64_native_rsm_i_func(void)</div><div class='del'>-{</div><div class='del'>-	ia64_native_rsm(IA64_PSR_I);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ia64_native_set_rr0_to_rr4_func(unsigned long val0, unsigned long val1,</div><div class='del'>-				unsigned long val2, unsigned long val3,</div><div class='del'>-				unsigned long val4)</div><div class='del'>-{</div><div class='del'>-	ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CASE_GET_REG(id)				\</div><div class='del'>-	case _IA64_REG_ ## id:				\</div><div class='del'>-	res = ia64_native_getreg(_IA64_REG_ ## id);	\</div><div class='del'>-	break;</div><div class='del'>-#define CASE_GET_AR(id) CASE_GET_REG(AR_ ## id)</div><div class='del'>-#define CASE_GET_CR(id) CASE_GET_REG(CR_ ## id)</div><div class='del'>-</div><div class='del'>-unsigned long</div><div class='del'>-ia64_native_getreg_func(int regnum)</div><div class='del'>-{</div><div class='del'>-	unsigned long res = -1;</div><div class='del'>-	switch (regnum) {</div><div class='del'>-	CASE_GET_REG(GP);</div><div class='del'>-	/*CASE_GET_REG(IP);*/ /* returned ip value shouldn't be constant */</div><div class='del'>-	CASE_GET_REG(PSR);</div><div class='del'>-	CASE_GET_REG(TP);</div><div class='del'>-	CASE_GET_REG(SP);</div><div class='del'>-</div><div class='del'>-	CASE_GET_AR(KR0);</div><div class='del'>-	CASE_GET_AR(KR1);</div><div class='del'>-	CASE_GET_AR(KR2);</div><div class='del'>-	CASE_GET_AR(KR3);</div><div class='del'>-	CASE_GET_AR(KR4);</div><div class='del'>-	CASE_GET_AR(KR5);</div><div class='del'>-	CASE_GET_AR(KR6);</div><div class='del'>-	CASE_GET_AR(KR7);</div><div class='del'>-	CASE_GET_AR(RSC);</div><div class='del'>-	CASE_GET_AR(BSP);</div><div class='del'>-	CASE_GET_AR(BSPSTORE);</div><div class='del'>-	CASE_GET_AR(RNAT);</div><div class='del'>-	CASE_GET_AR(FCR);</div><div class='del'>-	CASE_GET_AR(EFLAG);</div><div class='del'>-	CASE_GET_AR(CSD);</div><div class='del'>-	CASE_GET_AR(SSD);</div><div class='del'>-	CASE_GET_AR(CFLAG);</div><div class='del'>-	CASE_GET_AR(FSR);</div><div class='del'>-	CASE_GET_AR(FIR);</div><div class='del'>-	CASE_GET_AR(FDR);</div><div class='del'>-	CASE_GET_AR(CCV);</div><div class='del'>-	CASE_GET_AR(UNAT);</div><div class='del'>-	CASE_GET_AR(FPSR);</div><div class='del'>-	CASE_GET_AR(ITC);</div><div class='del'>-	CASE_GET_AR(PFS);</div><div class='del'>-	CASE_GET_AR(LC);</div><div class='del'>-	CASE_GET_AR(EC);</div><div class='del'>-</div><div class='del'>-	CASE_GET_CR(DCR);</div><div class='del'>-	CASE_GET_CR(ITM);</div><div class='del'>-	CASE_GET_CR(IVA);</div><div class='del'>-	CASE_GET_CR(PTA);</div><div class='del'>-	CASE_GET_CR(IPSR);</div><div class='del'>-	CASE_GET_CR(ISR);</div><div class='del'>-	CASE_GET_CR(IIP);</div><div class='del'>-	CASE_GET_CR(IFA);</div><div class='del'>-	CASE_GET_CR(ITIR);</div><div class='del'>-	CASE_GET_CR(IIPA);</div><div class='del'>-	CASE_GET_CR(IFS);</div><div class='del'>-	CASE_GET_CR(IIM);</div><div class='del'>-	CASE_GET_CR(IHA);</div><div class='del'>-	CASE_GET_CR(LID);</div><div class='del'>-	CASE_GET_CR(IVR);</div><div class='del'>-	CASE_GET_CR(TPR);</div><div class='del'>-	CASE_GET_CR(EOI);</div><div class='del'>-	CASE_GET_CR(IRR0);</div><div class='del'>-	CASE_GET_CR(IRR1);</div><div class='del'>-	CASE_GET_CR(IRR2);</div><div class='del'>-	CASE_GET_CR(IRR3);</div><div class='del'>-	CASE_GET_CR(ITV);</div><div class='del'>-	CASE_GET_CR(PMV);</div><div class='del'>-	CASE_GET_CR(CMCV);</div><div class='del'>-	CASE_GET_CR(LRR0);</div><div class='del'>-	CASE_GET_CR(LRR1);</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_CRIT "wrong_getreg %d\n", regnum);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CASE_SET_REG(id)				\</div><div class='del'>-	case _IA64_REG_ ## id:				\</div><div class='del'>-	ia64_native_setreg(_IA64_REG_ ## id, val);	\</div><div class='del'>-	break;</div><div class='del'>-#define CASE_SET_AR(id) CASE_SET_REG(AR_ ## id)</div><div class='del'>-#define CASE_SET_CR(id) CASE_SET_REG(CR_ ## id)</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-ia64_native_setreg_func(int regnum, unsigned long val)</div><div class='del'>-{</div><div class='del'>-	switch (regnum) {</div><div class='del'>-	case _IA64_REG_PSR_L:</div><div class='del'>-		ia64_native_setreg(_IA64_REG_PSR_L, val);</div><div class='del'>-		ia64_dv_serialize_data();</div><div class='del'>-		break;</div><div class='del'>-	CASE_SET_REG(SP);</div><div class='del'>-	CASE_SET_REG(GP);</div><div class='del'>-</div><div class='del'>-	CASE_SET_AR(KR0);</div><div class='del'>-	CASE_SET_AR(KR1);</div><div class='del'>-	CASE_SET_AR(KR2);</div><div class='del'>-	CASE_SET_AR(KR3);</div><div class='del'>-	CASE_SET_AR(KR4);</div><div class='del'>-	CASE_SET_AR(KR5);</div><div class='del'>-	CASE_SET_AR(KR6);</div><div class='del'>-	CASE_SET_AR(KR7);</div><div class='del'>-	CASE_SET_AR(RSC);</div><div class='del'>-	CASE_SET_AR(BSP);</div><div class='del'>-	CASE_SET_AR(BSPSTORE);</div><div class='del'>-	CASE_SET_AR(RNAT);</div><div class='del'>-	CASE_SET_AR(FCR);</div><div class='del'>-	CASE_SET_AR(EFLAG);</div><div class='del'>-	CASE_SET_AR(CSD);</div><div class='del'>-	CASE_SET_AR(SSD);</div><div class='del'>-	CASE_SET_AR(CFLAG);</div><div class='del'>-	CASE_SET_AR(FSR);</div><div class='del'>-	CASE_SET_AR(FIR);</div><div class='del'>-	CASE_SET_AR(FDR);</div><div class='del'>-	CASE_SET_AR(CCV);</div><div class='del'>-	CASE_SET_AR(UNAT);</div><div class='del'>-	CASE_SET_AR(FPSR);</div><div class='del'>-	CASE_SET_AR(ITC);</div><div class='del'>-	CASE_SET_AR(PFS);</div><div class='del'>-	CASE_SET_AR(LC);</div><div class='del'>-	CASE_SET_AR(EC);</div><div class='del'>-</div><div class='del'>-	CASE_SET_CR(DCR);</div><div class='del'>-	CASE_SET_CR(ITM);</div><div class='del'>-	CASE_SET_CR(IVA);</div><div class='del'>-	CASE_SET_CR(PTA);</div><div class='del'>-	CASE_SET_CR(IPSR);</div><div class='del'>-	CASE_SET_CR(ISR);</div><div class='del'>-	CASE_SET_CR(IIP);</div><div class='del'>-	CASE_SET_CR(IFA);</div><div class='del'>-	CASE_SET_CR(ITIR);</div><div class='del'>-	CASE_SET_CR(IIPA);</div><div class='del'>-	CASE_SET_CR(IFS);</div><div class='del'>-	CASE_SET_CR(IIM);</div><div class='del'>-	CASE_SET_CR(IHA);</div><div class='del'>-	CASE_SET_CR(LID);</div><div class='del'>-	CASE_SET_CR(IVR);</div><div class='del'>-	CASE_SET_CR(TPR);</div><div class='del'>-	CASE_SET_CR(EOI);</div><div class='del'>-	CASE_SET_CR(IRR0);</div><div class='del'>-	CASE_SET_CR(IRR1);</div><div class='del'>-	CASE_SET_CR(IRR2);</div><div class='del'>-	CASE_SET_CR(IRR3);</div><div class='del'>-	CASE_SET_CR(ITV);</div><div class='del'>-	CASE_SET_CR(PMV);</div><div class='del'>-	CASE_SET_CR(CMCV);</div><div class='del'>-	CASE_SET_CR(LRR0);</div><div class='del'>-	CASE_SET_CR(LRR1);</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_CRIT "wrong setreg %d\n", regnum);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define __DEFINE_FUNC(name, code)					\</div><div class='del'>-	extern const char ia64_native_ ## name ## _direct_start[];	\</div><div class='del'>-	extern const char ia64_native_ ## name ## _direct_end[];	\</div><div class='del'>-	asm (".align 32\n"						\</div><div class='del'>-	     ".proc ia64_native_" #name "_func\n"			\</div><div class='del'>-	     "ia64_native_" #name "_func:\n"				\</div><div class='del'>-	     "ia64_native_" #name "_direct_start:\n"			\</div><div class='del'>-	     code							\</div><div class='del'>-	     "ia64_native_" #name "_direct_end:\n"			\</div><div class='del'>-	     "br.cond.sptk.many b6\n"					\</div><div class='del'>-	     ".endp ia64_native_" #name "_func\n")</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC0(name, code)				\</div><div class='del'>-	extern void						\</div><div class='del'>-	ia64_native_ ## name ## _func(void);			\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC1(name, code)				\</div><div class='del'>-	extern void						\</div><div class='del'>-	ia64_native_ ## name ## _func(unsigned long arg);	\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC1_VOID(name, code)			\</div><div class='del'>-	extern void						\</div><div class='del'>-	ia64_native_ ## name ## _func(void *arg);		\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-#define DEFINE_VOID_FUNC2(name, code)				\</div><div class='del'>-	extern void						\</div><div class='del'>-	ia64_native_ ## name ## _func(unsigned long arg0,	\</div><div class='del'>-				      unsigned long arg1);	\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-#define DEFINE_FUNC0(name, code)		\</div><div class='del'>-	extern unsigned long			\</div><div class='del'>-	ia64_native_ ## name ## _func(void);	\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-#define DEFINE_FUNC1(name, type, code)			\</div><div class='del'>-	extern unsigned long				\</div><div class='del'>-	ia64_native_ ## name ## _func(type arg);	\</div><div class='del'>-	__DEFINE_FUNC(name, code)</div><div class='del'>-</div><div class='del'>-DEFINE_VOID_FUNC1_VOID(fc,</div><div class='del'>-		       "fc r8\n");</div><div class='del'>-DEFINE_VOID_FUNC1(intrin_local_irq_restore,</div><div class='del'>-		  ";;\n"</div><div class='del'>-		  "     cmp.ne p6, p7 = r8, r0\n"</div><div class='del'>-		  ";;\n"</div><div class='del'>-		  "(p6) ssm psr.i\n"</div><div class='del'>-		  "(p7) rsm psr.i\n"</div><div class='del'>-		  ";;\n"</div><div class='del'>-		  "(p6) srlz.d\n");</div><div class='del'>-</div><div class='del'>-DEFINE_VOID_FUNC2(ptcga,</div><div class='del'>-		  "ptc.ga r8, r9\n");</div><div class='del'>-DEFINE_VOID_FUNC2(set_rr,</div><div class='del'>-		  "mov rr[r8] = r9\n");</div><div class='del'>-</div><div class='del'>-/* ia64_native_getreg(_IA64_REG_PSR) &amp; IA64_PSR_I */</div><div class='del'>-DEFINE_FUNC0(get_psr_i,</div><div class='del'>-	     "mov r2 = " __stringify(1 &lt;&lt; IA64_PSR_I_BIT) "\n"</div><div class='del'>-	     "mov r8 = psr\n"</div><div class='del'>-	     ";;\n"</div><div class='del'>-	     "and r8 = r2, r8\n");</div><div class='del'>-</div><div class='del'>-DEFINE_FUNC1(thash, unsigned long,</div><div class='del'>-	     "thash r8 = r8\n");</div><div class='del'>-DEFINE_FUNC1(get_cpuid, int,</div><div class='del'>-	     "mov r8 = cpuid[r8]\n");</div><div class='del'>-DEFINE_FUNC1(get_pmd, int,</div><div class='del'>-	     "mov r8 = pmd[r8]\n");</div><div class='del'>-DEFINE_FUNC1(get_rr, unsigned long,</div><div class='del'>-	     "mov r8 = rr[r8]\n");</div><div class='del'>-</div><div class='del'>-DEFINE_VOID_FUNC0(ssm_i,</div><div class='del'>-		  "ssm psr.i\n");</div><div class='del'>-DEFINE_VOID_FUNC0(rsm_i,</div><div class='del'>-		  "rsm psr.i\n");</div><div class='del'>-</div><div class='del'>-extern void</div><div class='del'>-ia64_native_set_rr0_to_rr4_func(unsigned long val0, unsigned long val1,</div><div class='del'>-				unsigned long val2, unsigned long val3,</div><div class='del'>-				unsigned long val4);</div><div class='del'>-__DEFINE_FUNC(set_rr0_to_rr4,</div><div class='del'>-	      "mov rr[r0] = r8\n"</div><div class='del'>-	      "movl r2 = 0x2000000000000000\n"</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "mov rr[r2] = r9\n"</div><div class='del'>-	      "shl r3 = r2, 1\n"	/* movl r3 = 0x4000000000000000 */</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "add r2 = r2, r3\n"	/* movl r2 = 0x6000000000000000 */</div><div class='del'>-	      "mov rr[r3] = r10\n"</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "mov rr[r2] = r11\n"</div><div class='del'>-	      "shl r3 = r3, 1\n"	/* movl r3 = 0x8000000000000000 */</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "mov rr[r3] = r14\n");</div><div class='del'>-</div><div class='del'>-extern unsigned long ia64_native_getreg_func(int regnum);</div><div class='del'>-asm(".global ia64_native_getreg_func\n");</div><div class='del'>-#define __DEFINE_GET_REG(id, reg)			\</div><div class='del'>-	"mov r2 = " __stringify(_IA64_REG_ ## id) "\n"	\</div><div class='del'>-	";;\n"						\</div><div class='del'>-	"cmp.eq p6, p0 = r2, r8\n"			\</div><div class='del'>-	";;\n"						\</div><div class='del'>-	"(p6) mov r8 = " #reg "\n"			\</div><div class='del'>-	"(p6) br.cond.sptk.many b6\n"			\</div><div class='del'>-	";;\n"</div><div class='del'>-#define __DEFINE_GET_AR(id, reg)	__DEFINE_GET_REG(AR_ ## id, ar.reg)</div><div class='del'>-#define __DEFINE_GET_CR(id, reg)	__DEFINE_GET_REG(CR_ ## id, cr.reg)</div><div class='del'>-</div><div class='del'>-__DEFINE_FUNC(getreg,</div><div class='del'>-	      __DEFINE_GET_REG(GP, gp)</div><div class='del'>-	      /*__DEFINE_GET_REG(IP, ip)*/ /* returned ip value shouldn't be constant */</div><div class='del'>-	      __DEFINE_GET_REG(PSR, psr)</div><div class='del'>-	      __DEFINE_GET_REG(TP, tp)</div><div class='del'>-	      __DEFINE_GET_REG(SP, sp)</div><div class='del'>-</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR0, ar0)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR1, ar1)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR2, ar2)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR3, ar3)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR4, ar4)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR5, ar5)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR6, ar6)</div><div class='del'>-	      __DEFINE_GET_REG(AR_KR7, ar7)</div><div class='del'>-	      __DEFINE_GET_AR(RSC, rsc)</div><div class='del'>-	      __DEFINE_GET_AR(BSP, bsp)</div><div class='del'>-	      __DEFINE_GET_AR(BSPSTORE, bspstore)</div><div class='del'>-	      __DEFINE_GET_AR(RNAT, rnat)</div><div class='del'>-	      __DEFINE_GET_AR(FCR, fcr)</div><div class='del'>-	      __DEFINE_GET_AR(EFLAG, eflag)</div><div class='del'>-	      __DEFINE_GET_AR(CSD, csd)</div><div class='del'>-	      __DEFINE_GET_AR(SSD, ssd)</div><div class='del'>-	      __DEFINE_GET_REG(AR_CFLAG, ar27)</div><div class='del'>-	      __DEFINE_GET_AR(FSR, fsr)</div><div class='del'>-	      __DEFINE_GET_AR(FIR, fir)</div><div class='del'>-	      __DEFINE_GET_AR(FDR, fdr)</div><div class='del'>-	      __DEFINE_GET_AR(CCV, ccv)</div><div class='del'>-	      __DEFINE_GET_AR(UNAT, unat)</div><div class='del'>-	      __DEFINE_GET_AR(FPSR, fpsr)</div><div class='del'>-	      __DEFINE_GET_AR(ITC, itc)</div><div class='del'>-	      __DEFINE_GET_AR(PFS, pfs)</div><div class='del'>-	      __DEFINE_GET_AR(LC, lc)</div><div class='del'>-	      __DEFINE_GET_AR(EC, ec)</div><div class='del'>-</div><div class='del'>-	      __DEFINE_GET_CR(DCR, dcr)</div><div class='del'>-	      __DEFINE_GET_CR(ITM, itm)</div><div class='del'>-	      __DEFINE_GET_CR(IVA, iva)</div><div class='del'>-	      __DEFINE_GET_CR(PTA, pta)</div><div class='del'>-	      __DEFINE_GET_CR(IPSR, ipsr)</div><div class='del'>-	      __DEFINE_GET_CR(ISR, isr)</div><div class='del'>-	      __DEFINE_GET_CR(IIP, iip)</div><div class='del'>-	      __DEFINE_GET_CR(IFA, ifa)</div><div class='del'>-	      __DEFINE_GET_CR(ITIR, itir)</div><div class='del'>-	      __DEFINE_GET_CR(IIPA, iipa)</div><div class='del'>-	      __DEFINE_GET_CR(IFS, ifs)</div><div class='del'>-	      __DEFINE_GET_CR(IIM, iim)</div><div class='del'>-	      __DEFINE_GET_CR(IHA, iha)</div><div class='del'>-	      __DEFINE_GET_CR(LID, lid)</div><div class='del'>-	      __DEFINE_GET_CR(IVR, ivr)</div><div class='del'>-	      __DEFINE_GET_CR(TPR, tpr)</div><div class='del'>-	      __DEFINE_GET_CR(EOI, eoi)</div><div class='del'>-	      __DEFINE_GET_CR(IRR0, irr0)</div><div class='del'>-	      __DEFINE_GET_CR(IRR1, irr1)</div><div class='del'>-	      __DEFINE_GET_CR(IRR2, irr2)</div><div class='del'>-	      __DEFINE_GET_CR(IRR3, irr3)</div><div class='del'>-	      __DEFINE_GET_CR(ITV, itv)</div><div class='del'>-	      __DEFINE_GET_CR(PMV, pmv)</div><div class='del'>-	      __DEFINE_GET_CR(CMCV, cmcv)</div><div class='del'>-	      __DEFINE_GET_CR(LRR0, lrr0)</div><div class='del'>-	      __DEFINE_GET_CR(LRR1, lrr1)</div><div class='del'>-</div><div class='del'>-	      "mov r8 = -1\n"	/* unsupported case */</div><div class='del'>-	);</div><div class='del'>-</div><div class='del'>-extern void ia64_native_setreg_func(int regnum, unsigned long val);</div><div class='del'>-asm(".global ia64_native_setreg_func\n");</div><div class='del'>-#define __DEFINE_SET_REG(id, reg)			\</div><div class='del'>-	"mov r2 = " __stringify(_IA64_REG_ ## id) "\n"	\</div><div class='del'>-	";;\n"						\</div><div class='del'>-	"cmp.eq p6, p0 = r2, r9\n"			\</div><div class='del'>-	";;\n"						\</div><div class='del'>-	"(p6) mov " #reg " = r8\n"			\</div><div class='del'>-	"(p6) br.cond.sptk.many b6\n"			\</div><div class='del'>-	";;\n"</div><div class='del'>-#define __DEFINE_SET_AR(id, reg)	__DEFINE_SET_REG(AR_ ## id, ar.reg)</div><div class='del'>-#define __DEFINE_SET_CR(id, reg)	__DEFINE_SET_REG(CR_ ## id, cr.reg)</div><div class='del'>-__DEFINE_FUNC(setreg,</div><div class='del'>-	      "mov r2 = " __stringify(_IA64_REG_PSR_L) "\n"</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "cmp.eq p6, p0 = r2, r9\n"</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "(p6) mov psr.l = r8\n"</div><div class='del'>-#ifdef HAVE_SERIALIZE_DIRECTIVE</div><div class='del'>-	      ".serialize.data\n"</div><div class='del'>-#endif</div><div class='del'>-	      "(p6) br.cond.sptk.many b6\n"</div><div class='del'>-	      __DEFINE_SET_REG(GP, gp)</div><div class='del'>-	      __DEFINE_SET_REG(SP, sp)</div><div class='del'>-</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR0, ar0)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR1, ar1)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR2, ar2)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR3, ar3)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR4, ar4)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR5, ar5)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR6, ar6)</div><div class='del'>-	      __DEFINE_SET_REG(AR_KR7, ar7)</div><div class='del'>-	      __DEFINE_SET_AR(RSC, rsc)</div><div class='del'>-	      __DEFINE_SET_AR(BSP, bsp)</div><div class='del'>-	      __DEFINE_SET_AR(BSPSTORE, bspstore)</div><div class='del'>-	      __DEFINE_SET_AR(RNAT, rnat)</div><div class='del'>-	      __DEFINE_SET_AR(FCR, fcr)</div><div class='del'>-	      __DEFINE_SET_AR(EFLAG, eflag)</div><div class='del'>-	      __DEFINE_SET_AR(CSD, csd)</div><div class='del'>-	      __DEFINE_SET_AR(SSD, ssd)</div><div class='del'>-	      __DEFINE_SET_REG(AR_CFLAG, ar27)</div><div class='del'>-	      __DEFINE_SET_AR(FSR, fsr)</div><div class='del'>-	      __DEFINE_SET_AR(FIR, fir)</div><div class='del'>-	      __DEFINE_SET_AR(FDR, fdr)</div><div class='del'>-	      __DEFINE_SET_AR(CCV, ccv)</div><div class='del'>-	      __DEFINE_SET_AR(UNAT, unat)</div><div class='del'>-	      __DEFINE_SET_AR(FPSR, fpsr)</div><div class='del'>-	      __DEFINE_SET_AR(ITC, itc)</div><div class='del'>-	      __DEFINE_SET_AR(PFS, pfs)</div><div class='del'>-	      __DEFINE_SET_AR(LC, lc)</div><div class='del'>-	      __DEFINE_SET_AR(EC, ec)</div><div class='del'>-</div><div class='del'>-	      __DEFINE_SET_CR(DCR, dcr)</div><div class='del'>-	      __DEFINE_SET_CR(ITM, itm)</div><div class='del'>-	      __DEFINE_SET_CR(IVA, iva)</div><div class='del'>-	      __DEFINE_SET_CR(PTA, pta)</div><div class='del'>-	      __DEFINE_SET_CR(IPSR, ipsr)</div><div class='del'>-	      __DEFINE_SET_CR(ISR, isr)</div><div class='del'>-	      __DEFINE_SET_CR(IIP, iip)</div><div class='del'>-	      __DEFINE_SET_CR(IFA, ifa)</div><div class='del'>-	      __DEFINE_SET_CR(ITIR, itir)</div><div class='del'>-	      __DEFINE_SET_CR(IIPA, iipa)</div><div class='del'>-	      __DEFINE_SET_CR(IFS, ifs)</div><div class='del'>-	      __DEFINE_SET_CR(IIM, iim)</div><div class='del'>-	      __DEFINE_SET_CR(IHA, iha)</div><div class='del'>-	      __DEFINE_SET_CR(LID, lid)</div><div class='del'>-	      __DEFINE_SET_CR(IVR, ivr)</div><div class='del'>-	      __DEFINE_SET_CR(TPR, tpr)</div><div class='del'>-	      __DEFINE_SET_CR(EOI, eoi)</div><div class='del'>-	      __DEFINE_SET_CR(IRR0, irr0)</div><div class='del'>-	      __DEFINE_SET_CR(IRR1, irr1)</div><div class='del'>-	      __DEFINE_SET_CR(IRR2, irr2)</div><div class='del'>-	      __DEFINE_SET_CR(IRR3, irr3)</div><div class='del'>-	      __DEFINE_SET_CR(ITV, itv)</div><div class='del'>-	      __DEFINE_SET_CR(PMV, pmv)</div><div class='del'>-	      __DEFINE_SET_CR(CMCV, cmcv)</div><div class='del'>-	      __DEFINE_SET_CR(LRR0, lrr0)</div><div class='del'>-	      __DEFINE_SET_CR(LRR1, lrr1)</div><div class='del'>-	);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-struct pv_cpu_ops pv_cpu_ops = {</div><div class='del'>-	.fc		= ia64_native_fc_func,</div><div class='del'>-	.thash		= ia64_native_thash_func,</div><div class='del'>-	.get_cpuid	= ia64_native_get_cpuid_func,</div><div class='del'>-	.get_pmd	= ia64_native_get_pmd_func,</div><div class='del'>-	.ptcga		= ia64_native_ptcga_func,</div><div class='del'>-	.get_rr		= ia64_native_get_rr_func,</div><div class='del'>-	.set_rr		= ia64_native_set_rr_func,</div><div class='del'>-	.set_rr0_to_rr4	= ia64_native_set_rr0_to_rr4_func,</div><div class='del'>-	.ssm_i		= ia64_native_ssm_i_func,</div><div class='del'>-	.getreg		= ia64_native_getreg_func,</div><div class='del'>-	.setreg		= ia64_native_setreg_func,</div><div class='del'>-	.rsm_i		= ia64_native_rsm_i_func,</div><div class='del'>-	.get_psr_i	= ia64_native_get_psr_i_func,</div><div class='del'>-	.intrin_local_irq_restore</div><div class='del'>-			= ia64_native_intrin_local_irq_restore_func,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL(pv_cpu_ops);</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- * replacement of hand written assembly codes.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch)</div><div class='del'>-{</div><div class='del'>-	extern unsigned long paravirt_switch_to_targ;</div><div class='del'>-	extern unsigned long paravirt_leave_syscall_targ;</div><div class='del'>-	extern unsigned long paravirt_work_processed_syscall_targ;</div><div class='del'>-	extern unsigned long paravirt_leave_kernel_targ;</div><div class='del'>-</div><div class='del'>-	paravirt_switch_to_targ = cpu_asm_switch-&gt;switch_to;</div><div class='del'>-	paravirt_leave_syscall_targ = cpu_asm_switch-&gt;leave_syscall;</div><div class='del'>-	paravirt_work_processed_syscall_targ =</div><div class='del'>-		cpu_asm_switch-&gt;work_processed_syscall;</div><div class='del'>-	paravirt_leave_kernel_targ = cpu_asm_switch-&gt;leave_kernel;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * pv_iosapic_ops</div><div class='del'>- * iosapic read/write hooks.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)</div><div class='del'>-{</div><div class='del'>-	return __ia64_native_iosapic_read(iosapic, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)</div><div class='del'>-{</div><div class='del'>-	__ia64_native_iosapic_write(iosapic, reg, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pv_iosapic_ops pv_iosapic_ops = {</div><div class='del'>-	.pcat_compat_init = ia64_native_iosapic_pcat_compat_init,</div><div class='del'>-	.__get_irq_chip = ia64_native_iosapic_get_irq_chip,</div><div class='del'>-</div><div class='del'>-	.__read = ia64_native_iosapic_read,</div><div class='del'>-	.__write = ia64_native_iosapic_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * pv_irq_ops</div><div class='del'>- * irq operations</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct pv_irq_ops pv_irq_ops = {</div><div class='del'>-	.register_ipi = ia64_native_register_ipi,</div><div class='del'>-</div><div class='del'>-	.assign_irq_vector = ia64_native_assign_irq_vector,</div><div class='del'>-	.free_irq_vector = ia64_native_free_irq_vector,</div><div class='del'>-	.register_percpu_irq = ia64_native_register_percpu_irq,</div><div class='del'>-</div><div class='del'>-	.resend_irq = ia64_native_resend_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * pv_time_ops</div><div class='del'>- * time operations</div><div class='del'>- */</div><div class='del'>-struct static_key paravirt_steal_enabled;</div><div class='del'>-struct static_key paravirt_steal_rq_enabled;</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-ia64_native_do_steal_accounting(unsigned long *new_itm)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pv_time_ops pv_time_ops = {</div><div class='del'>-	.do_steal_accounting = ia64_native_do_steal_accounting,</div><div class='del'>-	.sched_clock = ia64_native_sched_clock,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * binary pacthing</div><div class='del'>- * pv_init_ops.patch_bundle</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef ASM_SUPPORTED</div><div class='del'>-#define IA64_NATIVE_PATCH_DEFINE_GET_REG(name, reg)	\</div><div class='del'>-	__DEFINE_FUNC(get_ ## name,			\</div><div class='del'>-		      ";;\n"				\</div><div class='del'>-		      "mov r8 = " #reg "\n"		\</div><div class='del'>-		      ";;\n")</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_DEFINE_SET_REG(name, reg)	\</div><div class='del'>-	__DEFINE_FUNC(set_ ## name,			\</div><div class='del'>-		      ";;\n"				\</div><div class='del'>-		      "mov " #reg " = r8\n"		\</div><div class='del'>-		      ";;\n")</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_DEFINE_REG(name, reg)		\</div><div class='del'>-	IA64_NATIVE_PATCH_DEFINE_GET_REG(name, reg);	\</div><div class='del'>-	IA64_NATIVE_PATCH_DEFINE_SET_REG(name, reg)	\</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_DEFINE_AR(name, reg)			\</div><div class='del'>-	IA64_NATIVE_PATCH_DEFINE_REG(ar_ ## name, ar.reg)</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_DEFINE_CR(name, reg)			\</div><div class='del'>-	IA64_NATIVE_PATCH_DEFINE_REG(cr_ ## name, cr.reg)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_GET_REG(psr, psr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_GET_REG(tp, tp);</div><div class='del'>-</div><div class='del'>-/* IA64_NATIVE_PATCH_DEFINE_SET_REG(psr_l, psr.l); */</div><div class='del'>-__DEFINE_FUNC(set_psr_l,</div><div class='del'>-	      ";;\n"</div><div class='del'>-	      "mov psr.l = r8\n"</div><div class='del'>-#ifdef HAVE_SERIALIZE_DIRECTIVE</div><div class='del'>-	      ".serialize.data\n"</div><div class='del'>-#endif</div><div class='del'>-	      ";;\n");</div><div class='del'>-</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(gp, gp);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(sp, sp);</div><div class='del'>-</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr0, ar0);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr1, ar1);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr2, ar2);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr3, ar3);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr4, ar4);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr5, ar5);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr6, ar6);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(kr7, ar7);</div><div class='del'>-</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(rsc, rsc);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(bsp, bsp);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(bspstore, bspstore);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(rnat, rnat);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(fcr, fcr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(eflag, eflag);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(csd, csd);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(ssd, ssd);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_REG(ar27, ar27);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(fsr, fsr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(fir, fir);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(fdr, fdr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(ccv, ccv);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(unat, unat);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(fpsr, fpsr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(itc, itc);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(pfs, pfs);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(lc, lc);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_AR(ec, ec);</div><div class='del'>-</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(dcr, dcr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(itm, itm);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(iva, iva);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(pta, pta);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(ipsr, ipsr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(isr, isr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(iip, iip);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(ifa, ifa);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(itir, itir);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(iipa, iipa);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(ifs, ifs);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(iim, iim);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(iha, iha);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(lid, lid);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(ivr, ivr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(tpr, tpr);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(eoi, eoi);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(irr0, irr0);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(irr1, irr1);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(irr2, irr2);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(irr3, irr3);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(itv, itv);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(pmv, pmv);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(cmcv, cmcv);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(lrr0, lrr0);</div><div class='del'>-IA64_NATIVE_PATCH_DEFINE_CR(lrr1, lrr1);</div><div class='del'>-</div><div class='del'>-static const struct paravirt_patch_bundle_elem ia64_native_patch_bundle_elems[]</div><div class='del'>-__initdata_or_module =</div><div class='del'>-{</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM(name, type)		\</div><div class='del'>-	{							\</div><div class='del'>-		(void*)ia64_native_ ## name ## _direct_start,	\</div><div class='del'>-		(void*)ia64_native_ ## name ## _direct_end,	\</div><div class='del'>-		PARAVIRT_PATCH_TYPE_ ## type,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(fc, FC),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(thash, THASH),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(get_cpuid, GET_CPUID),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(get_pmd, GET_PMD),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(ptcga, PTCGA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(get_rr, GET_RR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(set_rr, SET_RR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(set_rr0_to_rr4, SET_RR0_TO_RR4),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(ssm_i, SSM_I),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(rsm_i, RSM_I),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(get_psr_i, GET_PSR_I),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM(intrin_local_irq_restore,</div><div class='del'>-				      INTRIN_LOCAL_IRQ_RESTORE),</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM_GETREG(name, reg)			\</div><div class='del'>-	{								\</div><div class='del'>-		(void*)ia64_native_get_ ## name ## _direct_start,	\</div><div class='del'>-		(void*)ia64_native_get_ ## name ## _direct_end,		\</div><div class='del'>-		PARAVIRT_PATCH_TYPE_GETREG + _IA64_REG_ ## reg,		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM_SETREG(name, reg)			\</div><div class='del'>-	{								\</div><div class='del'>-		(void*)ia64_native_set_ ## name ## _direct_start,	\</div><div class='del'>-		(void*)ia64_native_set_ ## name ## _direct_end,		\</div><div class='del'>-		PARAVIRT_PATCH_TYPE_SETREG + _IA64_REG_ ## reg,		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(name, reg)		\</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_GETREG(name, reg),	\</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_SETREG(name, reg)		\</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(name, reg)		\</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(ar_ ## name, AR_ ## reg)</div><div class='del'>-</div><div class='del'>-#define IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(name, reg)		\</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(cr_ ## name, CR_ ## reg)</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_GETREG(psr, PSR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_GETREG(tp, TP),</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_SETREG(psr_l, PSR_L),</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(gp, GP),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(sp, SP),</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr0, AR_KR0),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr1, AR_KR1),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr2, AR_KR2),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr3, AR_KR3),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr4, AR_KR4),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr5, AR_KR5),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr6, AR_KR6),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(kr7, AR_KR7),</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(rsc, RSC),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(bsp, BSP),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(bspstore, BSPSTORE),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(rnat, RNAT),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(fcr, FCR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(eflag, EFLAG),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(csd, CSD),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(ssd, SSD),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_REG(ar27, AR_CFLAG),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(fsr, FSR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(fir, FIR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(fdr, FDR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(ccv, CCV),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(unat, UNAT),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(fpsr, FPSR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(itc, ITC),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(pfs, PFS),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(lc, LC),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_AR(ec, EC),</div><div class='del'>-</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(dcr, DCR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(itm, ITM),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(iva, IVA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(pta, PTA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(ipsr, IPSR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(isr, ISR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(iip, IIP),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(ifa, IFA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(itir, ITIR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(iipa, IIPA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(ifs, IFS),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(iim, IIM),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(iha, IHA),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(lid, LID),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(ivr, IVR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(tpr, TPR),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(eoi, EOI),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(irr0, IRR0),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(irr1, IRR1),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(irr2, IRR2),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(irr3, IRR3),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(itv, ITV),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(pmv, PMV),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(cmcv, CMCV),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(lrr0, LRR0),</div><div class='del'>-	IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(lrr1, LRR1),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-unsigned long __init_or_module</div><div class='del'>-ia64_native_patch_bundle(void *sbundle, void *ebundle, unsigned long type)</div><div class='del'>-{</div><div class='del'>-	const unsigned long nelems = sizeof(ia64_native_patch_bundle_elems) /</div><div class='del'>-		sizeof(ia64_native_patch_bundle_elems[0]);</div><div class='del'>-</div><div class='del'>-	return __paravirt_patch_apply_bundle(sbundle, ebundle, type,</div><div class='del'>-					      ia64_native_patch_bundle_elems,</div><div class='del'>-					      nelems, NULL);</div><div class='del'>-}</div><div class='del'>-#endif /* ASM_SUPPOTED */</div><div class='del'>-</div><div class='del'>-extern const char ia64_native_switch_to[];</div><div class='del'>-extern const char ia64_native_leave_syscall[];</div><div class='del'>-extern const char ia64_native_work_processed_syscall[];</div><div class='del'>-extern const char ia64_native_leave_kernel[];</div><div class='del'>-</div><div class='del'>-const struct paravirt_patch_branch_target ia64_native_branch_target[]</div><div class='del'>-__initconst = {</div><div class='del'>-#define PARAVIRT_BR_TARGET(name, type)			\</div><div class='del'>-	{						\</div><div class='del'>-		ia64_native_ ## name,			\</div><div class='del'>-		PARAVIRT_PATCH_TYPE_BR_ ## type,	\</div><div class='del'>-	}</div><div class='del'>-	PARAVIRT_BR_TARGET(switch_to, SWITCH_TO),</div><div class='del'>-	PARAVIRT_BR_TARGET(leave_syscall, LEAVE_SYSCALL),</div><div class='del'>-	PARAVIRT_BR_TARGET(work_processed_syscall, WORK_PROCESSED_SYSCALL),</div><div class='del'>-	PARAVIRT_BR_TARGET(leave_kernel, LEAVE_KERNEL),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-ia64_native_patch_branch(unsigned long tag, unsigned long type)</div><div class='del'>-{</div><div class='del'>-	const unsigned long nelem =</div><div class='del'>-		sizeof(ia64_native_branch_target) /</div><div class='del'>-		sizeof(ia64_native_branch_target[0]);</div><div class='del'>-	__paravirt_patch_apply_branch(tag, type,</div><div class='del'>-				      ia64_native_branch_target, nelem);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/ia64/kernel/paravirt_inst.h b/arch/ia64/kernel/paravirt_inst.h<br/>deleted file mode 100644<br/>index 1ad7512b5f65..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirt_inst.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirt_inst.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * linux/arch/ia64/xen/paravirt_inst.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef __IA64_ASM_PARAVIRTUALIZED_PVCHECK</div><div class='del'>-#include &lt;asm/native/pvchk_inst.h&gt;</div><div class='del'>-#else</div><div class='del'>-#include &lt;asm/native/inst.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/ia64/kernel/paravirt_patch.c b/arch/ia64/kernel/paravirt_patch.c<br/>deleted file mode 100644<br/>index bfdfef1b1ffd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirt_patch.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirt_patch.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,514 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * linux/arch/ia64/xen/paravirt_patch.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/intrinsics.h&gt;</div><div class='del'>-#include &lt;asm/kprobes.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-#include &lt;asm/paravirt_patch.h&gt;</div><div class='del'>-</div><div class='del'>-typedef union ia64_inst {</div><div class='del'>-        struct {</div><div class='del'>-		unsigned long long qp : 6;</div><div class='del'>-		unsigned long long : 31;</div><div class='del'>-		unsigned long long opcode : 4;</div><div class='del'>-		unsigned long long reserved : 23;</div><div class='del'>-        } generic;</div><div class='del'>-        unsigned long long l;</div><div class='del'>-} ia64_inst_t;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * flush_icache_range() can't be used here.</div><div class='del'>- * we are here before cpu_init() which initializes</div><div class='del'>- * ia64_i_cache_stride_shift. flush_icache_range() uses it.</div><div class='del'>- */</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_flush_i_cache_range(const void *instr, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	extern void paravirt_fc_i(const void *addr);</div><div class='del'>-	unsigned long i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; size; i += sizeof(bundle_t))</div><div class='del'>-		paravirt_fc_i(instr + i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bundle_t* __init_or_module</div><div class='del'>-paravirt_get_bundle(unsigned long tag)</div><div class='del'>-{</div><div class='del'>-	return (bundle_t *)(tag &amp; ~3UL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long __init_or_module</div><div class='del'>-paravirt_get_slot(unsigned long tag)</div><div class='del'>-{</div><div class='del'>-	return tag &amp; 3UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long __init_or_module</div><div class='del'>-paravirt_get_num_inst(unsigned long stag, unsigned long etag)</div><div class='del'>-{</div><div class='del'>-	bundle_t *sbundle = paravirt_get_bundle(stag);</div><div class='del'>-	unsigned long sslot = paravirt_get_slot(stag);</div><div class='del'>-	bundle_t *ebundle = paravirt_get_bundle(etag);</div><div class='del'>-	unsigned long eslot = paravirt_get_slot(etag);</div><div class='del'>-</div><div class='del'>-	return (ebundle - sbundle) * 3 + eslot - sslot + 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long __init_or_module</div><div class='del'>-paravirt_get_next_tag(unsigned long tag)</div><div class='del'>-{</div><div class='del'>-	unsigned long slot = paravirt_get_slot(tag);</div><div class='del'>-</div><div class='del'>-	switch (slot) {</div><div class='del'>-	case 0:</div><div class='del'>-	case 1:</div><div class='del'>-		return tag + 1;</div><div class='del'>-	case 2: {</div><div class='del'>-		bundle_t *bundle = paravirt_get_bundle(tag);</div><div class='del'>-		return (unsigned long)(bundle + 1);</div><div class='del'>-	}</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-	/* NOTREACHED */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ia64_inst_t __init_or_module</div><div class='del'>-paravirt_read_slot0(const bundle_t *bundle)</div><div class='del'>-{</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	inst.l = bundle-&gt;quad0.slot0;</div><div class='del'>-	return inst;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ia64_inst_t __init_or_module</div><div class='del'>-paravirt_read_slot1(const bundle_t *bundle)</div><div class='del'>-{</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	inst.l = bundle-&gt;quad0.slot1_p0 |</div><div class='del'>-		((unsigned long long)bundle-&gt;quad1.slot1_p1 &lt;&lt; 18UL);</div><div class='del'>-	return inst;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ia64_inst_t __init_or_module</div><div class='del'>-paravirt_read_slot2(const bundle_t *bundle)</div><div class='del'>-{</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	inst.l = bundle-&gt;quad1.slot2;</div><div class='del'>-	return inst;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ia64_inst_t __init_or_module</div><div class='del'>-paravirt_read_inst(unsigned long tag)</div><div class='del'>-{</div><div class='del'>-	bundle_t *bundle = paravirt_get_bundle(tag);</div><div class='del'>-	unsigned long slot = paravirt_get_slot(tag);</div><div class='del'>-</div><div class='del'>-	switch (slot) {</div><div class='del'>-	case 0:</div><div class='del'>-		return paravirt_read_slot0(bundle);</div><div class='del'>-	case 1:</div><div class='del'>-		return paravirt_read_slot1(bundle);</div><div class='del'>-	case 2:</div><div class='del'>-		return paravirt_read_slot2(bundle);</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-	/* NOTREACHED */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_write_slot0(bundle_t *bundle, ia64_inst_t inst)</div><div class='del'>-{</div><div class='del'>-	bundle-&gt;quad0.slot0 = inst.l;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_write_slot1(bundle_t *bundle, ia64_inst_t inst)</div><div class='del'>-{</div><div class='del'>-	bundle-&gt;quad0.slot1_p0 = inst.l;</div><div class='del'>-	bundle-&gt;quad1.slot1_p1 = inst.l &gt;&gt; 18UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_write_slot2(bundle_t *bundle, ia64_inst_t inst)</div><div class='del'>-{</div><div class='del'>-	bundle-&gt;quad1.slot2 = inst.l;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_write_inst(unsigned long tag, ia64_inst_t inst)</div><div class='del'>-{</div><div class='del'>-	bundle_t *bundle = paravirt_get_bundle(tag);</div><div class='del'>-	unsigned long slot = paravirt_get_slot(tag);</div><div class='del'>-</div><div class='del'>-	switch (slot) {</div><div class='del'>-	case 0:</div><div class='del'>-		paravirt_write_slot0(bundle, inst);</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		paravirt_write_slot1(bundle, inst);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		paravirt_write_slot2(bundle, inst);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	paravirt_flush_i_cache_range(bundle, sizeof(*bundle));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* for debug */</div><div class='del'>-void</div><div class='del'>-paravirt_print_bundle(const bundle_t *bundle)</div><div class='del'>-{</div><div class='del'>-	const unsigned long *quad = (const unsigned long *)bundle;</div><div class='del'>-	ia64_inst_t slot0 = paravirt_read_slot0(bundle);</div><div class='del'>-	ia64_inst_t slot1 = paravirt_read_slot1(bundle);</div><div class='del'>-	ia64_inst_t slot2 = paravirt_read_slot2(bundle);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG</div><div class='del'>-	       "bundle 0x%p 0x%016lx 0x%016lx\n", bundle, quad[0], quad[1]);</div><div class='del'>-	printk(KERN_DEBUG</div><div class='del'>-	       "bundle template 0x%x\n",</div><div class='del'>-	       bundle-&gt;quad0.template);</div><div class='del'>-	printk(KERN_DEBUG</div><div class='del'>-	       "slot0 0x%lx slot1_p0 0x%lx slot1_p1 0x%lx slot2 0x%lx\n",</div><div class='del'>-	       (unsigned long)bundle-&gt;quad0.slot0,</div><div class='del'>-	       (unsigned long)bundle-&gt;quad0.slot1_p0,</div><div class='del'>-	       (unsigned long)bundle-&gt;quad1.slot1_p1,</div><div class='del'>-	       (unsigned long)bundle-&gt;quad1.slot2);</div><div class='del'>-	printk(KERN_DEBUG</div><div class='del'>-	       "slot0 0x%016llx slot1 0x%016llx slot2 0x%016llx\n",</div><div class='del'>-	       slot0.l, slot1.l, slot2.l);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int noreplace_paravirt __init_or_module = 0;</div><div class='del'>-</div><div class='del'>-static int __init setup_noreplace_paravirt(char *str)</div><div class='del'>-{</div><div class='del'>-	noreplace_paravirt = 1;</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("noreplace-paravirt", setup_noreplace_paravirt);</div><div class='del'>-</div><div class='del'>-#ifdef ASM_SUPPORTED</div><div class='del'>-static void __init_or_module</div><div class='del'>-fill_nop_bundle(void *sbundle, void *ebundle)</div><div class='del'>-{</div><div class='del'>-	extern const char paravirt_nop_bundle[];</div><div class='del'>-	extern const unsigned long paravirt_nop_bundle_size;</div><div class='del'>-</div><div class='del'>-	void *bundle = sbundle;</div><div class='del'>-</div><div class='del'>-	BUG_ON((((unsigned long)sbundle) % sizeof(bundle_t)) != 0);</div><div class='del'>-	BUG_ON((((unsigned long)ebundle) % sizeof(bundle_t)) != 0);</div><div class='del'>-</div><div class='del'>-	while (bundle &lt; ebundle) {</div><div class='del'>-		memcpy(bundle, paravirt_nop_bundle, paravirt_nop_bundle_size);</div><div class='del'>-</div><div class='del'>-		bundle += paravirt_nop_bundle_size;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* helper function */</div><div class='del'>-unsigned long __init_or_module</div><div class='del'>-__paravirt_patch_apply_bundle(void *sbundle, void *ebundle, unsigned long type,</div><div class='del'>-			      const struct paravirt_patch_bundle_elem *elems,</div><div class='del'>-			      unsigned long nelems,</div><div class='del'>-			      const struct paravirt_patch_bundle_elem **found)</div><div class='del'>-{</div><div class='del'>-	unsigned long used = 0;</div><div class='del'>-	unsigned long i;</div><div class='del'>-</div><div class='del'>-	BUG_ON((((unsigned long)sbundle) % sizeof(bundle_t)) != 0);</div><div class='del'>-	BUG_ON((((unsigned long)ebundle) % sizeof(bundle_t)) != 0);</div><div class='del'>-</div><div class='del'>-	found = NULL;</div><div class='del'>-	for (i = 0; i &lt; nelems; i++) {</div><div class='del'>-		const struct paravirt_patch_bundle_elem *p = &amp;elems[i];</div><div class='del'>-		if (p-&gt;type == type) {</div><div class='del'>-			unsigned long need = p-&gt;ebundle - p-&gt;sbundle;</div><div class='del'>-			unsigned long room = ebundle - sbundle;</div><div class='del'>-</div><div class='del'>-			if (found != NULL)</div><div class='del'>-				*found = p;</div><div class='del'>-</div><div class='del'>-			if (room &lt; need) {</div><div class='del'>-				/* no room to replace. skip it */</div><div class='del'>-				printk(KERN_DEBUG</div><div class='del'>-				       "the space is too small to put "</div><div class='del'>-				       "bundles. type %ld need %ld room %ld\n",</div><div class='del'>-				       type, need, room);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			used = need;</div><div class='del'>-			memcpy(sbundle, p-&gt;sbundle, used);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return used;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_patch_apply_bundle(const struct paravirt_patch_site_bundle *start,</div><div class='del'>-			    const struct paravirt_patch_site_bundle *end)</div><div class='del'>-{</div><div class='del'>-	const struct paravirt_patch_site_bundle *p;</div><div class='del'>-</div><div class='del'>-	if (noreplace_paravirt)</div><div class='del'>-		return;</div><div class='del'>-	if (pv_init_ops.patch_bundle == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (p = start; p &lt; end; p++) {</div><div class='del'>-		unsigned long used;</div><div class='del'>-</div><div class='del'>-		used = (*pv_init_ops.patch_bundle)(p-&gt;sbundle, p-&gt;ebundle,</div><div class='del'>-						   p-&gt;type);</div><div class='del'>-		if (used == 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		fill_nop_bundle(p-&gt;sbundle + used, p-&gt;ebundle);</div><div class='del'>-		paravirt_flush_i_cache_range(p-&gt;sbundle,</div><div class='del'>-					     p-&gt;ebundle - p-&gt;sbundle);</div><div class='del'>-	}</div><div class='del'>-	ia64_sync_i();</div><div class='del'>-	ia64_srlz_i();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * nop.i, nop.m, nop.f instruction are same format.</div><div class='del'>- * but nop.b has differennt format.</div><div class='del'>- * This doesn't support nop.b for now.</div><div class='del'>- */</div><div class='del'>-static void __init_or_module</div><div class='del'>-fill_nop_inst(unsigned long stag, unsigned long etag)</div><div class='del'>-{</div><div class='del'>-	extern const bundle_t paravirt_nop_mfi_inst_bundle[];</div><div class='del'>-	unsigned long tag;</div><div class='del'>-	const ia64_inst_t nop_inst =</div><div class='del'>-		paravirt_read_slot0(paravirt_nop_mfi_inst_bundle);</div><div class='del'>-</div><div class='del'>-	for (tag = stag; tag &lt; etag; tag = paravirt_get_next_tag(tag))</div><div class='del'>-		paravirt_write_inst(tag, nop_inst);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_patch_apply_inst(const struct paravirt_patch_site_inst *start,</div><div class='del'>-			  const struct paravirt_patch_site_inst *end)</div><div class='del'>-{</div><div class='del'>-	const struct paravirt_patch_site_inst *p;</div><div class='del'>-</div><div class='del'>-	if (noreplace_paravirt)</div><div class='del'>-		return;</div><div class='del'>-	if (pv_init_ops.patch_inst == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (p = start; p &lt; end; p++) {</div><div class='del'>-		unsigned long tag;</div><div class='del'>-		bundle_t *sbundle;</div><div class='del'>-		bundle_t *ebundle;</div><div class='del'>-</div><div class='del'>-		tag = (*pv_init_ops.patch_inst)(p-&gt;stag, p-&gt;etag, p-&gt;type);</div><div class='del'>-		if (tag == p-&gt;stag)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		fill_nop_inst(tag, p-&gt;etag);</div><div class='del'>-		sbundle = paravirt_get_bundle(p-&gt;stag);</div><div class='del'>-		ebundle = paravirt_get_bundle(p-&gt;etag) + 1;</div><div class='del'>-		paravirt_flush_i_cache_range(sbundle, (ebundle - sbundle) *</div><div class='del'>-					     sizeof(bundle_t));</div><div class='del'>-	}</div><div class='del'>-	ia64_sync_i();</div><div class='del'>-	ia64_srlz_i();</div><div class='del'>-}</div><div class='del'>-#endif /* ASM_SUPPOTED */</div><div class='del'>-</div><div class='del'>-/* brl.cond.sptk.many &lt;target64&gt; X3 */</div><div class='del'>-typedef union inst_x3_op {</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	struct {</div><div class='del'>-		unsigned long qp: 6;</div><div class='del'>-		unsigned long btyp: 3;</div><div class='del'>-		unsigned long unused: 3;</div><div class='del'>-		unsigned long p: 1;</div><div class='del'>-		unsigned long imm20b: 20;</div><div class='del'>-		unsigned long wh: 2;</div><div class='del'>-		unsigned long d: 1;</div><div class='del'>-		unsigned long i: 1;</div><div class='del'>-		unsigned long opcode: 4;</div><div class='del'>-	};</div><div class='del'>-	unsigned long l;</div><div class='del'>-} inst_x3_op_t;</div><div class='del'>-</div><div class='del'>-typedef union inst_x3_imm {</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	struct {</div><div class='del'>-		unsigned long unused: 2;</div><div class='del'>-		unsigned long imm39: 39;</div><div class='del'>-	};</div><div class='del'>-	unsigned long l;</div><div class='del'>-} inst_x3_imm_t;</div><div class='del'>-</div><div class='del'>-void __init_or_module</div><div class='del'>-paravirt_patch_reloc_brl(unsigned long tag, const void *target)</div><div class='del'>-{</div><div class='del'>-	unsigned long tag_op = paravirt_get_next_tag(tag);</div><div class='del'>-	unsigned long tag_imm = tag;</div><div class='del'>-	bundle_t *bundle = paravirt_get_bundle(tag);</div><div class='del'>-</div><div class='del'>-	ia64_inst_t inst_op = paravirt_read_inst(tag_op);</div><div class='del'>-	ia64_inst_t inst_imm = paravirt_read_inst(tag_imm);</div><div class='del'>-</div><div class='del'>-	inst_x3_op_t inst_x3_op = { .l = inst_op.l };</div><div class='del'>-	inst_x3_imm_t inst_x3_imm = { .l = inst_imm.l };</div><div class='del'>-</div><div class='del'>-	unsigned long imm60 =</div><div class='del'>-		((unsigned long)target - (unsigned long)bundle) &gt;&gt; 4;</div><div class='del'>-</div><div class='del'>-	BUG_ON(paravirt_get_slot(tag) != 1); /* MLX */</div><div class='del'>-	BUG_ON(((unsigned long)target &amp; (sizeof(bundle_t) - 1)) != 0);</div><div class='del'>-</div><div class='del'>-	/* imm60[59] 1bit */</div><div class='del'>-	inst_x3_op.i = (imm60 &gt;&gt; 59) &amp; 1;</div><div class='del'>-	/* imm60[19:0] 20bit */</div><div class='del'>-	inst_x3_op.imm20b = imm60 &amp; ((1UL &lt;&lt; 20) - 1);</div><div class='del'>-	/* imm60[58:20] 39bit */</div><div class='del'>-	inst_x3_imm.imm39 = (imm60 &gt;&gt; 20) &amp; ((1UL &lt;&lt; 39) - 1);</div><div class='del'>-</div><div class='del'>-	inst_op.l = inst_x3_op.l;</div><div class='del'>-	inst_imm.l = inst_x3_imm.l;</div><div class='del'>-</div><div class='del'>-	paravirt_write_inst(tag_op, inst_op);</div><div class='del'>-	paravirt_write_inst(tag_imm, inst_imm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* br.cond.sptk.many &lt;target25&gt;	B1 */</div><div class='del'>-typedef union inst_b1 {</div><div class='del'>-	ia64_inst_t inst;</div><div class='del'>-	struct {</div><div class='del'>-		unsigned long qp: 6;</div><div class='del'>-		unsigned long btype: 3;</div><div class='del'>-		unsigned long unused: 3;</div><div class='del'>-		unsigned long p: 1;</div><div class='del'>-		unsigned long imm20b: 20;</div><div class='del'>-		unsigned long wh: 2;</div><div class='del'>-		unsigned long d: 1;</div><div class='del'>-		unsigned long s: 1;</div><div class='del'>-		unsigned long opcode: 4;</div><div class='del'>-	};</div><div class='del'>-	unsigned long l;</div><div class='del'>-} inst_b1_t;</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-paravirt_patch_reloc_br(unsigned long tag, const void *target)</div><div class='del'>-{</div><div class='del'>-	bundle_t *bundle = paravirt_get_bundle(tag);</div><div class='del'>-	ia64_inst_t inst = paravirt_read_inst(tag);</div><div class='del'>-	unsigned long target25 = (unsigned long)target - (unsigned long)bundle;</div><div class='del'>-	inst_b1_t inst_b1;</div><div class='del'>-</div><div class='del'>-	BUG_ON(((unsigned long)target &amp; (sizeof(bundle_t) - 1)) != 0);</div><div class='del'>-</div><div class='del'>-	inst_b1.l = inst.l;</div><div class='del'>-	if (target25 &amp; (1UL &lt;&lt; 63))</div><div class='del'>-		inst_b1.s = 1;</div><div class='del'>-	else</div><div class='del'>-		inst_b1.s = 0;</div><div class='del'>-</div><div class='del'>-	inst_b1.imm20b = target25 &gt;&gt; 4;</div><div class='del'>-	inst.l = inst_b1.l;</div><div class='del'>-</div><div class='del'>-	paravirt_write_inst(tag, inst);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-__paravirt_patch_apply_branch(</div><div class='del'>-	unsigned long tag, unsigned long type,</div><div class='del'>-	const struct paravirt_patch_branch_target *entries,</div><div class='del'>-	unsigned int nr_entries)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-	for (i = 0; i &lt; nr_entries; i++) {</div><div class='del'>-		if (entries[i].type == type) {</div><div class='del'>-			paravirt_patch_reloc_br(tag, entries[i].entry);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-paravirt_patch_apply_branch(const struct paravirt_patch_site_branch *start,</div><div class='del'>-			    const struct paravirt_patch_site_branch *end)</div><div class='del'>-{</div><div class='del'>-	const struct paravirt_patch_site_branch *p;</div><div class='del'>-</div><div class='del'>-	if (noreplace_paravirt)</div><div class='del'>-		return;</div><div class='del'>-	if (pv_init_ops.patch_branch == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (p = start; p &lt; end; p++)</div><div class='del'>-		(*pv_init_ops.patch_branch)(p-&gt;tag, p-&gt;type);</div><div class='del'>-</div><div class='del'>-	ia64_sync_i();</div><div class='del'>-	ia64_srlz_i();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-paravirt_patch_apply(void)</div><div class='del'>-{</div><div class='del'>-	extern const char __start_paravirt_bundles[];</div><div class='del'>-	extern const char __stop_paravirt_bundles[];</div><div class='del'>-	extern const char __start_paravirt_insts[];</div><div class='del'>-	extern const char __stop_paravirt_insts[];</div><div class='del'>-	extern const char __start_paravirt_branches[];</div><div class='del'>-	extern const char __stop_paravirt_branches[];</div><div class='del'>-</div><div class='del'>-	paravirt_patch_apply_bundle((const struct paravirt_patch_site_bundle *)</div><div class='del'>-				    __start_paravirt_bundles,</div><div class='del'>-				    (const struct paravirt_patch_site_bundle *)</div><div class='del'>-				    __stop_paravirt_bundles);</div><div class='del'>-	paravirt_patch_apply_inst((const struct paravirt_patch_site_inst *)</div><div class='del'>-				  __start_paravirt_insts,</div><div class='del'>-				  (const struct paravirt_patch_site_inst *)</div><div class='del'>-				  __stop_paravirt_insts);</div><div class='del'>-	paravirt_patch_apply_branch((const struct paravirt_patch_site_branch *)</div><div class='del'>-				    __start_paravirt_branches,</div><div class='del'>-				    (const struct paravirt_patch_site_branch *)</div><div class='del'>-				    __stop_paravirt_branches);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- * mode: C</div><div class='del'>- * c-set-style: "linux"</div><div class='del'>- * c-basic-offset: 8</div><div class='del'>- * tab-width: 8</div><div class='del'>- * indent-tabs-mode: t</div><div class='del'>- * End:</div><div class='del'>- */</div><div class='head'>diff --git a/arch/ia64/kernel/paravirt_patchlist.c b/arch/ia64/kernel/paravirt_patchlist.c<br/>deleted file mode 100644<br/>index 0a70720662ed..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirt_patchlist.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirt_patchlist.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-</div><div class='del'>-#define DECLARE(name)						\</div><div class='del'>-	extern unsigned long					\</div><div class='del'>-		__ia64_native_start_gate_##name##_patchlist[];	\</div><div class='del'>-	extern unsigned long					\</div><div class='del'>-		__ia64_native_end_gate_##name##_patchlist[]</div><div class='del'>-</div><div class='del'>-DECLARE(fsyscall);</div><div class='del'>-DECLARE(brl_fsys_bubble_down);</div><div class='del'>-DECLARE(vtop);</div><div class='del'>-DECLARE(mckinley_e9);</div><div class='del'>-</div><div class='del'>-extern unsigned long __start_gate_section[];</div><div class='del'>-</div><div class='del'>-#define ASSIGN(name)							    \</div><div class='del'>-	.start_##name##_patchlist =					    \</div><div class='del'>-		(unsigned long)__ia64_native_start_gate_##name##_patchlist, \</div><div class='del'>-	.end_##name##_patchlist =					    \</div><div class='del'>-		(unsigned long)__ia64_native_end_gate_##name##_patchlist</div><div class='del'>-</div><div class='del'>-struct pv_patchdata pv_patchdata __initdata = {</div><div class='del'>-	ASSIGN(fsyscall),</div><div class='del'>-	ASSIGN(brl_fsys_bubble_down),</div><div class='del'>-	ASSIGN(vtop),</div><div class='del'>-	ASSIGN(mckinley_e9),</div><div class='del'>-</div><div class='del'>-	.gate_section = (void*)__start_gate_section,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-unsigned long __init</div><div class='del'>-paravirt_get_gate_patchlist(enum pv_gate_patchlist type)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-#define CASE(NAME, name)					\</div><div class='del'>-	case PV_GATE_START_##NAME:				\</div><div class='del'>-		return pv_patchdata.start_##name##_patchlist;	\</div><div class='del'>-	case PV_GATE_END_##NAME:				\</div><div class='del'>-		return pv_patchdata.end_##name##_patchlist;	\</div><div class='del'>-</div><div class='del'>-	switch (type) {</div><div class='del'>-		CASE(FSYSCALL, fsyscall);</div><div class='del'>-		CASE(BRL_FSYS_BUBBLE_DOWN, brl_fsys_bubble_down);</div><div class='del'>-		CASE(VTOP, vtop);</div><div class='del'>-		CASE(MCKINLEY_E9, mckinley_e9);</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void * __init</div><div class='del'>-paravirt_get_gate_section(void)</div><div class='del'>-{</div><div class='del'>-	return pv_patchdata.gate_section;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/ia64/kernel/paravirtentry.S b/arch/ia64/kernel/paravirtentry.S<br/>deleted file mode 100644<br/>index 92d880c4d3d1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/paravirtentry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/paravirtentry.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- * linux/arch/ia64/xen/paravirtentry.S</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Isaku Yamahata &lt;yamahata at valinux co jp&gt;</div><div class='del'>- *                    VA Linux Systems Japan K.K.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/asmmacro.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/paravirt_privop.h&gt;</div><div class='del'>-#include &lt;asm/paravirt_patch.h&gt;</div><div class='del'>-#include "entry.h"</div><div class='del'>-</div><div class='del'>-#define DATA8(sym, init_value)			\</div><div class='del'>-	.pushsection .data..read_mostly ;	\</div><div class='del'>-	.align 8 ;				\</div><div class='del'>-	.global sym ;				\</div><div class='del'>-	sym: ;					\</div><div class='del'>-	data8 init_value ;			\</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-#define BRANCH(targ, reg, breg, type)					\</div><div class='del'>-	PARAVIRT_PATCH_SITE_BR(PARAVIRT_PATCH_TYPE_BR_ ## type) ;	\</div><div class='del'>-	;;								\</div><div class='del'>-	movl reg=targ ;							\</div><div class='del'>-	;;								\</div><div class='del'>-	ld8 reg=[reg] ;							\</div><div class='del'>-	;;								\</div><div class='del'>-	mov breg=reg ;							\</div><div class='del'>-	br.cond.sptk.many breg</div><div class='del'>-</div><div class='del'>-#define BRANCH_PROC(sym, reg, breg, type)				\</div><div class='del'>-	DATA8(paravirt_ ## sym ## _targ, ia64_native_ ## sym) ;		\</div><div class='del'>-	GLOBAL_ENTRY(paravirt_ ## sym) ;				\</div><div class='del'>-		BRANCH(paravirt_ ## sym ## _targ, reg, breg, type) ;	\</div><div class='del'>-	END(paravirt_ ## sym)</div><div class='del'>-</div><div class='del'>-#define BRANCH_PROC_UNWINFO(sym, reg, breg, type)			\</div><div class='del'>-	DATA8(paravirt_ ## sym ## _targ, ia64_native_ ## sym) ;		\</div><div class='del'>-	GLOBAL_ENTRY(paravirt_ ## sym) ;				\</div><div class='del'>-		PT_REGS_UNWIND_INFO(0) ;				\</div><div class='del'>-		BRANCH(paravirt_ ## sym ## _targ, reg, breg, type) ;	\</div><div class='del'>-	END(paravirt_ ## sym)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-BRANCH_PROC(switch_to, r22, b7, SWITCH_TO)</div><div class='del'>-BRANCH_PROC_UNWINFO(leave_syscall, r22, b7, LEAVE_SYSCALL)</div><div class='del'>-BRANCH_PROC(work_processed_syscall, r2, b7, WORK_PROCESSED_SYSCALL)</div><div class='del'>-BRANCH_PROC_UNWINFO(leave_kernel, r22, b7, LEAVE_KERNEL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='del'>-#define __INIT_OR_MODULE	.text</div><div class='del'>-#define __INITDATA_OR_MODULE	.data</div><div class='del'>-#else</div><div class='del'>-#define __INIT_OR_MODULE	__INIT</div><div class='del'>-#define __INITDATA_OR_MODULE	__INITDATA</div><div class='del'>-#endif /* CONFIG_MODULES */</div><div class='del'>-</div><div class='del'>-	__INIT_OR_MODULE</div><div class='del'>-	GLOBAL_ENTRY(paravirt_fc_i)</div><div class='del'>-	fc.i r32</div><div class='del'>-	br.ret.sptk.many rp</div><div class='del'>-	END(paravirt_fc_i)</div><div class='del'>-	__FINIT</div><div class='del'>-</div><div class='del'>-	__INIT_OR_MODULE</div><div class='del'>-	.align 32</div><div class='del'>-	GLOBAL_ENTRY(paravirt_nop_b_inst_bundle)</div><div class='del'>-	{</div><div class='del'>-		nop.b 0</div><div class='del'>-		nop.b 0</div><div class='del'>-		nop.b 0</div><div class='del'>-	}</div><div class='del'>-	END(paravirt_nop_b_inst_bundle)</div><div class='del'>-	__FINIT</div><div class='del'>-</div><div class='del'>-	/* NOTE: nop.[mfi] has same format */</div><div class='del'>-	__INIT_OR_MODULE</div><div class='del'>-	GLOBAL_ENTRY(paravirt_nop_mfi_inst_bundle)</div><div class='del'>-	{</div><div class='del'>-		nop.m 0</div><div class='del'>-		nop.f 0</div><div class='del'>-		nop.i 0</div><div class='del'>-	}</div><div class='del'>-	END(paravirt_nop_mfi_inst_bundle)</div><div class='del'>-	__FINIT</div><div class='del'>-</div><div class='del'>-	__INIT_OR_MODULE</div><div class='del'>-	GLOBAL_ENTRY(paravirt_nop_bundle)</div><div class='del'>-paravirt_nop_bundle_start:</div><div class='del'>-	{</div><div class='del'>-		nop 0</div><div class='del'>-		nop 0</div><div class='del'>-		nop 0</div><div class='del'>-	}</div><div class='del'>-paravirt_nop_bundle_end:</div><div class='del'>-	END(paravirt_nop_bundle)</div><div class='del'>-	__FINIT</div><div class='del'>-</div><div class='del'>-	__INITDATA_OR_MODULE</div><div class='del'>-	.align 8</div><div class='del'>-	.global paravirt_nop_bundle_size</div><div class='del'>-paravirt_nop_bundle_size:</div><div class='del'>-	data8	paravirt_nop_bundle_end - paravirt_nop_bundle_start</div><div class='head'>diff --git a/arch/ia64/kernel/patch.c b/arch/ia64/kernel/patch.c<br/>index 1cf091793714..944a8e2438a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/patch.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/patch.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/patch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/patch.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/patch.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -169,35 +168,16 @@ ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)</div><div class='ctx'> 	ia64_srlz_i();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern unsigned long ia64_native_fsyscall_table[NR_syscalls];</div><div class='del'>-extern char ia64_native_fsys_bubble_down[];</div><div class='del'>-struct pv_fsys_data pv_fsys_data __initdata = {</div><div class='del'>-	.fsyscall_table = (unsigned long *)ia64_native_fsyscall_table,</div><div class='del'>-	.fsys_bubble_down = (void *)ia64_native_fsys_bubble_down,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-unsigned long * __init</div><div class='del'>-paravirt_get_fsyscall_table(void)</div><div class='del'>-{</div><div class='del'>-	return pv_fsys_data.fsyscall_table;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-char * __init</div><div class='del'>-paravirt_get_fsys_bubble_down(void)</div><div class='del'>-{</div><div class='del'>-	return pv_fsys_data.fsys_bubble_down;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init</div><div class='ctx'> patch_fsyscall_table (unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	u64 fsyscall_table = (u64)paravirt_get_fsyscall_table();</div><div class='add'>+	extern unsigned long fsyscall_table[NR_syscalls];</div><div class='ctx'> 	s32 *offp = (s32 *) start;</div><div class='ctx'> 	u64 ip;</div><div class='ctx'> </div><div class='ctx'> 	while (offp &lt; (s32 *) end) {</div><div class='ctx'> 		ip = (u64) ia64_imva((char *) offp + *offp);</div><div class='del'>-		ia64_patch_imm64(ip, fsyscall_table);</div><div class='add'>+		ia64_patch_imm64(ip, (u64) fsyscall_table);</div><div class='ctx'> 		ia64_fc((void *) ip);</div><div class='ctx'> 		++offp;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -208,7 +188,7 @@ patch_fsyscall_table (unsigned long start, unsigned long end)</div><div class='ctx'> static void __init</div><div class='ctx'> patch_brl_fsys_bubble_down (unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	u64 fsys_bubble_down = (u64)paravirt_get_fsys_bubble_down();</div><div class='add'>+	extern char fsys_bubble_down[];</div><div class='ctx'> 	s32 *offp = (s32 *) start;</div><div class='ctx'> 	u64 ip;</div><div class='ctx'> </div><div class='hunk'>@@ -226,13 +206,13 @@ patch_brl_fsys_bubble_down (unsigned long start, unsigned long end)</div><div class='ctx'> void __init</div><div class='ctx'> ia64_patch_gate (void)</div><div class='ctx'> {</div><div class='del'>-#	define START(name)	paravirt_get_gate_patchlist(PV_GATE_START_##name)</div><div class='del'>-#	define END(name)	paravirt_get_gate_patchlist(PV_GATE_END_##name)</div><div class='add'>+#	define START(name)	((unsigned long) __start_gate_##name##_patchlist)</div><div class='add'>+#	define END(name)	((unsigned long)__end_gate_##name##_patchlist)</div><div class='ctx'> </div><div class='del'>-	patch_fsyscall_table(START(FSYSCALL), END(FSYSCALL));</div><div class='del'>-	patch_brl_fsys_bubble_down(START(BRL_FSYS_BUBBLE_DOWN), END(BRL_FSYS_BUBBLE_DOWN));</div><div class='del'>-	ia64_patch_vtop(START(VTOP), END(VTOP));</div><div class='del'>-	ia64_patch_mckinley_e9(START(MCKINLEY_E9), END(MCKINLEY_E9));</div><div class='add'>+	patch_fsyscall_table(START(fsyscall), END(fsyscall));</div><div class='add'>+	patch_brl_fsys_bubble_down(START(brl_fsys_bubble_down), END(brl_fsys_bubble_down));</div><div class='add'>+	ia64_patch_vtop(START(vtop), END(vtop));</div><div class='add'>+	ia64_patch_mckinley_e9(START(mckinley_e9), END(mckinley_e9));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ia64_patch_phys_stack_reg(unsigned long val)</div><div class='head'>diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c<br/>index b9761389cb8d..4f118b0d3091 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/setup.c</a></div><div class='hunk'>@@ -50,8 +50,6 @@</div><div class='ctx'> #include &lt;asm/mca.h&gt;</div><div class='ctx'> #include &lt;asm/meminit.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-#include &lt;asm/paravirt_patch.h&gt;</div><div class='ctx'> #include &lt;asm/patch.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -360,8 +358,6 @@ reserve_memory (void)</div><div class='ctx'> 	rsvd_region[n].end   = (unsigned long) ia64_imva(_end);</div><div class='ctx'> 	n++;</div><div class='ctx'> </div><div class='del'>-	n += paravirt_reserve_memory(&amp;rsvd_region[n]);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_BLK_DEV_INITRD</div><div class='ctx'> 	if (ia64_boot_param-&gt;initrd_start) {</div><div class='ctx'> 		rsvd_region[n].start = (unsigned long)__va(ia64_boot_param-&gt;initrd_start);</div><div class='hunk'>@@ -528,10 +524,7 @@ setup_arch (char **cmdline_p)</div><div class='ctx'> {</div><div class='ctx'> 	unw_init();</div><div class='ctx'> </div><div class='del'>-	paravirt_arch_setup_early();</div><div class='del'>-</div><div class='ctx'> 	ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);</div><div class='del'>-	paravirt_patch_apply();</div><div class='ctx'> </div><div class='ctx'> 	*cmdline_p = __va(ia64_boot_param-&gt;command_line);</div><div class='ctx'> 	strlcpy(boot_command_line, *cmdline_p, COMMAND_LINE_SIZE);</div><div class='hunk'>@@ -594,9 +587,6 @@ setup_arch (char **cmdline_p)</div><div class='ctx'> 	cpu_init();	/* initialize the bootstrap CPU */</div><div class='ctx'> 	mmu_context_init();	/* initialize context_id bitmap */</div><div class='ctx'> </div><div class='del'>-	paravirt_banner();</div><div class='del'>-	paravirt_arch_setup_console(cmdline_p);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_VT</div><div class='ctx'> 	if (!conswitchp) {</div><div class='ctx'> # if defined(CONFIG_DUMMY_CONSOLE)</div><div class='hunk'>@@ -616,8 +606,6 @@ setup_arch (char **cmdline_p)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* enable IA-64 Machine Check Abort Handling unless disabled */</div><div class='del'>-	if (paravirt_arch_setup_nomca())</div><div class='del'>-		nomca = 1;</div><div class='ctx'> 	if (!nomca)</div><div class='ctx'> 		ia64_mca_init();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c<br/>index b054c5c6e713..0e76fad27975 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/smpboot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/smpboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/smpboot.c</a></div><div class='hunk'>@@ -49,7 +49,6 @@</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/mca.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -569,7 +568,6 @@ void smp_prepare_boot_cpu(void)</div><div class='ctx'> 	cpumask_set_cpu(smp_processor_id(), &amp;cpu_callin_map);</div><div class='ctx'> 	set_numa_node(cpu_to_node_map[smp_processor_id()]);</div><div class='ctx'> 	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;</div><div class='del'>-	paravirt_post_smp_prepare_boot_cpu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='head'>diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c<br/>index 9a0104a38cd3..c8dbe2acd735 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/time.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/sal.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -47,33 +46,12 @@ EXPORT_SYMBOL(last_cli_ip);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-/* We need to define a real function for sched_clock, to override the</div><div class='del'>-   weak default version */</div><div class='del'>-unsigned long long sched_clock(void)</div><div class='del'>-{</div><div class='del'>-        return paravirt_sched_clock();</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-static void</div><div class='del'>-paravirt_clocksource_resume(struct clocksource *cs)</div><div class='del'>-{</div><div class='del'>-	if (pv_time_ops.clocksource_resume)</div><div class='del'>-		pv_time_ops.clocksource_resume();</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static struct clocksource clocksource_itc = {</div><div class='ctx'> 	.name           = "itc",</div><div class='ctx'> 	.rating         = 350,</div><div class='ctx'> 	.read           = itc_get_cycles,</div><div class='ctx'> 	.mask           = CLOCKSOURCE_MASK(64),</div><div class='ctx'> 	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-	.resume		= paravirt_clocksource_resume,</div><div class='del'>-#endif</div><div class='ctx'> };</div><div class='ctx'> static struct clocksource *itc_clocksource;</div><div class='ctx'> </div><div class='hunk'>@@ -164,9 +142,6 @@ timer_interrupt (int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	profile_tick(CPU_PROFILING);</div><div class='ctx'> </div><div class='del'>-	if (paravirt_do_steal_accounting(&amp;new_itm))</div><div class='del'>-		goto skip_process_time_accounting;</div><div class='del'>-</div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		update_process_times(user_mode(get_irq_regs()));</div><div class='ctx'> </div><div class='hunk'>@@ -187,8 +162,6 @@ timer_interrupt (int irq, void *dev_id)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-skip_process_time_accounting:</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If we're too close to the next clock tick for</div><div class='hunk'>@@ -337,8 +310,6 @@ void ia64_init_itm(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		clocksource_itc.rating = 50;</div><div class='ctx'> </div><div class='del'>-	paravirt_init_missing_ticks_accounting(smp_processor_id());</div><div class='del'>-</div><div class='ctx'> 	/* avoid softlock up message when cpu is unplug and plugged again. */</div><div class='ctx'> 	touch_softlockup_watchdog();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S<br/>index 84f8a52ac5ae..dc506b05ffbd 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/vmlinux.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -136,27 +136,6 @@ SECTIONS {</div><div class='ctx'> 		__end___mckinley_e9_bundles = .;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PARAVIRT)</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET) {</div><div class='del'>-		__start_paravirt_bundles = .;</div><div class='del'>-		*(.paravirt_bundles)</div><div class='del'>-		__stop_paravirt_bundles = .;</div><div class='del'>-	}</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET) {</div><div class='del'>-		__start_paravirt_insts = .;</div><div class='del'>-		*(.paravirt_insts)</div><div class='del'>-		__stop_paravirt_insts = .;</div><div class='del'>-	}</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET) {</div><div class='del'>-		__start_paravirt_branches = .;</div><div class='del'>-		*(.paravirt_branches)</div><div class='del'>-		__stop_paravirt_branches = .;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_IA64_GENERIC)</div><div class='ctx'> 	/* Machine Vector */</div><div class='ctx'> 	. = ALIGN(16);</div><div class='head'>diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c<br/>index ba5ba7accd0d..70b40d1205a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/fault.c</a></div><div class='hunk'>@@ -11,10 +11,10 @@</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern int die(char *, struct pt_regs *, long);</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +96,7 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt or have no user context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VIRTUAL_MEM_MAP</div><div class='head'>diff --git a/arch/ia64/mm/hugetlbpage.c b/arch/ia64/mm/hugetlbpage.c<br/>index 52b7604b5215..f50d4b3f501a 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -65,11 +65,6 @@ huge_pte_offset (struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define mk_pte_huge(entry) { pte_val(entry) |= _PAGE_P; }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c<br/>index a9b65cf7b34a..97e48b0eefc7 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/init.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/mca.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void ia64_tlb_init (void);</div><div class='ctx'> </div><div class='hunk'>@@ -216,10 +215,6 @@ put_kernel_page (struct page *page, unsigned long address, pgprot_t pgprot)</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='del'>-	if (!PageReserved(page))</div><div class='del'>-		printk(KERN_ERR "put_kernel_page: page at 0x%p not in reserved memory\n",</div><div class='del'>-		       page_address(page));</div><div class='del'>-</div><div class='ctx'> 	pgd = pgd_offset_k(address);		/* note: this is NOT pgd_offset()! */</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='hunk'>@@ -244,7 +239,6 @@ put_kernel_page (struct page *page, unsigned long address, pgprot_t pgprot)</div><div class='ctx'> static void __init</div><div class='ctx'> setup_gate (void)</div><div class='ctx'> {</div><div class='del'>-	void *gate_section;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -252,11 +246,10 @@ setup_gate (void)</div><div class='ctx'> 	 * headers etc. and once execute-only page to enable</div><div class='ctx'> 	 * privilege-promotion via "epc":</div><div class='ctx'> 	 */</div><div class='del'>-	gate_section = paravirt_get_gate_section();</div><div class='del'>-	page = virt_to_page(ia64_imva(gate_section));</div><div class='add'>+	page = virt_to_page(ia64_imva(__start_gate_section));</div><div class='ctx'> 	put_kernel_page(page, GATE_ADDR, PAGE_READONLY);</div><div class='ctx'> #ifdef HAVE_BUGGY_SEGREL</div><div class='del'>-	page = virt_to_page(ia64_imva(gate_section + PAGE_SIZE));</div><div class='add'>+	page = virt_to_page(ia64_imva(__start_gate_section + PAGE_SIZE));</div><div class='ctx'> 	put_kernel_page(page, GATE_ADDR + PAGE_SIZE, PAGE_GATE);</div><div class='ctx'> #else</div><div class='ctx'> 	put_kernel_page(page, GATE_ADDR + PERCPU_PAGE_SIZE, PAGE_GATE);</div><div class='hunk'>@@ -642,8 +635,8 @@ mem_init (void)</div><div class='ctx'> 	 * code can tell them apart.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; NR_syscalls; ++i) {</div><div class='add'>+		extern unsigned long fsyscall_table[NR_syscalls];</div><div class='ctx'> 		extern unsigned long sys_call_table[NR_syscalls];</div><div class='del'>-		unsigned long *fsyscall_table = paravirt_get_fsyscall_table();</div><div class='ctx'> </div><div class='ctx'> 		if (!fsyscall_table[i] || nolwsys)</div><div class='ctx'> 			fsyscall_table[i] = sys_call_table[i] | 1;</div><div class='head'>diff --git a/arch/ia64/mm/numa.c b/arch/ia64/mm/numa.c<br/>index ea21d4cad540..aa19b7ac8222 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/mm/numa.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/mm/numa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/mm/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/mm/numa.c</a></div><div class='hunk'>@@ -58,27 +58,22 @@ paddr_to_nid(unsigned long paddr)</div><div class='ctx'>  * SPARSEMEM to allocate the SPARSEMEM sectionmap on the NUMA node where</div><div class='ctx'>  * the section resides.</div><div class='ctx'>  */</div><div class='del'>-int __meminit __early_pfn_to_nid(unsigned long pfn)</div><div class='add'>+int __meminit __early_pfn_to_nid(unsigned long pfn,</div><div class='add'>+					struct mminit_pfnnid_cache *state)</div><div class='ctx'> {</div><div class='ctx'> 	int i, section = pfn &gt;&gt; PFN_SECTION_SHIFT, ssec, esec;</div><div class='del'>-	/*</div><div class='del'>-	 * NOTE: The following SMP-unsafe globals are only used early in boot</div><div class='del'>-	 * when the kernel is running single-threaded.</div><div class='del'>-	 */</div><div class='del'>-	static int __meminitdata last_ssec, last_esec;</div><div class='del'>-	static int __meminitdata last_nid;</div><div class='ctx'> </div><div class='del'>-	if (section &gt;= last_ssec &amp;&amp; section &lt; last_esec)</div><div class='del'>-		return last_nid;</div><div class='add'>+	if (section &gt;= state-&gt;last_start &amp;&amp; section &lt; state-&gt;last_end)</div><div class='add'>+		return state-&gt;last_nid;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_node_memblks; i++) {</div><div class='ctx'> 		ssec = node_memblk[i].start_paddr &gt;&gt; PA_SECTION_SHIFT;</div><div class='ctx'> 		esec = (node_memblk[i].start_paddr + node_memblk[i].size +</div><div class='ctx'> 			((1L &lt;&lt; PA_SECTION_SHIFT) - 1)) &gt;&gt; PA_SECTION_SHIFT;</div><div class='ctx'> 		if (section &gt;= ssec &amp;&amp; section &lt; esec) {</div><div class='del'>-			last_ssec = ssec;</div><div class='del'>-			last_esec = esec;</div><div class='del'>-			last_nid = node_memblk[i].nid;</div><div class='add'>+			state-&gt;last_start = ssec;</div><div class='add'>+			state-&gt;last_end = esec;</div><div class='add'>+			state-&gt;last_nid = node_memblk[i].nid;</div><div class='ctx'> 			return node_memblk[i].nid;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/ia64/scripts/pvcheck.sed b/arch/ia64/scripts/pvcheck.sed<br/>deleted file mode 100644<br/>index e59809a3fc01..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/ia64/scripts/pvcheck.sed?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/scripts/pvcheck.sed</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Checker for paravirtualizations of privileged operations.</div><div class='del'>-#</div><div class='del'>-s/ssm.*psr\.ic.*/.warning \"ssm psr.ic should not be used directly\"/g</div><div class='del'>-s/rsm.*psr\.ic.*/.warning \"rsm psr.ic should not be used directly\"/g</div><div class='del'>-s/ssm.*psr\.i.*/.warning \"ssm psr.i should not be used directly\"/g</div><div class='del'>-s/rsm.*psr\.i.*/.warning \"rsm psr.i should not be used directly\"/g</div><div class='del'>-s/ssm.*psr\.dt.*/.warning \"ssm psr.dt should not be used directly\"/g</div><div class='del'>-s/rsm.*psr\.dt.*/.warning \"rsm psr.dt should not be used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.ifa/.warning \"cr.ifa should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.itir/.warning \"cr.itir should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.isr/.warning \"cr.isr should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.iha/.warning \"cr.iha should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.ipsr/.warning \"cr.ipsr should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.iim/.warning \"cr.iim should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.iip/.warning \"cr.iip should not used directly\"/g</div><div class='del'>-s/mov.*=.*cr\.ivr/.warning \"cr.ivr should not used directly\"/g</div><div class='del'>-s/mov.*=[^\.]*psr/.warning \"psr should not used directly\"/g	# avoid ar.fpsr</div><div class='del'>-s/mov.*=.*ar\.eflags/.warning \"ar.eflags should not used directly\"/g</div><div class='del'>-s/mov.*=.*ar\.itc.*/.warning \"ar.itc should not used directly\"/g</div><div class='del'>-s/mov.*cr\.ifa.*=.*/.warning \"cr.ifa should not used directly\"/g</div><div class='del'>-s/mov.*cr\.itir.*=.*/.warning \"cr.itir should not used directly\"/g</div><div class='del'>-s/mov.*cr\.iha.*=.*/.warning \"cr.iha should not used directly\"/g</div><div class='del'>-s/mov.*cr\.ipsr.*=.*/.warning \"cr.ipsr should not used directly\"/g</div><div class='del'>-s/mov.*cr\.ifs.*=.*/.warning \"cr.ifs should not used directly\"/g</div><div class='del'>-s/mov.*cr\.iip.*=.*/.warning \"cr.iip should not used directly\"/g</div><div class='del'>-s/mov.*cr\.kr.*=.*/.warning \"cr.kr should not used directly\"/g</div><div class='del'>-s/mov.*ar\.eflags.*=.*/.warning \"ar.eflags should not used directly\"/g</div><div class='del'>-s/itc\.i.*/.warning \"itc.i should not be used directly.\"/g</div><div class='del'>-s/itc\.d.*/.warning \"itc.d should not be used directly.\"/g</div><div class='del'>-s/bsw\.0/.warning \"bsw.0 should not be used directly.\"/g</div><div class='del'>-s/bsw\.1/.warning \"bsw.1 should not be used directly.\"/g</div><div class='del'>-s/ptc\.ga.*/.warning \"ptc.ga should not be used directly.\"/g</div><div class='head'>diff --git a/arch/ia64/sn/kernel/mca.c b/arch/ia64/sn/kernel/mca.c<br/>index 27793f7aa99c..5b799d4deb74 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/sn/kernel/mca.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/ia64/sn/kernel/mca.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/sn/kernel/mca.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/ia64/sn/kernel/mca.c</a></div><div class='hunk'>@@ -142,5 +142,4 @@ static int __init sn_salinfo_init(void)</div><div class='ctx'> 		salinfo_platform_oemdata = &amp;sn_salinfo_platform_oemdata;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(sn_salinfo_init)</div><div class='add'>+device_initcall(sn_salinfo_init);</div><div class='head'>diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild<br/>index 2edc793372fc..e0eb704ca1fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m32r/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/Kbuild</a></div><div class='hunk'>@@ -4,8 +4,8 @@ generic-y += cputime.h</div><div class='ctx'> generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/m32r/include/asm/cmpxchg.h b/arch/m32r/include/asm/cmpxchg.h<br/>index de651db20b43..14bf9b739dd2 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m32r/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -107,8 +107,6 @@ __xchg_local(unsigned long x, volatile void *ptr, int size)</div><div class='ctx'> 	((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr),	\</div><div class='ctx'> 			sizeof(*(ptr))))</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='del'>-</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h<br/>index 9cc00dbd59ce..0c3f25ee3381 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m32r/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/io.h</a></div><div class='hunk'>@@ -68,6 +68,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)</div><div class='ctx'> extern void iounmap(volatile void __iomem *addr);</div><div class='ctx'> #define ioremap_nocache(off,size) ioremap(off,size)</div><div class='ctx'> #define ioremap_wc ioremap_nocache</div><div class='add'>+#define ioremap_wt ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * IO bus memory addresses are also 1:1 with the physical address</div><div class='head'>diff --git a/arch/m32r/include/asm/uaccess.h b/arch/m32r/include/asm/uaccess.h<br/>index 71adff209405..cac7014daef3 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m32r/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/include/asm/uaccess.h</a></div><div class='hunk'>@@ -91,7 +91,8 @@ static inline void set_fs(mm_segment_t s)</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='hunk'>@@ -155,7 +156,8 @@ extern int fixup_exception(struct pt_regs *regs);</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -175,7 +177,8 @@ extern int fixup_exception(struct pt_regs *regs);</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -194,7 +197,8 @@ extern int fixup_exception(struct pt_regs *regs);</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -274,7 +278,8 @@ do {									\</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -568,7 +573,8 @@ unsigned long __generic_copy_from_user(void *, const void __user *, unsigned lon</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -588,7 +594,8 @@ unsigned long __generic_copy_from_user(void *, const void __user *, unsigned lon</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -606,7 +613,8 @@ unsigned long __generic_copy_from_user(void *, const void __user *, unsigned lon</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -626,7 +634,8 @@ unsigned long __generic_copy_from_user(void *, const void __user *, unsigned lon</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -677,7 +686,8 @@ unsigned long clear_user(void __user *mem, unsigned long len);</div><div class='ctx'>  * strlen_user: - Get the size of a string in user space.</div><div class='ctx'>  * @str: The string to measure.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Get the size of a NUL-terminated string in user space.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c<br/>index e3d4d4890104..8f9875b7933d 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m32r/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m32r/mm/fault.c</a></div><div class='hunk'>@@ -24,9 +24,9 @@</div><div class='ctx'> #include &lt;linux/vt_kern.h&gt;		/* For unblank_screen() */</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/m32r.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -111,10 +111,10 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 	mm = tsk-&gt;mm;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If we're in an interrupt or have no user context or are running in an</div><div class='del'>-	 * atomic region then we must not take the fault..</div><div class='add'>+	 * If we're in an interrupt or have no user context or have pagefaults</div><div class='add'>+	 * disabled then we must not take the fault.</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='ctx'> 	if (error_code &amp; ACE_USERMODE)</div><div class='head'>diff --git a/arch/m68k/68000/m68EZ328.c b/arch/m68k/68000/m68EZ328.c<br/>index 21952906e9e2..e6ab321f93f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/68000/m68EZ328.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/68000/m68EZ328.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/68000/m68EZ328.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68000/m68EZ328.c</a></div><div class='hunk'>@@ -62,8 +62,7 @@ void __init config_BSP(char *command, int len)</div><div class='ctx'> #ifdef CONFIG_UCSIMM</div><div class='ctx'>   printk(KERN_INFO "uCsimm serial string [%s]\n",getserialnum());</div><div class='ctx'>   p = cs8900a_hwaddr = gethwaddr(0);</div><div class='del'>-  printk(KERN_INFO "uCsimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",</div><div class='del'>-         p[0], p[1], p[2], p[3], p[4], p[5]);</div><div class='add'>+  printk(KERN_INFO "uCsimm hwaddr %pM\n", p);</div><div class='ctx'> </div><div class='ctx'>   p = getbenv("APPEND");</div><div class='ctx'>   if (p) strcpy(p,command);</div><div class='head'>diff --git a/arch/m68k/68000/m68VZ328.c b/arch/m68k/68000/m68VZ328.c<br/>index 0e5e5a10a021..1154bdb220a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/68000/m68VZ328.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/68000/m68VZ328.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/68000/m68VZ328.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68000/m68VZ328.c</a></div><div class='hunk'>@@ -152,8 +152,7 @@ static void __init init_hardware(char *command, int size)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum());</div><div class='ctx'> 	p = cs8900a_hwaddr = gethwaddr(0);</div><div class='del'>-	printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",</div><div class='del'>-		p[0], p[1], p[2], p[3], p[4], p[5]);</div><div class='add'>+	printk(KERN_INFO "uCdimm hwaddr %pM\n", p);</div><div class='ctx'> 	p = getbenv("APPEND");</div><div class='ctx'> 	if (p)</div><div class='ctx'> 		strcpy(p, command);</div><div class='head'>diff --git a/arch/m68k/68360/config.c b/arch/m68k/68360/config.c<br/>index fd1f948c7129..b65fe4eed38e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/68360/config.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/68360/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/68360/config.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/68360/config.c</a></div><div class='hunk'>@@ -154,8 +154,7 @@ void __init config_BSP(char *command, int len)</div><div class='ctx'> #if defined(CONFIG_UCQUICC) &amp;&amp; 0</div><div class='ctx'>   printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());</div><div class='ctx'>   p = scc1_hwaddr = gethwaddr(0);</div><div class='del'>-  printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",</div><div class='del'>-         p[0], p[1], p[2], p[3], p[4], p[5]);</div><div class='add'>+  printk(KERN_INFO "uCquicc hwaddr %pM\n", p);</div><div class='ctx'> </div><div class='ctx'>   p = getbenv("APPEND");</div><div class='ctx'>   if (p)</div><div class='head'>diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu<br/>index 33013dfcd3e1..c496d48a8c8d 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/Kconfig.cpu?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/Kconfig.cpu</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/Kconfig.cpu?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/Kconfig.cpu</a></div><div class='hunk'>@@ -125,6 +125,13 @@ endif # M68KCLASSIC</div><div class='ctx'> </div><div class='ctx'> if COLDFIRE</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "ColdFire SoC type"</div><div class='add'>+	default M520x</div><div class='add'>+	help</div><div class='add'>+	  Select the type of ColdFire System-on-Chip (SoC) that you want</div><div class='add'>+	  to build for.</div><div class='add'>+</div><div class='ctx'> config M5206</div><div class='ctx'> 	bool "MCF5206"</div><div class='ctx'> 	depends on !MMU</div><div class='hunk'>@@ -174,9 +181,6 @@ config M525x</div><div class='ctx'> 	help</div><div class='ctx'> 	  Freescale (Motorola) Coldfire 5251/5253 processor support.</div><div class='ctx'> </div><div class='del'>-config M527x</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config M5271</div><div class='ctx'> 	bool "MCF5271"</div><div class='ctx'> 	depends on !MMU</div><div class='hunk'>@@ -223,9 +227,6 @@ config M5307</div><div class='ctx'> 	help</div><div class='ctx'> 	  Motorola ColdFire 5307 processor support.</div><div class='ctx'> </div><div class='del'>-config M53xx</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config M532x</div><div class='ctx'> 	bool "MCF532x"</div><div class='ctx'> 	depends on !MMU</div><div class='hunk'>@@ -251,9 +252,6 @@ config M5407</div><div class='ctx'> 	help</div><div class='ctx'> 	  Motorola ColdFire 5407 processor support.</div><div class='ctx'> </div><div class='del'>-config M54xx</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config M547x</div><div class='ctx'> 	bool "MCF547x"</div><div class='ctx'> 	select M54xx</div><div class='hunk'>@@ -280,6 +278,17 @@ config M5441x</div><div class='ctx'> 	help</div><div class='ctx'> 	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.</div><div class='ctx'> </div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+config M527x</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config M53xx</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config M54xx</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> endif # COLDFIRE</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -416,22 +425,18 @@ config HAVE_MBAR</div><div class='ctx'> config HAVE_IPSBAR</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config CLOCK_SET</div><div class='del'>-	bool "Enable setting the CPU clock frequency"</div><div class='del'>-	depends on COLDFIRE</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  On some CPU's you do not need to know what the core CPU clock</div><div class='del'>-	  frequency is. On these you can disable clock setting. On some</div><div class='del'>-	  traditional 68K parts, and on all ColdFire parts you need to set</div><div class='del'>-	  the appropriate CPU clock frequency. On these devices many of the</div><div class='del'>-	  onboard peripherals derive their timing from the master CPU clock</div><div class='del'>-	  frequency.</div><div class='del'>-</div><div class='ctx'> config CLOCK_FREQ</div><div class='ctx'> 	int "Set the core clock frequency"</div><div class='add'>+	default "25000000" if M5206</div><div class='add'>+	default "54000000" if M5206e</div><div class='add'>+	default "166666666" if M520x</div><div class='add'>+	default "140000000" if M5249</div><div class='add'>+	default "150000000" if M527x || M523x</div><div class='add'>+	default "90000000" if M5307</div><div class='add'>+	default "50000000" if M5407</div><div class='add'>+	default "266000000" if M54xx</div><div class='ctx'> 	default "66666666"</div><div class='del'>-	depends on CLOCK_SET</div><div class='add'>+	depends on COLDFIRE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Define the CPU clock frequency in use. This is the core clock</div><div class='ctx'> 	  frequency, it may or may not be the same as the external clock</div><div class='head'>diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig<br/>index ed1643b4c678..753a6237f99a 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/amiga_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/amiga_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/amiga_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/amiga_defconfig</a></div><div class='hunk'>@@ -177,9 +177,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -267,7 +267,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -285,6 +287,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -324,6 +327,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -348,6 +352,7 @@ CONFIG_VETH=m</div><div class='ctx'> CONFIG_A2065=y</div><div class='ctx'> CONFIG_ARIADNE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_HP is not set</div><div class='hunk'>@@ -414,7 +419,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_MSM6242=m</div><div class='head'>diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig<br/>index d38822b1847e..1f93dcaf02e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/apollo_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/apollo_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/apollo_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/apollo_defconfig</a></div><div class='hunk'>@@ -175,9 +175,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -265,7 +265,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -277,6 +279,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -306,6 +309,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -327,6 +331,7 @@ CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -375,7 +380,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig<br/>index c429199cf4a9..831b8b8b92ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/atari_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/atari_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/atari_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/atari_defconfig</a></div><div class='hunk'>@@ -175,9 +175,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -265,7 +265,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -281,6 +283,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -315,6 +318,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -337,6 +341,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_ATARILANCE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -391,7 +396,6 @@ CONFIG_DMASOUND_ATARI=m</div><div class='ctx'> CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='head'>diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig<br/>index 9b880371d642..91fd187c16d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/bvme6000_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/bvme6000_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/bvme6000_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/bvme6000_defconfig</a></div><div class='hunk'>@@ -173,9 +173,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -263,7 +263,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -275,6 +277,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -305,6 +308,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -326,6 +330,7 @@ CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> CONFIG_BVME6000_NET=y</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -369,7 +374,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig<br/>index 49ae3376e993..9d4934f1d2c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/hp300_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/hp300_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/hp300_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/hp300_defconfig</a></div><div class='hunk'>@@ -175,9 +175,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -265,7 +265,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -277,6 +279,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -306,6 +309,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -328,6 +332,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_HPLANCE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -378,7 +383,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/m5208evb_defconfig b/arch/m68k/configs/m5208evb_defconfig<br/>index e7292f460af4..4c7b7938d53a 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5208evb_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5208evb_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5208evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5208evb_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -16,17 +12,12 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='del'>-CONFIG_M520x=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=166666666</div><div class='del'>-CONFIG_CLOCK_DIV=2</div><div class='del'>-CONFIG_M5208EVB=y</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> # CONFIG_4KSTACKS is not set</div><div class='ctx'> CONFIG_RAMBASE=0x40000000</div><div class='ctx'> CONFIG_RAMSIZE=0x2000000</div><div class='ctx'> CONFIG_VECTORBASE=0x40000000</div><div class='ctx'> CONFIG_KERNELBASE=0x40020000</div><div class='del'>-CONFIG_RAM16BIT=y</div><div class='ctx'> CONFIG_BINFMT_FLAT=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='hunk'>@@ -40,24 +31,19 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='ctx'> CONFIG_FEC=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> # CONFIG_INPUT is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_BAUDRATE=115200</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='hunk'>@@ -68,8 +54,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='del'>-CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='del'>-CONFIG_FULLDEBUG=y</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='add'>+CONFIG_FULLDEBUG=y</div><div class='head'>diff --git a/arch/m68k/configs/m5249evb_defconfig b/arch/m68k/configs/m5249evb_defconfig<br/>index 0cd4b39f325b..a782f368650f 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5249evb_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5249evb_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5249evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5249evb_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -16,10 +12,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> CONFIG_M5249=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=140000000</div><div class='del'>-CONFIG_CLOCK_DIV=2</div><div class='ctx'> CONFIG_M5249C3=y</div><div class='ctx'> CONFIG_RAMBASE=0x00000000</div><div class='ctx'> CONFIG_RAMSIZE=0x00800000</div><div class='hunk'>@@ -38,23 +32,18 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> CONFIG_PPP=y</div><div class='ctx'> # CONFIG_INPUT is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='hunk'>@@ -62,7 +51,5 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/m68k/configs/m5272c3_defconfig b/arch/m68k/configs/m5272c3_defconfig<br/>index a60cb3509135..6f5fb92f5cbf 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5272c3_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5272c3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5272c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5272c3_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -16,8 +12,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> CONFIG_M5272=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='ctx'> CONFIG_M5272C3=y</div><div class='ctx'> CONFIG_RAMBASE=0x00000000</div><div class='ctx'> CONFIG_RAMSIZE=0x00800000</div><div class='hunk'>@@ -36,23 +32,18 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='ctx'> CONFIG_FEC=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> # CONFIG_INPUT is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='hunk'>@@ -61,6 +52,5 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='head'>diff --git a/arch/m68k/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig<br/>index e6502ab7cb2f..b5d7cd1ce856 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5275evb_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5275evb_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5275evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5275evb_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -16,11 +12,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> CONFIG_M5275=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=150000000</div><div class='del'>-CONFIG_CLOCK_DIV=2</div><div class='del'>-CONFIG_M5275EVB=y</div><div class='ctx'> # CONFIG_4KSTACKS is not set</div><div class='ctx'> CONFIG_RAMBASE=0x00000000</div><div class='ctx'> CONFIG_RAMSIZE=0x00000000</div><div class='hunk'>@@ -39,24 +32,19 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='ctx'> CONFIG_FEC=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> CONFIG_PPP=y</div><div class='ctx'> # CONFIG_INPUT is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='hunk'>@@ -65,8 +53,5 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='del'>-CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/m68k/configs/m5307c3_defconfig b/arch/m68k/configs/m5307c3_defconfig<br/>index 023812abd2e6..1b4c09461c40 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5307c3_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5307c3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5307c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5307c3_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -16,10 +12,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> CONFIG_M5307=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=90000000</div><div class='del'>-CONFIG_CLOCK_DIV=2</div><div class='ctx'> CONFIG_M5307C3=y</div><div class='ctx'> CONFIG_RAMBASE=0x00000000</div><div class='ctx'> CONFIG_RAMSIZE=0x00800000</div><div class='hunk'>@@ -38,16 +32,11 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> CONFIG_PPP=y</div><div class='ctx'> CONFIG_SLIP=y</div><div class='ctx'> CONFIG_SLIP_COMPRESSED=y</div><div class='hunk'>@@ -56,21 +45,17 @@ CONFIG_SLIP_COMPRESSED=y</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='del'>-# CONFIG_HID_SUPPORT is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='del'>-CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='del'>-CONFIG_FULLDEBUG=y</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='add'>+CONFIG_FULLDEBUG=y</div><div class='head'>diff --git a/arch/m68k/configs/m5407c3_defconfig b/arch/m68k/configs/m5407c3_defconfig<br/>index 557b39f3be90..275ad543d4bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5407c3_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5407c3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5407c3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5407c3_defconfig</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='del'>-# CONFIG_MMU is not set</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -17,9 +13,8 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+# CONFIG_MMU is not set</div><div class='ctx'> CONFIG_M5407=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=50000000</div><div class='ctx'> CONFIG_M5407C3=y</div><div class='ctx'> CONFIG_RAMBASE=0x00000000</div><div class='ctx'> CONFIG_RAMSIZE=0x00000000</div><div class='hunk'>@@ -38,22 +33,17 @@ CONFIG_INET=y</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAM=y</div><div class='ctx'> CONFIG_MTD_UCLINUX=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-# CONFIG_MISC_DEVICES is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='del'>-# CONFIG_NETDEV_1000 is not set</div><div class='del'>-# CONFIG_NETDEV_10000 is not set</div><div class='ctx'> CONFIG_PPP=y</div><div class='ctx'> # CONFIG_INPUT is not set</div><div class='ctx'> # CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_MCF=y</div><div class='ctx'> CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='del'>-# CONFIG_UNIX98_PTYS is not set</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='hunk'>@@ -63,8 +53,5 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-# CONFIG_RCU_CPU_STALL_DETECTOR is not set</div><div class='del'>-CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='ctx'> CONFIG_BOOTPARAM=y</div><div class='ctx'> CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/m68k/configs/m5475evb_defconfig b/arch/m68k/configs/m5475evb_defconfig<br/>index c5018a68819b..4f4ccd13c11b 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/m5475evb_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/m5475evb_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5475evb_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/m5475evb_defconfig</a></div><div class='hunk'>@@ -1,11 +1,7 @@</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='ctx'> # CONFIG_SWAP is not set</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-CONFIG_SYSFS_DEPRECATED=y</div><div class='del'>-CONFIG_SYSFS_DEPRECATED_V2=y</div><div class='ctx'> CONFIG_SYSCTL_SYSCALL=y</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -20,19 +16,16 @@ CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='ctx'> CONFIG_COLDFIRE=y</div><div class='del'>-CONFIG_M547x=y</div><div class='del'>-CONFIG_CLOCK_SET=y</div><div class='del'>-CONFIG_CLOCK_FREQ=266000000</div><div class='ctx'> # CONFIG_4KSTACKS is not set</div><div class='ctx'> CONFIG_RAMBASE=0x0</div><div class='ctx'> CONFIG_RAMSIZE=0x2000000</div><div class='ctx'> CONFIG_VECTORBASE=0x0</div><div class='ctx'> CONFIG_MBAR=0xff000000</div><div class='ctx'> CONFIG_KERNELBASE=0x20000</div><div class='add'>+CONFIG_PCI=y</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_CFI=y</div><div class='ctx'> CONFIG_MTD_JEDECPROBE=y</div><div class='head'>diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig<br/>index ee143a57058c..72bc187ca995 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/mac_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/mac_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/mac_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mac_defconfig</a></div><div class='hunk'>@@ -174,9 +174,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -267,7 +267,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -280,6 +282,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -315,6 +318,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -344,6 +348,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_MACMACE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> CONFIG_MAC89x0=y</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='hunk'>@@ -400,7 +405,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig<br/>index c777aa05048f..8fb65535597f 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/multi_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/multi_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/multi_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/multi_defconfig</a></div><div class='hunk'>@@ -184,9 +184,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -277,7 +277,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -299,6 +301,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -348,6 +351,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -384,6 +388,7 @@ CONFIG_MVME147_NET=y</div><div class='ctx'> CONFIG_SUN3LANCE=y</div><div class='ctx'> CONFIG_MACMACE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> CONFIG_MAC89x0=y</div><div class='ctx'> # CONFIG_NET_VENDOR_HP is not set</div><div class='hunk'>@@ -468,7 +473,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_MSM6242=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig<br/>index a7628a85e260..f34491ec0126 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/mvme147_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/mvme147_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/mvme147_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mvme147_defconfig</a></div><div class='hunk'>@@ -172,9 +172,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -262,7 +262,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -274,6 +276,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -304,6 +307,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -326,6 +330,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_MVME147_NET=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -369,7 +374,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig<br/>index ebaa68268a4a..3d3614d1b041 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/mvme16x_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/mvme16x_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/mvme16x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/mvme16x_defconfig</a></div><div class='hunk'>@@ -173,9 +173,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -263,7 +263,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -275,6 +277,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -305,6 +308,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -326,6 +330,7 @@ CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> CONFIG_MVME16x_NET=y</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -369,7 +374,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig<br/>index 2c16853aedd3..643e9c93bea7 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/q40_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/q40_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/q40_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/q40_defconfig</a></div><div class='hunk'>@@ -173,9 +173,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -263,7 +263,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -278,6 +280,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -311,6 +314,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -334,6 +338,7 @@ CONFIG_VETH=m</div><div class='ctx'> # CONFIG_NET_VENDOR_3COM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_AMD is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_HP is not set</div><div class='hunk'>@@ -390,7 +395,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig<br/>index e3056bf0f65b..8fecc5aa166c 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/sun3_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/sun3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/sun3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/sun3_defconfig</a></div><div class='hunk'>@@ -170,9 +170,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -260,7 +260,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -272,6 +274,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -302,6 +305,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -324,6 +328,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_SUN3LANCE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> CONFIG_SUN3_82586=y</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MICREL is not set</div><div class='hunk'>@@ -370,7 +375,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig<br/>index 73c36b7a0009..9902c5bfbdc8 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/configs/sun3x_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/configs/sun3x_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/sun3x_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/configs/sun3x_defconfig</a></div><div class='hunk'>@@ -170,9 +170,9 @@ CONFIG_IP_SET_HASH_NETPORT=m</div><div class='ctx'> CONFIG_IP_SET_HASH_NETIFACE=m</div><div class='ctx'> CONFIG_IP_SET_LIST_SET=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV4=m</div><div class='del'>-CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='add'>+CONFIG_NF_LOG_ARP=m</div><div class='ctx'> CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NFT_MASQ_IPV4=m</div><div class='ctx'> CONFIG_NFT_REDIR_IPV4=m</div><div class='hunk'>@@ -260,7 +260,9 @@ CONFIG_BATMAN_ADV_DAT=y</div><div class='ctx'> CONFIG_BATMAN_ADV_NC=y</div><div class='ctx'> CONFIG_BATMAN_ADV_MCAST=y</div><div class='ctx'> CONFIG_NETLINK_DIAG=m</div><div class='add'>+CONFIG_MPLS=y</div><div class='ctx'> CONFIG_NET_MPLS_GSO=m</div><div class='add'>+CONFIG_MPLS_ROUTING=m</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> # CONFIG_UEVENT_HELPER is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='hunk'>@@ -272,6 +274,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_PMEM=m</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='hunk'>@@ -302,6 +305,7 @@ CONFIG_DM_RAID=m</div><div class='ctx'> CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_LOG_WRITES=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -324,6 +328,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_SUN3LANCE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='hunk'>@@ -370,7 +375,6 @@ CONFIG_HID=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> # CONFIG_HID_GENERIC is not set</div><div class='del'>-# CONFIG_HID_PLANTRONICS is not set</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='head'>diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild<br/>index 1517ed1c6471..eb85bd9c6180 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/Kbuild</a></div><div class='hunk'>@@ -18,12 +18,12 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += shmparam.h</div><div class='ctx'> generic-y += siginfo.h</div><div class='head'>diff --git a/arch/m68k/include/asm/cmpxchg.h b/arch/m68k/include/asm/cmpxchg.h<br/>index bc755bc620ad..83b1df80f0ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -90,7 +90,6 @@ extern unsigned long __invalid_cmpxchg_size(volatile void *,</div><div class='ctx'>  * indicated by comparing RETURN with OLD.</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_RMW_INSNS</div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,</div><div class='ctx'> 				      unsigned long new, int size)</div><div class='head'>diff --git a/arch/m68k/include/asm/coldfire.h b/arch/m68k/include/asm/coldfire.h<br/>index c94557b91448..50aa4dac9ca2 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/coldfire.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/coldfire.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/coldfire.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/coldfire.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'>  *	in any case new boards come along from time to time that have yet</div><div class='ctx'>  *	another different clocking frequency.</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_CLOCK_SET</div><div class='add'>+#ifdef CONFIG_CLOCK_FREQ</div><div class='ctx'> #define	MCF_CLK		CONFIG_CLOCK_FREQ</div><div class='ctx'> #else</div><div class='ctx'> #error "Don't know what your ColdFire CPU clock frequency is??"</div><div class='head'>diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h<br/>index 8955b40a5dc4..f55cad529400 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/io_mm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/io_mm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/io_mm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/io_mm.h</a></div><div class='hunk'>@@ -20,6 +20,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#define ARCH_HAS_IOREMAP_WT</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/raw_io.h&gt;</div><div class='ctx'> #include &lt;asm/virtconvert.h&gt;</div><div class='hunk'>@@ -411,7 +413,8 @@ static inline void isa_delay(void)</div><div class='ctx'> #define writew(val, addr)	out_le16((addr), (val))</div><div class='ctx'> #endif /* CONFIG_ATARI_ROM_ISA */</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ISA) &amp;&amp; !defined(CONFIG_ATARI_ROM_ISA)</div><div class='add'>+#if !defined(CONFIG_ISA) &amp;&amp; !defined(CONFIG_ATARI_ROM_ISA) &amp;&amp; \</div><div class='add'>+    !(defined(CONFIG_PCI) &amp;&amp; defined(CONFIG_COLDFIRE))</div><div class='ctx'> /*</div><div class='ctx'>  * We need to define dummy functions for GENERIC_IOMAP support.</div><div class='ctx'>  */</div><div class='hunk'>@@ -465,7 +468,7 @@ static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned lon</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);</div><div class='ctx'> }</div><div class='del'>-static inline void __iomem *ioremap_writethrough(unsigned long physaddr,</div><div class='add'>+static inline void __iomem *ioremap_wt(unsigned long physaddr,</div><div class='ctx'> 					 unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);</div><div class='head'>diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h<br/>index a93c8cde4d38..ad7bd40e6742 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/io_no.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/io_no.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/io_no.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/io_no.h</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#define ARCH_HAS_IOREMAP_WT</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/virtconvert.h&gt;</div><div class='ctx'> #include &lt;asm-generic/iomap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -153,7 +155,7 @@ static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);</div><div class='ctx'> }</div><div class='del'>-static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)</div><div class='add'>+static inline void *ioremap_wt(unsigned long physaddr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/include/asm/irqflags.h b/arch/m68k/include/asm/irqflags.h<br/>index a823cd73dc09..b5941818346f 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/irqflags.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/irqflags.h</a></div><div class='hunk'>@@ -2,9 +2,6 @@</div><div class='ctx'> #define _M68K_IRQFLAGS_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-#include &lt;linux/preempt_mask.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> #include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/entry.h&gt;</div><div class='head'>diff --git a/arch/m68k/include/asm/serial.h b/arch/m68k/include/asm/serial.h<br/>index 7267536adbcc..06d0cb19b4e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/include/asm/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/include/asm/serial.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #define BASE_BAUD ( 1843200 / 16 )</div><div class='ctx'> </div><div class='ctx'> /* Standard COM flags (except for COM4, because of the 8514 problem) */</div><div class='del'>-#ifdef CONFIG_SERIAL_DETECT_IRQ</div><div class='add'>+#ifdef CONFIG_SERIAL_8250_DETECT_IRQ</div><div class='ctx'> #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)</div><div class='ctx'> #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c<br/>index e546a5534dd4..564665f9af30 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/kernel/dma.c</a></div><div class='hunk'>@@ -120,13 +120,16 @@ void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_sync_single_for_device);</div><div class='ctx'> </div><div class='del'>-void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,</div><div class='del'>-			    enum dma_data_direction dir)</div><div class='add'>+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,</div><div class='add'>+			    int nents, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; sg++, i++)</div><div class='del'>-		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='add'>+		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length,</div><div class='add'>+					   dir);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_sync_sg_for_device);</div><div class='ctx'> </div><div class='hunk'>@@ -151,14 +154,16 @@ dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_map_page);</div><div class='ctx'> </div><div class='del'>-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,</div><div class='ctx'> 	       enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; sg++, i++) {</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='ctx'> 		sg-&gt;dma_address = sg_phys(sg);</div><div class='del'>-		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='add'>+		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length,</div><div class='add'>+					   dir);</div><div class='ctx'> 	}</div><div class='ctx'> 	return nents;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c<br/>index 835fa04511c8..272dde481d17 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/mac/psc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/mac/psc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/mac/psc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/mac/psc.c</a></div><div class='hunk'>@@ -148,14 +148,10 @@ static void psc_irq(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> </div><div class='ctx'> void __init psc_register_interrupts(void)</div><div class='ctx'> {</div><div class='del'>-	irq_set_chained_handler(IRQ_AUTO_3, psc_irq);</div><div class='del'>-	irq_set_handler_data(IRQ_AUTO_3, (void *)0x30);</div><div class='del'>-	irq_set_chained_handler(IRQ_AUTO_4, psc_irq);</div><div class='del'>-	irq_set_handler_data(IRQ_AUTO_4, (void *)0x40);</div><div class='del'>-	irq_set_chained_handler(IRQ_AUTO_5, psc_irq);</div><div class='del'>-	irq_set_handler_data(IRQ_AUTO_5, (void *)0x50);</div><div class='del'>-	irq_set_chained_handler(IRQ_AUTO_6, psc_irq);</div><div class='del'>-	irq_set_handler_data(IRQ_AUTO_6, (void *)0x60);</div><div class='add'>+	irq_set_chained_handler_and_data(IRQ_AUTO_3, psc_irq, (void *)0x30);</div><div class='add'>+	irq_set_chained_handler_and_data(IRQ_AUTO_4, psc_irq, (void *)0x40);</div><div class='add'>+	irq_set_chained_handler_and_data(IRQ_AUTO_5, psc_irq, (void *)0x50);</div><div class='add'>+	irq_set_chained_handler_and_data(IRQ_AUTO_6, psc_irq, (void *)0x60);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void psc_irq_enable(int irq) {</div><div class='head'>diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c<br/>index b2f04aee46ec..6a94cdd0c830 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/m68k/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/m68k/mm/fault.c</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void die_if_kernel(char *, struct pt_regs *, long);</div><div class='hunk'>@@ -81,7 +81,7 @@ int do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/metag/include/asm/Kbuild b/arch/metag/include/asm/Kbuild<br/>index 0bf5d525b945..df31353fd200 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/Kbuild</a></div><div class='hunk'>@@ -25,6 +25,7 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += param.h</div><div class='hunk'>@@ -33,7 +34,6 @@ generic-y += percpu.h</div><div class='ctx'> generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += serial.h</div><div class='head'>diff --git a/arch/metag/include/asm/barrier.h b/arch/metag/include/asm/barrier.h<br/>index d703d8e26a65..5a696e507930 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/barrier.h</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static inline void fence(void)</div><div class='ctx'> #define read_barrier_depends()		do { } while (0)</div><div class='ctx'> #define smp_read_barrier_depends()	do { } while (0)</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value) do { var = value; smp_mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define smp_store_release(p, v)						\</div><div class='ctx'> do {									\</div><div class='head'>diff --git a/arch/metag/include/asm/cmpxchg.h b/arch/metag/include/asm/cmpxchg.h<br/>index b1bc1be8540f..be29e3e44321 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -51,8 +51,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,</div><div class='ctx'> 	return old;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> #define cmpxchg(ptr, o, n)						\</div><div class='ctx'> 	({								\</div><div class='ctx'> 		__typeof__(*(ptr)) _o_ = (o);				\</div><div class='head'>diff --git a/arch/metag/include/asm/dma-mapping.h b/arch/metag/include/asm/dma-mapping.h<br/>index 14b23efd9b7a..eb5cdec94be0 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -134,20 +134,24 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='add'>+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nelems,</div><div class='ctx'> 		    enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		dma_sync_for_cpu(sg_virt(sg), sg-&gt;length, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='del'>-		       enum dma_data_direction direction)</div><div class='add'>+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,</div><div class='add'>+		       int nelems, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		dma_sync_for_device(sg_virt(sg), sg-&gt;length, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/metag/include/asm/hugetlb.h b/arch/metag/include/asm/hugetlb.h<br/>index 471f481e67f3..905ed422dbeb 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -14,10 +14,6 @@ static inline int is_hugepage_only_range(struct mm_struct *mm,</div><div class='ctx'> int prepare_hugepage_range(struct file *file, unsigned long addr,</div><div class='ctx'> 						unsigned long len);</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,</div><div class='ctx'> 					  unsigned long addr, unsigned long end,</div><div class='ctx'> 					  unsigned long floor,</div><div class='hunk'>@@ -71,15 +67,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/metag/include/asm/io.h b/arch/metag/include/asm/io.h<br/>index d5779b0ec573..9890f21eadbe 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/include/asm/io.h</a></div><div class='hunk'>@@ -160,6 +160,9 @@ extern void __iounmap(void __iomem *addr);</div><div class='ctx'> #define ioremap_wc(offset, size)                \</div><div class='ctx'> 	__ioremap((offset), (size), _PAGE_WR_COMBINE)</div><div class='ctx'> </div><div class='add'>+#define ioremap_wt(offset, size)                \</div><div class='add'>+	__ioremap((offset), (size), 0)</div><div class='add'>+</div><div class='ctx'> #define iounmap(addr)                           \</div><div class='ctx'> 	__iounmap(addr)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/metag/mm/fault.c b/arch/metag/mm/fault.c<br/>index 2de5dc695a87..f57edca63609 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/fault.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ int do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> </div><div class='ctx'> 	mm = tsk-&gt;mm;</div><div class='ctx'> </div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/metag/mm/highmem.c b/arch/metag/mm/highmem.c<br/>index d71f621a2c0b..807f1b1c4e65 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/highmem.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -82,6 +82,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +96,7 @@ void *kmap_atomic_pfn(unsigned long pfn)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	type = kmap_atomic_idx_push();</div><div class='head'>diff --git a/arch/metag/mm/hugetlbpage.c b/arch/metag/mm/hugetlbpage.c<br/>index 7ca80ac42ed5..53f0f6c47027 100644<br/>--- a/<a href='/drm-misc/tree/arch/metag/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/metag/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/metag/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/metag/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -89,11 +89,6 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pmd_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	return pmd_page_shift(pmd) &gt; PAGE_SHIFT;</div><div class='head'>diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild<br/>index ab564a6db5c3..2f222f355c4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/Kbuild</a></div><div class='hunk'>@@ -6,7 +6,7 @@ generic-y += device.h</div><div class='ctx'> generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += syscalls.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h<br/>index 940f5fc1d1da..39b6315db82e 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/io.h</a></div><div class='hunk'>@@ -39,10 +39,10 @@ extern resource_size_t isa_mem_base;</div><div class='ctx'> extern void iounmap(void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> extern void __iomem *ioremap(phys_addr_t address, unsigned long size);</div><div class='del'>-#define ioremap_writethrough(addr, size)	ioremap((addr), (size))</div><div class='ctx'> #define ioremap_nocache(addr, size)		ioremap((addr), (size))</div><div class='ctx'> #define ioremap_fullcache(addr, size)		ioremap((addr), (size))</div><div class='ctx'> #define ioremap_wc(addr, size)			ioremap((addr), (size))</div><div class='add'>+#define ioremap_wt(addr, size)			ioremap((addr), (size))</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_MMU */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h<br/>index 468aca8cec0d..dc9eb6657e3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/pci.h</a></div><div class='hunk'>@@ -16,8 +16,8 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/pci-bridge.h&gt;</div><div class='hunk'>@@ -27,8 +27,6 @@</div><div class='ctx'> #define PCIBIOS_MIN_IO		0x1000</div><div class='ctx'> #define PCIBIOS_MIN_MEM		0x10000000</div><div class='ctx'> </div><div class='del'>-struct pci_dev;</div><div class='del'>-</div><div class='ctx'> /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */</div><div class='ctx'> #define IOBASE_BRIDGE_NUMBER	0</div><div class='ctx'> #define IOBASE_MEMORY		1</div><div class='hunk'>@@ -44,16 +42,6 @@ struct pci_dev;</div><div class='ctx'>  */</div><div class='ctx'> #define pcibios_assign_all_busses()	0</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> extern int pci_domain_nr(struct pci_bus *bus);</div><div class='ctx'> </div><div class='ctx'> /* Decide whether to display the domain number in /proc */</div><div class='hunk'>@@ -83,40 +71,12 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,</div><div class='ctx'>  */</div><div class='ctx'> #define PCI_DMA_BUS_IS_PHYS     (1)</div><div class='ctx'> </div><div class='del'>-static inline struct resource *pcibios_select_root(struct pci_dev *pdev,</div><div class='del'>-			struct resource *res)</div><div class='del'>-{</div><div class='del'>-	struct resource *root = NULL;</div><div class='del'>-</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_IO)</div><div class='del'>-		root = &amp;ioport_resource;</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_MEM)</div><div class='del'>-		root = &amp;iomem_resource;</div><div class='del'>-</div><div class='del'>-	return root;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern void pcibios_claim_one_bus(struct pci_bus *b);</div><div class='ctx'> </div><div class='ctx'> extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);</div><div class='ctx'> </div><div class='ctx'> extern void pcibios_resource_survey(void);</div><div class='ctx'> </div><div class='del'>-extern struct pci_controller *init_phb_dynamic(struct device_node *dn);</div><div class='del'>-extern int remove_phb_dynamic(struct pci_controller *phb);</div><div class='del'>-</div><div class='del'>-extern struct pci_dev *of_create_pci_dev(struct device_node *node,</div><div class='del'>-					struct pci_bus *bus, int devfn);</div><div class='del'>-</div><div class='del'>-extern void of_scan_pci_bridge(struct device_node *node,</div><div class='del'>-				struct pci_dev *dev);</div><div class='del'>-</div><div class='del'>-extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);</div><div class='del'>-extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);</div><div class='del'>-</div><div class='del'>-extern int pci_bus_find_capability(struct pci_bus *bus,</div><div class='del'>-						unsigned int devfn, int cap);</div><div class='del'>-</div><div class='ctx'> struct file;</div><div class='ctx'> extern pgprot_t	pci_phys_mem_access_prot(struct file *file,</div><div class='ctx'> 					 unsigned long pfn,</div><div class='head'>diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h<br/>index 62942fd12672..331b0d35f89c 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/include/asm/uaccess.h</a></div><div class='hunk'>@@ -178,7 +178,8 @@ extern long __user_bad(void);</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -290,7 +291,8 @@ extern long __user_bad(void);</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='head'>diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c<br/>index d1dd6e83d59b..b70bb538f001 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/cpu/cpuinfo.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/kernel/cpu/cpuinfo.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/cpu/cpuinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/cpu/cpuinfo.c</a></div><div class='hunk'>@@ -47,6 +47,8 @@ const struct cpu_ver_key cpu_ver_lookup[] = {</div><div class='ctx'> 	{"9.1", 0x1d},</div><div class='ctx'> 	{"9.2", 0x1f},</div><div class='ctx'> 	{"9.3", 0x20},</div><div class='add'>+	{"9.4", 0x21},</div><div class='add'>+	{"9.5", 0x22},</div><div class='ctx'> 	{NULL, 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c<br/>index ed7ba8a11822..bf4dec229437 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/dma.c</a></div><div class='hunk'>@@ -154,6 +154,7 @@ dma_direct_sync_sg_for_device(struct device *dev,</div><div class='ctx'> 			__dma_sync(sg-&gt;dma_address, sg-&gt;length, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static</div><div class='ctx'> int dma_direct_mmap_coherent(struct device *dev, struct vm_area_struct *vma,</div><div class='ctx'> 			     void *cpu_addr, dma_addr_t handle, size_t size,</div><div class='ctx'> 			     struct dma_attrs *attrs)</div><div class='head'>diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c<br/>index 8736af5806ae..6366f69d118e 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/kgdb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/kernel/kgdb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/kgdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/kernel/kgdb.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #define GDB_RTLBHI	56</div><div class='ctx'> </div><div class='ctx'> /* keep pvr separately because it is unchangeble */</div><div class='del'>-struct pvr_s pvr;</div><div class='add'>+static struct pvr_s pvr;</div><div class='ctx'> </div><div class='ctx'> void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c<br/>index d46a5ebb7570..177dfc003643 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/mm/fault.c</a></div><div class='hunk'>@@ -107,14 +107,14 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	if ((error_code &amp; 0x13) == 0x13 || (error_code &amp; 0x11) == 0x11)</div><div class='ctx'> 		is_write = 0;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(in_atomic() || !mm)) {</div><div class='add'>+	if (unlikely(faulthandler_disabled() || !mm)) {</div><div class='ctx'> 		if (kernel_mode(regs))</div><div class='ctx'> 			goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='del'>-		/* in_atomic() in user mode is really bad,</div><div class='add'>+		/* faulthandler_disabled() in user mode is really bad,</div><div class='ctx'> 		   as is current-&gt;mm == NULL. */</div><div class='del'>-		pr_emerg("Page fault in user mode with in_atomic(), mm = %p\n",</div><div class='del'>-									mm);</div><div class='add'>+		pr_emerg("Page fault in user mode with faulthandler_disabled(), mm = %p\n",</div><div class='add'>+			 mm);</div><div class='ctx'> 		pr_emerg("r15 = %lx  MSR = %lx\n",</div><div class='ctx'> 		       regs-&gt;r15, regs-&gt;msr);</div><div class='ctx'> 		die("Weird page fault", regs, SIGSEGV);</div><div class='head'>diff --git a/arch/microblaze/mm/highmem.c b/arch/microblaze/mm/highmem.c<br/>index 5a92576fad92..2fcc5a52d84d 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/microblaze/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/microblaze/mm/highmem.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -63,6 +63,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	if (vaddr &lt; __fix_to_virt(FIX_KMAP_END)) {</div><div class='ctx'> 		pagefault_enable();</div><div class='add'>+		preempt_enable();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -84,5 +85,6 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> #endif</div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='head'>diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms<br/>index 39cf40da5f14..a424e46b50af 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Kbuild.platforms?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/Kbuild.platforms</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Kbuild.platforms?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Kbuild.platforms</a></div><div class='hunk'>@@ -15,8 +15,8 @@ platforms += jazz</div><div class='ctx'> platforms += jz4740</div><div class='ctx'> platforms += lantiq</div><div class='ctx'> platforms += lasat</div><div class='del'>-platforms += loongson</div><div class='del'>-platforms += loongson1</div><div class='add'>+platforms += loongson32</div><div class='add'>+platforms += loongson64</div><div class='ctx'> platforms += mti-malta</div><div class='ctx'> platforms += mti-sead3</div><div class='ctx'> platforms += netlogic</div><div class='head'>diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig<br/>index f5016656494f..cee5f93e5712 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Kconfig</a></div><div class='hunk'>@@ -21,11 +21,12 @@ config MIPS</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_KPROBES</div><div class='ctx'> 	select HAVE_KRETPROBES</div><div class='add'>+	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select HAVE_DEBUG_KMEMLEAK</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select ARCH_HAS_ELF_RANDOMIZE</div><div class='ctx'> 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES &amp;&amp; 64BIT</div><div class='del'>-	select RTC_LIB if !MACH_LOONGSON</div><div class='add'>+	select RTC_LIB if !MACH_LOONGSON64</div><div class='ctx'> 	select GENERIC_ATOMIC64 if !64BIT</div><div class='ctx'> 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='ctx'> 	select HAVE_DMA_ATTRS</div><div class='hunk'>@@ -70,7 +71,7 @@ config MIPS_ALCHEMY</div><div class='ctx'> 	select ARCH_PHYS_ADDR_T_64BIT</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -85,7 +86,7 @@ config AR7</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select NO_EXCEPT_FILL</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='hunk'>@@ -106,7 +107,7 @@ config ATH25</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='ctx'> 	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='hunk'>@@ -123,14 +124,17 @@ config ATH79</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select HAVE_CLK</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select MIPS_MACHINE</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R2</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='ctx'> 	select SYS_SUPPORTS_MIPS16</div><div class='add'>+	select SYS_SUPPORTS_ZBOOT</div><div class='add'>+	select USE_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +150,7 @@ config BMIPS_GENERIC</div><div class='ctx'> 	select BCM7038_L1_IRQ</div><div class='ctx'> 	select BCM7120_L2_IRQ</div><div class='ctx'> 	select BRCMSTB_L2_IRQ</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select RAW_IRQ_ACCESSORS</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -176,7 +180,7 @@ config BCM47XX</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='ctx'> 	select NO_EXCEPT_FILL</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -186,6 +190,7 @@ config BCM47XX</div><div class='ctx'> 	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select LEDS_GPIO_REGISTER</div><div class='add'>+	select BCM47XX_NVRAM</div><div class='ctx'> 	help</div><div class='ctx'> 	 Support for BCM47XX based boards</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +201,7 @@ config BCM63XX</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select SYNC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -216,7 +221,7 @@ config MIPS_COBALT</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select I8253</div><div class='ctx'> 	select I8259</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select IRQ_GT641XX</div><div class='ctx'> 	select PCI_GT64XXX_PCI0</div><div class='ctx'> 	select PCI</div><div class='hunk'>@@ -239,7 +244,7 @@ config MACH_DECSTATION</div><div class='ctx'> 	select CPU_R4400_WORKAROUNDS if 64BIT</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select NO_IOPORT_MAP</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_HAS_CPU_R3000</div><div class='ctx'> 	select SYS_HAS_CPU_R4X00</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -274,7 +279,7 @@ config MACH_JAZZ</div><div class='ctx'> 	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN</div><div class='ctx'> 	select GENERIC_ISA_DMA</div><div class='ctx'> 	select HAVE_PCSPKR_PLATFORM</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select I8253</div><div class='ctx'> 	select I8259</div><div class='ctx'> 	select ISA</div><div class='hunk'>@@ -288,23 +293,24 @@ config MACH_JAZZ</div><div class='ctx'> 	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and</div><div class='ctx'> 	 Olivetti M700-10 workstations.</div><div class='ctx'> </div><div class='del'>-config MACH_JZ4740</div><div class='del'>-	bool "Ingenic JZ4740 based machines"</div><div class='del'>-	select SYS_HAS_CPU_MIPS32_R1</div><div class='add'>+config MACH_INGENIC</div><div class='add'>+	bool "Ingenic SoC based machines"</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT_UART16550</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='del'>-	select SYS_HAS_EARLY_PRINTK</div><div class='del'>-	select HAVE_CLK</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='add'>+	select BUILTIN_DTB</div><div class='add'>+	select USE_OF</div><div class='add'>+	select LIBFDT</div><div class='ctx'> </div><div class='ctx'> config LANTIQ</div><div class='ctx'> 	bool "Lantiq based platforms"</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='hunk'>@@ -333,7 +339,7 @@ config LASAT</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select PCI_GT64XXX_PCI0</div><div class='ctx'> 	select MIPS_NILE4</div><div class='ctx'> 	select R5000_CPU_SCACHE</div><div class='hunk'>@@ -342,26 +348,28 @@ config LASAT</div><div class='ctx'> 	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='ctx'> </div><div class='del'>-config MACH_LOONGSON</div><div class='del'>-	bool "Loongson family of machines"</div><div class='add'>+config MACH_LOONGSON32</div><div class='add'>+	bool "Loongson-1 family of machines"</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT</div><div class='ctx'> 	help</div><div class='del'>-	  This enables the support of Loongson family of machines.</div><div class='add'>+	  This enables support for the Loongson-1 family of machines.</div><div class='ctx'> </div><div class='del'>-	  Loongson is a family of general-purpose MIPS-compatible CPUs.</div><div class='del'>-	  developed at Institute of Computing Technology (ICT),</div><div class='del'>-	  Chinese Academy of Sciences (CAS) in the People's Republic</div><div class='del'>-	  of China. The chief architect is Professor Weiwu Hu.</div><div class='add'>+	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by</div><div class='add'>+	  the Institute of Computing Technology (ICT), Chinese Academy of</div><div class='add'>+	  Sciences (CAS).</div><div class='ctx'> </div><div class='del'>-config MACH_LOONGSON1</div><div class='del'>-	bool "Loongson 1 family of machines"</div><div class='add'>+config MACH_LOONGSON64</div><div class='add'>+	bool "Loongson-2/3 family of machines"</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for the Loongson 1 based machines.</div><div class='add'>+	  This enables the support of Loongson-2/3 family of machines.</div><div class='ctx'> </div><div class='del'>-	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by</div><div class='del'>-	  the ICT (Institute of Computing Technology) and the Chinese Academy</div><div class='del'>-	  of Sciences.</div><div class='add'>+	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a</div><div class='add'>+	  family of multi-core CPUs. They are both 64-bit general-purpose</div><div class='add'>+	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute</div><div class='add'>+	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)</div><div class='add'>+	  in the People's Republic of China. The chief architect is Professor</div><div class='add'>+	  Weiwu Hu.</div><div class='ctx'> </div><div class='ctx'> config MACH_PISTACHIO</div><div class='ctx'> 	bool "IMG Pistachio SoC based boards"</div><div class='hunk'>@@ -373,7 +381,7 @@ config MACH_PISTACHIO</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_MAYBE_COHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select LIBFDT</div><div class='ctx'> 	select MFD_SYSCON</div><div class='ctx'> 	select MIPS_CPU_SCACHE</div><div class='hunk'>@@ -386,6 +394,8 @@ config MACH_PISTACHIO</div><div class='ctx'> 	select SYS_SUPPORTS_MIPS_CPS</div><div class='ctx'> 	select SYS_SUPPORTS_MULTITHREADING</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT</div><div class='add'>+	select SYS_HAS_EARLY_PRINTK</div><div class='add'>+	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the IMG Pistachio SoC platform.</div><div class='hunk'>@@ -395,13 +405,14 @@ config MIPS_MALTA</div><div class='ctx'> 	select ARCH_MAY_HAVE_PC_FDC</div><div class='ctx'> 	select BOOT_ELF32</div><div class='ctx'> 	select BOOT_RAW</div><div class='add'>+	select BUILTIN_DTB</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select CLKSRC_MIPS_GIC</div><div class='ctx'> 	select DMA_MAYBE_COHERENT</div><div class='ctx'> 	select GENERIC_ISA_DMA</div><div class='ctx'> 	select HAVE_PCSPKR_PLATFORM</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select MIPS_GIC</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select I8253</div><div class='hunk'>@@ -434,6 +445,8 @@ config MIPS_MALTA</div><div class='ctx'> 	select SYS_SUPPORTS_MULTITHREADING</div><div class='ctx'> 	select SYS_SUPPORTS_SMARTMIPS</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT</div><div class='add'>+	select USE_OF</div><div class='add'>+	select ZONE_DMA32 if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the MIPS Technologies Malta evaluation</div><div class='ctx'> 	  board.</div><div class='hunk'>@@ -449,7 +462,7 @@ config MIPS_SEAD3</div><div class='ctx'> 	select CPU_MIPSR2_IRQ_VI</div><div class='ctx'> 	select CPU_MIPSR2_IRQ_EI</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select MIPS_GIC</div><div class='ctx'> 	select LIBFDT</div><div class='ctx'> 	select MIPS_MSC</div><div class='hunk'>@@ -512,7 +525,7 @@ config PMC_MSP</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='ctx'> 	select SYS_SUPPORTS_MIPS16</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SERIAL_8250</div><div class='ctx'> 	select SERIAL_8250_CONSOLE</div><div class='ctx'> 	select USB_EHCI_BIG_ENDIAN_MMIO</div><div class='hunk'>@@ -529,7 +542,7 @@ config RALINK</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select BOOT_RAW</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R2</div><div class='hunk'>@@ -555,7 +568,7 @@ config SGI_IP22</div><div class='ctx'> 	select I8253</div><div class='ctx'> 	select I8259</div><div class='ctx'> 	select IP22_CPU_SCACHE</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select GENERIC_ISA_DMA_SUPPORT_BROKEN</div><div class='ctx'> 	select SGI_HAS_I8042</div><div class='ctx'> 	select SGI_HAS_INDYDOG</div><div class='hunk'>@@ -614,7 +627,7 @@ config SGI_IP28</div><div class='ctx'> 	select DEFAULT_SGI_PARTITION</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select GENERIC_ISA_DMA_SUPPORT_BROKEN</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select HW_HAS_EISA</div><div class='ctx'> 	select I8253</div><div class='ctx'> 	select I8259</div><div class='hunk'>@@ -650,7 +663,7 @@ config SGI_IP32</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select R5000_CPU_SCACHE</div><div class='ctx'> 	select RM7000_CPU_SCACHE</div><div class='ctx'> 	select SYS_HAS_CPU_R5000</div><div class='hunk'>@@ -766,7 +779,7 @@ config SNI_RM</div><div class='ctx'> 	select HAVE_PCSPKR_PLATFORM</div><div class='ctx'> 	select HW_HAS_EISA</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select I8253</div><div class='ctx'> 	select I8259</div><div class='ctx'> 	select ISA</div><div class='hunk'>@@ -799,7 +812,7 @@ config MIKROTIK_RB532</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='hunk'>@@ -819,6 +832,7 @@ config CAVIUM_OCTEON_SOC</div><div class='ctx'> 	select SYS_SUPPORTS_64BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='ctx'> 	select EDAC_SUPPORT</div><div class='add'>+	select EDAC_ATOMIC_SCRUB</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='ctx'> 	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -865,7 +879,7 @@ config NLM_XLR_BOARD</div><div class='ctx'> 	select NR_CPUS_DEFAULT_32</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ZONE_DMA32 if 64BIT</div><div class='ctx'> 	select SYNC_R4K</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -892,7 +906,7 @@ config NLM_XLP_BOARD</div><div class='ctx'> 	select NR_CPUS_DEFAULT_32</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ZONE_DMA32 if 64BIT</div><div class='ctx'> 	select SYNC_R4K</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -941,8 +955,8 @@ source "arch/mips/sibyte/Kconfig"</div><div class='ctx'> source "arch/mips/txx9/Kconfig"</div><div class='ctx'> source "arch/mips/vr41xx/Kconfig"</div><div class='ctx'> source "arch/mips/cavium-octeon/Kconfig"</div><div class='del'>-source "arch/mips/loongson/Kconfig"</div><div class='del'>-source "arch/mips/loongson1/Kconfig"</div><div class='add'>+source "arch/mips/loongson32/Kconfig"</div><div class='add'>+source "arch/mips/loongson64/Kconfig"</div><div class='ctx'> source "arch/mips/netlogic/Kconfig"</div><div class='ctx'> source "arch/mips/paravirt/Kconfig"</div><div class='ctx'> </div><div class='hunk'>@@ -1141,10 +1155,6 @@ config SYS_SUPPORTS_HUGETLBFS</div><div class='ctx'> config MIPS_HUGE_TLB_SUPPORT</div><div class='ctx'> 	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE</div><div class='ctx'> </div><div class='del'>-config IRQ_CPU</div><div class='del'>-	bool</div><div class='del'>-	select IRQ_DOMAIN</div><div class='del'>-</div><div class='ctx'> config IRQ_CPU_RM7K</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -1171,7 +1181,7 @@ config SOC_EMMA2RH</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select SYS_HAS_CPU_R5500</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -1182,7 +1192,7 @@ config SOC_PNX833X</div><div class='ctx'> 	bool</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R2</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -1417,6 +1427,7 @@ config CPU_MIPS64_R6</div><div class='ctx'> 	select CPU_SUPPORTS_HIGHMEM</div><div class='ctx'> 	select CPU_SUPPORTS_MSA</div><div class='ctx'> 	select GENERIC_CSUM</div><div class='add'>+	select MIPS_O32_FP64_SUPPORT if MIPS32_O32</div><div class='ctx'> 	help</div><div class='ctx'> 	  Choose this option to build a kernel for release 6 or later of the</div><div class='ctx'> 	  MIPS64 architecture.  New MIPS processors, starting with the Warrior</div><div class='hunk'>@@ -1568,7 +1579,8 @@ config CPU_CAVIUM_OCTEON</div><div class='ctx'> 	select WEAK_ORDERING</div><div class='ctx'> 	select CPU_SUPPORTS_HIGHMEM</div><div class='ctx'> 	select CPU_SUPPORTS_HUGEPAGES</div><div class='del'>-	select USB_EHCI_BIG_ENDIAN_MMIO</div><div class='add'>+	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN</div><div class='add'>+	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN</div><div class='ctx'> 	select MIPS_L1_CACHE_SHIFT_7</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Cavium Octeon processor is a highly integrated chip containing</div><div class='hunk'>@@ -1586,7 +1598,7 @@ config CPU_BMIPS</div><div class='ctx'> 	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000</div><div class='ctx'> 	select CPU_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select WEAK_ORDERING</div><div class='ctx'> 	select CPU_SUPPORTS_HIGHMEM</div><div class='hunk'>@@ -2220,7 +2232,7 @@ config MIPS_CMP</div><div class='ctx'> </div><div class='ctx'> config MIPS_CPS</div><div class='ctx'> 	bool "MIPS Coherent Processing System support"</div><div class='del'>-	depends on SYS_SUPPORTS_MIPS_CPS &amp;&amp; !64BIT</div><div class='add'>+	depends on SYS_SUPPORTS_MIPS_CPS</div><div class='ctx'> 	select MIPS_CM</div><div class='ctx'> 	select MIPS_CPC</div><div class='ctx'> 	select MIPS_CPS_PM if HOTPLUG_CPU</div><div class='hunk'>@@ -2251,11 +2263,6 @@ config MIPS_CM</div><div class='ctx'> config MIPS_CPC</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config SB1_PASS_1_WORKAROUNDS</div><div class='del'>-	bool</div><div class='del'>-	depends on CPU_SB1_PASS_1</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config SB1_PASS_2_WORKAROUNDS</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on CPU_SB1 &amp;&amp; (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)</div><div class='hunk'>@@ -2671,6 +2678,51 @@ config USE_OF</div><div class='ctx'> config BUILTIN_DTB</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "Kernel appended dtb support" if OF</div><div class='add'>+	default MIPS_NO_APPENDED_DTB</div><div class='add'>+</div><div class='add'>+	config MIPS_NO_APPENDED_DTB</div><div class='add'>+		bool "None"</div><div class='add'>+		help</div><div class='add'>+		  Do not enable appended dtb support.</div><div class='add'>+</div><div class='add'>+	config MIPS_RAW_APPENDED_DTB</div><div class='add'>+		bool "vmlinux.bin"</div><div class='add'>+		help</div><div class='add'>+		  With this option, the boot code will look for a device tree binary</div><div class='add'>+		  DTB) appended to raw vmlinux.bin (without decompressor).</div><div class='add'>+		  (e.g. cat vmlinux.bin &lt;filename&gt;.dtb &gt; vmlinux_w_dtb).</div><div class='add'>+</div><div class='add'>+		  This is meant as a backward compatibility convenience for those</div><div class='add'>+		  systems with a bootloader that can't be upgraded to accommodate</div><div class='add'>+		  the documented boot protocol using a device tree.</div><div class='add'>+</div><div class='add'>+		  Beware that there is very little in terms of protection against</div><div class='add'>+		  this option being confused by leftover garbage in memory that might</div><div class='add'>+		  look like a DTB header after a reboot if no actual DTB is appended</div><div class='add'>+		  to vmlinux.bin.  Do not leave this option active in a production kernel</div><div class='add'>+		  if you don't intend to always append a DTB.</div><div class='add'>+</div><div class='add'>+	config MIPS_ZBOOT_APPENDED_DTB</div><div class='add'>+		bool "vmlinuz.bin"</div><div class='add'>+		depends on SYS_SUPPORTS_ZBOOT</div><div class='add'>+		help</div><div class='add'>+		  With this option, the boot code will look for a device tree binary</div><div class='add'>+		  DTB) appended to raw vmlinuz.bin (with decompressor).</div><div class='add'>+		  (e.g. cat vmlinuz.bin &lt;filename&gt;.dtb &gt; vmlinuz_w_dtb).</div><div class='add'>+</div><div class='add'>+		  This is meant as a backward compatibility convenience for those</div><div class='add'>+		  systems with a bootloader that can't be upgraded to accommodate</div><div class='add'>+		  the documented boot protocol using a device tree.</div><div class='add'>+</div><div class='add'>+		  Beware that there is very little in terms of protection against</div><div class='add'>+		  this option being confused by leftover garbage in memory that might</div><div class='add'>+		  look like a DTB header after a reboot if no actual DTB is appended</div><div class='add'>+		  to vmlinuz.bin.  Do not leave this option active in a production kernel</div><div class='add'>+		  if you don't intend to always append a DTB.</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config LOCKDEP_SUPPORT</div><div class='head'>diff --git a/arch/mips/Makefile b/arch/mips/Makefile<br/>index ae2dd59050f7..252e347958f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/Makefile</a></div><div class='hunk'>@@ -181,13 +181,6 @@ cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)</div><div class='ctx'> cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)</div><div class='ctx'> cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS)	+= $(call cc-option,-mno-daddi,)</div><div class='ctx'> </div><div class='del'>-ifdef CONFIG_CPU_SB1</div><div class='del'>-ifdef CONFIG_SB1_PASS_1_WORKAROUNDS</div><div class='del'>-KBUILD_AFLAGS_MODULE += -msb1-pass1-workarounds</div><div class='del'>-KBUILD_CFLAGS_MODULE += -msb1-pass1-workarounds</div><div class='del'>-endif</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> # For smartmips configurations, there are hundreds of warnings due to ISA overrides</div><div class='ctx'> # in assembly and header files. smartmips is only supported for MIPS32r1 onwards</div><div class='ctx'> # and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or</div><div class='head'>diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c<br/>index 6a98d2cb402c..6e46abe0dac6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/alchemy/common/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/alchemy/common/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/alchemy/common/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/alchemy/common/clock.c</a></div><div class='hunk'>@@ -752,12 +752,12 @@ static int __init alchemy_clk_init_fgens(int ctype)</div><div class='ctx'> 	switch (ctype) {</div><div class='ctx'> 	case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200:</div><div class='ctx'> 		id.ops = &amp;alchemy_clkops_fgenv1;</div><div class='del'>-		id.parent_names = (const char **)alchemy_clk_fgv1_parents;</div><div class='add'>+		id.parent_names = alchemy_clk_fgv1_parents;</div><div class='ctx'> 		id.num_parents = 2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ALCHEMY_CPU_AU1300:</div><div class='ctx'> 		id.ops = &amp;alchemy_clkops_fgenv2;</div><div class='del'>-		id.parent_names = (const char **)alchemy_clk_fgv2_parents;</div><div class='add'>+		id.parent_names = alchemy_clk_fgv2_parents;</div><div class='ctx'> 		id.num_parents = 3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -961,7 +961,7 @@ static int __init alchemy_clk_setup_imux(int ctype)</div><div class='ctx'> 	struct clk *c;</div><div class='ctx'> </div><div class='ctx'> 	id.ops = &amp;alchemy_clkops_csrc;</div><div class='del'>-	id.parent_names = (const char **)alchemy_clk_csrc_parents;</div><div class='add'>+	id.parent_names = alchemy_clk_csrc_parents;</div><div class='ctx'> 	id.num_parents = 7;</div><div class='ctx'> 	id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c<br/>index 2befa7d766a6..ec9a371f1e62 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath25/ar2315.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath25/ar2315.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath25/ar2315.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/ar2315.c</a></div><div class='hunk'>@@ -76,7 +76,7 @@ static void ar2315_misc_irq_handler(unsigned irq, struct irq_desc *desc)</div><div class='ctx'> 	unsigned nr, misc_irq = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (pending) {</div><div class='del'>-		struct irq_domain *domain = irq_get_handler_data(irq);</div><div class='add'>+		struct irq_domain *domain = irq_desc_get_handler_data(desc);</div><div class='ctx'> </div><div class='ctx'> 		nr = __ffs(pending);</div><div class='ctx'> 		misc_irq = irq_find_mapping(domain, nr);</div><div class='hunk'>@@ -161,8 +161,8 @@ void __init ar2315_arch_init_irq(void)</div><div class='ctx'> 	irq = irq_create_mapping(domain, AR2315_MISC_IRQ_AHB);</div><div class='ctx'> 	setup_irq(irq, &amp;ar2315_ahb_err_interrupt);</div><div class='ctx'> </div><div class='del'>-	irq_set_chained_handler(AR2315_IRQ_MISC, ar2315_misc_irq_handler);</div><div class='del'>-	irq_set_handler_data(AR2315_IRQ_MISC, domain);</div><div class='add'>+	irq_set_chained_handler_and_data(AR2315_IRQ_MISC,</div><div class='add'>+					 ar2315_misc_irq_handler, domain);</div><div class='ctx'> </div><div class='ctx'> 	ar2315_misc_irq_domain = domain;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c<br/>index b6887f75144c..e63e38fa4880 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath25/ar5312.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath25/ar5312.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath25/ar5312.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/ar5312.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ static void ar5312_misc_irq_handler(unsigned irq, struct irq_desc *desc)</div><div class='ctx'> 	unsigned nr, misc_irq = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (pending) {</div><div class='del'>-		struct irq_domain *domain = irq_get_handler_data(irq);</div><div class='add'>+		struct irq_domain *domain = irq_desc_get_handler_data(desc);</div><div class='ctx'> </div><div class='ctx'> 		nr = __ffs(pending);</div><div class='ctx'> 		misc_irq = irq_find_mapping(domain, nr);</div><div class='hunk'>@@ -156,8 +156,8 @@ void __init ar5312_arch_init_irq(void)</div><div class='ctx'> 	irq = irq_create_mapping(domain, AR5312_MISC_IRQ_AHB_PROC);</div><div class='ctx'> 	setup_irq(irq, &amp;ar5312_ahb_err_interrupt);</div><div class='ctx'> </div><div class='del'>-	irq_set_chained_handler(AR5312_IRQ_MISC, ar5312_misc_irq_handler);</div><div class='del'>-	irq_set_handler_data(AR5312_IRQ_MISC, domain);</div><div class='add'>+	irq_set_chained_handler_and_data(AR5312_IRQ_MISC,</div><div class='add'>+					 ar5312_misc_irq_handler, domain);</div><div class='ctx'> </div><div class='ctx'> 	ar5312_misc_irq_domain = domain;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/ath25/board.c b/arch/mips/ath25/board.c<br/>index b8bb78282d6a..9ab48ff80c1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath25/board.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath25/board.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath25/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath25/board.c</a></div><div class='hunk'>@@ -216,7 +216,7 @@ void __init plat_time_init(void)</div><div class='ctx'> 		ar2315_plat_time_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int __cpuinit get_c0_compare_int(void)</div><div class='add'>+unsigned int get_c0_compare_int(void)</div><div class='ctx'> {</div><div class='ctx'> 	return CP0_LEGACY_COMPARE_IRQ;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig<br/>index dfc60209dc63..13c04cf54afa 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/Kconfig</a></div><div class='hunk'>@@ -71,6 +71,18 @@ config ATH79_MACH_UBNT_XM</div><div class='ctx'> 	  Say 'Y' here if you want your kernel to support the</div><div class='ctx'> 	  Ubiquiti Networks XM (rev 1.0) board.</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "Build a DTB in the kernel"</div><div class='add'>+	optional</div><div class='add'>+	help</div><div class='add'>+	  Select a devicetree that should be built into the kernel.</div><div class='add'>+</div><div class='add'>+	config DTB_TL_WR1043ND_V1</div><div class='add'>+		bool "TL-WR1043ND Version 1"</div><div class='add'>+		select BUILTIN_DTB</div><div class='add'>+		select SOC_AR913X</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config SOC_AR71XX</div><div class='head'>diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c<br/>index 26479f437675..eb5117ced95a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/clock.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -28,24 +29,27 @@</div><div class='ctx'> #define AR724X_BASE_FREQ	5000000</div><div class='ctx'> #define AR913X_BASE_FREQ	5000000</div><div class='ctx'> </div><div class='del'>-struct clk {</div><div class='del'>-	unsigned long rate;</div><div class='add'>+static struct clk *clks[3];</div><div class='add'>+static struct clk_onecell_data clk_data = {</div><div class='add'>+	.clks = clks,</div><div class='add'>+	.clk_num = ARRAY_SIZE(clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init ath79_add_sys_clkdev(const char *id, unsigned long rate)</div><div class='add'>+static struct clk *__init ath79_add_sys_clkdev(</div><div class='add'>+	const char *id, unsigned long rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	clk = kzalloc(sizeof(*clk), GFP_KERNEL);</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, id, NULL, CLK_IS_ROOT, rate);</div><div class='ctx'> 	if (!clk)</div><div class='ctx'> 		panic("failed to allocate %s clock structure", id);</div><div class='ctx'> </div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='ctx'> 	err = clk_register_clkdev(clk, id, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		panic("unable to register %s clock device", id);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init ar71xx_clocks_init(void)</div><div class='hunk'>@@ -62,7 +66,7 @@ static void __init ar71xx_clocks_init(void)</div><div class='ctx'> </div><div class='ctx'> 	pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);</div><div class='ctx'> </div><div class='del'>-	div = ((pll &gt;&gt; AR71XX_PLL_DIV_SHIFT) &amp; AR71XX_PLL_DIV_MASK) + 1;</div><div class='add'>+	div = ((pll &gt;&gt; AR71XX_PLL_FB_SHIFT) &amp; AR71XX_PLL_FB_MASK) + 1;</div><div class='ctx'> 	freq = div * ref_rate;</div><div class='ctx'> </div><div class='ctx'> 	div = ((pll &gt;&gt; AR71XX_CPU_DIV_SHIFT) &amp; AR71XX_CPU_DIV_MASK) + 1;</div><div class='hunk'>@@ -75,9 +79,9 @@ static void __init ar71xx_clocks_init(void)</div><div class='ctx'> 	ahb_rate = cpu_rate / div;</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ahb", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ahb", NULL);</div><div class='hunk'>@@ -96,7 +100,7 @@ static void __init ar724x_clocks_init(void)</div><div class='ctx'> 	ref_rate = AR724X_BASE_FREQ;</div><div class='ctx'> 	pll = ath79_pll_rr(AR724X_PLL_REG_CPU_CONFIG);</div><div class='ctx'> </div><div class='del'>-	div = ((pll &gt;&gt; AR724X_PLL_DIV_SHIFT) &amp; AR724X_PLL_DIV_MASK);</div><div class='add'>+	div = ((pll &gt;&gt; AR724X_PLL_FB_SHIFT) &amp; AR724X_PLL_FB_MASK);</div><div class='ctx'> 	freq = div * ref_rate;</div><div class='ctx'> </div><div class='ctx'> 	div = ((pll &gt;&gt; AR724X_PLL_REF_DIV_SHIFT) &amp; AR724X_PLL_REF_DIV_MASK);</div><div class='hunk'>@@ -111,9 +115,9 @@ static void __init ar724x_clocks_init(void)</div><div class='ctx'> 	ahb_rate = cpu_rate / div;</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ahb", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ahb", NULL);</div><div class='hunk'>@@ -132,7 +136,7 @@ static void __init ar913x_clocks_init(void)</div><div class='ctx'> 	ref_rate = AR913X_BASE_FREQ;</div><div class='ctx'> 	pll = ath79_pll_rr(AR913X_PLL_REG_CPU_CONFIG);</div><div class='ctx'> </div><div class='del'>-	div = ((pll &gt;&gt; AR913X_PLL_DIV_SHIFT) &amp; AR913X_PLL_DIV_MASK);</div><div class='add'>+	div = ((pll &gt;&gt; AR913X_PLL_FB_SHIFT) &amp; AR913X_PLL_FB_MASK);</div><div class='ctx'> 	freq = div * ref_rate;</div><div class='ctx'> </div><div class='ctx'> 	cpu_rate = freq;</div><div class='hunk'>@@ -144,9 +148,9 @@ static void __init ar913x_clocks_init(void)</div><div class='ctx'> 	ahb_rate = cpu_rate / div;</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ahb", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ahb", NULL);</div><div class='hunk'>@@ -206,9 +210,9 @@ static void __init ar933x_clocks_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ahb", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ref", NULL);</div><div class='hunk'>@@ -340,9 +344,9 @@ static void __init ar934x_clocks_init(void)</div><div class='ctx'> 		ahb_rate = cpu_pll / (postdiv + 1);</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ref", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ref", NULL);</div><div class='hunk'>@@ -427,9 +431,9 @@ static void __init qca955x_clocks_init(void)</div><div class='ctx'> 		ahb_rate = cpu_pll / (postdiv + 1);</div><div class='ctx'> </div><div class='ctx'> 	ath79_add_sys_clkdev("ref", ref_rate);</div><div class='del'>-	ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='del'>-	ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='add'>+	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);</div><div class='add'>+	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);</div><div class='add'>+	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);</div><div class='ctx'> </div><div class='ctx'> 	clk_add_alias("wdt", NULL, "ref", NULL);</div><div class='ctx'> 	clk_add_alias("uart", NULL, "ref", NULL);</div><div class='hunk'>@@ -451,6 +455,8 @@ void __init ath79_clocks_init(void)</div><div class='ctx'> 		qca955x_clocks_init();</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='add'>+</div><div class='add'>+	of_clk_init(NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned long __init</div><div class='hunk'>@@ -469,22 +475,16 @@ ath79_get_sys_clk_rate(const char *id)</div><div class='ctx'> 	return rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Linux clock API</div><div class='del'>- */</div><div class='del'>-int clk_enable(struct clk *clk)</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static void __init ath79_clocks_init_dt(struct device_node *np)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	of_clk_add_provider(np, of_clk_src_onecell_get, &amp;clk_data);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(clk_enable);</div><div class='ctx'> </div><div class='del'>-void clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_disable);</div><div class='del'>-</div><div class='del'>-unsigned long clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;rate;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get_rate);</div><div class='add'>+CLK_OF_DECLARE(ar7100, "qca,ar7100-pll", ath79_clocks_init_dt);</div><div class='add'>+CLK_OF_DECLARE(ar7240, "qca,ar7240-pll", ath79_clocks_init_dt);</div><div class='add'>+CLK_OF_DECLARE(ar9130, "qca,ar9130-pll", ath79_clocks_init_dt);</div><div class='add'>+CLK_OF_DECLARE(ar9330, "qca,ar9330-pll", ath79_clocks_init_dt);</div><div class='add'>+CLK_OF_DECLARE(ar9340, "qca,ar9340-pll", ath79_clocks_init_dt);</div><div class='add'>+CLK_OF_DECLARE(ar9550, "qca,qca9550-pll", ath79_clocks_init_dt);</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c<br/>index eb3966cd8cfc..3cedd1f95e0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/common.c</a></div><div class='hunk'>@@ -38,11 +38,27 @@ unsigned int ath79_soc_rev;</div><div class='ctx'> void __iomem *ath79_pll_base;</div><div class='ctx'> void __iomem *ath79_reset_base;</div><div class='ctx'> EXPORT_SYMBOL_GPL(ath79_reset_base);</div><div class='del'>-void __iomem *ath79_ddr_base;</div><div class='add'>+static void __iomem *ath79_ddr_base;</div><div class='add'>+static void __iomem *ath79_ddr_wb_flush_base;</div><div class='add'>+static void __iomem *ath79_ddr_pci_win_base;</div><div class='add'>+</div><div class='add'>+void ath79_ddr_ctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,</div><div class='add'>+					 AR71XX_DDR_CTRL_SIZE);</div><div class='add'>+	if (soc_is_ar71xx() || soc_is_ar934x()) {</div><div class='add'>+		ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c;</div><div class='add'>+		ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c;</div><div class='add'>+	} else {</div><div class='add'>+		ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c;</div><div class='add'>+		ath79_ddr_pci_win_base = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init);</div><div class='ctx'> </div><div class='ctx'> void ath79_ddr_wb_flush(u32 reg)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *flush_reg = ath79_ddr_base + reg;</div><div class='add'>+	void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the DDR write buffer. */</div><div class='ctx'> 	__raw_writel(0x1, flush_reg);</div><div class='hunk'>@@ -56,6 +72,21 @@ void ath79_ddr_wb_flush(u32 reg)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ath79_ddr_wb_flush);</div><div class='ctx'> </div><div class='add'>+void ath79_ddr_set_pci_windows(void)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(!ath79_ddr_pci_win_base);</div><div class='add'>+</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 1);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 2);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 3);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 4);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 5);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 6);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 7);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ath79_ddr_set_pci_windows);</div><div class='add'>+</div><div class='ctx'> void ath79_device_reset_set(u32 mask)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='head'>diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h<br/>index c39de61f9b36..e5ea71277f0c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/common.h</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> void ath79_clocks_init(void);</div><div class='ctx'> unsigned long ath79_get_sys_clk_rate(const char *id);</div><div class='ctx'> </div><div class='add'>+void ath79_ddr_ctrl_init(void);</div><div class='ctx'> void ath79_ddr_wb_flush(unsigned int reg);</div><div class='ctx'> </div><div class='ctx'> void ath79_gpio_function_enable(u32 mask);</div><div class='head'>diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c<br/>index 516225d207ee..9d0172a4dc69 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/dev-common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/dev-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/dev-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/dev-common.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/gpio-ath79.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -106,3 +107,53 @@ void __init ath79_register_wdt(void)</div><div class='ctx'> </div><div class='ctx'> 	platform_device_register_simple("ath79-wdt", -1, &amp;res, 1);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct ath79_gpio_platform_data ath79_gpio_pdata;</div><div class='add'>+</div><div class='add'>+static struct resource ath79_gpio_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+		.start = AR71XX_GPIO_BASE,</div><div class='add'>+		.end = AR71XX_GPIO_BASE + AR71XX_GPIO_SIZE - 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start	= ATH79_MISC_IRQ(2),</div><div class='add'>+		.end	= ATH79_MISC_IRQ(2),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device ath79_gpio_device = {</div><div class='add'>+	.name		= "ath79-gpio",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.resource	= ath79_gpio_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(ath79_gpio_resources),</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;ath79_gpio_pdata</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init ath79_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	if (soc_is_ar71xx()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR71XX_GPIO_COUNT;</div><div class='add'>+	} else if (soc_is_ar7240()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR7240_GPIO_COUNT;</div><div class='add'>+	} else if (soc_is_ar7241() || soc_is_ar7242()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR7241_GPIO_COUNT;</div><div class='add'>+	} else if (soc_is_ar913x()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR913X_GPIO_COUNT;</div><div class='add'>+	} else if (soc_is_ar933x()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR933X_GPIO_COUNT;</div><div class='add'>+	} else if (soc_is_ar934x()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = AR934X_GPIO_COUNT;</div><div class='add'>+		ath79_gpio_pdata.oe_inverted = 1;</div><div class='add'>+	} else if (soc_is_qca955x()) {</div><div class='add'>+		ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT;</div><div class='add'>+		ath79_gpio_pdata.oe_inverted = 1;</div><div class='add'>+	} else {</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_device_register(&amp;ath79_gpio_device);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c<br/>index 8d025b028bb1..f59ccb26520a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/gpio.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/gpio.c</a></div><div class='hunk'>@@ -20,13 +20,15 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/gpio-ath79.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='ctx'> #include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='ctx'> static void __iomem *ath79_gpio_base;</div><div class='del'>-static unsigned long ath79_gpio_count;</div><div class='add'>+static u32 ath79_gpio_count;</div><div class='ctx'> static DEFINE_SPINLOCK(ath79_gpio_lock);</div><div class='ctx'> </div><div class='ctx'> static void __ath79_gpio_set_value(unsigned gpio, int value)</div><div class='hunk'>@@ -178,39 +180,72 @@ void ath79_gpio_function_disable(u32 mask)</div><div class='ctx'> 	ath79_gpio_function_setup(0, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init ath79_gpio_init(void)</div><div class='add'>+static const struct of_device_id ath79_gpio_of_match[] = {</div><div class='add'>+	{ .compatible = "qca,ar7100-gpio" },</div><div class='add'>+	{ .compatible = "qca,ar9340-gpio" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ath79_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct ath79_gpio_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	bool oe_inverted;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (soc_is_ar71xx())</div><div class='del'>-		ath79_gpio_count = AR71XX_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_ar7240())</div><div class='del'>-		ath79_gpio_count = AR7240_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_ar7241() || soc_is_ar7242())</div><div class='del'>-		ath79_gpio_count = AR7241_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_ar913x())</div><div class='del'>-		ath79_gpio_count = AR913X_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_ar933x())</div><div class='del'>-		ath79_gpio_count = AR933X_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_ar934x())</div><div class='del'>-		ath79_gpio_count = AR934X_GPIO_COUNT;</div><div class='del'>-	else if (soc_is_qca955x())</div><div class='del'>-		ath79_gpio_count = QCA955X_GPIO_COUNT;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='add'>+	if (np) {</div><div class='add'>+		err = of_property_read_u32(np, "ngpios", &amp;ath79_gpio_count);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "ngpios property is not valid\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		if (ath79_gpio_count &gt;= 32) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "ngpios must be less than 32\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio");</div><div class='add'>+	} else if (pdata) {</div><div class='add'>+		ath79_gpio_count = pdata-&gt;ngpios;</div><div class='add'>+		oe_inverted = pdata-&gt;oe_inverted;</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No DT node or platform data found\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	ath79_gpio_base = devm_ioremap_nocache(</div><div class='add'>+		&amp;pdev-&gt;dev, res-&gt;start, resource_size(res));</div><div class='add'>+	if (!ath79_gpio_base)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);</div><div class='add'>+	ath79_gpio_chip.dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	ath79_gpio_chip.ngpio = ath79_gpio_count;</div><div class='del'>-	if (soc_is_ar934x() || soc_is_qca955x()) {</div><div class='add'>+	if (oe_inverted) {</div><div class='ctx'> 		ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;</div><div class='ctx'> 		ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = gpiochip_add(&amp;ath79_gpio_chip);</div><div class='del'>-	if (err)</div><div class='del'>-		panic("cannot add AR71xx GPIO chip, error=%d", err);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"cannot add AR71xx GPIO chip, error=%d", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct platform_driver ath79_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "ath79-gpio",</div><div class='add'>+		.of_match_table	= ath79_gpio_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = ath79_gpio_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(ath79_gpio_driver);</div><div class='add'>+</div><div class='ctx'> int gpio_get_value(unsigned gpio)</div><div class='ctx'> {</div><div class='ctx'> 	if (gpio &lt; ath79_gpio_count)</div><div class='head'>diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c<br/>index 6adae366f11a..afb009603f7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/irq.c</a></div><div class='hunk'>@@ -15,7 +15,9 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include "../../../drivers/irqchip/irqchip.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq_cpu.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='hunk'>@@ -23,9 +25,7 @@</div><div class='ctx'> #include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='ctx'> #include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='del'>-</div><div class='del'>-static void (*ath79_ip2_handler)(void);</div><div class='del'>-static void (*ath79_ip3_handler)(void);</div><div class='add'>+#include "machtypes.h"</div><div class='ctx'> </div><div class='ctx'> static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -129,10 +129,10 @@ static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; AR934X_PCIE_WMAC_INT_PCIE_ALL) {</div><div class='del'>-		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE);</div><div class='add'>+		ath79_ddr_wb_flush(3);</div><div class='ctx'> 		generic_handle_irq(ATH79_IP2_IRQ(0));</div><div class='ctx'> 	} else if (status &amp; AR934X_PCIE_WMAC_INT_WMAC_ALL) {</div><div class='del'>-		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC);</div><div class='add'>+		ath79_ddr_wb_flush(4);</div><div class='ctx'> 		generic_handle_irq(ATH79_IP2_IRQ(1));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		spurious_interrupt();</div><div class='hunk'>@@ -235,128 +235,132 @@ static void qca955x_irq_init(void)</div><div class='ctx'> 	irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage void plat_irq_dispatch(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long pending;</div><div class='del'>-</div><div class='del'>-	pending = read_c0_status() &amp; read_c0_cause() &amp; ST0_IM;</div><div class='del'>-</div><div class='del'>-	if (pending &amp; STATUSF_IP7)</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ(7));</div><div class='del'>-</div><div class='del'>-	else if (pending &amp; STATUSF_IP2)</div><div class='del'>-		ath79_ip2_handler();</div><div class='del'>-</div><div class='del'>-	else if (pending &amp; STATUSF_IP4)</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ(4));</div><div class='del'>-</div><div class='del'>-	else if (pending &amp; STATUSF_IP5)</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ(5));</div><div class='del'>-</div><div class='del'>-	else if (pending &amp; STATUSF_IP3)</div><div class='del'>-		ath79_ip3_handler();</div><div class='del'>-</div><div class='del'>-	else if (pending &amp; STATUSF_IP6)</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ(6));</div><div class='del'>-</div><div class='del'>-	else</div><div class='del'>-		spurious_interrupt();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for</div><div class='ctx'>  * these devices typically allocate coherent DMA memory, however the</div><div class='ctx'>  * DMA controller may still have some unsynchronized data in the FIFO.</div><div class='ctx'>  * Issue a flush in the handlers to ensure that the driver sees</div><div class='ctx'>  * the update.</div><div class='add'>+ *</div><div class='add'>+ * This array map the interrupt lines to the DDR write buffer channels.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void ath79_default_ip2_handler(void)</div><div class='del'>-{</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(2));</div><div class='del'>-}</div><div class='add'>+static unsigned irq_wb_chan[8] = {</div><div class='add'>+	-1, -1, -1, -1, -1, -1, -1, -1,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void ath79_default_ip3_handler(void)</div><div class='add'>+asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> {</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='del'>-}</div><div class='add'>+	unsigned long pending;</div><div class='add'>+	int irq;</div><div class='ctx'> </div><div class='del'>-static void ar71xx_ip2_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(2));</div><div class='del'>-}</div><div class='add'>+	pending = read_c0_status() &amp; read_c0_cause() &amp; ST0_IM;</div><div class='ctx'> </div><div class='del'>-static void ar724x_ip2_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(2));</div><div class='del'>-}</div><div class='add'>+	if (!pending) {</div><div class='add'>+		spurious_interrupt();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static void ar913x_ip2_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(2));</div><div class='add'>+	pending &gt;&gt;= CAUSEB_IP;</div><div class='add'>+	while (pending) {</div><div class='add'>+		irq = fls(pending) - 1;</div><div class='add'>+		if (irq &lt; ARRAY_SIZE(irq_wb_chan) &amp;&amp; irq_wb_chan[irq] != -1)</div><div class='add'>+			ath79_ddr_wb_flush(irq_wb_chan[irq]);</div><div class='add'>+		do_IRQ(MIPS_CPU_IRQ_BASE + irq);</div><div class='add'>+		pending &amp;= ~BIT(irq);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ar933x_ip2_handler(void)</div><div class='add'>+#ifdef CONFIG_IRQCHIP</div><div class='add'>+static int misc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)</div><div class='ctx'> {</div><div class='del'>-	ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(2));</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;ath79_misc_irq_chip, handle_level_irq);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ar71xx_ip3_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='del'>-}</div><div class='add'>+static const struct irq_domain_ops misc_irq_domain_ops = {</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+	.map = misc_map,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void ar724x_ip3_handler(void)</div><div class='add'>+static int __init ath79_misc_intc_of_init(</div><div class='add'>+	struct device_node *node, struct device_node *parent)</div><div class='ctx'> {</div><div class='del'>-	ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='del'>-}</div><div class='add'>+	void __iomem *base = ath79_reset_base;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	int irq;</div><div class='ctx'> </div><div class='del'>-static void ar913x_ip3_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='del'>-}</div><div class='add'>+	irq = irq_of_parse_and_map(node, 0);</div><div class='add'>+	if (!irq)</div><div class='add'>+		panic("Failed to get MISC IRQ");</div><div class='ctx'> </div><div class='del'>-static void ar933x_ip3_handler(void)</div><div class='del'>-{</div><div class='del'>-	ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='add'>+	domain = irq_domain_add_legacy(node, ATH79_MISC_IRQ_COUNT,</div><div class='add'>+			ATH79_MISC_IRQ_BASE, 0, &amp;misc_irq_domain_ops, NULL);</div><div class='add'>+	if (!domain)</div><div class='add'>+		panic("Failed to add MISC irqdomain");</div><div class='add'>+</div><div class='add'>+	/* Disable and clear all interrupts */</div><div class='add'>+	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);</div><div class='add'>+	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	irq_set_chained_handler(irq, ath79_misc_irq_handler);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+IRQCHIP_DECLARE(ath79_misc_intc, "qca,ar7100-misc-intc",</div><div class='add'>+		ath79_misc_intc_of_init);</div><div class='ctx'> </div><div class='del'>-static void ar934x_ip3_handler(void)</div><div class='add'>+static int __init ar79_cpu_intc_of_init(</div><div class='add'>+	struct device_node *node, struct device_node *parent)</div><div class='ctx'> {</div><div class='del'>-	ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB);</div><div class='del'>-	do_IRQ(ATH79_CPU_IRQ(3));</div><div class='add'>+	int err, i, count;</div><div class='add'>+</div><div class='add'>+	/* Fill the irq_wb_chan table */</div><div class='add'>+	count = of_count_phandle_with_args(</div><div class='add'>+		node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		struct of_phandle_args args;</div><div class='add'>+		u32 irq = i;</div><div class='add'>+</div><div class='add'>+		of_property_read_u32_index(</div><div class='add'>+			node, "qca,ddr-wb-channel-interrupts", i, &amp;irq);</div><div class='add'>+		if (irq &gt;= ARRAY_SIZE(irq_wb_chan))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = of_parse_phandle_with_args(</div><div class='add'>+			node, "qca,ddr-wb-channels",</div><div class='add'>+			"#qca,ddr-wb-channel-cells",</div><div class='add'>+			i, &amp;args);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		irq_wb_chan[irq] = args.args[0];</div><div class='add'>+		pr_info("IRQ: Set flush channel of IRQ%d to %d\n",</div><div class='add'>+			irq, args.args[0]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mips_cpu_irq_of_init(node, parent);</div><div class='ctx'> }</div><div class='add'>+IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc",</div><div class='add'>+		ar79_cpu_intc_of_init);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void __init arch_init_irq(void)</div><div class='ctx'> {</div><div class='del'>-	if (soc_is_ar71xx()) {</div><div class='del'>-		ath79_ip2_handler = ar71xx_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ar71xx_ip3_handler;</div><div class='del'>-	} else if (soc_is_ar724x()) {</div><div class='del'>-		ath79_ip2_handler = ar724x_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ar724x_ip3_handler;</div><div class='del'>-	} else if (soc_is_ar913x()) {</div><div class='del'>-		ath79_ip2_handler = ar913x_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ar913x_ip3_handler;</div><div class='del'>-	} else if (soc_is_ar933x()) {</div><div class='del'>-		ath79_ip2_handler = ar933x_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ar933x_ip3_handler;</div><div class='add'>+	if (mips_machtype == ATH79_MACH_GENERIC_OF) {</div><div class='add'>+		irqchip_init();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (soc_is_ar71xx() || soc_is_ar724x() ||</div><div class='add'>+	    soc_is_ar913x() || soc_is_ar933x()) {</div><div class='add'>+		irq_wb_chan[2] = 3;</div><div class='add'>+		irq_wb_chan[3] = 2;</div><div class='ctx'> 	} else if (soc_is_ar934x()) {</div><div class='del'>-		ath79_ip2_handler = ath79_default_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ar934x_ip3_handler;</div><div class='del'>-	} else if (soc_is_qca955x()) {</div><div class='del'>-		ath79_ip2_handler = ath79_default_ip2_handler;</div><div class='del'>-		ath79_ip3_handler = ath79_default_ip3_handler;</div><div class='del'>-	} else {</div><div class='del'>-		BUG();</div><div class='add'>+		irq_wb_chan[3] = 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mips_cpu_irq_init();</div><div class='head'>diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h<br/>index 26254058c545..a13db3d15c8f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/machtypes.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/machtypes.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/machtypes.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/machtypes.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/mips_machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum ath79_mach_type {</div><div class='add'>+	ATH79_MACH_GENERIC_OF = -1,	/* Device tree board */</div><div class='ctx'> 	ATH79_MACH_GENERIC = 0,</div><div class='ctx'> 	ATH79_MACH_AP121,		/* Atheros AP121 reference board */</div><div class='ctx'> 	ATH79_MACH_AP136_010,		/* Atheros AP136-010 reference board */</div><div class='head'>diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c<br/>index 7fc8397d16f2..01a644f174dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ath79/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ath79/setup.c</a></div><div class='hunk'>@@ -17,12 +17,16 @@</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;		/* for mips_hpt_frequency */</div><div class='ctx'> #include &lt;asm/reboot.h&gt;		/* for _machine_{restart,halt} */</div><div class='ctx'> #include &lt;asm/mips_machine.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/fw/fw.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='ctx'> #include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='hunk'>@@ -194,17 +198,28 @@ unsigned int get_c0_compare_int(void)</div><div class='ctx'> </div><div class='ctx'> void __init plat_mem_setup(void)</div><div class='ctx'> {</div><div class='add'>+	unsigned long fdt_start;</div><div class='add'>+</div><div class='ctx'> 	set_io_port_base(KSEG1);</div><div class='ctx'> </div><div class='add'>+	/* Get the position of the FDT passed by the bootloader */</div><div class='add'>+	fdt_start = fw_getenvl("fdt_start");</div><div class='add'>+	if (fdt_start)</div><div class='add'>+		__dt_setup_arch((void *)KSEG0ADDR(fdt_start));</div><div class='add'>+#ifdef CONFIG_BUILTIN_DTB</div><div class='add'>+	else</div><div class='add'>+		__dt_setup_arch(__dtb_start);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,</div><div class='ctx'> 					   AR71XX_RESET_SIZE);</div><div class='ctx'> 	ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,</div><div class='ctx'> 					 AR71XX_PLL_SIZE);</div><div class='del'>-	ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,</div><div class='del'>-					 AR71XX_DDR_CTRL_SIZE);</div><div class='add'>+	ath79_ddr_ctrl_init();</div><div class='ctx'> </div><div class='ctx'> 	ath79_detect_sys_type();</div><div class='del'>-	detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);</div><div class='add'>+	if (mips_machtype != ATH79_MACH_GENERIC_OF)</div><div class='add'>+		detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);</div><div class='ctx'> </div><div class='ctx'> 	_machine_restart = ath79_restart;</div><div class='ctx'> 	_machine_halt = ath79_halt;</div><div class='hunk'>@@ -236,6 +251,10 @@ void __init plat_time_init(void)</div><div class='ctx'> </div><div class='ctx'> static int __init ath79_setup(void)</div><div class='ctx'> {</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='add'>+	if  (mips_machtype == ATH79_MACH_GENERIC_OF)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	ath79_gpio_init();</div><div class='ctx'> 	ath79_register_uart();</div><div class='ctx'> 	ath79_register_wdt();</div><div class='hunk'>@@ -247,6 +266,11 @@ static int __init ath79_setup(void)</div><div class='ctx'> </div><div class='ctx'> arch_initcall(ath79_setup);</div><div class='ctx'> </div><div class='add'>+void __init device_tree_init(void)</div><div class='add'>+{</div><div class='add'>+	unflatten_and_copy_device_tree();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init ath79_generic_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Nothing to do */</div><div class='head'>diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig<br/>index fc21d3659fa0..51ed599cc894 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/Kconfig</a></div><div class='hunk'>@@ -25,7 +25,6 @@ config BCM47XX_BCMA</div><div class='ctx'> 	select BCMA</div><div class='ctx'> 	select BCMA_HOST_SOC</div><div class='ctx'> 	select BCMA_DRIVER_MIPS</div><div class='del'>-	select BCMA_HOST_PCI if PCI</div><div class='ctx'> 	select BCMA_DRIVER_PCI_HOSTMODE if PCI</div><div class='ctx'> 	select BCMA_DRIVER_GPIO</div><div class='ctx'> 	default y</div><div class='head'>diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile<br/>index d58c51b5e501..66bea4ecf449 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/Makefile</a></div><div class='hunk'>@@ -3,5 +3,5 @@</div><div class='ctx'> # under Linux.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-y				+= irq.o nvram.o prom.o serial.o setup.o time.o sprom.o</div><div class='add'>+obj-y				+= irq.o prom.o serial.o setup.o time.o sprom.o</div><div class='ctx'> obj-y				+= board.o buttons.o leds.o workarounds.o</div><div class='head'>diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c<br/>index bd56415f2f3b..a88975a55c4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/board.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/board.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/board.c</a></div><div class='hunk'>@@ -149,6 +149,7 @@ struct bcm47xx_board_type_list2 bcm47xx_board_list_boot_hw[] __initconst = {</div><div class='ctx'> /* board_id */</div><div class='ctx'> static const</div><div class='ctx'> struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = {</div><div class='add'>+	{{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"},</div><div class='ctx'> 	{{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"},</div><div class='ctx'> 	{{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"},</div><div class='ctx'> 	{{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"},</div><div class='head'>diff --git a/arch/mips/bcm47xx/buttons.c b/arch/mips/bcm47xx/buttons.c<br/>index 276276a8c6d7..08a4abf09a33 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/buttons.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/buttons.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/buttons.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/buttons.c</a></div><div class='hunk'>@@ -299,6 +299,13 @@ bcm47xx_buttons_linksys_wrtsl54gs[] __initconst = {</div><div class='ctx'> 	BCM47XX_GPIO_KEY(6, KEY_RESTART),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Luxul */</div><div class='add'>+</div><div class='add'>+static const struct gpio_keys_button</div><div class='add'>+bcm47xx_buttons_luxul_xwr_1750_v1[] = {</div><div class='add'>+	BCM47XX_GPIO_KEY(14, BTN_TASK),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Microsoft */</div><div class='ctx'> </div><div class='ctx'> static const struct gpio_keys_button</div><div class='hunk'>@@ -555,6 +562,10 @@ int __init bcm47xx_buttons_register(void)</div><div class='ctx'> 		err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrtsl54gs);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case BCM47XX_BOARD_LUXUL_XWR_1750_V1:</div><div class='add'>+		err = bcm47xx_copy_bdata(bcm47xx_buttons_luxul_xwr_1750_v1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case BCM47XX_BOARD_MICROSOFT_MN700:</div><div class='ctx'> 		err = bcm47xx_copy_bdata(bcm47xx_buttons_microsoft_nm700);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c<br/>index 0e4ade342333..d20ae63eb3c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/leds.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/leds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/leds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/leds.c</a></div><div class='hunk'>@@ -370,6 +370,16 @@ bcm47xx_leds_linksys_wrtsl54gs[] __initconst = {</div><div class='ctx'> 	BCM47XX_GPIO_LED(7, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Luxul */</div><div class='add'>+</div><div class='add'>+static const struct gpio_led</div><div class='add'>+bcm47xx_leds_luxul_xwr_1750_v1[] __initconst = {</div><div class='add'>+	BCM47XX_GPIO_LED(5, "green", "5ghz", 0, LEDS_GPIO_DEFSTATE_OFF),</div><div class='add'>+	BCM47XX_GPIO_LED(12, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF),</div><div class='add'>+	BCM47XX_GPIO_LED_TRIGGER(13, "green", "status", 0, "timer"),</div><div class='add'>+	BCM47XX_GPIO_LED(15, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Microsoft */</div><div class='ctx'> </div><div class='ctx'> static const struct gpio_led</div><div class='hunk'>@@ -623,6 +633,10 @@ void __init bcm47xx_leds_register(void)</div><div class='ctx'> 		bcm47xx_set_pdata(bcm47xx_leds_linksys_wrtsl54gs);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case BCM47XX_BOARD_LUXUL_XWR_1750_V1:</div><div class='add'>+		bcm47xx_set_pdata(bcm47xx_leds_luxul_xwr_1750_v1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case BCM47XX_BOARD_MICROSOFT_MN700:</div><div class='ctx'> 		bcm47xx_set_pdata(bcm47xx_leds_microsoft_nm700);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c<br/>index ab698bad6d62..135a5407f015 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/prom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/prom.c</a></div><div class='hunk'>@@ -126,7 +126,7 @@ void __init prom_free_prom_memory(void)</div><div class='ctx'> /* Stripped version of tlb_init, with the call to build_tlb_refill_handler</div><div class='ctx'>  * dropped. Calling it at this stage causes a hang.</div><div class='ctx'>  */</div><div class='del'>-void __cpuinit early_tlb_init(void)</div><div class='add'>+void early_tlb_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	write_c0_pagemask(PM_DEFAULT_MASK);</div><div class='ctx'> 	write_c0_wired(0);</div><div class='head'>diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c<br/>index 82ff9fd2ab6e..98c075f81795 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/setup.c</a></div><div class='hunk'>@@ -206,9 +206,6 @@ void __init bcm47xx_bus_setup(void)</div><div class='ctx'> 		err = bcma_host_soc_init(&amp;bcm47xx_bus.bcma);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			panic("Failed to initialize BCMA bus (err %d)", err);</div><div class='del'>-</div><div class='del'>-		bcm47xx_fill_bcma_boardinfo(&amp;bcm47xx_bus.bcma.bus.boardinfo,</div><div class='del'>-					    NULL);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bcm47xx/sprom.c b/arch/mips/bcm47xx/sprom.c<br/>index 68ebf2322f8b..2d5c7a7f24bb 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/sprom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bcm47xx/sprom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/sprom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bcm47xx/sprom.c</a></div><div class='hunk'>@@ -200,7 +200,13 @@ static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,</div><div class='ctx'> 	const char *pre = prefix;</div><div class='ctx'> 	bool fb = fallback;</div><div class='ctx'> </div><div class='add'>+	/* Broadcom extracts it for rev 8+ but it was found on 2 and 4 too */</div><div class='add'>+	ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);</div><div class='add'>+</div><div class='ctx'> 	ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);</div><div class='add'>+	ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);</div><div class='add'>+	ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);</div><div class='add'>+	ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);</div><div class='ctx'> 	ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);</div><div class='ctx'> 	ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);</div><div class='ctx'> 	ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);</div><div class='hunk'>@@ -409,27 +415,6 @@ static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,</div><div class='ctx'> }</div><div class='ctx'> #undef ENTRY /* It's specififc, uses local variable, don't use it (again). */</div><div class='ctx'> </div><div class='del'>-static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,</div><div class='del'>-					const char *prefix, bool fallback)</div><div class='del'>-{</div><div class='del'>-	nvram_read_u16(prefix, NULL, "devid", &amp;sprom-&gt;dev_id, 0, fallback);</div><div class='del'>-	nvram_read_alpha2(prefix, "ccode", sprom-&gt;alpha2, fallback);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix,</div><div class='del'>-				  bool fallback)</div><div class='del'>-{</div><div class='del'>-	nvram_read_leddc(prefix, "leddc", &amp;sprom-&gt;leddc_on_time,</div><div class='del'>-			 &amp;sprom-&gt;leddc_off_time, fallback);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,</div><div class='del'>-				     const char *prefix, bool fallback)</div><div class='del'>-{</div><div class='del'>-	nvram_read_leddc(prefix, "leddc", &amp;sprom-&gt;leddc_on_time,</div><div class='del'>-			 &amp;sprom-&gt;leddc_off_time, fallback);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,</div><div class='ctx'> 					  const char *prefix, bool fallback)</div><div class='ctx'> {</div><div class='hunk'>@@ -528,6 +513,8 @@ static int mac_addr_used = 2;</div><div class='ctx'> static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,</div><div class='ctx'> 					const char *prefix, bool fallback)</div><div class='ctx'> {</div><div class='add'>+	bool fb = fallback;</div><div class='add'>+</div><div class='ctx'> 	nvram_read_macaddr(prefix, "et0macaddr", sprom-&gt;et0mac, fallback);</div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "et0mdcport", &amp;sprom-&gt;et0mdcport, 0,</div><div class='ctx'> 		      fallback);</div><div class='hunk'>@@ -540,6 +527,10 @@ static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,</div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "et1phyaddr", &amp;sprom-&gt;et1phyaddr, 0,</div><div class='ctx'> 		      fallback);</div><div class='ctx'> </div><div class='add'>+	nvram_read_macaddr(prefix, "et2macaddr", sprom-&gt;et2mac, fb);</div><div class='add'>+	nvram_read_u8(prefix, NULL, "et2mdcport", &amp;sprom-&gt;et2mdcport, 0, fb);</div><div class='add'>+	nvram_read_u8(prefix, NULL, "et2phyaddr", &amp;sprom-&gt;et2phyaddr, 0, fb);</div><div class='add'>+</div><div class='ctx'> 	nvram_read_macaddr(prefix, "macaddr", sprom-&gt;il0mac, fallback);</div><div class='ctx'> 	nvram_read_macaddr(prefix, "il0macaddr", sprom-&gt;il0mac, fallback);</div><div class='ctx'> </div><div class='hunk'>@@ -580,39 +571,22 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,</div><div class='ctx'> </div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "sromrev", &amp;sprom-&gt;revision, 0, fallback);</div><div class='ctx'> </div><div class='add'>+	/* Entries requiring custom functions */</div><div class='add'>+	nvram_read_alpha2(prefix, "ccode", sprom-&gt;alpha2, fallback);</div><div class='add'>+	if (sprom-&gt;revision &gt;= 3)</div><div class='add'>+		nvram_read_leddc(prefix, "leddc", &amp;sprom-&gt;leddc_on_time,</div><div class='add'>+				 &amp;sprom-&gt;leddc_off_time, fallback);</div><div class='add'>+</div><div class='ctx'> 	switch (sprom-&gt;revision) {</div><div class='del'>-	case 1:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		bcm47xx_fill_sprom_r3(sprom, prefix, fallback);</div><div class='del'>-		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 	case 5:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);</div><div class='ctx'> 		bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);</div><div class='ctx'> 		bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 8:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);</div><div class='del'>-		bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);</div><div class='del'>-		break;</div><div class='ctx'> 	case 9:</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='del'>-		bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);</div><div class='ctx'> 		bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);</div><div class='ctx'> 		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",</div><div class='del'>-			sprom-&gt;revision);</div><div class='del'>-		sprom-&gt;revision = 1;</div><div class='del'>-		bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bcm47xx_sprom_fill_auto(sprom, prefix, fallback);</div><div class='hunk'>@@ -631,19 +605,6 @@ void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BCM47XX_BCMA</div><div class='del'>-void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,</div><div class='del'>-				 const char *prefix)</div><div class='del'>-{</div><div class='del'>-	nvram_read_u16(prefix, NULL, "boardvendor", &amp;boardinfo-&gt;vendor, 0,</div><div class='del'>-		       true);</div><div class='del'>-	if (!boardinfo-&gt;vendor)</div><div class='del'>-		boardinfo-&gt;vendor = SSB_BOARDVENDOR_BCM;</div><div class='del'>-</div><div class='del'>-	nvram_read_u16(prefix, NULL, "boardtype", &amp;boardinfo-&gt;type, 0, true);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_BCM47XX_SSB)</div><div class='ctx'> static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)</div><div class='ctx'> {</div><div class='hunk'>@@ -698,33 +659,46 @@ static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)</div><div class='ctx'> </div><div class='ctx'> static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)</div><div class='ctx'> {</div><div class='del'>-	char prefix[10];</div><div class='add'>+	struct bcma_boardinfo *binfo = &amp;bus-&gt;boardinfo;</div><div class='ctx'> 	struct bcma_device *core;</div><div class='add'>+	char buf[10];</div><div class='add'>+	char *prefix;</div><div class='add'>+	bool fallback = false;</div><div class='ctx'> </div><div class='ctx'> 	switch (bus-&gt;hosttype) {</div><div class='ctx'> 	case BCMA_HOSTTYPE_PCI:</div><div class='ctx'> 		memset(out, 0, sizeof(struct ssb_sprom));</div><div class='del'>-		snprintf(prefix, sizeof(prefix), "pci/%u/%u/",</div><div class='add'>+		snprintf(buf, sizeof(buf), "pci/%u/%u/",</div><div class='ctx'> 			 bus-&gt;host_pci-&gt;bus-&gt;number + 1,</div><div class='ctx'> 			 PCI_SLOT(bus-&gt;host_pci-&gt;devfn));</div><div class='del'>-		bcm47xx_sprom_apply_prefix_alias(prefix, sizeof(prefix));</div><div class='del'>-		bcm47xx_fill_sprom(out, prefix, false);</div><div class='del'>-		return 0;</div><div class='add'>+		bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));</div><div class='add'>+		prefix = buf;</div><div class='add'>+		break;</div><div class='ctx'> 	case BCMA_HOSTTYPE_SOC:</div><div class='ctx'> 		memset(out, 0, sizeof(struct ssb_sprom));</div><div class='ctx'> 		core = bcma_find_core(bus, BCMA_CORE_80211);</div><div class='ctx'> 		if (core) {</div><div class='del'>-			snprintf(prefix, sizeof(prefix), "sb/%u/",</div><div class='add'>+			snprintf(buf, sizeof(buf), "sb/%u/",</div><div class='ctx'> 				 core-&gt;core_index);</div><div class='del'>-			bcm47xx_fill_sprom(out, prefix, true);</div><div class='add'>+			prefix = buf;</div><div class='add'>+			fallback = true;</div><div class='ctx'> 		} else {</div><div class='del'>-			bcm47xx_fill_sprom(out, NULL, false);</div><div class='add'>+			prefix = NULL;</div><div class='ctx'> 		}</div><div class='del'>-		return 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_warn("Unable to fill SPROM for given bustype.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardvendor", &amp;binfo-&gt;vendor, 0, true);</div><div class='add'>+	if (!binfo-&gt;vendor)</div><div class='add'>+		binfo-&gt;vendor = SSB_BOARDVENDOR_BCM;</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardtype", &amp;binfo-&gt;type, 0, true);</div><div class='add'>+</div><div class='add'>+	bcm47xx_fill_sprom(out, prefix, fallback);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bmips/Kconfig b/arch/mips/bmips/Kconfig<br/>index f35c84c019df..e2c4fd682c74 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bmips/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bmips/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bmips/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bmips/Kconfig</a></div><div class='hunk'>@@ -57,6 +57,10 @@ config DT_BCM97425SVMB</div><div class='ctx'> 	bool "BCM97425SVMB"</div><div class='ctx'> 	select BUILTIN_DTB</div><div class='ctx'> </div><div class='add'>+config DT_BCM97435SVMB</div><div class='add'>+	bool "BCM97435SVMB"</div><div class='add'>+	select BUILTIN_DTB</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c<br/>index fae800e8b1e1..526ec2789bb9 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bmips/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/bmips/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bmips/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/bmips/setup.c</a></div><div class='hunk'>@@ -149,6 +149,8 @@ void __init plat_mem_setup(void)</div><div class='ctx'> 	/* intended to somewhat resemble ARM; see Documentation/arm/Booting */</div><div class='ctx'> 	if (fw_arg0 == 0 &amp;&amp; fw_arg1 == 0xffffffff)</div><div class='ctx'> 		dtb = phys_to_virt(fw_arg2);</div><div class='add'>+	else if (fw_arg0 == -2) /* UHI interface */</div><div class='add'>+		dtb = (void *)fw_arg1;</div><div class='ctx'> 	else if (__dtb_start != __dtb_end)</div><div class='ctx'> 		dtb = (void *)__dtb_start;</div><div class='ctx'> 	else</div><div class='head'>diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S<br/>index 409cb483a9ff..c580e853b9fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/compressed/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/compressed/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/compressed/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/head.S</a></div><div class='hunk'>@@ -25,6 +25,22 @@ start:</div><div class='ctx'> 	move	s2, a2</div><div class='ctx'> 	move	s3, a3</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MIPS_ZBOOT_APPENDED_DTB</div><div class='add'>+	PTR_LA	t0, __appended_dtb</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	li	t1, 0xd00dfeed</div><div class='add'>+#else</div><div class='add'>+	li	t1, 0xedfe0dd0</div><div class='add'>+#endif</div><div class='add'>+	lw	t2, (t0)</div><div class='add'>+	bne	t1, t2, not_found</div><div class='add'>+	 nop</div><div class='add'>+</div><div class='add'>+	move	s1, t0</div><div class='add'>+	PTR_LI	s0, -2</div><div class='add'>+not_found:</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Clear BSS */</div><div class='ctx'> 	PTR_LA	a0, _edata</div><div class='ctx'> 	PTR_LA	a2, _end</div><div class='head'>diff --git a/arch/mips/boot/compressed/ld.script b/arch/mips/boot/compressed/ld.script<br/>index 5a33409c7f63..2ed08fbef8e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/compressed/ld.script?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/compressed/ld.script</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/compressed/ld.script?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/ld.script</a></div><div class='hunk'>@@ -29,8 +29,12 @@ SECTIONS</div><div class='ctx'> 		*(.image)</div><div class='ctx'> 		__image_end = .;</div><div class='ctx'> 		CONSTRUCTORS</div><div class='add'>+		. = ALIGN(16);</div><div class='ctx'> 	}</div><div class='del'>-	. = ALIGN(16);</div><div class='add'>+	__appended_dtb = .;</div><div class='add'>+	/* leave space for appended DTB */</div><div class='add'>+	. += 0x100000;</div><div class='add'>+</div><div class='ctx'> 	_edata = .;</div><div class='ctx'> 	/* End of data section */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c<br/>index 237494b7a21a..408799a839b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/compressed/uart-16550.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/compressed/uart-16550.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/compressed/uart-16550.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/compressed/uart-16550.c</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MACH_LOONGSON) || defined(CONFIG_MIPS_MALTA)</div><div class='add'>+#if defined(CONFIG_MACH_LOONGSON64) || defined(CONFIG_MIPS_MALTA)</div><div class='ctx'> #define UART_BASE 0x1fd003f8</div><div class='ctx'> #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile<br/>index 5d95e4bd709a..778a34028c1b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> dts-dirs	+= brcm</div><div class='ctx'> dts-dirs	+= cavium-octeon</div><div class='add'>+dts-dirs	+= ingenic</div><div class='ctx'> dts-dirs	+= lantiq</div><div class='ctx'> dts-dirs	+= mti</div><div class='ctx'> dts-dirs	+= netlogic</div><div class='add'>+dts-dirs	+= qca</div><div class='ctx'> dts-dirs	+= ralink</div><div class='ctx'> </div><div class='ctx'> obj-y		:= $(addsuffix /, $(dts-dirs))</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile<br/>index 1c8353bfe003..eabeb603e805 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/Makefile</a></div><div class='hunk'>@@ -9,6 +9,20 @@ dtb-$(CONFIG_DT_BCM97360SVMB)		+= bcm97360svmb.dtb</div><div class='ctx'> dtb-$(CONFIG_DT_BCM97362SVMB)		+= bcm97362svmb.dtb</div><div class='ctx'> dtb-$(CONFIG_DT_BCM97420C)		+= bcm97420c.dtb</div><div class='ctx'> dtb-$(CONFIG_DT_BCM97425SVMB)		+= bcm97425svmb.dtb</div><div class='add'>+dtb-$(CONFIG_DT_BCM97435SVMB)		+= bcm97435svmb.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_DT_NONE)			+= \</div><div class='add'>+						bcm93384wvg.dtb		\</div><div class='add'>+						bcm93384wvg_viper.dtb	\</div><div class='add'>+						bcm96368mvwg.dtb	\</div><div class='add'>+						bcm9ejtagprb.dtb	\</div><div class='add'>+						bcm97125cbmb.dtb	\</div><div class='add'>+						bcm97346dbsmb.dtb	\</div><div class='add'>+						bcm97358svmb.dtb	\</div><div class='add'>+						bcm97360svmb.dtb	\</div><div class='add'>+						bcm97362svmb.dtb	\</div><div class='add'>+						bcm97420c.dtb		\</div><div class='add'>+						bcm97425svmb.dtb</div><div class='ctx'> </div><div class='ctx'> obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi<br/>index 1f30728a3177..d817bb46b934 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7346.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7346.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		uart0 = &amp;uart0;</div><div class='add'>+		uart1 = &amp;uart1;</div><div class='add'>+		uart2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpu_intc: cpu_intc {</div><div class='hunk'>@@ -118,6 +120,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@406940 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406940 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;65&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@406980 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406980 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;66&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		enet0: ethernet@430000 {</div><div class='ctx'> 			phy-mode = "internal";</div><div class='ctx'> 			phy-handle = &lt;&amp;phy1&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi<br/>index 2c2aa9368f76..277a90adc1a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7358.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm7358.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7358.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7358.dtsi</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		uart0 = &amp;uart0;</div><div class='add'>+		uart1 = &amp;uart1;</div><div class='add'>+		uart2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpu_intc: cpu_intc {</div><div class='hunk'>@@ -112,6 +114,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@406840 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406840 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;62&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@406880 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406880 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;63&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		enet0: ethernet@430000 {</div><div class='ctx'> 			phy-mode = "internal";</div><div class='ctx'> 			phy-handle = &lt;&amp;phy1&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi<br/>index f23b0aed276f..9e1e571ba346 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7360.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7360.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		uart0 = &amp;uart0;</div><div class='add'>+		uart1 = &amp;uart1;</div><div class='add'>+		uart2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpu_intc: cpu_intc {</div><div class='hunk'>@@ -112,6 +114,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@406840 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406840 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;62&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@406880 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406880 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;63&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		enet0: ethernet@430000 {</div><div class='ctx'> 			phy-mode = "internal";</div><div class='ctx'> 			phy-handle = &lt;&amp;phy1&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi<br/>index da99db665bbc..6e65db86fc61 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7362.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7362.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		uart0 = &amp;uart0;</div><div class='add'>+		uart1 = &amp;uart1;</div><div class='add'>+		uart2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpu_intc: cpu_intc {</div><div class='hunk'>@@ -118,6 +120,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@406840 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406840 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;62&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@406880 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406880 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;63&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		enet0: ethernet@430000 {</div><div class='ctx'> 			phy-mode = "internal";</div><div class='ctx'> 			phy-handle = &lt;&amp;phy1&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi<br/>new file mode 100644<br/>index 000000000000..8b9432cc062b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm7435.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm7435.dtsi</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "brcm,bcm7435";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mips-hpt-frequency = &lt;163125000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "brcm,bmips5200";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "brcm,bmips5200";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@2 {</div><div class='add'>+			compatible = "brcm,bmips5200";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@3 {</div><div class='add'>+			compatible = "brcm,bmips5200";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		uart0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_intc: cpu_intc {</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		uart_clk: uart_clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;81000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rdb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0 0x10000000 0x01000000&gt;;</div><div class='add'>+</div><div class='add'>+		periph_intc: periph_intc@41b500 {</div><div class='add'>+			compatible = "brcm,bcm7038-l1-intc";</div><div class='add'>+			reg = &lt;0x41b500 0x40&gt;, &lt;0x41b600 0x40&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sun_l2_intc: sun_l2_intc@403000 {</div><div class='add'>+			compatible = "brcm,l2-intc";</div><div class='add'>+			reg = &lt;0x403000 0x30&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;52&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gisb-arb@400000 {</div><div class='add'>+			compatible = "brcm,bcm7400-gisb-arb";</div><div class='add'>+			reg = &lt;0x400000 0xdc&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;sun_l2_intc&gt;;</div><div class='add'>+			interrupts = &lt;0&gt;, &lt;2&gt;;</div><div class='add'>+			brcm,gisb-arb-master-mask = &lt;0xf77f&gt;;</div><div class='add'>+			brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",</div><div class='add'>+						     "pcie_0", "bsp_0",</div><div class='add'>+						     "rdc_0", "raaga_0",</div><div class='add'>+						     "avd_1", "jtag_0",</div><div class='add'>+						     "svd_0", "vice_0",</div><div class='add'>+						     "vice_1", "raaga_1",</div><div class='add'>+						     "scpu";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		upg_irq0_intc: upg_irq0_intc@406780 {</div><div class='add'>+			compatible = "brcm,bcm7120-l2-intc";</div><div class='add'>+			reg = &lt;0x406780 0x8&gt;;</div><div class='add'>+</div><div class='add'>+			brcm,int-map-mask = &lt;0x44&gt;;</div><div class='add'>+			brcm,int-fwd-mask = &lt;0x70000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;60&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sun_top_ctrl: syscon@404000 {</div><div class='add'>+			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x404000 0x51c&gt;;</div><div class='add'>+			little-endian;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reboot {</div><div class='add'>+			compatible = "brcm,brcmstb-reboot";</div><div class='add'>+			syscon = &lt;&amp;sun_top_ctrl 0x304 0x308&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@406b00 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x406b00 0x20&gt;;</div><div class='add'>+			reg-io-width = &lt;0x4&gt;;</div><div class='add'>+			reg-shift = &lt;0x2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;66&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		enet0: ethernet@b80000 {</div><div class='add'>+			phy-mode = "internal";</div><div class='add'>+			phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+			mac-address = [ 00 10 18 36 23 1a ];</div><div class='add'>+			compatible = "brcm,genet-v3";</div><div class='add'>+			#address-cells = &lt;0x1&gt;;</div><div class='add'>+			#size-cells = &lt;0x1&gt;;</div><div class='add'>+			reg = &lt;0xb80000 0x11c88&gt;;</div><div class='add'>+			interrupts = &lt;17&gt;, &lt;18&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio@e14 {</div><div class='add'>+				compatible = "brcm,genet-mdio-v3";</div><div class='add'>+				#address-cells = &lt;0x1&gt;;</div><div class='add'>+				#size-cells = &lt;0x0&gt;;</div><div class='add'>+				reg = &lt;0xe14 0x8&gt;;</div><div class='add'>+</div><div class='add'>+				phy1: ethernet-phy@1 {</div><div class='add'>+					max-speed = &lt;100&gt;;</div><div class='add'>+					reg = &lt;0x1&gt;;</div><div class='add'>+					compatible = "brcm,40nm-ephy",</div><div class='add'>+						"ethernet-phy-ieee802.3-c22";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@480300 {</div><div class='add'>+			compatible = "brcm,bcm7435-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x480300 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;70&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@480400 {</div><div class='add'>+			compatible = "brcm,bcm7435-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x480400 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			no-big-frame-no;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;72&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci1: usb@480500 {</div><div class='add'>+			compatible = "brcm,bcm7435-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x480500 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;71&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci1: usb@480600 {</div><div class='add'>+			compatible = "brcm,bcm7435-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x480600 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			no-big-frame-no;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;73&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci2: usb@490300 {</div><div class='add'>+			compatible = "brcm,bcm7435-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x490300 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;75&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci2: usb@490400 {</div><div class='add'>+			compatible = "brcm,bcm7435-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x490400 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			no-big-frame-no;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;77&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci3: usb@490500 {</div><div class='add'>+			compatible = "brcm,bcm7435-ehci", "generic-ehci";</div><div class='add'>+			reg = &lt;0x490500 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;76&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci3: usb@490600 {</div><div class='add'>+			compatible = "brcm,bcm7435-ohci", "generic-ohci";</div><div class='add'>+			reg = &lt;0x490600 0x100&gt;;</div><div class='add'>+			native-endian;</div><div class='add'>+			no-big-frame-no;</div><div class='add'>+			interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+			interrupts = &lt;78&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts<br/>index 70f196d89d26..3fe0445b9d37 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm97346dbsmb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97346dbsmb.dts</a></div><div class='hunk'>@@ -21,6 +21,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;enet0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts<br/>index d18e6d947739..a8dc01e30313 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97358svmb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm97358svmb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97358svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97358svmb.dts</a></div><div class='hunk'>@@ -21,6 +21,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;enet0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts<br/>index 4fe515500102..eee8b0e32681 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97360svmb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm97360svmb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97360svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97360svmb.dts</a></div><div class='hunk'>@@ -21,6 +21,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;enet0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts<br/>index b7b88e5dc9e7..739c2ef5663b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97362svmb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/brcm/bcm97362svmb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97362svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97362svmb.dts</a></div><div class='hunk'>@@ -21,6 +21,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;enet0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts<br/>new file mode 100644<br/>index 000000000000..1df088183523<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/brcm/bcm97435svmb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/brcm/bcm97435svmb.dts</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "bcm7435.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "brcm,bcm97435svmb", "brcm,bcm7435";</div><div class='add'>+	model = "Broadcom BCM97435SVMB";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x10000000&gt;,</div><div class='add'>+		      &lt;0x20000000 0x30000000&gt;,</div><div class='add'>+		      &lt;0x90000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200 maxcpus=1";</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enet0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile<br/>new file mode 100644<br/>index 000000000000..f2b864f07850<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/ingenic/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+dtb-$(CONFIG_JZ4740_QI_LB60)	+= qi_lb60.dtb</div><div class='add'>+dtb-$(CONFIG_JZ4780_CI20)	+= ci20.dtb</div><div class='add'>+</div><div class='add'>+obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))</div><div class='add'>+</div><div class='add'>+# Force kbuild to make empty built-in.o if necessary</div><div class='add'>+obj-				+= dummy.o</div><div class='add'>+</div><div class='add'>+always				:= $(dtb-y)</div><div class='add'>+clean-files			:= *.dtb *.dtb.S</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts<br/>new file mode 100644<br/>index 000000000000..9fcb9e7d1f57<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/ingenic/ci20.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/ci20.dts</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "jz4780.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "img,ci20", "ingenic,jz4780";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+		serial4 = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x10000000</div><div class='add'>+		       0x30000000 0x30000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext {</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi<br/>new file mode 100644<br/>index 000000000000..8b2437cd019f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/ingenic/jz4740.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/jz4740.dtsi</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+#include &lt;dt-bindings/clock/jz4740-cgu.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "ingenic,jz4740";</div><div class='add'>+</div><div class='add'>+	cpuintc: interrupt-controller@0 {</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intc: interrupt-controller@10001000 {</div><div class='add'>+		compatible = "ingenic,jz4740-intc";</div><div class='add'>+		reg = &lt;0x10001000 0x14&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext: ext {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: rtc {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cgu: jz4740-cgu@10000000 {</div><div class='add'>+		compatible = "ingenic,jz4740-cgu";</div><div class='add'>+		reg = &lt;0x10000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;rtc&gt;;</div><div class='add'>+		clock-names = "ext", "rtc";</div><div class='add'>+</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0: serial@10030000 {</div><div class='add'>+		compatible = "ingenic,jz4740-uart";</div><div class='add'>+		reg = &lt;0x10030000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4740_CLK_UART0&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1: serial@10031000 {</div><div class='add'>+		compatible = "ingenic,jz4740-uart";</div><div class='add'>+		reg = &lt;0x10031000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4740_CLK_UART1&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi<br/>new file mode 100644<br/>index 000000000000..65389f602733<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/ingenic/jz4780.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/jz4780.dtsi</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+#include &lt;dt-bindings/clock/jz4780-cgu.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "ingenic,jz4780";</div><div class='add'>+</div><div class='add'>+	cpuintc: interrupt-controller {</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intc: interrupt-controller@10001000 {</div><div class='add'>+		compatible = "ingenic,jz4780-intc";</div><div class='add'>+		reg = &lt;0x10001000 0x50&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext: ext {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: rtc {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cgu: jz4780-cgu@10000000 {</div><div class='add'>+		compatible = "ingenic,jz4780-cgu";</div><div class='add'>+		reg = &lt;0x10000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;rtc&gt;;</div><div class='add'>+		clock-names = "ext", "rtc";</div><div class='add'>+</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0: serial@10030000 {</div><div class='add'>+		compatible = "ingenic,jz4780-uart";</div><div class='add'>+		reg = &lt;0x10030000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;51&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4780_CLK_UART0&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1: serial@10031000 {</div><div class='add'>+		compatible = "ingenic,jz4780-uart";</div><div class='add'>+		reg = &lt;0x10031000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;50&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4780_CLK_UART1&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2: serial@10032000 {</div><div class='add'>+		compatible = "ingenic,jz4780-uart";</div><div class='add'>+		reg = &lt;0x10032000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;49&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4780_CLK_UART2&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3: serial@10033000 {</div><div class='add'>+		compatible = "ingenic,jz4780-uart";</div><div class='add'>+		reg = &lt;0x10033000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;48&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4780_CLK_UART3&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4: serial@10034000 {</div><div class='add'>+		compatible = "ingenic,jz4780-uart";</div><div class='add'>+		reg = &lt;0x10034000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;34&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;ext&gt;, &lt;&amp;cgu JZ4780_CLK_UART4&gt;;</div><div class='add'>+		clock-names = "baud", "module";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts<br/>new file mode 100644<br/>index 000000000000..2414d63ae818<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/ingenic/qi_lb60.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/ingenic/qi_lb60.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "jz4740.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "qi,lb60", "ingenic,jz4740";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext {</div><div class='add'>+	clock-frequency = &lt;12000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile<br/>index ef1f3dbed033..144d776cc9f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/boot/dts/mti/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/boot/dts/mti/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/mti/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/mti/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+dtb-$(CONFIG_MIPS_MALTA)	+= malta.dtb</div><div class='ctx'> dtb-$(CONFIG_MIPS_SEAD3)	+= sead3.dtb</div><div class='ctx'> </div><div class='ctx'> obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/mti/malta.dts b/arch/mips/boot/dts/mti/malta.dts<br/>new file mode 100644<br/>index 000000000000..c678115f5b7f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/mti/malta.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/mti/malta.dts</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "mti,malta";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/Makefile b/arch/mips/boot/dts/qca/Makefile<br/>new file mode 100644<br/>index 000000000000..2d61455d585d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/qca/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/Makefile</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+# All DTBs</div><div class='add'>+dtb-$(CONFIG_ATH79)			+= ar9132_tl_wr1043nd_v1.dtb</div><div class='add'>+</div><div class='add'>+# Select a DTB to build in the kernel</div><div class='add'>+obj-$(CONFIG_DTB_TL_WR1043ND_V1)	+= ar9132_tl_wr1043nd_v1.dtb.o</div><div class='add'>+</div><div class='add'>+# Force kbuild to make empty built-in.o if necessary</div><div class='add'>+obj-				+= dummy.o</div><div class='add'>+</div><div class='add'>+always				:= $(dtb-y)</div><div class='add'>+clean-files			:= *.dtb *.dtb.S</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi<br/>new file mode 100644<br/>index 000000000000..4759cff814d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/qca/ar9132.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/ar9132.dtsi</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+/ {</div><div class='add'>+	compatible = "qca,ar9132";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "mips,mips24Kc";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpuintc: interrupt-controller {</div><div class='add'>+		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		qca,ddr-wb-channel-interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='add'>+		qca,ddr-wb-channels = &lt;&amp;ddr_ctrl 3&gt;, &lt;&amp;ddr_ctrl 2&gt;,</div><div class='add'>+					&lt;&amp;ddr_ctrl 0&gt;, &lt;&amp;ddr_ctrl 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;miscintc&gt;;</div><div class='add'>+</div><div class='add'>+			ddr_ctrl: memory-controller@18000000 {</div><div class='add'>+				compatible = "qca,ar9132-ddr-controller",</div><div class='add'>+						"qca,ar7240-ddr-controller";</div><div class='add'>+				reg = &lt;0x18000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+				#qca,ddr-wb-channel-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart@18020000 {</div><div class='add'>+				compatible = "ns8250";</div><div class='add'>+				reg = &lt;0x18020000 0x20&gt;;</div><div class='add'>+				interrupts = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;pll 2&gt;;</div><div class='add'>+				clock-names = "uart";</div><div class='add'>+</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				no-loopback-test;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio: gpio@18040000 {</div><div class='add'>+				compatible = "qca,ar9132-gpio",</div><div class='add'>+						"qca,ar7100-gpio";</div><div class='add'>+				reg = &lt;0x18040000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				ngpios = &lt;22&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pll: pll-controller@18050000 {</div><div class='add'>+				compatible = "qca,ar9132-ppl",</div><div class='add'>+						"qca,ar9130-pll";</div><div class='add'>+				reg = &lt;0x18050000 0x20&gt;;</div><div class='add'>+</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				/* The board must provides the ref clock */</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clock-output-names = "cpu", "ddr", "ahb";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@18060008 {</div><div class='add'>+				compatible = "qca,ar7130-wdt";</div><div class='add'>+				reg = &lt;0x18060008 0x8&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;pll 2&gt;;</div><div class='add'>+				clock-names = "wdt";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			miscintc: interrupt-controller@18060010 {</div><div class='add'>+				compatible = "qca,ar9132-misc-intc",</div><div class='add'>+					   "qca,ar7100-misc-intc";</div><div class='add'>+				reg = &lt;0x18060010 0x4&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+				interrupts = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@1f000000 {</div><div class='add'>+			compatible = "qca,ar9132-spi", "qca,ar7100-spi";</div><div class='add'>+			reg = &lt;0x1f000000 0x10&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;pll 2&gt;;</div><div class='add'>+			clock-names = "ahb";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts<br/>new file mode 100644<br/>index 000000000000..003015ab34e7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ar9132.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";</div><div class='add'>+	model = "TP-Link TL-WR1043ND Version 1";</div><div class='add'>+</div><div class='add'>+	alias {</div><div class='add'>+		serial0 = "/ahb/apb/uart@18020000";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extosc: oscillator {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			uart@18020000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pll-controller@18050000 {</div><div class='add'>+				clocks = &lt;&amp;extosc&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi@1f000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			num-cs = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			flash@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "s25sl064a";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x000000 0x020000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@1 {</div><div class='add'>+					label = "firmware";</div><div class='add'>+					reg = &lt;0x020000 0x7D0000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@2 {</div><div class='add'>+					label = "art";</div><div class='add'>+					reg = &lt;0x7F0000 0x010000&gt;;</div><div class='add'>+					read-only;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		poll-interval = &lt;20&gt;;</div><div class='add'>+		button@0 {</div><div class='add'>+			label = "reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;60&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button@1 {</div><div class='add'>+			label = "qss";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;60&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led@0 {</div><div class='add'>+			label = "tp-link:green:usb";</div><div class='add'>+			gpios = &lt;&amp;gpio 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@1 {</div><div class='add'>+			label = "tp-link:green:system";</div><div class='add'>+			gpios = &lt;&amp;gpio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@2 {</div><div class='add'>+			label = "tp-link:green:qss";</div><div class='add'>+			gpios = &lt;&amp;gpio 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			label = "tp-link:green:wlan";</div><div class='add'>+			gpios = &lt;&amp;gpio 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile<br/>index 69a8a8dabc2b..2a5926578841 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cavium-octeon/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/cavium-octeon/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cavium-octeon/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/Makefile</a></div><div class='hunk'>@@ -9,9 +9,6 @@</div><div class='ctx'> # Copyright (C) 2005-2009 Cavium Networks</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt</div><div class='del'>-CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt</div><div class='del'>-</div><div class='ctx'> obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o</div><div class='ctx'> obj-y += dma-octeon.o</div><div class='ctx'> obj-y += octeon-memcpy.o</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-md5.c b/arch/mips/cavium-octeon/crypto/octeon-md5.c<br/>index 12dccdb38286..af4c712f7afc 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a></div><div class='hunk'>@@ -69,10 +69,10 @@ static int octeon_md5_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mctx-&gt;hash[0] = cpu_to_le32(0x67452301);</div><div class='del'>-	mctx-&gt;hash[1] = cpu_to_le32(0xefcdab89);</div><div class='del'>-	mctx-&gt;hash[2] = cpu_to_le32(0x98badcfe);</div><div class='del'>-	mctx-&gt;hash[3] = cpu_to_le32(0x10325476);</div><div class='add'>+	mctx-&gt;hash[0] = cpu_to_le32(MD5_H0);</div><div class='add'>+	mctx-&gt;hash[1] = cpu_to_le32(MD5_H1);</div><div class='add'>+	mctx-&gt;hash[2] = cpu_to_le32(MD5_H2);</div><div class='add'>+	mctx-&gt;hash[3] = cpu_to_le32(MD5_H3);</div><div class='ctx'> 	mctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c<br/>index 10f762557b92..d8124a3c5a85 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cavium-octeon/octeon-irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/cavium-octeon/octeon-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cavium-octeon/octeon-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cavium-octeon/octeon-irq.c</a></div><div class='hunk'>@@ -698,7 +698,9 @@ static void octeon_irq_ciu_gpio_ack(struct irq_data *data)</div><div class='ctx'> </div><div class='ctx'> static void octeon_irq_handle_trigger(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	if (irq_get_trigger_type(irq) &amp; IRQ_TYPE_EDGE_BOTH)</div><div class='add'>+	struct irq_data *data = irq_desc_get_irq_data(desc);</div><div class='add'>+</div><div class='add'>+	if (irqd_get_trigger_type(data) &amp; IRQ_TYPE_EDGE_BOTH)</div><div class='ctx'> 		handle_edge_irq(irq, desc);</div><div class='ctx'> 	else</div><div class='ctx'> 		handle_level_irq(irq, desc);</div><div class='head'>diff --git a/arch/mips/cobalt/mtd.c b/arch/mips/cobalt/mtd.c<br/>index 8db7b5d81560..83e1b1093d5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cobalt/mtd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/cobalt/mtd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cobalt/mtd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/cobalt/mtd.c</a></div><div class='hunk'>@@ -57,5 +57,4 @@ static int __init cobalt_mtd_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(cobalt_mtd_init);</div><div class='add'>+device_initcall(cobalt_mtd_init);</div><div class='head'>diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig<br/>new file mode 100644<br/>index 000000000000..4e36b6e1869c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/ci20_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/ci20_defconfig</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+CONFIG_MACH_INGENIC=y</div><div class='add'>+CONFIG_JZ4780_CI20=y</div><div class='add'>+CONFIG_HIGHMEM=y</div><div class='add'>+# CONFIG_COMPACTION is not set</div><div class='add'>+CONFIG_CMA=y</div><div class='add'>+CONFIG_HZ_100=y</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+# CONFIG_SECCOMP is not set</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_KERNEL_XZ=y</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_POSIX_MQUEUE=y</div><div class='add'>+CONFIG_FHANDLE=y</div><div class='add'>+CONFIG_NO_HZ_IDLE=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_CGROUPS=y</div><div class='add'>+CONFIG_CGROUP_FREEZER=y</div><div class='add'>+CONFIG_CGROUP_DEVICE=y</div><div class='add'>+CONFIG_CPUSETS=y</div><div class='add'>+CONFIG_CGROUP_CPUACCT=y</div><div class='add'>+CONFIG_MEMCG=y</div><div class='add'>+CONFIG_MEMCG_KMEM=y</div><div class='add'>+CONFIG_CGROUP_SCHED=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+CONFIG_USER_NS=y</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_SYSCTL_SYSCALL=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+# CONFIG_SUSPEND is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+# CONFIG_ALLOW_DEV_COREDUMP is not set</div><div class='add'>+CONFIG_DMA_CMA=y</div><div class='add'>+CONFIG_CMA_SIZE_MBYTES=32</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_CADENCE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+CONFIG_DM9000=y</div><div class='add'>+CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_QUALCOMM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ROCKER is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SAMSUNG is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_STMICRO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+CONFIG_VT_HW_CONSOLE_BINDING=y</div><div class='add'>+CONFIG_LEGACY_PTY_COUNT=2</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_8250_NR_UARTS=5</div><div class='add'>+CONFIG_SERIAL_8250_RUNTIME_UARTS=5</div><div class='add'>+CONFIG_SERIAL_8250_INGENIC=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_JZ4780=y</div><div class='add'>+CONFIG_GPIO_SYSFS=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_REGULATOR=y</div><div class='add'>+CONFIG_REGULATOR_DEBUG=y</div><div class='add'>+CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='add'>+# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+# CONFIG_HID is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_MEMORY=y</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+CONFIG_PROC_KCORE=y</div><div class='add'>+# CONFIG_PROC_PAGE_MONITOR is not set</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_CONFIGFS_FS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+# CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NLS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_737=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_775=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_850=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_852=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_855=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_857=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_860=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_861=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_862=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_863=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_864=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_865=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_866=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_869=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_936=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_950=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_932=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_949=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_874=y</div><div class='add'>+CONFIG_NLS_ISO8859_8=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_1250=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_1251=y</div><div class='add'>+CONFIG_NLS_ASCII=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+CONFIG_NLS_ISO8859_2=y</div><div class='add'>+CONFIG_NLS_ISO8859_3=y</div><div class='add'>+CONFIG_NLS_ISO8859_4=y</div><div class='add'>+CONFIG_NLS_ISO8859_5=y</div><div class='add'>+CONFIG_NLS_ISO8859_6=y</div><div class='add'>+CONFIG_NLS_ISO8859_7=y</div><div class='add'>+CONFIG_NLS_ISO8859_9=y</div><div class='add'>+CONFIG_NLS_ISO8859_13=y</div><div class='add'>+CONFIG_NLS_ISO8859_14=y</div><div class='add'>+CONFIG_NLS_ISO8859_15=y</div><div class='add'>+CONFIG_NLS_KOI8_R=y</div><div class='add'>+CONFIG_NLS_KOI8_U=y</div><div class='add'>+CONFIG_NLS_UTF8=y</div><div class='add'>+CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+CONFIG_LOCKUP_DETECTOR=y</div><div class='add'>+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y</div><div class='add'>+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y</div><div class='add'>+CONFIG_PANIC_ON_OOPS=y</div><div class='add'>+CONFIG_PANIC_TIMEOUT=10</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+CONFIG_STACKTRACE=y</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_CMDLINE_BOOL=y</div><div class='add'>+CONFIG_CMDLINE="earlycon console=ttyS4,115200 clk_ignore_unused"</div><div class='head'>diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig<br/>index b2a577ebce0b..a75c65da08b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/fuloong2e_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/fuloong2e_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/fuloong2e_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/fuloong2e_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_MACH_LOONGSON=y</div><div class='add'>+CONFIG_MACH_LOONGSON64=y</div><div class='ctx'> CONFIG_64BIT=y</div><div class='ctx'> CONFIG_NO_HZ=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='head'>diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig<br/>index 0cbc9863c7c8..54cc3853d259 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/lemote2f_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/lemote2f_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/lemote2f_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/lemote2f_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_MACH_LOONGSON=y</div><div class='add'>+CONFIG_MACH_LOONGSON64=y</div><div class='ctx'> CONFIG_LEMOTE_MACH2F=y</div><div class='ctx'> CONFIG_CS5536_MFGPT=y</div><div class='ctx'> CONFIG_64BIT=y</div><div class='head'>diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig<br/>index c8442997477b..f8bf915c6d6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/loongson3_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/loongson3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/loongson3_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/loongson3_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_MACH_LOONGSON=y</div><div class='add'>+CONFIG_MACH_LOONGSON64=y</div><div class='ctx'> CONFIG_SWIOTLB=y</div><div class='ctx'> CONFIG_LOONGSON_MACH3X=y</div><div class='ctx'> CONFIG_CPU_LOONGSON3=y</div><div class='head'>diff --git a/arch/mips/configs/ls1b_defconfig b/arch/mips/configs/ls1b_defconfig<br/>index 7eb75543ca1a..1b2cc1fb26a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/ls1b_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/ls1b_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/ls1b_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/ls1b_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_MACH_LOONGSON1=y</div><div class='add'>+CONFIG_MACH_LOONGSON32=y</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_SECCOMP is not set</div><div class='ctx'> CONFIG_EXPERIMENTAL=y</div><div class='head'>diff --git a/arch/mips/configs/maltasmvp_defconfig b/arch/mips/configs/maltasmvp_defconfig<br/>index f8a32315bb38..ac0eb4daf101 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/maltasmvp_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/maltasmvp_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/maltasmvp_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/maltasmvp_defconfig</a></div><div class='hunk'>@@ -84,15 +84,12 @@ CONFIG_NET_CLS_IND=y</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_CRYPTOLOOP=m</div><div class='del'>-CONFIG_IDE=y</div><div class='del'>-# CONFIG_IDE_PROC_FS is not set</div><div class='del'>-# CONFIG_IDEPCI_PCIBUS_ORDER is not set</div><div class='del'>-CONFIG_BLK_DEV_GENERIC=y</div><div class='del'>-CONFIG_BLK_DEV_PIIX=y</div><div class='del'>-CONFIG_SCSI=y</div><div class='ctx'> CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_CHR_DEV_SG=y</div><div class='ctx'> # CONFIG_SCSI_LOWLEVEL is not set</div><div class='add'>+CONFIG_ATA=y</div><div class='add'>+# CONFIG_SATA_PMP is not set</div><div class='add'>+CONFIG_ATA_PIIX=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> # CONFIG_NET_VENDOR_3COM is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_ADAPTEC is not set</div><div class='hunk'>@@ -138,7 +135,6 @@ CONFIG_SERIAL_8250=y</div><div class='ctx'> CONFIG_SERIAL_8250_CONSOLE=y</div><div class='ctx'> CONFIG_HW_RANDOM=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='del'>-CONFIG_VIDEO_OUTPUT_CONTROL=m</div><div class='ctx'> CONFIG_FB=y</div><div class='ctx'> CONFIG_FIRMWARE_EDID=y</div><div class='ctx'> CONFIG_FB_MATROX=y</div><div class='hunk'>@@ -152,7 +148,6 @@ CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_LEDS_TRIGGERS=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_TIMER=y</div><div class='del'>-CONFIG_LEDS_TRIGGER_IDE_DISK=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_BACKLIGHT=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_DEFAULT_ON=y</div><div class='hunk'>@@ -160,7 +155,11 @@ CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_CMOS=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='del'>-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='add'>+CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='add'>+CONFIG_EXT3_FS_SECURITY=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='add'>+CONFIG_EXT4_FS_SECURITY=y</div><div class='ctx'> CONFIG_XFS_FS=y</div><div class='ctx'> CONFIG_XFS_QUOTA=y</div><div class='ctx'> CONFIG_XFS_POSIX_ACL=y</div><div class='head'>diff --git a/arch/mips/configs/pistachio_defconfig b/arch/mips/configs/pistachio_defconfig<br/>index f22e92ee7709..1646cce032c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/pistachio_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/pistachio_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/pistachio_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/pistachio_defconfig</a></div><div class='hunk'>@@ -272,6 +272,7 @@ CONFIG_IIO=y</div><div class='ctx'> CONFIG_CC10001_ADC=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_IMG=y</div><div class='add'>+CONFIG_PHY_PISTACHIO_USB=y</div><div class='ctx'> CONFIG_ANDROID=y</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='head'>diff --git a/arch/mips/configs/qi_lb60_defconfig b/arch/mips/configs/qi_lb60_defconfig<br/>index 2b965470c35b..d7bb8cce1068 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/qi_lb60_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/configs/qi_lb60_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/qi_lb60_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/configs/qi_lb60_defconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-CONFIG_MACH_JZ4740=y</div><div class='add'>+CONFIG_MACH_INGENIC=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> # CONFIG_CROSS_MEMORY_ATTACH is not set</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='hunk'>@@ -66,6 +66,7 @@ CONFIG_SERIAL_8250_CONSOLE=y</div><div class='ctx'> # CONFIG_SERIAL_8250_DMA is not set</div><div class='ctx'> CONFIG_SERIAL_8250_NR_UARTS=2</div><div class='ctx'> CONFIG_SERIAL_8250_RUNTIME_UARTS=2</div><div class='add'>+CONFIG_SERIAL_8250_INGENIC=y</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='ctx'> CONFIG_SPI=y</div><div class='ctx'> CONFIG_SPI_GPIO=y</div><div class='head'>diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild<br/>index 526539cbc99f..1f8546081d20 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/Kbuild</a></div><div class='hunk'>@@ -7,11 +7,11 @@ generic-y += emergency-restart.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += parport.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += serial.h</div><div class='head'>diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h<br/>index 6156ac8c4cfb..76317a70200d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/asmmacro.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/asmmacro.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/asmmacro.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/asmmacro.h</a></div><div class='hunk'>@@ -211,9 +211,13 @@</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> #ifdef TOOLCHAIN_SUPPORTS_MSA</div><div class='add'>+/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */</div><div class='add'>+#undef fp</div><div class='add'>+</div><div class='ctx'> 	.macro	_cfcmsa	rd, cs</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	cfcmsa	\rd, $\cs</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -222,6 +226,7 @@</div><div class='ctx'> 	.macro	_ctcmsa	cd, rs</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	ctcmsa	$\cd, \rs</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -230,6 +235,7 @@</div><div class='ctx'> 	.macro	ld_d	wd, off, base</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	ld.d	$w\wd, \off(\base)</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -238,6 +244,7 @@</div><div class='ctx'> 	.macro	st_d	wd, off, base</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	st.d	$w\wd, \off(\base)</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -246,6 +253,7 @@</div><div class='ctx'> 	.macro	copy_u_w	ws, n</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	copy_u.w $1, $w\ws[\n]</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -254,6 +262,7 @@</div><div class='ctx'> 	.macro	copy_u_d	ws, n</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips64r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	copy_u.d $1, $w\ws[\n]</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -262,6 +271,7 @@</div><div class='ctx'> 	.macro	insert_w	wd, n</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips32r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	insert.w $w\wd[\n], $1</div><div class='ctx'> 	.set	pop</div><div class='hunk'>@@ -270,6 +280,7 @@</div><div class='ctx'> 	.macro	insert_d	wd, n</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	mips64r2</div><div class='add'>+	.set	fp=64</div><div class='ctx'> 	.set	msa</div><div class='ctx'> 	insert.d $w\wd[\n], $1</div><div class='ctx'> 	.set	pop</div><div class='head'>diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h<br/>index 2b8bbbcb9be0..7ecba84656d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/barrier.h</a></div><div class='hunk'>@@ -112,8 +112,8 @@</div><div class='ctx'> #define __WEAK_LLSC_MB		"		\n"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value) \</div><div class='del'>-	do { var = value; smp_mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value) \</div><div class='add'>+	do { WRITE_ONCE(var, value); smp_mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define smp_llsc_mb()	__asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h<br/>index 0cf29bd5dc5c..ce9666cf1499 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/bitops.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/bitops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/bitops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/bitops.h</a></div><div class='hunk'>@@ -469,7 +469,7 @@ static inline int test_and_change_bit(unsigned long nr,</div><div class='ctx'>  */</div><div class='ctx'> static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='del'>-	smp_mb();</div><div class='add'>+	smp_mb__before_llsc();</div><div class='ctx'> 	__clear_bit(nr, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/bmips-spaces.h b/arch/mips/include/asm/bmips-spaces.h<br/>new file mode 100644<br/>index 000000000000..eb96541ae67e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/bmips-spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/bmips-spaces.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#ifndef __ASM_BMIPS_SPACES_H</div><div class='add'>+#define __ASM_BMIPS_SPACES_H</div><div class='add'>+</div><div class='add'>+/* Avoid collisions with system base register (SBR) region on BMIPS3300 */</div><div class='add'>+#define FIXADDR_TOP		((unsigned long)(long)(int)0xff000000)</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_BMIPS_SPACES_H */</div><div class='head'>diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h<br/>index 412f945f1f5e..b71ab4a5fd50 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -138,8 +138,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz</div><div class='ctx'> 		__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))));	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> #define __cmpxchg_asm(ld, st, m, old, new)				\</div><div class='ctx'> ({									\</div><div class='ctx'> 	__typeof(*(m)) __ret;						\</div><div class='head'>diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h<br/>index 5aeaf19c26b0..f25de771f7ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/cpu-features.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/cpu-features.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/cpu-features.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu-features.h</a></div><div class='hunk'>@@ -108,6 +108,9 @@</div><div class='ctx'> #ifndef cpu_has_llsc</div><div class='ctx'> #define cpu_has_llsc		(cpu_data[0].options &amp; MIPS_CPU_LLSC)</div><div class='ctx'> #endif</div><div class='add'>+#ifndef cpu_has_bp_ghist</div><div class='add'>+#define cpu_has_bp_ghist	(cpu_data[0].options &amp; MIPS_CPU_BP_GHIST)</div><div class='add'>+#endif</div><div class='ctx'> #ifndef kernel_uses_llsc</div><div class='ctx'> #define kernel_uses_llsc	cpu_has_llsc</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h<br/>index 33f3cab9e689..d41e8e284825 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/cpu-type.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/cpu-type.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/cpu-type.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu-type.h</a></div><div class='hunk'>@@ -32,12 +32,12 @@ static inline int __pure __get_cpu_type(const int cpu_type)</div><div class='ctx'> 	case CPU_4KC:</div><div class='ctx'> 	case CPU_ALCHEMY:</div><div class='ctx'> 	case CPU_PR4450:</div><div class='del'>-	case CPU_JZRISC:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \</div><div class='ctx'>     defined(CONFIG_SYS_HAS_CPU_MIPS32_R2)</div><div class='ctx'> 	case CPU_4KEC:</div><div class='add'>+	case CPU_JZRISC:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2</div><div class='head'>diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h<br/>index e3adca1d0b99..e46e40602af3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/cpu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/cpu.h</a></div><div class='hunk'>@@ -42,7 +42,9 @@</div><div class='ctx'> #define PRID_COMP_LEXRA		0x0b0000</div><div class='ctx'> #define PRID_COMP_NETLOGIC	0x0c0000</div><div class='ctx'> #define PRID_COMP_CAVIUM	0x0d0000</div><div class='del'>-#define PRID_COMP_INGENIC	0xd00000</div><div class='add'>+#define PRID_COMP_INGENIC_D0	0xd00000	/* JZ4740, JZ4750 */</div><div class='add'>+#define PRID_COMP_INGENIC_D1	0xd10000	/* JZ4770, JZ4775 */</div><div class='add'>+#define PRID_COMP_INGENIC_E1	0xe10000	/* JZ4780 */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Assigned Processor ID (implementation) values for bits 15:8 of the PRId</div><div class='hunk'>@@ -168,7 +170,7 @@</div><div class='ctx'> #define PRID_IMP_CAVIUM_CN70XX 0x9600</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * These are the PRID's for when 23:16 == PRID_COMP_INGENIC</div><div class='add'>+ * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define PRID_IMP_JZRISC	       0x0200</div><div class='hunk'>@@ -379,6 +381,7 @@ enum cpu_type_enum {</div><div class='ctx'> #define MIPS_CPU_RW_LLB		0x1000000000ull /* LLADDR/LLB writes are allowed */</div><div class='ctx'> #define MIPS_CPU_XPA		0x2000000000ull /* CPU supports Extended Physical Addressing */</div><div class='ctx'> #define MIPS_CPU_CDMM		0x4000000000ull	/* CPU has Common Device Memory Map */</div><div class='add'>+#define MIPS_CPU_BP_GHIST	0x8000000000ull /* R12K+ Branch Prediction Global History */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CPU ASE encodings</div><div class='head'>diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h<br/>index fd1b4a150759..360b3387182a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #ifndef _ASM_DMA_MAPPING_H</div><div class='ctx'> #define _ASM_DMA_MAPPING_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/dma-coherence.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm-generic/dma-coherent.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h<br/>index 94105d3f58f4..980b16527374 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/edac.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/edac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/edac.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /* ECC atomic, DMA, SMP and interrupt safe scrub function */</div><div class='ctx'> </div><div class='del'>-static inline void atomic_scrub(void *va, u32 size)</div><div class='add'>+static inline void edac_atomic_scrub(void *va, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *virt_addr = va;</div><div class='ctx'> 	unsigned long temp;</div><div class='hunk'>@@ -21,7 +21,7 @@ static inline void atomic_scrub(void *va, u32 size)</div><div class='ctx'> </div><div class='ctx'> 		__asm__ __volatile__ (</div><div class='ctx'> 		"	.set	mips2					\n"</div><div class='del'>-		"1:	ll	%0, %1		# atomic_scrub		\n"</div><div class='add'>+		"1:	ll	%0, %1		# edac_atomic_scrub	\n"</div><div class='ctx'> 		"	addu	%0, $0					\n"</div><div class='ctx'> 		"	sc	%0, %1					\n"</div><div class='ctx'> 		"	beqz	%0, 1b					\n"</div><div class='head'>diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h<br/>index 084780b355aa..1b0625189835 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/fpu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/fpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/fpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/fpu.h</a></div><div class='hunk'>@@ -74,7 +74,7 @@ static inline int __enable_fpu(enum fpu_mode mode)</div><div class='ctx'> 		goto fr_common;</div><div class='ctx'> </div><div class='ctx'> 	case FPU_64BIT:</div><div class='del'>-#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS32_R6) \</div><div class='add'>+#if !(defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) \</div><div class='ctx'>       || defined(CONFIG_64BIT))</div><div class='ctx'> 		/* we only have a 32-bit FPU */</div><div class='ctx'> 		return SIGFPE;</div><div class='head'>diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h<br/>index 4087b47ad1cb..7b99efd31074 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/hazards.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/hazards.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/hazards.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/hazards.h</a></div><div class='hunk'>@@ -31,9 +31,15 @@</div><div class='ctx'> #define __mtc0_tlbw_hazard						\</div><div class='ctx'> 	___ehb</div><div class='ctx'> </div><div class='add'>+#define __mtc0_tlbr_hazard						\</div><div class='add'>+	___ehb</div><div class='add'>+</div><div class='ctx'> #define __tlbw_use_hazard						\</div><div class='ctx'> 	___ehb</div><div class='ctx'> </div><div class='add'>+#define __tlb_read_hazard						\</div><div class='add'>+	___ehb</div><div class='add'>+</div><div class='ctx'> #define __tlb_probe_hazard						\</div><div class='ctx'> 	___ehb</div><div class='ctx'> </div><div class='hunk'>@@ -80,12 +86,23 @@ do {									\</div><div class='ctx'> 	___ssnop;							\</div><div class='ctx'> 	___ehb</div><div class='ctx'> </div><div class='add'>+#define __mtc0_tlbr_hazard						\</div><div class='add'>+	___ssnop;							\</div><div class='add'>+	___ssnop;							\</div><div class='add'>+	___ehb</div><div class='add'>+</div><div class='ctx'> #define __tlbw_use_hazard						\</div><div class='ctx'> 	___ssnop;							\</div><div class='ctx'> 	___ssnop;							\</div><div class='ctx'> 	___ssnop;							\</div><div class='ctx'> 	___ehb</div><div class='ctx'> </div><div class='add'>+#define __tlb_read_hazard						\</div><div class='add'>+	___ssnop;							\</div><div class='add'>+	___ssnop;							\</div><div class='add'>+	___ssnop;							\</div><div class='add'>+	___ehb</div><div class='add'>+</div><div class='ctx'> #define __tlb_probe_hazard						\</div><div class='ctx'> 	___ssnop;							\</div><div class='ctx'> 	___ssnop;							\</div><div class='hunk'>@@ -147,8 +164,12 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> #define __mtc0_tlbw_hazard</div><div class='ctx'> </div><div class='add'>+#define __mtc0_tlbr_hazard</div><div class='add'>+</div><div class='ctx'> #define __tlbw_use_hazard</div><div class='ctx'> </div><div class='add'>+#define __tlb_read_hazard</div><div class='add'>+</div><div class='ctx'> #define __tlb_probe_hazard</div><div class='ctx'> </div><div class='ctx'> #define __irq_enable_hazard</div><div class='hunk'>@@ -166,8 +187,12 @@ do {									\</div><div class='ctx'>  */</div><div class='ctx'> #define __mtc0_tlbw_hazard</div><div class='ctx'> </div><div class='add'>+#define __mtc0_tlbr_hazard</div><div class='add'>+</div><div class='ctx'> #define __tlbw_use_hazard</div><div class='ctx'> </div><div class='add'>+#define __tlb_read_hazard</div><div class='add'>+</div><div class='ctx'> #define __tlb_probe_hazard</div><div class='ctx'> </div><div class='ctx'> #define __irq_enable_hazard</div><div class='hunk'>@@ -196,11 +221,20 @@ do {									\</div><div class='ctx'> 	nop;								\</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='add'>+#define __mtc0_tlbr_hazard						\</div><div class='add'>+	nop;								\</div><div class='add'>+	nop</div><div class='add'>+</div><div class='ctx'> #define __tlbw_use_hazard						\</div><div class='ctx'> 	nop;								\</div><div class='ctx'> 	nop;								\</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='add'>+#define __tlb_read_hazard						\</div><div class='add'>+	nop;								\</div><div class='add'>+	nop;								\</div><div class='add'>+	nop</div><div class='add'>+</div><div class='ctx'> #define __tlb_probe_hazard						\</div><div class='ctx'> 	nop;								\</div><div class='ctx'> 	nop;								\</div><div class='hunk'>@@ -267,7 +301,9 @@ do {									\</div><div class='ctx'> #define _ssnop ___ssnop</div><div class='ctx'> #define	_ehb ___ehb</div><div class='ctx'> #define mtc0_tlbw_hazard __mtc0_tlbw_hazard</div><div class='add'>+#define mtc0_tlbr_hazard __mtc0_tlbr_hazard</div><div class='ctx'> #define tlbw_use_hazard __tlbw_use_hazard</div><div class='add'>+#define tlb_read_hazard __tlb_read_hazard</div><div class='ctx'> #define tlb_probe_hazard __tlb_probe_hazard</div><div class='ctx'> #define irq_enable_hazard __irq_enable_hazard</div><div class='ctx'> #define irq_disable_hazard __irq_disable_hazard</div><div class='hunk'>@@ -300,6 +336,14 @@ do {									\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#define mtc0_tlbr_hazard()						\</div><div class='add'>+do {									\</div><div class='add'>+	__asm__ __volatile__(						\</div><div class='add'>+	__stringify(__mtc0_tlbr_hazard)					\</div><div class='add'>+	);								\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #define tlbw_use_hazard()						\</div><div class='ctx'> do {									\</div><div class='ctx'> 	__asm__ __volatile__(						\</div><div class='hunk'>@@ -308,6 +352,14 @@ do {									\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#define tlb_read_hazard()						\</div><div class='add'>+do {									\</div><div class='add'>+	__asm__ __volatile__(						\</div><div class='add'>+	__stringify(__tlb_read_hazard)					\</div><div class='add'>+	);								\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #define tlb_probe_hazard()						\</div><div class='ctx'> do {									\</div><div class='ctx'> 	__asm__ __volatile__(						\</div><div class='head'>diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h<br/>index fe0d15d32660..982bc0685330 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -38,10 +38,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,</div><div class='ctx'> 					  unsigned long addr,</div><div class='ctx'> 					  unsigned long end,</div><div class='hunk'>@@ -114,15 +110,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/include/asm/i8259.h b/arch/mips/include/asm/i8259.h<br/>index c7e278447c0a..a7fbcd6ed13c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/i8259.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/i8259.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/i8259.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/i8259.h</a></div><div class='hunk'>@@ -41,6 +41,7 @@ extern int i8259A_irq_pending(unsigned int irq);</div><div class='ctx'> extern void make_8259A_irq(unsigned int irq);</div><div class='ctx'> </div><div class='ctx'> extern void init_i8259_irqs(void);</div><div class='add'>+extern int i8259_of_init(struct device_node *node, struct device_node *parent);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Do the traditional i8259 interrupt polling thing.  This is for the few</div><div class='head'>diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h<br/>index d60cc68fa31e..e7b138b4b3d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/irqflags.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/irqflags.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/irqflags.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@ static inline void arch_local_irq_restore(unsigned long flags)</div><div class='ctx'> 	"	.set	push						\n"</div><div class='ctx'> 	"	.set	noreorder					\n"</div><div class='ctx'> 	"	.set	noat						\n"</div><div class='del'>-#if defined(CONFIG_IRQ_CPU)</div><div class='add'>+#if defined(CONFIG_IRQ_MIPS_CPU)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Slow, but doesn't suffer from a relatively unlikely race</div><div class='ctx'> 	 * condition we're having since days 1.</div><div class='hunk'>@@ -90,7 +90,7 @@ static inline void __arch_local_irq_restore(unsigned long flags)</div><div class='ctx'> 	"	.set	push						\n"</div><div class='ctx'> 	"	.set	noreorder					\n"</div><div class='ctx'> 	"	.set	noat						\n"</div><div class='del'>-#if defined(CONFIG_IRQ_CPU)</div><div class='add'>+#if defined(CONFIG_IRQ_MIPS_CPU)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Slow, but doesn't suffer from a relatively unlikely race</div><div class='ctx'> 	 * condition we're having since days 1.</div><div class='head'>diff --git a/arch/mips/include/asm/kgdb.h b/arch/mips/include/asm/kgdb.h<br/>index e6c0b0e14ccb..69dc0df94a96 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/kgdb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/kgdb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/kgdb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/kgdb.h</a></div><div class='hunk'>@@ -33,7 +33,6 @@</div><div class='ctx'> #define CACHE_FLUSH_IS_SAFE	0</div><div class='ctx'> </div><div class='ctx'> extern void arch_kgdb_breakpoint(void);</div><div class='del'>-extern int kgdb_early_setup;</div><div class='ctx'> extern void *saved_vectors[32];</div><div class='ctx'> extern void handle_exception(struct pt_regs *regs);</div><div class='ctx'> extern void breakinst(void);</div><div class='head'>diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h<br/>index 4c25823563fe..e8c8d9d0c45f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -839,7 +839,7 @@ static inline void kvm_arch_hardware_unsetup(void) {}</div><div class='ctx'> static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_free_memslot(struct kvm *kvm,</div><div class='ctx'> 		struct kvm_memory_slot *free, struct kvm_memory_slot *dont) {}</div><div class='del'>-static inline void kvm_arch_memslots_updated(struct kvm *kvm) {}</div><div class='add'>+static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm,</div><div class='ctx'> 		struct kvm_memory_slot *slot) {}</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h<br/>index cd41e93bc1d8..aa3800c82332 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a></div><div class='hunk'>@@ -157,8 +157,8 @@</div><div class='ctx'> #define AR71XX_PLL_REG_ETH0_INT_CLOCK	0x10</div><div class='ctx'> #define AR71XX_PLL_REG_ETH1_INT_CLOCK	0x14</div><div class='ctx'> </div><div class='del'>-#define AR71XX_PLL_DIV_SHIFT		3</div><div class='del'>-#define AR71XX_PLL_DIV_MASK		0x1f</div><div class='add'>+#define AR71XX_PLL_FB_SHIFT		3</div><div class='add'>+#define AR71XX_PLL_FB_MASK		0x1f</div><div class='ctx'> #define AR71XX_CPU_DIV_SHIFT		16</div><div class='ctx'> #define AR71XX_CPU_DIV_MASK		0x3</div><div class='ctx'> #define AR71XX_DDR_DIV_SHIFT		18</div><div class='hunk'>@@ -169,8 +169,8 @@</div><div class='ctx'> #define AR724X_PLL_REG_CPU_CONFIG	0x00</div><div class='ctx'> #define AR724X_PLL_REG_PCIE_CONFIG	0x18</div><div class='ctx'> </div><div class='del'>-#define AR724X_PLL_DIV_SHIFT		0</div><div class='del'>-#define AR724X_PLL_DIV_MASK		0x3ff</div><div class='add'>+#define AR724X_PLL_FB_SHIFT		0</div><div class='add'>+#define AR724X_PLL_FB_MASK		0x3ff</div><div class='ctx'> #define AR724X_PLL_REF_DIV_SHIFT	10</div><div class='ctx'> #define AR724X_PLL_REF_DIV_MASK		0xf</div><div class='ctx'> #define AR724X_AHB_DIV_SHIFT		19</div><div class='hunk'>@@ -183,8 +183,8 @@</div><div class='ctx'> #define AR913X_PLL_REG_ETH0_INT_CLOCK	0x14</div><div class='ctx'> #define AR913X_PLL_REG_ETH1_INT_CLOCK	0x18</div><div class='ctx'> </div><div class='del'>-#define AR913X_PLL_DIV_SHIFT		0</div><div class='del'>-#define AR913X_PLL_DIV_MASK		0x3ff</div><div class='add'>+#define AR913X_PLL_FB_SHIFT		0</div><div class='add'>+#define AR913X_PLL_FB_MASK		0x3ff</div><div class='ctx'> #define AR913X_DDR_DIV_SHIFT		22</div><div class='ctx'> #define AR913X_DDR_DIV_MASK		0x3</div><div class='ctx'> #define AR913X_AHB_DIV_SHIFT		19</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h<br/>index 1557934aaca9..4eee221b0cf0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-ath79/ath79.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ath79.h</a></div><div class='hunk'>@@ -115,7 +115,8 @@ static inline int soc_is_qca955x(void)</div><div class='ctx'> 	return soc_is_qca9556() || soc_is_qca9558();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void __iomem *ath79_ddr_base;</div><div class='add'>+void ath79_ddr_set_pci_windows(void);</div><div class='add'>+</div><div class='ctx'> extern void __iomem *ath79_pll_base;</div><div class='ctx'> extern void __iomem *ath79_reset_base;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h<br/>index aa2283e602fc..aa71216edf99 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-ath79/ath79_spi_platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ath79/ath79_spi_platform.h</a></div><div class='hunk'>@@ -16,8 +16,4 @@ struct ath79_spi_platform_data {</div><div class='ctx'> 	unsigned	num_chipselect;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ath79_spi_controller_data {</div><div class='del'>-	unsigned	gpio;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #endif /* _ATH79_SPI_PLATFORM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h<br/>index 8ed77f618940..1461c10c1c4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a></div><div class='hunk'>@@ -52,10 +52,6 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,</div><div class='ctx'> void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,</div><div class='ctx'> 				const char *prefix);</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_BCM47XX_BCMA</div><div class='del'>-void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,</div><div class='del'>-				 const char *prefix);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> void bcm47xx_set_system_type(u16 chip_id);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h<br/>index c41d1dce1062..2afb84072ad0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h</a></div><div class='hunk'>@@ -80,6 +80,8 @@ enum bcm47xx_board {</div><div class='ctx'> 	BCM47XX_BOARD_LINKSYS_WRT610NV2,</div><div class='ctx'> 	BCM47XX_BOARD_LINKSYS_WRTSL54GS,</div><div class='ctx'> </div><div class='add'>+	BCM47XX_BOARD_LUXUL_XWR_1750_V1,</div><div class='add'>+</div><div class='ctx'> 	BCM47XX_BOARD_MICROSOFT_MN700,</div><div class='ctx'> </div><div class='ctx'> 	BCM47XX_BOARD_MOTOROLA_WE800G,</div><div class='head'>diff --git a/arch/mips/include/asm/mach-bcm63xx/spaces.h b/arch/mips/include/asm/mach-bcm63xx/spaces.h<br/>index 61e750fb4653..1410ed0da4df 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm63xx/spaces.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-bcm63xx/spaces.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm63xx/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bcm63xx/spaces.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #ifndef _ASM_BCM63XX_SPACES_H</div><div class='ctx'> #define _ASM_BCM63XX_SPACES_H</div><div class='ctx'> </div><div class='del'>-#define FIXADDR_TOP		((unsigned long)(long)(int)0xff000000)</div><div class='add'>+#include &lt;asm/bmips-spaces.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-generic/spaces.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-bmips/spaces.h b/arch/mips/include/asm/mach-bmips/spaces.h<br/>index 1b05bddc8ec5..c59b28fd9e1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bmips/spaces.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-bmips/spaces.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bmips/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-bmips/spaces.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define _ASM_BMIPS_SPACES_H</div><div class='ctx'> </div><div class='ctx'> /* Avoid collisions with system base register (SBR) region on BMIPS3300 */</div><div class='del'>-#define FIXADDR_TOP		((unsigned long)(long)(int)0xff000000)</div><div class='add'>+#include &lt;asm/bmips-spaces.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-generic/spaces.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h b/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h<br/>index bdf045fb00c8..21eae03d752a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-dec/cpu-feature-overrides.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-dec/cpu-feature-overrides.h</a></div><div class='hunk'>@@ -14,6 +14,13 @@</div><div class='ctx'> </div><div class='ctx'> /* Generic ones first.  */</div><div class='ctx'> #define cpu_has_tlb			1</div><div class='add'>+#define cpu_has_tlbinv			0</div><div class='add'>+#define cpu_has_segments		0</div><div class='add'>+#define cpu_has_eva			0</div><div class='add'>+#define cpu_has_htw			0</div><div class='add'>+#define cpu_has_rixiex			0</div><div class='add'>+#define cpu_has_maar			0</div><div class='add'>+#define cpu_has_rw_llb			0</div><div class='ctx'> #define cpu_has_tx39_cache		0</div><div class='ctx'> #define cpu_has_divec			0</div><div class='ctx'> #define cpu_has_prefetch		0</div><div class='hunk'>@@ -24,6 +31,7 @@</div><div class='ctx'> #define cpu_has_mips3d			0</div><div class='ctx'> #define cpu_has_smartmips		0</div><div class='ctx'> #define cpu_has_rixi			0</div><div class='add'>+#define cpu_has_xpa			0</div><div class='ctx'> #define cpu_has_vtag_icache		0</div><div class='ctx'> #define cpu_has_ic_fills_f_dc		0</div><div class='ctx'> #define cpu_has_pindexed_dcache		0</div><div class='hunk'>@@ -36,11 +44,18 @@</div><div class='ctx'> #define cpu_has_mips64r1		0</div><div class='ctx'> #define cpu_has_mips64r2		0</div><div class='ctx'> #define cpu_has_dsp			0</div><div class='add'>+#define cpu_has_dsp2			0</div><div class='ctx'> #define cpu_has_mipsmt			0</div><div class='ctx'> #define cpu_has_userlocal		0</div><div class='add'>+#define cpu_hwrena_impl_bits		0</div><div class='add'>+#define cpu_has_perf_cntr_intr_bit	0</div><div class='add'>+#define cpu_has_vz			0</div><div class='add'>+#define cpu_has_fre			0</div><div class='add'>+#define cpu_has_cdmm			0</div><div class='ctx'> </div><div class='ctx'> /* R3k-specific ones.  */</div><div class='ctx'> #ifdef CONFIG_CPU_R3000</div><div class='add'>+#define cpu_has_3kex			1</div><div class='ctx'> #define cpu_has_4kex			0</div><div class='ctx'> #define cpu_has_3k_cache		1</div><div class='ctx'> #define cpu_has_4k_cache		0</div><div class='hunk'>@@ -63,6 +78,7 @@</div><div class='ctx'> </div><div class='ctx'> /* R4k-specific ones.  */</div><div class='ctx'> #ifdef CONFIG_CPU_R4X00</div><div class='add'>+#define cpu_has_3kex			0</div><div class='ctx'> #define cpu_has_4kex			1</div><div class='ctx'> #define cpu_has_3k_cache		0</div><div class='ctx'> #define cpu_has_4k_cache		1</div><div class='head'>diff --git a/arch/mips/include/asm/mach-generic/irq.h b/arch/mips/include/asm/mach-generic/irq.h<br/>index 050e18bb1a04..be546a0f65fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-generic/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-generic/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-generic/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-generic/irq.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IRQ_CPU</div><div class='add'>+#ifdef CONFIG_IRQ_MIPS_CPU</div><div class='ctx'> </div><div class='ctx'> #ifndef MIPS_CPU_IRQ_BASE</div><div class='ctx'> #ifdef CONFIG_I8259</div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_IRQ_CPU */</div><div class='add'>+#endif /* CONFIG_IRQ_MIPS_CPU */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MIPS_GIC</div><div class='ctx'> #ifndef MIPS_GIC_IRQ_BASE</div><div class='head'>diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h<br/>index 9488fa5f8866..afc96ecb9004 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-generic/spaces.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-generic/spaces.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-generic/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-generic/spaces.h</a></div><div class='hunk'>@@ -94,7 +94,11 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifndef FIXADDR_TOP</div><div class='add'>+#ifdef CONFIG_KVM_GUEST</div><div class='add'>+#define FIXADDR_TOP		((unsigned long)(long)(int)0x7ffe0000)</div><div class='add'>+#else</div><div class='ctx'> #define FIXADDR_TOP		((unsigned long)(long)(int)0xfffe0000)</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_MACH_GENERIC_SPACES_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h<br/>index d6111aa2e886..7449794eade6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h</a></div><div class='hunk'>@@ -11,47 +11,69 @@</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * IP27 only comes with R10000 family processors all using the same config</div><div class='add'>+ * IP27 only comes with R1x000 family processors, all using the same config</div><div class='ctx'>  */</div><div class='del'>-#define cpu_has_watch		1</div><div class='del'>-#define cpu_has_mips16		0</div><div class='del'>-#define cpu_has_divec		0</div><div class='del'>-#define cpu_has_vce		0</div><div class='del'>-#define cpu_has_cache_cdex_p	0</div><div class='del'>-#define cpu_has_cache_cdex_s	0</div><div class='del'>-#define cpu_has_prefetch	1</div><div class='del'>-#define cpu_has_mcheck		0</div><div class='del'>-#define cpu_has_ejtag		0</div><div class='add'>+#define cpu_has_tlb			1</div><div class='add'>+#define cpu_has_tlbinv			0</div><div class='add'>+#define cpu_has_segments		0</div><div class='add'>+#define cpu_has_eva			0</div><div class='add'>+#define cpu_has_htw			0</div><div class='add'>+#define cpu_has_rixiex			0</div><div class='add'>+#define cpu_has_maar			0</div><div class='add'>+#define cpu_has_rw_llb			0</div><div class='add'>+#define cpu_has_3kex			0</div><div class='add'>+#define cpu_has_4kex			1</div><div class='add'>+#define cpu_has_3k_cache		0</div><div class='add'>+#define cpu_has_4k_cache		1</div><div class='add'>+#define cpu_has_6k_cache		0</div><div class='add'>+#define cpu_has_8k_cache		0</div><div class='add'>+#define cpu_has_tx39_cache		0</div><div class='add'>+#define cpu_has_fpu			1</div><div class='add'>+#define cpu_has_nofpuex			0</div><div class='add'>+#define cpu_has_32fpr			1</div><div class='add'>+#define cpu_has_counter			1</div><div class='add'>+#define cpu_has_watch			1</div><div class='add'>+#define cpu_has_64bits			1</div><div class='add'>+#define cpu_has_divec			0</div><div class='add'>+#define cpu_has_vce			0</div><div class='add'>+#define cpu_has_cache_cdex_p		0</div><div class='add'>+#define cpu_has_cache_cdex_s		0</div><div class='add'>+#define cpu_has_prefetch		1</div><div class='add'>+#define cpu_has_mcheck			0</div><div class='add'>+#define cpu_has_ejtag			0</div><div class='add'>+#define cpu_has_llsc			1</div><div class='add'>+#define cpu_has_mips16			0</div><div class='add'>+#define cpu_has_mdmx			0</div><div class='add'>+#define cpu_has_mips3d			0</div><div class='add'>+#define cpu_has_smartmips		0</div><div class='add'>+#define cpu_has_rixi			0</div><div class='add'>+#define cpu_has_xpa			0</div><div class='add'>+#define cpu_has_vtag_icache		0</div><div class='add'>+#define cpu_has_dc_aliases		0</div><div class='add'>+#define cpu_has_ic_fills_f_dc		0</div><div class='ctx'> </div><div class='del'>-#define cpu_has_llsc		1</div><div class='del'>-#define cpu_has_vtag_icache	0</div><div class='del'>-#define cpu_has_dc_aliases	0</div><div class='del'>-#define cpu_has_ic_fills_f_dc	0</div><div class='del'>-#define cpu_has_dsp		0</div><div class='del'>-#define cpu_has_dsp2		0</div><div class='ctx'> #define cpu_icache_snoops_remote_store	1</div><div class='del'>-#define cpu_has_mipsmt		0</div><div class='del'>-#define cpu_has_userlocal	0</div><div class='ctx'> </div><div class='del'>-#define cpu_has_nofpuex		0</div><div class='del'>-#define cpu_has_64bits		1</div><div class='del'>-</div><div class='del'>-#define cpu_has_4kex		1</div><div class='del'>-#define cpu_has_3k_cache	0</div><div class='del'>-#define cpu_has_6k_cache	0</div><div class='del'>-#define cpu_has_4k_cache	1</div><div class='del'>-#define cpu_has_8k_cache	0</div><div class='del'>-#define cpu_has_tx39_cache	0</div><div class='add'>+#define cpu_has_mips32r1		0</div><div class='add'>+#define cpu_has_mips32r2		0</div><div class='add'>+#define cpu_has_mips64r1		0</div><div class='add'>+#define cpu_has_mips64r2		0</div><div class='add'>+#define cpu_has_mips32r6		0</div><div class='add'>+#define cpu_has_mips64r6		0</div><div class='ctx'> </div><div class='add'>+#define cpu_has_dsp			0</div><div class='add'>+#define cpu_has_dsp2			0</div><div class='add'>+#define cpu_has_mipsmt			0</div><div class='add'>+#define cpu_has_userlocal		0</div><div class='ctx'> #define cpu_has_inclusive_pcaches	1</div><div class='add'>+#define cpu_hwrena_impl_bits		0</div><div class='add'>+#define cpu_has_perf_cntr_intr_bit	0</div><div class='add'>+#define cpu_has_vz			0</div><div class='add'>+#define cpu_has_fre			0</div><div class='add'>+#define cpu_has_cdmm			0</div><div class='ctx'> </div><div class='del'>-#define cpu_dcache_line_size()	32</div><div class='del'>-#define cpu_icache_line_size()	64</div><div class='del'>-#define cpu_scache_line_size()	128</div><div class='del'>-</div><div class='del'>-#define cpu_has_mips32r1	0</div><div class='del'>-#define cpu_has_mips32r2	0</div><div class='del'>-#define cpu_has_mips64r1	0</div><div class='del'>-#define cpu_has_mips64r2	0</div><div class='add'>+#define cpu_dcache_line_size()		32</div><div class='add'>+#define cpu_icache_line_size()		64</div><div class='add'>+#define cpu_scache_line_size()		128</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-jz4740/clock.h b/arch/mips/include/asm/mach-jz4740/clock.h<br/>index 16659cd76d4e..104d2dfe1e36 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/clock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-jz4740/clock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/clock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/clock.h</a></div><div class='hunk'>@@ -22,6 +22,9 @@ enum jz4740_wait_mode {</div><div class='ctx'> </div><div class='ctx'> void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode);</div><div class='ctx'> </div><div class='add'>+void jz4740_clock_suspend(void);</div><div class='add'>+void jz4740_clock_resume(void);</div><div class='add'>+</div><div class='ctx'> void jz4740_clock_udc_enable_auto_suspend(void);</div><div class='ctx'> void jz4740_clock_udc_disable_auto_suspend(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h<br/>index a225baaa215d..0933f94a1e69 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h</a></div><div class='hunk'>@@ -12,8 +12,6 @@</div><div class='ctx'> #define cpu_has_3k_cache	0</div><div class='ctx'> #define cpu_has_4k_cache	1</div><div class='ctx'> #define cpu_has_tx39_cache	0</div><div class='del'>-#define cpu_has_fpu		0</div><div class='del'>-#define cpu_has_32fpr	0</div><div class='ctx'> #define cpu_has_counter		0</div><div class='ctx'> #define cpu_has_watch		1</div><div class='ctx'> #define cpu_has_divec		1</div><div class='hunk'>@@ -34,7 +32,6 @@</div><div class='ctx'> #define cpu_has_ic_fills_f_dc	0</div><div class='ctx'> #define cpu_has_pindexed_dcache 0</div><div class='ctx'> #define cpu_has_mips32r1	1</div><div class='del'>-#define cpu_has_mips32r2	0</div><div class='ctx'> #define cpu_has_mips64r1	0</div><div class='ctx'> #define cpu_has_mips64r2	0</div><div class='ctx'> #define cpu_has_dsp		0</div><div class='head'>diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h<br/>index df50736749c1..9b439fc218bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-jz4740/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/irq.h</a></div><div class='hunk'>@@ -19,6 +19,12 @@</div><div class='ctx'> #define MIPS_CPU_IRQ_BASE 0</div><div class='ctx'> #define JZ4740_IRQ_BASE 8</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MACH_JZ4740</div><div class='add'>+# define NR_INTC_IRQS	32</div><div class='add'>+#else</div><div class='add'>+# define NR_INTC_IRQS	64</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* 1st-level interrupts */</div><div class='ctx'> #define JZ4740_IRQ(x)		(JZ4740_IRQ_BASE + (x))</div><div class='ctx'> #define JZ4740_IRQ_I2C		JZ4740_IRQ(1)</div><div class='hunk'>@@ -44,13 +50,15 @@</div><div class='ctx'> #define JZ4740_IRQ_IPU		JZ4740_IRQ(29)</div><div class='ctx'> #define JZ4740_IRQ_LCD		JZ4740_IRQ(30)</div><div class='ctx'> </div><div class='add'>+#define JZ4780_IRQ_TCU2		JZ4740_IRQ(25)</div><div class='add'>+</div><div class='ctx'> /* 2nd-level interrupts */</div><div class='del'>-#define JZ4740_IRQ_DMA(x)	(JZ4740_IRQ(32) + (x))</div><div class='add'>+#define JZ4740_IRQ_DMA(x)	(JZ4740_IRQ(NR_INTC_IRQS) + (x))</div><div class='ctx'> </div><div class='ctx'> #define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x))</div><div class='del'>-#define JZ4740_IRQ_GPIO(x)	(JZ4740_IRQ(48) + (x))</div><div class='add'>+#define JZ4740_IRQ_GPIO(x)	(JZ4740_IRQ(NR_INTC_IRQS + 16) + (x))</div><div class='ctx'> </div><div class='del'>-#define JZ4740_IRQ_ADC_BASE	JZ4740_IRQ(176)</div><div class='add'>+#define JZ4740_IRQ_ADC_BASE	JZ4740_IRQ(NR_INTC_IRQS + 144)</div><div class='ctx'> </div><div class='ctx'> #define NR_IRQS (JZ4740_IRQ_ADC_BASE + 6)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h<br/>index 069b43a9da6f..32cfbe6a191b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/platform.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-jz4740/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-jz4740/platform.h</a></div><div class='hunk'>@@ -35,6 +35,4 @@ extern struct platform_device jz4740_wdt_device;</div><div class='ctx'> extern struct platform_device jz4740_pwm_device;</div><div class='ctx'> extern struct platform_device jz4740_dma_device;</div><div class='ctx'> </div><div class='del'>-void jz4740_serial_device_register(void);</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/workarounds.h b/arch/mips/include/asm/mach-loongson/workarounds.h<br/>deleted file mode 100644<br/>index e180c1422eae..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/workarounds.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/workarounds.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_WORKAROUNDS_H_</div><div class='del'>-#define __ASM_MACH_LOONGSON_WORKAROUNDS_H_</div><div class='del'>-</div><div class='del'>-#define WORKAROUND_CPUFREQ	0x00000001</div><div class='del'>-#define WORKAROUND_CPUHOTPLUG	0x00000002</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/cpufreq.h b/arch/mips/include/asm/mach-loongson32/cpufreq.h<br/>index e7765ce30bcf..6843fa1a608d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/cpufreq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/cpufreq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/cpufreq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/cpufreq.h</a></div><div class='hunk'>@@ -10,8 +10,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_CPUFREQ_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_CPUFREQ_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_CPUFREQ_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_CPUFREQ_H</div><div class='ctx'> </div><div class='ctx'> struct plat_ls1x_cpufreq {</div><div class='ctx'> 	const char	*clk_name;	/* CPU clk */</div><div class='hunk'>@@ -20,4 +20,4 @@ struct plat_ls1x_cpufreq {</div><div class='ctx'> 	unsigned int	min_freq;	/* in kHz */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_CPUFREQ_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_CPUFREQ_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/irq.h b/arch/mips/include/asm/mach-loongson32/irq.h<br/>index 96bfb1c1c73d..0d35b994e8d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/irq.h</a></div><div class='hunk'>@@ -10,8 +10,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_IRQ_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_IRQ_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_IRQ_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_IRQ_H</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CPU core Interrupt Numbers</div><div class='hunk'>@@ -70,4 +70,4 @@</div><div class='ctx'> </div><div class='ctx'> #define NR_IRQS			(MIPS_CPU_IRQS + LS1X_IRQS)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_IRQ_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_IRQ_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/loongson1.h b/arch/mips/include/asm/mach-loongson32/loongson1.h<br/>index 20e0c2b155dd..12aa129aad80 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/loongson1.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/loongson1.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/loongson1.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/loongson1.h</a></div><div class='hunk'>@@ -10,8 +10,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_LOONGSON1_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_LOONGSON1_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_LOONGSON1_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_LOONGSON1_H</div><div class='ctx'> </div><div class='ctx'> #define DEFAULT_MEMSIZE			256	/* If no memsize provided */</div><div class='ctx'> </div><div class='hunk'>@@ -47,4 +47,4 @@</div><div class='ctx'> #include &lt;regs-pwm.h&gt;</div><div class='ctx'> #include &lt;regs-wdt.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_LOONGSON1_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/platform.h b/arch/mips/include/asm/mach-loongson32/platform.h<br/>index 47de55e0c835..c32f03f3f72c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/platform.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/platform.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/platform.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_PLATFORM_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_PLATFORM_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_PLATFORM_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_PLATFORM_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -23,4 +23,4 @@ extern struct platform_device ls1x_rtc_pdev;</div><div class='ctx'> extern void __init ls1x_clk_init(void);</div><div class='ctx'> extern void __init ls1x_serial_setup(struct platform_device *pdev);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_PLATFORM_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_PLATFORM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/prom.h b/arch/mips/include/asm/mach-loongson32/prom.h<br/>index 34859a4d4ac4..a08503c0ba20 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/prom.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/prom.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/prom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/prom.h</a></div><div class='hunk'>@@ -7,8 +7,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_PROM_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_PROM_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_PROM_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_PROM_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -21,4 +21,4 @@ extern unsigned long memsize, highmemsize;</div><div class='ctx'> extern char *prom_getenv(char *name);</div><div class='ctx'> extern void __init prom_init_cmdline(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_PROM_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_PROM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/regs-clk.h b/arch/mips/include/asm/mach-loongson32/regs-clk.h<br/>index ee2445b10fc3..1f5a715ac841 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/regs-clk.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/regs-clk.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/regs-clk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-clk.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_REGS_CLK_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_REGS_CLK_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_REGS_CLK_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_REGS_CLK_H</div><div class='ctx'> </div><div class='ctx'> #define LS1X_CLK_REG(x) \</div><div class='ctx'> 		((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x)))</div><div class='hunk'>@@ -48,4 +48,4 @@</div><div class='ctx'> #define BYPASS_DDR_WIDTH		1</div><div class='ctx'> #define BYPASS_CPU_WIDTH		1</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_REGS_CLK_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/regs-mux.h b/arch/mips/include/asm/mach-loongson32/regs-mux.h<br/>index fb1e36efaa19..8302d92f2da2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/regs-mux.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/regs-mux.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/regs-mux.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-mux.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_REGS_MUX_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_REGS_MUX_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_REGS_MUX_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_REGS_MUX_H</div><div class='ctx'> </div><div class='ctx'> #define LS1X_MUX_REG(x) \</div><div class='ctx'> 		((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x)))</div><div class='hunk'>@@ -64,4 +64,4 @@</div><div class='ctx'> #define GMAC1_USE_PWM23			(0x1 &lt;&lt; 1)</div><div class='ctx'> #define GMAC0_USE_PWM01			0x1</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_REGS_MUX_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_REGS_MUX_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/regs-pwm.h b/arch/mips/include/asm/mach-loongson32/regs-pwm.h<br/>index 99f2bcc586f0..69f174ed13a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/regs-pwm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/regs-pwm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/regs-pwm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-pwm.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_REGS_PWM_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_REGS_PWM_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_REGS_PWM_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_REGS_PWM_H</div><div class='ctx'> </div><div class='ctx'> /* Loongson 1 PWM Timer Register Definitions */</div><div class='ctx'> #define PWM_CNT			0x0</div><div class='hunk'>@@ -26,4 +26,4 @@</div><div class='ctx'> #define PWM_OE			(0x1 &lt;&lt; 3)</div><div class='ctx'> #define CNT_EN			0x1</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_REGS_PWM_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_REGS_PWM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson1/regs-wdt.h b/arch/mips/include/asm/mach-loongson32/regs-wdt.h<br/>index c39ee982ad3b..6644ab6d3391 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson1/regs-wdt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson1/regs-wdt.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson32/regs-wdt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson32/regs-wdt.h</a></div><div class='hunk'>@@ -9,11 +9,11 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON1_REGS_WDT_H</div><div class='del'>-#define __ASM_MACH_LOONGSON1_REGS_WDT_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON32_REGS_WDT_H</div><div class='add'>+#define __ASM_MACH_LOONGSON32_REGS_WDT_H</div><div class='ctx'> </div><div class='ctx'> #define WDT_EN			0x0</div><div class='ctx'> #define WDT_TIMER		0x4</div><div class='ctx'> #define WDT_SET			0x8</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON1_REGS_WDT_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON32_REGS_WDT_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/boot_param.h b/arch/mips/include/asm/mach-loongson64/boot_param.h<br/>index fa802926523f..d3f3258b7cd4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/boot_param.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/boot_param.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/boot_param.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/boot_param.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_BOOT_PARAM_H_</div><div class='del'>-#define __ASM_MACH_LOONGSON_BOOT_PARAM_H_</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_BOOT_PARAM_H_</div><div class='add'>+#define __ASM_MACH_LOONGSON64_BOOT_PARAM_H_</div><div class='ctx'> </div><div class='ctx'> #define SYSTEM_RAM_LOW		1</div><div class='ctx'> #define SYSTEM_RAM_HIGH		2</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h<br/>index acc376897e46..98963c2c7be4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h</a></div><div class='hunk'>@@ -13,8 +13,8 @@</div><div class='ctx'>  *	loongson2f user manual.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H</div><div class='ctx'> </div><div class='ctx'> #define cpu_dcache_line_size()	32</div><div class='ctx'> #define cpu_icache_line_size()	32</div><div class='hunk'>@@ -58,4 +58,4 @@</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_wsbh		IS_ENABLED(CONFIG_CPU_LOONGSON3)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h b/arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h<br/>index a0ee0cb775ad..a0ee0cb775ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/cs5536/cs5536.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h b/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_mfgpt.h<br/>index 021d0172dad6..021d0172dad6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_mfgpt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_mfgpt.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h b/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_pci.h<br/>index 8a7ecb4d5c64..8a7ecb4d5c64 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_pci.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h b/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_vsm.h<br/>index 1f17c1815ee5..1f17c1815ee5 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/cs5536/cs5536_vsm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/cs5536/cs5536_vsm.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson64/dma-coherence.h<br/>index 4bf4e19f72e8..1602a9e9e8c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/dma-coherence.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/dma-coherence.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/dma-coherence.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/dma-coherence.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_DMA_COHERENCE_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_DMA_COHERENCE_H</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SWIOTLB</div><div class='ctx'> #include &lt;linux/swiotlb.h&gt;</div><div class='hunk'>@@ -82,4 +82,4 @@ static inline void plat_post_dma_flush(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_DMA_COHERENCE_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/gpio.h b/arch/mips/include/asm/mach-loongson64/gpio.h<br/>index b3b216904a9a..b3b216904a9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/gpio.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/gpio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/gpio.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h<br/>index a281cca5f2fb..d18c45c7c394 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/irq.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_IRQ_H_</div><div class='del'>-#define __ASM_MACH_LOONGSON_IRQ_H_</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_IRQ_H_</div><div class='add'>+#define __ASM_MACH_LOONGSON64_IRQ_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;boot_param.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -40,4 +40,4 @@ extern void fixup_irqs(void);</div><div class='ctx'> extern void loongson3_ipi_interrupt(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #include_next &lt;irq.h&gt;</div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_IRQ_H_ */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h<br/>index df5fca8eeb80..3f2f84f6c401 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/kernel-entry-init.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/kernel-entry-init.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/kernel-entry-init.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)</div><div class='ctx'>  * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_KERNEL_ENTRY_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_KERNEL_ENTRY_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Override macros used in arch/mips/kernel/head.S.</div><div class='hunk'>@@ -49,4 +49,4 @@</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_KERNEL_ENTRY_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson64/loongson.h<br/>index 9783103fd6f6..d1ff774ac4b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/loongson.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/loongson.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/loongson.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/loongson.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_LOONGSON_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_LOONGSON_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_LOONGSON_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_LOONGSON_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -357,4 +357,4 @@ extern unsigned long _loongson_addrwincfg_base;</div><div class='ctx'> </div><div class='ctx'> #endif	/* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/loongson_hwmon.h b/arch/mips/include/asm/mach-loongson64/loongson_hwmon.h<br/>index 4431fc54a36c..4431fc54a36c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/loongson_hwmon.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/loongson_hwmon.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/loongson_hwmon.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/loongson_hwmon.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/machine.h b/arch/mips/include/asm/mach-loongson64/machine.h<br/>index cb2b60249cd2..c52549bb4e56 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/machine.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/machine.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/machine.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/machine.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_MACHINE_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_MACHINE_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_MACHINE_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_MACHINE_H</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_LEMOTE_FULOONG2E</div><div class='ctx'> </div><div class='hunk'>@@ -30,4 +30,4 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_LOONGSON_MACH3X */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_MACHINE_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_MACHINE_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/mc146818rtc.h b/arch/mips/include/asm/mach-loongson64/mc146818rtc.h<br/>index ed7fe978335a..ebdccfee50be 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/mc146818rtc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/mc146818rtc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/mc146818rtc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mc146818rtc.h</a></div><div class='hunk'>@@ -7,8 +7,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * RTC routines for PC style attached Dallas chip.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_MC146818RTC_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_MC146818RTC_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_MC146818RTC_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -33,4 +33,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)</div><div class='ctx'> #define mc146818_decode_year(year) ((year) &lt; 70 ? (year) + 2000 : (year) + 1970)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_MC146818RTC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson64/mem.h<br/>index f4a36d7dbfab..75c16bead536 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/mem.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/mem.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/mem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mem.h</a></div><div class='hunk'>@@ -8,8 +8,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_MEM_H</div><div class='del'>-#define __ASM_MACH_LOONGSON_MEM_H</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_MEM_H</div><div class='add'>+#define __ASM_MACH_LOONGSON64_MEM_H</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * high memory space</div><div class='hunk'>@@ -38,4 +38,4 @@</div><div class='ctx'> #define LOONGSON_MMIO_MEM_END	0x80000000</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_MACH_LOONGSON_MEM_H */</div><div class='add'>+#endif /* __ASM_MACH_LOONGSON64_MEM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/mmzone.h b/arch/mips/include/asm/mach-loongson64/mmzone.h<br/>index 37c08a27b4f0..c9f7e231e66b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/mmzone.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/mmzone.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/mmzone.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/mmzone.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2010 Loongson Inc. &amp; Lemote Inc. &amp;</div><div class='del'>- *                    Insititute of Computing Technology</div><div class='add'>+ *                    Institute of Computing Technology</div><div class='ctx'>  * Author:  Xiang Gao, gaoxiang@ict.ac.cn</div><div class='ctx'>  *          Huacai Chen, chenhc@lemote.com</div><div class='ctx'>  *          Xiaofu Meng, Shuangshuang Zhang</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson64/pci.h<br/>index 1212774f66ef..3401f557434a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/pci.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'>  * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_PCI_H_</div><div class='del'>-#define __ASM_MACH_LOONGSON_PCI_H_</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_PCI_H_</div><div class='add'>+#define __ASM_MACH_LOONGSON64_PCI_H_</div><div class='ctx'> </div><div class='ctx'> extern struct pci_ops loongson_pci_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -52,4 +52,4 @@ extern struct pci_ops loongson_pci_ops;</div><div class='ctx'> </div><div class='ctx'> #endif	/* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */</div><div class='add'>+#endif /* !__ASM_MACH_LOONGSON64_PCI_H_ */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/spaces.h b/arch/mips/include/asm/mach-loongson64/spaces.h<br/>index e2506ee90044..c6040b9fcf94 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/spaces.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/spaces.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/spaces.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/spaces.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON_SPACES_H_</div><div class='del'>-#define __ASM_MACH_LOONGSON_SPACES_H_</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_SPACES_H_</div><div class='add'>+#define __ASM_MACH_LOONGSON64_SPACES_H_</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_64BIT)</div><div class='ctx'> #define CAC_BASE        _AC(0x9800000000000000, UL)</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson/topology.h b/arch/mips/include/asm/mach-loongson64/topology.h<br/>index 0d8f3b55bdbc..0d8f3b55bdbc 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-loongson/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/topology.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson64/workarounds.h b/arch/mips/include/asm/mach-loongson64/workarounds.h<br/>new file mode 100644<br/>index 000000000000..e659f041e116<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-loongson64/workarounds.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-loongson64/workarounds.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#ifndef __ASM_MACH_LOONGSON64_WORKAROUNDS_H_</div><div class='add'>+#define __ASM_MACH_LOONGSON64_WORKAROUNDS_H_</div><div class='add'>+</div><div class='add'>+#define WORKAROUND_CPUFREQ	0x00000001</div><div class='add'>+#define WORKAROUND_CPUHOTPLUG	0x00000002</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h<br/>index 0a227d426b9c..520f8fc2c806 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-sibyte/war.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mach-sibyte/war.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-sibyte/war.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mach-sibyte/war.h</a></div><div class='hunk'>@@ -13,8 +13,7 @@</div><div class='ctx'> #define R4600_V2_HIT_CACHEOP_WAR	0</div><div class='ctx'> #define R5432_CP0_INTERRUPT_WAR		0</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \</div><div class='del'>-    defined(CONFIG_SB1_PASS_2_WORKAROUNDS)</div><div class='add'>+#if defined(CONFIG_SB1_PASS_2_WORKAROUNDS)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> extern int sb1250_m3_workaround_needed(void);</div><div class='head'>diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h<br/>index 59c0901bdd84..edc7ee95269e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mips-cm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mips-cm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mips-cm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mips-cm.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #ifndef __MIPS_ASM_MIPS_CM_H__</div><div class='ctx'> #define __MIPS_ASM_MIPS_CM_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -216,6 +217,10 @@ BUILD_CM_Cx_R_(tcid_8_priority,	0x80)</div><div class='ctx'> #define CM_GCR_CPC_BASE_CPCEN_SHF		0</div><div class='ctx'> #define CM_GCR_CPC_BASE_CPCEN_MSK		(_ULCAST_(0x1) &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+/* GCR_GIC_STATUS register fields */</div><div class='add'>+#define CM_GCR_GIC_STATUS_GICEX_SHF		0</div><div class='add'>+#define CM_GCR_GIC_STATUS_GICEX_MSK		(_ULCAST_(0x1) &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> /* GCR_REGn_BASE register fields */</div><div class='ctx'> #define CM_GCR_REGn_BASE_BASEADDR_SHF		16</div><div class='ctx'> #define CM_GCR_REGn_BASE_BASEADDR_MSK		(_ULCAST_(0xffff) &lt;&lt; 16)</div><div class='head'>diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h<br/>index 764e2756b54d..c5b0956a8530 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mipsregs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/mipsregs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mipsregs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/mipsregs.h</a></div><div class='hunk'>@@ -589,6 +589,28 @@</div><div class='ctx'> /*  EntryHI bit definition */</div><div class='ctx'> #define MIPS_ENTRYHI_EHINV	(_ULCAST_(1) &lt;&lt; 10)</div><div class='ctx'> </div><div class='add'>+/* R3000 EntryLo bit definitions */</div><div class='add'>+#define R3K_ENTRYLO_G		(_ULCAST_(1) &lt;&lt; 8)</div><div class='add'>+#define R3K_ENTRYLO_V		(_ULCAST_(1) &lt;&lt; 9)</div><div class='add'>+#define R3K_ENTRYLO_D		(_ULCAST_(1) &lt;&lt; 10)</div><div class='add'>+#define R3K_ENTRYLO_N		(_ULCAST_(1) &lt;&lt; 11)</div><div class='add'>+</div><div class='add'>+/* R4000 compatible EntryLo bit definitions */</div><div class='add'>+#define MIPS_ENTRYLO_G		(_ULCAST_(1) &lt;&lt; 0)</div><div class='add'>+#define MIPS_ENTRYLO_V		(_ULCAST_(1) &lt;&lt; 1)</div><div class='add'>+#define MIPS_ENTRYLO_D		(_ULCAST_(1) &lt;&lt; 2)</div><div class='add'>+#define MIPS_ENTRYLO_C_SHIFT	3</div><div class='add'>+#define MIPS_ENTRYLO_C		(_ULCAST_(7) &lt;&lt; MIPS_ENTRYLO_C_SHIFT)</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+/* as read by dmfc0 */</div><div class='add'>+#define MIPS_ENTRYLO_XI		(_ULCAST_(1) &lt;&lt; 62)</div><div class='add'>+#define MIPS_ENTRYLO_RI		(_ULCAST_(1) &lt;&lt; 63)</div><div class='add'>+#else</div><div class='add'>+/* as read by mfc0 */</div><div class='add'>+#define MIPS_ENTRYLO_XI		(_ULCAST_(1) &lt;&lt; 30)</div><div class='add'>+#define MIPS_ENTRYLO_RI		(_ULCAST_(1) &lt;&lt; 31)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* CMGCRBase bit definitions */</div><div class='ctx'> #define MIPS_CMGCRB_BASE	11</div><div class='ctx'> #define MIPS_CMGCRF_BASE	(~_ULCAST_((1 &lt;&lt; MIPS_CMGCRB_BASE) - 1))</div><div class='hunk'>@@ -685,6 +707,15 @@</div><div class='ctx'> #define TX39_CONF_DRSIZE_SHIFT	0</div><div class='ctx'> #define TX39_CONF_DRSIZE_MASK	0x00000003</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Interesting Bits in the R10K CP0 Branch Diagnostic Register</div><div class='add'>+ */</div><div class='add'>+/* Disable Branch Target Address Cache */</div><div class='add'>+#define R10K_DIAG_D_BTAC	(_ULCAST_(1) &lt;&lt; 27)</div><div class='add'>+/* Enable Branch Prediction Global History */</div><div class='add'>+#define R10K_DIAG_E_GHIST	(_ULCAST_(1) &lt;&lt; 26)</div><div class='add'>+/* Disable Branch Return Cache */</div><div class='add'>+#define R10K_DIAG_D_BRC		(_ULCAST_(1) &lt;&lt; 22)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Coprocessor 1 (FPU) register names</div><div class='hunk'>@@ -1247,6 +1278,10 @@ do {									\</div><div class='ctx'> #define read_c0_diag()		__read_32bit_c0_register($22, 0)</div><div class='ctx'> #define write_c0_diag(val)	__write_32bit_c0_register($22, 0, val)</div><div class='ctx'> </div><div class='add'>+/* R10K CP0 Branch Diagnostic register is 64bits wide */</div><div class='add'>+#define read_c0_r10k_diag()	__read_64bit_c0_register($22, 0)</div><div class='add'>+#define write_c0_r10k_diag(val)	__write_64bit_c0_register($22, 0, val)</div><div class='add'>+</div><div class='ctx'> #define read_c0_diag1()		__read_32bit_c0_register($22, 1)</div><div class='ctx'> #define write_c0_diag1(val)	__write_32bit_c0_register($22, 1, val)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h<br/>index d9692993fc83..98c31e5d9579 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pci.h</a></div><div class='hunk'>@@ -99,7 +99,7 @@ static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm-generic/pci-bridge.h&gt;</div><div class='hunk'>@@ -113,16 +113,6 @@ struct pci_dev;</div><div class='ctx'>  */</div><div class='ctx'> extern unsigned int PCI_DMA_BUS_IS_PHYS;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PCI_DOMAINS</div><div class='ctx'> #define pci_domain_nr(bus) ((struct pci_controller *)(bus)-&gt;sysdata)-&gt;index</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h<br/>index 7d56686c0e62..832e2167d00f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/pgtable-32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/pgtable-32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/pgtable-32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pgtable-32.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable-nopmd.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int temp_tlb_entry __cpuinitdata;</div><div class='add'>+extern int temp_tlb_entry;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * - add_temporary_entry() add a temporary TLB entry. We use TLB entries</div><div class='head'>diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h<br/>index 819af9d057a8..9d8106758142 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/pgtable.h</a></div><div class='hunk'>@@ -568,12 +568,12 @@ static inline pmd_t pmd_mknotpresent(pmd_t pmd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The generic version pmdp_get_and_clear uses a version of pmd_clear() with a</div><div class='add'>+ * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a</div><div class='ctx'>  * different prototype.</div><div class='ctx'>  */</div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long address, pmd_t *pmdp)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+					    unsigned long address, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t old = *pmdp;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h<br/>index 8ebc2aa5f3e1..0b4b668925f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/prom.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/prom.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/prom.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/prom.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef __ASM_PROM_H</div><div class='ctx'> #define __ASM_PROM_H</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF</div><div class='add'>+#ifdef CONFIG_USE_OF</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h<br/>index 2b25d1ba1ea0..16f1ea9ab191 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/smp.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> extern int smp_num_siblings;</div><div class='ctx'> extern cpumask_t cpu_sibling_map[];</div><div class='ctx'> extern cpumask_t cpu_core_map[];</div><div class='add'>+extern cpumask_t cpu_foreign_map;</div><div class='ctx'> </div><div class='ctx'> #define raw_smp_processor_id() (current_thread_info()-&gt;cpu)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h<br/>index 1fca2e0793dc..9de4ba43dcd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/spinlock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/spinlock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/spinlock.h</a></div><div class='hunk'>@@ -109,7 +109,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)</div><div class='ctx'> 		"	 subu	%[ticket], %[my_ticket], %[ticket]	\n"</div><div class='ctx'> 		"2:							\n"</div><div class='ctx'> 		"	.subsection 2					\n"</div><div class='del'>-		"4:	andi	%[ticket], %[ticket], 0x1fff		\n"</div><div class='add'>+		"4:	andi	%[ticket], %[ticket], 0xffff		\n"</div><div class='ctx'> 		"	sll	%[ticket], 5				\n"</div><div class='ctx'> 		"							\n"</div><div class='ctx'> 		"6:	bnez	%[ticket], 6b				\n"</div><div class='hunk'>@@ -317,7 +317,7 @@ static inline void arch_write_lock(arch_rwlock_t *rw)</div><div class='ctx'> </div><div class='ctx'> static inline void arch_write_unlock(arch_rwlock_t *rw)</div><div class='ctx'> {</div><div class='del'>-	smp_mb();</div><div class='add'>+	smp_mb__before_llsc();</div><div class='ctx'> </div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"				# arch_write_unlock	\n"</div><div class='head'>diff --git a/arch/mips/include/asm/topology.h b/arch/mips/include/asm/topology.h<br/>index 3e307ec2afba..7afda4150a59 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/topology.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_data[cpu].package)</div><div class='ctx'> #define topology_core_id(cpu)			(cpu_data[cpu].core)</div><div class='ctx'> #define topology_core_cpumask(cpu)		(&amp;cpu_core_map[cpu])</div><div class='del'>-#define topology_thread_cpumask(cpu)		(&amp;cpu_sibling_map[cpu])</div><div class='add'>+#define topology_sibling_cpumask(cpu)		(&amp;cpu_sibling_map[cpu])</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_TOPOLOGY_H */</div><div class='head'>diff --git a/arch/mips/include/asm/txx9irq.h b/arch/mips/include/asm/txx9irq.h<br/>index 5620879be37f..68a6650a4025 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/txx9irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/txx9irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/txx9irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/txx9irq.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;irq.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IRQ_CPU</div><div class='add'>+#ifdef CONFIG_IRQ_MIPS_CPU</div><div class='ctx'> #define TXX9_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)</div><div class='ctx'> #else</div><div class='ctx'> #ifdef CONFIG_I8259</div><div class='head'>diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h<br/>index bf8b32450ef6..5305d694ffe5 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/uaccess.h</a></div><div class='hunk'>@@ -78,6 +78,21 @@ extern u64 __ua_limit;</div><div class='ctx'> </div><div class='ctx'> #define segment_eq(a, b)	((a).seg == (b).seg)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * eva_kernel_access() - determine whether kernel memory access on an EVA system</div><div class='add'>+ *</div><div class='add'>+ * Determines whether memory accesses should be performed to kernel memory</div><div class='add'>+ * on a system using Extended Virtual Addressing (EVA).</div><div class='add'>+ *</div><div class='add'>+ * Return: true if a kernel memory access on an EVA system, else false.</div><div class='add'>+ */</div><div class='add'>+static inline bool eva_kernel_access(void)</div><div class='add'>+{</div><div class='add'>+	if (!config_enabled(CONFIG_EVA))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return segment_eq(get_fs(), get_ds());</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Is a address valid? This does a straighforward calculation rather</div><div class='hunk'>@@ -103,7 +118,8 @@ extern u64 __ua_limit;</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='hunk'>@@ -138,7 +154,8 @@ extern u64 __ua_limit;</div><div class='ctx'>  * @x:	 Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -157,7 +174,8 @@ extern u64 __ua_limit;</div><div class='ctx'>  * @x:	 Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -177,7 +195,8 @@ extern u64 __ua_limit;</div><div class='ctx'>  * @x:	 Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -199,7 +218,8 @@ extern u64 __ua_limit;</div><div class='ctx'>  * @x:	 Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -281,7 +301,7 @@ do {									\</div><div class='ctx'> ({									\</div><div class='ctx'> 	int __gu_err;							\</div><div class='ctx'> 									\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__get_kernel_common((x), size, ptr);			\</div><div class='ctx'> 	} else {							\</div><div class='ctx'> 		__chk_user_ptr(ptr);					\</div><div class='hunk'>@@ -297,7 +317,7 @@ do {									\</div><div class='ctx'> 									\</div><div class='ctx'> 	might_fault();							\</div><div class='ctx'> 	if (likely(access_ok(VERIFY_READ,  __gu_ptr, size))) {		\</div><div class='del'>-		if (segment_eq(get_fs(), get_ds()))			\</div><div class='add'>+		if (eva_kernel_access())				\</div><div class='ctx'> 			__get_kernel_common((x), size, __gu_ptr);	\</div><div class='ctx'> 		else							\</div><div class='ctx'> 			__get_user_common((x), size, __gu_ptr);		\</div><div class='hunk'>@@ -422,7 +442,7 @@ do {									\</div><div class='ctx'> 	int __pu_err = 0;						\</div><div class='ctx'> 									\</div><div class='ctx'> 	__pu_val = (x);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__put_kernel_common(ptr, size);				\</div><div class='ctx'> 	} else {							\</div><div class='ctx'> 		__chk_user_ptr(ptr);					\</div><div class='hunk'>@@ -439,7 +459,7 @@ do {									\</div><div class='ctx'> 									\</div><div class='ctx'> 	might_fault();							\</div><div class='ctx'> 	if (likely(access_ok(VERIFY_WRITE,  __pu_addr, size))) {	\</div><div class='del'>-		if (segment_eq(get_fs(), get_ds()))			\</div><div class='add'>+		if (eva_kernel_access())				\</div><div class='ctx'> 			__put_kernel_common(__pu_addr, size);		\</div><div class='ctx'> 		else							\</div><div class='ctx'> 			__put_user_common(__pu_addr, size);		\</div><div class='hunk'>@@ -498,7 +518,8 @@ extern void __put_user_unknown(void);</div><div class='ctx'>  * @x:	 Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -517,7 +538,8 @@ extern void __put_user_unknown(void);</div><div class='ctx'>  * @x:	 Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -537,7 +559,8 @@ extern void __put_user_unknown(void);</div><div class='ctx'>  * @x:	 Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -559,7 +582,8 @@ extern void __put_user_unknown(void);</div><div class='ctx'>  * @x:	 Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -815,7 +839,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -833,7 +858,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='ctx'> 	might_fault();							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds()))				\</div><div class='add'>+	if (eva_kernel_access())					\</div><div class='ctx'> 		__cu_len = __invoke_copy_to_kernel(__cu_to, __cu_from,	\</div><div class='ctx'> 						   __cu_len);		\</div><div class='ctx'> 	else								\</div><div class='hunk'>@@ -853,7 +878,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds()))				\</div><div class='add'>+	if (eva_kernel_access())					\</div><div class='ctx'> 		__cu_len = __invoke_copy_to_kernel(__cu_to, __cu_from,	\</div><div class='ctx'> 						   __cu_len);		\</div><div class='ctx'> 	else								\</div><div class='hunk'>@@ -871,7 +896,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds()))				\</div><div class='add'>+	if (eva_kernel_access())					\</div><div class='ctx'> 		__cu_len = __invoke_copy_from_kernel_inatomic(__cu_to,	\</div><div class='ctx'> 							      __cu_from,\</div><div class='ctx'> 							      __cu_len);\</div><div class='hunk'>@@ -888,7 +913,8 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -904,7 +930,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__cu_len = __invoke_copy_to_kernel(__cu_to,		\</div><div class='ctx'> 						   __cu_from,		\</div><div class='ctx'> 						   __cu_len);		\</div><div class='hunk'>@@ -1075,7 +1101,8 @@ extern size_t __copy_in_user_eva(void *__to, const void *__from, size_t __n);</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -1107,7 +1134,8 @@ extern size_t __copy_in_user_eva(void *__to, const void *__from, size_t __n);</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1126,7 +1154,7 @@ extern size_t __copy_in_user_eva(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__cu_len = __invoke_copy_from_kernel(__cu_to,		\</div><div class='ctx'> 						     __cu_from,		\</div><div class='ctx'> 						     __cu_len);		\</div><div class='hunk'>@@ -1150,7 +1178,7 @@ extern size_t __copy_in_user_eva(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__cu_len = ___invoke_copy_in_kernel(__cu_to, __cu_from,	\</div><div class='ctx'> 						    __cu_len);		\</div><div class='ctx'> 	} else {							\</div><div class='hunk'>@@ -1170,7 +1198,7 @@ extern size_t __copy_in_user_eva(void *__to, const void *__from, size_t __n);</div><div class='ctx'> 	__cu_to = (to);							\</div><div class='ctx'> 	__cu_from = (from);						\</div><div class='ctx'> 	__cu_len = (n);							\</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {				\</div><div class='add'>+	if (eva_kernel_access()) {					\</div><div class='ctx'> 		__cu_len = ___invoke_copy_in_kernel(__cu_to,__cu_from,	\</div><div class='ctx'> 						    __cu_len);		\</div><div class='ctx'> 	} else {							\</div><div class='hunk'>@@ -1250,7 +1278,7 @@ __strncpy_from_user(char *__to, const char __user *__from, long __len)</div><div class='ctx'> {</div><div class='ctx'> 	long res;</div><div class='ctx'> </div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {</div><div class='add'>+	if (eva_kernel_access()) {</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 			"move\t$4, %1\n\t"</div><div class='ctx'> 			"move\t$5, %2\n\t"</div><div class='hunk'>@@ -1299,7 +1327,7 @@ strncpy_from_user(char *__to, const char __user *__from, long __len)</div><div class='ctx'> {</div><div class='ctx'> 	long res;</div><div class='ctx'> </div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {</div><div class='add'>+	if (eva_kernel_access()) {</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 			"move\t$4, %1\n\t"</div><div class='ctx'> 			"move\t$5, %2\n\t"</div><div class='hunk'>@@ -1329,7 +1357,8 @@ strncpy_from_user(char *__to, const char __user *__from, long __len)</div><div class='ctx'>  * strlen_user: - Get the size of a string in user space.</div><div class='ctx'>  * @str: The string to measure.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Get the size of a NUL-terminated string in user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1343,7 +1372,7 @@ static inline long strlen_user(const char __user *s)</div><div class='ctx'> {</div><div class='ctx'> 	long res;</div><div class='ctx'> </div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {</div><div class='add'>+	if (eva_kernel_access()) {</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 			"move\t$4, %1\n\t"</div><div class='ctx'> 			__MODULE_JAL(__strlen_kernel_asm)</div><div class='hunk'>@@ -1370,7 +1399,7 @@ static inline long __strnlen_user(const char __user *s, long n)</div><div class='ctx'> {</div><div class='ctx'> 	long res;</div><div class='ctx'> </div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {</div><div class='add'>+	if (eva_kernel_access()) {</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 			"move\t$4, %1\n\t"</div><div class='ctx'> 			"move\t$5, %2\n\t"</div><div class='hunk'>@@ -1398,7 +1427,8 @@ static inline long __strnlen_user(const char __user *s, long n)</div><div class='ctx'>  * strnlen_user: - Get the size of a string in user space.</div><div class='ctx'>  * @str: The string to measure.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Get the size of a NUL-terminated string in user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1411,7 +1441,7 @@ static inline long strnlen_user(const char __user *s, long n)</div><div class='ctx'> 	long res;</div><div class='ctx'> </div><div class='ctx'> 	might_fault();</div><div class='del'>-	if (segment_eq(get_fs(), get_ds())) {</div><div class='add'>+	if (eva_kernel_access()) {</div><div class='ctx'> 		__asm__ __volatile__(</div><div class='ctx'> 			"move\t$4, %1\n\t"</div><div class='ctx'> 			"move\t$5, %2\n\t"</div><div class='head'>diff --git a/arch/mips/include/asm/xtalk/xwidget.h b/arch/mips/include/asm/xtalk/xwidget.h<br/>index 32e4e884f9b9..24f121da6a1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/xtalk/xwidget.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/asm/xtalk/xwidget.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/xtalk/xwidget.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/asm/xtalk/xwidget.h</a></div><div class='hunk'>@@ -84,6 +84,118 @@</div><div class='ctx'> #define WIDGET_LLP_MAXBURST		0x000003ff</div><div class='ctx'> #define WIDGET_LLP_MAXBURST_SHFT	0</div><div class='ctx'> </div><div class='add'>+/* Xtalk Widget Device Mfgr Nums */</div><div class='add'>+#define WIDGET_XBOW_MFGR_NUM	0x0      /* IP30 XBow Chip */</div><div class='add'>+#define WIDGET_XXBOW_MFGR_NUM	0x0      /* IP35 Xbow + XBridge Chip */</div><div class='add'>+#define WIDGET_ODYS_MFGR_NUM	0x023    /* Odyssey / VPro GFX */</div><div class='add'>+#define WIDGET_TPU_MFGR_NUM	0x024    /* Tensor Processor Unit */</div><div class='add'>+#define WIDGET_XBRDG_MFGR_NUM	0x024    /* IP35 XBridge Chip */</div><div class='add'>+#define WIDGET_HEART_MFGR_NUM	0x036    /* IP30 HEART Chip */</div><div class='add'>+#define WIDGET_BRIDG_MFGR_NUM	0x036    /* PCI Bridge */</div><div class='add'>+#define WIDGET_HUB_MFGR_NUM	0x036    /* IP27 Hub Chip */</div><div class='add'>+#define WIDGET_BDRCK_MFGR_NUM	0x036    /* IP35 Bedrock Chip */</div><div class='add'>+#define WIDGET_IMPCT_MFGR_NUM	0x2aa    /* HQ4 / Impact GFX */</div><div class='add'>+#define WIDGET_KONA_MFGR_NUM	0x2aa    /* InfiniteReality3 / Kona GFX */</div><div class='add'>+#define WIDGET_NULL_MFGR_NUM	-1       /* NULL */</div><div class='add'>+</div><div class='add'>+/* Xtalk Widget Device Part Nums */</div><div class='add'>+#define WIDGET_XBOW_PART_NUM	0x0000</div><div class='add'>+#define WIDGET_HEART_PART_NUM	0xc001</div><div class='add'>+#define WIDGET_BRIDG_PART_NUM	0xc002</div><div class='add'>+#define WIDGET_IMPCT_PART_NUM	0xc003</div><div class='add'>+#define WIDGET_ODYS_PART_NUM	0xc013</div><div class='add'>+#define WIDGET_HUB_PART_NUM	0xc101</div><div class='add'>+#define WIDGET_KONA_PART_NUM	0xc102</div><div class='add'>+#define WIDGET_BDRCK_PART_NUM	0xc110</div><div class='add'>+#define WIDGET_TPU_PART_NUM	0xc202</div><div class='add'>+#define WIDGET_XXBOW_PART_NUM	0xd000</div><div class='add'>+#define WIDGET_XBRDG_PART_NUM	0xd002</div><div class='add'>+#define WIDGET_NULL_PART_NUM	-1</div><div class='add'>+</div><div class='add'>+/* For Xtalk Widget identification */</div><div class='add'>+struct widget_ident {</div><div class='add'>+	u32 mfgr;</div><div class='add'>+	u32 part;</div><div class='add'>+	char *name;</div><div class='add'>+	char *revs[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Known Xtalk Widgets */</div><div class='add'>+static const struct widget_ident __initconst widget_idents[] = {</div><div class='add'>+	{</div><div class='add'>+		WIDGET_XBOW_MFGR_NUM,</div><div class='add'>+		WIDGET_XBOW_PART_NUM,</div><div class='add'>+		"xbow",</div><div class='add'>+		{NULL, "1.0", "1.1", "1.2", "1.3", "2.0", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_HEART_MFGR_NUM,</div><div class='add'>+		WIDGET_HEART_PART_NUM,</div><div class='add'>+		"heart",</div><div class='add'>+		{NULL, "A", "B", "C", "D", "E", "F", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_BRIDG_MFGR_NUM,</div><div class='add'>+		WIDGET_BRIDG_PART_NUM,</div><div class='add'>+		"bridge",</div><div class='add'>+		{NULL, "A", "B", "C", "D", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_IMPCT_MFGR_NUM,</div><div class='add'>+		WIDGET_IMPCT_PART_NUM,</div><div class='add'>+		"impact",</div><div class='add'>+		{NULL, "A", "B", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_ODYS_MFGR_NUM,</div><div class='add'>+		WIDGET_ODYS_PART_NUM,</div><div class='add'>+		"odyssey",</div><div class='add'>+		{NULL, "A", "B", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_HUB_MFGR_NUM,</div><div class='add'>+		WIDGET_HUB_PART_NUM,</div><div class='add'>+		"hub",</div><div class='add'>+		{NULL, "1.0", "2.0", "2.1", "2.2", "2.3", "2.4", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_KONA_MFGR_NUM,</div><div class='add'>+		WIDGET_KONA_PART_NUM,</div><div class='add'>+		"kona",</div><div class='add'>+		{NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_BDRCK_MFGR_NUM,</div><div class='add'>+		WIDGET_BDRCK_PART_NUM,</div><div class='add'>+		"bedrock",</div><div class='add'>+		{NULL, "1.0", "1.1", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_TPU_MFGR_NUM,</div><div class='add'>+		WIDGET_TPU_PART_NUM,</div><div class='add'>+		"tpu",</div><div class='add'>+		{"0", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_XXBOW_MFGR_NUM,</div><div class='add'>+		WIDGET_XXBOW_PART_NUM,</div><div class='add'>+		"xxbow",</div><div class='add'>+		{NULL, "1.0", "2.0", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_XBRDG_MFGR_NUM,</div><div class='add'>+		WIDGET_XBRDG_PART_NUM,</div><div class='add'>+		"xbridge",</div><div class='add'>+		{NULL, "A", "B", NULL},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		WIDGET_NULL_MFGR_NUM,</div><div class='add'>+		WIDGET_NULL_PART_NUM,</div><div class='add'>+		NULL,</div><div class='add'>+		{NULL},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * according to the crosstalk spec, only 32-bits access to the widget</div><div class='ctx'>  * configuration registers is allowed.	some widgets may allow 64-bits</div><div class='head'>diff --git a/arch/mips/include/uapi/asm/sigcontext.h b/arch/mips/include/uapi/asm/sigcontext.h<br/>index 6c9906f59c6e..9081d88ae44f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/uapi/asm/sigcontext.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/include/uapi/asm/sigcontext.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/include/uapi/asm/sigcontext.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Keep this struct definition in sync with the sigcontext fragment</div><div class='del'>- * in arch/mips/tools/offset.c</div><div class='add'>+ * in arch/mips/kernel/asm-offsets.c</div><div class='ctx'>  */</div><div class='ctx'> struct sigcontext {</div><div class='ctx'> 	unsigned int		sc_regmask;	/* Unused */</div><div class='hunk'>@@ -46,7 +46,7 @@ struct sigcontext {</div><div class='ctx'> #include &lt;linux/posix_types.h&gt;</div><div class='ctx'> /*</div><div class='ctx'>  * Keep this struct definition in sync with the sigcontext fragment</div><div class='del'>- * in arch/mips/tools/offset.c</div><div class='add'>+ * in arch/mips/kernel/asm-offsets.c</div><div class='ctx'>  *</div><div class='ctx'>  * Warning: this structure illdefined with sc_badvaddr being just an unsigned</div><div class='ctx'>  * int so it was changed to unsigned long in 2.6.0-test1.  This may break</div><div class='head'>diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig<br/>index 468903053883..36f82017695d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Kconfig</a></div><div class='hunk'>@@ -1,9 +1,24 @@</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Machine type"</div><div class='del'>-	depends on MACH_JZ4740</div><div class='add'>+	depends on MACH_INGENIC</div><div class='ctx'> 	default JZ4740_QI_LB60</div><div class='ctx'> </div><div class='ctx'> config JZ4740_QI_LB60</div><div class='ctx'> 	bool "Qi Hardware Ben NanoNote"</div><div class='add'>+	select MACH_JZ4740</div><div class='add'>+</div><div class='add'>+config JZ4780_CI20</div><div class='add'>+	bool "MIPS Creator CI20"</div><div class='add'>+	select MACH_JZ4780</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='add'>+</div><div class='add'>+config MACH_JZ4740</div><div class='add'>+	bool</div><div class='add'>+	select SYS_HAS_CPU_MIPS32_R1</div><div class='add'>+</div><div class='add'>+config MACH_JZ4780</div><div class='add'>+	bool</div><div class='add'>+	select MIPS_CPU_SCACHE</div><div class='add'>+	select SYS_HAS_CPU_MIPS32_R2</div><div class='add'>+	select SYS_SUPPORTS_HIGHMEM</div><div class='head'>diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile<br/>index 28e5535dfa9e..39d70bde8cfe 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Makefile</a></div><div class='hunk'>@@ -4,10 +4,12 @@</div><div class='ctx'> </div><div class='ctx'> # Object file lists.</div><div class='ctx'> </div><div class='del'>-obj-y += prom.o irq.o time.o reset.o setup.o \</div><div class='del'>-	gpio.o clock.o platform.o timer.o serial.o</div><div class='add'>+obj-y += prom.o time.o reset.o setup.o \</div><div class='add'>+	platform.o timer.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o</div><div class='add'>+obj-$(CONFIG_MACH_JZ4740) += gpio.o</div><div class='add'>+</div><div class='add'>+CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt</div><div class='ctx'> </div><div class='ctx'> # board specific support</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/jz4740/Platform b/arch/mips/jz4740/Platform<br/>index c41d30080098..28448d358c10 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/Platform?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/Platform</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/Platform</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-platform-$(CONFIG_MACH_JZ4740)	+= jz4740/</div><div class='del'>-cflags-$(CONFIG_MACH_JZ4740)	+= -I$(srctree)/arch/mips/include/asm/mach-jz4740</div><div class='del'>-load-$(CONFIG_MACH_JZ4740)	+= 0xffffffff80010000</div><div class='del'>-zload-$(CONFIG_MACH_JZ4740)	+= 0xffffffff80600000</div><div class='add'>+platform-$(CONFIG_MACH_INGENIC)	+= jz4740/</div><div class='add'>+cflags-$(CONFIG_MACH_INGENIC)	+= -I$(srctree)/arch/mips/include/asm/mach-jz4740</div><div class='add'>+load-$(CONFIG_MACH_INGENIC)	+= 0xffffffff80010000</div><div class='add'>+zload-$(CONFIG_MACH_INGENIC)	+= 0xffffffff80600000</div><div class='head'>diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c<br/>index 9dd051edb411..4e62bf85d0b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/board-qi_lb60.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/board-qi_lb60.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/board-qi_lb60.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/board-qi_lb60.c</a></div><div class='hunk'>@@ -482,8 +482,6 @@ static int __init qi_lb60_init_platform_devices(void)</div><div class='ctx'> 	gpiod_add_lookup_table(&amp;qi_lb60_audio_gpio_table);</div><div class='ctx'> 	gpiod_add_lookup_table(&amp;qi_lb60_nand_gpio_table);</div><div class='ctx'> </div><div class='del'>-	jz4740_serial_device_register();</div><div class='del'>-</div><div class='ctx'> 	spi_register_board_info(qi_lb60_spi_board_info,</div><div class='ctx'> 				ARRAY_SIZE(qi_lb60_spi_board_info));</div><div class='ctx'> </div><div class='hunk'>@@ -497,11 +495,6 @@ static int __init qi_lb60_init_platform_devices(void)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct jz4740_clock_board_data jz4740_clock_bdata = {</div><div class='del'>-	.ext_rate = 12000000,</div><div class='del'>-	.rtc_rate = 32768,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static __init int board_avt2(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	qi_lb60_mmc_pdata.card_detect_active_low = 1;</div><div class='head'>diff --git a/arch/mips/jz4740/clock-debugfs.c b/arch/mips/jz4740/clock-debugfs.c<br/>deleted file mode 100644<br/>index 325422d0d453..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/clock-debugfs.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/clock-debugfs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,108 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 SoC clock support debugfs entries</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under  the terms of the GNU General	 Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License along</div><div class='del'>- *  with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-jz4740/clock.h&gt;</div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='del'>-static struct dentry *jz4740_clock_debugfs;</div><div class='del'>-</div><div class='del'>-static int jz4740_clock_debugfs_show_enabled(void *data, uint64_t *value)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk = data;</div><div class='del'>-	*value = clk_is_enabled(clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz4740_clock_debugfs_set_enabled(void *data, uint64_t value)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk = data;</div><div class='del'>-</div><div class='del'>-	if (value)</div><div class='del'>-		return clk_enable(clk);</div><div class='del'>-	else</div><div class='del'>-		clk_disable(clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_SIMPLE_ATTRIBUTE(jz4740_clock_debugfs_ops_enabled,</div><div class='del'>-	jz4740_clock_debugfs_show_enabled,</div><div class='del'>-	jz4740_clock_debugfs_set_enabled,</div><div class='del'>-	"%llu\n");</div><div class='del'>-</div><div class='del'>-static int jz4740_clock_debugfs_show_rate(void *data, uint64_t *value)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk = data;</div><div class='del'>-	*value = clk_get_rate(clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_SIMPLE_ATTRIBUTE(jz4740_clock_debugfs_ops_rate,</div><div class='del'>-	jz4740_clock_debugfs_show_rate,</div><div class='del'>-	NULL,</div><div class='del'>-	"%llu\n");</div><div class='del'>-</div><div class='del'>-void jz4740_clock_debugfs_add_clk(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (!jz4740_clock_debugfs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	clk-&gt;debugfs_entry = debugfs_create_dir(clk-&gt;name, jz4740_clock_debugfs);</div><div class='del'>-	debugfs_create_file("rate", S_IWUGO | S_IRUGO, clk-&gt;debugfs_entry, clk,</div><div class='del'>-				&amp;jz4740_clock_debugfs_ops_rate);</div><div class='del'>-	debugfs_create_file("enabled", S_IRUGO, clk-&gt;debugfs_entry, clk,</div><div class='del'>-				&amp;jz4740_clock_debugfs_ops_enabled);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent) {</div><div class='del'>-		char parent_path[100];</div><div class='del'>-		snprintf(parent_path, 100, "../%s", clk-&gt;parent-&gt;name);</div><div class='del'>-		clk-&gt;debugfs_parent_entry = debugfs_create_symlink("parent",</div><div class='del'>-						clk-&gt;debugfs_entry,</div><div class='del'>-						parent_path);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* TODO: Locking */</div><div class='del'>-void jz4740_clock_debugfs_update_parent(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove(clk-&gt;debugfs_parent_entry);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent) {</div><div class='del'>-		char parent_path[100];</div><div class='del'>-		snprintf(parent_path, 100, "../%s", clk-&gt;parent-&gt;name);</div><div class='del'>-		clk-&gt;debugfs_parent_entry = debugfs_create_symlink("parent",</div><div class='del'>-						clk-&gt;debugfs_entry,</div><div class='del'>-						parent_path);</div><div class='del'>-	} else {</div><div class='del'>-		clk-&gt;debugfs_parent_entry = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_clock_debugfs_init(void)</div><div class='del'>-{</div><div class='del'>-	jz4740_clock_debugfs = debugfs_create_dir("jz4740-clock", NULL);</div><div class='del'>-	if (IS_ERR(jz4740_clock_debugfs))</div><div class='del'>-		jz4740_clock_debugfs = NULL;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c<br/>deleted file mode 100644<br/>index 1b5f55426cad..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,924 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 SoC clock support</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under  the terms of the GNU General	 Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License along</div><div class='del'>- *  with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-jz4740/clock.h&gt;</div><div class='del'>-#include &lt;asm/mach-jz4740/base.h&gt;</div><div class='del'>-</div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='del'>-#define JZ_REG_CLOCK_CTRL	0x00</div><div class='del'>-#define JZ_REG_CLOCK_LOW_POWER	0x04</div><div class='del'>-#define JZ_REG_CLOCK_PLL	0x10</div><div class='del'>-#define JZ_REG_CLOCK_GATE	0x20</div><div class='del'>-#define JZ_REG_CLOCK_SLEEP_CTRL 0x24</div><div class='del'>-#define JZ_REG_CLOCK_I2S	0x60</div><div class='del'>-#define JZ_REG_CLOCK_LCD	0x64</div><div class='del'>-#define JZ_REG_CLOCK_MMC	0x68</div><div class='del'>-#define JZ_REG_CLOCK_UHC	0x6C</div><div class='del'>-#define JZ_REG_CLOCK_SPI	0x74</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_CTRL_I2S_SRC_PLL	BIT(31)</div><div class='del'>-#define JZ_CLOCK_CTRL_KO_ENABLE		BIT(30)</div><div class='del'>-#define JZ_CLOCK_CTRL_UDC_SRC_PLL	BIT(29)</div><div class='del'>-#define JZ_CLOCK_CTRL_UDIV_MASK		0x1f800000</div><div class='del'>-#define JZ_CLOCK_CTRL_CHANGE_ENABLE	BIT(22)</div><div class='del'>-#define JZ_CLOCK_CTRL_PLL_HALF		BIT(21)</div><div class='del'>-#define JZ_CLOCK_CTRL_LDIV_MASK		0x001f0000</div><div class='del'>-#define JZ_CLOCK_CTRL_UDIV_OFFSET	23</div><div class='del'>-#define JZ_CLOCK_CTRL_LDIV_OFFSET	16</div><div class='del'>-#define JZ_CLOCK_CTRL_MDIV_OFFSET	12</div><div class='del'>-#define JZ_CLOCK_CTRL_PDIV_OFFSET	 8</div><div class='del'>-#define JZ_CLOCK_CTRL_HDIV_OFFSET	 4</div><div class='del'>-#define JZ_CLOCK_CTRL_CDIV_OFFSET	 0</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_GATE_UART0	BIT(0)</div><div class='del'>-#define JZ_CLOCK_GATE_TCU	BIT(1)</div><div class='del'>-#define JZ_CLOCK_GATE_RTC	BIT(2)</div><div class='del'>-#define JZ_CLOCK_GATE_I2C	BIT(3)</div><div class='del'>-#define JZ_CLOCK_GATE_SPI	BIT(4)</div><div class='del'>-#define JZ_CLOCK_GATE_AIC	BIT(5)</div><div class='del'>-#define JZ_CLOCK_GATE_I2S	BIT(6)</div><div class='del'>-#define JZ_CLOCK_GATE_MMC	BIT(7)</div><div class='del'>-#define JZ_CLOCK_GATE_ADC	BIT(8)</div><div class='del'>-#define JZ_CLOCK_GATE_CIM	BIT(9)</div><div class='del'>-#define JZ_CLOCK_GATE_LCD	BIT(10)</div><div class='del'>-#define JZ_CLOCK_GATE_UDC	BIT(11)</div><div class='del'>-#define JZ_CLOCK_GATE_DMAC	BIT(12)</div><div class='del'>-#define JZ_CLOCK_GATE_IPU	BIT(13)</div><div class='del'>-#define JZ_CLOCK_GATE_UHC	BIT(14)</div><div class='del'>-#define JZ_CLOCK_GATE_UART1	BIT(15)</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_I2S_DIV_MASK		0x01ff</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_LCD_DIV_MASK		0x01ff</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_MMC_DIV_MASK		0x001f</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_UHC_DIV_MASK		0x000f</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_SPI_SRC_PLL		BIT(31)</div><div class='del'>-#define JZ_CLOCK_SPI_DIV_MASK		0x000f</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_PLL_M_MASK		0x01ff</div><div class='del'>-#define JZ_CLOCK_PLL_N_MASK		0x001f</div><div class='del'>-#define JZ_CLOCK_PLL_OD_MASK		0x0003</div><div class='del'>-#define JZ_CLOCK_PLL_STABLE		BIT(10)</div><div class='del'>-#define JZ_CLOCK_PLL_BYPASS		BIT(9)</div><div class='del'>-#define JZ_CLOCK_PLL_ENABLED		BIT(8)</div><div class='del'>-#define JZ_CLOCK_PLL_STABLIZE_MASK	0x000f</div><div class='del'>-#define JZ_CLOCK_PLL_M_OFFSET		23</div><div class='del'>-#define JZ_CLOCK_PLL_N_OFFSET		18</div><div class='del'>-#define JZ_CLOCK_PLL_OD_OFFSET		16</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_LOW_POWER_MODE_DOZE BIT(2)</div><div class='del'>-#define JZ_CLOCK_LOW_POWER_MODE_SLEEP BIT(0)</div><div class='del'>-</div><div class='del'>-#define JZ_CLOCK_SLEEP_CTRL_SUSPEND_UHC BIT(7)</div><div class='del'>-#define JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC BIT(6)</div><div class='del'>-</div><div class='del'>-static void __iomem *jz_clock_base;</div><div class='del'>-static spinlock_t jz_clock_lock;</div><div class='del'>-static LIST_HEAD(jz_clocks);</div><div class='del'>-</div><div class='del'>-struct main_clk {</div><div class='del'>-	struct clk clk;</div><div class='del'>-	uint32_t div_offset;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct divided_clk {</div><div class='del'>-	struct clk clk;</div><div class='del'>-	uint32_t reg;</div><div class='del'>-	uint32_t mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct static_clk {</div><div class='del'>-	struct clk clk;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static uint32_t jz_clk_reg_read(int reg)</div><div class='del'>-{</div><div class='del'>-	return readl(jz_clock_base + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void jz_clk_reg_write_mask(int reg, uint32_t val, uint32_t mask)</div><div class='del'>-{</div><div class='del'>-	uint32_t val2;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;jz_clock_lock);</div><div class='del'>-	val2 = readl(jz_clock_base + reg);</div><div class='del'>-	val2 &amp;= ~mask;</div><div class='del'>-	val2 |= val;</div><div class='del'>-	writel(val2, jz_clock_base + reg);</div><div class='del'>-	spin_unlock(&amp;jz_clock_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void jz_clk_reg_set_bits(int reg, uint32_t mask)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;jz_clock_lock);</div><div class='del'>-	val = readl(jz_clock_base + reg);</div><div class='del'>-	val |= mask;</div><div class='del'>-	writel(val, jz_clock_base + reg);</div><div class='del'>-	spin_unlock(&amp;jz_clock_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void jz_clk_reg_clear_bits(int reg, uint32_t mask)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;jz_clock_lock);</div><div class='del'>-	val = readl(jz_clock_base + reg);</div><div class='del'>-	val &amp;= ~mask;</div><div class='del'>-	writel(val, jz_clock_base + reg);</div><div class='del'>-	spin_unlock(&amp;jz_clock_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_enable_gating(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;gate_bit == JZ4740_CLK_NOT_GATED)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, clk-&gt;gate_bit);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_disable_gating(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;gate_bit == JZ4740_CLK_NOT_GATED)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, clk-&gt;gate_bit);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_is_enabled_gating(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;gate_bit == JZ4740_CLK_NOT_GATED)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	return !(jz_clk_reg_read(JZ_REG_CLOCK_GATE) &amp; clk-&gt;gate_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_static_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return ((struct static_clk *)clk)-&gt;rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_ko_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_ko_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_ko_is_enabled(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return !!(jz_clk_reg_read(JZ_REG_CLOCK_CTRL) &amp; JZ_CLOCK_CTRL_KO_ENABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const int pllno[] = {1, 2, 2, 4};</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-	int m;</div><div class='del'>-	int n;</div><div class='del'>-	int od;</div><div class='del'>-</div><div class='del'>-	val = jz_clk_reg_read(JZ_REG_CLOCK_PLL);</div><div class='del'>-</div><div class='del'>-	if (val &amp; JZ_CLOCK_PLL_BYPASS)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	m = ((val &gt;&gt; 23) &amp; 0x1ff) + 2;</div><div class='del'>-	n = ((val &gt;&gt; 18) &amp; 0x1f) + 2;</div><div class='del'>-	od = (val &gt;&gt; 16) &amp; 0x3;</div><div class='del'>-</div><div class='del'>-	return ((clk_get_rate(clk-&gt;parent) / n) * m) / pllno[od];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_pll_half_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	uint32_t reg;</div><div class='del'>-</div><div class='del'>-	reg = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);</div><div class='del'>-	if (reg &amp; JZ_CLOCK_CTRL_PLL_HALF)</div><div class='del'>-		return jz_clk_pll_get_rate(clk-&gt;parent);</div><div class='del'>-	return jz_clk_pll_get_rate(clk-&gt;parent) &gt;&gt; 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const int jz_clk_main_divs[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate = jz_clk_pll_get_rate(clk-&gt;parent);</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 32)</div><div class='del'>-		return parent_rate / 32;</div><div class='del'>-	else if (div &lt; 1)</div><div class='del'>-		return parent_rate;</div><div class='del'>-</div><div class='del'>-	div &amp;= (0x3 &lt;&lt; (ffs(div) - 1));</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_main_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct main_clk *mclk = (struct main_clk *)clk;</div><div class='del'>-	uint32_t div;</div><div class='del'>-</div><div class='del'>-	div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);</div><div class='del'>-</div><div class='del'>-	div &gt;&gt;= mclk-&gt;div_offset;</div><div class='del'>-	div &amp;= 0xf;</div><div class='del'>-</div><div class='del'>-	if (div &gt;= ARRAY_SIZE(jz_clk_main_divs))</div><div class='del'>-		div = ARRAY_SIZE(jz_clk_main_divs) - 1;</div><div class='del'>-</div><div class='del'>-	return jz_clk_pll_get_rate(clk-&gt;parent) / jz_clk_main_divs[div];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	struct main_clk *mclk = (struct main_clk *)clk;</div><div class='del'>-	int i;</div><div class='del'>-	int div;</div><div class='del'>-	unsigned long parent_rate = jz_clk_pll_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	rate = jz_clk_main_round_rate(clk, rate);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	i = (ffs(div) - 1) &lt;&lt; 1;</div><div class='del'>-	if (i &gt; 0 &amp;&amp; !(div &amp; BIT(i-1)))</div><div class='del'>-		i -= 1;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, i &lt;&lt; mclk-&gt;div_offset,</div><div class='del'>-				0xf &lt;&lt; mclk-&gt;div_offset);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk_ops jz_clk_static_ops = {</div><div class='del'>-	.get_rate = jz_clk_static_get_rate,</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct static_clk jz_clk_ext = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "ext",</div><div class='del'>-		.gate_bit = JZ4740_CLK_NOT_GATED,</div><div class='del'>-		.ops = &amp;jz_clk_static_ops,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk_ops jz_clk_pll_ops = {</div><div class='del'>-	.get_rate = jz_clk_pll_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk jz_clk_pll = {</div><div class='del'>-	.name = "pll",</div><div class='del'>-	.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-	.ops = &amp;jz_clk_pll_ops,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk_ops jz_clk_pll_half_ops = {</div><div class='del'>-	.get_rate = jz_clk_pll_half_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk jz_clk_pll_half = {</div><div class='del'>-	.name = "pll half",</div><div class='del'>-	.parent = &amp;jz_clk_pll,</div><div class='del'>-	.ops = &amp;jz_clk_pll_half_ops,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_main_ops = {</div><div class='del'>-	.get_rate = jz_clk_main_get_rate,</div><div class='del'>-	.set_rate = jz_clk_main_set_rate,</div><div class='del'>-	.round_rate = jz_clk_main_round_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct main_clk jz_clk_cpu = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "cclk",</div><div class='del'>-		.parent = &amp;jz_clk_pll,</div><div class='del'>-		.ops = &amp;jz_clk_main_ops,</div><div class='del'>-	},</div><div class='del'>-	.div_offset = JZ_CLOCK_CTRL_CDIV_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct main_clk jz_clk_memory = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "mclk",</div><div class='del'>-		.parent = &amp;jz_clk_pll,</div><div class='del'>-		.ops = &amp;jz_clk_main_ops,</div><div class='del'>-	},</div><div class='del'>-	.div_offset = JZ_CLOCK_CTRL_MDIV_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct main_clk jz_clk_high_speed_peripheral = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "hclk",</div><div class='del'>-		.parent = &amp;jz_clk_pll,</div><div class='del'>-		.ops = &amp;jz_clk_main_ops,</div><div class='del'>-	},</div><div class='del'>-	.div_offset = JZ_CLOCK_CTRL_HDIV_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct main_clk jz_clk_low_speed_peripheral = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "pclk",</div><div class='del'>-		.parent = &amp;jz_clk_pll,</div><div class='del'>-		.ops = &amp;jz_clk_main_ops,</div><div class='del'>-	},</div><div class='del'>-	.div_offset = JZ_CLOCK_CTRL_PDIV_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_ko_ops = {</div><div class='del'>-	.enable = jz_clk_ko_enable,</div><div class='del'>-	.disable = jz_clk_ko_disable,</div><div class='del'>-	.is_enabled = jz_clk_ko_is_enabled,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk jz_clk_ko = {</div><div class='del'>-	.name = "cko",</div><div class='del'>-	.parent = &amp;jz_clk_memory.clk,</div><div class='del'>-	.ops = &amp;jz_clk_ko_ops,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int jz_clk_spi_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	if (parent == &amp;jz_clk_pll)</div><div class='del'>-		jz_clk_reg_set_bits(JZ_CLOCK_SPI_SRC_PLL, JZ_REG_CLOCK_SPI);</div><div class='del'>-	else if (parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		jz_clk_reg_clear_bits(JZ_CLOCK_SPI_SRC_PLL, JZ_REG_CLOCK_SPI);</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;parent = parent;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_i2s_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	if (parent == &amp;jz_clk_pll_half)</div><div class='del'>-		jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_I2S_SRC_PLL);</div><div class='del'>-	else if (parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_I2S_SRC_PLL);</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;parent = parent;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_udc_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_SLEEP_CTRL,</div><div class='del'>-			JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_udc_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_SLEEP_CTRL,</div><div class='del'>-			JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_udc_is_enabled(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return !!(jz_clk_reg_read(JZ_REG_CLOCK_SLEEP_CTRL) &amp;</div><div class='del'>-			JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_udc_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	if (parent == &amp;jz_clk_pll_half)</div><div class='del'>-		jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_UDC_SRC_PLL);</div><div class='del'>-	else if (parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_UDC_SRC_PLL);</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;parent = parent;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_udc_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = clk_get_rate(clk-&gt;parent) / rate - 1;</div><div class='del'>-</div><div class='del'>-	if (div &lt; 0)</div><div class='del'>-		div = 0;</div><div class='del'>-	else if (div &gt; 63)</div><div class='del'>-		div = 63;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, div &lt;&lt; JZ_CLOCK_CTRL_UDIV_OFFSET,</div><div class='del'>-				JZ_CLOCK_CTRL_UDIV_MASK);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_udc_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = (jz_clk_reg_read(JZ_REG_CLOCK_CTRL) &amp; JZ_CLOCK_CTRL_UDIV_MASK);</div><div class='del'>-	div &gt;&gt;= JZ_CLOCK_CTRL_UDIV_OFFSET;</div><div class='del'>-	div += 1;</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_divided_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct divided_clk *dclk = (struct divided_clk *)clk;</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = (jz_clk_reg_read(dclk-&gt;reg) &amp; dclk-&gt;mask) + 1;</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_divided_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	struct divided_clk *dclk = (struct divided_clk *)clk;</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;jz_clk_ext.clk)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = clk_get_rate(clk-&gt;parent) / rate - 1;</div><div class='del'>-</div><div class='del'>-	if (div &lt; 0)</div><div class='del'>-		div = 0;</div><div class='del'>-	else if (div &gt; dclk-&gt;mask)</div><div class='del'>-		div = dclk-&gt;mask;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_write_mask(dclk-&gt;reg, div, dclk-&gt;mask);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_ldclk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-	unsigned long parent_rate = jz_clk_pll_half_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (rate &gt; 150000000)</div><div class='del'>-		return 150000000;</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &lt; 1)</div><div class='del'>-		div = 1;</div><div class='del'>-	else if (div &gt; 32)</div><div class='del'>-		div = 32;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz_clk_ldclk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	if (rate &gt; 150000000)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = jz_clk_pll_half_get_rate(clk-&gt;parent) / rate - 1;</div><div class='del'>-	if (div &lt; 0)</div><div class='del'>-		div = 0;</div><div class='del'>-	else if (div &gt; 31)</div><div class='del'>-		div = 31;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, div &lt;&lt; JZ_CLOCK_CTRL_LDIV_OFFSET,</div><div class='del'>-				JZ_CLOCK_CTRL_LDIV_MASK);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long jz_clk_ldclk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-</div><div class='del'>-	div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL) &amp; JZ_CLOCK_CTRL_LDIV_MASK;</div><div class='del'>-	div &gt;&gt;= JZ_CLOCK_CTRL_LDIV_OFFSET;</div><div class='del'>-</div><div class='del'>-	return jz_clk_pll_half_get_rate(clk-&gt;parent) / (div + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_ops_ld = {</div><div class='del'>-	.set_rate = jz_clk_ldclk_set_rate,</div><div class='del'>-	.get_rate = jz_clk_ldclk_get_rate,</div><div class='del'>-	.round_rate = jz_clk_ldclk_round_rate,</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk jz_clk_ld = {</div><div class='del'>-	.name = "lcd",</div><div class='del'>-	.gate_bit = JZ_CLOCK_GATE_LCD,</div><div class='del'>-	.parent = &amp;jz_clk_pll_half,</div><div class='del'>-	.ops = &amp;jz_clk_ops_ld,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_i2s_ops = {</div><div class='del'>-	.set_rate = jz_clk_divided_set_rate,</div><div class='del'>-	.get_rate = jz_clk_divided_get_rate,</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-	.set_parent = jz_clk_i2s_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_spi_ops = {</div><div class='del'>-	.set_rate = jz_clk_divided_set_rate,</div><div class='del'>-	.get_rate = jz_clk_divided_get_rate,</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-	.set_parent = jz_clk_spi_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_divided_ops = {</div><div class='del'>-	.set_rate = jz_clk_divided_set_rate,</div><div class='del'>-	.get_rate = jz_clk_divided_get_rate,</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct divided_clk jz4740_clock_divided_clks[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.clk = {</div><div class='del'>-			.name = "i2s",</div><div class='del'>-			.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-			.gate_bit = JZ_CLOCK_GATE_I2S,</div><div class='del'>-			.ops = &amp;jz_clk_i2s_ops,</div><div class='del'>-		},</div><div class='del'>-		.reg = JZ_REG_CLOCK_I2S,</div><div class='del'>-		.mask = JZ_CLOCK_I2S_DIV_MASK,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.clk = {</div><div class='del'>-			.name = "spi",</div><div class='del'>-			.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-			.gate_bit = JZ_CLOCK_GATE_SPI,</div><div class='del'>-			.ops = &amp;jz_clk_spi_ops,</div><div class='del'>-		},</div><div class='del'>-		.reg = JZ_REG_CLOCK_SPI,</div><div class='del'>-		.mask = JZ_CLOCK_SPI_DIV_MASK,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.clk = {</div><div class='del'>-			.name = "lcd_pclk",</div><div class='del'>-			.parent = &amp;jz_clk_pll_half,</div><div class='del'>-			.gate_bit = JZ4740_CLK_NOT_GATED,</div><div class='del'>-			.ops = &amp;jz_clk_divided_ops,</div><div class='del'>-		},</div><div class='del'>-		.reg = JZ_REG_CLOCK_LCD,</div><div class='del'>-		.mask = JZ_CLOCK_LCD_DIV_MASK,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.clk = {</div><div class='del'>-			.name = "mmc",</div><div class='del'>-			.parent = &amp;jz_clk_pll_half,</div><div class='del'>-			.gate_bit = JZ_CLOCK_GATE_MMC,</div><div class='del'>-			.ops = &amp;jz_clk_divided_ops,</div><div class='del'>-		},</div><div class='del'>-		.reg = JZ_REG_CLOCK_MMC,</div><div class='del'>-		.mask = JZ_CLOCK_MMC_DIV_MASK,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.clk = {</div><div class='del'>-			.name = "uhc",</div><div class='del'>-			.parent = &amp;jz_clk_pll_half,</div><div class='del'>-			.gate_bit = JZ_CLOCK_GATE_UHC,</div><div class='del'>-			.ops = &amp;jz_clk_divided_ops,</div><div class='del'>-		},</div><div class='del'>-		.reg = JZ_REG_CLOCK_UHC,</div><div class='del'>-		.mask = JZ_CLOCK_UHC_DIV_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_udc_ops = {</div><div class='del'>-	.set_parent = jz_clk_udc_set_parent,</div><div class='del'>-	.set_rate = jz_clk_udc_set_rate,</div><div class='del'>-	.get_rate = jz_clk_udc_get_rate,</div><div class='del'>-	.enable = jz_clk_udc_enable,</div><div class='del'>-	.disable = jz_clk_udc_disable,</div><div class='del'>-	.is_enabled = jz_clk_udc_is_enabled,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk_ops jz_clk_simple_ops = {</div><div class='del'>-	.enable = jz_clk_enable_gating,</div><div class='del'>-	.disable = jz_clk_disable_gating,</div><div class='del'>-	.is_enabled = jz_clk_is_enabled_gating,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk jz4740_clock_simple_clks[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.name = "udc",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.ops = &amp;jz_clk_udc_ops,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.name = "uart0",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_UART0,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.name = "uart1",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_UART1,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.name = "dma",</div><div class='del'>-		.parent = &amp;jz_clk_high_speed_peripheral.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_DMAC,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.name = "ipu",</div><div class='del'>-		.parent = &amp;jz_clk_high_speed_peripheral.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_IPU,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[5] = {</div><div class='del'>-		.name = "adc",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_ADC,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[6] = {</div><div class='del'>-		.name = "i2c",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_I2C,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-	[7] = {</div><div class='del'>-		.name = "aic",</div><div class='del'>-		.parent = &amp;jz_clk_ext.clk,</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_AIC,</div><div class='del'>-		.ops = &amp;jz_clk_simple_ops,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct static_clk jz_clk_rtc = {</div><div class='del'>-	.clk = {</div><div class='del'>-		.name = "rtc",</div><div class='del'>-		.gate_bit = JZ_CLOCK_GATE_RTC,</div><div class='del'>-		.ops = &amp;jz_clk_static_ops,</div><div class='del'>-	},</div><div class='del'>-	.rate = 32768,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (!clk-&gt;ops-&gt;enable)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return clk-&gt;ops-&gt;enable(clk);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_enable);</div><div class='del'>-</div><div class='del'>-void clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;ops-&gt;disable)</div><div class='del'>-		clk-&gt;ops-&gt;disable(clk);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_disable);</div><div class='del'>-</div><div class='del'>-int clk_is_enabled(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;ops-&gt;is_enabled)</div><div class='del'>-		return clk-&gt;ops-&gt;is_enabled(clk);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;ops-&gt;get_rate)</div><div class='del'>-		return clk-&gt;ops-&gt;get_rate(clk);</div><div class='del'>-	if (clk-&gt;parent)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_get_rate);</div><div class='del'>-</div><div class='del'>-int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	if (!clk-&gt;ops-&gt;set_rate)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return clk-&gt;ops-&gt;set_rate(clk, rate);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_set_rate);</div><div class='del'>-</div><div class='del'>-long clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	if (clk-&gt;ops-&gt;round_rate)</div><div class='del'>-		return clk-&gt;ops-&gt;round_rate(clk, rate);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_round_rate);</div><div class='del'>-</div><div class='del'>-int clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	int enabled;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;ops-&gt;set_parent)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	enabled = clk_is_enabled(clk);</div><div class='del'>-	if (enabled)</div><div class='del'>-		clk_disable(clk);</div><div class='del'>-	ret = clk-&gt;ops-&gt;set_parent(clk, parent);</div><div class='del'>-	if (enabled)</div><div class='del'>-		clk_enable(clk);</div><div class='del'>-</div><div class='del'>-	jz4740_clock_debugfs_update_parent(clk);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_set_parent);</div><div class='del'>-</div><div class='del'>-struct clk *clk_get(struct device *dev, const char *name)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(clk, &amp;jz_clocks, list) {</div><div class='del'>-		if (strcmp(clk-&gt;name, name) == 0)</div><div class='del'>-			return clk;</div><div class='del'>-	}</div><div class='del'>-	return ERR_PTR(-ENXIO);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_get);</div><div class='del'>-</div><div class='del'>-void clk_put(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_put);</div><div class='del'>-</div><div class='del'>-static inline void clk_add(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	list_add_tail(&amp;clk-&gt;list, &amp;jz_clocks);</div><div class='del'>-</div><div class='del'>-	jz4740_clock_debugfs_add_clk(clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_register_clks(void)</div><div class='del'>-{</div><div class='del'>-	size_t i;</div><div class='del'>-</div><div class='del'>-	clk_add(&amp;jz_clk_ext.clk);</div><div class='del'>-	clk_add(&amp;jz_clk_pll);</div><div class='del'>-	clk_add(&amp;jz_clk_pll_half);</div><div class='del'>-	clk_add(&amp;jz_clk_cpu.clk);</div><div class='del'>-	clk_add(&amp;jz_clk_high_speed_peripheral.clk);</div><div class='del'>-	clk_add(&amp;jz_clk_low_speed_peripheral.clk);</div><div class='del'>-	clk_add(&amp;jz_clk_ko);</div><div class='del'>-	clk_add(&amp;jz_clk_ld);</div><div class='del'>-	clk_add(&amp;jz_clk_rtc.clk);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(jz4740_clock_divided_clks); ++i)</div><div class='del'>-		clk_add(&amp;jz4740_clock_divided_clks[i].clk);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(jz4740_clock_simple_clks); ++i)</div><div class='del'>-		clk_add(&amp;jz4740_clock_simple_clks[i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode)</div><div class='del'>-{</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case JZ4740_WAIT_MODE_IDLE:</div><div class='del'>-		jz_clk_reg_clear_bits(JZ_REG_CLOCK_LOW_POWER, JZ_CLOCK_LOW_POWER_MODE_SLEEP);</div><div class='del'>-		break;</div><div class='del'>-	case JZ4740_WAIT_MODE_SLEEP:</div><div class='del'>-		jz_clk_reg_set_bits(JZ_REG_CLOCK_LOW_POWER, JZ_CLOCK_LOW_POWER_MODE_SLEEP);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_clock_udc_disable_auto_suspend(void)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(jz4740_clock_udc_disable_auto_suspend);</div><div class='del'>-</div><div class='del'>-void jz4740_clock_udc_enable_auto_suspend(void)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(jz4740_clock_udc_enable_auto_suspend);</div><div class='del'>-</div><div class='del'>-void jz4740_clock_suspend(void)</div><div class='del'>-{</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE,</div><div class='del'>-		JZ_CLOCK_GATE_TCU | JZ_CLOCK_GATE_DMAC | JZ_CLOCK_GATE_UART0);</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_PLL, JZ_CLOCK_PLL_ENABLED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_clock_resume(void)</div><div class='del'>-{</div><div class='del'>-	uint32_t pll;</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_set_bits(JZ_REG_CLOCK_PLL, JZ_CLOCK_PLL_ENABLED);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		pll = jz_clk_reg_read(JZ_REG_CLOCK_PLL);</div><div class='del'>-	} while (!(pll &amp; JZ_CLOCK_PLL_STABLE));</div><div class='del'>-</div><div class='del'>-	jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE,</div><div class='del'>-		JZ_CLOCK_GATE_TCU | JZ_CLOCK_GATE_DMAC | JZ_CLOCK_GATE_UART0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int jz4740_clock_init(void)</div><div class='del'>-{</div><div class='del'>-	uint32_t val;</div><div class='del'>-</div><div class='del'>-	jz_clock_base = ioremap(JZ4740_CPM_BASE_ADDR, 0x100);</div><div class='del'>-	if (!jz_clock_base)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;jz_clock_lock);</div><div class='del'>-</div><div class='del'>-	jz_clk_ext.rate = jz4740_clock_bdata.ext_rate;</div><div class='del'>-	jz_clk_rtc.rate = jz4740_clock_bdata.rtc_rate;</div><div class='del'>-</div><div class='del'>-	val = jz_clk_reg_read(JZ_REG_CLOCK_SPI);</div><div class='del'>-</div><div class='del'>-	if (val &amp; JZ_CLOCK_SPI_SRC_PLL)</div><div class='del'>-		jz4740_clock_divided_clks[1].clk.parent = &amp;jz_clk_pll_half;</div><div class='del'>-</div><div class='del'>-	val = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);</div><div class='del'>-</div><div class='del'>-	if (val &amp; JZ_CLOCK_CTRL_I2S_SRC_PLL)</div><div class='del'>-		jz4740_clock_divided_clks[0].clk.parent = &amp;jz_clk_pll_half;</div><div class='del'>-</div><div class='del'>-	if (val &amp; JZ_CLOCK_CTRL_UDC_SRC_PLL)</div><div class='del'>-		jz4740_clock_simple_clks[0].parent = &amp;jz_clk_pll_half;</div><div class='del'>-</div><div class='del'>-	jz4740_clock_debugfs_init();</div><div class='del'>-</div><div class='del'>-	clk_register_clks();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-arch_initcall(jz4740_clock_init);</div><div class='head'>diff --git a/arch/mips/jz4740/clock.h b/arch/mips/jz4740/clock.h<br/>deleted file mode 100644<br/>index 5d07499d7461..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/clock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/clock.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,76 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 SoC clock support</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute	 it and/or modify it</div><div class='del'>- *  under  the terms of	 the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the	License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the  GNU General Public License along</div><div class='del'>- *  with this program; if not, write  to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MIPS_JZ4740_CLOCK_H__</div><div class='del'>-#define __MIPS_JZ4740_CLOCK_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-</div><div class='del'>-struct jz4740_clock_board_data {</div><div class='del'>-	unsigned long ext_rate;</div><div class='del'>-	unsigned long rtc_rate;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct jz4740_clock_board_data jz4740_clock_bdata;</div><div class='del'>-</div><div class='del'>-void jz4740_clock_suspend(void);</div><div class='del'>-void jz4740_clock_resume(void);</div><div class='del'>-</div><div class='del'>-struct clk;</div><div class='del'>-</div><div class='del'>-struct clk_ops {</div><div class='del'>-	unsigned long (*get_rate)(struct clk *clk);</div><div class='del'>-	unsigned long (*round_rate)(struct clk *clk, unsigned long rate);</div><div class='del'>-	int (*set_rate)(struct clk *clk, unsigned long rate);</div><div class='del'>-	int (*enable)(struct clk *clk);</div><div class='del'>-	int (*disable)(struct clk *clk);</div><div class='del'>-	int (*is_enabled)(struct clk *clk);</div><div class='del'>-</div><div class='del'>-	int (*set_parent)(struct clk *clk, struct clk *parent);</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct clk {</div><div class='del'>-	const char *name;</div><div class='del'>-	struct clk *parent;</div><div class='del'>-</div><div class='del'>-	uint32_t gate_bit;</div><div class='del'>-</div><div class='del'>-	const struct clk_ops *ops;</div><div class='del'>-</div><div class='del'>-	struct list_head list;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-	struct dentry *debugfs_entry;</div><div class='del'>-	struct dentry *debugfs_parent_entry;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define JZ4740_CLK_NOT_GATED ((uint32_t)-1)</div><div class='del'>-</div><div class='del'>-int clk_is_enabled(struct clk *clk);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-void jz4740_clock_debugfs_init(void);</div><div class='del'>-void jz4740_clock_debugfs_add_clk(struct clk *clk);</div><div class='del'>-void jz4740_clock_debugfs_update_parent(struct clk *clk);</div><div class='del'>-#else</div><div class='del'>-static inline void jz4740_clock_debugfs_init(void) {};</div><div class='del'>-static inline void jz4740_clock_debugfs_add_clk(struct clk *clk) {};</div><div class='del'>-static inline void jz4740_clock_debugfs_update_parent(struct clk *clk) {};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c<br/>index 00b798d2fb7c..54c80d42a88d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/gpio.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/gpio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/gpio.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/ingenic.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='hunk'>@@ -28,8 +29,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-jz4740/base.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "irq.h"</div><div class='del'>-</div><div class='ctx'> #define JZ4740_GPIO_BASE_A (32*0)</div><div class='ctx'> #define JZ4740_GPIO_BASE_B (32*1)</div><div class='ctx'> #define JZ4740_GPIO_BASE_C (32*2)</div><div class='hunk'>@@ -442,8 +441,8 @@ static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)</div><div class='ctx'> 	ct-&gt;chip.irq_mask = irq_gc_mask_disable_reg;</div><div class='ctx'> 	ct-&gt;chip.irq_unmask = jz_gpio_irq_unmask;</div><div class='ctx'> 	ct-&gt;chip.irq_ack = irq_gc_ack_set_bit;</div><div class='del'>-	ct-&gt;chip.irq_suspend = jz4740_irq_suspend;</div><div class='del'>-	ct-&gt;chip.irq_resume = jz4740_irq_resume;</div><div class='add'>+	ct-&gt;chip.irq_suspend = ingenic_intc_irq_suspend;</div><div class='add'>+	ct-&gt;chip.irq_resume = ingenic_intc_irq_resume;</div><div class='ctx'> 	ct-&gt;chip.irq_startup = jz_gpio_irq_startup;</div><div class='ctx'> 	ct-&gt;chip.irq_shutdown = jz_gpio_irq_shutdown;</div><div class='ctx'> 	ct-&gt;chip.irq_set_type = jz_gpio_irq_set_type;</div><div class='head'>diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c<br/>deleted file mode 100644<br/>index 97206b3deb97..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/irq.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,162 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2009-2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 platform IRQ support</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under  the terms of the GNU General	 Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License along</div><div class='del'>- *  with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/timex.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/mipsregs.h&gt;</div><div class='del'>-#include &lt;asm/irq_cpu.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-jz4740/base.h&gt;</div><div class='del'>-#include &lt;asm/mach-jz4740/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "irq.h"</div><div class='del'>-</div><div class='del'>-static void __iomem *jz_intc_base;</div><div class='del'>-</div><div class='del'>-#define JZ_REG_INTC_STATUS	0x00</div><div class='del'>-#define JZ_REG_INTC_MASK	0x04</div><div class='del'>-#define JZ_REG_INTC_SET_MASK	0x08</div><div class='del'>-#define JZ_REG_INTC_CLEAR_MASK	0x0c</div><div class='del'>-#define JZ_REG_INTC_PENDING	0x10</div><div class='del'>-</div><div class='del'>-static irqreturn_t jz4740_cascade(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	uint32_t irq_reg;</div><div class='del'>-</div><div class='del'>-	irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING);</div><div class='del'>-</div><div class='del'>-	if (irq_reg)</div><div class='del'>-		generic_handle_irq(__fls(irq_reg) + JZ4740_IRQ_BASE);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void jz4740_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip_regs *regs = &amp;gc-&gt;chip_types-&gt;regs;</div><div class='del'>-</div><div class='del'>-	writel(mask, gc-&gt;reg_base + regs-&gt;enable);</div><div class='del'>-	writel(~mask, gc-&gt;reg_base + regs-&gt;disable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_irq_suspend(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);</div><div class='del'>-	jz4740_irq_set_mask(gc, gc-&gt;wake_active);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void jz4740_irq_resume(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);</div><div class='del'>-	jz4740_irq_set_mask(gc, gc-&gt;mask_cache);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irqaction jz4740_cascade_action = {</div><div class='del'>-	.handler = jz4740_cascade,</div><div class='del'>-	.name = "JZ4740 cascade interrupt",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init arch_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip_generic *gc;</div><div class='del'>-	struct irq_chip_type *ct;</div><div class='del'>-</div><div class='del'>-	mips_cpu_irq_init();</div><div class='del'>-</div><div class='del'>-	jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14);</div><div class='del'>-</div><div class='del'>-	/* Mask all irqs */</div><div class='del'>-	writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK);</div><div class='del'>-</div><div class='del'>-	gc = irq_alloc_generic_chip("INTC", 1, JZ4740_IRQ_BASE, jz_intc_base,</div><div class='del'>-		handle_level_irq);</div><div class='del'>-</div><div class='del'>-	gc-&gt;wake_enabled = IRQ_MSK(32);</div><div class='del'>-</div><div class='del'>-	ct = gc-&gt;chip_types;</div><div class='del'>-	ct-&gt;regs.enable = JZ_REG_INTC_CLEAR_MASK;</div><div class='del'>-	ct-&gt;regs.disable = JZ_REG_INTC_SET_MASK;</div><div class='del'>-	ct-&gt;chip.irq_unmask = irq_gc_unmask_enable_reg;</div><div class='del'>-	ct-&gt;chip.irq_mask = irq_gc_mask_disable_reg;</div><div class='del'>-	ct-&gt;chip.irq_mask_ack = irq_gc_mask_disable_reg;</div><div class='del'>-	ct-&gt;chip.irq_set_wake = irq_gc_set_wake;</div><div class='del'>-	ct-&gt;chip.irq_suspend = jz4740_irq_suspend;</div><div class='del'>-	ct-&gt;chip.irq_resume = jz4740_irq_resume;</div><div class='del'>-</div><div class='del'>-	irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);</div><div class='del'>-</div><div class='del'>-	setup_irq(2, &amp;jz4740_cascade_action);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void plat_irq_dispatch(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int pending = read_c0_status() &amp; read_c0_cause() &amp; ST0_IM;</div><div class='del'>-	if (pending &amp; STATUSF_IP2)</div><div class='del'>-		do_IRQ(2);</div><div class='del'>-	else if (pending &amp; STATUSF_IP3)</div><div class='del'>-		do_IRQ(3);</div><div class='del'>-	else</div><div class='del'>-		spurious_interrupt();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-</div><div class='del'>-static inline void intc_seq_reg(struct seq_file *s, const char *name,</div><div class='del'>-	unsigned int reg)</div><div class='del'>-{</div><div class='del'>-	seq_printf(s, "%s:\t\t%08x\n", name, readl(jz_intc_base + reg));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int intc_regs_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	intc_seq_reg(s, "Status", JZ_REG_INTC_STATUS);</div><div class='del'>-	intc_seq_reg(s, "Mask", JZ_REG_INTC_MASK);</div><div class='del'>-	intc_seq_reg(s, "Pending", JZ_REG_INTC_PENDING);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int intc_regs_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, intc_regs_show, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations intc_regs_operations = {</div><div class='del'>-	.open		= intc_regs_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init intc_debugfs_init(void)</div><div class='del'>-{</div><div class='del'>-	(void) debugfs_create_file("jz_regs_intc", S_IFREG | S_IRUGO,</div><div class='del'>-				NULL, NULL, &amp;intc_regs_operations);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-subsys_initcall(intc_debugfs_init);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c<br/>index 0b12f273cb2e..e8a463b9b663 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/platform.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/platform.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -29,7 +30,6 @@</div><div class='ctx'> #include &lt;linux/serial_core.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "serial.h"</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> </div><div class='ctx'> /* OHCI controller */</div><div class='hunk'>@@ -279,42 +279,6 @@ struct platform_device jz4740_adc_device = {</div><div class='ctx'> 	.resource	= jz4740_adc_resources,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Serial */</div><div class='del'>-#define JZ4740_UART_DATA(_id) \</div><div class='del'>-	{ \</div><div class='del'>-		.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \</div><div class='del'>-		.iotype = UPIO_MEM, \</div><div class='del'>-		.regshift = 2, \</div><div class='del'>-		.serial_out = jz4740_serial_out, \</div><div class='del'>-		.type = PORT_16550, \</div><div class='del'>-		.mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \</div><div class='del'>-		.irq = JZ4740_IRQ_UART ## _id, \</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static struct plat_serial8250_port jz4740_uart_data[] = {</div><div class='del'>-	JZ4740_UART_DATA(0),</div><div class='del'>-	JZ4740_UART_DATA(1),</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device jz4740_uart_device = {</div><div class='del'>-	.name = "serial8250",</div><div class='del'>-	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = jz4740_uart_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void jz4740_serial_device_register(void)</div><div class='del'>-{</div><div class='del'>-	struct plat_serial8250_port *p;</div><div class='del'>-</div><div class='del'>-	for (p = jz4740_uart_data; p-&gt;flags != 0; ++p)</div><div class='del'>-		p-&gt;uartclk = jz4740_clock_bdata.ext_rate;</div><div class='del'>-</div><div class='del'>-	platform_device_register(&amp;jz4740_uart_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Watchdog */</div><div class='ctx'> static struct resource jz4740_wdt_resources[] = {</div><div class='ctx'> 	{</div><div class='head'>diff --git a/arch/mips/jz4740/pm.c b/arch/mips/jz4740/pm.c<br/>index d8e213010169..2d8653f2fc61 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/pm.c</a></div><div class='hunk'>@@ -20,8 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-jz4740/clock.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "clock.h"</div><div class='del'>-</div><div class='ctx'> static int jz4740_pm_enter(suspend_state_t state)</div><div class='ctx'> {</div><div class='ctx'> 	jz4740_clock_suspend();</div><div class='head'>diff --git a/arch/mips/jz4740/prom.c b/arch/mips/jz4740/prom.c<br/>index 5a93f381590d..6984683c90d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/prom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/prom.c</a></div><div class='hunk'>@@ -53,16 +53,3 @@ void __init prom_init(void)</div><div class='ctx'> void __init prom_free_prom_memory(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#define UART_REG(_reg) ((void __iomem *)CKSEG1ADDR(JZ4740_UART0_BASE_ADDR + (_reg &lt;&lt; 2)))</div><div class='del'>-</div><div class='del'>-void prom_putchar(char c)</div><div class='del'>-{</div><div class='del'>-	uint8_t lsr;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		lsr = readb(UART_REG(UART_LSR));</div><div class='del'>-	} while ((lsr &amp; UART_LSR_TEMT) == 0);</div><div class='del'>-</div><div class='del'>-	writeb(c, UART_REG(UART_TX));</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c<br/>index b6c6343d2834..954e669c9e6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/reset.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='hunk'>@@ -79,12 +80,20 @@ static void jz4740_power_off(void)</div><div class='ctx'> 	void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);</div><div class='ctx'> 	unsigned long wakeup_filter_ticks;</div><div class='ctx'> 	unsigned long reset_counter_ticks;</div><div class='add'>+	struct clk *rtc_clk;</div><div class='add'>+	unsigned long rtc_rate;</div><div class='add'>+</div><div class='add'>+	rtc_clk = clk_get(NULL, "rtc");</div><div class='add'>+	if (IS_ERR(rtc_clk))</div><div class='add'>+		panic("unable to get RTC clock");</div><div class='add'>+	rtc_rate = clk_get_rate(rtc_clk);</div><div class='add'>+	clk_put(rtc_clk);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set minimum wakeup pin assertion time: 100 ms.</div><div class='ctx'> 	 * Range is 0 to 2 sec if RTC is clocked at 32 kHz.</div><div class='ctx'> 	 */</div><div class='del'>-	wakeup_filter_ticks = (100 * jz4740_clock_bdata.rtc_rate) / 1000;</div><div class='add'>+	wakeup_filter_ticks = (100 * rtc_rate) / 1000;</div><div class='ctx'> 	if (wakeup_filter_ticks &lt; JZ_RTC_WAKEUP_FILTER_MASK)</div><div class='ctx'> 		wakeup_filter_ticks &amp;= JZ_RTC_WAKEUP_FILTER_MASK;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -96,7 +105,7 @@ static void jz4740_power_off(void)</div><div class='ctx'> 	 * Set reset pin low-level assertion time after wakeup: 60 ms.</div><div class='ctx'> 	 * Range is 0 to 125 ms if RTC is clocked at 32 kHz.</div><div class='ctx'> 	 */</div><div class='del'>-	reset_counter_ticks = (60 * jz4740_clock_bdata.rtc_rate) / 1000;</div><div class='add'>+	reset_counter_ticks = (60 * rtc_rate) / 1000;</div><div class='ctx'> 	if (reset_counter_ticks &lt; JZ_RTC_RESET_COUNTER_MASK)</div><div class='ctx'> 		reset_counter_ticks &amp;= JZ_RTC_RESET_COUNTER_MASK;</div><div class='ctx'> 	else</div><div class='head'>diff --git a/arch/mips/jz4740/serial.c b/arch/mips/jz4740/serial.c<br/>deleted file mode 100644<br/>index d23de45826d1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/serial.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/serial.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 serial support</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute	 it and/or modify it</div><div class='del'>- *  under  the terms of	 the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the	License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the  GNU General Public License along</div><div class='del'>- *  with this program; if not, write  to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/serial_reg.h&gt;</div><div class='del'>-</div><div class='del'>-void jz4740_serial_out(struct uart_port *p, int offset, int value)</div><div class='del'>-{</div><div class='del'>-	switch (offset) {</div><div class='del'>-	case UART_FCR:</div><div class='del'>-		value |= 0x10; /* Enable uart module */</div><div class='del'>-		break;</div><div class='del'>-	case UART_IER:</div><div class='del'>-		value |= (value &amp; 0x4) &lt;&lt; 2;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	writeb(value, p-&gt;membase + (offset &lt;&lt; p-&gt;regshift));</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/jz4740/serial.h b/arch/mips/jz4740/serial.h<br/>deleted file mode 100644<br/>index 8eb715bb1ea8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/serial.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2010, Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='del'>- *  JZ4740 serial support</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute	 it and/or modify it</div><div class='del'>- *  under  the terms of	 the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the	License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the  GNU General Public License along</div><div class='del'>- *  with this program; if not, write  to the Free Software Foundation, Inc.,</div><div class='del'>- *  675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MIPS_JZ4740_SERIAL_H__</div><div class='del'>-#define __MIPS_JZ4740_SERIAL_H__</div><div class='del'>-</div><div class='del'>-struct uart_port;</div><div class='del'>-</div><div class='del'>-void jz4740_serial_out(struct uart_port *p, int offset, int value);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c<br/>index ef796f97b996..510fc0d962f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/setup.c</a></div><div class='hunk'>@@ -16,9 +16,14 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/libfdt.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-jz4740/base.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -51,11 +56,40 @@ static void __init jz4740_detect_mem(void)</div><div class='ctx'> </div><div class='ctx'> void __init plat_mem_setup(void)</div><div class='ctx'> {</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='ctx'> 	jz4740_reset_init();</div><div class='del'>-	jz4740_detect_mem();</div><div class='add'>+	__dt_setup_arch(__dtb_start);</div><div class='add'>+</div><div class='add'>+	offset = fdt_path_offset(__dtb_start, "/memory");</div><div class='add'>+	if (offset &lt; 0)</div><div class='add'>+		jz4740_detect_mem();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init device_tree_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!initial_boot_params)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	unflatten_and_copy_device_tree();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init populate_machine(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+arch_initcall(populate_machine);</div><div class='add'>+</div><div class='ctx'> const char *get_system_type(void)</div><div class='ctx'> {</div><div class='add'>+	if (config_enabled(CONFIG_MACH_JZ4780))</div><div class='add'>+		return "JZ4780";</div><div class='add'>+</div><div class='ctx'> 	return "JZ4740";</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init arch_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	irqchip_init();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c<br/>index 72b0cecbc17c..7ab47fee1be8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/jz4740/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/jz4740/time.c</a></div><div class='hunk'>@@ -13,6 +13,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='hunk'>@@ -20,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/sched_clock.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/mach-jz4740/clock.h&gt;</div><div class='ctx'> #include &lt;asm/mach-jz4740/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach-jz4740/timer.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='hunk'>@@ -99,7 +102,12 @@ static struct clock_event_device jz4740_clockevent = {</div><div class='ctx'> 	.set_next_event = jz4740_clockevent_set_next,</div><div class='ctx'> 	.set_mode = jz4740_clockevent_set_mode,</div><div class='ctx'> 	.rating = 200,</div><div class='add'>+#ifdef CONFIG_MACH_JZ4740</div><div class='ctx'> 	.irq = JZ4740_IRQ_TCU0,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_MACH_JZ4780</div><div class='add'>+	.irq = JZ4780_IRQ_TCU2,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irqaction timer_irqaction = {</div><div class='hunk'>@@ -114,10 +122,17 @@ void __init plat_time_init(void)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	uint32_t clk_rate;</div><div class='ctx'> 	uint16_t ctrl;</div><div class='add'>+	struct clk *ext_clk;</div><div class='ctx'> </div><div class='add'>+	of_clk_init(NULL);</div><div class='ctx'> 	jz4740_timer_init();</div><div class='ctx'> </div><div class='del'>-	clk_rate = jz4740_clock_bdata.ext_rate &gt;&gt; 4;</div><div class='add'>+	ext_clk = clk_get(NULL, "ext");</div><div class='add'>+	if (IS_ERR(ext_clk))</div><div class='add'>+		panic("unable to get ext clock");</div><div class='add'>+	clk_rate = clk_get_rate(ext_clk) &gt;&gt; 4;</div><div class='add'>+	clk_put(ext_clk);</div><div class='add'>+</div><div class='ctx'> 	jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);</div><div class='ctx'> </div><div class='ctx'> 	clockevent_set_clock(&amp;jz4740_clockevent, clk_rate);</div><div class='hunk'>@@ -134,7 +149,7 @@ void __init plat_time_init(void)</div><div class='ctx'> </div><div class='ctx'> 	sched_clock_register(jz4740_read_sched_clock, 16, clk_rate);</div><div class='ctx'> </div><div class='del'>-	setup_irq(JZ4740_IRQ_TCU0, &amp;timer_irqaction);</div><div class='add'>+	setup_irq(jz4740_clockevent.irq, &amp;timer_irqaction);</div><div class='ctx'> </div><div class='ctx'> 	ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile<br/>index d3d2ff2d76dc..3f5cf8aff6f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/Makefile</a></div><div class='hunk'>@@ -62,7 +62,6 @@ obj-$(CONFIG_MIPS_VPE_APSP_API_CMP) += rtlx-cmp.o</div><div class='ctx'> obj-$(CONFIG_MIPS_VPE_APSP_API_MT) += rtlx-mt.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_I8259)		+= i8259.o</div><div class='del'>-obj-$(CONFIG_IRQ_CPU)		+= irq_cpu.o</div><div class='ctx'> obj-$(CONFIG_IRQ_CPU_RM7K)	+= irq-rm7000.o</div><div class='ctx'> obj-$(CONFIG_MIPS_MSC)		+= irq-msc01.o</div><div class='ctx'> obj-$(CONFIG_IRQ_TXX9)		+= irq_txx9.o</div><div class='hunk'>@@ -77,6 +76,7 @@ obj-$(CONFIG_MIPS32_O32)	+= binfmt_elfo32.o scall64-o32.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KGDB)		+= kgdb.o</div><div class='ctx'> obj-$(CONFIG_PROC_FS)		+= proc.o</div><div class='add'>+obj-$(CONFIG_MAGIC_SYSRQ)	+= sysrq.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_64BIT)		+= cpu-bugs64.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c<br/>index beabe19ff8e5..072fab13645d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/asm-offsets.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * offset.c: Calculate pt_regs and task_struct offsets.</div><div class='add'>+ * asm-offsets.c: Calculate pt_regs and task_struct offsets.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1996 David S. Miller</div><div class='ctx'>  * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle</div><div class='head'>diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c<br/>index c0c5e5972256..d8f9b357b222 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/branch.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/branch.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/branch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/branch.c</a></div><div class='hunk'>@@ -600,7 +600,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case blezl_op: /* not really i_format */</div><div class='del'>-		if (NO_R6EMU)</div><div class='add'>+		if (!insn.i_format.rt &amp;&amp; NO_R6EMU)</div><div class='ctx'> 			goto sigill_r6;</div><div class='ctx'> 	case blez_op:</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -635,7 +635,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case bgtzl_op:</div><div class='del'>-		if (NO_R6EMU)</div><div class='add'>+		if (!insn.i_format.rt &amp;&amp; NO_R6EMU)</div><div class='ctx'> 			goto sigill_r6;</div><div class='ctx'> 	case bgtz_op:</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S<br/>index 55b759a0019e..1b6ca634e646 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/cps-vec.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/cps-vec.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/cps-vec.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/cps-vec.S</a></div><div class='hunk'>@@ -60,7 +60,7 @@ LEAF(mips_cps_core_entry)</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	/* This is an NMI */</div><div class='del'>-	la	k0, nmi_handler</div><div class='add'>+	PTR_LA	k0, nmi_handler</div><div class='ctx'> 	jr	k0</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -107,10 +107,10 @@ not_nmi:</div><div class='ctx'> 	mul	t1, t1, t0</div><div class='ctx'> 	mul	t1, t1, t2</div><div class='ctx'> </div><div class='del'>-	li	a0, KSEG0</div><div class='del'>-	add	a1, a0, t1</div><div class='add'>+	li	a0, CKSEG0</div><div class='add'>+	PTR_ADD	a1, a0, t1</div><div class='ctx'> 1:	cache	Index_Store_Tag_I, 0(a0)</div><div class='del'>-	add	a0, a0, t0</div><div class='add'>+	PTR_ADD	a0, a0, t0</div><div class='ctx'> 	bne	a0, a1, 1b</div><div class='ctx'> 	 nop</div><div class='ctx'> icache_done:</div><div class='hunk'>@@ -134,12 +134,12 @@ icache_done:</div><div class='ctx'> 	mul	t1, t1, t0</div><div class='ctx'> 	mul	t1, t1, t2</div><div class='ctx'> </div><div class='del'>-	li	a0, KSEG0</div><div class='del'>-	addu	a1, a0, t1</div><div class='del'>-	subu	a1, a1, t0</div><div class='add'>+	li	a0, CKSEG0</div><div class='add'>+	PTR_ADDU a1, a0, t1</div><div class='add'>+	PTR_SUBU a1, a1, t0</div><div class='ctx'> 1:	cache	Index_Store_Tag_D, 0(a0)</div><div class='ctx'> 	bne	a0, a1, 1b</div><div class='del'>-	 add	a0, a0, t0</div><div class='add'>+	 PTR_ADD a0, a0, t0</div><div class='ctx'> dcache_done:</div><div class='ctx'> </div><div class='ctx'> 	/* Set Kseg0 CCA to that in s0 */</div><div class='hunk'>@@ -152,11 +152,11 @@ dcache_done:</div><div class='ctx'> </div><div class='ctx'> 	/* Enter the coherent domain */</div><div class='ctx'> 	li	t0, 0xff</div><div class='del'>-	sw	t0, GCR_CL_COHERENCE_OFS(v1)</div><div class='add'>+	PTR_S	t0, GCR_CL_COHERENCE_OFS(v1)</div><div class='ctx'> 	ehb</div><div class='ctx'> </div><div class='ctx'> 	/* Jump to kseg0 */</div><div class='del'>-	la	t0, 1f</div><div class='add'>+	PTR_LA	t0, 1f</div><div class='ctx'> 	jr	t0</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -178,9 +178,9 @@ dcache_done:</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	/* Off we go! */</div><div class='del'>-	lw	t1, VPEBOOTCFG_PC(v0)</div><div class='del'>-	lw	gp, VPEBOOTCFG_GP(v0)</div><div class='del'>-	lw	sp, VPEBOOTCFG_SP(v0)</div><div class='add'>+	PTR_L	t1, VPEBOOTCFG_PC(v0)</div><div class='add'>+	PTR_L	gp, VPEBOOTCFG_GP(v0)</div><div class='add'>+	PTR_L	sp, VPEBOOTCFG_SP(v0)</div><div class='ctx'> 	jr	t1</div><div class='ctx'> 	 nop</div><div class='ctx'> 	END(mips_cps_core_entry)</div><div class='hunk'>@@ -217,7 +217,7 @@ LEAF(excep_intex)</div><div class='ctx'> </div><div class='ctx'> .org 0x480</div><div class='ctx'> LEAF(excep_ejtag)</div><div class='del'>-	la	k0, ejtag_debug_handler</div><div class='add'>+	PTR_LA	k0, ejtag_debug_handler</div><div class='ctx'> 	jr	k0</div><div class='ctx'> 	 nop</div><div class='ctx'> 	END(excep_ejtag)</div><div class='hunk'>@@ -229,7 +229,7 @@ LEAF(mips_cps_core_init)</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	.set	push</div><div class='del'>-	.set	mips32r2</div><div class='add'>+	.set	mips64r2</div><div class='ctx'> 	.set	mt</div><div class='ctx'> </div><div class='ctx'> 	/* Only allow 1 TC per VPE to execute... */</div><div class='hunk'>@@ -237,7 +237,7 @@ LEAF(mips_cps_core_init)</div><div class='ctx'> </div><div class='ctx'> 	/* ...and for the moment only 1 VPE */</div><div class='ctx'> 	dvpe</div><div class='del'>-	la	t1, 1f</div><div class='add'>+	PTR_LA	t1, 1f</div><div class='ctx'> 	jr.hb	t1</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -250,25 +250,25 @@ LEAF(mips_cps_core_init)</div><div class='ctx'> 	mfc0	t0, CP0_MVPCONF0</div><div class='ctx'> 	srl	t0, t0, MVPCONF0_PVPE_SHIFT</div><div class='ctx'> 	andi	t0, t0, (MVPCONF0_PVPE &gt;&gt; MVPCONF0_PVPE_SHIFT)</div><div class='del'>-	addiu	t7, t0, 1</div><div class='add'>+	addiu	ta3, t0, 1</div><div class='ctx'> </div><div class='ctx'> 	/* If there's only 1, we're done */</div><div class='ctx'> 	beqz	t0, 2f</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	/* Loop through each VPE within this core */</div><div class='del'>-	li	t5, 1</div><div class='add'>+	li	ta1, 1</div><div class='ctx'> </div><div class='ctx'> 1:	/* Operate on the appropriate TC */</div><div class='del'>-	mtc0	t5, CP0_VPECONTROL</div><div class='add'>+	mtc0	ta1, CP0_VPECONTROL</div><div class='ctx'> 	ehb</div><div class='ctx'> </div><div class='ctx'> 	/* Bind TC to VPE (1:1 TC:VPE mapping) */</div><div class='del'>-	mttc0	t5, CP0_TCBIND</div><div class='add'>+	mttc0	ta1, CP0_TCBIND</div><div class='ctx'> </div><div class='ctx'> 	/* Set exclusive TC, non-active, master */</div><div class='ctx'> 	li	t0, VPECONF0_MVP</div><div class='del'>-	sll	t1, t5, VPECONF0_XTC_SHIFT</div><div class='add'>+	sll	t1, ta1, VPECONF0_XTC_SHIFT</div><div class='ctx'> 	or	t0, t0, t1</div><div class='ctx'> 	mttc0	t0, CP0_VPECONF0</div><div class='ctx'> </div><div class='hunk'>@@ -280,8 +280,8 @@ LEAF(mips_cps_core_init)</div><div class='ctx'> 	mttc0	t0, CP0_TCHALT</div><div class='ctx'> </div><div class='ctx'> 	/* Next VPE */</div><div class='del'>-	addiu	t5, t5, 1</div><div class='del'>-	slt	t0, t5, t7</div><div class='add'>+	addiu	ta1, ta1, 1</div><div class='add'>+	slt	t0, ta1, ta3</div><div class='ctx'> 	bnez	t0, 1b</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -298,19 +298,19 @@ LEAF(mips_cps_core_init)</div><div class='ctx'> </div><div class='ctx'> LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	/* Retrieve CM base address */</div><div class='del'>-	la	t0, mips_cm_base</div><div class='del'>-	lw	t0, 0(t0)</div><div class='add'>+	PTR_LA	t0, mips_cm_base</div><div class='add'>+	PTR_L	t0, 0(t0)</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate a pointer to this cores struct core_boot_config */</div><div class='del'>-	lw	t0, GCR_CL_ID_OFS(t0)</div><div class='add'>+	PTR_L	t0, GCR_CL_ID_OFS(t0)</div><div class='ctx'> 	li	t1, COREBOOTCFG_SIZE</div><div class='ctx'> 	mul	t0, t0, t1</div><div class='del'>-	la	t1, mips_cps_core_bootcfg</div><div class='del'>-	lw	t1, 0(t1)</div><div class='del'>-	addu	t0, t0, t1</div><div class='add'>+	PTR_LA	t1, mips_cps_core_bootcfg</div><div class='add'>+	PTR_L	t1, 0(t1)</div><div class='add'>+	PTR_ADDU t0, t0, t1</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate this VPEs ID. If the core doesn't support MT use 0 */</div><div class='del'>-	has_mt	t6, 1f</div><div class='add'>+	has_mt	ta2, 1f</div><div class='ctx'> 	 li	t9, 0</div><div class='ctx'> </div><div class='ctx'> 	/* Find the number of VPEs present in the core */</div><div class='hunk'>@@ -334,24 +334,24 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 1:	/* Calculate a pointer to this VPEs struct vpe_boot_config */</div><div class='ctx'> 	li	t1, VPEBOOTCFG_SIZE</div><div class='ctx'> 	mul	v0, t9, t1</div><div class='del'>-	lw	t7, COREBOOTCFG_VPECONFIG(t0)</div><div class='del'>-	addu	v0, v0, t7</div><div class='add'>+	PTR_L	ta3, COREBOOTCFG_VPECONFIG(t0)</div><div class='add'>+	PTR_ADDU v0, v0, ta3</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MIPS_MT</div><div class='ctx'> </div><div class='ctx'> 	/* If the core doesn't support MT then return */</div><div class='del'>-	bnez	t6, 1f</div><div class='add'>+	bnez	ta2, 1f</div><div class='ctx'> 	 nop</div><div class='ctx'> 	jr	ra</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	.set	push</div><div class='del'>-	.set	mips32r2</div><div class='add'>+	.set	mips64r2</div><div class='ctx'> 	.set	mt</div><div class='ctx'> </div><div class='ctx'> 1:	/* Enter VPE configuration state */</div><div class='ctx'> 	dvpe</div><div class='del'>-	la	t1, 1f</div><div class='add'>+	PTR_LA	t1, 1f</div><div class='ctx'> 	jr.hb	t1</div><div class='ctx'> 	 nop</div><div class='ctx'> 1:	mfc0	t1, CP0_MVPCONTROL</div><div class='hunk'>@@ -360,12 +360,12 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	ehb</div><div class='ctx'> </div><div class='ctx'> 	/* Loop through each VPE */</div><div class='del'>-	lw	t6, COREBOOTCFG_VPEMASK(t0)</div><div class='del'>-	move	t8, t6</div><div class='del'>-	li	t5, 0</div><div class='add'>+	PTR_L	ta2, COREBOOTCFG_VPEMASK(t0)</div><div class='add'>+	move	t8, ta2</div><div class='add'>+	li	ta1, 0</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether the VPE should be running. If not, skip it */</div><div class='del'>-1:	andi	t0, t6, 1</div><div class='add'>+1:	andi	t0, ta2, 1</div><div class='ctx'> 	beqz	t0, 2f</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -373,7 +373,7 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	mfc0	t0, CP0_VPECONTROL</div><div class='ctx'> 	ori	t0, t0, VPECONTROL_TARGTC</div><div class='ctx'> 	xori	t0, t0, VPECONTROL_TARGTC</div><div class='del'>-	or	t0, t0, t5</div><div class='add'>+	or	t0, t0, ta1</div><div class='ctx'> 	mtc0	t0, CP0_VPECONTROL</div><div class='ctx'> 	ehb</div><div class='ctx'> </div><div class='hunk'>@@ -384,8 +384,8 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate a pointer to the VPEs struct vpe_boot_config */</div><div class='ctx'> 	li	t0, VPEBOOTCFG_SIZE</div><div class='del'>-	mul	t0, t0, t5</div><div class='del'>-	addu	t0, t0, t7</div><div class='add'>+	mul	t0, t0, ta1</div><div class='add'>+	addu	t0, t0, ta3</div><div class='ctx'> </div><div class='ctx'> 	/* Set the TC restart PC */</div><div class='ctx'> 	lw	t1, VPEBOOTCFG_PC(t0)</div><div class='hunk'>@@ -423,9 +423,9 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	mttc0	t0, CP0_VPECONF0</div><div class='ctx'> </div><div class='ctx'> 	/* Next VPE */</div><div class='del'>-2:	srl	t6, t6, 1</div><div class='del'>-	addiu	t5, t5, 1</div><div class='del'>-	bnez	t6, 1b</div><div class='add'>+2:	srl	ta2, ta2, 1</div><div class='add'>+	addiu	ta1, ta1, 1</div><div class='add'>+	bnez	ta2, 1b</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	/* Leave VPE configuration state */</div><div class='hunk'>@@ -445,7 +445,7 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	/* This VPE should be offline, halt the TC */</div><div class='ctx'> 	li	t0, TCHALT_H</div><div class='ctx'> 	mtc0	t0, CP0_TCHALT</div><div class='del'>-	la	t0, 1f</div><div class='add'>+	PTR_LA	t0, 1f</div><div class='ctx'> 1:	jr.hb	t0</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='hunk'>@@ -466,10 +466,10 @@ LEAF(mips_cps_boot_vpes)</div><div class='ctx'> 	.set	noat</div><div class='ctx'> 	lw	$1, TI_CPU(gp)</div><div class='ctx'> 	sll	$1, $1, LONGLOG</div><div class='del'>-	la	\dest, __per_cpu_offset</div><div class='add'>+	PTR_LA	\dest, __per_cpu_offset</div><div class='ctx'> 	addu	$1, $1, \dest</div><div class='ctx'> 	lw	$1, 0($1)</div><div class='del'>-	la	\dest, cps_cpu_state</div><div class='add'>+	PTR_LA	\dest, cps_cpu_state</div><div class='ctx'> 	addu	\dest, \dest, $1</div><div class='ctx'> 	.set	pop</div><div class='ctx'> 	.endm</div><div class='head'>diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c<br/>index 209e5b76c1bc..dbe0792fc9c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/cpu-probe.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/cpu-probe.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/cpu-probe.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/cpu-probe.c</a></div><div class='hunk'>@@ -945,7 +945,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |</div><div class='ctx'> 			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='ctx'> 			     MIPS_CPU_COUNTER | MIPS_CPU_WATCH |</div><div class='del'>-			     MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC | MIPS_CPU_BP_GHIST;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R14000:</div><div class='hunk'>@@ -960,7 +960,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |</div><div class='ctx'> 			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='ctx'> 			     MIPS_CPU_COUNTER | MIPS_CPU_WATCH |</div><div class='del'>-			     MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC | MIPS_CPU_BP_GHIST;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_LOONGSON_64:  /* Loongson-2/3 */</div><div class='hunk'>@@ -1443,7 +1443,9 @@ void cpu_probe(void)</div><div class='ctx'> 	case PRID_COMP_CAVIUM:</div><div class='ctx'> 		cpu_probe_cavium(c, cpu);</div><div class='ctx'> 		break;</div><div class='del'>-	case PRID_COMP_INGENIC:</div><div class='add'>+	case PRID_COMP_INGENIC_D0:</div><div class='add'>+	case PRID_COMP_INGENIC_D1:</div><div class='add'>+	case PRID_COMP_INGENIC_E1:</div><div class='ctx'> 		cpu_probe_ingenic(c, cpu);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_COMP_NETLOGIC:</div><div class='hunk'>@@ -1478,6 +1480,10 @@ void cpu_probe(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		cpu_set_nofpu_opts(c);</div><div class='ctx'> </div><div class='add'>+	if (cpu_has_bp_ghist)</div><div class='add'>+		write_c0_r10k_diag(read_c0_r10k_diag() |</div><div class='add'>+				   R10K_DIAG_E_GHIST);</div><div class='add'>+</div><div class='ctx'> 	if (cpu_has_mips_r2_r6) {</div><div class='ctx'> 		c-&gt;srsets = ((read_c0_srsctl() &gt;&gt; 26) &amp; 0x0f) + 1;</div><div class='ctx'> 		/* R2 has Performance Counter Interrupt indicator */</div><div class='head'>diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S<br/>index 95afd663cd45..4e4cc5b9a771 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/head.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/head.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/head.S</a></div><div class='hunk'>@@ -94,6 +94,22 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point</div><div class='ctx'> 	jr	t0</div><div class='ctx'> 0:</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MIPS_RAW_APPENDED_DTB</div><div class='add'>+	PTR_LA		t0, __appended_dtb</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+	li		t1, 0xd00dfeed</div><div class='add'>+#else</div><div class='add'>+	li		t1, 0xedfe0dd0</div><div class='add'>+#endif</div><div class='add'>+	lw		t2, (t0)</div><div class='add'>+	bne		t1, t2, not_found</div><div class='add'>+	 nop</div><div class='add'>+</div><div class='add'>+	move		a1, t0</div><div class='add'>+	PTR_LI		a0, -2</div><div class='add'>+not_found:</div><div class='add'>+#endif</div><div class='ctx'> 	PTR_LA		t0, __bss_start		# clear .bss</div><div class='ctx'> 	LONG_S		zero, (t0)</div><div class='ctx'> 	PTR_LA		t1, __bss_stop - LONGSIZE</div><div class='head'>diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c<br/>index a74ec3ae557c..74f6752814d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/i8259.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/i8259.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/i8259.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='hunk'>@@ -21,6 +22,8 @@</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "../../drivers/irqchip/irqchip.h"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is the 'legacy' 8259A Programmable Interrupt Controller,</div><div class='ctx'>  * present in the majority of PC/AT boxes.</div><div class='hunk'>@@ -327,7 +330,7 @@ static struct irq_domain_ops i8259A_ops = {</div><div class='ctx'>  * driver compatibility reasons interrupts 0 - 15 to be the i8259</div><div class='ctx'>  * interrupts even if the hardware uses a different interrupt numbering.</div><div class='ctx'>  */</div><div class='del'>-void __init init_i8259_irqs(void)</div><div class='add'>+struct irq_domain * __init __init_i8259_irqs(struct device_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_domain *domain;</div><div class='ctx'> </div><div class='hunk'>@@ -336,10 +339,46 @@ void __init init_i8259_irqs(void)</div><div class='ctx'> </div><div class='ctx'> 	init_8259A(0);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(NULL, 16, I8259A_IRQ_BASE, 0,</div><div class='add'>+	domain = irq_domain_add_legacy(node, 16, I8259A_IRQ_BASE, 0,</div><div class='ctx'> 				       &amp;i8259A_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add i8259 IRQ domain");</div><div class='ctx'> </div><div class='ctx'> 	setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &amp;irq2);</div><div class='add'>+	return domain;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init init_i8259_irqs(void)</div><div class='add'>+{</div><div class='add'>+	__init_i8259_irqs(NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8259_irq_dispatch(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain = irq_get_handler_data(irq);</div><div class='add'>+	int hwirq = i8259_irq();</div><div class='add'>+</div><div class='add'>+	if (hwirq &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	irq = irq_linear_revmap(domain, hwirq);</div><div class='add'>+	generic_handle_irq(irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init i8259_of_init(struct device_node *node, struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	unsigned int parent_irq;</div><div class='add'>+</div><div class='add'>+	parent_irq = irq_of_parse_and_map(node, 0);</div><div class='add'>+	if (!parent_irq) {</div><div class='add'>+		pr_err("Failed to map i8259 parent IRQ\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	domain = __init_i8259_irqs(node);</div><div class='add'>+	irq_set_handler_data(parent_irq, domain);</div><div class='add'>+	irq_set_chained_handler(parent_irq, i8259_irq_dispatch);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+IRQCHIP_DECLARE(i8259, "intel,i8259", i8259_of_init);</div><div class='head'>diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c<br/>index 3c8a18a00a65..8eb5af805964 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/irq.c</a></div><div class='hunk'>@@ -25,48 +25,6 @@</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KGDB</div><div class='del'>-int kgdb_early_setup;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static DECLARE_BITMAP(irq_map, NR_IRQS);</div><div class='del'>-</div><div class='del'>-int allocate_irqno(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-again:</div><div class='del'>-	irq = find_first_zero_bit(irq_map, NR_IRQS);</div><div class='del'>-</div><div class='del'>-	if (irq &gt;= NR_IRQS)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	if (test_and_set_bit(irq, irq_map))</div><div class='del'>-		goto again;</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allocate the 16 legacy interrupts for i8259 devices.	 This happens early</div><div class='del'>- * in the kernel initialization so treating allocation failure as BUG() is</div><div class='del'>- * ok.</div><div class='del'>- */</div><div class='del'>-void __init alloc_legacy_irqno(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt;= 16; i++)</div><div class='del'>-		BUG_ON(test_and_set_bit(i, irq_map));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_irqno(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	smp_mb__before_atomic();</div><div class='del'>-	clear_bit(irq, irq_map);</div><div class='del'>-	smp_mb__after_atomic();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * 'what should we do if we get a hw irq event on an illegal vector'.</div><div class='ctx'>  * each architecture has to answer this themselves.</div><div class='hunk'>@@ -93,20 +51,10 @@ void __init init_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KGDB</div><div class='del'>-	if (kgdb_early_setup)</div><div class='del'>-		return;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; NR_IRQS; i++)</div><div class='ctx'> 		irq_set_noprobe(i);</div><div class='ctx'> </div><div class='ctx'> 	arch_init_irq();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_KGDB</div><div class='del'>-	if (!kgdb_early_setup)</div><div class='del'>-		kgdb_early_setup = 1;</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_STACKOVERFLOW</div><div class='head'>diff --git a/arch/mips/kernel/kgdb.c b/arch/mips/kernel/kgdb.c<br/>index 7afcc2f22c0d..de63d36af895 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/kgdb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/kgdb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/kgdb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/kgdb.c</a></div><div class='hunk'>@@ -378,10 +378,6 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,</div><div class='ctx'> </div><div class='ctx'> struct kgdb_arch arch_kgdb_ops;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We use kgdb_early_setup so that functions we need to call now don't</div><div class='del'>- * cause trouble when called again later.</div><div class='del'>- */</div><div class='ctx'> int kgdb_arch_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	union mips_instruction insn = {</div><div class='head'>diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c<br/>index e303cb1ef2f4..b130033838ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/prom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/prom.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S<br/>index 6e8de80bb446..4cc13508d967 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/scall32-o32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/scall32-o32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/scall32-o32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/scall32-o32.S</a></div><div class='hunk'>@@ -73,10 +73,11 @@ NESTED(handle_sys, PT_SIZE, sp)</div><div class='ctx'> 	.set    noreorder</div><div class='ctx'> 	.set	nomacro</div><div class='ctx'> </div><div class='del'>-1:	user_lw(t5, 16(t0))		# argument #5 from usp</div><div class='del'>-4:	user_lw(t6, 20(t0))		# argument #6 from usp</div><div class='del'>-3:	user_lw(t7, 24(t0))		# argument #7 from usp</div><div class='del'>-2:	user_lw(t8, 28(t0))		# argument #8 from usp</div><div class='add'>+load_a4: user_lw(t5, 16(t0))		# argument #5 from usp</div><div class='add'>+load_a5: user_lw(t6, 20(t0))		# argument #6 from usp</div><div class='add'>+load_a6: user_lw(t7, 24(t0))		# argument #7 from usp</div><div class='add'>+load_a7: user_lw(t8, 28(t0))		# argument #8 from usp</div><div class='add'>+loads_done:</div><div class='ctx'> </div><div class='ctx'> 	sw	t5, 16(sp)		# argument #5 to ksp</div><div class='ctx'> 	sw	t6, 20(sp)		# argument #6 to ksp</div><div class='hunk'>@@ -85,10 +86,10 @@ NESTED(handle_sys, PT_SIZE, sp)</div><div class='ctx'> 	.set	pop</div><div class='ctx'> </div><div class='ctx'> 	.section __ex_table,"a"</div><div class='del'>-	PTR	1b,bad_stack</div><div class='del'>-	PTR	2b,bad_stack</div><div class='del'>-	PTR	3b,bad_stack</div><div class='del'>-	PTR	4b,bad_stack</div><div class='add'>+	PTR	load_a4, bad_stack_a4</div><div class='add'>+	PTR	load_a5, bad_stack_a5</div><div class='add'>+	PTR	load_a6, bad_stack_a6</div><div class='add'>+	PTR	load_a7, bad_stack_a7</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='ctx'> 	lw	t0, TI_FLAGS($28)	# syscall tracing enabled?</div><div class='hunk'>@@ -153,8 +154,8 @@ syscall_trace_entry:</div><div class='ctx'> /* ------------------------------------------------------------------------ */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * The stackpointer for a call with more than 4 arguments is bad.</div><div class='del'>-	 * We probably should handle this case a bit more drastic.</div><div class='add'>+	 * Our open-coded access area sanity test for the stack pointer</div><div class='add'>+	 * failed. We probably should handle this case a bit more drastic.</div><div class='ctx'> 	 */</div><div class='ctx'> bad_stack:</div><div class='ctx'> 	li	v0, EFAULT</div><div class='hunk'>@@ -163,6 +164,22 @@ bad_stack:</div><div class='ctx'> 	sw	t0, PT_R7(sp)</div><div class='ctx'> 	j	o32_syscall_exit</div><div class='ctx'> </div><div class='add'>+bad_stack_a4:</div><div class='add'>+	li	t5, 0</div><div class='add'>+	b	load_a5</div><div class='add'>+</div><div class='add'>+bad_stack_a5:</div><div class='add'>+	li	t6, 0</div><div class='add'>+	b	load_a6</div><div class='add'>+</div><div class='add'>+bad_stack_a6:</div><div class='add'>+	li	t7, 0</div><div class='add'>+	b	load_a7</div><div class='add'>+</div><div class='add'>+bad_stack_a7:</div><div class='add'>+	li	t8, 0</div><div class='add'>+	b	loads_done</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The system call does not exist in this kernel</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S<br/>index d07b210fbeff..f543ff4feef9 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/scall64-o32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/scall64-o32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/scall64-o32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/scall64-o32.S</a></div><div class='hunk'>@@ -69,16 +69,17 @@ NESTED(handle_sys, PT_SIZE, sp)</div><div class='ctx'> 	daddu	t1, t0, 32</div><div class='ctx'> 	bltz	t1, bad_stack</div><div class='ctx'> </div><div class='del'>-1:	lw	a4, 16(t0)		# argument #5 from usp</div><div class='del'>-2:	lw	a5, 20(t0)		# argument #6 from usp</div><div class='del'>-3:	lw	a6, 24(t0)		# argument #7 from usp</div><div class='del'>-4:	lw	a7, 28(t0)		# argument #8 from usp (for indirect syscalls)</div><div class='add'>+load_a4: lw	a4, 16(t0)		# argument #5 from usp</div><div class='add'>+load_a5: lw	a5, 20(t0)		# argument #6 from usp</div><div class='add'>+load_a6: lw	a6, 24(t0)		# argument #7 from usp</div><div class='add'>+load_a7: lw	a7, 28(t0)		# argument #8 from usp</div><div class='add'>+loads_done:</div><div class='ctx'> </div><div class='ctx'> 	.section __ex_table,"a"</div><div class='del'>-	PTR	1b, bad_stack</div><div class='del'>-	PTR	2b, bad_stack</div><div class='del'>-	PTR	3b, bad_stack</div><div class='del'>-	PTR	4b, bad_stack</div><div class='add'>+	PTR	load_a4, bad_stack_a4</div><div class='add'>+	PTR	load_a5, bad_stack_a5</div><div class='add'>+	PTR	load_a6, bad_stack_a6</div><div class='add'>+	PTR	load_a7, bad_stack_a7</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='ctx'> 	li	t1, _TIF_WORK_SYSCALL_ENTRY</div><div class='hunk'>@@ -167,6 +168,22 @@ bad_stack:</div><div class='ctx'> 	sd	t0, PT_R7(sp)</div><div class='ctx'> 	j	o32_syscall_exit</div><div class='ctx'> </div><div class='add'>+bad_stack_a4:</div><div class='add'>+	li	a4, 0</div><div class='add'>+	b	load_a5</div><div class='add'>+</div><div class='add'>+bad_stack_a5:</div><div class='add'>+	li	a5, 0</div><div class='add'>+	b	load_a6</div><div class='add'>+</div><div class='add'>+bad_stack_a6:</div><div class='add'>+	li	a6, 0</div><div class='add'>+	b	load_a7</div><div class='add'>+</div><div class='add'>+bad_stack_a7:</div><div class='add'>+	li	a7, 0</div><div class='add'>+	b	loads_done</div><div class='add'>+</div><div class='ctx'> not_o32_scall:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is not an o32 compatibility syscall, pass it on</div><div class='hunk'>@@ -383,7 +400,7 @@ EXPORT(sys32_call_table)</div><div class='ctx'> 	PTR	sys_connect			/* 4170 */</div><div class='ctx'> 	PTR	sys_getpeername</div><div class='ctx'> 	PTR	sys_getsockname</div><div class='del'>-	PTR	sys_getsockopt</div><div class='add'>+	PTR	compat_sys_getsockopt</div><div class='ctx'> 	PTR	sys_listen</div><div class='ctx'> 	PTR	compat_sys_recv			/* 4175 */</div><div class='ctx'> 	PTR	compat_sys_recvfrom</div><div class='head'>diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c<br/>index be73c491182b..008b3378653a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/setup.c</a></div><div class='hunk'>@@ -337,6 +337,11 @@ static void __init bootmem_init(void)</div><div class='ctx'> 			min_low_pfn = start;</div><div class='ctx'> 		if (end &lt;= reserved_end)</div><div class='ctx'> 			continue;</div><div class='add'>+#ifdef CONFIG_BLK_DEV_INITRD</div><div class='add'>+		/* mapstart should be after initrd_end */</div><div class='add'>+		if (initrd_end &amp;&amp; end &lt;= (unsigned long)PFN_UP(__pa(initrd_end)))</div><div class='add'>+			continue;</div><div class='add'>+#endif</div><div class='ctx'> 		if (start &gt;= mapstart)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		mapstart = max(reserved_end, start);</div><div class='hunk'>@@ -366,14 +371,6 @@ static void __init bootmem_init(void)</div><div class='ctx'> 		max_low_pfn = PFN_DOWN(HIGHMEM_START);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_INITRD</div><div class='del'>-	/*</div><div class='del'>-	 * mapstart should be after initrd_end</div><div class='del'>-	 */</div><div class='del'>-	if (initrd_end)</div><div class='del'>-		mapstart = max(mapstart, (unsigned long)PFN_UP(__pa(initrd_end)));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize the boot-time allocator with low memory only.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h<br/>index 06805e09bcd3..0b85f827cd18 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/signal-common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/signal-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/signal-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/signal-common.h</a></div><div class='hunk'>@@ -28,12 +28,7 @@ extern void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,</div><div class='ctx'> extern int fpcsr_pending(unsigned int __user *fpcsr);</div><div class='ctx'> </div><div class='ctx'> /* Make sure we will not lose FPU ownership */</div><div class='del'>-#ifdef CONFIG_PREEMPT</div><div class='del'>-#define lock_fpu_owner()	preempt_disable()</div><div class='del'>-#define unlock_fpu_owner()	preempt_enable()</div><div class='del'>-#else</div><div class='del'>-#define lock_fpu_owner()	pagefault_disable()</div><div class='del'>-#define unlock_fpu_owner()	pagefault_enable()</div><div class='del'>-#endif</div><div class='add'>+#define lock_fpu_owner()	({ preempt_disable(); pagefault_disable(); })</div><div class='add'>+#define unlock_fpu_owner()	({ pagefault_enable(); preempt_enable(); })</div><div class='ctx'> </div><div class='ctx'> #endif	/* __SIGNAL_COMMON_H */</div><div class='head'>diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c<br/>index 4251d390b5b6..c88937745b4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/smp-cps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/smp-cps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/smp-cps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/smp-cps.c</a></div><div class='hunk'>@@ -133,7 +133,7 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Patch the start of mips_cps_core_entry to provide:</div><div class='ctx'> 	 *</div><div class='del'>-	 * v0 = CM base address</div><div class='add'>+	 * v1 = CM base address</div><div class='ctx'> 	 * s0 = kseg0 CCA</div><div class='ctx'> 	 */</div><div class='ctx'> 	entry_code = (u32 *)&amp;mips_cps_core_entry;</div><div class='hunk'>@@ -369,7 +369,7 @@ void play_dead(void)</div><div class='ctx'> </div><div class='ctx'> static void wait_for_sibling_halt(void *ptr_cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned cpu = (unsigned)ptr_cpu;</div><div class='add'>+	unsigned cpu = (unsigned long)ptr_cpu;</div><div class='ctx'> 	unsigned vpe_id = cpu_vpe_id(&amp;cpu_data[cpu]);</div><div class='ctx'> 	unsigned halted;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -430,7 +430,7 @@ static void cps_cpu_die(unsigned int cpu)</div><div class='ctx'> 		 */</div><div class='ctx'> 		err = smp_call_function_single(cpu_death_sibling,</div><div class='ctx'> 					       wait_for_sibling_halt,</div><div class='del'>-					       (void *)cpu, 1);</div><div class='add'>+					       (void *)(unsigned long)cpu, 1);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			panic("Failed to call remote sibling CPU\n");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c<br/>index faa46ebd9dda..d0744cc77ea7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/smp.c</a></div><div class='hunk'>@@ -63,6 +63,13 @@ EXPORT_SYMBOL(cpu_sibling_map);</div><div class='ctx'> cpumask_t cpu_core_map[NR_CPUS] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(cpu_core_map);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * A logcal cpu mask containing only one VPE per core to</div><div class='add'>+ * reduce the number of IPIs on large MT systems.</div><div class='add'>+ */</div><div class='add'>+cpumask_t cpu_foreign_map __read_mostly;</div><div class='add'>+EXPORT_SYMBOL(cpu_foreign_map);</div><div class='add'>+</div><div class='ctx'> /* representing cpus for which sibling maps can be computed */</div><div class='ctx'> static cpumask_t cpu_sibling_setup_map;</div><div class='ctx'> </div><div class='hunk'>@@ -103,6 +110,29 @@ static inline void set_cpu_core_map(int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Calculate a new cpu_foreign_map mask whenever a</div><div class='add'>+ * new cpu appears or disappears.</div><div class='add'>+ */</div><div class='add'>+static inline void calculate_cpu_foreign_map(void)</div><div class='add'>+{</div><div class='add'>+	int i, k, core_present;</div><div class='add'>+	cpumask_t temp_foreign_map;</div><div class='add'>+</div><div class='add'>+	/* Re-calculate the mask */</div><div class='add'>+	for_each_online_cpu(i) {</div><div class='add'>+		core_present = 0;</div><div class='add'>+		for_each_cpu(k, &amp;temp_foreign_map)</div><div class='add'>+			if (cpu_data[i].package == cpu_data[k].package &amp;&amp;</div><div class='add'>+			    cpu_data[i].core == cpu_data[k].core)</div><div class='add'>+				core_present = 1;</div><div class='add'>+		if (!core_present)</div><div class='add'>+			cpumask_set_cpu(i, &amp;temp_foreign_map);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpumask_copy(&amp;cpu_foreign_map, &amp;temp_foreign_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct plat_smp_ops *mp_ops;</div><div class='ctx'> EXPORT_SYMBOL(mp_ops);</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +176,8 @@ asmlinkage void start_secondary(void)</div><div class='ctx'> 	set_cpu_sibling_map(cpu);</div><div class='ctx'> 	set_cpu_core_map(cpu);</div><div class='ctx'> </div><div class='add'>+	calculate_cpu_foreign_map();</div><div class='add'>+</div><div class='ctx'> 	cpumask_set_cpu(cpu, &amp;cpu_callin_map);</div><div class='ctx'> </div><div class='ctx'> 	synchronise_count_slave(cpu);</div><div class='hunk'>@@ -173,9 +205,18 @@ void __irq_entry smp_call_function_interrupt(void)</div><div class='ctx'> static void stop_this_cpu(void *dummy)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * Remove this CPU:</div><div class='add'>+	 * Remove this CPU. Be a bit slow here and</div><div class='add'>+	 * set the bits for every online CPU so we don't miss</div><div class='add'>+	 * any IPI whilst taking this VPE down.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='add'>+	cpumask_copy(&amp;cpu_foreign_map, cpu_online_mask);</div><div class='add'>+</div><div class='add'>+	/* Make it visible to every other CPU */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='ctx'> 	set_cpu_online(smp_processor_id(), false);</div><div class='add'>+	calculate_cpu_foreign_map();</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> 	while (1);</div><div class='ctx'> }</div><div class='hunk'>@@ -197,6 +238,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	mp_ops-&gt;prepare_cpus(max_cpus);</div><div class='ctx'> 	set_cpu_sibling_map(0);</div><div class='ctx'> 	set_cpu_core_map(0);</div><div class='add'>+	calculate_cpu_foreign_map();</div><div class='ctx'> #ifndef CONFIG_HOTPLUG_CPU</div><div class='ctx'> 	init_cpu_present(cpu_possible_mask);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/kernel/sysrq.c b/arch/mips/kernel/sysrq.c<br/>new file mode 100644<br/>index 000000000000..5b539f5fc9d9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/sysrq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/sysrq.c</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/*</div><div class='add'>+ * MIPS specific sysrq operations.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Imagination Technologies Ltd.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/sysrq.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpu-features.h&gt;</div><div class='add'>+#include &lt;asm/mipsregs.h&gt;</div><div class='add'>+#include &lt;asm/tlbdebug.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Dump TLB entries on all CPUs.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(show_lock);</div><div class='add'>+</div><div class='add'>+static void sysrq_tlbdump_single(void *dummy)</div><div class='add'>+{</div><div class='add'>+	const int field = 2 * sizeof(unsigned long);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;show_lock, flags);</div><div class='add'>+</div><div class='add'>+	pr_info("CPU%d:\n", smp_processor_id());</div><div class='add'>+	pr_info("Index	: %0x\n", read_c0_index());</div><div class='add'>+	pr_info("Pagemask: %0x\n", read_c0_pagemask());</div><div class='add'>+	pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());</div><div class='add'>+	pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0());</div><div class='add'>+	pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1());</div><div class='add'>+	pr_info("Wired   : %0x\n", read_c0_wired());</div><div class='add'>+	pr_info("Pagegrain: %0x\n", read_c0_pagegrain());</div><div class='add'>+	if (cpu_has_htw) {</div><div class='add'>+		pr_info("PWField : %0*lx\n", field, read_c0_pwfield());</div><div class='add'>+		pr_info("PWSize  : %0*lx\n", field, read_c0_pwsize());</div><div class='add'>+		pr_info("PWCtl   : %0x\n", read_c0_pwctl());</div><div class='add'>+	}</div><div class='add'>+	pr_info("\n");</div><div class='add'>+	dump_tlb_all();</div><div class='add'>+	pr_info("\n");</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;show_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+static void sysrq_tlbdump_othercpus(struct work_struct *dummy)</div><div class='add'>+{</div><div class='add'>+	smp_call_function(sysrq_tlbdump_single, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DECLARE_WORK(sysrq_tlbdump, sysrq_tlbdump_othercpus);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void sysrq_handle_tlbdump(int key)</div><div class='add'>+{</div><div class='add'>+	sysrq_tlbdump_single(NULL);</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	schedule_work(&amp;sysrq_tlbdump);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sysrq_key_op sysrq_tlbdump_op = {</div><div class='add'>+	.handler        = sysrq_handle_tlbdump,</div><div class='add'>+	.help_msg       = "show-tlbs(x)",</div><div class='add'>+	.action_msg     = "Show TLB entries",</div><div class='add'>+	.enable_mask	= SYSRQ_ENABLE_DUMP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mips_sysrq_init(void)</div><div class='add'>+{</div><div class='add'>+	return register_sysrq_key('x', &amp;sysrq_tlbdump_op);</div><div class='add'>+}</div><div class='add'>+arch_initcall(mips_sysrq_init);</div><div class='head'>diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c<br/>index d2d1c1933bc9..e207a43b5f8f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/traps.c</a></div><div class='hunk'>@@ -236,6 +236,7 @@ static void __show_regs(const struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	const int field = 2 * sizeof(unsigned long);</div><div class='ctx'> 	unsigned int cause = regs-&gt;cp0_cause;</div><div class='add'>+	unsigned int exccode;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	show_regs_print_info(KERN_DEFAULT);</div><div class='hunk'>@@ -317,10 +318,10 @@ static void __show_regs(const struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> 	printk("\n");</div><div class='ctx'> </div><div class='del'>-	printk("Cause : %08x\n", cause);</div><div class='add'>+	exccode = (cause &amp; CAUSEF_EXCCODE) &gt;&gt; CAUSEB_EXCCODE;</div><div class='add'>+	printk("Cause : %08x (ExcCode %02x)\n", cause, exccode);</div><div class='ctx'> </div><div class='del'>-	cause = (cause &amp; CAUSEF_EXCCODE) &gt;&gt; CAUSEB_EXCCODE;</div><div class='del'>-	if (1 &lt;= cause &amp;&amp; cause &lt;= 5)</div><div class='add'>+	if (1 &lt;= exccode &amp;&amp; exccode &lt;= 5)</div><div class='ctx'> 		printk("BadVA : %0*lx\n", field, regs-&gt;cp0_badvaddr);</div><div class='ctx'> </div><div class='ctx'> 	printk("PrId  : %08x (%s)\n", read_c0_prid(),</div><div class='hunk'>@@ -2129,10 +2130,10 @@ void per_cpu_trap_init(bool is_boot_cpu)</div><div class='ctx'> 	BUG_ON(current-&gt;mm);</div><div class='ctx'> 	enter_lazy_tlb(&amp;init_mm, current);</div><div class='ctx'> </div><div class='del'>-		/* Boot CPU's cache setup in setup_arch(). */</div><div class='del'>-		if (!is_boot_cpu)</div><div class='del'>-			cpu_cache_init();</div><div class='del'>-		tlb_init();</div><div class='add'>+	/* Boot CPU's cache setup in setup_arch(). */</div><div class='add'>+	if (!is_boot_cpu)</div><div class='add'>+		cpu_cache_init();</div><div class='add'>+	tlb_init();</div><div class='ctx'> 	TLBMISS_HANDLER_SETUP();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2184,11 +2185,6 @@ void __init trap_init(void)</div><div class='ctx'> </div><div class='ctx'> 	check_wait();</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_KGDB)</div><div class='del'>-	if (kgdb_early_setup)</div><div class='del'>-		return; /* Already done */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	if (cpu_has_veic || cpu_has_vint) {</div><div class='ctx'> 		unsigned long size = 0x200 + VECTORSPACING*64;</div><div class='ctx'> 		ebase = (unsigned long)</div><div class='head'>diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S<br/>index 3b46f7ce9ca7..07d32a4aea60 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/vmlinux.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/vmlinux.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -125,8 +125,14 @@ SECTIONS</div><div class='ctx'> 	.exit.data : {</div><div class='ctx'> 		EXIT_DATA</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	PERCPU_SECTION(1 &lt;&lt; CONFIG_MIPS_L1_CACHE_SHIFT)</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_MIPS_RAW_APPENDED_DTB</div><div class='add'>+	__appended_dtb = .;</div><div class='add'>+	/* leave space for appended DTB */</div><div class='add'>+	. += 0x100000;</div><div class='add'>+#endif</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Align to 64K in attempt to eliminate holes before the</div><div class='ctx'> 	 * .bss..swapper_pg_dir section at the start of .bss.  This</div><div class='head'>diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c<br/>index bb68e8d520e8..cd4c129ce743 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kvm/mips.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/kvm/mips.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kvm/mips.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/kvm/mips.c</a></div><div class='hunk'>@@ -198,15 +198,16 @@ int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   const struct kvm_memory_slot *old,</div><div class='add'>+				   const struct kvm_memory_slot *new,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long npages = 0;</div><div class='hunk'>@@ -393,7 +394,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 	kvm_mips_deliver_interrupts(vcpu,</div><div class='ctx'> 				    kvm_read_c0_guest_cause(vcpu-&gt;arch.cop0));</div><div class='ctx'> </div><div class='del'>-	kvm_guest_enter();</div><div class='add'>+	__kvm_guest_enter();</div><div class='ctx'> </div><div class='ctx'> 	/* Disable hardware page table walking while in guest */</div><div class='ctx'> 	htw_stop();</div><div class='hunk'>@@ -403,7 +404,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 	/* Re-enable HTW before enabling interrupts */</div><div class='ctx'> 	htw_start();</div><div class='ctx'> </div><div class='del'>-	kvm_guest_exit();</div><div class='add'>+	__kvm_guest_exit();</div><div class='ctx'> 	local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;sigset_active)</div><div class='hunk'>@@ -968,6 +969,7 @@ out:</div><div class='ctx'> /* Get (and clear) the dirty memory log for a memory slot. */</div><div class='ctx'> int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	unsigned long ga, ga_end;</div><div class='ctx'> 	int is_dirty = 0;</div><div class='hunk'>@@ -982,7 +984,8 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)</div><div class='ctx'> </div><div class='ctx'> 	/* If nothing is dirty, don't bother messing with page tables. */</div><div class='ctx'> 	if (is_dirty) {</div><div class='del'>-		memslot = &amp;kvm-&gt;memslots-&gt;memslots[log-&gt;slot];</div><div class='add'>+		slots = kvm_memslots(kvm);</div><div class='add'>+		memslot = id_to_memslot(slots, log-&gt;slot);</div><div class='ctx'> </div><div class='ctx'> 		ga = memslot-&gt;base_gfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 		ga_end = ga + (memslot-&gt;npages &lt;&lt; PAGE_SHIFT);</div><div class='head'>diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c<br/>index 32b9f21bfd85..167f35634709 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lib/dump_tlb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/lib/dump_tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lib/dump_tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/lib/dump_tlb.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/hazards.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='hunk'>@@ -40,17 +41,20 @@ static inline const char *msk2str(unsigned int mask)</div><div class='ctx'> 	return "";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define BARRIER()					\</div><div class='del'>-	__asm__ __volatile__(				\</div><div class='del'>-		".set\tnoreorder\n\t"			\</div><div class='del'>-		"nop;nop;nop;nop;nop;nop;nop\n\t"	\</div><div class='del'>-		".set\treorder");</div><div class='del'>-</div><div class='ctx'> static void dump_tlb(int first, int last)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long s_entryhi, entryhi, asid;</div><div class='del'>-	unsigned long long entrylo0, entrylo1;</div><div class='add'>+	unsigned long long entrylo0, entrylo1, pa;</div><div class='ctx'> 	unsigned int s_index, s_pagemask, pagemask, c0, c1, i;</div><div class='add'>+#ifdef CONFIG_32BIT</div><div class='add'>+	bool xpa = cpu_has_xpa &amp;&amp; (read_c0_pagegrain() &amp; PG_ELPA);</div><div class='add'>+	int pwidth = xpa ? 11 : 8;</div><div class='add'>+	int vwidth = 8;</div><div class='add'>+#else</div><div class='add'>+	bool xpa = false;</div><div class='add'>+	int pwidth = 11;</div><div class='add'>+	int vwidth = 11;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	s_pagemask = read_c0_pagemask();</div><div class='ctx'> 	s_entryhi = read_c0_entryhi();</div><div class='hunk'>@@ -59,46 +63,74 @@ static void dump_tlb(int first, int last)</div><div class='ctx'> </div><div class='ctx'> 	for (i = first; i &lt;= last; i++) {</div><div class='ctx'> 		write_c0_index(i);</div><div class='del'>-		BARRIER();</div><div class='add'>+		mtc0_tlbr_hazard();</div><div class='ctx'> 		tlb_read();</div><div class='del'>-		BARRIER();</div><div class='add'>+		tlb_read_hazard();</div><div class='ctx'> 		pagemask = read_c0_pagemask();</div><div class='ctx'> 		entryhi	 = read_c0_entryhi();</div><div class='ctx'> 		entrylo0 = read_c0_entrylo0();</div><div class='ctx'> 		entrylo1 = read_c0_entrylo1();</div><div class='ctx'> </div><div class='del'>-		/* Unused entries have a virtual address of CKSEG0.  */</div><div class='del'>-		if ((entryhi &amp; ~0x1ffffUL) != CKSEG0</div><div class='del'>-		    &amp;&amp; (entryhi &amp; 0xff) == asid) {</div><div class='del'>-#ifdef CONFIG_32BIT</div><div class='del'>-			int width = 8;</div><div class='del'>-#else</div><div class='del'>-			int width = 11;</div><div class='del'>-#endif</div><div class='del'>-			/*</div><div class='del'>-			 * Only print entries in use</div><div class='del'>-			 */</div><div class='del'>-			printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));</div><div class='add'>+		/* EHINV bit marks entire entry as invalid */</div><div class='add'>+		if (cpu_has_tlbinv &amp;&amp; entryhi &amp; MIPS_ENTRYHI_EHINV)</div><div class='add'>+			continue;</div><div class='add'>+		/*</div><div class='add'>+		 * Prior to tlbinv, unused entries have a virtual address of</div><div class='add'>+		 * CKSEG0.</div><div class='add'>+		 */</div><div class='add'>+		if ((entryhi &amp; ~0x1ffffUL) == CKSEG0)</div><div class='add'>+			continue;</div><div class='add'>+		/*</div><div class='add'>+		 * ASID takes effect in absence of G (global) bit.</div><div class='add'>+		 * We check both G bits, even though architecturally they should</div><div class='add'>+		 * match one another, because some revisions of the SB1 core may</div><div class='add'>+		 * leave only a single G bit set after a machine check exception</div><div class='add'>+		 * due to duplicate TLB entry.</div><div class='add'>+		 */</div><div class='add'>+		if (!((entrylo0 | entrylo1) &amp; MIPS_ENTRYLO_G) &amp;&amp;</div><div class='add'>+		    (entryhi &amp; 0xff) != asid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Only print entries in use</div><div class='add'>+		 */</div><div class='add'>+		printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));</div><div class='ctx'> </div><div class='del'>-			c0 = (entrylo0 &gt;&gt; 3) &amp; 7;</div><div class='del'>-			c1 = (entrylo1 &gt;&gt; 3) &amp; 7;</div><div class='add'>+		c0 = (entrylo0 &amp; MIPS_ENTRYLO_C) &gt;&gt; MIPS_ENTRYLO_C_SHIFT;</div><div class='add'>+		c1 = (entrylo1 &amp; MIPS_ENTRYLO_C) &gt;&gt; MIPS_ENTRYLO_C_SHIFT;</div><div class='ctx'> </div><div class='del'>-			printk("va=%0*lx asid=%02lx\n",</div><div class='del'>-			       width, (entryhi &amp; ~0x1fffUL),</div><div class='del'>-			       entryhi &amp; 0xff);</div><div class='del'>-			printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",</div><div class='del'>-			       width,</div><div class='del'>-			       (entrylo0 &lt;&lt; 6) &amp; PAGE_MASK, c0,</div><div class='del'>-			       (entrylo0 &amp; 4) ? 1 : 0,</div><div class='del'>-			       (entrylo0 &amp; 2) ? 1 : 0,</div><div class='del'>-			       (entrylo0 &amp; 1) ? 1 : 0);</div><div class='del'>-			printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n",</div><div class='del'>-			       width,</div><div class='del'>-			       (entrylo1 &lt;&lt; 6) &amp; PAGE_MASK, c1,</div><div class='del'>-			       (entrylo1 &amp; 4) ? 1 : 0,</div><div class='del'>-			       (entrylo1 &amp; 2) ? 1 : 0,</div><div class='del'>-			       (entrylo1 &amp; 1) ? 1 : 0);</div><div class='del'>-		}</div><div class='add'>+		printk("va=%0*lx asid=%02lx\n",</div><div class='add'>+		       vwidth, (entryhi &amp; ~0x1fffUL),</div><div class='add'>+		       entryhi &amp; 0xff);</div><div class='add'>+		/* RI/XI are in awkward places, so mask them off separately */</div><div class='add'>+		pa = entrylo0 &amp; ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);</div><div class='add'>+		if (xpa)</div><div class='add'>+			pa |= (unsigned long long)readx_c0_entrylo0() &lt;&lt; 30;</div><div class='add'>+		pa = (pa &lt;&lt; 6) &amp; PAGE_MASK;</div><div class='add'>+		printk("\t[");</div><div class='add'>+		if (cpu_has_rixi)</div><div class='add'>+			printk("ri=%d xi=%d ",</div><div class='add'>+			       (entrylo0 &amp; MIPS_ENTRYLO_RI) ? 1 : 0,</div><div class='add'>+			       (entrylo0 &amp; MIPS_ENTRYLO_XI) ? 1 : 0);</div><div class='add'>+		printk("pa=%0*llx c=%d d=%d v=%d g=%d] [",</div><div class='add'>+		       pwidth, pa, c0,</div><div class='add'>+		       (entrylo0 &amp; MIPS_ENTRYLO_D) ? 1 : 0,</div><div class='add'>+		       (entrylo0 &amp; MIPS_ENTRYLO_V) ? 1 : 0,</div><div class='add'>+		       (entrylo0 &amp; MIPS_ENTRYLO_G) ? 1 : 0);</div><div class='add'>+		/* RI/XI are in awkward places, so mask them off separately */</div><div class='add'>+		pa = entrylo1 &amp; ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);</div><div class='add'>+		if (xpa)</div><div class='add'>+			pa |= (unsigned long long)readx_c0_entrylo1() &lt;&lt; 30;</div><div class='add'>+		pa = (pa &lt;&lt; 6) &amp; PAGE_MASK;</div><div class='add'>+		if (cpu_has_rixi)</div><div class='add'>+			printk("ri=%d xi=%d ",</div><div class='add'>+			       (entrylo1 &amp; MIPS_ENTRYLO_RI) ? 1 : 0,</div><div class='add'>+			       (entrylo1 &amp; MIPS_ENTRYLO_XI) ? 1 : 0);</div><div class='add'>+		printk("pa=%0*llx c=%d d=%d v=%d g=%d]\n",</div><div class='add'>+		       pwidth, pa, c1,</div><div class='add'>+		       (entrylo1 &amp; MIPS_ENTRYLO_D) ? 1 : 0,</div><div class='add'>+		       (entrylo1 &amp; MIPS_ENTRYLO_V) ? 1 : 0,</div><div class='add'>+		       (entrylo1 &amp; MIPS_ENTRYLO_G) ? 1 : 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	printk("\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c<br/>index 975a13855116..8e0d3cff8ae4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lib/r3k_dump_tlb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/lib/r3k_dump_tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lib/r3k_dump_tlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/lib/r3k_dump_tlb.c</a></div><div class='hunk'>@@ -14,8 +14,6 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/tlbdebug.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int r3k_have_wired_reg;	/* defined in tlb-r3k.c */</div><div class='del'>-</div><div class='ctx'> static void dump_tlb(int first, int last)</div><div class='ctx'> {</div><div class='ctx'> 	int	i;</div><div class='hunk'>@@ -35,8 +33,9 @@ static void dump_tlb(int first, int last)</div><div class='ctx'> 		entrylo0 = read_c0_entrylo0();</div><div class='ctx'> </div><div class='ctx'> 		/* Unused entries have a virtual address of KSEG0.  */</div><div class='del'>-		if ((entryhi &amp; PAGE_MASK) != KSEG0</div><div class='del'>-		    &amp;&amp; (entryhi &amp; ASID_MASK) == asid) {</div><div class='add'>+		if ((entryhi &amp; PAGE_MASK) != KSEG0 &amp;&amp;</div><div class='add'>+		    (entrylo0 &amp; R3K_ENTRYLO_G ||</div><div class='add'>+		     (entryhi &amp; ASID_MASK) == asid)) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Only print entries in use</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -47,10 +46,10 @@ static void dump_tlb(int first, int last)</div><div class='ctx'> 			       entryhi &amp; PAGE_MASK,</div><div class='ctx'> 			       entryhi &amp; ASID_MASK,</div><div class='ctx'> 			       entrylo0 &amp; PAGE_MASK,</div><div class='del'>-			       (entrylo0 &amp; (1 &lt;&lt; 11)) ? 1 : 0,</div><div class='del'>-			       (entrylo0 &amp; (1 &lt;&lt; 10)) ? 1 : 0,</div><div class='del'>-			       (entrylo0 &amp; (1 &lt;&lt; 9)) ? 1 : 0,</div><div class='del'>-			       (entrylo0 &amp; (1 &lt;&lt; 8)) ? 1 : 0);</div><div class='add'>+			       (entrylo0 &amp; R3K_ENTRYLO_N) ? 1 : 0,</div><div class='add'>+			       (entrylo0 &amp; R3K_ENTRYLO_D) ? 1 : 0,</div><div class='add'>+			       (entrylo0 &amp; R3K_ENTRYLO_V) ? 1 : 0,</div><div class='add'>+			       (entrylo0 &amp; R3K_ENTRYLO_G) ? 1 : 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	printk("\n");</div><div class='head'>diff --git a/arch/mips/loongson1/Kconfig b/arch/mips/loongson32/Kconfig<br/>index a2b796eaf3c3..7704f20529d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Kconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-if MACH_LOONGSON1</div><div class='add'>+if MACH_LOONGSON32</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Machine Type"</div><div class='hunk'>@@ -10,7 +10,7 @@ config LOONGSON1_LS1B</div><div class='ctx'> 	select SYS_HAS_CPU_LOONGSON1B</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='ctx'> 	select BOOT_ELF32</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='ctx'> 	select SYS_SUPPORTS_HIGHMEM</div><div class='hunk'>@@ -58,4 +58,4 @@ config TIMER_USE_PWM3</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='del'>-endif # MACH_LOONGSON1</div><div class='add'>+endif # MACH_LOONGSON32</div><div class='head'>diff --git a/arch/mips/loongson1/Makefile b/arch/mips/loongson32/Makefile<br/>index 9719c75886f5..5f4bd6e071ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Common code for all Loongson 1 based systems</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_MACH_LOONGSON1) += common/</div><div class='add'>+obj-$(CONFIG_MACH_LOONGSON32) += common/</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Loongson LS1B board</div><div class='head'>diff --git a/arch/mips/loongson1/Platform b/arch/mips/loongson32/Platform<br/>index 11863441dea3..ebb6dc290f0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/Platform?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/Platform</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/Platform</a></div><div class='hunk'>@@ -2,6 +2,6 @@ cflags-$(CONFIG_CPU_LOONGSON1)	+= \</div><div class='ctx'> 	$(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \</div><div class='ctx'> 	-Wa,-mips32r2 -Wa,--trap</div><div class='ctx'> </div><div class='del'>-platform-$(CONFIG_MACH_LOONGSON1)	+= loongson1/</div><div class='del'>-cflags-$(CONFIG_MACH_LOONGSON1)		+= -I$(srctree)/arch/mips/include/asm/mach-loongson1</div><div class='add'>+platform-$(CONFIG_MACH_LOONGSON32)	+= loongson32/</div><div class='add'>+cflags-$(CONFIG_MACH_LOONGSON32)	+= -I$(srctree)/arch/mips/include/asm/mach-loongson32</div><div class='ctx'> load-$(CONFIG_LOONGSON1_LS1B)		+= 0xffffffff80100000</div><div class='head'>diff --git a/arch/mips/loongson1/common/Makefile b/arch/mips/loongson32/common/Makefile<br/>index 723b4ce3b8f0..723b4ce3b8f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/irq.c b/arch/mips/loongson32/common/irq.c<br/>index 455a7704a90f..455a7704a90f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/irq.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/platform.c b/arch/mips/loongson32/common/platform.c<br/>index ddf1d4cbf31e..ddf1d4cbf31e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/platform.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/platform.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/prom.c b/arch/mips/loongson32/common/prom.c<br/>index 68600980ea49..68600980ea49 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/prom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/prom.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/reset.c b/arch/mips/loongson32/common/reset.c<br/>index c41e4ca56ab4..c41e4ca56ab4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/reset.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/setup.c b/arch/mips/loongson32/common/setup.c<br/>index 62f41afee241..62f41afee241 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/setup.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/common/time.c b/arch/mips/loongson32/common/time.c<br/>index df0f850d6a5f..df0f850d6a5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/common/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/common/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/common/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/common/time.c</a></div><div class='head'>diff --git a/arch/mips/loongson1/ls1b/Makefile b/arch/mips/loongson32/ls1b/Makefile<br/>index 891eac482b82..891eac482b82 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/ls1b/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/ls1b/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/ls1b/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/ls1b/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson1/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c<br/>index 58daeea25739..58daeea25739 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson1/ls1b/board.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson1/ls1b/board.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson32/ls1b/board.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson32/ls1b/board.c</a></div><div class='head'>diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson64/Kconfig<br/>index 156de85b82cd..497912b38d8e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Kconfig</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-if MACH_LOONGSON</div><div class='add'>+if MACH_LOONGSON64</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Machine Type"</div><div class='hunk'>@@ -15,7 +15,7 @@ config LEMOTE_FULOONG2E</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select I8259</div><div class='ctx'> 	select ISA</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_64BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='hunk'>@@ -44,7 +44,7 @@ config LEMOTE_MACH2F</div><div class='ctx'> 	select HAVE_CLK</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select I8259</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ISA</div><div class='ctx'> 	select SYS_HAS_CPU_LOONGSON2F</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -73,7 +73,7 @@ config LOONGSON_MACH3X</div><div class='ctx'> 	select ISA</div><div class='ctx'> 	select HT_PCI</div><div class='ctx'> 	select I8259</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select NR_CPUS_DEFAULT_4</div><div class='ctx'> 	select SYS_HAS_CPU_LOONGSON3</div><div class='ctx'> 	select SYS_HAS_EARLY_PRINTK</div><div class='hunk'>@@ -155,4 +155,4 @@ config LOONGSON_MC146818</div><div class='ctx'> config LEFI_FIRMWARE_INTERFACE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-endif # MACH_LOONGSON</div><div class='add'>+endif # MACH_LOONGSON64</div><div class='head'>diff --git a/arch/mips/loongson/Makefile b/arch/mips/loongson64/Makefile<br/>index 7429994e7604..4fe3d88fc361 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Common code for all Loongson based systems</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_MACH_LOONGSON) += common/</div><div class='add'>+obj-$(CONFIG_MACH_LOONGSON64) += common/</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Lemote Fuloong mini-PC (Loongson 2E-based)</div><div class='head'>diff --git a/arch/mips/loongson/Platform b/arch/mips/loongson64/Platform<br/>index 0ac20eb84ecc..2e48e83d5524 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/Platform?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/Platform</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/Platform?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/Platform</a></div><div class='hunk'>@@ -26,8 +26,8 @@ endif</div><div class='ctx'> # Loongson Machines' Support</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-platform-$(CONFIG_MACH_LOONGSON) += loongson/</div><div class='del'>-cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson -mno-branch-likely</div><div class='add'>+platform-$(CONFIG_MACH_LOONGSON64) += loongson64/</div><div class='add'>+cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely</div><div class='ctx'> load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000</div><div class='ctx'> load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000</div><div class='ctx'> load-$(CONFIG_LOONGSON_MACH3X) += 0xffffffff80200000</div><div class='head'>diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson64/common/Makefile<br/>index f2e8153e44f5..f2e8153e44f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson64/common/bonito-irq.c<br/>index cc0e4fd548e6..4e116d23bab3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/bonito-irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/bonito-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/bonito-irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/bonito-irq.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net</div><div class='ctx'>  * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute	 it and/or modify it</div><div class='head'>diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson64/common/cmdline.c<br/>index 72fed003a536..01fbed137028 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cmdline.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cmdline.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cmdline.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cmdline.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * Copyright 2003 ICT CAS</div><div class='ctx'>  * Author: Michael Guo &lt;guoyi@ict.ac.cn&gt;</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Lemote Inc.</div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/Makefile b/arch/mips/loongson64/common/cs5536/Makefile<br/>index f12e64007347..f12e64007347 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_acc.c b/arch/mips/loongson64/common/cs5536/cs5536_acc.c<br/>index ab4d6cc57384..ab4d6cc57384 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_acc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_acc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_acc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_acc.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_ehci.c b/arch/mips/loongson64/common/cs5536/cs5536_ehci.c<br/>index ec2e360267a8..ec2e360267a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_ehci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_ehci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_ehci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ehci.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_ide.c b/arch/mips/loongson64/common/cs5536/cs5536_ide.c<br/>index a73414d9ee51..a73414d9ee51 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_ide.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_ide.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_ide.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ide.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson64/common/cs5536/cs5536_isa.c<br/>index 924be39e7733..924be39e7733 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_isa.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_isa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_isa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_isa.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson64/common/cs5536/cs5536_mfgpt.c<br/>index 12c75db23420..875037063a80 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_mfgpt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_mfgpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_mfgpt.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * CS5536 General timer functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Yanhua, yanh@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Lemote Inc.</div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_ohci.c b/arch/mips/loongson64/common/cs5536/cs5536_ohci.c<br/>index f7c905e50dc4..f7c905e50dc4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_ohci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_ohci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_ohci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_ohci.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/cs5536/cs5536_pci.c b/arch/mips/loongson64/common/cs5536/cs5536_pci.c<br/>index b739723205f8..b739723205f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/cs5536/cs5536_pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/cs5536/cs5536_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/cs5536/cs5536_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/cs5536/cs5536_pci.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/dma-swiotlb.c b/arch/mips/loongson64/common/dma-swiotlb.c<br/>index 2c6b989c1bc4..2c6b989c1bc4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/dma-swiotlb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/dma-swiotlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/dma-swiotlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/dma-swiotlb.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson64/common/early_printk.c<br/>index 6ca632e529dc..6ca632e529dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/early_printk.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/early_printk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/early_printk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/early_printk.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson64/common/env.c<br/>index 22f04ca2ff3e..f6c44dd332e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/env.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/env.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/env.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/env.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * Copyright 2003 ICT CAS</div><div class='ctx'>  * Author: Michael Guo &lt;guoyi@ict.ac.cn&gt;</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Lemote Inc.</div><div class='head'>diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson64/common/init.c<br/>index 9b987fe98b5b..9b987fe98b5b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/init.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson64/common/irq.c<br/>index 687003b19b45..d36d969a4a87 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/irq.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute	 it and/or modify it</div><div class='head'>diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson64/common/machtype.c<br/>index f2807bc662a3..f2807bc662a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/machtype.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/machtype.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/machtype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/machtype.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson64/common/mem.c<br/>index b01d52473da8..b01d52473da8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/mem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/mem.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson64/common/pci.c<br/>index 4e2575643781..4e2575643781 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/pci.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/platform.c b/arch/mips/loongson64/common/platform.c<br/>index 0ed38321a9a2..0ed38321a9a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/platform.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/platform.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/pm.c b/arch/mips/loongson64/common/pm.c<br/>index a6b67ccfc811..a6b67ccfc811 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/pm.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson64/common/reset.c<br/>index a60715e11306..a60715e11306 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/reset.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/rtc.c b/arch/mips/loongson64/common/rtc.c<br/>index b5709af09f7f..b5709af09f7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/rtc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/rtc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/rtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/rtc.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson64/common/serial.c<br/>index c23fa1373729..ffefc1cb2612 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/serial.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/serial.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/serial.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='hunk'>@@ -108,5 +108,10 @@ static int __init serial_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return platform_device_register(&amp;uart8250_device);</div><div class='ctx'> }</div><div class='add'>+module_init(serial_init);</div><div class='ctx'> </div><div class='del'>-device_initcall(serial_init);</div><div class='add'>+static void __init serial_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_device_unregister(&amp;uart8250_device);</div><div class='add'>+}</div><div class='add'>+module_exit(serial_exit);</div><div class='head'>diff --git a/arch/mips/loongson/common/setup.c b/arch/mips/loongson64/common/setup.c<br/>index d477dd6bb326..2dc5122f0e09 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/setup.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute	 it and/or modify it</div><div class='head'>diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson64/common/time.c<br/>index e1a5382ad47e..e1a5382ad47e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/time.c</a></div><div class='head'>diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson64/common/uart_base.c<br/>index 9de559d58e1f..9de559d58e1f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/common/uart_base.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/common/uart_base.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/common/uart_base.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/common/uart_base.c</a></div><div class='head'>diff --git a/arch/mips/loongson/fuloong-2e/Makefile b/arch/mips/loongson64/fuloong-2e/Makefile<br/>index b7622720c1ad..b7622720c1ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/fuloong-2e/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/fuloong-2e/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/fuloong-2e/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson64/fuloong-2e/irq.c<br/>index ef5ec8f3de5f..892963f860b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/fuloong-2e/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/fuloong-2e/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/fuloong-2e/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/irq.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute	 it and/or modify it</div><div class='head'>diff --git a/arch/mips/loongson/fuloong-2e/reset.c b/arch/mips/loongson64/fuloong-2e/reset.c<br/>index da4d2ae2a1f8..da4d2ae2a1f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/fuloong-2e/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/fuloong-2e/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/fuloong-2e/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/fuloong-2e/reset.c</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/Makefile b/arch/mips/loongson64/lemote-2f/Makefile<br/>index 4f9eaa328a16..4f9eaa328a16 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson64/lemote-2f/clock.c<br/>index 462e34d46b4a..a78fb657068c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/clock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/clock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/clock.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2006 - 2008 Lemote Inc. &amp; Insititute of Computing Technology</div><div class='add'>+ * Copyright (C) 2006 - 2008 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Yanhua, yanh@lemote.com</div><div class='ctx'>  *</div><div class='ctx'>  * This file is subject to the terms and conditions of the GNU General Public</div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='del'>-#include &lt;asm/mach-loongson/loongson.h&gt;</div><div class='add'>+#include &lt;asm/mach-loongson64/loongson.h&gt;</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(clock_list);</div><div class='ctx'> static DEFINE_SPINLOCK(clock_lock);</div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.c b/arch/mips/loongson64/lemote-2f/ec_kb3310b.c<br/>index 2b666d3a3947..2b666d3a3947 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/ec_kb3310b.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/ec_kb3310b.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/ec_kb3310b.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/ec_kb3310b.c</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.h b/arch/mips/loongson64/lemote-2f/ec_kb3310b.h<br/>index 5a3f1860d4d2..5a3f1860d4d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/ec_kb3310b.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/ec_kb3310b.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/ec_kb3310b.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/ec_kb3310b.h</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson64/lemote-2f/irq.c<br/>index cab5f43e0e29..cab5f43e0e29 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/irq.c</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/machtype.c b/arch/mips/loongson64/lemote-2f/machtype.c<br/>index b55e6eece5e0..b55e6eece5e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/machtype.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/machtype.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/machtype.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/machtype.c</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/pm.c b/arch/mips/loongson64/lemote-2f/pm.c<br/>index cac4d382ea73..cac4d382ea73 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/pm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/pm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/pm.c</a></div><div class='head'>diff --git a/arch/mips/loongson/lemote-2f/reset.c b/arch/mips/loongson64/lemote-2f/reset.c<br/>index a26ca7fcd7e0..a26ca7fcd7e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/lemote-2f/reset.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/lemote-2f/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/lemote-2f/reset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/lemote-2f/reset.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/Makefile b/arch/mips/loongson64/loongson-3/Makefile<br/>index 622fead5ebc9..622fead5ebc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/Makefile</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/cop2-ex.c b/arch/mips/loongson64/loongson-3/cop2-ex.c<br/>index ea13764d0a03..ea13764d0a03 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/cop2-ex.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/cop2-ex.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/cop2-ex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/cop2-ex.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/hpet.c b/arch/mips/loongson64/loongson-3/hpet.c<br/>index 5c21cd3bd339..5c21cd3bd339 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/hpet.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/hpet.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/hpet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/hpet.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/irq.c b/arch/mips/loongson64/loongson-3/irq.c<br/>index 0f75b6b3d218..0f75b6b3d218 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/irq.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/numa.c b/arch/mips/loongson64/loongson-3/numa.c<br/>index 12d14ed48778..6f9e010cec4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/numa.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/numa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/numa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/numa.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2010 Loongson Inc. &amp; Lemote Inc. &amp;</div><div class='del'>- *                    Insititute of Computing Technology</div><div class='add'>+ *                    Institute of Computing Technology</div><div class='ctx'>  * Author:  Xiang Gao, gaoxiang@ict.ac.cn</div><div class='ctx'>  *          Huacai Chen, chenhc@lemote.com</div><div class='ctx'>  *          Xiaofu Meng, Shuangshuang Zhang</div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/platform.c b/arch/mips/loongson64/loongson-3/platform.c<br/>index 25a97cc0ee33..25a97cc0ee33 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/platform.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/platform.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/platform.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c<br/>index 509877c6e9d9..509877c6e9d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/smp.c</a></div><div class='head'>diff --git a/arch/mips/loongson/loongson-3/smp.h b/arch/mips/loongson64/loongson-3/smp.h<br/>index d98ff654b7d7..d98ff654b7d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/loongson/loongson-3/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/loongson/loongson-3/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/loongson64/loongson-3/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/loongson64/loongson-3/smp.h</a></div><div class='head'>diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c<br/>index 22b9b2cb9219..712f17a2ecf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/math-emu/cp1emu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/math-emu/cp1emu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/math-emu/cp1emu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/math-emu/cp1emu.c</a></div><div class='hunk'>@@ -451,7 +451,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,</div><div class='ctx'> 			/* Fall through */</div><div class='ctx'> 		case jr_op:</div><div class='ctx'> 			/* For R6, JR already emulated in jalr_op */</div><div class='del'>-			if (NO_R6EMU &amp;&amp; insn.r_format.opcode == jr_op)</div><div class='add'>+			if (NO_R6EMU &amp;&amp; insn.r_format.func == jr_op)</div><div class='ctx'> 				break;</div><div class='ctx'> 			*contpc = regs-&gt;regs[insn.r_format.rs];</div><div class='ctx'> 			return 1;</div><div class='hunk'>@@ -551,7 +551,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,</div><div class='ctx'> 				dec_insn.next_pc_inc;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	case blezl_op:</div><div class='del'>-		if (NO_R6EMU)</div><div class='add'>+		if (!insn.i_format.rt &amp;&amp; NO_R6EMU)</div><div class='ctx'> 			break;</div><div class='ctx'> 	case blez_op:</div><div class='ctx'> </div><div class='hunk'>@@ -588,7 +588,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,</div><div class='ctx'> 				dec_insn.next_pc_inc;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	case bgtzl_op:</div><div class='del'>-		if (NO_R6EMU)</div><div class='add'>+		if (!insn.i_format.rt &amp;&amp; NO_R6EMU)</div><div class='ctx'> 			break;</div><div class='ctx'> 	case bgtz_op:</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c<br/>index 2e03ab173591..fbea4432f3f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/c-r4k.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/c-r4k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/c-r4k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/c-r4k.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt; /* for run_uncached() */</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/dma-coherence.h&gt;</div><div class='add'>+#include &lt;asm/mips-cm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Special Variant of smp_call_function for use by cache functions:</div><div class='hunk'>@@ -51,9 +52,16 @@ static inline void r4k_on_each_cpu(void (*func) (void *info), void *info)</div><div class='ctx'> {</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_MIPS_MT_SMP</div><div class='del'>-	smp_call_function(func, info, 1);</div><div class='del'>-#endif</div><div class='add'>+	/*</div><div class='add'>+	 * The Coherent Manager propagates address-based cache ops to other</div><div class='add'>+	 * cores but not index-based ops. However, r4k_on_each_cpu is used</div><div class='add'>+	 * in both cases so there is no easy way to tell what kind of op is</div><div class='add'>+	 * executed to the other cores. The best we can probably do is</div><div class='add'>+	 * to restrict that call when a CM is not present because both</div><div class='add'>+	 * CM-based SMP protocols (CMP &amp; CPS) restrict index-based cache ops.</div><div class='add'>+	 */</div><div class='add'>+	if (!mips_cm_present())</div><div class='add'>+		smp_call_function_many(&amp;cpu_foreign_map, func, info, 1);</div><div class='ctx'> 	func(info);</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='hunk'>@@ -295,7 +303,7 @@ static void r4k_blast_icache_page_setup(void)</div><div class='ctx'> </div><div class='ctx'> static void (*r4k_blast_icache_user_page)(unsigned long addr);</div><div class='ctx'> </div><div class='del'>-static void __cpuinit r4k_blast_icache_user_page_setup(void)</div><div class='add'>+static void r4k_blast_icache_user_page_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ic_lsize = cpu_icache_line_size();</div><div class='ctx'> </div><div class='hunk'>@@ -937,7 +945,9 @@ static void b5k_instruction_hazard(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static char *way_string[] = { NULL, "direct mapped", "2-way",</div><div class='del'>-	"3-way", "4-way", "5-way", "6-way", "7-way", "8-way"</div><div class='add'>+	"3-way", "4-way", "5-way", "6-way", "7-way", "8-way",</div><div class='add'>+	"9-way", "10-way", "11-way", "12-way",</div><div class='add'>+	"13-way", "14-way", "15-way", "16-way",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void probe_pcache(void)</div><div class='head'>diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c<br/>index 8d909dbbf37f..596e18458e04 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/c-tx39.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/c-tx39.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/c-tx39.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/c-tx39.c</a></div><div class='hunk'>@@ -28,8 +28,6 @@ static unsigned long icache_size, dcache_size;		/* Size in bytes */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/r4kcache.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int r3k_have_wired_reg;	/* in r3k-tlb.c */</div><div class='del'>-</div><div class='ctx'> /* This sequence is required to ensure icache is disabled immediately */</div><div class='ctx'> #define TX39_STOP_STREAMING() \</div><div class='ctx'> __asm__ __volatile__( \</div><div class='hunk'>@@ -383,8 +381,6 @@ void tx39_cache_init(void)</div><div class='ctx'> 	case CPU_TX3927:</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* TX39/H2,H3 core (writeback 2way-set-associative cache) */</div><div class='del'>-		r3k_have_wired_reg = 1;</div><div class='del'>-		write_c0_wired(0);	/* set 8 on reset... */</div><div class='ctx'> 		/* board-dependent init code may set WBON */</div><div class='ctx'> </div><div class='ctx'> 		__flush_cache_vmap	= tx39__flush_cache_vmap;</div><div class='head'>diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c<br/>index 609d1241b0c4..eeaf0245c3b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/dma-default.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/dma-default.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/dma-default.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/dma-default.c</a></div><div class='hunk'>@@ -262,12 +262,13 @@ static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,</div><div class='ctx'> 	plat_unmap_dma_mem(dev, dma_addr, size, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='add'>+static int mips_dma_map_sg(struct device *dev, struct scatterlist *sglist,</div><div class='ctx'> 	int nents, enum dma_data_direction direction, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sg++) {</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='ctx'> 		if (!plat_device_is_coherent(dev))</div><div class='ctx'> 			__dma_sync(sg_page(sg), sg-&gt;offset, sg-&gt;length,</div><div class='ctx'> 				   direction);</div><div class='hunk'>@@ -291,13 +292,14 @@ static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,</div><div class='ctx'> 	return plat_map_dma_mem_page(dev, page) + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='add'>+static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,</div><div class='ctx'> 	int nhwentries, enum dma_data_direction direction,</div><div class='ctx'> 	struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nhwentries; i++, sg++) {</div><div class='add'>+	for_each_sg(sglist, sg, nhwentries, i) {</div><div class='ctx'> 		if (!plat_device_is_coherent(dev) &amp;&amp;</div><div class='ctx'> 		    direction != DMA_TO_DEVICE)</div><div class='ctx'> 			__dma_sync(sg_page(sg), sg-&gt;offset, sg-&gt;length,</div><div class='hunk'>@@ -324,26 +326,34 @@ static void mips_dma_sync_single_for_device(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mips_dma_sync_sg_for_cpu(struct device *dev,</div><div class='del'>-	struct scatterlist *sg, int nelems, enum dma_data_direction direction)</div><div class='add'>+	struct scatterlist *sglist, int nelems,</div><div class='add'>+	enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	if (cpu_needs_post_dma_flush(dev))</div><div class='del'>-		for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	if (cpu_needs_post_dma_flush(dev)) {</div><div class='add'>+		for_each_sg(sglist, sg, nelems, i) {</div><div class='ctx'> 			__dma_sync(sg_page(sg), sg-&gt;offset, sg-&gt;length,</div><div class='ctx'> 				   direction);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	plat_post_dma_flush(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mips_dma_sync_sg_for_device(struct device *dev,</div><div class='del'>-	struct scatterlist *sg, int nelems, enum dma_data_direction direction)</div><div class='add'>+	struct scatterlist *sglist, int nelems,</div><div class='add'>+	enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='del'>-	if (!plat_device_is_coherent(dev))</div><div class='del'>-		for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	if (!plat_device_is_coherent(dev)) {</div><div class='add'>+		for_each_sg(sglist, sg, nelems, i) {</div><div class='ctx'> 			__dma_sync(sg_page(sg), sg-&gt;offset, sg-&gt;length,</div><div class='ctx'> 				   direction);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)</div><div class='head'>diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c<br/>index 7ff8637e530d..36c0f26fac6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/fault.c</a></div><div class='hunk'>@@ -21,10 +21,10 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/branch.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/highmem.h&gt;		/* For VMALLOC_END */</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='hunk'>@@ -94,7 +94,7 @@ static void __kprobes __do_page_fault(struct pt_regs *regs, unsigned long write,</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c<br/>index da815d295239..11661cbc11a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/highmem.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -72,6 +72,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	if (vaddr &lt; FIXADDR_START) { // FIXME</div><div class='ctx'> 		pagefault_enable();</div><div class='add'>+		preempt_enable();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -92,6 +93,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> #endif</div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='hunk'>@@ -104,6 +106,7 @@ void *kmap_atomic_pfn(unsigned long pfn)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	type = kmap_atomic_idx_push();</div><div class='head'>diff --git a/arch/mips/mm/hugetlbpage.c b/arch/mips/mm/hugetlbpage.c<br/>index 06e0f421b41b..74aa6f62468f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -51,11 +51,6 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return (pte_t *) pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This function checks for proper alignment of input addr and len parameters.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c<br/>index faa5c9822ecc..198a3147dd7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/init.c</a></div><div class='hunk'>@@ -90,6 +90,7 @@ static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(Page_dcache_dirty(page));</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	idx = (addr &gt;&gt; PAGE_SHIFT) &amp; (FIX_N_COLOURS - 1);</div><div class='ctx'> 	idx += in_interrupt() ? FIX_N_COLOURS : 0;</div><div class='hunk'>@@ -152,6 +153,7 @@ void kunmap_coherent(void)</div><div class='ctx'> 	write_c0_entryhi(old_ctx);</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void copy_user_highpage(struct page *to, struct page *from,</div><div class='head'>diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c<br/>index 4094bbd42adf..2b75b8f880ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/tlb-r3k.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/tlb-r3k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/tlb-r3k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlb-r3k.c</a></div><div class='hunk'>@@ -36,30 +36,33 @@ extern void build_tlb_refill_handler(void);</div><div class='ctx'> 		"nop\n\t"		\</div><div class='ctx'> 		".set	pop\n\t")</div><div class='ctx'> </div><div class='del'>-int r3k_have_wired_reg;		/* should be in cpu_data? */</div><div class='add'>+static int r3k_have_wired_reg;			/* Should be in cpu_data? */</div><div class='ctx'> </div><div class='ctx'> /* TLB operations. */</div><div class='del'>-void local_flush_tlb_all(void)</div><div class='add'>+static void local_flush_tlb_from(int entry)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	unsigned long old_ctx;</div><div class='del'>-	int entry;</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG_TLB</div><div class='del'>-	printk("[tlball]");</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-	local_irq_save(flags);</div><div class='ctx'> 	old_ctx = read_c0_entryhi() &amp; ASID_MASK;</div><div class='ctx'> 	write_c0_entrylo0(0);</div><div class='del'>-	entry = r3k_have_wired_reg ? read_c0_wired() : 8;</div><div class='del'>-	for (; entry &lt; current_cpu_data.tlbsize; entry++) {</div><div class='add'>+	while (entry &lt; current_cpu_data.tlbsize) {</div><div class='ctx'> 		write_c0_index(entry &lt;&lt; 8);</div><div class='ctx'> 		write_c0_entryhi((entry | 0x80000) &lt;&lt; 12);</div><div class='del'>-		BARRIER;</div><div class='add'>+		entry++;				/* BARRIER */</div><div class='ctx'> 		tlb_write_indexed();</div><div class='ctx'> 	}</div><div class='ctx'> 	write_c0_entryhi(old_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void local_flush_tlb_all(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG_TLB</div><div class='add'>+	printk("[tlball]");</div><div class='add'>+#endif</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	local_flush_tlb_from(r3k_have_wired_reg ? read_c0_wired() : 8);</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +280,13 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,</div><div class='ctx'> </div><div class='ctx'> void tlb_init(void)</div><div class='ctx'> {</div><div class='del'>-	local_flush_tlb_all();</div><div class='del'>-</div><div class='add'>+	switch (current_cpu_type()) {</div><div class='add'>+	case CPU_TX3922:</div><div class='add'>+	case CPU_TX3927:</div><div class='add'>+		r3k_have_wired_reg = 1;</div><div class='add'>+		write_c0_wired(0);		/* Set to 8 on reset... */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	local_flush_tlb_from(0);</div><div class='ctx'> 	build_tlb_refill_handler();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c<br/>index 08318ecb803a..5037d5868cef 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/tlb-r4k.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/tlb-r4k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/tlb-r4k.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlb-r4k.c</a></div><div class='hunk'>@@ -423,7 +423,7 @@ int __init has_transparent_hugepage(void)</div><div class='ctx'>  * lifetime of the system</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int temp_tlb_entry __cpuinitdata;</div><div class='add'>+int temp_tlb_entry;</div><div class='ctx'> </div><div class='ctx'> __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,</div><div class='ctx'> 			       unsigned long entryhi, unsigned long pagemask)</div><div class='head'>diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c<br/>index 97c87027c17f..323d1d302f2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/tlbex.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mm/tlbex.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/tlbex.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mm/tlbex.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> #include &lt;asm/uasm.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-static int __cpuinitdata mips_xpa_disabled;</div><div class='add'>+static int mips_xpa_disabled;</div><div class='ctx'> </div><div class='ctx'> static int __init xpa_disable(char *s)</div><div class='ctx'> {</div><div class='hunk'>@@ -1608,23 +1608,32 @@ build_pte_present(u32 **p, struct uasm_reloc **r,</div><div class='ctx'> 		  int pte, int ptr, int scratch, enum label_id lid)</div><div class='ctx'> {</div><div class='ctx'> 	int t = scratch &gt;= 0 ? scratch : pte;</div><div class='add'>+	int cur = pte;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_rixi) {</div><div class='ctx'> 		if (use_bbit_insns()) {</div><div class='ctx'> 			uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);</div><div class='ctx'> 			uasm_i_nop(p);</div><div class='ctx'> 		} else {</div><div class='del'>-			uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);</div><div class='del'>-			uasm_i_andi(p, t, t, 1);</div><div class='add'>+			if (_PAGE_PRESENT_SHIFT) {</div><div class='add'>+				uasm_i_srl(p, t, cur, _PAGE_PRESENT_SHIFT);</div><div class='add'>+				cur = t;</div><div class='add'>+			}</div><div class='add'>+			uasm_i_andi(p, t, cur, 1);</div><div class='ctx'> 			uasm_il_beqz(p, r, t, lid);</div><div class='ctx'> 			if (pte == t)</div><div class='ctx'> 				/* You lose the SMP race :-(*/</div><div class='ctx'> 				iPTE_LW(p, pte, ptr);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);</div><div class='del'>-		uasm_i_andi(p, t, t, 3);</div><div class='del'>-		uasm_i_xori(p, t, t, 3);</div><div class='add'>+		if (_PAGE_PRESENT_SHIFT) {</div><div class='add'>+			uasm_i_srl(p, t, cur, _PAGE_PRESENT_SHIFT);</div><div class='add'>+			cur = t;</div><div class='add'>+		}</div><div class='add'>+		uasm_i_andi(p, t, cur,</div><div class='add'>+			(_PAGE_PRESENT | _PAGE_READ) &gt;&gt; _PAGE_PRESENT_SHIFT);</div><div class='add'>+		uasm_i_xori(p, t, t,</div><div class='add'>+			(_PAGE_PRESENT | _PAGE_READ) &gt;&gt; _PAGE_PRESENT_SHIFT);</div><div class='ctx'> 		uasm_il_bnez(p, r, t, lid);</div><div class='ctx'> 		if (pte == t)</div><div class='ctx'> 			/* You lose the SMP race :-(*/</div><div class='hunk'>@@ -1652,10 +1661,16 @@ build_pte_writable(u32 **p, struct uasm_reloc **r,</div><div class='ctx'> 		   enum label_id lid)</div><div class='ctx'> {</div><div class='ctx'> 	int t = scratch &gt;= 0 ? scratch : pte;</div><div class='add'>+	int cur = pte;</div><div class='ctx'> </div><div class='del'>-	uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);</div><div class='del'>-	uasm_i_andi(p, t, t, 5);</div><div class='del'>-	uasm_i_xori(p, t, t, 5);</div><div class='add'>+	if (_PAGE_PRESENT_SHIFT) {</div><div class='add'>+		uasm_i_srl(p, t, cur, _PAGE_PRESENT_SHIFT);</div><div class='add'>+		cur = t;</div><div class='add'>+	}</div><div class='add'>+	uasm_i_andi(p, t, cur,</div><div class='add'>+		    (_PAGE_PRESENT | _PAGE_WRITE) &gt;&gt; _PAGE_PRESENT_SHIFT);</div><div class='add'>+	uasm_i_xori(p, t, t,</div><div class='add'>+		    (_PAGE_PRESENT | _PAGE_WRITE) &gt;&gt; _PAGE_PRESENT_SHIFT);</div><div class='ctx'> 	uasm_il_bnez(p, r, t, lid);</div><div class='ctx'> 	if (pte == t)</div><div class='ctx'> 		/* You lose the SMP race :-(*/</div><div class='head'>diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile<br/>index 6510ace272d4..ea35587a5c29 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mti-malta/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mti-malta/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mti-malta/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/Makefile</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> # Copyright (C) 2008 Wind River Systems, Inc.</div><div class='ctx'> #   written by Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='ctx'> #</div><div class='del'>-obj-y				:= malta-display.o malta-init.o \</div><div class='add'>+obj-y				:= malta-display.o malta-dt.o malta-init.o \</div><div class='ctx'> 				   malta-int.o malta-memory.o malta-platform.o \</div><div class='ctx'> 				   malta-reset.o malta-setup.o malta-time.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/mti-malta/malta-dt.c b/arch/mips/mti-malta/malta-dt.c<br/>new file mode 100644<br/>index 000000000000..47a22889285f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/mti-malta/malta-dt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-dt.c</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015 Imagination Technologies</div><div class='add'>+ * Author: Paul Burton &lt;paul.burton@imgtec.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the</div><div class='add'>+ * Free Software Foundation; either version 2 of the License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+</div><div class='add'>+void __init device_tree_init(void)</div><div class='add'>+{</div><div class='add'>+	unflatten_and_copy_device_tree();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bus_ids[] __initconst = {</div><div class='add'>+	{ .compatible = "simple-bus", },</div><div class='add'>+	{ .compatible = "isa", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init publish_devices(void)</div><div class='add'>+{</div><div class='add'>+	if (!of_have_populated_dt())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return of_platform_bus_probe(NULL, bus_ids, NULL);</div><div class='add'>+}</div><div class='add'>+device_initcall(publish_devices);</div><div class='head'>diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c<br/>index db7c9e5826a6..9d1e7f5ec36c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mti-malta/malta-setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mti-malta/malta-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mti-malta/malta-setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-setup.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/screen_info.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='hunk'>@@ -31,6 +32,7 @@</div><div class='ctx'> #include &lt;asm/mips-boards/malta.h&gt;</div><div class='ctx'> #include &lt;asm/mips-boards/maltaint.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #ifdef CONFIG_VT</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='hunk'>@@ -249,6 +251,8 @@ void __init plat_mem_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='add'>+	__dt_setup_arch(__dtb_start);</div><div class='add'>+</div><div class='ctx'> 	if (config_enabled(CONFIG_EVA))</div><div class='ctx'> 		/* EVA has already been configured in mach-malta/kernel-init.h */</div><div class='ctx'> 		pr_info("Enhanced Virtual Addressing (EVA) activated\n");</div><div class='head'>diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c<br/>index 185e68261f45..5625b190edc0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mti-malta/malta-time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mti-malta/malta-time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mti-malta/malta-time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-malta/malta-time.c</a></div><div class='hunk'>@@ -119,18 +119,24 @@ void read_persistent_clock(struct timespec *ts)</div><div class='ctx'> </div><div class='ctx'> int get_c0_fdc_int(void)</div><div class='ctx'> {</div><div class='del'>-	int mips_cpu_fdc_irq;</div><div class='add'>+	/*</div><div class='add'>+	 * Some cores claim the FDC is routable through the GIC, but it doesn't</div><div class='add'>+	 * actually seem to be connected for those Malta bitstreams.</div><div class='add'>+	 */</div><div class='add'>+	switch (current_cpu_type()) {</div><div class='add'>+	case CPU_INTERAPTIV:</div><div class='add'>+	case CPU_PROAPTIV:</div><div class='add'>+		return -1;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_veic)</div><div class='del'>-		mips_cpu_fdc_irq = -1;</div><div class='add'>+		return -1;</div><div class='ctx'> 	else if (gic_present)</div><div class='del'>-		mips_cpu_fdc_irq = gic_get_c0_fdc_int();</div><div class='add'>+		return gic_get_c0_fdc_int();</div><div class='ctx'> 	else if (cp0_fdc_irq &gt;= 0)</div><div class='del'>-		mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;</div><div class='add'>+		return MIPS_CPU_IRQ_BASE + cp0_fdc_irq;</div><div class='ctx'> 	else</div><div class='del'>-		mips_cpu_fdc_irq = -1;</div><div class='del'>-</div><div class='del'>-	return mips_cpu_fdc_irq;</div><div class='add'>+		return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int get_c0_perfcount_int(void)</div><div class='head'>diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile<br/>index ecd71db6258b..2e52cbd20ceb 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mti-sead3/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/mti-sead3/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mti-sead3/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/mti-sead3/Makefile</a></div><div class='hunk'>@@ -15,5 +15,3 @@ obj-y				:= sead3-lcd.o sead3-display.o sead3-init.o \</div><div class='ctx'> obj-y				+= leds-sead3.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK)	+= sead3-console.o</div><div class='del'>-</div><div class='del'>-CFLAGS_sead3-setup.o = -I$(src)/../../../scripts/dtc/libfdt</div><div class='head'>diff --git a/arch/mips/net/Makefile b/arch/mips/net/Makefile<br/>index ae74b3a91f5c..8c2771401f54 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/net/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/net/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/net/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/Makefile</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> # MIPS networking code</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_BPF_JIT) += bpf_jit.o</div><div class='add'>+obj-$(CONFIG_BPF_JIT) += bpf_jit.o bpf_jit_asm.o</div><div class='head'>diff --git a/arch/mips/net/bpf_jit.c b/arch/mips/net/bpf_jit.c<br/>index e23fdf2a9c80..0c4a133f6216 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/net/bpf_jit.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/net/bpf_jit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/net/bpf_jit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/bitops.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cpu-features.h&gt;</div><div class='hunk'>@@ -28,14 +29,14 @@</div><div class='ctx'> #include "bpf_jit.h"</div><div class='ctx'> </div><div class='ctx'> /* ABI</div><div class='del'>- *</div><div class='del'>- * s0	1st scratch register</div><div class='del'>- * s1	2nd scratch register</div><div class='del'>- * s2	offset register</div><div class='del'>- * s3	BPF register A</div><div class='del'>- * s4	BPF register X</div><div class='del'>- * s5	*skb</div><div class='del'>- * s6	*scratch memory</div><div class='add'>+ * r_skb_hl	SKB header length</div><div class='add'>+ * r_data	SKB data pointer</div><div class='add'>+ * r_off	Offset</div><div class='add'>+ * r_A		BPF register A</div><div class='add'>+ * r_X		BPF register X</div><div class='add'>+ * r_skb	*skb</div><div class='add'>+ * r_M		*scratch memory</div><div class='add'>+ * r_skb_len	SKB length</div><div class='ctx'>  *</div><div class='ctx'>  * On entry (*bpf_func)(*skb, *filter)</div><div class='ctx'>  * a0 = MIPS_R_A0 = skb;</div><div class='hunk'>@@ -63,44 +64,8 @@</div><div class='ctx'>  * ----------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define RSIZE	(sizeof(unsigned long))</div><div class='ctx'> #define ptr typeof(unsigned long)</div><div class='ctx'> </div><div class='del'>-/* ABI specific return values */</div><div class='del'>-#ifdef CONFIG_32BIT /* O32 */</div><div class='del'>-#ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='del'>-#define r_err	MIPS_R_V1</div><div class='del'>-#define r_val	MIPS_R_V0</div><div class='del'>-#else /* CONFIG_CPU_LITTLE_ENDIAN */</div><div class='del'>-#define r_err	MIPS_R_V0</div><div class='del'>-#define r_val	MIPS_R_V1</div><div class='del'>-#endif</div><div class='del'>-#else /* N64 */</div><div class='del'>-#define r_err	MIPS_R_V0</div><div class='del'>-#define r_val	MIPS_R_V0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define r_ret	MIPS_R_V0</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Use 2 scratch registers to avoid pipeline interlocks.</div><div class='del'>- * There is no overhead during epilogue and prologue since</div><div class='del'>- * any of the $s0-$s6 registers will only be preserved if</div><div class='del'>- * they are going to actually be used.</div><div class='del'>- */</div><div class='del'>-#define r_s0		MIPS_R_S0 /* scratch reg 1 */</div><div class='del'>-#define r_s1		MIPS_R_S1 /* scratch reg 2 */</div><div class='del'>-#define r_off		MIPS_R_S2</div><div class='del'>-#define r_A		MIPS_R_S3</div><div class='del'>-#define r_X		MIPS_R_S4</div><div class='del'>-#define r_skb		MIPS_R_S5</div><div class='del'>-#define r_M		MIPS_R_S6</div><div class='del'>-#define r_tmp_imm	MIPS_R_T6 /* No need to preserve this */</div><div class='del'>-#define r_tmp		MIPS_R_T7 /* No need to preserve this */</div><div class='del'>-#define r_zero		MIPS_R_ZERO</div><div class='del'>-#define r_sp		MIPS_R_SP</div><div class='del'>-#define r_ra		MIPS_R_RA</div><div class='del'>-</div><div class='ctx'> #define SCRATCH_OFF(k)		(4 * (k))</div><div class='ctx'> </div><div class='ctx'> /* JIT flags */</div><div class='hunk'>@@ -108,13 +73,13 @@</div><div class='ctx'> #define SEEN_SREG_SFT		(BPF_MEMWORDS + 1)</div><div class='ctx'> #define SEEN_SREG_BASE		(1 &lt;&lt; SEEN_SREG_SFT)</div><div class='ctx'> #define SEEN_SREG(x)		(SEEN_SREG_BASE &lt;&lt; (x))</div><div class='del'>-#define SEEN_S0			SEEN_SREG(0)</div><div class='del'>-#define SEEN_S1			SEEN_SREG(1)</div><div class='ctx'> #define SEEN_OFF		SEEN_SREG(2)</div><div class='ctx'> #define SEEN_A			SEEN_SREG(3)</div><div class='ctx'> #define SEEN_X			SEEN_SREG(4)</div><div class='ctx'> #define SEEN_SKB		SEEN_SREG(5)</div><div class='ctx'> #define SEEN_MEM		SEEN_SREG(6)</div><div class='add'>+/* SEEN_SK_DATA also implies skb_hl an skb_len */</div><div class='add'>+#define SEEN_SKB_DATA		(SEEN_SREG(7) | SEEN_SREG(1) | SEEN_SREG(0))</div><div class='ctx'> </div><div class='ctx'> /* Arguments used by JIT */</div><div class='ctx'> #define ARGS_USED_BY_JIT	2 /* only applicable to 64-bit */</div><div class='hunk'>@@ -577,27 +542,13 @@ static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset)</div><div class='ctx'> 	/* Adjust the stack pointer */</div><div class='ctx'> 	emit_stack_offset(-align_sp(offset), ctx);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;flags &amp; SEEN_CALL) {</div><div class='del'>-		/* Argument save area */</div><div class='del'>-		if (config_enabled(CONFIG_64BIT))</div><div class='del'>-			/* Bottom of current frame */</div><div class='del'>-			real_off = align_sp(offset) - RSIZE;</div><div class='del'>-		else</div><div class='del'>-			/* Top of previous frame */</div><div class='del'>-			real_off = align_sp(offset) + RSIZE;</div><div class='del'>-		emit_store_stack_reg(MIPS_R_A0, r_sp, real_off, ctx);</div><div class='del'>-		emit_store_stack_reg(MIPS_R_A1, r_sp, real_off + RSIZE, ctx);</div><div class='del'>-</div><div class='del'>-		real_off = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	tmp_flags = sflags = ctx-&gt;flags &gt;&gt; SEEN_SREG_SFT;</div><div class='ctx'> 	/* sflags is essentially a bitmap */</div><div class='ctx'> 	while (tmp_flags) {</div><div class='ctx'> 		if ((sflags &gt;&gt; i) &amp; 0x1) {</div><div class='ctx'> 			emit_store_stack_reg(MIPS_R_S0 + i, r_sp, real_off,</div><div class='ctx'> 					     ctx);</div><div class='del'>-			real_off += RSIZE;</div><div class='add'>+			real_off += SZREG;</div><div class='ctx'> 		}</div><div class='ctx'> 		i++;</div><div class='ctx'> 		tmp_flags &gt;&gt;= 1;</div><div class='hunk'>@@ -606,13 +557,13 @@ static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset)</div><div class='ctx'> 	/* save return address */</div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_CALL) {</div><div class='ctx'> 		emit_store_stack_reg(r_ra, r_sp, real_off, ctx);</div><div class='del'>-		real_off += RSIZE;</div><div class='add'>+		real_off += SZREG;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup r_M leaving the alignment gap if necessary */</div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_MEM) {</div><div class='del'>-		if (real_off % (RSIZE * 2))</div><div class='del'>-			real_off += RSIZE;</div><div class='add'>+		if (real_off % (SZREG * 2))</div><div class='add'>+			real_off += SZREG;</div><div class='ctx'> 		emit_long_instr(ctx, ADDIU, r_M, r_sp, real_off);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -623,19 +574,6 @@ static void restore_bpf_jit_regs(struct jit_ctx *ctx,</div><div class='ctx'> 	int i, real_off = 0;</div><div class='ctx'> 	u32 sflags, tmp_flags;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;flags &amp; SEEN_CALL) {</div><div class='del'>-		if (config_enabled(CONFIG_64BIT))</div><div class='del'>-			/* Bottom of current frame */</div><div class='del'>-			real_off = align_sp(offset) - RSIZE;</div><div class='del'>-		else</div><div class='del'>-			/* Top of previous frame */</div><div class='del'>-			real_off = align_sp(offset) + RSIZE;</div><div class='del'>-		emit_load_stack_reg(MIPS_R_A0, r_sp, real_off, ctx);</div><div class='del'>-		emit_load_stack_reg(MIPS_R_A1, r_sp, real_off + RSIZE, ctx);</div><div class='del'>-</div><div class='del'>-		real_off = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	tmp_flags = sflags = ctx-&gt;flags &gt;&gt; SEEN_SREG_SFT;</div><div class='ctx'> 	/* sflags is a bitmap */</div><div class='ctx'> 	i = 0;</div><div class='hunk'>@@ -643,7 +581,7 @@ static void restore_bpf_jit_regs(struct jit_ctx *ctx,</div><div class='ctx'> 		if ((sflags &gt;&gt; i) &amp; 0x1) {</div><div class='ctx'> 			emit_load_stack_reg(MIPS_R_S0 + i, r_sp, real_off,</div><div class='ctx'> 					    ctx);</div><div class='del'>-			real_off += RSIZE;</div><div class='add'>+			real_off += SZREG;</div><div class='ctx'> 		}</div><div class='ctx'> 		i++;</div><div class='ctx'> 		tmp_flags &gt;&gt;= 1;</div><div class='hunk'>@@ -663,23 +601,13 @@ static unsigned int get_stack_depth(struct jit_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* How may s* regs do we need to preserved? */</div><div class='del'>-	sp_off += hweight32(ctx-&gt;flags &gt;&gt; SEEN_SREG_SFT) * RSIZE;</div><div class='add'>+	sp_off += hweight32(ctx-&gt;flags &gt;&gt; SEEN_SREG_SFT) * SZREG;</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_MEM)</div><div class='ctx'> 		sp_off += 4 * BPF_MEMWORDS; /* BPF_MEMWORDS are 32-bit */</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_CALL)</div><div class='del'>-		/*</div><div class='del'>-		 * The JIT code make calls to external functions using 2</div><div class='del'>-		 * arguments. Therefore, for o32 we don't need to allocate</div><div class='del'>-		 * space because we don't care if the argumetns are lost</div><div class='del'>-		 * across calls. We do need however to preserve incoming</div><div class='del'>-		 * arguments but the space is already allocated for us by</div><div class='del'>-		 * the caller. On the other hand, for n64, we need to allocate</div><div class='del'>-		 * this space ourselves. We need to preserve $ra as well.</div><div class='del'>-		 */</div><div class='del'>-		sp_off += config_enabled(CONFIG_64BIT) ?</div><div class='del'>-			(ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;</div><div class='add'>+		sp_off += SZREG; /* Space for our ra register */</div><div class='ctx'> </div><div class='ctx'> 	return sp_off;</div><div class='ctx'> }</div><div class='hunk'>@@ -696,6 +624,19 @@ static void build_prologue(struct jit_ctx *ctx)</div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_SKB)</div><div class='ctx'> 		emit_reg_move(r_skb, MIPS_R_A0, ctx);</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;flags &amp; SEEN_SKB_DATA) {</div><div class='add'>+		/* Load packet length */</div><div class='add'>+		emit_load(r_skb_len, r_skb, offsetof(struct sk_buff, len),</div><div class='add'>+			  ctx);</div><div class='add'>+		emit_load(r_tmp, r_skb, offsetof(struct sk_buff, data_len),</div><div class='add'>+			  ctx);</div><div class='add'>+		/* Load the data pointer */</div><div class='add'>+		emit_load_ptr(r_skb_data, r_skb,</div><div class='add'>+			      offsetof(struct sk_buff, data), ctx);</div><div class='add'>+		/* Load the header length */</div><div class='add'>+		emit_subu(r_skb_hl, r_skb_len, r_tmp, ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (ctx-&gt;flags &amp; SEEN_X)</div><div class='ctx'> 		emit_jit_reg_move(r_X, r_zero, ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -718,43 +659,17 @@ static void build_epilogue(struct jit_ctx *ctx)</div><div class='ctx'> 	emit_nop(ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)</div><div class='del'>-{</div><div class='del'>-	u8 ret;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skb_copy_bits(skb, offset, &amp;ret, 1);</div><div class='del'>-</div><div class='del'>-	return (u64)err &lt;&lt; 32 | ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)</div><div class='del'>-{</div><div class='del'>-	u16 ret;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skb_copy_bits(skb, offset, &amp;ret, 2);</div><div class='del'>-</div><div class='del'>-	return (u64)err &lt;&lt; 32 | ntohs(ret);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)</div><div class='del'>-{</div><div class='del'>-	u32 ret;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skb_copy_bits(skb, offset, &amp;ret, 4);</div><div class='del'>-</div><div class='del'>-	return (u64)err &lt;&lt; 32 | ntohl(ret);</div><div class='del'>-}</div><div class='add'>+#define CHOOSE_LOAD_FUNC(K, func) \</div><div class='add'>+	((int)K &lt; 0 ? ((int)K &gt;= SKF_LL_OFF ? func##_negative : func) : \</div><div class='add'>+	 func##_positive)</div><div class='ctx'> </div><div class='ctx'> static int build_body(struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};</div><div class='ctx'> 	const struct bpf_prog *prog = ctx-&gt;skf;</div><div class='ctx'> 	const struct sock_filter *inst;</div><div class='del'>-	unsigned int i, off, load_order, condt;</div><div class='add'>+	unsigned int i, off, condt;</div><div class='ctx'> 	u32 k, b_off __maybe_unused;</div><div class='add'>+	u8 (*sk_load_func)(unsigned long *skb, int offset);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; prog-&gt;len; i++) {</div><div class='ctx'> 		u16 code;</div><div class='hunk'>@@ -788,71 +703,46 @@ static int build_body(struct jit_ctx *ctx)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_LD | BPF_W | BPF_ABS:</div><div class='ctx'> 			/* A &lt;- P[k:4] */</div><div class='del'>-			load_order = 2;</div><div class='add'>+			sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_word);</div><div class='ctx'> 			goto load;</div><div class='ctx'> 		case BPF_LD | BPF_H | BPF_ABS:</div><div class='ctx'> 			/* A &lt;- P[k:2] */</div><div class='del'>-			load_order = 1;</div><div class='add'>+			sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_half);</div><div class='ctx'> 			goto load;</div><div class='ctx'> 		case BPF_LD | BPF_B | BPF_ABS:</div><div class='ctx'> 			/* A &lt;- P[k:1] */</div><div class='del'>-			load_order = 0;</div><div class='add'>+			sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_byte);</div><div class='ctx'> load:</div><div class='del'>-			/* the interpreter will deal with the negative K */</div><div class='del'>-			if ((int)k &lt; 0)</div><div class='del'>-				return -ENOTSUPP;</div><div class='del'>-</div><div class='ctx'> 			emit_load_imm(r_off, k, ctx);</div><div class='ctx'> load_common:</div><div class='del'>-			/*</div><div class='del'>-			 * We may got here from the indirect loads so</div><div class='del'>-			 * return if offset is negative.</div><div class='del'>-			 */</div><div class='del'>-			emit_slt(r_s0, r_off, r_zero, ctx);</div><div class='del'>-			emit_bcond(MIPS_COND_NE, r_s0, r_zero,</div><div class='del'>-				   b_imm(prog-&gt;len, ctx), ctx);</div><div class='del'>-			emit_reg_move(r_ret, r_zero, ctx);</div><div class='del'>-</div><div class='del'>-			ctx-&gt;flags |= SEEN_CALL | SEEN_OFF | SEEN_S0 |</div><div class='del'>-				SEEN_SKB | SEEN_A;</div><div class='add'>+			ctx-&gt;flags |= SEEN_CALL | SEEN_OFF |</div><div class='add'>+				SEEN_SKB | SEEN_A | SEEN_SKB_DATA;</div><div class='ctx'> </div><div class='del'>-			emit_load_func(r_s0, (ptr)load_func[load_order],</div><div class='del'>-				      ctx);</div><div class='add'>+			emit_load_func(r_s0, (ptr)sk_load_func, ctx);</div><div class='ctx'> 			emit_reg_move(MIPS_R_A0, r_skb, ctx);</div><div class='ctx'> 			emit_jalr(MIPS_R_RA, r_s0, ctx);</div><div class='ctx'> 			/* Load second argument to delay slot */</div><div class='ctx'> 			emit_reg_move(MIPS_R_A1, r_off, ctx);</div><div class='ctx'> 			/* Check the error value */</div><div class='del'>-			if (config_enabled(CONFIG_64BIT)) {</div><div class='del'>-				/* Get error code from the top 32-bits */</div><div class='del'>-				emit_dsrl32(r_s0, r_val, 0, ctx);</div><div class='del'>-				/* Branch to 3 instructions ahead */</div><div class='del'>-				emit_bcond(MIPS_COND_NE, r_s0, r_zero, 3 &lt;&lt; 2,</div><div class='del'>-					   ctx);</div><div class='del'>-			} else {</div><div class='del'>-				/* Branch to 3 instructions ahead */</div><div class='del'>-				emit_bcond(MIPS_COND_NE, r_err, r_zero, 3 &lt;&lt; 2,</div><div class='del'>-					   ctx);</div><div class='del'>-			}</div><div class='del'>-			emit_nop(ctx);</div><div class='del'>-			/* We are good */</div><div class='del'>-			emit_b(b_imm(i + 1, ctx), ctx);</div><div class='del'>-			emit_jit_reg_move(r_A, r_val, ctx);</div><div class='add'>+			emit_bcond(MIPS_COND_EQ, r_ret, 0, b_imm(i + 1, ctx),</div><div class='add'>+				   ctx);</div><div class='add'>+			/* Load return register on DS for failures */</div><div class='add'>+			emit_reg_move(r_ret, r_zero, ctx);</div><div class='ctx'> 			/* Return with error */</div><div class='ctx'> 			emit_b(b_imm(prog-&gt;len, ctx), ctx);</div><div class='del'>-			emit_reg_move(r_ret, r_zero, ctx);</div><div class='add'>+			emit_nop(ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_LD | BPF_W | BPF_IND:</div><div class='ctx'> 			/* A &lt;- P[X + k:4] */</div><div class='del'>-			load_order = 2;</div><div class='add'>+			sk_load_func = sk_load_word;</div><div class='ctx'> 			goto load_ind;</div><div class='ctx'> 		case BPF_LD | BPF_H | BPF_IND:</div><div class='ctx'> 			/* A &lt;- P[X + k:2] */</div><div class='del'>-			load_order = 1;</div><div class='add'>+			sk_load_func = sk_load_half;</div><div class='ctx'> 			goto load_ind;</div><div class='ctx'> 		case BPF_LD | BPF_B | BPF_IND:</div><div class='ctx'> 			/* A &lt;- P[X + k:1] */</div><div class='del'>-			load_order = 0;</div><div class='add'>+			sk_load_func = sk_load_byte;</div><div class='ctx'> load_ind:</div><div class='ctx'> 			ctx-&gt;flags |= SEEN_OFF | SEEN_X;</div><div class='ctx'> 			emit_addiu(r_off, r_X, k, ctx);</div><div class='hunk'>@@ -874,14 +764,10 @@ load_ind:</div><div class='ctx'> 			emit_load(r_X, r_skb, off, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_LDX | BPF_B | BPF_MSH:</div><div class='del'>-			/* the interpreter will deal with the negative K */</div><div class='del'>-			if ((int)k &lt; 0)</div><div class='del'>-				return -ENOTSUPP;</div><div class='del'>-</div><div class='ctx'> 			/* X &lt;- 4 * (P[k:1] &amp; 0xf) */</div><div class='del'>-			ctx-&gt;flags |= SEEN_X | SEEN_CALL | SEEN_S0 | SEEN_SKB;</div><div class='add'>+			ctx-&gt;flags |= SEEN_X | SEEN_CALL | SEEN_SKB;</div><div class='ctx'> 			/* Load offset to a1 */</div><div class='del'>-			emit_load_func(r_s0, (ptr)jit_get_skb_b, ctx);</div><div class='add'>+			emit_load_func(r_s0, (ptr)sk_load_byte, ctx);</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * This may emit two instructions so it may not fit</div><div class='ctx'> 			 * in the delay slot. So use a0 in the delay slot.</div><div class='hunk'>@@ -890,25 +776,15 @@ load_ind:</div><div class='ctx'> 			emit_jalr(MIPS_R_RA, r_s0, ctx);</div><div class='ctx'> 			emit_reg_move(MIPS_R_A0, r_skb, ctx); /* delay slot */</div><div class='ctx'> 			/* Check the error value */</div><div class='del'>-			if (config_enabled(CONFIG_64BIT)) {</div><div class='del'>-				/* Top 32-bits of $v0 on 64-bit */</div><div class='del'>-				emit_dsrl32(r_s0, r_val, 0, ctx);</div><div class='del'>-				emit_bcond(MIPS_COND_NE, r_s0, r_zero,</div><div class='del'>-					   3 &lt;&lt; 2, ctx);</div><div class='del'>-			} else {</div><div class='del'>-				emit_bcond(MIPS_COND_NE, r_err, r_zero,</div><div class='del'>-					   3 &lt;&lt; 2, ctx);</div><div class='del'>-			}</div><div class='del'>-			/* No need for delay slot */</div><div class='add'>+			emit_bcond(MIPS_COND_NE, r_ret, 0,</div><div class='add'>+				   b_imm(prog-&gt;len, ctx), ctx);</div><div class='add'>+			emit_reg_move(r_ret, r_zero, ctx);</div><div class='ctx'> 			/* We are good */</div><div class='ctx'> 			/* X &lt;- P[1:K] &amp; 0xf */</div><div class='del'>-			emit_andi(r_X, r_val, 0xf, ctx);</div><div class='add'>+			emit_andi(r_X, r_A, 0xf, ctx);</div><div class='ctx'> 			/* X &lt;&lt; 2 */</div><div class='ctx'> 			emit_b(b_imm(i + 1, ctx), ctx);</div><div class='ctx'> 			emit_sll(r_X, r_X, 2, ctx); /* delay slot */</div><div class='del'>-			/* Return with error */</div><div class='del'>-			emit_b(b_imm(prog-&gt;len, ctx), ctx);</div><div class='del'>-			emit_load_imm(r_ret, 0, ctx); /* delay slot */</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_ST:</div><div class='ctx'> 			/* M[k] &lt;- A */</div><div class='hunk'>@@ -943,7 +819,7 @@ load_ind:</div><div class='ctx'> 		case BPF_ALU | BPF_MUL | BPF_K:</div><div class='ctx'> 			/* A *= K */</div><div class='ctx'> 			/* Load K to scratch register before MUL */</div><div class='del'>-			ctx-&gt;flags |= SEEN_A | SEEN_S0;</div><div class='add'>+			ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 			emit_load_imm(r_s0, k, ctx);</div><div class='ctx'> 			emit_mul(r_A, r_A, r_s0, ctx);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -961,7 +837,7 @@ load_ind:</div><div class='ctx'> 				emit_srl(r_A, r_A, k, ctx);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-			ctx-&gt;flags |= SEEN_A | SEEN_S0;</div><div class='add'>+			ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 			emit_load_imm(r_s0, k, ctx);</div><div class='ctx'> 			emit_div(r_A, r_s0, ctx);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -971,7 +847,7 @@ load_ind:</div><div class='ctx'> 				ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 				emit_jit_reg_move(r_A, r_zero, ctx);</div><div class='ctx'> 			} else {</div><div class='del'>-				ctx-&gt;flags |= SEEN_A | SEEN_S0;</div><div class='add'>+				ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 				emit_load_imm(r_s0, k, ctx);</div><div class='ctx'> 				emit_mod(r_A, r_s0, ctx);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -982,7 +858,7 @@ load_ind:</div><div class='ctx'> 			/* Check if r_X is zero */</div><div class='ctx'> 			emit_bcond(MIPS_COND_EQ, r_X, r_zero,</div><div class='ctx'> 				   b_imm(prog-&gt;len, ctx), ctx);</div><div class='del'>-			emit_load_imm(r_val, 0, ctx); /* delay slot */</div><div class='add'>+			emit_load_imm(r_ret, 0, ctx); /* delay slot */</div><div class='ctx'> 			emit_div(r_A, r_X, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_ALU | BPF_MOD | BPF_X:</div><div class='hunk'>@@ -991,7 +867,7 @@ load_ind:</div><div class='ctx'> 			/* Check if r_X is zero */</div><div class='ctx'> 			emit_bcond(MIPS_COND_EQ, r_X, r_zero,</div><div class='ctx'> 				   b_imm(prog-&gt;len, ctx), ctx);</div><div class='del'>-			emit_load_imm(r_val, 0, ctx); /* delay slot */</div><div class='add'>+			emit_load_imm(r_ret, 0, ctx); /* delay slot */</div><div class='ctx'> 			emit_mod(r_A, r_X, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_ALU | BPF_OR | BPF_K:</div><div class='hunk'>@@ -1085,10 +961,10 @@ jmp_cmp:</div><div class='ctx'> 			if ((condt &amp; MIPS_COND_GE) ||</div><div class='ctx'> 			    (condt &amp; MIPS_COND_GT)) {</div><div class='ctx'> 				if (condt &amp; MIPS_COND_K) { /* K */</div><div class='del'>-					ctx-&gt;flags |= SEEN_S0 | SEEN_A;</div><div class='add'>+					ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 					emit_sltiu(r_s0, r_A, k, ctx);</div><div class='ctx'> 				} else { /* X */</div><div class='del'>-					ctx-&gt;flags |= SEEN_S0 | SEEN_A |</div><div class='add'>+					ctx-&gt;flags |= SEEN_A |</div><div class='ctx'> 						SEEN_X;</div><div class='ctx'> 					emit_sltu(r_s0, r_A, r_X, ctx);</div><div class='ctx'> 				}</div><div class='hunk'>@@ -1100,7 +976,7 @@ jmp_cmp:</div><div class='ctx'> 				/* A &gt; (K|X) ? scratch = 0 */</div><div class='ctx'> 				if (condt &amp; MIPS_COND_GT) {</div><div class='ctx'> 					/* Checking for equality */</div><div class='del'>-					ctx-&gt;flags |= SEEN_S0 | SEEN_A | SEEN_X;</div><div class='add'>+					ctx-&gt;flags |= SEEN_A | SEEN_X;</div><div class='ctx'> 					if (condt &amp; MIPS_COND_K)</div><div class='ctx'> 						emit_load_imm(r_s0, k, ctx);</div><div class='ctx'> 					else</div><div class='hunk'>@@ -1123,7 +999,7 @@ jmp_cmp:</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* A == K|X */</div><div class='ctx'> 				if (condt &amp; MIPS_COND_K) { /* K */</div><div class='del'>-					ctx-&gt;flags |= SEEN_S0 | SEEN_A;</div><div class='add'>+					ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 					emit_load_imm(r_s0, k, ctx);</div><div class='ctx'> 					/* jump true */</div><div class='ctx'> 					b_off = b_imm(i + inst-&gt;jt + 1, ctx);</div><div class='hunk'>@@ -1153,7 +1029,7 @@ jmp_cmp:</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_JMP | BPF_JSET | BPF_K:</div><div class='del'>-			ctx-&gt;flags |= SEEN_S0 | SEEN_S1 | SEEN_A;</div><div class='add'>+			ctx-&gt;flags |= SEEN_A;</div><div class='ctx'> 			/* pc += (A &amp; K) ? pc -&gt; jt : pc -&gt; jf */</div><div class='ctx'> 			emit_load_imm(r_s1, k, ctx);</div><div class='ctx'> 			emit_and(r_s0, r_A, r_s1, ctx);</div><div class='hunk'>@@ -1167,7 +1043,7 @@ jmp_cmp:</div><div class='ctx'> 			emit_nop(ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_JMP | BPF_JSET | BPF_X:</div><div class='del'>-			ctx-&gt;flags |= SEEN_S0 | SEEN_X | SEEN_A;</div><div class='add'>+			ctx-&gt;flags |= SEEN_X | SEEN_A;</div><div class='ctx'> 			/* pc += (A &amp; X) ? pc -&gt; jt : pc -&gt; jf */</div><div class='ctx'> 			emit_and(r_s0, r_A, r_X, ctx);</div><div class='ctx'> 			/* jump true */</div><div class='hunk'>@@ -1251,7 +1127,7 @@ jmp_cmp:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_ANC | SKF_AD_IFINDEX:</div><div class='ctx'> 			/* A = skb-&gt;dev-&gt;ifindex */</div><div class='del'>-			ctx-&gt;flags |= SEEN_SKB | SEEN_A | SEEN_S0;</div><div class='add'>+			ctx-&gt;flags |= SEEN_SKB | SEEN_A;</div><div class='ctx'> 			off = offsetof(struct sk_buff, dev);</div><div class='ctx'> 			/* Load *dev pointer */</div><div class='ctx'> 			emit_load_ptr(r_s0, r_skb, off, ctx);</div><div class='hunk'>@@ -1278,7 +1154,7 @@ jmp_cmp:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_ANC | SKF_AD_VLAN_TAG:</div><div class='ctx'> 		case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:</div><div class='del'>-			ctx-&gt;flags |= SEEN_SKB | SEEN_S0 | SEEN_A;</div><div class='add'>+			ctx-&gt;flags |= SEEN_SKB | SEEN_A;</div><div class='ctx'> 			BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,</div><div class='ctx'> 						  vlan_tci) != 2);</div><div class='ctx'> 			off = offsetof(struct sk_buff, vlan_tci);</div><div class='head'>diff --git a/arch/mips/net/bpf_jit.h b/arch/mips/net/bpf_jit.h<br/>index 3a5751b4335a..8f9f54841123 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/net/bpf_jit.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/net/bpf_jit.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit.h</a></div><div class='hunk'>@@ -15,9 +15,10 @@</div><div class='ctx'> /* Registers used by JIT */</div><div class='ctx'> #define MIPS_R_ZERO	0</div><div class='ctx'> #define MIPS_R_V0	2</div><div class='del'>-#define MIPS_R_V1	3</div><div class='ctx'> #define MIPS_R_A0	4</div><div class='ctx'> #define MIPS_R_A1	5</div><div class='add'>+#define MIPS_R_T4	12</div><div class='add'>+#define MIPS_R_T5	13</div><div class='ctx'> #define MIPS_R_T6	14</div><div class='ctx'> #define MIPS_R_T7	15</div><div class='ctx'> #define MIPS_R_S0	16</div><div class='hunk'>@@ -41,4 +42,43 @@</div><div class='ctx'> #define MIPS_COND_X	(0x1 &lt;&lt; 5)</div><div class='ctx'> #define MIPS_COND_K	(0x1 &lt;&lt; 6)</div><div class='ctx'> </div><div class='add'>+#define r_ret	MIPS_R_V0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Use 2 scratch registers to avoid pipeline interlocks.</div><div class='add'>+ * There is no overhead during epilogue and prologue since</div><div class='add'>+ * any of the $s0-$s6 registers will only be preserved if</div><div class='add'>+ * they are going to actually be used.</div><div class='add'>+ */</div><div class='add'>+#define r_skb_hl	MIPS_R_S0 /* skb header length */</div><div class='add'>+#define r_skb_data	MIPS_R_S1 /* skb actual data */</div><div class='add'>+#define r_off		MIPS_R_S2</div><div class='add'>+#define r_A		MIPS_R_S3</div><div class='add'>+#define r_X		MIPS_R_S4</div><div class='add'>+#define r_skb		MIPS_R_S5</div><div class='add'>+#define r_M		MIPS_R_S6</div><div class='add'>+#define r_skb_len	MIPS_R_S7</div><div class='add'>+#define r_s0		MIPS_R_T4 /* scratch reg 1 */</div><div class='add'>+#define r_s1		MIPS_R_T5 /* scratch reg 2 */</div><div class='add'>+#define r_tmp_imm	MIPS_R_T6 /* No need to preserve this */</div><div class='add'>+#define r_tmp		MIPS_R_T7 /* No need to preserve this */</div><div class='add'>+#define r_zero		MIPS_R_ZERO</div><div class='add'>+#define r_sp		MIPS_R_SP</div><div class='add'>+#define r_ra		MIPS_R_RA</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/* Declare ASM helpers */</div><div class='add'>+</div><div class='add'>+#define DECLARE_LOAD_FUNC(func) \</div><div class='add'>+	extern u8 func(unsigned long *skb, int offset); \</div><div class='add'>+	extern u8 func##_negative(unsigned long *skb, int offset); \</div><div class='add'>+	extern u8 func##_positive(unsigned long *skb, int offset)</div><div class='add'>+</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_word);</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_half);</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_byte);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* BPF_JIT_MIPS_OP_H */</div><div class='head'>diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S<br/>new file mode 100644<br/>index 000000000000..e92726099be0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/net/bpf_jit_asm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/net/bpf_jit_asm.S</a></div><div class='hunk'>@@ -0,0 +1,238 @@</div><div class='add'>+/*</div><div class='add'>+ * bpf_jib_asm.S: Packet/header access helper functions for MIPS/MIPS64 BPF</div><div class='add'>+ * compiler.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Imagination Technologies Ltd.</div><div class='add'>+ * Author: Markos Chandras &lt;markos.chandras@imgtec.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the</div><div class='add'>+ * Free Software Foundation; version 2 of the License.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/regdef.h&gt;</div><div class='add'>+#include "bpf_jit.h"</div><div class='add'>+</div><div class='add'>+/* ABI</div><div class='add'>+ *</div><div class='add'>+ * r_skb_hl	skb header length</div><div class='add'>+ * r_skb_data	skb data</div><div class='add'>+ * r_off(a1)	offset register</div><div class='add'>+ * r_A		BPF register A</div><div class='add'>+ * r_X		PF register X</div><div class='add'>+ * r_skb(a0)	*skb</div><div class='add'>+ * r_M		*scratch memory</div><div class='add'>+ * r_skb_le	skb length</div><div class='add'>+ * r_s0		Scratch register 0</div><div class='add'>+ * r_s1		Scratch register 1</div><div class='add'>+ *</div><div class='add'>+ * On entry:</div><div class='add'>+ * a0: *skb</div><div class='add'>+ * a1: offset (imm or imm + X)</div><div class='add'>+ *</div><div class='add'>+ * All non-BPF-ABI registers are free for use. On return, we only</div><div class='add'>+ * care about r_ret. The BPF-ABI registers are assumed to remain</div><div class='add'>+ * unmodified during the entire filter operation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define skb	a0</div><div class='add'>+#define offset	a1</div><div class='add'>+#define SKF_LL_OFF  (-0x200000) /* Can't include linux/filter.h in assembly */</div><div class='add'>+</div><div class='add'>+	/* We know better :) so prevent assembler reordering etc */</div><div class='add'>+	.set 	noreorder</div><div class='add'>+</div><div class='add'>+#define is_offset_negative(TYPE)				\</div><div class='add'>+	/* If offset is negative we have more work to do */	\</div><div class='add'>+	slti	t0, offset, 0;					\</div><div class='add'>+	bgtz	t0, bpf_slow_path_##TYPE##_neg;			\</div><div class='add'>+	/* Be careful what follows in DS. */</div><div class='add'>+</div><div class='add'>+#define is_offset_in_header(SIZE, TYPE)				\</div><div class='add'>+	/* Reading from header? */				\</div><div class='add'>+	addiu	$r_s0, $r_skb_hl, -SIZE;			\</div><div class='add'>+	slt	t0, $r_s0, offset;				\</div><div class='add'>+	bgtz	t0, bpf_slow_path_##TYPE;			\</div><div class='add'>+</div><div class='add'>+LEAF(sk_load_word)</div><div class='add'>+	is_offset_negative(word)</div><div class='add'>+	.globl sk_load_word_positive</div><div class='add'>+sk_load_word_positive:</div><div class='add'>+	is_offset_in_header(4, word)</div><div class='add'>+	/* Offset within header boundaries */</div><div class='add'>+	PTR_ADDU t1, $r_skb_data, offset</div><div class='add'>+	lw	$r_A, 0(t1)</div><div class='add'>+#ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='add'>+	wsbh	t0, $r_A</div><div class='add'>+	rotr	$r_A, t0, 16</div><div class='add'>+#endif</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 move	$r_ret, zero</div><div class='add'>+	END(sk_load_word)</div><div class='add'>+</div><div class='add'>+LEAF(sk_load_half)</div><div class='add'>+	is_offset_negative(half)</div><div class='add'>+	.globl sk_load_half_positive</div><div class='add'>+sk_load_half_positive:</div><div class='add'>+	is_offset_in_header(2, half)</div><div class='add'>+	/* Offset within header boundaries */</div><div class='add'>+	PTR_ADDU t1, $r_skb_data, offset</div><div class='add'>+	lh	$r_A, 0(t1)</div><div class='add'>+#ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='add'>+	wsbh	t0, $r_A</div><div class='add'>+	seh	$r_A, t0</div><div class='add'>+#endif</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 move	$r_ret, zero</div><div class='add'>+	END(sk_load_half)</div><div class='add'>+</div><div class='add'>+LEAF(sk_load_byte)</div><div class='add'>+	is_offset_negative(byte)</div><div class='add'>+	.globl sk_load_byte_positive</div><div class='add'>+sk_load_byte_positive:</div><div class='add'>+	is_offset_in_header(1, byte)</div><div class='add'>+	/* Offset within header boundaries */</div><div class='add'>+	PTR_ADDU t1, $r_skb_data, offset</div><div class='add'>+	lb	$r_A, 0(t1)</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 move	$r_ret, zero</div><div class='add'>+	END(sk_load_byte)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * call skb_copy_bits:</div><div class='add'>+ * (prototype in linux/skbuff.h)</div><div class='add'>+ *</div><div class='add'>+ * int skb_copy_bits(sk_buff *skb, int offset, void *to, int len)</div><div class='add'>+ *</div><div class='add'>+ * o32 mandates we leave 4 spaces for argument registers in case</div><div class='add'>+ * the callee needs to use them. Even though we don't care about</div><div class='add'>+ * the argument registers ourselves, we need to allocate that space</div><div class='add'>+ * to remain ABI compliant since the callee may want to use that space.</div><div class='add'>+ * We also allocate 2 more spaces for $r_ra and our return register (*to).</div><div class='add'>+ *</div><div class='add'>+ * n64 is a bit different. The *caller* will allocate the space to preserve</div><div class='add'>+ * the arguments. So in 64-bit kernels, we allocate the 4-arg space for no</div><div class='add'>+ * good reason but it does not matter that much really.</div><div class='add'>+ *</div><div class='add'>+ * (void *to) is returned in r_s0</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#define bpf_slow_path_common(SIZE)				\</div><div class='add'>+	/* Quick check. Are we within reasonable boundaries? */ \</div><div class='add'>+	LONG_ADDIU	$r_s1, $r_skb_len, -SIZE;		\</div><div class='add'>+	sltu		$r_s0, offset, $r_s1;			\</div><div class='add'>+	beqz		$r_s0, fault;				\</div><div class='add'>+	/* Load 4th argument in DS */				\</div><div class='add'>+	 LONG_ADDIU	a3, zero, SIZE;				\</div><div class='add'>+	PTR_ADDIU	$r_sp, $r_sp, -(6 * SZREG);		\</div><div class='add'>+	PTR_LA		t0, skb_copy_bits;			\</div><div class='add'>+	PTR_S		$r_ra, (5 * SZREG)($r_sp);		\</div><div class='add'>+	/* Assign low slot to a2 */				\</div><div class='add'>+	move		a2, $r_sp;				\</div><div class='add'>+	jalr		t0;					\</div><div class='add'>+	/* Reset our destination slot (DS but it's ok) */	\</div><div class='add'>+	 INT_S		zero, (4 * SZREG)($r_sp);		\</div><div class='add'>+	/*							\</div><div class='add'>+	 * skb_copy_bits returns 0 on success and -EFAULT	\</div><div class='add'>+	 * on error. Our data live in a2. Do not bother with	\</div><div class='add'>+	 * our data if an error has been returned.		\</div><div class='add'>+	 */							\</div><div class='add'>+	/* Restore our frame */					\</div><div class='add'>+	PTR_L		$r_ra, (5 * SZREG)($r_sp);		\</div><div class='add'>+	INT_L		$r_s0, (4 * SZREG)($r_sp);		\</div><div class='add'>+	bltz		v0, fault;				\</div><div class='add'>+	 PTR_ADDIU	$r_sp, $r_sp, 6 * SZREG;		\</div><div class='add'>+	move		$r_ret, zero;				\</div><div class='add'>+</div><div class='add'>+NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_slow_path_common(4)</div><div class='add'>+#ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='add'>+	wsbh	t0, $r_s0</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 rotr	$r_A, t0, 16</div><div class='add'>+#endif</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	move	$r_A, $r_s0</div><div class='add'>+</div><div class='add'>+	END(bpf_slow_path_word)</div><div class='add'>+</div><div class='add'>+NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_slow_path_common(2)</div><div class='add'>+#ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 wsbh	$r_A, $r_s0</div><div class='add'>+#endif</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 move	$r_A, $r_s0</div><div class='add'>+</div><div class='add'>+	END(bpf_slow_path_half)</div><div class='add'>+</div><div class='add'>+NESTED(bpf_slow_path_byte, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_slow_path_common(1)</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 move	$r_A, $r_s0</div><div class='add'>+</div><div class='add'>+	END(bpf_slow_path_byte)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Negative entry points</div><div class='add'>+ */</div><div class='add'>+	.macro bpf_is_end_of_data</div><div class='add'>+	li	t0, SKF_LL_OFF</div><div class='add'>+	/* Reading link layer data? */</div><div class='add'>+	slt	t1, offset, t0</div><div class='add'>+	bgtz	t1, fault</div><div class='add'>+	/* Be careful what follows in DS. */</div><div class='add'>+	.endm</div><div class='add'>+/*</div><div class='add'>+ * call skb_copy_bits:</div><div class='add'>+ * (prototype in linux/filter.h)</div><div class='add'>+ *</div><div class='add'>+ * void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb,</div><div class='add'>+ *                                            int k, unsigned int size)</div><div class='add'>+ *</div><div class='add'>+ * see above (bpf_slow_path_common) for ABI restrictions</div><div class='add'>+ */</div><div class='add'>+#define bpf_negative_common(SIZE)					\</div><div class='add'>+	PTR_ADDIU	$r_sp, $r_sp, -(6 * SZREG);			\</div><div class='add'>+	PTR_LA		t0, bpf_internal_load_pointer_neg_helper;	\</div><div class='add'>+	PTR_S		$r_ra, (5 * SZREG)($r_sp);			\</div><div class='add'>+	jalr		t0;						\</div><div class='add'>+	 li		a2, SIZE;					\</div><div class='add'>+	PTR_L		$r_ra, (5 * SZREG)($r_sp);			\</div><div class='add'>+	/* Check return pointer */					\</div><div class='add'>+	beqz		v0, fault;					\</div><div class='add'>+	 PTR_ADDIU	$r_sp, $r_sp, 6 * SZREG;			\</div><div class='add'>+	/* Preserve our pointer */					\</div><div class='add'>+	move		$r_s0, v0;					\</div><div class='add'>+	/* Set return value */						\</div><div class='add'>+	move		$r_ret, zero;					\</div><div class='add'>+</div><div class='add'>+bpf_slow_path_word_neg:</div><div class='add'>+	bpf_is_end_of_data</div><div class='add'>+NESTED(sk_load_word_negative, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_negative_common(4)</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 lw	$r_A, 0($r_s0)</div><div class='add'>+	END(sk_load_word_negative)</div><div class='add'>+</div><div class='add'>+bpf_slow_path_half_neg:</div><div class='add'>+	bpf_is_end_of_data</div><div class='add'>+NESTED(sk_load_half_negative, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_negative_common(2)</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 lhu	$r_A, 0($r_s0)</div><div class='add'>+	END(sk_load_half_negative)</div><div class='add'>+</div><div class='add'>+bpf_slow_path_byte_neg:</div><div class='add'>+	bpf_is_end_of_data</div><div class='add'>+NESTED(sk_load_byte_negative, (6 * SZREG), $r_sp)</div><div class='add'>+	bpf_negative_common(1)</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 lbu	$r_A, 0($r_s0)</div><div class='add'>+	END(sk_load_byte_negative)</div><div class='add'>+</div><div class='add'>+fault:</div><div class='add'>+	jr	$r_ra</div><div class='add'>+	 addiu $r_ret, zero, 1</div><div class='head'>diff --git a/arch/mips/netlogic/xlr/platform-flash.c b/arch/mips/netlogic/xlr/platform-flash.c<br/>index 6d3c727e0ef8..f03131fec41d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/netlogic/xlr/platform-flash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/netlogic/xlr/platform-flash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/netlogic/xlr/platform-flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/netlogic/xlr/platform-flash.c</a></div><div class='hunk'>@@ -78,8 +78,6 @@ static struct platform_device xlr_nor_dev = {</div><div class='ctx'> 	.resource	= xlr_nor_res,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const char *xlr_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Use "gen_nand" driver for NAND flash</div><div class='ctx'>  *</div><div class='hunk'>@@ -111,7 +109,6 @@ struct platform_nand_data xlr_nand_data = {</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(xlr_nand_parts),</div><div class='ctx'> 		.chip_delay	= 50,</div><div class='ctx'> 		.partitions	= xlr_nand_parts,</div><div class='del'>-		.part_probe_types = xlr_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.cmd_ctrl	= xlr_nand_ctrl,</div><div class='head'>diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c<br/>index a138e8ee5cfc..b3ab59318d91 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/fixup-cobalt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/fixup-cobalt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/fixup-cobalt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/fixup-cobalt.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/gt64120.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c<br/>index 6b5821febc38..951d8070fb48 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/ops-mace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/ops-mace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/ops-mace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/ops-mace.c</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/ip32/mace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #if 0</div><div class='head'>diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c<br/>index 07a18228e63a..f8d0acb4f973 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-ar2315.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/pci-ar2315.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-ar2315.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar2315.c</a></div><div class='hunk'>@@ -320,7 +320,7 @@ static int ar2315_pci_host_setup(struct ar2315_pci_ctrl *apc)</div><div class='ctx'> </div><div class='ctx'> static void ar2315_pci_irq_handler(unsigned irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ar2315_pci_ctrl *apc = irq_get_handler_data(irq);</div><div class='add'>+	struct ar2315_pci_ctrl *apc = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	u32 pending = ar2315_pci_reg_read(apc, AR2315_PCI_ISR) &amp;</div><div class='ctx'> 		      ar2315_pci_reg_read(apc, AR2315_PCI_IMR);</div><div class='ctx'> 	unsigned pci_irq = 0;</div><div class='hunk'>@@ -384,8 +384,8 @@ static void ar2315_pci_irq_init(struct ar2315_pci_ctrl *apc)</div><div class='ctx'> </div><div class='ctx'> 	apc-&gt;irq_ext = irq_create_mapping(apc-&gt;domain, AR2315_PCI_IRQ_EXT);</div><div class='ctx'> </div><div class='del'>-	irq_set_chained_handler(apc-&gt;irq, ar2315_pci_irq_handler);</div><div class='del'>-	irq_set_handler_data(apc-&gt;irq, apc);</div><div class='add'>+	irq_set_chained_handler_and_data(apc-&gt;irq, ar2315_pci_irq_handler,</div><div class='add'>+					 apc);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending Abort or external Interrupts</div><div class='ctx'> 	 * and enable interrupt processing */</div><div class='head'>diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c<br/>index 9e62ad31d4b5..283157f8dc64 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-ar71xx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/pci-ar71xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-ar71xx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar71xx.c</a></div><div class='hunk'>@@ -232,7 +232,7 @@ static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	void __iomem *base = ath79_reset_base;</div><div class='ctx'> 	u32 pending;</div><div class='ctx'> </div><div class='del'>-	apc = irq_get_handler_data(irq);</div><div class='add'>+	apc = irq_desc_get_handler_data(desc);</div><div class='ctx'> </div><div class='ctx'> 	pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &amp;</div><div class='ctx'> 		  __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='hunk'>@@ -318,23 +318,13 @@ static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)</div><div class='ctx'> </div><div class='ctx'> static void ar71xx_pci_reset(void)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *ddr_base = ath79_ddr_base;</div><div class='del'>-</div><div class='ctx'> 	ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);</div><div class='ctx'> 	mdelay(100);</div><div class='ctx'> </div><div class='ctx'> 	ath79_device_reset_clear(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);</div><div class='ctx'> 	mdelay(100);</div><div class='ctx'> </div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN0_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN0);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN1_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN1);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN2_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN2);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN3_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN3);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN4_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN4);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN5_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN5);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN6_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN6);</div><div class='del'>-	__raw_writel(AR71XX_PCI_WIN7_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN7);</div><div class='del'>-</div><div class='add'>+	ath79_ddr_set_pci_windows();</div><div class='ctx'> 	mdelay(100);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c<br/>index a1b7d2a1b0d5..0af362b5af92 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-ar724x.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/pci-ar724x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-ar724x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-ar724x.c</a></div><div class='hunk'>@@ -231,7 +231,7 @@ static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	u32 pending;</div><div class='ctx'> </div><div class='del'>-	apc = irq_get_handler_data(irq);</div><div class='add'>+	apc = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	base = apc-&gt;ctrl_base;</div><div class='ctx'> </div><div class='ctx'> 	pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &amp;</div><div class='head'>diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c<br/>index 8b117e638306..c5347d99cf3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-lantiq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/pci-lantiq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-lantiq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-lantiq.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_pci.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/gpio.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c<br/>index ec9be8ca4ada..80fafe646e74 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-rt3883.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pci/pci-rt3883.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-rt3883.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pci/pci-rt3883.c</a></div><div class='hunk'>@@ -134,7 +134,7 @@ static void rt3883_pci_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	struct rt3883_pci_controller *rpc;</div><div class='ctx'> 	u32 pending;</div><div class='ctx'> </div><div class='del'>-	rpc = irq_get_handler_data(irq);</div><div class='add'>+	rpc = irq_desc_get_handler_data(desc);</div><div class='ctx'> </div><div class='ctx'> 	pending = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIINT) &amp;</div><div class='ctx'> 		  rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);</div><div class='head'>diff --git a/arch/mips/pistachio/init.c b/arch/mips/pistachio/init.c<br/>index d2dc836523a3..8bd8ebb20a72 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pistachio/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pistachio/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pistachio/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pistachio/init.c</a></div><div class='hunk'>@@ -63,13 +63,19 @@ void __init plat_mem_setup(void)</div><div class='ctx'> 	plat_setup_iocoherency();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define DEFAULT_CPC_BASE_ADDR 0x1bde0000</div><div class='add'>+#define DEFAULT_CPC_BASE_ADDR	0x1bde0000</div><div class='add'>+#define DEFAULT_CDMM_BASE_ADDR	0x1bdd0000</div><div class='ctx'> </div><div class='ctx'> phys_addr_t mips_cpc_default_phys_base(void)</div><div class='ctx'> {</div><div class='ctx'> 	return DEFAULT_CPC_BASE_ADDR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+phys_addr_t mips_cdmm_phys_base(void)</div><div class='add'>+{</div><div class='add'>+	return DEFAULT_CDMM_BASE_ADDR;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init mips_nmi_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *base;</div><div class='head'>diff --git a/arch/mips/pistachio/time.c b/arch/mips/pistachio/time.c<br/>index 67889fcea8aa..7c73fcb92a10 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pistachio/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/pistachio/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pistachio/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/pistachio/time.c</a></div><div class='hunk'>@@ -27,6 +27,11 @@ int get_c0_perfcount_int(void)</div><div class='ctx'> 	return gic_get_c0_perfcount_int();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int get_c0_fdc_int(void)</div><div class='add'>+{</div><div class='add'>+	return gic_get_c0_fdc_int();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init plat_time_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='head'>diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c<br/>index 7cf91b92e9d1..53707aacc0f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ralink/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/ralink/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ralink/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/ralink/irq.c</a></div><div class='hunk'>@@ -100,7 +100,7 @@ static void ralink_intc_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	u32 pending = rt_intc_r32(INTC_REG_STATUS0);</div><div class='ctx'> </div><div class='ctx'> 	if (pending) {</div><div class='del'>-		struct irq_domain *domain = irq_get_handler_data(irq);</div><div class='add'>+		struct irq_domain *domain = irq_desc_get_handler_data(desc);</div><div class='ctx'> 		generic_handle_irq(irq_find_mapping(domain, __ffs(pending)));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		spurious_interrupt();</div><div class='hunk'>@@ -184,8 +184,7 @@ static int __init intc_of_init(struct device_node *node,</div><div class='ctx'> </div><div class='ctx'> 	rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE);</div><div class='ctx'> </div><div class='del'>-	irq_set_chained_handler(irq, ralink_intc_irq_handler);</div><div class='del'>-	irq_set_handler_data(irq, domain);</div><div class='add'>+	irq_set_chained_handler_and_data(irq, ralink_intc_irq_handler, domain);</div><div class='ctx'> </div><div class='ctx'> 	/* tell the kernel which irq is used for performance monitoring */</div><div class='ctx'> 	rt_perfcount_irq = irq_create_mapping(domain, 9);</div><div class='head'>diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile<br/>index da8f6816d346..ab4affa626c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sgi-ip27/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/sgi-ip27/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sgi-ip27/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sgi-ip27/Makefile</a></div><div class='hunk'>@@ -2,9 +2,9 @@</div><div class='ctx'> # Makefile for the IP27 specific kernel interface routines under Linux.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-y	:= ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \</div><div class='del'>-	   ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o ip27-hubio.o \</div><div class='del'>-	   ip27-xtalk.o</div><div class='add'>+obj-y	:= ip27-berr.o ip27-irq.o ip27-irqno.o ip27-init.o ip27-klconfig.o \</div><div class='add'>+	   ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o \</div><div class='add'>+	   ip27-hubio.o ip27-xtalk.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK)	+= ip27-console.o</div><div class='ctx'> obj-$(CONFIG_PCI)		+= ip27-irq-pci.o</div><div class='head'>diff --git a/arch/mips/sgi-ip27/ip27-irqno.c b/arch/mips/sgi-ip27/ip27-irqno.c<br/>new file mode 100644<br/>index 000000000000..957ab58e1c00<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/sgi-ip27/ip27-irqno.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sgi-ip27/ip27-irqno.c</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='add'>+</div><div class='add'>+static DECLARE_BITMAP(irq_map, NR_IRQS);</div><div class='add'>+</div><div class='add'>+int allocate_irqno(void)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+again:</div><div class='add'>+	irq = find_first_zero_bit(irq_map, NR_IRQS);</div><div class='add'>+</div><div class='add'>+	if (irq &gt;= NR_IRQS)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit(irq, irq_map))</div><div class='add'>+		goto again;</div><div class='add'>+</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Allocate the 16 legacy interrupts for i8259 devices.	 This happens early</div><div class='add'>+ * in the kernel initialization so treating allocation failure as BUG() is</div><div class='add'>+ * ok.</div><div class='add'>+ */</div><div class='add'>+void __init alloc_legacy_irqno(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= 16; i++)</div><div class='add'>+		BUG_ON(test_and_set_bit(i, irq_map));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void free_irqno(unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	smp_mb__before_atomic();</div><div class='add'>+	clear_bit(irq, irq_map);</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig<br/>index 5fbd3605d24f..cb9a095f5c5e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sibyte/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/sibyte/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sibyte/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/Kconfig</a></div><div class='hunk'>@@ -3,7 +3,7 @@ config SIBYTE_SB1250</div><div class='ctx'> 	select CEVT_SB1250</div><div class='ctx'> 	select CSRC_SB1250</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_ENABLE_LDT_IF_PCI</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='hunk'>@@ -13,7 +13,7 @@ config SIBYTE_BCM1120</div><div class='ctx'> 	bool</div><div class='ctx'> 	select CEVT_SB1250</div><div class='ctx'> 	select CSRC_SB1250</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_BCM112X</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='hunk'>@@ -23,7 +23,7 @@ config SIBYTE_BCM1125</div><div class='ctx'> 	select CEVT_SB1250</div><div class='ctx'> 	select CSRC_SB1250</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_BCM112X</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='hunk'>@@ -33,7 +33,7 @@ config SIBYTE_BCM1125H</div><div class='ctx'> 	select CEVT_SB1250</div><div class='ctx'> 	select CSRC_SB1250</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_BCM112X</div><div class='ctx'> 	select SIBYTE_ENABLE_LDT_IF_PCI</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='hunk'>@@ -43,7 +43,7 @@ config SIBYTE_BCM112X</div><div class='ctx'> 	bool</div><div class='ctx'> 	select CEVT_SB1250</div><div class='ctx'> 	select CSRC_SB1250</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> </div><div class='hunk'>@@ -52,7 +52,7 @@ config SIBYTE_BCM1x80</div><div class='ctx'> 	select CEVT_BCM1480</div><div class='ctx'> 	select CSRC_BCM1480</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='ctx'> 	select SYS_SUPPORTS_SMP</div><div class='hunk'>@@ -62,7 +62,7 @@ config SIBYTE_BCM1x55</div><div class='ctx'> 	select CEVT_BCM1480</div><div class='ctx'> 	select CSRC_BCM1480</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SIBYTE_SB1xxx_SOC</div><div class='ctx'> 	select SIBYTE_HAS_ZBUS_PROFILING</div><div class='ctx'> 	select SYS_SUPPORTS_SMP</div><div class='hunk'>@@ -70,7 +70,7 @@ config SIBYTE_BCM1x55</div><div class='ctx'> config SIBYTE_SB1xxx_SOC</div><div class='ctx'> 	bool</div><div class='ctx'> 	select DMA_COHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_64BIT_KERNEL</div><div class='hunk'>@@ -81,11 +81,6 @@ choice</div><div class='ctx'> 	prompt "SiByte SOC Stepping"</div><div class='ctx'> 	depends on SIBYTE_SB1xxx_SOC</div><div class='ctx'> </div><div class='del'>-config CPU_SB1_PASS_1</div><div class='del'>-	bool "1250 Pass1"</div><div class='del'>-	depends on SIBYTE_SB1250</div><div class='del'>-	select CPU_HAS_PREFETCH</div><div class='del'>-</div><div class='ctx'> config CPU_SB1_PASS_2_1250</div><div class='ctx'> 	bool "1250 An"</div><div class='ctx'> 	depends on SIBYTE_SB1250</div><div class='head'>diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c<br/>index 5581844c9194..41a1d2242211 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sibyte/common/bus_watcher.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/sibyte/common/bus_watcher.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sibyte/common/bus_watcher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/common/bus_watcher.c</a></div><div class='hunk'>@@ -81,10 +81,7 @@ void check_bus_watcher(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 status, l2_err, memio_err;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS</div><div class='del'>-	/* Destructive read, clears register and interrupt */</div><div class='del'>-	status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));</div><div class='del'>-#elif defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)</div><div class='add'>+#if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)</div><div class='ctx'> 	/* Use non-destructive register */</div><div class='ctx'> 	status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG));</div><div class='ctx'> #elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)</div><div class='head'>diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c<br/>index 3c02b2a77ae9..9d3c24efdf4a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sibyte/sb1250/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/sibyte/sb1250/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sibyte/sb1250/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/sibyte/sb1250/setup.c</a></div><div class='hunk'>@@ -202,12 +202,10 @@ void __init sb1250_setup(void)</div><div class='ctx'> </div><div class='ctx'> 	switch (war_pass) {</div><div class='ctx'> 	case K_SYS_REVISION_BCM1250_PASS1:</div><div class='del'>-#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS</div><div class='ctx'> 		printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "</div><div class='ctx'> 			    "and the kernel doesn't have the proper "</div><div class='ctx'> 			    "workarounds compiled in. @@@@\n");</div><div class='ctx'> 		bad_config = 1;</div><div class='del'>-#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case K_SYS_REVISION_BCM1250_PASS2:</div><div class='ctx'> 		/* Pass 2 - easiest as default for now - so many numbers */</div><div class='head'>diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig<br/>index 6d40bc783459..8c337d60f790 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/txx9/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/txx9/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/txx9/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/txx9/Kconfig</a></div><div class='hunk'>@@ -8,7 +8,7 @@ config MACH_TX49XX</div><div class='ctx'> 	select MACH_TXX9</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select SYS_HAS_CPU_TX49XX</div><div class='ctx'> 	select SYS_SUPPORTS_64BIT_KERNEL</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig<br/>index c1be6b37fb2a..74927b4d4f0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/vr41xx/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mips/vr41xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/vr41xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mips/vr41xx/Kconfig</a></div><div class='hunk'>@@ -8,7 +8,7 @@ config CASIO_E55</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ISA</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='hunk'>@@ -18,7 +18,7 @@ config IBM_WORKPAD</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select ISA</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='hunk'>@@ -28,7 +28,7 @@ config TANBAC_TB022X</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='ctx'> 	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='hunk'>@@ -44,7 +44,7 @@ config VICTOR_MPC30X</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select PCI_VR41XX</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='hunk'>@@ -55,7 +55,7 @@ config ZAO_CAPCELLA</div><div class='ctx'> 	select CEVT_R4K</div><div class='ctx'> 	select CSRC_R4K</div><div class='ctx'> 	select DMA_NONCOHERENT</div><div class='del'>-	select IRQ_CPU</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='ctx'> 	select PCI_VR41XX</div><div class='ctx'> 	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='head'>diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild<br/>index f892d9de47d9..6edb9ee6128e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/Kbuild</a></div><div class='hunk'>@@ -5,7 +5,7 @@ generic-y += cputime.h</div><div class='ctx'> generic-y += exec.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/mn10300/include/asm/highmem.h b/arch/mn10300/include/asm/highmem.h<br/>index 2fbbe4d920aa..1ddea5afba09 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/highmem.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/include/asm/highmem.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/highmem.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/highmem.h</a></div><div class='hunk'>@@ -75,6 +75,7 @@ static inline void *kmap_atomic(struct page *page)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (page &lt; highmem_start_page)</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -98,6 +99,7 @@ static inline void __kunmap_atomic(unsigned long vaddr)</div><div class='ctx'> </div><div class='ctx'> 	if (vaddr &lt; FIXADDR_START) { /* FIXME */</div><div class='ctx'> 		pagefault_enable();</div><div class='add'>+		preempt_enable();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -122,6 +124,7 @@ static inline void __kunmap_atomic(unsigned long vaddr)</div><div class='ctx'> </div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h<br/>index cc4a2ba9e228..07c5b4a3903b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/io.h</a></div><div class='hunk'>@@ -282,6 +282,7 @@ static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc ioremap_nocache</div><div class='add'>+#define ioremap_wt ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> static inline void iounmap(void __iomem *addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h<br/>index 5f70af25c7d0..be3debb8fc02 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/pci.h</a></div><div class='hunk'>@@ -55,7 +55,7 @@ void pcibios_set_master(struct pci_dev *dev);</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -83,19 +83,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'> /* implement the pci_ DMA API in terms of the generic device dma_ one */</div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline struct resource *</div><div class='del'>-pcibios_select_root(struct pci_dev *pdev, struct resource *res)</div><div class='del'>-{</div><div class='del'>-	struct resource *root = NULL;</div><div class='del'>-</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_IO)</div><div class='del'>-		root = &amp;ioport_resource;</div><div class='del'>-	if (res-&gt;flags &amp; IORESOURCE_MEM)</div><div class='del'>-		root = &amp;iomem_resource;</div><div class='del'>-</div><div class='del'>-	return root;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return channel ? 15 : 14;</div><div class='head'>diff --git a/arch/mn10300/include/asm/serial.h b/arch/mn10300/include/asm/serial.h<br/>index 23a799293599..c1990218f18c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/include/asm/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/include/asm/serial.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #define _ASM_SERIAL_H</div><div class='ctx'> </div><div class='ctx'> /* Standard COM flags (except for COM4, because of the 8514 problem) */</div><div class='del'>-#ifdef CONFIG_SERIAL_DETECT_IRQ</div><div class='add'>+#ifdef CONFIG_SERIAL_8250_DETECT_IRQ</div><div class='ctx'> #define STD_COM_FLAGS	(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)</div><div class='ctx'> #define STD_COM4_FLAGS	(ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)</div><div class='ctx'> #else</div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #define STD_COM4_FLAGS	ASYNC_BOOT_AUTOCONF</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SERIAL_MANY_PORTS</div><div class='add'>+#ifdef CONFIG_SERIAL_8250_MANY_PORTS</div><div class='ctx'> #define FOURPORT_FLAGS	ASYNC_FOURPORT</div><div class='ctx'> #define ACCENT_FLAGS	0</div><div class='ctx'> #define BOCA_FLAGS	0</div><div class='head'>diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c<br/>index 6ab3b73efcf8..480de70f4059 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/kernel/irq.c</a></div><div class='hunk'>@@ -320,11 +320,11 @@ void migrate_irqs(void)</div><div class='ctx'> 		if (irqd_is_per_cpu(data))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (cpumask_test_cpu(self, &amp;data-&gt;affinity) &amp;&amp;</div><div class='add'>+		if (cpumask_test_cpu(self, data-&gt;affinity) &amp;&amp;</div><div class='ctx'> 		    !cpumask_intersects(&amp;irq_affinity[irq], cpu_online_mask)) {</div><div class='ctx'> 			int cpu_id;</div><div class='ctx'> 			cpu_id = cpumask_first(cpu_online_mask);</div><div class='del'>-			cpumask_set_cpu(cpu_id, &amp;data-&gt;affinity);</div><div class='add'>+			cpumask_set_cpu(cpu_id, data-&gt;affinity);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* We need to operate irq_affinity_online atomically. */</div><div class='ctx'> 		arch_local_cli_save(flags);</div><div class='hunk'>@@ -335,7 +335,7 @@ void migrate_irqs(void)</div><div class='ctx'> 			GxICR(irq) = x &amp; GxICR_LEVEL;</div><div class='ctx'> 			tmp = GxICR(irq);</div><div class='ctx'> </div><div class='del'>-			new = cpumask_any_and(&amp;data-&gt;affinity,</div><div class='add'>+			new = cpumask_any_and(data-&gt;affinity,</div><div class='ctx'> 					      cpu_online_mask);</div><div class='ctx'> 			irq_affinity_online[irq] = new;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c<br/>index 0c2cc5d39c8e..4a1d181ed32f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/mm/fault.c</a></div><div class='hunk'>@@ -23,8 +23,8 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/vt_kern.h&gt;		/* For unblank_screen() */</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/cpu-regs.h&gt;</div><div class='hunk'>@@ -168,7 +168,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long fault_code,</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if ((fault_code &amp; MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR)</div><div class='head'>diff --git a/arch/mn10300/unit-asb2303/flash.c b/arch/mn10300/unit-asb2303/flash.c<br/>index 17fe083fcb6f..b03d8738d67c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/unit-asb2303/flash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/mn10300/unit-asb2303/flash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/unit-asb2303/flash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/mn10300/unit-asb2303/flash.c</a></div><div class='hunk'>@@ -96,5 +96,4 @@ static int __init asb2303_mtd_init(void)</div><div class='ctx'> 	platform_device_register(&amp;asb2303_sysflash);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(asb2303_mtd_init);</div><div class='add'>+device_initcall(asb2303_mtd_init);</div><div class='head'>diff --git a/arch/nios2/include/asm/Kbuild b/arch/nios2/include/asm/Kbuild<br/>index 24b3d8999ac7..914864eb5a25 100644<br/>--- a/<a href='/drm-misc/tree/arch/nios2/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/nios2/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/nios2/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/include/asm/Kbuild</a></div><div class='hunk'>@@ -30,6 +30,7 @@ generic-y += kmap_types.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='hunk'>@@ -40,7 +41,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='head'>diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h<br/>index 6e24d7cceb0c..c5a62da22cd2 100644<br/>--- a/<a href='/drm-misc/tree/arch/nios2/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/nios2/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/nios2/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/include/asm/io.h</a></div><div class='hunk'>@@ -46,6 +46,7 @@ static inline void iounmap(void __iomem *addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc ioremap_nocache</div><div class='add'>+#define ioremap_wt ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> /* Pages to physical address... */</div><div class='ctx'> #define page_to_phys(page)	virt_to_phys(page_to_virt(page))</div><div class='head'>diff --git a/arch/nios2/kernel/time.c b/arch/nios2/kernel/time.c<br/>index 7f4547418ee1..9e3cc8a40ee9 100644<br/>--- a/<a href='/drm-misc/tree/arch/nios2/kernel/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/nios2/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/nios2/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/kernel/time.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='hunk'>@@ -18,7 +19,9 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#define ALTERA_TIMER_STATUS_REG		0</div><div class='add'>+#define ALTR_TIMER_COMPATIBLE		"altr,timer-1.0"</div><div class='add'>+</div><div class='add'>+#define ALTERA_TIMER_STATUS_REG	0</div><div class='ctx'> #define ALTERA_TIMER_CONTROL_REG	4</div><div class='ctx'> #define ALTERA_TIMER_PERIODL_REG	8</div><div class='ctx'> #define ALTERA_TIMER_PERIODH_REG	12</div><div class='hunk'>@@ -106,6 +109,7 @@ cycles_t get_cycles(void)</div><div class='ctx'> {</div><div class='ctx'> 	return nios2_timer_read(&amp;nios2_cs.cs);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(get_cycles);</div><div class='ctx'> </div><div class='ctx'> static void nios2_timer_start(struct nios2_timer *timer)</div><div class='ctx'> {</div><div class='hunk'>@@ -302,7 +306,16 @@ void read_persistent_clock(struct timespec *ts)</div><div class='ctx'> </div><div class='ctx'> void __init time_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	for_each_compatible_node(np, NULL,  ALTR_TIMER_COMPATIBLE)</div><div class='add'>+		count++;</div><div class='add'>+</div><div class='add'>+	if (count &lt; 2)</div><div class='add'>+		panic("%d timer is found, it needs 2 timers in system\n", count);</div><div class='add'>+</div><div class='ctx'> 	clocksource_of_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-CLOCKSOURCE_OF_DECLARE(nios2_timer, "altr,timer-1.0", nios2_time_init);</div><div class='add'>+CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);</div><div class='head'>diff --git a/arch/nios2/mm/fault.c b/arch/nios2/mm/fault.c<br/>index 0c9b6afe69e9..b51878b0c6b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/nios2/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/nios2/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/nios2/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/nios2/mm/fault.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long cause,</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig<br/>index e5a693b16da2..443f44de1020 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/openrisc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/openrisc/Kconfig</a></div><div class='hunk'>@@ -17,6 +17,7 @@ config OPENRISC</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='add'>+	select HAVE_UID16</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GENERIC_STRNCPY_FROM_USER</div><div class='hunk'>@@ -31,9 +32,6 @@ config MMU</div><div class='ctx'> config HAVE_DMA_ATTRS</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config UID16</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild<br/>index 91f1f360a7c4..2832f031fb11 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/openrisc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/openrisc/include/asm/Kbuild</a></div><div class='hunk'>@@ -36,6 +36,7 @@ generic-y += kmap_types.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='hunk'>@@ -45,7 +46,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='head'>diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild<br/>index 7a4bcc36303d..f9b3a81aefcd 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/Kbuild</a></div><div class='hunk'>@@ -15,12 +15,12 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += param.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += poll.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += seccomp.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += topology.h</div><div class='head'>diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h<br/>index de65f66ea64e..ec2df4bab302 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/cacheflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -142,6 +142,7 @@ static inline void kunmap(struct page *page)</div><div class='ctx'> </div><div class='ctx'> static inline void *kmap_atomic(struct page *page)</div><div class='ctx'> {</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	return page_address(page);</div><div class='ctx'> }</div><div class='hunk'>@@ -150,6 +151,7 @@ static inline void __kunmap_atomic(void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	flush_kernel_dcache_page_addr(addr);</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define kmap_atomic_prot(page, prot)	kmap_atomic(page)</div><div class='head'>diff --git a/arch/parisc/include/asm/cmpxchg.h b/arch/parisc/include/asm/cmpxchg.h<br/>index dbd13354ec41..0a90b965cccb 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -46,8 +46,6 @@ __xchg(unsigned long x, __volatile__ void *ptr, int size)</div><div class='ctx'> #define xchg(ptr, x) \</div><div class='ctx'> 	((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='del'>-</div><div class='ctx'> /* bug catcher for when unsupported size is used - won't link */</div><div class='ctx'> extern void __cmpxchg_called_with_bad_pointer(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/dma-mapping.h b/arch/parisc/include/asm/dma-mapping.h<br/>index d0eae5f2bd87..d8d60a57183f 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> #define _PARISC_DMA_MAPPING_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* See Documentation/DMA-API-HOWTO.txt */</div><div class='ctx'> struct hppa_dma_ops {</div><div class='head'>diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h<br/>index 20df2b04fc09..71889ea72740 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pci.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #ifndef __ASM_PARISC_PCI_H</div><div class='ctx'> #define __ASM_PARISC_PCI_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -196,25 +196,6 @@ static inline void pcibios_register_hba(struct pci_hba_data *x)</div><div class='ctx'> /* export the pci_ DMA API in terms of the dma_ one */</div><div class='ctx'> #include &lt;asm-generic/pci-dma-compat.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = 1024;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = (int) byte * 4;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_MULTIPLE;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return channel ? 15 : 14;</div><div class='head'>diff --git a/arch/parisc/include/asm/pgalloc.h b/arch/parisc/include/asm/pgalloc.h<br/>index 3a08eae3318f..3edbb9fc91b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/pgalloc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/pgalloc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/pgalloc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)</div><div class='ctx'> {</div><div class='del'>-	if(pmd_flag(*pmd) &amp; PxD_FLAG_ATTACHED)</div><div class='add'>+	if (pmd_flag(*pmd) &amp; PxD_FLAG_ATTACHED) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This is the permanent pmd attached to the pgd;</div><div class='ctx'> 		 * cannot free it.</div><div class='hunk'>@@ -81,6 +81,7 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)</div><div class='ctx'> 		 */</div><div class='ctx'> 		mm_inc_nr_pmds(mm);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> 	free_pages((unsigned long)pmd, PMD_ORDER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h<br/>index 0a183756d6ec..f93c4a4e6580 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> </div><div class='del'>-extern spinlock_t pa_dbit_lock;</div><div class='add'>+extern spinlock_t pa_tlb_lock;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel</div><div class='hunk'>@@ -33,6 +33,19 @@ extern spinlock_t pa_dbit_lock;</div><div class='ctx'>  */</div><div class='ctx'> #define kern_addr_valid(addr)	(1)</div><div class='ctx'> </div><div class='add'>+/* Purge data and instruction TLB entries.  Must be called holding</div><div class='add'>+ * the pa_tlb_lock.  The TLB purge instructions are slow on SMP</div><div class='add'>+ * machines since the purge must be broadcast to all CPUs.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	mtsp(mm-&gt;context, 1);</div><div class='add'>+	pdtlb(addr);</div><div class='add'>+	if (unlikely(split_tlb))</div><div class='add'>+		pitlb(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Certain architectures need to do special things when PTEs</div><div class='ctx'>  * within a page table are directly modified.  Thus, the following</div><div class='ctx'>  * hook is made available.</div><div class='hunk'>@@ -42,15 +55,20 @@ extern spinlock_t pa_dbit_lock;</div><div class='ctx'>                 *(pteptr) = (pteval);                           \</div><div class='ctx'>         } while(0)</div><div class='ctx'> </div><div class='del'>-extern void purge_tlb_entries(struct mm_struct *, unsigned long);</div><div class='add'>+#define pte_inserted(x)						\</div><div class='add'>+	((pte_val(x) &amp; (_PAGE_PRESENT|_PAGE_ACCESSED))		\</div><div class='add'>+	 == (_PAGE_PRESENT|_PAGE_ACCESSED))</div><div class='ctx'> </div><div class='del'>-#define set_pte_at(mm, addr, ptep, pteval)                      \</div><div class='del'>-	do {                                                    \</div><div class='add'>+#define set_pte_at(mm, addr, ptep, pteval)			\</div><div class='add'>+	do {							\</div><div class='add'>+		pte_t old_pte;					\</div><div class='ctx'> 		unsigned long flags;				\</div><div class='del'>-		spin_lock_irqsave(&amp;pa_dbit_lock, flags);	\</div><div class='del'>-		set_pte(ptep, pteval);                          \</div><div class='del'>-		purge_tlb_entries(mm, addr);                    \</div><div class='del'>-		spin_unlock_irqrestore(&amp;pa_dbit_lock, flags);	\</div><div class='add'>+		spin_lock_irqsave(&amp;pa_tlb_lock, flags);		\</div><div class='add'>+		old_pte = *ptep;				\</div><div class='add'>+		set_pte(ptep, pteval);				\</div><div class='add'>+		if (pte_inserted(old_pte))			\</div><div class='add'>+			purge_tlb_entries(mm, addr);		\</div><div class='add'>+		spin_unlock_irqrestore(&amp;pa_tlb_lock, flags);	\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='hunk'>@@ -268,7 +286,7 @@ extern unsigned long *empty_zero_page;</div><div class='ctx'> </div><div class='ctx'> #define pte_none(x)     (pte_val(x) == 0)</div><div class='ctx'> #define pte_present(x)	(pte_val(x) &amp; _PAGE_PRESENT)</div><div class='del'>-#define pte_clear(mm,addr,xp)	do { pte_val(*(xp)) = 0; } while (0)</div><div class='add'>+#define pte_clear(mm, addr, xp)  set_pte_at(mm, addr, xp, __pte(0))</div><div class='ctx'> </div><div class='ctx'> #define pmd_flag(x)	(pmd_val(x) &amp; PxD_FLAG_MASK)</div><div class='ctx'> #define pmd_address(x)	((unsigned long)(pmd_val(x) &amp;~ PxD_FLAG_MASK) &lt;&lt; PxD_VALUE_SHIFT)</div><div class='hunk'>@@ -435,15 +453,15 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned</div><div class='ctx'> 	if (!pte_young(*ptep))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;pa_dbit_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;pa_tlb_lock, flags);</div><div class='ctx'> 	pte = *ptep;</div><div class='ctx'> 	if (!pte_young(pte)) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;pa_dbit_lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;pa_tlb_lock, flags);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	set_pte(ptep, pte_mkold(pte));</div><div class='ctx'> 	purge_tlb_entries(vma-&gt;vm_mm, addr);</div><div class='del'>-	spin_unlock_irqrestore(&amp;pa_dbit_lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pa_tlb_lock, flags);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -453,11 +471,12 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 	pte_t old_pte;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;pa_dbit_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;pa_tlb_lock, flags);</div><div class='ctx'> 	old_pte = *ptep;</div><div class='del'>-	pte_clear(mm,addr,ptep);</div><div class='del'>-	purge_tlb_entries(mm, addr);</div><div class='del'>-	spin_unlock_irqrestore(&amp;pa_dbit_lock, flags);</div><div class='add'>+	set_pte(ptep, __pte(0));</div><div class='add'>+	if (pte_inserted(old_pte))</div><div class='add'>+		purge_tlb_entries(mm, addr);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pa_tlb_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return old_pte;</div><div class='ctx'> }</div><div class='hunk'>@@ -465,10 +484,10 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	spin_lock_irqsave(&amp;pa_dbit_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;pa_tlb_lock, flags);</div><div class='ctx'> 	set_pte(ptep, pte_wrprotect(*ptep));</div><div class='ctx'> 	purge_tlb_entries(mm, addr);</div><div class='del'>-	spin_unlock_irqrestore(&amp;pa_dbit_lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pa_tlb_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define pte_same(A,B)	(pte_val(A) == pte_val(B))</div><div class='head'>diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h<br/>index 9d086a599fa0..e84b96478193 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/tlbflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/tlbflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -13,6 +13,9 @@</div><div class='ctx'>  * active at any one time on the Merced bus.  This tlb purge</div><div class='ctx'>  * synchronisation is fairly lightweight and harmless so we activate</div><div class='ctx'>  * it on all systems not just the N class.</div><div class='add'>+</div><div class='add'>+ * It is also used to ensure PTE updates are atomic and consistent</div><div class='add'>+ * with the TLB.</div><div class='ctx'>  */</div><div class='ctx'> extern spinlock_t pa_tlb_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -24,20 +27,24 @@ extern void flush_tlb_all_local(void *);</div><div class='ctx'> </div><div class='ctx'> #define smp_flush_tlb_all()	flush_tlb_all()</div><div class='ctx'> </div><div class='add'>+int __flush_tlb_range(unsigned long sid,</div><div class='add'>+	unsigned long start, unsigned long end);</div><div class='add'>+</div><div class='add'>+#define flush_tlb_range(vma, start, end) \</div><div class='add'>+	__flush_tlb_range((vma)-&gt;vm_mm-&gt;context, start, end)</div><div class='add'>+</div><div class='add'>+#define flush_tlb_kernel_range(start, end) \</div><div class='add'>+	__flush_tlb_range(0, start, end)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * flush_tlb_mm()</div><div class='ctx'>  *</div><div class='del'>- * XXX This code is NOT valid for HP-UX compatibility processes,</div><div class='del'>- * (although it will probably work 99% of the time). HP-UX</div><div class='del'>- * processes are free to play with the space id's and save them</div><div class='del'>- * over long periods of time, etc. so we have to preserve the</div><div class='del'>- * space and just flush the entire tlb. We need to check the</div><div class='del'>- * personality in order to do that, but the personality is not</div><div class='del'>- * currently being set correctly.</div><div class='del'>- *</div><div class='del'>- * Of course, Linux processes could do the same thing, but</div><div class='del'>- * we don't support that (and the compilers, dynamic linker,</div><div class='del'>- * etc. do not do that).</div><div class='add'>+ * The code to switch to a new context is NOT valid for processes</div><div class='add'>+ * which play with the space id's.  Thus, we have to preserve the</div><div class='add'>+ * space and just flush the entire tlb.  However, the compilers,</div><div class='add'>+ * dynamic linker, etc, do not manipulate space id's, so there</div><div class='add'>+ * could be a significant performance benefit in switching contexts</div><div class='add'>+ * and not flushing the whole tlb.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static inline void flush_tlb_mm(struct mm_struct *mm)</div><div class='hunk'>@@ -45,10 +52,18 @@ static inline void flush_tlb_mm(struct mm_struct *mm)</div><div class='ctx'> 	BUG_ON(mm == &amp;init_mm); /* Should never happen */</div><div class='ctx'> </div><div class='ctx'> #if 1 || defined(CONFIG_SMP)</div><div class='add'>+	/* Except for very small threads, flushing the whole TLB is</div><div class='add'>+	 * faster than using __flush_tlb_range.  The pdtlb and pitlb</div><div class='add'>+	 * instructions are very slow because of the TLB broadcast.</div><div class='add'>+	 * It might be faster to do local range flushes on all CPUs</div><div class='add'>+	 * on PA 2.0 systems.</div><div class='add'>+	 */</div><div class='ctx'> 	flush_tlb_all();</div><div class='ctx'> #else</div><div class='ctx'> 	/* FIXME: currently broken, causing space id and protection ids</div><div class='del'>-	 *  to go out of sync, resulting in faults on userspace accesses.</div><div class='add'>+	 * to go out of sync, resulting in faults on userspace accesses.</div><div class='add'>+	 * This approach needs further investigation since running many</div><div class='add'>+	 * small applications (e.g., GCC testsuite) is faster on HP-UX.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (mm) {</div><div class='ctx'> 		if (mm-&gt;context != 0)</div><div class='hunk'>@@ -65,22 +80,12 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags, sid;</div><div class='ctx'> </div><div class='del'>-	/* For one page, it's not worth testing the split_tlb variable */</div><div class='del'>-</div><div class='del'>-	mb();</div><div class='ctx'> 	sid = vma-&gt;vm_mm-&gt;context;</div><div class='ctx'> 	purge_tlb_start(flags);</div><div class='ctx'> 	mtsp(sid, 1);</div><div class='ctx'> 	pdtlb(addr);</div><div class='del'>-	pitlb(addr);</div><div class='add'>+	if (unlikely(split_tlb))</div><div class='add'>+		pitlb(addr);</div><div class='ctx'> 	purge_tlb_end(flags);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void __flush_tlb_range(unsigned long sid,</div><div class='del'>-	unsigned long start, unsigned long end);</div><div class='del'>-</div><div class='del'>-#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)-&gt;vm_mm-&gt;context,start,end)</div><div class='del'>-</div><div class='del'>-#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c<br/>index f6448c7c62b5..cda6dbbe9842 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/cache.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/cache.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/cache.c</a></div><div class='hunk'>@@ -342,12 +342,15 @@ EXPORT_SYMBOL(flush_data_cache_local);</div><div class='ctx'> EXPORT_SYMBOL(flush_kernel_icache_range_asm);</div><div class='ctx'> </div><div class='ctx'> #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */</div><div class='del'>-int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;</div><div class='add'>+static unsigned long parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;</div><div class='add'>+</div><div class='add'>+#define FLUSH_TLB_THRESHOLD (2*1024*1024) /* 2MB initial TLB threshold */</div><div class='add'>+static unsigned long parisc_tlb_flush_threshold __read_mostly = FLUSH_TLB_THRESHOLD;</div><div class='ctx'> </div><div class='ctx'> void __init parisc_setup_cache_timing(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long rangetime, alltime;</div><div class='del'>-	unsigned long size;</div><div class='add'>+	unsigned long size, start;</div><div class='ctx'> </div><div class='ctx'> 	alltime = mfctl(16);</div><div class='ctx'> 	flush_data_cache();</div><div class='hunk'>@@ -364,14 +367,43 @@ void __init parisc_setup_cache_timing(void)</div><div class='ctx'> 	/* Racy, but if we see an intermediate value, it's ok too... */</div><div class='ctx'> 	parisc_cache_flush_threshold = size * alltime / rangetime;</div><div class='ctx'> </div><div class='del'>-	parisc_cache_flush_threshold = (parisc_cache_flush_threshold + L1_CACHE_BYTES - 1) &amp;~ (L1_CACHE_BYTES - 1); </div><div class='add'>+	parisc_cache_flush_threshold = L1_CACHE_ALIGN(parisc_cache_flush_threshold);</div><div class='ctx'> 	if (!parisc_cache_flush_threshold)</div><div class='ctx'> 		parisc_cache_flush_threshold = FLUSH_THRESHOLD;</div><div class='ctx'> </div><div class='ctx'> 	if (parisc_cache_flush_threshold &gt; cache_info.dc_size)</div><div class='ctx'> 		parisc_cache_flush_threshold = cache_info.dc_size;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());</div><div class='add'>+	printk(KERN_INFO "Setting cache flush threshold to %lu kB\n",</div><div class='add'>+		parisc_cache_flush_threshold/1024);</div><div class='add'>+</div><div class='add'>+	/* calculate TLB flush threshold */</div><div class='add'>+</div><div class='add'>+	alltime = mfctl(16);</div><div class='add'>+	flush_tlb_all();</div><div class='add'>+	alltime = mfctl(16) - alltime;</div><div class='add'>+</div><div class='add'>+	size = PAGE_SIZE;</div><div class='add'>+	start = (unsigned long) _text;</div><div class='add'>+	rangetime = mfctl(16);</div><div class='add'>+	while (start &lt; (unsigned long) _end) {</div><div class='add'>+		flush_tlb_kernel_range(start, start + PAGE_SIZE);</div><div class='add'>+		start += PAGE_SIZE;</div><div class='add'>+		size += PAGE_SIZE;</div><div class='add'>+	}</div><div class='add'>+	rangetime = mfctl(16) - rangetime;</div><div class='add'>+</div><div class='add'>+	printk(KERN_DEBUG "Whole TLB flush %lu cycles, flushing %lu bytes %lu cycles\n",</div><div class='add'>+		alltime, size, rangetime);</div><div class='add'>+</div><div class='add'>+	parisc_tlb_flush_threshold = size * alltime / rangetime;</div><div class='add'>+	parisc_tlb_flush_threshold *= num_online_cpus();</div><div class='add'>+	parisc_tlb_flush_threshold = PAGE_ALIGN(parisc_tlb_flush_threshold);</div><div class='add'>+	if (!parisc_tlb_flush_threshold)</div><div class='add'>+		parisc_tlb_flush_threshold = FLUSH_TLB_THRESHOLD;</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "Setting TLB flush threshold to %lu kB\n",</div><div class='add'>+		parisc_tlb_flush_threshold/1024);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void purge_kernel_dcache_page_asm(unsigned long);</div><div class='hunk'>@@ -403,48 +435,45 @@ void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(copy_user_page);</div><div class='ctx'> </div><div class='del'>-void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* Note: purge_tlb_entries can be called at startup with</div><div class='del'>-	   no context.  */</div><div class='del'>-</div><div class='del'>-	purge_tlb_start(flags);</div><div class='del'>-	mtsp(mm-&gt;context, 1);</div><div class='del'>-	pdtlb(addr);</div><div class='del'>-	pitlb(addr);</div><div class='del'>-	purge_tlb_end(flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(purge_tlb_entries);</div><div class='del'>-</div><div class='del'>-void __flush_tlb_range(unsigned long sid, unsigned long start,</div><div class='del'>-		       unsigned long end)</div><div class='add'>+/* __flush_tlb_range()</div><div class='add'>+ *</div><div class='add'>+ * returns 1 if all TLBs were flushed.</div><div class='add'>+ */</div><div class='add'>+int __flush_tlb_range(unsigned long sid, unsigned long start,</div><div class='add'>+		      unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	unsigned long npages;</div><div class='add'>+	unsigned long flags, size;</div><div class='ctx'> </div><div class='del'>-	npages = ((end - (start &amp; PAGE_MASK)) + (PAGE_SIZE - 1)) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	if (npages &gt;= 512)  /* 2MB of space: arbitrary, should be tuned */</div><div class='add'>+	size = (end - start);</div><div class='add'>+	if (size &gt;= parisc_tlb_flush_threshold) {</div><div class='ctx'> 		flush_tlb_all();</div><div class='del'>-	else {</div><div class='del'>-		unsigned long flags;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	/* Purge TLB entries for small ranges using the pdtlb and</div><div class='add'>+	   pitlb instructions.  These instructions execute locally</div><div class='add'>+	   but cause a purge request to be broadcast to other TLBs.  */</div><div class='add'>+	if (likely(!split_tlb)) {</div><div class='add'>+		while (start &lt; end) {</div><div class='add'>+			purge_tlb_start(flags);</div><div class='add'>+			mtsp(sid, 1);</div><div class='add'>+			pdtlb(start);</div><div class='add'>+			purge_tlb_end(flags);</div><div class='add'>+			start += PAGE_SIZE;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* split TLB case */</div><div class='add'>+	while (start &lt; end) {</div><div class='ctx'> 		purge_tlb_start(flags);</div><div class='ctx'> 		mtsp(sid, 1);</div><div class='del'>-		if (split_tlb) {</div><div class='del'>-			while (npages--) {</div><div class='del'>-				pdtlb(start);</div><div class='del'>-				pitlb(start);</div><div class='del'>-				start += PAGE_SIZE;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			while (npages--) {</div><div class='del'>-				pdtlb(start);</div><div class='del'>-				start += PAGE_SIZE;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		pdtlb(start);</div><div class='add'>+		pitlb(start);</div><div class='ctx'> 		purge_tlb_end(flags);</div><div class='add'>+		start += PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cacheflush_h_tmp_function(void *dummy)</div><div class='head'>diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S<br/>index 75819617f93b..c5ef4081b01d 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/entry.S</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 	.level 2.0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	.import         pa_dbit_lock,data</div><div class='add'>+	.import		pa_tlb_lock,data</div><div class='ctx'> </div><div class='ctx'> 	/* space_to_prot macro creates a prot id from a space id */</div><div class='ctx'> </div><div class='hunk'>@@ -420,8 +420,8 @@</div><div class='ctx'> 	SHLREG		%r9,PxD_VALUE_SHIFT,\pmd</div><div class='ctx'> 	extru		\va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index</div><div class='ctx'> 	dep		%r0,31,PAGE_SHIFT,\pmd  /* clear offset */</div><div class='del'>-	shladd		\index,BITS_PER_PTE_ENTRY,\pmd,\pmd</div><div class='del'>-	LDREG		%r0(\pmd),\pte		/* pmd is now pte */</div><div class='add'>+	shladd		\index,BITS_PER_PTE_ENTRY,\pmd,\pmd /* pmd is now pte */</div><div class='add'>+	LDREG		%r0(\pmd),\pte</div><div class='ctx'> 	bb,&gt;=,n		\pte,_PAGE_PRESENT_BIT,\fault</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -453,57 +453,53 @@</div><div class='ctx'> 	L2_ptep		\pgd,\pte,\index,\va,\fault</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-	/* Acquire pa_dbit_lock lock. */</div><div class='del'>-	.macro		dbit_lock	spc,tmp,tmp1</div><div class='add'>+	/* Acquire pa_tlb_lock lock and recheck page is still present. */</div><div class='add'>+	.macro		tlb_lock	spc,ptp,pte,tmp,tmp1,fault</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	cmpib,COND(=),n	0,\spc,2f</div><div class='del'>-	load32		PA(pa_dbit_lock),\tmp</div><div class='add'>+	load32		PA(pa_tlb_lock),\tmp</div><div class='ctx'> 1:	LDCW		0(\tmp),\tmp1</div><div class='ctx'> 	cmpib,COND(=)	0,\tmp1,1b</div><div class='ctx'> 	nop</div><div class='add'>+	LDREG		0(\ptp),\pte</div><div class='add'>+	bb,&lt;,n		\pte,_PAGE_PRESENT_BIT,2f</div><div class='add'>+	b		\fault</div><div class='add'>+	stw		 \spc,0(\tmp)</div><div class='ctx'> 2:</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-	/* Release pa_dbit_lock lock without reloading lock address. */</div><div class='del'>-	.macro		dbit_unlock0	spc,tmp</div><div class='add'>+	/* Release pa_tlb_lock lock without reloading lock address. */</div><div class='add'>+	.macro		tlb_unlock0	spc,tmp</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	or,COND(=)	%r0,\spc,%r0</div><div class='ctx'> 	stw             \spc,0(\tmp)</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-	/* Release pa_dbit_lock lock. */</div><div class='del'>-	.macro		dbit_unlock1	spc,tmp</div><div class='add'>+	/* Release pa_tlb_lock lock. */</div><div class='add'>+	.macro		tlb_unlock1	spc,tmp</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	load32		PA(pa_dbit_lock),\tmp</div><div class='del'>-	dbit_unlock0	\spc,\tmp</div><div class='add'>+	load32		PA(pa_tlb_lock),\tmp</div><div class='add'>+	tlb_unlock0	\spc,\tmp</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* Set the _PAGE_ACCESSED bit of the PTE.  Be clever and</div><div class='ctx'> 	 * don't needlessly dirty the cache line if it was already set */</div><div class='del'>-	.macro		update_ptep	spc,ptep,pte,tmp,tmp1</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	or,COND(=)	%r0,\spc,%r0</div><div class='del'>-	LDREG		0(\ptep),\pte</div><div class='del'>-#endif</div><div class='add'>+	.macro		update_accessed	ptp,pte,tmp,tmp1</div><div class='ctx'> 	ldi		_PAGE_ACCESSED,\tmp1</div><div class='ctx'> 	or		\tmp1,\pte,\tmp</div><div class='ctx'> 	and,COND(&lt;&gt;)	\tmp1,\pte,%r0</div><div class='del'>-	STREG		\tmp,0(\ptep)</div><div class='add'>+	STREG		\tmp,0(\ptp)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* Set the dirty bit (and accessed bit).  No need to be</div><div class='ctx'> 	 * clever, this is only used from the dirty fault */</div><div class='del'>-	.macro		update_dirty	spc,ptep,pte,tmp</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	or,COND(=)	%r0,\spc,%r0</div><div class='del'>-	LDREG		0(\ptep),\pte</div><div class='del'>-#endif</div><div class='add'>+	.macro		update_dirty	ptp,pte,tmp</div><div class='ctx'> 	ldi		_PAGE_ACCESSED|_PAGE_DIRTY,\tmp</div><div class='ctx'> 	or		\tmp,\pte,\pte</div><div class='del'>-	STREG		\pte,0(\ptep)</div><div class='add'>+	STREG		\pte,0(\ptp)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* bitshift difference between a PFN (based on kernel's PAGE_SIZE)</div><div class='hunk'>@@ -1148,14 +1144,14 @@ dtlb_miss_20w:</div><div class='ctx'> </div><div class='ctx'> 	L3_ptep		ptp,pte,t0,va,dtlb_check_alias_20w</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dtlb_check_alias_20w</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> 	</div><div class='ctx'> 	idtlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1174,14 +1170,14 @@ nadtlb_miss_20w:</div><div class='ctx'> </div><div class='ctx'> 	L3_ptep		ptp,pte,t0,va,nadtlb_check_alias_20w</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,nadtlb_check_alias_20w</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='ctx'> 	idtlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1202,20 +1198,20 @@ dtlb_miss_11:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,dtlb_check_alias_11</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dtlb_check_alias_11</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb_11	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */</div><div class='add'>+	mfsp		%sr1,t1  /* Save sr1 so we can use it in tlb inserts */</div><div class='ctx'> 	mtsp		spc,%sr1</div><div class='ctx'> </div><div class='ctx'> 	idtlba		pte,(%sr1,va)</div><div class='ctx'> 	idtlbp		prot,(%sr1,va)</div><div class='ctx'> </div><div class='del'>-	mtsp		t0, %sr1	/* Restore sr1 */</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='add'>+	mtsp		t1, %sr1	/* Restore sr1 */</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1235,21 +1231,20 @@ nadtlb_miss_11:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,nadtlb_check_alias_11</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,nadtlb_check_alias_11</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb_11	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */</div><div class='add'>+	mfsp		%sr1,t1  /* Save sr1 so we can use it in tlb inserts */</div><div class='ctx'> 	mtsp		spc,%sr1</div><div class='ctx'> </div><div class='ctx'> 	idtlba		pte,(%sr1,va)</div><div class='ctx'> 	idtlbp		prot,(%sr1,va)</div><div class='ctx'> </div><div class='del'>-	mtsp		t0, %sr1	/* Restore sr1 */</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='add'>+	mtsp		t1, %sr1	/* Restore sr1 */</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1269,16 +1264,16 @@ dtlb_miss_20:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,dtlb_check_alias_20</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dtlb_check_alias_20</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	f_extend	pte,t0</div><div class='add'>+	f_extend	pte,t1</div><div class='ctx'> </div><div class='ctx'> 	idtlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1297,16 +1292,16 @@ nadtlb_miss_20:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,nadtlb_check_alias_20</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,nadtlb_check_alias_20</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	f_extend	pte,t0</div><div class='add'>+	f_extend	pte,t1</div><div class='ctx'> 	</div><div class='del'>-        idtlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='add'>+	idtlbt		pte,prot</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1406,14 +1401,14 @@ itlb_miss_20w:</div><div class='ctx'> </div><div class='ctx'> 	L3_ptep		ptp,pte,t0,va,itlb_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,itlb_fault</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> 	</div><div class='ctx'> 	iitlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1430,14 +1425,14 @@ naitlb_miss_20w:</div><div class='ctx'> </div><div class='ctx'> 	L3_ptep		ptp,pte,t0,va,naitlb_check_alias_20w</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,naitlb_check_alias_20w</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='ctx'> 	iitlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1458,20 +1453,20 @@ itlb_miss_11:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,itlb_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,itlb_fault</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb_11	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */</div><div class='add'>+	mfsp		%sr1,t1  /* Save sr1 so we can use it in tlb inserts */</div><div class='ctx'> 	mtsp		spc,%sr1</div><div class='ctx'> </div><div class='ctx'> 	iitlba		pte,(%sr1,va)</div><div class='ctx'> 	iitlbp		prot,(%sr1,va)</div><div class='ctx'> </div><div class='del'>-	mtsp		t0, %sr1	/* Restore sr1 */</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='add'>+	mtsp		t1, %sr1	/* Restore sr1 */</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1482,20 +1477,20 @@ naitlb_miss_11:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,naitlb_check_alias_11</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,naitlb_check_alias_11</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb_11	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */</div><div class='add'>+	mfsp		%sr1,t1  /* Save sr1 so we can use it in tlb inserts */</div><div class='ctx'> 	mtsp		spc,%sr1</div><div class='ctx'> </div><div class='ctx'> 	iitlba		pte,(%sr1,va)</div><div class='ctx'> 	iitlbp		prot,(%sr1,va)</div><div class='ctx'> </div><div class='del'>-	mtsp		t0, %sr1	/* Restore sr1 */</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='add'>+	mtsp		t1, %sr1	/* Restore sr1 */</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1516,16 +1511,16 @@ itlb_miss_20:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,itlb_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,itlb_fault</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	f_extend	pte,t0	</div><div class='add'>+	f_extend	pte,t1</div><div class='ctx'> </div><div class='ctx'> 	iitlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1536,16 +1531,16 @@ naitlb_miss_20:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,naitlb_check_alias_20</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_ptep	spc,ptp,pte,t0,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,naitlb_check_alias_20</div><div class='add'>+	update_accessed	ptp,pte,t0,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='del'>-	f_extend	pte,t0</div><div class='add'>+	f_extend	pte,t1</div><div class='ctx'> </div><div class='ctx'> 	iitlbt          pte,prot</div><div class='del'>-	dbit_unlock1	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock1	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1568,14 +1563,14 @@ dbit_trap_20w:</div><div class='ctx'> </div><div class='ctx'> 	L3_ptep		ptp,pte,t0,va,dbit_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_dirty	spc,ptp,pte,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dbit_fault</div><div class='add'>+	update_dirty	ptp,pte,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> 		</div><div class='ctx'> 	idtlbt          pte,prot</div><div class='del'>-	dbit_unlock0	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock0	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> #else</div><div class='hunk'>@@ -1588,8 +1583,8 @@ dbit_trap_11:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,dbit_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_dirty	spc,ptp,pte,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dbit_fault</div><div class='add'>+	update_dirty	ptp,pte,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb_11	spc,pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1600,8 +1595,8 @@ dbit_trap_11:</div><div class='ctx'> 	idtlbp		prot,(%sr1,va)</div><div class='ctx'> </div><div class='ctx'> 	mtsp            t1, %sr1     /* Restore sr1 */</div><div class='del'>-	dbit_unlock0	spc,t0</div><div class='ctx'> </div><div class='add'>+	tlb_unlock0	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='hunk'>@@ -1612,16 +1607,16 @@ dbit_trap_20:</div><div class='ctx'> </div><div class='ctx'> 	L2_ptep		ptp,pte,t0,va,dbit_fault</div><div class='ctx'> </div><div class='del'>-	dbit_lock	spc,t0,t1</div><div class='del'>-	update_dirty	spc,ptp,pte,t1</div><div class='add'>+	tlb_lock	spc,ptp,pte,t0,t1,dbit_fault</div><div class='add'>+	update_dirty	ptp,pte,t1</div><div class='ctx'> </div><div class='ctx'> 	make_insert_tlb	spc,pte,prot</div><div class='ctx'> </div><div class='ctx'> 	f_extend	pte,t1</div><div class='ctx'> 	</div><div class='del'>-        idtlbt          pte,prot</div><div class='del'>-	dbit_unlock0	spc,t0</div><div class='add'>+	idtlbt		pte,prot</div><div class='ctx'> </div><div class='add'>+	tlb_unlock0	spc,t0</div><div class='ctx'> 	rfir</div><div class='ctx'> 	nop</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c<br/>index ff834fd67478..b9402c9b3454 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/pci-dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/pci-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/pci-dma.c</a></div><div class='hunk'>@@ -478,14 +478,16 @@ static void pa11_dma_unmap_single(struct device *dev, dma_addr_t dma_handle, siz</div><div class='ctx'> static int pa11_dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(direction == DMA_NONE);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sglist++ ) {</div><div class='del'>-		unsigned long vaddr = (unsigned long)sg_virt(sglist);</div><div class='del'>-		sg_dma_address(sglist) = (dma_addr_t) virt_to_phys(vaddr);</div><div class='del'>-		sg_dma_len(sglist) = sglist-&gt;length;</div><div class='del'>-		flush_kernel_dcache_range(vaddr, sglist-&gt;length);</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='add'>+		unsigned long vaddr = (unsigned long)sg_virt(sg);</div><div class='add'>+</div><div class='add'>+		sg_dma_address(sg) = (dma_addr_t) virt_to_phys(vaddr);</div><div class='add'>+		sg_dma_len(sg) = sg-&gt;length;</div><div class='add'>+		flush_kernel_dcache_range(vaddr, sg-&gt;length);</div><div class='ctx'> 	}</div><div class='ctx'> 	return nents;</div><div class='ctx'> }</div><div class='hunk'>@@ -493,6 +495,7 @@ static int pa11_dma_map_sg(struct device *dev, struct scatterlist *sglist, int n</div><div class='ctx'> static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(direction == DMA_NONE);</div><div class='ctx'> </div><div class='hunk'>@@ -501,8 +504,8 @@ static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, in</div><div class='ctx'> </div><div class='ctx'> 	/* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sglist++ )</div><div class='del'>-		flush_kernel_vmap_range(sg_virt(sglist), sglist-&gt;length);</div><div class='add'>+	for_each_sg(sglist, sg, nents, i)</div><div class='add'>+		flush_kernel_vmap_range(sg_virt(sg), sg-&gt;length);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -523,21 +526,23 @@ static void pa11_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_h</div><div class='ctx'> static void pa11_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	/* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sglist++ )</div><div class='del'>-		flush_kernel_vmap_range(sg_virt(sglist), sglist-&gt;length);</div><div class='add'>+	for_each_sg(sglist, sg, nents, i)</div><div class='add'>+		flush_kernel_vmap_range(sg_virt(sg), sg-&gt;length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pa11_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	/* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sglist++ )</div><div class='del'>-		flush_kernel_vmap_range(sg_virt(sglist), sglist-&gt;length);</div><div class='add'>+	for_each_sg(sglist, sg, nents, i)</div><div class='add'>+		flush_kernel_vmap_range(sg_virt(sg), sg-&gt;length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct hppa_dma_ops pcxl_dma_ops = {</div><div class='head'>diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c<br/>index d5cae55195ec..10a5ae9553fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/pdc_cons.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/pdc_cons.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/pdc_cons.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/pdc_cons.c</a></div><div class='hunk'>@@ -207,8 +207,7 @@ static int __init pdc_console_tty_driver_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(pdc_console_tty_driver_init);</div><div class='add'>+device_initcall(pdc_console_tty_driver_init);</div><div class='ctx'> </div><div class='ctx'> static struct tty_driver * pdc_console_device (struct console *c, int *index)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c<br/>index ba0c053e25ae..518f4f5f1f43 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/perf.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/perf.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/perf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/perf.c</a></div><div class='hunk'>@@ -543,6 +543,7 @@ static int __init perf_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+device_initcall(perf_init);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * perf_start_counters(void)</div><div class='hunk'>@@ -847,5 +848,3 @@ printk("perf_rdr_write\n");</div><div class='ctx'> 	}</div><div class='ctx'> printk("perf_rdr_write done\n");</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(perf_init);</div><div class='head'>diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c<br/>index 47ee620d15d2..b99b39f1da02 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/kernel/traps.c</a></div><div class='hunk'>@@ -26,9 +26,9 @@</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/assembly.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='hunk'>@@ -43,10 +43,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "../math-emu/math-emu.h"	/* for handle_fpe() */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)</div><div class='del'>-DEFINE_SPINLOCK(pa_dbit_lock);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void parisc_show_stack(struct task_struct *task, unsigned long *sp,</div><div class='ctx'> 	struct pt_regs *regs);</div><div class='ctx'> </div><div class='hunk'>@@ -800,7 +796,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)</div><div class='ctx'> 	     * unless pagefault_disable() was called before.</div><div class='ctx'> 	     */</div><div class='ctx'> </div><div class='del'>-	    if (fault_space == 0 &amp;&amp; !in_atomic())</div><div class='add'>+	    if (fault_space == 0 &amp;&amp; !faulthandler_disabled())</div><div class='ctx'> 	    {</div><div class='ctx'> 		pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);</div><div class='ctx'> 		parisc_terminate("Kernel Fault", regs, code, fault_address);</div><div class='head'>diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c<br/>index e5120e653240..15503adddf4f 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/parisc/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/parisc/mm/fault.c</a></div><div class='hunk'>@@ -15,8 +15,8 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Various important other fields */</div><div class='hunk'>@@ -207,7 +207,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,</div><div class='ctx'> 	int fault;</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> </div><div class='del'>-	if (in_atomic())</div><div class='add'>+	if (pagefault_disabled())</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	tsk = current;</div><div class='head'>diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig<br/>index 190cc48abc0c..5ef27113b898 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Kconfig</a></div><div class='hunk'>@@ -153,6 +153,8 @@ config PPC</div><div class='ctx'> 	select NO_BOOTMEM</div><div class='ctx'> 	select HAVE_GENERIC_RCU_GUP</div><div class='ctx'> 	select HAVE_PERF_EVENTS_NMI if PPC64</div><div class='add'>+	select EDAC_SUPPORT</div><div class='add'>+	select EDAC_ATOMIC_SCRUB</div><div class='ctx'> </div><div class='ctx'> config GENERIC_CSUM</div><div class='ctx'> 	def_bool CPU_LITTLE_ENDIAN</div><div class='head'>diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug<br/>index 0efa8f90a8f1..3a510f4a6b68 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/Kconfig.debug?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Kconfig.debug</a></div><div class='hunk'>@@ -19,6 +19,14 @@ config PPC_WERROR</div><div class='ctx'> 	depends on !PPC_DISABLE_WERROR</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='add'>+config STRICT_MM_TYPECHECKS</div><div class='add'>+	bool "Do extra type checking on mm types"</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  This option turns on extra type checking for some mm related types.</div><div class='add'>+</div><div class='add'>+	  If you don't know what this means, say N.</div><div class='add'>+</div><div class='ctx'> config PRINT_STACK_DEPTH</div><div class='ctx'> 	int "Stack depth to print" if DEBUG_KERNEL</div><div class='ctx'> 	default 64</div><div class='head'>diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile<br/>index 07a480861f78..05f464eb6952 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/Makefile</a></div><div class='hunk'>@@ -66,7 +66,10 @@ endif</div><div class='ctx'> UTS_MACHINE := $(OLDARCH)</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)</div><div class='del'>-override CC	+= -mlittle-endian -mno-strict-align</div><div class='add'>+override CC	+= -mlittle-endian</div><div class='add'>+ifneq ($(COMPILER),clang)</div><div class='add'>+override CC	+= -mno-strict-align</div><div class='add'>+endif</div><div class='ctx'> override AS	+= -mlittle-endian</div><div class='ctx'> override LD	+= -EL</div><div class='ctx'> override CROSS32CC += -mlittle-endian</div><div class='hunk'>@@ -113,14 +116,14 @@ else</div><div class='ctx'> endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-CFLAGS-$(CONFIG_PPC64)	:= -mtraceback=no</div><div class='add'>+CFLAGS-$(CONFIG_PPC64)	:= $(call cc-option,-mtraceback=no)</div><div class='ctx'> ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)</div><div class='del'>-CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mabi=elfv2,-mcall-aixdesc)</div><div class='add'>+CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mabi=elfv2,$(call cc-option,-mcall-aixdesc))</div><div class='ctx'> AFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mabi=elfv2)</div><div class='ctx'> else</div><div class='del'>-CFLAGS-$(CONFIG_PPC64)	+= -mcall-aixdesc</div><div class='add'>+CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mcall-aixdesc)</div><div class='ctx'> endif</div><div class='del'>-CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mcmodel=medium,-mminimal-toc)</div><div class='add'>+CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))</div><div class='ctx'> CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mno-pointers-to-nested-functions)</div><div class='ctx'> CFLAGS-$(CONFIG_PPC32)	:= -ffixed-r2 $(MULTIPLEWORD)</div><div class='ctx'> </div><div class='hunk'>@@ -160,7 +163,8 @@ asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)</div><div class='ctx'> </div><div class='ctx'> KBUILD_CPPFLAGS	+= -Iarch/$(ARCH) $(asinstr)</div><div class='ctx'> KBUILD_AFLAGS	+= -Iarch/$(ARCH) $(AFLAGS-y)</div><div class='del'>-KBUILD_CFLAGS	+= -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y)</div><div class='add'>+KBUILD_CFLAGS	+= $(call cc-option,-msoft-float)</div><div class='add'>+KBUILD_CFLAGS	+= -pipe -Iarch/$(ARCH) $(CFLAGS-y)</div><div class='ctx'> CPP		= $(CC) -E $(KBUILD_CFLAGS)</div><div class='ctx'> </div><div class='ctx'> CHECKFLAGS	+= -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__</div><div class='hunk'>@@ -192,7 +196,7 @@ KBUILD_CFLAGS	+= $(call cc-option,-fno-dwarf2-cfi-asm)</div><div class='ctx'> </div><div class='ctx'> # Never use string load/store instructions as they are</div><div class='ctx'> # often slow when they are implemented at all</div><div class='del'>-KBUILD_CFLAGS		+= -mno-string</div><div class='add'>+KBUILD_CFLAGS		+= $(call cc-option,-mno-string)</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_6xx),y)</div><div class='ctx'> KBUILD_CFLAGS		+= -mcpu=powerpc</div><div class='hunk'>@@ -269,6 +273,21 @@ bootwrapper_install:</div><div class='ctx'> %.dtb: scripts</div><div class='ctx'> 	$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)</div><div class='ctx'> </div><div class='add'>+# Used to create 'merged defconfigs'</div><div class='add'>+# To use it $(call) it with the first argument as the base defconfig</div><div class='add'>+# and the second argument as a space separated list of .config files to merge,</div><div class='add'>+# without the .config suffix.</div><div class='add'>+define merge_into_defconfig</div><div class='add'>+	$(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh \</div><div class='add'>+		-m -O $(objtree) $(srctree)/arch/$(ARCH)/configs/$(1) \</div><div class='add'>+		$(foreach config,$(2),$(srctree)/arch/$(ARCH)/configs/$(config).config)</div><div class='add'>+	+$(Q)$(MAKE) -f $(srctree)/Makefile olddefconfig</div><div class='add'>+endef</div><div class='add'>+</div><div class='add'>+PHONY += pseries_le_defconfig</div><div class='add'>+pseries_le_defconfig:</div><div class='add'>+	$(call merge_into_defconfig,pseries_defconfig,le)</div><div class='add'>+</div><div class='ctx'> define archhelp</div><div class='ctx'>   @echo '* zImage          - Build default images selected by kernel config'</div><div class='ctx'>   @echo '  zImage.*        - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'</div><div class='hunk'>@@ -314,7 +333,8 @@ TOUT	:= .tmp_gas_check</div><div class='ctx'> # - Require gcc 4.0 or above on 64-bit</div><div class='ctx'> # - gcc-4.2.0 has issues compiling modules on 64-bit</div><div class='ctx'> checkbin:</div><div class='del'>-	@if test "$(cc-version)" = "0304" ; then \</div><div class='add'>+	@if test "${COMPILER}" != "clang" \</div><div class='add'>+	    &amp;&amp; test "$(cc-version)" = "0304" ; then \</div><div class='ctx'> 		if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) &gt;/dev/null 2&gt;&amp;1 ; then \</div><div class='ctx'> 			echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build '; \</div><div class='ctx'> 			echo 'correctly with gcc-3.4 and your version of binutils.'; \</div><div class='hunk'>@@ -322,13 +342,15 @@ checkbin:</div><div class='ctx'> 			false; \</div><div class='ctx'> 		fi ; \</div><div class='ctx'> 	fi</div><div class='del'>-	@if test "$(cc-version)" -lt "0400" \</div><div class='add'>+	@if test "${COMPILER}" != "clang" \</div><div class='add'>+	    &amp;&amp; test "$(cc-version)" -lt "0400" \</div><div class='ctx'> 	    &amp;&amp; test "x${CONFIG_PPC64}" = "xy" ; then \</div><div class='ctx'>                 echo -n "Sorry, GCC v4.0 or above is required to build " ; \</div><div class='ctx'>                 echo "the 64-bit powerpc kernel." ; \</div><div class='ctx'>                 false ; \</div><div class='ctx'>         fi</div><div class='del'>-	@if test "$(cc-fullversion)" = "040200" \</div><div class='add'>+	@if test "${COMPILER}" != "clang" \</div><div class='add'>+	    &amp;&amp; test "$(cc-fullversion)" = "040200" \</div><div class='ctx'> 	    &amp;&amp; test "x${CONFIG_MODULES}${CONFIG_PPC64}" = "xyy" ; then \</div><div class='ctx'> 		echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \</div><div class='ctx'> 		echo 'kernel with modules enabled.' ; \</div><div class='hunk'>@@ -336,6 +358,14 @@ checkbin:</div><div class='ctx'> 		echo 'disable kernel modules' ; \</div><div class='ctx'> 		false ; \</div><div class='ctx'> 	fi</div><div class='add'>+	@if test "x${CONFIG_CPU_LITTLE_ENDIAN}" = "xy" \</div><div class='add'>+	    &amp;&amp; $(LD) --version | head -1 | grep ' 2\.24$$' &gt;/dev/null ; then \</div><div class='add'>+		echo -n '*** binutils 2.24 miscompiles weak symbols ' ; \</div><div class='add'>+		echo 'in some circumstances.' ; \</div><div class='add'>+		echo -n '*** Please use a different binutils version.' ; \</div><div class='add'>+		false ; \</div><div class='add'>+	fi</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> CLEAN_FILES += $(TOUT)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi<br/>index 24ed80dc2120..559d00657fb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/b4qds.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/b4qds.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/b4qds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/b4qds.dtsi</a></div><div class='hunk'>@@ -106,6 +106,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -116,6 +124,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi<br/>index 86161ae6c966..1ea8602e4345 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/b4420si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4420si-post.dtsi</a></div><div class='hunk'>@@ -80,20 +80,9 @@</div><div class='ctx'> 		compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-/include/ "qoriq-clockgen2.dtsi"</div><div class='ctx'> 	global-utilities@e1000 {</div><div class='del'>-		compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";</div><div class='del'>-</div><div class='del'>-		mux0: mux0@0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x0 0x4&gt;;</div><div class='del'>-			compatible = "fsl,qoriq-core-mux-2.0";</div><div class='del'>-			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;, &lt;&amp;pll0 2&gt;,</div><div class='del'>-				&lt;&amp;pll1 0&gt;, &lt;&amp;pll1 1&gt;, &lt;&amp;pll1 2&gt;;</div><div class='del'>-			clock-names = "pll0", "pll0-div2", "pll0-div4",</div><div class='del'>-				"pll1", "pll1-div2", "pll1-div4";</div><div class='del'>-			clock-output-names = "cmux0";</div><div class='del'>-		};</div><div class='add'>+		compatible = "fsl,b4420-clockgen", "fsl,b4-clockgen",</div><div class='add'>+			      "fsl,qoriq-clockgen-2.0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rcpm: global-utilities@e2000 {</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi<br/>index f35e9e0a5445..9ba904be39ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/b4860si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4860si-post.dtsi</a></div><div class='hunk'>@@ -167,6 +167,75 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	qportal14: qman-portal@38000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x38000 0x4000&gt;, &lt;0x100e000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;132 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xe&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal15: qman-portal@3c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x3c000 0x4000&gt;, &lt;0x100f000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;134 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xf&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal16: qman-portal@40000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x40000 0x4000&gt;, &lt;0x1010000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;136 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal17: qman-portal@44000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x44000 0x4000&gt;, &lt;0x1011000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;138 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x11&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal18: qman-portal@48000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x48000 0x4000&gt;, &lt;0x1012000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;140 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x12&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal19: qman-portal@4c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4c000 0x4000&gt;, &lt;0x1013000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;142 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x13&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal20: qman-portal@50000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x50000 0x4000&gt;, &lt;0x1014000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;144 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x14&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal21: qman-portal@54000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x54000 0x4000&gt;, &lt;0x1015000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;146 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x15&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal22: qman-portal@58000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x58000 0x4000&gt;, &lt;0x1016000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;148 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x16&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal23: qman-portal@5c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x5c000 0x4000&gt;, &lt;0x1017000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;150 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x17&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal24: qman-portal@60000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x60000 0x4000&gt;, &lt;0x1018000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;152 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x18&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	ddr2: memory-controller@9000 {</div><div class='ctx'> 		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";</div><div class='hunk'>@@ -182,20 +251,9 @@</div><div class='ctx'> 		compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-/include/ "qoriq-clockgen2.dtsi"</div><div class='ctx'> 	global-utilities@e1000 {</div><div class='del'>-		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";</div><div class='del'>-</div><div class='del'>-		mux0: mux0@0 {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x0 0x4&gt;;</div><div class='del'>-			compatible = "fsl,qoriq-core-mux-2.0";</div><div class='del'>-			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;, &lt;&amp;pll0 2&gt;,</div><div class='del'>-				&lt;&amp;pll1 0&gt;, &lt;&amp;pll1 1&gt;, &lt;&amp;pll1 2&gt;;</div><div class='del'>-			clock-names = "pll0", "pll0-div2", "pll0-div4",</div><div class='del'>-				"pll1", "pll1-div2", "pll1-div4";</div><div class='del'>-			clock-output-names = "cmux0";</div><div class='del'>-		};</div><div class='add'>+		compatible = "fsl,b4860-clockgen", "fsl,b4-clockgen",</div><div class='add'>+			      "fsl,qoriq-clockgen-2.0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rcpm: global-utilities@e2000 {</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi<br/>index 73136c0029d2..603910ac1db0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/b4si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/b4si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/b4si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ifc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -210,6 +220,97 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	#address-cells = &lt;0x1&gt;;</div><div class='add'>+	#size-cells = &lt;0x1&gt;;</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	qportal0: qman-portal@0 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x0 0x4000&gt;, &lt;0x1000000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;104 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal1: qman-portal@4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4000 0x4000&gt;, &lt;0x1001000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;106 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal2: qman-portal@8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;, &lt;0x1002000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;108 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal3: qman-portal@c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc000 0x4000&gt;, &lt;0x1003000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;110 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x3&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal4: qman-portal@10000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x10000 0x4000&gt;, &lt;0x1004000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;112 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal5: qman-portal@14000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x14000 0x4000&gt;, &lt;0x1005000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;114 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x5&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal6: qman-portal@18000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x18000 0x4000&gt;, &lt;0x1006000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;116 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x6&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal7: qman-portal@1c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x1c000 0x4000&gt;, &lt;0x1007000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;118 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x7&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal8: qman-portal@20000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x20000 0x4000&gt;, &lt;0x1008000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;120 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal9: qman-portal@24000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x24000 0x4000&gt;, &lt;0x1009000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;122 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x9&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal10: qman-portal@28000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x28000 0x4000&gt;, &lt;0x100a000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;124 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xa&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal11: qman-portal@2c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x2c000 0x4000&gt;, &lt;0x100b000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;126 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xb&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal12: qman-portal@30000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x30000 0x4000&gt;, &lt;0x100c000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;128 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xc&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal13: qman-portal@34000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x34000 0x4000&gt;, &lt;0x100d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;130 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xd&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -296,9 +397,21 @@</div><div class='ctx'> 		fsl,liodn-bits = &lt;12&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-clockgen2.dtsi"</div><div class='ctx'> 	clockgen: global-utilities@e1000 {</div><div class='ctx'> 		compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";</div><div class='ctx'> 		reg = &lt;0xe1000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+		mux0: mux0@0 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0 0x4&gt;;</div><div class='add'>+			compatible = "fsl,qoriq-core-mux-2.0";</div><div class='add'>+			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;, &lt;&amp;pll0 2&gt;,</div><div class='add'>+				&lt;&amp;pll1 0&gt;, &lt;&amp;pll1 1&gt;, &lt;&amp;pll1 2&gt;;</div><div class='add'>+			clock-names = "pll0", "pll0-div2", "pll0-div4",</div><div class='add'>+				"pll1", "pll1-div2", "pll1-div4";</div><div class='add'>+			clock-output-names = "cmux0";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rcpm: global-utilities@e2000 {</div><div class='hunk'>@@ -343,6 +456,11 @@</div><div class='ctx'> /include/ "qoriq-duart-1.dtsi"</div><div class='ctx'> /include/ "qoriq-sec5.3-0.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman3.dtsi"</div><div class='add'>+	qman: qman@318000 {</div><div class='add'>+		interrupts = &lt;16 2 1 28&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> 	bman: bman@31a000 {</div><div class='ctx'> 		interrupts = &lt;16 2 1 29&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi<br/>index 7780f21430cb..da6d3fc6ba41 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p1023si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p1023si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -102,6 +112,31 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	qportal0: qman-portal@0 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x0 0x4000&gt;, &lt;0x100000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;29 2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal1: qman-portal@4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4000 0x4000&gt;, &lt;0x101000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;31 2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal2: qman-portal@8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;, &lt;0x102000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;33 2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;bportals {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -248,6 +283,14 @@</div><div class='ctx'> /include/ "pq3-mpic.dtsi"</div><div class='ctx'> /include/ "pq3-mpic-timer-B.dtsi"</div><div class='ctx'> </div><div class='add'>+	qman: qman@88000 {</div><div class='add'>+		compatible = "fsl,qman";</div><div class='add'>+		reg = &lt;0x88000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;16 2 0 0&gt;;</div><div class='add'>+		fsl,qman-portals = &lt;&amp;qportals&gt;;</div><div class='add'>+		memory-region = &lt;&amp;qman_fqd &amp;qman_pfdr&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	bman: bman@8a000 {</div><div class='ctx'> 		compatible = "fsl,bman";</div><div class='ctx'> 		reg = &lt;0x8a000 0x1000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi<br/>index f2feacfd9a25..04ad177b6a12 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p2041si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p2041si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";</div><div class='ctx'> 	interrupts = &lt;25 2 0 0&gt;;</div><div class='hunk'>@@ -223,6 +233,8 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-bman1-portals.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1-portals.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -370,6 +382,7 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-esdhc-0.dtsi"</div><div class='ctx'> 	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,p2041-esdhc", "fsl,esdhc";</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='ctx'> 		sdhci,auto-cmd12;</div><div class='hunk'>@@ -415,5 +428,6 @@ crypto: crypto@300000 {</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi<br/>index d6fea37395ad..2cab18af6df2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p3041si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p3041si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";</div><div class='ctx'> 	interrupts = &lt;25 2 0 0&gt;;</div><div class='hunk'>@@ -250,6 +260,8 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-bman1-portals.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1-portals.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -397,6 +409,7 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-esdhc-0.dtsi"</div><div class='ctx'> 	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,p3041-esdhc", "fsl,esdhc";</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='ctx'> 		sdhci,auto-cmd12;</div><div class='hunk'>@@ -442,5 +455,6 @@ crypto: crypto@300000 {</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi<br/>index 89482c9b2301..dfc76bc41cb2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p4080si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p4080si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";</div><div class='ctx'> 	interrupts = &lt;25 2 0 0&gt;;</div><div class='hunk'>@@ -250,6 +260,8 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-bman1-portals.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1-portals.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -469,6 +481,7 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-esdhc-0.dtsi"</div><div class='ctx'> 	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,p4080-esdhc", "fsl,esdhc";</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='ctx'> 		voltage-ranges = &lt;3300 3300&gt;;</div><div class='hunk'>@@ -498,5 +511,6 @@ crypto: crypto@300000 {</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi<br/>index 6e04851e2fc9..b77923ad72cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p5020si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p5020si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";</div><div class='ctx'> 	interrupts = &lt;25 2 0 0&gt;;</div><div class='hunk'>@@ -247,6 +257,8 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-bman1-portals.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1-portals.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -384,6 +396,7 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-esdhc-0.dtsi"</div><div class='ctx'> 	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,p5020-esdhc", "fsl,esdhc";</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='ctx'> 		sdhci,auto-cmd12;</div><div class='hunk'>@@ -428,6 +441,7 @@</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-raid1.0-0.dtsi"</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi<br/>index 5e44dfa1e1a5..6d214526b81b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/p5040si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/p5040si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lbc {</div><div class='ctx'> 	compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";</div><div class='ctx'> 	interrupts = &lt;25 2 0 0&gt;;</div><div class='hunk'>@@ -202,6 +212,8 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-bman1-portals.dtsi"</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1-portals.dtsi"</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -362,6 +374,7 @@</div><div class='ctx'> </div><div class='ctx'> /include/ "qoriq-esdhc-0.dtsi"</div><div class='ctx'> 	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,p5040-esdhc", "fsl,esdhc";</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu2&gt;;</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='ctx'> 		sdhci,auto-cmd12;</div><div class='hunk'>@@ -407,5 +420,6 @@</div><div class='ctx'> 		fsl,iommu-parent = &lt;&amp;pamu4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+/include/ "qoriq-qman1.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi<br/>index 05d51acafa67..e77e4b4ed53b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/qoriq-qman1-portals.dtsi</a></div><div class='hunk'>@@ -41,61 +41,61 @@</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x0 0x4000&gt;, &lt;0x100000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;104 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;0x0&gt;;</div><div class='add'>+		cell-index = &lt;0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal1: qman-portal@4000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x4000 0x4000&gt;, &lt;0x101000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;106 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;1&gt;;</div><div class='add'>+		cell-index = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal2: qman-portal@8000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x8000 0x4000&gt;, &lt;0x102000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;108 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;2&gt;;</div><div class='add'>+		cell-index = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal3: qman-portal@c000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0xc000 0x4000&gt;, &lt;0x103000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;110 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;3&gt;;</div><div class='add'>+		cell-index = &lt;3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal4: qman-portal@10000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x10000 0x4000&gt;, &lt;0x104000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;112 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;4&gt;;</div><div class='add'>+		cell-index = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal5: qman-portal@14000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x14000 0x4000&gt;, &lt;0x105000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;114 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;5&gt;;</div><div class='add'>+		cell-index = &lt;5&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal6: qman-portal@18000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x18000 0x4000&gt;, &lt;0x106000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;116 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;6&gt;;</div><div class='add'>+		cell-index = &lt;6&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	qportal7: qman-portal@1c000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x1c000 0x4000&gt;, &lt;0x107000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;118 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;7&gt;;</div><div class='add'>+		cell-index = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal8: qman-portal@20000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x20000 0x4000&gt;, &lt;0x108000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;120 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;8&gt;;</div><div class='add'>+		cell-index = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	qportal9: qman-portal@24000 {</div><div class='ctx'> 		compatible = "fsl,qman-portal";</div><div class='ctx'> 		reg = &lt;0x24000 0x4000&gt;, &lt;0x109000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;122 2 0 0&gt;;</div><div class='del'>-		fsl,qman-channel-id = &lt;9&gt;;</div><div class='add'>+		cell-index = &lt;9&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi<br/>new file mode 100644<br/>index 000000000000..df1f068a5376<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1023si-post.dtsi</a></div><div class='hunk'>@@ -0,0 +1,330 @@</div><div class='add'>+/*</div><div class='add'>+ * T1023 Silicon/SoC Device Tree Source (post include)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *	 documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *	 names of its contributors may be used to endorse or promote products</div><div class='add'>+ *	 derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;ifc {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "fsl,ifc", "simple-bus";</div><div class='add'>+	interrupts = &lt;25 2 0 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pci0 {</div><div class='add'>+	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";</div><div class='add'>+	device_type = "pci";</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+	interrupts = &lt;20 2 0 0&gt;;</div><div class='add'>+	fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+	pcie@0 {</div><div class='add'>+		reg = &lt;0 0 0 0 0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupts = &lt;20 2 0 0&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0xf800 0 0 7&gt;;</div><div class='add'>+		interrupt-map = &lt;</div><div class='add'>+			/* IDSEL 0x0 */</div><div class='add'>+			0000 0 0 1 &amp;mpic 40 1 0 0</div><div class='add'>+			0000 0 0 2 &amp;mpic 1 1 0 0</div><div class='add'>+			0000 0 0 3 &amp;mpic 2 1 0 0</div><div class='add'>+			0000 0 0 4 &amp;mpic 3 1 0 0</div><div class='add'>+			&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pci1 {</div><div class='add'>+	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";</div><div class='add'>+	device_type = "pci";</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	bus-range = &lt;0 0xff&gt;;</div><div class='add'>+	interrupts = &lt;21 2 0 0&gt;;</div><div class='add'>+	fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+	pcie@0 {</div><div class='add'>+		reg = &lt;0 0 0 0 0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupts = &lt;21 2 0 0&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0xf800 0 0 7&gt;;</div><div class='add'>+		interrupt-map = &lt;</div><div class='add'>+			/* IDSEL 0x0 */</div><div class='add'>+			0000 0 0 1 &amp;mpic 41 1 0 0</div><div class='add'>+			0000 0 0 2 &amp;mpic 5 1 0 0</div><div class='add'>+			0000 0 0 3 &amp;mpic 6 1 0 0</div><div class='add'>+			0000 0 0 4 &amp;mpic 7 1 0 0</div><div class='add'>+			&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pci2 {</div><div class='add'>+	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";</div><div class='add'>+	device_type = "pci";</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+	interrupts = &lt;22 2 0 0&gt;;</div><div class='add'>+	fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+	pcie@0 {</div><div class='add'>+		reg = &lt;0 0 0 0 0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupts = &lt;22 2 0 0&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0xf800 0 0 7&gt;;</div><div class='add'>+		interrupt-map = &lt;</div><div class='add'>+			/* IDSEL 0x0 */</div><div class='add'>+			0000 0 0 1 &amp;mpic 42 1 0 0</div><div class='add'>+			0000 0 0 2 &amp;mpic 9 1 0 0</div><div class='add'>+			0000 0 0 3 &amp;mpic 10 1 0 0</div><div class='add'>+			0000 0 0 4 &amp;mpic 11 1 0 0</div><div class='add'>+			&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcsr {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "fsl,dcsr", "simple-bus";</div><div class='add'>+</div><div class='add'>+	dcsr-epu@0 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu";</div><div class='add'>+		interrupts = &lt;52 2 0 0</div><div class='add'>+			      84 2 0 0</div><div class='add'>+			      85 2 0 0&gt;;</div><div class='add'>+		reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-npc {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc";</div><div class='add'>+		reg = &lt;0x1000 0x1000 0x1002000 0x10000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-nxc@2000 {</div><div class='add'>+		compatible = "fsl,dcsr-nxc";</div><div class='add'>+		reg = &lt;0x2000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-corenet {</div><div class='add'>+		compatible = "fsl,dcsr-corenet";</div><div class='add'>+		reg = &lt;0x8000 0x1000 0x1A000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-ocn@11000 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn";</div><div class='add'>+		reg = &lt;0x11000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-ddr@12000 {</div><div class='add'>+		compatible = "fsl,dcsr-ddr";</div><div class='add'>+		dev-handle = &lt;&amp;ddr1&gt;;</div><div class='add'>+		reg = &lt;0x12000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-nal@18000 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal";</div><div class='add'>+		reg = &lt;0x18000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-rcpm@22000 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm";</div><div class='add'>+		reg = &lt;0x22000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-snpc@30000 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";</div><div class='add'>+		reg = &lt;0x30000 0x1000 0x1022000 0x10000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-snpc@31000 {</div><div class='add'>+		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";</div><div class='add'>+		reg = &lt;0x31000 0x1000 0x1042000 0x10000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-cpu-sb-proxy@100000 {</div><div class='add'>+		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";</div><div class='add'>+		cpu-handle = &lt;&amp;cpu0&gt;;</div><div class='add'>+		reg = &lt;0x100000 0x1000 0x101000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dcsr-cpu-sb-proxy@108000 {</div><div class='add'>+		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";</div><div class='add'>+		cpu-handle = &lt;&amp;cpu1&gt;;</div><div class='add'>+		reg = &lt;0x108000 0x1000 0x109000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	device_type = "soc";</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	soc-sram-error {</div><div class='add'>+		compatible = "fsl,soc-sram-error";</div><div class='add'>+		interrupts = &lt;16 2 1 29&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	corenet-law@0 {</div><div class='add'>+		compatible = "fsl,corenet-law";</div><div class='add'>+		reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+		fsl,num-laws = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ddr1: memory-controller@8000 {</div><div class='add'>+		compatible = "fsl,qoriq-memory-controller-v5.0",</div><div class='add'>+				"fsl,qoriq-memory-controller";</div><div class='add'>+		reg = &lt;0x8000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;16 2 1 23&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpc: l3-cache-controller@10000 {</div><div class='add'>+		compatible = "fsl,t1023-l3-cache-controller", "cache";</div><div class='add'>+		reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;16 2 1 27&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	corenet-cf@18000 {</div><div class='add'>+		compatible = "fsl,corenet2-cf";</div><div class='add'>+		reg = &lt;0x18000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;16 2 1 31&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iommu@20000 {</div><div class='add'>+		compatible = "fsl,pamu-v1.0", "fsl,pamu";</div><div class='add'>+		reg = &lt;0x20000 0x1000&gt;;</div><div class='add'>+		ranges = &lt;0 0x20000 0x1000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;</div><div class='add'>+			24 2 0 0</div><div class='add'>+			16 2 1 30&gt;;</div><div class='add'>+		pamu0: pamu@0 {</div><div class='add'>+			reg = &lt;0 0x1000&gt;;</div><div class='add'>+			fsl,primary-cache-geometry = &lt;128 1&gt;;</div><div class='add'>+			fsl,secondary-cache-geometry = &lt;32 2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+/include/ "qoriq-mpic.dtsi"</div><div class='add'>+</div><div class='add'>+	guts: global-utilities@e0000 {</div><div class='add'>+		compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0";</div><div class='add'>+		reg = &lt;0xe0000 0xe00&gt;;</div><div class='add'>+		fsl,has-rstcr;</div><div class='add'>+		fsl,liodn-bits = &lt;12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+/include/ "qoriq-clockgen2.dtsi"</div><div class='add'>+	global-utilities@e1000 {</div><div class='add'>+		compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";</div><div class='add'>+		mux0: mux0@0 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0 4&gt;;</div><div class='add'>+			compatible = "fsl,core-mux-clock";</div><div class='add'>+			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;;</div><div class='add'>+			clock-names = "pll0_0", "pll0_1";</div><div class='add'>+			clock-output-names = "cmux0";</div><div class='add'>+		};</div><div class='add'>+		mux1: mux1@20 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x20 4&gt;;</div><div class='add'>+			compatible = "fsl,core-mux-clock";</div><div class='add'>+			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;;</div><div class='add'>+			clock-names = "pll0_0", "pll0_1";</div><div class='add'>+			clock-output-names = "cmux1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rcpm: global-utilities@e2000 {</div><div class='add'>+		compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.0";</div><div class='add'>+		reg = &lt;0xe2000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sfp: sfp@e8000 {</div><div class='add'>+		compatible = "fsl,t1023-sfp";</div><div class='add'>+		reg = &lt;0xe8000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes: serdes@ea000 {</div><div class='add'>+		compatible = "fsl,t1023-serdes";</div><div class='add'>+		reg = &lt;0xea000 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scfg: global-utilities@fc000 {</div><div class='add'>+		compatible = "fsl,t1023-scfg";</div><div class='add'>+		reg = &lt;0xfc000 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+/include/ "elo3-dma-0.dtsi"</div><div class='add'>+/include/ "elo3-dma-1.dtsi"</div><div class='add'>+</div><div class='add'>+/include/ "qoriq-espi-0.dtsi"</div><div class='add'>+	spi@110000 {</div><div class='add'>+		fsl,espi-num-chipselects = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+/include/ "qoriq-esdhc-0.dtsi"</div><div class='add'>+	sdhc@114000 {</div><div class='add'>+		compatible = "fsl,t1023-esdhc", "fsl,esdhc";</div><div class='add'>+		fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+		fsl,liodn-reg = &lt;&amp;guts 0x530&gt;; /* eSDHCLIODNR */</div><div class='add'>+		sdhci,auto-cmd12;</div><div class='add'>+		no-1-8-v;</div><div class='add'>+	};</div><div class='add'>+/include/ "qoriq-i2c-0.dtsi"</div><div class='add'>+/include/ "qoriq-i2c-1.dtsi"</div><div class='add'>+/include/ "qoriq-duart-0.dtsi"</div><div class='add'>+/include/ "qoriq-duart-1.dtsi"</div><div class='add'>+/include/ "qoriq-gpio-0.dtsi"</div><div class='add'>+/include/ "qoriq-gpio-1.dtsi"</div><div class='add'>+/include/ "qoriq-gpio-2.dtsi"</div><div class='add'>+/include/ "qoriq-gpio-3.dtsi"</div><div class='add'>+/include/ "qoriq-usb2-mph-0.dtsi"</div><div class='add'>+	usb0: usb@210000 {</div><div class='add'>+		compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";</div><div class='add'>+		fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+		fsl,liodn-reg = &lt;&amp;guts 0x520&gt;; /* USB1LIODNR */</div><div class='add'>+		phy_type = "utmi";</div><div class='add'>+		port0;</div><div class='add'>+	};</div><div class='add'>+/include/ "qoriq-usb2-dr-0.dtsi"</div><div class='add'>+	usb1: usb@211000 {</div><div class='add'>+		compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";</div><div class='add'>+		fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+		fsl,liodn-reg = &lt;&amp;guts 0x524&gt;; /* USB2LIODNR */</div><div class='add'>+		dr_mode = "host";</div><div class='add'>+		phy_type = "utmi";</div><div class='add'>+	};</div><div class='add'>+/include/ "qoriq-sata2-0.dtsi"</div><div class='add'>+	sata@220000 {</div><div class='add'>+		fsl,iommu-parent = &lt;&amp;pamu0&gt;;</div><div class='add'>+		fsl,liodn-reg = &lt;&amp;guts 0x550&gt;; /* SATA1LIODNR */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+/include/ "qoriq-sec5.0-0.dtsi"</div><div class='add'>+};</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi<br/>new file mode 100644<br/>index 000000000000..95e3af8d768e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1024si-post.dtsi</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+/*</div><div class='add'>+ * T1024 Silicon/SoC Device Tree Source (post include)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *       notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *       notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *       documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *       names of its contributors may be used to endorse or promote products</div><div class='add'>+ *       derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "t1023si-post.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		vga = &amp;display;</div><div class='add'>+		display = &amp;display;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qe:qe@ffe140000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		device_type = "qe";</div><div class='add'>+		compatible = "fsl,qe";</div><div class='add'>+		ranges = &lt;0x0 0xf 0xfe140000 0x40000&gt;;</div><div class='add'>+		reg = &lt;0xf 0xfe140000 0 0x480&gt;;</div><div class='add'>+		fsl,qe-num-riscs = &lt;1&gt;;</div><div class='add'>+		fsl,qe-num-snums = &lt;28&gt;;</div><div class='add'>+		brg-frequency = &lt;0&gt;;</div><div class='add'>+		bus-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	display:display@180000 {</div><div class='add'>+		compatible = "fsl,t1024-diu", "fsl,diu";</div><div class='add'>+		reg = &lt;0x180000 1000&gt;;</div><div class='add'>+		interrupts = &lt;74 2 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qe {</div><div class='add'>+	qeic: interrupt-controller@80 {</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		compatible = "fsl,qe-ic";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x80 0x80&gt;;</div><div class='add'>+		interrupts = &lt;95 2 0 0  94 2 0 0&gt;; //high:79 low:78</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ucc@2000 {</div><div class='add'>+		cell-index = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x2000 0x200&gt;;</div><div class='add'>+		interrupts = &lt;32&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;qeic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ucc@2200 {</div><div class='add'>+		cell-index = &lt;3&gt;;</div><div class='add'>+		reg = &lt;0x2200 0x200&gt;;</div><div class='add'>+		interrupts = &lt;34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;qeic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	muram@10000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "fsl,qe-muram", "fsl,cpm-muram";</div><div class='add'>+		ranges = &lt;0x0 0x10000 0x6000&gt;;</div><div class='add'>+</div><div class='add'>+		data-only@0 {</div><div class='add'>+			compatible = "fsl,qe-muram-data", "fsl,cpm-muram-data";</div><div class='add'>+			reg = &lt;0x0 0x6000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi<br/>new file mode 100644<br/>index 000000000000..1f1a9f8474d5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+/*</div><div class='add'>+ * T1024/T1023 Silicon/SoC Device Tree Source (pre include)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *	 documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *	 names of its contributors may be used to endorse or promote products</div><div class='add'>+ *	 derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "e5500_power_isa.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ccsr = &amp;soc;</div><div class='add'>+		dcsr = &amp;dcsr;</div><div class='add'>+</div><div class='add'>+		dma0 = &amp;dma0;</div><div class='add'>+		dma1 = &amp;dma1;</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial1 = &amp;serial1;</div><div class='add'>+		serial2 = &amp;serial2;</div><div class='add'>+		serial3 = &amp;serial3;</div><div class='add'>+		pci0 = &amp;pci0;</div><div class='add'>+		pci1 = &amp;pci1;</div><div class='add'>+		pci2 = &amp;pci2;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='add'>+		sdhc = &amp;sdhc;</div><div class='add'>+</div><div class='add'>+		crypto = &amp;crypto;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: PowerPC,e5500@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;mux0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			L2_1: l2-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;cpc&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu1: PowerPC,e5500@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;mux1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='add'>+			L2_2: l2-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;cpc&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi<br/>index 5cc01be5b152..9e9f7e201d43 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/t1040si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t1040si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ifc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -280,6 +290,73 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	#address-cells = &lt;0x1&gt;;</div><div class='add'>+	#size-cells = &lt;0x1&gt;;</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	qportal0: qman-portal@0 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x0 0x4000&gt;, &lt;0x1000000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;104 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal1: qman-portal@4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4000 0x4000&gt;, &lt;0x1001000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;106 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal2: qman-portal@8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;, &lt;0x1002000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;108 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal3: qman-portal@c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc000 0x4000&gt;, &lt;0x1003000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;110 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x3&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal4: qman-portal@10000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x10000 0x4000&gt;, &lt;0x1004000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;112 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal5: qman-portal@14000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x14000 0x4000&gt;, &lt;0x1005000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;114 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x5&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal6: qman-portal@18000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x18000 0x4000&gt;, &lt;0x1006000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;116 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x6&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal7: qman-portal@1c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x1c000 0x4000&gt;, &lt;0x1007000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;118 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x7&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal8: qman-portal@20000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x20000 0x4000&gt;, &lt;0x1008000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;120 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal9: qman-portal@24000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x24000 0x4000&gt;, &lt;0x1009000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;122 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x9&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -463,5 +540,6 @@</div><div class='ctx'> 		fsl,liodn-reg = &lt;&amp;guts 0x554&gt;; /* SATA2LIODNR */</div><div class='ctx'> 	};</div><div class='ctx'> /include/ "qoriq-sec5.0-0.dtsi"</div><div class='add'>+/include/ "qoriq-qman3.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi<br/>index 86bdaf6cbd14..32c790ae7fde 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/t2081si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t2081si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ifc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -326,6 +336,121 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	#address-cells = &lt;0x1&gt;;</div><div class='add'>+	#size-cells = &lt;0x1&gt;;</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	qportal0: qman-portal@0 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x0 0x4000&gt;, &lt;0x1000000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;104 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal1: qman-portal@4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4000 0x4000&gt;, &lt;0x1001000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;106 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal2: qman-portal@8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;, &lt;0x1002000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;108 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal3: qman-portal@c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc000 0x4000&gt;, &lt;0x1003000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;110 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x3&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal4: qman-portal@10000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x10000 0x4000&gt;, &lt;0x1004000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;112 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal5: qman-portal@14000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x14000 0x4000&gt;, &lt;0x1005000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;114 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x5&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal6: qman-portal@18000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x18000 0x4000&gt;, &lt;0x1006000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;116 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x6&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal7: qman-portal@1c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x1c000 0x4000&gt;, &lt;0x1007000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;118 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x7&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal8: qman-portal@20000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x20000 0x4000&gt;, &lt;0x1008000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;120 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal9: qman-portal@24000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x24000 0x4000&gt;, &lt;0x1009000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;122 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x9&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal10: qman-portal@28000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x28000 0x4000&gt;, &lt;0x100a000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;124 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xa&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal11: qman-portal@2c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x2c000 0x4000&gt;, &lt;0x100b000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;126 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xb&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal12: qman-portal@30000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x30000 0x4000&gt;, &lt;0x100c000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;128 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xc&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal13: qman-portal@34000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x34000 0x4000&gt;, &lt;0x100d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;130 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xd&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal14: qman-portal@38000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x38000 0x4000&gt;, &lt;0x100e000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;132 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xe&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal15: qman-portal@3c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x3c000 0x4000&gt;, &lt;0x100f000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;134 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xf&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal16: qman-portal@40000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x40000 0x4000&gt;, &lt;0x1010000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;136 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal17: qman-portal@44000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x44000 0x4000&gt;, &lt;0x1011000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;138 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x11&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -417,7 +542,7 @@</div><div class='ctx'> 			compatible = "fsl,qoriq-core-mux-2.0";</div><div class='ctx'> 			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;, &lt;&amp;pll0 2&gt;,</div><div class='ctx'> 				 &lt;&amp;pll1 0&gt;, &lt;&amp;pll1 1&gt;, &lt;&amp;pll1 2&gt;;</div><div class='del'>-			clock-names = "pll0", "pll0-div2", "pll1-div4",</div><div class='add'>+			clock-names = "pll0", "pll0-div2", "pll0-div4",</div><div class='ctx'> 				"pll1", "pll1-div2", "pll1-div4";</div><div class='ctx'> 			clock-output-names = "cmux0";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -428,7 +553,7 @@</div><div class='ctx'> 			compatible = "fsl,qoriq-core-mux-2.0";</div><div class='ctx'> 			clocks = &lt;&amp;pll0 0&gt;, &lt;&amp;pll0 1&gt;, &lt;&amp;pll0 2&gt;,</div><div class='ctx'> 				 &lt;&amp;pll1 0&gt;, &lt;&amp;pll1 1&gt;, &lt;&amp;pll1 2&gt;;</div><div class='del'>-			clock-names = "pll0", "pll0-div2", "pll1-div4",</div><div class='add'>+			clock-names = "pll0", "pll0-div2", "pll0-div4",</div><div class='ctx'> 				"pll1", "pll1-div2", "pll1-div4";</div><div class='ctx'> 			clock-output-names = "cmux1";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -502,6 +627,7 @@</div><div class='ctx'> 		phy_type = "utmi";</div><div class='ctx'> 	};</div><div class='ctx'> /include/ "qoriq-sec5.2-0.dtsi"</div><div class='add'>+/include/ "qoriq-qman3.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> </div><div class='ctx'> 	L2_1: l2-cache-controller@c20000 {</div><div class='head'>diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi<br/>index 4d4f25895d8c..d806360d0f64 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/fsl/t4240si-post.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/fsl/t4240si-post.dtsi</a></div><div class='hunk'>@@ -37,6 +37,16 @@</div><div class='ctx'> 	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qman_fqd {</div><div class='add'>+	compatible = "fsl,qman-fqd";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qman_pfdr {</div><div class='add'>+	compatible = "fsl,qman-pfdr";</div><div class='add'>+	alloc-ranges = &lt;0 0 0x10000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ifc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -556,6 +566,313 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qportals {</div><div class='add'>+	#address-cells = &lt;0x1&gt;;</div><div class='add'>+	#size-cells = &lt;0x1&gt;;</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+	qportal0: qman-portal@0 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x0 0x4000&gt;, &lt;0x1000000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;104 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal1: qman-portal@4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4000 0x4000&gt;, &lt;0x1001000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;106 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal2: qman-portal@8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8000 0x4000&gt;, &lt;0x1002000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;108 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal3: qman-portal@c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc000 0x4000&gt;, &lt;0x1003000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;110 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x3&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal4: qman-portal@10000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x10000 0x4000&gt;, &lt;0x1004000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;112 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal5: qman-portal@14000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x14000 0x4000&gt;, &lt;0x1005000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;114 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x5&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal6: qman-portal@18000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x18000 0x4000&gt;, &lt;0x1006000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;116 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x6&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal7: qman-portal@1c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x1c000 0x4000&gt;, &lt;0x1007000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;118 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x7&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal8: qman-portal@20000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x20000 0x4000&gt;, &lt;0x1008000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;120 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal9: qman-portal@24000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x24000 0x4000&gt;, &lt;0x1009000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;122 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x9&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal10: qman-portal@28000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x28000 0x4000&gt;, &lt;0x100a000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;124 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xa&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal11: qman-portal@2c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x2c000 0x4000&gt;, &lt;0x100b000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;126 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xb&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal12: qman-portal@30000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x30000 0x4000&gt;, &lt;0x100c000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;128 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xc&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal13: qman-portal@34000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x34000 0x4000&gt;, &lt;0x100d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;130 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xd&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal14: qman-portal@38000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x38000 0x4000&gt;, &lt;0x100e000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;132 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xe&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal15: qman-portal@3c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x3c000 0x4000&gt;, &lt;0x100f000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;134 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0xf&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal16: qman-portal@40000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x40000 0x4000&gt;, &lt;0x1010000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;136 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal17: qman-portal@44000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x44000 0x4000&gt;, &lt;0x1011000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;138 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x11&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal18: qman-portal@48000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x48000 0x4000&gt;, &lt;0x1012000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;140 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x12&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal19: qman-portal@4c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x4c000 0x4000&gt;, &lt;0x1013000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;142 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x13&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal20: qman-portal@50000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x50000 0x4000&gt;, &lt;0x1014000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;144 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x14&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal21: qman-portal@54000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x54000 0x4000&gt;, &lt;0x1015000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;146 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x15&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal22: qman-portal@58000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x58000 0x4000&gt;, &lt;0x1016000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;148 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x16&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal23: qman-portal@5c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x5c000 0x4000&gt;, &lt;0x1017000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;150 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x17&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal24: qman-portal@60000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x60000 0x4000&gt;, &lt;0x1018000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;152 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x18&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal25: qman-portal@64000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x64000 0x4000&gt;, &lt;0x1019000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;154 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x19&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal26: qman-portal@68000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x68000 0x4000&gt;, &lt;0x101a000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;156 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1a&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal27: qman-portal@6c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x6c000 0x4000&gt;, &lt;0x101b000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;158 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1b&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal28: qman-portal@70000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x70000 0x4000&gt;, &lt;0x101c000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;160 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1c&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal29: qman-portal@74000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x74000 0x4000&gt;, &lt;0x101d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;162 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1d&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal30: qman-portal@78000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x78000 0x4000&gt;, &lt;0x101e000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;164 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1e&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal31: qman-portal@7c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x7c000 0x4000&gt;, &lt;0x101f000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;166 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x1f&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal32: qman-portal@80000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x80000 0x4000&gt;, &lt;0x1020000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;168 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x20&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal33: qman-portal@84000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x84000 0x4000&gt;, &lt;0x1021000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;170 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x21&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal34: qman-portal@88000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x88000 0x4000&gt;, &lt;0x1022000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;172 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x22&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal35: qman-portal@8c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x8c000 0x4000&gt;, &lt;0x1023000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;174 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x23&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal36: qman-portal@90000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x90000 0x4000&gt;, &lt;0x1024000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;384 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x24&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal37: qman-portal@94000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x94000 0x4000&gt;, &lt;0x1025000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;386 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x25&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal38: qman-portal@98000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x98000 0x4000&gt;, &lt;0x1026000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;388 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x26&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal39: qman-portal@9c000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0x9c000 0x4000&gt;, &lt;0x1027000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;390 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x27&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal40: qman-portal@a0000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xa0000 0x4000&gt;, &lt;0x1028000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;392 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x28&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal41: qman-portal@a4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xa4000 0x4000&gt;, &lt;0x1029000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;394 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x29&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal42: qman-portal@a8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xa8000 0x4000&gt;, &lt;0x102a000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;396 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2a&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal43: qman-portal@ac000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xac000 0x4000&gt;, &lt;0x102b000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;398 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2b&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal44: qman-portal@b0000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xb0000 0x4000&gt;, &lt;0x102c000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;400 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal45: qman-portal@b4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xb4000 0x4000&gt;, &lt;0x102d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;402 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2d&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal46: qman-portal@b8000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xb8000 0x4000&gt;, &lt;0x102e000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;404 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2e&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal47: qman-portal@bc000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xbc000 0x4000&gt;, &lt;0x102f000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;406 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x2f&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal48: qman-portal@c0000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc0000 0x4000&gt;, &lt;0x1030000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;408 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x30&gt;;</div><div class='add'>+	};</div><div class='add'>+	qportal49: qman-portal@c4000 {</div><div class='add'>+		compatible = "fsl,qman-portal";</div><div class='add'>+		reg = &lt;0xc4000 0x4000&gt;, &lt;0x1031000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;410 0x2 0 0&gt;;</div><div class='add'>+		cell-index = &lt;0x31&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -748,6 +1065,7 @@</div><div class='ctx'> /include/ "qoriq-sata2-0.dtsi"</div><div class='ctx'> /include/ "qoriq-sata2-1.dtsi"</div><div class='ctx'> /include/ "qoriq-sec5.0-0.dtsi"</div><div class='add'>+/include/ "qoriq-qman3.dtsi"</div><div class='ctx'> /include/ "qoriq-bman1.dtsi"</div><div class='ctx'> </div><div class='ctx'> 	L2_1: l2-cache-controller@c20000 {</div><div class='head'>diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/kmcoge4.dts<br/>index 97e6d11d1e6d..48dab6a50437 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/kmcoge4.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/kmcoge4.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/kmcoge4.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/kmcoge4.dts</a></div><div class='hunk'>@@ -34,6 +34,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -44,6 +52,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/oca4080.dts b/arch/powerpc/boot/dts/oca4080.dts<br/>index eb76caae11d9..42796c5b0561 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/oca4080.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/oca4080.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/oca4080.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/oca4080.dts</a></div><div class='hunk'>@@ -58,6 +58,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -68,6 +76,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/p1023rdb.dts<br/>index 9236e3742a23..05a00a4d2861 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p1023rdb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p1023rdb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p1023rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p1023rdb.dts</a></div><div class='hunk'>@@ -56,6 +56,18 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qportals: qman-portals@ff000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xff000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	bportals: bman-portals@ff200000 {</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts<br/>index c1e69dc7188e..d2bb0765bd5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p2041rdb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p2041rdb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p2041rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p2041rdb.dts</a></div><div class='hunk'>@@ -54,6 +54,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -64,6 +72,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts<br/>index 2192fe94866d..eca6c697cfd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p3041ds.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p3041ds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p3041ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p3041ds.dts</a></div><div class='hunk'>@@ -54,6 +54,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -64,6 +72,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts<br/>index fad441654642..4f80c9d02c27 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p4080ds.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p4080ds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p4080ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p4080ds.dts</a></div><div class='hunk'>@@ -54,6 +54,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -64,6 +72,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts<br/>index 7382636dc560..d0309a8b9749 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p5020ds.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p5020ds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p5020ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p5020ds.dts</a></div><div class='hunk'>@@ -54,6 +54,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -64,6 +72,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts<br/>index 35dabf5b6098..05168236d3ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p5040ds.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/p5040ds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/p5040ds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/p5040ds.dts</a></div><div class='hunk'>@@ -54,6 +54,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -64,6 +72,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff4200000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf4200000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t1023rdb.dts b/arch/powerpc/boot/dts/t1023rdb.dts<br/>new file mode 100644<br/>index 000000000000..06b090aba066<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t1023rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1023rdb.dts</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+/*</div><div class='add'>+ * T1023 RDB Device Tree Source</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *	 documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *	 names of its contributors may be used to endorse or promote products</div><div class='add'>+ *	 derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t102xsi-pre.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "fsl,T1023RDB";</div><div class='add'>+	compatible = "fsl,T1023RDB";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='add'>+</div><div class='add'>+	ifc: localbus@ffe124000 {</div><div class='add'>+		reg = &lt;0xf 0xfe124000 0 0x2000&gt;;</div><div class='add'>+		ranges = &lt;0 0 0xf 0xe8000000 0x08000000</div><div class='add'>+			  1 0 0xf 0xff800000 0x00010000&gt;;</div><div class='add'>+</div><div class='add'>+		nor@0,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			compatible = "cfi-flash";</div><div class='add'>+			reg = &lt;0x0 0x0 0x8000000&gt;;</div><div class='add'>+			bank-width = &lt;2&gt;;</div><div class='add'>+			device-width = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@1,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "fsl,ifc-nand";</div><div class='add'>+			reg = &lt;0x2 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcsr: dcsr@f00000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0x00000000 0x01072000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@ffe000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='add'>+		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='add'>+		spi@110000 {</div><div class='add'>+			flash@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "spansion,s25fl512s";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				spi-max-frequency = &lt;10000000&gt;; /* input clk */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@118000 {</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "st,m24256";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@68 {</div><div class='add'>+				compatible = "dallas,ds1339";</div><div class='add'>+				reg = &lt;0x68&gt;;</div><div class='add'>+				interrupts = &lt;0x5 0x1 0 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@118100 {</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci0: pcie@ffe240000 {</div><div class='add'>+		reg = &lt;0xf 0xfe240000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci1: pcie@ffe250000 {</div><div class='add'>+		reg = &lt;0xf 0xfe250000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci2: pcie@ffe260000 {</div><div class='add'>+		reg = &lt;0xf 0xfe260000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t1023si-post.dtsi"</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t1024qds.dts b/arch/powerpc/boot/dts/t1024qds.dts<br/>new file mode 100644<br/>index 000000000000..f31fabb383b9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t1024qds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1024qds.dts</a></div><div class='hunk'>@@ -0,0 +1,251 @@</div><div class='add'>+/*</div><div class='add'>+ * T1024 QDS Device Tree Source</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *	 documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *	 names of its contributors may be used to endorse or promote products</div><div class='add'>+ *	 derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t102xsi-pre.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "fsl,T1024QDS";</div><div class='add'>+	compatible = "fsl,T1024QDS";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='add'>+</div><div class='add'>+	ifc: localbus@ffe124000 {</div><div class='add'>+		reg = &lt;0xf 0xfe124000 0 0x2000&gt;;</div><div class='add'>+		ranges = &lt;0 0 0xf 0xe8000000 0x08000000</div><div class='add'>+			  2 0 0xf 0xff800000 0x00010000</div><div class='add'>+			  3 0 0xf 0xffdf0000 0x00008000&gt;;</div><div class='add'>+</div><div class='add'>+		nor@0,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "cfi-flash";</div><div class='add'>+			reg = &lt;0x0 0x0 0x8000000&gt;;</div><div class='add'>+			bank-width = &lt;2&gt;;</div><div class='add'>+			device-width = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@2,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "fsl,ifc-nand";</div><div class='add'>+			reg = &lt;0x2 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		board-control@3,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";</div><div class='add'>+			reg = &lt;3 0 0x300&gt;;</div><div class='add'>+			ranges = &lt;0 3 0 0x300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcsr: dcsr@f00000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0x00000000 0x01072000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@ffe000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='add'>+		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='add'>+		spi@110000 {</div><div class='add'>+			flash@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "micron,n25q128a11";  /* 16MB */</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flash@1 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "sst,sst25wf040";  /* 512KB */</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flash@2 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "eon,en25s64";   /* 8MB */</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slic@2 {</div><div class='add'>+				compatible = "maxim,ds26522";</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slic@3 {</div><div class='add'>+				compatible = "maxim,ds26522";</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@118000 {</div><div class='add'>+			pca9547@77 {</div><div class='add'>+				compatible = "nxp,pca9547";</div><div class='add'>+				reg = &lt;0x77&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+					eeprom@50 {</div><div class='add'>+						compatible = "atmel,24c512";</div><div class='add'>+						reg = &lt;0x50&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					eeprom@51 {</div><div class='add'>+						compatible = "atmel,24c02";</div><div class='add'>+						reg = &lt;0x51&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					eeprom@57 {</div><div class='add'>+						compatible = "atmel,24c02";</div><div class='add'>+						reg = &lt;0x57&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+					ina220@40 {</div><div class='add'>+						compatible = "ti,ina220";</div><div class='add'>+						reg = &lt;0x40&gt;;</div><div class='add'>+						shunt-resistor = &lt;1000&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					ina220@41 {</div><div class='add'>+						compatible = "ti,ina220";</div><div class='add'>+						reg = &lt;0x41&gt;;</div><div class='add'>+						shunt-resistor = &lt;1000&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x3&gt;;</div><div class='add'>+</div><div class='add'>+					adt7461@4c {</div><div class='add'>+						/* Thermal Monitor */</div><div class='add'>+						compatible = "adi,adt7461";</div><div class='add'>+						reg = &lt;0x4c&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					eeprom@55 {</div><div class='add'>+						compatible = "atmel,24c02";</div><div class='add'>+						reg = &lt;0x55&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					eeprom@56 {</div><div class='add'>+						compatible = "atmel,24c512";</div><div class='add'>+						reg = &lt;0x56&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					eeprom@57 {</div><div class='add'>+						compatible = "atmel,24c512";</div><div class='add'>+						reg = &lt;0x57&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			rtc@68 {</div><div class='add'>+				compatible = "dallas,ds3232";</div><div class='add'>+				reg = &lt;0x68&gt;;</div><div class='add'>+				interrupts = &lt;0x5 0x1 0 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci0: pcie@ffe240000 {</div><div class='add'>+		reg = &lt;0xf 0xfe240000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci1: pcie@ffe250000 {</div><div class='add'>+		reg = &lt;0xf 0xfe250000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci2: pcie@ffe260000 {</div><div class='add'>+		reg = &lt;0xf 0xfe260000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t1024si-post.dtsi"</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t1024rdb.dts b/arch/powerpc/boot/dts/t1024rdb.dts<br/>new file mode 100644<br/>index 000000000000..733e723ffed6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t1024rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t1024rdb.dts</a></div><div class='hunk'>@@ -0,0 +1,185 @@</div><div class='add'>+/*</div><div class='add'>+ * T1024 RDB Device Tree Source</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2014 Freescale Semiconductor Inc.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions are met:</div><div class='add'>+ *     * Redistributions of source code must retain the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *     * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *	 notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *	 documentation and/or other materials provided with the distribution.</div><div class='add'>+ *     * Neither the name of Freescale Semiconductor nor the</div><div class='add'>+ *	 names of its contributors may be used to endorse or promote products</div><div class='add'>+ *	 derived from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this software may be distributed under the terms of the</div><div class='add'>+ * GNU General Public License ("GPL") as published by the Free Software</div><div class='add'>+ * Foundation, either version 2 of that License or (at your option) any</div><div class='add'>+ * later version.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY</div><div class='add'>+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</div><div class='add'>+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY</div><div class='add'>+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='add'>+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='add'>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='add'>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='add'>+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t102xsi-pre.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "fsl,T1024RDB";</div><div class='add'>+	compatible = "fsl,T1024RDB";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='add'>+</div><div class='add'>+	ifc: localbus@ffe124000 {</div><div class='add'>+		reg = &lt;0xf 0xfe124000 0 0x2000&gt;;</div><div class='add'>+		ranges = &lt;0 0 0xf 0xe8000000 0x08000000</div><div class='add'>+			  2 0 0xf 0xff800000 0x00010000</div><div class='add'>+			  3 0 0xf 0xffdf0000 0x00008000&gt;;</div><div class='add'>+</div><div class='add'>+		nor@0,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "cfi-flash";</div><div class='add'>+			reg = &lt;0x0 0x0 0x8000000&gt;;</div><div class='add'>+			bank-width = &lt;2&gt;;</div><div class='add'>+			device-width = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@1,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "fsl,ifc-nand";</div><div class='add'>+			reg = &lt;0x2 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		board-control@2,0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "fsl,t1024-cpld";</div><div class='add'>+			reg = &lt;3 0 0x300&gt;;</div><div class='add'>+			ranges = &lt;0 3 0 0x300&gt;;</div><div class='add'>+			bank-width = &lt;1&gt;;</div><div class='add'>+			device-width = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcsr: dcsr@f00000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0x00000000 0x01072000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@ffe000000 {</div><div class='add'>+		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='add'>+		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='add'>+		spi@110000 {</div><div class='add'>+			flash@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "micron,n25q512ax3";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				spi-max-frequency = &lt;10000000&gt;; /* input clk */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slic@1 {</div><div class='add'>+				compatible = "maxim,ds26522";</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slic@2 {</div><div class='add'>+				compatible = "maxim,ds26522";</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@118000 {</div><div class='add'>+			adt7461@4c {</div><div class='add'>+				/* Thermal Monitor */</div><div class='add'>+				compatible = "adi,adt7461";</div><div class='add'>+				reg = &lt;0x4c&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c256";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@68 {</div><div class='add'>+				compatible = "dallas,ds1339";</div><div class='add'>+				reg = &lt;0x68&gt;;</div><div class='add'>+				interrupts = &lt;0x1 0x1 0 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@118100 {</div><div class='add'>+			pca9546@77 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				reg = &lt;0x77&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci0: pcie@ffe240000 {</div><div class='add'>+		reg = &lt;0xf 0xfe240000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci1: pcie@ffe250000 {</div><div class='add'>+		reg = &lt;0xf 0xfe250000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pci2: pcie@ffe260000 {</div><div class='add'>+		reg = &lt;0xf 0xfe260000 0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000</div><div class='add'>+			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000&gt;;</div><div class='add'>+		pcie@0 {</div><div class='add'>+			ranges = &lt;0x02000000 0 0xe0000000</div><div class='add'>+				  0x02000000 0 0xe0000000</div><div class='add'>+				  0 0x10000000</div><div class='add'>+</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0x01000000 0 0x00000000</div><div class='add'>+				  0 0x00010000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "fsl/t1024si-post.dtsi"</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t104xqds.dtsi b/arch/powerpc/boot/dts/t104xqds.dtsi<br/>index f7e9bfbeefc7..1498d1e4aecf 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t104xqds.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t104xqds.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t104xqds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t104xqds.dtsi</a></div><div class='hunk'>@@ -47,6 +47,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ifc: localbus@ffe124000 {</div><div class='hunk'>@@ -92,6 +100,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t104xrdb.dtsi b/arch/powerpc/boot/dts/t104xrdb.dtsi<br/>index 76e07a3f2ca8..830ea484295b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t104xrdb.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t104xrdb.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t104xrdb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t104xrdb.dtsi</a></div><div class='hunk'>@@ -42,6 +42,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ifc: localbus@ffe124000 {</div><div class='hunk'>@@ -83,6 +91,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t208xqds.dtsi b/arch/powerpc/boot/dts/t208xqds.dtsi<br/>index c42e07f4f648..869f9159b4d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t208xqds.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t208xqds.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t208xqds.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t208xqds.dtsi</a></div><div class='hunk'>@@ -48,6 +48,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ifc: localbus@ffe124000 {</div><div class='hunk'>@@ -93,6 +101,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t208xrdb.dtsi b/arch/powerpc/boot/dts/t208xrdb.dtsi<br/>index e1463b165d0e..693d2a8fa01c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t208xrdb.dtsi?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t208xrdb.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t208xrdb.dtsi?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t208xrdb.dtsi</a></div><div class='hunk'>@@ -48,6 +48,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ifc: localbus@ffe124000 {</div><div class='hunk'>@@ -94,6 +102,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts<br/>index 6df77766410b..93722da10e16 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t4240qds.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t4240qds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t4240qds.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t4240qds.dts</a></div><div class='hunk'>@@ -109,6 +109,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -119,6 +127,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts<br/>index 46049cf37f02..993eb4b8a487 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t4240rdb.dts?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/dts/t4240rdb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/t4240rdb.dts?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/dts/t4240rdb.dts</a></div><div class='hunk'>@@ -78,6 +78,14 @@</div><div class='ctx'> 			size = &lt;0 0x1000000&gt;;</div><div class='ctx'> 			alignment = &lt;0 0x1000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		qman_fqd: qman-fqd {</div><div class='add'>+			size = &lt;0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		qman_pfdr: qman-pfdr {</div><div class='add'>+			size = &lt;0 0x2000000&gt;;</div><div class='add'>+			alignment = &lt;0 0x2000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dcsr: dcsr@f00000000 {</div><div class='hunk'>@@ -88,6 +96,10 @@</div><div class='ctx'> 		ranges = &lt;0x0 0xf 0xf4000000 0x2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qportals: qman-portals@ff6000000 {</div><div class='add'>+		ranges = &lt;0x0 0xf 0xf6000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@ffe000000 {</div><div class='ctx'> 		ranges = &lt;0x00000000 0xf 0xfe000000 0x1000000&gt;;</div><div class='ctx'> 		reg = &lt;0xf 0xfe000000 0 0x00001000&gt;;</div><div class='head'>diff --git a/arch/powerpc/boot/libfdt_env.h b/arch/powerpc/boot/libfdt_env.h<br/>index 8dcd744e5728..7e3789ea396b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/libfdt_env.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/libfdt_env.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/libfdt_env.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/libfdt_env.h</a></div><div class='hunk'>@@ -10,6 +10,10 @@ typedef u32 uint32_t;</div><div class='ctx'> typedef u64 uint64_t;</div><div class='ctx'> typedef unsigned long uintptr_t;</div><div class='ctx'> </div><div class='add'>+typedef __be16 fdt16_t;</div><div class='add'>+typedef __be32 fdt32_t;</div><div class='add'>+typedef __be64 fdt64_t;</div><div class='add'>+</div><div class='ctx'> #define fdt16_to_cpu(x)		be16_to_cpu(x)</div><div class='ctx'> #define cpu_to_fdt16(x)		cpu_to_be16(x)</div><div class='ctx'> #define fdt32_to_cpu(x)		be32_to_cpu(x)</div><div class='head'>diff --git a/arch/powerpc/boot/of.h b/arch/powerpc/boot/of.h<br/>index 5603320dce07..53f8f27f94e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/of.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/boot/of.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/of.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/boot/of.h</a></div><div class='hunk'>@@ -21,7 +21,9 @@ int of_setprop(const void *phandle, const char *name, const void *buf,</div><div class='ctx'> /* Console functions */</div><div class='ctx'> void of_console_init(void);</div><div class='ctx'> </div><div class='add'>+typedef u16			__be16;</div><div class='ctx'> typedef u32			__be32;</div><div class='add'>+typedef u64			__be64;</div><div class='ctx'> </div><div class='ctx'> #ifdef __LITTLE_ENDIAN__</div><div class='ctx'> #define cpu_to_be16(x) swab16(x)</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig<br/>index 34f3ea1729e0..858b539d004b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></div><div class='hunk'>@@ -108,7 +108,7 @@ CONFIG_SENSORS_LM90=y</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_MON=y</div><div class='del'>-CONFIG_USB_ISP1760_HCD=y</div><div class='add'>+CONFIG_USB_ISP1760=y</div><div class='ctx'> CONFIG_USB_STORAGE=y</div><div class='ctx'> CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='head'>diff --git a/arch/powerpc/configs/le.config b/arch/powerpc/configs/le.config<br/>new file mode 100644<br/>index 000000000000..ee43fdb3b8f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/le.config?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/le.config</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+CONFIG_CPU_LITTLE_ENDIAN=y</div><div class='head'>diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig<br/>index aad501ae3834..a97efc2146fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/ppc64_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/configs/ppc64_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/ppc64_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/ppc64_defconfig</a></div><div class='hunk'>@@ -155,6 +155,7 @@ CONFIG_ACENIC=m</div><div class='ctx'> CONFIG_ACENIC_OMIT_TIGON_I=y</div><div class='ctx'> CONFIG_PCNET32=y</div><div class='ctx'> CONFIG_TIGON3=y</div><div class='add'>+CONFIG_BNX2X=m</div><div class='ctx'> CONFIG_CHELSIO_T1=m</div><div class='ctx'> CONFIG_BE2NET=m</div><div class='ctx'> CONFIG_S2IO=m</div><div class='head'>diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig<br/>index c2e39f66b182..0d9efcedaf34 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/pseries_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/configs/pseries_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/pseries_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/configs/pseries_defconfig</a></div><div class='hunk'>@@ -154,6 +154,7 @@ CONFIG_ACENIC=m</div><div class='ctx'> CONFIG_ACENIC_OMIT_TIGON_I=y</div><div class='ctx'> CONFIG_PCNET32=y</div><div class='ctx'> CONFIG_TIGON3=y</div><div class='add'>+CONFIG_BNX2X=m</div><div class='ctx'> CONFIG_CHELSIO_T1=m</div><div class='ctx'> CONFIG_BE2NET=m</div><div class='ctx'> CONFIG_S2IO=m</div><div class='hunk'>@@ -297,7 +298,6 @@ CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='ctx'> CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='ctx'> CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='ctx'> CONFIG_XMON=y</div><div class='del'>-CONFIG_XMON_DEFAULT=y</div><div class='ctx'> CONFIG_CRYPTO_TEST=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='head'>diff --git a/arch/powerpc/configs/pseries_le_defconfig b/arch/powerpc/configs/pseries_le_defconfig<br/>deleted file mode 100644<br/>index 09bc96e792cd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/pseries_le_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/configs/pseries_le_defconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,319 +0,0 @@</div><div class='del'>-CONFIG_PPC64=y</div><div class='del'>-CONFIG_SMP=y</div><div class='del'>-CONFIG_NR_CPUS=2048</div><div class='del'>-CONFIG_CPU_LITTLE_ENDIAN=y</div><div class='del'>-CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_POSIX_MQUEUE=y</div><div class='del'>-CONFIG_FHANDLE=y</div><div class='del'>-CONFIG_AUDIT=y</div><div class='del'>-CONFIG_AUDITSYSCALL=y</div><div class='del'>-CONFIG_IRQ_DOMAIN_DEBUG=y</div><div class='del'>-CONFIG_NO_HZ=y</div><div class='del'>-CONFIG_HIGH_RES_TIMERS=y</div><div class='del'>-CONFIG_TASKSTATS=y</div><div class='del'>-CONFIG_TASK_DELAY_ACCT=y</div><div class='del'>-CONFIG_TASK_XACCT=y</div><div class='del'>-CONFIG_TASK_IO_ACCOUNTING=y</div><div class='del'>-CONFIG_IKCONFIG=y</div><div class='del'>-CONFIG_IKCONFIG_PROC=y</div><div class='del'>-CONFIG_NUMA_BALANCING=y</div><div class='del'>-CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y</div><div class='del'>-CONFIG_CGROUPS=y</div><div class='del'>-CONFIG_CGROUP_FREEZER=y</div><div class='del'>-CONFIG_CGROUP_DEVICE=y</div><div class='del'>-CONFIG_CPUSETS=y</div><div class='del'>-CONFIG_CGROUP_CPUACCT=y</div><div class='del'>-CONFIG_MEMCG=y</div><div class='del'>-CONFIG_MEMCG_SWAP=y</div><div class='del'>-CONFIG_CGROUP_PERF=y</div><div class='del'>-CONFIG_CGROUP_SCHED=y</div><div class='del'>-CONFIG_USER_NS=y</div><div class='del'>-CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-# CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_PROFILING=y</div><div class='del'>-CONFIG_OPROFILE=y</div><div class='del'>-CONFIG_KPROBES=y</div><div class='del'>-CONFIG_JUMP_LABEL=y</div><div class='del'>-CONFIG_MODULES=y</div><div class='del'>-CONFIG_MODULE_UNLOAD=y</div><div class='del'>-CONFIG_MODVERSIONS=y</div><div class='del'>-CONFIG_MODULE_SRCVERSION_ALL=y</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_PPC_SPLPAR=y</div><div class='del'>-CONFIG_SCANLOG=m</div><div class='del'>-CONFIG_PPC_SMLPAR=y</div><div class='del'>-CONFIG_DTL=y</div><div class='del'>-# CONFIG_PPC_PMAC is not set</div><div class='del'>-CONFIG_RTAS_FLASH=m</div><div class='del'>-CONFIG_IBMEBUS=y</div><div class='del'>-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y</div><div class='del'>-CONFIG_HZ_100=y</div><div class='del'>-CONFIG_BINFMT_MISC=m</div><div class='del'>-CONFIG_PPC_TRANSACTIONAL_MEM=y</div><div class='del'>-CONFIG_KEXEC=y</div><div class='del'>-CONFIG_IRQ_ALL_CPUS=y</div><div class='del'>-CONFIG_MEMORY_HOTPLUG=y</div><div class='del'>-CONFIG_MEMORY_HOTREMOVE=y</div><div class='del'>-CONFIG_KSM=y</div><div class='del'>-CONFIG_TRANSPARENT_HUGEPAGE=y</div><div class='del'>-CONFIG_PPC_64K_PAGES=y</div><div class='del'>-CONFIG_PPC_SUBPAGE_PROT=y</div><div class='del'>-CONFIG_SCHED_SMT=y</div><div class='del'>-CONFIG_HOTPLUG_PCI=y</div><div class='del'>-CONFIG_HOTPLUG_PCI_RPA=m</div><div class='del'>-CONFIG_HOTPLUG_PCI_RPA_DLPAR=m</div><div class='del'>-CONFIG_NET=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='del'>-CONFIG_XFRM_USER=m</div><div class='del'>-CONFIG_NET_KEY=m</div><div class='del'>-CONFIG_INET=y</div><div class='del'>-CONFIG_IP_MULTICAST=y</div><div class='del'>-CONFIG_NET_IPIP=y</div><div class='del'>-CONFIG_SYN_COOKIES=y</div><div class='del'>-CONFIG_INET_AH=m</div><div class='del'>-CONFIG_INET_ESP=m</div><div class='del'>-CONFIG_INET_IPCOMP=m</div><div class='del'>-# CONFIG_IPV6 is not set</div><div class='del'>-CONFIG_NETFILTER=y</div><div class='del'>-# CONFIG_NETFILTER_ADVANCED is not set</div><div class='del'>-CONFIG_BRIDGE=m</div><div class='del'>-CONFIG_VLAN_8021Q=m</div><div class='del'>-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='del'>-CONFIG_DEVTMPFS=y</div><div class='del'>-CONFIG_DEVTMPFS_MOUNT=y</div><div class='del'>-CONFIG_PARPORT=m</div><div class='del'>-CONFIG_PARPORT_PC=m</div><div class='del'>-CONFIG_BLK_DEV_FD=m</div><div class='del'>-CONFIG_BLK_DEV_LOOP=y</div><div class='del'>-CONFIG_BLK_DEV_NBD=m</div><div class='del'>-CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_BLK_DEV_RAM_SIZE=65536</div><div class='del'>-CONFIG_VIRTIO_BLK=m</div><div class='del'>-CONFIG_IDE=y</div><div class='del'>-CONFIG_BLK_DEV_IDECD=y</div><div class='del'>-CONFIG_BLK_DEV_GENERIC=y</div><div class='del'>-CONFIG_BLK_DEV_AMD74XX=y</div><div class='del'>-CONFIG_BLK_DEV_SD=y</div><div class='del'>-CONFIG_CHR_DEV_ST=y</div><div class='del'>-CONFIG_BLK_DEV_SR=y</div><div class='del'>-CONFIG_BLK_DEV_SR_VENDOR=y</div><div class='del'>-CONFIG_CHR_DEV_SG=y</div><div class='del'>-CONFIG_SCSI_CONSTANTS=y</div><div class='del'>-CONFIG_SCSI_FC_ATTRS=y</div><div class='del'>-CONFIG_SCSI_CXGB3_ISCSI=m</div><div class='del'>-CONFIG_SCSI_CXGB4_ISCSI=m</div><div class='del'>-CONFIG_SCSI_BNX2_ISCSI=m</div><div class='del'>-CONFIG_BE2ISCSI=m</div><div class='del'>-CONFIG_SCSI_MPT2SAS=m</div><div class='del'>-CONFIG_SCSI_IBMVSCSI=y</div><div class='del'>-CONFIG_SCSI_IBMVFC=m</div><div class='del'>-CONFIG_SCSI_SYM53C8XX_2=y</div><div class='del'>-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0</div><div class='del'>-CONFIG_SCSI_IPR=y</div><div class='del'>-CONFIG_SCSI_QLA_FC=m</div><div class='del'>-CONFIG_SCSI_QLA_ISCSI=m</div><div class='del'>-CONFIG_SCSI_LPFC=m</div><div class='del'>-CONFIG_SCSI_VIRTIO=m</div><div class='del'>-CONFIG_SCSI_DH=m</div><div class='del'>-CONFIG_SCSI_DH_RDAC=m</div><div class='del'>-CONFIG_SCSI_DH_ALUA=m</div><div class='del'>-CONFIG_ATA=y</div><div class='del'>-CONFIG_SATA_AHCI=y</div><div class='del'>-# CONFIG_ATA_SFF is not set</div><div class='del'>-CONFIG_MD=y</div><div class='del'>-CONFIG_BLK_DEV_MD=y</div><div class='del'>-CONFIG_MD_LINEAR=y</div><div class='del'>-CONFIG_MD_RAID0=y</div><div class='del'>-CONFIG_MD_RAID1=y</div><div class='del'>-CONFIG_MD_RAID10=m</div><div class='del'>-CONFIG_MD_RAID456=m</div><div class='del'>-CONFIG_MD_MULTIPATH=m</div><div class='del'>-CONFIG_MD_FAULTY=m</div><div class='del'>-CONFIG_BLK_DEV_DM=y</div><div class='del'>-CONFIG_DM_CRYPT=m</div><div class='del'>-CONFIG_DM_SNAPSHOT=m</div><div class='del'>-CONFIG_DM_THIN_PROVISIONING=m</div><div class='del'>-CONFIG_DM_MIRROR=m</div><div class='del'>-CONFIG_DM_ZERO=m</div><div class='del'>-CONFIG_DM_MULTIPATH=m</div><div class='del'>-CONFIG_DM_MULTIPATH_QL=m</div><div class='del'>-CONFIG_DM_MULTIPATH_ST=m</div><div class='del'>-CONFIG_DM_UEVENT=y</div><div class='del'>-CONFIG_BONDING=m</div><div class='del'>-CONFIG_DUMMY=m</div><div class='del'>-CONFIG_MACVLAN=m</div><div class='del'>-CONFIG_MACVTAP=m</div><div class='del'>-CONFIG_VXLAN=m</div><div class='del'>-CONFIG_NETCONSOLE=y</div><div class='del'>-CONFIG_TUN=m</div><div class='del'>-CONFIG_VETH=m</div><div class='del'>-CONFIG_VIRTIO_NET=m</div><div class='del'>-CONFIG_VHOST_NET=m</div><div class='del'>-CONFIG_VORTEX=y</div><div class='del'>-CONFIG_ACENIC=m</div><div class='del'>-CONFIG_ACENIC_OMIT_TIGON_I=y</div><div class='del'>-CONFIG_PCNET32=y</div><div class='del'>-CONFIG_TIGON3=y</div><div class='del'>-CONFIG_CHELSIO_T1=m</div><div class='del'>-CONFIG_BE2NET=m</div><div class='del'>-CONFIG_S2IO=m</div><div class='del'>-CONFIG_IBMVETH=y</div><div class='del'>-CONFIG_EHEA=y</div><div class='del'>-CONFIG_E100=y</div><div class='del'>-CONFIG_E1000=y</div><div class='del'>-CONFIG_E1000E=y</div><div class='del'>-CONFIG_IXGB=m</div><div class='del'>-CONFIG_IXGBE=m</div><div class='del'>-CONFIG_MLX4_EN=m</div><div class='del'>-CONFIG_MYRI10GE=m</div><div class='del'>-CONFIG_QLGE=m</div><div class='del'>-CONFIG_NETXEN_NIC=m</div><div class='del'>-CONFIG_PPP=m</div><div class='del'>-CONFIG_PPP_BSDCOMP=m</div><div class='del'>-CONFIG_PPP_DEFLATE=m</div><div class='del'>-CONFIG_PPPOE=m</div><div class='del'>-CONFIG_PPP_ASYNC=m</div><div class='del'>-CONFIG_PPP_SYNC_TTY=m</div><div class='del'>-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='del'>-CONFIG_INPUT_EVDEV=m</div><div class='del'>-CONFIG_INPUT_MISC=y</div><div class='del'>-CONFIG_INPUT_PCSPKR=m</div><div class='del'>-# CONFIG_SERIO_SERPORT is not set</div><div class='del'>-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y</div><div class='del'>-CONFIG_SERIAL_8250=y</div><div class='del'>-CONFIG_SERIAL_8250_CONSOLE=y</div><div class='del'>-CONFIG_SERIAL_ICOM=m</div><div class='del'>-CONFIG_SERIAL_JSM=m</div><div class='del'>-CONFIG_HVC_CONSOLE=y</div><div class='del'>-CONFIG_HVC_RTAS=y</div><div class='del'>-CONFIG_HVCS=m</div><div class='del'>-CONFIG_VIRTIO_CONSOLE=m</div><div class='del'>-CONFIG_IBM_BSR=m</div><div class='del'>-CONFIG_GEN_RTC=y</div><div class='del'>-CONFIG_RAW_DRIVER=y</div><div class='del'>-CONFIG_MAX_RAW_DEVS=1024</div><div class='del'>-CONFIG_FB=y</div><div class='del'>-CONFIG_FIRMWARE_EDID=y</div><div class='del'>-CONFIG_FB_OF=y</div><div class='del'>-CONFIG_FB_MATROX=y</div><div class='del'>-CONFIG_FB_MATROX_MILLENIUM=y</div><div class='del'>-CONFIG_FB_MATROX_MYSTIQUE=y</div><div class='del'>-CONFIG_FB_MATROX_G=y</div><div class='del'>-CONFIG_FB_RADEON=y</div><div class='del'>-CONFIG_FB_IBM_GXT4500=y</div><div class='del'>-CONFIG_LCD_PLATFORM=m</div><div class='del'>-# CONFIG_VGA_CONSOLE is not set</div><div class='del'>-CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='del'>-CONFIG_LOGO=y</div><div class='del'>-CONFIG_HID_GYRATION=y</div><div class='del'>-CONFIG_HID_PANTHERLORD=y</div><div class='del'>-CONFIG_HID_PETALYNX=y</div><div class='del'>-CONFIG_HID_SAMSUNG=y</div><div class='del'>-CONFIG_HID_SUNPLUS=y</div><div class='del'>-CONFIG_USB_HIDDEV=y</div><div class='del'>-CONFIG_USB=y</div><div class='del'>-CONFIG_USB_MON=m</div><div class='del'>-CONFIG_USB_EHCI_HCD=y</div><div class='del'>-# CONFIG_USB_EHCI_HCD_PPC_OF is not set</div><div class='del'>-CONFIG_USB_OHCI_HCD=y</div><div class='del'>-CONFIG_USB_STORAGE=m</div><div class='del'>-CONFIG_INFINIBAND=m</div><div class='del'>-CONFIG_INFINIBAND_USER_MAD=m</div><div class='del'>-CONFIG_INFINIBAND_USER_ACCESS=m</div><div class='del'>-CONFIG_INFINIBAND_MTHCA=m</div><div class='del'>-CONFIG_INFINIBAND_EHCA=m</div><div class='del'>-CONFIG_INFINIBAND_CXGB3=m</div><div class='del'>-CONFIG_INFINIBAND_CXGB4=m</div><div class='del'>-CONFIG_MLX4_INFINIBAND=m</div><div class='del'>-CONFIG_INFINIBAND_IPOIB=m</div><div class='del'>-CONFIG_INFINIBAND_IPOIB_CM=y</div><div class='del'>-CONFIG_INFINIBAND_SRP=m</div><div class='del'>-CONFIG_INFINIBAND_ISER=m</div><div class='del'>-CONFIG_VIRTIO_PCI=m</div><div class='del'>-CONFIG_VIRTIO_BALLOON=m</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT2_FS_XATTR=y</div><div class='del'>-CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT2_FS_XIP=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT4_FS_SECURITY=y</div><div class='del'>-CONFIG_REISERFS_FS=y</div><div class='del'>-CONFIG_REISERFS_FS_XATTR=y</div><div class='del'>-CONFIG_REISERFS_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_REISERFS_FS_SECURITY=y</div><div class='del'>-CONFIG_JFS_FS=m</div><div class='del'>-CONFIG_JFS_POSIX_ACL=y</div><div class='del'>-CONFIG_JFS_SECURITY=y</div><div class='del'>-CONFIG_XFS_FS=m</div><div class='del'>-CONFIG_XFS_POSIX_ACL=y</div><div class='del'>-CONFIG_BTRFS_FS=m</div><div class='del'>-CONFIG_BTRFS_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_NILFS2_FS=m</div><div class='del'>-CONFIG_AUTOFS4_FS=m</div><div class='del'>-CONFIG_FUSE_FS=m</div><div class='del'>-CONFIG_OVERLAY_FS=m</div><div class='del'>-CONFIG_ISO9660_FS=y</div><div class='del'>-CONFIG_UDF_FS=m</div><div class='del'>-CONFIG_MSDOS_FS=y</div><div class='del'>-CONFIG_VFAT_FS=y</div><div class='del'>-CONFIG_PROC_KCORE=y</div><div class='del'>-CONFIG_TMPFS=y</div><div class='del'>-CONFIG_TMPFS_POSIX_ACL=y</div><div class='del'>-CONFIG_HUGETLBFS=y</div><div class='del'>-CONFIG_CRAMFS=m</div><div class='del'>-CONFIG_SQUASHFS=m</div><div class='del'>-CONFIG_SQUASHFS_XATTR=y</div><div class='del'>-CONFIG_SQUASHFS_LZO=y</div><div class='del'>-CONFIG_SQUASHFS_XZ=y</div><div class='del'>-CONFIG_PSTORE=y</div><div class='del'>-CONFIG_NFS_FS=y</div><div class='del'>-CONFIG_NFS_V3_ACL=y</div><div class='del'>-CONFIG_NFS_V4=y</div><div class='del'>-CONFIG_NFSD=m</div><div class='del'>-CONFIG_NFSD_V3_ACL=y</div><div class='del'>-CONFIG_NFSD_V4=y</div><div class='del'>-CONFIG_CIFS=m</div><div class='del'>-CONFIG_CIFS_XATTR=y</div><div class='del'>-CONFIG_CIFS_POSIX=y</div><div class='del'>-CONFIG_NLS_DEFAULT="utf8"</div><div class='del'>-CONFIG_NLS_CODEPAGE_437=y</div><div class='del'>-CONFIG_NLS_ASCII=y</div><div class='del'>-CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='del'>-CONFIG_DEBUG_STACK_USAGE=y</div><div class='del'>-CONFIG_DEBUG_STACKOVERFLOW=y</div><div class='del'>-CONFIG_LOCKUP_DETECTOR=y</div><div class='del'>-CONFIG_LATENCYTOP=y</div><div class='del'>-CONFIG_SCHED_TRACER=y</div><div class='del'>-CONFIG_BLK_DEV_IO_TRACE=y</div><div class='del'>-CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='del'>-CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='del'>-CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='del'>-CONFIG_XMON=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='del'>-CONFIG_CRYPTO_PCBC=m</div><div class='del'>-CONFIG_CRYPTO_HMAC=y</div><div class='del'>-CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='del'>-CONFIG_CRYPTO_TGR192=m</div><div class='del'>-CONFIG_CRYPTO_WP512=m</div><div class='del'>-CONFIG_CRYPTO_ANUBIS=m</div><div class='del'>-CONFIG_CRYPTO_BLOWFISH=m</div><div class='del'>-CONFIG_CRYPTO_CAST6=m</div><div class='del'>-CONFIG_CRYPTO_KHAZAD=m</div><div class='del'>-CONFIG_CRYPTO_SALSA20=m</div><div class='del'>-CONFIG_CRYPTO_SERPENT=m</div><div class='del'>-CONFIG_CRYPTO_TEA=m</div><div class='del'>-CONFIG_CRYPTO_TWOFISH=m</div><div class='del'>-CONFIG_CRYPTO_LZO=m</div><div class='del'>-# CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_VIRTUALIZATION=y</div><div class='del'>-CONFIG_KVM_BOOK3S_64=m</div><div class='del'>-CONFIG_KVM_BOOK3S_64_HV=m</div><div class='head'>diff --git a/arch/powerpc/crypto/md5-glue.c b/arch/powerpc/crypto/md5-glue.c<br/>index 452fb4dc575f..92289679b4c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/crypto/md5-glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/crypto/md5-glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/crypto/md5-glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/crypto/md5-glue.c</a></div><div class='hunk'>@@ -37,10 +37,10 @@ static int ppc_md5_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;hash[0] = 0x67452301;</div><div class='del'>-	sctx-&gt;hash[1] = 0xefcdab89;</div><div class='del'>-	sctx-&gt;hash[2] = 0x98badcfe;</div><div class='del'>-	sctx-&gt;hash[3] =	0x10325476;</div><div class='add'>+	sctx-&gt;hash[0] = MD5_H0;</div><div class='add'>+	sctx-&gt;hash[1] = MD5_H1;</div><div class='add'>+	sctx-&gt;hash[2] = MD5_H2;</div><div class='add'>+	sctx-&gt;hash[3] =	MD5_H3;</div><div class='ctx'> 	sctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild<br/>index 4b87205c230c..050712e1ce41 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/Kbuild</a></div><div class='hunk'>@@ -6,6 +6,5 @@ generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += rwsem.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='ctx'> generic-y += vtime.h</div><div class='head'>diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h<br/>index a3bf5be111ff..51ccc7232042 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/barrier.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> #define rmb()  __asm__ __volatile__ ("sync" : : : "memory")</div><div class='ctx'> #define wmb()  __asm__ __volatile__ ("sync" : : : "memory")</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value)	do { var = value; mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #ifdef __SUBARCH_HAS_LWSYNC</div><div class='ctx'> #    define SMPWMB      LWSYNC</div><div class='hunk'>@@ -89,5 +89,6 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> #define smp_mb__before_atomic()     smp_mb()</div><div class='ctx'> #define smp_mb__after_atomic()      smp_mb()</div><div class='add'>+#define smp_mb__before_spinlock()   smp_mb()</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BARRIER_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h<br/>index d463c68fe7f0..ad6263cffb0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -144,7 +144,6 @@ __xchg_local(volatile void *ptr, unsigned long x, unsigned int size)</div><div class='ctx'>  * Compare and exchange - if *p == old, set it to new,</div><div class='ctx'>  * and return the old value of *p.</div><div class='ctx'>  */</div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long</div><div class='ctx'> __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h<br/>index 6367b8347dad..b118072670fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/cputable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cputable.h</a></div><div class='hunk'>@@ -242,11 +242,13 @@ enum {</div><div class='ctx'> </div><div class='ctx'> /* We only set the TM feature if the kernel was compiled with TM supprt */</div><div class='ctx'> #ifdef CONFIG_PPC_TRANSACTIONAL_MEM</div><div class='del'>-#define CPU_FTR_TM_COMP		CPU_FTR_TM</div><div class='del'>-#define PPC_FEATURE2_HTM_COMP	PPC_FEATURE2_HTM</div><div class='add'>+#define CPU_FTR_TM_COMP			CPU_FTR_TM</div><div class='add'>+#define PPC_FEATURE2_HTM_COMP		PPC_FEATURE2_HTM</div><div class='add'>+#define PPC_FEATURE2_HTM_NOSC_COMP	PPC_FEATURE2_HTM_NOSC</div><div class='ctx'> #else</div><div class='del'>-#define CPU_FTR_TM_COMP		0</div><div class='del'>-#define PPC_FEATURE2_HTM_COMP	0</div><div class='add'>+#define CPU_FTR_TM_COMP			0</div><div class='add'>+#define PPC_FEATURE2_HTM_COMP		0</div><div class='add'>+#define PPC_FEATURE2_HTM_NOSC_COMP	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* We need to mark all pages as being coherent if we're SMP or we have a</div><div class='hunk'>@@ -366,7 +368,7 @@ enum {</div><div class='ctx'> 	    CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \</div><div class='ctx'> 	    CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE)</div><div class='ctx'> #define CPU_FTRS_CLASSIC32	(CPU_FTR_COMMON | CPU_FTR_USE_TB)</div><div class='del'>-#define CPU_FTRS_8XX	(CPU_FTR_USE_TB)</div><div class='add'>+#define CPU_FTRS_8XX	(CPU_FTR_USE_TB | CPU_FTR_NOEXECUTE)</div><div class='ctx'> #define CPU_FTRS_40X	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)</div><div class='ctx'> #define CPU_FTRS_44X	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)</div><div class='ctx'> #define CPU_FTRS_440x6	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h<br/>index 5be6c4753667..ba42e46ea58e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputhreads.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/cputhreads.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputhreads.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/cputhreads.h</a></div><div class='hunk'>@@ -31,9 +31,9 @@ extern cpumask_t threads_core_mask;</div><div class='ctx'> /* cpu_thread_mask_to_cores - Return a cpumask of one per cores</div><div class='ctx'>  *                            hit by the argument</div><div class='ctx'>  *</div><div class='del'>- * @threads:	a cpumask of threads</div><div class='add'>+ * @threads:	a cpumask of online threads</div><div class='ctx'>  *</div><div class='del'>- * This function returns a cpumask which will have one "cpu" (or thread)</div><div class='add'>+ * This function returns a cpumask which will have one online cpu's</div><div class='ctx'>  * bit set for each core that has at least one thread set in the argument.</div><div class='ctx'>  *</div><div class='ctx'>  * This can typically be used for things like IPI for tlb invalidations</div><div class='hunk'>@@ -42,13 +42,16 @@ extern cpumask_t threads_core_mask;</div><div class='ctx'> static inline cpumask_t cpu_thread_mask_to_cores(const struct cpumask *threads)</div><div class='ctx'> {</div><div class='ctx'> 	cpumask_t	tmp, res;</div><div class='del'>-	int		i;</div><div class='add'>+	int		i, cpu;</div><div class='ctx'> </div><div class='ctx'> 	cpumask_clear(&amp;res);</div><div class='ctx'> 	for (i = 0; i &lt; NR_CPUS; i += threads_per_core) {</div><div class='ctx'> 		cpumask_shift_left(&amp;tmp, &amp;threads_core_mask, i);</div><div class='del'>-		if (cpumask_intersects(threads, &amp;tmp))</div><div class='del'>-			cpumask_set_cpu(i, &amp;res);</div><div class='add'>+		if (cpumask_intersects(threads, &amp;tmp)) {</div><div class='add'>+			cpu = cpumask_next_and(-1, &amp;tmp, cpu_online_mask);</div><div class='add'>+			if (cpu &lt; nr_cpu_ids)</div><div class='add'>+				cpumask_set_cpu(cpu, &amp;res);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h<br/>index 9f1371bab5fc..e9bdda88f1fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/device.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/device.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/device.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/device.h</a></div><div class='hunk'>@@ -46,6 +46,9 @@ struct dev_archdata {</div><div class='ctx'> #ifdef CONFIG_FAIL_IOMMU</div><div class='ctx'> 	int fail_iommu;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_CXL_BASE</div><div class='add'>+	struct cxl_context	*cxl_ctx;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct pdev_archdata {</div><div class='head'>diff --git a/arch/powerpc/include/asm/edac.h b/arch/powerpc/include/asm/edac.h<br/>index 6ead88bbfbb8..5571e23d253e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/edac.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/edac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/edac.h</a></div><div class='hunk'>@@ -12,11 +12,11 @@</div><div class='ctx'> #define ASM_EDAC_H</div><div class='ctx'> /*</div><div class='ctx'>  * ECC atomic, DMA, SMP and interrupt safe scrub function.</div><div class='del'>- * Implements the per arch atomic_scrub() that EDAC use for software</div><div class='add'>+ * Implements the per arch edac_atomic_scrub() that EDAC use for software</div><div class='ctx'>  * ECC scrubbing.  It reads memory and then writes back the original</div><div class='ctx'>  * value, allowing the hardware to detect and correct memory errors.</div><div class='ctx'>  */</div><div class='del'>-static __inline__ void atomic_scrub(void *va, u32 size)</div><div class='add'>+static __inline__ void edac_atomic_scrub(void *va, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int *virt_addr = va;</div><div class='ctx'> 	unsigned int temp;</div><div class='head'>diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h<br/>index a52db28ecc1e..c5eb86f3d452 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/eeh.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/eeh.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/eeh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/eeh.h</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;uapi/asm/eeh.h&gt;</div><div class='add'>+</div><div class='ctx'> struct pci_dev;</div><div class='ctx'> struct pci_bus;</div><div class='ctx'> struct pci_dn;</div><div class='hunk'>@@ -185,11 +187,6 @@ enum {</div><div class='ctx'> #define EEH_STATE_DMA_ACTIVE	(1 &lt;&lt; 4)	/* Active DMA		*/</div><div class='ctx'> #define EEH_STATE_MMIO_ENABLED	(1 &lt;&lt; 5)	/* MMIO enabled		*/</div><div class='ctx'> #define EEH_STATE_DMA_ENABLED	(1 &lt;&lt; 6)	/* DMA enabled		*/</div><div class='del'>-#define EEH_PE_STATE_NORMAL		0	/* Normal state		*/</div><div class='del'>-#define EEH_PE_STATE_RESET		1	/* PE reset asserted	*/</div><div class='del'>-#define EEH_PE_STATE_STOPPED_IO_DMA	2	/* Frozen PE		*/</div><div class='del'>-#define EEH_PE_STATE_STOPPED_DMA	4	/* Stopped DMA, Enabled IO */</div><div class='del'>-#define EEH_PE_STATE_UNAVAIL		5	/* Unavailable		*/</div><div class='ctx'> #define EEH_RESET_DEACTIVATE	0	/* Deactivate the PE reset	*/</div><div class='ctx'> #define EEH_RESET_HOT		1	/* Hot reset			*/</div><div class='ctx'> #define EEH_RESET_FUNDAMENTAL	3	/* Fundamental reset		*/</div><div class='hunk'>@@ -294,6 +291,8 @@ int eeh_pe_set_option(struct eeh_pe *pe, int option);</div><div class='ctx'> int eeh_pe_get_state(struct eeh_pe *pe);</div><div class='ctx'> int eeh_pe_reset(struct eeh_pe *pe, int option);</div><div class='ctx'> int eeh_pe_configure(struct eeh_pe *pe);</div><div class='add'>+int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func,</div><div class='add'>+		      unsigned long addr, unsigned long mask);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.</div><div class='head'>diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h<br/>index 1d53a65b4ec1..7eac89b9f02e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -112,11 +112,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				   pte_t *ptep, pte_t pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -173,15 +168,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h<br/>new file mode 100644<br/>index 000000000000..9f8402b35115<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/icswx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/icswx.h</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+/*</div><div class='add'>+ * ICSWX api</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version</div><div class='add'>+ * 2 of the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This provides the Initiate Coprocessor Store Word Indexed (ICSWX)</div><div class='add'>+ * instruction.  This instruction is used to communicate with PowerPC</div><div class='add'>+ * coprocessors.  This also provides definitions of the structures used</div><div class='add'>+ * to communicate with the coprocessor.</div><div class='add'>+ *</div><div class='add'>+ * The RFC02130: Coprocessor Architecture document is the reference for</div><div class='add'>+ * everything in this file unless otherwise noted.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ARCH_POWERPC_INCLUDE_ASM_ICSWX_H_</div><div class='add'>+#define _ARCH_POWERPC_INCLUDE_ASM_ICSWX_H_</div><div class='add'>+</div><div class='add'>+#include &lt;asm/ppc-opcode.h&gt; /* for PPC_ICSWX */</div><div class='add'>+</div><div class='add'>+/* Chapter 6.5.8 Coprocessor-Completion Block (CCB) */</div><div class='add'>+</div><div class='add'>+#define CCB_VALUE		(0x3fffffffffffffff)</div><div class='add'>+#define CCB_ADDRESS		(0xfffffffffffffff8)</div><div class='add'>+#define CCB_CM			(0x0000000000000007)</div><div class='add'>+#define CCB_CM0			(0x0000000000000004)</div><div class='add'>+#define CCB_CM12		(0x0000000000000003)</div><div class='add'>+</div><div class='add'>+#define CCB_CM0_ALL_COMPLETIONS	(0x0)</div><div class='add'>+#define CCB_CM0_LAST_IN_CHAIN	(0x4)</div><div class='add'>+#define CCB_CM12_STORE		(0x0)</div><div class='add'>+#define CCB_CM12_INTERRUPT	(0x1)</div><div class='add'>+</div><div class='add'>+#define CCB_SIZE		(0x10)</div><div class='add'>+#define CCB_ALIGN		CCB_SIZE</div><div class='add'>+</div><div class='add'>+struct coprocessor_completion_block {</div><div class='add'>+	__be64 value;</div><div class='add'>+	__be64 address;</div><div class='add'>+} __packed __aligned(CCB_ALIGN);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Chapter 6.5.7 Coprocessor-Status Block (CSB) */</div><div class='add'>+</div><div class='add'>+#define CSB_V			(0x80)</div><div class='add'>+#define CSB_F			(0x04)</div><div class='add'>+#define CSB_CH			(0x03)</div><div class='add'>+#define CSB_CE_INCOMPLETE	(0x80)</div><div class='add'>+#define CSB_CE_TERMINATION	(0x40)</div><div class='add'>+#define CSB_CE_TPBC		(0x20)</div><div class='add'>+</div><div class='add'>+#define CSB_CC_SUCCESS		(0)</div><div class='add'>+#define CSB_CC_INVALID_ALIGN	(1)</div><div class='add'>+#define CSB_CC_OPERAND_OVERLAP	(2)</div><div class='add'>+#define CSB_CC_DATA_LENGTH	(3)</div><div class='add'>+#define CSB_CC_TRANSLATION	(5)</div><div class='add'>+#define CSB_CC_PROTECTION	(6)</div><div class='add'>+#define CSB_CC_RD_EXTERNAL	(7)</div><div class='add'>+#define CSB_CC_INVALID_OPERAND	(8)</div><div class='add'>+#define CSB_CC_PRIVILEGE	(9)</div><div class='add'>+#define CSB_CC_INTERNAL		(10)</div><div class='add'>+#define CSB_CC_WR_EXTERNAL	(12)</div><div class='add'>+#define CSB_CC_NOSPC		(13)</div><div class='add'>+#define CSB_CC_EXCESSIVE_DDE	(14)</div><div class='add'>+#define CSB_CC_WR_TRANSLATION	(15)</div><div class='add'>+#define CSB_CC_WR_PROTECTION	(16)</div><div class='add'>+#define CSB_CC_UNKNOWN_CODE	(17)</div><div class='add'>+#define CSB_CC_ABORT		(18)</div><div class='add'>+#define CSB_CC_TRANSPORT	(20)</div><div class='add'>+#define CSB_CC_SEGMENTED_DDL	(31)</div><div class='add'>+#define CSB_CC_PROGRESS_POINT	(32)</div><div class='add'>+#define CSB_CC_DDE_OVERFLOW	(33)</div><div class='add'>+#define CSB_CC_SESSION		(34)</div><div class='add'>+#define CSB_CC_PROVISION	(36)</div><div class='add'>+#define CSB_CC_CHAIN		(37)</div><div class='add'>+#define CSB_CC_SEQUENCE		(38)</div><div class='add'>+#define CSB_CC_HW		(39)</div><div class='add'>+</div><div class='add'>+#define CSB_SIZE		(0x10)</div><div class='add'>+#define CSB_ALIGN		CSB_SIZE</div><div class='add'>+</div><div class='add'>+struct coprocessor_status_block {</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 cs;</div><div class='add'>+	u8 cc;</div><div class='add'>+	u8 ce;</div><div class='add'>+	__be32 count;</div><div class='add'>+	__be64 address;</div><div class='add'>+} __packed __aligned(CSB_ALIGN);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Chapter 6.5.10 Data-Descriptor List (DDL)</div><div class='add'>+ * each list contains one or more Data-Descriptor Entries (DDE)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define DDE_P			(0x8000)</div><div class='add'>+</div><div class='add'>+#define DDE_SIZE		(0x10)</div><div class='add'>+#define DDE_ALIGN		DDE_SIZE</div><div class='add'>+</div><div class='add'>+struct data_descriptor_entry {</div><div class='add'>+	__be16 flags;</div><div class='add'>+	u8 count;</div><div class='add'>+	u8 index;</div><div class='add'>+	__be32 length;</div><div class='add'>+	__be64 address;</div><div class='add'>+} __packed __aligned(DDE_ALIGN);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Chapter 6.5.2 Coprocessor-Request Block (CRB) */</div><div class='add'>+</div><div class='add'>+#define CRB_SIZE		(0x80)</div><div class='add'>+#define CRB_ALIGN		(0x100) /* Errata: requires 256 alignment */</div><div class='add'>+</div><div class='add'>+/* Coprocessor Status Block field</div><div class='add'>+ *   ADDRESS	address of CSB</div><div class='add'>+ *   C		CCB is valid</div><div class='add'>+ *   AT		0 = addrs are virtual, 1 = addrs are phys</div><div class='add'>+ *   M		enable perf monitor</div><div class='add'>+ */</div><div class='add'>+#define CRB_CSB_ADDRESS		(0xfffffffffffffff0)</div><div class='add'>+#define CRB_CSB_C		(0x0000000000000008)</div><div class='add'>+#define CRB_CSB_AT		(0x0000000000000002)</div><div class='add'>+#define CRB_CSB_M		(0x0000000000000001)</div><div class='add'>+</div><div class='add'>+struct coprocessor_request_block {</div><div class='add'>+	__be32 ccw;</div><div class='add'>+	__be32 flags;</div><div class='add'>+	__be64 csb_addr;</div><div class='add'>+</div><div class='add'>+	struct data_descriptor_entry source;</div><div class='add'>+	struct data_descriptor_entry target;</div><div class='add'>+</div><div class='add'>+	struct coprocessor_completion_block ccb;</div><div class='add'>+</div><div class='add'>+	u8 reserved[48];</div><div class='add'>+</div><div class='add'>+	struct coprocessor_status_block csb;</div><div class='add'>+} __packed __aligned(CRB_ALIGN);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* RFC02167 Initiate Coprocessor Instructions document</div><div class='add'>+ * Chapter 8.2.1.1.1 RS</div><div class='add'>+ * Chapter 8.2.3 Coprocessor Directive</div><div class='add'>+ * Chapter 8.2.4 Execution</div><div class='add'>+ *</div><div class='add'>+ * The CCW must be converted to BE before passing to icswx()</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define CCW_PS			(0xff000000)</div><div class='add'>+#define CCW_CT			(0x00ff0000)</div><div class='add'>+#define CCW_CD			(0x0000ffff)</div><div class='add'>+#define CCW_CL			(0x0000c000)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* RFC02167 Initiate Coprocessor Instructions document</div><div class='add'>+ * Chapter 8.2.1 Initiate Coprocessor Store Word Indexed (ICSWX)</div><div class='add'>+ * Chapter 8.2.4.1 Condition Register 0</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define ICSWX_INITIATED		(0x8)</div><div class='add'>+#define ICSWX_BUSY		(0x4)</div><div class='add'>+#define ICSWX_REJECTED		(0x2)</div><div class='add'>+</div><div class='add'>+static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb)</div><div class='add'>+{</div><div class='add'>+	__be64 ccw_reg = ccw;</div><div class='add'>+	u32 cr;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+	PPC_ICSWX(%1,0,%2) "\n"</div><div class='add'>+	"mfcr %0\n"</div><div class='add'>+	: "=r" (cr)</div><div class='add'>+	: "r" (ccw_reg), "r" (crb)</div><div class='add'>+	: "cr0", "memory");</div><div class='add'>+</div><div class='add'>+	return (int)((cr &gt;&gt; 28) &amp; 0xf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _ARCH_POWERPC_INCLUDE_ASM_ICSWX_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h<br/>index 1e27d6338565..ca18cff90900 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/iommu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/iommu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/iommu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/iommu.h</a></div><div class='hunk'>@@ -44,6 +44,39 @@</div><div class='ctx'> extern int iommu_is_off;</div><div class='ctx'> extern int iommu_force_on;</div><div class='ctx'> </div><div class='add'>+struct iommu_table_ops {</div><div class='add'>+	/*</div><div class='add'>+	 * When called with direction==DMA_NONE, it is equal to clear().</div><div class='add'>+	 * uaddr is a linear map address.</div><div class='add'>+	 */</div><div class='add'>+	int (*set)(struct iommu_table *tbl,</div><div class='add'>+			long index, long npages,</div><div class='add'>+			unsigned long uaddr,</div><div class='add'>+			enum dma_data_direction direction,</div><div class='add'>+			struct dma_attrs *attrs);</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	/*</div><div class='add'>+	 * Exchanges existing TCE with new TCE plus direction bits;</div><div class='add'>+	 * returns old TCE and DMA direction mask.</div><div class='add'>+	 * @tce is a physical address.</div><div class='add'>+	 */</div><div class='add'>+	int (*exchange)(struct iommu_table *tbl,</div><div class='add'>+			long index,</div><div class='add'>+			unsigned long *hpa,</div><div class='add'>+			enum dma_data_direction *direction);</div><div class='add'>+#endif</div><div class='add'>+	void (*clear)(struct iommu_table *tbl,</div><div class='add'>+			long index, long npages);</div><div class='add'>+	/* get() returns a physical address */</div><div class='add'>+	unsigned long (*get)(struct iommu_table *tbl, long index);</div><div class='add'>+	void (*flush)(struct iommu_table *tbl);</div><div class='add'>+	void (*free)(struct iommu_table *tbl);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* These are used by VIO */</div><div class='add'>+extern struct iommu_table_ops iommu_table_lpar_multi_ops;</div><div class='add'>+extern struct iommu_table_ops iommu_table_pseries_ops;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * IOMAP_MAX_ORDER defines the largest contiguous block</div><div class='ctx'>  * of dma space we can get.  IOMAP_MAX_ORDER = 13</div><div class='hunk'>@@ -64,6 +97,9 @@ struct iommu_pool {</div><div class='ctx'> struct iommu_table {</div><div class='ctx'> 	unsigned long  it_busno;     /* Bus number this table belongs to */</div><div class='ctx'> 	unsigned long  it_size;      /* Size of iommu table in entries */</div><div class='add'>+	unsigned long  it_indirect_levels;</div><div class='add'>+	unsigned long  it_level_size;</div><div class='add'>+	unsigned long  it_allocated_size;</div><div class='ctx'> 	unsigned long  it_offset;    /* Offset into global table */</div><div class='ctx'> 	unsigned long  it_base;      /* mapped address of tce table */</div><div class='ctx'> 	unsigned long  it_index;     /* which iommu table this is */</div><div class='hunk'>@@ -75,15 +111,16 @@ struct iommu_table {</div><div class='ctx'> 	struct iommu_pool pools[IOMMU_NR_POOLS];</div><div class='ctx'> 	unsigned long *it_map;       /* A simple allocation bitmap for now */</div><div class='ctx'> 	unsigned long  it_page_shift;/* table iommu page size */</div><div class='del'>-#ifdef CONFIG_IOMMU_API</div><div class='del'>-	struct iommu_group *it_group;</div><div class='del'>-#endif</div><div class='del'>-	void (*set_bypass)(struct iommu_table *tbl, bool enable);</div><div class='del'>-#ifdef CONFIG_PPC_POWERNV</div><div class='del'>-	void           *data;</div><div class='del'>-#endif</div><div class='add'>+	struct list_head it_group_list;/* List of iommu_table_group_link */</div><div class='add'>+	unsigned long *it_userspace; /* userspace view of the table */</div><div class='add'>+	struct iommu_table_ops *it_ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \</div><div class='add'>+		((tbl)-&gt;it_userspace ? \</div><div class='add'>+			&amp;((tbl)-&gt;it_userspace[(entry) - (tbl)-&gt;it_offset]) : \</div><div class='add'>+			NULL)</div><div class='add'>+</div><div class='ctx'> /* Pure 2^n version of get_order */</div><div class='ctx'> static inline __attribute_const__</div><div class='ctx'> int get_iommu_order(unsigned long size, struct iommu_table *tbl)</div><div class='hunk'>@@ -112,14 +149,62 @@ extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);</div><div class='ctx'>  */</div><div class='ctx'> extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,</div><div class='ctx'> 					    int nid);</div><div class='add'>+#define IOMMU_TABLE_GROUP_MAX_TABLES	2</div><div class='add'>+</div><div class='add'>+struct iommu_table_group;</div><div class='add'>+</div><div class='add'>+struct iommu_table_group_ops {</div><div class='add'>+	unsigned long (*get_table_size)(</div><div class='add'>+			__u32 page_shift,</div><div class='add'>+			__u64 window_size,</div><div class='add'>+			__u32 levels);</div><div class='add'>+	long (*create_table)(struct iommu_table_group *table_group,</div><div class='add'>+			int num,</div><div class='add'>+			__u32 page_shift,</div><div class='add'>+			__u64 window_size,</div><div class='add'>+			__u32 levels,</div><div class='add'>+			struct iommu_table **ptbl);</div><div class='add'>+	long (*set_window)(struct iommu_table_group *table_group,</div><div class='add'>+			int num,</div><div class='add'>+			struct iommu_table *tblnew);</div><div class='add'>+	long (*unset_window)(struct iommu_table_group *table_group,</div><div class='add'>+			int num);</div><div class='add'>+	/* Switch ownership from platform code to external user (e.g. VFIO) */</div><div class='add'>+	void (*take_ownership)(struct iommu_table_group *table_group);</div><div class='add'>+	/* Switch ownership from external user (e.g. VFIO) back to core */</div><div class='add'>+	void (*release_ownership)(struct iommu_table_group *table_group);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iommu_table_group_link {</div><div class='add'>+	struct list_head next;</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+	struct iommu_table_group *table_group;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iommu_table_group {</div><div class='add'>+	/* IOMMU properties */</div><div class='add'>+	__u32 tce32_start;</div><div class='add'>+	__u32 tce32_size;</div><div class='add'>+	__u64 pgsizes; /* Bitmap of supported page sizes */</div><div class='add'>+	__u32 max_dynamic_windows_supported;</div><div class='add'>+	__u32 max_levels;</div><div class='add'>+</div><div class='add'>+	struct iommu_group *group;</div><div class='add'>+	struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES];</div><div class='add'>+	struct iommu_table_group_ops *ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IOMMU_API</div><div class='del'>-extern void iommu_register_group(struct iommu_table *tbl,</div><div class='add'>+</div><div class='add'>+extern void iommu_register_group(struct iommu_table_group *table_group,</div><div class='ctx'> 				 int pci_domain_number, unsigned long pe_num);</div><div class='ctx'> extern int iommu_add_device(struct device *dev);</div><div class='ctx'> extern void iommu_del_device(struct device *dev);</div><div class='ctx'> extern int __init tce_iommu_bus_notifier_init(void);</div><div class='add'>+extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction);</div><div class='ctx'> #else</div><div class='del'>-static inline void iommu_register_group(struct iommu_table *tbl,</div><div class='add'>+static inline void iommu_register_group(struct iommu_table_group *table_group,</div><div class='ctx'> 					int pci_domain_number,</div><div class='ctx'> 					unsigned long pe_num)</div><div class='ctx'> {</div><div class='hunk'>@@ -140,13 +225,6 @@ static inline int __init tce_iommu_bus_notifier_init(void)</div><div class='ctx'> }</div><div class='ctx'> #endif /* !CONFIG_IOMMU_API */</div><div class='ctx'> </div><div class='del'>-static inline void set_iommu_table_base_and_group(struct device *dev,</div><div class='del'>-						  void *base)</div><div class='del'>-{</div><div class='del'>-	set_iommu_table_base(dev, base);</div><div class='del'>-	iommu_add_device(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,</div><div class='ctx'> 			    struct scatterlist *sglist, int nelems,</div><div class='ctx'> 			    unsigned long mask,</div><div class='hunk'>@@ -197,20 +275,13 @@ extern int iommu_tce_clear_param_check(struct iommu_table *tbl,</div><div class='ctx'> 		unsigned long npages);</div><div class='ctx'> extern int iommu_tce_put_param_check(struct iommu_table *tbl,</div><div class='ctx'> 		unsigned long ioba, unsigned long tce);</div><div class='del'>-extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,</div><div class='del'>-		unsigned long hwaddr, enum dma_data_direction direction);</div><div class='del'>-extern unsigned long iommu_clear_tce(struct iommu_table *tbl,</div><div class='del'>-		unsigned long entry);</div><div class='del'>-extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl,</div><div class='del'>-		unsigned long entry, unsigned long pages);</div><div class='del'>-extern int iommu_put_tce_user_mode(struct iommu_table *tbl,</div><div class='del'>-		unsigned long entry, unsigned long tce);</div><div class='ctx'> </div><div class='ctx'> extern void iommu_flush_tce(struct iommu_table *tbl);</div><div class='ctx'> extern int iommu_take_ownership(struct iommu_table *tbl);</div><div class='ctx'> extern void iommu_release_ownership(struct iommu_table *tbl);</div><div class='ctx'> </div><div class='ctx'> extern enum dma_data_direction iommu_tce_direction(unsigned long tce);</div><div class='add'>+extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_IOMMU_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h<br/>index 3536d12eb798..2aa79c864e91 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/kvm_book3s_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_book3s_64.h</a></div><div class='hunk'>@@ -430,7 +430,7 @@ static inline void note_hpte_modification(struct kvm *kvm,</div><div class='ctx'>  */</div><div class='ctx'> static inline struct kvm_memslots *kvm_memslots_raw(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	return rcu_dereference_raw_notrace(kvm-&gt;memslots);</div><div class='add'>+	return rcu_dereference_raw_notrace(kvm-&gt;memslots[0]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void kvmppc_mmu_debugfs_init(struct kvm *kvm);</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h<br/>index a193a13cf08b..d91f65b28e32 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -698,7 +698,7 @@ struct kvm_vcpu_arch {</div><div class='ctx'> static inline void kvm_arch_hardware_disable(void) {}</div><div class='ctx'> static inline void kvm_arch_hardware_unsetup(void) {}</div><div class='ctx'> static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='del'>-static inline void kvm_arch_memslots_updated(struct kvm *kvm) {}</div><div class='add'>+static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}</div><div class='ctx'> static inline void kvm_arch_exit(void) {}</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h<br/>index b8475daad884..c6ef05bd0765 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_ppc.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/kvm_ppc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_ppc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/kvm_ppc.h</a></div><div class='hunk'>@@ -182,10 +182,11 @@ extern int kvmppc_core_create_memslot(struct kvm *kvm,</div><div class='ctx'> 				      unsigned long npages);</div><div class='ctx'> extern int kvmppc_core_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_memory_slot *memslot,</div><div class='del'>-				struct kvm_userspace_memory_region *mem);</div><div class='add'>+				const struct kvm_userspace_memory_region *mem);</div><div class='ctx'> extern void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='del'>-				const struct kvm_memory_slot *old);</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new);</div><div class='ctx'> extern int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm,</div><div class='ctx'> 				      struct kvm_ppc_smmu_info *info);</div><div class='ctx'> extern void kvmppc_core_flush_memslot(struct kvm *kvm,</div><div class='hunk'>@@ -243,10 +244,11 @@ struct kvmppc_ops {</div><div class='ctx'> 	void (*flush_memslot)(struct kvm *kvm, struct kvm_memory_slot *memslot);</div><div class='ctx'> 	int (*prepare_memory_region)(struct kvm *kvm,</div><div class='ctx'> 				     struct kvm_memory_slot *memslot,</div><div class='del'>-				     struct kvm_userspace_memory_region *mem);</div><div class='add'>+				     const struct kvm_userspace_memory_region *mem);</div><div class='ctx'> 	void (*commit_memory_region)(struct kvm *kvm,</div><div class='del'>-				     struct kvm_userspace_memory_region *mem,</div><div class='del'>-				     const struct kvm_memory_slot *old);</div><div class='add'>+				     const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				     const struct kvm_memory_slot *old,</div><div class='add'>+				     const struct kvm_memory_slot *new);</div><div class='ctx'> 	int (*unmap_hva)(struct kvm *kvm, unsigned long hva);</div><div class='ctx'> 	int (*unmap_hva_range)(struct kvm *kvm, unsigned long start,</div><div class='ctx'> 			   unsigned long end);</div><div class='head'>diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h<br/>index ef8899432ae7..952579f5e79a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/machdep.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/machdep.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/machdep.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/machdep.h</a></div><div class='hunk'>@@ -65,31 +65,6 @@ struct machdep_calls {</div><div class='ctx'> 	 * destroyed as well */</div><div class='ctx'> 	void		(*hpte_clear_all)(void);</div><div class='ctx'> </div><div class='del'>-	int		(*tce_build)(struct iommu_table *tbl,</div><div class='del'>-				     long index,</div><div class='del'>-				     long npages,</div><div class='del'>-				     unsigned long uaddr,</div><div class='del'>-				     enum dma_data_direction direction,</div><div class='del'>-				     struct dma_attrs *attrs);</div><div class='del'>-	void		(*tce_free)(struct iommu_table *tbl,</div><div class='del'>-				    long index,</div><div class='del'>-				    long npages);</div><div class='del'>-	unsigned long	(*tce_get)(struct iommu_table *tbl,</div><div class='del'>-				    long index);</div><div class='del'>-	void		(*tce_flush)(struct iommu_table *tbl);</div><div class='del'>-</div><div class='del'>-	/* _rm versions are for real mode use only */</div><div class='del'>-	int		(*tce_build_rm)(struct iommu_table *tbl,</div><div class='del'>-				     long index,</div><div class='del'>-				     long npages,</div><div class='del'>-				     unsigned long uaddr,</div><div class='del'>-				     enum dma_data_direction direction,</div><div class='del'>-				     struct dma_attrs *attrs);</div><div class='del'>-	void		(*tce_free_rm)(struct iommu_table *tbl,</div><div class='del'>-				    long index,</div><div class='del'>-				    long npages);</div><div class='del'>-	void		(*tce_flush_rm)(struct iommu_table *tbl);</div><div class='del'>-</div><div class='ctx'> 	void __iomem *	(*ioremap)(phys_addr_t addr, unsigned long size,</div><div class='ctx'> 				   unsigned long flags, void *caller);</div><div class='ctx'> 	void		(*iounmap)(volatile void __iomem *token);</div><div class='hunk'>@@ -131,12 +106,6 @@ struct machdep_calls {</div><div class='ctx'> 	/* To setup PHBs when using automatic OF platform driver for PCI */</div><div class='ctx'> 	int		(*pci_setup_phb)(struct pci_controller *host);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI_MSI</div><div class='del'>-	int		(*setup_msi_irqs)(struct pci_dev *dev,</div><div class='del'>-					  int nvec, int type);</div><div class='del'>-	void		(*teardown_msi_irqs)(struct pci_dev *dev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	void		(*restart)(char *cmd);</div><div class='ctx'> 	void		(*halt)(void);</div><div class='ctx'> 	void		(*panic)(char *str);</div><div class='head'>diff --git a/arch/powerpc/include/asm/mm-arch-hooks.h b/arch/powerpc/include/asm/mm-arch-hooks.h<br/>new file mode 100644<br/>index 000000000000..f2a2da895897<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/mm-arch-hooks.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mm-arch-hooks.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/*</div><div class='add'>+ * Architecture specific mm hooks</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015, IBM Corporation</div><div class='add'>+ * Author: Laurent Dufour &lt;ldufour@linux.vnet.ibm.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_POWERPC_MM_ARCH_HOOKS_H</div><div class='add'>+#define _ASM_POWERPC_MM_ARCH_HOOKS_H</div><div class='add'>+</div><div class='add'>+static inline void arch_remap(struct mm_struct *mm,</div><div class='add'>+			      unsigned long old_start, unsigned long old_end,</div><div class='add'>+			      unsigned long new_start, unsigned long new_end)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * mremap() doesn't allow moving multiple vmas so we can limit the</div><div class='add'>+	 * check to old_start == vdso_base.</div><div class='add'>+	 */</div><div class='add'>+	if (old_start == mm-&gt;context.vdso_base)</div><div class='add'>+		mm-&gt;context.vdso_base = new_start;</div><div class='add'>+}</div><div class='add'>+#define arch_remap arch_remap</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_POWERPC_MM_ARCH_HOOKS_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h<br/>index 986b9e1e1044..f05500a29a60 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-8xx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/mmu-8xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu-8xx.h</a></div><div class='hunk'>@@ -27,6 +27,19 @@</div><div class='ctx'> #define MI_Ks		0x80000000	/* Should not be set */</div><div class='ctx'> #define MI_Kp		0x40000000	/* Should always be set */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * All pages' PP exec bits are set to 000, which means Execute for Supervisor</div><div class='add'>+ * and no Execute for User.</div><div class='add'>+ * Then we use the APG to say whether accesses are according to Page rules,</div><div class='add'>+ * "all Supervisor" rules (Exec for all) and "all User" rules (Exec for noone)</div><div class='add'>+ * Therefore, we define 4 APG groups. msb is _PAGE_EXEC, lsb is _PAGE_USER</div><div class='add'>+ * 0 (00) =&gt; Not User, no exec =&gt; 11 (all accesses performed as user)</div><div class='add'>+ * 1 (01) =&gt; User but no exec =&gt; 11 (all accesses performed as user)</div><div class='add'>+ * 2 (10) =&gt; Not User, exec =&gt; 01 (rights according to page definition)</div><div class='add'>+ * 3 (11) =&gt; User, exec =&gt; 00 (all accesses performed as supervisor)</div><div class='add'>+ */</div><div class='add'>+#define MI_APG_INIT	0xf4ffffff</div><div class='add'>+</div><div class='ctx'> /* The effective page number register.  When read, contains the information</div><div class='ctx'>  * about the last instruction TLB miss.  When MI_RPN is written, bits in</div><div class='ctx'>  * this register are used to create the TLB entry.</div><div class='hunk'>@@ -87,6 +100,19 @@</div><div class='ctx'> #define MD_Ks		0x80000000	/* Should not be set */</div><div class='ctx'> #define MD_Kp		0x40000000	/* Should always be set */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * All pages' PP data bits are set to either 000 or 011, which means</div><div class='add'>+ * respectively RW for Supervisor and no access for User, or RO for</div><div class='add'>+ * Supervisor and no access for user.</div><div class='add'>+ * Then we use the APG to say whether accesses are according to Page rules or</div><div class='add'>+ * "all Supervisor" rules (Access to all)</div><div class='add'>+ * Therefore, we define 2 APG groups. lsb is _PAGE_USER</div><div class='add'>+ * 0 =&gt; No user =&gt; 01 (all accesses performed according to page definition)</div><div class='add'>+ * 1 =&gt; User =&gt; 00 (all accesses performed as supervisor</div><div class='add'>+ *                                 according to page definition)</div><div class='add'>+ */</div><div class='add'>+#define MD_APG_INIT	0x4fffffff</div><div class='add'>+</div><div class='ctx'> /* The effective page number register.  When read, contains the information</div><div class='ctx'>  * about the last instruction TLB miss.  When MD_RPN is written, bits in</div><div class='ctx'>  * this register are used to create the TLB entry.</div><div class='hunk'>@@ -145,7 +171,14 @@ typedef struct {</div><div class='ctx'> } mm_context_t;</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='add'>+#if (PAGE_SHIFT == 12)</div><div class='ctx'> #define mmu_virtual_psize	MMU_PAGE_4K</div><div class='add'>+#elif (PAGE_SHIFT == 14)</div><div class='add'>+#define mmu_virtual_psize	MMU_PAGE_16K</div><div class='add'>+#else</div><div class='add'>+#error "Unsupported PAGE_SIZE"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define mmu_linear_psize	MMU_PAGE_8M</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_MMU_8XX_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h<br/>index 1da6a81ce541..a82f5347540a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-hash64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/mmu-hash64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-hash64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu-hash64.h</a></div><div class='hunk'>@@ -536,6 +536,9 @@ typedef struct {</div><div class='ctx'> 	/* for 4K PTE fragment support */</div><div class='ctx'> 	void *pte_frag;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_SPAPR_TCE_IOMMU</div><div class='add'>+	struct list_head iommu_group_mem_list;</div><div class='add'>+#endif</div><div class='ctx'> } mm_context_t;</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h<br/>index 73382eba02dc..878c27771717 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu_context.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu_context.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;	</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='del'>-#include &lt;asm-generic/mm_hooks.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -16,6 +15,24 @@</div><div class='ctx'>  */</div><div class='ctx'> extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);</div><div class='ctx'> extern void destroy_context(struct mm_struct *mm);</div><div class='add'>+#ifdef CONFIG_SPAPR_TCE_IOMMU</div><div class='add'>+struct mm_iommu_table_group_mem_t;</div><div class='add'>+</div><div class='add'>+extern bool mm_iommu_preregistered(void);</div><div class='add'>+extern long mm_iommu_get(unsigned long ua, unsigned long entries,</div><div class='add'>+		struct mm_iommu_table_group_mem_t **pmem);</div><div class='add'>+extern long mm_iommu_put(struct mm_iommu_table_group_mem_t *mem);</div><div class='add'>+extern void mm_iommu_init(mm_context_t *ctx);</div><div class='add'>+extern void mm_iommu_cleanup(mm_context_t *ctx);</div><div class='add'>+extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(unsigned long ua,</div><div class='add'>+		unsigned long size);</div><div class='add'>+extern struct mm_iommu_table_group_mem_t *mm_iommu_find(unsigned long ua,</div><div class='add'>+		unsigned long entries);</div><div class='add'>+extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,</div><div class='add'>+		unsigned long ua, unsigned long *hpa);</div><div class='add'>+extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);</div><div class='add'>+extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);</div><div class='ctx'> extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);</div><div class='hunk'>@@ -109,5 +126,27 @@ static inline void enter_lazy_tlb(struct mm_struct *mm,</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void arch_dup_mmap(struct mm_struct *oldmm,</div><div class='add'>+				 struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_exit_mmap(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_unmap(struct mm_struct *mm,</div><div class='add'>+			      struct vm_area_struct *vma,</div><div class='add'>+			      unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	if (start &lt;= mm-&gt;context.vdso_base &amp;&amp; mm-&gt;context.vdso_base &lt; end)</div><div class='add'>+		mm-&gt;context.vdso_base = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_bprm_mm_init(struct mm_struct *mm,</div><div class='add'>+				     struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* __ASM_POWERPC_MMU_CONTEXT_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h<br/>index 0321a909e663..e9e4c52f3685 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/opal-api.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/opal-api.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/opal-api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/opal-api.h</a></div><div class='hunk'>@@ -153,7 +153,8 @@</div><div class='ctx'> #define OPAL_FLASH_READ				110</div><div class='ctx'> #define OPAL_FLASH_WRITE			111</div><div class='ctx'> #define OPAL_FLASH_ERASE			112</div><div class='del'>-#define OPAL_LAST				112</div><div class='add'>+#define OPAL_PRD_MSG				113</div><div class='add'>+#define OPAL_LAST				113</div><div class='ctx'> </div><div class='ctx'> /* Device tree flags */</div><div class='ctx'> </div><div class='hunk'>@@ -165,6 +166,13 @@</div><div class='ctx'> #define OPAL_PM_WINKLE_ENABLED		0x00040000</div><div class='ctx'> #define OPAL_PM_SLEEP_ENABLED_ER1	0x00080000 /* with workaround */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * OPAL_CONFIG_CPU_IDLE_STATE parameters</div><div class='add'>+ */</div><div class='add'>+#define OPAL_CONFIG_IDLE_FASTSLEEP	1</div><div class='add'>+#define OPAL_CONFIG_IDLE_UNDO		0</div><div class='add'>+#define OPAL_CONFIG_IDLE_APPLY		1</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> /* Other enums */</div><div class='hunk'>@@ -352,6 +360,7 @@ enum opal_msg_type {</div><div class='ctx'> 	OPAL_MSG_SHUTDOWN,		/* params[0] = 1 reboot, 0 shutdown */</div><div class='ctx'> 	OPAL_MSG_HMI_EVT,</div><div class='ctx'> 	OPAL_MSG_DPO,</div><div class='add'>+	OPAL_MSG_PRD,</div><div class='ctx'> 	OPAL_MSG_TYPE_MAX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -674,6 +683,23 @@ typedef struct oppanel_line {</div><div class='ctx'> 	__be64 line_len;</div><div class='ctx'> } oppanel_line_t;</div><div class='ctx'> </div><div class='add'>+enum opal_prd_msg_type {</div><div class='add'>+	OPAL_PRD_MSG_TYPE_INIT = 0,	/* HBRT --&gt; OPAL */</div><div class='add'>+	OPAL_PRD_MSG_TYPE_FINI,		/* HBRT/kernel --&gt; OPAL */</div><div class='add'>+	OPAL_PRD_MSG_TYPE_ATTN,		/* HBRT &lt;-- OPAL */</div><div class='add'>+	OPAL_PRD_MSG_TYPE_ATTN_ACK,	/* HBRT --&gt; OPAL */</div><div class='add'>+	OPAL_PRD_MSG_TYPE_OCC_ERROR,	/* HBRT &lt;-- OPAL */</div><div class='add'>+	OPAL_PRD_MSG_TYPE_OCC_RESET,	/* HBRT &lt;-- OPAL */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct opal_prd_msg_header {</div><div class='add'>+	uint8_t		type;</div><div class='add'>+	uint8_t		pad[1];</div><div class='add'>+	__be16		size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct opal_prd_msg;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * SG entries</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h<br/>index 042af1abfc4d..958e941c0cda 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/opal.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/opal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/opal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/opal.h</a></div><div class='hunk'>@@ -186,6 +186,7 @@ int64_t opal_handle_hmi(void);</div><div class='ctx'> int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);</div><div class='ctx'> int64_t opal_unregister_dump_region(uint32_t id);</div><div class='ctx'> int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);</div><div class='add'>+int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);</div><div class='ctx'> int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);</div><div class='ctx'> int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,</div><div class='ctx'> 		uint64_t msg_len);</div><div class='hunk'>@@ -193,6 +194,7 @@ int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,</div><div class='ctx'> 		uint64_t *msg_len);</div><div class='ctx'> int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,</div><div class='ctx'> 			 struct opal_i2c_request *oreq);</div><div class='add'>+int64_t opal_prd_msg(struct opal_prd_msg *msg);</div><div class='ctx'> </div><div class='ctx'> int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,</div><div class='ctx'> 		uint64_t size, uint64_t token);</div><div class='hunk'>@@ -239,6 +241,10 @@ extern int opal_elog_init(void);</div><div class='ctx'> extern void opal_platform_dump_init(void);</div><div class='ctx'> extern void opal_sys_param_init(void);</div><div class='ctx'> extern void opal_msglog_init(void);</div><div class='add'>+extern int opal_async_comp_init(void);</div><div class='add'>+extern int opal_sensor_init(void);</div><div class='add'>+extern int opal_hmi_handler_init(void);</div><div class='add'>+extern int opal_event_init(void);</div><div class='ctx'> </div><div class='ctx'> extern int opal_machine_check(struct pt_regs *regs);</div><div class='ctx'> extern bool opal_mce_check_early_recovery(struct pt_regs *regs);</div><div class='hunk'>@@ -250,6 +256,8 @@ extern int opal_resync_timebase(void);</div><div class='ctx'> </div><div class='ctx'> extern void opal_lpc_init(void);</div><div class='ctx'> </div><div class='add'>+extern int opal_event_request(unsigned int opal_event_nr);</div><div class='add'>+</div><div class='ctx'> struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,</div><div class='ctx'> 					     unsigned long vmalloc_size);</div><div class='ctx'> void opal_free_sg_list(struct opal_sg_list *sg);</div><div class='head'>diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h<br/>index 69c059887a2c..71294a6e976e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/page.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/page.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/page.h</a></div><div class='hunk'>@@ -278,9 +278,7 @@ extern long long virt_phys_offset;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#undef STRICT_MM_TYPECHECKS</div><div class='del'>-</div><div class='del'>-#ifdef STRICT_MM_TYPECHECKS</div><div class='add'>+#ifdef CONFIG_STRICT_MM_TYPECHECKS</div><div class='ctx'> /* These are used to make use of C type-checking. */</div><div class='ctx'> </div><div class='ctx'> /* PTE level */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h<br/>index 1811c44bf34b..712add590445 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pci-bridge.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pci-bridge.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pci-bridge.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pci-bridge.h</a></div><div class='hunk'>@@ -27,9 +27,23 @@ struct pci_controller_ops {</div><div class='ctx'> 	 * allow assignment/enabling of the device. */</div><div class='ctx'> 	bool		(*enable_device_hook)(struct pci_dev *);</div><div class='ctx'> </div><div class='add'>+	void		(*disable_device)(struct pci_dev *);</div><div class='add'>+</div><div class='add'>+	void		(*release_device)(struct pci_dev *);</div><div class='add'>+</div><div class='ctx'> 	/* Called during PCI resource reassignment */</div><div class='ctx'> 	resource_size_t (*window_alignment)(struct pci_bus *, unsigned long type);</div><div class='ctx'> 	void		(*reset_secondary_bus)(struct pci_dev *dev);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+	int		(*setup_msi_irqs)(struct pci_dev *dev,</div><div class='add'>+					  int nvec, int type);</div><div class='add'>+	void		(*teardown_msi_irqs)(struct pci_dev *dev);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	int             (*dma_set_mask)(struct pci_dev *dev, u64 dma_mask);</div><div class='add'>+</div><div class='add'>+	void		(*shutdown)(struct pci_controller *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -185,7 +199,7 @@ struct pci_dn {</div><div class='ctx'> </div><div class='ctx'> 	struct  pci_dn *parent;</div><div class='ctx'> 	struct  pci_controller *phb;	/* for pci devices */</div><div class='del'>-	struct	iommu_table *iommu_table;	/* for phb's or bridges */</div><div class='add'>+	struct	iommu_table_group *table_group;	/* for phb's or bridges */</div><div class='ctx'> 	struct	device_node *node;	/* back-pointer to the device_node */</div><div class='ctx'> </div><div class='ctx'> 	int	pci_ext_config_space;	/* for pci devices */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h<br/>index 4aef8d660999..3453bd8dc18f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pci.h</a></div><div class='hunk'>@@ -13,9 +13,9 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/pci-bridge.h&gt;</div><div class='hunk'>@@ -71,36 +71,6 @@ extern struct dma_map_ops *get_pci_dma_ops(void);</div><div class='ctx'>  */</div><div class='ctx'> #define PCI_DISABLE_MWI</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = 1024;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = (int) byte * 4;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_MULTIPLE;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#else /* 32-bit */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='ctx'> extern int pci_domain_nr(struct pci_bus *bus);</div><div class='head'>diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h<br/>index 64b52b1cf542..9c326565d498 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pgtable-ppc32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pgtable-ppc32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pgtable-ppc32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pgtable-ppc32.h</a></div><div class='hunk'>@@ -170,24 +170,6 @@ static inline unsigned long pte_update(pte_t *p,</div><div class='ctx'> #ifdef PTE_ATOMIC_UPDATES</div><div class='ctx'> 	unsigned long old, tmp;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_8xx</div><div class='del'>-	unsigned long tmp2;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("\</div><div class='del'>-1:	lwarx	%0,0,%4\n\</div><div class='del'>-	andc	%1,%0,%5\n\</div><div class='del'>-	or	%1,%1,%6\n\</div><div class='del'>-	/* 0x200 == Extended encoding, bit 22 */ \</div><div class='del'>-	/* Bit 22 has to be 1 when _PAGE_USER is unset and _PAGE_RO is set */ \</div><div class='del'>-	rlwimi	%1,%1,32-1,0x200\n /* get _PAGE_RO */ \</div><div class='del'>-	rlwinm	%3,%1,32-2,0x200\n /* get _PAGE_USER */ \</div><div class='del'>-	andc	%1,%1,%3\n\</div><div class='del'>-	stwcx.	%1,0,%4\n\</div><div class='del'>-	bne-	1b"</div><div class='del'>-	: "=&amp;r" (old), "=&amp;r" (tmp), "=m" (*p), "=&amp;r" (tmp2)</div><div class='del'>-	: "r" (p), "r" (clr), "r" (set), "m" (*p)</div><div class='del'>-	: "cc" );</div><div class='del'>-#else /* CONFIG_PPC_8xx */</div><div class='ctx'> 	__asm__ __volatile__("\</div><div class='ctx'> 1:	lwarx	%0,0,%3\n\</div><div class='ctx'> 	andc	%1,%0,%4\n\</div><div class='hunk'>@@ -198,7 +180,6 @@ static inline unsigned long pte_update(pte_t *p,</div><div class='ctx'> 	: "=&amp;r" (old), "=&amp;r" (tmp), "=m" (*p)</div><div class='ctx'> 	: "r" (p), "r" (clr), "r" (set), "m" (*p)</div><div class='ctx'> 	: "cc" );</div><div class='del'>-#endif /* CONFIG_PPC_8xx */</div><div class='ctx'> #else /* PTE_ATOMIC_UPDATES */</div><div class='ctx'> 	unsigned long old = pte_val(*p);</div><div class='ctx'> 	*p = __pte((old &amp; ~clr) | set);</div><div class='head'>diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h<br/>index 43e6ad424c7f..3bb7488bd24b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pgtable-ppc64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pgtable-ppc64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pgtable-ppc64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pgtable-ppc64.h</a></div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __real_pte</div><div class='ctx'> </div><div class='del'>-#ifdef STRICT_MM_TYPECHECKS</div><div class='add'>+#ifdef CONFIG_STRICT_MM_TYPECHECKS</div><div class='ctx'> #define __real_pte(e,p)		((real_pte_t){(e)})</div><div class='ctx'> #define __rpte_to_pte(r)	((r).pte)</div><div class='ctx'> #else</div><div class='hunk'>@@ -347,11 +347,27 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)</div><div class='ctx'> 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))</div><div class='ctx'> </div><div class='ctx'> /* Encode and de-code a swap entry */</div><div class='del'>-#define __swp_type(entry)	(((entry).val &gt;&gt; 1) &amp; 0x3f)</div><div class='del'>-#define __swp_offset(entry)	((entry).val &gt;&gt; 8)</div><div class='del'>-#define __swp_entry(type, offset) ((swp_entry_t){((type)&lt;&lt; 1)|((offset)&lt;&lt;8)})</div><div class='del'>-#define __pte_to_swp_entry(pte)	((swp_entry_t){pte_val(pte) &gt;&gt; PTE_RPN_SHIFT})</div><div class='del'>-#define __swp_entry_to_pte(x)	((pte_t) { (x).val &lt;&lt; PTE_RPN_SHIFT })</div><div class='add'>+#define MAX_SWAPFILES_CHECK() do { \</div><div class='add'>+	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT &gt; SWP_TYPE_BITS); \</div><div class='add'>+	/*							\</div><div class='add'>+	 * Don't have overlapping bits with _PAGE_HPTEFLAGS	\</div><div class='add'>+	 * We filter HPTEFLAGS on set_pte.			\</div><div class='add'>+	 */							\</div><div class='add'>+	BUILD_BUG_ON(_PAGE_HPTEFLAGS &amp; (0x1f &lt;&lt; _PAGE_BIT_SWAP_TYPE)); \</div><div class='add'>+	} while (0)</div><div class='add'>+/*</div><div class='add'>+ * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;</div><div class='add'>+ */</div><div class='add'>+#define SWP_TYPE_BITS 5</div><div class='add'>+#define __swp_type(x)		(((x).val &gt;&gt; _PAGE_BIT_SWAP_TYPE) \</div><div class='add'>+				&amp; ((1UL &lt;&lt; SWP_TYPE_BITS) - 1))</div><div class='add'>+#define __swp_offset(x)		((x).val &gt;&gt; PTE_RPN_SHIFT)</div><div class='add'>+#define __swp_entry(type, offset)	((swp_entry_t) { \</div><div class='add'>+					((type) &lt;&lt; _PAGE_BIT_SWAP_TYPE) \</div><div class='add'>+					| ((offset) &lt;&lt; PTE_RPN_SHIFT) })</div><div class='add'>+</div><div class='add'>+#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })</div><div class='add'>+#define __swp_entry_to_pte(x)		__pte((x).val)</div><div class='ctx'> </div><div class='ctx'> void pgtable_cache_add(unsigned shift, void (*ctor)(void *));</div><div class='ctx'> void pgtable_cache_init(void);</div><div class='hunk'>@@ -553,13 +569,9 @@ extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,</div><div class='ctx'> extern int pmdp_clear_flush_young(struct vm_area_struct *vma,</div><div class='ctx'> 				  unsigned long address, pmd_t *pmdp);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-extern pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				unsigned long addr, pmd_t *pmdp);</div><div class='del'>-</div><div class='del'>-#define __HAVE_ARCH_PMDP_CLEAR_FLUSH</div><div class='del'>-extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,</div><div class='del'>-			      pmd_t *pmdp);</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+extern pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+				     unsigned long addr, pmd_t *pmdp);</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PMDP_SET_WRPROTECT</div><div class='ctx'> static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,</div><div class='hunk'>@@ -576,6 +588,10 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> extern void pmdp_splitting_flush(struct vm_area_struct *vma,</div><div class='ctx'> 				 unsigned long address, pmd_t *pmdp);</div><div class='ctx'> </div><div class='add'>+extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,</div><div class='add'>+				 unsigned long address, pmd_t *pmdp);</div><div class='add'>+#define pmdp_collapse_flush pmdp_collapse_flush</div><div class='add'>+</div><div class='ctx'> #define __HAVE_ARCH_PGTABLE_DEPOSIT</div><div class='ctx'> extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,</div><div class='ctx'> 				       pgtable_t pgtable);</div><div class='head'>diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h<br/>index f9b498292a5c..6f77f71ee964 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pnv-pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pnv-pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pnv-pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pnv-pci.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define _ASM_PNV_PCI_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;misc/cxl.h&gt;</div><div class='add'>+#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);</div><div class='ctx'> int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,</div><div class='head'>diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h<br/>index 5c93f691b495..8452335661a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/ppc-opcode.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/ppc-opcode.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/ppc-opcode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/ppc-opcode.h</a></div><div class='hunk'>@@ -136,6 +136,8 @@</div><div class='ctx'> #define PPC_INST_DCBAL			0x7c2005ec</div><div class='ctx'> #define PPC_INST_DCBZL			0x7c2007ec</div><div class='ctx'> #define PPC_INST_ICBT			0x7c00002c</div><div class='add'>+#define PPC_INST_ICSWX			0x7c00032d</div><div class='add'>+#define PPC_INST_ICSWEPX		0x7c00076d</div><div class='ctx'> #define PPC_INST_ISEL			0x7c00001e</div><div class='ctx'> #define PPC_INST_ISEL_MASK		0xfc00003e</div><div class='ctx'> #define PPC_INST_LDARX			0x7c0000a8</div><div class='hunk'>@@ -403,4 +405,15 @@</div><div class='ctx'> #define MFTMR(tmr, r)		stringify_in_c(.long PPC_INST_MFTMR | \</div><div class='ctx'> 					       TMRN(tmr) | ___PPC_RT(r))</div><div class='ctx'> </div><div class='add'>+/* Coprocessor instructions */</div><div class='add'>+#define PPC_ICSWX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWX |	\</div><div class='add'>+					       ___PPC_RS(s) |		\</div><div class='add'>+					       ___PPC_RA(a) |		\</div><div class='add'>+					       ___PPC_RB(b))</div><div class='add'>+#define PPC_ICSWEPX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWEPX | \</div><div class='add'>+					       ___PPC_RS(s) |		\</div><div class='add'>+					       ___PPC_RA(a) |		\</div><div class='add'>+					       ___PPC_RB(b))</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_POWERPC_PPC_OPCODE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h<br/>index bf117d8fb45f..28ded5d9b579 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/processor.h</a></div><div class='hunk'>@@ -295,6 +295,15 @@ struct thread_struct {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	unsigned long	dscr;</div><div class='add'>+	/*</div><div class='add'>+	 * This member element dscr_inherit indicates that the process</div><div class='add'>+	 * has explicitly attempted and changed the DSCR register value</div><div class='add'>+	 * for itself. Hence kernel wont use the default CPU DSCR value</div><div class='add'>+	 * contained in the PACA structure anymore during process context</div><div class='add'>+	 * switch. Once this variable is set, this behaviour will also be</div><div class='add'>+	 * inherited to all the children of this process from that point</div><div class='add'>+	 * onwards.</div><div class='add'>+	 */</div><div class='ctx'> 	int		dscr_inherit;</div><div class='ctx'> 	unsigned long	ppr;	/* used to save/restore SMT priority */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h<br/>index 97bae64afdaa..a0e2ba960976 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-8xx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pte-8xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-8xx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-8xx.h</a></div><div class='hunk'>@@ -34,35 +34,32 @@</div><div class='ctx'> #define _PAGE_SPECIAL	0x0008	/* SW entry, forced to 0 by the TLB miss */</div><div class='ctx'> #define _PAGE_DIRTY	0x0100	/* C: page changed */</div><div class='ctx'> </div><div class='del'>-/* These 4 software bits must be masked out when the entry is loaded</div><div class='del'>- * into the TLB, 1 SW bit left(0x0080).</div><div class='add'>+/* These 4 software bits must be masked out when the L2 entry is loaded</div><div class='add'>+ * into the TLB.</div><div class='ctx'>  */</div><div class='del'>-#define _PAGE_GUARDED	0x0010	/* software: guarded access */</div><div class='del'>-#define _PAGE_ACCESSED	0x0020	/* software: page referenced */</div><div class='del'>-#define _PAGE_WRITETHRU	0x0040	/* software: caching is write through */</div><div class='add'>+#define _PAGE_GUARDED	0x0010	/* Copied to L1 G entry in DTLB */</div><div class='add'>+#define _PAGE_USER	0x0020	/* Copied to L1 APG lsb */</div><div class='add'>+#define _PAGE_EXEC	0x0040	/* Copied to L1 APG */</div><div class='add'>+#define _PAGE_WRITETHRU	0x0080	/* software: caching is write through */</div><div class='add'>+#define _PAGE_ACCESSED	0x0800	/* software: page referenced */</div><div class='ctx'> </div><div class='del'>-/* Setting any bits in the nibble with the follow two controls will</div><div class='del'>- * require a TLB exception handler change.  It is assumed unused bits</div><div class='del'>- * are always zero.</div><div class='del'>- */</div><div class='del'>-#define _PAGE_RO	0x0400	/* lsb PP bits */</div><div class='del'>-#define _PAGE_USER	0x0800	/* msb PP bits */</div><div class='del'>-/* set when _PAGE_USER is unset and _PAGE_RO is set */</div><div class='del'>-#define _PAGE_KNLRO	0x0200</div><div class='add'>+#define _PAGE_RO	0x0600	/* Supervisor RO, User no access */</div><div class='ctx'> </div><div class='ctx'> #define _PMD_PRESENT	0x0001</div><div class='ctx'> #define _PMD_BAD	0x0ff0</div><div class='ctx'> #define _PMD_PAGE_MASK	0x000c</div><div class='ctx'> #define _PMD_PAGE_8M	0x000c</div><div class='ctx'> </div><div class='del'>-#define _PTE_NONE_MASK _PAGE_KNLRO</div><div class='del'>-</div><div class='ctx'> /* Until my rework is finished, 8xx still needs atomic PTE updates */</div><div class='ctx'> #define PTE_ATOMIC_UPDATES	1</div><div class='ctx'> </div><div class='ctx'> /* We need to add _PAGE_SHARED to kernel pages */</div><div class='del'>-#define _PAGE_KERNEL_RO	(_PAGE_SHARED | _PAGE_RO | _PAGE_KNLRO)</div><div class='del'>-#define _PAGE_KERNEL_ROX	(_PAGE_EXEC | _PAGE_RO | _PAGE_KNLRO)</div><div class='add'>+#define _PAGE_KERNEL_RO		(_PAGE_SHARED | _PAGE_RO)</div><div class='add'>+#define _PAGE_KERNEL_ROX	(_PAGE_SHARED | _PAGE_RO | _PAGE_EXEC)</div><div class='add'>+#define _PAGE_KERNEL_RW		(_PAGE_SHARED | _PAGE_DIRTY | _PAGE_RW | \</div><div class='add'>+				 _PAGE_HWWRITE)</div><div class='add'>+#define _PAGE_KERNEL_RWX	(_PAGE_SHARED | _PAGE_DIRTY | _PAGE_RW | \</div><div class='add'>+				 _PAGE_HWWRITE | _PAGE_EXEC)</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /*  _ASM_POWERPC_PTE_8xx_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pte-book3e.h b/arch/powerpc/include/asm/pte-book3e.h<br/>index 91a704952ca1..8d8473278d91 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-book3e.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pte-book3e.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-book3e.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-book3e.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> /* Architected bits */</div><div class='ctx'> #define _PAGE_PRESENT	0x000001 /* software: pte contains a translation */</div><div class='ctx'> #define _PAGE_SW1	0x000002</div><div class='add'>+#define _PAGE_BIT_SWAP_TYPE	2</div><div class='ctx'> #define _PAGE_BAP_SR	0x000004</div><div class='ctx'> #define _PAGE_BAP_UR	0x000008</div><div class='ctx'> #define _PAGE_BAP_SW	0x000010</div><div class='head'>diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h<br/>index c5a755ef7011..b7c8d079c121 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pte-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-common.h</a></div><div class='hunk'>@@ -85,10 +85,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);</div><div class='ctx'>  * 64-bit PTEs</div><div class='ctx'>  */</div><div class='ctx'> #if defined(CONFIG_PPC32) &amp;&amp; defined(CONFIG_PTE_64BIT)</div><div class='del'>-#define PTE_RPN_MAX	(1ULL &lt;&lt; (64 - PTE_RPN_SHIFT))</div><div class='ctx'> #define PTE_RPN_MASK	(~((1ULL&lt;&lt;PTE_RPN_SHIFT)-1))</div><div class='ctx'> #else</div><div class='del'>-#define PTE_RPN_MAX	(1UL &lt;&lt; (32 - PTE_RPN_SHIFT))</div><div class='ctx'> #define PTE_RPN_MASK	(~((1UL&lt;&lt;PTE_RPN_SHIFT)-1))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/pte-hash64.h b/arch/powerpc/include/asm/pte-hash64.h<br/>index fc852f7e7b3a..ef612c160da7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-hash64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/pte-hash64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pte-hash64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/pte-hash64.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define _PAGE_PRESENT		0x0001 /* software: pte contains a translation */</div><div class='ctx'> #define _PAGE_USER		0x0002 /* matches one of the PP bits */</div><div class='add'>+#define _PAGE_BIT_SWAP_TYPE	2</div><div class='ctx'> #define _PAGE_EXEC		0x0004 /* No execute on POWER4 and newer (we invert) */</div><div class='ctx'> #define _PAGE_GUARDED		0x0008</div><div class='ctx'> /* We can derive Memory coherence from _PAGE_NO_CACHE */</div><div class='head'>diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h<br/>index f1863a138b4a..71f2b3f02cf8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/systbl.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/systbl.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/systbl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/systbl.h</a></div><div class='hunk'>@@ -358,7 +358,7 @@ SYSCALL_SPU(setns)</div><div class='ctx'> COMPAT_SYS(process_vm_readv)</div><div class='ctx'> COMPAT_SYS(process_vm_writev)</div><div class='ctx'> SYSCALL(finit_module)</div><div class='del'>-SYSCALL(ni_syscall) /* sys_kcmp */</div><div class='add'>+SYSCALL(kcmp) /* sys_kcmp */</div><div class='ctx'> SYSCALL_SPU(sched_setattr)</div><div class='ctx'> SYSCALL_SPU(sched_getattr)</div><div class='ctx'> SYSCALL_SPU(renameat2)</div><div class='head'>diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h<br/>index 5f1048eaa5b6..8b3b46b7b0f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/topology.h</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static inline int prrn_is_enabled(void)</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_to_chip_id(cpu))</div><div class='del'>-#define topology_thread_cpumask(cpu)	(per_cpu(cpu_sibling_map, cpu))</div><div class='add'>+#define topology_sibling_cpumask(cpu)	(per_cpu(cpu_sibling_map, cpu))</div><div class='ctx'> #define topology_core_cpumask(cpu)	(per_cpu(cpu_core_map, cpu))</div><div class='ctx'> #define topology_core_id(cpu)		(cpu_to_core_id(cpu))</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/trace.h b/arch/powerpc/include/asm/trace.h<br/>index c15da6073cb8..8e86b48d0369 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/trace.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/trace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/trace.h</a></div><div class='hunk'>@@ -144,6 +144,26 @@ TRACE_EVENT_FN(opal_exit,</div><div class='ctx'> );</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+TRACE_EVENT(hash_fault,</div><div class='add'>+</div><div class='add'>+	    TP_PROTO(unsigned long addr, unsigned long access, unsigned long trap),</div><div class='add'>+	    TP_ARGS(addr, access, trap),</div><div class='add'>+	    TP_STRUCT__entry(</div><div class='add'>+		    __field(unsigned long, addr)</div><div class='add'>+		    __field(unsigned long, access)</div><div class='add'>+		    __field(unsigned long, trap)</div><div class='add'>+		    ),</div><div class='add'>+</div><div class='add'>+	    TP_fast_assign(</div><div class='add'>+		    __entry-&gt;addr = addr;</div><div class='add'>+		    __entry-&gt;access = access;</div><div class='add'>+		    __entry-&gt;trap = trap;</div><div class='add'>+		    ),</div><div class='add'>+</div><div class='add'>+	    TP_printk("hash fault with addr 0x%lx and access = 0x%lx trap = 0x%lx",</div><div class='add'>+		      __entry-&gt;addr, __entry-&gt;access, __entry-&gt;trap)</div><div class='add'>+);</div><div class='add'>+</div><div class='ctx'> #endif /* _TRACE_POWERPC_H */</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_INCLUDE_PATH</div><div class='head'>diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h<br/>index a0c071d24e0e..2a8ebae0936b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -265,7 +265,7 @@ do {								\</div><div class='ctx'> ({								\</div><div class='ctx'> 	long __gu_err;						\</div><div class='ctx'> 	unsigned long __gu_val;					\</div><div class='del'>-	const __typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='add'>+	__typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='ctx'> 	__chk_user_ptr(ptr);					\</div><div class='ctx'> 	if (!is_kernel_addr((unsigned long)__gu_addr))		\</div><div class='ctx'> 		might_fault();					\</div><div class='hunk'>@@ -279,7 +279,7 @@ do {								\</div><div class='ctx'> ({								\</div><div class='ctx'> 	long __gu_err;						\</div><div class='ctx'> 	long long __gu_val;					\</div><div class='del'>-	const __typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='add'>+	__typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='ctx'> 	__chk_user_ptr(ptr);					\</div><div class='ctx'> 	if (!is_kernel_addr((unsigned long)__gu_addr))		\</div><div class='ctx'> 		might_fault();					\</div><div class='hunk'>@@ -293,7 +293,7 @@ do {								\</div><div class='ctx'> ({									\</div><div class='ctx'> 	long __gu_err = -EFAULT;					\</div><div class='ctx'> 	unsigned long  __gu_val = 0;					\</div><div class='del'>-	const __typeof__(*(ptr)) __user *__gu_addr = (ptr);		\</div><div class='add'>+	__typeof__(*(ptr)) __user *__gu_addr = (ptr);		\</div><div class='ctx'> 	might_fault();							\</div><div class='ctx'> 	if (access_ok(VERIFY_READ, __gu_addr, (size)))			\</div><div class='ctx'> 		__get_user_size(__gu_val, __gu_addr, (size), __gu_err);	\</div><div class='hunk'>@@ -305,7 +305,7 @@ do {								\</div><div class='ctx'> ({								\</div><div class='ctx'> 	long __gu_err;						\</div><div class='ctx'> 	unsigned long __gu_val;					\</div><div class='del'>-	const __typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='add'>+	__typeof__(*(ptr)) __user *__gu_addr = (ptr);	\</div><div class='ctx'> 	__chk_user_ptr(ptr);					\</div><div class='ctx'> 	__get_user_size(__gu_val, __gu_addr, (size), __gu_err);	\</div><div class='ctx'> 	(x) = (__force __typeof__(*(ptr)))__gu_val;			\</div><div class='head'>diff --git a/arch/powerpc/include/asm/vio.h b/arch/powerpc/include/asm/vio.h<br/>index 4f9b7ca0710f..84286ec77b12 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/vio.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/asm/vio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/vio.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/asm/vio.h</a></div><div class='hunk'>@@ -19,9 +19,9 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hvcall.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Architecture-specific constants for drivers to</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild<br/>index 79c4068be278..f44a027818af 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/uapi/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/Kbuild</a></div><div class='hunk'>@@ -18,6 +18,7 @@ header-y += kvm_para.h</div><div class='ctx'> header-y += mman.h</div><div class='ctx'> header-y += msgbuf.h</div><div class='ctx'> header-y += nvram.h</div><div class='add'>+header-y += opal-prd.h</div><div class='ctx'> header-y += param.h</div><div class='ctx'> header-y += perf_event.h</div><div class='ctx'> header-y += poll.h</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h<br/>index de2c0e4ee1aa..43686043e297 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/cputable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/uapi/asm/cputable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/cputable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/cputable.h</a></div><div class='hunk'>@@ -42,5 +42,6 @@</div><div class='ctx'> #define PPC_FEATURE2_ISEL		0x08000000</div><div class='ctx'> #define PPC_FEATURE2_TAR		0x04000000</div><div class='ctx'> #define PPC_FEATURE2_VEC_CRYPTO		0x02000000</div><div class='add'>+#define PPC_FEATURE2_HTM_NOSC		0x01000000</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI__ASM_POWERPC_CPUTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/eeh.h b/arch/powerpc/include/uapi/asm/eeh.h<br/>new file mode 100644<br/>index 000000000000..291b7d1814a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/eeh.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/eeh.h</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='add'>+ *</div><div class='add'>+ * Copyright IBM Corp. 2015</div><div class='add'>+ *</div><div class='add'>+ * Authors: Gavin Shan &lt;gwshan@linux.vnet.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_POWERPC_EEH_H</div><div class='add'>+#define _ASM_POWERPC_EEH_H</div><div class='add'>+</div><div class='add'>+/* PE states */</div><div class='add'>+#define EEH_PE_STATE_NORMAL		0	/* Normal state		*/</div><div class='add'>+#define EEH_PE_STATE_RESET		1	/* PE reset asserted	*/</div><div class='add'>+#define EEH_PE_STATE_STOPPED_IO_DMA	2	/* Frozen PE		*/</div><div class='add'>+#define EEH_PE_STATE_STOPPED_DMA	4	/* Stopped DMA only	*/</div><div class='add'>+#define EEH_PE_STATE_UNAVAIL		5	/* Unavailable		*/</div><div class='add'>+</div><div class='add'>+/* EEH error types and functions */</div><div class='add'>+#define EEH_ERR_TYPE_32			0       /* 32-bits error	*/</div><div class='add'>+#define EEH_ERR_TYPE_64			1       /* 64-bits error	*/</div><div class='add'>+#define EEH_ERR_FUNC_MIN		0</div><div class='add'>+#define EEH_ERR_FUNC_LD_MEM_ADDR	0	/* Memory load	*/</div><div class='add'>+#define EEH_ERR_FUNC_LD_MEM_DATA	1</div><div class='add'>+#define EEH_ERR_FUNC_LD_IO_ADDR		2	/* IO load	*/</div><div class='add'>+#define EEH_ERR_FUNC_LD_IO_DATA		3</div><div class='add'>+#define EEH_ERR_FUNC_LD_CFG_ADDR	4	/* Config load	*/</div><div class='add'>+#define EEH_ERR_FUNC_LD_CFG_DATA	5</div><div class='add'>+#define EEH_ERR_FUNC_ST_MEM_ADDR	6	/* Memory store	*/</div><div class='add'>+#define EEH_ERR_FUNC_ST_MEM_DATA	7</div><div class='add'>+#define EEH_ERR_FUNC_ST_IO_ADDR		8	/* IO store	*/</div><div class='add'>+#define EEH_ERR_FUNC_ST_IO_DATA		9</div><div class='add'>+#define EEH_ERR_FUNC_ST_CFG_ADDR	10	/* Config store	*/</div><div class='add'>+#define EEH_ERR_FUNC_ST_CFG_DATA	11</div><div class='add'>+#define EEH_ERR_FUNC_DMA_RD_ADDR	12	/* DMA read	*/</div><div class='add'>+#define EEH_ERR_FUNC_DMA_RD_DATA	13</div><div class='add'>+#define EEH_ERR_FUNC_DMA_RD_MASTER	14</div><div class='add'>+#define EEH_ERR_FUNC_DMA_RD_TARGET	15</div><div class='add'>+#define EEH_ERR_FUNC_DMA_WR_ADDR	16	/* DMA write	*/</div><div class='add'>+#define EEH_ERR_FUNC_DMA_WR_DATA	17</div><div class='add'>+#define EEH_ERR_FUNC_DMA_WR_MASTER	18</div><div class='add'>+#define EEH_ERR_FUNC_DMA_WR_TARGET	19</div><div class='add'>+#define EEH_ERR_FUNC_MAX		19</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_POWERPC_EEH_H */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/opal-prd.h b/arch/powerpc/include/uapi/asm/opal-prd.h<br/>new file mode 100644<br/>index 000000000000..319ff4a26158<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/opal-prd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/opal-prd.h</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+/*</div><div class='add'>+ * OPAL Runtime Diagnostics interface driver</div><div class='add'>+ * Supported on POWERNV platform</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright IBM 2015</div><div class='add'>+ *</div><div class='add'>+ * Author: Vaidyanathan Srinivasan &lt;svaidy at linux.vnet.ibm.com&gt;</div><div class='add'>+ * Author: Jeremy Kerr &lt;jk@ozlabs.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _UAPI_ASM_POWERPC_OPAL_PRD_H_</div><div class='add'>+#define _UAPI_ASM_POWERPC_OPAL_PRD_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * The version of the kernel interface of the PRD system. This describes the</div><div class='add'>+ * interface available for the /dev/opal-prd device. The actual PRD message</div><div class='add'>+ * layout and content is private to the firmware &lt;--&gt; userspace interface, so</div><div class='add'>+ * is not covered by this versioning.</div><div class='add'>+ *</div><div class='add'>+ * Future interface versions are backwards-compatible; if a later kernel</div><div class='add'>+ * version is encountered, functionality provided in earlier versions</div><div class='add'>+ * will work.</div><div class='add'>+ */</div><div class='add'>+#define OPAL_PRD_KERNEL_VERSION		1</div><div class='add'>+</div><div class='add'>+#define OPAL_PRD_GET_INFO		_IOR('o', 0x01, struct opal_prd_info)</div><div class='add'>+#define OPAL_PRD_SCOM_READ		_IOR('o', 0x02, struct opal_prd_scom)</div><div class='add'>+#define OPAL_PRD_SCOM_WRITE		_IOW('o', 0x03, struct opal_prd_scom)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+struct opal_prd_info {</div><div class='add'>+	__u64	version;</div><div class='add'>+	__u64	reserved[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct opal_prd_scom {</div><div class='add'>+	__u64	chip;</div><div class='add'>+	__u64	addr;</div><div class='add'>+	__u64	data;</div><div class='add'>+	__s64	rc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_ASM_POWERPC_OPAL_PRD_H */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/tm.h b/arch/powerpc/include/uapi/asm/tm.h<br/>index 5d836b7c1176..5047659815a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/tm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/include/uapi/asm/tm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/uapi/asm/tm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/include/uapi/asm/tm.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define TM_CAUSE_RESCHED	0xde</div><div class='ctx'> #define TM_CAUSE_TLBI		0xdc</div><div class='ctx'> #define TM_CAUSE_FAC_UNAV	0xda</div><div class='del'>-#define TM_CAUSE_SYSCALL	0xd8  /* future use */</div><div class='add'>+#define TM_CAUSE_SYSCALL	0xd8</div><div class='ctx'> #define TM_CAUSE_MISC		0xd6  /* future use */</div><div class='ctx'> #define TM_CAUSE_SIGNAL		0xd4</div><div class='ctx'> #define TM_CAUSE_ALIGNMENT	0xd2</div><div class='head'>diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile<br/>index c1ebbdaac28f..12868b1c4e05 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-CFLAGS_prom.o		= -I$(src)/../../../scripts/dtc/libfdt</div><div class='ctx'> CFLAGS_ptrace.o		+= -DUTS_MACHINE='"$(UTS_MACHINE)"'</div><div class='ctx'> </div><div class='ctx'> subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror</div><div class='hunk'>@@ -33,11 +32,12 @@ obj-y				:= cputable.o ptrace.o syscalls.o \</div><div class='ctx'> 				   signal.o sysfs.o cacheinfo.o time.o \</div><div class='ctx'> 				   prom.o traps.o setup-common.o \</div><div class='ctx'> 				   udbg.o misc.o io.o dma.o \</div><div class='del'>-				   misc_$(CONFIG_WORD_SIZE).o vdso32/ \</div><div class='add'>+				   misc_$(CONFIG_WORD_SIZE).o \</div><div class='ctx'> 				   of_platform.o prom_parse.o</div><div class='ctx'> obj-$(CONFIG_PPC64)		+= setup_64.o sys_ppc32.o \</div><div class='ctx'> 				   signal_64.o ptrace32.o \</div><div class='ctx'> 				   paca.o nvram_64.o firmware.o</div><div class='add'>+obj-$(CONFIG_VDSO32)		+= vdso32/</div><div class='ctx'> obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o</div><div class='ctx'> obj-$(CONFIG_PPC_BOOK3S_64)	+= cpu_setup_ppc970.o cpu_setup_pa6t.o</div><div class='ctx'> obj-$(CONFIG_PPC_BOOK3S_64)	+= cpu_setup_power.o</div><div class='head'>diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c<br/>index 0034b6b3556a..98230579d99c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/asm-offsets.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -247,7 +247,7 @@ int main(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));</div><div class='ctx'> 	DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));</div><div class='del'>-	DEFINE(PACA_DSCR, offsetof(struct paca_struct, dscr_default));</div><div class='add'>+	DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default));</div><div class='ctx'> 	DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));</div><div class='ctx'> 	DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));</div><div class='ctx'> 	DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));</div><div class='head'>diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c<br/>index 60262fdf35ba..7d80bfdfb15e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/cputable.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/cputable.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/cputable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/cputable.c</a></div><div class='hunk'>@@ -108,7 +108,9 @@ extern void __restore_cpu_e6500(void);</div><div class='ctx'> 				 PPC_FEATURE_TRUE_LE | \</div><div class='ctx'> 				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)</div><div class='ctx'> #define COMMON_USER2_POWER8	(PPC_FEATURE2_ARCH_2_07 | \</div><div class='del'>-				 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \</div><div class='add'>+				 PPC_FEATURE2_HTM_COMP | \</div><div class='add'>+				 PPC_FEATURE2_HTM_NOSC_COMP | \</div><div class='add'>+				 PPC_FEATURE2_DSCR | \</div><div class='ctx'> 				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \</div><div class='ctx'> 				 PPC_FEATURE2_VEC_CRYPTO)</div><div class='ctx'> #define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\</div><div class='head'>diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c<br/>index 484b2d4462c1..35e4dcc5dce3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/dma.c</a></div><div class='hunk'>@@ -248,6 +248,14 @@ int dma_set_mask(struct device *dev, u64 dma_mask)</div><div class='ctx'> {</div><div class='ctx'> 	if (ppc_md.dma_set_mask)</div><div class='ctx'> 		return ppc_md.dma_set_mask(dev, dma_mask);</div><div class='add'>+</div><div class='add'>+	if (dev_is_pci(dev)) {</div><div class='add'>+		struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+		struct pci_controller *phb = pci_bus_to_host(pdev-&gt;bus);</div><div class='add'>+		if (phb-&gt;controller_ops.dma_set_mask)</div><div class='add'>+			return phb-&gt;controller_ops.dma_set_mask(pdev, dma_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return __dma_set_mask(dev, dma_mask);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_set_mask);</div><div class='head'>diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c<br/>index 9ee61d15653d..af9b597b10af 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/eeh.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh.c</a></div><div class='hunk'>@@ -144,8 +144,6 @@ struct eeh_stats {</div><div class='ctx'> </div><div class='ctx'> static struct eeh_stats eeh_stats;</div><div class='ctx'> </div><div class='del'>-#define IS_BRIDGE(class_code) (((class_code)&lt;&lt;16) == PCI_BASE_CLASS_BRIDGE)</div><div class='del'>-</div><div class='ctx'> static int __init eeh_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!strcmp(str, "off"))</div><div class='hunk'>@@ -719,7 +717,7 @@ static void *eeh_restore_dev_state(void *data, void *userdata)</div><div class='ctx'> </div><div class='ctx'> 	/* The caller should restore state for the specified device */</div><div class='ctx'> 	if (pdev != dev)</div><div class='del'>-		pci_save_state(pdev);</div><div class='add'>+		pci_restore_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -1412,13 +1410,11 @@ static int dev_has_iommu_table(struct device *dev, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='ctx'> 	struct pci_dev **ppdev = data;</div><div class='del'>-	struct iommu_table *tbl;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	tbl = get_iommu_table_base(dev);</div><div class='del'>-	if (tbl &amp;&amp; tbl-&gt;it_group) {</div><div class='add'>+	if (dev-&gt;iommu_group) {</div><div class='ctx'> 		*ppdev = pdev;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1647,6 +1643,41 @@ int eeh_pe_configure(struct eeh_pe *pe)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(eeh_pe_configure);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE</div><div class='add'>+ * @pe: the indicated PE</div><div class='add'>+ * @type: error type</div><div class='add'>+ * @function: error function</div><div class='add'>+ * @addr: address</div><div class='add'>+ * @mask: address mask</div><div class='add'>+ *</div><div class='add'>+ * The routine is called to inject the specified PCI error, which</div><div class='add'>+ * is determined by @type and @function, to the indicated PE for</div><div class='add'>+ * testing purpose.</div><div class='add'>+ */</div><div class='add'>+int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func,</div><div class='add'>+		      unsigned long addr, unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	/* Invalid PE ? */</div><div class='add'>+	if (!pe)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Unsupported operation ? */</div><div class='add'>+	if (!eeh_ops || !eeh_ops-&gt;err_inject)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	/* Check on PCI error type */</div><div class='add'>+	if (type != EEH_ERR_TYPE_32 &amp;&amp; type != EEH_ERR_TYPE_64)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Check on PCI error function */</div><div class='add'>+	if (func &lt; EEH_ERR_FUNC_MIN || func &gt; EEH_ERR_FUNC_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return eeh_ops-&gt;err_inject(pe, type, func, addr, mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(eeh_pe_inject_err);</div><div class='add'>+</div><div class='ctx'> static int proc_eeh_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	if (!eeh_enabled()) {</div><div class='head'>diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c<br/>index eeabeabea49c..a1e86e172e3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh_cache.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/eeh_cache.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh_cache.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh_cache.c</a></div><div class='hunk'>@@ -48,11 +48,11 @@</div><div class='ctx'>  */</div><div class='ctx'> struct pci_io_addr_range {</div><div class='ctx'> 	struct rb_node rb_node;</div><div class='del'>-	unsigned long addr_lo;</div><div class='del'>-	unsigned long addr_hi;</div><div class='add'>+	resource_size_t addr_lo;</div><div class='add'>+	resource_size_t addr_hi;</div><div class='ctx'> 	struct eeh_dev *edev;</div><div class='ctx'> 	struct pci_dev *pcidev;</div><div class='del'>-	unsigned int flags;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct pci_io_addr_cache {</div><div class='hunk'>@@ -125,8 +125,8 @@ static void eeh_addr_cache_print(struct pci_io_addr_cache *cache)</div><div class='ctx'> </div><div class='ctx'> /* Insert address range into the rb tree. */</div><div class='ctx'> static struct pci_io_addr_range *</div><div class='del'>-eeh_addr_cache_insert(struct pci_dev *dev, unsigned long alo,</div><div class='del'>-		      unsigned long ahi, unsigned int flags)</div><div class='add'>+eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo,</div><div class='add'>+		      resource_size_t ahi, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_node **p = &amp;pci_io_addr_cache_root.rb_root.rb_node;</div><div class='ctx'> 	struct rb_node *parent = NULL;</div><div class='hunk'>@@ -197,9 +197,9 @@ static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Walk resources on this device, poke them into the tree */</div><div class='ctx'> 	for (i = 0; i &lt; DEVICE_COUNT_RESOURCE; i++) {</div><div class='del'>-		unsigned long start = pci_resource_start(dev,i);</div><div class='del'>-		unsigned long end = pci_resource_end(dev,i);</div><div class='del'>-		unsigned int flags = pci_resource_flags(dev,i);</div><div class='add'>+		resource_size_t start = pci_resource_start(dev,i);</div><div class='add'>+		resource_size_t end = pci_resource_end(dev,i);</div><div class='add'>+		unsigned long flags = pci_resource_flags(dev,i);</div><div class='ctx'> </div><div class='ctx'> 		/* We are interested only bus addresses, not dma or other stuff */</div><div class='ctx'> 		if (0 == (flags &amp; (IORESOURCE_IO | IORESOURCE_MEM)))</div><div class='head'>diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c<br/>index 24768ff3cb73..89eb4bc34d3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh_driver.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/eeh_driver.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/eeh_driver.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/eeh_driver.c</a></div><div class='hunk'>@@ -660,7 +660,7 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)</div><div class='ctx'> 	eeh_pe_dev_traverse(pe, eeh_report_error, &amp;result);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the current PCI slot state. This can take a long time,</div><div class='del'>-	 * sometimes over 3 seconds for certain systems.</div><div class='add'>+	 * sometimes over 300 seconds for certain systems.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rc = eeh_ops-&gt;wait_state(pe, MAX_WAIT_FOR_RECOVERY*1000);</div><div class='ctx'> 	if (rc &lt; 0 || rc == EEH_STATE_NOT_SUPPORT) {</div><div class='head'>diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S<br/>index afbc20019c2e..579e0f9a2d57 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/entry_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/entry_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/entry_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/entry_64.S</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/context_tracking.h&gt;</div><div class='add'>+#include &lt;asm/tm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * System calls.</div><div class='hunk'>@@ -51,6 +52,12 @@ exception_marker:</div><div class='ctx'> </div><div class='ctx'> 	.globl system_call_common</div><div class='ctx'> system_call_common:</div><div class='add'>+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	extrdi.	r10, r12, 1, (63-MSR_TS_T_LG) /* transaction active? */</div><div class='add'>+	bne	tabort_syscall</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_TM)</div><div class='add'>+#endif</div><div class='ctx'> 	andi.	r10,r12,MSR_PR</div><div class='ctx'> 	mr	r10,r1</div><div class='ctx'> 	addi	r1,r1,-INT_FRAME_SIZE</div><div class='hunk'>@@ -311,6 +318,34 @@ syscall_exit_work:</div><div class='ctx'> 	bl	do_syscall_trace_leave</div><div class='ctx'> 	b	ret_from_except</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM</div><div class='add'>+tabort_syscall:</div><div class='add'>+	/* Firstly we need to enable TM in the kernel */</div><div class='add'>+	mfmsr	r10</div><div class='add'>+	li	r13, 1</div><div class='add'>+	rldimi	r10, r13, MSR_TM_LG, 63-MSR_TM_LG</div><div class='add'>+	mtmsrd	r10, 0</div><div class='add'>+</div><div class='add'>+	/* tabort, this dooms the transaction, nothing else */</div><div class='add'>+	li	r13, (TM_CAUSE_SYSCALL|TM_CAUSE_PERSISTENT)</div><div class='add'>+	TABORT(R13)</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return directly to userspace. We have corrupted user register state,</div><div class='add'>+	 * but userspace will never see that register state. Execution will</div><div class='add'>+	 * resume after the tbegin of the aborted transaction with the</div><div class='add'>+	 * checkpointed register state.</div><div class='add'>+	 */</div><div class='add'>+	li	r13, MSR_RI</div><div class='add'>+	andc	r10, r10, r13</div><div class='add'>+	mtmsrd	r10, 1</div><div class='add'>+	mtspr	SPRN_SRR0, r11</div><div class='add'>+	mtspr	SPRN_SRR1, r12</div><div class='add'>+</div><div class='add'>+	rfid</div><div class='add'>+	b	.	/* prevent speculative execution */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Save non-volatile GPRs, if not already saved. */</div><div class='ctx'> _GLOBAL(save_nvgprs)</div><div class='ctx'> 	ld	r11,_TRAP(r1)</div><div class='hunk'>@@ -556,7 +591,7 @@ BEGIN_FTR_SECTION</div><div class='ctx'> 	ld	r0,THREAD_DSCR(r4)</div><div class='ctx'> 	cmpwi	r6,0</div><div class='ctx'> 	bne	1f</div><div class='del'>-	ld	r0,PACA_DSCR(r13)</div><div class='add'>+	ld	r0,PACA_DSCR_DEFAULT(r13)</div><div class='ctx'> 1:</div><div class='ctx'> BEGIN_FTR_SECTION_NESTED(70)</div><div class='ctx'> 	mfspr	r8, SPRN_FSCR</div><div class='head'>diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S<br/>index 9519e6bdc6d7..0a0399c2af11 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/exceptions-64s.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/exceptions-64s.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/exceptions-64s.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/exceptions-64s.S</a></div><div class='hunk'>@@ -59,14 +59,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)				\</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_RELOCATABLE)</div><div class='ctx'> 	/*</div><div class='del'>-	 * We can't branch directly; in the direct case we use LR</div><div class='del'>-	 * and system_call_entry restores LR.  (We thus need to move</div><div class='del'>-	 * LR to r10 in the RFID case too.)</div><div class='add'>+	 * We can't branch directly so we do it via the CTR which</div><div class='add'>+	 * is volatile across system calls.</div><div class='ctx'> 	 */</div><div class='ctx'> #define SYSCALL_PSERIES_2_DIRECT				\</div><div class='ctx'> 	mflr	r10 ;						\</div><div class='ctx'> 	ld	r12,PACAKBASE(r13) ; 				\</div><div class='del'>-	LOAD_HANDLER(r12, system_call_entry_direct) ;		\</div><div class='add'>+	LOAD_HANDLER(r12, system_call_entry) ;			\</div><div class='ctx'> 	mtctr	r12 ;						\</div><div class='ctx'> 	mfspr	r12,SPRN_SRR1 ;					\</div><div class='ctx'> 	/* Re-use of r13... No spare regs to do this */	\</div><div class='hunk'>@@ -80,7 +79,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)				\</div><div class='ctx'> 	mfspr	r12,SPRN_SRR1 ;					\</div><div class='ctx'> 	li	r10,MSR_RI ;					\</div><div class='ctx'> 	mtmsrd 	r10,1 ;			/* Set RI (EE=0) */	\</div><div class='del'>-	b	system_call_entry_direct ;</div><div class='add'>+	b	system_call_common ;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -969,13 +968,6 @@ hv_facility_unavailable_relon_trampoline:</div><div class='ctx'> __end_interrupts:</div><div class='ctx'> </div><div class='ctx'> 	.align	7</div><div class='del'>-system_call_entry_direct:</div><div class='del'>-#if defined(CONFIG_RELOCATABLE)</div><div class='del'>-	/* The first level prologue may have used LR to get here, saving</div><div class='del'>-	 * orig in r10.  To save hacking/ifdeffing common code, restore here.</div><div class='del'>-	 */</div><div class='del'>-	mtlr	r10</div><div class='del'>-#endif</div><div class='ctx'> system_call_entry:</div><div class='ctx'> 	b	system_call_common</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S<br/>index 9b53fe139bf6..78c1eba4c04a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/head_8xx.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/head_8xx.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/head_8xx.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/head_8xx.S</a></div><div class='hunk'>@@ -48,6 +48,19 @@</div><div class='ctx'> 	mtspr	spr, reg</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* Macro to test if an address is a kernel address */</div><div class='add'>+#if CONFIG_TASK_SIZE &lt;= 0x80000000 &amp;&amp; CONFIG_PAGE_OFFSET &gt;= 0x80000000</div><div class='add'>+#define IS_KERNEL(tmp, addr)		\</div><div class='add'>+	andis.	tmp, addr, 0x8000	/* Address &gt;= 0x80000000 */</div><div class='add'>+#define BRANCH_UNLESS_KERNEL(label)	beq	label</div><div class='add'>+#else</div><div class='add'>+#define IS_KERNEL(tmp, addr)		\</div><div class='add'>+	rlwinm	tmp, addr, 16, 16, 31;	\</div><div class='add'>+	cmpli	cr0, tmp, PAGE_OFFSET &gt;&gt; 16</div><div class='add'>+#define BRANCH_UNLESS_KERNEL(label)	blt	label</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Value for the bits that have fixed value in RPN entries.</div><div class='ctx'>  * Also used for tagging DAR for DTLBerror.</div><div class='hunk'>@@ -116,13 +129,13 @@ turn_on_mmu:</div><div class='ctx'>  */</div><div class='ctx'> #define EXCEPTION_PROLOG	\</div><div class='ctx'> 	EXCEPTION_PROLOG_0;	\</div><div class='add'>+	mfcr	r10;		\</div><div class='ctx'> 	EXCEPTION_PROLOG_1;	\</div><div class='ctx'> 	EXCEPTION_PROLOG_2</div><div class='ctx'> </div><div class='ctx'> #define EXCEPTION_PROLOG_0	\</div><div class='ctx'> 	mtspr	SPRN_SPRG_SCRATCH0,r10;	\</div><div class='del'>-	mtspr	SPRN_SPRG_SCRATCH1,r11;	\</div><div class='del'>-	mfcr	r10</div><div class='add'>+	mtspr	SPRN_SPRG_SCRATCH1,r11</div><div class='ctx'> </div><div class='ctx'> #define EXCEPTION_PROLOG_1	\</div><div class='ctx'> 	mfspr	r11,SPRN_SRR1;		/* check whether user or kernel */ \</div><div class='hunk'>@@ -162,7 +175,6 @@ turn_on_mmu:</div><div class='ctx'>  * Exception exit code.</div><div class='ctx'>  */</div><div class='ctx'> #define EXCEPTION_EPILOG_0	\</div><div class='del'>-	mtcr	r10;		\</div><div class='ctx'> 	mfspr	r10,SPRN_SPRG_SCRATCH0;	\</div><div class='ctx'> 	mfspr	r11,SPRN_SPRG_SCRATCH1</div><div class='ctx'> </div><div class='hunk'>@@ -297,19 +309,22 @@ SystemCall:</div><div class='ctx'>  * We have to use the MD_xxx registers for the tablewalk because the</div><div class='ctx'>  * equivalent MI_xxx registers only perform the attribute functions.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_8xx_CPU15</div><div class='add'>+#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)	\</div><div class='add'>+	addi	tmp, addr, PAGE_SIZE;	\</div><div class='add'>+	tlbie	tmp;			\</div><div class='add'>+	addi	tmp, addr, -PAGE_SIZE;	\</div><div class='add'>+	tlbie	tmp</div><div class='add'>+#else</div><div class='add'>+#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> InstructionTLBMiss:</div><div class='ctx'> #ifdef CONFIG_8xx_CPU6</div><div class='del'>-	mtspr	SPRN_DAR, r3</div><div class='add'>+	mtspr	SPRN_SPRG_SCRATCH2, r3</div><div class='ctx'> #endif</div><div class='ctx'> 	EXCEPTION_PROLOG_0</div><div class='del'>-	mtspr	SPRN_SPRG_SCRATCH2, r10</div><div class='del'>-	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */</div><div class='del'>-#ifdef CONFIG_8xx_CPU15</div><div class='del'>-	addi	r11, r10, PAGE_SIZE</div><div class='del'>-	tlbie	r11</div><div class='del'>-	addi	r11, r10, -PAGE_SIZE</div><div class='del'>-	tlbie	r11</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* If we are faulting a kernel address, we have to use the</div><div class='ctx'> 	 * kernel page tables.</div><div class='hunk'>@@ -317,24 +332,34 @@ InstructionTLBMiss:</div><div class='ctx'> #ifdef CONFIG_MODULES</div><div class='ctx'> 	/* Only modules will cause ITLB Misses as we always</div><div class='ctx'> 	 * pin the first 8MB of kernel memory */</div><div class='del'>-	andis.	r11, r10, 0x8000	/* Address &gt;= 0x80000000 */</div><div class='del'>-#endif</div><div class='add'>+	mfspr	r11, SPRN_SRR0	/* Get effective address of fault */</div><div class='add'>+	INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)</div><div class='add'>+	mfcr	r10</div><div class='add'>+	IS_KERNEL(r11, r11)</div><div class='ctx'> 	mfspr	r11, SPRN_M_TW	/* Get level 1 table */</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='del'>-	beq	3f</div><div class='add'>+	BRANCH_UNLESS_KERNEL(3f)</div><div class='ctx'> 	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha</div><div class='ctx'> 3:</div><div class='add'>+	mtcr	r10</div><div class='add'>+	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */</div><div class='add'>+#else</div><div class='add'>+	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */</div><div class='add'>+	INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)</div><div class='add'>+	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Insert level 1 index */</div><div class='ctx'> 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) &lt;&lt; 1), (PAGE_SHIFT - 2) &lt;&lt; 1, 29</div><div class='ctx'> 	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */</div><div class='ctx'> </div><div class='del'>-	/* Load the MI_TWC with the attributes for this "segment." */</div><div class='del'>-	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */</div><div class='del'>-	rlwinm	r11, r11,0,0,19	/* Extract page descriptor page address */</div><div class='ctx'> 	/* Extract level 2 index */</div><div class='ctx'> 	rlwinm	r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29</div><div class='del'>-	lwzx	r10, r10, r11	/* Get the pte */</div><div class='add'>+	rlwimi	r10, r11, 0, 0, 32 - PAGE_SHIFT - 1	/* Add level 2 base */</div><div class='add'>+	lwz	r10, 0(r10)	/* Get the pte */</div><div class='add'>+</div><div class='add'>+	/* Insert the APG into the TWC from the Linux PTE. */</div><div class='add'>+	rlwimi	r11, r10, 0, 25, 26</div><div class='add'>+	/* Load the MI_TWC with the attributes for this "segment." */</div><div class='add'>+	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SWAP</div><div class='ctx'> 	rlwinm	r11, r10, 32-5, _PAGE_PRESENT</div><div class='hunk'>@@ -343,40 +368,41 @@ InstructionTLBMiss:</div><div class='ctx'> #endif</div><div class='ctx'> 	li	r11, RPN_PATTERN</div><div class='ctx'> 	/* The Linux PTE won't go exactly into the MMU TLB.</div><div class='del'>-	 * Software indicator bits 21 and 28 must be clear.</div><div class='add'>+	 * Software indicator bits 20-23 and 28 must be clear.</div><div class='ctx'> 	 * Software indicator bits 24, 25, 26, and 27 must be</div><div class='ctx'> 	 * set.  All other Linux PTE bits control the behavior</div><div class='ctx'> 	 * of the MMU.</div><div class='ctx'> 	 */</div><div class='del'>-	rlwimi	r10, r11, 0, 0x07f8	/* Set 24-27, clear 21-23,28 */</div><div class='add'>+	rlwimi	r10, r11, 0, 0x0ff8	/* Set 24-27, clear 20-23,28 */</div><div class='ctx'> 	MTSPR_CPU6(SPRN_MI_RPN, r10, r3)	/* Update TLB entry */</div><div class='ctx'> </div><div class='ctx'> 	/* Restore registers */</div><div class='ctx'> #ifdef CONFIG_8xx_CPU6</div><div class='del'>-	mfspr	r3, SPRN_DAR</div><div class='del'>-	mtspr	SPRN_DAR, r11	/* Tag DAR */</div><div class='add'>+	mfspr	r3, SPRN_SPRG_SCRATCH2</div><div class='ctx'> #endif</div><div class='del'>-	mfspr	r10, SPRN_SPRG_SCRATCH2</div><div class='ctx'> 	EXCEPTION_EPILOG_0</div><div class='ctx'> 	rfi</div><div class='ctx'> </div><div class='ctx'> 	. = 0x1200</div><div class='ctx'> DataStoreTLBMiss:</div><div class='ctx'> #ifdef CONFIG_8xx_CPU6</div><div class='del'>-	mtspr	SPRN_DAR, r3</div><div class='add'>+	mtspr	SPRN_SPRG_SCRATCH2, r3</div><div class='ctx'> #endif</div><div class='ctx'> 	EXCEPTION_PROLOG_0</div><div class='del'>-	mtspr	SPRN_SPRG_SCRATCH2, r10</div><div class='del'>-	mfspr	r10, SPRN_MD_EPN</div><div class='add'>+	mfcr	r10</div><div class='ctx'> </div><div class='ctx'> 	/* If we are faulting a kernel address, we have to use the</div><div class='ctx'> 	 * kernel page tables.</div><div class='ctx'> 	 */</div><div class='del'>-	andis.	r11, r10, 0x8000</div><div class='add'>+	mfspr	r11, SPRN_MD_EPN</div><div class='add'>+	IS_KERNEL(r11, r11)</div><div class='ctx'> 	mfspr	r11, SPRN_M_TW	/* Get level 1 table */</div><div class='del'>-	beq	3f</div><div class='add'>+	BRANCH_UNLESS_KERNEL(3f)</div><div class='ctx'> 	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha</div><div class='ctx'> 3:</div><div class='add'>+	mtcr	r10</div><div class='add'>+	mfspr	r10, SPRN_MD_EPN</div><div class='add'>+</div><div class='ctx'> 	/* Insert level 1 index */</div><div class='ctx'> 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) &lt;&lt; 1), (PAGE_SHIFT - 2) &lt;&lt; 1, 29</div><div class='ctx'> 	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */</div><div class='hunk'>@@ -388,13 +414,13 @@ DataStoreTLBMiss:</div><div class='ctx'> 	rlwimi	r10, r11, 0, 0, 32 - PAGE_SHIFT - 1	/* Add level 2 base */</div><div class='ctx'> 	lwz	r10, 0(r10)	/* Get the pte */</div><div class='ctx'> </div><div class='del'>-	/* Insert the Guarded flag into the TWC from the Linux PTE.</div><div class='del'>-	 * It is bit 27 of both the Linux PTE and the TWC (at least</div><div class='add'>+	/* Insert the Guarded flag and APG into the TWC from the Linux PTE.</div><div class='add'>+	 * It is bit 26-27 of both the Linux PTE and the TWC (at least</div><div class='ctx'> 	 * I got that right :-).  It will be better when we can put</div><div class='ctx'> 	 * this into the Linux pgd/pmd and load it in the operation</div><div class='ctx'> 	 * above.</div><div class='ctx'> 	 */</div><div class='del'>-	rlwimi	r11, r10, 0, 27, 27</div><div class='add'>+	rlwimi	r11, r10, 0, 26, 27</div><div class='ctx'> 	/* Insert the WriteThru flag into the TWC from the Linux PTE.</div><div class='ctx'> 	 * It is bit 25 in the Linux PTE and bit 30 in the TWC</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -423,14 +449,14 @@ DataStoreTLBMiss:</div><div class='ctx'> 	 */</div><div class='ctx'> 	li	r11, RPN_PATTERN</div><div class='ctx'> 	rlwimi	r10, r11, 0, 24, 28	/* Set 24-27, clear 28 */</div><div class='add'>+	rlwimi	r10, r11, 0, 20, 20	/* clear 20 */</div><div class='ctx'> 	MTSPR_CPU6(SPRN_MD_RPN, r10, r3)	/* Update TLB entry */</div><div class='ctx'> </div><div class='ctx'> 	/* Restore registers */</div><div class='ctx'> #ifdef CONFIG_8xx_CPU6</div><div class='del'>-	mfspr	r3, SPRN_DAR</div><div class='add'>+	mfspr	r3, SPRN_SPRG_SCRATCH2</div><div class='ctx'> #endif</div><div class='ctx'> 	mtspr	SPRN_DAR, r11	/* Tag DAR */</div><div class='del'>-	mfspr	r10, SPRN_SPRG_SCRATCH2</div><div class='ctx'> 	EXCEPTION_EPILOG_0</div><div class='ctx'> 	rfi</div><div class='ctx'> </div><div class='hunk'>@@ -456,6 +482,7 @@ InstructionTLBError:</div><div class='ctx'> 	. = 0x1400</div><div class='ctx'> DataTLBError:</div><div class='ctx'> 	EXCEPTION_PROLOG_0</div><div class='add'>+	mfcr	r10</div><div class='ctx'> </div><div class='ctx'> 	mfspr	r11, SPRN_DAR</div><div class='ctx'> 	cmpwi	cr0, r11, RPN_PATTERN</div><div class='hunk'>@@ -503,9 +530,9 @@ FixupDAR:/* Entry point for dcbx workaround. */</div><div class='ctx'> 	mtspr	SPRN_SPRG_SCRATCH2, r10</div><div class='ctx'> 	/* fetch instruction from memory. */</div><div class='ctx'> 	mfspr	r10, SPRN_SRR0</div><div class='del'>-	andis.	r11, r10, 0x8000	/* Address &gt;= 0x80000000 */</div><div class='add'>+	IS_KERNEL(r11, r10)</div><div class='ctx'> 	mfspr	r11, SPRN_M_TW	/* Get level 1 table */</div><div class='del'>-	beq	3f</div><div class='add'>+	BRANCH_UNLESS_KERNEL(3f)</div><div class='ctx'> 	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha</div><div class='ctx'> 	/* Insert level 1 index */</div><div class='ctx'> 3:	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) &lt;&lt; 1), (PAGE_SHIFT - 2) &lt;&lt; 1, 29</div><div class='hunk'>@@ -743,15 +770,20 @@ initial_mmu:</div><div class='ctx'> 	ori	r8, r8, MI_EVALID	/* Mark it valid */</div><div class='ctx'> 	mtspr	SPRN_MI_EPN, r8</div><div class='ctx'> 	mtspr	SPRN_MD_EPN, r8</div><div class='del'>-	li	r8, MI_PS8MEG		/* Set 8M byte page */</div><div class='add'>+	li	r8, MI_PS8MEG | (2 &lt;&lt; 5)	/* Set 8M byte page, APG 2 */</div><div class='ctx'> 	ori	r8, r8, MI_SVALID	/* Make it valid */</div><div class='ctx'> 	mtspr	SPRN_MI_TWC, r8</div><div class='add'>+	li	r8, MI_PS8MEG		/* Set 8M byte page, APG 0 */</div><div class='add'>+	ori	r8, r8, MI_SVALID	/* Make it valid */</div><div class='ctx'> 	mtspr	SPRN_MD_TWC, r8</div><div class='ctx'> 	li	r8, MI_BOOTINIT		/* Create RPN for address 0 */</div><div class='ctx'> 	mtspr	SPRN_MI_RPN, r8		/* Store TLB entry */</div><div class='ctx'> 	mtspr	SPRN_MD_RPN, r8</div><div class='del'>-	lis	r8, MI_Kp@h		/* Set the protection mode */</div><div class='add'>+	lis	r8, MI_APG_INIT@h	/* Set protection modes */</div><div class='add'>+	ori	r8, r8, MI_APG_INIT@l</div><div class='ctx'> 	mtspr	SPRN_MI_AP, r8</div><div class='add'>+	lis	r8, MD_APG_INIT@h</div><div class='add'>+	ori	r8, r8, MD_APG_INIT@l</div><div class='ctx'> 	mtspr	SPRN_MD_AP, r8</div><div class='ctx'> </div><div class='ctx'> 	/* Map another 8 MByte at the IMMR to get the processor</div><div class='head'>diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S<br/>index 15448668988d..b9b6ef510be1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_e500.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/idle_e500.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_e500.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/idle_e500.S</a></div><div class='hunk'>@@ -58,15 +58,6 @@ BEGIN_FTR_SECTION</div><div class='ctx'> 	mtlr	r0</div><div class='ctx'> 	lis	r3,HID0_NAP@h</div><div class='ctx'> END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)</div><div class='del'>-BEGIN_FTR_SECTION</div><div class='del'>-	msync</div><div class='del'>-	li	r7,L2CSR0_L2FL@l</div><div class='del'>-	mtspr	SPRN_L2CSR0,r7</div><div class='del'>-2:</div><div class='del'>-	mfspr	r7,SPRN_L2CSR0</div><div class='del'>-	andi.	r4,r7,L2CSR0_L2FL@l</div><div class='del'>-	bne	2b</div><div class='del'>-END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)</div><div class='ctx'> 1:</div><div class='ctx'> 	/* Go to NAP or DOZE now */</div><div class='ctx'> 	mfspr	r4,SPRN_HID0</div><div class='head'>diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S<br/>index ccde8f084ce4..112ccf497562 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_power7.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/idle_power7.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_power7.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/idle_power7.S</a></div><div class='hunk'>@@ -52,6 +52,22 @@</div><div class='ctx'> 	.text</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Used by threads when the lock bit of core_idle_state is set.</div><div class='add'>+ * Threads will spin in HMT_LOW until the lock bit is cleared.</div><div class='add'>+ * r14 - pointer to core_idle_state</div><div class='add'>+ * r15 - used to load contents of core_idle_state</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+core_idle_lock_held:</div><div class='add'>+	HMT_LOW</div><div class='add'>+3:	lwz	r15,0(r14)</div><div class='add'>+	andi.   r15,r15,PNV_CORE_IDLE_LOCK_BIT</div><div class='add'>+	bne	3b</div><div class='add'>+	HMT_MEDIUM</div><div class='add'>+	lwarx	r15,0,r14</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Pass requested state in r3:</div><div class='ctx'>  *	r3 - PNV_THREAD_NAP/SLEEP/WINKLE</div><div class='ctx'>  *</div><div class='hunk'>@@ -150,6 +166,10 @@ power7_enter_nap_mode:</div><div class='ctx'> 	ld	r14,PACA_CORE_IDLE_STATE_PTR(r13)</div><div class='ctx'> lwarx_loop1:</div><div class='ctx'> 	lwarx	r15,0,r14</div><div class='add'>+</div><div class='add'>+	andi.   r9,r15,PNV_CORE_IDLE_LOCK_BIT</div><div class='add'>+	bnel	core_idle_lock_held</div><div class='add'>+</div><div class='ctx'> 	andc	r15,r15,r7			/* Clear thread bit */</div><div class='ctx'> </div><div class='ctx'> 	andi.	r15,r15,PNV_CORE_IDLE_THREAD_BITS</div><div class='hunk'>@@ -294,7 +314,7 @@ lwarx_loop2:</div><div class='ctx'> 	 * workaround undo code or resyncing timebase or restoring context</div><div class='ctx'> 	 * In either case loop until the lock bit is cleared.</div><div class='ctx'> 	 */</div><div class='del'>-	bne	core_idle_lock_held</div><div class='add'>+	bnel	core_idle_lock_held</div><div class='ctx'> </div><div class='ctx'> 	cmpwi	cr2,r15,0</div><div class='ctx'> 	lbz	r4,PACA_SUBCORE_SIBLING_MASK(r13)</div><div class='hunk'>@@ -319,15 +339,6 @@ lwarx_loop2:</div><div class='ctx'> 	isync</div><div class='ctx'> 	b	common_exit</div><div class='ctx'> </div><div class='del'>-core_idle_lock_held:</div><div class='del'>-	HMT_LOW</div><div class='del'>-core_idle_lock_loop:</div><div class='del'>-	lwz	r15,0(14)</div><div class='del'>-	andi.   r9,r15,PNV_CORE_IDLE_LOCK_BIT</div><div class='del'>-	bne	core_idle_lock_loop</div><div class='del'>-	HMT_MEDIUM</div><div class='del'>-	b	lwarx_loop2</div><div class='del'>-</div><div class='ctx'> first_thread_in_subcore:</div><div class='ctx'> 	/* First thread in subcore to wakeup */</div><div class='ctx'> 	ori	r15,r15,PNV_CORE_IDLE_LOCK_BIT</div><div class='head'>diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c<br/>index b054f33ab1fb..a8e3490b54e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/iommu.c</a></div><div class='hunk'>@@ -322,11 +322,11 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,</div><div class='ctx'> 	ret = entry &lt;&lt; tbl-&gt;it_page_shift;	/* Set the return dma address */</div><div class='ctx'> </div><div class='ctx'> 	/* Put the TCEs in the HW table */</div><div class='del'>-	build_fail = ppc_md.tce_build(tbl, entry, npages,</div><div class='add'>+	build_fail = tbl-&gt;it_ops-&gt;set(tbl, entry, npages,</div><div class='ctx'> 				      (unsigned long)page &amp;</div><div class='ctx'> 				      IOMMU_PAGE_MASK(tbl), direction, attrs);</div><div class='ctx'> </div><div class='del'>-	/* ppc_md.tce_build() only returns non-zero for transient errors.</div><div class='add'>+	/* tbl-&gt;it_ops-&gt;set() only returns non-zero for transient errors.</div><div class='ctx'> 	 * Clean up the table bitmap in this case and return</div><div class='ctx'> 	 * DMA_ERROR_CODE. For all other errors the functionality is</div><div class='ctx'> 	 * not altered.</div><div class='hunk'>@@ -337,8 +337,8 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Flush/invalidate TLB caches if necessary */</div><div class='del'>-	if (ppc_md.tce_flush)</div><div class='del'>-		ppc_md.tce_flush(tbl);</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;flush)</div><div class='add'>+		tbl-&gt;it_ops-&gt;flush(tbl);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure updates are seen by hardware */</div><div class='ctx'> 	mb();</div><div class='hunk'>@@ -408,7 +408,7 @@ static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,</div><div class='ctx'> 	if (!iommu_free_check(tbl, dma_addr, npages))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ppc_md.tce_free(tbl, entry, npages);</div><div class='add'>+	tbl-&gt;it_ops-&gt;clear(tbl, entry, npages);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;(pool-&gt;lock), flags);</div><div class='ctx'> 	bitmap_clear(tbl-&gt;it_map, free_entry, npages);</div><div class='hunk'>@@ -424,8 +424,8 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,</div><div class='ctx'> 	 * not do an mb() here on purpose, it is not needed on any of</div><div class='ctx'> 	 * the current platforms.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ppc_md.tce_flush)</div><div class='del'>-		ppc_md.tce_flush(tbl);</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;flush)</div><div class='add'>+		tbl-&gt;it_ops-&gt;flush(tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,</div><div class='hunk'>@@ -495,7 +495,7 @@ int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,</div><div class='ctx'> 			    npages, entry, dma_addr);</div><div class='ctx'> </div><div class='ctx'> 		/* Insert into HW table */</div><div class='del'>-		build_fail = ppc_md.tce_build(tbl, entry, npages,</div><div class='add'>+		build_fail = tbl-&gt;it_ops-&gt;set(tbl, entry, npages,</div><div class='ctx'> 					      vaddr &amp; IOMMU_PAGE_MASK(tbl),</div><div class='ctx'> 					      direction, attrs);</div><div class='ctx'> 		if(unlikely(build_fail))</div><div class='hunk'>@@ -534,8 +534,8 @@ int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Flush/invalidate TLB caches if necessary */</div><div class='del'>-	if (ppc_md.tce_flush)</div><div class='del'>-		ppc_md.tce_flush(tbl);</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;flush)</div><div class='add'>+		tbl-&gt;it_ops-&gt;flush(tbl);</div><div class='ctx'> </div><div class='ctx'> 	DBG("mapped %d elements:\n", outcount);</div><div class='ctx'> </div><div class='hunk'>@@ -600,8 +600,8 @@ void ppc_iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,</div><div class='ctx'> 	 * do not do an mb() here, the affected platforms do not need it</div><div class='ctx'> 	 * when freeing.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ppc_md.tce_flush)</div><div class='del'>-		ppc_md.tce_flush(tbl);</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;flush)</div><div class='add'>+		tbl-&gt;it_ops-&gt;flush(tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iommu_table_clear(struct iommu_table *tbl)</div><div class='hunk'>@@ -613,17 +613,17 @@ static void iommu_table_clear(struct iommu_table *tbl)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!is_kdump_kernel() || is_fadump_active()) {</div><div class='ctx'> 		/* Clear the table in case firmware left allocations in it */</div><div class='del'>-		ppc_md.tce_free(tbl, tbl-&gt;it_offset, tbl-&gt;it_size);</div><div class='add'>+		tbl-&gt;it_ops-&gt;clear(tbl, tbl-&gt;it_offset, tbl-&gt;it_size);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='del'>-	if (ppc_md.tce_get) {</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;get) {</div><div class='ctx'> 		unsigned long index, tceval, tcecount = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* Reserve the existing mappings left by the first kernel. */</div><div class='ctx'> 		for (index = 0; index &lt; tbl-&gt;it_size; index++) {</div><div class='del'>-			tceval = ppc_md.tce_get(tbl, index + tbl-&gt;it_offset);</div><div class='add'>+			tceval = tbl-&gt;it_ops-&gt;get(tbl, index + tbl-&gt;it_offset);</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Freed TCE entry contains 0x7fffffffffffffff on JS20</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -657,6 +657,8 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct iommu_pool *p;</div><div class='ctx'> </div><div class='add'>+	BUG_ON(!tbl-&gt;it_ops);</div><div class='add'>+</div><div class='ctx'> 	/* number of bytes needed for the bitmap */</div><div class='ctx'> 	sz = BITS_TO_LONGS(tbl-&gt;it_size) * sizeof(unsigned long);</div><div class='ctx'> </div><div class='hunk'>@@ -713,9 +715,11 @@ void iommu_free_table(struct iommu_table *tbl, const char *node_name)</div><div class='ctx'> 	unsigned long bitmap_sz;</div><div class='ctx'> 	unsigned int order;</div><div class='ctx'> </div><div class='del'>-	if (!tbl || !tbl-&gt;it_map) {</div><div class='del'>-		printk(KERN_ERR "%s: expected TCE map for %s\n", __func__,</div><div class='del'>-				node_name);</div><div class='add'>+	if (!tbl)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!tbl-&gt;it_map) {</div><div class='add'>+		kfree(tbl);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -726,13 +730,6 @@ void iommu_free_table(struct iommu_table *tbl, const char *node_name)</div><div class='ctx'> 	if (tbl-&gt;it_offset == 0)</div><div class='ctx'> 		clear_bit(0, tbl-&gt;it_map);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IOMMU_API</div><div class='del'>-	if (tbl-&gt;it_group) {</div><div class='del'>-		iommu_group_put(tbl-&gt;it_group);</div><div class='del'>-		BUG_ON(tbl-&gt;it_group);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/* verify that table contains no entries */</div><div class='ctx'> 	if (!bitmap_empty(tbl-&gt;it_map, tbl-&gt;it_size))</div><div class='ctx'> 		pr_warn("%s: Unexpected TCEs for %s\n", __func__, node_name);</div><div class='hunk'>@@ -871,17 +868,33 @@ void iommu_free_coherent(struct iommu_table *tbl, size_t size,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	switch (dir) {</div><div class='add'>+	case DMA_BIDIRECTIONAL:</div><div class='add'>+		return TCE_PCI_READ | TCE_PCI_WRITE;</div><div class='add'>+	case DMA_FROM_DEVICE:</div><div class='add'>+		return TCE_PCI_WRITE;</div><div class='add'>+	case DMA_TO_DEVICE:</div><div class='add'>+		return TCE_PCI_READ;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(iommu_direction_to_tce_perm);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IOMMU_API</div><div class='ctx'> /*</div><div class='ctx'>  * SPAPR TCE API</div><div class='ctx'>  */</div><div class='ctx'> static void group_release(void *iommu_data)</div><div class='ctx'> {</div><div class='del'>-	struct iommu_table *tbl = iommu_data;</div><div class='del'>-	tbl-&gt;it_group = NULL;</div><div class='add'>+	struct iommu_table_group *table_group = iommu_data;</div><div class='add'>+</div><div class='add'>+	table_group-&gt;group = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void iommu_register_group(struct iommu_table *tbl,</div><div class='add'>+void iommu_register_group(struct iommu_table_group *table_group,</div><div class='ctx'> 		int pci_domain_number, unsigned long pe_num)</div><div class='ctx'> {</div><div class='ctx'> 	struct iommu_group *grp;</div><div class='hunk'>@@ -893,8 +906,8 @@ void iommu_register_group(struct iommu_table *tbl,</div><div class='ctx'> 				PTR_ERR(grp));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	tbl-&gt;it_group = grp;</div><div class='del'>-	iommu_group_set_iommudata(grp, tbl, group_release);</div><div class='add'>+	table_group-&gt;group = grp;</div><div class='add'>+	iommu_group_set_iommudata(grp, table_group, group_release);</div><div class='ctx'> 	name = kasprintf(GFP_KERNEL, "domain%d-pe%lx",</div><div class='ctx'> 			pci_domain_number, pe_num);</div><div class='ctx'> 	if (!name)</div><div class='hunk'>@@ -919,8 +932,8 @@ EXPORT_SYMBOL_GPL(iommu_tce_direction);</div><div class='ctx'> void iommu_flush_tce(struct iommu_table *tbl)</div><div class='ctx'> {</div><div class='ctx'> 	/* Flush/invalidate TLB caches if necessary */</div><div class='del'>-	if (ppc_md.tce_flush)</div><div class='del'>-		ppc_md.tce_flush(tbl);</div><div class='add'>+	if (tbl-&gt;it_ops-&gt;flush)</div><div class='add'>+		tbl-&gt;it_ops-&gt;flush(tbl);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure updates are seen by hardware */</div><div class='ctx'> 	mb();</div><div class='hunk'>@@ -931,7 +944,7 @@ int iommu_tce_clear_param_check(struct iommu_table *tbl,</div><div class='ctx'> 		unsigned long ioba, unsigned long tce_value,</div><div class='ctx'> 		unsigned long npages)</div><div class='ctx'> {</div><div class='del'>-	/* ppc_md.tce_free() does not support any value but 0 */</div><div class='add'>+	/* tbl-&gt;it_ops-&gt;clear() does not support any value but 0 */</div><div class='ctx'> 	if (tce_value)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -952,10 +965,7 @@ EXPORT_SYMBOL_GPL(iommu_tce_clear_param_check);</div><div class='ctx'> int iommu_tce_put_param_check(struct iommu_table *tbl,</div><div class='ctx'> 		unsigned long ioba, unsigned long tce)</div><div class='ctx'> {</div><div class='del'>-	if (!(tce &amp; (TCE_PCI_WRITE | TCE_PCI_READ)))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (tce &amp; ~(IOMMU_PAGE_MASK(tbl) | TCE_PCI_WRITE | TCE_PCI_READ))</div><div class='add'>+	if (tce &amp; ~IOMMU_PAGE_MASK(tbl))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (ioba &amp; ~IOMMU_PAGE_MASK(tbl))</div><div class='hunk'>@@ -972,68 +982,16 @@ int iommu_tce_put_param_check(struct iommu_table *tbl,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iommu_tce_put_param_check);</div><div class='ctx'> </div><div class='del'>-unsigned long iommu_clear_tce(struct iommu_table *tbl, unsigned long entry)</div><div class='del'>-{</div><div class='del'>-	unsigned long oldtce;</div><div class='del'>-	struct iommu_pool *pool = get_pool(tbl, entry);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;(pool-&gt;lock));</div><div class='del'>-</div><div class='del'>-	oldtce = ppc_md.tce_get(tbl, entry);</div><div class='del'>-	if (oldtce &amp; (TCE_PCI_WRITE | TCE_PCI_READ))</div><div class='del'>-		ppc_md.tce_free(tbl, entry, 1);</div><div class='del'>-	else</div><div class='del'>-		oldtce = 0;</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;(pool-&gt;lock));</div><div class='del'>-</div><div class='del'>-	return oldtce;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(iommu_clear_tce);</div><div class='del'>-</div><div class='del'>-int iommu_clear_tces_and_put_pages(struct iommu_table *tbl,</div><div class='del'>-		unsigned long entry, unsigned long pages)</div><div class='del'>-{</div><div class='del'>-	unsigned long oldtce;</div><div class='del'>-	struct page *page;</div><div class='del'>-</div><div class='del'>-	for ( ; pages; --pages, ++entry) {</div><div class='del'>-		oldtce = iommu_clear_tce(tbl, entry);</div><div class='del'>-		if (!oldtce)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		page = pfn_to_page(oldtce &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		WARN_ON(!page);</div><div class='del'>-		if (page) {</div><div class='del'>-			if (oldtce &amp; TCE_PCI_WRITE)</div><div class='del'>-				SetPageDirty(page);</div><div class='del'>-			put_page(page);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(iommu_clear_tces_and_put_pages);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * hwaddr is a kernel virtual address here (0xc... bazillion),</div><div class='del'>- * tce_build converts it to a physical address.</div><div class='del'>- */</div><div class='del'>-int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,</div><div class='del'>-		unsigned long hwaddr, enum dma_data_direction direction)</div><div class='add'>+long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction)</div><div class='ctx'> {</div><div class='del'>-	int ret = -EBUSY;</div><div class='del'>-	unsigned long oldtce;</div><div class='del'>-	struct iommu_pool *pool = get_pool(tbl, entry);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;(pool-&gt;lock));</div><div class='add'>+	long ret;</div><div class='ctx'> </div><div class='del'>-	oldtce = ppc_md.tce_get(tbl, entry);</div><div class='del'>-	/* Add new entry if it is not busy */</div><div class='del'>-	if (!(oldtce &amp; (TCE_PCI_WRITE | TCE_PCI_READ)))</div><div class='del'>-		ret = ppc_md.tce_build(tbl, entry, 1, hwaddr, direction, NULL);</div><div class='add'>+	ret = tbl-&gt;it_ops-&gt;exchange(tbl, entry, hpa, direction);</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;(pool-&gt;lock));</div><div class='add'>+	if (!ret &amp;&amp; ((*direction == DMA_FROM_DEVICE) ||</div><div class='add'>+			(*direction == DMA_BIDIRECTIONAL)))</div><div class='add'>+		SetPageDirty(pfn_to_page(*hpa &gt;&gt; PAGE_SHIFT));</div><div class='ctx'> </div><div class='ctx'> 	/* if (unlikely(ret))</div><div class='ctx'> 		pr_err("iommu_tce: %s failed on hwaddr=%lx ioba=%lx kva=%lx ret=%d\n",</div><div class='hunk'>@@ -1042,84 +1000,72 @@ int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(iommu_tce_build);</div><div class='add'>+EXPORT_SYMBOL_GPL(iommu_tce_xchg);</div><div class='ctx'> </div><div class='del'>-int iommu_put_tce_user_mode(struct iommu_table *tbl, unsigned long entry,</div><div class='del'>-		unsigned long tce)</div><div class='add'>+int iommu_take_ownership(struct iommu_table *tbl)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct page *page = NULL;</div><div class='del'>-	unsigned long hwaddr, offset = tce &amp; IOMMU_PAGE_MASK(tbl) &amp; ~PAGE_MASK;</div><div class='del'>-	enum dma_data_direction direction = iommu_tce_direction(tce);</div><div class='del'>-</div><div class='del'>-	ret = get_user_pages_fast(tce &amp; PAGE_MASK, 1,</div><div class='del'>-			direction != DMA_TO_DEVICE, &amp;page);</div><div class='del'>-	if (unlikely(ret != 1)) {</div><div class='del'>-		/* pr_err("iommu_tce: get_user_pages_fast failed tce=%lx ioba=%lx ret=%d\n",</div><div class='del'>-				tce, entry &lt;&lt; tbl-&gt;it_page_shift, ret); */</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-	hwaddr = (unsigned long) page_address(page) + offset;</div><div class='del'>-</div><div class='del'>-	ret = iommu_tce_build(tbl, entry, hwaddr, direction);</div><div class='del'>-	if (ret)</div><div class='del'>-		put_page(page);</div><div class='del'>-</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		pr_err("iommu_tce: %s failed ioba=%lx, tce=%lx, ret=%d\n",</div><div class='del'>-			__func__, entry &lt;&lt; tbl-&gt;it_page_shift, tce, ret);</div><div class='add'>+	unsigned long flags, i, sz = (tbl-&gt;it_size + 7) &gt;&gt; 3;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(iommu_put_tce_user_mode);</div><div class='add'>+	/*</div><div class='add'>+	 * VFIO does not control TCE entries allocation and the guest</div><div class='add'>+	 * can write new TCEs on top of existing ones so iommu_tce_build()</div><div class='add'>+	 * must be able to release old pages. This functionality</div><div class='add'>+	 * requires exchange() callback defined so if it is not</div><div class='add'>+	 * implemented, we disallow taking ownership over the table.</div><div class='add'>+	 */</div><div class='add'>+	if (!tbl-&gt;it_ops-&gt;exchange)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-int iommu_take_ownership(struct iommu_table *tbl)</div><div class='del'>-{</div><div class='del'>-	unsigned long sz = (tbl-&gt;it_size + 7) &gt;&gt; 3;</div><div class='add'>+	spin_lock_irqsave(&amp;tbl-&gt;large_pool.lock, flags);</div><div class='add'>+	for (i = 0; i &lt; tbl-&gt;nr_pools; i++)</div><div class='add'>+		spin_lock(&amp;tbl-&gt;pools[i].lock);</div><div class='ctx'> </div><div class='ctx'> 	if (tbl-&gt;it_offset == 0)</div><div class='ctx'> 		clear_bit(0, tbl-&gt;it_map);</div><div class='ctx'> </div><div class='ctx'> 	if (!bitmap_empty(tbl-&gt;it_map, tbl-&gt;it_size)) {</div><div class='ctx'> 		pr_err("iommu_tce: it_map is not empty");</div><div class='del'>-		return -EBUSY;</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		/* Restore bit#0 set by iommu_init_table() */</div><div class='add'>+		if (tbl-&gt;it_offset == 0)</div><div class='add'>+			set_bit(0, tbl-&gt;it_map);</div><div class='add'>+	} else {</div><div class='add'>+		memset(tbl-&gt;it_map, 0xff, sz);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(tbl-&gt;it_map, 0xff, sz);</div><div class='del'>-	iommu_clear_tces_and_put_pages(tbl, tbl-&gt;it_offset, tbl-&gt;it_size);</div><div class='add'>+	for (i = 0; i &lt; tbl-&gt;nr_pools; i++)</div><div class='add'>+		spin_unlock(&amp;tbl-&gt;pools[i].lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tbl-&gt;large_pool.lock, flags);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Disable iommu bypass, otherwise the user can DMA to all of</div><div class='del'>-	 * our physical memory via the bypass window instead of just</div><div class='del'>-	 * the pages that has been explicitly mapped into the iommu</div><div class='del'>-	 */</div><div class='del'>-	if (tbl-&gt;set_bypass)</div><div class='del'>-		tbl-&gt;set_bypass(tbl, false);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iommu_take_ownership);</div><div class='ctx'> </div><div class='ctx'> void iommu_release_ownership(struct iommu_table *tbl)</div><div class='ctx'> {</div><div class='del'>-	unsigned long sz = (tbl-&gt;it_size + 7) &gt;&gt; 3;</div><div class='add'>+	unsigned long flags, i, sz = (tbl-&gt;it_size + 7) &gt;&gt; 3;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;tbl-&gt;large_pool.lock, flags);</div><div class='add'>+	for (i = 0; i &lt; tbl-&gt;nr_pools; i++)</div><div class='add'>+		spin_lock(&amp;tbl-&gt;pools[i].lock);</div><div class='ctx'> </div><div class='del'>-	iommu_clear_tces_and_put_pages(tbl, tbl-&gt;it_offset, tbl-&gt;it_size);</div><div class='ctx'> 	memset(tbl-&gt;it_map, 0, sz);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore bit#0 set by iommu_init_table() */</div><div class='ctx'> 	if (tbl-&gt;it_offset == 0)</div><div class='ctx'> 		set_bit(0, tbl-&gt;it_map);</div><div class='ctx'> </div><div class='del'>-	/* The kernel owns the device now, we can restore the iommu bypass */</div><div class='del'>-	if (tbl-&gt;set_bypass)</div><div class='del'>-		tbl-&gt;set_bypass(tbl, true);</div><div class='add'>+	for (i = 0; i &lt; tbl-&gt;nr_pools; i++)</div><div class='add'>+		spin_unlock(&amp;tbl-&gt;pools[i].lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tbl-&gt;large_pool.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iommu_release_ownership);</div><div class='ctx'> </div><div class='ctx'> int iommu_add_device(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct iommu_table *tbl;</div><div class='add'>+	struct iommu_table_group_link *tgl;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The sysfs entries should be populated before</div><div class='hunk'>@@ -1137,15 +1083,22 @@ int iommu_add_device(struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tbl = get_iommu_table_base(dev);</div><div class='del'>-	if (!tbl || !tbl-&gt;it_group) {</div><div class='add'>+	if (!tbl) {</div><div class='ctx'> 		pr_debug("%s: Skipping device %s with no tbl\n",</div><div class='ctx'> 			 __func__, dev_name(dev));</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tgl = list_first_entry_or_null(&amp;tbl-&gt;it_group_list,</div><div class='add'>+			struct iommu_table_group_link, next);</div><div class='add'>+	if (!tgl) {</div><div class='add'>+		pr_debug("%s: Skipping device %s with no group\n",</div><div class='add'>+			 __func__, dev_name(dev));</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	pr_debug("%s: Adding %s to iommu group %d\n",</div><div class='ctx'> 		 __func__, dev_name(dev),</div><div class='del'>-		 iommu_group_id(tbl-&gt;it_group));</div><div class='add'>+		 iommu_group_id(tgl-&gt;table_group-&gt;group));</div><div class='ctx'> </div><div class='ctx'> 	if (PAGE_SIZE &lt; IOMMU_PAGE_SIZE(tbl)) {</div><div class='ctx'> 		pr_err("%s: Invalid IOMMU page size %lx (%lx) on %s\n",</div><div class='hunk'>@@ -1154,7 +1107,7 @@ int iommu_add_device(struct device *dev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return iommu_group_add_device(tbl-&gt;it_group, dev);</div><div class='add'>+	return iommu_group_add_device(tgl-&gt;table_group-&gt;group, dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iommu_add_device);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c<br/>index 71bd161640cf..dab616a33b8d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/msi.c</a></div><div class='hunk'>@@ -15,7 +15,10 @@</div><div class='ctx'> </div><div class='ctx'> int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> {</div><div class='del'>-	if (!ppc_md.setup_msi_irqs || !ppc_md.teardown_msi_irqs) {</div><div class='add'>+	struct pci_controller *phb = pci_bus_to_host(dev-&gt;bus);</div><div class='add'>+</div><div class='add'>+	if (!phb-&gt;controller_ops.setup_msi_irqs ||</div><div class='add'>+	    !phb-&gt;controller_ops.teardown_msi_irqs) {</div><div class='ctx'> 		pr_debug("msi: Platform doesn't provide MSI callbacks.\n");</div><div class='ctx'> 		return -ENOSYS;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -24,10 +27,12 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 	if (type == PCI_CAP_ID_MSI &amp;&amp; nvec &gt; 1)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='del'>-	return ppc_md.setup_msi_irqs(dev, nvec, type);</div><div class='add'>+	return phb-&gt;controller_ops.setup_msi_irqs(dev, nvec, type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_teardown_msi_irqs(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	ppc_md.teardown_msi_irqs(dev);</div><div class='add'>+	struct pci_controller *phb = pci_bus_to_host(dev-&gt;bus);</div><div class='add'>+</div><div class='add'>+	phb-&gt;controller_ops.teardown_msi_irqs(dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c<br/>index 0d054068a21d..b9de34d44fcb 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/pci-common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/pci-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/pci-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/pci-common.c</a></div><div class='hunk'>@@ -89,6 +89,7 @@ struct pci_controller *pcibios_alloc_controller(struct device_node *dev)</div><div class='ctx'> #endif</div><div class='ctx'> 	return phb;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(pcibios_alloc_controller);</div><div class='ctx'> </div><div class='ctx'> void pcibios_free_controller(struct pci_controller *phb)</div><div class='ctx'> {</div><div class='hunk'>@@ -1447,6 +1448,7 @@ void pcibios_claim_one_bus(struct pci_bus *bus)</div><div class='ctx'> 	list_for_each_entry(child_bus, &amp;bus-&gt;children, node)</div><div class='ctx'> 		pcibios_claim_one_bus(child_bus);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* pcibios_finish_adding_to_bus</div><div class='hunk'>@@ -1488,6 +1490,14 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)</div><div class='ctx'> 	return pci_enable_resources(dev, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void pcibios_disable_device(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_controller *phb = pci_bus_to_host(dev-&gt;bus);</div><div class='add'>+</div><div class='add'>+	if (phb-&gt;controller_ops.disable_device)</div><div class='add'>+		phb-&gt;controller_ops.disable_device(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> resource_size_t pcibios_io_space_offset(struct pci_controller *hose)</div><div class='ctx'> {</div><div class='ctx'> 	return (unsigned long) hose-&gt;io_base_virt - _IO_BASE;</div><div class='hunk'>@@ -1680,6 +1690,7 @@ void pcibios_scan_phb(struct pci_controller *hose)</div><div class='ctx'> 			pcie_bus_configure_settings(child);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(pcibios_scan_phb);</div><div class='ctx'> </div><div class='ctx'> static void fixup_hide_host_resource_fsl(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c<br/>index 7ed85a69a9c2..7f9ed0c1f6b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/pci-hotplug.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/pci-hotplug.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/pci-hotplug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/pci-hotplug.c</a></div><div class='hunk'>@@ -29,7 +29,12 @@</div><div class='ctx'>  */</div><div class='ctx'> void pcibios_release_device(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='add'>+	struct pci_controller *phb = pci_bus_to_host(dev-&gt;bus);</div><div class='add'>+</div><div class='ctx'> 	eeh_remove_device(dev);</div><div class='add'>+</div><div class='add'>+	if (phb-&gt;controller_ops.release_device)</div><div class='add'>+		phb-&gt;controller_ops.release_device(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c<br/>index febb50dd5328..8005e18d1b40 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/process.c</a></div><div class='hunk'>@@ -1112,7 +1112,6 @@ static void setup_ksp_vsid(struct task_struct *p, unsigned long sp)</div><div class='ctx'> /*</div><div class='ctx'>  * Copy a thread..</div><div class='ctx'>  */</div><div class='del'>-extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Copy architecture-specific thread state</div><div class='head'>diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c<br/>index 308c5e15676b..8b888b12a475 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/prom.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/prom.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/prom.c</a></div><div class='hunk'>@@ -46,7 +46,6 @@</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/paca.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='ctx'> #include &lt;asm/btext.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -573,6 +572,7 @@ static void __init early_reserve_mem_dt(void)</div><div class='ctx'> 	int len;</div><div class='ctx'> 	const __be32 *prop;</div><div class='ctx'> </div><div class='add'>+	early_init_fdt_reserve_self();</div><div class='ctx'> 	early_init_fdt_scan_reserved_mem();</div><div class='ctx'> </div><div class='ctx'> 	dt_root = of_get_flat_dt_root();</div><div class='hunk'>@@ -800,6 +800,7 @@ int of_get_ibm_chip_id(struct device_node *np)</div><div class='ctx'> 	}</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(of_get_ibm_chip_id);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * cpu_to_chip_id - Return the cpus chip-id</div><div class='head'>diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c<br/>index fd1fe4c37599..fcca8077e6a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/prom_init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/prom_init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/prom_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/prom_init.c</a></div><div class='hunk'>@@ -37,7 +37,6 @@</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='ctx'> #include &lt;asm/btext.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c<br/>index c69671c03c3b..bdcbb716f4d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/setup_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/setup_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/setup_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/setup_64.c</a></div><div class='hunk'>@@ -523,7 +523,8 @@ void __init setup_system(void)</div><div class='ctx'> 	smp_release_cpus();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	pr_info("Starting Linux PPC64 %s\n", init_utsname()-&gt;version);</div><div class='add'>+	pr_info("Starting Linux %s %s\n", init_utsname()-&gt;machine,</div><div class='add'>+		 init_utsname()-&gt;version);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("-----------------------------------------------------\n");</div><div class='ctx'> 	pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);</div><div class='hunk'>@@ -686,6 +687,9 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> #ifdef CONFIG_PPC_64K_PAGES</div><div class='ctx'> 	init_mm.context.pte_frag = NULL;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_SPAPR_TCE_IOMMU</div><div class='add'>+	mm_iommu_init(&amp;init_mm.context);</div><div class='add'>+#endif</div><div class='ctx'> 	irqstack_early_init();</div><div class='ctx'> 	exc_lvl_early_init();</div><div class='ctx'> 	emergency_stack_init();</div><div class='head'>diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c<br/>index fa1fd8a0c867..692873bff334 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/sysfs.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/sysfs.c</a></div><div class='hunk'>@@ -496,13 +496,34 @@ static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);</div><div class='ctx'> static DEVICE_ATTR(purr, 0400, show_purr, store_purr);</div><div class='ctx'> static DEVICE_ATTR(pir, 0400, show_pir, NULL);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This is the system wide DSCR register default value. Any</div><div class='add'>+ * change to this default value through the sysfs interface</div><div class='add'>+ * will update all per cpu DSCR default values across the</div><div class='add'>+ * system stored in their respective PACA structures.</div><div class='add'>+ */</div><div class='ctx'> static unsigned long dscr_default;</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * read_dscr() - Fetch the cpu specific DSCR default</div><div class='add'>+ * @val:	Returned cpu specific DSCR default value</div><div class='add'>+ *</div><div class='add'>+ * This function returns the per cpu DSCR default value</div><div class='add'>+ * for any cpu which is contained in it's PACA structure.</div><div class='add'>+ */</div><div class='ctx'> static void read_dscr(void *val)</div><div class='ctx'> {</div><div class='ctx'> 	*(unsigned long *)val = get_paca()-&gt;dscr_default;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * write_dscr() - Update the cpu specific DSCR default</div><div class='add'>+ * @val:	New cpu specific DSCR default value to update</div><div class='add'>+ *</div><div class='add'>+ * This function updates the per cpu DSCR default value</div><div class='add'>+ * for any cpu which is contained in it's PACA structure.</div><div class='add'>+ */</div><div class='ctx'> static void write_dscr(void *val)</div><div class='ctx'> {</div><div class='ctx'> 	get_paca()-&gt;dscr_default = *(unsigned long *)val;</div><div class='hunk'>@@ -520,12 +541,29 @@ static void add_write_permission_dev_attr(struct device_attribute *attr)</div><div class='ctx'> 	attr-&gt;attr.mode |= 0200;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * show_dscr_default() - Fetch the system wide DSCR default</div><div class='add'>+ * @dev:	Device structure</div><div class='add'>+ * @attr:	Device attribute structure</div><div class='add'>+ * @buf:	Interface buffer</div><div class='add'>+ *</div><div class='add'>+ * This function returns the system wide DSCR default value.</div><div class='add'>+ */</div><div class='ctx'> static ssize_t show_dscr_default(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	return sprintf(buf, "%lx\n", dscr_default);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * store_dscr_default() - Update the system wide DSCR default</div><div class='add'>+ * @dev:	Device structure</div><div class='add'>+ * @attr:	Device attribute structure</div><div class='add'>+ * @buf:	Interface buffer</div><div class='add'>+ * @count:	Size of the update</div><div class='add'>+ *</div><div class='add'>+ * This function updates the system wide DSCR default value.</div><div class='add'>+ */</div><div class='ctx'> static ssize_t __used store_dscr_default(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, const char *buf,</div><div class='ctx'> 		size_t count)</div><div class='head'>diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c<br/>index 56f44848b044..43922509a483 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/time.c</a></div><div class='hunk'>@@ -1124,4 +1124,4 @@ static int __init rtc_init(void)</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-module_init(rtc_init);</div><div class='add'>+device_initcall(rtc_init);</div><div class='head'>diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S<br/>index 5754b226da7e..bf8f34a58670 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/tm.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/tm.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/tm.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/tm.S</a></div><div class='hunk'>@@ -293,7 +293,7 @@ dont_backup_fp:</div><div class='ctx'> 	ld	r2, STK_GOT(r1)</div><div class='ctx'> </div><div class='ctx'> 	/* Load CPU's default DSCR */</div><div class='del'>-	ld	r0, PACA_DSCR(r13)</div><div class='add'>+	ld	r0, PACA_DSCR_DEFAULT(r13)</div><div class='ctx'> 	mtspr	SPRN_DSCR, r0</div><div class='ctx'> </div><div class='ctx'> 	blr</div><div class='hunk'>@@ -473,7 +473,7 @@ restore_gprs:</div><div class='ctx'> 	ld	r2, STK_GOT(r1)</div><div class='ctx'> </div><div class='ctx'> 	/* Load CPU's default DSCR */</div><div class='del'>-	ld	r0, PACA_DSCR(r13)</div><div class='add'>+	ld	r0, PACA_DSCR_DEFAULT(r13)</div><div class='ctx'> 	mtspr	SPRN_DSCR, r0</div><div class='ctx'> </div><div class='ctx'> 	blr</div><div class='head'>diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c<br/>index 19e4744b6eba..37de90f8a845 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/traps.c</a></div><div class='hunk'>@@ -297,6 +297,8 @@ long machine_check_early(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	__this_cpu_inc(irq_stat.mce_exceptions);</div><div class='ctx'> </div><div class='add'>+	add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);</div><div class='add'>+</div><div class='ctx'> 	if (cur_cpu_spec &amp;&amp; cur_cpu_spec-&gt;machine_check_early)</div><div class='ctx'> 		handled = cur_cpu_spec-&gt;machine_check_early(regs);</div><div class='ctx'> 	return handled;</div><div class='hunk'>@@ -1377,6 +1379,7 @@ void facility_unavailable_exception(struct pt_regs *regs)</div><div class='ctx'> 	};</div><div class='ctx'> 	char *facility = "unknown";</div><div class='ctx'> 	u64 value;</div><div class='add'>+	u32 instword, rd;</div><div class='ctx'> 	u8 status;</div><div class='ctx'> 	bool hv;</div><div class='ctx'> </div><div class='hunk'>@@ -1388,12 +1391,46 @@ void facility_unavailable_exception(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	status = value &gt;&gt; 56;</div><div class='ctx'> 	if (status == FSCR_DSCR_LG) {</div><div class='del'>-		/* User is acessing the DSCR.  Set the inherit bit and allow</div><div class='del'>-		 * the user to set it directly in future by setting via the</div><div class='del'>-		 * FSCR DSCR bit.  We always leave HFSCR DSCR set.</div><div class='add'>+		/*</div><div class='add'>+		 * User is accessing the DSCR register using the problem</div><div class='add'>+		 * state only SPR number (0x03) either through a mfspr or</div><div class='add'>+		 * a mtspr instruction. If it is a write attempt through</div><div class='add'>+		 * a mtspr, then we set the inherit bit. This also allows</div><div class='add'>+		 * the user to write or read the register directly in the</div><div class='add'>+		 * future by setting via the FSCR DSCR bit. But in case it</div><div class='add'>+		 * is a read DSCR attempt through a mfspr instruction, we</div><div class='add'>+		 * just emulate the instruction instead. This code path will</div><div class='add'>+		 * always emulate all the mfspr instructions till the user</div><div class='add'>+		 * has attempted atleast one mtspr instruction. This way it</div><div class='add'>+		 * preserves the same behaviour when the user is accessing</div><div class='add'>+		 * the DSCR through privilege level only SPR number (0x11)</div><div class='add'>+		 * which is emulated through illegal instruction exception.</div><div class='add'>+		 * We always leave HFSCR DSCR set.</div><div class='ctx'> 		 */</div><div class='del'>-		current-&gt;thread.dscr_inherit = 1;</div><div class='del'>-		mtspr(SPRN_FSCR, value | FSCR_DSCR);</div><div class='add'>+		if (get_user(instword, (u32 __user *)(regs-&gt;nip))) {</div><div class='add'>+			pr_err("Failed to fetch the user instruction\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Write into DSCR (mtspr 0x03, RS) */</div><div class='add'>+		if ((instword &amp; PPC_INST_MTSPR_DSCR_USER_MASK)</div><div class='add'>+				== PPC_INST_MTSPR_DSCR_USER) {</div><div class='add'>+			rd = (instword &gt;&gt; 21) &amp; 0x1f;</div><div class='add'>+			current-&gt;thread.dscr = regs-&gt;gpr[rd];</div><div class='add'>+			current-&gt;thread.dscr_inherit = 1;</div><div class='add'>+			mtspr(SPRN_FSCR, value | FSCR_DSCR);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Read from DSCR (mfspr RT, 0x03) */</div><div class='add'>+		if ((instword &amp; PPC_INST_MFSPR_DSCR_USER_MASK)</div><div class='add'>+				== PPC_INST_MFSPR_DSCR_USER) {</div><div class='add'>+			if (emulate_instruction(regs)) {</div><div class='add'>+				pr_err("DSCR based mfspr emulation failed\n");</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+			regs-&gt;nip += 4;</div><div class='add'>+			emulate_single_step(regs);</div><div class='add'>+		}</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c<br/>index 305eb0d9b768..b457bfa28436 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/vdso.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/vdso.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/vdso.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/vdso.c</a></div><div class='hunk'>@@ -49,13 +49,16 @@</div><div class='ctx'> /* The alignment of the vDSO */</div><div class='ctx'> #define VDSO_ALIGNMENT	(1 &lt;&lt; 16)</div><div class='ctx'> </div><div class='del'>-extern char vdso32_start, vdso32_end;</div><div class='del'>-static void *vdso32_kbase = &amp;vdso32_start;</div><div class='ctx'> static unsigned int vdso32_pages;</div><div class='add'>+static void *vdso32_kbase;</div><div class='ctx'> static struct page **vdso32_pagelist;</div><div class='ctx'> unsigned long vdso32_sigtramp;</div><div class='ctx'> unsigned long vdso32_rt_sigtramp;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='add'>+extern char vdso32_start, vdso32_end;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> extern char vdso64_start, vdso64_end;</div><div class='ctx'> static void *vdso64_kbase = &amp;vdso64_start;</div><div class='hunk'>@@ -140,50 +143,6 @@ struct lib64_elfinfo</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef __DEBUG</div><div class='del'>-static void dump_one_vdso_page(struct page *pg, struct page *upg)</div><div class='del'>-{</div><div class='del'>-	printk("kpg: %p (c:%d,f:%08lx)", __va(page_to_pfn(pg) &lt;&lt; PAGE_SHIFT),</div><div class='del'>-	       page_count(pg),</div><div class='del'>-	       pg-&gt;flags);</div><div class='del'>-	if (upg &amp;&amp; !IS_ERR(upg) /* &amp;&amp; pg != upg*/) {</div><div class='del'>-		printk(" upg: %p (c:%d,f:%08lx)", __va(page_to_pfn(upg)</div><div class='del'>-						       &lt;&lt; PAGE_SHIFT),</div><div class='del'>-		       page_count(upg),</div><div class='del'>-		       upg-&gt;flags);</div><div class='del'>-	}</div><div class='del'>-	printk("\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dump_vdso_pages(struct vm_area_struct * vma)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!vma || is_32bit_task()) {</div><div class='del'>-		printk("vDSO32 @ %016lx:\n", (unsigned long)vdso32_kbase);</div><div class='del'>-		for (i=0; i&lt;vdso32_pages; i++) {</div><div class='del'>-			struct page *pg = virt_to_page(vdso32_kbase +</div><div class='del'>-						       i*PAGE_SIZE);</div><div class='del'>-			struct page *upg = (vma &amp;&amp; vma-&gt;vm_mm) ?</div><div class='del'>-				follow_page(vma, vma-&gt;vm_start + i*PAGE_SIZE, 0)</div><div class='del'>-				: NULL;</div><div class='del'>-			dump_one_vdso_page(pg, upg);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (!vma || !is_32bit_task()) {</div><div class='del'>-		printk("vDSO64 @ %016lx:\n", (unsigned long)vdso64_kbase);</div><div class='del'>-		for (i=0; i&lt;vdso64_pages; i++) {</div><div class='del'>-			struct page *pg = virt_to_page(vdso64_kbase +</div><div class='del'>-						       i*PAGE_SIZE);</div><div class='del'>-			struct page *upg = (vma &amp;&amp; vma-&gt;vm_mm) ?</div><div class='del'>-				follow_page(vma, vma-&gt;vm_start + i*PAGE_SIZE, 0)</div><div class='del'>-				: NULL;</div><div class='del'>-			dump_one_vdso_page(pg, upg);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif /* DEBUG */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This is called from binfmt_elf, we create the special vma for the</div><div class='ctx'>  * vDSO and insert it into the mm struct tree</div><div class='hunk'>@@ -292,6 +251,7 @@ const char *arch_vma_name(struct vm_area_struct *vma)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='ctx'> static void * __init find_section32(Elf32_Ehdr *ehdr, const char *secname,</div><div class='ctx'> 				  unsigned long *size)</div><div class='ctx'> {</div><div class='hunk'>@@ -379,6 +339,20 @@ static int __init vdso_do_func_patch32(struct lib32_elfinfo *v32,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#else /* !CONFIG_VDSO32 */</div><div class='add'>+static unsigned long __init find_function32(struct lib32_elfinfo *lib,</div><div class='add'>+					    const char *symname)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init vdso_do_func_patch32(struct lib32_elfinfo *v32,</div><div class='add'>+				       struct lib64_elfinfo *v64,</div><div class='add'>+				       const char *orig, const char *fix)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_VDSO32 */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='hunk'>@@ -489,6 +463,7 @@ static __init int vdso_do_find_sections(struct lib32_elfinfo *v32,</div><div class='ctx'> 	 * Locate symbol tables &amp; text section</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='ctx'> 	v32-&gt;dynsym = find_section32(v32-&gt;hdr, ".dynsym", &amp;v32-&gt;dynsymsize);</div><div class='ctx'> 	v32-&gt;dynstr = find_section32(v32-&gt;hdr, ".dynstr", NULL);</div><div class='ctx'> 	if (v32-&gt;dynsym == NULL || v32-&gt;dynstr == NULL) {</div><div class='hunk'>@@ -501,6 +476,7 @@ static __init int vdso_do_find_sections(struct lib32_elfinfo *v32,</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> 	v32-&gt;text = sect - vdso32_kbase;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	v64-&gt;dynsym = find_section64(v64-&gt;hdr, ".dynsym", &amp;v64-&gt;dynsymsize);</div><div class='hunk'>@@ -537,7 +513,9 @@ static __init void vdso_setup_trampolines(struct lib32_elfinfo *v32,</div><div class='ctx'> static __init int vdso_fixup_datapage(struct lib32_elfinfo *v32,</div><div class='ctx'> 				       struct lib64_elfinfo *v64)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='ctx'> 	Elf32_Sym *sym32;</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	Elf64_Sym *sym64;</div><div class='ctx'> </div><div class='hunk'>@@ -552,6 +530,7 @@ static __init int vdso_fixup_datapage(struct lib32_elfinfo *v32,</div><div class='ctx'> 		(sym64-&gt;st_value - VDSO64_LBASE);</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='ctx'> 	sym32 = find_symbol32(v32, "__kernel_datapage_offset");</div><div class='ctx'> 	if (sym32 == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "vDSO32: Can't find symbol "</div><div class='hunk'>@@ -561,6 +540,7 @@ static __init int vdso_fixup_datapage(struct lib32_elfinfo *v32,</div><div class='ctx'> 	*((int *)(vdso32_kbase + (sym32-&gt;st_value - VDSO32_LBASE))) =</div><div class='ctx'> 		(vdso32_pages &lt;&lt; PAGE_SHIFT) -</div><div class='ctx'> 		(sym32-&gt;st_value - VDSO32_LBASE);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -569,55 +549,54 @@ static __init int vdso_fixup_datapage(struct lib32_elfinfo *v32,</div><div class='ctx'> static __init int vdso_fixup_features(struct lib32_elfinfo *v32,</div><div class='ctx'> 				      struct lib64_elfinfo *v64)</div><div class='ctx'> {</div><div class='del'>-	void *start32;</div><div class='del'>-	unsigned long size32;</div><div class='add'>+	unsigned long size;</div><div class='add'>+	void *start;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	void *start64;</div><div class='del'>-	unsigned long size64;</div><div class='del'>-</div><div class='del'>-	start64 = find_section64(v64-&gt;hdr, "__ftr_fixup", &amp;size64);</div><div class='del'>-	if (start64)</div><div class='add'>+	start = find_section64(v64-&gt;hdr, "__ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(cur_cpu_spec-&gt;cpu_features,</div><div class='del'>-				  start64, start64 + size64);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> </div><div class='del'>-	start64 = find_section64(v64-&gt;hdr, "__mmu_ftr_fixup", &amp;size64);</div><div class='del'>-	if (start64)</div><div class='add'>+	start = find_section64(v64-&gt;hdr, "__mmu_ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(cur_cpu_spec-&gt;mmu_features,</div><div class='del'>-				  start64, start64 + size64);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> </div><div class='del'>-	start64 = find_section64(v64-&gt;hdr, "__fw_ftr_fixup", &amp;size64);</div><div class='del'>-	if (start64)</div><div class='add'>+	start = find_section64(v64-&gt;hdr, "__fw_ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(powerpc_firmware_features,</div><div class='del'>-				  start64, start64 + size64);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> </div><div class='del'>-	start64 = find_section64(v64-&gt;hdr, "__lwsync_fixup", &amp;size64);</div><div class='del'>-	if (start64)</div><div class='add'>+	start = find_section64(v64-&gt;hdr, "__lwsync_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_lwsync_fixups(cur_cpu_spec-&gt;cpu_features,</div><div class='del'>-				 start64, start64 + size64);</div><div class='add'>+				 start, start + size);</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='del'>-	start32 = find_section32(v32-&gt;hdr, "__ftr_fixup", &amp;size32);</div><div class='del'>-	if (start32)</div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='add'>+	start = find_section32(v32-&gt;hdr, "__ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(cur_cpu_spec-&gt;cpu_features,</div><div class='del'>-				  start32, start32 + size32);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> </div><div class='del'>-	start32 = find_section32(v32-&gt;hdr, "__mmu_ftr_fixup", &amp;size32);</div><div class='del'>-	if (start32)</div><div class='add'>+	start = find_section32(v32-&gt;hdr, "__mmu_ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(cur_cpu_spec-&gt;mmu_features,</div><div class='del'>-				  start32, start32 + size32);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	start32 = find_section32(v32-&gt;hdr, "__fw_ftr_fixup", &amp;size32);</div><div class='del'>-	if (start32)</div><div class='add'>+	start = find_section32(v32-&gt;hdr, "__fw_ftr_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_feature_fixups(powerpc_firmware_features,</div><div class='del'>-				  start32, start32 + size32);</div><div class='add'>+				  start, start + size);</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='del'>-	start32 = find_section32(v32-&gt;hdr, "__lwsync_fixup", &amp;size32);</div><div class='del'>-	if (start32)</div><div class='add'>+	start = find_section32(v32-&gt;hdr, "__lwsync_fixup", &amp;size);</div><div class='add'>+	if (start)</div><div class='ctx'> 		do_lwsync_fixups(cur_cpu_spec-&gt;cpu_features,</div><div class='del'>-				 start32, start32 + size32);</div><div class='add'>+				 start, start + size);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -779,11 +758,15 @@ static int __init vdso_init(void)</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='add'>+	vdso32_kbase = &amp;vdso32_start;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Calculate the size of the 32 bits vDSO</div><div class='ctx'> 	 */</div><div class='ctx'> 	vdso32_pages = (&amp;vdso32_end - &amp;vdso32_start) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	DBG("vdso32_kbase: %p, 0x%x pages\n", vdso32_kbase, vdso32_pages);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -804,6 +787,7 @@ static int __init vdso_init(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_VDSO32</div><div class='ctx'> 	/* Make sure pages are in the correct state */</div><div class='ctx'> 	vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 2),</div><div class='ctx'> 				  GFP_KERNEL);</div><div class='hunk'>@@ -816,6 +800,7 @@ static int __init vdso_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	vdso32_pagelist[i++] = virt_to_page(vdso_data);</div><div class='ctx'> 	vdso32_pagelist[i] = NULL;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 2),</div><div class='head'>diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c<br/>index 5bfdab9047be..5f8dcdaa2820 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/vio.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kernel/vio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/vio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kernel/vio.c</a></div><div class='hunk'>@@ -557,11 +557,11 @@ static int vio_dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,</div><div class='ctx'> 	struct vio_dev *viodev = to_vio_dev(dev);</div><div class='ctx'> 	struct iommu_table *tbl;</div><div class='ctx'> 	struct scatterlist *sgl;</div><div class='del'>-	int ret, count = 0;</div><div class='add'>+	int ret, count;</div><div class='ctx'> 	size_t alloc_size = 0;</div><div class='ctx'> </div><div class='ctx'> 	tbl = get_iommu_table_base(dev);</div><div class='del'>-	for (sgl = sglist; count &lt; nelems; count++, sgl++)</div><div class='add'>+	for_each_sg(sglist, sgl, nelems, count)</div><div class='ctx'> 		alloc_size += roundup(sgl-&gt;length, IOMMU_PAGE_SIZE(tbl));</div><div class='ctx'> </div><div class='ctx'> 	if (vio_cmo_alloc(viodev, alloc_size)) {</div><div class='hunk'>@@ -577,7 +577,7 @@ static int vio_dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (sgl = sglist, count = 0; count &lt; ret; count++, sgl++)</div><div class='add'>+	for_each_sg(sglist, sgl, ret, count)</div><div class='ctx'> 		alloc_size -= roundup(sgl-&gt;dma_length, IOMMU_PAGE_SIZE(tbl));</div><div class='ctx'> 	if (alloc_size)</div><div class='ctx'> 		vio_cmo_dealloc(viodev, alloc_size);</div><div class='hunk'>@@ -594,10 +594,10 @@ static void vio_dma_iommu_unmap_sg(struct device *dev,</div><div class='ctx'> 	struct iommu_table *tbl;</div><div class='ctx'> 	struct scatterlist *sgl;</div><div class='ctx'> 	size_t alloc_size = 0;</div><div class='del'>-	int count = 0;</div><div class='add'>+	int count;</div><div class='ctx'> </div><div class='ctx'> 	tbl = get_iommu_table_base(dev);</div><div class='del'>-	for (sgl = sglist; count &lt; nelems; count++, sgl++)</div><div class='add'>+	for_each_sg(sglist, sgl, nelems, count)</div><div class='ctx'> 		alloc_size += roundup(sgl-&gt;dma_length, IOMMU_PAGE_SIZE(tbl));</div><div class='ctx'> </div><div class='ctx'> 	dma_iommu_ops.unmap_sg(dev, sglist, nelems, direction, attrs);</div><div class='hunk'>@@ -1196,6 +1196,11 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)</div><div class='ctx'> 	tbl-&gt;it_type = TCE_VB;</div><div class='ctx'> 	tbl-&gt;it_blocksize = 16;</div><div class='ctx'> </div><div class='add'>+	if (firmware_has_feature(FW_FEATURE_LPAR))</div><div class='add'>+		tbl-&gt;it_ops = &amp;iommu_table_lpar_multi_ops;</div><div class='add'>+	else</div><div class='add'>+		tbl-&gt;it_ops = &amp;iommu_table_pseries_ops;</div><div class='add'>+</div><div class='ctx'> 	return iommu_init_table(tbl, -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c<br/>index 453a8a47a467..05ea8fc7f829 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/book3s.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s.c</a></div><div class='hunk'>@@ -757,16 +757,17 @@ void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_memory_slot *memslot,</div><div class='del'>-				struct kvm_userspace_memory_region *mem)</div><div class='add'>+				const struct kvm_userspace_memory_region *mem)</div><div class='ctx'> {</div><div class='ctx'> 	return kvm-&gt;arch.kvm_ops-&gt;prepare_memory_region(kvm, memslot, mem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='del'>-				const struct kvm_memory_slot *old)</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new)</div><div class='ctx'> {</div><div class='del'>-	kvm-&gt;arch.kvm_ops-&gt;commit_memory_region(kvm, mem, old);</div><div class='add'>+	kvm-&gt;arch.kvm_ops-&gt;commit_memory_region(kvm, mem, old, new);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c<br/>index 1a4acf8bf4f4..dab68b7af3f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></div><div class='hunk'>@@ -650,7 +650,7 @@ static void kvmppc_rmap_reset(struct kvm *kvm)</div><div class='ctx'> 	int srcu_idx;</div><div class='ctx'> </div><div class='ctx'> 	srcu_idx = srcu_read_lock(&amp;kvm-&gt;srcu);</div><div class='del'>-	slots = kvm-&gt;memslots;</div><div class='add'>+	slots = kvm_memslots(kvm);</div><div class='ctx'> 	kvm_for_each_memslot(memslot, slots) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This assumes it is acceptable to lose reference and</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c<br/>index df81caab7383..68d067ad4222 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/book3s_hv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_hv.c</a></div><div class='hunk'>@@ -2321,6 +2321,7 @@ static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,</div><div class='ctx'> static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,</div><div class='ctx'> 					 struct kvm_dirty_log *log)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	int r;</div><div class='ctx'> 	unsigned long n;</div><div class='hunk'>@@ -2331,7 +2332,8 @@ static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,</div><div class='ctx'> 	if (log-&gt;slot &gt;= KVM_USER_MEM_SLOTS)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	memslot = id_to_memslot(kvm-&gt;memslots, log-&gt;slot);</div><div class='add'>+	slots = kvm_memslots(kvm);</div><div class='add'>+	memslot = id_to_memslot(slots, log-&gt;slot);</div><div class='ctx'> 	r = -ENOENT;</div><div class='ctx'> 	if (!memslot-&gt;dirty_bitmap)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -2374,16 +2376,18 @@ static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,</div><div class='ctx'> </div><div class='ctx'> static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,</div><div class='ctx'> 					struct kvm_memory_slot *memslot,</div><div class='del'>-					struct kvm_userspace_memory_region *mem)</div><div class='add'>+					const struct kvm_userspace_memory_region *mem)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='del'>-				const struct kvm_memory_slot *old)</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long npages = mem-&gt;memory_size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> </div><div class='ctx'> 	if (npages &amp;&amp; old-&gt;npages) {</div><div class='hunk'>@@ -2393,7 +2397,8 @@ static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,</div><div class='ctx'> 		 * since the rmap array starts out as all zeroes,</div><div class='ctx'> 		 * i.e. no pages are dirty.</div><div class='ctx'> 		 */</div><div class='del'>-		memslot = id_to_memslot(kvm-&gt;memslots, mem-&gt;slot);</div><div class='add'>+		slots = kvm_memslots(kvm);</div><div class='add'>+		memslot = id_to_memslot(slots, mem-&gt;slot);</div><div class='ctx'> 		kvmppc_hv_get_dirty_log(kvm, memslot, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S<br/>index 4d70df26c402..faa86e9c0551 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></div><div class='hunk'>@@ -324,7 +324,7 @@ kvm_start_guest:</div><div class='ctx'> kvm_secondary_got_guest:</div><div class='ctx'> </div><div class='ctx'> 	/* Set HSTATE_DSCR(r13) to something sensible */</div><div class='del'>-	ld	r6, PACA_DSCR(r13)</div><div class='add'>+	ld	r6, PACA_DSCR_DEFAULT(r13)</div><div class='ctx'> 	std	r6, HSTATE_DSCR(r13)</div><div class='ctx'> </div><div class='ctx'> 	/* Order load of vcore, ptid etc. after load of vcpu */</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c<br/>index f57383941d03..64891b081ad5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/book3s_pr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/book3s_pr.c</a></div><div class='hunk'>@@ -1530,6 +1530,7 @@ out:</div><div class='ctx'> static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,</div><div class='ctx'> 					 struct kvm_dirty_log *log)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='ctx'> 	ulong ga, ga_end;</div><div class='hunk'>@@ -1545,7 +1546,8 @@ static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> 	/* If nothing is dirty, don't bother messing with page tables. */</div><div class='ctx'> 	if (is_dirty) {</div><div class='del'>-		memslot = id_to_memslot(kvm-&gt;memslots, log-&gt;slot);</div><div class='add'>+		slots = kvm_memslots(kvm);</div><div class='add'>+		memslot = id_to_memslot(slots, log-&gt;slot);</div><div class='ctx'> </div><div class='ctx'> 		ga = memslot-&gt;base_gfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 		ga_end = ga + (memslot-&gt;npages &lt;&lt; PAGE_SHIFT);</div><div class='hunk'>@@ -1571,14 +1573,15 @@ static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,</div><div class='ctx'> 					struct kvm_memory_slot *memslot,</div><div class='del'>-					struct kvm_userspace_memory_region *mem)</div><div class='add'>+					const struct kvm_userspace_memory_region *mem)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='del'>-				const struct kvm_memory_slot *old)</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new)</div><div class='ctx'> {</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c<br/>index 6c1316a15a27..cc5842657161 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/booke.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/booke.c</a></div><div class='hunk'>@@ -1004,10 +1004,10 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_irq_enable();</div><div class='del'>-</div><div class='ctx'> 	trace_kvm_exit(exit_nr, vcpu);</div><div class='del'>-	kvm_guest_exit();</div><div class='add'>+	__kvm_guest_exit();</div><div class='add'>+</div><div class='add'>+	local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	run-&gt;exit_reason = KVM_EXIT_UNKNOWN;</div><div class='ctx'> 	run-&gt;ready_for_interrupt_injection = 1;</div><div class='hunk'>@@ -1784,14 +1784,15 @@ int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				      struct kvm_memory_slot *memslot,</div><div class='del'>-				      struct kvm_userspace_memory_region *mem)</div><div class='add'>+				      const struct kvm_userspace_memory_region *mem)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='del'>-				const struct kvm_memory_slot *old)</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c<br/>index ac3ddf115f3d..e5dde32fe71f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/powerpc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/kvm/powerpc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/powerpc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/kvm/powerpc.c</a></div><div class='hunk'>@@ -115,7 +115,7 @@ int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		kvm_guest_enter();</div><div class='add'>+		__kvm_guest_enter();</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -595,18 +595,19 @@ int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	return kvmppc_core_prepare_memory_region(kvm, memslot, mem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   const struct kvm_memory_slot *old,</div><div class='add'>+				   const struct kvm_memory_slot *new,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='del'>-	kvmppc_core_commit_memory_region(kvm, mem, old);</div><div class='add'>+	kvmppc_core_commit_memory_region(kvm, mem, old, new);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_flush_shadow_memslot(struct kvm *kvm,</div><div class='head'>diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile<br/>index 7902802a19a5..a47e14277fd8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/lib/Makefile</a></div><div class='hunk'>@@ -33,6 +33,6 @@ obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o</div><div class='ctx'> obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ALTIVEC)	+= xor_vmx.o</div><div class='del'>-CFLAGS_xor_vmx.o += -maltivec -mabi=altivec</div><div class='add'>+CFLAGS_xor_vmx.o += -maltivec $(call cc-option,-mabi=altivec)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC64) += $(obj64-y)</div><div class='head'>diff --git a/arch/powerpc/lib/vmx-helper.c b/arch/powerpc/lib/vmx-helper.c<br/>index 3cf529ceec5b..ac93a3bd2730 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/vmx-helper.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/lib/vmx-helper.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/vmx-helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/lib/vmx-helper.c</a></div><div class='hunk'>@@ -27,11 +27,11 @@ int enter_vmx_usercopy(void)</div><div class='ctx'> 	if (in_interrupt())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* This acts as preempt_disable() as well and will make</div><div class='del'>-	 * enable_kernel_altivec(). We need to disable page faults</div><div class='del'>-	 * as they can call schedule and thus make us lose the VMX</div><div class='del'>-	 * context. So on page faults, we just fail which will cause</div><div class='del'>-	 * a fallback to the normal non-vmx copy.</div><div class='add'>+	preempt_disable();</div><div class='add'>+	/*</div><div class='add'>+	 * We need to disable page faults as they can call schedule and</div><div class='add'>+	 * thus make us lose the VMX context. So on page faults, we just</div><div class='add'>+	 * fail which will cause a fallback to the normal non-vmx copy.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='hunk'>@@ -47,6 +47,7 @@ int enter_vmx_usercopy(void)</div><div class='ctx'> int exit_vmx_usercopy(void)</div><div class='ctx'> {</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile<br/>index 9c8770b5f96f..3eb73a38220d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/Makefile</a></div><div class='hunk'>@@ -36,3 +36,4 @@ obj-$(CONFIG_PPC_SUBPAGE_PROT)	+= subpage-prot.o</div><div class='ctx'> obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-noncoherent.o</div><div class='ctx'> obj-$(CONFIG_HIGHMEM)		+= highmem.o</div><div class='ctx'> obj-$(CONFIG_PPC_COPRO_BASE)	+= copro_fault.o</div><div class='add'>+obj-$(CONFIG_SPAPR_TCE_IOMMU)	+= mmu_context_iommu.o</div><div class='head'>diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c<br/>index f031a47d7701..6527882ce05e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/copro_fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/copro_fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/copro_fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/copro_fault.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/copro.h&gt;</div><div class='ctx'> #include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;misc/cxl.h&gt;</div><div class='add'>+#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This ought to be kept in sync with the powerpc specific do_page_fault</div><div class='hunk'>@@ -100,7 +100,7 @@ EXPORT_SYMBOL_GPL(copro_handle_mm_fault);</div><div class='ctx'> </div><div class='ctx'> int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)</div><div class='ctx'> {</div><div class='del'>-	u64 vsid;</div><div class='add'>+	u64 vsid, vsidkey;</div><div class='ctx'> 	int psize, ssize;</div><div class='ctx'> </div><div class='ctx'> 	switch (REGION_ID(ea)) {</div><div class='hunk'>@@ -109,6 +109,7 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)</div><div class='ctx'> 		psize = get_slice_psize(mm, ea);</div><div class='ctx'> 		ssize = user_segment_size(ea);</div><div class='ctx'> 		vsid = get_vsid(mm-&gt;context.id, ea, ssize);</div><div class='add'>+		vsidkey = SLB_VSID_USER;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VMALLOC_REGION_ID:</div><div class='ctx'> 		pr_devel("%s: 0x%llx -- VMALLOC_REGION_ID\n", __func__, ea);</div><div class='hunk'>@@ -118,19 +119,21 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)</div><div class='ctx'> 			psize = mmu_io_psize;</div><div class='ctx'> 		ssize = mmu_kernel_ssize;</div><div class='ctx'> 		vsid = get_kernel_vsid(ea, mmu_kernel_ssize);</div><div class='add'>+		vsidkey = SLB_VSID_KERNEL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KERNEL_REGION_ID:</div><div class='ctx'> 		pr_devel("%s: 0x%llx -- KERNEL_REGION_ID\n", __func__, ea);</div><div class='ctx'> 		psize = mmu_linear_psize;</div><div class='ctx'> 		ssize = mmu_kernel_ssize;</div><div class='ctx'> 		vsid = get_kernel_vsid(ea, mmu_kernel_ssize);</div><div class='add'>+		vsidkey = SLB_VSID_KERNEL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_debug("%s: invalid region access at %016llx\n", __func__, ea);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vsid = (vsid &lt;&lt; slb_vsid_shift(ssize)) | SLB_VSID_USER;</div><div class='add'>+	vsid = (vsid &lt;&lt; slb_vsid_shift(ssize)) | vsidkey;</div><div class='ctx'> </div><div class='ctx'> 	vsid |= mmu_psize_defs[psize].sllp |</div><div class='ctx'> 		((ssize == MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0);</div><div class='head'>diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c<br/>index b396868d2aa7..a67c6d781c52 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/fault.c</a></div><div class='hunk'>@@ -33,13 +33,13 @@</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/siginfo.h&gt;</div><div class='ctx'> #include &lt;asm/debug.h&gt;</div><div class='hunk'>@@ -272,15 +272,16 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	if (!arch_irq_disabled_regs(regs))</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='del'>-	if (in_atomic() || mm == NULL) {</div><div class='add'>+	if (faulthandler_disabled() || mm == NULL) {</div><div class='ctx'> 		if (!user_mode(regs)) {</div><div class='ctx'> 			rc = SIGSEGV;</div><div class='ctx'> 			goto bail;</div><div class='ctx'> 		}</div><div class='del'>-		/* in_atomic() in user mode is really bad,</div><div class='add'>+		/* faulthandler_disabled() in user mode is really bad,</div><div class='ctx'> 		   as is current-&gt;mm == NULL. */</div><div class='ctx'> 		printk(KERN_EMERG "Page fault in user mode with "</div><div class='del'>-		       "in_atomic() = %d mm = %p\n", in_atomic(), mm);</div><div class='add'>+		       "faulthandler_disabled() = %d mm = %p\n",</div><div class='add'>+		       faulthandler_disabled(), mm);</div><div class='ctx'> 		printk(KERN_EMERG "NIP = %lx  MSR = %lx\n",</div><div class='ctx'> 		       regs-&gt;nip, regs-&gt;msr);</div><div class='ctx'> 		die("Weird page fault", regs, SIGSEGV);</div><div class='hunk'>@@ -528,6 +529,10 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)</div><div class='ctx'> 		printk(KERN_ALERT "Unable to handle kernel paging request for "</div><div class='ctx'> 			"instruction fetch\n");</div><div class='ctx'> 		break;</div><div class='add'>+	case 0x600:</div><div class='add'>+		printk(KERN_ALERT "Unable to handle kernel paging request for "</div><div class='add'>+			"unaligned access at address 0x%08lx\n", regs-&gt;dar);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_ALERT "Unable to handle kernel paging request for "</div><div class='ctx'> 			"unknown fault\n");</div><div class='head'>diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c<br/>index 9c4880ddecd6..13befa35d8a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/hash_native_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/hash_native_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/hash_native_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hash_native_64.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;misc/cxl.h&gt;</div><div class='add'>+#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_LOW</div><div class='ctx'> #define DBG_LOW(fmt...) udbg_printf(fmt)</div><div class='head'>diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c<br/>index fda236f908eb..5ec987f65b2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/hash_utils_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/hash_utils_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/hash_utils_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hash_utils_64.c</a></div><div class='hunk'>@@ -57,6 +57,7 @@</div><div class='ctx'> #include &lt;asm/fadump.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/tm.h&gt;</div><div class='add'>+#include &lt;asm/trace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> #define DBG(fmt...) udbg_printf(fmt)</div><div class='hunk'>@@ -1004,6 +1005,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,</div><div class='ctx'> </div><div class='ctx'> 	DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n",</div><div class='ctx'> 		ea, access, trap);</div><div class='add'>+	trace_hash_fault(ea, access, trap);</div><div class='ctx'> </div><div class='ctx'> 	/* Get region &amp; vsid */</div><div class='ctx'>  	switch (REGION_ID(ea)) {</div><div class='hunk'>@@ -1475,7 +1477,7 @@ static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)</div><div class='ctx'> 	unsigned long hash;</div><div class='ctx'> 	unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);</div><div class='ctx'> 	unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);</div><div class='del'>-	unsigned long mode = htab_convert_pte_flags(PAGE_KERNEL);</div><div class='add'>+	unsigned long mode = htab_convert_pte_flags(pgprot_val(PAGE_KERNEL));</div><div class='ctx'> 	long ret;</div><div class='ctx'> </div><div class='ctx'> 	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);</div><div class='head'>diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c<br/>index e7450bdbe83a..e292c8a60952 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/highmem.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -59,6 +59,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	if (vaddr &lt; __fix_to_virt(FIX_KMAP_END)) {</div><div class='ctx'> 		pagefault_enable();</div><div class='add'>+		preempt_enable();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -82,5 +83,6 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='head'>diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c<br/>index 3385e3d0506e..bb0bd7025cb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -336,7 +336,7 @@ int alloc_bootmem_huge_page(struct hstate *hstate)</div><div class='ctx'> unsigned long gpage_npages[MMU_PAGE_COUNT];</div><div class='ctx'> </div><div class='ctx'> static int __init do_gpage_early_setup(char *param, char *val,</div><div class='del'>-				       const char *unused)</div><div class='add'>+				       const char *unused, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	static phys_addr_t size;</div><div class='ctx'> 	unsigned long npages;</div><div class='hunk'>@@ -385,7 +385,7 @@ void __init reserve_hugetlb_gpages(void)</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(cmdline, boot_command_line, COMMAND_LINE_SIZE);</div><div class='ctx'> 	parse_args("hugetlb gpages", cmdline, NULL, 0, 0, 0,</div><div class='del'>-			&amp;do_gpage_early_setup);</div><div class='add'>+			NULL, &amp;do_gpage_early_setup);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Walk gpage list in reverse, allocating larger page sizes first.</div><div class='hunk'>@@ -439,11 +439,6 @@ int alloc_bootmem_huge_page(struct hstate *hstate)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PPC_FSL_BOOK3E</div><div class='ctx'> #define HUGEPD_FREELIST_SIZE \</div><div class='ctx'> 	((PAGE_SIZE - sizeof(struct hugepd_freelist)) / sizeof(pte_t))</div><div class='hunk'>@@ -933,7 +928,7 @@ static int __init hugetlbpage_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='del'>-module_init(hugetlbpage_init);</div><div class='add'>+arch_initcall(hugetlbpage_init);</div><div class='ctx'> </div><div class='ctx'> void flush_dcache_icache_hugepage(struct page *page)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c<br/>index 45fda71feb27..0f11819d8f1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/mem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mem.c</a></div><div class='hunk'>@@ -560,7 +560,7 @@ subsys_initcall(add_system_ram_resources);</div><div class='ctx'>  */</div><div class='ctx'> int devmem_is_allowed(unsigned long pfn)</div><div class='ctx'> {</div><div class='del'>-	if (iomem_is_exclusive(pfn &lt;&lt; PAGE_SHIFT))</div><div class='add'>+	if (iomem_is_exclusive(PFN_PHYS(pfn)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (!page_is_ram(pfn))</div><div class='ctx'> 		return 1;</div><div class='head'>diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c<br/>index 178876aef40f..4e4efbc2658e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/mmu_context_hash64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/mmu_context_hash64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/mmu_context_hash64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mmu_context_hash64.c</a></div><div class='hunk'>@@ -89,6 +89,9 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)</div><div class='ctx'> #ifdef CONFIG_PPC_64K_PAGES</div><div class='ctx'> 	mm-&gt;context.pte_frag = NULL;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_SPAPR_TCE_IOMMU</div><div class='add'>+	mm_iommu_init(&amp;mm-&gt;context);</div><div class='add'>+#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -132,6 +135,9 @@ static inline void destroy_pagetable_page(struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> void destroy_context(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_SPAPR_TCE_IOMMU</div><div class='add'>+	mm_iommu_cleanup(&amp;mm-&gt;context);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_ICSWX</div><div class='ctx'> 	drop_cop(mm-&gt;context.acop, mm);</div><div class='head'>diff --git a/arch/powerpc/mm/mmu_context_iommu.c b/arch/powerpc/mm/mmu_context_iommu.c<br/>new file mode 100644<br/>index 000000000000..da6a2168ae9e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/mmu_context_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/mmu_context_iommu.c</a></div><div class='hunk'>@@ -0,0 +1,316 @@</div><div class='add'>+/*</div><div class='add'>+ *  IOMMU helpers in MMU context.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2015 IBM Corp. &lt;aik@ozlabs.ru&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or</div><div class='add'>+ *  modify it under the terms of the GNU General Public License</div><div class='add'>+ *  as published by the Free Software Foundation; either version</div><div class='add'>+ *  2 of the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/rculist.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(mem_list_mutex);</div><div class='add'>+</div><div class='add'>+struct mm_iommu_table_group_mem_t {</div><div class='add'>+	struct list_head next;</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+	unsigned long used;</div><div class='add'>+	atomic64_t mapped;</div><div class='add'>+	u64 ua;			/* userspace address */</div><div class='add'>+	u64 entries;		/* number of entries in hpas[] */</div><div class='add'>+	u64 *hpas;		/* vmalloc'ed */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static long mm_iommu_adjust_locked_vm(struct mm_struct *mm,</div><div class='add'>+		unsigned long npages, bool incr)</div><div class='add'>+{</div><div class='add'>+	long ret = 0, locked, lock_limit;</div><div class='add'>+</div><div class='add'>+	if (!npages)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	down_write(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	if (incr) {</div><div class='add'>+		locked = mm-&gt;locked_vm + npages;</div><div class='add'>+		lock_limit = rlimit(RLIMIT_MEMLOCK) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		if (locked &gt; lock_limit &amp;&amp; !capable(CAP_IPC_LOCK))</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+		else</div><div class='add'>+			mm-&gt;locked_vm += npages;</div><div class='add'>+	} else {</div><div class='add'>+		if (WARN_ON_ONCE(npages &gt; mm-&gt;locked_vm))</div><div class='add'>+			npages = mm-&gt;locked_vm;</div><div class='add'>+		mm-&gt;locked_vm -= npages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("[%d] RLIMIT_MEMLOCK HASH64 %c%ld %ld/%ld\n",</div><div class='add'>+			current-&gt;pid,</div><div class='add'>+			incr ? '+' : '-',</div><div class='add'>+			npages &lt;&lt; PAGE_SHIFT,</div><div class='add'>+			mm-&gt;locked_vm &lt;&lt; PAGE_SHIFT,</div><div class='add'>+			rlimit(RLIMIT_MEMLOCK));</div><div class='add'>+	up_write(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mm_iommu_preregistered(void)</div><div class='add'>+{</div><div class='add'>+	if (!current || !current-&gt;mm)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !list_empty(&amp;current-&gt;mm-&gt;context.iommu_group_mem_list);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_preregistered);</div><div class='add'>+</div><div class='add'>+long mm_iommu_get(unsigned long ua, unsigned long entries,</div><div class='add'>+		struct mm_iommu_table_group_mem_t **pmem)</div><div class='add'>+{</div><div class='add'>+	struct mm_iommu_table_group_mem_t *mem;</div><div class='add'>+	long i, j, ret = 0, locked_entries = 0;</div><div class='add'>+	struct page *page = NULL;</div><div class='add'>+</div><div class='add'>+	if (!current || !current-&gt;mm)</div><div class='add'>+		return -ESRCH; /* process exited */</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mem_list_mutex);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_rcu(mem, &amp;current-&gt;mm-&gt;context.iommu_group_mem_list,</div><div class='add'>+			next) {</div><div class='add'>+		if ((mem-&gt;ua == ua) &amp;&amp; (mem-&gt;entries == entries)) {</div><div class='add'>+			++mem-&gt;used;</div><div class='add'>+			*pmem = mem;</div><div class='add'>+			goto unlock_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Overlap? */</div><div class='add'>+		if ((mem-&gt;ua &lt; (ua + (entries &lt;&lt; PAGE_SHIFT))) &amp;&amp;</div><div class='add'>+				(ua &lt; (mem-&gt;ua +</div><div class='add'>+				       (mem-&gt;entries &lt;&lt; PAGE_SHIFT)))) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto unlock_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mm_iommu_adjust_locked_vm(current-&gt;mm, entries, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+</div><div class='add'>+	locked_entries = entries;</div><div class='add'>+</div><div class='add'>+	mem = kzalloc(sizeof(*mem), GFP_KERNEL);</div><div class='add'>+	if (!mem) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem-&gt;hpas = vzalloc(entries * sizeof(mem-&gt;hpas[0]));</div><div class='add'>+	if (!mem-&gt;hpas) {</div><div class='add'>+		kfree(mem);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; entries; ++i) {</div><div class='add'>+		if (1 != get_user_pages_fast(ua + (i &lt;&lt; PAGE_SHIFT),</div><div class='add'>+					1/* pages */, 1/* iswrite */, &amp;page)) {</div><div class='add'>+			for (j = 0; j &lt; i; ++j)</div><div class='add'>+				put_page(pfn_to_page(</div><div class='add'>+						mem-&gt;hpas[j] &gt;&gt; PAGE_SHIFT));</div><div class='add'>+			vfree(mem-&gt;hpas);</div><div class='add'>+			kfree(mem);</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+			goto unlock_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mem-&gt;hpas[i] = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic64_set(&amp;mem-&gt;mapped, 1);</div><div class='add'>+	mem-&gt;used = 1;</div><div class='add'>+	mem-&gt;ua = ua;</div><div class='add'>+	mem-&gt;entries = entries;</div><div class='add'>+	*pmem = mem;</div><div class='add'>+</div><div class='add'>+	list_add_rcu(&amp;mem-&gt;next, &amp;current-&gt;mm-&gt;context.iommu_group_mem_list);</div><div class='add'>+</div><div class='add'>+unlock_exit:</div><div class='add'>+	if (locked_entries &amp;&amp; ret)</div><div class='add'>+		mm_iommu_adjust_locked_vm(current-&gt;mm, locked_entries, false);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mem_list_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_get);</div><div class='add'>+</div><div class='add'>+static void mm_iommu_unpin(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+	long i;</div><div class='add'>+	struct page *page = NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mem-&gt;entries; ++i) {</div><div class='add'>+		if (!mem-&gt;hpas[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		page = pfn_to_page(mem-&gt;hpas[i] &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		if (!page)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		put_page(page);</div><div class='add'>+		mem-&gt;hpas[i] = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mm_iommu_do_free(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	mm_iommu_unpin(mem);</div><div class='add'>+	vfree(mem-&gt;hpas);</div><div class='add'>+	kfree(mem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mm_iommu_free(struct rcu_head *head)</div><div class='add'>+{</div><div class='add'>+	struct mm_iommu_table_group_mem_t *mem = container_of(head,</div><div class='add'>+			struct mm_iommu_table_group_mem_t, rcu);</div><div class='add'>+</div><div class='add'>+	mm_iommu_do_free(mem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mm_iommu_release(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+	list_del_rcu(&amp;mem-&gt;next);</div><div class='add'>+	mm_iommu_adjust_locked_vm(current-&gt;mm, mem-&gt;entries, false);</div><div class='add'>+	call_rcu(&amp;mem-&gt;rcu, mm_iommu_free);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+long mm_iommu_put(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+	long ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!current || !current-&gt;mm)</div><div class='add'>+		return -ESRCH; /* process exited */</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mem_list_mutex);</div><div class='add'>+</div><div class='add'>+	if (mem-&gt;used == 0) {</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	--mem-&gt;used;</div><div class='add'>+	/* There are still users, exit */</div><div class='add'>+	if (mem-&gt;used)</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+</div><div class='add'>+	/* Are there still mappings? */</div><div class='add'>+	if (atomic_cmpxchg(&amp;mem-&gt;mapped, 1, 0) != 1) {</div><div class='add'>+		++mem-&gt;used;</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto unlock_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* @mapped became 0 so now mappings are disabled, release the region */</div><div class='add'>+	mm_iommu_release(mem);</div><div class='add'>+</div><div class='add'>+unlock_exit:</div><div class='add'>+	mutex_unlock(&amp;mem_list_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_put);</div><div class='add'>+</div><div class='add'>+struct mm_iommu_table_group_mem_t *mm_iommu_lookup(unsigned long ua,</div><div class='add'>+		unsigned long size)</div><div class='add'>+{</div><div class='add'>+	struct mm_iommu_table_group_mem_t *mem, *ret = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_rcu(mem,</div><div class='add'>+			&amp;current-&gt;mm-&gt;context.iommu_group_mem_list,</div><div class='add'>+			next) {</div><div class='add'>+		if ((mem-&gt;ua &lt;= ua) &amp;&amp;</div><div class='add'>+				(ua + size &lt;= mem-&gt;ua +</div><div class='add'>+				 (mem-&gt;entries &lt;&lt; PAGE_SHIFT))) {</div><div class='add'>+			ret = mem;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_lookup);</div><div class='add'>+</div><div class='add'>+struct mm_iommu_table_group_mem_t *mm_iommu_find(unsigned long ua,</div><div class='add'>+		unsigned long entries)</div><div class='add'>+{</div><div class='add'>+	struct mm_iommu_table_group_mem_t *mem, *ret = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_rcu(mem,</div><div class='add'>+			&amp;current-&gt;mm-&gt;context.iommu_group_mem_list,</div><div class='add'>+			next) {</div><div class='add'>+		if ((mem-&gt;ua == ua) &amp;&amp; (mem-&gt;entries == entries)) {</div><div class='add'>+			ret = mem;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_find);</div><div class='add'>+</div><div class='add'>+long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,</div><div class='add'>+		unsigned long ua, unsigned long *hpa)</div><div class='add'>+{</div><div class='add'>+	const long entry = (ua - mem-&gt;ua) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	u64 *va = &amp;mem-&gt;hpas[entry];</div><div class='add'>+</div><div class='add'>+	if (entry &gt;= mem-&gt;entries)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	*hpa = *va | (ua &amp; ~PAGE_MASK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_ua_to_hpa);</div><div class='add'>+</div><div class='add'>+long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+	if (atomic64_inc_not_zero(&amp;mem-&gt;mapped))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Last mm_iommu_put() has been called, no more mappings allowed() */</div><div class='add'>+	return -ENXIO;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_mapped_inc);</div><div class='add'>+</div><div class='add'>+void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem)</div><div class='add'>+{</div><div class='add'>+	atomic64_add_unless(&amp;mem-&gt;mapped, -1, 1);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mm_iommu_mapped_dec);</div><div class='add'>+</div><div class='add'>+void mm_iommu_init(mm_context_t *ctx)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD_RCU(&amp;ctx-&gt;iommu_group_mem_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mm_iommu_cleanup(mm_context_t *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mm_iommu_table_group_mem_t *mem, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(mem, tmp, &amp;ctx-&gt;iommu_group_mem_list, next) {</div><div class='add'>+		list_del_rcu(&amp;mem-&gt;next);</div><div class='add'>+		mm_iommu_do_free(mem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c<br/>index 6bfadf1aa5cb..876232d64126 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/pgtable_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/pgtable_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/pgtable_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/pgtable_64.c</a></div><div class='hunk'>@@ -554,47 +554,42 @@ unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 	return old;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,</div><div class='del'>-		       pmd_t *pmdp)</div><div class='add'>+pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long address,</div><div class='add'>+			  pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd;</div><div class='ctx'> </div><div class='ctx'> 	VM_BUG_ON(address &amp; ~HPAGE_PMD_MASK);</div><div class='del'>-	if (pmd_trans_huge(*pmdp)) {</div><div class='del'>-		pmd = pmdp_get_and_clear(vma-&gt;vm_mm, address, pmdp);</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * khugepaged calls this for normal pmd</div><div class='del'>-		 */</div><div class='del'>-		pmd = *pmdp;</div><div class='del'>-		pmd_clear(pmdp);</div><div class='del'>-		/*</div><div class='del'>-		 * Wait for all pending hash_page to finish. This is needed</div><div class='del'>-		 * in case of subpage collapse. When we collapse normal pages</div><div class='del'>-		 * to hugepage, we first clear the pmd, then invalidate all</div><div class='del'>-		 * the PTE entries. The assumption here is that any low level</div><div class='del'>-		 * page fault will see a none pmd and take the slow path that</div><div class='del'>-		 * will wait on mmap_sem. But we could very well be in a</div><div class='del'>-		 * hash_page with local ptep pointer value. Such a hash page</div><div class='del'>-		 * can result in adding new HPTE entries for normal subpages.</div><div class='del'>-		 * That means we could be modifying the page content as we</div><div class='del'>-		 * copy them to a huge page. So wait for parallel hash_page</div><div class='del'>-		 * to finish before invalidating HPTE entries. We can do this</div><div class='del'>-		 * by sending an IPI to all the cpus and executing a dummy</div><div class='del'>-		 * function there.</div><div class='del'>-		 */</div><div class='del'>-		kick_all_cpus_sync();</div><div class='del'>-		/*</div><div class='del'>-		 * Now invalidate the hpte entries in the range</div><div class='del'>-		 * covered by pmd. This make sure we take a</div><div class='del'>-		 * fault and will find the pmd as none, which will</div><div class='del'>-		 * result in a major fault which takes mmap_sem and</div><div class='del'>-		 * hence wait for collapse to complete. Without this</div><div class='del'>-		 * the __collapse_huge_page_copy can result in copying</div><div class='del'>-		 * the old content.</div><div class='del'>-		 */</div><div class='del'>-		flush_tlb_pmd_range(vma-&gt;vm_mm, &amp;pmd, address);</div><div class='del'>-	}</div><div class='add'>+	VM_BUG_ON(pmd_trans_huge(*pmdp));</div><div class='add'>+</div><div class='add'>+	pmd = *pmdp;</div><div class='add'>+	pmd_clear(pmdp);</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for all pending hash_page to finish. This is needed</div><div class='add'>+	 * in case of subpage collapse. When we collapse normal pages</div><div class='add'>+	 * to hugepage, we first clear the pmd, then invalidate all</div><div class='add'>+	 * the PTE entries. The assumption here is that any low level</div><div class='add'>+	 * page fault will see a none pmd and take the slow path that</div><div class='add'>+	 * will wait on mmap_sem. But we could very well be in a</div><div class='add'>+	 * hash_page with local ptep pointer value. Such a hash page</div><div class='add'>+	 * can result in adding new HPTE entries for normal subpages.</div><div class='add'>+	 * That means we could be modifying the page content as we</div><div class='add'>+	 * copy them to a huge page. So wait for parallel hash_page</div><div class='add'>+	 * to finish before invalidating HPTE entries. We can do this</div><div class='add'>+	 * by sending an IPI to all the cpus and executing a dummy</div><div class='add'>+	 * function there.</div><div class='add'>+	 */</div><div class='add'>+	kick_all_cpus_sync();</div><div class='add'>+	/*</div><div class='add'>+	 * Now invalidate the hpte entries in the range</div><div class='add'>+	 * covered by pmd. This make sure we take a</div><div class='add'>+	 * fault and will find the pmd as none, which will</div><div class='add'>+	 * result in a major fault which takes mmap_sem and</div><div class='add'>+	 * hence wait for collapse to complete. Without this</div><div class='add'>+	 * the __collapse_huge_page_copy can result in copying</div><div class='add'>+	 * the old content.</div><div class='add'>+	 */</div><div class='add'>+	flush_tlb_pmd_range(vma-&gt;vm_mm, &amp;pmd, address);</div><div class='ctx'> 	return pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -817,8 +812,8 @@ void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-			 unsigned long addr, pmd_t *pmdp)</div><div class='add'>+pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+			      unsigned long addr, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t old_pmd;</div><div class='ctx'> 	pgtable_t pgtable;</div><div class='head'>diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S<br/>index 89bf95bd63b1..765b419883f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/tlb_low_64e.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/tlb_low_64e.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/tlb_low_64e.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/tlb_low_64e.S</a></div><div class='hunk'>@@ -398,18 +398,18 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_SMT)</div><div class='ctx'> 	rldicl	r15,r16,64-PUD_SHIFT+3,64-PUD_INDEX_SIZE-3</div><div class='ctx'> 	clrrdi	r15,r15,3</div><div class='ctx'> 	cmpdi	cr0,r14,0</div><div class='del'>-	bge	tlb_miss_fault_e6500	/* Bad pgd entry or hugepage; bail */</div><div class='add'>+	bge	tlb_miss_huge_e6500	/* Bad pgd entry or hugepage; bail */</div><div class='ctx'> 	ldx	r14,r14,r15		/* grab pud entry */</div><div class='ctx'> </div><div class='ctx'> 	rldicl	r15,r16,64-PMD_SHIFT+3,64-PMD_INDEX_SIZE-3</div><div class='ctx'> 	clrrdi	r15,r15,3</div><div class='ctx'> 	cmpdi	cr0,r14,0</div><div class='del'>-	bge	tlb_miss_fault_e6500</div><div class='add'>+	bge	tlb_miss_huge_e6500</div><div class='ctx'> 	ldx	r14,r14,r15		/* Grab pmd entry */</div><div class='ctx'> </div><div class='ctx'> 	mfspr	r10,SPRN_MAS0</div><div class='ctx'> 	cmpdi	cr0,r14,0</div><div class='del'>-	bge	tlb_miss_fault_e6500</div><div class='add'>+	bge	tlb_miss_huge_e6500</div><div class='ctx'> </div><div class='ctx'> 	/* Now we build the MAS for a 2M indirect page:</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -428,6 +428,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_SMT)</div><div class='ctx'> 	clrrdi	r15,r16,21		/* make EA 2M-aligned */</div><div class='ctx'> 	mtspr	SPRN_MAS2,r15</div><div class='ctx'> </div><div class='add'>+tlb_miss_huge_done_e6500:</div><div class='ctx'> 	lbz	r15,TCD_ESEL_NEXT(r11)</div><div class='ctx'> 	lbz	r16,TCD_ESEL_MAX(r11)</div><div class='ctx'> 	lbz	r14,TCD_ESEL_FIRST(r11)</div><div class='hunk'>@@ -456,6 +457,50 @@ END_FTR_SECTION_IFSET(CPU_FTR_SMT)</div><div class='ctx'> 	tlb_epilog_bolted</div><div class='ctx'> 	rfi</div><div class='ctx'> </div><div class='add'>+tlb_miss_huge_e6500:</div><div class='add'>+	beq	tlb_miss_fault_e6500</div><div class='add'>+	li	r10,1</div><div class='add'>+	andi.	r15,r14,HUGEPD_SHIFT_MASK@l /* r15 = psize */</div><div class='add'>+	rldimi	r14,r10,63,0		/* Set PD_HUGE */</div><div class='add'>+	xor	r14,r14,r15		/* Clear size bits */</div><div class='add'>+	ldx	r14,0,r14</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now we build the MAS for a huge page.</div><div class='add'>+	 *</div><div class='add'>+	 * MAS 0   :	ESEL needs to be filled by software round-robin</div><div class='add'>+	 *		 - can be handled by indirect code</div><div class='add'>+	 * MAS 1   :	Need to clear IND and set TSIZE</div><div class='add'>+	 * MAS 2,3+7:	Needs to be redone similar to non-tablewalk handler</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	subi	r15,r15,10		/* Convert psize to tsize */</div><div class='add'>+	mfspr	r10,SPRN_MAS1</div><div class='add'>+	rlwinm	r10,r10,0,~MAS1_IND</div><div class='add'>+	rlwimi	r10,r15,MAS1_TSIZE_SHIFT,MAS1_TSIZE_MASK</div><div class='add'>+	mtspr	SPRN_MAS1,r10</div><div class='add'>+</div><div class='add'>+	li	r10,-0x400</div><div class='add'>+	sld	r15,r10,r15		/* Generate mask based on size */</div><div class='add'>+	and	r10,r16,r15</div><div class='add'>+	rldicr	r15,r14,64-(PTE_RPN_SHIFT-PAGE_SHIFT),63-PAGE_SHIFT</div><div class='add'>+	rlwimi	r10,r14,32-19,27,31	/* Insert WIMGE */</div><div class='add'>+	clrldi	r15,r15,PAGE_SHIFT	/* Clear crap at the top */</div><div class='add'>+	rlwimi	r15,r14,32-8,22,25	/* Move in U bits */</div><div class='add'>+	mtspr	SPRN_MAS2,r10</div><div class='add'>+	andi.	r10,r14,_PAGE_DIRTY</div><div class='add'>+	rlwimi	r15,r14,32-2,26,31	/* Move in BAP bits */</div><div class='add'>+</div><div class='add'>+	/* Mask out SW and UW if !DIRTY (XXX optimize this !) */</div><div class='add'>+	bne	1f</div><div class='add'>+	li	r10,MAS3_SW|MAS3_UW</div><div class='add'>+	andc	r15,r15,r10</div><div class='add'>+1:</div><div class='add'>+	mtspr	SPRN_MAS7_MAS3,r15</div><div class='add'>+</div><div class='add'>+	mfspr	r10,SPRN_MAS0</div><div class='add'>+	b	tlb_miss_huge_done_e6500</div><div class='add'>+</div><div class='ctx'> tlb_miss_kernel_e6500:</div><div class='ctx'> 	ld	r14,PACA_KERNELPGD(r13)</div><div class='ctx'> 	cmpldi	cr1,r15,8		/* Check for vmalloc region */</div><div class='head'>diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c<br/>index cbd3d069897f..723a099f6be3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/tlb_nohash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/mm/tlb_nohash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/tlb_nohash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/mm/tlb_nohash.c</a></div><div class='hunk'>@@ -217,7 +217,7 @@ static DEFINE_RAW_SPINLOCK(tlbivax_lock);</div><div class='ctx'> static int mm_is_core_local(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	return cpumask_subset(mm_cpumask(mm),</div><div class='del'>-			      topology_thread_cpumask(smp_processor_id()));</div><div class='add'>+			      topology_sibling_cpumask(smp_processor_id()));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct tlb_flush_param {</div><div class='head'>diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c<br/>index 12b638425bb9..d90893b76e7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/perf/core-book3s.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/perf/core-book3s.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/perf/core-book3s.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/perf/core-book3s.c</a></div><div class='hunk'>@@ -131,7 +131,16 @@ static void pmao_restore_workaround(bool ebb) { }</div><div class='ctx'> </div><div class='ctx'> static bool regs_use_siar(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	return !!regs-&gt;result;</div><div class='add'>+	/*</div><div class='add'>+	 * When we take a performance monitor exception the regs are setup</div><div class='add'>+	 * using perf_read_regs() which overloads some fields, in particular</div><div class='add'>+	 * regs-&gt;result to tell us whether to use SIAR.</div><div class='add'>+	 *</div><div class='add'>+	 * However if the regs are from another exception, eg. a syscall, then</div><div class='add'>+	 * they have not been setup using perf_read_regs() and so regs-&gt;result</div><div class='add'>+	 * is something random.</div><div class='add'>+	 */</div><div class='add'>+	return ((TRAP(regs) == 0xf00) &amp;&amp; regs-&gt;result);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c<br/>index ec2eb20631d1..df956295c2a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/perf/hv-24x7.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/perf/hv-24x7.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/perf/hv-24x7.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/perf/hv-24x7.c</a></div><div class='hunk'>@@ -320,6 +320,8 @@ static struct attribute *device_str_attr_create_(char *name, char *str)</div><div class='ctx'> 	if (!attr)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	sysfs_attr_init(&amp;attr-&gt;attr.attr);</div><div class='add'>+</div><div class='ctx'> 	attr-&gt;var = str;</div><div class='ctx'> 	attr-&gt;attr.attr.name = name;</div><div class='ctx'> 	attr-&gt;attr.attr.mode = 0444;</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c<br/>index c949ca055712..63016621aff8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static struct irq_chip mpc52xx_gpt_irq_chip = {</div><div class='ctx'> </div><div class='ctx'> void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);</div><div class='add'>+	struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	int sub_virq;</div><div class='ctx'> 	u32 status;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c<br/>index e2d401ad8fbb..6eb3b2abae90 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/52xx/mpc52xx_pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/52xx/mpc52xx_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/52xx/mpc52xx_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/52xx/mpc52xx_pci.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #undef DEBUG</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;asm/mpc52xx.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c<br/>index c9adbfb65006..fcbea4b51a78 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/83xx/suspend.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/83xx/suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/83xx/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/83xx/suspend.c</a></div><div class='hunk'>@@ -445,5 +445,4 @@ static int pmc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_driver_register(&amp;pmc_driver);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(pmc_init);</div><div class='add'>+device_initcall(pmc_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig<br/>index 2fb4b24368a6..97915feffd42 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/85xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/Kconfig</a></div><div class='hunk'>@@ -282,7 +282,7 @@ config CORENET_GENERIC</div><div class='ctx'> 	  For 64bit kernel, the following boards are supported:</div><div class='ctx'> 	    T208x QDS/RDB, T4240 QDS/RDB and B4 QDS</div><div class='ctx'> 	  The following boards are supported for both 32bit and 64bit kernel:</div><div class='del'>-	    P5020 DS, P5040 DS and T104xQDS/RDB</div><div class='add'>+	    P5020 DS, P5040 DS, T102x QDS/RDB, T104x QDS/RDB</div><div class='ctx'> </div><div class='ctx'> endif # FSL_SOC_BOOKE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c<br/>index 9824d2cf79bd..bd839dc287fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/corenet_generic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/85xx/corenet_generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/corenet_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/corenet_generic.c</a></div><div class='hunk'>@@ -150,6 +150,9 @@ static const char * const boards[] __initconst = {</div><div class='ctx'> 	"fsl,B4860QDS",</div><div class='ctx'> 	"fsl,B4420QDS",</div><div class='ctx'> 	"fsl,B4220QDS",</div><div class='add'>+	"fsl,T1023RDB",</div><div class='add'>+	"fsl,T1024QDS",</div><div class='add'>+	"fsl,T1024RDB",</div><div class='ctx'> 	"fsl,T1040QDS",</div><div class='ctx'> 	"fsl,T1042QDS",</div><div class='ctx'> 	"fsl,T1040RDB",</div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c<br/>index 8631ac5f0e57..b8b821697910 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/85xx/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/smp.c</a></div><div class='hunk'>@@ -345,6 +345,7 @@ void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	if (secondary) {</div><div class='add'>+		__flush_disable_L1();</div><div class='ctx'> 		atomic_inc(&amp;kexec_down_cpus);</div><div class='ctx'> 		/* loop forever */</div><div class='ctx'> 		while (1);</div><div class='hunk'>@@ -357,61 +358,11 @@ static void mpc85xx_smp_kexec_down(void *arg)</div><div class='ctx'> 		ppc_md.kexec_cpu_down(0,1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void map_and_flush(unsigned long paddr)</div><div class='del'>-{</div><div class='del'>-	struct page *page = pfn_to_page(paddr &gt;&gt; PAGE_SHIFT);</div><div class='del'>-	unsigned long kaddr  = (unsigned long)kmap_atomic(page);</div><div class='del'>-</div><div class='del'>-	flush_dcache_range(kaddr, kaddr + PAGE_SIZE);</div><div class='del'>-	kunmap_atomic((void *)kaddr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Before we reset the other cores, we need to flush relevant cache</div><div class='del'>- * out to memory so we don't get anything corrupted, some of these flushes</div><div class='del'>- * are performed out of an overabundance of caution as interrupts are not</div><div class='del'>- * disabled yet and we can switch cores</div><div class='del'>- */</div><div class='del'>-static void mpc85xx_smp_flush_dcache_kexec(struct kimage *image)</div><div class='del'>-{</div><div class='del'>-	kimage_entry_t *ptr, entry;</div><div class='del'>-	unsigned long paddr;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (image-&gt;type == KEXEC_TYPE_DEFAULT) {</div><div class='del'>-		/* normal kexec images are stored in temporary pages */</div><div class='del'>-		for (ptr = &amp;image-&gt;head; (entry = *ptr) &amp;&amp; !(entry &amp; IND_DONE);</div><div class='del'>-		     ptr = (entry &amp; IND_INDIRECTION) ?</div><div class='del'>-				phys_to_virt(entry &amp; PAGE_MASK) : ptr + 1) {</div><div class='del'>-			if (!(entry &amp; IND_DESTINATION)) {</div><div class='del'>-				map_and_flush(entry);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* flush out last IND_DONE page */</div><div class='del'>-		map_and_flush(entry);</div><div class='del'>-	} else {</div><div class='del'>-		/* crash type kexec images are copied to the crash region */</div><div class='del'>-		for (i = 0; i &lt; image-&gt;nr_segments; i++) {</div><div class='del'>-			struct kexec_segment *seg = &amp;image-&gt;segment[i];</div><div class='del'>-			for (paddr = seg-&gt;mem; paddr &lt; seg-&gt;mem + seg-&gt;memsz;</div><div class='del'>-			     paddr += PAGE_SIZE) {</div><div class='del'>-				map_and_flush(paddr);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* also flush the kimage struct to be passed in as well */</div><div class='del'>-	flush_dcache_range((unsigned long)image,</div><div class='del'>-			   (unsigned long)image + sizeof(*image));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void mpc85xx_smp_machine_kexec(struct kimage *image)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout = INT_MAX;</div><div class='ctx'> 	int i, num_cpus = num_present_cpus();</div><div class='ctx'> </div><div class='del'>-	mpc85xx_smp_flush_dcache_kexec(image);</div><div class='del'>-</div><div class='ctx'> 	if (image-&gt;type == KEXEC_TYPE_DEFAULT)</div><div class='ctx'> 		smp_call_function(mpc85xx_smp_kexec_down, NULL, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c<br/>index 1eadb6d0dc64..30e002f4648c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/twr_p102x.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/85xx/twr_p102x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/85xx/twr_p102x.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/85xx/twr_p102x.c</a></div><div class='hunk'>@@ -79,7 +79,7 @@ static void __init twr_p1025_setup_arch(void)</div><div class='ctx'> 	mpc85xx_qe_init();</div><div class='ctx'> 	mpc85xx_qe_par_io_init();</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)</div><div class='add'>+#if IS_ENABLED(CONFIG_UCC_GETH) || IS_ENABLED(CONFIG_SERIAL_QE)</div><div class='ctx'> 	if (machine_is(twr_p1025)) {</div><div class='ctx'> 		struct ccsr_guts __iomem *guts;</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +101,7 @@ static void __init twr_p1025_setup_arch(void)</div><div class='ctx'> 					MPC85xx_PMUXCR_QE(12));</div><div class='ctx'> 			iounmap(guts);</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SERIAL_QE)</div><div class='add'>+#if IS_ENABLED(CONFIG_SERIAL_QE)</div><div class='ctx'> 			/* On P1025TWR board, the UCC7 acted as UART port.</div><div class='ctx'> 			 * However, The UCC7's CTS pin is low level in default,</div><div class='ctx'> 			 * it will impact the transmission in full duplex</div><div class='head'>diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype<br/>index 7264e91190be..c140e94c7c72 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/Kconfig.cputype?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/Kconfig.cputype</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/Kconfig.cputype?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/Kconfig.cputype</a></div><div class='hunk'>@@ -405,6 +405,16 @@ config PPC_DOORBELL</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='add'>+config VDSO32</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on PPC32 || CPU_BIG_ENDIAN</div><div class='add'>+	help</div><div class='add'>+	  This symbol controls whether we build the 32-bit VDSO. We obviously</div><div class='add'>+	  want to do that if we're building a 32-bit kernel. If we're building</div><div class='add'>+	  a 64-bit kernel then we only want a 32-bit VDSO if we're building for</div><div class='add'>+	  big endian. That is because the only little endian configuration we</div><div class='add'>+	  support is ppc64le which is 64-bit only.</div><div class='add'>+</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Endianness selection"</div><div class='ctx'> 	default CPU_BIG_ENDIAN</div><div class='hunk'>@@ -421,6 +431,7 @@ config CPU_BIG_ENDIAN</div><div class='ctx'> </div><div class='ctx'> config CPU_LITTLE_ENDIAN</div><div class='ctx'> 	bool "Build little endian kernel"</div><div class='add'>+	depends on PPC_BOOK3S_64</div><div class='ctx'> 	select PPC64_BOOT_WRAPPER</div><div class='ctx'> 	help</div><div class='ctx'> 	  Build a little endian kernel.</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c<br/>index 623bd961465a..fe51de4fcf13 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/axon_msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/cell/axon_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/axon_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/axon_msi.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "cell.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * MSIC registers, specified as offsets from dcr_base</div><div class='hunk'>@@ -95,7 +96,7 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)</div><div class='ctx'> static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='del'>-	struct axon_msic *msic = irq_get_handler_data(irq);</div><div class='add'>+	struct axon_msic *msic = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	u32 write_offset, msi;</div><div class='ctx'> 	int idx;</div><div class='ctx'> 	int retry = 0;</div><div class='hunk'>@@ -406,8 +407,8 @@ static int axon_msi_probe(struct platform_device *device)</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(&amp;device-&gt;dev, msic);</div><div class='ctx'> </div><div class='del'>-	ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;</div><div class='add'>+	cell_pci_controller_ops.setup_msi_irqs = axon_msi_setup_msi_irqs;</div><div class='add'>+	cell_pci_controller_ops.teardown_msi_irqs = axon_msi_teardown_msi_irqs;</div><div class='ctx'> </div><div class='ctx'> 	axon_msi_debug_setup(dn, msic);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c<br/>index 21b502398bf3..14a582b21274 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/cell/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/iommu.c</a></div><div class='hunk'>@@ -466,6 +466,11 @@ static inline u32 cell_iommu_get_ioid(struct device_node *np)</div><div class='ctx'> 	return *ioid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_ops cell_iommu_ops = {</div><div class='add'>+	.set = tce_build_cell,</div><div class='add'>+	.clear = tce_free_cell</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct iommu_window * __init</div><div class='ctx'> cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,</div><div class='ctx'> 			unsigned long offset, unsigned long size,</div><div class='hunk'>@@ -492,6 +497,7 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,</div><div class='ctx'> 	window-&gt;table.it_offset =</div><div class='ctx'> 		(offset &gt;&gt; window-&gt;table.it_page_shift) + pte_offset;</div><div class='ctx'> 	window-&gt;table.it_size = size &gt;&gt; window-&gt;table.it_page_shift;</div><div class='add'>+	window-&gt;table.it_ops = &amp;cell_iommu_ops;</div><div class='ctx'> </div><div class='ctx'> 	iommu_init_table(&amp;window-&gt;table, iommu-&gt;nid);</div><div class='ctx'> </div><div class='hunk'>@@ -1201,8 +1207,6 @@ static int __init cell_iommu_init(void)</div><div class='ctx'> 	/* Setup various callbacks */</div><div class='ctx'> 	cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup;</div><div class='ctx'> 	ppc_md.dma_get_required_mask = cell_dma_get_required_mask;</div><div class='del'>-	ppc_md.tce_build = tce_build_cell;</div><div class='del'>-	ppc_md.tce_free = tce_free_cell;</div><div class='ctx'> </div><div class='ctx'> 	if (!iommu_fixed_disabled &amp;&amp; cell_iommu_fixed_mapping_init() == 0)</div><div class='ctx'> 		goto bail;</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c<br/>index 1ba6307be4db..11634fa7ab3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/spufs/inode.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/cell/spufs/inode.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/spufs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/cell/spufs/inode.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ static void spufs_prune_dir(struct dentry *dir)</div><div class='ctx'> 	mutex_lock(&amp;d_inode(dir)-&gt;i_mutex);</div><div class='ctx'> 	list_for_each_entry_safe(dentry, tmp, &amp;dir-&gt;d_subdirs, d_child) {</div><div class='ctx'> 		spin_lock(&amp;dentry-&gt;d_lock);</div><div class='del'>-		if (!(d_unhashed(dentry)) &amp;&amp; d_really_is_positive(dentry)) {</div><div class='add'>+		if (simple_positive(dentry)) {</div><div class='ctx'> 			dget_dlock(dentry);</div><div class='ctx'> 			__d_drop(dentry);</div><div class='ctx'> 			spin_unlock(&amp;dentry-&gt;d_lock);</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c<br/>index c269caee58f9..9dd154d6f89a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq,</div><div class='ctx'> 				      struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='del'>-	struct irq_domain *irq_domain = irq_get_handler_data(cascade_virq);</div><div class='add'>+	struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	unsigned int virq;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(&amp;desc-&gt;lock);</div><div class='head'>diff --git a/arch/powerpc/platforms/pasemi/Makefile b/arch/powerpc/platforms/pasemi/Makefile<br/>index 8e8d4cae5ebe..60b4e0fd9808 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pasemi/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pasemi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pasemi/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/Makefile</a></div><div class='hunk'>@@ -1,2 +1,3 @@</div><div class='ctx'> obj-y	+= setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o misc.o</div><div class='ctx'> obj-$(CONFIG_PPC_PASEMI_MDIO)	+= gpio_mdio.o</div><div class='add'>+obj-$(CONFIG_PCI_MSI)		+= msi.o</div><div class='head'>diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c<br/>index b8f567b2ea19..c929644e74a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pasemi/iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pasemi/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pasemi/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/iommu.c</a></div><div class='hunk'>@@ -134,6 +134,10 @@ static void iobmap_free(struct iommu_table *tbl, long index,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_ops iommu_table_iobmap_ops = {</div><div class='add'>+	.set = iobmap_build,</div><div class='add'>+	.clear  = iobmap_free</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static void iommu_table_iobmap_setup(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -153,6 +157,7 @@ static void iommu_table_iobmap_setup(void)</div><div class='ctx'> 	 * Should probably be 8 (64 bytes)</div><div class='ctx'> 	 */</div><div class='ctx'> 	iommu_table_iobmap.it_blocksize = 4;</div><div class='add'>+	iommu_table_iobmap.it_ops = &amp;iommu_table_iobmap_ops;</div><div class='ctx'> 	iommu_init_table(&amp;iommu_table_iobmap, 0);</div><div class='ctx'> 	pr_debug(" &lt;- %s\n", __func__);</div><div class='ctx'> }</div><div class='hunk'>@@ -252,8 +257,6 @@ void __init iommu_init_early_pasemi(void)</div><div class='ctx'> </div><div class='ctx'> 	pasemi_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pasemi;</div><div class='ctx'> 	pasemi_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pasemi;</div><div class='del'>-	ppc_md.tce_build = iobmap_build;</div><div class='del'>-	ppc_md.tce_free  = iobmap_free;</div><div class='ctx'> 	set_pci_dma_ops(&amp;dma_iommu_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/platforms/pasemi/msi.c<br/>index a3f660eed6de..27f2b187a91b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic_pasemi_msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mpic_pasemi_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pasemi/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pasemi/msi.c</a></div><div class='hunk'>@@ -13,8 +13,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;asm/mpic.h&gt;</div><div class='hunk'>@@ -23,7 +21,7 @@</div><div class='ctx'> #include &lt;asm/ppc-pci.h&gt;</div><div class='ctx'> #include &lt;asm/msi_bitmap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mpic.h"</div><div class='add'>+#include &lt;sysdev/mpic.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Allocate 16 interrupts per device, to give an alignment of 16,</div><div class='ctx'>  * since that's the size of the grouping w.r.t. affinity. If someone</div><div class='hunk'>@@ -144,6 +142,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)</div><div class='ctx'> int mpic_pasemi_msi_init(struct mpic *mpic)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='add'>+	struct pci_controller *phb;</div><div class='ctx'> </div><div class='ctx'> 	if (!mpic-&gt;irqhost-&gt;of_node ||</div><div class='ctx'> 	    !of_device_is_compatible(mpic-&gt;irqhost-&gt;of_node,</div><div class='hunk'>@@ -159,9 +158,11 @@ int mpic_pasemi_msi_init(struct mpic *mpic)</div><div class='ctx'> 	pr_debug("pasemi_msi: Registering PA Semi MPIC MSI callbacks\n");</div><div class='ctx'> </div><div class='ctx'> 	msi_mpic = mpic;</div><div class='del'>-	WARN_ON(ppc_md.setup_msi_irqs);</div><div class='del'>-	ppc_md.setup_msi_irqs = pasemi_msi_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = pasemi_msi_teardown_msi_irqs;</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		WARN_ON(phb-&gt;controller_ops.setup_msi_irqs);</div><div class='add'>+		phb-&gt;controller_ops.setup_msi_irqs = pasemi_msi_setup_msi_irqs;</div><div class='add'>+		phb-&gt;controller_ops.teardown_msi_irqs = pasemi_msi_teardown_msi_irqs;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig<br/>index 4b044d8cb49a..604190cab522 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/Kconfig</a></div><div class='hunk'>@@ -19,3 +19,10 @@ config PPC_POWERNV</div><div class='ctx'> 	select CPU_FREQ_GOV_CONSERVATIVE</div><div class='ctx'> 	select PPC_DOORBELL</div><div class='ctx'> 	default y</div><div class='add'>+</div><div class='add'>+config OPAL_PRD</div><div class='add'>+	tristate 'OPAL PRD driver'</div><div class='add'>+	depends on PPC_POWERNV</div><div class='add'>+	help</div><div class='add'>+	  This enables the opal-prd driver, a facility to run processor</div><div class='add'>+	  recovery diagnostics on OpenPower machines</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile<br/>index 33e44f37212f..1c8cdb6250e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/Makefile</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='del'>-obj-y			+= setup.o opal-wrappers.o opal.o opal-async.o</div><div class='add'>+obj-y			+= setup.o opal-wrappers.o opal.o opal-async.o idle.o</div><div class='ctx'> obj-y			+= opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o</div><div class='ctx'> obj-y			+= rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o</div><div class='del'>-obj-y			+= opal-msglog.o opal-hmi.o opal-power.o</div><div class='add'>+obj-y			+= opal-msglog.o opal-hmi.o opal-power.o opal-irqchip.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SMP)	+= smp.o subcore.o subcore-asm.o</div><div class='ctx'> obj-$(CONFIG_PCI)	+= pci.o pci-p5ioc2.o pci-ioda.o</div><div class='hunk'>@@ -9,3 +9,4 @@ obj-$(CONFIG_EEH)	+= eeh-powernv.o</div><div class='ctx'> obj-$(CONFIG_PPC_SCOM)	+= opal-xscom.o</div><div class='ctx'> obj-$(CONFIG_MEMORY_FAILURE)	+= opal-memory-errors.o</div><div class='ctx'> obj-$(CONFIG_TRACEPOINTS)	+= opal-tracepoints.o</div><div class='add'>+obj-$(CONFIG_OPAL_PRD)	+= opal-prd.o</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c<br/>index ce738ab3d5a9..5cf5e6ea213b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/eeh-powernv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/eeh-powernv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/eeh-powernv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/eeh-powernv.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='hunk'>@@ -40,6 +41,7 @@</div><div class='ctx'> #include "pci.h"</div><div class='ctx'> </div><div class='ctx'> static bool pnv_eeh_nb_init = false;</div><div class='add'>+static int eeh_event_irq = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * pnv_eeh_init - EEH platform dependent initialization</div><div class='hunk'>@@ -88,34 +90,22 @@ static int pnv_eeh_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pnv_eeh_event(struct notifier_block *nb,</div><div class='del'>-			 unsigned long events, void *change)</div><div class='add'>+static irqreturn_t pnv_eeh_event(int irq, void *data)</div><div class='ctx'> {</div><div class='del'>-	uint64_t changed_evts = (uint64_t)change;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * We simply send special EEH event if EEH has</div><div class='del'>-	 * been enabled, or clear pending events in</div><div class='del'>-	 * case that we enable EEH soon</div><div class='add'>+	 * We simply send a special EEH event if EEH has been</div><div class='add'>+	 * enabled. We don't care about EEH events until we've</div><div class='add'>+	 * finished processing the outstanding ones. Event processing</div><div class='add'>+	 * gets unmasked in next_error() if EEH is enabled.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(changed_evts &amp; OPAL_EVENT_PCI_ERROR) ||</div><div class='del'>-	    !(events &amp; OPAL_EVENT_PCI_ERROR))</div><div class='del'>-		return 0;</div><div class='add'>+	disable_irq_nosync(irq);</div><div class='ctx'> </div><div class='ctx'> 	if (eeh_enabled())</div><div class='ctx'> 		eeh_send_failure_event(NULL);</div><div class='del'>-	else</div><div class='del'>-		opal_notifier_update_evt(OPAL_EVENT_PCI_ERROR, 0x0ul);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct notifier_block pnv_eeh_nb = {</div><div class='del'>-	.notifier_call	= pnv_eeh_event,</div><div class='del'>-	.next		= NULL,</div><div class='del'>-	.priority	= 0</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> static ssize_t pnv_eeh_ei_write(struct file *filp,</div><div class='ctx'> 				const char __user *user_buf,</div><div class='hunk'>@@ -237,16 +227,28 @@ static int pnv_eeh_post_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Register OPAL event notifier */</div><div class='ctx'> 	if (!pnv_eeh_nb_init) {</div><div class='del'>-		ret = opal_notifier_register(&amp;pnv_eeh_nb);</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_warn("%s: Can't register OPAL event notifier (%d)\n",</div><div class='del'>-				__func__, ret);</div><div class='add'>+		eeh_event_irq = opal_event_request(ilog2(OPAL_EVENT_PCI_ERROR));</div><div class='add'>+		if (eeh_event_irq &lt; 0) {</div><div class='add'>+			pr_err("%s: Can't register OPAL event interrupt (%d)\n",</div><div class='add'>+			       __func__, eeh_event_irq);</div><div class='add'>+			return eeh_event_irq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = request_irq(eeh_event_irq, pnv_eeh_event,</div><div class='add'>+				IRQ_TYPE_LEVEL_HIGH, "opal-eeh", NULL);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			irq_dispose_mapping(eeh_event_irq);</div><div class='add'>+			pr_err("%s: Can't request OPAL event interrupt (%d)\n",</div><div class='add'>+			       __func__, eeh_event_irq);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pnv_eeh_nb_init = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!eeh_enabled())</div><div class='add'>+		disable_irq(eeh_event_irq);</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(hose, &amp;hose_list, list_node) {</div><div class='ctx'> 		phb = hose-&gt;private_data;</div><div class='ctx'> </div><div class='hunk'>@@ -979,7 +981,7 @@ static int pnv_eeh_reset(struct eeh_pe *pe, int option)</div><div class='ctx'> /**</div><div class='ctx'>  * pnv_eeh_wait_state - Wait for PE state</div><div class='ctx'>  * @pe: EEH PE</div><div class='del'>- * @max_wait: maximal period in microsecond</div><div class='add'>+ * @max_wait: maximal period in millisecond</div><div class='ctx'>  *</div><div class='ctx'>  * Wait for the state of associated PE. It might take some time</div><div class='ctx'>  * to retrieve the PE's state.</div><div class='hunk'>@@ -1000,13 +1002,13 @@ static int pnv_eeh_wait_state(struct eeh_pe *pe, int max_wait)</div><div class='ctx'> 		if (ret != EEH_STATE_UNAVAILABLE)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		max_wait -= mwait;</div><div class='ctx'> 		if (max_wait &lt;= 0) {</div><div class='ctx'> 			pr_warn("%s: Timeout getting PE#%x's state (%d)\n",</div><div class='ctx'> 				__func__, pe-&gt;addr, max_wait);</div><div class='ctx'> 			return EEH_STATE_NOT_SUPPORT;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		max_wait -= mwait;</div><div class='ctx'> 		msleep(mwait);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1303,12 +1305,10 @@ static int pnv_eeh_next_error(struct eeh_pe **pe)</div><div class='ctx'> 	int state, ret = EEH_NEXT_ERR_NONE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * While running here, it's safe to purge the event queue.</div><div class='del'>-	 * And we should keep the cached OPAL notifier event sychronized</div><div class='del'>-	 * between the kernel and firmware.</div><div class='add'>+	 * While running here, it's safe to purge the event queue. The</div><div class='add'>+	 * event should still be masked.</div><div class='ctx'> 	 */</div><div class='ctx'> 	eeh_remove_event(NULL, false);</div><div class='del'>-	opal_notifier_update_evt(OPAL_EVENT_PCI_ERROR, 0x0ul);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(hose, &amp;hose_list, list_node) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1477,6 +1477,10 @@ static int pnv_eeh_next_error(struct eeh_pe **pe)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Unmask the event */</div><div class='add'>+	if (eeh_enabled())</div><div class='add'>+		enable_irq(eeh_event_irq);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c<br/>new file mode 100644<br/>index 000000000000..59d735d2e5c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/idle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/idle.c</a></div><div class='hunk'>@@ -0,0 +1,293 @@</div><div class='add'>+/*</div><div class='add'>+ * PowerNV cpuidle code</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015 IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version</div><div class='add'>+ * 2 of the License, or (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/firmware.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/opal.h&gt;</div><div class='add'>+#include &lt;asm/cputhreads.h&gt;</div><div class='add'>+#include &lt;asm/cpuidle.h&gt;</div><div class='add'>+#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "powernv.h"</div><div class='add'>+#include "subcore.h"</div><div class='add'>+</div><div class='add'>+static u32 supported_cpuidle_states;</div><div class='add'>+</div><div class='add'>+int pnv_save_sprs_for_winkle(void)</div><div class='add'>+{</div><div class='add'>+	int cpu;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * hid0, hid1, hid4, hid5, hmeer and lpcr values are symmetric accross</div><div class='add'>+	 * all cpus at boot. Get these reg values of current cpu and use the</div><div class='add'>+	 * same accross all cpus.</div><div class='add'>+	 */</div><div class='add'>+	uint64_t lpcr_val = mfspr(SPRN_LPCR) &amp; ~(u64)LPCR_PECE1;</div><div class='add'>+	uint64_t hid0_val = mfspr(SPRN_HID0);</div><div class='add'>+	uint64_t hid1_val = mfspr(SPRN_HID1);</div><div class='add'>+	uint64_t hid4_val = mfspr(SPRN_HID4);</div><div class='add'>+	uint64_t hid5_val = mfspr(SPRN_HID5);</div><div class='add'>+	uint64_t hmeer_val = mfspr(SPRN_HMEER);</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		uint64_t pir = get_hard_smp_processor_id(cpu);</div><div class='add'>+		uint64_t hsprg0_val = (uint64_t)&amp;paca[cpu];</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * HSPRG0 is used to store the cpu's pointer to paca. Hence last</div><div class='add'>+		 * 3 bits are guaranteed to be 0. Program slw to restore HSPRG0</div><div class='add'>+		 * with 63rd bit set, so that when a thread wakes up at 0x100 we</div><div class='add'>+		 * can use this bit to distinguish between fastsleep and</div><div class='add'>+		 * deep winkle.</div><div class='add'>+		 */</div><div class='add'>+		hsprg0_val |= 1;</div><div class='add'>+</div><div class='add'>+		rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val);</div><div class='add'>+		if (rc != 0)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val);</div><div class='add'>+		if (rc != 0)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		/* HIDs are per core registers */</div><div class='add'>+		if (cpu_thread_in_core(cpu) == 0) {</div><div class='add'>+</div><div class='add'>+			rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val);</div><div class='add'>+			if (rc != 0)</div><div class='add'>+				return rc;</div><div class='add'>+</div><div class='add'>+			rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val);</div><div class='add'>+			if (rc != 0)</div><div class='add'>+				return rc;</div><div class='add'>+</div><div class='add'>+			rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val);</div><div class='add'>+			if (rc != 0)</div><div class='add'>+				return rc;</div><div class='add'>+</div><div class='add'>+			rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val);</div><div class='add'>+			if (rc != 0)</div><div class='add'>+				return rc;</div><div class='add'>+</div><div class='add'>+			rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val);</div><div class='add'>+			if (rc != 0)</div><div class='add'>+				return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_alloc_idle_core_states(void)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+	int nr_cores = cpu_nr_cores();</div><div class='add'>+	u32 *core_idle_state;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * core_idle_state - First 8 bits track the idle state of each thread</div><div class='add'>+	 * of the core. The 8th bit is the lock bit. Initially all thread bits</div><div class='add'>+	 * are set. They are cleared when the thread enters deep idle state</div><div class='add'>+	 * like sleep and winkle. Initially the lock bit is cleared.</div><div class='add'>+	 * The lock bit has 2 purposes</div><div class='add'>+	 * a. While the first thread is restoring core state, it prevents</div><div class='add'>+	 * other threads in the core from switching to process context.</div><div class='add'>+	 * b. While the last thread in the core is saving the core state, it</div><div class='add'>+	 * prevents a different thread from waking up.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; nr_cores; i++) {</div><div class='add'>+		int first_cpu = i * threads_per_core;</div><div class='add'>+		int node = cpu_to_node(first_cpu);</div><div class='add'>+</div><div class='add'>+		core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);</div><div class='add'>+		*core_idle_state = PNV_CORE_IDLE_THREAD_BITS;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; threads_per_core; j++) {</div><div class='add'>+			int cpu = first_cpu + j;</div><div class='add'>+</div><div class='add'>+			paca[cpu].core_idle_state_ptr = core_idle_state;</div><div class='add'>+			paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;</div><div class='add'>+			paca[cpu].thread_mask = 1 &lt;&lt; j;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	update_subcore_sibling_mask();</div><div class='add'>+</div><div class='add'>+	if (supported_cpuidle_states &amp; OPAL_PM_WINKLE_ENABLED)</div><div class='add'>+		pnv_save_sprs_for_winkle();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 pnv_get_supported_cpuidle_states(void)</div><div class='add'>+{</div><div class='add'>+	return supported_cpuidle_states;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void pnv_fastsleep_workaround_apply(void *info)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	int *err = info;</div><div class='add'>+</div><div class='add'>+	rc = opal_config_cpu_idle_state(OPAL_CONFIG_IDLE_FASTSLEEP,</div><div class='add'>+					OPAL_CONFIG_IDLE_APPLY);</div><div class='add'>+	if (rc)</div><div class='add'>+		*err = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Used to store fastsleep workaround state</div><div class='add'>+ * 0 - Workaround applied/undone at fastsleep entry/exit path (Default)</div><div class='add'>+ * 1 - Workaround applied once, never undone.</div><div class='add'>+ */</div><div class='add'>+static u8 fastsleep_workaround_applyonce;</div><div class='add'>+</div><div class='add'>+static ssize_t show_fastsleep_workaround_applyonce(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return sprintf(buf, "%u\n", fastsleep_workaround_applyonce);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_fastsleep_workaround_applyonce(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, const char *buf,</div><div class='add'>+		size_t count)</div><div class='add'>+{</div><div class='add'>+	cpumask_t primary_thread_mask;</div><div class='add'>+	int err;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	if (kstrtou8(buf, 0, &amp;val) || val != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (fastsleep_workaround_applyonce == 1)</div><div class='add'>+		return count;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * fastsleep_workaround_applyonce = 1 implies</div><div class='add'>+	 * fastsleep workaround needs to be left in 'applied' state on all</div><div class='add'>+	 * the cores. Do this by-</div><div class='add'>+	 * 1. Patching out the call to 'undo' workaround in fastsleep exit path</div><div class='add'>+	 * 2. Sending ipi to all the cores which have atleast one online thread</div><div class='add'>+	 * 3. Patching out the call to 'apply' workaround in fastsleep entry</div><div class='add'>+	 * path</div><div class='add'>+	 * There is no need to send ipi to cores which have all threads</div><div class='add'>+	 * offlined, as last thread of the core entering fastsleep or deeper</div><div class='add'>+	 * state would have applied workaround.</div><div class='add'>+	 */</div><div class='add'>+	err = patch_instruction(</div><div class='add'>+		(unsigned int *)pnv_fastsleep_workaround_at_exit,</div><div class='add'>+		PPC_INST_NOP);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("fastsleep_workaround_applyonce change failed while patching pnv_fastsleep_workaround_at_exit");</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_online_cpus();</div><div class='add'>+	primary_thread_mask = cpu_online_cores_map();</div><div class='add'>+	on_each_cpu_mask(&amp;primary_thread_mask,</div><div class='add'>+				pnv_fastsleep_workaround_apply,</div><div class='add'>+				&amp;err, 1);</div><div class='add'>+	put_online_cpus();</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("fastsleep_workaround_applyonce change failed while running pnv_fastsleep_workaround_apply");</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = patch_instruction(</div><div class='add'>+		(unsigned int *)pnv_fastsleep_workaround_at_entry,</div><div class='add'>+		PPC_INST_NOP);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("fastsleep_workaround_applyonce change failed while patching pnv_fastsleep_workaround_at_entry");</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fastsleep_workaround_applyonce = 1;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+fail:</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR(fastsleep_workaround_applyonce, 0600,</div><div class='add'>+			show_fastsleep_workaround_applyonce,</div><div class='add'>+			store_fastsleep_workaround_applyonce);</div><div class='add'>+</div><div class='add'>+static int __init pnv_init_idle_states(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *power_mgt;</div><div class='add'>+	int dt_idle_states;</div><div class='add'>+	u32 *flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	supported_cpuidle_states = 0;</div><div class='add'>+</div><div class='add'>+	if (cpuidle_disable != IDLE_NO_OVERRIDE)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!firmware_has_feature(FW_FEATURE_OPALv3))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");</div><div class='add'>+	if (!power_mgt) {</div><div class='add'>+		pr_warn("opal: PowerMgmt Node not found\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	dt_idle_states = of_property_count_u32_elems(power_mgt,</div><div class='add'>+			"ibm,cpu-idle-state-flags");</div><div class='add'>+	if (dt_idle_states &lt; 0) {</div><div class='add'>+		pr_warn("cpuidle-powernv: no idle states found in the DT\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL);</div><div class='add'>+	if (of_property_read_u32_array(power_mgt,</div><div class='add'>+			"ibm,cpu-idle-state-flags", flags, dt_idle_states)) {</div><div class='add'>+		pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n");</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dt_idle_states; i++)</div><div class='add'>+		supported_cpuidle_states |= flags[i];</div><div class='add'>+</div><div class='add'>+	if (!(supported_cpuidle_states &amp; OPAL_PM_SLEEP_ENABLED_ER1)) {</div><div class='add'>+		patch_instruction(</div><div class='add'>+			(unsigned int *)pnv_fastsleep_workaround_at_entry,</div><div class='add'>+			PPC_INST_NOP);</div><div class='add'>+		patch_instruction(</div><div class='add'>+			(unsigned int *)pnv_fastsleep_workaround_at_exit,</div><div class='add'>+			PPC_INST_NOP);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * OPAL_PM_SLEEP_ENABLED_ER1 is set. It indicates that</div><div class='add'>+		 * workaround is needed to use fastsleep. Provide sysfs</div><div class='add'>+		 * control to choose how this workaround has to be applied.</div><div class='add'>+		 */</div><div class='add'>+		device_create_file(cpu_subsys.dev_root,</div><div class='add'>+				&amp;dev_attr_fastsleep_workaround_applyonce);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pnv_alloc_idle_core_states();</div><div class='add'>+out_free:</div><div class='add'>+	kfree(flags);</div><div class='add'>+out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+machine_subsys_initcall(powernv, pnv_init_idle_states);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-async.c b/arch/powerpc/platforms/powernv/opal-async.c<br/>index 693b6cdac691..bdc8c0c71d15 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-async.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-async.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-async.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-async.c</a></div><div class='hunk'>@@ -151,7 +151,7 @@ static struct notifier_block opal_async_comp_nb = {</div><div class='ctx'> 		.priority	= 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init opal_async_comp_init(void)</div><div class='add'>+int __init opal_async_comp_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *opal_node;</div><div class='ctx'> 	const __be32 *async;</div><div class='hunk'>@@ -205,4 +205,3 @@ out_opal_node:</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-machine_subsys_initcall(powernv, opal_async_comp_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-dump.c b/arch/powerpc/platforms/powernv/opal-dump.c<br/>index 5aa9c1ce4de3..2ee96431f736 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-dump.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-dump.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-dump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-dump.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +61,7 @@ static ssize_t dump_type_show(struct dump_obj *dump_obj,</div><div class='ctx'> 			      struct dump_attribute *attr,</div><div class='ctx'> 			      char *buf)</div><div class='ctx'> {</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	return sprintf(buf, "0x%x %s\n", dump_obj-&gt;type,</div><div class='ctx'> 		       dump_type_to_string(dump_obj-&gt;type));</div><div class='ctx'> }</div><div class='hunk'>@@ -363,7 +364,7 @@ static struct dump_obj *create_dump_obj(uint32_t id, size_t size,</div><div class='ctx'> 	return dump;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_dump(void)</div><div class='add'>+static irqreturn_t process_dump(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	uint32_t dump_id, dump_size, dump_type;</div><div class='hunk'>@@ -387,45 +388,13 @@ static int process_dump(void)</div><div class='ctx'> 	if (!dump)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dump_work_fn(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	process_dump();</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DECLARE_WORK(dump_work, dump_work_fn);</div><div class='del'>-</div><div class='del'>-static void schedule_process_dump(void)</div><div class='del'>-{</div><div class='del'>-	schedule_work(&amp;dump_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * New dump available notification</div><div class='del'>- *</div><div class='del'>- * Once we get notification, we add sysfs entries for it.</div><div class='del'>- * We only fetch the dump on demand, and create sysfs asynchronously.</div><div class='del'>- */</div><div class='del'>-static int dump_event(struct notifier_block *nb,</div><div class='del'>-		      unsigned long events, void *change)</div><div class='del'>-{</div><div class='del'>-	if (events &amp; OPAL_EVENT_DUMP_AVAIL)</div><div class='del'>-		schedule_process_dump();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct notifier_block dump_nb = {</div><div class='del'>-	.notifier_call  = dump_event,</div><div class='del'>-	.next           = NULL,</div><div class='del'>-	.priority       = 0</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> void __init opal_platform_dump_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='add'>+	int dump_irq;</div><div class='ctx'> </div><div class='ctx'> 	/* ELOG not supported by firmware */</div><div class='ctx'> 	if (!opal_check_token(OPAL_DUMP_READ))</div><div class='hunk'>@@ -445,10 +414,19 @@ void __init opal_platform_dump_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = opal_notifier_register(&amp;dump_nb);</div><div class='add'>+	dump_irq = opal_event_request(ilog2(OPAL_EVENT_DUMP_AVAIL));</div><div class='add'>+	if (!dump_irq) {</div><div class='add'>+		pr_err("%s: Can't register OPAL event irq (%d)\n",</div><div class='add'>+		       __func__, dump_irq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = request_threaded_irq(dump_irq, NULL, process_dump,</div><div class='add'>+				IRQF_TRIGGER_HIGH | IRQF_ONESHOT,</div><div class='add'>+				"opal-dump", NULL);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		pr_warn("%s: Can't register OPAL event notifier (%d)\n",</div><div class='del'>-			__func__, rc);</div><div class='add'>+		pr_err("%s: Can't request OPAL event irq (%d)\n",</div><div class='add'>+		       __func__, rc);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c<br/>index 38ce757e5e2a..37f959bf392e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-elog.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-elog.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-elog.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-elog.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='hunk'>@@ -236,7 +237,7 @@ static struct elog_obj *create_elog_obj(uint64_t id, size_t size, uint64_t type)</div><div class='ctx'> 	return elog;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void elog_work_fn(struct work_struct *work)</div><div class='add'>+static irqreturn_t elog_event(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	__be64 size;</div><div class='ctx'> 	__be64 id;</div><div class='hunk'>@@ -250,7 +251,7 @@ static void elog_work_fn(struct work_struct *work)</div><div class='ctx'> 	rc = opal_get_elog_size(&amp;id, &amp;size, &amp;type);</div><div class='ctx'> 	if (rc != OPAL_SUCCESS) {</div><div class='ctx'> 		pr_err("ELOG: OPAL log info read failed\n");</div><div class='del'>-		return;</div><div class='add'>+		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	elog_size = be64_to_cpu(size);</div><div class='hunk'>@@ -269,31 +270,16 @@ static void elog_work_fn(struct work_struct *work)</div><div class='ctx'> 	 * entries.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (kset_find_obj(elog_kset, name))</div><div class='del'>-		return;</div><div class='add'>+		return IRQ_HANDLED;</div><div class='ctx'> </div><div class='ctx'> 	create_elog_obj(log_id, elog_size, elog_type);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DECLARE_WORK(elog_work, elog_work_fn);</div><div class='ctx'> </div><div class='del'>-static int elog_event(struct notifier_block *nb,</div><div class='del'>-				unsigned long events, void *change)</div><div class='del'>-{</div><div class='del'>-	/* check for error log event */</div><div class='del'>-	if (events &amp; OPAL_EVENT_ERROR_LOG_AVAIL)</div><div class='del'>-		schedule_work(&amp;elog_work);</div><div class='del'>-	return 0;</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct notifier_block elog_nb = {</div><div class='del'>-	.notifier_call  = elog_event,</div><div class='del'>-	.next           = NULL,</div><div class='del'>-	.priority       = 0</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int __init opal_elog_init(void)</div><div class='ctx'> {</div><div class='del'>-	int rc = 0;</div><div class='add'>+	int rc = 0, irq;</div><div class='ctx'> </div><div class='ctx'> 	/* ELOG not supported by firmware */</div><div class='ctx'> 	if (!opal_check_token(OPAL_ELOG_READ))</div><div class='hunk'>@@ -305,10 +291,18 @@ int __init opal_elog_init(void)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = opal_notifier_register(&amp;elog_nb);</div><div class='add'>+	irq = opal_event_request(ilog2(OPAL_EVENT_ERROR_LOG_AVAIL));</div><div class='add'>+	if (!irq) {</div><div class='add'>+		pr_err("%s: Can't register OPAL event irq (%d)\n",</div><div class='add'>+		       __func__, irq);</div><div class='add'>+		return irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = request_threaded_irq(irq, NULL, elog_event,</div><div class='add'>+			IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "opal-elog", NULL);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		pr_err("%s: Can't register OPAL event notifier (%d)\n",</div><div class='del'>-		__func__, rc);</div><div class='add'>+		pr_err("%s: Can't request OPAL event irq (%d)\n",</div><div class='add'>+		       __func__, rc);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-hmi.c b/arch/powerpc/platforms/powernv/opal-hmi.c<br/>index b322bfb51343..a8f49d380449 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-hmi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-hmi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-hmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-hmi.c</a></div><div class='hunk'>@@ -170,7 +170,7 @@ static struct notifier_block opal_hmi_handler_nb = {</div><div class='ctx'> 	.priority	= 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init opal_hmi_handler_init(void)</div><div class='add'>+int __init opal_hmi_handler_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -186,4 +186,3 @@ static int __init opal_hmi_handler_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-machine_subsys_initcall(powernv, opal_hmi_handler_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-irqchip.c b/arch/powerpc/platforms/powernv/opal-irqchip.c<br/>new file mode 100644<br/>index 000000000000..e2e7d75f52f3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-irqchip.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></div><div class='hunk'>@@ -0,0 +1,253 @@</div><div class='add'>+/*</div><div class='add'>+ * This file implements an irqchip for OPAL events. Whenever there is</div><div class='add'>+ * an interrupt that is handled by OPAL we get passed a list of events</div><div class='add'>+ * that Linux needs to do something about. These basically look like</div><div class='add'>+ * interrupts to Linux so we implement an irqchip to handle them.</div><div class='add'>+ *</div><div class='add'>+ * Copyright Alistair Popple, IBM Corporation 2014.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute  it and/or modify it</div><div class='add'>+ * under  the terms of  the GNU General  Public License as published by the</div><div class='add'>+ * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/kthread.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/irq_work.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/opal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "powernv.h"</div><div class='add'>+</div><div class='add'>+/* Maximum number of events supported by OPAL firmware */</div><div class='add'>+#define MAX_NUM_EVENTS 64</div><div class='add'>+</div><div class='add'>+struct opal_event_irqchip {</div><div class='add'>+	struct irq_chip irqchip;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	unsigned long mask;</div><div class='add'>+};</div><div class='add'>+static struct opal_event_irqchip opal_event_irqchip;</div><div class='add'>+</div><div class='add'>+static unsigned int opal_irq_count;</div><div class='add'>+static unsigned int *opal_irqs;</div><div class='add'>+</div><div class='add'>+static void opal_handle_irq_work(struct irq_work *work);</div><div class='add'>+static __be64 last_outstanding_events;</div><div class='add'>+static struct irq_work opal_event_irq_work = {</div><div class='add'>+	.func = opal_handle_irq_work,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void opal_event_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	clear_bit(d-&gt;hwirq, &amp;opal_event_irqchip.mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void opal_event_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	set_bit(d-&gt;hwirq, &amp;opal_event_irqchip.mask);</div><div class='add'>+</div><div class='add'>+	opal_poll_events(&amp;last_outstanding_events);</div><div class='add'>+	if (last_outstanding_events &amp; opal_event_irqchip.mask)</div><div class='add'>+		/* Need to retrigger the interrupt */</div><div class='add'>+		irq_work_queue(&amp;opal_event_irq_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * For now we only support level triggered events. The irq</div><div class='add'>+	 * handler will be called continuously until the event has</div><div class='add'>+	 * been cleared in OPAL.</div><div class='add'>+	 */</div><div class='add'>+	if (flow_type != IRQ_TYPE_LEVEL_HIGH)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct opal_event_irqchip opal_event_irqchip = {</div><div class='add'>+	.irqchip = {</div><div class='add'>+		.name = "OPAL EVT",</div><div class='add'>+		.irq_mask = opal_event_mask,</div><div class='add'>+		.irq_unmask = opal_event_unmask,</div><div class='add'>+		.irq_set_type = opal_event_set_type,</div><div class='add'>+	},</div><div class='add'>+	.mask = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int opal_event_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, &amp;opal_event_irqchip);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;opal_event_irqchip.irqchip,</div><div class='add'>+				handle_level_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void opal_handle_events(uint64_t events)</div><div class='add'>+{</div><div class='add'>+	int virq, hwirq = 0;</div><div class='add'>+	u64 mask = opal_event_irqchip.mask;</div><div class='add'>+</div><div class='add'>+	if (!in_irq() &amp;&amp; (events &amp; mask)) {</div><div class='add'>+		last_outstanding_events = events;</div><div class='add'>+		irq_work_queue(&amp;opal_event_irq_work);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (events &amp; mask) {</div><div class='add'>+		hwirq = fls64(events) - 1;</div><div class='add'>+		if (BIT_ULL(hwirq) &amp; mask) {</div><div class='add'>+			virq = irq_find_mapping(opal_event_irqchip.domain,</div><div class='add'>+						hwirq);</div><div class='add'>+			if (virq)</div><div class='add'>+				generic_handle_irq(virq);</div><div class='add'>+		}</div><div class='add'>+		events &amp;= ~BIT_ULL(hwirq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t opal_interrupt(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	__be64 events;</div><div class='add'>+</div><div class='add'>+	opal_handle_interrupt(virq_to_hw(irq), &amp;events);</div><div class='add'>+	opal_handle_events(be64_to_cpu(events));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void opal_handle_irq_work(struct irq_work *work)</div><div class='add'>+{</div><div class='add'>+	opal_handle_events(be64_to_cpu(last_outstanding_events));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_event_match(struct irq_domain *h, struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	return h-&gt;of_node == node;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_event_xlate(struct irq_domain *h, struct device_node *np,</div><div class='add'>+			   const u32 *intspec, unsigned int intsize,</div><div class='add'>+			   irq_hw_number_t *out_hwirq, unsigned int *out_flags)</div><div class='add'>+{</div><div class='add'>+	*out_hwirq = intspec[0];</div><div class='add'>+	*out_flags = IRQ_TYPE_LEVEL_HIGH;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops opal_event_domain_ops = {</div><div class='add'>+	.match	= opal_event_match,</div><div class='add'>+	.map	= opal_event_map,</div><div class='add'>+	.xlate	= opal_event_xlate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void opal_event_shutdown(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* First free interrupts, which will also mask them */</div><div class='add'>+	for (i = 0; i &lt; opal_irq_count; i++) {</div><div class='add'>+		if (opal_irqs[i])</div><div class='add'>+			free_irq(opal_irqs[i], NULL);</div><div class='add'>+		opal_irqs[i] = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init opal_event_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *dn, *opal_node;</div><div class='add'>+	const __be32 *irqs;</div><div class='add'>+	int i, irqlen, rc = 0;</div><div class='add'>+</div><div class='add'>+	opal_node = of_find_node_by_path("/ibm,opal");</div><div class='add'>+	if (!opal_node) {</div><div class='add'>+		pr_warn("opal: Node not found\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If dn is NULL it means the domain won't be linked to a DT</div><div class='add'>+	 * node so therefore irq_of_parse_and_map(...) wont work. But</div><div class='add'>+	 * that shouldn't be problem because if we're running a</div><div class='add'>+	 * version of skiboot that doesn't have the dn then the</div><div class='add'>+	 * devices won't have the correct properties and will have to</div><div class='add'>+	 * fall back to the legacy method (opal_event_request(...))</div><div class='add'>+	 * anyway. */</div><div class='add'>+	dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");</div><div class='add'>+	opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,</div><div class='add'>+				&amp;opal_event_domain_ops, &amp;opal_event_irqchip);</div><div class='add'>+	of_node_put(dn);</div><div class='add'>+	if (!opal_event_irqchip.domain) {</div><div class='add'>+		pr_warn("opal: Unable to create irq domain\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get interrupt property */</div><div class='add'>+	irqs = of_get_property(opal_node, "opal-interrupts", &amp;irqlen);</div><div class='add'>+	opal_irq_count = irqs ? (irqlen / 4) : 0;</div><div class='add'>+	pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count);</div><div class='add'>+</div><div class='add'>+	/* Install interrupt handlers */</div><div class='add'>+	opal_irqs = kcalloc(opal_irq_count, sizeof(*opal_irqs), GFP_KERNEL);</div><div class='add'>+	for (i = 0; irqs &amp;&amp; i &lt; opal_irq_count; i++, irqs++) {</div><div class='add'>+		unsigned int irq, virq;</div><div class='add'>+</div><div class='add'>+		/* Get hardware and virtual IRQ */</div><div class='add'>+		irq = be32_to_cpup(irqs);</div><div class='add'>+		virq = irq_create_mapping(NULL, irq);</div><div class='add'>+		if (virq == NO_IRQ) {</div><div class='add'>+			pr_warn("Failed to map irq 0x%x\n", irq);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Install interrupt handler */</div><div class='add'>+		rc = request_irq(virq, opal_interrupt, 0, "opal", NULL);</div><div class='add'>+		if (rc) {</div><div class='add'>+			irq_dispose_mapping(virq);</div><div class='add'>+			pr_warn("Error %d requesting irq %d (0x%x)\n",</div><div class='add'>+				 rc, virq, irq);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Cache IRQ */</div><div class='add'>+		opal_irqs[i] = virq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	of_node_put(opal_node);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+machine_arch_initcall(powernv, opal_event_init);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * opal_event_request(unsigned int opal_event_nr) - Request an event</div><div class='add'>+ * @opal_event_nr: the opal event number to request</div><div class='add'>+ *</div><div class='add'>+ * This routine can be used to find the linux virq number which can</div><div class='add'>+ * then be passed to request_irq to assign a handler for a particular</div><div class='add'>+ * opal event. This should only be used by legacy devices which don't</div><div class='add'>+ * have proper device tree bindings. Most devices should use</div><div class='add'>+ * irq_of_parse_and_map() instead.</div><div class='add'>+ */</div><div class='add'>+int opal_event_request(unsigned int opal_event_nr)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON_ONCE(!opal_event_irqchip.domain))</div><div class='add'>+		return NO_IRQ;</div><div class='add'>+</div><div class='add'>+	return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(opal_event_request);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-memory-errors.c b/arch/powerpc/platforms/powernv/opal-memory-errors.c<br/>index 43db2136dbff..00a29432be39 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-memory-errors.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-memory-errors.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-memory-errors.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-memory-errors.c</a></div><div class='hunk'>@@ -144,4 +144,4 @@ static int __init opal_mem_err_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-machine_subsys_initcall(powernv, opal_mem_err_init);</div><div class='add'>+machine_device_initcall(powernv, opal_mem_err_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-prd.c b/arch/powerpc/platforms/powernv/opal-prd.c<br/>new file mode 100644<br/>index 000000000000..4ece8e40dd54<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-prd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-prd.c</a></div><div class='hunk'>@@ -0,0 +1,448 @@</div><div class='add'>+/*</div><div class='add'>+ * OPAL Runtime Diagnostics interface driver</div><div class='add'>+ * Supported on POWERNV platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright IBM Corporation 2015</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "opal-prd: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/poll.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;asm/opal-prd.h&gt;</div><div class='add'>+#include &lt;asm/opal.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * The msg member must be at the end of the struct, as it's followed by the</div><div class='add'>+ * message data.</div><div class='add'>+ */</div><div class='add'>+struct opal_prd_msg_queue_item {</div><div class='add'>+	struct list_head		list;</div><div class='add'>+	struct opal_prd_msg_header	msg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct device_node *prd_node;</div><div class='add'>+static LIST_HEAD(opal_prd_msg_queue);</div><div class='add'>+static DEFINE_SPINLOCK(opal_prd_msg_queue_lock);</div><div class='add'>+static DECLARE_WAIT_QUEUE_HEAD(opal_prd_msg_wait);</div><div class='add'>+static atomic_t prd_usage;</div><div class='add'>+</div><div class='add'>+static bool opal_prd_range_is_valid(uint64_t addr, uint64_t size)</div><div class='add'>+{</div><div class='add'>+	struct device_node *parent, *node;</div><div class='add'>+	bool found;</div><div class='add'>+</div><div class='add'>+	if (addr + size &lt; addr)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	parent = of_find_node_by_path("/reserved-memory");</div><div class='add'>+	if (!parent)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	found = false;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(parent, node) {</div><div class='add'>+		uint64_t range_addr, range_size, range_end;</div><div class='add'>+		const __be32 *addrp;</div><div class='add'>+		const char *label;</div><div class='add'>+</div><div class='add'>+		addrp = of_get_address(node, 0, &amp;range_size, NULL);</div><div class='add'>+</div><div class='add'>+		range_addr = of_read_number(addrp, 2);</div><div class='add'>+		range_end = range_addr + range_size;</div><div class='add'>+</div><div class='add'>+		label = of_get_property(node, "ibm,prd-label", NULL);</div><div class='add'>+</div><div class='add'>+		/* PRD ranges need a label */</div><div class='add'>+		if (!label)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (range_end &lt;= range_addr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (addr &gt;= range_addr &amp;&amp; addr + size &lt;= range_end) {</div><div class='add'>+			found = true;</div><div class='add'>+			of_node_put(node);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(parent);</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_prd_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Prevent multiple (separate) processes from concurrent interactions</div><div class='add'>+	 * with the FW PRD channel</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_xchg(&amp;prd_usage, 1) == 1)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * opal_prd_mmap - maps firmware-provided ranges into userspace</div><div class='add'>+ * @file: file structure for the device</div><div class='add'>+ * @vma: VMA to map the registers into</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int opal_prd_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	size_t addr, size;</div><div class='add'>+	pgprot_t page_prot;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	pr_devel("opal_prd_mmap(0x%016lx, 0x%016lx, 0x%lx, 0x%lx)\n",</div><div class='add'>+			vma-&gt;vm_start, vma-&gt;vm_end, vma-&gt;vm_pgoff,</div><div class='add'>+			vma-&gt;vm_flags);</div><div class='add'>+</div><div class='add'>+	addr = vma-&gt;vm_pgoff &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	size = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='add'>+</div><div class='add'>+	/* ensure we're mapping within one of the allowable ranges */</div><div class='add'>+	if (!opal_prd_range_is_valid(addr, size))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	page_prot = phys_mem_access_prot(file, vma-&gt;vm_pgoff,</div><div class='add'>+					 size, vma-&gt;vm_page_prot);</div><div class='add'>+</div><div class='add'>+	rc = remap_pfn_range(vma, vma-&gt;vm_start, vma-&gt;vm_pgoff, size,</div><div class='add'>+				page_prot);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool opal_msg_queue_empty(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+	ret = list_empty(&amp;opal_prd_msg_queue);</div><div class='add'>+	spin_unlock_irqrestore(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int opal_prd_poll(struct file *file,</div><div class='add'>+		struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	poll_wait(file, &amp;opal_prd_msg_wait, wait);</div><div class='add'>+</div><div class='add'>+	if (!opal_msg_queue_empty())</div><div class='add'>+		return POLLIN | POLLRDNORM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t opal_prd_read(struct file *file, char __user *buf,</div><div class='add'>+		size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct opal_prd_msg_queue_item *item;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	ssize_t size, err;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* we need at least a header's worth of data */</div><div class='add'>+	if (count &lt; sizeof(item-&gt;msg))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (*ppos)</div><div class='add'>+		return -ESPIPE;</div><div class='add'>+</div><div class='add'>+	item = NULL;</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+		if (!list_empty(&amp;opal_prd_msg_queue)) {</div><div class='add'>+			item = list_first_entry(&amp;opal_prd_msg_queue,</div><div class='add'>+					struct opal_prd_msg_queue_item, list);</div><div class='add'>+			list_del(&amp;item-&gt;list);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (item)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (file-&gt;f_flags &amp; O_NONBLOCK)</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+</div><div class='add'>+		rc = wait_event_interruptible(opal_prd_msg_wait,</div><div class='add'>+				!opal_msg_queue_empty());</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EINTR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = be16_to_cpu(item-&gt;msg.size);</div><div class='add'>+	if (size &gt; count) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_requeue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = copy_to_user(buf, &amp;item-&gt;msg, size);</div><div class='add'>+	if (rc) {</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_requeue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(item);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+</div><div class='add'>+err_requeue:</div><div class='add'>+	/* eep! re-queue at the head of the list */</div><div class='add'>+	spin_lock_irqsave(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+	list_add(&amp;item-&gt;list, &amp;opal_prd_msg_queue);</div><div class='add'>+	spin_unlock_irqrestore(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t opal_prd_write(struct file *file, const char __user *buf,</div><div class='add'>+		size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct opal_prd_msg_header hdr;</div><div class='add'>+	ssize_t size;</div><div class='add'>+	void *msg;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	size = sizeof(hdr);</div><div class='add'>+</div><div class='add'>+	if (count &lt; size)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* grab the header */</div><div class='add'>+	rc = copy_from_user(&amp;hdr, buf, sizeof(hdr));</div><div class='add'>+	if (rc)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	size = be16_to_cpu(hdr.size);</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rc = copy_from_user(msg, buf, size);</div><div class='add'>+	if (rc) {</div><div class='add'>+		size = -EFAULT;</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = opal_prd_msg(msg);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pr_warn("write: opal_prd_msg returned %d\n", rc);</div><div class='add'>+		size = -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	kfree(msg);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_prd_release(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct opal_prd_msg_header msg;</div><div class='add'>+</div><div class='add'>+	msg.size = cpu_to_be16(sizeof(msg));</div><div class='add'>+	msg.type = OPAL_PRD_MSG_TYPE_FINI;</div><div class='add'>+</div><div class='add'>+	opal_prd_msg((struct opal_prd_msg *)&amp;msg);</div><div class='add'>+</div><div class='add'>+	atomic_xchg(&amp;prd_usage, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long opal_prd_ioctl(struct file *file, unsigned int cmd,</div><div class='add'>+		unsigned long param)</div><div class='add'>+{</div><div class='add'>+	struct opal_prd_info info;</div><div class='add'>+	struct opal_prd_scom scom;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case OPAL_PRD_GET_INFO:</div><div class='add'>+		memset(&amp;info, 0, sizeof(info));</div><div class='add'>+		info.version = OPAL_PRD_KERNEL_VERSION;</div><div class='add'>+		rc = copy_to_user((void __user *)param, &amp;info, sizeof(info));</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OPAL_PRD_SCOM_READ:</div><div class='add'>+		rc = copy_from_user(&amp;scom, (void __user *)param, sizeof(scom));</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		scom.rc = opal_xscom_read(scom.chip, scom.addr,</div><div class='add'>+				(__be64 *)&amp;scom.data);</div><div class='add'>+		scom.data = be64_to_cpu(scom.data);</div><div class='add'>+		pr_devel("ioctl SCOM_READ: chip %llx addr %016llx data %016llx rc %lld\n",</div><div class='add'>+				scom.chip, scom.addr, scom.data, scom.rc);</div><div class='add'>+</div><div class='add'>+		rc = copy_to_user((void __user *)param, &amp;scom, sizeof(scom));</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OPAL_PRD_SCOM_WRITE:</div><div class='add'>+		rc = copy_from_user(&amp;scom, (void __user *)param, sizeof(scom));</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		scom.rc = opal_xscom_write(scom.chip, scom.addr, scom.data);</div><div class='add'>+		pr_devel("ioctl SCOM_WRITE: chip %llx addr %016llx data %016llx rc %lld\n",</div><div class='add'>+				scom.chip, scom.addr, scom.data, scom.rc);</div><div class='add'>+</div><div class='add'>+		rc = copy_to_user((void __user *)param, &amp;scom, sizeof(scom));</div><div class='add'>+		if (rc)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations opal_prd_fops = {</div><div class='add'>+	.open		= opal_prd_open,</div><div class='add'>+	.mmap		= opal_prd_mmap,</div><div class='add'>+	.poll		= opal_prd_poll,</div><div class='add'>+	.read		= opal_prd_read,</div><div class='add'>+	.write		= opal_prd_write,</div><div class='add'>+	.unlocked_ioctl	= opal_prd_ioctl,</div><div class='add'>+	.release	= opal_prd_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice opal_prd_dev = {</div><div class='add'>+	.minor		= MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name		= "opal-prd",</div><div class='add'>+	.fops		= &amp;opal_prd_fops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* opal interface */</div><div class='add'>+static int opal_prd_msg_notifier(struct notifier_block *nb,</div><div class='add'>+		unsigned long msg_type, void *_msg)</div><div class='add'>+{</div><div class='add'>+	struct opal_prd_msg_queue_item *item;</div><div class='add'>+	struct opal_prd_msg_header *hdr;</div><div class='add'>+	struct opal_msg *msg = _msg;</div><div class='add'>+	int msg_size, item_size;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (msg_type != OPAL_MSG_PRD)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Calculate total size of the message and item we need to store. The</div><div class='add'>+	 * 'size' field in the header includes the header itself. */</div><div class='add'>+	hdr = (void *)msg-&gt;params;</div><div class='add'>+	msg_size = be16_to_cpu(hdr-&gt;size);</div><div class='add'>+	item_size = msg_size + sizeof(*item) - sizeof(item-&gt;msg);</div><div class='add'>+</div><div class='add'>+	item = kzalloc(item_size, GFP_ATOMIC);</div><div class='add'>+	if (!item)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;item-&gt;msg, msg-&gt;params, msg_size);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+	list_add_tail(&amp;item-&gt;list, &amp;opal_prd_msg_queue);</div><div class='add'>+	spin_unlock_irqrestore(&amp;opal_prd_msg_queue_lock, flags);</div><div class='add'>+</div><div class='add'>+	wake_up_interruptible(&amp;opal_prd_msg_wait);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block opal_prd_event_nb = {</div><div class='add'>+	.notifier_call	= opal_prd_msg_notifier,</div><div class='add'>+	.next		= NULL,</div><div class='add'>+	.priority	= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int opal_prd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!pdev || !pdev-&gt;dev.of_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* We should only have one prd driver instance per machine; ensure</div><div class='add'>+	 * that we only get a valid probe on a single OF node.</div><div class='add'>+	 */</div><div class='add'>+	if (prd_node)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	prd_node = pdev-&gt;dev.of_node;</div><div class='add'>+</div><div class='add'>+	rc = opal_message_notifier_register(OPAL_MSG_PRD, &amp;opal_prd_event_nb);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pr_err("Couldn't register event notifier\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = misc_register(&amp;opal_prd_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pr_err("failed to register miscdev\n");</div><div class='add'>+		opal_message_notifier_unregister(OPAL_MSG_PRD,</div><div class='add'>+				&amp;opal_prd_event_nb);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int opal_prd_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	misc_deregister(&amp;opal_prd_dev);</div><div class='add'>+	opal_message_notifier_unregister(OPAL_MSG_PRD, &amp;opal_prd_event_nb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id opal_prd_match[] = {</div><div class='add'>+	{ .compatible = "ibm,opal-prd" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver opal_prd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "opal-prd",</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.of_match_table	= opal_prd_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	= opal_prd_probe,</div><div class='add'>+	.remove	= opal_prd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(opal_prd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, opal_prd_match);</div><div class='add'>+MODULE_DESCRIPTION("PowerNV OPAL runtime diagnostic driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-sensor.c b/arch/powerpc/platforms/powernv/opal-sensor.c<br/>index 655250499d18..a06059df9239 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-sensor.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-sensor.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-sensor.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-sensor.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_get_sensor_data);</div><div class='ctx'> </div><div class='del'>-static __init int opal_sensor_init(void)</div><div class='add'>+int __init opal_sensor_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	struct device_node *sensor;</div><div class='hunk'>@@ -93,4 +93,3 @@ static __init int opal_sensor_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='del'>-machine_subsys_initcall(powernv, opal_sensor_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c b/arch/powerpc/platforms/powernv/opal-sysparam.c<br/>index 9d1acf22a099..afe66c576a38 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-sysparam.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-sysparam.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-sysparam.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-sysparam.c</a></div><div class='hunk'>@@ -55,8 +55,10 @@ static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = opal_get_param(token, param_id, (u64)buffer, length);</div><div class='del'>-	if (ret != OPAL_ASYNC_COMPLETION)</div><div class='add'>+	if (ret != OPAL_ASYNC_COMPLETION) {</div><div class='add'>+		ret = opal_error_code(ret);</div><div class='ctx'> 		goto out_token;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = opal_async_wait_response(token, &amp;msg);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -65,7 +67,7 @@ static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer)</div><div class='ctx'> 		goto out_token;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = be64_to_cpu(msg.params[1]);</div><div class='add'>+	ret = opal_error_code(be64_to_cpu(msg.params[1]));</div><div class='ctx'> </div><div class='ctx'> out_token:</div><div class='ctx'> 	opal_async_release_token(token);</div><div class='hunk'>@@ -89,8 +91,10 @@ static int opal_set_sys_param(u32 param_id, u32 length, void *buffer)</div><div class='ctx'> </div><div class='ctx'> 	ret = opal_set_param(token, param_id, (u64)buffer, length);</div><div class='ctx'> </div><div class='del'>-	if (ret != OPAL_ASYNC_COMPLETION)</div><div class='add'>+	if (ret != OPAL_ASYNC_COMPLETION) {</div><div class='add'>+		ret = opal_error_code(ret);</div><div class='ctx'> 		goto out_token;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = opal_async_wait_response(token, &amp;msg);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -99,7 +103,7 @@ static int opal_set_sys_param(u32 param_id, u32 length, void *buffer)</div><div class='ctx'> 		goto out_token;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = be64_to_cpu(msg.params[1]);</div><div class='add'>+	ret = opal_error_code(be64_to_cpu(msg.params[1]));</div><div class='ctx'> </div><div class='ctx'> out_token:</div><div class='ctx'> 	opal_async_release_token(token);</div><div class='hunk'>@@ -162,10 +166,20 @@ void __init opal_sys_param_init(void)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Some systems do not use sysparams; this is not an error */</div><div class='add'>+	sysparam = of_find_node_by_path("/ibm,opal/sysparams");</div><div class='add'>+	if (!sysparam)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!of_device_is_compatible(sysparam, "ibm,opal-sysparams")) {</div><div class='add'>+		pr_err("SYSPARAM: Opal sysparam node not compatible\n");</div><div class='add'>+		goto out_node_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	sysparam_kobj = kobject_create_and_add("sysparams", opal_kobj);</div><div class='ctx'> 	if (!sysparam_kobj) {</div><div class='ctx'> 		pr_err("SYSPARAM: Failed to create sysparam kobject\n");</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_node_put;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate big enough buffer for any get/set transactions */</div><div class='hunk'>@@ -176,30 +190,19 @@ void __init opal_sys_param_init(void)</div><div class='ctx'> 		goto out_kobj_put;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sysparam = of_find_node_by_path("/ibm,opal/sysparams");</div><div class='del'>-	if (!sysparam) {</div><div class='del'>-		pr_err("SYSPARAM: Opal sysparam node not found\n");</div><div class='del'>-		goto out_param_buf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!of_device_is_compatible(sysparam, "ibm,opal-sysparams")) {</div><div class='del'>-		pr_err("SYSPARAM: Opal sysparam node not compatible\n");</div><div class='del'>-		goto out_node_put;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Number of parameters exposed through DT */</div><div class='ctx'> 	count = of_property_count_strings(sysparam, "param-name");</div><div class='ctx'> 	if (count &lt; 0) {</div><div class='ctx'> 		pr_err("SYSPARAM: No string found of property param-name in "</div><div class='ctx'> 				"the node %s\n", sysparam-&gt;name);</div><div class='del'>-		goto out_node_put;</div><div class='add'>+		goto out_param_buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	id = kzalloc(sizeof(*id) * count, GFP_KERNEL);</div><div class='ctx'> 	if (!id) {</div><div class='ctx'> 		pr_err("SYSPARAM: Failed to allocate memory to read parameter "</div><div class='ctx'> 				"id\n");</div><div class='del'>-		goto out_node_put;</div><div class='add'>+		goto out_param_buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	size = kzalloc(sizeof(*size) * count, GFP_KERNEL);</div><div class='hunk'>@@ -293,12 +296,12 @@ out_free_size:</div><div class='ctx'> 	kfree(size);</div><div class='ctx'> out_free_id:</div><div class='ctx'> 	kfree(id);</div><div class='del'>-out_node_put:</div><div class='del'>-	of_node_put(sysparam);</div><div class='ctx'> out_param_buf:</div><div class='ctx'> 	kfree(param_data_buf);</div><div class='ctx'> out_kobj_put:</div><div class='ctx'> 	kobject_put(sysparam_kobj);</div><div class='add'>+out_node_put:</div><div class='add'>+	of_node_put(sysparam);</div><div class='ctx'> out:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S<br/>index a7ade94cdf87..d6a7b8252e4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-wrappers.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal-wrappers.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal-wrappers.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal-wrappers.S</a></div><div class='hunk'>@@ -283,6 +283,7 @@ OPAL_CALL(opal_sensor_read,			OPAL_SENSOR_READ);</div><div class='ctx'> OPAL_CALL(opal_get_param,			OPAL_GET_PARAM);</div><div class='ctx'> OPAL_CALL(opal_set_param,			OPAL_SET_PARAM);</div><div class='ctx'> OPAL_CALL(opal_handle_hmi,			OPAL_HANDLE_HMI);</div><div class='add'>+OPAL_CALL(opal_config_cpu_idle_state,		OPAL_CONFIG_CPU_IDLE_STATE);</div><div class='ctx'> OPAL_CALL(opal_slw_set_reg,			OPAL_SLW_SET_REG);</div><div class='ctx'> OPAL_CALL(opal_register_dump_region,		OPAL_REGISTER_DUMP_REGION);</div><div class='ctx'> OPAL_CALL(opal_unregister_dump_region,		OPAL_UNREGISTER_DUMP_REGION);</div><div class='hunk'>@@ -295,3 +296,4 @@ OPAL_CALL(opal_i2c_request,			OPAL_I2C_REQUEST);</div><div class='ctx'> OPAL_CALL(opal_flash_read,			OPAL_FLASH_READ);</div><div class='ctx'> OPAL_CALL(opal_flash_write,			OPAL_FLASH_WRITE);</div><div class='ctx'> OPAL_CALL(opal_flash_erase,			OPAL_FLASH_ERASE);</div><div class='add'>+OPAL_CALL(opal_prd_msg,				OPAL_PRD_MSG);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c<br/>index 2241565b0739..f084afa0e3ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/opal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/opal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/opal.c</a></div><div class='hunk'>@@ -53,13 +53,7 @@ static int mc_recoverable_range_len;</div><div class='ctx'> </div><div class='ctx'> struct device_node *opal_node;</div><div class='ctx'> static DEFINE_SPINLOCK(opal_write_lock);</div><div class='del'>-static unsigned int *opal_irqs;</div><div class='del'>-static unsigned int opal_irq_count;</div><div class='del'>-static ATOMIC_NOTIFIER_HEAD(opal_notifier_head);</div><div class='ctx'> static struct atomic_notifier_head opal_msg_notifier_head[OPAL_MSG_TYPE_MAX];</div><div class='del'>-static DEFINE_SPINLOCK(opal_notifier_lock);</div><div class='del'>-static uint64_t last_notified_mask = 0x0ul;</div><div class='del'>-static atomic_t opal_notifier_hold = ATOMIC_INIT(0);</div><div class='ctx'> static uint32_t opal_heartbeat;</div><div class='ctx'> </div><div class='ctx'> static void opal_reinit_cores(void)</div><div class='hunk'>@@ -225,82 +219,6 @@ static int __init opal_register_exception_handlers(void)</div><div class='ctx'> }</div><div class='ctx'> machine_early_initcall(powernv, opal_register_exception_handlers);</div><div class='ctx'> </div><div class='del'>-int opal_notifier_register(struct notifier_block *nb)</div><div class='del'>-{</div><div class='del'>-	if (!nb) {</div><div class='del'>-		pr_warning("%s: Invalid argument (%p)\n",</div><div class='del'>-			   __func__, nb);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic_notifier_chain_register(&amp;opal_notifier_head, nb);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(opal_notifier_register);</div><div class='del'>-</div><div class='del'>-int opal_notifier_unregister(struct notifier_block *nb)</div><div class='del'>-{</div><div class='del'>-	if (!nb) {</div><div class='del'>-		pr_warning("%s: Invalid argument (%p)\n",</div><div class='del'>-			   __func__, nb);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic_notifier_chain_unregister(&amp;opal_notifier_head, nb);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(opal_notifier_unregister);</div><div class='del'>-</div><div class='del'>-static void opal_do_notifier(uint64_t events)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	uint64_t changed_mask;</div><div class='del'>-</div><div class='del'>-	if (atomic_read(&amp;opal_notifier_hold))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;opal_notifier_lock, flags);</div><div class='del'>-	changed_mask = last_notified_mask ^ events;</div><div class='del'>-	last_notified_mask = events;</div><div class='del'>-	spin_unlock_irqrestore(&amp;opal_notifier_lock, flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We feed with the event bits and changed bits for</div><div class='del'>-	 * enough information to the callback.</div><div class='del'>-	 */</div><div class='del'>-	atomic_notifier_call_chain(&amp;opal_notifier_head,</div><div class='del'>-				   events, (void *)changed_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void opal_notifier_update_evt(uint64_t evt_mask,</div><div class='del'>-			      uint64_t evt_val)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;opal_notifier_lock, flags);</div><div class='del'>-	last_notified_mask &amp;= ~evt_mask;</div><div class='del'>-	last_notified_mask |= evt_val;</div><div class='del'>-	spin_unlock_irqrestore(&amp;opal_notifier_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void opal_notifier_enable(void)</div><div class='del'>-{</div><div class='del'>-	int64_t rc;</div><div class='del'>-	__be64 evt = 0;</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;opal_notifier_hold, 0);</div><div class='del'>-</div><div class='del'>-	/* Process pending events */</div><div class='del'>-	rc = opal_poll_events(&amp;evt);</div><div class='del'>-	if (rc == OPAL_SUCCESS &amp;&amp; evt)</div><div class='del'>-		opal_do_notifier(be64_to_cpu(evt));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void opal_notifier_disable(void)</div><div class='del'>-{</div><div class='del'>-	atomic_set(&amp;opal_notifier_hold, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Opal message notifier based on message type. Allow subscribers to get</div><div class='ctx'>  * notified for specific messgae type.</div><div class='hunk'>@@ -317,6 +235,7 @@ int opal_message_notifier_register(enum opal_msg_type msg_type,</div><div class='ctx'> 	return atomic_notifier_chain_register(</div><div class='ctx'> 				&amp;opal_msg_notifier_head[msg_type], nb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(opal_message_notifier_register);</div><div class='ctx'> </div><div class='ctx'> int opal_message_notifier_unregister(enum opal_msg_type msg_type,</div><div class='ctx'> 				     struct notifier_block *nb)</div><div class='hunk'>@@ -324,6 +243,7 @@ int opal_message_notifier_unregister(enum opal_msg_type msg_type,</div><div class='ctx'> 	return atomic_notifier_chain_unregister(</div><div class='ctx'> 			&amp;opal_msg_notifier_head[msg_type], nb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(opal_message_notifier_unregister);</div><div class='ctx'> </div><div class='ctx'> static void opal_message_do_notify(uint32_t msg_type, void *msg)</div><div class='ctx'> {</div><div class='hunk'>@@ -364,36 +284,36 @@ static void opal_handle_message(void)</div><div class='ctx'> 	opal_message_do_notify(type, (void *)&amp;msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int opal_message_notify(struct notifier_block *nb,</div><div class='del'>-			  unsigned long events, void *change)</div><div class='add'>+static irqreturn_t opal_message_notify(int irq, void *data)</div><div class='ctx'> {</div><div class='del'>-	if (events &amp; OPAL_EVENT_MSG_PENDING)</div><div class='del'>-		opal_handle_message();</div><div class='del'>-	return 0;</div><div class='add'>+	opal_handle_message();</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct notifier_block opal_message_nb = {</div><div class='del'>-	.notifier_call	= opal_message_notify,</div><div class='del'>-	.next		= NULL,</div><div class='del'>-	.priority	= 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __init opal_message_init(void)</div><div class='ctx'> {</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret, i, irq;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; OPAL_MSG_TYPE_MAX; i++)</div><div class='ctx'> 		ATOMIC_INIT_NOTIFIER_HEAD(&amp;opal_msg_notifier_head[i]);</div><div class='ctx'> </div><div class='del'>-	ret = opal_notifier_register(&amp;opal_message_nb);</div><div class='add'>+	irq = opal_event_request(ilog2(OPAL_EVENT_MSG_PENDING));</div><div class='add'>+	if (!irq) {</div><div class='add'>+		pr_err("%s: Can't register OPAL event irq (%d)\n",</div><div class='add'>+		       __func__, irq);</div><div class='add'>+		return irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_irq(irq, opal_message_notify,</div><div class='add'>+			IRQ_TYPE_LEVEL_HIGH, "opal-msg", NULL);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("%s: Can't register OPAL event notifier (%d)\n",</div><div class='add'>+		pr_err("%s: Can't request OPAL event irq (%d)\n",</div><div class='ctx'> 		       __func__, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-machine_early_initcall(powernv, opal_message_init);</div><div class='ctx'> </div><div class='ctx'> int opal_get_chars(uint32_t vtermno, char *buf, int count)</div><div class='ctx'> {</div><div class='hunk'>@@ -573,7 +493,7 @@ int opal_handle_hmi_exception(struct pt_regs *regs)</div><div class='ctx'> 	local_paca-&gt;hmi_event_available = 0;</div><div class='ctx'> 	rc = opal_poll_events(&amp;evt);</div><div class='ctx'> 	if (rc == OPAL_SUCCESS &amp;&amp; evt)</div><div class='del'>-		opal_do_notifier(be64_to_cpu(evt));</div><div class='add'>+		opal_handle_events(be64_to_cpu(evt));</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -610,17 +530,6 @@ out:</div><div class='ctx'> 	return !!recover_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t opal_interrupt(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	__be64 events;</div><div class='del'>-</div><div class='del'>-	opal_handle_interrupt(virq_to_hw(irq), &amp;events);</div><div class='del'>-</div><div class='del'>-	opal_do_notifier(be64_to_cpu(events));</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int opal_sysfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	opal_kobj = kobject_create_and_add("opal", firmware_kobj);</div><div class='hunk'>@@ -693,21 +602,13 @@ static void __init opal_dump_region_init(void)</div><div class='ctx'> 			"rc = %d\n", rc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void opal_flash_init(struct device_node *opal_node)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	for_each_child_of_node(opal_node, np)</div><div class='del'>-		if (of_device_is_compatible(np, "ibm,opal-flash"))</div><div class='del'>-			of_platform_device_create(np, NULL, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void opal_ipmi_init(struct device_node *opal_node)</div><div class='add'>+static void opal_pdev_init(struct device_node *opal_node,</div><div class='add'>+		const char *compatible)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> </div><div class='ctx'> 	for_each_child_of_node(opal_node, np)</div><div class='del'>-		if (of_device_is_compatible(np, "ibm,opal-ipmi"))</div><div class='add'>+		if (of_device_is_compatible(np, compatible))</div><div class='ctx'> 			of_platform_device_create(np, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -719,52 +620,15 @@ static void opal_i2c_create_devs(void)</div><div class='ctx'> 		of_platform_device_create(np, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init opal_irq_init(struct device_node *dn)</div><div class='del'>-{</div><div class='del'>-	const __be32 *irqs;</div><div class='del'>-	int i, irqlen;</div><div class='del'>-</div><div class='del'>-	/* Get interrupt property */</div><div class='del'>-	irqs = of_get_property(opal_node, "opal-interrupts", &amp;irqlen);</div><div class='del'>-	opal_irq_count = irqs ? (irqlen / 4) : 0;</div><div class='del'>-	pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count);</div><div class='del'>-	if (!opal_irq_count)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Install interrupt handlers */</div><div class='del'>-	opal_irqs = kzalloc(opal_irq_count * sizeof(unsigned int), GFP_KERNEL);</div><div class='del'>-	for (i = 0; irqs &amp;&amp; i &lt; opal_irq_count; i++, irqs++) {</div><div class='del'>-		unsigned int irq, virq;</div><div class='del'>-		int rc;</div><div class='del'>-</div><div class='del'>-		/* Get hardware and virtual IRQ */</div><div class='del'>-		irq = be32_to_cpup(irqs);</div><div class='del'>-		virq = irq_create_mapping(NULL, irq);</div><div class='del'>-		if (virq == NO_IRQ) {</div><div class='del'>-			pr_warn("Failed to map irq 0x%x\n", irq);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Install interrupt handler */</div><div class='del'>-		rc = request_irq(virq, opal_interrupt, 0, "opal", NULL);</div><div class='del'>-		if (rc) {</div><div class='del'>-			irq_dispose_mapping(virq);</div><div class='del'>-			pr_warn("Error %d requesting irq %d (0x%x)\n",</div><div class='del'>-				 rc, virq, irq);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Cache IRQ */</div><div class='del'>-		opal_irqs[i] = virq;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int kopald(void *unused)</div><div class='ctx'> {</div><div class='add'>+	__be64 events;</div><div class='add'>+</div><div class='ctx'> 	set_freezable();</div><div class='ctx'> 	do {</div><div class='ctx'> 		try_to_freeze();</div><div class='del'>-		opal_poll_events(NULL);</div><div class='add'>+		opal_poll_events(&amp;events);</div><div class='add'>+		opal_handle_events(be64_to_cpu(events));</div><div class='ctx'> 		msleep_interruptible(opal_heartbeat);</div><div class='ctx'> 	} while (!kthread_should_stop());</div><div class='ctx'> </div><div class='hunk'>@@ -807,15 +671,24 @@ static int __init opal_init(void)</div><div class='ctx'> 		of_node_put(consoles);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Initialise OPAL messaging system */</div><div class='add'>+	opal_message_init();</div><div class='add'>+</div><div class='add'>+	/* Initialise OPAL asynchronous completion interface */</div><div class='add'>+	opal_async_comp_init();</div><div class='add'>+</div><div class='add'>+	/* Initialise OPAL sensor interface */</div><div class='add'>+	opal_sensor_init();</div><div class='add'>+</div><div class='add'>+	/* Initialise OPAL hypervisor maintainence interrupt handling */</div><div class='add'>+	opal_hmi_handler_init();</div><div class='add'>+</div><div class='ctx'> 	/* Create i2c platform devices */</div><div class='ctx'> 	opal_i2c_create_devs();</div><div class='ctx'> </div><div class='ctx'> 	/* Setup a heatbeat thread if requested by OPAL */</div><div class='ctx'> 	opal_init_heartbeat();</div><div class='ctx'> </div><div class='del'>-	/* Find all OPAL interrupts and request them */</div><div class='del'>-	opal_irq_init(opal_node);</div><div class='del'>-</div><div class='ctx'> 	/* Create "opal" kobject under /sys/firmware */</div><div class='ctx'> 	rc = opal_sysfs_init();</div><div class='ctx'> 	if (rc == 0) {</div><div class='hunk'>@@ -835,10 +708,10 @@ static int __init opal_init(void)</div><div class='ctx'> 		opal_msglog_init();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize OPAL IPMI backend */</div><div class='del'>-	opal_ipmi_init(opal_node);</div><div class='del'>-</div><div class='del'>-	opal_flash_init(opal_node);</div><div class='add'>+	/* Initialize platform devices: IPMI backend, PRD &amp; flash interface */</div><div class='add'>+	opal_pdev_init(opal_node, "ibm,opal-ipmi");</div><div class='add'>+	opal_pdev_init(opal_node, "ibm,opal-flash");</div><div class='add'>+	opal_pdev_init(opal_node, "ibm,opal-prd");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -846,15 +719,9 @@ machine_subsys_initcall(powernv, opal_init);</div><div class='ctx'> </div><div class='ctx'> void opal_shutdown(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='ctx'> 	long rc = OPAL_BUSY;</div><div class='ctx'> </div><div class='del'>-	/* First free interrupts, which will also mask them */</div><div class='del'>-	for (i = 0; i &lt; opal_irq_count; i++) {</div><div class='del'>-		if (opal_irqs[i])</div><div class='del'>-			free_irq(opal_irqs[i], NULL);</div><div class='del'>-		opal_irqs[i] = 0;</div><div class='del'>-	}</div><div class='add'>+	opal_event_shutdown();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Then sync with OPAL which ensure anything that can</div><div class='hunk'>@@ -876,11 +743,14 @@ void opal_shutdown(void)</div><div class='ctx'> </div><div class='ctx'> /* Export this so that test modules can use it */</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_invalid_call);</div><div class='add'>+EXPORT_SYMBOL_GPL(opal_xscom_read);</div><div class='add'>+EXPORT_SYMBOL_GPL(opal_xscom_write);</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_ipmi_send);</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_ipmi_recv);</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_flash_read);</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_flash_write);</div><div class='ctx'> EXPORT_SYMBOL_GPL(opal_flash_erase);</div><div class='add'>+EXPORT_SYMBOL_GPL(opal_prd_msg);</div><div class='ctx'> </div><div class='ctx'> /* Convert a region of vmalloc memory to an opal sg list */</div><div class='ctx'> struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,</div><div class='hunk'>@@ -954,6 +824,7 @@ int opal_error_code(int rc)</div><div class='ctx'> 	case OPAL_ASYNC_COMPLETION:	return -EINPROGRESS;</div><div class='ctx'> 	case OPAL_BUSY_EVENT:		return -EBUSY;</div><div class='ctx'> 	case OPAL_NO_MEM:		return -ENOMEM;</div><div class='add'>+	case OPAL_PERMISSION:		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	case OPAL_UNSUPPORTED:		return -EIO;</div><div class='ctx'> 	case OPAL_HARDWARE:		return -EIO;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c<br/>index f8bc950efcae..5738d315248b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci-ioda.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/pci-ioda.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci-ioda.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci-ioda.c</a></div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/rculist.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -38,8 +41,9 @@</div><div class='ctx'> #include &lt;asm/debug.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/pnv-pci.h&gt;</div><div class='add'>+#include &lt;asm/mmzone.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;misc/cxl.h&gt;</div><div class='add'>+#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "powernv.h"</div><div class='ctx'> #include "pci.h"</div><div class='hunk'>@@ -47,6 +51,11 @@</div><div class='ctx'> /* 256M DMA window, 4K TCE pages, 8 bytes TCE */</div><div class='ctx'> #define TCE32_TABLE_SIZE	((0x10000000 / 0x1000) * 8)</div><div class='ctx'> </div><div class='add'>+#define POWERNV_IOMMU_DEFAULT_LEVELS	1</div><div class='add'>+#define POWERNV_IOMMU_MAX_LEVELS	5</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl);</div><div class='add'>+</div><div class='ctx'> static void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,</div><div class='ctx'> 			    const char *fmt, ...)</div><div class='ctx'> {</div><div class='hunk'>@@ -1086,10 +1095,6 @@ static void pnv_ioda_setup_bus_PE(struct pci_bus *bus, int all)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pe-&gt;tce32_table = kzalloc_node(sizeof(struct iommu_table),</div><div class='del'>-			GFP_KERNEL, hose-&gt;node);</div><div class='del'>-	pe-&gt;tce32_table-&gt;data = pe;</div><div class='del'>-</div><div class='ctx'> 	/* Associate it with all child devices */</div><div class='ctx'> 	pnv_ioda_setup_same_PE(bus, pe);</div><div class='ctx'> </div><div class='hunk'>@@ -1283,36 +1288,27 @@ m64_failed:</div><div class='ctx'> 	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,</div><div class='add'>+		int num);</div><div class='add'>+static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);</div><div class='add'>+</div><div class='ctx'> static void pnv_pci_ioda2_release_dma_pe(struct pci_dev *dev, struct pnv_ioda_pe *pe)</div><div class='ctx'> {</div><div class='del'>-	struct pci_bus        *bus;</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	struct pnv_phb        *phb;</div><div class='ctx'> 	struct iommu_table    *tbl;</div><div class='del'>-	unsigned long         addr;</div><div class='ctx'> 	int64_t               rc;</div><div class='ctx'> </div><div class='del'>-	bus = dev-&gt;bus;</div><div class='del'>-	hose = pci_bus_to_host(bus);</div><div class='del'>-	phb = hose-&gt;private_data;</div><div class='del'>-	tbl = pe-&gt;tce32_table;</div><div class='del'>-	addr = tbl-&gt;it_base;</div><div class='del'>-</div><div class='del'>-	opal_pci_map_pe_dma_window(phb-&gt;opal_id, pe-&gt;pe_number,</div><div class='del'>-				   pe-&gt;pe_number &lt;&lt; 1, 1, __pa(addr),</div><div class='del'>-				   0, 0x1000);</div><div class='del'>-</div><div class='del'>-	rc = opal_pci_map_pe_dma_window_real(pe-&gt;phb-&gt;opal_id,</div><div class='del'>-				        pe-&gt;pe_number,</div><div class='del'>-				        (pe-&gt;pe_number &lt;&lt; 1) + 1,</div><div class='del'>-				        pe-&gt;tce_bypass_base,</div><div class='del'>-				        0);</div><div class='add'>+	tbl = pe-&gt;table_group.tables[0];</div><div class='add'>+	rc = pnv_pci_ioda2_unset_window(&amp;pe-&gt;table_group, 0);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		pe_warn(pe, "OPAL error %ld release DMA window\n", rc);</div><div class='ctx'> </div><div class='add'>+	pnv_pci_ioda2_set_bypass(pe, false);</div><div class='add'>+	if (pe-&gt;table_group.group) {</div><div class='add'>+		iommu_group_put(pe-&gt;table_group.group);</div><div class='add'>+		BUG_ON(pe-&gt;table_group.group);</div><div class='add'>+	}</div><div class='add'>+	pnv_pci_ioda2_table_free_pages(tbl);</div><div class='ctx'> 	iommu_free_table(tbl, of_node_full_name(dev-&gt;dev.of_node));</div><div class='del'>-	free_pages(addr, get_order(TCE32_TABLE_SIZE));</div><div class='del'>-	pe-&gt;tce32_table = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pnv_ioda_release_vf_PE(struct pci_dev *pdev, u16 num_vfs)</div><div class='hunk'>@@ -1460,10 +1456,6 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pe-&gt;tce32_table = kzalloc_node(sizeof(struct iommu_table),</div><div class='del'>-				GFP_KERNEL, hose-&gt;node);</div><div class='del'>-		pe-&gt;tce32_table-&gt;data = pe;</div><div class='del'>-</div><div class='ctx'> 		/* Put PE to the list */</div><div class='ctx'> 		mutex_lock(&amp;phb-&gt;ioda.pe_list_mutex);</div><div class='ctx'> 		list_add_tail(&amp;pe-&gt;list, &amp;phb-&gt;ioda.pe_list);</div><div class='hunk'>@@ -1598,12 +1590,19 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev</div><div class='ctx'> </div><div class='ctx'> 	pe = &amp;phb-&gt;ioda.pe_array[pdn-&gt;pe_number];</div><div class='ctx'> 	WARN_ON(get_dma_ops(&amp;pdev-&gt;dev) != &amp;dma_iommu_ops);</div><div class='del'>-	set_iommu_table_base_and_group(&amp;pdev-&gt;dev, pe-&gt;tce32_table);</div><div class='add'>+	set_iommu_table_base(&amp;pdev-&gt;dev, pe-&gt;table_group.tables[0]);</div><div class='add'>+	/*</div><div class='add'>+	 * Note: iommu_add_device() will fail here as</div><div class='add'>+	 * for physical PE: the device is already added by now;</div><div class='add'>+	 * for virtual PE: sysfs entries are not ready yet and</div><div class='add'>+	 * tce_iommu_bus_notifier will add the device to a group later.</div><div class='add'>+	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,</div><div class='del'>-				     struct pci_dev *pdev, u64 dma_mask)</div><div class='add'>+static int pnv_pci_ioda_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)</div><div class='ctx'> {</div><div class='add'>+	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='add'>+	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='ctx'> 	struct pci_dn *pdn = pci_get_pdn(pdev);</div><div class='ctx'> 	struct pnv_ioda_pe *pe;</div><div class='ctx'> 	uint64_t top;</div><div class='hunk'>@@ -1625,7 +1624,7 @@ static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "Using 32-bit DMA via iommu\n");</div><div class='ctx'> 		set_dma_ops(&amp;pdev-&gt;dev, &amp;dma_iommu_ops);</div><div class='del'>-		set_iommu_table_base(&amp;pdev-&gt;dev, pe-&gt;tce32_table);</div><div class='add'>+		set_iommu_table_base(&amp;pdev-&gt;dev, pe-&gt;table_group.tables[0]);</div><div class='ctx'> 	}</div><div class='ctx'> 	*pdev-&gt;dev.dma_mask = dma_mask;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1654,36 +1653,36 @@ static u64 pnv_pci_ioda_dma_get_required_mask(struct pnv_phb *phb,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,</div><div class='del'>-				   struct pci_bus *bus,</div><div class='del'>-				   bool add_to_iommu_group)</div><div class='add'>+				   struct pci_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *dev;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(dev, &amp;bus-&gt;devices, bus_list) {</div><div class='del'>-		if (add_to_iommu_group)</div><div class='del'>-			set_iommu_table_base_and_group(&amp;dev-&gt;dev,</div><div class='del'>-						       pe-&gt;tce32_table);</div><div class='del'>-		else</div><div class='del'>-			set_iommu_table_base(&amp;dev-&gt;dev, pe-&gt;tce32_table);</div><div class='add'>+		set_iommu_table_base(&amp;dev-&gt;dev, pe-&gt;table_group.tables[0]);</div><div class='add'>+		iommu_add_device(&amp;dev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-		if (dev-&gt;subordinate)</div><div class='del'>-			pnv_ioda_setup_bus_dma(pe, dev-&gt;subordinate,</div><div class='del'>-					       add_to_iommu_group);</div><div class='add'>+		if ((pe-&gt;flags &amp; PNV_IODA_PE_BUS_ALL) &amp;&amp; dev-&gt;subordinate)</div><div class='add'>+			pnv_ioda_setup_bus_dma(pe, dev-&gt;subordinate);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda1_tce_invalidate(struct pnv_ioda_pe *pe,</div><div class='del'>-					 struct iommu_table *tbl,</div><div class='del'>-					 __be64 *startp, __be64 *endp, bool rm)</div><div class='add'>+static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,</div><div class='add'>+		unsigned long index, unsigned long npages, bool rm)</div><div class='ctx'> {</div><div class='add'>+	struct iommu_table_group_link *tgl = list_first_entry_or_null(</div><div class='add'>+			&amp;tbl-&gt;it_group_list, struct iommu_table_group_link,</div><div class='add'>+			next);</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(tgl-&gt;table_group,</div><div class='add'>+			struct pnv_ioda_pe, table_group);</div><div class='ctx'> 	__be64 __iomem *invalidate = rm ?</div><div class='del'>-		(__be64 __iomem *)pe-&gt;tce_inval_reg_phys :</div><div class='del'>-		(__be64 __iomem *)tbl-&gt;it_index;</div><div class='add'>+		(__be64 __iomem *)pe-&gt;phb-&gt;ioda.tce_inval_reg_phys :</div><div class='add'>+		pe-&gt;phb-&gt;ioda.tce_inval_reg;</div><div class='ctx'> 	unsigned long start, end, inc;</div><div class='ctx'> 	const unsigned shift = tbl-&gt;it_page_shift;</div><div class='ctx'> </div><div class='del'>-	start = __pa(startp);</div><div class='del'>-	end = __pa(endp);</div><div class='add'>+	start = __pa(((__be64 *)tbl-&gt;it_base) + index - tbl-&gt;it_offset);</div><div class='add'>+	end = __pa(((__be64 *)tbl-&gt;it_base) + index - tbl-&gt;it_offset +</div><div class='add'>+			npages - 1);</div><div class='ctx'> </div><div class='ctx'> 	/* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */</div><div class='ctx'> 	if (tbl-&gt;it_busno) {</div><div class='hunk'>@@ -1719,26 +1718,79 @@ static void pnv_pci_ioda1_tce_invalidate(struct pnv_ioda_pe *pe,</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,</div><div class='del'>-					 struct iommu_table *tbl,</div><div class='del'>-					 __be64 *startp, __be64 *endp, bool rm)</div><div class='add'>+static int pnv_ioda1_tce_build(struct iommu_table *tbl, long index,</div><div class='add'>+		long npages, unsigned long uaddr,</div><div class='add'>+		enum dma_data_direction direction,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	int ret = pnv_tce_build(tbl, index, npages, uaddr, direction,</div><div class='add'>+			attrs);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (tbl-&gt;it_type &amp; TCE_PCI_SWINV_CREATE))</div><div class='add'>+		pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+static int pnv_ioda1_tce_xchg(struct iommu_table *tbl, long index,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction)</div><div class='add'>+{</div><div class='add'>+	long ret = pnv_tce_xchg(tbl, index, hpa, direction);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (tbl-&gt;it_type &amp;</div><div class='add'>+			(TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE)))</div><div class='add'>+		pnv_pci_ioda1_tce_invalidate(tbl, index, 1, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void pnv_ioda1_tce_free(struct iommu_table *tbl, long index,</div><div class='add'>+		long npages)</div><div class='add'>+{</div><div class='add'>+	pnv_tce_free(tbl, index, npages);</div><div class='add'>+</div><div class='add'>+	if (tbl-&gt;it_type &amp; TCE_PCI_SWINV_FREE)</div><div class='add'>+		pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct iommu_table_ops pnv_ioda1_iommu_ops = {</div><div class='add'>+	.set = pnv_ioda1_tce_build,</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	.exchange = pnv_ioda1_tce_xchg,</div><div class='add'>+#endif</div><div class='add'>+	.clear = pnv_ioda1_tce_free,</div><div class='add'>+	.get = pnv_tce_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_ioda_pe *pe)</div><div class='add'>+{</div><div class='add'>+	/* 01xb - invalidate TCEs that match the specified PE# */</div><div class='add'>+	unsigned long val = (0x4ull &lt;&lt; 60) | (pe-&gt;pe_number &amp; 0xFF);</div><div class='add'>+	struct pnv_phb *phb = pe-&gt;phb;</div><div class='add'>+</div><div class='add'>+	if (!phb-&gt;ioda.tce_inval_reg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mb(); /* Ensure above stores are visible */</div><div class='add'>+	__raw_writeq(cpu_to_be64(val), phb-&gt;ioda.tce_inval_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_do_tce_invalidate(unsigned pe_number, bool rm,</div><div class='add'>+		__be64 __iomem *invalidate, unsigned shift,</div><div class='add'>+		unsigned long index, unsigned long npages)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start, end, inc;</div><div class='del'>-	__be64 __iomem *invalidate = rm ?</div><div class='del'>-		(__be64 __iomem *)pe-&gt;tce_inval_reg_phys :</div><div class='del'>-		(__be64 __iomem *)tbl-&gt;it_index;</div><div class='del'>-	const unsigned shift = tbl-&gt;it_page_shift;</div><div class='ctx'> </div><div class='ctx'> 	/* We'll invalidate DMA address in PE scope */</div><div class='ctx'> 	start = 0x2ull &lt;&lt; 60;</div><div class='del'>-	start |= (pe-&gt;pe_number &amp; 0xFF);</div><div class='add'>+	start |= (pe_number &amp; 0xFF);</div><div class='ctx'> 	end = start;</div><div class='ctx'> </div><div class='ctx'> 	/* Figure out the start, end and step */</div><div class='del'>-	inc = tbl-&gt;it_offset + (((u64)startp - tbl-&gt;it_base) / sizeof(u64));</div><div class='del'>-	start |= (inc &lt;&lt; shift);</div><div class='del'>-	inc = tbl-&gt;it_offset + (((u64)endp - tbl-&gt;it_base) / sizeof(u64));</div><div class='del'>-	end |= (inc &lt;&lt; shift);</div><div class='add'>+	start |= (index &lt;&lt; shift);</div><div class='add'>+	end |= ((index + npages - 1) &lt;&lt; shift);</div><div class='ctx'> 	inc = (0x1ull &lt;&lt; shift);</div><div class='ctx'> 	mb();</div><div class='ctx'> </div><div class='hunk'>@@ -1751,25 +1803,83 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,</div><div class='del'>-				 __be64 *startp, __be64 *endp, bool rm)</div><div class='add'>+static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,</div><div class='add'>+		unsigned long index, unsigned long npages, bool rm)</div><div class='ctx'> {</div><div class='del'>-	struct pnv_ioda_pe *pe = tbl-&gt;data;</div><div class='del'>-	struct pnv_phb *phb = pe-&gt;phb;</div><div class='add'>+	struct iommu_table_group_link *tgl;</div><div class='ctx'> </div><div class='del'>-	if (phb-&gt;type == PNV_PHB_IODA1)</div><div class='del'>-		pnv_pci_ioda1_tce_invalidate(pe, tbl, startp, endp, rm);</div><div class='del'>-	else</div><div class='del'>-		pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp, rm);</div><div class='add'>+	list_for_each_entry_rcu(tgl, &amp;tbl-&gt;it_group_list, next) {</div><div class='add'>+		struct pnv_ioda_pe *pe = container_of(tgl-&gt;table_group,</div><div class='add'>+				struct pnv_ioda_pe, table_group);</div><div class='add'>+		__be64 __iomem *invalidate = rm ?</div><div class='add'>+			(__be64 __iomem *)pe-&gt;phb-&gt;ioda.tce_inval_reg_phys :</div><div class='add'>+			pe-&gt;phb-&gt;ioda.tce_inval_reg;</div><div class='add'>+</div><div class='add'>+		pnv_pci_ioda2_do_tce_invalidate(pe-&gt;pe_number, rm,</div><div class='add'>+			invalidate, tbl-&gt;it_page_shift,</div><div class='add'>+			index, npages);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pnv_ioda2_tce_build(struct iommu_table *tbl, long index,</div><div class='add'>+		long npages, unsigned long uaddr,</div><div class='add'>+		enum dma_data_direction direction,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	int ret = pnv_tce_build(tbl, index, npages, uaddr, direction,</div><div class='add'>+			attrs);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (tbl-&gt;it_type &amp; TCE_PCI_SWINV_CREATE))</div><div class='add'>+		pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+static int pnv_ioda2_tce_xchg(struct iommu_table *tbl, long index,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction)</div><div class='add'>+{</div><div class='add'>+	long ret = pnv_tce_xchg(tbl, index, hpa, direction);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (tbl-&gt;it_type &amp;</div><div class='add'>+			(TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE)))</div><div class='add'>+		pnv_pci_ioda2_tce_invalidate(tbl, index, 1, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void pnv_ioda2_tce_free(struct iommu_table *tbl, long index,</div><div class='add'>+		long npages)</div><div class='add'>+{</div><div class='add'>+	pnv_tce_free(tbl, index, npages);</div><div class='add'>+</div><div class='add'>+	if (tbl-&gt;it_type &amp; TCE_PCI_SWINV_FREE)</div><div class='add'>+		pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_ioda2_table_free(struct iommu_table *tbl)</div><div class='add'>+{</div><div class='add'>+	pnv_pci_ioda2_table_free_pages(tbl);</div><div class='add'>+	iommu_free_table(tbl, "pnv");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_ops pnv_ioda2_iommu_ops = {</div><div class='add'>+	.set = pnv_ioda2_tce_build,</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	.exchange = pnv_ioda2_tce_xchg,</div><div class='add'>+#endif</div><div class='add'>+	.clear = pnv_ioda2_tce_free,</div><div class='add'>+	.get = pnv_tce_get,</div><div class='add'>+	.free = pnv_ioda2_table_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,</div><div class='ctx'> 				      struct pnv_ioda_pe *pe, unsigned int base,</div><div class='ctx'> 				      unsigned int segs)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	struct page *tce_mem = NULL;</div><div class='del'>-	const __be64 *swinvp;</div><div class='ctx'> 	struct iommu_table *tbl;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int64_t rc;</div><div class='hunk'>@@ -1783,6 +1893,11 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,</div><div class='ctx'> 	if (WARN_ON(pe-&gt;tce32_seg &gt;= 0))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	tbl = pnv_pci_table_alloc(phb-&gt;hose-&gt;node);</div><div class='add'>+	iommu_register_group(&amp;pe-&gt;table_group, phb-&gt;hose-&gt;global_number,</div><div class='add'>+			pe-&gt;pe_number);</div><div class='add'>+	pnv_pci_link_table_and_group(phb-&gt;hose-&gt;node, 0, tbl, &amp;pe-&gt;table_group);</div><div class='add'>+</div><div class='ctx'> 	/* Grab a 32-bit TCE table */</div><div class='ctx'> 	pe-&gt;tce32_seg = base;</div><div class='ctx'> 	pe_info(pe, " Setting up 32-bit TCE table at %08x..%08x\n",</div><div class='hunk'>@@ -1817,39 +1932,30 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup linux iommu table */</div><div class='del'>-	tbl = pe-&gt;tce32_table;</div><div class='ctx'> 	pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,</div><div class='ctx'> 				  base &lt;&lt; 28, IOMMU_PAGE_SHIFT_4K);</div><div class='ctx'> </div><div class='ctx'> 	/* OPAL variant of P7IOC SW invalidated TCEs */</div><div class='del'>-	swinvp = of_get_property(phb-&gt;hose-&gt;dn, "ibm,opal-tce-kill", NULL);</div><div class='del'>-	if (swinvp) {</div><div class='del'>-		/* We need a couple more fields -- an address and a data</div><div class='del'>-		 * to or.  Since the bus is only printed out on table free</div><div class='del'>-		 * errors, and on the first pass the data will be a relative</div><div class='del'>-		 * bus number, print that out instead.</div><div class='del'>-		 */</div><div class='del'>-		pe-&gt;tce_inval_reg_phys = be64_to_cpup(swinvp);</div><div class='del'>-		tbl-&gt;it_index = (unsigned long)ioremap(pe-&gt;tce_inval_reg_phys,</div><div class='del'>-				8);</div><div class='add'>+	if (phb-&gt;ioda.tce_inval_reg)</div><div class='ctx'> 		tbl-&gt;it_type |= (TCE_PCI_SWINV_CREATE |</div><div class='ctx'> 				 TCE_PCI_SWINV_FREE   |</div><div class='ctx'> 				 TCE_PCI_SWINV_PAIR);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	tbl-&gt;it_ops = &amp;pnv_ioda1_iommu_ops;</div><div class='add'>+	pe-&gt;table_group.tce32_start = tbl-&gt;it_offset &lt;&lt; tbl-&gt;it_page_shift;</div><div class='add'>+	pe-&gt;table_group.tce32_size = tbl-&gt;it_size &lt;&lt; tbl-&gt;it_page_shift;</div><div class='ctx'> 	iommu_init_table(tbl, phb-&gt;hose-&gt;node);</div><div class='ctx'> </div><div class='ctx'> 	if (pe-&gt;flags &amp; PNV_IODA_PE_DEV) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-		set_iommu_table_base_and_group(&amp;pe-&gt;pdev-&gt;dev, tbl);</div><div class='del'>-	} else if (pe-&gt;flags &amp; (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-		pnv_ioda_setup_bus_dma(pe, pe-&gt;pbus, true);</div><div class='del'>-	} else if (pe-&gt;flags &amp; PNV_IODA_PE_VF) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-	}</div><div class='add'>+		/*</div><div class='add'>+		 * Setting table base here only for carrying iommu_group</div><div class='add'>+		 * further down to let iommu_add_device() do the job.</div><div class='add'>+		 * pnv_pci_ioda_dma_dev_setup will override it later anyway.</div><div class='add'>+		 */</div><div class='add'>+		set_iommu_table_base(&amp;pe-&gt;pdev-&gt;dev, tbl);</div><div class='add'>+		iommu_add_device(&amp;pe-&gt;pdev-&gt;dev);</div><div class='add'>+	} else if (pe-&gt;flags &amp; (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))</div><div class='add'>+		pnv_ioda_setup_bus_dma(pe, pe-&gt;pbus);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'>  fail:</div><div class='hunk'>@@ -1858,11 +1964,53 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,</div><div class='ctx'> 		pe-&gt;tce32_seg = -1;</div><div class='ctx'> 	if (tce_mem)</div><div class='ctx'> 		__free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs));</div><div class='add'>+	if (tbl) {</div><div class='add'>+		pnv_pci_unlink_table_and_group(tbl, &amp;pe-&gt;table_group);</div><div class='add'>+		iommu_free_table(tbl, "pnv");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)</div><div class='add'>+static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group,</div><div class='add'>+		int num, struct iommu_table *tbl)</div><div class='add'>+{</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,</div><div class='add'>+			table_group);</div><div class='add'>+	struct pnv_phb *phb = pe-&gt;phb;</div><div class='add'>+	int64_t rc;</div><div class='add'>+	const unsigned long size = tbl-&gt;it_indirect_levels ?</div><div class='add'>+			tbl-&gt;it_level_size : tbl-&gt;it_size;</div><div class='add'>+	const __u64 start_addr = tbl-&gt;it_offset &lt;&lt; tbl-&gt;it_page_shift;</div><div class='add'>+	const __u64 win_size = tbl-&gt;it_size &lt;&lt; tbl-&gt;it_page_shift;</div><div class='add'>+</div><div class='add'>+	pe_info(pe, "Setting up window#%d %llx..%llx pg=%x\n", num,</div><div class='add'>+			start_addr, start_addr + win_size - 1,</div><div class='add'>+			IOMMU_PAGE_SIZE(tbl));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Map TCE table through TVT. The TVE index is the PE number</div><div class='add'>+	 * shifted by 1 bit for 32-bits DMA space.</div><div class='add'>+	 */</div><div class='add'>+	rc = opal_pci_map_pe_dma_window(phb-&gt;opal_id,</div><div class='add'>+			pe-&gt;pe_number,</div><div class='add'>+			(pe-&gt;pe_number &lt;&lt; 1) + num,</div><div class='add'>+			tbl-&gt;it_indirect_levels + 1,</div><div class='add'>+			__pa(tbl-&gt;it_base),</div><div class='add'>+			size &lt;&lt; 3,</div><div class='add'>+			IOMMU_PAGE_SIZE(tbl));</div><div class='add'>+	if (rc) {</div><div class='add'>+		pe_err(pe, "Failed to configure TCE table, err %ld\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pnv_pci_link_table_and_group(phb-&gt;hose-&gt;node, num,</div><div class='add'>+			tbl, &amp;pe-&gt;table_group);</div><div class='add'>+	pnv_pci_ioda2_tce_invalidate_entire(pe);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable)</div><div class='ctx'> {</div><div class='del'>-	struct pnv_ioda_pe *pe = tbl-&gt;data;</div><div class='ctx'> 	uint16_t window_id = (pe-&gt;pe_number &lt;&lt; 1 ) + 1;</div><div class='ctx'> 	int64_t rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1882,17 +2030,6 @@ static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)</div><div class='ctx'> 						     window_id,</div><div class='ctx'> 						     pe-&gt;tce_bypass_base,</div><div class='ctx'> 						     0);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * EEH needs the mapping between IOMMU table and group</div><div class='del'>-		 * of those VFIO/KVM pass-through devices. We can postpone</div><div class='del'>-		 * resetting DMA ops until the DMA mask is configured in</div><div class='del'>-		 * host side.</div><div class='del'>-		 */</div><div class='del'>-		if (pe-&gt;pdev)</div><div class='del'>-			set_iommu_table_base(&amp;pe-&gt;pdev-&gt;dev, tbl);</div><div class='del'>-		else</div><div class='del'>-			pnv_ioda_setup_bus_dma(pe, pe-&gt;pbus, false);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		pe_err(pe, "OPAL error %lld configuring bypass window\n", rc);</div><div class='hunk'>@@ -1900,106 +2037,363 @@ static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)</div><div class='ctx'> 		pe-&gt;tce_bypass_enabled = enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda2_setup_bypass_pe(struct pnv_phb *phb,</div><div class='del'>-					  struct pnv_ioda_pe *pe)</div><div class='add'>+static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,</div><div class='add'>+		__u32 page_shift, __u64 window_size, __u32 levels,</div><div class='add'>+		struct iommu_table *tbl);</div><div class='add'>+</div><div class='add'>+static long pnv_pci_ioda2_create_table(struct iommu_table_group *table_group,</div><div class='add'>+		int num, __u32 page_shift, __u64 window_size, __u32 levels,</div><div class='add'>+		struct iommu_table **ptbl)</div><div class='ctx'> {</div><div class='del'>-	/* TVE #1 is selected by PCI address bit 59 */</div><div class='del'>-	pe-&gt;tce_bypass_base = 1ull &lt;&lt; 59;</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,</div><div class='add'>+			table_group);</div><div class='add'>+	int nid = pe-&gt;phb-&gt;hose-&gt;node;</div><div class='add'>+	__u64 bus_offset = num ? pe-&gt;tce_bypass_base : table_group-&gt;tce32_start;</div><div class='add'>+	long ret;</div><div class='add'>+	struct iommu_table *tbl;</div><div class='ctx'> </div><div class='del'>-	/* Install set_bypass callback for VFIO */</div><div class='del'>-	pe-&gt;tce32_table-&gt;set_bypass = pnv_pci_ioda2_set_bypass;</div><div class='add'>+	tbl = pnv_pci_table_alloc(nid);</div><div class='add'>+	if (!tbl)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Enable bypass by default */</div><div class='del'>-	pnv_pci_ioda2_set_bypass(pe-&gt;tce32_table, true);</div><div class='add'>+	ret = pnv_pci_ioda2_table_alloc_pages(nid,</div><div class='add'>+			bus_offset, page_shift, window_size,</div><div class='add'>+			levels, tbl);</div><div class='add'>+	if (ret) {</div><div class='add'>+		iommu_free_table(tbl, "pnv");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tbl-&gt;it_ops = &amp;pnv_ioda2_iommu_ops;</div><div class='add'>+	if (pe-&gt;phb-&gt;ioda.tce_inval_reg)</div><div class='add'>+		tbl-&gt;it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE);</div><div class='add'>+</div><div class='add'>+	*ptbl = tbl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,</div><div class='del'>-				       struct pnv_ioda_pe *pe)</div><div class='add'>+static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)</div><div class='add'>+{</div><div class='add'>+	struct iommu_table *tbl = NULL;</div><div class='add'>+	long rc;</div><div class='add'>+</div><div class='add'>+	rc = pnv_pci_ioda2_create_table(&amp;pe-&gt;table_group, 0,</div><div class='add'>+			IOMMU_PAGE_SHIFT_4K,</div><div class='add'>+			pe-&gt;table_group.tce32_size,</div><div class='add'>+			POWERNV_IOMMU_DEFAULT_LEVELS, &amp;tbl);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pe_err(pe, "Failed to create 32-bit TCE table, err %ld",</div><div class='add'>+				rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iommu_init_table(tbl, pe-&gt;phb-&gt;hose-&gt;node);</div><div class='add'>+</div><div class='add'>+	rc = pnv_pci_ioda2_set_window(&amp;pe-&gt;table_group, 0, tbl);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pe_err(pe, "Failed to configure 32-bit TCE table, err %ld\n",</div><div class='add'>+				rc);</div><div class='add'>+		pnv_ioda2_table_free(tbl);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pnv_iommu_bypass_disabled)</div><div class='add'>+		pnv_pci_ioda2_set_bypass(pe, true);</div><div class='add'>+</div><div class='add'>+	/* OPAL variant of PHB3 invalidated TCEs */</div><div class='add'>+	if (pe-&gt;phb-&gt;ioda.tce_inval_reg)</div><div class='add'>+		tbl-&gt;it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Setting table base here only for carrying iommu_group</div><div class='add'>+	 * further down to let iommu_add_device() do the job.</div><div class='add'>+	 * pnv_pci_ioda_dma_dev_setup will override it later anyway.</div><div class='add'>+	 */</div><div class='add'>+	if (pe-&gt;flags &amp; PNV_IODA_PE_DEV)</div><div class='add'>+		set_iommu_table_base(&amp;pe-&gt;pdev-&gt;dev, tbl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_IOMMU_API) || defined(CONFIG_PCI_IOV)</div><div class='add'>+static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,</div><div class='add'>+		int num)</div><div class='add'>+{</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,</div><div class='add'>+			table_group);</div><div class='add'>+	struct pnv_phb *phb = pe-&gt;phb;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	pe_info(pe, "Removing DMA window #%d\n", num);</div><div class='add'>+</div><div class='add'>+	ret = opal_pci_map_pe_dma_window(phb-&gt;opal_id, pe-&gt;pe_number,</div><div class='add'>+			(pe-&gt;pe_number &lt;&lt; 1) + num,</div><div class='add'>+			0/* levels */, 0/* table address */,</div><div class='add'>+			0/* table size */, 0/* page size */);</div><div class='add'>+	if (ret)</div><div class='add'>+		pe_warn(pe, "Unmapping failed, ret = %ld\n", ret);</div><div class='add'>+	else</div><div class='add'>+		pnv_pci_ioda2_tce_invalidate_entire(pe);</div><div class='add'>+</div><div class='add'>+	pnv_pci_unlink_table_and_group(table_group-&gt;tables[num], table_group);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+static unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,</div><div class='add'>+		__u64 window_size, __u32 levels)</div><div class='add'>+{</div><div class='add'>+	unsigned long bytes = 0;</div><div class='add'>+	const unsigned window_shift = ilog2(window_size);</div><div class='add'>+	unsigned entries_shift = window_shift - page_shift;</div><div class='add'>+	unsigned table_shift = entries_shift + 3;</div><div class='add'>+	unsigned long tce_table_size = max(0x1000UL, 1UL &lt;&lt; table_shift);</div><div class='add'>+	unsigned long direct_table_size;</div><div class='add'>+</div><div class='add'>+	if (!levels || (levels &gt; POWERNV_IOMMU_MAX_LEVELS) ||</div><div class='add'>+			(window_size &gt; memory_hotplug_max()) ||</div><div class='add'>+			!is_power_of_2(window_size))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Calculate a direct table size from window_size and levels */</div><div class='add'>+	entries_shift = (entries_shift + levels - 1) / levels;</div><div class='add'>+	table_shift = entries_shift + 3;</div><div class='add'>+	table_shift = max_t(unsigned, table_shift, PAGE_SHIFT);</div><div class='add'>+	direct_table_size =  1UL &lt;&lt; table_shift;</div><div class='add'>+</div><div class='add'>+	for ( ; levels; --levels) {</div><div class='add'>+		bytes += _ALIGN_UP(tce_table_size, direct_table_size);</div><div class='add'>+</div><div class='add'>+		tce_table_size /= direct_table_size;</div><div class='add'>+		tce_table_size &lt;&lt;= 3;</div><div class='add'>+		tce_table_size = _ALIGN_UP(tce_table_size, direct_table_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_ioda2_take_ownership(struct iommu_table_group *table_group)</div><div class='add'>+{</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,</div><div class='add'>+						table_group);</div><div class='add'>+	/* Store @tbl as pnv_pci_ioda2_unset_window() resets it */</div><div class='add'>+	struct iommu_table *tbl = pe-&gt;table_group.tables[0];</div><div class='add'>+</div><div class='add'>+	pnv_pci_ioda2_set_bypass(pe, false);</div><div class='add'>+	pnv_pci_ioda2_unset_window(&amp;pe-&gt;table_group, 0);</div><div class='add'>+	pnv_ioda2_table_free(tbl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_ioda2_release_ownership(struct iommu_table_group *table_group)</div><div class='add'>+{</div><div class='add'>+	struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,</div><div class='add'>+						table_group);</div><div class='add'>+</div><div class='add'>+	pnv_pci_ioda2_setup_default_config(pe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct iommu_table_group_ops pnv_pci_ioda2_ops = {</div><div class='add'>+	.get_table_size = pnv_pci_ioda2_get_table_size,</div><div class='add'>+	.create_table = pnv_pci_ioda2_create_table,</div><div class='add'>+	.set_window = pnv_pci_ioda2_set_window,</div><div class='add'>+	.unset_window = pnv_pci_ioda2_unset_window,</div><div class='add'>+	.take_ownership = pnv_ioda2_take_ownership,</div><div class='add'>+	.release_ownership = pnv_ioda2_release_ownership,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda_setup_opal_tce_kill(struct pnv_phb *phb)</div><div class='ctx'> {</div><div class='del'>-	struct page *tce_mem = NULL;</div><div class='del'>-	void *addr;</div><div class='ctx'> 	const __be64 *swinvp;</div><div class='del'>-	struct iommu_table *tbl;</div><div class='del'>-	unsigned int tce_table_size, end;</div><div class='del'>-	int64_t rc;</div><div class='ctx'> </div><div class='del'>-	/* We shouldn't already have a 32-bit DMA associated */</div><div class='del'>-	if (WARN_ON(pe-&gt;tce32_seg &gt;= 0))</div><div class='add'>+	/* OPAL variant of PHB3 invalidated TCEs */</div><div class='add'>+	swinvp = of_get_property(phb-&gt;hose-&gt;dn, "ibm,opal-tce-kill", NULL);</div><div class='add'>+	if (!swinvp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* The PE will reserve all possible 32-bits space */</div><div class='del'>-	pe-&gt;tce32_seg = 0;</div><div class='del'>-	end = (1 &lt;&lt; ilog2(phb-&gt;ioda.m32_pci_base));</div><div class='del'>-	tce_table_size = (end / 0x1000) * 8;</div><div class='del'>-	pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n",</div><div class='del'>-		end);</div><div class='add'>+	phb-&gt;ioda.tce_inval_reg_phys = be64_to_cpup(swinvp);</div><div class='add'>+	phb-&gt;ioda.tce_inval_reg = ioremap(phb-&gt;ioda.tce_inval_reg_phys, 8);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Allocate TCE table */</div><div class='del'>-	tce_mem = alloc_pages_node(phb-&gt;hose-&gt;node, GFP_KERNEL,</div><div class='del'>-				   get_order(tce_table_size));</div><div class='add'>+static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift,</div><div class='add'>+		unsigned levels, unsigned long limit,</div><div class='add'>+		unsigned long *current_offset)</div><div class='add'>+{</div><div class='add'>+	struct page *tce_mem = NULL;</div><div class='add'>+	__be64 *addr, *tmp;</div><div class='add'>+	unsigned order = max_t(unsigned, shift, PAGE_SHIFT) - PAGE_SHIFT;</div><div class='add'>+	unsigned long allocated = 1UL &lt;&lt; (order + PAGE_SHIFT);</div><div class='add'>+	unsigned entries = 1UL &lt;&lt; (shift - 3);</div><div class='add'>+	long i;</div><div class='add'>+</div><div class='add'>+	tce_mem = alloc_pages_node(nid, GFP_KERNEL, order);</div><div class='ctx'> 	if (!tce_mem) {</div><div class='del'>-		pe_err(pe, "Failed to allocate a 32-bit TCE memory\n");</div><div class='del'>-		goto fail;</div><div class='add'>+		pr_err("Failed to allocate a TCE memory, order=%d\n", order);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	addr = page_address(tce_mem);</div><div class='del'>-	memset(addr, 0, tce_table_size);</div><div class='add'>+	memset(addr, 0, allocated);</div><div class='add'>+</div><div class='add'>+	--levels;</div><div class='add'>+	if (!levels) {</div><div class='add'>+		*current_offset += allocated;</div><div class='add'>+		return addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; entries; ++i) {</div><div class='add'>+		tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift,</div><div class='add'>+				levels, limit, current_offset);</div><div class='add'>+		if (!tmp)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		addr[i] = cpu_to_be64(__pa(tmp) |</div><div class='add'>+				TCE_PCI_READ | TCE_PCI_WRITE);</div><div class='add'>+</div><div class='add'>+		if (*current_offset &gt;= limit)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_table_do_free_pages(__be64 *addr,</div><div class='add'>+		unsigned long size, unsigned level);</div><div class='add'>+</div><div class='add'>+static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,</div><div class='add'>+		__u32 page_shift, __u64 window_size, __u32 levels,</div><div class='add'>+		struct iommu_table *tbl)</div><div class='add'>+{</div><div class='add'>+	void *addr;</div><div class='add'>+	unsigned long offset = 0, level_shift;</div><div class='add'>+	const unsigned window_shift = ilog2(window_size);</div><div class='add'>+	unsigned entries_shift = window_shift - page_shift;</div><div class='add'>+	unsigned table_shift = max_t(unsigned, entries_shift + 3, PAGE_SHIFT);</div><div class='add'>+	const unsigned long tce_table_size = 1UL &lt;&lt; table_shift;</div><div class='add'>+</div><div class='add'>+	if (!levels || (levels &gt; POWERNV_IOMMU_MAX_LEVELS))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((window_size &gt; memory_hotplug_max()) || !is_power_of_2(window_size))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Adjust direct table size from window_size and levels */</div><div class='add'>+	entries_shift = (entries_shift + levels - 1) / levels;</div><div class='add'>+	level_shift = entries_shift + 3;</div><div class='add'>+	level_shift = max_t(unsigned, level_shift, PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* Allocate TCE table */</div><div class='add'>+	addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,</div><div class='add'>+			levels, tce_table_size, &amp;offset);</div><div class='add'>+</div><div class='add'>+	/* addr==NULL means that the first level allocation failed */</div><div class='add'>+	if (!addr)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Map TCE table through TVT. The TVE index is the PE number</div><div class='del'>-	 * shifted by 1 bit for 32-bits DMA space.</div><div class='add'>+	 * First level was allocated but some lower level failed as</div><div class='add'>+	 * we did not allocate as much as we wanted,</div><div class='add'>+	 * release partially allocated table.</div><div class='ctx'> 	 */</div><div class='del'>-	rc = opal_pci_map_pe_dma_window(phb-&gt;opal_id, pe-&gt;pe_number,</div><div class='del'>-					pe-&gt;pe_number &lt;&lt; 1, 1, __pa(addr),</div><div class='del'>-					tce_table_size, 0x1000);</div><div class='del'>-	if (rc) {</div><div class='del'>-		pe_err(pe, "Failed to configure 32-bit TCE table,"</div><div class='del'>-		       " err %ld\n", rc);</div><div class='del'>-		goto fail;</div><div class='add'>+	if (offset &lt; tce_table_size) {</div><div class='add'>+		pnv_pci_ioda2_table_do_free_pages(addr,</div><div class='add'>+				1ULL &lt;&lt; (level_shift - 3), levels - 1);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup linux iommu table */</div><div class='del'>-	tbl = pe-&gt;tce32_table;</div><div class='del'>-	pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,</div><div class='del'>-			IOMMU_PAGE_SHIFT_4K);</div><div class='add'>+	pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, bus_offset,</div><div class='add'>+			page_shift);</div><div class='add'>+	tbl-&gt;it_level_size = 1ULL &lt;&lt; (level_shift - 3);</div><div class='add'>+	tbl-&gt;it_indirect_levels = levels - 1;</div><div class='add'>+	tbl-&gt;it_allocated_size = offset;</div><div class='ctx'> </div><div class='del'>-	/* OPAL variant of PHB3 invalidated TCEs */</div><div class='del'>-	swinvp = of_get_property(phb-&gt;hose-&gt;dn, "ibm,opal-tce-kill", NULL);</div><div class='del'>-	if (swinvp) {</div><div class='del'>-		/* We need a couple more fields -- an address and a data</div><div class='del'>-		 * to or.  Since the bus is only printed out on table free</div><div class='del'>-		 * errors, and on the first pass the data will be a relative</div><div class='del'>-		 * bus number, print that out instead.</div><div class='del'>-		 */</div><div class='del'>-		pe-&gt;tce_inval_reg_phys = be64_to_cpup(swinvp);</div><div class='del'>-		tbl-&gt;it_index = (unsigned long)ioremap(pe-&gt;tce_inval_reg_phys,</div><div class='del'>-				8);</div><div class='del'>-		tbl-&gt;it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE);</div><div class='add'>+	pr_devel("Created TCE table: ws=%08llx ts=%lx @%08llx\n",</div><div class='add'>+			window_size, tce_table_size, bus_offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_table_do_free_pages(__be64 *addr,</div><div class='add'>+		unsigned long size, unsigned level)</div><div class='add'>+{</div><div class='add'>+	const unsigned long addr_ul = (unsigned long) addr &amp;</div><div class='add'>+			~(TCE_PCI_READ | TCE_PCI_WRITE);</div><div class='add'>+</div><div class='add'>+	if (level) {</div><div class='add'>+		long i;</div><div class='add'>+		u64 *tmp = (u64 *) addr_ul;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; size; ++i) {</div><div class='add'>+			unsigned long hpa = be64_to_cpu(tmp[i]);</div><div class='add'>+</div><div class='add'>+			if (!(hpa &amp; (TCE_PCI_READ | TCE_PCI_WRITE)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			pnv_pci_ioda2_table_do_free_pages(__va(hpa), size,</div><div class='add'>+					level - 1);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	iommu_init_table(tbl, phb-&gt;hose-&gt;node);</div><div class='ctx'> </div><div class='del'>-	if (pe-&gt;flags &amp; PNV_IODA_PE_DEV) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-		set_iommu_table_base_and_group(&amp;pe-&gt;pdev-&gt;dev, tbl);</div><div class='del'>-	} else if (pe-&gt;flags &amp; (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-		pnv_ioda_setup_bus_dma(pe, pe-&gt;pbus, true);</div><div class='del'>-	} else if (pe-&gt;flags &amp; PNV_IODA_PE_VF) {</div><div class='del'>-		iommu_register_group(tbl, phb-&gt;hose-&gt;global_number,</div><div class='del'>-				     pe-&gt;pe_number);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Also create a bypass window */</div><div class='del'>-	if (!pnv_iommu_bypass_disabled)</div><div class='del'>-		pnv_pci_ioda2_setup_bypass_pe(phb, pe);</div><div class='add'>+	free_pages(addr_ul, get_order(size &lt;&lt; 3));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='del'>-fail:</div><div class='del'>-	if (pe-&gt;tce32_seg &gt;= 0)</div><div class='del'>-		pe-&gt;tce32_seg = -1;</div><div class='del'>-	if (tce_mem)</div><div class='del'>-		__free_pages(tce_mem, get_order(tce_table_size));</div><div class='add'>+static void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl)</div><div class='add'>+{</div><div class='add'>+	const unsigned long size = tbl-&gt;it_indirect_levels ?</div><div class='add'>+			tbl-&gt;it_level_size : tbl-&gt;it_size;</div><div class='add'>+</div><div class='add'>+	if (!tbl-&gt;it_size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pnv_pci_ioda2_table_do_free_pages((__be64 *)tbl-&gt;it_base, size,</div><div class='add'>+			tbl-&gt;it_indirect_levels);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,</div><div class='add'>+				       struct pnv_ioda_pe *pe)</div><div class='add'>+{</div><div class='add'>+	int64_t rc;</div><div class='add'>+</div><div class='add'>+	/* We shouldn't already have a 32-bit DMA associated */</div><div class='add'>+	if (WARN_ON(pe-&gt;tce32_seg &gt;= 0))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* TVE #1 is selected by PCI address bit 59 */</div><div class='add'>+	pe-&gt;tce_bypass_base = 1ull &lt;&lt; 59;</div><div class='add'>+</div><div class='add'>+	iommu_register_group(&amp;pe-&gt;table_group, phb-&gt;hose-&gt;global_number,</div><div class='add'>+			pe-&gt;pe_number);</div><div class='add'>+</div><div class='add'>+	/* The PE will reserve all possible 32-bits space */</div><div class='add'>+	pe-&gt;tce32_seg = 0;</div><div class='add'>+	pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n",</div><div class='add'>+		phb-&gt;ioda.m32_pci_base);</div><div class='add'>+</div><div class='add'>+	/* Setup linux iommu table */</div><div class='add'>+	pe-&gt;table_group.tce32_start = 0;</div><div class='add'>+	pe-&gt;table_group.tce32_size = phb-&gt;ioda.m32_pci_base;</div><div class='add'>+	pe-&gt;table_group.max_dynamic_windows_supported =</div><div class='add'>+			IOMMU_TABLE_GROUP_MAX_TABLES;</div><div class='add'>+	pe-&gt;table_group.max_levels = POWERNV_IOMMU_MAX_LEVELS;</div><div class='add'>+	pe-&gt;table_group.pgsizes = SZ_4K | SZ_64K | SZ_16M;</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	pe-&gt;table_group.ops = &amp;pnv_pci_ioda2_ops;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	rc = pnv_pci_ioda2_setup_default_config(pe);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (pe-&gt;tce32_seg &gt;= 0)</div><div class='add'>+			pe-&gt;tce32_seg = -1;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pe-&gt;flags &amp; PNV_IODA_PE_DEV)</div><div class='add'>+		iommu_add_device(&amp;pe-&gt;pdev-&gt;dev);</div><div class='add'>+	else if (pe-&gt;flags &amp; (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))</div><div class='add'>+		pnv_ioda_setup_bus_dma(pe, pe-&gt;pbus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pnv_ioda_setup_dma(struct pnv_phb *phb)</div><div class='hunk'>@@ -2024,6 +2418,8 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)</div><div class='ctx'> 	pr_info("PCI: %d PE# for a total weight of %d\n",</div><div class='ctx'> 		phb-&gt;ioda.dma_pe_count, phb-&gt;ioda.dma_weight);</div><div class='ctx'> </div><div class='add'>+	pnv_pci_ioda_setup_opal_tce_kill(phb);</div><div class='add'>+</div><div class='ctx'> 	/* Walk our PE list and configure their DMA segments, hand them</div><div class='ctx'> 	 * out one base segment plus any residual segments based on</div><div class='ctx'> 	 * weight</div><div class='hunk'>@@ -2642,12 +3038,27 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus,</div><div class='ctx'> 	return phb-&gt;ioda.pe_rmap[(bus-&gt;number &lt;&lt; 8) | devfn];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_ioda_shutdown(struct pnv_phb *phb)</div><div class='add'>+static void pnv_pci_ioda_shutdown(struct pci_controller *hose)</div><div class='ctx'> {</div><div class='add'>+	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='add'>+</div><div class='ctx'> 	opal_pci_reset(phb-&gt;opal_id, OPAL_RESET_PCI_IODA_TABLE,</div><div class='ctx'> 		       OPAL_ASSERT_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {</div><div class='add'>+       .dma_dev_setup = pnv_pci_dma_dev_setup,</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+       .setup_msi_irqs = pnv_setup_msi_irqs,</div><div class='add'>+       .teardown_msi_irqs = pnv_teardown_msi_irqs,</div><div class='add'>+#endif</div><div class='add'>+       .enable_device_hook = pnv_pci_enable_device_hook,</div><div class='add'>+       .window_alignment = pnv_pci_window_alignment,</div><div class='add'>+       .reset_secondary_bus = pnv_pci_reset_secondary_bus,</div><div class='add'>+       .dma_set_mask = pnv_pci_ioda_dma_set_mask,</div><div class='add'>+       .shutdown = pnv_pci_ioda_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init pnv_pci_init_ioda_phb(struct device_node *np,</div><div class='ctx'> 					 u64 hub_id, int ioda_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -2791,12 +3202,8 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,</div><div class='ctx'> </div><div class='ctx'> 	/* Setup TCEs */</div><div class='ctx'> 	phb-&gt;dma_dev_setup = pnv_pci_ioda_dma_dev_setup;</div><div class='del'>-	phb-&gt;dma_set_mask = pnv_pci_ioda_dma_set_mask;</div><div class='ctx'> 	phb-&gt;dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask;</div><div class='ctx'> </div><div class='del'>-	/* Setup shutdown function for kexec */</div><div class='del'>-	phb-&gt;shutdown = pnv_pci_ioda_shutdown;</div><div class='del'>-</div><div class='ctx'> 	/* Setup MSI support */</div><div class='ctx'> 	pnv_pci_init_ioda_msis(phb);</div><div class='ctx'> </div><div class='hunk'>@@ -2808,10 +3215,7 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,</div><div class='ctx'> 	 * the child P2P bridges) can form individual PE.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ppc_md.pcibios_fixup = pnv_pci_ioda_fixup;</div><div class='del'>-	pnv_pci_controller_ops.enable_device_hook = pnv_pci_enable_device_hook;</div><div class='del'>-	pnv_pci_controller_ops.window_alignment = pnv_pci_window_alignment;</div><div class='del'>-	pnv_pci_controller_ops.reset_secondary_bus = pnv_pci_reset_secondary_bus;</div><div class='del'>-	hose-&gt;controller_ops = pnv_pci_controller_ops;</div><div class='add'>+	hose-&gt;controller_ops = pnv_pci_ioda_controller_ops;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> 	ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_iov_resources;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c<br/>index 4729ca793813..f2bdfea3b68d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci-p5ioc2.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/pci-p5ioc2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci-p5ioc2.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci-p5ioc2.c</a></div><div class='hunk'>@@ -83,18 +83,42 @@ static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb)</div><div class='ctx'> static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb) { }</div><div class='ctx'> #endif /* CONFIG_PCI_MSI */</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_ops pnv_p5ioc2_iommu_ops = {</div><div class='add'>+	.set = pnv_tce_build,</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	.exchange = pnv_tce_xchg,</div><div class='add'>+#endif</div><div class='add'>+	.clear = pnv_tce_free,</div><div class='add'>+	.get = pnv_tce_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void pnv_pci_p5ioc2_dma_dev_setup(struct pnv_phb *phb,</div><div class='ctx'> 					 struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (phb-&gt;p5ioc2.iommu_table.it_map == NULL) {</div><div class='del'>-		iommu_init_table(&amp;phb-&gt;p5ioc2.iommu_table, phb-&gt;hose-&gt;node);</div><div class='del'>-		iommu_register_group(&amp;phb-&gt;p5ioc2.iommu_table,</div><div class='add'>+	struct iommu_table *tbl = phb-&gt;p5ioc2.table_group.tables[0];</div><div class='add'>+</div><div class='add'>+	if (!tbl-&gt;it_map) {</div><div class='add'>+		tbl-&gt;it_ops = &amp;pnv_p5ioc2_iommu_ops;</div><div class='add'>+		iommu_init_table(tbl, phb-&gt;hose-&gt;node);</div><div class='add'>+		iommu_register_group(&amp;phb-&gt;p5ioc2.table_group,</div><div class='ctx'> 				pci_domain_nr(phb-&gt;hose-&gt;bus), phb-&gt;opal_id);</div><div class='add'>+		INIT_LIST_HEAD_RCU(&amp;tbl-&gt;it_group_list);</div><div class='add'>+		pnv_pci_link_table_and_group(phb-&gt;hose-&gt;node, 0,</div><div class='add'>+				tbl, &amp;phb-&gt;p5ioc2.table_group);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	set_iommu_table_base_and_group(&amp;pdev-&gt;dev, &amp;phb-&gt;p5ioc2.iommu_table);</div><div class='add'>+	set_iommu_table_base(&amp;pdev-&gt;dev, tbl);</div><div class='add'>+	iommu_add_device(&amp;pdev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct pci_controller_ops pnv_pci_p5ioc2_controller_ops = {</div><div class='add'>+	.dma_dev_setup = pnv_pci_dma_dev_setup,</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+       .setup_msi_irqs = pnv_setup_msi_irqs,</div><div class='add'>+       .teardown_msi_irqs = pnv_teardown_msi_irqs,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,</div><div class='ctx'> 					   void *tce_mem, u64 tce_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -103,6 +127,8 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,</div><div class='ctx'> 	u64 phb_id;</div><div class='ctx'> 	int64_t rc;</div><div class='ctx'> 	static int primary = 1;</div><div class='add'>+	struct iommu_table_group *table_group;</div><div class='add'>+	struct iommu_table *tbl;</div><div class='ctx'> </div><div class='ctx'> 	pr_info(" Initializing p5ioc2 PHB %s\n", np-&gt;full_name);</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +159,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,</div><div class='ctx'> 	phb-&gt;hose-&gt;first_busno = 0;</div><div class='ctx'> 	phb-&gt;hose-&gt;last_busno = 0xff;</div><div class='ctx'> 	phb-&gt;hose-&gt;private_data = phb;</div><div class='del'>-	phb-&gt;hose-&gt;controller_ops = pnv_pci_controller_ops;</div><div class='add'>+	phb-&gt;hose-&gt;controller_ops = pnv_pci_p5ioc2_controller_ops;</div><div class='ctx'> 	phb-&gt;hub_id = hub_id;</div><div class='ctx'> 	phb-&gt;opal_id = phb_id;</div><div class='ctx'> 	phb-&gt;type = PNV_PHB_P5IOC2;</div><div class='hunk'>@@ -172,6 +198,15 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,</div><div class='ctx'> 	pnv_pci_setup_iommu_table(&amp;phb-&gt;p5ioc2.iommu_table,</div><div class='ctx'> 				  tce_mem, tce_size, 0,</div><div class='ctx'> 				  IOMMU_PAGE_SHIFT_4K);</div><div class='add'>+	/*</div><div class='add'>+	 * We do not allocate iommu_table as we do not support</div><div class='add'>+	 * hotplug or SRIOV on P5IOC2 and therefore iommu_free_table()</div><div class='add'>+	 * should not be called for phb-&gt;p5ioc2.table_group.tables[0] ever.</div><div class='add'>+	 */</div><div class='add'>+	tbl = phb-&gt;p5ioc2.table_group.tables[0] = &amp;phb-&gt;p5ioc2.iommu_table;</div><div class='add'>+	table_group = &amp;phb-&gt;p5ioc2.table_group;</div><div class='add'>+	table_group-&gt;tce32_start = tbl-&gt;it_offset &lt;&lt; tbl-&gt;it_page_shift;</div><div class='add'>+	table_group-&gt;tce32_size = tbl-&gt;it_size &lt;&lt; tbl-&gt;it_page_shift;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c<br/>index bca2aeb6e4b6..765d8ed558d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> //#define cfg_dbg(fmt...)	printk(fmt)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_MSI</div><div class='del'>-static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)</div><div class='add'>+int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='ctx'> 	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='hunk'>@@ -94,7 +94,7 @@ static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_teardown_msi_irqs(struct pci_dev *pdev)</div><div class='add'>+void pnv_teardown_msi_irqs(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='ctx'> 	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='hunk'>@@ -572,80 +572,152 @@ struct pci_ops pnv_pci_ops = {</div><div class='ctx'> 	.write = pnv_pci_write_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pnv_tce_build(struct iommu_table *tbl, long index, long npages,</div><div class='del'>-			 unsigned long uaddr, enum dma_data_direction direction,</div><div class='del'>-			 struct dma_attrs *attrs, bool rm)</div><div class='add'>+static __be64 *pnv_tce(struct iommu_table *tbl, long idx)</div><div class='ctx'> {</div><div class='del'>-	u64 proto_tce;</div><div class='del'>-	__be64 *tcep, *tces;</div><div class='del'>-	u64 rpn;</div><div class='del'>-</div><div class='del'>-	proto_tce = TCE_PCI_READ; // Read allowed</div><div class='add'>+	__be64 *tmp = ((__be64 *)tbl-&gt;it_base);</div><div class='add'>+	int  level = tbl-&gt;it_indirect_levels;</div><div class='add'>+	const long shift = ilog2(tbl-&gt;it_level_size);</div><div class='add'>+	unsigned long mask = (tbl-&gt;it_level_size - 1) &lt;&lt; (level * shift);</div><div class='add'>+</div><div class='add'>+	while (level) {</div><div class='add'>+		int n = (idx &amp; mask) &gt;&gt; (level * shift);</div><div class='add'>+		unsigned long tce = be64_to_cpu(tmp[n]);</div><div class='add'>+</div><div class='add'>+		tmp = __va(tce &amp; ~(TCE_PCI_READ | TCE_PCI_WRITE));</div><div class='add'>+		idx &amp;= ~mask;</div><div class='add'>+		mask &gt;&gt;= shift;</div><div class='add'>+		--level;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (direction != DMA_TO_DEVICE)</div><div class='del'>-		proto_tce |= TCE_PCI_WRITE;</div><div class='add'>+	return tmp + idx;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	tces = tcep = ((__be64 *)tbl-&gt;it_base) + index - tbl-&gt;it_offset;</div><div class='del'>-	rpn = __pa(uaddr) &gt;&gt; tbl-&gt;it_page_shift;</div><div class='add'>+int pnv_tce_build(struct iommu_table *tbl, long index, long npages,</div><div class='add'>+		unsigned long uaddr, enum dma_data_direction direction,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	u64 proto_tce = iommu_direction_to_tce_perm(direction);</div><div class='add'>+	u64 rpn = __pa(uaddr) &gt;&gt; tbl-&gt;it_page_shift;</div><div class='add'>+	long i;</div><div class='ctx'> </div><div class='del'>-	while (npages--)</div><div class='del'>-		*(tcep++) = cpu_to_be64(proto_tce |</div><div class='del'>-				(rpn++ &lt;&lt; tbl-&gt;it_page_shift));</div><div class='add'>+	for (i = 0; i &lt; npages; i++) {</div><div class='add'>+		unsigned long newtce = proto_tce |</div><div class='add'>+			((rpn + i) &lt;&lt; tbl-&gt;it_page_shift);</div><div class='add'>+		unsigned long idx = index - tbl-&gt;it_offset + i;</div><div class='ctx'> </div><div class='del'>-	/* Some implementations won't cache invalid TCEs and thus may not</div><div class='del'>-	 * need that flush. We'll probably turn it_type into a bit mask</div><div class='del'>-	 * of flags if that becomes the case</div><div class='del'>-	 */</div><div class='del'>-	if (tbl-&gt;it_type &amp; TCE_PCI_SWINV_CREATE)</div><div class='del'>-		pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1, rm);</div><div class='add'>+		*(pnv_tce(tbl, idx)) = cpu_to_be64(newtce);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pnv_tce_build_vm(struct iommu_table *tbl, long index, long npages,</div><div class='del'>-			    unsigned long uaddr,</div><div class='del'>-			    enum dma_data_direction direction,</div><div class='del'>-			    struct dma_attrs *attrs)</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+int pnv_tce_xchg(struct iommu_table *tbl, long index,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction)</div><div class='ctx'> {</div><div class='del'>-	return pnv_tce_build(tbl, index, npages, uaddr, direction, attrs,</div><div class='del'>-			false);</div><div class='add'>+	u64 proto_tce = iommu_direction_to_tce_perm(*direction);</div><div class='add'>+	unsigned long newtce = *hpa | proto_tce, oldtce;</div><div class='add'>+	unsigned long idx = index - tbl-&gt;it_offset;</div><div class='add'>+</div><div class='add'>+	BUG_ON(*hpa &amp; ~IOMMU_PAGE_MASK(tbl));</div><div class='add'>+</div><div class='add'>+	oldtce = xchg(pnv_tce(tbl, idx), cpu_to_be64(newtce));</div><div class='add'>+	*hpa = be64_to_cpu(oldtce) &amp; ~(TCE_PCI_READ | TCE_PCI_WRITE);</div><div class='add'>+	*direction = iommu_tce_direction(oldtce);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static void pnv_tce_free(struct iommu_table *tbl, long index, long npages,</div><div class='del'>-		bool rm)</div><div class='add'>+void pnv_tce_free(struct iommu_table *tbl, long index, long npages)</div><div class='ctx'> {</div><div class='del'>-	__be64 *tcep, *tces;</div><div class='add'>+	long i;</div><div class='ctx'> </div><div class='del'>-	tces = tcep = ((__be64 *)tbl-&gt;it_base) + index - tbl-&gt;it_offset;</div><div class='add'>+	for (i = 0; i &lt; npages; i++) {</div><div class='add'>+		unsigned long idx = index - tbl-&gt;it_offset + i;</div><div class='ctx'> </div><div class='del'>-	while (npages--)</div><div class='del'>-		*(tcep++) = cpu_to_be64(0);</div><div class='add'>+		*(pnv_tce(tbl, idx)) = cpu_to_be64(0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (tbl-&gt;it_type &amp; TCE_PCI_SWINV_FREE)</div><div class='del'>-		pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1, rm);</div><div class='add'>+unsigned long pnv_tce_get(struct iommu_table *tbl, long index)</div><div class='add'>+{</div><div class='add'>+	return *(pnv_tce(tbl, index - tbl-&gt;it_offset));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_tce_free_vm(struct iommu_table *tbl, long index, long npages)</div><div class='add'>+struct iommu_table *pnv_pci_table_alloc(int nid)</div><div class='ctx'> {</div><div class='del'>-	pnv_tce_free(tbl, index, npages, false);</div><div class='add'>+	struct iommu_table *tbl;</div><div class='add'>+</div><div class='add'>+	tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL, nid);</div><div class='add'>+	INIT_LIST_HEAD_RCU(&amp;tbl-&gt;it_group_list);</div><div class='add'>+</div><div class='add'>+	return tbl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long pnv_tce_get(struct iommu_table *tbl, long index)</div><div class='add'>+long pnv_pci_link_table_and_group(int node, int num,</div><div class='add'>+		struct iommu_table *tbl,</div><div class='add'>+		struct iommu_table_group *table_group)</div><div class='ctx'> {</div><div class='del'>-	return ((u64 *)tbl-&gt;it_base)[index - tbl-&gt;it_offset];</div><div class='add'>+	struct iommu_table_group_link *tgl = NULL;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!tbl || !table_group))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tgl = kzalloc_node(sizeof(struct iommu_table_group_link), GFP_KERNEL,</div><div class='add'>+			node);</div><div class='add'>+	if (!tgl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tgl-&gt;table_group = table_group;</div><div class='add'>+	list_add_rcu(&amp;tgl-&gt;next, &amp;tbl-&gt;it_group_list);</div><div class='add'>+</div><div class='add'>+	table_group-&gt;tables[num] = tbl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pnv_tce_build_rm(struct iommu_table *tbl, long index, long npages,</div><div class='del'>-			    unsigned long uaddr,</div><div class='del'>-			    enum dma_data_direction direction,</div><div class='del'>-			    struct dma_attrs *attrs)</div><div class='add'>+static void pnv_iommu_table_group_link_free(struct rcu_head *head)</div><div class='ctx'> {</div><div class='del'>-	return pnv_tce_build(tbl, index, npages, uaddr, direction, attrs, true);</div><div class='add'>+	struct iommu_table_group_link *tgl = container_of(head,</div><div class='add'>+			struct iommu_table_group_link, rcu);</div><div class='add'>+</div><div class='add'>+	kfree(tgl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_tce_free_rm(struct iommu_table *tbl, long index, long npages)</div><div class='add'>+void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,</div><div class='add'>+		struct iommu_table_group *table_group)</div><div class='ctx'> {</div><div class='del'>-	pnv_tce_free(tbl, index, npages, true);</div><div class='add'>+	long i;</div><div class='add'>+	bool found;</div><div class='add'>+	struct iommu_table_group_link *tgl;</div><div class='add'>+</div><div class='add'>+	if (!tbl || !table_group)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Remove link to a group from table's list of attached groups */</div><div class='add'>+	found = false;</div><div class='add'>+	list_for_each_entry_rcu(tgl, &amp;tbl-&gt;it_group_list, next) {</div><div class='add'>+		if (tgl-&gt;table_group == table_group) {</div><div class='add'>+			list_del_rcu(&amp;tgl-&gt;next);</div><div class='add'>+			call_rcu(&amp;tgl-&gt;rcu, pnv_iommu_table_group_link_free);</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (WARN_ON(!found))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Clean a pointer to iommu_table in iommu_table_group::tables[] */</div><div class='add'>+	found = false;</div><div class='add'>+	for (i = 0; i &lt; IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {</div><div class='add'>+		if (table_group-&gt;tables[i] == tbl) {</div><div class='add'>+			table_group-&gt;tables[i] = NULL;</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	WARN_ON(!found);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void pnv_pci_setup_iommu_table(struct iommu_table *tbl,</div><div class='hunk'>@@ -662,7 +734,7 @@ void pnv_pci_setup_iommu_table(struct iommu_table *tbl,</div><div class='ctx'> 	tbl-&gt;it_type = TCE_PCI;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)</div><div class='add'>+void pnv_pci_dma_dev_setup(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='ctx'> 	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='hunk'>@@ -689,16 +761,6 @@ static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)</div><div class='ctx'> 		phb-&gt;dma_dev_setup(phb, pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	if (phb &amp;&amp; phb-&gt;dma_set_mask)</div><div class='del'>-		return phb-&gt;dma_set_mask(phb, pdev, dma_mask);</div><div class='del'>-	return __dma_set_mask(&amp;pdev-&gt;dev, dma_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = pci_bus_to_host(pdev-&gt;bus);</div><div class='hunk'>@@ -714,12 +776,9 @@ void pnv_pci_shutdown(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(hose, &amp;hose_list, list_node) {</div><div class='del'>-		struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-</div><div class='del'>-		if (phb &amp;&amp; phb-&gt;shutdown)</div><div class='del'>-			phb-&gt;shutdown(phb);</div><div class='del'>-	}</div><div class='add'>+	list_for_each_entry(hose, &amp;hose_list, list_node)</div><div class='add'>+		if (hose-&gt;controller_ops.shutdown)</div><div class='add'>+			hose-&gt;controller_ops.shutdown(hose);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Fixup wrong class code in p7ioc and p8 root complex */</div><div class='hunk'>@@ -762,22 +821,7 @@ void __init pnv_pci_init(void)</div><div class='ctx'> 	pci_devs_phb_init();</div><div class='ctx'> </div><div class='ctx'> 	/* Configure IOMMU DMA hooks */</div><div class='del'>-	ppc_md.tce_build = pnv_tce_build_vm;</div><div class='del'>-	ppc_md.tce_free = pnv_tce_free_vm;</div><div class='del'>-	ppc_md.tce_build_rm = pnv_tce_build_rm;</div><div class='del'>-	ppc_md.tce_free_rm = pnv_tce_free_rm;</div><div class='del'>-	ppc_md.tce_get = pnv_tce_get;</div><div class='ctx'> 	set_pci_dma_ops(&amp;dma_iommu_ops);</div><div class='del'>-</div><div class='del'>-	/* Configure MSIs */</div><div class='del'>-#ifdef CONFIG_PCI_MSI</div><div class='del'>-	ppc_md.setup_msi_irqs = pnv_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = pnv_teardown_msi_irqs;</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init);</div><div class='del'>-</div><div class='del'>-struct pci_controller_ops pnv_pci_controller_ops = {</div><div class='del'>-	.dma_dev_setup = pnv_pci_dma_dev_setup,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h<br/>index 070ee888fc95..8ef2d28aded0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/pci.h</a></div><div class='hunk'>@@ -57,8 +57,7 @@ struct pnv_ioda_pe {</div><div class='ctx'> 	/* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */</div><div class='ctx'> 	int			tce32_seg;</div><div class='ctx'> 	int			tce32_segcount;</div><div class='del'>-	struct iommu_table	*tce32_table;</div><div class='del'>-	phys_addr_t		tce_inval_reg_phys;</div><div class='add'>+	struct iommu_table_group table_group;</div><div class='ctx'> </div><div class='ctx'> 	/* 64-bit TCE bypass region */</div><div class='ctx'> 	bool			tce_bypass_enabled;</div><div class='hunk'>@@ -106,13 +105,10 @@ struct pnv_phb {</div><div class='ctx'> 			 unsigned int hwirq, unsigned int virq,</div><div class='ctx'> 			 unsigned int is_64, struct msi_msg *msg);</div><div class='ctx'> 	void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);</div><div class='del'>-	int (*dma_set_mask)(struct pnv_phb *phb, struct pci_dev *pdev,</div><div class='del'>-			    u64 dma_mask);</div><div class='ctx'> 	u64 (*dma_get_required_mask)(struct pnv_phb *phb,</div><div class='ctx'> 				     struct pci_dev *pdev);</div><div class='ctx'> 	void (*fixup_phb)(struct pci_controller *hose);</div><div class='ctx'> 	u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);</div><div class='del'>-	void (*shutdown)(struct pnv_phb *phb);</div><div class='ctx'> 	int (*init_m64)(struct pnv_phb *phb);</div><div class='ctx'> 	void (*reserve_m64_pe)(struct pnv_phb *phb);</div><div class='ctx'> 	int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all);</div><div class='hunk'>@@ -123,6 +119,7 @@ struct pnv_phb {</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct iommu_table iommu_table;</div><div class='add'>+			struct iommu_table_group table_group;</div><div class='ctx'> 		} p5ioc2;</div><div class='ctx'> </div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -186,6 +183,12 @@ struct pnv_phb {</div><div class='ctx'> 			 * boot for resource allocation purposes</div><div class='ctx'> 			 */</div><div class='ctx'> 			struct list_head	pe_dma_list;</div><div class='add'>+</div><div class='add'>+			/* TCE cache invalidate registers (physical and</div><div class='add'>+			 * remapped)</div><div class='add'>+			 */</div><div class='add'>+			phys_addr_t		tce_inval_reg_phys;</div><div class='add'>+			__be64 __iomem		*tce_inval_reg;</div><div class='ctx'> 		} ioda;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -200,6 +203,13 @@ struct pnv_phb {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct pci_ops pnv_pci_ops;</div><div class='add'>+extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages,</div><div class='add'>+		unsigned long uaddr, enum dma_data_direction direction,</div><div class='add'>+		struct dma_attrs *attrs);</div><div class='add'>+extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages);</div><div class='add'>+extern int pnv_tce_xchg(struct iommu_table *tbl, long index,</div><div class='add'>+		unsigned long *hpa, enum dma_data_direction *direction);</div><div class='add'>+extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index);</div><div class='ctx'> </div><div class='ctx'> void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,</div><div class='ctx'> 				unsigned char *log_buff);</div><div class='hunk'>@@ -207,6 +217,13 @@ int pnv_pci_cfg_read(struct pci_dn *pdn,</div><div class='ctx'> 		     int where, int size, u32 *val);</div><div class='ctx'> int pnv_pci_cfg_write(struct pci_dn *pdn,</div><div class='ctx'> 		      int where, int size, u32 val);</div><div class='add'>+extern struct iommu_table *pnv_pci_table_alloc(int nid);</div><div class='add'>+</div><div class='add'>+extern long pnv_pci_link_table_and_group(int node, int num,</div><div class='add'>+		struct iommu_table *tbl,</div><div class='add'>+		struct iommu_table_group *table_group);</div><div class='add'>+extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,</div><div class='add'>+		struct iommu_table_group *table_group);</div><div class='ctx'> extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,</div><div class='ctx'> 				      void *tce_mem, u64 tce_size,</div><div class='ctx'> 				      u64 dma_offset, unsigned page_shift);</div><div class='hunk'>@@ -218,4 +235,8 @@ extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,</div><div class='ctx'> extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);</div><div class='ctx'> extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);</div><div class='ctx'> </div><div class='add'>+extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev);</div><div class='add'>+extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);</div><div class='add'>+extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);</div><div class='add'>+</div><div class='ctx'> #endif /* __POWERNV_PCI_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h<br/>index 826d2c9bea56..9269e30e4ca0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/powernv.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/powernv.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/powernv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/powernv.h</a></div><div class='hunk'>@@ -12,29 +12,24 @@ struct pci_dev;</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> extern void pnv_pci_init(void);</div><div class='ctx'> extern void pnv_pci_shutdown(void);</div><div class='del'>-extern int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask);</div><div class='ctx'> extern u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev);</div><div class='ctx'> #else</div><div class='ctx'> static inline void pnv_pci_init(void) { }</div><div class='ctx'> static inline void pnv_pci_shutdown(void) { }</div><div class='ctx'> </div><div class='del'>-static inline int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern struct pci_controller_ops pnv_pci_controller_ops;</div><div class='del'>-</div><div class='ctx'> extern u32 pnv_get_supported_cpuidle_states(void);</div><div class='ctx'> </div><div class='ctx'> extern void pnv_lpc_init(void);</div><div class='ctx'> </div><div class='add'>+extern void opal_handle_events(uint64_t events);</div><div class='add'>+extern void opal_event_shutdown(void);</div><div class='add'>+</div><div class='ctx'> bool cpu_core_split_required(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* _POWERNV_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c<br/>index 16fdcb23f4c3..53737e019ae3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/powernv/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powernv/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/powernv/setup.c</a></div><div class='hunk'>@@ -35,12 +35,8 @@</div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='del'>-#include &lt;asm/cputhreads.h&gt;</div><div class='del'>-#include &lt;asm/cpuidle.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "powernv.h"</div><div class='del'>-#include "subcore.h"</div><div class='ctx'> </div><div class='ctx'> static void __init pnv_setup_arch(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -111,7 +107,7 @@ static void pnv_prepare_going_down(void)</div><div class='ctx'> 	 * Disable all notifiers from OPAL, we can't</div><div class='ctx'> 	 * service interrupts anymore anyway</div><div class='ctx'> 	 */</div><div class='del'>-	opal_notifier_disable();</div><div class='add'>+	opal_event_shutdown();</div><div class='ctx'> </div><div class='ctx'> 	/* Soft disable interrupts */</div><div class='ctx'> 	local_irq_disable();</div><div class='hunk'>@@ -169,13 +165,6 @@ static void pnv_progress(char *s, unsigned short hex)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pnv_dma_set_mask(struct device *dev, u64 dma_mask)</div><div class='del'>-{</div><div class='del'>-	if (dev_is_pci(dev))</div><div class='del'>-		return pnv_pci_dma_set_mask(to_pci_dev(dev), dma_mask);</div><div class='del'>-	return __dma_set_mask(dev, dma_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u64 pnv_dma_get_required_mask(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (dev_is_pci(dev))</div><div class='hunk'>@@ -277,173 +266,6 @@ static void __init pnv_setup_machdep_opal(void)</div><div class='ctx'> 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 supported_cpuidle_states;</div><div class='del'>-</div><div class='del'>-int pnv_save_sprs_for_winkle(void)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * hid0, hid1, hid4, hid5, hmeer and lpcr values are symmetric accross</div><div class='del'>-	 * all cpus at boot. Get these reg values of current cpu and use the</div><div class='del'>-	 * same accross all cpus.</div><div class='del'>-	 */</div><div class='del'>-	uint64_t lpcr_val = mfspr(SPRN_LPCR) &amp; ~(u64)LPCR_PECE1;</div><div class='del'>-	uint64_t hid0_val = mfspr(SPRN_HID0);</div><div class='del'>-	uint64_t hid1_val = mfspr(SPRN_HID1);</div><div class='del'>-	uint64_t hid4_val = mfspr(SPRN_HID4);</div><div class='del'>-	uint64_t hid5_val = mfspr(SPRN_HID5);</div><div class='del'>-	uint64_t hmeer_val = mfspr(SPRN_HMEER);</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		uint64_t pir = get_hard_smp_processor_id(cpu);</div><div class='del'>-		uint64_t hsprg0_val = (uint64_t)&amp;paca[cpu];</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * HSPRG0 is used to store the cpu's pointer to paca. Hence last</div><div class='del'>-		 * 3 bits are guaranteed to be 0. Program slw to restore HSPRG0</div><div class='del'>-		 * with 63rd bit set, so that when a thread wakes up at 0x100 we</div><div class='del'>-		 * can use this bit to distinguish between fastsleep and</div><div class='del'>-		 * deep winkle.</div><div class='del'>-		 */</div><div class='del'>-		hsprg0_val |= 1;</div><div class='del'>-</div><div class='del'>-		rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val);</div><div class='del'>-		if (rc != 0)</div><div class='del'>-			return rc;</div><div class='del'>-</div><div class='del'>-		rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val);</div><div class='del'>-		if (rc != 0)</div><div class='del'>-			return rc;</div><div class='del'>-</div><div class='del'>-		/* HIDs are per core registers */</div><div class='del'>-		if (cpu_thread_in_core(cpu) == 0) {</div><div class='del'>-</div><div class='del'>-			rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val);</div><div class='del'>-			if (rc != 0)</div><div class='del'>-				return rc;</div><div class='del'>-</div><div class='del'>-			rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val);</div><div class='del'>-			if (rc != 0)</div><div class='del'>-				return rc;</div><div class='del'>-</div><div class='del'>-			rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val);</div><div class='del'>-			if (rc != 0)</div><div class='del'>-				return rc;</div><div class='del'>-</div><div class='del'>-			rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val);</div><div class='del'>-			if (rc != 0)</div><div class='del'>-				return rc;</div><div class='del'>-</div><div class='del'>-			rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val);</div><div class='del'>-			if (rc != 0)</div><div class='del'>-				return rc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pnv_alloc_idle_core_states(void)</div><div class='del'>-{</div><div class='del'>-	int i, j;</div><div class='del'>-	int nr_cores = cpu_nr_cores();</div><div class='del'>-	u32 *core_idle_state;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * core_idle_state - First 8 bits track the idle state of each thread</div><div class='del'>-	 * of the core. The 8th bit is the lock bit. Initially all thread bits</div><div class='del'>-	 * are set. They are cleared when the thread enters deep idle state</div><div class='del'>-	 * like sleep and winkle. Initially the lock bit is cleared.</div><div class='del'>-	 * The lock bit has 2 purposes</div><div class='del'>-	 * a. While the first thread is restoring core state, it prevents</div><div class='del'>-	 * other threads in the core from switching to process context.</div><div class='del'>-	 * b. While the last thread in the core is saving the core state, it</div><div class='del'>-	 * prevents a different thread from waking up.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; nr_cores; i++) {</div><div class='del'>-		int first_cpu = i * threads_per_core;</div><div class='del'>-		int node = cpu_to_node(first_cpu);</div><div class='del'>-</div><div class='del'>-		core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);</div><div class='del'>-		*core_idle_state = PNV_CORE_IDLE_THREAD_BITS;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; threads_per_core; j++) {</div><div class='del'>-			int cpu = first_cpu + j;</div><div class='del'>-</div><div class='del'>-			paca[cpu].core_idle_state_ptr = core_idle_state;</div><div class='del'>-			paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;</div><div class='del'>-			paca[cpu].thread_mask = 1 &lt;&lt; j;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	update_subcore_sibling_mask();</div><div class='del'>-</div><div class='del'>-	if (supported_cpuidle_states &amp; OPAL_PM_WINKLE_ENABLED)</div><div class='del'>-		pnv_save_sprs_for_winkle();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u32 pnv_get_supported_cpuidle_states(void)</div><div class='del'>-{</div><div class='del'>-	return supported_cpuidle_states;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states);</div><div class='del'>-</div><div class='del'>-static int __init pnv_init_idle_states(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *power_mgt;</div><div class='del'>-	int dt_idle_states;</div><div class='del'>-	u32 *flags;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	supported_cpuidle_states = 0;</div><div class='del'>-</div><div class='del'>-	if (cpuidle_disable != IDLE_NO_OVERRIDE)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (!firmware_has_feature(FW_FEATURE_OPALv3))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");</div><div class='del'>-	if (!power_mgt) {</div><div class='del'>-		pr_warn("opal: PowerMgmt Node not found\n");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	dt_idle_states = of_property_count_u32_elems(power_mgt,</div><div class='del'>-			"ibm,cpu-idle-state-flags");</div><div class='del'>-	if (dt_idle_states &lt; 0) {</div><div class='del'>-		pr_warn("cpuidle-powernv: no idle states found in the DT\n");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL);</div><div class='del'>-	if (of_property_read_u32_array(power_mgt,</div><div class='del'>-			"ibm,cpu-idle-state-flags", flags, dt_idle_states)) {</div><div class='del'>-		pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n");</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dt_idle_states; i++)</div><div class='del'>-		supported_cpuidle_states |= flags[i];</div><div class='del'>-</div><div class='del'>-	if (!(supported_cpuidle_states &amp; OPAL_PM_SLEEP_ENABLED_ER1)) {</div><div class='del'>-		patch_instruction(</div><div class='del'>-			(unsigned int *)pnv_fastsleep_workaround_at_entry,</div><div class='del'>-			PPC_INST_NOP);</div><div class='del'>-		patch_instruction(</div><div class='del'>-			(unsigned int *)pnv_fastsleep_workaround_at_exit,</div><div class='del'>-			PPC_INST_NOP);</div><div class='del'>-	}</div><div class='del'>-	pnv_alloc_idle_core_states();</div><div class='del'>-out_free:</div><div class='del'>-	kfree(flags);</div><div class='del'>-out:</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(pnv_init_idle_states);</div><div class='del'>-</div><div class='ctx'> static int __init pnv_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long root = of_get_flat_dt_root();</div><div class='hunk'>@@ -492,7 +314,6 @@ define_machine(powernv) {</div><div class='ctx'> 	.machine_shutdown	= pnv_shutdown,</div><div class='ctx'> 	.power_save             = power7_idle,</div><div class='ctx'> 	.calibrate_decr		= generic_calibrate_decr,</div><div class='del'>-	.dma_set_mask		= pnv_dma_set_mask,</div><div class='ctx'> 	.dma_get_required_mask	= pnv_dma_get_required_mask,</div><div class='ctx'> #ifdef CONFIG_KEXEC</div><div class='ctx'> 	.kexec_cpu_down		= pnv_kexec_cpu_down,</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/time.c b/arch/powerpc/platforms/ps3/time.c<br/>index ce73ce865613..791c6142c4a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/ps3/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/ps3/time.c</a></div><div class='hunk'>@@ -92,5 +92,4 @@ static int __init ps3_rtc_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return PTR_ERR_OR_ZERO(pdev);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(ps3_rtc_init);</div><div class='add'>+device_initcall(ps3_rtc_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c<br/>index 019d34aaf054..47d9cebe7159 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/dlpar.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pseries/dlpar.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/dlpar.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/dlpar.c</a></div><div class='hunk'>@@ -421,11 +421,10 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t count)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent);</div><div class='add'>+	of_node_put(parent);</div><div class='ctx'> 	if (!dn)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	of_node_put(parent);</div><div class='del'>-</div><div class='ctx'> 	rc = dlpar_attach_node(dn);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		dlpar_release_drc(drc_index);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c<br/>index 2039397cc75d..1ba55d0bb449 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/eeh_pseries.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pseries/eeh_pseries.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/eeh_pseries.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/eeh_pseries.c</a></div><div class='hunk'>@@ -519,7 +519,7 @@ static int pseries_eeh_reset(struct eeh_pe *pe, int option)</div><div class='ctx'> /**</div><div class='ctx'>  * pseries_eeh_wait_state - Wait for PE state</div><div class='ctx'>  * @pe: EEH PE</div><div class='del'>- * @max_wait: maximal period in microsecond</div><div class='add'>+ * @max_wait: maximal period in millisecond</div><div class='ctx'>  *</div><div class='ctx'>  * Wait for the state of associated PE. It might take some time</div><div class='ctx'>  * to retrieve the PE's state.</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c<br/>index 61d5a17f45c0..10510dea16b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pseries/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/iommu.c</a></div><div class='hunk'>@@ -36,6 +36,8 @@</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/rculist.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='hunk'>@@ -51,6 +53,73 @@</div><div class='ctx'> </div><div class='ctx'> #include "pseries.h"</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_group *iommu_pseries_alloc_group(int node)</div><div class='add'>+{</div><div class='add'>+	struct iommu_table_group *table_group = NULL;</div><div class='add'>+	struct iommu_table *tbl = NULL;</div><div class='add'>+	struct iommu_table_group_link *tgl = NULL;</div><div class='add'>+</div><div class='add'>+	table_group = kzalloc_node(sizeof(struct iommu_table_group), GFP_KERNEL,</div><div class='add'>+			   node);</div><div class='add'>+	if (!table_group)</div><div class='add'>+		goto fail_exit;</div><div class='add'>+</div><div class='add'>+	tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL, node);</div><div class='add'>+	if (!tbl)</div><div class='add'>+		goto fail_exit;</div><div class='add'>+</div><div class='add'>+	tgl = kzalloc_node(sizeof(struct iommu_table_group_link), GFP_KERNEL,</div><div class='add'>+			node);</div><div class='add'>+	if (!tgl)</div><div class='add'>+		goto fail_exit;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD_RCU(&amp;tbl-&gt;it_group_list);</div><div class='add'>+	tgl-&gt;table_group = table_group;</div><div class='add'>+	list_add_rcu(&amp;tgl-&gt;next, &amp;tbl-&gt;it_group_list);</div><div class='add'>+</div><div class='add'>+	table_group-&gt;tables[0] = tbl;</div><div class='add'>+</div><div class='add'>+	return table_group;</div><div class='add'>+</div><div class='add'>+fail_exit:</div><div class='add'>+	kfree(tgl);</div><div class='add'>+	kfree(table_group);</div><div class='add'>+	kfree(tbl);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iommu_pseries_free_group(struct iommu_table_group *table_group,</div><div class='add'>+		const char *node_name)</div><div class='add'>+{</div><div class='add'>+	struct iommu_table *tbl;</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	struct iommu_table_group_link *tgl;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (!table_group)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tbl = table_group-&gt;tables[0];</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+	tgl = list_first_entry_or_null(&amp;tbl-&gt;it_group_list,</div><div class='add'>+			struct iommu_table_group_link, next);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!tgl);</div><div class='add'>+	if (tgl) {</div><div class='add'>+		list_del_rcu(&amp;tgl-&gt;next);</div><div class='add'>+		kfree(tgl);</div><div class='add'>+	}</div><div class='add'>+	if (table_group-&gt;group) {</div><div class='add'>+		iommu_group_put(table_group-&gt;group);</div><div class='add'>+		BUG_ON(table_group-&gt;group);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	iommu_free_table(tbl, node_name);</div><div class='add'>+</div><div class='add'>+	kfree(table_group);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,</div><div class='ctx'> 				      __be64 *startp, __be64 *endp)</div><div class='ctx'> {</div><div class='hunk'>@@ -193,7 +262,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (npages == 1) {</div><div class='add'>+	if ((npages == 1) || !firmware_has_feature(FW_FEATURE_MULTITCE)) {</div><div class='ctx'> 		return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,</div><div class='ctx'> 		                           direction, attrs);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -285,6 +354,9 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n</div><div class='ctx'> {</div><div class='ctx'> 	u64 rc;</div><div class='ctx'> </div><div class='add'>+	if (!firmware_has_feature(FW_FEATURE_MULTITCE))</div><div class='add'>+		return tce_free_pSeriesLP(tbl, tcenum, npages);</div><div class='add'>+</div><div class='ctx'> 	rc = plpar_tce_stuff((u64)tbl-&gt;it_index, (u64)tcenum &lt;&lt; 12, 0, npages);</div><div class='ctx'> </div><div class='ctx'> 	if (rc &amp;&amp; printk_ratelimit()) {</div><div class='hunk'>@@ -460,7 +532,6 @@ static int tce_setrange_multi_pSeriesLP_walk(unsigned long start_pfn,</div><div class='ctx'> 	return tce_setrange_multi_pSeriesLP(start_pfn, num_pfn, arg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> static void iommu_table_setparms(struct pci_controller *phb,</div><div class='ctx'> 				 struct device_node *dn,</div><div class='hunk'>@@ -546,6 +617,12 @@ static void iommu_table_setparms_lpar(struct pci_controller *phb,</div><div class='ctx'> 	tbl-&gt;it_size = size &gt;&gt; tbl-&gt;it_page_shift;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct iommu_table_ops iommu_table_pseries_ops = {</div><div class='add'>+	.set = tce_build_pSeries,</div><div class='add'>+	.clear = tce_free_pSeries,</div><div class='add'>+	.get = tce_get_pseries</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dn;</div><div class='hunk'>@@ -610,12 +687,13 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)</div><div class='ctx'> 	pci-&gt;phb-&gt;dma_window_size = 0x8000000ul;</div><div class='ctx'> 	pci-&gt;phb-&gt;dma_window_base_cur = 0x8000000ul;</div><div class='ctx'> </div><div class='del'>-	tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,</div><div class='del'>-			   pci-&gt;phb-&gt;node);</div><div class='add'>+	pci-&gt;table_group = iommu_pseries_alloc_group(pci-&gt;phb-&gt;node);</div><div class='add'>+	tbl = pci-&gt;table_group-&gt;tables[0];</div><div class='ctx'> </div><div class='ctx'> 	iommu_table_setparms(pci-&gt;phb, dn, tbl);</div><div class='del'>-	pci-&gt;iommu_table = iommu_init_table(tbl, pci-&gt;phb-&gt;node);</div><div class='del'>-	iommu_register_group(tbl, pci_domain_nr(bus), 0);</div><div class='add'>+	tbl-&gt;it_ops = &amp;iommu_table_pseries_ops;</div><div class='add'>+	iommu_init_table(tbl, pci-&gt;phb-&gt;node);</div><div class='add'>+	iommu_register_group(pci-&gt;table_group, pci_domain_nr(bus), 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Divide the rest (1.75GB) among the children */</div><div class='ctx'> 	pci-&gt;phb-&gt;dma_window_size = 0x80000000ul;</div><div class='hunk'>@@ -625,6 +703,11 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)</div><div class='ctx'> 	pr_debug("ISA/IDE, window size is 0x%llx\n", pci-&gt;phb-&gt;dma_window_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct iommu_table_ops iommu_table_lpar_multi_ops = {</div><div class='add'>+	.set = tce_buildmulti_pSeriesLP,</div><div class='add'>+	.clear = tce_freemulti_pSeriesLP,</div><div class='add'>+	.get = tce_get_pSeriesLP</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)</div><div class='ctx'> {</div><div class='hunk'>@@ -653,15 +736,17 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)</div><div class='ctx'> 	ppci = PCI_DN(pdn);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("  parent is %s, iommu_table: 0x%p\n",</div><div class='del'>-		 pdn-&gt;full_name, ppci-&gt;iommu_table);</div><div class='add'>+		 pdn-&gt;full_name, ppci-&gt;table_group);</div><div class='ctx'> </div><div class='del'>-	if (!ppci-&gt;iommu_table) {</div><div class='del'>-		tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,</div><div class='del'>-				   ppci-&gt;phb-&gt;node);</div><div class='add'>+	if (!ppci-&gt;table_group) {</div><div class='add'>+		ppci-&gt;table_group = iommu_pseries_alloc_group(ppci-&gt;phb-&gt;node);</div><div class='add'>+		tbl = ppci-&gt;table_group-&gt;tables[0];</div><div class='ctx'> 		iommu_table_setparms_lpar(ppci-&gt;phb, pdn, tbl, dma_window);</div><div class='del'>-		ppci-&gt;iommu_table = iommu_init_table(tbl, ppci-&gt;phb-&gt;node);</div><div class='del'>-		iommu_register_group(tbl, pci_domain_nr(bus), 0);</div><div class='del'>-		pr_debug("  created table: %p\n", ppci-&gt;iommu_table);</div><div class='add'>+		tbl-&gt;it_ops = &amp;iommu_table_lpar_multi_ops;</div><div class='add'>+		iommu_init_table(tbl, ppci-&gt;phb-&gt;node);</div><div class='add'>+		iommu_register_group(ppci-&gt;table_group,</div><div class='add'>+				pci_domain_nr(bus), 0);</div><div class='add'>+		pr_debug("  created table: %p\n", ppci-&gt;table_group);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -683,13 +768,15 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)</div><div class='ctx'> 		struct pci_controller *phb = PCI_DN(dn)-&gt;phb;</div><div class='ctx'> </div><div class='ctx'> 		pr_debug(" --&gt; first child, no bridge. Allocating iommu table.\n");</div><div class='del'>-		tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,</div><div class='del'>-				   phb-&gt;node);</div><div class='add'>+		PCI_DN(dn)-&gt;table_group = iommu_pseries_alloc_group(phb-&gt;node);</div><div class='add'>+		tbl = PCI_DN(dn)-&gt;table_group-&gt;tables[0];</div><div class='ctx'> 		iommu_table_setparms(phb, dn, tbl);</div><div class='del'>-		PCI_DN(dn)-&gt;iommu_table = iommu_init_table(tbl, phb-&gt;node);</div><div class='del'>-		iommu_register_group(tbl, pci_domain_nr(phb-&gt;bus), 0);</div><div class='del'>-		set_iommu_table_base_and_group(&amp;dev-&gt;dev,</div><div class='del'>-					       PCI_DN(dn)-&gt;iommu_table);</div><div class='add'>+		tbl-&gt;it_ops = &amp;iommu_table_pseries_ops;</div><div class='add'>+		iommu_init_table(tbl, phb-&gt;node);</div><div class='add'>+		iommu_register_group(PCI_DN(dn)-&gt;table_group,</div><div class='add'>+				pci_domain_nr(phb-&gt;bus), 0);</div><div class='add'>+		set_iommu_table_base(&amp;dev-&gt;dev, tbl);</div><div class='add'>+		iommu_add_device(&amp;dev-&gt;dev);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -697,13 +784,14 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)</div><div class='ctx'> 	 * an already allocated iommu table is found and use that.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	while (dn &amp;&amp; PCI_DN(dn) &amp;&amp; PCI_DN(dn)-&gt;iommu_table == NULL)</div><div class='add'>+	while (dn &amp;&amp; PCI_DN(dn) &amp;&amp; PCI_DN(dn)-&gt;table_group == NULL)</div><div class='ctx'> 		dn = dn-&gt;parent;</div><div class='ctx'> </div><div class='del'>-	if (dn &amp;&amp; PCI_DN(dn))</div><div class='del'>-		set_iommu_table_base_and_group(&amp;dev-&gt;dev,</div><div class='del'>-					       PCI_DN(dn)-&gt;iommu_table);</div><div class='del'>-	else</div><div class='add'>+	if (dn &amp;&amp; PCI_DN(dn)) {</div><div class='add'>+		set_iommu_table_base(&amp;dev-&gt;dev,</div><div class='add'>+				PCI_DN(dn)-&gt;table_group-&gt;tables[0]);</div><div class='add'>+		iommu_add_device(&amp;dev-&gt;dev);</div><div class='add'>+	} else</div><div class='ctx'> 		printk(KERN_WARNING "iommu: Device %s has no iommu table\n",</div><div class='ctx'> 		       pci_name(dev));</div><div class='ctx'> }</div><div class='hunk'>@@ -1088,7 +1176,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)</div><div class='ctx'> 	dn = pci_device_to_OF_node(dev);</div><div class='ctx'> 	pr_debug("  node is %s\n", dn-&gt;full_name);</div><div class='ctx'> </div><div class='del'>-	for (pdn = dn; pdn &amp;&amp; PCI_DN(pdn) &amp;&amp; !PCI_DN(pdn)-&gt;iommu_table;</div><div class='add'>+	for (pdn = dn; pdn &amp;&amp; PCI_DN(pdn) &amp;&amp; !PCI_DN(pdn)-&gt;table_group;</div><div class='ctx'> 	     pdn = pdn-&gt;parent) {</div><div class='ctx'> 		dma_window = of_get_property(pdn, "ibm,dma-window", NULL);</div><div class='ctx'> 		if (dma_window)</div><div class='hunk'>@@ -1104,18 +1192,21 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)</div><div class='ctx'> 	pr_debug("  parent is %s\n", pdn-&gt;full_name);</div><div class='ctx'> </div><div class='ctx'> 	pci = PCI_DN(pdn);</div><div class='del'>-	if (!pci-&gt;iommu_table) {</div><div class='del'>-		tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,</div><div class='del'>-				   pci-&gt;phb-&gt;node);</div><div class='add'>+	if (!pci-&gt;table_group) {</div><div class='add'>+		pci-&gt;table_group = iommu_pseries_alloc_group(pci-&gt;phb-&gt;node);</div><div class='add'>+		tbl = pci-&gt;table_group-&gt;tables[0];</div><div class='ctx'> 		iommu_table_setparms_lpar(pci-&gt;phb, pdn, tbl, dma_window);</div><div class='del'>-		pci-&gt;iommu_table = iommu_init_table(tbl, pci-&gt;phb-&gt;node);</div><div class='del'>-		iommu_register_group(tbl, pci_domain_nr(pci-&gt;phb-&gt;bus), 0);</div><div class='del'>-		pr_debug("  created table: %p\n", pci-&gt;iommu_table);</div><div class='add'>+		tbl-&gt;it_ops = &amp;iommu_table_lpar_multi_ops;</div><div class='add'>+		iommu_init_table(tbl, pci-&gt;phb-&gt;node);</div><div class='add'>+		iommu_register_group(pci-&gt;table_group,</div><div class='add'>+				pci_domain_nr(pci-&gt;phb-&gt;bus), 0);</div><div class='add'>+		pr_debug("  created table: %p\n", pci-&gt;table_group);</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_debug("  found DMA window, table: %p\n", pci-&gt;iommu_table);</div><div class='add'>+		pr_debug("  found DMA window, table: %p\n", pci-&gt;table_group);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	set_iommu_table_base_and_group(&amp;dev-&gt;dev, pci-&gt;iommu_table);</div><div class='add'>+	set_iommu_table_base(&amp;dev-&gt;dev, pci-&gt;table_group-&gt;tables[0]);</div><div class='add'>+	iommu_add_device(&amp;dev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)</div><div class='hunk'>@@ -1145,7 +1236,7 @@ static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)</div><div class='ctx'> 		 * search upwards in the tree until we either hit a dma-window</div><div class='ctx'> 		 * property, OR find a parent with a table already allocated.</div><div class='ctx'> 		 */</div><div class='del'>-		for (pdn = dn; pdn &amp;&amp; PCI_DN(pdn) &amp;&amp; !PCI_DN(pdn)-&gt;iommu_table;</div><div class='add'>+		for (pdn = dn; pdn &amp;&amp; PCI_DN(pdn) &amp;&amp; !PCI_DN(pdn)-&gt;table_group;</div><div class='ctx'> 				pdn = pdn-&gt;parent) {</div><div class='ctx'> 			dma_window = of_get_property(pdn, "ibm,dma-window", NULL);</div><div class='ctx'> 			if (dma_window)</div><div class='hunk'>@@ -1189,7 +1280,7 @@ static u64 dma_get_required_mask_pSeriesLP(struct device *dev)</div><div class='ctx'> 		dn = pci_device_to_OF_node(pdev);</div><div class='ctx'> </div><div class='ctx'> 		/* search upwards for ibm,dma-window */</div><div class='del'>-		for (; dn &amp;&amp; PCI_DN(dn) &amp;&amp; !PCI_DN(dn)-&gt;iommu_table;</div><div class='add'>+		for (; dn &amp;&amp; PCI_DN(dn) &amp;&amp; !PCI_DN(dn)-&gt;table_group;</div><div class='ctx'> 				dn = dn-&gt;parent)</div><div class='ctx'> 			if (of_get_property(dn, "ibm,dma-window", NULL))</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -1269,8 +1360,9 @@ static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long acti</div><div class='ctx'> 		 * the device node.</div><div class='ctx'> 		 */</div><div class='ctx'> 		remove_ddw(np, false);</div><div class='del'>-		if (pci &amp;&amp; pci-&gt;iommu_table)</div><div class='del'>-			iommu_free_table(pci-&gt;iommu_table, np-&gt;full_name);</div><div class='add'>+		if (pci &amp;&amp; pci-&gt;table_group)</div><div class='add'>+			iommu_pseries_free_group(pci-&gt;table_group,</div><div class='add'>+					np-&gt;full_name);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;direct_window_list_lock);</div><div class='ctx'> 		list_for_each_entry(window, &amp;direct_window_list, list) {</div><div class='hunk'>@@ -1300,22 +1392,11 @@ void iommu_init_early_pSeries(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (firmware_has_feature(FW_FEATURE_LPAR)) {</div><div class='del'>-		if (firmware_has_feature(FW_FEATURE_MULTITCE)) {</div><div class='del'>-			ppc_md.tce_build = tce_buildmulti_pSeriesLP;</div><div class='del'>-			ppc_md.tce_free	 = tce_freemulti_pSeriesLP;</div><div class='del'>-		} else {</div><div class='del'>-			ppc_md.tce_build = tce_build_pSeriesLP;</div><div class='del'>-			ppc_md.tce_free	 = tce_free_pSeriesLP;</div><div class='del'>-		}</div><div class='del'>-		ppc_md.tce_get   = tce_get_pSeriesLP;</div><div class='ctx'> 		pseries_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pSeriesLP;</div><div class='ctx'> 		pseries_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pSeriesLP;</div><div class='ctx'> 		ppc_md.dma_set_mask = dma_set_mask_pSeriesLP;</div><div class='ctx'> 		ppc_md.dma_get_required_mask = dma_get_required_mask_pSeriesLP;</div><div class='ctx'> 	} else {</div><div class='del'>-		ppc_md.tce_build = tce_build_pSeries;</div><div class='del'>-		ppc_md.tce_free  = tce_free_pSeries;</div><div class='del'>-		ppc_md.tce_get   = tce_get_pseries;</div><div class='ctx'> 		pseries_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pSeries;</div><div class='ctx'> 		pseries_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pSeries;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1333,8 +1414,6 @@ static int __init disable_multitce(char *str)</div><div class='ctx'> 	    firmware_has_feature(FW_FEATURE_LPAR) &amp;&amp;</div><div class='ctx'> 	    firmware_has_feature(FW_FEATURE_MULTITCE)) {</div><div class='ctx'> 		printk(KERN_INFO "Disabling MULTITCE firmware feature\n");</div><div class='del'>-		ppc_md.tce_build = tce_build_pSeriesLP;</div><div class='del'>-		ppc_md.tce_free	 = tce_free_pSeriesLP;</div><div class='ctx'> 		powerpc_firmware_features &amp;= ~FW_FEATURE_MULTITCE;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 1;</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c<br/>index c8d24f9a6948..c22bb647cce6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/platforms/pseries/msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/platforms/pseries/msi.c</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> #include &lt;asm/ppc-pci.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "pseries.h"</div><div class='add'>+</div><div class='ctx'> static int query_token, change_token;</div><div class='ctx'> </div><div class='ctx'> #define RTAS_QUERY_FN		0</div><div class='hunk'>@@ -505,6 +507,8 @@ static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static int rtas_msi_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct pci_controller *phb;</div><div class='add'>+</div><div class='ctx'> 	query_token  = rtas_token("ibm,query-interrupt-source-number");</div><div class='ctx'> 	change_token = rtas_token("ibm,change-msi");</div><div class='ctx'> </div><div class='hunk'>@@ -516,9 +520,15 @@ static int rtas_msi_init(void)</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n");</div><div class='ctx'> </div><div class='del'>-	WARN_ON(ppc_md.setup_msi_irqs);</div><div class='del'>-	ppc_md.setup_msi_irqs = rtas_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = rtas_teardown_msi_irqs;</div><div class='add'>+	WARN_ON(pseries_pci_controller_ops.setup_msi_irqs);</div><div class='add'>+	pseries_pci_controller_ops.setup_msi_irqs = rtas_setup_msi_irqs;</div><div class='add'>+	pseries_pci_controller_ops.teardown_msi_irqs = rtas_teardown_msi_irqs;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		WARN_ON(phb-&gt;controller_ops.setup_msi_irqs);</div><div class='add'>+		phb-&gt;controller_ops.setup_msi_irqs = rtas_setup_msi_irqs;</div><div class='add'>+		phb-&gt;controller_ops.teardown_msi_irqs = rtas_teardown_msi_irqs;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(ppc_md.pci_irq_fixup);</div><div class='ctx'> 	ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup;</div><div class='head'>diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile<br/>index f7cb2a1b01fa..5b492a6438ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror</div><div class='ctx'> </div><div class='ctx'> ccflags-$(CONFIG_PPC64)		:= $(NO_MINIMAL_TOC)</div><div class='ctx'> </div><div class='del'>-mpic-msi-obj-$(CONFIG_PCI_MSI)	+= mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o</div><div class='add'>+mpic-msi-obj-$(CONFIG_PCI_MSI)	+= mpic_msi.o mpic_u3msi.o</div><div class='ctx'> obj-$(CONFIG_MPIC)		+= mpic.o $(mpic-msi-obj-y)</div><div class='ctx'> obj-$(CONFIG_MPIC_TIMER)        += mpic_timer.o</div><div class='ctx'> obj-$(CONFIG_FSL_MPIC_TIMER_WAKEUP)	+= fsl_mpic_timer_wakeup.o</div><div class='head'>diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c<br/>index d00a5663e312..90bcdfeedf48 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/dart_iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/dart_iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/dart_iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/dart_iommu.c</a></div><div class='hunk'>@@ -286,6 +286,12 @@ static int __init dart_init(struct device_node *dart_node)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct iommu_table_ops iommu_dart_ops = {</div><div class='add'>+	.set = dart_build,</div><div class='add'>+	.clear = dart_free,</div><div class='add'>+	.flush = dart_flush,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void iommu_table_dart_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	iommu_table_dart.it_busno = 0;</div><div class='hunk'>@@ -298,6 +304,7 @@ static void iommu_table_dart_setup(void)</div><div class='ctx'> 	iommu_table_dart.it_base = (unsigned long)dart_vbase;</div><div class='ctx'> 	iommu_table_dart.it_index = 0;</div><div class='ctx'> 	iommu_table_dart.it_blocksize = 1;</div><div class='add'>+	iommu_table_dart.it_ops = &amp;iommu_dart_ops;</div><div class='ctx'> 	iommu_init_table(&amp;iommu_table_dart, -1);</div><div class='ctx'> </div><div class='ctx'> 	/* Reserve the last page of the DART to avoid possible prefetch</div><div class='hunk'>@@ -386,11 +393,6 @@ void __init iommu_init_early_dart(struct pci_controller_ops *controller_ops)</div><div class='ctx'> 	if (dart_init(dn) != 0)</div><div class='ctx'> 		goto bail;</div><div class='ctx'> </div><div class='del'>-	/* Setup low level TCE operations for the core IOMMU code */</div><div class='del'>-	ppc_md.tce_build = dart_build;</div><div class='del'>-	ppc_md.tce_free  = dart_free;</div><div class='del'>-	ppc_md.tce_flush = dart_flush;</div><div class='del'>-</div><div class='ctx'> 	/* Setup bypass if supported */</div><div class='ctx'> 	if (dart_is_u4)</div><div class='ctx'> 		ppc_md.dma_set_mask = dart_dma_set_mask;</div><div class='head'>diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c<br/>index d631022ffb4b..38138cf8d33e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/fsl_lbc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/fsl_lbc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/fsl_lbc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/fsl_lbc.c</a></div><div class='hunk'>@@ -407,4 +407,4 @@ static int __init fsl_lbc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_driver_register(&amp;fsl_lbc_ctrl_driver);</div><div class='ctx'> }</div><div class='del'>-module_init(fsl_lbc_init);</div><div class='add'>+subsys_initcall(fsl_lbc_init);</div><div class='head'>diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c<br/>index f086c6f22dc9..5236e5427c38 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/fsl_msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/fsl_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/fsl_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/fsl_msi.c</a></div><div class='hunk'>@@ -405,6 +405,7 @@ static int fsl_of_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	const struct fsl_msi_feature *features;</div><div class='ctx'> 	int len;</div><div class='ctx'> 	u32 offset;</div><div class='add'>+	struct pci_controller *phb;</div><div class='ctx'> </div><div class='ctx'> 	match = of_match_device(fsl_of_msi_ids, &amp;dev-&gt;dev);</div><div class='ctx'> 	if (!match)</div><div class='hunk'>@@ -541,14 +542,20 @@ static int fsl_of_msi_probe(struct platform_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;msi-&gt;list, &amp;msi_head);</div><div class='ctx'> </div><div class='del'>-	/* The multiple setting ppc_md.setup_msi_irqs will not harm things */</div><div class='del'>-	if (!ppc_md.setup_msi_irqs) {</div><div class='del'>-		ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;</div><div class='del'>-		ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;</div><div class='del'>-	} else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) {</div><div class='del'>-		dev_err(&amp;dev-&gt;dev, "Different MSI driver already installed!\n");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto error_out;</div><div class='add'>+	/*</div><div class='add'>+	 * Apply the MSI ops to all the controllers.</div><div class='add'>+	 * It doesn't hurt to reassign the same ops,</div><div class='add'>+	 * but bail out if we find another MSI driver.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		if (!phb-&gt;controller_ops.setup_msi_irqs) {</div><div class='add'>+			phb-&gt;controller_ops.setup_msi_irqs = fsl_setup_msi_irqs;</div><div class='add'>+			phb-&gt;controller_ops.teardown_msi_irqs = fsl_teardown_msi_irqs;</div><div class='add'>+		} else if (phb-&gt;controller_ops.setup_msi_irqs != fsl_setup_msi_irqs) {</div><div class='add'>+			dev_err(&amp;dev-&gt;dev, "Different MSI driver already installed!\n");</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+			goto error_out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> error_out:</div><div class='head'>diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c<br/>index 45598da0b321..31c33475c7b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/i8259.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/i8259.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/i8259.c</a></div><div class='hunk'>@@ -204,7 +204,7 @@ static int i8259_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops i8259_host_ops = {</div><div class='add'>+static const struct irq_domain_ops i8259_host_ops = {</div><div class='ctx'> 	.match = i8259_host_match,</div><div class='ctx'> 	.map = i8259_host_map,</div><div class='ctx'> 	.xlate = i8259_host_xlate,</div><div class='head'>diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c<br/>index b28733727ed3..d78f1364b639 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/ipic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/ipic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/ipic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ipic.c</a></div><div class='hunk'>@@ -691,7 +691,7 @@ static int ipic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops ipic_host_ops = {</div><div class='add'>+static const struct irq_domain_ops ipic_host_ops = {</div><div class='ctx'> 	.match	= ipic_host_match,</div><div class='ctx'> 	.map	= ipic_host_map,</div><div class='ctx'> 	.xlate	= irq_domain_xlate_onetwocell,</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c<br/>index c4828c0be5bd..d93a78be4346 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpc8xx_pic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mpc8xx_pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpc8xx_pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpc8xx_pic.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops mpc8xx_pic_host_ops = {</div><div class='add'>+static const struct irq_domain_ops mpc8xx_pic_host_ops = {</div><div class='ctx'> 	.map = mpc8xx_pic_host_map,</div><div class='ctx'> 	.xlate = mpc8xx_pic_host_xlate,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c<br/>index b2b8447a227a..c8e73332eaad 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mpic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic.c</a></div><div class='hunk'>@@ -1195,7 +1195,7 @@ static void mpic_cascade(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops mpic_host_ops = {</div><div class='add'>+static const struct irq_domain_ops mpic_host_ops = {</div><div class='ctx'> 	.match = mpic_host_match,</div><div class='ctx'> 	.map = mpic_host_map,</div><div class='ctx'> 	.xlate = mpic_host_xlate,</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h<br/>index 24bf07a63924..32971a41853b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mpic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic.h</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);</div><div class='ctx'> extern int mpic_msi_init_allocator(struct mpic *mpic);</div><div class='ctx'> extern int mpic_u3msi_init(struct mpic *mpic);</div><div class='del'>-extern int mpic_pasemi_msi_init(struct mpic *mpic);</div><div class='ctx'> #else</div><div class='ctx'> static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,</div><div class='ctx'> 					  irq_hw_number_t hwirq)</div><div class='hunk'>@@ -27,11 +26,12 @@ static inline int mpic_u3msi_init(struct mpic *mpic)</div><div class='ctx'> {</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static inline int mpic_pasemi_msi_init(struct mpic *mpic)</div><div class='del'>-{</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='add'>+#if defined(CONFIG_PCI_MSI) &amp;&amp; defined(CONFIG_PPC_PASEMI)</div><div class='add'>+int mpic_pasemi_msi_init(struct mpic *mpic);</div><div class='add'>+#else</div><div class='add'>+static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c<br/>index b2cef1809389..fc46ef3b816e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic_u3msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mpic_u3msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpic_u3msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mpic_u3msi.c</a></div><div class='hunk'>@@ -181,6 +181,7 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)</div><div class='ctx'> int mpic_u3msi_init(struct mpic *mpic)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='add'>+	struct pci_controller *phb;</div><div class='ctx'> </div><div class='ctx'> 	rc = mpic_msi_init_allocator(mpic);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -193,9 +194,11 @@ int mpic_u3msi_init(struct mpic *mpic)</div><div class='ctx'> 	BUG_ON(msi_mpic);</div><div class='ctx'> 	msi_mpic = mpic;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(ppc_md.setup_msi_irqs);</div><div class='del'>-	ppc_md.setup_msi_irqs = u3msi_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = u3msi_teardown_msi_irqs;</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		WARN_ON(phb-&gt;controller_ops.setup_msi_irqs);</div><div class='add'>+		phb-&gt;controller_ops.setup_msi_irqs = u3msi_setup_msi_irqs;</div><div class='add'>+		phb-&gt;controller_ops.teardown_msi_irqs = u3msi_teardown_msi_irqs;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c<br/>index 8848e99a83f2..0f842dd16bcd 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mv64x60_pic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/mv64x60_pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mv64x60_pic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/mv64x60_pic.c</a></div><div class='hunk'>@@ -223,7 +223,7 @@ static int mv64x60_host_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops mv64x60_host_ops = {</div><div class='add'>+static const struct irq_domain_ops mv64x60_host_ops = {</div><div class='ctx'> 	.map   = mv64x60_host_map,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/ppc4xx_hsta_msi.c b/arch/powerpc/sysdev/ppc4xx_hsta_msi.c<br/>index f366d2d4c079..87f9623ca805 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_hsta_msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/ppc4xx_hsta_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_hsta_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ppc4xx_hsta_msi.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/semaphore.h&gt;</div><div class='ctx'> #include &lt;asm/msi_bitmap.h&gt;</div><div class='add'>+#include &lt;asm/ppc-pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct ppc4xx_hsta_msi {</div><div class='ctx'> 	struct device *dev;</div><div class='hunk'>@@ -128,6 +129,7 @@ static int hsta_msi_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct resource *mem;</div><div class='ctx'> 	int irq, ret, irq_count;</div><div class='add'>+	struct pci_controller *phb;</div><div class='ctx'> </div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (IS_ERR(mem)) {</div><div class='hunk'>@@ -171,8 +173,10 @@ static int hsta_msi_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ppc_md.setup_msi_irqs = hsta_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = hsta_teardown_msi_irqs;</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		phb-&gt;controller_ops.setup_msi_irqs = hsta_setup_msi_irqs;</div><div class='add'>+		phb-&gt;controller_ops.teardown_msi_irqs = hsta_teardown_msi_irqs;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out2:</div><div class='head'>diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c<br/>index 6e2e6aa378bb..6eb21f2ea585 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/ppc4xx_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/ppc4xx_msi.c</a></div><div class='hunk'>@@ -218,6 +218,7 @@ static int ppc4xx_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	struct ppc4xx_msi *msi;</div><div class='ctx'> 	struct resource res;</div><div class='ctx'> 	int err = 0;</div><div class='add'>+	struct pci_controller *phb;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;dev-&gt;dev, "PCIE-MSI: Setting up MSI support...\n");</div><div class='ctx'> </div><div class='hunk'>@@ -250,8 +251,10 @@ static int ppc4xx_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	ppc4xx_msi = *msi;</div><div class='ctx'> </div><div class='del'>-	ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;</div><div class='del'>-	ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;</div><div class='add'>+	list_for_each_entry(phb, &amp;hose_list, list_node) {</div><div class='add'>+		phb-&gt;controller_ops.setup_msi_irqs = ppc4xx_setup_msi_irqs;</div><div class='add'>+		phb-&gt;controller_ops.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;</div><div class='add'>+	}</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> error_out:</div><div class='head'>diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c<br/>index 543765e1ef14..6512cd8caa51 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/qe_lib/qe_ic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/qe_lib/qe_ic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/qe_lib/qe_ic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/qe_lib/qe_ic.c</a></div><div class='hunk'>@@ -271,7 +271,7 @@ static int qe_ic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops qe_ic_host_ops = {</div><div class='add'>+static const struct irq_domain_ops qe_ic_host_ops = {</div><div class='ctx'> 	.match = qe_ic_host_match,</div><div class='ctx'> 	.map = qe_ic_host_map,</div><div class='ctx'> 	.xlate = irq_domain_xlate_onetwocell,</div><div class='head'>diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c<br/>index 188012c58f7f..57b54476e747 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/tsi108_pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/tsi108_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/tsi108_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/tsi108_pci.c</a></div><div class='hunk'>@@ -397,7 +397,7 @@ static int pci_irq_host_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops pci_irq_domain_ops = {</div><div class='add'>+static const struct irq_domain_ops pci_irq_domain_ops = {</div><div class='ctx'> 	.map = pci_irq_host_map,</div><div class='ctx'> 	.xlate = pci_irq_host_xlate,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c<br/>index 7c37157d4c24..d77345338671 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/uic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/uic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/uic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/uic.c</a></div><div class='hunk'>@@ -189,7 +189,7 @@ static int uic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops uic_host_ops = {</div><div class='add'>+static const struct irq_domain_ops uic_host_ops = {</div><div class='ctx'> 	.map	= uic_host_map,</div><div class='ctx'> 	.xlate	= irq_domain_xlate_twocell,</div><div class='ctx'> };</div><div class='hunk'>@@ -198,7 +198,7 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='ctx'> 	struct irq_data *idata = irq_desc_get_irq_data(desc);</div><div class='del'>-	struct uic *uic = irq_get_handler_data(virq);</div><div class='add'>+	struct uic *uic = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	u32 msr;</div><div class='ctx'> 	int src;</div><div class='ctx'> 	int subvirq;</div><div class='head'>diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c<br/>index 2fc4cf1b7557..eae32654bdf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/icp-native.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/xics/icp-native.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/icp-native.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xics/icp-native.c</a></div><div class='hunk'>@@ -147,12 +147,16 @@ static void icp_native_cause_ipi(int cpu, unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	kvmppc_set_host_ipi(cpu, 1);</div><div class='ctx'> #ifdef CONFIG_PPC_DOORBELL</div><div class='del'>-	if (cpu_has_feature(CPU_FTR_DBELL) &amp;&amp;</div><div class='del'>-	    (cpumask_test_cpu(cpu, cpu_sibling_mask(smp_processor_id()))))</div><div class='del'>-		doorbell_cause_ipi(cpu, data);</div><div class='del'>-	else</div><div class='add'>+	if (cpu_has_feature(CPU_FTR_DBELL)) {</div><div class='add'>+		if (cpumask_test_cpu(cpu, cpu_sibling_mask(get_cpu()))) {</div><div class='add'>+			doorbell_cause_ipi(cpu, data);</div><div class='add'>+			put_cpu();</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		put_cpu();</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='del'>-		icp_native_set_qirr(cpu, IPI_PRIORITY);</div><div class='add'>+	icp_native_set_qirr(cpu, IPI_PRIORITY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c<br/>index 878a54036a25..08c248eb491b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/xics-common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/xics/xics-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/xics-common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xics/xics-common.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ void xics_migrate_irqs_away(void)</div><div class='ctx'> </div><div class='ctx'> 		/* Locate interrupt server */</div><div class='ctx'> 		server = -1;</div><div class='del'>-		ics = irq_get_chip_data(virq);</div><div class='add'>+		ics = irq_desc_get_chip_data(desc);</div><div class='ctx'> 		if (ics)</div><div class='ctx'> 			server = ics-&gt;get_server(ics, irq);</div><div class='ctx'> 		if (server &lt; 0) {</div><div class='hunk'>@@ -360,7 +360,7 @@ static int xics_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops xics_host_ops = {</div><div class='add'>+static const struct irq_domain_ops xics_host_ops = {</div><div class='ctx'> 	.match = xics_host_match,</div><div class='ctx'> 	.map = xics_host_map,</div><div class='ctx'> 	.xlate = xics_host_xlate,</div><div class='head'>diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c<br/>index 56f0524e47a6..43b8b275bc5c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/xilinx_intc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/powerpc/sysdev/xilinx_intc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/xilinx_intc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/powerpc/sysdev/xilinx_intc.c</a></div><div class='hunk'>@@ -179,7 +179,7 @@ static int xilinx_intc_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops xilinx_intc_ops = {</div><div class='add'>+static const struct irq_domain_ops xilinx_intc_ops = {</div><div class='ctx'> 	.map = xilinx_intc_map,</div><div class='ctx'> 	.xlate = xilinx_intc_xlate,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/s390/configs/default_defconfig b/arch/s390/configs/default_defconfig<br/>index 64707750c780..940cbddd9237 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/configs/default_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/configs/default_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/configs/default_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/default_defconfig</a></div><div class='hunk'>@@ -17,13 +17,15 @@ CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_DEVICE=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='del'>-CONFIG_RESOURCE_COUNTERS=y</div><div class='ctx'> CONFIG_CGROUP_PERF=y</div><div class='ctx'> CONFIG_CFS_BANDWIDTH=y</div><div class='ctx'> CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EXPERT=y</div><div class='add'>+CONFIG_BPF_SYSCALL=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_OPROFILE=m</div><div class='hunk'>@@ -44,6 +46,7 @@ CONFIG_SOLARIS_X86_PARTITION=y</div><div class='ctx'> CONFIG_UNIXWARE_DISKLABEL=y</div><div class='ctx'> CONFIG_CFQ_GROUP_IOSCHED=y</div><div class='ctx'> CONFIG_DEFAULT_DEADLINE=y</div><div class='add'>+CONFIG_LIVEPATCH=y</div><div class='ctx'> CONFIG_MARCH_Z196=y</div><div class='ctx'> CONFIG_TUNE_ZEC12=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='hunk'>@@ -242,9 +245,9 @@ CONFIG_NF_CONNTRACK_IPV4=m</div><div class='ctx'> # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set</div><div class='ctx'> CONFIG_NF_TABLES_IPV4=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='ctx'> CONFIG_NF_NAT_IPV4=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_IP_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='hunk'>@@ -264,8 +267,8 @@ CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV6=m</div><div class='ctx'> CONFIG_NF_TABLES_IPV6=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV6=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_NF_NAT_IPV6=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_IP6_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_EUI64=m</div><div class='hunk'>@@ -353,7 +356,6 @@ CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_OSD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=32768</div><div class='del'>-CONFIG_BLK_DEV_XIP=y</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_VIRTIO_BLK=y</div><div class='hunk'>@@ -458,7 +460,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT2_FS_XIP=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='ctx'> # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='ctx'> CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='hunk'>@@ -544,7 +545,6 @@ CONFIG_FRAME_WARN=1024</div><div class='ctx'> CONFIG_READABLE_ASM=y</div><div class='ctx'> CONFIG_UNUSED_SYMBOLS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_PAGEALLOC=y</div><div class='ctx'> CONFIG_DEBUG_OBJECTS=y</div><div class='ctx'> CONFIG_DEBUG_OBJECTS_SELFTEST=y</div><div class='hunk'>@@ -558,6 +558,7 @@ CONFIG_SLUB_STATS=y</div><div class='ctx'> CONFIG_DEBUG_STACK_USAGE=y</div><div class='ctx'> CONFIG_DEBUG_VM=y</div><div class='ctx'> CONFIG_DEBUG_VM_RB=y</div><div class='add'>+CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m</div><div class='ctx'> CONFIG_DEBUG_PER_CPU_MAPS=y</div><div class='ctx'> CONFIG_DEBUG_SHIRQ=y</div><div class='hunk'>@@ -575,7 +576,6 @@ CONFIG_DEBUG_LIST=y</div><div class='ctx'> CONFIG_DEBUG_SG=y</div><div class='ctx'> CONFIG_DEBUG_NOTIFIERS=y</div><div class='ctx'> CONFIG_DEBUG_CREDENTIALS=y</div><div class='del'>-CONFIG_PROVE_RCU=y</div><div class='ctx'> CONFIG_RCU_TORTURE_TEST=m</div><div class='ctx'> CONFIG_RCU_CPU_STALL_TIMEOUT=300</div><div class='ctx'> CONFIG_NOTIFIER_ERROR_INJECTION=m</div><div class='hunk'>@@ -611,7 +611,6 @@ CONFIG_TEST_BPF=m</div><div class='ctx'> # CONFIG_STRICT_DEVMEM is not set</div><div class='ctx'> CONFIG_S390_PTDUMP=y</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='del'>-CONFIG_KEYS_DEBUG_PROC_KEYS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_SECURITY_NETWORK=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='head'>diff --git a/arch/s390/configs/gcov_defconfig b/arch/s390/configs/gcov_defconfig<br/>index 5c3097272cd8..d793fec91797 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/configs/gcov_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/configs/gcov_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/configs/gcov_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/gcov_defconfig</a></div><div class='hunk'>@@ -17,11 +17,13 @@ CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_DEVICE=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='del'>-CONFIG_RESOURCE_COUNTERS=y</div><div class='ctx'> CONFIG_CGROUP_PERF=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EXPERT=y</div><div class='add'>+CONFIG_BPF_SYSCALL=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_OPROFILE=m</div><div class='hunk'>@@ -240,9 +242,9 @@ CONFIG_NF_CONNTRACK_IPV4=m</div><div class='ctx'> # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set</div><div class='ctx'> CONFIG_NF_TABLES_IPV4=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='ctx'> CONFIG_NF_NAT_IPV4=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_IP_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='hunk'>@@ -262,8 +264,8 @@ CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV6=m</div><div class='ctx'> CONFIG_NF_TABLES_IPV6=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV6=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_NF_NAT_IPV6=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_IP6_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_EUI64=m</div><div class='hunk'>@@ -350,7 +352,6 @@ CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_OSD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=32768</div><div class='del'>-CONFIG_BLK_DEV_XIP=y</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_VIRTIO_BLK=y</div><div class='hunk'>@@ -455,7 +456,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT2_FS_XIP=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='ctx'> # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='ctx'> CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='hunk'>@@ -538,7 +538,7 @@ CONFIG_DEBUG_INFO=y</div><div class='ctx'> CONFIG_FRAME_WARN=1024</div><div class='ctx'> CONFIG_UNUSED_SYMBOLS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='add'>+CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_TIMER_STATS=y</div><div class='hunk'>@@ -558,7 +558,6 @@ CONFIG_ATOMIC64_SELFTEST=y</div><div class='ctx'> # CONFIG_STRICT_DEVMEM is not set</div><div class='ctx'> CONFIG_S390_PTDUMP=y</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='del'>-CONFIG_KEYS_DEBUG_PROC_KEYS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_SECURITY_NETWORK=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='head'>diff --git a/arch/s390/configs/performance_defconfig b/arch/s390/configs/performance_defconfig<br/>index bda70f1ffd2c..38a77e9c8aa6 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/configs/performance_defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/configs/performance_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/configs/performance_defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/configs/performance_defconfig</a></div><div class='hunk'>@@ -17,11 +17,13 @@ CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_DEVICE=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='del'>-CONFIG_RESOURCE_COUNTERS=y</div><div class='ctx'> CONFIG_CGROUP_PERF=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EXPERT=y</div><div class='add'>+CONFIG_BPF_SYSCALL=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_OPROFILE=m</div><div class='hunk'>@@ -42,9 +44,10 @@ CONFIG_SOLARIS_X86_PARTITION=y</div><div class='ctx'> CONFIG_UNIXWARE_DISKLABEL=y</div><div class='ctx'> CONFIG_CFQ_GROUP_IOSCHED=y</div><div class='ctx'> CONFIG_DEFAULT_DEADLINE=y</div><div class='add'>+CONFIG_LIVEPATCH=y</div><div class='ctx'> CONFIG_MARCH_Z196=y</div><div class='ctx'> CONFIG_TUNE_ZEC12=y</div><div class='del'>-CONFIG_NR_CPUS=256</div><div class='add'>+CONFIG_NR_CPUS=512</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='ctx'> CONFIG_MEMORY_HOTPLUG=y</div><div class='ctx'> CONFIG_MEMORY_HOTREMOVE=y</div><div class='hunk'>@@ -238,9 +241,9 @@ CONFIG_NF_CONNTRACK_IPV4=m</div><div class='ctx'> # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set</div><div class='ctx'> CONFIG_NF_TABLES_IPV4=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV4=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_NF_TABLES_ARP=m</div><div class='ctx'> CONFIG_NF_NAT_IPV4=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV4=m</div><div class='ctx'> CONFIG_IP_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='hunk'>@@ -260,8 +263,8 @@ CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_IPV6=m</div><div class='ctx'> CONFIG_NF_TABLES_IPV6=m</div><div class='ctx'> CONFIG_NFT_CHAIN_ROUTE_IPV6=m</div><div class='del'>-CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_NF_NAT_IPV6=m</div><div class='add'>+CONFIG_NFT_CHAIN_NAT_IPV6=m</div><div class='ctx'> CONFIG_IP6_NF_IPTABLES=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_EUI64=m</div><div class='hunk'>@@ -348,7 +351,6 @@ CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_OSD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=32768</div><div class='del'>-CONFIG_BLK_DEV_XIP=y</div><div class='ctx'> CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_VIRTIO_BLK=y</div><div class='hunk'>@@ -453,7 +455,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT2_FS_XIP=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='ctx'> # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='ctx'> CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='hunk'>@@ -536,7 +537,7 @@ CONFIG_DEBUG_INFO=y</div><div class='ctx'> CONFIG_FRAME_WARN=1024</div><div class='ctx'> CONFIG_UNUSED_SYMBOLS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='add'>+CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_TIMER_STATS=y</div><div class='ctx'> CONFIG_RCU_TORTURE_TEST=m</div><div class='hunk'>@@ -553,7 +554,6 @@ CONFIG_ATOMIC64_SELFTEST=y</div><div class='ctx'> # CONFIG_STRICT_DEVMEM is not set</div><div class='ctx'> CONFIG_S390_PTDUMP=y</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='del'>-CONFIG_KEYS_DEBUG_PROC_KEYS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_SECURITY_NETWORK=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='head'>diff --git a/arch/s390/defconfig b/arch/s390/defconfig<br/>index 83ef702d2403..9256b48e7e43 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/defconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/defconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/defconfig</a></div><div class='hunk'>@@ -8,7 +8,6 @@ CONFIG_TASKSTATS=y</div><div class='ctx'> CONFIG_TASK_DELAY_ACCT=y</div><div class='ctx'> CONFIG_TASK_XACCT=y</div><div class='ctx'> CONFIG_TASK_IO_ACCOUNTING=y</div><div class='del'>-CONFIG_RCU_FAST_NO_HZ=y</div><div class='ctx'> CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='ctx'> CONFIG_CGROUPS=y</div><div class='hunk'>@@ -31,9 +30,11 @@ CONFIG_JUMP_LABEL=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='add'>+CONFIG_BLK_DEV_INTEGRITY=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_IBM_PARTITION=y</div><div class='ctx'> CONFIG_DEFAULT_DEADLINE=y</div><div class='add'>+CONFIG_LIVEPATCH=y</div><div class='ctx'> CONFIG_MARCH_Z196=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='hunk'>@@ -41,7 +42,6 @@ CONFIG_MEMORY_HOTPLUG=y</div><div class='ctx'> CONFIG_MEMORY_HOTREMOVE=y</div><div class='ctx'> CONFIG_KSM=y</div><div class='ctx'> CONFIG_TRANSPARENT_HUGEPAGE=y</div><div class='del'>-CONFIG_CMA=y</div><div class='ctx'> CONFIG_CRASH_DUMP=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='ctx'> CONFIG_HIBERNATION=y</div><div class='hunk'>@@ -125,6 +125,7 @@ CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_PAGEALLOC=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='add'>+CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_TIMER_STATS=y</div><div class='ctx'> CONFIG_DEBUG_RT_MUTEXES=y</div><div class='ctx'> CONFIG_PROVE_LOCKING=y</div><div class='hunk'>@@ -135,12 +136,16 @@ CONFIG_DEBUG_LIST=y</div><div class='ctx'> CONFIG_DEBUG_PI_LIST=y</div><div class='ctx'> CONFIG_DEBUG_SG=y</div><div class='ctx'> CONFIG_DEBUG_NOTIFIERS=y</div><div class='del'>-CONFIG_PROVE_RCU=y</div><div class='ctx'> CONFIG_RCU_CPU_STALL_TIMEOUT=60</div><div class='add'>+# CONFIG_RCU_CPU_STALL_INFO is not set</div><div class='ctx'> CONFIG_RCU_TRACE=y</div><div class='ctx'> CONFIG_LATENCYTOP=y</div><div class='ctx'> CONFIG_DEBUG_STRICT_USER_COPY_CHECKS=y</div><div class='add'>+CONFIG_TRACER_SNAPSHOT=y</div><div class='add'>+CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y</div><div class='add'>+CONFIG_STACK_TRACER=y</div><div class='ctx'> CONFIG_BLK_DEV_IO_TRACE=y</div><div class='add'>+CONFIG_UPROBE_EVENT=y</div><div class='ctx'> CONFIG_KPROBES_SANITY_TEST=y</div><div class='ctx'> # CONFIG_STRICT_DEVMEM is not set</div><div class='ctx'> CONFIG_S390_PTDUMP=y</div><div class='hunk'>@@ -187,6 +192,7 @@ CONFIG_CRYPTO_ZLIB=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> CONFIG_CRYPTO_LZ4=m</div><div class='ctx'> CONFIG_CRYPTO_LZ4HC=m</div><div class='add'>+CONFIG_CRYPTO_ANSI_CPRNG=m</div><div class='ctx'> CONFIG_ZCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA256_S390=m</div><div class='head'>diff --git a/arch/s390/hypfs/hypfs_sprp.c b/arch/s390/hypfs/hypfs_sprp.c<br/>index f043c3c7e73c..dd42a26d049d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/hypfs/hypfs_sprp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/hypfs/hypfs_sprp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/hypfs/hypfs_sprp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/hypfs/hypfs_sprp.c</a></div><div class='hunk'>@@ -128,14 +128,14 @@ static struct hypfs_dbfs_file hypfs_sprp_file = {</div><div class='ctx'> </div><div class='ctx'> int hypfs_sprp_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (!sclp_has_sprp())</div><div class='add'>+	if (!sclp.has_sprp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return hypfs_dbfs_create_file(&amp;hypfs_sprp_file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hypfs_sprp_exit(void)</div><div class='ctx'> {</div><div class='del'>-	if (!sclp_has_sprp())</div><div class='add'>+	if (!sclp.has_sprp)</div><div class='ctx'> 		return;</div><div class='ctx'> 	hypfs_dbfs_remove_file(&amp;hypfs_sprp_file);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c<br/>index d3f896a35b98..b2e5902bd8f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/hypfs/inode.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/hypfs/inode.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/hypfs/inode.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/hypfs/inode.c</a></div><div class='hunk'>@@ -62,18 +62,13 @@ static void hypfs_add_dentry(struct dentry *dentry)</div><div class='ctx'> 	hypfs_last_dentry = dentry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int hypfs_positive(struct dentry *dentry)</div><div class='del'>-{</div><div class='del'>-	return d_really_is_positive(dentry) &amp;&amp; !d_unhashed(dentry);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hypfs_remove(struct dentry *dentry)</div><div class='ctx'> {</div><div class='ctx'> 	struct dentry *parent;</div><div class='ctx'> </div><div class='ctx'> 	parent = dentry-&gt;d_parent;</div><div class='ctx'> 	mutex_lock(&amp;d_inode(parent)-&gt;i_mutex);</div><div class='del'>-	if (hypfs_positive(dentry)) {</div><div class='add'>+	if (simple_positive(dentry)) {</div><div class='ctx'> 		if (d_is_dir(dentry))</div><div class='ctx'> 			simple_rmdir(d_inode(parent), dentry);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -456,8 +451,6 @@ static const struct super_operations hypfs_s_ops = {</div><div class='ctx'> 	.show_options	= hypfs_show_options,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct kobject *s390_kobj;</div><div class='del'>-</div><div class='ctx'> static int __init hypfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -481,18 +474,16 @@ static int __init hypfs_init(void)</div><div class='ctx'> 		rc = -ENODATA;</div><div class='ctx'> 		goto fail_hypfs_sprp_exit;</div><div class='ctx'> 	}</div><div class='del'>-	s390_kobj = kobject_create_and_add("s390", hypervisor_kobj);</div><div class='del'>-	if (!s390_kobj) {</div><div class='del'>-		rc = -ENOMEM;</div><div class='add'>+	rc = sysfs_create_mount_point(hypervisor_kobj, "s390");</div><div class='add'>+	if (rc)</div><div class='ctx'> 		goto fail_hypfs_diag0c_exit;</div><div class='del'>-	}</div><div class='ctx'> 	rc = register_filesystem(&amp;hypfs_type);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto fail_filesystem;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail_filesystem:</div><div class='del'>-	kobject_put(s390_kobj);</div><div class='add'>+	sysfs_remove_mount_point(hypervisor_kobj, "s390");</div><div class='ctx'> fail_hypfs_diag0c_exit:</div><div class='ctx'> 	hypfs_diag0c_exit();</div><div class='ctx'> fail_hypfs_sprp_exit:</div><div class='hunk'>@@ -510,7 +501,7 @@ fail_dbfs_exit:</div><div class='ctx'> static void __exit hypfs_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	unregister_filesystem(&amp;hypfs_type);</div><div class='del'>-	kobject_put(s390_kobj);</div><div class='add'>+	sysfs_remove_mount_point(hypervisor_kobj, "s390");</div><div class='ctx'> 	hypfs_diag0c_exit();</div><div class='ctx'> 	hypfs_sprp_exit();</div><div class='ctx'> 	hypfs_vm_exit();</div><div class='head'>diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild<br/>index c631f98fd524..5ad26dd94d77 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/Kbuild</a></div><div class='hunk'>@@ -3,6 +3,6 @@</div><div class='ctx'> generic-y += clkdev.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h<br/>index 8d724718ec21..e6f8615a11eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/barrier.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> #define smp_mb__before_atomic()		smp_mb()</div><div class='ctx'> #define smp_mb__after_atomic()		smp_mb()</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value)		do { var = value; mb(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define smp_store_release(p, v)						\</div><div class='ctx'> do {									\</div><div class='head'>diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h<br/>index 4eadec466b8c..411464f4c97a 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -32,8 +32,6 @@</div><div class='ctx'> 	__old;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG</div><div class='del'>-</div><div class='ctx'> #define __cmpxchg_double_op(p1, p2, o1, o2, n1, n2, insn)		\</div><div class='ctx'> ({									\</div><div class='ctx'> 	register __typeof__(*(p1)) __old1 asm("2") = (o1);		\</div><div class='head'>diff --git a/arch/s390/include/asm/cpu.h b/arch/s390/include/asm/cpu.h<br/>index f5a8e2fcde0c..91541000378e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/cpu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/cpu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/cpu.h</a></div><div class='hunk'>@@ -8,8 +8,6 @@</div><div class='ctx'> #ifndef _ASM_S390_CPU_H</div><div class='ctx'> #define _ASM_S390_CPU_H</div><div class='ctx'> </div><div class='del'>-#define MAX_CPU_ADDRESS 255</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/arch/s390/include/asm/ctl_reg.h b/arch/s390/include/asm/ctl_reg.h<br/>index cfad7fca01d6..d7697ab802f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/ctl_reg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/ctl_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/ctl_reg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/ctl_reg.h</a></div><div class='hunk'>@@ -57,7 +57,10 @@ union ctlreg0 {</div><div class='ctx'> 		unsigned long lap  : 1; /* Low-address-protection control */</div><div class='ctx'> 		unsigned long	   : 4;</div><div class='ctx'> 		unsigned long edat : 1; /* Enhanced-DAT-enablement control */</div><div class='del'>-		unsigned long	   : 23;</div><div class='add'>+		unsigned long	   : 4;</div><div class='add'>+		unsigned long afp  : 1; /* AFP-register control */</div><div class='add'>+		unsigned long vx   : 1; /* Vector enablement control */</div><div class='add'>+		unsigned long	   : 17;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/hugetlb.h b/arch/s390/include/asm/hugetlb.h<br/>index 11eae5f55b70..d9be7c0c1291 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #define is_hugepage_only_range(mm, addr, len)	0</div><div class='ctx'> #define hugetlb_free_pgd_range			free_pgd_range</div><div class='add'>+#define hugepages_supported()			(MACHINE_HAS_HPAGE)</div><div class='ctx'> </div><div class='ctx'> void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		     pte_t *ptep, pte_t pte);</div><div class='hunk'>@@ -35,12 +36,8 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define hugetlb_prefault_arch_hook(mm)		do { } while (0)</div><div class='ctx'> #define arch_clear_hugepage_flags(page)		do { } while (0)</div><div class='ctx'> </div><div class='del'>-int arch_prepare_hugepage(struct page *page);</div><div class='del'>-void arch_release_hugepage(struct page *page);</div><div class='del'>-</div><div class='ctx'> static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				  pte_t *ptep)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/include/asm/io.h b/arch/s390/include/asm/io.h<br/>index 30fd5c84680e..cb5fdf3a78fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/io.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@ void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);</div><div class='ctx'> </div><div class='ctx'> #define ioremap_nocache(addr, size)	ioremap(addr, size)</div><div class='ctx'> #define ioremap_wc			ioremap_nocache</div><div class='add'>+#define ioremap_wt			ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *ioremap(unsigned long offset, unsigned long size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/include/asm/ipl.h b/arch/s390/include/asm/ipl.h<br/>index ece606c2ee86..39ae6a359747 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/ipl.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/ipl.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/ipl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/ipl.h</a></div><div class='hunk'>@@ -94,7 +94,6 @@ struct dump_save_areas {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct dump_save_areas dump_save_areas;</div><div class='del'>-struct save_area_ext *dump_save_area_create(int cpu);</div><div class='ctx'> </div><div class='ctx'> extern void do_reipl(void);</div><div class='ctx'> extern void do_halt(void);</div><div class='head'>diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h<br/>index d01fc588b5c3..3024acbe1f9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -80,6 +80,7 @@ struct sca_block {</div><div class='ctx'> #define CPUSTAT_MCDS       0x00000100</div><div class='ctx'> #define CPUSTAT_SM         0x00000080</div><div class='ctx'> #define CPUSTAT_IBS        0x00000040</div><div class='add'>+#define CPUSTAT_GED2       0x00000010</div><div class='ctx'> #define CPUSTAT_G          0x00000008</div><div class='ctx'> #define CPUSTAT_GED        0x00000004</div><div class='ctx'> #define CPUSTAT_J          0x00000002</div><div class='hunk'>@@ -95,7 +96,8 @@ struct kvm_s390_sie_block {</div><div class='ctx'> #define PROG_IN_SIE (1&lt;&lt;0)</div><div class='ctx'> 	__u32	prog0c;			/* 0x000c */</div><div class='ctx'> 	__u8	reserved10[16];		/* 0x0010 */</div><div class='del'>-#define PROG_BLOCK_SIE 0x00000001</div><div class='add'>+#define PROG_BLOCK_SIE	(1&lt;&lt;0)</div><div class='add'>+#define PROG_REQUEST	(1&lt;&lt;1)</div><div class='ctx'> 	atomic_t prog20;		/* 0x0020 */</div><div class='ctx'> 	__u8	reserved24[4];		/* 0x0024 */</div><div class='ctx'> 	__u64	cputm;			/* 0x0028 */</div><div class='hunk'>@@ -634,7 +636,7 @@ static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}</div><div class='ctx'> static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}</div><div class='ctx'> static inline void kvm_arch_free_memslot(struct kvm *kvm,</div><div class='ctx'> 		struct kvm_memory_slot *free, struct kvm_memory_slot *dont) {}</div><div class='del'>-static inline void kvm_arch_memslots_updated(struct kvm *kvm) {}</div><div class='add'>+static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm,</div><div class='ctx'> 		struct kvm_memory_slot *slot) {}</div><div class='head'>diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h<br/>index 4cb19fe76dd9..f897ec73dc8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/perf_event.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/perf_event.h</a></div><div class='hunk'>@@ -87,7 +87,15 @@ struct sf_raw_sample {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> /* Perf hardware reserve and release functions */</div><div class='add'>+#ifdef CONFIG_PERF_EVENTS</div><div class='ctx'> int perf_reserve_sampling(void);</div><div class='ctx'> void perf_release_sampling(void);</div><div class='add'>+#else /* CONFIG_PERF_EVENTS */</div><div class='add'>+static inline int perf_reserve_sampling(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static inline void perf_release_sampling(void) {}</div><div class='add'>+#endif /* CONFIG_PERF_EVENTS */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_S390_PERF_EVENT_H */</div><div class='head'>diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h<br/>index ef24a212eeb7..f66d82798a6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/pgtable.h</a></div><div class='hunk'>@@ -1498,9 +1498,9 @@ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,</div><div class='ctx'> 	return pmd_young(pmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long address, pmd_t *pmdp)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+					    unsigned long address, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd = *pmdp;</div><div class='ctx'> </div><div class='hunk'>@@ -1509,10 +1509,10 @@ static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 	return pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR_FULL</div><div class='del'>-static inline pmd_t pmdp_get_and_clear_full(struct mm_struct *mm,</div><div class='del'>-					    unsigned long address,</div><div class='del'>-					    pmd_t *pmdp, int full)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,</div><div class='add'>+						 unsigned long address,</div><div class='add'>+						 pmd_t *pmdp, int full)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd = *pmdp;</div><div class='ctx'> </div><div class='hunk'>@@ -1522,11 +1522,11 @@ static inline pmd_t pmdp_get_and_clear_full(struct mm_struct *mm,</div><div class='ctx'> 	return pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_CLEAR_FLUSH</div><div class='del'>-static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,</div><div class='del'>-				     unsigned long address, pmd_t *pmdp)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH</div><div class='add'>+static inline pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,</div><div class='add'>+					  unsigned long address, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='del'>-	return pmdp_get_and_clear(vma-&gt;vm_mm, address, pmdp);</div><div class='add'>+	return pmdp_huge_get_and_clear(vma-&gt;vm_mm, address, pmdp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PMDP_INVALIDATE</div><div class='hunk'>@@ -1548,6 +1548,14 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,</div><div class='add'>+					unsigned long address,</div><div class='add'>+					pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	return pmdp_huge_get_and_clear(vma-&gt;vm_mm, address, pmdp);</div><div class='add'>+}</div><div class='add'>+#define pmdp_collapse_flush pmdp_collapse_flush</div><div class='add'>+</div><div class='ctx'> #define pfn_pmd(pfn, pgprot)	mk_pmd_phys(__pa((pfn) &lt;&lt; PAGE_SHIFT), (pgprot))</div><div class='ctx'> #define mk_pmd(page, pgprot)	pfn_pmd(page_to_pfn(page), (pgprot))</div><div class='ctx'> </div><div class='hunk'>@@ -1565,9 +1573,9 @@ static inline int has_transparent_hugepage(void)</div><div class='ctx'> /*</div><div class='ctx'>  * 64 bit swap entry format:</div><div class='ctx'>  * A page-table entry has some bits we have to treat in a special way.</div><div class='del'>- * Bits 52 and bit 55 have to be zero, otherwise an specification</div><div class='add'>+ * Bits 52 and bit 55 have to be zero, otherwise a specification</div><div class='ctx'>  * exception will occur instead of a page translation exception. The</div><div class='del'>- * specifiation exception has the bad habit not to store necessary</div><div class='add'>+ * specification exception has the bad habit not to store necessary</div><div class='ctx'>  * information in the lowcore.</div><div class='ctx'>  * Bits 54 and 63 are used to indicate the page type.</div><div class='ctx'>  * A swap pte is indicated by bit pattern (pte &amp; 0x201) == 0x200</div><div class='head'>diff --git a/arch/s390/include/asm/sclp.h b/arch/s390/include/asm/sclp.h<br/>index f1096bab5199..f6ff06077631 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/sclp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/sclp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/sclp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/sclp.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define SCLP_CHP_INFO_MASK_SIZE		32</div><div class='add'>+#define SCLP_MAX_CORES			256</div><div class='ctx'> </div><div class='ctx'> struct sclp_chp_info {</div><div class='ctx'> 	u8 recognized[SCLP_CHP_INFO_MASK_SIZE];</div><div class='hunk'>@@ -26,7 +27,7 @@ struct sclp_ipl_info {</div><div class='ctx'> 	char loadparm[LOADPARM_LEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct sclp_cpu_entry {</div><div class='add'>+struct sclp_core_entry {</div><div class='ctx'> 	u8 core_id;</div><div class='ctx'> 	u8 reserved0[2];</div><div class='ctx'> 	u8 : 3;</div><div class='hunk'>@@ -38,41 +39,46 @@ struct sclp_cpu_entry {</div><div class='ctx'> 	u8 reserved1;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='del'>-struct sclp_cpu_info {</div><div class='add'>+struct sclp_core_info {</div><div class='ctx'> 	unsigned int configured;</div><div class='ctx'> 	unsigned int standby;</div><div class='ctx'> 	unsigned int combined;</div><div class='del'>-	int has_cpu_type;</div><div class='del'>-	struct sclp_cpu_entry cpu[MAX_CPU_ADDRESS + 1];</div><div class='add'>+	struct sclp_core_entry core[SCLP_MAX_CORES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int sclp_get_cpu_info(struct sclp_cpu_info *info);</div><div class='del'>-int sclp_cpu_configure(u8 cpu);</div><div class='del'>-int sclp_cpu_deconfigure(u8 cpu);</div><div class='del'>-unsigned long long sclp_get_rnmax(void);</div><div class='del'>-unsigned long long sclp_get_rzm(void);</div><div class='del'>-unsigned int sclp_get_max_cpu(void);</div><div class='del'>-unsigned int sclp_get_mtid(u8 cpu_type);</div><div class='del'>-unsigned int sclp_get_mtid_max(void);</div><div class='del'>-unsigned int sclp_get_mtid_prev(void);</div><div class='add'>+struct sclp_info {</div><div class='add'>+	unsigned char has_linemode : 1;</div><div class='add'>+	unsigned char has_vt220 : 1;</div><div class='add'>+	unsigned char has_siif : 1;</div><div class='add'>+	unsigned char has_sigpif : 1;</div><div class='add'>+	unsigned char has_core_type : 1;</div><div class='add'>+	unsigned char has_sprp : 1;</div><div class='add'>+	unsigned int ibc;</div><div class='add'>+	unsigned int mtid;</div><div class='add'>+	unsigned int mtid_cp;</div><div class='add'>+	unsigned int mtid_prev;</div><div class='add'>+	unsigned long long rzm;</div><div class='add'>+	unsigned long long rnmax;</div><div class='add'>+	unsigned long long hamax;</div><div class='add'>+	unsigned int max_cores;</div><div class='add'>+	unsigned long hsa_size;</div><div class='add'>+	unsigned long long facilities;</div><div class='add'>+};</div><div class='add'>+extern struct sclp_info sclp;</div><div class='add'>+</div><div class='add'>+int sclp_get_core_info(struct sclp_core_info *info);</div><div class='add'>+int sclp_core_configure(u8 core);</div><div class='add'>+int sclp_core_deconfigure(u8 core);</div><div class='ctx'> int sclp_sdias_blk_count(void);</div><div class='ctx'> int sclp_sdias_copy(void *dest, int blk_num, int nr_blks);</div><div class='ctx'> int sclp_chp_configure(struct chp_id chpid);</div><div class='ctx'> int sclp_chp_deconfigure(struct chp_id chpid);</div><div class='ctx'> int sclp_chp_read_info(struct sclp_chp_info *info);</div><div class='ctx'> void sclp_get_ipl_info(struct sclp_ipl_info *info);</div><div class='del'>-bool __init sclp_has_linemode(void);</div><div class='del'>-bool __init sclp_has_vt220(void);</div><div class='del'>-bool sclp_has_sprp(void);</div><div class='ctx'> int sclp_pci_configure(u32 fid);</div><div class='ctx'> int sclp_pci_deconfigure(u32 fid);</div><div class='ctx'> int memcpy_hsa(void *dest, unsigned long src, size_t count, int mode);</div><div class='del'>-unsigned long sclp_get_hsa_size(void);</div><div class='ctx'> void sclp_early_detect(void);</div><div class='del'>-int sclp_has_siif(void);</div><div class='del'>-int sclp_has_sigpif(void);</div><div class='del'>-unsigned int sclp_get_ibc(void);</div><div class='del'>-</div><div class='ctx'> long _sclp_print_early(const char *);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_S390_SCLP_H */</div><div class='head'>diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h<br/>index b3bd0282dd98..5df26b11cf47 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/smp.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@ extern void smp_call_ipl_cpu(void (*func)(void *), void *);</div><div class='ctx'> </div><div class='ctx'> extern int smp_find_processor_id(u16 address);</div><div class='ctx'> extern int smp_store_status(int cpu);</div><div class='add'>+extern void smp_save_dump_cpus(void);</div><div class='ctx'> extern int smp_vcpu_scheduled(int cpu);</div><div class='ctx'> extern void smp_yield_cpu(int cpu);</div><div class='ctx'> extern void smp_cpu_set_polarization(int cpu, int val);</div><div class='hunk'>@@ -54,6 +55,7 @@ static inline int smp_store_status(int cpu) { return 0; }</div><div class='ctx'> static inline int smp_vcpu_scheduled(int cpu) { return 1; }</div><div class='ctx'> static inline void smp_yield_cpu(int cpu) { }</div><div class='ctx'> static inline void smp_fill_possible_mask(void) { }</div><div class='add'>+static inline void smp_save_dump_cpus(void) { }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h<br/>index 98eb2a579223..dcb6312a0b91 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/timex.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/timex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/timex.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/timex.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #define _ASM_S390_TIMEX_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/lowcore.h&gt;</div><div class='add'>+#include &lt;linux/time64.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The value of the TOD clock for 1.1.1970. */</div><div class='ctx'> #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL</div><div class='hunk'>@@ -108,10 +109,10 @@ int get_sync_clock(unsigned long long *clock);</div><div class='ctx'> void init_cpu_timer(void);</div><div class='ctx'> unsigned long long monotonic_clock(void);</div><div class='ctx'> </div><div class='del'>-void tod_to_timeval(__u64, struct timespec *);</div><div class='add'>+void tod_to_timeval(__u64 todval, struct timespec64 *xt);</div><div class='ctx'> </div><div class='ctx'> static inline</div><div class='del'>-void stck_to_timespec(unsigned long long stck, struct timespec *ts)</div><div class='add'>+void stck_to_timespec64(unsigned long long stck, struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	tod_to_timeval(stck - TOD_UNIX_EPOCH, ts);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h<br/>index b1453a2ae1ca..4990f6c66288 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/topology.h</a></div><div class='hunk'>@@ -22,7 +22,8 @@ DECLARE_PER_CPU(struct cpu_topology_s390, cpu_topology);</div><div class='ctx'> </div><div class='ctx'> #define topology_physical_package_id(cpu) (per_cpu(cpu_topology, cpu).socket_id)</div><div class='ctx'> #define topology_thread_id(cpu)		  (per_cpu(cpu_topology, cpu).thread_id)</div><div class='del'>-#define topology_thread_cpumask(cpu)	  (&amp;per_cpu(cpu_topology, cpu).thread_mask)</div><div class='add'>+#define topology_sibling_cpumask(cpu) \</div><div class='add'>+		(&amp;per_cpu(cpu_topology, cpu).thread_mask)</div><div class='ctx'> #define topology_core_id(cpu)		  (per_cpu(cpu_topology, cpu).core_id)</div><div class='ctx'> #define topology_core_cpumask(cpu)	  (&amp;per_cpu(cpu_topology, cpu).core_mask)</div><div class='ctx'> #define topology_book_id(cpu)		  (per_cpu(cpu_topology, cpu).book_id)</div><div class='head'>diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h<br/>index d64a7a62164f..9dd4cc47ddc7 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/include/asm/uaccess.h</a></div><div class='hunk'>@@ -98,7 +98,8 @@ static inline unsigned long extable_fixup(const struct exception_table_entry *x)</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -118,7 +119,8 @@ unsigned long __must_check __copy_from_user(void *to, const void __user *from,</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:	  Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.	This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -264,7 +266,8 @@ int __get_user_bad(void) __attribute__((noreturn));</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -290,7 +293,8 @@ __compiletime_warning("copy_from_user() buffer size is not provably correct")</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -348,7 +352,8 @@ static inline unsigned long strnlen_user(const char __user *src, unsigned long n</div><div class='ctx'>  * strlen_user: - Get the size of a string in user space.</div><div class='ctx'>  * @str: The string to measure.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Get the size of a NUL-terminated string in user space.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/s390/kernel/base.S b/arch/s390/kernel/base.S<br/>index daed3fde42ec..326f717df587 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/base.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/base.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/base.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/base.S</a></div><div class='hunk'>@@ -78,15 +78,20 @@ s390_base_pgm_handler_fn:</div><div class='ctx'> #</div><div class='ctx'> # Calls diag 308 subcode 1 and continues execution</div><div class='ctx'> #</div><div class='del'>-# The following conditions must be ensured before calling this function:</div><div class='del'>-# * Prefix register = 0</div><div class='del'>-# * Lowcore protection is disabled</div><div class='del'>-#</div><div class='ctx'> ENTRY(diag308_reset)</div><div class='ctx'> 	larl	%r4,.Lctlregs		# Save control registers</div><div class='ctx'> 	stctg	%c0,%c15,0(%r4)</div><div class='add'>+	lg	%r2,0(%r4)		# Disable lowcore protection</div><div class='add'>+	nilh	%r2,0xefff</div><div class='add'>+	larl	%r4,.Lctlreg0</div><div class='add'>+	stg	%r2,0(%r4)</div><div class='add'>+	lctlg	%c0,%c0,0(%r4)</div><div class='ctx'> 	larl	%r4,.Lfpctl		# Floating point control register</div><div class='ctx'> 	stfpc	0(%r4)</div><div class='add'>+	larl	%r4,.Lprefix		# Save prefix register</div><div class='add'>+	stpx	0(%r4)</div><div class='add'>+	larl	%r4,.Lprefix_zero	# Set prefix register to 0</div><div class='add'>+	spx	0(%r4)</div><div class='ctx'> 	larl	%r4,.Lcontinue_psw	# Save PSW flags</div><div class='ctx'> 	epsw	%r2,%r3</div><div class='ctx'> 	stm	%r2,%r3,0(%r4)</div><div class='hunk'>@@ -106,6 +111,8 @@ ENTRY(diag308_reset)</div><div class='ctx'> 	lctlg	%c0,%c15,0(%r4)</div><div class='ctx'> 	larl	%r4,.Lfpctl		# Restore floating point ctl register</div><div class='ctx'> 	lfpc	0(%r4)</div><div class='add'>+	larl	%r4,.Lprefix		# Restore prefix register</div><div class='add'>+	spx	0(%r4)</div><div class='ctx'> 	larl	%r4,.Lcontinue_psw	# Restore PSW flags</div><div class='ctx'> 	lpswe	0(%r4)</div><div class='ctx'> .Lcontinue:</div><div class='hunk'>@@ -122,10 +129,16 @@ ENTRY(diag308_reset)</div><div class='ctx'> </div><div class='ctx'> 	.section .bss</div><div class='ctx'> .align 8</div><div class='add'>+.Lctlreg0:</div><div class='add'>+	.quad	0</div><div class='ctx'> .Lctlregs:</div><div class='ctx'> 	.rept	16</div><div class='ctx'> 	.quad	0</div><div class='ctx'> 	.endr</div><div class='ctx'> .Lfpctl:</div><div class='ctx'> 	.long	0</div><div class='add'>+.Lprefix:</div><div class='add'>+	.long	0</div><div class='add'>+.Lprefix_zero:</div><div class='add'>+	.long	0</div><div class='ctx'> 	.previous</div><div class='head'>diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c<br/>index d7fa2f0f1425..f8498dde67b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/compat_wrapper.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/compat_wrapper.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/compat_wrapper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/compat_wrapper.c</a></div><div class='hunk'>@@ -202,7 +202,7 @@ COMPAT_SYSCALL_WRAP1(epoll_create1, int, flags);</div><div class='ctx'> COMPAT_SYSCALL_WRAP2(tkill, int, pid, int, sig);</div><div class='ctx'> COMPAT_SYSCALL_WRAP3(tgkill, int, tgid, int, pid, int, sig);</div><div class='ctx'> COMPAT_SYSCALL_WRAP5(perf_event_open, struct perf_event_attr __user *, attr_uptr, pid_t, pid, int, cpu, int, group_fd, unsigned long, flags);</div><div class='del'>-COMPAT_SYSCALL_WRAP5(clone, unsigned long, newsp, unsigned long, clone_flags, int __user *, parent_tidptr, int __user *, child_tidptr, int, tls_val);</div><div class='add'>+COMPAT_SYSCALL_WRAP5(clone, unsigned long, newsp, unsigned long, clone_flags, int __user *, parent_tidptr, int __user *, child_tidptr, unsigned long, tls);</div><div class='ctx'> COMPAT_SYSCALL_WRAP2(fanotify_init, unsigned int, flags, unsigned int, event_f_flags);</div><div class='ctx'> COMPAT_SYSCALL_WRAP4(prlimit64, pid_t, pid, unsigned int, resource, const struct rlimit64 __user *, new_rlim, struct rlimit64 __user *, old_rlim);</div><div class='ctx'> COMPAT_SYSCALL_WRAP5(name_to_handle_at, int, dfd, const char __user *, name, struct file_handle __user *, handle, int __user *, mnt_id, int, flag);</div><div class='head'>diff --git a/arch/s390/kernel/crash_dump.c b/arch/s390/kernel/crash_dump.c<br/>index 9f73c8059022..0c6c01eb3613 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/crash_dump.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/crash_dump.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/crash_dump.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/crash_dump.c</a></div><div class='hunk'>@@ -33,42 +33,18 @@ static struct memblock_type oldmem_type = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define for_each_dump_mem_range(i, nid, p_start, p_end, p_nid)		\</div><div class='del'>-	for (i = 0, __next_mem_range(&amp;i, nid, &amp;memblock.physmem,	\</div><div class='add'>+	for (i = 0, __next_mem_range(&amp;i, nid, MEMBLOCK_NONE,		\</div><div class='add'>+				     &amp;memblock.physmem,			\</div><div class='ctx'> 				     &amp;oldmem_type, p_start,		\</div><div class='ctx'> 				     p_end, p_nid);			\</div><div class='ctx'> 	     i != (u64)ULLONG_MAX;					\</div><div class='del'>-	     __next_mem_range(&amp;i, nid, &amp;memblock.physmem,		\</div><div class='add'>+	     __next_mem_range(&amp;i, nid, MEMBLOCK_NONE, &amp;memblock.physmem,\</div><div class='ctx'> 			      &amp;oldmem_type,				\</div><div class='ctx'> 			      p_start, p_end, p_nid))</div><div class='ctx'> </div><div class='ctx'> struct dump_save_areas dump_save_areas;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Allocate and add a save area for a CPU</div><div class='del'>- */</div><div class='del'>-struct save_area_ext *dump_save_area_create(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct save_area_ext **save_areas, *save_area;</div><div class='del'>-</div><div class='del'>-	save_area = kmalloc(sizeof(*save_area), GFP_KERNEL);</div><div class='del'>-	if (!save_area)</div><div class='del'>-		return NULL;</div><div class='del'>-	if (cpu + 1 &gt; dump_save_areas.count) {</div><div class='del'>-		dump_save_areas.count = cpu + 1;</div><div class='del'>-		save_areas = krealloc(dump_save_areas.areas,</div><div class='del'>-				      dump_save_areas.count * sizeof(void *),</div><div class='del'>-				      GFP_KERNEL | __GFP_ZERO);</div><div class='del'>-		if (!save_areas) {</div><div class='del'>-			kfree(save_area);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		dump_save_areas.areas = save_areas;</div><div class='del'>-	}</div><div class='del'>-	dump_save_areas.areas[cpu] = save_area;</div><div class='del'>-	return save_area;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Return physical address for virtual address</div><div class='ctx'>  */</div><div class='ctx'> static inline void *load_real_addr(void *addr)</div><div class='hunk'>@@ -122,7 +98,7 @@ static ssize_t copy_oldmem_page_zfcpdump(char *buf, size_t csize,</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (src &lt; sclp_get_hsa_size()) {</div><div class='add'>+	if (src &lt; sclp.hsa_size) {</div><div class='ctx'> 		rc = memcpy_hsa(buf, src, csize, userbuf);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (userbuf)</div><div class='hunk'>@@ -215,7 +191,7 @@ static int remap_oldmem_pfn_range_zfcpdump(struct vm_area_struct *vma,</div><div class='ctx'> 					   unsigned long pfn,</div><div class='ctx'> 					   unsigned long size, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	unsigned long hsa_end = sclp_get_hsa_size();</div><div class='add'>+	unsigned long hsa_end = sclp.hsa_size;</div><div class='ctx'> 	unsigned long size_hsa;</div><div class='ctx'> </div><div class='ctx'> 	if (pfn &lt; hsa_end &gt;&gt; PAGE_SHIFT) {</div><div class='hunk'>@@ -258,7 +234,7 @@ int copy_from_oldmem(void *dest, void *src, size_t count)</div><div class='ctx'> 				return rc;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		unsigned long hsa_end = sclp_get_hsa_size();</div><div class='add'>+		unsigned long hsa_end = sclp.hsa_size;</div><div class='ctx'> 		if ((unsigned long) src &lt; hsa_end) {</div><div class='ctx'> 			copied = min(count, hsa_end - (unsigned long) src);</div><div class='ctx'> 			rc = memcpy_hsa(dest, (unsigned long) src, copied, 0);</div><div class='hunk'>@@ -415,7 +391,7 @@ static void *nt_s390_vx_low(void *ptr, __vector128 *vx_regs)</div><div class='ctx'> 	ptr += len;</div><div class='ctx'> 	/* Copy lower halves of SIMD registers 0-15 */</div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		memcpy(ptr, &amp;vx_regs[i], 8);</div><div class='add'>+		memcpy(ptr, &amp;vx_regs[i].u[2], 8);</div><div class='ctx'> 		ptr += 8;</div><div class='ctx'> 	}</div><div class='ctx'> 	return ptr;</div><div class='hunk'>@@ -609,7 +585,7 @@ int elfcorehdr_alloc(unsigned long long *addr, unsigned long long *size)</div><div class='ctx'> 	if (elfcorehdr_addr != ELFCORE_ADDR_MAX)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	/* If we cannot get HSA size for zfcpdump return error */</div><div class='del'>-	if (ipl_info.type == IPL_TYPE_FCP_DUMP &amp;&amp; !sclp_get_hsa_size())</div><div class='add'>+	if (ipl_info.type == IPL_TYPE_FCP_DUMP &amp;&amp; !sclp.hsa_size)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* For kdump, exclude previous crashkernel memory */</div><div class='head'>diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c<br/>index c1f21aca76e7..6fca0e46464e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/debug.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/debug.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/debug.c</a></div><div class='hunk'>@@ -1457,23 +1457,24 @@ int</div><div class='ctx'> debug_dflt_header_fn(debug_info_t * id, struct debug_view *view,</div><div class='ctx'> 			 int area, debug_entry_t * entry, char *out_buf)</div><div class='ctx'> {</div><div class='del'>-	struct timespec time_spec;</div><div class='add'>+	struct timespec64 time_spec;</div><div class='ctx'> 	char *except_str;</div><div class='ctx'> 	unsigned long caller;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	unsigned int level;</div><div class='ctx'> </div><div class='ctx'> 	level = entry-&gt;id.fields.level;</div><div class='del'>-	stck_to_timespec(entry-&gt;id.stck, &amp;time_spec);</div><div class='add'>+	stck_to_timespec64(entry-&gt;id.stck, &amp;time_spec);</div><div class='ctx'> </div><div class='ctx'> 	if (entry-&gt;id.fields.exception)</div><div class='ctx'> 		except_str = "*";</div><div class='ctx'> 	else</div><div class='ctx'> 		except_str = "-";</div><div class='ctx'> 	caller = ((unsigned long) entry-&gt;caller) &amp; PSW_ADDR_INSN;</div><div class='del'>-	rc += sprintf(out_buf, "%02i %011lu:%06lu %1u %1s %02i %p  ",</div><div class='del'>-		      area, time_spec.tv_sec, time_spec.tv_nsec / 1000, level,</div><div class='del'>-		      except_str, entry-&gt;id.fields.cpuid, (void *) caller);</div><div class='add'>+	rc += sprintf(out_buf, "%02i %011lld:%06lu %1u %1s %02i %p  ",</div><div class='add'>+		      area, (long long)time_spec.tv_sec,</div><div class='add'>+		      time_spec.tv_nsec / 1000, level, except_str,</div><div class='add'>+		      entry-&gt;id.fields.cpuid, (void *)caller);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(debug_dflt_header_fn);</div><div class='head'>diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S<br/>index 99b44acbfcc7..3238893c9d4f 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/entry.S</a></div><div class='hunk'>@@ -1005,7 +1005,7 @@ ENTRY(sie64a)</div><div class='ctx'> .Lsie_gmap:</div><div class='ctx'> 	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer</div><div class='ctx'> 	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now</div><div class='del'>-	tm	__SIE_PROG20+3(%r14),1		# last exit...</div><div class='add'>+	tm	__SIE_PROG20+3(%r14),3		# last exit...</div><div class='ctx'> 	jnz	.Lsie_done</div><div class='ctx'> 	LPP	__SF_EMPTY(%r15)		# set guest id</div><div class='ctx'> 	sie	0(%r14)</div><div class='head'>diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c<br/>index 505c17c0ae1a..56b550893593 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/nmi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/nmi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/nmi.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/crw.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;asm/ctl_reg.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mcck_struct {</div><div class='ctx'> 	int kill_task;</div><div class='hunk'>@@ -129,26 +130,30 @@ static int notrace s390_revalidate_registers(struct mci *mci)</div><div class='ctx'> 	} else</div><div class='ctx'> 		asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));</div><div class='ctx'> </div><div class='del'>-	asm volatile(</div><div class='del'>-		"	ld	0,0(%0)\n"</div><div class='del'>-		"	ld	1,8(%0)\n"</div><div class='del'>-		"	ld	2,16(%0)\n"</div><div class='del'>-		"	ld	3,24(%0)\n"</div><div class='del'>-		"	ld	4,32(%0)\n"</div><div class='del'>-		"	ld	5,40(%0)\n"</div><div class='del'>-		"	ld	6,48(%0)\n"</div><div class='del'>-		"	ld	7,56(%0)\n"</div><div class='del'>-		"	ld	8,64(%0)\n"</div><div class='del'>-		"	ld	9,72(%0)\n"</div><div class='del'>-		"	ld	10,80(%0)\n"</div><div class='del'>-		"	ld	11,88(%0)\n"</div><div class='del'>-		"	ld	12,96(%0)\n"</div><div class='del'>-		"	ld	13,104(%0)\n"</div><div class='del'>-		"	ld	14,112(%0)\n"</div><div class='del'>-		"	ld	15,120(%0)\n"</div><div class='del'>-		: : "a" (fpt_save_area));</div><div class='del'>-	/* Revalidate vector registers */</div><div class='del'>-	if (MACHINE_HAS_VX &amp;&amp; current-&gt;thread.vxrs) {</div><div class='add'>+	if (!MACHINE_HAS_VX) {</div><div class='add'>+		/* Revalidate floating point registers */</div><div class='add'>+		asm volatile(</div><div class='add'>+			"	ld	0,0(%0)\n"</div><div class='add'>+			"	ld	1,8(%0)\n"</div><div class='add'>+			"	ld	2,16(%0)\n"</div><div class='add'>+			"	ld	3,24(%0)\n"</div><div class='add'>+			"	ld	4,32(%0)\n"</div><div class='add'>+			"	ld	5,40(%0)\n"</div><div class='add'>+			"	ld	6,48(%0)\n"</div><div class='add'>+			"	ld	7,56(%0)\n"</div><div class='add'>+			"	ld	8,64(%0)\n"</div><div class='add'>+			"	ld	9,72(%0)\n"</div><div class='add'>+			"	ld	10,80(%0)\n"</div><div class='add'>+			"	ld	11,88(%0)\n"</div><div class='add'>+			"	ld	12,96(%0)\n"</div><div class='add'>+			"	ld	13,104(%0)\n"</div><div class='add'>+			"	ld	14,112(%0)\n"</div><div class='add'>+			"	ld	15,120(%0)\n"</div><div class='add'>+			: : "a" (fpt_save_area));</div><div class='add'>+	} else {</div><div class='add'>+		/* Revalidate vector registers */</div><div class='add'>+		union ctlreg0 cr0;</div><div class='add'>+</div><div class='ctx'> 		if (!mci-&gt;vr) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Vector registers can't be restored and therefore</div><div class='hunk'>@@ -156,8 +161,12 @@ static int notrace s390_revalidate_registers(struct mci *mci)</div><div class='ctx'> 			 */</div><div class='ctx'> 			kill_task = 1;</div><div class='ctx'> 		}</div><div class='add'>+		cr0.val = S390_lowcore.cregs_save_area[0];</div><div class='add'>+		cr0.afp = cr0.vx = 1;</div><div class='add'>+		__ctl_load(cr0.val, 0, 0);</div><div class='ctx'> 		restore_vx_regs((__vector128 *)</div><div class='del'>-				S390_lowcore.vector_save_area_addr);</div><div class='add'>+				&amp;S390_lowcore.vector_save_area);</div><div class='add'>+		__ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Revalidate access registers */</div><div class='ctx'> 	asm volatile(</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c<br/>index e6a1578fc000..afe05bfb7e00 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/perf_cpum_sf.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/perf_cpum_sf.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/perf_cpum_sf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/perf_cpum_sf.c</a></div><div class='hunk'>@@ -1572,7 +1572,7 @@ static int param_set_sfb_size(const char *val, const struct kernel_param *kp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define param_check_sfb_size(name, p) __param_check(name, p, void)</div><div class='del'>-static struct kernel_param_ops param_ops_sfb_size = {</div><div class='add'>+static const struct kernel_param_ops param_ops_sfb_size = {</div><div class='ctx'> 	.set = param_set_sfb_size,</div><div class='ctx'> 	.get = param_get_sfb_size,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c<br/>index dc5edc29b73a..8f587d871b9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/process.c</a></div><div class='hunk'>@@ -163,7 +163,7 @@ int copy_thread(unsigned long clone_flags, unsigned long new_stackp,</div><div class='ctx'> asmlinkage void execve_tail(void)</div><div class='ctx'> {</div><div class='ctx'> 	current-&gt;thread.fp_regs.fpc = 0;</div><div class='del'>-	asm volatile("sfpc %0,%0" : : "d" (0));</div><div class='add'>+	asm volatile("sfpc %0" : : "d" (0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S<br/>index 43c3169ea49c..ada0c07fe1a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/sclp.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/sclp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/sclp.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/sclp.S</a></div><div class='hunk'>@@ -270,6 +270,8 @@ ENTRY(_sclp_print_early)</div><div class='ctx'> 	jno	.Lesa2</div><div class='ctx'> 	ahi	%r15,-80</div><div class='ctx'> 	stmh	%r6,%r15,96(%r15)		# store upper register halves</div><div class='add'>+	basr	%r13,0</div><div class='add'>+	lmh	%r0,%r15,.Lzeroes-.(%r13)	# clear upper register halves</div><div class='ctx'> .Lesa2:</div><div class='ctx'> 	lr	%r10,%r2			# save string pointer</div><div class='ctx'> 	lhi	%r2,0</div><div class='hunk'>@@ -291,6 +293,8 @@ ENTRY(_sclp_print_early)</div><div class='ctx'> .Lesa3:</div><div class='ctx'> 	lm	%r6,%r15,120(%r15)		# restore registers</div><div class='ctx'> 	br	%r14</div><div class='add'>+.Lzeroes:</div><div class='add'>+	.fill	64,4,0</div><div class='ctx'> </div><div class='ctx'> .LwritedataS4:</div><div class='ctx'> 	.long	0x00760005			# SCLP command for write data</div><div class='head'>diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c<br/>index 7262fe438c99..ca070d260af2 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/setup.c</a></div><div class='hunk'>@@ -128,9 +128,9 @@ __setup("condev=", condev_setup);</div><div class='ctx'> static void __init set_preferred_console(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (MACHINE_IS_KVM) {</div><div class='del'>-		if (sclp_has_vt220())</div><div class='add'>+		if (sclp.has_vt220)</div><div class='ctx'> 			add_preferred_console("ttyS", 1, NULL);</div><div class='del'>-		else if (sclp_has_linemode())</div><div class='add'>+		else if (sclp.has_linemode)</div><div class='ctx'> 			add_preferred_console("ttyS", 0, NULL);</div><div class='ctx'> 		else</div><div class='ctx'> 			add_preferred_console("hvc", 0, NULL);</div><div class='hunk'>@@ -510,8 +510,8 @@ static void reserve_memory_end(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> 	if (ipl_info.type == IPL_TYPE_FCP_DUMP &amp;&amp;</div><div class='del'>-	    !OLDMEM_BASE &amp;&amp; sclp_get_hsa_size()) {</div><div class='del'>-		memory_end = sclp_get_hsa_size();</div><div class='add'>+	    !OLDMEM_BASE &amp;&amp; sclp.hsa_size) {</div><div class='add'>+		memory_end = sclp.hsa_size;</div><div class='ctx'> 		memory_end &amp;= PAGE_MASK;</div><div class='ctx'> 		memory_end_set = 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -576,7 +576,7 @@ static void __init reserve_crashkernel(void)</div><div class='ctx'> 		crash_base = low;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Find suitable area in free memory */</div><div class='del'>-		low = max_t(unsigned long, crash_size, sclp_get_hsa_size());</div><div class='add'>+		low = max_t(unsigned long, crash_size, sclp.hsa_size);</div><div class='ctx'> 		high = crash_base ? crash_base + crash_size : ULONG_MAX;</div><div class='ctx'> </div><div class='ctx'> 		if (crash_base &amp;&amp; crash_base &lt; low) {</div><div class='hunk'>@@ -640,19 +640,24 @@ static void __init check_initrd(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Reserve all kernel text</div><div class='add'>+ * Reserve memory used for lowcore/command line/kernel image.</div><div class='ctx'>  */</div><div class='ctx'> static void __init reserve_kernel(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long start_pfn;</div><div class='del'>-	start_pfn = PFN_UP(__pa(&amp;_end));</div><div class='add'>+	unsigned long start_pfn = PFN_UP(__pa(&amp;_end));</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DMA_API_DEBUG</div><div class='ctx'> 	/*</div><div class='del'>-	 * Reserve memory used for lowcore/command line/kernel image.</div><div class='add'>+	 * DMA_API_DEBUG code stumbles over addresses from the</div><div class='add'>+	 * range [_ehead, _stext]. Mark the memory as reserved</div><div class='add'>+	 * so it is not used for CONFIG_DMA_API_DEBUG=y.</div><div class='ctx'> 	 */</div><div class='add'>+	memblock_reserve(0, PFN_PHYS(start_pfn));</div><div class='add'>+#else</div><div class='ctx'> 	memblock_reserve(0, (unsigned long)_ehead);</div><div class='ctx'> 	memblock_reserve((unsigned long)_stext, PFN_PHYS(start_pfn)</div><div class='ctx'> 			 - (unsigned long)_stext);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init reserve_elfcorehdr(void)</div><div class='hunk'>@@ -863,6 +868,11 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	check_initrd();</div><div class='ctx'> 	reserve_crashkernel();</div><div class='add'>+	/*</div><div class='add'>+	 * Be aware that smp_save_dump_cpus() triggers a system reset.</div><div class='add'>+	 * Therefore CPU and device initialization should be done afterwards.</div><div class='add'>+	 */</div><div class='add'>+	smp_save_dump_cpus();</div><div class='ctx'> </div><div class='ctx'> 	setup_resources();</div><div class='ctx'> 	setup_vmcoreinfo();</div><div class='head'>diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c<br/>index efd2c1968000..6f54c175f5c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/smp.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;asm/facility.h&gt;</div><div class='hunk'>@@ -69,7 +70,7 @@ struct pcpu {</div><div class='ctx'> 	u16 address;			/* physical cpu address */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u8 boot_cpu_type;</div><div class='add'>+static u8 boot_core_type;</div><div class='ctx'> static struct pcpu pcpu_devices[NR_CPUS];</div><div class='ctx'> </div><div class='ctx'> unsigned int smp_cpu_mt_shift;</div><div class='hunk'>@@ -531,15 +532,12 @@ EXPORT_SYMBOL(smp_ctl_clear_bit);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> </div><div class='del'>-static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)</div><div class='add'>+static void __smp_store_cpu_state(struct save_area_ext *sa_ext, u16 address,</div><div class='add'>+				  int is_boot_cpu)</div><div class='ctx'> {</div><div class='del'>-	void *lc = pcpu_devices[0].lowcore;</div><div class='del'>-	struct save_area_ext *sa_ext;</div><div class='add'>+	void *lc = (void *)(unsigned long) store_prefix();</div><div class='ctx'> 	unsigned long vx_sa;</div><div class='ctx'> </div><div class='del'>-	sa_ext = dump_save_area_create(cpu);</div><div class='del'>-	if (!sa_ext)</div><div class='del'>-		panic("could not allocate memory for save area\n");</div><div class='ctx'> 	if (is_boot_cpu) {</div><div class='ctx'> 		/* Copy the registers of the boot CPU. */</div><div class='ctx'> 		copy_oldmem_page(1, (void *) &amp;sa_ext-&gt;sa, sizeof(sa_ext-&gt;sa),</div><div class='hunk'>@@ -554,14 +552,33 @@ static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)</div><div class='ctx'> 	if (!MACHINE_HAS_VX)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Get the VX registers */</div><div class='del'>-	vx_sa = __get_free_page(GFP_KERNEL);</div><div class='add'>+	vx_sa = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 	if (!vx_sa)</div><div class='ctx'> 		panic("could not allocate memory for VX save area\n");</div><div class='ctx'> 	__pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);</div><div class='ctx'> 	memcpy(sa_ext-&gt;vx_regs, (void *) vx_sa, sizeof(sa_ext-&gt;vx_regs));</div><div class='del'>-	free_page(vx_sa);</div><div class='add'>+	memblock_free(vx_sa, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int smp_store_status(int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long vx_sa;</div><div class='add'>+	struct pcpu *pcpu;</div><div class='add'>+</div><div class='add'>+	pcpu = pcpu_devices + cpu;</div><div class='add'>+	if (__pcpu_sigp_relax(pcpu-&gt;address, SIGP_STOP_AND_STORE_STATUS,</div><div class='add'>+			      0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)</div><div class='add'>+		return -EIO;</div><div class='add'>+	if (!MACHINE_HAS_VX)</div><div class='add'>+		return 0;</div><div class='add'>+	vx_sa = __pa(pcpu-&gt;lowcore-&gt;vector_save_area_addr);</div><div class='add'>+	__pcpu_sigp_relax(pcpu-&gt;address, SIGP_STORE_ADDITIONAL_STATUS,</div><div class='add'>+			  vx_sa, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_CRASH_DUMP */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Collect CPU state of the previous, crashed system.</div><div class='ctx'>  * There are four cases:</div><div class='hunk'>@@ -589,10 +606,12 @@ static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)</div><div class='ctx'>  *    old system. The ELF sections are picked up by the crash_dump code</div><div class='ctx'>  *    via elfcorehdr_addr.</div><div class='ctx'>  */</div><div class='del'>-static void __init smp_store_cpu_states(struct sclp_cpu_info *info)</div><div class='add'>+void __init smp_save_dump_cpus(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpu, address, i, j;</div><div class='del'>-	int is_boot_cpu;</div><div class='add'>+#ifdef CONFIG_CRASH_DUMP</div><div class='add'>+	int addr, cpu, boot_cpu_addr, max_cpu_addr;</div><div class='add'>+	struct save_area_ext *sa_ext;</div><div class='add'>+	bool is_boot_cpu;</div><div class='ctx'> </div><div class='ctx'> 	if (is_kdump_kernel())</div><div class='ctx'> 		/* Previous system stored the CPU states. Nothing to do. */</div><div class='hunk'>@@ -601,43 +620,37 @@ static void __init smp_store_cpu_states(struct sclp_cpu_info *info)</div><div class='ctx'> 		/* No previous system present, normal boot. */</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Set multi-threading state to the previous system. */</div><div class='del'>-	pcpu_set_smt(sclp_get_mtid_prev());</div><div class='del'>-	/* Collect CPU states. */</div><div class='del'>-	cpu = 0;</div><div class='del'>-	for (i = 0; i &lt; info-&gt;configured; i++) {</div><div class='del'>-		/* Skip CPUs with different CPU type. */</div><div class='del'>-		if (info-&gt;has_cpu_type &amp;&amp; info-&gt;cpu[i].type != boot_cpu_type)</div><div class='add'>+	pcpu_set_smt(sclp.mtid_prev);</div><div class='add'>+	max_cpu_addr = SCLP_MAX_CORES &lt;&lt; sclp.mtid_prev;</div><div class='add'>+	for (cpu = 0, addr = 0; addr &lt;= max_cpu_addr; addr++) {</div><div class='add'>+		if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==</div><div class='add'>+		    SIGP_CC_NOT_OPERATIONAL)</div><div class='ctx'> 			continue;</div><div class='del'>-		for (j = 0; j &lt;= smp_cpu_mtid; j++, cpu++) {</div><div class='del'>-			address = (info-&gt;cpu[i].core_id &lt;&lt; smp_cpu_mt_shift) + j;</div><div class='del'>-			is_boot_cpu = (address == pcpu_devices[0].address);</div><div class='del'>-			if (is_boot_cpu &amp;&amp; !OLDMEM_BASE)</div><div class='del'>-				/* Skip boot CPU for standard zfcp dump. */</div><div class='del'>-				continue;</div><div class='del'>-			/* Get state for this CPu. */</div><div class='del'>-			__smp_store_cpu_state(cpu, address, is_boot_cpu);</div><div class='del'>-		}</div><div class='add'>+		cpu += 1;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int smp_store_status(int cpu)</div><div class='del'>-{</div><div class='del'>-	unsigned long vx_sa;</div><div class='del'>-	struct pcpu *pcpu;</div><div class='del'>-</div><div class='del'>-	pcpu = pcpu_devices + cpu;</div><div class='del'>-	if (__pcpu_sigp_relax(pcpu-&gt;address, SIGP_STOP_AND_STORE_STATUS,</div><div class='del'>-			      0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)</div><div class='del'>-		return -EIO;</div><div class='del'>-	if (!MACHINE_HAS_VX)</div><div class='del'>-		return 0;</div><div class='del'>-	vx_sa = __pa(pcpu-&gt;lowcore-&gt;vector_save_area_addr);</div><div class='del'>-	__pcpu_sigp_relax(pcpu-&gt;address, SIGP_STORE_ADDITIONAL_STATUS,</div><div class='del'>-			  vx_sa, NULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+	dump_save_areas.areas = (void *)memblock_alloc(sizeof(void *) * cpu, 8);</div><div class='add'>+	dump_save_areas.count = cpu;</div><div class='add'>+	boot_cpu_addr = stap();</div><div class='add'>+	for (cpu = 0, addr = 0; addr &lt;= max_cpu_addr; addr++) {</div><div class='add'>+		if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==</div><div class='add'>+		    SIGP_CC_NOT_OPERATIONAL)</div><div class='add'>+			continue;</div><div class='add'>+		sa_ext = (void *) memblock_alloc(sizeof(*sa_ext), 8);</div><div class='add'>+		dump_save_areas.areas[cpu] = sa_ext;</div><div class='add'>+		if (!sa_ext)</div><div class='add'>+			panic("could not allocate memory for save area\n");</div><div class='add'>+		is_boot_cpu = (addr == boot_cpu_addr);</div><div class='add'>+		cpu += 1;</div><div class='add'>+		if (is_boot_cpu &amp;&amp; !OLDMEM_BASE)</div><div class='add'>+			/* Skip boot CPU for standard zfcp dump. */</div><div class='add'>+			continue;</div><div class='add'>+		/* Get state for this CPU. */</div><div class='add'>+		__smp_store_cpu_state(sa_ext, addr, is_boot_cpu);</div><div class='add'>+	}</div><div class='add'>+	diag308_reset();</div><div class='add'>+	pcpu_set_smt(0);</div><div class='ctx'> #endif /* CONFIG_CRASH_DUMP */</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void smp_cpu_set_polarization(int cpu, int val)</div><div class='ctx'> {</div><div class='hunk'>@@ -649,21 +662,22 @@ int smp_cpu_get_polarization(int cpu)</div><div class='ctx'> 	return pcpu_devices[cpu].polarization;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sclp_cpu_info *smp_get_cpu_info(void)</div><div class='add'>+static struct sclp_core_info *smp_get_core_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	static int use_sigp_detection;</div><div class='del'>-	struct sclp_cpu_info *info;</div><div class='add'>+	struct sclp_core_info *info;</div><div class='ctx'> 	int address;</div><div class='ctx'> </div><div class='ctx'> 	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='del'>-	if (info &amp;&amp; (use_sigp_detection || sclp_get_cpu_info(info))) {</div><div class='add'>+	if (info &amp;&amp; (use_sigp_detection || sclp_get_core_info(info))) {</div><div class='ctx'> 		use_sigp_detection = 1;</div><div class='del'>-		for (address = 0; address &lt;= MAX_CPU_ADDRESS;</div><div class='add'>+		for (address = 0;</div><div class='add'>+		     address &lt; (SCLP_MAX_CORES &lt;&lt; smp_cpu_mt_shift);</div><div class='ctx'> 		     address += (1U &lt;&lt; smp_cpu_mt_shift)) {</div><div class='ctx'> 			if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==</div><div class='ctx'> 			    SIGP_CC_NOT_OPERATIONAL)</div><div class='ctx'> 				continue;</div><div class='del'>-			info-&gt;cpu[info-&gt;configured].core_id =</div><div class='add'>+			info-&gt;core[info-&gt;configured].core_id =</div><div class='ctx'> 				address &gt;&gt; smp_cpu_mt_shift;</div><div class='ctx'> 			info-&gt;configured++;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -674,7 +688,7 @@ static struct sclp_cpu_info *smp_get_cpu_info(void)</div><div class='ctx'> </div><div class='ctx'> static int smp_add_present_cpu(int cpu);</div><div class='ctx'> </div><div class='del'>-static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)</div><div class='add'>+static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcpu *pcpu;</div><div class='ctx'> 	cpumask_t avail;</div><div class='hunk'>@@ -685,9 +699,9 @@ static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)</div><div class='ctx'> 	cpumask_xor(&amp;avail, cpu_possible_mask, cpu_present_mask);</div><div class='ctx'> 	cpu = cpumask_first(&amp;avail);</div><div class='ctx'> 	for (i = 0; (i &lt; info-&gt;combined) &amp;&amp; (cpu &lt; nr_cpu_ids); i++) {</div><div class='del'>-		if (info-&gt;has_cpu_type &amp;&amp; info-&gt;cpu[i].type != boot_cpu_type)</div><div class='add'>+		if (sclp.has_core_type &amp;&amp; info-&gt;core[i].type != boot_core_type)</div><div class='ctx'> 			continue;</div><div class='del'>-		address = info-&gt;cpu[i].core_id &lt;&lt; smp_cpu_mt_shift;</div><div class='add'>+		address = info-&gt;core[i].core_id &lt;&lt; smp_cpu_mt_shift;</div><div class='ctx'> 		for (j = 0; j &lt;= smp_cpu_mtid; j++) {</div><div class='ctx'> 			if (pcpu_find_address(cpu_present_mask, address + j))</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -713,41 +727,37 @@ static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)</div><div class='ctx'> static void __init smp_detect_cpus(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu, mtid, c_cpus, s_cpus;</div><div class='del'>-	struct sclp_cpu_info *info;</div><div class='add'>+	struct sclp_core_info *info;</div><div class='ctx'> 	u16 address;</div><div class='ctx'> </div><div class='ctx'> 	/* Get CPU information */</div><div class='del'>-	info = smp_get_cpu_info();</div><div class='add'>+	info = smp_get_core_info();</div><div class='ctx'> 	if (!info)</div><div class='ctx'> 		panic("smp_detect_cpus failed to allocate memory\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Find boot CPU type */</div><div class='del'>-	if (info-&gt;has_cpu_type) {</div><div class='add'>+	if (sclp.has_core_type) {</div><div class='ctx'> 		address = stap();</div><div class='ctx'> 		for (cpu = 0; cpu &lt; info-&gt;combined; cpu++)</div><div class='del'>-			if (info-&gt;cpu[cpu].core_id == address) {</div><div class='add'>+			if (info-&gt;core[cpu].core_id == address) {</div><div class='ctx'> 				/* The boot cpu dictates the cpu type. */</div><div class='del'>-				boot_cpu_type = info-&gt;cpu[cpu].type;</div><div class='add'>+				boot_core_type = info-&gt;core[cpu].type;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		if (cpu &gt;= info-&gt;combined)</div><div class='ctx'> 			panic("Could not find boot CPU type");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRASH_DUMP</div><div class='del'>-	/* Collect CPU state of previous system */</div><div class='del'>-	smp_store_cpu_states(info);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/* Set multi-threading state for the current system */</div><div class='del'>-	mtid = sclp_get_mtid(boot_cpu_type);</div><div class='add'>+	mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;</div><div class='ctx'> 	mtid = (mtid &lt; smp_max_threads) ? mtid : smp_max_threads - 1;</div><div class='ctx'> 	pcpu_set_smt(mtid);</div><div class='ctx'> </div><div class='ctx'> 	/* Print number of CPUs */</div><div class='ctx'> 	c_cpus = s_cpus = 0;</div><div class='ctx'> 	for (cpu = 0; cpu &lt; info-&gt;combined; cpu++) {</div><div class='del'>-		if (info-&gt;has_cpu_type &amp;&amp; info-&gt;cpu[cpu].type != boot_cpu_type)</div><div class='add'>+		if (sclp.has_core_type &amp;&amp;</div><div class='add'>+		    info-&gt;core[cpu].type != boot_core_type)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (cpu &lt; info-&gt;configured)</div><div class='ctx'> 			c_cpus += smp_cpu_mtid + 1;</div><div class='hunk'>@@ -880,12 +890,13 @@ void __noreturn cpu_die(void)</div><div class='ctx'> </div><div class='ctx'> void __init smp_fill_possible_mask(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int possible, sclp, cpu;</div><div class='add'>+	unsigned int possible, sclp_max, cpu;</div><div class='ctx'> </div><div class='del'>-	sclp = min(smp_max_threads, sclp_get_mtid_max() + 1);</div><div class='del'>-	sclp = sclp_get_max_cpu()*sclp ?: nr_cpu_ids;</div><div class='add'>+	sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;</div><div class='add'>+	sclp_max = min(smp_max_threads, sclp_max);</div><div class='add'>+	sclp_max = sclp.max_cores * sclp_max ?: nr_cpu_ids;</div><div class='ctx'> 	possible = setup_possible_cpus ?: nr_cpu_ids;</div><div class='del'>-	possible = min(possible, sclp);</div><div class='add'>+	possible = min(possible, sclp_max);</div><div class='ctx'> 	for (cpu = 0; cpu &lt; possible &amp;&amp; cpu &lt; nr_cpu_ids; cpu++)</div><div class='ctx'> 		set_cpu_possible(cpu, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -976,7 +987,7 @@ static ssize_t cpu_configure_store(struct device *dev,</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		if (pcpu-&gt;state != CPU_STATE_CONFIGURED)</div><div class='ctx'> 			break;</div><div class='del'>-		rc = sclp_cpu_deconfigure(pcpu-&gt;address &gt;&gt; smp_cpu_mt_shift);</div><div class='add'>+		rc = sclp_core_deconfigure(pcpu-&gt;address &gt;&gt; smp_cpu_mt_shift);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			break;</div><div class='ctx'> 		for (i = 0; i &lt;= smp_cpu_mtid; i++) {</div><div class='hunk'>@@ -991,7 +1002,7 @@ static ssize_t cpu_configure_store(struct device *dev,</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		if (pcpu-&gt;state != CPU_STATE_STANDBY)</div><div class='ctx'> 			break;</div><div class='del'>-		rc = sclp_cpu_configure(pcpu-&gt;address &gt;&gt; smp_cpu_mt_shift);</div><div class='add'>+		rc = sclp_core_configure(pcpu-&gt;address &gt;&gt; smp_cpu_mt_shift);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			break;</div><div class='ctx'> 		for (i = 0; i &lt;= smp_cpu_mtid; i++) {</div><div class='hunk'>@@ -1106,10 +1117,10 @@ out:</div><div class='ctx'> </div><div class='ctx'> int __ref smp_rescan_cpus(void)</div><div class='ctx'> {</div><div class='del'>-	struct sclp_cpu_info *info;</div><div class='add'>+	struct sclp_core_info *info;</div><div class='ctx'> 	int nr;</div><div class='ctx'> </div><div class='del'>-	info = smp_get_cpu_info();</div><div class='add'>+	info = smp_get_core_info();</div><div class='ctx'> 	if (!info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	get_online_cpus();</div><div class='head'>diff --git a/arch/s390/kernel/suspend.c b/arch/s390/kernel/suspend.c<br/>index d3236c9e226b..39e2f41b6cf0 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/suspend.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/suspend.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/suspend.c</a></div><div class='hunk'>@@ -9,10 +9,10 @@</div><div class='ctx'> #include &lt;linux/pfn.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;asm/ctl_reg.h&gt;</div><div class='ctx'> #include &lt;asm/ipl.h&gt;</div><div class='ctx'> #include &lt;asm/cio.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include "entry.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c<br/>index 170ddd2018b3..9e733d965e08 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/time.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/time.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kernel/time.c</a></div><div class='hunk'>@@ -76,7 +76,7 @@ unsigned long long monotonic_clock(void)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(monotonic_clock);</div><div class='ctx'> </div><div class='del'>-void tod_to_timeval(__u64 todval, struct timespec *xt)</div><div class='add'>+void tod_to_timeval(__u64 todval, struct timespec64 *xt)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long sec;</div><div class='ctx'> </div><div class='hunk'>@@ -181,12 +181,12 @@ static void timing_alert_interrupt(struct ext_code ext_code,</div><div class='ctx'> static void etr_reset(void);</div><div class='ctx'> static void stp_reset(void);</div><div class='ctx'> </div><div class='del'>-void read_persistent_clock(struct timespec *ts)</div><div class='add'>+void read_persistent_clock64(struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void read_boot_clock(struct timespec *ts)</div><div class='add'>+void read_boot_clock64(struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c<br/>index 9e3779e3e496..7365e8a46032 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/intercept.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kvm/intercept.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/intercept.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/intercept.c</a></div><div class='hunk'>@@ -241,21 +241,6 @@ static int handle_prog(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return kvm_s390_inject_prog_irq(vcpu, &amp;pgm_info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int handle_instruction_and_prog(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	int rc, rc2;</div><div class='del'>-</div><div class='del'>-	vcpu-&gt;stat.exit_instr_and_program++;</div><div class='del'>-	rc = handle_instruction(vcpu);</div><div class='del'>-	rc2 = handle_prog(vcpu);</div><div class='del'>-</div><div class='del'>-	if (rc == -EOPNOTSUPP)</div><div class='del'>-		vcpu-&gt;arch.sie_block-&gt;icptcode = 0x04;</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-	return rc2;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * handle_external_interrupt - used for external interruption interceptions</div><div class='ctx'>  *</div><div class='hunk'>@@ -355,7 +340,6 @@ static const intercept_handler_t intercept_funcs[] = {</div><div class='ctx'> 	[0x00 &gt;&gt; 2] = handle_noop,</div><div class='ctx'> 	[0x04 &gt;&gt; 2] = handle_instruction,</div><div class='ctx'> 	[0x08 &gt;&gt; 2] = handle_prog,</div><div class='del'>-	[0x0C &gt;&gt; 2] = handle_instruction_and_prog,</div><div class='ctx'> 	[0x10 &gt;&gt; 2] = handle_noop,</div><div class='ctx'> 	[0x14 &gt;&gt; 2] = handle_external_interrupt,</div><div class='ctx'> 	[0x18 &gt;&gt; 2] = handle_noop,</div><div class='head'>diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c<br/>index 9de47265ef73..c98d89708e99 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/interrupt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kvm/interrupt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/interrupt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/interrupt.c</a></div><div class='hunk'>@@ -134,6 +134,8 @@ static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	active_mask = pending_local_irqs(vcpu);</div><div class='ctx'> 	active_mask |= pending_floating_irqs(vcpu);</div><div class='add'>+	if (!active_mask)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (psw_extint_disabled(vcpu))</div><div class='ctx'> 		active_mask &amp;= ~IRQ_PEND_EXT_MASK;</div><div class='hunk'>@@ -799,7 +801,7 @@ int kvm_s390_ext_call_pending(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_s390_local_interrupt *li = &amp;vcpu-&gt;arch.local_int;</div><div class='ctx'> 	uint8_t sigp_ctrl = vcpu-&gt;kvm-&gt;arch.sca-&gt;cpu[vcpu-&gt;vcpu_id].sigp_ctrl;</div><div class='ctx'> </div><div class='del'>-	if (!sclp_has_sigpif())</div><div class='add'>+	if (!sclp.has_sigpif)</div><div class='ctx'> 		return test_bit(IRQ_PEND_EXT_EXTERNAL, &amp;li-&gt;pending_irqs);</div><div class='ctx'> </div><div class='ctx'> 	return (sigp_ctrl &amp; SIGP_CTRL_C) &amp;&amp;</div><div class='hunk'>@@ -941,12 +943,9 @@ int __must_check kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (cpu_timer_irq_pending(vcpu))</div><div class='ctx'> 		set_bit(IRQ_PEND_EXT_CPU_TIMER, &amp;li-&gt;pending_irqs);</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		irqs = deliverable_irqs(vcpu);</div><div class='add'>+	while ((irqs = deliverable_irqs(vcpu)) &amp;&amp; !rc) {</div><div class='ctx'> 		/* bits are in the order of interrupt priority */</div><div class='ctx'> 		irq_type = find_first_bit(&amp;irqs, IRQ_PEND_COUNT);</div><div class='del'>-		if (irq_type == IRQ_PEND_COUNT)</div><div class='del'>-			break;</div><div class='ctx'> 		if (is_ioirq(irq_type)) {</div><div class='ctx'> 			rc = __deliver_io(vcpu, irq_type);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -958,9 +957,7 @@ int __must_check kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			}</div><div class='ctx'> 			rc = func(vcpu);</div><div class='ctx'> 		}</div><div class='del'>-		if (rc)</div><div class='del'>-			break;</div><div class='del'>-	} while (!rc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	set_intercept_indicators(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -1058,10 +1055,10 @@ static int __inject_extcall(struct kvm_vcpu *vcpu, struct kvm_s390_irq *irq)</div><div class='ctx'> 	    kvm_get_vcpu(vcpu-&gt;kvm, src_id) == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (sclp_has_sigpif())</div><div class='add'>+	if (sclp.has_sigpif)</div><div class='ctx'> 		return __inject_extcall_sigpif(vcpu, src_id);</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(IRQ_PEND_EXT_EXTERNAL, &amp;li-&gt;pending_irqs))</div><div class='add'>+	if (test_and_set_bit(IRQ_PEND_EXT_EXTERNAL, &amp;li-&gt;pending_irqs))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	*extcall = irq-&gt;u.extcall;</div><div class='ctx'> 	atomic_set_mask(CPUSTAT_EXT_INT, li-&gt;cpuflags);</div><div class='hunk'>@@ -1340,12 +1337,54 @@ static int __inject_io(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __inject_vm(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)</div><div class='add'>+/*</div><div class='add'>+ * Find a destination VCPU for a floating irq and kick it.</div><div class='add'>+ */</div><div class='add'>+static void __floating_irq_kick(struct kvm *kvm, u64 type)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_s390_float_interrupt *fi = &amp;kvm-&gt;arch.float_int;</div><div class='ctx'> 	struct kvm_s390_local_interrupt *li;</div><div class='add'>+	struct kvm_vcpu *dst_vcpu;</div><div class='add'>+	int sigcpu, online_vcpus, nr_tries = 0;</div><div class='add'>+</div><div class='add'>+	online_vcpus = atomic_read(&amp;kvm-&gt;online_vcpus);</div><div class='add'>+	if (!online_vcpus)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* find idle VCPUs first, then round robin */</div><div class='add'>+	sigcpu = find_first_bit(fi-&gt;idle_mask, online_vcpus);</div><div class='add'>+	if (sigcpu == online_vcpus) {</div><div class='add'>+		do {</div><div class='add'>+			sigcpu = fi-&gt;next_rr_cpu;</div><div class='add'>+			fi-&gt;next_rr_cpu = (fi-&gt;next_rr_cpu + 1) % online_vcpus;</div><div class='add'>+			/* avoid endless loops if all vcpus are stopped */</div><div class='add'>+			if (nr_tries++ &gt;= online_vcpus)</div><div class='add'>+				return;</div><div class='add'>+		} while (is_vcpu_stopped(kvm_get_vcpu(kvm, sigcpu)));</div><div class='add'>+	}</div><div class='add'>+	dst_vcpu = kvm_get_vcpu(kvm, sigcpu);</div><div class='add'>+</div><div class='add'>+	/* make the VCPU drop out of the SIE, or wake it up if sleeping */</div><div class='add'>+	li = &amp;dst_vcpu-&gt;arch.local_int;</div><div class='add'>+	spin_lock(&amp;li-&gt;lock);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case KVM_S390_MCHK:</div><div class='add'>+		atomic_set_mask(CPUSTAT_STOP_INT, li-&gt;cpuflags);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:</div><div class='add'>+		atomic_set_mask(CPUSTAT_IO_INT, li-&gt;cpuflags);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		atomic_set_mask(CPUSTAT_EXT_INT, li-&gt;cpuflags);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;li-&gt;lock);</div><div class='add'>+	kvm_s390_vcpu_wakeup(dst_vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __inject_vm(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)</div><div class='add'>+{</div><div class='ctx'> 	struct kvm_s390_float_interrupt *fi;</div><div class='del'>-	struct kvm_vcpu *dst_vcpu = NULL;</div><div class='del'>-	int sigcpu;</div><div class='ctx'> 	u64 type = READ_ONCE(inti-&gt;type);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1373,32 +1412,8 @@ static int __inject_vm(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	sigcpu = find_first_bit(fi-&gt;idle_mask, KVM_MAX_VCPUS);</div><div class='del'>-	if (sigcpu == KVM_MAX_VCPUS) {</div><div class='del'>-		do {</div><div class='del'>-			sigcpu = fi-&gt;next_rr_cpu++;</div><div class='del'>-			if (sigcpu == KVM_MAX_VCPUS)</div><div class='del'>-				sigcpu = fi-&gt;next_rr_cpu = 0;</div><div class='del'>-		} while (kvm_get_vcpu(kvm, sigcpu) == NULL);</div><div class='del'>-	}</div><div class='del'>-	dst_vcpu = kvm_get_vcpu(kvm, sigcpu);</div><div class='del'>-	li = &amp;dst_vcpu-&gt;arch.local_int;</div><div class='del'>-	spin_lock(&amp;li-&gt;lock);</div><div class='del'>-	switch (type) {</div><div class='del'>-	case KVM_S390_MCHK:</div><div class='del'>-		atomic_set_mask(CPUSTAT_STOP_INT, li-&gt;cpuflags);</div><div class='del'>-		break;</div><div class='del'>-	case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:</div><div class='del'>-		atomic_set_mask(CPUSTAT_IO_INT, li-&gt;cpuflags);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		atomic_set_mask(CPUSTAT_EXT_INT, li-&gt;cpuflags);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;li-&gt;lock);</div><div class='del'>-	kvm_s390_vcpu_wakeup(kvm_get_vcpu(kvm, sigcpu));</div><div class='add'>+	__floating_irq_kick(kvm, type);</div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_s390_inject_vm(struct kvm *kvm,</div><div class='hunk'>@@ -1606,6 +1621,9 @@ void kvm_s390_clear_float_irqs(struct kvm *kvm)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;fi-&gt;lock);</div><div class='add'>+	fi-&gt;pending_irqs = 0;</div><div class='add'>+	memset(&amp;fi-&gt;srv_signal, 0, sizeof(fi-&gt;srv_signal));</div><div class='add'>+	memset(&amp;fi-&gt;mchk, 0, sizeof(fi-&gt;mchk));</div><div class='ctx'> 	for (i = 0; i &lt; FIRQ_LIST_COUNT; i++)</div><div class='ctx'> 		clear_irq_list(&amp;fi-&gt;lists[i]);</div><div class='ctx'> 	for (i = 0; i &lt; FIRQ_MAX_COUNT; i++)</div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c<br/>index 8cd8e7b288c5..2078f92d15ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kvm/kvm-s390.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/kvm-s390.c</a></div><div class='hunk'>@@ -36,6 +36,10 @@</div><div class='ctx'> #include "kvm-s390.h"</div><div class='ctx'> #include "gaccess.h"</div><div class='ctx'> </div><div class='add'>+#define KMSG_COMPONENT "kvm-s390"</div><div class='add'>+#undef pr_fmt</div><div class='add'>+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt</div><div class='add'>+</div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> #include "trace-s390.h"</div><div class='hunk'>@@ -110,7 +114,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {</div><div class='ctx'> /* upper facilities limit for kvm */</div><div class='ctx'> unsigned long kvm_s390_fac_list_mask[] = {</div><div class='ctx'> 	0xffe6fffbfcfdfc40UL,</div><div class='del'>-	0x005c800000000000UL,</div><div class='add'>+	0x005e800000000000UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> unsigned long kvm_s390_fac_list_mask_size(void)</div><div class='hunk'>@@ -236,6 +240,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	unsigned long n;</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	int is_dirty = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -245,7 +250,8 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,</div><div class='ctx'> 	if (log-&gt;slot &gt;= KVM_USER_MEM_SLOTS)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	memslot = id_to_memslot(kvm-&gt;memslots, log-&gt;slot);</div><div class='add'>+	slots = kvm_memslots(kvm);</div><div class='add'>+	memslot = id_to_memslot(slots, log-&gt;slot);</div><div class='ctx'> 	r = -ENOENT;</div><div class='ctx'> 	if (!memslot-&gt;dirty_bitmap)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -454,10 +460,10 @@ static int kvm_s390_set_tod_low(struct kvm *kvm, struct kvm_device_attr *attr)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;lock);</div><div class='ctx'> 	kvm-&gt;arch.epoch = gtod - host_tod;</div><div class='del'>-	kvm_for_each_vcpu(vcpu_idx, cur_vcpu, kvm) {</div><div class='add'>+	kvm_s390_vcpu_block_all(kvm);</div><div class='add'>+	kvm_for_each_vcpu(vcpu_idx, cur_vcpu, kvm)</div><div class='ctx'> 		cur_vcpu-&gt;arch.sie_block-&gt;epoch = kvm-&gt;arch.epoch;</div><div class='del'>-		exit_sie(cur_vcpu);</div><div class='del'>-	}</div><div class='add'>+	kvm_s390_vcpu_unblock_all(kvm);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -604,7 +610,7 @@ static int kvm_s390_get_machine(struct kvm *kvm, struct kvm_device_attr *attr)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	get_cpu_id((struct cpuid *) &amp;mach-&gt;cpuid);</div><div class='del'>-	mach-&gt;ibc = sclp_get_ibc();</div><div class='add'>+	mach-&gt;ibc = sclp.ibc;</div><div class='ctx'> 	memcpy(&amp;mach-&gt;fac_mask, kvm-&gt;arch.model.fac-&gt;mask,</div><div class='ctx'> 	       S390_ARCH_FAC_LIST_SIZE_BYTE);</div><div class='ctx'> 	memcpy((unsigned long *)&amp;mach-&gt;fac_list, S390_lowcore.stfle_fac_list,</div><div class='hunk'>@@ -1068,7 +1074,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 	       S390_ARCH_FAC_LIST_SIZE_BYTE);</div><div class='ctx'> </div><div class='ctx'> 	kvm_s390_get_cpu_id(&amp;kvm-&gt;arch.model.cpu_id);</div><div class='del'>-	kvm-&gt;arch.model.ibc = sclp_get_ibc() &amp; 0x0fff;</div><div class='add'>+	kvm-&gt;arch.model.ibc = sclp.ibc &amp; 0x0fff;</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_s390_crypto_init(kvm) &lt; 0)</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -1311,8 +1317,13 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;vcpu-&gt;arch.sie_block-&gt;cpuflags, CPUSTAT_ZARCH |</div><div class='ctx'> 						    CPUSTAT_SM |</div><div class='del'>-						    CPUSTAT_STOPPED |</div><div class='del'>-						    CPUSTAT_GED);</div><div class='add'>+						    CPUSTAT_STOPPED);</div><div class='add'>+</div><div class='add'>+	if (test_kvm_facility(vcpu-&gt;kvm, 78))</div><div class='add'>+		atomic_set_mask(CPUSTAT_GED2, &amp;vcpu-&gt;arch.sie_block-&gt;cpuflags);</div><div class='add'>+	else if (test_kvm_facility(vcpu-&gt;kvm, 8))</div><div class='add'>+		atomic_set_mask(CPUSTAT_GED, &amp;vcpu-&gt;arch.sie_block-&gt;cpuflags);</div><div class='add'>+</div><div class='ctx'> 	kvm_s390_vcpu_setup_model(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.sie_block-&gt;ecb   = 6;</div><div class='hunk'>@@ -1321,9 +1332,9 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.sie_block-&gt;ecb2  = 8;</div><div class='ctx'> 	vcpu-&gt;arch.sie_block-&gt;eca   = 0xC1002000U;</div><div class='del'>-	if (sclp_has_siif())</div><div class='add'>+	if (sclp.has_siif)</div><div class='ctx'> 		vcpu-&gt;arch.sie_block-&gt;eca |= 1;</div><div class='del'>-	if (sclp_has_sigpif())</div><div class='add'>+	if (sclp.has_sigpif)</div><div class='ctx'> 		vcpu-&gt;arch.sie_block-&gt;eca |= 0x10000000U;</div><div class='ctx'> 	if (test_kvm_facility(vcpu-&gt;kvm, 129)) {</div><div class='ctx'> 		vcpu-&gt;arch.sie_block-&gt;eca |= 0x00020000;</div><div class='hunk'>@@ -1409,16 +1420,28 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return kvm_s390_vcpu_has_irq(vcpu, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void s390_vcpu_block(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_s390_vcpu_block(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_set_mask(PROG_BLOCK_SIE, &amp;vcpu-&gt;arch.sie_block-&gt;prog20);</div><div class='add'>+	exit_sie(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void s390_vcpu_unblock(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_s390_vcpu_unblock(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_clear_mask(PROG_BLOCK_SIE, &amp;vcpu-&gt;arch.sie_block-&gt;prog20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_s390_vcpu_request(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	atomic_set_mask(PROG_REQUEST, &amp;vcpu-&gt;arch.sie_block-&gt;prog20);</div><div class='add'>+	exit_sie(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_s390_vcpu_request_handled(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	atomic_clear_mask(PROG_REQUEST, &amp;vcpu-&gt;arch.sie_block-&gt;prog20);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Kick a guest cpu out of SIE and wait until SIE is not running.</div><div class='ctx'>  * If the CPU is not running (e.g. waiting as idle) the function will</div><div class='hunk'>@@ -1430,11 +1453,11 @@ void exit_sie(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Kick a guest cpu out of SIE and prevent SIE-reentry */</div><div class='del'>-void exit_sie_sync(struct kvm_vcpu *vcpu)</div><div class='add'>+/* Kick a guest cpu out of SIE to process a request synchronously */</div><div class='add'>+void kvm_s390_sync_request(int req, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	s390_vcpu_block(vcpu);</div><div class='del'>-	exit_sie(vcpu);</div><div class='add'>+	kvm_make_request(req, vcpu);</div><div class='add'>+	kvm_s390_vcpu_request(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_gmap_notifier(struct gmap *gmap, unsigned long address)</div><div class='hunk'>@@ -1447,8 +1470,7 @@ static void kvm_gmap_notifier(struct gmap *gmap, unsigned long address)</div><div class='ctx'> 		/* match against both prefix pages */</div><div class='ctx'> 		if (kvm_s390_get_prefix(vcpu) == (address &amp; ~0x1000UL)) {</div><div class='ctx'> 			VCPU_EVENT(vcpu, 2, "gmap notifier for %lx", address);</div><div class='del'>-			kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);</div><div class='del'>-			exit_sie_sync(vcpu);</div><div class='add'>+			kvm_s390_sync_request(KVM_REQ_MMU_RELOAD, vcpu);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1720,8 +1742,10 @@ static bool ibs_enabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static int kvm_s390_handle_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	if (!vcpu-&gt;requests)</div><div class='add'>+		return 0;</div><div class='ctx'> retry:</div><div class='del'>-	s390_vcpu_unblock(vcpu);</div><div class='add'>+	kvm_s390_vcpu_request_handled(vcpu);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We use MMU_RELOAD just to re-arm the ipte notifier for the</div><div class='ctx'> 	 * guest prefix page. gmap_ipte_notify will wait on the ptl lock.</div><div class='hunk'>@@ -1993,12 +2017,14 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * As PF_VCPU will be used in fault handler, between</div><div class='ctx'> 		 * guest_enter and guest_exit should be no uaccess.</div><div class='ctx'> 		 */</div><div class='del'>-		preempt_disable();</div><div class='del'>-		kvm_guest_enter();</div><div class='del'>-		preempt_enable();</div><div class='add'>+		local_irq_disable();</div><div class='add'>+		__kvm_guest_enter();</div><div class='add'>+		local_irq_enable();</div><div class='ctx'> 		exit_reason = sie64a(vcpu-&gt;arch.sie_block,</div><div class='ctx'> 				     vcpu-&gt;run-&gt;s.regs.gprs);</div><div class='del'>-		kvm_guest_exit();</div><div class='add'>+		local_irq_disable();</div><div class='add'>+		__kvm_guest_exit();</div><div class='add'>+		local_irq_enable();</div><div class='ctx'> 		vcpu-&gt;srcu_idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='ctx'> </div><div class='ctx'> 		rc = vcpu_post_run(vcpu, exit_reason);</div><div class='hunk'>@@ -2068,7 +2094,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)</div><div class='ctx'> 	if (!kvm_s390_user_cpu_state_ctrl(vcpu-&gt;kvm)) {</div><div class='ctx'> 		kvm_s390_vcpu_start(vcpu);</div><div class='ctx'> 	} else if (is_vcpu_stopped(vcpu)) {</div><div class='del'>-		pr_err_ratelimited("kvm-s390: can't run stopped vcpu %d\n",</div><div class='add'>+		pr_err_ratelimited("can't run stopped vcpu %d\n",</div><div class='ctx'> 				   vcpu-&gt;vcpu_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2206,8 +2232,7 @@ int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr)</div><div class='ctx'> static void __disable_ibs_on_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_check_request(KVM_REQ_ENABLE_IBS, vcpu);</div><div class='del'>-	kvm_make_request(KVM_REQ_DISABLE_IBS, vcpu);</div><div class='del'>-	exit_sie_sync(vcpu);</div><div class='add'>+	kvm_s390_sync_request(KVM_REQ_DISABLE_IBS, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __disable_ibs_on_all_vcpus(struct kvm *kvm)</div><div class='hunk'>@@ -2223,8 +2248,7 @@ static void __disable_ibs_on_all_vcpus(struct kvm *kvm)</div><div class='ctx'> static void __enable_ibs_on_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_check_request(KVM_REQ_DISABLE_IBS, vcpu);</div><div class='del'>-	kvm_make_request(KVM_REQ_ENABLE_IBS, vcpu);</div><div class='del'>-	exit_sie_sync(vcpu);</div><div class='add'>+	kvm_s390_sync_request(KVM_REQ_ENABLE_IBS, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_s390_vcpu_start(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -2563,7 +2587,7 @@ int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> /* Section: memory related */</div><div class='ctx'> int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot,</div><div class='del'>-				   struct kvm_userspace_memory_region *mem,</div><div class='add'>+				   const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				   enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	/* A few sanity checks. We can have memory slots which have to be</div><div class='hunk'>@@ -2581,8 +2605,9 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new,</div><div class='ctx'> 				enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -2601,7 +2626,7 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> 	rc = gmap_map_segment(kvm-&gt;arch.gmap, mem-&gt;userspace_addr,</div><div class='ctx'> 		mem-&gt;guest_phys_addr, mem-&gt;memory_size);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		printk(KERN_WARNING "kvm-s390: failed to commit memory region\n");</div><div class='add'>+		pr_warn("failed to commit memory region\n");</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h<br/>index ca108b90ae56..c5704786e473 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kvm/kvm-s390.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/kvm-s390.h</a></div><div class='hunk'>@@ -211,10 +211,10 @@ int kvm_s390_vcpu_store_status(struct kvm_vcpu *vcpu, unsigned long addr);</div><div class='ctx'> int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr);</div><div class='ctx'> void kvm_s390_vcpu_start(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_s390_vcpu_stop(struct kvm_vcpu *vcpu);</div><div class='del'>-void s390_vcpu_block(struct kvm_vcpu *vcpu);</div><div class='del'>-void s390_vcpu_unblock(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_s390_vcpu_block(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_s390_vcpu_unblock(struct kvm_vcpu *vcpu);</div><div class='ctx'> void exit_sie(struct kvm_vcpu *vcpu);</div><div class='del'>-void exit_sie_sync(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_s390_sync_request(int req, struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_s390_vcpu_setup_cmma(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_s390_vcpu_unsetup_cmma(struct kvm_vcpu *vcpu);</div><div class='ctx'> /* is cmma enabled */</div><div class='hunk'>@@ -228,6 +228,25 @@ int kvm_s390_handle_diag(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_s390_inject_prog_irq(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			     struct kvm_s390_pgm_info *pgm_info);</div><div class='ctx'> </div><div class='add'>+static inline void kvm_s390_vcpu_block_all(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;kvm-&gt;lock));</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm)</div><div class='add'>+		kvm_s390_vcpu_block(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvm_s390_vcpu_unblock_all(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm)</div><div class='add'>+		kvm_s390_vcpu_unblock(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_s390_inject_prog_cond - conditionally inject a program check</div><div class='ctx'>  * @vcpu: virtual cpu</div><div class='head'>diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c<br/>index d22d8ee1ff9d..ad4242245771 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/priv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/kvm/priv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/priv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/kvm/priv.c</a></div><div class='hunk'>@@ -698,10 +698,14 @@ static int handle_pfmf(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	case 0x00001000:</div><div class='ctx'> 		end = (start + (1UL &lt;&lt; 20)) &amp; ~((1UL &lt;&lt; 20) - 1);</div><div class='ctx'> 		break;</div><div class='del'>-	/* We dont support EDAT2</div><div class='ctx'> 	case 0x00002000:</div><div class='add'>+		/* only support 2G frame size if EDAT2 is available and we are</div><div class='add'>+		   not in 24-bit addressing mode */</div><div class='add'>+		if (!test_kvm_facility(vcpu-&gt;kvm, 78) ||</div><div class='add'>+		    psw_bits(vcpu-&gt;arch.sie_block-&gt;gpsw).eaba == PSW_AMODE_24BIT)</div><div class='add'>+			return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);</div><div class='ctx'> 		end = (start + (1UL &lt;&lt; 31)) &amp; ~((1UL &lt;&lt; 31) - 1);</div><div class='del'>-		break;*/</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c<br/>index 76515bcea2f1..4c8f5d7f9c23 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/fault.c</a></div><div class='hunk'>@@ -399,7 +399,7 @@ static inline int do_exception(struct pt_regs *regs, int access)</div><div class='ctx'> 	 * user context.</div><div class='ctx'> 	 */</div><div class='ctx'> 	fault = VM_FAULT_BADCONTEXT;</div><div class='del'>-	if (unlikely(!user_space_fault(regs) || in_atomic() || !mm))</div><div class='add'>+	if (unlikely(!user_space_fault(regs) || faulthandler_disabled() || !mm))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	address = trans_exc_code &amp; __FAIL_ADDR_MASK;</div><div class='head'>diff --git a/arch/s390/mm/hugetlbpage.c b/arch/s390/mm/hugetlbpage.c<br/>index e617e74b7be2..fb4bf2c4379e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -86,31 +86,16 @@ static inline pte_t __pmd_to_pte(pmd_t pmd)</div><div class='ctx'> void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		     pte_t *ptep, pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	pmd_t pmd;</div><div class='add'>+	pmd_t pmd = __pte_to_pmd(pte);</div><div class='ctx'> </div><div class='del'>-	pmd = __pte_to_pmd(pte);</div><div class='del'>-	if (!MACHINE_HAS_HPAGE) {</div><div class='del'>-		/* Emulated huge ptes loose the dirty and young bit */</div><div class='del'>-		pmd_val(pmd) &amp;= ~_SEGMENT_ENTRY_ORIGIN;</div><div class='del'>-		pmd_val(pmd) |= pte_page(pte)[1].index;</div><div class='del'>-	} else</div><div class='del'>-		pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;</div><div class='add'>+	pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;</div><div class='ctx'> 	*(pmd_t *) ptep = pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	unsigned long origin;</div><div class='del'>-	pmd_t pmd;</div><div class='add'>+	pmd_t pmd = *(pmd_t *) ptep;</div><div class='ctx'> </div><div class='del'>-	pmd = *(pmd_t *) ptep;</div><div class='del'>-	if (!MACHINE_HAS_HPAGE &amp;&amp; pmd_present(pmd)) {</div><div class='del'>-		origin = pmd_val(pmd) &amp; _SEGMENT_ENTRY_ORIGIN;</div><div class='del'>-		pmd_val(pmd) &amp;= ~_SEGMENT_ENTRY_ORIGIN;</div><div class='del'>-		pmd_val(pmd) |= *(unsigned long *) origin;</div><div class='del'>-		/* Emulated huge ptes are young and dirty by definition */</div><div class='del'>-		pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG | _SEGMENT_ENTRY_DIRTY;</div><div class='del'>-	}</div><div class='ctx'> 	return __pmd_to_pte(pmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -125,45 +110,6 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = page_to_phys(page);</div><div class='del'>-	pte_t pte;</div><div class='del'>-	pte_t *ptep;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (MACHINE_HAS_HPAGE)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ptep = (pte_t *) pte_alloc_one(&amp;init_mm, addr);</div><div class='del'>-	if (!ptep)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pte_val(pte) = addr;</div><div class='del'>-	for (i = 0; i &lt; PTRS_PER_PTE; i++) {</div><div class='del'>-		set_pte_at(&amp;init_mm, addr + i * PAGE_SIZE, ptep + i, pte);</div><div class='del'>-		pte_val(pte) += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-	page[1].index = (unsigned long) ptep;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	pte_t *ptep;</div><div class='del'>-</div><div class='del'>-	if (MACHINE_HAS_HPAGE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ptep = (pte_t *) page[1].index;</div><div class='del'>-	if (!ptep)</div><div class='del'>-		return;</div><div class='del'>-	clear_table((unsigned long *) ptep, _PAGE_INVALID,</div><div class='del'>-		    PTRS_PER_PTE * sizeof(pte_t));</div><div class='del'>-	page_table_free(&amp;init_mm, (unsigned long *) ptep);</div><div class='del'>-	page[1].index = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> pte_t *huge_pte_alloc(struct mm_struct *mm,</div><div class='ctx'> 			unsigned long addr, unsigned long sz)</div><div class='ctx'> {</div><div class='hunk'>@@ -193,17 +139,9 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return (pte_t *) pmdp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pmd_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	if (!MACHINE_HAS_HPAGE)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return !!(pmd_val(pmd) &amp; _SEGMENT_ENTRY_LARGE);</div><div class='add'>+	return pmd_large(pmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pud_huge(pud_t pud)</div><div class='head'>diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c<br/>index 80875c43a4a4..76e873748b56 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/init.c</a></div><div class='hunk'>@@ -213,7 +213,7 @@ unsigned long memory_block_size_bytes(void)</div><div class='ctx'> 	 * Make sure the memory block size is always greater</div><div class='ctx'> 	 * or equal than the memory increment size.</div><div class='ctx'> 	 */</div><div class='del'>-	return max_t(unsigned long, MIN_MEMORY_BLOCK_SIZE, sclp_get_rzm());</div><div class='add'>+	return max_t(unsigned long, MIN_MEMORY_BLOCK_SIZE, sclp.rzm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MEMORY_HOTREMOVE</div><div class='head'>diff --git a/arch/s390/mm/mem_detect.c b/arch/s390/mm/mem_detect.c<br/>index 0f3604395805..e00f0d5d296d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/mem_detect.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/mm/mem_detect.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/mem_detect.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/mm/mem_detect.c</a></div><div class='hunk'>@@ -31,8 +31,8 @@ void __init detect_memory_memblock(void)</div><div class='ctx'> 	unsigned long addr, size;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='del'>-	rzm = sclp_get_rzm();</div><div class='del'>-	rnmax = sclp_get_rnmax();</div><div class='add'>+	rzm = sclp.rzm;</div><div class='add'>+	rnmax = sclp.rnmax;</div><div class='ctx'> 	memsize = rzm * rnmax;</div><div class='ctx'> 	if (!rzm)</div><div class='ctx'> 		rzm = 1ULL &lt;&lt; 17;</div><div class='head'>diff --git a/arch/s390/net/bpf_jit.h b/arch/s390/net/bpf_jit.h<br/>index de156ba3bd71..f6498eec9ee1 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/net/bpf_jit.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/net/bpf_jit.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/net/bpf_jit.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/net/bpf_jit.h</a></div><div class='hunk'>@@ -28,6 +28,9 @@ extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];</div><div class='ctx'>  *	      | old backchain |     |</div><div class='ctx'>  *	      +---------------+     |</div><div class='ctx'>  *	      |   r15 - r6    |     |</div><div class='add'>+ *	      +---------------+     |</div><div class='add'>+ *	      | 4 byte align  |     |</div><div class='add'>+ *	      | tail_call_cnt |     |</div><div class='ctx'>  * BFP	   -&gt; +===============+     |</div><div class='ctx'>  *	      |		      |     |</div><div class='ctx'>  *	      |   BPF stack   |     |</div><div class='hunk'>@@ -46,14 +49,17 @@ extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];</div><div class='ctx'>  * R15	   -&gt; +---------------+     + low</div><div class='ctx'>  *</div><div class='ctx'>  * We get 160 bytes stack space from calling function, but only use</div><div class='del'>- * 11 * 8 byte (old backchain + r15 - r6) for storing registers.</div><div class='add'>+ * 12 * 8 byte for old backchain, r15..r6, and tail_call_cnt.</div><div class='ctx'>  */</div><div class='ctx'> #define STK_SPACE	(MAX_BPF_STACK + 8 + 4 + 4 + 160)</div><div class='del'>-#define STK_160_UNUSED	(160 - 11 * 8)</div><div class='add'>+#define STK_160_UNUSED	(160 - 12 * 8)</div><div class='ctx'> #define STK_OFF		(STK_SPACE - STK_160_UNUSED)</div><div class='ctx'> #define STK_OFF_TMP	160	/* Offset of tmp buffer on stack */</div><div class='ctx'> #define STK_OFF_HLEN	168	/* Offset of SKB header length on stack */</div><div class='ctx'> </div><div class='add'>+#define STK_OFF_R6	(160 - 11 * 8)	/* Offset of r6 on stack */</div><div class='add'>+#define STK_OFF_TCCNT	(160 - 12 * 8)	/* Offset of tail_call_cnt on stack */</div><div class='add'>+</div><div class='ctx'> /* Offset to skip condition code check */</div><div class='ctx'> #define OFF_OK		4</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c<br/>index 55423d8be580..fee782acc2ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/net/bpf_jit_comp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/dis.h&gt;</div><div class='ctx'> #include "bpf_jit.h"</div><div class='hunk'>@@ -40,6 +41,8 @@ struct bpf_jit {</div><div class='ctx'> 	int base_ip;		/* Base address for literal pool */</div><div class='ctx'> 	int ret0_ip;		/* Address of return 0 */</div><div class='ctx'> 	int exit_ip;		/* Address of exit */</div><div class='add'>+	int tail_call_start;	/* Tail call start offset */</div><div class='add'>+	int labels[1];		/* Labels for local jumps */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define BPF_SIZE_MAX	4096	/* Max size for program */</div><div class='hunk'>@@ -49,6 +52,7 @@ struct bpf_jit {</div><div class='ctx'> #define SEEN_RET0	4	/* ret0_ip points to a valid return 0 */</div><div class='ctx'> #define SEEN_LITERAL	8	/* code uses literals */</div><div class='ctx'> #define SEEN_FUNC	16	/* calls C functions */</div><div class='add'>+#define SEEN_TAIL_CALL	32	/* code uses tail calls */</div><div class='ctx'> #define SEEN_STACK	(SEEN_FUNC | SEEN_MEM | SEEN_SKB)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -60,6 +64,7 @@ struct bpf_jit {</div><div class='ctx'> #define REG_L		(__MAX_BPF_REG+3)	/* Literal pool register */</div><div class='ctx'> #define REG_15		(__MAX_BPF_REG+4)	/* Register 15 */</div><div class='ctx'> #define REG_0		REG_W0			/* Register 0 */</div><div class='add'>+#define REG_1		REG_W1			/* Register 1 */</div><div class='ctx'> #define REG_2		BPF_REG_1		/* Register 2 */</div><div class='ctx'> #define REG_14		BPF_REG_0		/* Register 14 */</div><div class='ctx'> </div><div class='hunk'>@@ -223,11 +228,29 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> 	REG_SET_SEEN(b3);					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask)	\</div><div class='add'>+({								\</div><div class='add'>+	int rel = (jit-&gt;labels[label] - jit-&gt;prg) &gt;&gt; 1;		\</div><div class='add'>+	_EMIT6(op1 | reg(b1, b2) &lt;&lt; 16 | (rel &amp; 0xffff),	\</div><div class='add'>+	       op2 | mask &lt;&lt; 12);				\</div><div class='add'>+	REG_SET_SEEN(b1);					\</div><div class='add'>+	REG_SET_SEEN(b2);					\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask)	\</div><div class='add'>+({								\</div><div class='add'>+	int rel = (jit-&gt;labels[label] - jit-&gt;prg) &gt;&gt; 1;		\</div><div class='add'>+	_EMIT6(op1 | (reg_high(b1) | mask) &lt;&lt; 16 |		\</div><div class='add'>+		(rel &amp; 0xffff), op2 | (imm &amp; 0xff) &lt;&lt; 8);	\</div><div class='add'>+	REG_SET_SEEN(b1);					\</div><div class='add'>+	BUILD_BUG_ON(((unsigned long) imm) &gt; 0xff);		\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask)		\</div><div class='ctx'> ({								\</div><div class='ctx'> 	/* Branch instruction needs 6 bytes */			\</div><div class='ctx'> 	int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\</div><div class='del'>-	_EMIT6(op1 | reg(b1, b2) &lt;&lt; 16 | rel, op2 | mask);	\</div><div class='add'>+	_EMIT6(op1 | reg(b1, b2) &lt;&lt; 16 | (rel &amp; 0xffff), op2 | mask);	\</div><div class='ctx'> 	REG_SET_SEEN(b1);					\</div><div class='ctx'> 	REG_SET_SEEN(b2);					\</div><div class='ctx'> })</div><div class='hunk'>@@ -286,7 +309,7 @@ static void jit_fill_hole(void *area, unsigned int size)</div><div class='ctx'>  */</div><div class='ctx'> static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)</div><div class='ctx'> {</div><div class='del'>-	u32 off = 72 + (rs - 6) * 8;</div><div class='add'>+	u32 off = STK_OFF_R6 + (rs - 6) * 8;</div><div class='ctx'> </div><div class='ctx'> 	if (rs == re)</div><div class='ctx'> 		/* stg %rs,off(%r15) */</div><div class='hunk'>@@ -301,7 +324,7 @@ static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)</div><div class='ctx'>  */</div><div class='ctx'> static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)</div><div class='ctx'> {</div><div class='del'>-	u32 off = 72 + (rs - 6) * 8;</div><div class='add'>+	u32 off = STK_OFF_R6 + (rs - 6) * 8;</div><div class='ctx'> </div><div class='ctx'> 	if (jit-&gt;seen &amp; SEEN_STACK)</div><div class='ctx'> 		off += STK_OFF;</div><div class='hunk'>@@ -374,6 +397,16 @@ static void save_restore_regs(struct bpf_jit *jit, int op)</div><div class='ctx'>  */</div><div class='ctx'> static void bpf_jit_prologue(struct bpf_jit *jit)</div><div class='ctx'> {</div><div class='add'>+	if (jit-&gt;seen &amp; SEEN_TAIL_CALL) {</div><div class='add'>+		/* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */</div><div class='add'>+		_EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT);</div><div class='add'>+	} else {</div><div class='add'>+		/* j tail_call_start: NOP if no tail calls are used */</div><div class='add'>+		EMIT4_PCREL(0xa7f40000, 6);</div><div class='add'>+		_EMIT2(0);</div><div class='add'>+	}</div><div class='add'>+	/* Tail calls have to skip above initialization */</div><div class='add'>+	jit-&gt;tail_call_start = jit-&gt;prg;</div><div class='ctx'> 	/* Save registers */</div><div class='ctx'> 	save_restore_regs(jit, REGS_SAVE);</div><div class='ctx'> 	/* Setup literal pool */</div><div class='hunk'>@@ -951,6 +984,75 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i</div><div class='ctx'> 		EMIT4(0xb9040000, BPF_REG_0, REG_2);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case BPF_JMP | BPF_CALL | BPF_X:</div><div class='add'>+		/*</div><div class='add'>+		 * Implicit input:</div><div class='add'>+		 *  B1: pointer to ctx</div><div class='add'>+		 *  B2: pointer to bpf_array</div><div class='add'>+		 *  B3: index in bpf_array</div><div class='add'>+		 */</div><div class='add'>+		jit-&gt;seen |= SEEN_TAIL_CALL;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * if (index &gt;= array-&gt;map.max_entries)</div><div class='add'>+		 *         goto out;</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* llgf %w1,map.max_entries(%b2) */</div><div class='add'>+		EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2,</div><div class='add'>+			      offsetof(struct bpf_array, map.max_entries));</div><div class='add'>+		/* clgrj %b3,%w1,0xa,label0: if %b3 &gt;= %w1 goto out */</div><div class='add'>+		EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3,</div><div class='add'>+				  REG_W1, 0, 0xa);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * if (tail_call_cnt++ &gt; MAX_TAIL_CALL_CNT)</div><div class='add'>+		 *         goto out;</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		if (jit-&gt;seen &amp; SEEN_STACK)</div><div class='add'>+			off = STK_OFF_TCCNT + STK_OFF;</div><div class='add'>+		else</div><div class='add'>+			off = STK_OFF_TCCNT;</div><div class='add'>+		/* lhi %w0,1 */</div><div class='add'>+		EMIT4_IMM(0xa7080000, REG_W0, 1);</div><div class='add'>+		/* laal %w1,%w0,off(%r15) */</div><div class='add'>+		EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off);</div><div class='add'>+		/* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */</div><div class='add'>+		EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1,</div><div class='add'>+				      MAX_TAIL_CALL_CNT, 0, 0x2);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * prog = array-&gt;prog[index];</div><div class='add'>+		 * if (prog == NULL)</div><div class='add'>+		 *         goto out;</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* sllg %r1,%b3,3: %r1 = index * 8 */</div><div class='add'>+		EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3);</div><div class='add'>+		/* lg %r1,prog(%b2,%r1) */</div><div class='add'>+		EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2,</div><div class='add'>+			      REG_1, offsetof(struct bpf_array, prog));</div><div class='add'>+		/* clgij %r1,0,0x8,label0 */</div><div class='add'>+		EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Restore registers before calling function</div><div class='add'>+		 */</div><div class='add'>+		save_restore_regs(jit, REGS_RESTORE);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * goto *(prog-&gt;bpf_func + tail_call_start);</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* lg %r1,bpf_func(%r1) */</div><div class='add'>+		EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0,</div><div class='add'>+			      offsetof(struct bpf_prog, bpf_func));</div><div class='add'>+		/* bc 0xf,tail_call_start(%r1) */</div><div class='add'>+		_EMIT4(0x47f01000 + jit-&gt;tail_call_start);</div><div class='add'>+		/* out: */</div><div class='add'>+		jit-&gt;labels[0] = jit-&gt;prg;</div><div class='add'>+		break;</div><div class='ctx'> 	case BPF_JMP | BPF_EXIT: /* return b0 */</div><div class='ctx'> 		last = (i == fp-&gt;len - 1) ? 1 : 0;</div><div class='ctx'> 		if (last &amp;&amp; !(jit-&gt;seen &amp; SEEN_RET0))</div><div class='head'>diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c<br/>index bc927a09a172..9cfa2ffaa9d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/oprofile/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/oprofile/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/oprofile/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/oprofile/init.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/perf_event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../../../drivers/oprofile/oprof.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/pci/pci_event.c b/arch/s390/pci/pci_event.c<br/>index 460fdb21cf61..ed2394dd14e9 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/pci/pci_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/s390/pci/pci_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/pci/pci_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/s390/pci/pci_event.c</a></div><div class='hunk'>@@ -75,7 +75,13 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)</div><div class='ctx'> 	zpci_err_hex(ccdf, sizeof(*ccdf));</div><div class='ctx'> </div><div class='ctx'> 	switch (ccdf-&gt;pec) {</div><div class='del'>-	case 0x0301: /* Standby -&gt; Configured */</div><div class='add'>+	case 0x0301: /* Reserved|Standby -&gt; Configured */</div><div class='add'>+		if (!zdev) {</div><div class='add'>+			ret = clp_add_pci_device(ccdf-&gt;fid, ccdf-&gt;fh, 0);</div><div class='add'>+			if (ret)</div><div class='add'>+				break;</div><div class='add'>+			zdev = get_zdev_by_fid(ccdf-&gt;fid);</div><div class='add'>+		}</div><div class='ctx'> 		if (!zdev || zdev-&gt;state != ZPCI_FN_STATE_STANDBY)</div><div class='ctx'> 			break;</div><div class='ctx'> 		zdev-&gt;state = ZPCI_FN_STATE_CONFIGURED;</div><div class='head'>diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild<br/>index 83ed116d414c..92ffe397b893 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/score/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/Kbuild</a></div><div class='hunk'>@@ -7,8 +7,8 @@ generic-y += clkdev.h</div><div class='ctx'> generic-y += cputime.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='ctx'> generic-y += xor.h</div><div class='head'>diff --git a/arch/score/include/asm/cmpxchg.h b/arch/score/include/asm/cmpxchg.h<br/>index f384839c3ee5..cc3f6420b71c 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/score/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -42,8 +42,6 @@ static inline unsigned long __cmpxchg(volatile unsigned long *m,</div><div class='ctx'> 					(unsigned long)(o),	\</div><div class='ctx'> 					(unsigned long)(n)))</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='del'>-</div><div class='ctx'> #include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SCORE_CMPXCHG_H */</div><div class='head'>diff --git a/arch/score/include/asm/uaccess.h b/arch/score/include/asm/uaccess.h<br/>index ab66ddde777b..20a3591225cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/score/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/include/asm/uaccess.h</a></div><div class='hunk'>@@ -36,7 +36,8 @@</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='hunk'>@@ -61,7 +62,8 @@</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -79,7 +81,8 @@</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -98,7 +101,8 @@</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -119,7 +123,8 @@</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='head'>diff --git a/arch/score/mm/fault.c b/arch/score/mm/fault.c<br/>index 6860beb2a280..37a6c2e0e969 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/score/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/score/mm/fault.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This routine handles page faults.  It determines the address,</div><div class='hunk'>@@ -73,7 +74,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,</div><div class='ctx'> 	* If we're in an interrupt or have no user</div><div class='ctx'> 	* context, we must not take the fault..</div><div class='ctx'> 	*/</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (pagefault_disabled() || !mm)</div><div class='ctx'> 		goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c<br/>index 522786318d36..40e2b585d488 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-highlander/psw.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/boards/mach-highlander/psw.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-highlander/psw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/boards/mach-highlander/psw.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;mach/highlander.h&gt;</div><div class='head'>diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c<br/>index bef83522f958..5192b1f43ada 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-landisk/psw.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/boards/mach-landisk/psw.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-landisk/psw.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/boards/mach-landisk/psw.c</a></div><div class='hunk'>@@ -140,4 +140,4 @@ static int __init psw_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_add_devices(psw_devices, ARRAY_SIZE(psw_devices));</div><div class='ctx'> }</div><div class='del'>-module_init(psw_init);</div><div class='add'>+device_initcall(psw_init);</div><div class='head'>diff --git a/arch/sh/drivers/pci/ops-sh5.c b/arch/sh/drivers/pci/ops-sh5.c<br/>index 4ce95a001b80..45361946460f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/ops-sh5.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/drivers/pci/ops-sh5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/ops-sh5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/drivers/pci/ops-sh5.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include "pci-sh5.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c<br/>index 16c1e721bf54..8229114c6a58 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/pci-sh5.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/drivers/pci/pci-sh5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/pci-sh5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/drivers/pci/pci-sh5.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;cpu/irq.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include "pci-sh5.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild<br/>index 654ebb6bd5d8..aac452b26aa8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/Kbuild</a></div><div class='hunk'>@@ -16,6 +16,7 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += param.h</div><div class='hunk'>@@ -24,7 +25,6 @@ generic-y += percpu.h</div><div class='ctx'> generic-y += poll.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += serial.h</div><div class='ctx'> generic-y += shmbuf.h</div><div class='head'>diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h<br/>index 43715308b068..bf91037db4e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/barrier.h</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #define ctrl_barrier()	__asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value) do { (void)xchg(&amp;var, value); } while (0)</div><div class='add'>+#define smp_store_mb(var, value) do { (void)xchg(&amp;var, value); } while (0)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/barrier.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h<br/>index f6bd1406b897..85c97b188d71 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -46,8 +46,6 @@ extern void __xchg_called_with_bad_pointer(void);</div><div class='ctx'>  * if something tries to do an invalid cmpxchg(). */</div><div class='ctx'> extern void __cmpxchg_called_with_bad_pointer(void);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,</div><div class='ctx'> 		unsigned long new, int size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sh/include/asm/hugetlb.h b/arch/sh/include/asm/hugetlb.h<br/>index 699255d6d1c6..ef489a56fcce 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -26,9 +26,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) {</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,</div><div class='ctx'> 					  unsigned long addr, unsigned long end,</div><div class='ctx'> 					  unsigned long floor,</div><div class='hunk'>@@ -82,15 +79,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	clear_bit(PG_dcache_clean, &amp;page-&gt;flags);</div><div class='head'>diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h<br/>index 5b4511552998..e343dbd02e41 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/include/asm/pci.h</a></div><div class='hunk'>@@ -86,24 +86,6 @@ extern void pcibios_set_master(struct pci_dev *dev);</div><div class='ctx'>  * direct memory write.</div><div class='ctx'>  */</div><div class='ctx'> #define PCI_DISABLE_MWI</div><div class='del'>-</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = L1_CACHE_BYTES;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = byte &lt;&lt; 2;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_MULTIPLE;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Board-specific fixup routines. */</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c<br/>index 1fdf1ee672de..7f54bf2f453d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7734.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/kernel/cpu/sh4a/clock-sh7734.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7734.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7734.c</a></div><div class='hunk'>@@ -246,8 +246,7 @@ int __init arch_clk_init(void)</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(main_clks); i++)</div><div class='ctx'> 		ret |= clk_register(main_clks[i]);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c<br/>index 9a28fdb36387..e40ec2c97ad1 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7757.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/kernel/cpu/sh4a/clock-sh7757.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7757.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7757.c</a></div><div class='hunk'>@@ -141,8 +141,8 @@ int __init arch_clk_init(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='ctx'> 		ret |= clk_register(clks[i]);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c<br/>index 17d0ea55a5a2..8eb6e62340c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7785.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/kernel/cpu/sh4a/clock-sh7785.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7785.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7785.c</a></div><div class='hunk'>@@ -164,8 +164,8 @@ int __init arch_clk_init(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='ctx'> 		ret |= clk_register(clks[i]);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c<br/>index bec2a83f1ba5..5e50e7ebeff0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7786.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/kernel/cpu/sh4a/clock-sh7786.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7786.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-sh7786.c</a></div><div class='hunk'>@@ -179,8 +179,8 @@ int __init arch_clk_init(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='ctx'> 		ret |= clk_register(clks[i]);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c<br/>index 9a49a44f6f94..605221d1448a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-shx3.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/kernel/cpu/sh4a/clock-shx3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-shx3.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/kernel/cpu/sh4a/clock-shx3.c</a></div><div class='hunk'>@@ -138,8 +138,8 @@ int __init arch_clk_init(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='ctx'> 		ret |= clk_register(clks[i]);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='head'>diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c<br/>index a58fec9b55e0..79d8276377d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/mm/fault.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io_trapped.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -438,9 +439,9 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt, have no user context or are running</div><div class='del'>-	 * in an atomic region then we must not take the fault:</div><div class='add'>+	 * with pagefaults disabled then we must not take the fault:</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(in_atomic() || !mm)) {</div><div class='add'>+	if (unlikely(faulthandler_disabled() || !mm)) {</div><div class='ctx'> 		bad_area_nosemaphore(regs, error_code, address);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sh/mm/hugetlbpage.c b/arch/sh/mm/hugetlbpage.c<br/>index 534bc978af8a..6385f60209b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sh/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sh/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -62,11 +62,6 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pmd_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig<br/>index e49502acbab4..56442d2d7bbc 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/Kconfig</a></div><div class='hunk'>@@ -25,6 +25,7 @@ config SPARC</div><div class='ctx'> 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='ctx'> 	select RTC_CLASS</div><div class='ctx'> 	select RTC_DRV_M48T59</div><div class='add'>+	select RTC_SYSTOHC</div><div class='ctx'> 	select HAVE_DMA_ATTRS</div><div class='ctx'> 	select HAVE_DMA_API_DEBUG</div><div class='ctx'> 	select HAVE_ARCH_JUMP_LABEL if SPARC64</div><div class='hunk'>@@ -35,7 +36,6 @@ config SPARC</div><div class='ctx'> 	select HAVE_BPF_JIT</div><div class='ctx'> 	select HAVE_DEBUG_BUGVERBOSE</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='del'>-	select GENERIC_CMOS_UPDATE</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GENERIC_STRNCPY_FROM_USER</div><div class='ctx'> 	select GENERIC_STRNLEN_USER</div><div class='head'>diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c<br/>index b688731d7ede..c9d2b922734b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/crypto/md5_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/crypto/md5_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/crypto/md5_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/crypto/md5_glue.c</a></div><div class='hunk'>@@ -33,10 +33,10 @@ static int md5_sparc64_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mctx-&gt;hash[0] = cpu_to_le32(0x67452301);</div><div class='del'>-	mctx-&gt;hash[1] = cpu_to_le32(0xefcdab89);</div><div class='del'>-	mctx-&gt;hash[2] = cpu_to_le32(0x98badcfe);</div><div class='del'>-	mctx-&gt;hash[3] = cpu_to_le32(0x10325476);</div><div class='add'>+	mctx-&gt;hash[0] = cpu_to_le32(MD5_H0);</div><div class='add'>+	mctx-&gt;hash[1] = cpu_to_le32(MD5_H1);</div><div class='add'>+	mctx-&gt;hash[2] = cpu_to_le32(MD5_H2);</div><div class='add'>+	mctx-&gt;hash[3] = cpu_to_le32(MD5_H3);</div><div class='ctx'> 	mctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild<br/>index 94f36e7086a7..e928618838bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/Kbuild</a></div><div class='hunk'>@@ -12,10 +12,10 @@ generic-y += linkage.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += serial.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='ctx'> generic-y += types.h</div><div class='head'>diff --git a/arch/sparc/include/asm/barrier_64.h b/arch/sparc/include/asm/barrier_64.h<br/>index 76648941fea7..809941e33e12 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/barrier_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/barrier_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/barrier_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/barrier_64.h</a></div><div class='hunk'>@@ -40,8 +40,8 @@ do {	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t" \</div><div class='ctx'> #define dma_rmb()	rmb()</div><div class='ctx'> #define dma_wmb()	wmb()</div><div class='ctx'> </div><div class='del'>-#define set_mb(__var, __value) \</div><div class='del'>-	do { __var = __value; membar_safe("#StoreLoad"); } while(0)</div><div class='add'>+#define smp_store_mb(__var, __value) \</div><div class='add'>+	do { WRITE_ONCE(__var, __value); membar_safe("#StoreLoad"); } while(0)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> #define smp_mb()	mb()</div><div class='head'>diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h<br/>index d38b52dca216..83ffb83c5397 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/cmpxchg_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/cmpxchg_32.h</a></div><div class='hunk'>@@ -34,7 +34,6 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int</div><div class='ctx'>  *</div><div class='ctx'>  * Cribbed from &lt;asm-parisc/atomic.h&gt;</div><div class='ctx'>  */</div><div class='del'>-#define __HAVE_ARCH_CMPXCHG	1</div><div class='ctx'> </div><div class='ctx'> /* bug catcher for when unsupported size is used - won't link */</div><div class='ctx'> void __cmpxchg_called_with_bad_pointer(void);</div><div class='head'>diff --git a/arch/sparc/include/asm/cmpxchg_64.h b/arch/sparc/include/asm/cmpxchg_64.h<br/>index 0e1ed6cfbf68..faa2f61058c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/cmpxchg_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/cmpxchg_64.h</a></div><div class='hunk'>@@ -65,8 +65,6 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> __cmpxchg_u32(volatile int *m, int old, int new)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sparc/include/asm/hugetlb.h b/arch/sparc/include/asm/hugetlb.h<br/>index e4cab465b81f..139e711ff80c 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -11,10 +11,6 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 			      pte_t *ptep);</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int is_hugepage_only_range(struct mm_struct *mm,</div><div class='ctx'> 					 unsigned long addr,</div><div class='ctx'> 					 unsigned long len) {</div><div class='hunk'>@@ -82,15 +78,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h<br/>index 407ac14295f4..57f26c398dc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/io_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/io_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/io_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/io_32.h</a></div><div class='hunk'>@@ -129,6 +129,7 @@ static inline void sbus_memcpy_toio(volatile void __iomem *dst,</div><div class='ctx'> void __iomem *ioremap(unsigned long offset, unsigned long size);</div><div class='ctx'> #define ioremap_nocache(X,Y)	ioremap((X),(Y))</div><div class='ctx'> #define ioremap_wc(X,Y)		ioremap((X),(Y))</div><div class='add'>+#define ioremap_wt(X,Y)		ioremap((X),(Y))</div><div class='ctx'> void iounmap(volatile void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> /* Create a virtual mapping cookie for an IO port range */</div><div class='head'>diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h<br/>index 50d4840d9aeb..c32fa3f752c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/io_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/io_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/io_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/io_64.h</a></div><div class='hunk'>@@ -402,6 +402,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)</div><div class='ctx'> </div><div class='ctx'> #define ioremap_nocache(X,Y)		ioremap((X),(Y))</div><div class='ctx'> #define ioremap_wc(X,Y)			ioremap((X),(Y))</div><div class='add'>+#define ioremap_wt(X,Y)			ioremap((X),(Y))</div><div class='ctx'> </div><div class='ctx'> static inline void iounmap(volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h<br/>index 53e9b4987db0..b7c092df3134 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pci_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/pci_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pci_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pci_32.h</a></div><div class='hunk'>@@ -22,16 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> struct pci_dev;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_LEON_PCI</div><div class='head'>diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h<br/>index bd00a6226169..022d16008a00 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pci_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/pci_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pci_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pci_64.h</a></div><div class='hunk'>@@ -31,25 +31,6 @@</div><div class='ctx'> #define PCI64_REQUIRED_MASK	(~(u64)0)</div><div class='ctx'> #define PCI64_ADDR_BASE		0xfffc000000000000UL</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &amp;byte);</div><div class='del'>-	if (byte == 0)</div><div class='del'>-		cacheline_size = 1024;</div><div class='del'>-	else</div><div class='del'>-		cacheline_size = (int) byte * 4;</div><div class='del'>-</div><div class='del'>-	*strat = PCI_DMA_BURST_BOUNDARY;</div><div class='del'>-	*strategy_parameter = cacheline_size;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Return the index of the PCI controller for device PDEV. */</div><div class='ctx'> </div><div class='ctx'> int pci_domain_nr(struct pci_bus *bus);</div><div class='head'>diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h<br/>index 2a52c91d2c8a..131d36fcd07a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/pgtable_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/pgtable_64.h</a></div><div class='hunk'>@@ -865,10 +865,10 @@ static inline unsigned long pud_pfn(pud_t pud)</div><div class='ctx'> void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,</div><div class='ctx'> 		   pte_t *ptep, pte_t orig, int fullmm);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long addr,</div><div class='del'>-				       pmd_t *pmdp)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+					    unsigned long addr,</div><div class='add'>+					    pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd = *pmdp;</div><div class='ctx'> 	set_pmd_at(mm, addr, pmdp, __pmd(0UL));</div><div class='head'>diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h<br/>index d1761df5cca6..01d17046225a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/topology_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/topology_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/topology_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/topology_64.h</a></div><div class='hunk'>@@ -41,7 +41,7 @@ static inline int pcibus_to_node(struct pci_bus *pbus)</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_data(cpu).proc_id)</div><div class='ctx'> #define topology_core_id(cpu)			(cpu_data(cpu).core_id)</div><div class='ctx'> #define topology_core_cpumask(cpu)		(&amp;cpu_core_sib_map[cpu])</div><div class='del'>-#define topology_thread_cpumask(cpu)		(&amp;per_cpu(cpu_sibling_map, cpu))</div><div class='add'>+#define topology_sibling_cpumask(cpu)		(&amp;per_cpu(cpu_sibling_map, cpu))</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> extern cpumask_t cpu_core_map[NR_CPUS];</div><div class='head'>diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h<br/>index a35194b7dba0..ea6e9a20f3ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/include/asm/uaccess_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/include/asm/uaccess_64.h</a></div><div class='hunk'>@@ -49,6 +49,28 @@ do {										\</div><div class='ctx'> 	__asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg));	\</div><div class='ctx'> } while(0)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Test whether a block of memory is a valid user space address.</div><div class='add'>+ * Returns 0 if the range is valid, nonzero otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool __chk_range_not_ok(unsigned long addr, unsigned long size, unsigned long limit)</div><div class='add'>+{</div><div class='add'>+	if (__builtin_constant_p(size))</div><div class='add'>+		return addr &gt; limit - size;</div><div class='add'>+</div><div class='add'>+	addr += size;</div><div class='add'>+	if (addr &lt; size)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return addr &gt; limit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __range_not_ok(addr, size, limit)                               \</div><div class='add'>+({                                                                      \</div><div class='add'>+	__chk_user_ptr(addr);                                           \</div><div class='add'>+	__chk_range_not_ok((unsigned long __force)(addr), size, limit); \</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> static inline int __access_ok(const void __user * addr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return 1;</div><div class='head'>diff --git a/arch/sparc/kernel/iommu_common.h b/arch/sparc/kernel/iommu_common.h<br/>index f4be0d724fc6..b40cec252905 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/iommu_common.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/kernel/iommu_common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/iommu_common.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/iommu_common.h</a></div><div class='hunk'>@@ -13,9 +13,9 @@</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/iommu-helper.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These give mapping size of each iommu pte/tlb.</div><div class='head'>diff --git a/arch/sparc/kernel/ldc.c b/arch/sparc/kernel/ldc.c<br/>index 7d3ca30fcd15..1ae5eb1bb045 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/ldc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/kernel/ldc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/ldc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/ldc.c</a></div><div class='hunk'>@@ -2086,6 +2086,7 @@ int ldc_map_sg(struct ldc_channel *lp,</div><div class='ctx'> 	struct cookie_state state;</div><div class='ctx'> 	struct ldc_iommu *iommu;</div><div class='ctx'> 	int err;</div><div class='add'>+	struct scatterlist *s;</div><div class='ctx'> </div><div class='ctx'> 	if (map_perm &amp; ~LDC_MAP_ALL)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2112,9 +2113,10 @@ int ldc_map_sg(struct ldc_channel *lp,</div><div class='ctx'> 	state.pte_idx = (base - iommu-&gt;page_table);</div><div class='ctx'> 	state.nc = 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; num_sg; i++)</div><div class='del'>-		fill_cookies(&amp;state, page_to_pfn(sg_page(&amp;sg[i])) &lt;&lt; PAGE_SHIFT,</div><div class='del'>-			     sg[i].offset, sg[i].length);</div><div class='add'>+	for_each_sg(sg, s, num_sg, i) {</div><div class='add'>+		fill_cookies(&amp;state, page_to_pfn(sg_page(s)) &lt;&lt; PAGE_SHIFT,</div><div class='add'>+			     s-&gt;offset, s-&gt;length);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return state.nc;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c<br/>index 59cf917a77b5..689db65f8529 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/perf_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/perf_event.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> #include &lt;asm/cpudata.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/pcr.h&gt;</div><div class='hunk'>@@ -1741,18 +1741,31 @@ void perf_callchain_kernel(struct perf_callchain_entry *entry,</div><div class='ctx'> 	} while (entry-&gt;nr &lt; PERF_MAX_STACK_DEPTH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int</div><div class='add'>+valid_user_frame(const void __user *fp, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	/* addresses should be at least 4-byte aligned */</div><div class='add'>+	if (((unsigned long) fp) &amp; 3)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return (__range_not_ok(fp, size, TASK_SIZE) == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void perf_callchain_user_64(struct perf_callchain_entry *entry,</div><div class='ctx'> 				   struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ufp;</div><div class='ctx'> </div><div class='del'>-	ufp = regs-&gt;u_regs[UREG_I6] + STACK_BIAS;</div><div class='add'>+	ufp = regs-&gt;u_regs[UREG_FP] + STACK_BIAS;</div><div class='ctx'> 	do {</div><div class='ctx'> 		struct sparc_stackf __user *usf;</div><div class='ctx'> 		struct sparc_stackf sf;</div><div class='ctx'> 		unsigned long pc;</div><div class='ctx'> </div><div class='ctx'> 		usf = (struct sparc_stackf __user *)ufp;</div><div class='add'>+		if (!valid_user_frame(usf, sizeof(sf)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		if (__copy_from_user_inatomic(&amp;sf, usf, sizeof(sf)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -1767,7 +1780,7 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ufp;</div><div class='ctx'> </div><div class='del'>-	ufp = regs-&gt;u_regs[UREG_I6] &amp; 0xffffffffUL;</div><div class='add'>+	ufp = regs-&gt;u_regs[UREG_FP] &amp; 0xffffffffUL;</div><div class='ctx'> 	do {</div><div class='ctx'> 		unsigned long pc;</div><div class='ctx'> </div><div class='hunk'>@@ -1803,8 +1816,13 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	flushw_user();</div><div class='add'>+</div><div class='add'>+	pagefault_disable();</div><div class='add'>+</div><div class='ctx'> 	if (test_thread_flag(TIF_32BIT))</div><div class='ctx'> 		perf_callchain_user_32(entry, regs);</div><div class='ctx'> 	else</div><div class='ctx'> 		perf_callchain_user_64(entry, regs);</div><div class='add'>+</div><div class='add'>+	pagefault_enable();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c<br/>index 8caf45ee81d9..c9692f387cee 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/time_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/kernel/time_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/time_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/time_32.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/rtc/m48t59.h&gt;</div><div class='ctx'> #include &lt;linux/timex.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='hunk'>@@ -65,8 +64,6 @@ DEFINE_PER_CPU(struct clock_event_device, sparc32_clockevent);</div><div class='ctx'> DEFINE_SPINLOCK(rtc_lock);</div><div class='ctx'> EXPORT_SYMBOL(rtc_lock);</div><div class='ctx'> </div><div class='del'>-static int set_rtc_mmss(unsigned long);</div><div class='del'>-</div><div class='ctx'> unsigned long profile_pc(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	extern char __copy_user_begin[], __copy_user_end[];</div><div class='hunk'>@@ -87,11 +84,6 @@ EXPORT_SYMBOL(profile_pc);</div><div class='ctx'> </div><div class='ctx'> volatile u32 __iomem *master_l10_counter;</div><div class='ctx'> </div><div class='del'>-int update_persistent_clock(struct timespec now)</div><div class='del'>-{</div><div class='del'>-	return set_rtc_mmss(now.tv_sec);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> irqreturn_t notrace timer_interrupt(int dummy, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	if (timer_cs_enabled) {</div><div class='hunk'>@@ -362,16 +354,3 @@ void __init time_init(void)</div><div class='ctx'> 		sbus_time_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int set_rtc_mmss(unsigned long secs)</div><div class='del'>-{</div><div class='del'>-	struct rtc_device *rtc = rtc_class_open("rtc0");</div><div class='del'>-	int err = -1;</div><div class='del'>-</div><div class='del'>-	if (rtc) {</div><div class='del'>-		err = rtc_set_mmss(rtc, secs);</div><div class='del'>-		rtc_class_close(rtc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c<br/>index edbbeb157d46..2e6035c0a8ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/time_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/kernel/time_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/time_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/kernel/time_64.c</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/miscdevice.h&gt;</div><div class='del'>-#include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/rtc/m48t59.h&gt;</div><div class='ctx'> #include &lt;linux/kernel_stat.h&gt;</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='hunk'>@@ -394,19 +393,6 @@ static struct sparc64_tick_ops hbtick_operations __read_mostly = {</div><div class='ctx'> </div><div class='ctx'> static unsigned long timer_ticks_per_nsec_quotient __read_mostly;</div><div class='ctx'> </div><div class='del'>-int update_persistent_clock(struct timespec now)</div><div class='del'>-{</div><div class='del'>-	struct rtc_device *rtc = rtc_class_open("rtc0");</div><div class='del'>-	int err = -1;</div><div class='del'>-</div><div class='del'>-	if (rtc) {</div><div class='del'>-		err = rtc_set_mmss(rtc, now.tv_sec);</div><div class='del'>-		rtc_class_close(rtc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> unsigned long cmos_regs;</div><div class='ctx'> EXPORT_SYMBOL(cmos_regs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c<br/>index 70d817154fe8..c399e7b3b035 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/fault_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/mm/fault_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/fault_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/fault_32.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='hunk'>@@ -29,7 +30,6 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mm_32.h"</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +196,7 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (pagefault_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='head'>diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c<br/>index 479823249429..dbabe5713a15 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/fault_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/mm/fault_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/fault_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/fault_64.c</a></div><div class='hunk'>@@ -22,12 +22,12 @@</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/openprom.h&gt;</div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> #include &lt;asm/lsu.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -330,7 +330,7 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto intr_or_no_mm;</div><div class='ctx'> </div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='hunk'>@@ -413,8 +413,9 @@ good_area:</div><div class='ctx'> 	 * that here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((fault_code &amp; FAULT_CODE_ITLB) &amp;&amp; !(vma-&gt;vm_flags &amp; VM_EXEC)) {</div><div class='del'>-		BUG_ON(address != regs-&gt;tpc);</div><div class='del'>-		BUG_ON(regs-&gt;tstate &amp; TSTATE_PRIV);</div><div class='add'>+		WARN(address != regs-&gt;tpc,</div><div class='add'>+		     "address (%lx) != regs-&gt;tpc (%lx)\n", address, regs-&gt;tpc);</div><div class='add'>+		WARN_ON(regs-&gt;tstate &amp; TSTATE_PRIV);</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/mm/highmem.c b/arch/sparc/mm/highmem.c<br/>index 449f864f0cef..a454ec5ff07a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/highmem.c</a></div><div class='hunk'>@@ -53,7 +53,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	long idx, type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -91,6 +91,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	if (vaddr &lt; FIXADDR_START) { // FIXME</div><div class='ctx'> 		pagefault_enable();</div><div class='add'>+		preempt_enable();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -126,5 +127,6 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> </div><div class='ctx'> 	kmap_atomic_idx_pop();</div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='head'>diff --git a/arch/sparc/mm/hugetlbpage.c b/arch/sparc/mm/hugetlbpage.c<br/>index 4242eab12e10..131eaf4ad7f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -172,11 +172,6 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		     pte_t *ptep, pte_t entry)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c<br/>index 559cb744112c..4ac88b757514 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/init_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/sparc/mm/init_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/init_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/sparc/mm/init_64.c</a></div><div class='hunk'>@@ -1966,7 +1966,8 @@ static phys_addr_t __init available_memory(void)</div><div class='ctx'> 	phys_addr_t pa_start, pa_end;</div><div class='ctx'> 	u64 i;</div><div class='ctx'> </div><div class='del'>-	for_each_free_mem_range(i, NUMA_NO_NODE, &amp;pa_start, &amp;pa_end, NULL)</div><div class='add'>+	for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE, &amp;pa_start,</div><div class='add'>+				&amp;pa_end, NULL)</div><div class='ctx'> 		available = available + (pa_end  - pa_start);</div><div class='ctx'> </div><div class='ctx'> 	return available;</div><div class='hunk'>@@ -1992,7 +1993,8 @@ static void __init reduce_memory(phys_addr_t limit_ram)</div><div class='ctx'> 	if (limit_ram &gt;= avail_ram)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for_each_free_mem_range(i, NUMA_NO_NODE, &amp;pa_start, &amp;pa_end, NULL) {</div><div class='add'>+	for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE, &amp;pa_start,</div><div class='add'>+				&amp;pa_end, NULL) {</div><div class='ctx'> 		phys_addr_t region_size = pa_end - pa_start;</div><div class='ctx'> 		phys_addr_t clip_start = pa_start;</div><div class='ctx'> </div><div class='hunk'>@@ -2738,7 +2740,7 @@ void hugetlb_setup(struct pt_regs *regs)</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> 	struct tsb_config *tp;</div><div class='ctx'> </div><div class='del'>-	if (in_atomic() || !mm) {</div><div class='add'>+	if (faulthandler_disabled() || !mm) {</div><div class='ctx'> 		const struct exception_table_entry *entry;</div><div class='ctx'> </div><div class='ctx'> 		entry = search_exception_tables(regs-&gt;tpc);</div><div class='head'>diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig<br/>index a07e31b50d3f..9def1f52d03a 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/Kconfig</a></div><div class='hunk'>@@ -24,10 +24,14 @@ config TILE</div><div class='ctx'> 	select MODULES_USE_ELF_RELA</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='add'>+	select USER_STACKTRACE_SUPPORT</div><div class='ctx'> 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='ctx'> 	select HAVE_DEBUG_STACKOVERFLOW</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='ctx'> 	select HAVE_CONTEXT_TRACKING</div><div class='add'>+	select EDAC_SUPPORT</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='ctx'> </div><div class='ctx'> # FIXME: investigate whether we need/want these options.</div><div class='ctx'> #	select HAVE_IOREMAP_PROT</div><div class='hunk'>@@ -124,8 +128,10 @@ config HVC_TILE</div><div class='ctx'> 	select HVC_IRQ if TILEGX</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+# Building with ARCH=tilegx (or ARCH=tile) implies using the</div><div class='add'>+# 64-bit TILE-Gx toolchain, so force CONFIG_TILEGX on.</div><div class='ctx'> config TILEGX</div><div class='del'>-	bool "Building for TILE-Gx (64-bit) processor"</div><div class='add'>+	def_bool ARCH != "tilepro"</div><div class='ctx'> 	select SPARSE_IRQ</div><div class='ctx'> 	select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='head'>diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild<br/>index f5433e0e34e0..d8a843163471 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/Kbuild</a></div><div class='hunk'>@@ -19,6 +19,7 @@ generic-y += irq_regs.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += param.h</div><div class='hunk'>@@ -27,7 +28,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='ctx'> generic-y += serial.h</div><div class='ctx'> generic-y += shmbuf.h</div><div class='head'>diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h<br/>index 7b11c5fadd42..0496970cef82 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/atomic_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/atomic_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/atomic_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/atomic_64.h</a></div><div class='hunk'>@@ -105,9 +105,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)</div><div class='ctx'> </div><div class='ctx'> #define atomic64_inc_not_zero(v)	atomic64_add_unless((v), 1, 0)</div><div class='ctx'> </div><div class='del'>-/* Define this to indicate that cmpxchg is an efficient operation. */</div><div class='del'>-#define __HAVE_ARCH_CMPXCHG</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_ATOMIC_64_H */</div><div class='head'>diff --git a/arch/tile/include/asm/edac.h b/arch/tile/include/asm/edac.h<br/>deleted file mode 100644<br/>index 87fc83eeaffd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/edac.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/edac.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- *   This program is free software; you can redistribute it and/or</div><div class='del'>- *   modify it under the terms of the GNU General Public License</div><div class='del'>- *   as published by the Free Software Foundation, version 2.</div><div class='del'>- *</div><div class='del'>- *   This program is distributed in the hope that it will be useful, but</div><div class='del'>- *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='del'>- *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='del'>- *   more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_TILE_EDAC_H</div><div class='del'>-#define _ASM_TILE_EDAC_H</div><div class='del'>-</div><div class='del'>-/* ECC atomic, DMA, SMP and interrupt safe scrub function */</div><div class='del'>-</div><div class='del'>-static inline void atomic_scrub(void *va, u32 size)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * These is nothing to be done here because CE is</div><div class='del'>-	 * corrected by the mshim.</div><div class='del'>-	 */</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_TILE_EDAC_H */</div><div class='head'>diff --git a/arch/tile/include/asm/hugetlb.h b/arch/tile/include/asm/hugetlb.h<br/>index 3257733003f8..2fac5be4de26 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -40,10 +40,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,</div><div class='ctx'> 					  unsigned long addr, unsigned long end,</div><div class='ctx'> 					  unsigned long floor,</div><div class='hunk'>@@ -98,15 +94,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/tile/include/asm/io.h b/arch/tile/include/asm/io.h<br/>index 6ef4ecab1df2..dc61de15c1f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/io.h</a></div><div class='hunk'>@@ -54,7 +54,7 @@ extern void iounmap(volatile void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> #define ioremap_nocache(physaddr, size)		ioremap(physaddr, size)</div><div class='ctx'> #define ioremap_wc(physaddr, size)		ioremap(physaddr, size)</div><div class='del'>-#define ioremap_writethrough(physaddr, size)	ioremap(physaddr, size)</div><div class='add'>+#define ioremap_wt(physaddr, size)		ioremap(physaddr, size)</div><div class='ctx'> #define ioremap_fullcache(physaddr, size)	ioremap(physaddr, size)</div><div class='ctx'> </div><div class='ctx'> #define mmiowb()</div><div class='head'>diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h<br/>index 1fe86911838b..84a924034bdb 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/irq.h</a></div><div class='hunk'>@@ -78,4 +78,9 @@ void tile_irq_activate(unsigned int irq, int tile_irq_type);</div><div class='ctx'> </div><div class='ctx'> void setup_irq_regs(void);</div><div class='ctx'> </div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+void arch_trigger_all_cpu_backtrace(bool self);</div><div class='add'>+#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_TILE_IRQ_H */</div><div class='head'>diff --git a/arch/tile/include/asm/pgtable.h b/arch/tile/include/asm/pgtable.h<br/>index 95a4f19d16c5..2b05ccbebed9 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/pgtable.h</a></div><div class='hunk'>@@ -414,10 +414,10 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long address,</div><div class='del'>-				       pmd_t *pmdp)</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='add'>+					    unsigned long address,</div><div class='add'>+					    pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_pmd(ptep_get_and_clear(mm, address, pmdp_ptep(pmdp)));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h<br/>index dd4f9f17e30a..139dfdee0134 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/processor.h</a></div><div class='hunk'>@@ -111,8 +111,6 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long long interrupt_mask;</div><div class='ctx'> 	/* User interrupt-control 0 state */</div><div class='ctx'> 	unsigned long intctrl_0;</div><div class='del'>-	/* Is this task currently doing a backtrace? */</div><div class='del'>-	bool in_backtrace;</div><div class='ctx'> 	/* Any other miscellaneous processor state bits */</div><div class='ctx'> 	unsigned long proc_status;</div><div class='ctx'> #if !CHIP_HAS_FIXED_INTVEC_BASE()</div><div class='head'>diff --git a/arch/tile/include/asm/spinlock_32.h b/arch/tile/include/asm/spinlock_32.h<br/>index c0a77b38d39a..b14b1ba5bf9c 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/spinlock_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/spinlock_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/spinlock_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/spinlock_32.h</a></div><div class='hunk'>@@ -41,8 +41,12 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)</div><div class='ctx'> 	 * to claim the lock is held, since it will be momentarily</div><div class='ctx'> 	 * if not already.  There's no need to wait for a "valid"</div><div class='ctx'> 	 * lock-&gt;next_ticket to become available.</div><div class='add'>+	 * Use READ_ONCE() to ensure that calling this in a loop is OK.</div><div class='ctx'> 	 */</div><div class='del'>-	return lock-&gt;next_ticket != lock-&gt;current_ticket;</div><div class='add'>+	int curr = READ_ONCE(lock-&gt;current_ticket);</div><div class='add'>+	int next = READ_ONCE(lock-&gt;next_ticket);</div><div class='add'>+</div><div class='add'>+	return next != curr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_spin_lock(arch_spinlock_t *lock);</div><div class='head'>diff --git a/arch/tile/include/asm/spinlock_64.h b/arch/tile/include/asm/spinlock_64.h<br/>index 9a12b9c7e5d3..b9718fb4e74a 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/spinlock_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/spinlock_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/spinlock_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/spinlock_64.h</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> #ifndef _ASM_TILE_SPINLOCK_64_H</div><div class='ctx'> #define _ASM_TILE_SPINLOCK_64_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+</div><div class='ctx'> /* Shifts and masks for the various fields in "lock". */</div><div class='ctx'> #define __ARCH_SPIN_CURRENT_SHIFT	17</div><div class='ctx'> #define __ARCH_SPIN_NEXT_MASK		0x7fff</div><div class='hunk'>@@ -44,7 +46,8 @@ static inline u32 arch_spin_next(u32 val)</div><div class='ctx'> /* The lock is locked if a task would have to wait to get it. */</div><div class='ctx'> static inline int arch_spin_is_locked(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='del'>-	u32 val = lock-&gt;lock;</div><div class='add'>+	/* Use READ_ONCE() to ensure that calling this in a loop is OK. */</div><div class='add'>+	u32 val = READ_ONCE(lock-&gt;lock);</div><div class='ctx'> 	return arch_spin_current(val) != arch_spin_next(val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/stack.h b/arch/tile/include/asm/stack.h<br/>index 0e9d382a2d45..c3cb42615a9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/stack.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/stack.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/stack.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/stack.h</a></div><div class='hunk'>@@ -58,17 +58,14 @@ extern int KBacktraceIterator_end(struct KBacktraceIterator *kbt);</div><div class='ctx'> /* Advance to the next frame. */</div><div class='ctx'> extern void KBacktraceIterator_next(struct KBacktraceIterator *kbt);</div><div class='ctx'> </div><div class='add'>+/* Dump just the contents of the pt_regs structure. */</div><div class='add'>+extern void tile_show_regs(struct pt_regs *);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Dump stack given complete register info. Use only from the</div><div class='ctx'>  * architecture-specific code; show_stack()</div><div class='del'>- * and dump_stack() (in entry.S) are architecture-independent entry points.</div><div class='add'>+ * and dump_stack() are architecture-independent entry points.</div><div class='ctx'>  */</div><div class='del'>-extern void tile_show_stack(struct KBacktraceIterator *, int headers);</div><div class='del'>-</div><div class='del'>-/* Dump stack of current process, with registers to seed the backtrace. */</div><div class='del'>-extern void dump_stack_regs(struct pt_regs *);</div><div class='del'>-</div><div class='del'>-/* Helper method for assembly dump_stack(). */</div><div class='del'>-extern void _dump_stack(int dummy, ulong pc, ulong lr, ulong sp, ulong r52);</div><div class='add'>+extern void tile_show_stack(struct KBacktraceIterator *);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_STACK_H */</div><div class='head'>diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h<br/>index f804c39a5e4d..dc1fb28d9636 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/thread_info.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/thread_info.h</a></div><div class='hunk'>@@ -42,6 +42,7 @@ struct thread_info {</div><div class='ctx'> 	unsigned long		unalign_jit_tmp[4]; /* temp r0..r3 storage */</div><div class='ctx'> 	void __user		*unalign_jit_base; /* unalign fixup JIT base */</div><div class='ctx'> #endif</div><div class='add'>+	bool in_backtrace;			/* currently doing backtrace? */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/tile/include/asm/topology.h b/arch/tile/include/asm/topology.h<br/>index 938311844233..76b0d0ebb244 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/topology.h</a></div><div class='hunk'>@@ -55,7 +55,7 @@ static inline const struct cpumask *cpumask_of_node(int node)</div><div class='ctx'> #define topology_physical_package_id(cpu)       ((void)(cpu), 0)</div><div class='ctx'> #define topology_core_id(cpu)                   (cpu)</div><div class='ctx'> #define topology_core_cpumask(cpu)              ((void)(cpu), cpu_online_mask)</div><div class='del'>-#define topology_thread_cpumask(cpu)            cpumask_of(cpu)</div><div class='add'>+#define topology_sibling_cpumask(cpu)           cpumask_of(cpu)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_TOPOLOGY_H */</div><div class='head'>diff --git a/arch/tile/include/asm/traps.h b/arch/tile/include/asm/traps.h<br/>index 4b99a1c3aab2..11c82270c1f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/traps.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/traps.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/traps.h</a></div><div class='hunk'>@@ -52,6 +52,14 @@ void do_timer_interrupt(struct pt_regs *, int fault_num);</div><div class='ctx'> /* kernel/messaging.c */</div><div class='ctx'> void hv_message_intr(struct pt_regs *, int intnum);</div><div class='ctx'> </div><div class='add'>+#define	TILE_NMI_DUMP_STACK	1	/* Dump stack for sysrq+'l' */</div><div class='add'>+</div><div class='add'>+/* kernel/process.c */</div><div class='add'>+void do_nmi_dump_stack(struct pt_regs *regs);</div><div class='add'>+</div><div class='add'>+/* kernel/traps.c */</div><div class='add'>+void do_nmi(struct pt_regs *, int fault_num, unsigned long reason);</div><div class='add'>+</div><div class='ctx'> /* kernel/irq.c */</div><div class='ctx'> void tile_dev_intr(struct pt_regs *, int intnum);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/uaccess.h b/arch/tile/include/asm/uaccess.h<br/>index f41cb53cf645..0a9c4265763b 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/uaccess.h</a></div><div class='hunk'>@@ -65,6 +65,13 @@ static inline int is_arch_mappable_range(unsigned long addr,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Note that using this definition ignores is_arch_mappable_range(),</div><div class='add'>+ * so on tilepro code that uses user_addr_max() is constrained not</div><div class='add'>+ * to reference the tilepro user-interrupt region.</div><div class='add'>+ */</div><div class='add'>+#define user_addr_max() (current_thread_info()-&gt;addr_limit.seg)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Test whether a block of memory is a valid user space address.</div><div class='ctx'>  * Returns 0 if the range is valid, nonzero otherwise.</div><div class='ctx'>  */</div><div class='hunk'>@@ -78,7 +85,8 @@ int __range_ok(unsigned long addr, unsigned long size);</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='hunk'>@@ -192,7 +200,8 @@ extern int __get_user_bad(void)</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -274,7 +283,8 @@ extern int __put_user_bad(void)</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -330,7 +340,8 @@ extern int __put_user_bad(void)</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -366,7 +377,8 @@ copy_to_user(void __user *to, const void *from, unsigned long n)</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -437,7 +449,8 @@ static inline unsigned long __must_check copy_from_user(void *to,</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to user space.  Caller must check</div><div class='ctx'>  * the specified blocks with access_ok() before calling this function.</div><div class='hunk'>@@ -465,62 +478,9 @@ copy_in_user(void __user *to, const void __user *from, unsigned long n)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * strlen_user: - Get the size of a string in user space.</div><div class='del'>- * @str: The string to measure.</div><div class='del'>- *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='del'>- *</div><div class='del'>- * Get the size of a NUL-terminated string in user space.</div><div class='del'>- *</div><div class='del'>- * Returns the size of the string INCLUDING the terminating NUL.</div><div class='del'>- * On exception, returns 0.</div><div class='del'>- *</div><div class='del'>- * If there is a limit on the length of a valid string, you may wish to</div><div class='del'>- * consider using strnlen_user() instead.</div><div class='del'>- */</div><div class='del'>-extern long strnlen_user_asm(const char __user *str, long n);</div><div class='del'>-static inline long __must_check strnlen_user(const char __user *str, long n)</div><div class='del'>-{</div><div class='del'>-	might_fault();</div><div class='del'>-	return strnlen_user_asm(str, n);</div><div class='del'>-}</div><div class='del'>-#define strlen_user(str) strnlen_user(str, LONG_MAX)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking.</div><div class='del'>- * @dst:   Destination address, in kernel space.  This buffer must be at</div><div class='del'>- *         least @count bytes long.</div><div class='del'>- * @src:   Source address, in user space.</div><div class='del'>- * @count: Maximum number of bytes to copy, including the trailing NUL.</div><div class='del'>- *</div><div class='del'>- * Copies a NUL-terminated string from userspace to kernel space.</div><div class='del'>- * Caller must check the specified block with access_ok() before calling</div><div class='del'>- * this function.</div><div class='del'>- *</div><div class='del'>- * On success, returns the length of the string (not including the trailing</div><div class='del'>- * NUL).</div><div class='del'>- *</div><div class='del'>- * If access to userspace fails, returns -EFAULT (some data may have been</div><div class='del'>- * copied).</div><div class='del'>- *</div><div class='del'>- * If @count is smaller than the length of the string, copies @count bytes</div><div class='del'>- * and returns @count.</div><div class='del'>- */</div><div class='del'>-extern long strncpy_from_user_asm(char *dst, const char __user *src, long);</div><div class='del'>-static inline long __must_check __strncpy_from_user(</div><div class='del'>-	char *dst, const char __user *src, long count)</div><div class='del'>-{</div><div class='del'>-	might_fault();</div><div class='del'>-	return strncpy_from_user_asm(dst, src, count);</div><div class='del'>-}</div><div class='del'>-static inline long __must_check strncpy_from_user(</div><div class='del'>-	char *dst, const char __user *src, long count)</div><div class='del'>-{</div><div class='del'>-	if (access_ok(VERIFY_READ, src, 1))</div><div class='del'>-		return __strncpy_from_user(dst, src, count);</div><div class='del'>-	return -EFAULT;</div><div class='del'>-}</div><div class='add'>+extern long strnlen_user(const char __user *str, long n);</div><div class='add'>+extern long strlen_user(const char __user *str);</div><div class='add'>+extern long strncpy_from_user(char *dst, const char __user *src, long);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * clear_user: - Zero a block of memory in user space.</div><div class='head'>diff --git a/arch/tile/include/asm/word-at-a-time.h b/arch/tile/include/asm/word-at-a-time.h<br/>new file mode 100644<br/>index 000000000000..9e5ce0d7b292<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/word-at-a-time.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/asm/word-at-a-time.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+#ifndef _ASM_WORD_AT_A_TIME_H</div><div class='add'>+#define _ASM_WORD_AT_A_TIME_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+</div><div class='add'>+struct word_at_a_time { /* unused */ };</div><div class='add'>+#define WORD_AT_A_TIME_CONSTANTS {}</div><div class='add'>+</div><div class='add'>+/* Generate 0x01 byte values for non-zero bytes using a SIMD instruction. */</div><div class='add'>+static inline unsigned long has_zero(unsigned long val, unsigned long *data,</div><div class='add'>+				     const struct word_at_a_time *c)</div><div class='add'>+{</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+	unsigned long mask = __insn_v1cmpeqi(val, 0);</div><div class='add'>+#else /* tilepro */</div><div class='add'>+	unsigned long mask = __insn_seqib(val, 0);</div><div class='add'>+#endif</div><div class='add'>+	*data = mask;</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These operations are both nops. */</div><div class='add'>+#define prep_zero_mask(val, data, c) (data)</div><div class='add'>+#define create_zero_mask(data) (data)</div><div class='add'>+</div><div class='add'>+/* And this operation just depends on endianness. */</div><div class='add'>+static inline long find_zero(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	return __builtin_clzl(mask) &gt;&gt; 3;</div><div class='add'>+#else</div><div class='add'>+	return __builtin_ctzl(mask) &gt;&gt; 3;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_WORD_AT_A_TIME_H */</div><div class='head'>diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h<br/>index e0e6af4e783b..f10b332b3b65 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/hv/hypervisor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/include/hv/hypervisor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/hv/hypervisor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/include/hv/hypervisor.h</a></div><div class='hunk'>@@ -321,8 +321,11 @@</div><div class='ctx'> /** hv_console_set_ipi */</div><div class='ctx'> #define HV_DISPATCH_CONSOLE_SET_IPI               63</div><div class='ctx'> </div><div class='add'>+/** hv_send_nmi */</div><div class='add'>+#define HV_DISPATCH_SEND_NMI                      65</div><div class='add'>+</div><div class='ctx'> /** One more than the largest dispatch value */</div><div class='del'>-#define _HV_DISPATCH_END                          64</div><div class='add'>+#define _HV_DISPATCH_END                          66</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='hunk'>@@ -1253,6 +1256,11 @@ void hv_downcall_dispatch(void);</div><div class='ctx'> #define INT_DMATLB_ACCESS_DWNCL  INT_DMA_CPL</div><div class='ctx'> /** Device interrupt downcall interrupt vector */</div><div class='ctx'> #define INT_DEV_INTR_DWNCL       INT_WORLD_ACCESS</div><div class='add'>+/** NMI downcall interrupt vector */</div><div class='add'>+#define INT_NMI_DWNCL            64</div><div class='add'>+</div><div class='add'>+#define HV_NMI_FLAG_FORCE    0x1  /**&lt; Force an NMI downcall regardless of</div><div class='add'>+               the ICS bit of the client. */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='hunk'>@@ -1780,6 +1788,56 @@ int hv_dev_poll(int devhdl, __hv32 events, HV_IntArg intarg);</div><div class='ctx'> int hv_dev_poll_cancel(int devhdl);</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+/** NMI information */</div><div class='add'>+typedef struct</div><div class='add'>+{</div><div class='add'>+  /** Result: negative error, or HV_NMI_RESULT_xxx. */</div><div class='add'>+  int result;</div><div class='add'>+</div><div class='add'>+  /** PC from interrupted remote core (if result != HV_NMI_RESULT_FAIL_HV). */</div><div class='add'>+  HV_VirtAddr pc;</div><div class='add'>+</div><div class='add'>+} HV_NMI_Info;</div><div class='add'>+</div><div class='add'>+/** NMI issued successfully. */</div><div class='add'>+#define HV_NMI_RESULT_OK        0</div><div class='add'>+</div><div class='add'>+/** NMI not issued: remote tile running at client PL with ICS set. */</div><div class='add'>+#define HV_NMI_RESULT_FAIL_ICS  1</div><div class='add'>+</div><div class='add'>+/** NMI not issued: remote tile waiting in hypervisor. */</div><div class='add'>+#define HV_NMI_RESULT_FAIL_HV   2</div><div class='add'>+</div><div class='add'>+/** Force an NMI downcall regardless of the ICS bit of the client. */</div><div class='add'>+#define HV_NMI_FLAG_FORCE    0x1</div><div class='add'>+</div><div class='add'>+/** Send an NMI interrupt request to a particular tile.</div><div class='add'>+ *</div><div class='add'>+ *  This will cause the NMI to be issued on the remote tile regardless</div><div class='add'>+ *  of the state of the client interrupt mask.  However, if the remote</div><div class='add'>+ *  tile is in the hypervisor, it will not execute the NMI, and</div><div class='add'>+ *  HV_NMI_RESULT_FAIL_HV will be returned.  Similarly, if the remote</div><div class='add'>+ *  tile is in a client interrupt critical section at the time of the</div><div class='add'>+ *  NMI, it will not execute the NMI, and HV_NMI_RESULT_FAIL_ICS will</div><div class='add'>+ *  be returned.  In this second case, however, if HV_NMI_FLAG_FORCE</div><div class='add'>+ *  is set in flags, then the remote tile will enter its NMI interrupt</div><div class='add'>+ *  vector regardless.  Forcing the NMI vector during an interrupt</div><div class='add'>+ *  critical section will mean that the client can not safely continue</div><div class='add'>+ *  execution after handling the interrupt.</div><div class='add'>+ *</div><div class='add'>+ *  @param tile Tile to which the NMI request is sent.</div><div class='add'>+ *  @param info NMI information which is defined by and interpreted by the</div><div class='add'>+ *         supervisor, is passed to the specified tile, and is</div><div class='add'>+ *         stored in the SPR register SYSTEM_SAVE_{CLIENT_PL}_2 on the</div><div class='add'>+ *         specified tile when entering the NMI handler routine.</div><div class='add'>+ *         Typically, this parameter stores the NMI type, or an aligned</div><div class='add'>+ *         VA plus some special bits, etc.</div><div class='add'>+ *  @param flags Flags (HV_NMI_FLAG_xxx).</div><div class='add'>+ *  @return Information about the requested NMI.</div><div class='add'>+ */</div><div class='add'>+HV_NMI_Info hv_send_nmi(HV_Coord tile, unsigned long info, __hv64 flags);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /** Scatter-gather list for preada/pwritea calls. */</div><div class='ctx'> typedef struct</div><div class='ctx'> #if CHIP_VA_WIDTH() &lt;= 32</div><div class='head'>diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S<br/>index 3d9175992a20..670a3569450f 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/entry.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/entry.S</a></div><div class='hunk'>@@ -27,13 +27,6 @@ STD_ENTRY(current_text_addr)</div><div class='ctx'> 	{ move r0, lr; jrp lr }</div><div class='ctx'> 	STD_ENDPROC(current_text_addr)</div><div class='ctx'> </div><div class='del'>-STD_ENTRY(dump_stack)</div><div class='del'>-	{ move r2, lr; lnk r1 }</div><div class='del'>-	{ move r4, r52; addli r1, r1, dump_stack - . }</div><div class='del'>-	{ move r3, sp; j _dump_stack }</div><div class='del'>-	jrp lr   /* keep backtracer happy */</div><div class='del'>-	STD_ENDPROC(dump_stack)</div><div class='del'>-</div><div class='ctx'> STD_ENTRY(KBacktraceIterator_init_current)</div><div class='ctx'> 	{ move r2, lr; lnk r1 }</div><div class='ctx'> 	{ move r4, r52; addli r1, r1, KBacktraceIterator_init_current - . }</div><div class='head'>diff --git a/arch/tile/kernel/hvglue.S b/arch/tile/kernel/hvglue.S<br/>index 2ab456622391..d78ee2ad610c 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/hvglue.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/hvglue.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/hvglue.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/hvglue.S</a></div><div class='hunk'>@@ -71,4 +71,5 @@ gensym hv_flush_all, 0x6e0, 32</div><div class='ctx'> gensym hv_get_ipi_pte, 0x700, 32</div><div class='ctx'> gensym hv_set_pte_super_shift, 0x720, 32</div><div class='ctx'> gensym hv_console_set_ipi, 0x7e0, 32</div><div class='del'>-gensym hv_glue_internals, 0x800, 30720</div><div class='add'>+gensym hv_send_nmi, 0x820, 32</div><div class='add'>+gensym hv_glue_internals, 0x820, 30688</div><div class='head'>diff --git a/arch/tile/kernel/hvglue_trace.c b/arch/tile/kernel/hvglue_trace.c<br/>index 85c74ad29312..add0d71395c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/hvglue_trace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/hvglue_trace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/hvglue_trace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/hvglue_trace.c</a></div><div class='hunk'>@@ -75,6 +75,7 @@</div><div class='ctx'> #define hv_get_ipi_pte _hv_get_ipi_pte</div><div class='ctx'> #define hv_set_pte_super_shift _hv_set_pte_super_shift</div><div class='ctx'> #define hv_console_set_ipi _hv_console_set_ipi</div><div class='add'>+#define hv_send_nmi _hv_send_nmi</div><div class='ctx'> #include &lt;hv/hypervisor.h&gt;</div><div class='ctx'> #undef hv_init</div><div class='ctx'> #undef hv_install_context</div><div class='hunk'>@@ -134,6 +135,7 @@</div><div class='ctx'> #undef hv_get_ipi_pte</div><div class='ctx'> #undef hv_set_pte_super_shift</div><div class='ctx'> #undef hv_console_set_ipi</div><div class='add'>+#undef hv_send_nmi</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Provide macros based on &lt;linux/syscalls.h&gt; to provide a wrapper</div><div class='hunk'>@@ -264,3 +266,5 @@ HV_WRAP9(int, hv_flush_remote, HV_PhysAddr, cache_pa,</div><div class='ctx'> 	 HV_VirtAddr, tlb_va, unsigned long, tlb_length,</div><div class='ctx'> 	 unsigned long, tlb_pgsize, unsigned long*, tlb_cpumask,</div><div class='ctx'> 	 HV_Remote_ASID*, asids, int, asidcount)</div><div class='add'>+HV_WRAP3(HV_NMI_Info, hv_send_nmi, HV_Coord, tile, unsigned long, info,</div><div class='add'>+	 __hv64, flags)</div><div class='head'>diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S<br/>index 5b67efcecabd..800b91d3f9dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/intvec_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/intvec_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/intvec_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/intvec_64.S</a></div><div class='hunk'>@@ -515,6 +515,10 @@ intvec_\vecname:</div><div class='ctx'> 	.ifc \c_routine, handle_perf_interrupt</div><div class='ctx'> 	mfspr   r2, AUX_PERF_COUNT_STS</div><div class='ctx'> 	.endif</div><div class='add'>+	.ifc \c_routine, do_nmi</div><div class='add'>+	mfspr   r2, SPR_SYSTEM_SAVE_K_2   /* nmi type */</div><div class='add'>+	.else</div><div class='add'>+	.endif</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.endif</div><div class='hunk'>@@ -1571,3 +1575,5 @@ intrpt_start:</div><div class='ctx'> </div><div class='ctx'> 	/* Synthetic interrupt delivered only by the simulator */</div><div class='ctx'> 	int_hand     INT_BREAKPOINT, BREAKPOINT, do_breakpoint</div><div class='add'>+	/* Synthetic interrupt delivered by hv */</div><div class='add'>+	int_hand     INT_NMI_DWNCL, NMI_DWNCL, do_nmi, handle_nmi</div><div class='head'>diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c<br/>index b403c2e3e263..a45213781ad0 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/process.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/tracehook.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;</div><div class='ctx'> #include &lt;asm/stack.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='hunk'>@@ -132,7 +133,6 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> 		       (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));</div><div class='ctx'> 		callee_regs[0] = sp;   /* r30 = function */</div><div class='ctx'> 		callee_regs[1] = arg;  /* r31 = arg */</div><div class='del'>-		childregs-&gt;ex1 = PL_ICS_EX1(KERNEL_PL, 0);</div><div class='ctx'> 		p-&gt;thread.pc = (unsigned long) ret_from_kernel_thread;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -546,31 +546,141 @@ void exit_thread(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void show_regs(struct pt_regs *regs)</div><div class='add'>+void tile_show_regs(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *tsk = validate_current();</div><div class='ctx'> 	int i;</div><div class='del'>-</div><div class='del'>-	if (tsk != &amp;corrupt_current)</div><div class='del'>-		show_regs_print_info(KERN_ERR);</div><div class='ctx'> #ifdef __tilegx__</div><div class='ctx'> 	for (i = 0; i &lt; 17; i++)</div><div class='del'>-		pr_err(" r%-2d: " REGFMT " r%-2d: " REGFMT " r%-2d: " REGFMT "\n",</div><div class='add'>+		pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",</div><div class='ctx'> 		       i, regs-&gt;regs[i], i+18, regs-&gt;regs[i+18],</div><div class='ctx'> 		       i+36, regs-&gt;regs[i+36]);</div><div class='del'>-	pr_err(" r17: " REGFMT " r35: " REGFMT " tp : " REGFMT "\n",</div><div class='add'>+	pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",</div><div class='ctx'> 	       regs-&gt;regs[17], regs-&gt;regs[35], regs-&gt;tp);</div><div class='del'>-	pr_err(" sp : " REGFMT " lr : " REGFMT "\n", regs-&gt;sp, regs-&gt;lr);</div><div class='add'>+	pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs-&gt;sp, regs-&gt;lr);</div><div class='ctx'> #else</div><div class='ctx'> 	for (i = 0; i &lt; 13; i++)</div><div class='del'>-		pr_err(" r%-2d: " REGFMT " r%-2d: " REGFMT " r%-2d: " REGFMT " r%-2d: " REGFMT "\n",</div><div class='add'>+		pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT</div><div class='add'>+		       " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",</div><div class='ctx'> 		       i, regs-&gt;regs[i], i+14, regs-&gt;regs[i+14],</div><div class='ctx'> 		       i+27, regs-&gt;regs[i+27], i+40, regs-&gt;regs[i+40]);</div><div class='del'>-	pr_err(" r13: " REGFMT " tp : " REGFMT " sp : " REGFMT " lr : " REGFMT "\n",</div><div class='add'>+	pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",</div><div class='ctx'> 	       regs-&gt;regs[13], regs-&gt;tp, regs-&gt;sp, regs-&gt;lr);</div><div class='ctx'> #endif</div><div class='del'>-	pr_err(" pc : " REGFMT " ex1: %ld     faultnum: %ld\n",</div><div class='del'>-	       regs-&gt;pc, regs-&gt;ex1, regs-&gt;faultnum);</div><div class='add'>+	pr_err(" pc : "REGFMT" ex1: %ld     faultnum: %ld flags:%s%s%s%s\n",</div><div class='add'>+	       regs-&gt;pc, regs-&gt;ex1, regs-&gt;faultnum,</div><div class='add'>+	       is_compat_task() ? " compat" : "",</div><div class='add'>+	       (regs-&gt;flags &amp; PT_FLAGS_DISABLE_IRQ) ? " noirq" : "",</div><div class='add'>+	       !(regs-&gt;flags &amp; PT_FLAGS_CALLER_SAVES) ? " nocallersave" : "",</div><div class='add'>+	       (regs-&gt;flags &amp; PT_FLAGS_RESTORE_REGS) ? " restoreregs" : "");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void show_regs(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct KBacktraceIterator kbt;</div><div class='add'>+</div><div class='add'>+	show_regs_print_info(KERN_DEFAULT);</div><div class='add'>+	tile_show_regs(regs);</div><div class='add'>+</div><div class='add'>+	KBacktraceIterator_init(&amp;kbt, NULL, regs);</div><div class='add'>+	tile_show_stack(&amp;kbt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* To ensure stack dump on tiles occurs one by one. */</div><div class='add'>+static DEFINE_SPINLOCK(backtrace_lock);</div><div class='add'>+/* To ensure no backtrace occurs before all of the stack dump are done. */</div><div class='add'>+static atomic_t backtrace_cpus;</div><div class='add'>+/* The cpu mask to avoid reentrance. */</div><div class='add'>+static struct cpumask backtrace_mask;</div><div class='ctx'> </div><div class='del'>-	dump_stack_regs(regs);</div><div class='add'>+void do_nmi_dump_stack(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int is_idle = is_idle_task(current) &amp;&amp; !in_interrupt();</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	nmi_enter();</div><div class='add'>+	cpu = smp_processor_id();</div><div class='add'>+	if (WARN_ON_ONCE(!cpumask_test_and_clear_cpu(cpu, &amp;backtrace_mask)))</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;backtrace_lock);</div><div class='add'>+	if (is_idle)</div><div class='add'>+		pr_info("CPU: %d idle\n", cpu);</div><div class='add'>+	else</div><div class='add'>+		show_regs(regs);</div><div class='add'>+	spin_unlock(&amp;backtrace_lock);</div><div class='add'>+	atomic_dec(&amp;backtrace_cpus);</div><div class='add'>+done:</div><div class='add'>+	nmi_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+void arch_trigger_all_cpu_backtrace(bool self)</div><div class='add'>+{</div><div class='add'>+	struct cpumask mask;</div><div class='add'>+	HV_Coord tile;</div><div class='add'>+	unsigned int timeout;</div><div class='add'>+	int cpu;</div><div class='add'>+	int ongoing;</div><div class='add'>+	HV_NMI_Info info[NR_CPUS];</div><div class='add'>+</div><div class='add'>+	ongoing = atomic_cmpxchg(&amp;backtrace_cpus, 0, num_online_cpus() - 1);</div><div class='add'>+	if (ongoing != 0) {</div><div class='add'>+		pr_err("Trying to do all-cpu backtrace.\n");</div><div class='add'>+		pr_err("But another all-cpu backtrace is ongoing (%d cpus left)\n",</div><div class='add'>+		       ongoing);</div><div class='add'>+		if (self) {</div><div class='add'>+			pr_err("Reporting the stack on this cpu only.\n");</div><div class='add'>+			dump_stack();</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpumask_copy(&amp;mask, cpu_online_mask);</div><div class='add'>+	cpumask_clear_cpu(smp_processor_id(), &amp;mask);</div><div class='add'>+	cpumask_copy(&amp;backtrace_mask, &amp;mask);</div><div class='add'>+</div><div class='add'>+	/* Backtrace for myself first. */</div><div class='add'>+	if (self)</div><div class='add'>+		dump_stack();</div><div class='add'>+</div><div class='add'>+	/* Tentatively dump stack on remote tiles via NMI. */</div><div class='add'>+	timeout = 100;</div><div class='add'>+	while (!cpumask_empty(&amp;mask) &amp;&amp; timeout) {</div><div class='add'>+		for_each_cpu(cpu, &amp;mask) {</div><div class='add'>+			tile.x = cpu_x(cpu);</div><div class='add'>+			tile.y = cpu_y(cpu);</div><div class='add'>+			info[cpu] = hv_send_nmi(tile, TILE_NMI_DUMP_STACK, 0);</div><div class='add'>+			if (info[cpu].result == HV_NMI_RESULT_OK)</div><div class='add'>+				cpumask_clear_cpu(cpu, &amp;mask);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mdelay(10);</div><div class='add'>+		timeout--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Warn about cpus stuck in ICS and decrement their counts here. */</div><div class='add'>+	if (!cpumask_empty(&amp;mask)) {</div><div class='add'>+		for_each_cpu(cpu, &amp;mask) {</div><div class='add'>+			switch (info[cpu].result) {</div><div class='add'>+			case HV_NMI_RESULT_FAIL_ICS:</div><div class='add'>+				pr_warn("Skipping stack dump of cpu %d in ICS at pc %#llx\n",</div><div class='add'>+					cpu, info[cpu].pc);</div><div class='add'>+				break;</div><div class='add'>+			case HV_NMI_RESULT_FAIL_HV:</div><div class='add'>+				pr_warn("Skipping stack dump of cpu %d in hypervisor\n",</div><div class='add'>+					cpu);</div><div class='add'>+				break;</div><div class='add'>+			case HV_ENOSYS:</div><div class='add'>+				pr_warn("Hypervisor too old to allow remote stack dumps.\n");</div><div class='add'>+				goto skip_for_each;</div><div class='add'>+			default:  /* should not happen */</div><div class='add'>+				pr_warn("Skipping stack dump of cpu %d [%d,%#llx]\n",</div><div class='add'>+					cpu, info[cpu].result, info[cpu].pc);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+skip_for_each:</div><div class='add'>+		atomic_sub(cpumask_weight(&amp;mask), &amp;backtrace_cpus);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='add'>+#endif /* __tilegx_ */</div><div class='head'>diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c<br/>index d366675e4bf8..99c9ff87e018 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/setup.c</a></div><div class='hunk'>@@ -71,7 +71,7 @@ static unsigned long __initdata node_percpu[MAX_NUMNODES];</div><div class='ctx'>  * per-CPU stack and boot info.</div><div class='ctx'>  */</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, boot_sp) =</div><div class='del'>-	(unsigned long)init_stack + THREAD_SIZE;</div><div class='add'>+	(unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;</div><div class='head'>diff --git a/arch/tile/kernel/stack.c b/arch/tile/kernel/stack.c<br/>index c42dce50acd8..402b9c85a894 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/stack.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/stack.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/stack.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/stack.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;linux/dcache.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/backtrace.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -109,7 +110,7 @@ static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)</div><div class='ctx'> 		if (kbt-&gt;verbose)</div><div class='ctx'> 			pr_err("  &lt;%s while in user mode&gt;\n", fault);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (kbt-&gt;verbose)</div><div class='add'>+		if (kbt-&gt;verbose &amp;&amp; (p-&gt;pc != 0 || p-&gt;sp != 0 || p-&gt;ex1 != 0))</div><div class='ctx'> 			pr_err("  (odd fault: pc %#lx, sp %#lx, ex1 %#lx?)\n",</div><div class='ctx'> 			       p-&gt;pc, p-&gt;sp, p-&gt;ex1);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -119,10 +120,12 @@ static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)</div><div class='ctx'> 	return p;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Is the pc pointing to a sigreturn trampoline? */</div><div class='del'>-static int is_sigreturn(unsigned long pc)</div><div class='add'>+/* Is the iterator pointing to a sigreturn trampoline? */</div><div class='add'>+static int is_sigreturn(struct KBacktraceIterator *kbt)</div><div class='ctx'> {</div><div class='del'>-	return current-&gt;mm &amp;&amp; (pc == VDSO_SYM(&amp;__vdso_rt_sigreturn));</div><div class='add'>+	return kbt-&gt;task-&gt;mm &amp;&amp;</div><div class='add'>+		(kbt-&gt;it.pc == ((ulong)kbt-&gt;task-&gt;mm-&gt;context.vdso_base +</div><div class='add'>+				(ulong)&amp;__vdso_rt_sigreturn));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Return a pt_regs pointer for a valid signal handler frame */</div><div class='hunk'>@@ -131,7 +134,7 @@ static struct pt_regs *valid_sigframe(struct KBacktraceIterator* kbt,</div><div class='ctx'> {</div><div class='ctx'> 	BacktraceIterator *b = &amp;kbt-&gt;it;</div><div class='ctx'> </div><div class='del'>-	if (is_sigreturn(b-&gt;pc) &amp;&amp; b-&gt;sp &lt; PAGE_OFFSET &amp;&amp;</div><div class='add'>+	if (is_sigreturn(kbt) &amp;&amp; b-&gt;sp &lt; PAGE_OFFSET &amp;&amp;</div><div class='ctx'> 	    b-&gt;sp % sizeof(long) == 0) {</div><div class='ctx'> 		int retval;</div><div class='ctx'> 		pagefault_disable();</div><div class='hunk'>@@ -151,11 +154,6 @@ static struct pt_regs *valid_sigframe(struct KBacktraceIterator* kbt,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int KBacktraceIterator_is_sigreturn(struct KBacktraceIterator *kbt)</div><div class='del'>-{</div><div class='del'>-	return is_sigreturn(kbt-&gt;it.pc);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int KBacktraceIterator_restart(struct KBacktraceIterator *kbt)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *p;</div><div class='hunk'>@@ -178,7 +176,7 @@ static int KBacktraceIterator_next_item_inclusive(</div><div class='ctx'> {</div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		do {</div><div class='del'>-			if (!KBacktraceIterator_is_sigreturn(kbt))</div><div class='add'>+			if (!is_sigreturn(kbt))</div><div class='ctx'> 				return KBT_ONGOING;</div><div class='ctx'> 		} while (backtrace_next(&amp;kbt-&gt;it));</div><div class='ctx'> </div><div class='hunk'>@@ -334,7 +332,7 @@ static void describe_addr(struct KBacktraceIterator *kbt,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vma-&gt;vm_file) {</div><div class='del'>-		p = d_path(&amp;vma-&gt;vm_file-&gt;f_path, buf, bufsize);</div><div class='add'>+		p = file_path(vma-&gt;vm_file, buf, bufsize);</div><div class='ctx'> 		if (IS_ERR(p))</div><div class='ctx'> 			p = "?";</div><div class='ctx'> 		name = kbasename(p);</div><div class='hunk'>@@ -357,51 +355,50 @@ static void describe_addr(struct KBacktraceIterator *kbt,</div><div class='ctx'>  */</div><div class='ctx'> static bool start_backtrace(void)</div><div class='ctx'> {</div><div class='del'>-	if (current-&gt;thread.in_backtrace) {</div><div class='add'>+	if (current_thread_info()-&gt;in_backtrace) {</div><div class='ctx'> 		pr_err("Backtrace requested while in backtrace!\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='del'>-	current-&gt;thread.in_backtrace = true;</div><div class='add'>+	current_thread_info()-&gt;in_backtrace = true;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void end_backtrace(void)</div><div class='ctx'> {</div><div class='del'>-	current-&gt;thread.in_backtrace = false;</div><div class='add'>+	current_thread_info()-&gt;in_backtrace = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This method wraps the backtracer's more generic support.</div><div class='ctx'>  * It is only invoked from the architecture-specific code; show_stack()</div><div class='del'>- * and dump_stack() (in entry.S) are architecture-independent entry points.</div><div class='add'>+ * and dump_stack() are architecture-independent entry points.</div><div class='ctx'>  */</div><div class='del'>-void tile_show_stack(struct KBacktraceIterator *kbt, int headers)</div><div class='add'>+void tile_show_stack(struct KBacktraceIterator *kbt)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int have_mmap_sem = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!start_backtrace())</div><div class='ctx'> 		return;</div><div class='del'>-	if (headers) {</div><div class='del'>-		/*</div><div class='del'>-		 * Add a blank line since if we are called from panic(),</div><div class='del'>-		 * then bust_spinlocks() spit out a space in front of us</div><div class='del'>-		 * and it will mess up our KERN_ERR.</div><div class='del'>-		 */</div><div class='del'>-		pr_err("Starting stack dump of tid %d, pid %d (%s) on cpu %d at cycle %lld\n",</div><div class='del'>-		       kbt-&gt;task-&gt;pid, kbt-&gt;task-&gt;tgid, kbt-&gt;task-&gt;comm,</div><div class='del'>-		       raw_smp_processor_id(), get_cycles());</div><div class='del'>-	}</div><div class='ctx'> 	kbt-&gt;verbose = 1;</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	for (; !KBacktraceIterator_end(kbt); KBacktraceIterator_next(kbt)) {</div><div class='ctx'> 		char namebuf[KSYM_NAME_LEN+100];</div><div class='ctx'> 		unsigned long address = kbt-&gt;it.pc;</div><div class='ctx'> </div><div class='del'>-		/* Try to acquire the mmap_sem as we pass into userspace. */</div><div class='del'>-		if (address &lt; PAGE_OFFSET &amp;&amp; !have_mmap_sem &amp;&amp; kbt-&gt;task-&gt;mm)</div><div class='add'>+		/*</div><div class='add'>+		 * Try to acquire the mmap_sem as we pass into userspace.</div><div class='add'>+		 * If we're in an interrupt context, don't even try, since</div><div class='add'>+		 * it's not safe to call e.g. d_path() from an interrupt,</div><div class='add'>+		 * since it uses spin locks without disabling interrupts.</div><div class='add'>+		 * Note we test "kbt-&gt;task == current", not "kbt-&gt;is_current",</div><div class='add'>+		 * since we're checking that "current" will work in d_path().</div><div class='add'>+		 */</div><div class='add'>+		if (kbt-&gt;task == current &amp;&amp; address &lt; PAGE_OFFSET &amp;&amp;</div><div class='add'>+		    !have_mmap_sem &amp;&amp; kbt-&gt;task-&gt;mm &amp;&amp; !in_interrupt()) {</div><div class='ctx'> 			have_mmap_sem =</div><div class='ctx'> 				down_read_trylock(&amp;kbt-&gt;task-&gt;mm-&gt;mmap_sem);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		describe_addr(kbt, address, have_mmap_sem,</div><div class='ctx'> 			      namebuf, sizeof(namebuf));</div><div class='hunk'>@@ -416,24 +413,12 @@ void tile_show_stack(struct KBacktraceIterator *kbt, int headers)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (kbt-&gt;end == KBT_LOOP)</div><div class='ctx'> 		pr_err("Stack dump stopped; next frame identical to this one\n");</div><div class='del'>-	if (headers)</div><div class='del'>-		pr_err("Stack dump complete\n");</div><div class='ctx'> 	if (have_mmap_sem)</div><div class='ctx'> 		up_read(&amp;kbt-&gt;task-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> 	end_backtrace();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(tile_show_stack);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* This is called from show_regs() and _dump_stack() */</div><div class='del'>-void dump_stack_regs(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct KBacktraceIterator kbt;</div><div class='del'>-	KBacktraceIterator_init(&amp;kbt, NULL, regs);</div><div class='del'>-	tile_show_stack(&amp;kbt, 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dump_stack_regs);</div><div class='del'>-</div><div class='ctx'> static struct pt_regs *regs_to_pt_regs(struct pt_regs *regs,</div><div class='ctx'> 				       ulong pc, ulong lr, ulong sp, ulong r52)</div><div class='ctx'> {</div><div class='hunk'>@@ -445,11 +430,15 @@ static struct pt_regs *regs_to_pt_regs(struct pt_regs *regs,</div><div class='ctx'> 	return regs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This is called from dump_stack() and just converts to pt_regs */</div><div class='add'>+/* Deprecated function currently only used by kernel_double_fault(). */</div><div class='ctx'> void _dump_stack(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)</div><div class='ctx'> {</div><div class='add'>+	struct KBacktraceIterator kbt;</div><div class='ctx'> 	struct pt_regs regs;</div><div class='del'>-	dump_stack_regs(regs_to_pt_regs(&amp;regs, pc, lr, sp, r52));</div><div class='add'>+</div><div class='add'>+	regs_to_pt_regs(&amp;regs, pc, lr, sp, r52);</div><div class='add'>+	KBacktraceIterator_init(&amp;kbt, NULL, &amp;regs);</div><div class='add'>+	tile_show_stack(&amp;kbt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This is called from KBacktraceIterator_init_current() */</div><div class='hunk'>@@ -461,22 +450,30 @@ void _KBacktraceIterator_init_current(struct KBacktraceIterator *kbt, ulong pc,</div><div class='ctx'> 				regs_to_pt_regs(&amp;regs, pc, lr, sp, r52));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This is called only from kernel/sched/core.c, with esp == NULL */</div><div class='add'>+/*</div><div class='add'>+ * Called from sched_show_task() with task != NULL, or dump_stack()</div><div class='add'>+ * with task == NULL.  The esp argument is always NULL.</div><div class='add'>+ */</div><div class='ctx'> void show_stack(struct task_struct *task, unsigned long *esp)</div><div class='ctx'> {</div><div class='ctx'> 	struct KBacktraceIterator kbt;</div><div class='del'>-	if (task == NULL || task == current)</div><div class='add'>+	if (task == NULL || task == current) {</div><div class='ctx'> 		KBacktraceIterator_init_current(&amp;kbt);</div><div class='del'>-	else</div><div class='add'>+		KBacktraceIterator_next(&amp;kbt);  /* don't show first frame */</div><div class='add'>+	} else {</div><div class='ctx'> 		KBacktraceIterator_init(&amp;kbt, task, NULL);</div><div class='del'>-	tile_show_stack(&amp;kbt, 0);</div><div class='add'>+	}</div><div class='add'>+	tile_show_stack(&amp;kbt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_STACKTRACE</div><div class='ctx'> </div><div class='ctx'> /* Support generic Linux stack API too */</div><div class='ctx'> </div><div class='del'>-void save_stack_trace_tsk(struct task_struct *task, struct stack_trace *trace)</div><div class='add'>+static void save_stack_trace_common(struct task_struct *task,</div><div class='add'>+				    struct pt_regs *regs,</div><div class='add'>+				    bool user,</div><div class='add'>+				    struct stack_trace *trace)</div><div class='ctx'> {</div><div class='ctx'> 	struct KBacktraceIterator kbt;</div><div class='ctx'> 	int skip = trace-&gt;skip;</div><div class='hunk'>@@ -484,31 +481,57 @@ void save_stack_trace_tsk(struct task_struct *task, struct stack_trace *trace)</div><div class='ctx'> </div><div class='ctx'> 	if (!start_backtrace())</div><div class='ctx'> 		goto done;</div><div class='del'>-	if (task == NULL || task == current)</div><div class='add'>+	if (regs != NULL) {</div><div class='add'>+		KBacktraceIterator_init(&amp;kbt, NULL, regs);</div><div class='add'>+	} else if (task == NULL || task == current) {</div><div class='ctx'> 		KBacktraceIterator_init_current(&amp;kbt);</div><div class='del'>-	else</div><div class='add'>+		skip++;  /* don't show KBacktraceIterator_init_current */</div><div class='add'>+	} else {</div><div class='ctx'> 		KBacktraceIterator_init(&amp;kbt, task, NULL);</div><div class='add'>+	}</div><div class='ctx'> 	for (; !KBacktraceIterator_end(&amp;kbt); KBacktraceIterator_next(&amp;kbt)) {</div><div class='ctx'> 		if (skip) {</div><div class='ctx'> 			--skip;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (i &gt;= trace-&gt;max_entries || kbt.it.pc &lt; PAGE_OFFSET)</div><div class='add'>+		if (i &gt;= trace-&gt;max_entries ||</div><div class='add'>+		    (!user &amp;&amp; kbt.it.pc &lt; PAGE_OFFSET))</div><div class='ctx'> 			break;</div><div class='ctx'> 		trace-&gt;entries[i++] = kbt.it.pc;</div><div class='ctx'> 	}</div><div class='ctx'> 	end_backtrace();</div><div class='ctx'> done:</div><div class='add'>+	if (i &lt; trace-&gt;max_entries)</div><div class='add'>+		trace-&gt;entries[i++] = ULONG_MAX;</div><div class='ctx'> 	trace-&gt;nr_entries = i;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void save_stack_trace_tsk(struct task_struct *task, struct stack_trace *trace)</div><div class='add'>+{</div><div class='add'>+	save_stack_trace_common(task, NULL, false, trace);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(save_stack_trace_tsk);</div><div class='ctx'> </div><div class='ctx'> void save_stack_trace(struct stack_trace *trace)</div><div class='ctx'> {</div><div class='del'>-	save_stack_trace_tsk(NULL, trace);</div><div class='add'>+	save_stack_trace_common(NULL, NULL, false, trace);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(save_stack_trace);</div><div class='ctx'> </div><div class='add'>+void save_stack_trace_regs(struct pt_regs *regs, struct stack_trace *trace)</div><div class='add'>+{</div><div class='add'>+	save_stack_trace_common(NULL, regs, false, trace);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void save_stack_trace_user(struct stack_trace *trace)</div><div class='add'>+{</div><div class='add'>+	/* Trace user stack if we are not a kernel thread. */</div><div class='add'>+	if (current-&gt;mm)</div><div class='add'>+		save_stack_trace_common(NULL, task_pt_regs(current),</div><div class='add'>+					true, trace);</div><div class='add'>+	else if (trace-&gt;nr_entries &lt; trace-&gt;max_entries)</div><div class='add'>+		trace-&gt;entries[trace-&gt;nr_entries++] = ULONG_MAX;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* In entry.S */</div><div class='head'>diff --git a/arch/tile/kernel/traps.c b/arch/tile/kernel/traps.c<br/>index 312fc134c1cb..0011a9ff0525 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/traps.c</a></div><div class='hunk'>@@ -395,6 +395,21 @@ done:</div><div class='ctx'> 	exception_exit(prev_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void do_nmi(struct pt_regs *regs, int fault_num, unsigned long reason)</div><div class='add'>+{</div><div class='add'>+	switch (reason) {</div><div class='add'>+	case TILE_NMI_DUMP_STACK:</div><div class='add'>+		do_nmi_dump_stack(regs);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		panic("Unexpected do_nmi type %ld", reason);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Deprecated function currently only used here. */</div><div class='add'>+extern void _dump_stack(int dummy, ulong pc, ulong lr, ulong sp, ulong r52);</div><div class='add'>+</div><div class='ctx'> void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)</div><div class='ctx'> {</div><div class='ctx'> 	_dump_stack(dummy, pc, lr, sp, r52);</div><div class='head'>diff --git a/arch/tile/kernel/usb.c b/arch/tile/kernel/usb.c<br/>index 5af8debc6a71..f0da5a237e94 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/usb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/usb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/usb.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/usb/tilegx.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> static u64 ehci_dmamask = DMA_BIT_MASK(32);</div><div class='head'>diff --git a/arch/tile/kernel/vdso/vgettimeofday.c b/arch/tile/kernel/vdso/vgettimeofday.c<br/>index 8bb21eda07d8..e63310c49742 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/vdso/vgettimeofday.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/kernel/vdso/vgettimeofday.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/vdso/vgettimeofday.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/kernel/vdso/vgettimeofday.c</a></div><div class='hunk'>@@ -67,7 +67,7 @@ static inline int do_realtime(struct vdso_data *vdso, struct timespec *ts)</div><div class='ctx'> 	u64 ns;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		count = read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='add'>+		count = raw_read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='ctx'> 		ts-&gt;tv_sec = vdso-&gt;wall_time_sec;</div><div class='ctx'> 		ns = vdso-&gt;wall_time_snsec;</div><div class='ctx'> 		ns += vgetsns(vdso);</div><div class='hunk'>@@ -86,7 +86,7 @@ static inline int do_monotonic(struct vdso_data *vdso, struct timespec *ts)</div><div class='ctx'> 	u64 ns;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		count = read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='add'>+		count = raw_read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='ctx'> 		ts-&gt;tv_sec = vdso-&gt;monotonic_time_sec;</div><div class='ctx'> 		ns = vdso-&gt;monotonic_time_snsec;</div><div class='ctx'> 		ns += vgetsns(vdso);</div><div class='hunk'>@@ -105,7 +105,7 @@ static inline int do_realtime_coarse(struct vdso_data *vdso,</div><div class='ctx'> 	unsigned count;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		count = read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='add'>+		count = raw_read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='ctx'> 		ts-&gt;tv_sec = vdso-&gt;wall_time_coarse_sec;</div><div class='ctx'> 		ts-&gt;tv_nsec = vdso-&gt;wall_time_coarse_nsec;</div><div class='ctx'> 	} while (unlikely(read_seqcount_retry(&amp;vdso-&gt;tb_seq, count)));</div><div class='hunk'>@@ -119,7 +119,7 @@ static inline int do_monotonic_coarse(struct vdso_data *vdso,</div><div class='ctx'> 	unsigned count;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		count = read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='add'>+		count = raw_read_seqcount_begin(&amp;vdso-&gt;tb_seq);</div><div class='ctx'> 		ts-&gt;tv_sec = vdso-&gt;monotonic_time_coarse_sec;</div><div class='ctx'> 		ts-&gt;tv_nsec = vdso-&gt;monotonic_time_coarse_nsec;</div><div class='ctx'> 	} while (unlikely(read_seqcount_retry(&amp;vdso-&gt;tb_seq, count)));</div><div class='hunk'>@@ -137,7 +137,7 @@ struct syscall_return_value __vdso_gettimeofday(struct timeval *tv,</div><div class='ctx'> 	/* The use of the timezone is obsolete, normally tz is NULL. */</div><div class='ctx'> 	if (unlikely(tz != NULL)) {</div><div class='ctx'> 		do {</div><div class='del'>-			count = read_seqcount_begin(&amp;vdso-&gt;tz_seq);</div><div class='add'>+			count = raw_read_seqcount_begin(&amp;vdso-&gt;tz_seq);</div><div class='ctx'> 			tz-&gt;tz_minuteswest = vdso-&gt;tz_minuteswest;</div><div class='ctx'> 			tz-&gt;tz_dsttime = vdso-&gt;tz_dsttime;</div><div class='ctx'> 		} while (unlikely(read_seqcount_retry(&amp;vdso-&gt;tz_seq, count)));</div><div class='head'>diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c<br/>index 82733c87d67e..9d171ca4302c 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/exports.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/exports.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/exports.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/exports.c</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> /* arch/tile/lib/usercopy.S */</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='del'>-EXPORT_SYMBOL(strnlen_user_asm);</div><div class='del'>-EXPORT_SYMBOL(strncpy_from_user_asm);</div><div class='ctx'> EXPORT_SYMBOL(clear_user_asm);</div><div class='ctx'> EXPORT_SYMBOL(flush_user_asm);</div><div class='ctx'> EXPORT_SYMBOL(finv_user_asm);</div><div class='hunk'>@@ -28,7 +26,6 @@ EXPORT_SYMBOL(finv_user_asm);</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> EXPORT_SYMBOL(current_text_addr);</div><div class='del'>-EXPORT_SYMBOL(dump_stack);</div><div class='ctx'> </div><div class='ctx'> /* arch/tile/kernel/head.S */</div><div class='ctx'> EXPORT_SYMBOL(empty_zero_page);</div><div class='head'>diff --git a/arch/tile/lib/memcpy_user_64.c b/arch/tile/lib/memcpy_user_64.c<br/>index 88c7016492c4..97bbb6060b25 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/memcpy_user_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/memcpy_user_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/memcpy_user_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/memcpy_user_64.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #define _ST(p, inst, v)						\</div><div class='ctx'> 	({							\</div><div class='ctx'> 		asm("1: " #inst " %0, %1;"			\</div><div class='del'>-		    ".pushsection .coldtext.memcpy,\"ax\";"	\</div><div class='add'>+		    ".pushsection .coldtext,\"ax\";"	\</div><div class='ctx'> 		    "2: { move r0, %2; jrp lr };"		\</div><div class='ctx'> 		    ".section __ex_table,\"a\";"		\</div><div class='ctx'> 		    ".align 8;"					\</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 	({							\</div><div class='ctx'> 		unsigned long __v;				\</div><div class='ctx'> 		asm("1: " #inst " %0, %1;"			\</div><div class='del'>-		    ".pushsection .coldtext.memcpy,\"ax\";"	\</div><div class='add'>+		    ".pushsection .coldtext,\"ax\";"	\</div><div class='ctx'> 		    "2: { move r0, %2; jrp lr };"		\</div><div class='ctx'> 		    ".section __ex_table,\"a\";"		\</div><div class='ctx'> 		    ".align 8;"					\</div><div class='head'>diff --git a/arch/tile/lib/spinlock_32.c b/arch/tile/lib/spinlock_32.c<br/>index b34f79aada48..88c2a53362e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/spinlock_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/spinlock_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/spinlock_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/spinlock_32.c</a></div><div class='hunk'>@@ -65,8 +65,17 @@ EXPORT_SYMBOL(arch_spin_trylock);</div><div class='ctx'> void arch_spin_unlock_wait(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	u32 iterations = 0;</div><div class='del'>-	while (arch_spin_is_locked(lock))</div><div class='add'>+	int curr = READ_ONCE(lock-&gt;current_ticket);</div><div class='add'>+	int next = READ_ONCE(lock-&gt;next_ticket);</div><div class='add'>+</div><div class='add'>+	/* Return immediately if unlocked. */</div><div class='add'>+	if (next == curr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Wait until the current locker has released the lock. */</div><div class='add'>+	do {</div><div class='ctx'> 		delay_backoff(iterations++);</div><div class='add'>+	} while (READ_ONCE(lock-&gt;current_ticket) == curr);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(arch_spin_unlock_wait);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/lib/spinlock_64.c b/arch/tile/lib/spinlock_64.c<br/>index d6fb9581e980..c8d1f94ff1fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/spinlock_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/spinlock_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/spinlock_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/spinlock_64.c</a></div><div class='hunk'>@@ -65,8 +65,17 @@ EXPORT_SYMBOL(arch_spin_trylock);</div><div class='ctx'> void arch_spin_unlock_wait(arch_spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	u32 iterations = 0;</div><div class='del'>-	while (arch_spin_is_locked(lock))</div><div class='add'>+	u32 val = READ_ONCE(lock-&gt;lock);</div><div class='add'>+	u32 curr = arch_spin_current(val);</div><div class='add'>+</div><div class='add'>+	/* Return immediately if unlocked. */</div><div class='add'>+	if (arch_spin_next(val) == curr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Wait until the current locker has released the lock. */</div><div class='add'>+	do {</div><div class='ctx'> 		delay_backoff(iterations++);</div><div class='add'>+	} while (arch_spin_current(READ_ONCE(lock-&gt;lock)) == curr);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(arch_spin_unlock_wait);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/lib/usercopy_32.S b/arch/tile/lib/usercopy_32.S<br/>index 1bc162224638..db93ad5fae25 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/usercopy_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/usercopy_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/usercopy_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/usercopy_32.S</a></div><div class='hunk'>@@ -20,52 +20,6 @@</div><div class='ctx'> /* Access user memory, but use MMU to avoid propagating kernel exceptions. */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * strnlen_user_asm takes the pointer in r0, and the length bound in r1.</div><div class='del'>- * It returns the length, including the terminating NUL, or zero on exception.</div><div class='del'>- * If length is greater than the bound, returns one plus the bound.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(strnlen_user_asm)</div><div class='del'>-	{ bz r1, 2f; addi r3, r0, -1 }  /* bias down to include NUL */</div><div class='del'>-1:      { lb_u r4, r0; addi r1, r1, -1 }</div><div class='del'>-	bz r4, 2f</div><div class='del'>-	{ bnzt r1, 1b; addi r0, r0, 1 }</div><div class='del'>-2:      { sub r0, r0, r3; jrp lr }</div><div class='del'>-	STD_ENDPROC(strnlen_user_asm)</div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-strnlen_user_fault:</div><div class='del'>-	{ move r0, zero; jrp lr }</div><div class='del'>-	ENDPROC(strnlen_user_fault)</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.word 1b, strnlen_user_fault</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * strncpy_from_user_asm takes the kernel target pointer in r0,</div><div class='del'>- * the userspace source pointer in r1, and the length bound (including</div><div class='del'>- * the trailing NUL) in r2.  On success, it returns the string length</div><div class='del'>- * (not including the trailing NUL), or -EFAULT on failure.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(strncpy_from_user_asm)</div><div class='del'>-	{ bz r2, 2f; move r3, r0 }</div><div class='del'>-1:	{ lb_u r4, r1; addi r1, r1, 1; addi r2, r2, -1 }</div><div class='del'>-	{ sb r0, r4; addi r0, r0, 1 }</div><div class='del'>-	bz r4, 2f</div><div class='del'>-	bnzt r2, 1b</div><div class='del'>-	{ sub r0, r0, r3; jrp lr }</div><div class='del'>-2:	addi r0, r0, -1   /* don't count the trailing NUL */</div><div class='del'>-	{ sub r0, r0, r3; jrp lr }</div><div class='del'>-	STD_ENDPROC(strncpy_from_user_asm)</div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-strncpy_from_user_fault:</div><div class='del'>-	{ movei r0, -EFAULT; jrp lr }</div><div class='del'>-	ENDPROC(strncpy_from_user_fault)</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.word 1b, strncpy_from_user_fault</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * clear_user_asm takes the user target address in r0 and the</div><div class='ctx'>  * number of bytes to zero in r1.</div><div class='ctx'>  * It returns the number of uncopiable bytes (hopefully zero) in r0.</div><div class='head'>diff --git a/arch/tile/lib/usercopy_64.S b/arch/tile/lib/usercopy_64.S<br/>index b3b31a3306f8..9322dc551e91 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/usercopy_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/lib/usercopy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/usercopy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/lib/usercopy_64.S</a></div><div class='hunk'>@@ -20,52 +20,6 @@</div><div class='ctx'> /* Access user memory, but use MMU to avoid propagating kernel exceptions. */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * strnlen_user_asm takes the pointer in r0, and the length bound in r1.</div><div class='del'>- * It returns the length, including the terminating NUL, or zero on exception.</div><div class='del'>- * If length is greater than the bound, returns one plus the bound.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(strnlen_user_asm)</div><div class='del'>-	{ beqz r1, 2f; addi r3, r0, -1 }  /* bias down to include NUL */</div><div class='del'>-1:      { ld1u r4, r0; addi r1, r1, -1 }</div><div class='del'>-	beqz r4, 2f</div><div class='del'>-	{ bnezt r1, 1b; addi r0, r0, 1 }</div><div class='del'>-2:      { sub r0, r0, r3; jrp lr }</div><div class='del'>-	STD_ENDPROC(strnlen_user_asm)</div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-strnlen_user_fault:</div><div class='del'>-	{ move r0, zero; jrp lr }</div><div class='del'>-	ENDPROC(strnlen_user_fault)</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 1b, strnlen_user_fault</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * strncpy_from_user_asm takes the kernel target pointer in r0,</div><div class='del'>- * the userspace source pointer in r1, and the length bound (including</div><div class='del'>- * the trailing NUL) in r2.  On success, it returns the string length</div><div class='del'>- * (not including the trailing NUL), or -EFAULT on failure.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(strncpy_from_user_asm)</div><div class='del'>-	{ beqz r2, 2f; move r3, r0 }</div><div class='del'>-1:	{ ld1u r4, r1; addi r1, r1, 1; addi r2, r2, -1 }</div><div class='del'>-	{ st1 r0, r4; addi r0, r0, 1 }</div><div class='del'>-	beqz r4, 2f</div><div class='del'>-	bnezt r2, 1b</div><div class='del'>-	{ sub r0, r0, r3; jrp lr }</div><div class='del'>-2:	addi r0, r0, -1   /* don't count the trailing NUL */</div><div class='del'>-	{ sub r0, r0, r3; jrp lr }</div><div class='del'>-	STD_ENDPROC(strncpy_from_user_asm)</div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-strncpy_from_user_fault:</div><div class='del'>-	{ movei r0, -EFAULT; jrp lr }</div><div class='del'>-	ENDPROC(strncpy_from_user_fault)</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 1b, strncpy_from_user_fault</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * clear_user_asm takes the user target address in r0 and the</div><div class='ctx'>  * number of bytes to zero in r1.</div><div class='ctx'>  * It returns the number of uncopiable bytes (hopefully zero) in r0.</div><div class='head'>diff --git a/arch/tile/mm/elf.c b/arch/tile/mm/elf.c<br/>index f7ddae3725a4..6225cc998db1 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/elf.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/mm/elf.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/elf.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/elf.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static int notify_exec(struct mm_struct *mm)</div><div class='ctx'> 	if (exe_file == NULL)</div><div class='ctx'> 		goto done_free;</div><div class='ctx'> </div><div class='del'>-	path = d_path(&amp;exe_file-&gt;f_path, buf, PAGE_SIZE);</div><div class='add'>+	path = file_path(exe_file, buf, PAGE_SIZE);</div><div class='ctx'> 	if (IS_ERR(path))</div><div class='ctx'> 		goto done_put;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c<br/>index e83cc999da02..13eac59bf16a 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/fault.c</a></div><div class='hunk'>@@ -354,9 +354,9 @@ static int handle_page_fault(struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt, have no user context or are running in an</div><div class='del'>-	 * atomic region then we must not take the fault.</div><div class='add'>+	 * region with pagefaults disabled then we must not take the fault.</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm) {</div><div class='add'>+	if (pagefault_disabled() || !mm) {</div><div class='ctx'> 		vma = NULL;  /* happy compiler */</div><div class='ctx'> 		goto bad_area_nosemaphore;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -699,11 +699,10 @@ struct intvec_state do_page_fault_ics(struct pt_regs *regs, int fault_num,</div><div class='ctx'>  * interrupt away appropriately and return immediately.  We can't do</div><div class='ctx'>  * page faults for user code while in kernel mode.</div><div class='ctx'>  */</div><div class='del'>-void do_page_fault(struct pt_regs *regs, int fault_num,</div><div class='del'>-		   unsigned long address, unsigned long write)</div><div class='add'>+static inline void __do_page_fault(struct pt_regs *regs, int fault_num,</div><div class='add'>+				   unsigned long address, unsigned long write)</div><div class='ctx'> {</div><div class='ctx'> 	int is_page_fault;</div><div class='del'>-	enum ctx_state prev_state = exception_enter();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KPROBES</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -713,7 +712,7 @@ void do_page_fault(struct pt_regs *regs, int fault_num,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (notify_die(DIE_PAGE_FAULT, "page fault", regs, -1,</div><div class='ctx'> 		       regs-&gt;faultnum, SIGSEGV) == NOTIFY_STOP)</div><div class='del'>-		goto done;</div><div class='add'>+		return;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef __tilegx__</div><div class='hunk'>@@ -835,18 +834,22 @@ void do_page_fault(struct pt_regs *regs, int fault_num,</div><div class='ctx'> 			async-&gt;is_fault = is_page_fault;</div><div class='ctx'> 			async-&gt;is_write = write;</div><div class='ctx'> 			async-&gt;address = address;</div><div class='del'>-			goto done;</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	handle_page_fault(regs, fault_num, is_page_fault, address, write);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-done:</div><div class='add'>+void do_page_fault(struct pt_regs *regs, int fault_num,</div><div class='add'>+		   unsigned long address, unsigned long write)</div><div class='add'>+{</div><div class='add'>+	enum ctx_state prev_state = exception_enter();</div><div class='add'>+	__do_page_fault(regs, fault_num, address, write);</div><div class='ctx'> 	exception_exit(prev_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #if CHIP_HAS_TILE_DMA()</div><div class='ctx'> /*</div><div class='ctx'>  * This routine effectively re-issues asynchronous page faults</div><div class='head'>diff --git a/arch/tile/mm/highmem.c b/arch/tile/mm/highmem.c<br/>index 6aa2f2625447..fcd545014e79 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/highmem.c</a></div><div class='hunk'>@@ -201,7 +201,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	/* Avoid icache flushes by disallowing atomic executable mappings. */</div><div class='hunk'>@@ -259,6 +259,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/mm/hugetlbpage.c b/arch/tile/mm/hugetlbpage.c<br/>index 8416240c322c..c034dc3fe2d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/hugetlbpage.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/tile/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/hugetlbpage.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/tile/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -160,11 +160,6 @@ int pud_huge(pud_t pud)</div><div class='ctx'> 	return !!(pud_val(pud) &amp; _PAGE_HUGE_PAGE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef HAVE_ARCH_HUGETLB_UNMAPPED_AREA</div><div class='ctx'> static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *file,</div><div class='ctx'> 		unsigned long addr, unsigned long len,</div><div class='head'>diff --git a/arch/um/Kconfig.um b/arch/um/Kconfig.um<br/>index 6e67847f5272..28a9885e3a37 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/Kconfig.um?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/Kconfig.um</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/Kconfig.um?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/Kconfig.um</a></div><div class='hunk'>@@ -44,23 +44,9 @@ config HOSTFS</div><div class='ctx'>           If you'd like to be able to work with files stored on the host,</div><div class='ctx'>           say Y or M here; otherwise say N.</div><div class='ctx'> </div><div class='del'>-config HPPFS</div><div class='del'>-	tristate "HoneyPot ProcFS"</div><div class='del'>-	depends on PROC_FS</div><div class='del'>-	help</div><div class='del'>-	  hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc</div><div class='del'>-	  entries to be overridden, removed, or fabricated from the host.</div><div class='del'>-	  Its purpose is to allow a UML to appear to be a physical machine</div><div class='del'>-	  by removing or changing anything in /proc which gives away the</div><div class='del'>-	  identity of a UML.</div><div class='del'>-</div><div class='del'>-	  See &lt;http://user-mode-linux.sf.net/old/hppfs.html&gt; for more information.</div><div class='del'>-</div><div class='del'>-	  You only need this if you are setting up a UML honeypot.  Otherwise,</div><div class='del'>-	  it is safe to say 'N' here.</div><div class='del'>-</div><div class='ctx'> config MCONSOLE</div><div class='ctx'> 	bool "Management console"</div><div class='add'>+	depends on PROC_FS</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'>           The user mode linux management console is a low-level interface to</div><div class='head'>diff --git a/arch/um/Makefile b/arch/um/Makefile<br/>index 17d4460b1af3..098ab3333e7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/Makefile</a></div><div class='hunk'>@@ -68,9 +68,10 @@ KBUILD_CFLAGS += $(CFLAGS) $(CFLAGS-y) -D__arch_um__ \</div><div class='ctx'> </div><div class='ctx'> KBUILD_AFLAGS += $(ARCH_INCLUDE)</div><div class='ctx'> </div><div class='del'>-USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -D__KERNEL__,,\</div><div class='del'>-	$(patsubst -I%,,$(KBUILD_CFLAGS)))) $(ARCH_INCLUDE) $(MODE_INCLUDE) \</div><div class='del'>-	$(filter -I%,$(CFLAGS)) -D_FILE_OFFSET_BITS=64 -idirafter include</div><div class='add'>+USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \</div><div class='add'>+		$(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \</div><div class='add'>+		-D_FILE_OFFSET_BITS=64 -idirafter include \</div><div class='add'>+		-D__KERNEL__ -D__UM_HOST__</div><div class='ctx'> </div><div class='ctx'> #This will adjust *FLAGS accordingly to the platform.</div><div class='ctx'> include $(ARCH_DIR)/Makefile-os-$(OS)</div><div class='head'>diff --git a/arch/um/drivers/harddog_user.c b/arch/um/drivers/harddog_user.c<br/>index f99b32a4dbff..3aa8b0d52a48 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/harddog_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/harddog_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/harddog_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/harddog_user.c</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct dog_data {</div><div class='del'>-	int stdin;</div><div class='del'>-	int stdout;</div><div class='add'>+	int stdin_fd;</div><div class='add'>+	int stdout_fd;</div><div class='ctx'> 	int close_me[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -18,11 +18,11 @@ static void pre_exec(void *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct dog_data *data = d;</div><div class='ctx'> </div><div class='del'>-	dup2(data-&gt;stdin, 0);</div><div class='del'>-	dup2(data-&gt;stdout, 1);</div><div class='del'>-	dup2(data-&gt;stdout, 2);</div><div class='del'>-	close(data-&gt;stdin);</div><div class='del'>-	close(data-&gt;stdout);</div><div class='add'>+	dup2(data-&gt;stdin_fd, 0);</div><div class='add'>+	dup2(data-&gt;stdout_fd, 1);</div><div class='add'>+	dup2(data-&gt;stdout_fd, 2);</div><div class='add'>+	close(data-&gt;stdin_fd);</div><div class='add'>+	close(data-&gt;stdout_fd);</div><div class='ctx'> 	close(data-&gt;close_me[0]);</div><div class='ctx'> 	close(data-&gt;close_me[1]);</div><div class='ctx'> }</div><div class='hunk'>@@ -49,8 +49,8 @@ int start_watchdog(int *in_fd_ret, int *out_fd_ret, char *sock)</div><div class='ctx'> 		goto out_close_in;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data.stdin = out_fds[0];</div><div class='del'>-	data.stdout = in_fds[1];</div><div class='add'>+	data.stdin_fd = out_fds[0];</div><div class='add'>+	data.stdout_fd = in_fds[1];</div><div class='ctx'> 	data.close_me[0] = out_fds[1];</div><div class='ctx'> 	data.close_me[1] = in_fds[0];</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c<br/>index 9b90fdc4b151..f6b911cc3923 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/hostaudio_kern.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/hostaudio_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/hostaudio_kern.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/hostaudio_kern.c</a></div><div class='hunk'>@@ -185,9 +185,9 @@ static int hostaudio_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG</div><div class='del'>-	kparam_block_sysfs_write(dsp);</div><div class='add'>+	kernel_param_lock(THIS_MODULE);</div><div class='ctx'> 	printk(KERN_DEBUG "hostaudio: open called (host: %s)\n", dsp);</div><div class='del'>-	kparam_unblock_sysfs_write(dsp);</div><div class='add'>+	kernel_param_unlock(THIS_MODULE);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	state = kmalloc(sizeof(struct hostaudio_state), GFP_KERNEL);</div><div class='hunk'>@@ -199,11 +199,11 @@ static int hostaudio_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	if (file-&gt;f_mode &amp; FMODE_WRITE)</div><div class='ctx'> 		w = 1;</div><div class='ctx'> </div><div class='del'>-	kparam_block_sysfs_write(dsp);</div><div class='add'>+	kernel_param_lock(THIS_MODULE);</div><div class='ctx'> 	mutex_lock(&amp;hostaudio_mutex);</div><div class='ctx'> 	ret = os_open_file(dsp, of_set_rw(OPENFLAGS(), r, w), 0);</div><div class='ctx'> 	mutex_unlock(&amp;hostaudio_mutex);</div><div class='del'>-	kparam_unblock_sysfs_write(dsp);</div><div class='add'>+	kernel_param_unlock(THIS_MODULE);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		kfree(state);</div><div class='hunk'>@@ -260,17 +260,17 @@ static int hostmixer_open_mixdev(struct inode *inode, struct file *file)</div><div class='ctx'> 	if (file-&gt;f_mode &amp; FMODE_WRITE)</div><div class='ctx'> 		w = 1;</div><div class='ctx'> </div><div class='del'>-	kparam_block_sysfs_write(mixer);</div><div class='add'>+	kernel_param_lock(THIS_MODULE);</div><div class='ctx'> 	mutex_lock(&amp;hostaudio_mutex);</div><div class='ctx'> 	ret = os_open_file(mixer, of_set_rw(OPENFLAGS(), r, w), 0);</div><div class='ctx'> 	mutex_unlock(&amp;hostaudio_mutex);</div><div class='del'>-	kparam_unblock_sysfs_write(mixer);</div><div class='add'>+	kernel_param_unlock(THIS_MODULE);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		kparam_block_sysfs_write(dsp);</div><div class='add'>+		kernel_param_lock(THIS_MODULE);</div><div class='ctx'> 		printk(KERN_ERR "hostaudio_open_mixdev failed to open '%s', "</div><div class='ctx'> 		       "err = %d\n", dsp, -ret);</div><div class='del'>-		kparam_unblock_sysfs_write(dsp);</div><div class='add'>+		kernel_param_unlock(THIS_MODULE);</div><div class='ctx'> 		kfree(state);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -326,10 +326,10 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static int __init hostaudio_init_module(void)</div><div class='ctx'> {</div><div class='del'>-	__kernel_param_lock();</div><div class='add'>+	kernel_param_lock(THIS_MODULE);</div><div class='ctx'> 	printk(KERN_INFO "UML Audio Relay (host dsp = %s, host mixer = %s)\n",</div><div class='ctx'> 	       dsp, mixer);</div><div class='del'>-	__kernel_param_unlock();</div><div class='add'>+	kernel_param_unlock(THIS_MODULE);</div><div class='ctx'> </div><div class='ctx'> 	module_data.dev_audio = register_sound_dsp(&amp;hostaudio_fops, -1);</div><div class='ctx'> 	if (module_data.dev_audio &lt; 0) {</div><div class='head'>diff --git a/arch/um/drivers/mconsole.h b/arch/um/drivers/mconsole.h<br/>index 8b22535c62ce..44af7379ea19 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/mconsole.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/mconsole.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/mconsole.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/mconsole.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef __MCONSOLE_H__</div><div class='ctx'> #define __MCONSOLE_H__</div><div class='ctx'> </div><div class='del'>-#ifndef __KERNEL__</div><div class='add'>+#ifdef __UM_HOST__</div><div class='ctx'> #include &lt;stdint.h&gt;</div><div class='ctx'> #define u32 uint32_t</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/um/drivers/net_user.c b/arch/um/drivers/net_user.c<br/>index cd14157b556d..e697a4136707 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/net_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/net_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/net_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/net_user.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ int net_sendto(int fd, void *buf, int len, void *to, int sock_len)</div><div class='ctx'> </div><div class='ctx'> struct change_pre_exec_data {</div><div class='ctx'> 	int close_me;</div><div class='del'>-	int stdout;</div><div class='add'>+	int stdout_fd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void change_pre_exec(void *arg)</div><div class='hunk'>@@ -174,7 +174,7 @@ static void change_pre_exec(void *arg)</div><div class='ctx'> 	struct change_pre_exec_data *data = arg;</div><div class='ctx'> </div><div class='ctx'> 	close(data-&gt;close_me);</div><div class='del'>-	dup2(data-&gt;stdout, 1);</div><div class='add'>+	dup2(data-&gt;stdout_fd, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int change_tramp(char **argv, char *output, int output_len)</div><div class='hunk'>@@ -189,7 +189,7 @@ static int change_tramp(char **argv, char *output, int output_len)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	pe_data.close_me = fds[0];</div><div class='del'>-	pe_data.stdout = fds[1];</div><div class='add'>+	pe_data.stdout_fd = fds[1];</div><div class='ctx'> 	pid = run_helper(change_pre_exec, &amp;pe_data, argv);</div><div class='ctx'> </div><div class='ctx'> 	if (pid &gt; 0)	/* Avoid hang as we won't get data in failure case. */</div><div class='head'>diff --git a/arch/um/drivers/slip_user.c b/arch/um/drivers/slip_user.c<br/>index 55c290d925f3..0d6b66c64a81 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/slip_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/slip_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/slip_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/slip_user.c</a></div><div class='hunk'>@@ -55,8 +55,8 @@ static int set_up_tty(int fd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct slip_pre_exec_data {</div><div class='del'>-	int stdin;</div><div class='del'>-	int stdout;</div><div class='add'>+	int stdin_fd;</div><div class='add'>+	int stdout_fd;</div><div class='ctx'> 	int close_me;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -64,9 +64,9 @@ static void slip_pre_exec(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct slip_pre_exec_data *data = arg;</div><div class='ctx'> </div><div class='del'>-	if (data-&gt;stdin &gt;= 0)</div><div class='del'>-		dup2(data-&gt;stdin, 0);</div><div class='del'>-	dup2(data-&gt;stdout, 1);</div><div class='add'>+	if (data-&gt;stdin_fd &gt;= 0)</div><div class='add'>+		dup2(data-&gt;stdin_fd, 0);</div><div class='add'>+	dup2(data-&gt;stdout_fd, 1);</div><div class='ctx'> 	if (data-&gt;close_me &gt;= 0)</div><div class='ctx'> 		close(data-&gt;close_me);</div><div class='ctx'> }</div><div class='hunk'>@@ -85,8 +85,8 @@ static int slip_tramp(char **argv, int fd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = 0;</div><div class='del'>-	pe_data.stdin = fd;</div><div class='del'>-	pe_data.stdout = fds[1];</div><div class='add'>+	pe_data.stdin_fd = fd;</div><div class='add'>+	pe_data.stdout_fd = fds[1];</div><div class='ctx'> 	pe_data.close_me = fds[0];</div><div class='ctx'> 	err = run_helper(slip_pre_exec, &amp;pe_data, argv);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='head'>diff --git a/arch/um/drivers/slirp_user.c b/arch/um/drivers/slirp_user.c<br/>index c999d187abb9..98b6a41a254e 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/slirp_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/drivers/slirp_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/slirp_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/drivers/slirp_user.c</a></div><div class='hunk'>@@ -20,18 +20,18 @@ static int slirp_user_init(void *data, void *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct slirp_pre_exec_data {</div><div class='del'>-	int stdin;</div><div class='del'>-	int stdout;</div><div class='add'>+	int stdin_fd;</div><div class='add'>+	int stdout_fd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void slirp_pre_exec(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct slirp_pre_exec_data *data = arg;</div><div class='ctx'> </div><div class='del'>-	if (data-&gt;stdin != -1)</div><div class='del'>-		dup2(data-&gt;stdin, 0);</div><div class='del'>-	if (data-&gt;stdout != -1)</div><div class='del'>-		dup2(data-&gt;stdout, 1);</div><div class='add'>+	if (data-&gt;stdin_fd != -1)</div><div class='add'>+		dup2(data-&gt;stdin_fd, 0);</div><div class='add'>+	if (data-&gt;stdout_fd != -1)</div><div class='add'>+		dup2(data-&gt;stdout_fd, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int slirp_tramp(char **argv, int fd)</div><div class='hunk'>@@ -39,8 +39,8 @@ static int slirp_tramp(char **argv, int fd)</div><div class='ctx'> 	struct slirp_pre_exec_data pe_data;</div><div class='ctx'> 	int pid;</div><div class='ctx'> </div><div class='del'>-	pe_data.stdin = fd;</div><div class='del'>-	pe_data.stdout = fd;</div><div class='add'>+	pe_data.stdin_fd = fd;</div><div class='add'>+	pe_data.stdout_fd = fd;</div><div class='ctx'> 	pid = run_helper(slirp_pre_exec, &amp;pe_data, argv);</div><div class='ctx'> </div><div class='ctx'> 	return pid;</div><div class='head'>diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild<br/>index 9176fa11d49b..149ec55f9c46 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/Kbuild</a></div><div class='hunk'>@@ -16,13 +16,12 @@ generic-y += irq_regs.h</div><div class='ctx'> generic-y += irq_work.h</div><div class='ctx'> generic-y += kdebug.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += param.h</div><div class='ctx'> generic-y += pci.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='del'>-generic-y += sections.h</div><div class='ctx'> generic-y += switch_to.h</div><div class='ctx'> generic-y += topology.h</div><div class='ctx'> generic-y += trace_clock.h</div><div class='head'>diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h<br/>index cb9b3c47ca8e..2966adbbdf6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/ptrace-generic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/asm/ptrace-generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/ptrace-generic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/ptrace-generic.h</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> #include &lt;sysdep/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct pt_regs {</div><div class='hunk'>@@ -37,7 +36,7 @@ extern int putreg(struct task_struct *child, int regno, unsigned long value);</div><div class='ctx'> </div><div class='ctx'> extern int arch_copy_tls(struct task_struct *new);</div><div class='ctx'> extern void clear_flushed_tls(struct task_struct *task);</div><div class='del'>-extern void syscall_trace_enter(struct pt_regs *regs);</div><div class='add'>+extern int syscall_trace_enter(struct pt_regs *regs);</div><div class='ctx'> extern void syscall_trace_leave(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/um/include/asm/sections.h b/arch/um/include/asm/sections.h<br/>new file mode 100644<br/>index 000000000000..cafcf684d947<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/sections.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/sections.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+#ifndef __UM_SECTIONS_H</div><div class='add'>+#define __UM_SECTIONS_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/sections.h&gt;</div><div class='add'>+</div><div class='add'>+extern char __binary_start[];</div><div class='add'>+extern char __syscall_stub_start[], __syscall_stub_end[];</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/um/include/asm/thread_info.h b/arch/um/include/asm/thread_info.h<br/>index b30c85b141d9..53968aaf76f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/thread_info.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/thread_info.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct thread_info {</div><div class='ctx'> 	struct task_struct	*task;		/* main task structure */</div><div class='head'>diff --git a/arch/um/include/asm/uaccess.h b/arch/um/include/asm/uaccess.h<br/>index 3f22fbf7ca1d..3705620ca298 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/asm/uaccess.h</a></div><div class='hunk'>@@ -1,178 +1,52 @@</div><div class='ctx'> /* </div><div class='ctx'>  * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)</div><div class='add'>+ * Copyright (C) 2015 Richard Weinberger (richard@nod.at)</div><div class='ctx'>  * Licensed under the GPL</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __UM_UACCESS_H</div><div class='ctx'> #define __UM_UACCESS_H</div><div class='ctx'> </div><div class='del'>-/* thread_info has a mm_segment_t in it, so put the definition up here */</div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned long seg;</div><div class='del'>-} mm_segment_t;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/thread_info.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-#define VERIFY_READ 0</div><div class='del'>-#define VERIFY_WRITE 1</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The fs value determines whether argument validity checking should be</div><div class='del'>- * performed or not.  If get_fs() == USER_DS, checking is performed, with</div><div class='del'>- * get_fs() == KERNEL_DS, checking is bypassed.</div><div class='del'>- *</div><div class='del'>- * For historical reasons, these macros are grossly misnamed.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MAKE_MM_SEG(s)	((mm_segment_t) { (s) })</div><div class='del'>-</div><div class='del'>-#define KERNEL_DS	MAKE_MM_SEG(0xFFFFFFFF)</div><div class='del'>-#define USER_DS		MAKE_MM_SEG(TASK_SIZE)</div><div class='del'>-</div><div class='del'>-#define get_ds()	(KERNEL_DS)</div><div class='del'>-#define get_fs()	(current_thread_info()-&gt;addr_limit)</div><div class='del'>-#define set_fs(x)	(current_thread_info()-&gt;addr_limit = (x))</div><div class='del'>-</div><div class='del'>-#define segment_eq(a, b) ((a).seg == (b).seg)</div><div class='del'>-</div><div class='ctx'> #define __under_task_size(addr, size) \</div><div class='ctx'> 	(((unsigned long) (addr) &lt; TASK_SIZE) &amp;&amp; \</div><div class='ctx'> 	 (((unsigned long) (addr) + (size)) &lt; TASK_SIZE))</div><div class='ctx'> </div><div class='del'>-#define __access_ok_vsyscall(type, addr, size) \</div><div class='del'>-	 ((type == VERIFY_READ) &amp;&amp; \</div><div class='del'>-	  ((unsigned long) (addr) &gt;= FIXADDR_USER_START) &amp;&amp; \</div><div class='add'>+#define __access_ok_vsyscall(addr, size) \</div><div class='add'>+	  (((unsigned long) (addr) &gt;= FIXADDR_USER_START) &amp;&amp; \</div><div class='ctx'> 	  ((unsigned long) (addr) + (size) &lt;= FIXADDR_USER_END) &amp;&amp; \</div><div class='ctx'> 	  ((unsigned long) (addr) + (size) &gt;= (unsigned long)(addr)))</div><div class='ctx'> </div><div class='ctx'> #define __addr_range_nowrap(addr, size) \</div><div class='ctx'> 	((unsigned long) (addr) &lt;= ((unsigned long) (addr) + (size)))</div><div class='ctx'> </div><div class='del'>-#define access_ok(type, addr, size) \</div><div class='del'>-	(__addr_range_nowrap(addr, size) &amp;&amp; \</div><div class='del'>-	 (__under_task_size(addr, size) || \</div><div class='del'>-	  __access_ok_vsyscall(type, addr, size) || \</div><div class='del'>-	  segment_eq(get_fs(), KERNEL_DS)))</div><div class='del'>-</div><div class='del'>-extern int copy_from_user(void *to, const void __user *from, int n);</div><div class='del'>-extern int copy_to_user(void __user *to, const void *from, int n);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * strncpy_from_user: - Copy a NUL terminated string from userspace.</div><div class='del'>- * @dst:   Destination address, in kernel space.  This buffer must be at</div><div class='del'>- *         least @count bytes long.</div><div class='del'>- * @src:   Source address, in user space.</div><div class='del'>- * @count: Maximum number of bytes to copy, including the trailing NUL.</div><div class='del'>- *</div><div class='del'>- * Copies a NUL-terminated string from userspace to kernel space.</div><div class='del'>- *</div><div class='del'>- * On success, returns the length of the string (not including the trailing</div><div class='del'>- * NUL).</div><div class='del'>- *</div><div class='del'>- * If access to userspace fails, returns -EFAULT (some data may have been</div><div class='del'>- * copied).</div><div class='del'>- *</div><div class='del'>- * If @count is smaller than the length of the string, copies @count bytes</div><div class='del'>- * and returns @count.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern int strncpy_from_user(char *dst, const char __user *src, int count);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __clear_user: - Zero a block of memory in user space, with less checking.</div><div class='del'>- * @to:   Destination address, in user space.</div><div class='del'>- * @n:    Number of bytes to zero.</div><div class='del'>- *</div><div class='del'>- * Zero a block of memory in user space.  Caller must check</div><div class='del'>- * the specified block with access_ok() before calling this function.</div><div class='del'>- *</div><div class='del'>- * Returns number of bytes that could not be cleared.</div><div class='del'>- * On success, this will be zero.</div><div class='del'>- */</div><div class='del'>-extern int __clear_user(void __user *mem, int len);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clear_user: - Zero a block of memory in user space.</div><div class='del'>- * @to:   Destination address, in user space.</div><div class='del'>- * @n:    Number of bytes to zero.</div><div class='del'>- *</div><div class='del'>- * Zero a block of memory in user space.</div><div class='del'>- *</div><div class='del'>- * Returns number of bytes that could not be cleared.</div><div class='del'>- * On success, this will be zero.</div><div class='del'>- */</div><div class='del'>-extern int clear_user(void __user *mem, int len);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * strlen_user: - Get the size of a string in user space.</div><div class='del'>- * @str: The string to measure.</div><div class='del'>- * @n:   The maximum valid length</div><div class='del'>- *</div><div class='del'>- * Get the size of a NUL-terminated string in user space.</div><div class='del'>- *</div><div class='del'>- * Returns the size of the string INCLUDING the terminating NUL.</div><div class='del'>- * On exception, returns 0.</div><div class='del'>- * If the string is too long, returns a value greater than @n.</div><div class='del'>- */</div><div class='del'>-extern int strnlen_user(const void __user *str, int len);</div><div class='del'>-</div><div class='del'>-#define __copy_from_user(to, from, n) copy_from_user(to, from, n)</div><div class='del'>-</div><div class='del'>-#define __copy_to_user(to, from, n) copy_to_user(to, from, n)</div><div class='del'>-</div><div class='add'>+extern long __copy_from_user(void *to, const void __user *from, unsigned long n);</div><div class='add'>+extern long __copy_to_user(void __user *to, const void *from, unsigned long n);</div><div class='add'>+extern long __strncpy_from_user(char *dst, const char __user *src, long count);</div><div class='add'>+extern long __strnlen_user(const void __user *str, long len);</div><div class='add'>+extern unsigned long __clear_user(void __user *mem, unsigned long len);</div><div class='add'>+static inline int __access_ok(unsigned long addr, unsigned long size);</div><div class='add'>+</div><div class='add'>+/* Teach asm-generic/uaccess.h that we have C functions for these. */</div><div class='add'>+#define __access_ok __access_ok</div><div class='add'>+#define __clear_user __clear_user</div><div class='add'>+#define __copy_to_user __copy_to_user</div><div class='add'>+#define __copy_from_user __copy_from_user</div><div class='add'>+#define __strnlen_user __strnlen_user</div><div class='add'>+#define __strncpy_from_user __strncpy_from_user</div><div class='ctx'> #define __copy_to_user_inatomic __copy_to_user</div><div class='ctx'> #define __copy_from_user_inatomic __copy_from_user</div><div class='ctx'> </div><div class='del'>-#define __get_user(x, ptr) \</div><div class='del'>-({ \</div><div class='del'>-	const __typeof__(*(ptr)) __user *__private_ptr = (ptr);	\</div><div class='del'>-	__typeof__(x) __private_val;			\</div><div class='del'>-	int __private_ret = -EFAULT;			\</div><div class='del'>-	(x) = (__typeof__(*(__private_ptr)))0;				\</div><div class='del'>-	if (__copy_from_user((__force void *)&amp;__private_val, (__private_ptr),\</div><div class='del'>-			     sizeof(*(__private_ptr))) == 0) {		\</div><div class='del'>-		(x) = (__typeof__(*(__private_ptr))) __private_val;	\</div><div class='del'>-		__private_ret = 0;					\</div><div class='del'>-	}								\</div><div class='del'>-	__private_ret;							\</div><div class='del'>-}) </div><div class='del'>-</div><div class='del'>-#define get_user(x, ptr) \</div><div class='del'>-({ \</div><div class='del'>-        const __typeof__((*(ptr))) __user *private_ptr = (ptr); \</div><div class='del'>-        (access_ok(VERIFY_READ, private_ptr, sizeof(*private_ptr)) ? \</div><div class='del'>-	 __get_user(x, private_ptr) : ((x) = (__typeof__(*ptr))0, -EFAULT)); \</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define __put_user(x, ptr) \</div><div class='del'>-({ \</div><div class='del'>-        __typeof__(*(ptr)) __user *__private_ptr = ptr; \</div><div class='del'>-        __typeof__(*(__private_ptr)) __private_val; \</div><div class='del'>-        int __private_ret = -EFAULT; \</div><div class='del'>-        __private_val = (__typeof__(*(__private_ptr))) (x); \</div><div class='del'>-        if (__copy_to_user((__private_ptr), &amp;__private_val, \</div><div class='del'>-			   sizeof(*(__private_ptr))) == 0) { \</div><div class='del'>-		__private_ret = 0; \</div><div class='del'>-	} \</div><div class='del'>-        __private_ret; \</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define put_user(x, ptr) \</div><div class='del'>-({ \</div><div class='del'>-        __typeof__(*(ptr)) __user *private_ptr = (ptr); \</div><div class='del'>-        (access_ok(VERIFY_WRITE, private_ptr, sizeof(*private_ptr)) ? \</div><div class='del'>-	 __put_user(x, private_ptr) : -EFAULT); \</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define strlen_user(str) strnlen_user(str, ~0U &gt;&gt; 1)</div><div class='add'>+#include &lt;asm-generic/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-struct exception_table_entry</div><div class='add'>+static inline int __access_ok(unsigned long addr, unsigned long size)</div><div class='ctx'> {</div><div class='del'>-        unsigned long insn;</div><div class='del'>-	unsigned long fixup;</div><div class='del'>-};</div><div class='add'>+	return __addr_range_nowrap(addr, size) &amp;&amp;</div><div class='add'>+		(__under_task_size(addr, size) ||</div><div class='add'>+		__access_ok_vsyscall(addr, size) ||</div><div class='add'>+		segment_eq(get_fs(), KERNEL_DS));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/um/include/shared/init.h b/arch/um/include/shared/init.h<br/>index b3906f860a87..233e2593eee0 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/shared/init.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/shared/init.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/shared/init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/init.h</a></div><div class='hunk'>@@ -40,28 +40,8 @@</div><div class='ctx'> typedef int (*initcall_t)(void);</div><div class='ctx'> typedef void (*exitcall_t)(void);</div><div class='ctx'> </div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-#ifndef __section</div><div class='del'>-# define __section(S) __attribute__ ((__section__(#S)))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if __GNUC__ == 3</div><div class='del'>-</div><div class='del'>-#if __GNUC_MINOR__ &gt;= 3</div><div class='del'>-# define __used			__attribute__((__used__))</div><div class='del'>-#else</div><div class='del'>-# define __used			__attribute__((__unused__))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-#if __GNUC__ == 4</div><div class='del'>-# define __used			__attribute__((__used__))</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#else</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> /* These are for everybody (although not all archs will actually</div><div class='ctx'>    discard it in modules) */</div><div class='ctx'> #define __init		__section(.init.text)</div><div class='hunk'>@@ -131,7 +111,7 @@ extern struct uml_param __uml_setup_start, __uml_setup_end;</div><div class='ctx'> #define __uml_postsetup_call	__used __section(.uml.postsetup.init)</div><div class='ctx'> #define __uml_exit_call		__used __section(.uml.exitcall.exit)</div><div class='ctx'> </div><div class='del'>-#ifndef __KERNEL__</div><div class='add'>+#ifdef __UM_HOST__</div><div class='ctx'> </div><div class='ctx'> #define __define_initcall(level,fn) \</div><div class='ctx'> 	static initcall_t __initcall_##fn __used \</div><div class='head'>diff --git a/arch/um/include/shared/os.h b/arch/um/include/shared/os.h<br/>index d824528f6f62..ad3fa3ae6d34 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/shared/os.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/shared/os.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/shared/os.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/os.h</a></div><div class='hunk'>@@ -301,4 +301,6 @@ extern int get_pty(void);</div><div class='ctx'> /* sys-$ARCH/task_size.c */</div><div class='ctx'> extern unsigned long os_get_top_address(void);</div><div class='ctx'> </div><div class='add'>+long syscall(long number, ...);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/um/include/shared/user.h b/arch/um/include/shared/user.h<br/>index cef068563336..4cff19f6207a 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/shared/user.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/include/shared/user.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/shared/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/include/shared/user.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))</div><div class='ctx'> </div><div class='ctx'> /* This is to get size_t */</div><div class='del'>-#ifdef __KERNEL__</div><div class='add'>+#ifndef __UM_HOST__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #else</div><div class='ctx'> #include &lt;stddef.h&gt;</div><div class='head'>diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c<br/>index 543c04756939..232b22307fdd 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/ksyms.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/ksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/ksyms.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/ksyms.c</a></div><div class='hunk'>@@ -42,3 +42,5 @@ EXPORT_SYMBOL(os_makedev);</div><div class='ctx'> EXPORT_SYMBOL(add_sigio_fd);</div><div class='ctx'> EXPORT_SYMBOL(ignore_sigio_fd);</div><div class='ctx'> EXPORT_SYMBOL(sigio_broken);</div><div class='add'>+</div><div class='add'>+EXPORT_SYMBOL(syscall);</div><div class='head'>diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c<br/>index 9034fc8056b4..4c9861b421fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/physmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/physmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/physmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/physmem.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/pfn.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;as-layout.h&gt;</div><div class='ctx'> #include &lt;init.h&gt;</div><div class='ctx'> #include &lt;kern.h&gt;</div><div class='hunk'>@@ -55,8 +56,6 @@ void map_memory(unsigned long virt, unsigned long phys, unsigned long len,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int __syscall_stub_start;</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * setup_physmem() - Setup physical memory for UML</div><div class='ctx'>  * @start:	Start address of the physical kernel memory,</div><div class='hunk'>@@ -110,8 +109,8 @@ void __init setup_physmem(unsigned long start, unsigned long reserve_end,</div><div class='ctx'> 	 * Special kludge - This page will be mapped in to userspace processes</div><div class='ctx'> 	 * from physmem_fd, so it needs to be written out there.</div><div class='ctx'> 	 */</div><div class='del'>-	os_seek_file(physmem_fd, __pa(&amp;__syscall_stub_start));</div><div class='del'>-	os_write_file(physmem_fd, &amp;__syscall_stub_start, PAGE_SIZE);</div><div class='add'>+	os_seek_file(physmem_fd, __pa(__syscall_stub_start));</div><div class='add'>+	os_write_file(physmem_fd, __syscall_stub_start, PAGE_SIZE);</div><div class='ctx'> 	os_fsync_file(physmem_fd);</div><div class='ctx'> </div><div class='ctx'> 	bootmap_size = init_bootmem(pfn, pfn + delta);</div><div class='head'>diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c<br/>index 174ee5017264..6a826cbb15c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/ptrace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/ptrace.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/tracehook.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> </div><div class='ctx'> void user_enable_single_step(struct task_struct *child)</div><div class='ctx'> {</div><div class='hunk'>@@ -131,7 +132,7 @@ static void send_sigtrap(struct task_struct *tsk, struct uml_pt_regs *regs,</div><div class='ctx'>  * XXX Check PT_DTRACE vs TIF_SINGLESTEP for singlestepping check and</div><div class='ctx'>  * PT_PTRACED vs TIF_SYSCALL_TRACE for syscall tracing check</div><div class='ctx'>  */</div><div class='del'>-void syscall_trace_enter(struct pt_regs *regs)</div><div class='add'>+int syscall_trace_enter(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	audit_syscall_entry(UPT_SYSCALL_NR(&amp;regs-&gt;regs),</div><div class='ctx'> 			    UPT_SYSCALL_ARG1(&amp;regs-&gt;regs),</div><div class='hunk'>@@ -140,9 +141,9 @@ void syscall_trace_enter(struct pt_regs *regs)</div><div class='ctx'> 			    UPT_SYSCALL_ARG4(&amp;regs-&gt;regs));</div><div class='ctx'> </div><div class='ctx'> 	if (!test_thread_flag(TIF_SYSCALL_TRACE))</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	tracehook_report_syscall_entry(regs);</div><div class='add'>+	return tracehook_report_syscall_entry(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void syscall_trace_leave(struct pt_regs *regs)</div><div class='head'>diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c<br/>index 94abdcc1d6ad..fda1deba1757 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/skas/mmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/skas/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/skas/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/mmu.c</a></div><div class='hunk'>@@ -8,12 +8,11 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;as-layout.h&gt;</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> #include &lt;skas.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int __syscall_stub_start;</div><div class='del'>-</div><div class='ctx'> static int init_stub_pte(struct mm_struct *mm, unsigned long proc,</div><div class='ctx'> 			 unsigned long kernel)</div><div class='ctx'> {</div><div class='hunk'>@@ -93,7 +92,7 @@ void uml_setup_stubs(struct mm_struct *mm)</div><div class='ctx'> 	int err, ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = init_stub_pte(mm, STUB_CODE,</div><div class='del'>-			    (unsigned long) &amp;__syscall_stub_start);</div><div class='add'>+			    (unsigned long) __syscall_stub_start);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +100,7 @@ void uml_setup_stubs(struct mm_struct *mm)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mm-&gt;context.stub_pages[0] = virt_to_page(&amp;__syscall_stub_start);</div><div class='add'>+	mm-&gt;context.stub_pages[0] = virt_to_page(__syscall_stub_start);</div><div class='ctx'> 	mm-&gt;context.stub_pages[1] = virt_to_page(mm-&gt;context.id.stack);</div><div class='ctx'> </div><div class='ctx'> 	/* dup_mmap already holds mmap_sem */</div><div class='head'>diff --git a/arch/um/kernel/skas/syscall.c b/arch/um/kernel/skas/syscall.c<br/>index c0681e097432..d9ec0068b623 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/skas/syscall.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/skas/syscall.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/skas/syscall.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/syscall.c</a></div><div class='hunk'>@@ -18,7 +18,10 @@ void handle_syscall(struct uml_pt_regs *r)</div><div class='ctx'> 	long result;</div><div class='ctx'> 	int syscall;</div><div class='ctx'> </div><div class='del'>-	syscall_trace_enter(regs);</div><div class='add'>+	if (syscall_trace_enter(regs)) {</div><div class='add'>+		result = -ENOSYS;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This should go in the declaration of syscall, but when I do that,</div><div class='hunk'>@@ -34,6 +37,7 @@ void handle_syscall(struct uml_pt_regs *r)</div><div class='ctx'> 		result = -ENOSYS;</div><div class='ctx'> 	else result = EXECUTE_SYSCALL(syscall, regs);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	PT_REGS_SET_SYSCALL_RETURN(regs, result);</div><div class='ctx'> </div><div class='ctx'> 	syscall_trace_leave(regs);</div><div class='head'>diff --git a/arch/um/kernel/skas/uaccess.c b/arch/um/kernel/skas/uaccess.c<br/>index 4ffb644d6c07..85ac8adb069b 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/skas/uaccess.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/skas/uaccess.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/skas/uaccess.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/skas/uaccess.c</a></div><div class='hunk'>@@ -87,10 +87,10 @@ static int do_op_one_page(unsigned long addr, int len, int is_write,</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int buffer_op(unsigned long addr, int len, int is_write,</div><div class='del'>-		     int (*op)(unsigned long, int, void *), void *arg)</div><div class='add'>+static long buffer_op(unsigned long addr, int len, int is_write,</div><div class='add'>+		      int (*op)(unsigned long, int, void *), void *arg)</div><div class='ctx'> {</div><div class='del'>-	int size, remain, n;</div><div class='add'>+	long size, remain, n;</div><div class='ctx'> </div><div class='ctx'> 	size = min(PAGE_ALIGN(addr) - addr, (unsigned long) len);</div><div class='ctx'> 	remain = len;</div><div class='hunk'>@@ -139,18 +139,16 @@ static int copy_chunk_from_user(unsigned long from, int len, void *arg)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int copy_from_user(void *to, const void __user *from, int n)</div><div class='add'>+long __copy_from_user(void *to, const void __user *from, unsigned long n)</div><div class='ctx'> {</div><div class='ctx'> 	if (segment_eq(get_fs(), KERNEL_DS)) {</div><div class='ctx'> 		memcpy(to, (__force void*)from, n);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return access_ok(VERIFY_READ, from, n) ?</div><div class='del'>-	       buffer_op((unsigned long) from, n, 0, copy_chunk_from_user, &amp;to):</div><div class='del'>-	       n;</div><div class='add'>+	return buffer_op((unsigned long) from, n, 0, copy_chunk_from_user, &amp;to);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(copy_from_user);</div><div class='add'>+EXPORT_SYMBOL(__copy_from_user);</div><div class='ctx'> </div><div class='ctx'> static int copy_chunk_to_user(unsigned long to, int len, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -161,18 +159,16 @@ static int copy_chunk_to_user(unsigned long to, int len, void *arg)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int copy_to_user(void __user *to, const void *from, int n)</div><div class='add'>+long __copy_to_user(void __user *to, const void *from, unsigned long n)</div><div class='ctx'> {</div><div class='ctx'> 	if (segment_eq(get_fs(), KERNEL_DS)) {</div><div class='ctx'> 		memcpy((__force void *) to, from, n);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return access_ok(VERIFY_WRITE, to, n) ?</div><div class='del'>-	       buffer_op((unsigned long) to, n, 1, copy_chunk_to_user, &amp;from) :</div><div class='del'>-	       n;</div><div class='add'>+	return buffer_op((unsigned long) to, n, 1, copy_chunk_to_user, &amp;from);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(copy_to_user);</div><div class='add'>+EXPORT_SYMBOL(__copy_to_user);</div><div class='ctx'> </div><div class='ctx'> static int strncpy_chunk_from_user(unsigned long from, int len, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -188,9 +184,9 @@ static int strncpy_chunk_from_user(unsigned long from, int len, void *arg)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int strncpy_from_user(char *dst, const char __user *src, int count)</div><div class='add'>+long __strncpy_from_user(char *dst, const char __user *src, long count)</div><div class='ctx'> {</div><div class='del'>-	int n;</div><div class='add'>+	long n;</div><div class='ctx'> 	char *ptr = dst;</div><div class='ctx'> </div><div class='ctx'> 	if (segment_eq(get_fs(), KERNEL_DS)) {</div><div class='hunk'>@@ -198,16 +194,13 @@ int strncpy_from_user(char *dst, const char __user *src, int count)</div><div class='ctx'> 		return strnlen(dst, count);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!access_ok(VERIFY_READ, src, 1))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	n = buffer_op((unsigned long) src, count, 0, strncpy_chunk_from_user,</div><div class='ctx'> 		      &amp;ptr);</div><div class='ctx'> 	if (n != 0)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	return strnlen(dst, count);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(strncpy_from_user);</div><div class='add'>+EXPORT_SYMBOL(__strncpy_from_user);</div><div class='ctx'> </div><div class='ctx'> static int clear_chunk(unsigned long addr, int len, void *unused)</div><div class='ctx'> {</div><div class='hunk'>@@ -215,22 +208,16 @@ static int clear_chunk(unsigned long addr, int len, void *unused)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __clear_user(void __user *mem, int len)</div><div class='del'>-{</div><div class='del'>-	return buffer_op((unsigned long) mem, len, 1, clear_chunk, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int clear_user(void __user *mem, int len)</div><div class='add'>+unsigned long __clear_user(void __user *mem, unsigned long len)</div><div class='ctx'> {</div><div class='ctx'> 	if (segment_eq(get_fs(), KERNEL_DS)) {</div><div class='ctx'> 		memset((__force void*)mem, 0, len);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return access_ok(VERIFY_WRITE, mem, len) ?</div><div class='del'>-	       buffer_op((unsigned long) mem, len, 1, clear_chunk, NULL) : len;</div><div class='add'>+	return buffer_op((unsigned long) mem, len, 1, clear_chunk, NULL);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(clear_user);</div><div class='add'>+EXPORT_SYMBOL(__clear_user);</div><div class='ctx'> </div><div class='ctx'> static int strnlen_chunk(unsigned long str, int len, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -244,7 +231,7 @@ static int strnlen_chunk(unsigned long str, int len, void *arg)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int strnlen_user(const void __user *str, int len)</div><div class='add'>+long __strnlen_user(const void __user *str, long len)</div><div class='ctx'> {</div><div class='ctx'> 	int count = 0, n;</div><div class='ctx'> </div><div class='hunk'>@@ -256,4 +243,4 @@ int strnlen_user(const void __user *str, int len)</div><div class='ctx'> 		return count + 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(strnlen_user);</div><div class='add'>+EXPORT_SYMBOL(__strnlen_user);</div><div class='head'>diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c<br/>index 8e4daf44e980..557232f758b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/trap.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/trap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/trap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/trap.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -35,10 +36,10 @@ int handle_page_fault(unsigned long address, unsigned long ip,</div><div class='ctx'> 	*code_out = SEGV_MAPERR;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If the fault was during atomic operation, don't take the fault, just</div><div class='add'>+	 * If the fault was with pagefaults disabled, don't take the fault, just</div><div class='ctx'> 	 * fail.</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic())</div><div class='add'>+	if (faulthandler_disabled())</div><div class='ctx'> 		goto out_nosemaphore;</div><div class='ctx'> </div><div class='ctx'> 	if (is_user)</div><div class='hunk'>@@ -219,6 +220,11 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,</div><div class='ctx'> 		show_regs(container_of(regs, struct pt_regs, regs));</div><div class='ctx'> 		panic("Segfault with no mm");</div><div class='ctx'> 	}</div><div class='add'>+	else if (!is_user &amp;&amp; address &lt; TASK_SIZE) {</div><div class='add'>+		show_regs(container_of(regs, struct pt_regs, regs));</div><div class='add'>+		panic("Kernel tried to access user memory at addr 0x%lx, ip 0x%lx",</div><div class='add'>+		       address, ip);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (SEGV_IS_FIXABLE(&amp;fi))</div><div class='ctx'> 		err = handle_page_fault(address, ip, is_write, is_user,</div><div class='head'>diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c<br/>index 07f798f4bcee..16630e75f056 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/um_arch.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/kernel/um_arch.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/um_arch.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/kernel/um_arch.c</a></div><div class='hunk'>@@ -248,8 +248,6 @@ EXPORT_SYMBOL(end_iomem);</div><div class='ctx'> </div><div class='ctx'> #define MIN_VMALLOC (32 * 1024 * 1024)</div><div class='ctx'> </div><div class='del'>-extern char __binary_start;</div><div class='del'>-</div><div class='ctx'> int __init linux_main(int argc, char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long avail, diff;</div><div class='hunk'>@@ -294,7 +292,7 @@ int __init linux_main(int argc, char **argv)</div><div class='ctx'> 		physmem_size += UML_ROUND_UP(brk_start) - UML_ROUND_UP(&amp;_end);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	uml_physmem = (unsigned long) &amp;__binary_start &amp; PAGE_MASK;</div><div class='add'>+	uml_physmem = (unsigned long) __binary_start &amp; PAGE_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* Reserve up to 4M after the current brk */</div><div class='ctx'> 	uml_reserved = ROUND_4M(brk_start) + (1 &lt;&lt; 22);</div><div class='head'>diff --git a/arch/um/os-Linux/drivers/ethertap_user.c b/arch/um/os-Linux/drivers/ethertap_user.c<br/>index b39b6696ac58..6d4918246ffe 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/drivers/ethertap_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/drivers/ethertap_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/drivers/ethertap_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/drivers/ethertap_user.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static int etap_tramp(char *dev, char *gate, int control_me,</div><div class='ctx'> 	sprintf(data_fd_buf, "%d", data_remote);</div><div class='ctx'> 	sprintf(version_buf, "%d", UML_NET_VERSION);</div><div class='ctx'> 	if (gate != NULL) {</div><div class='del'>-		strcpy(gate_buf, gate);</div><div class='add'>+		strncpy(gate_buf, gate, 15);</div><div class='ctx'> 		args = setup_args;</div><div class='ctx'> 	}</div><div class='ctx'> 	else args = nosetup_args;</div><div class='head'>diff --git a/arch/um/os-Linux/drivers/tuntap_user.c b/arch/um/os-Linux/drivers/tuntap_user.c<br/>index 14126d9176aa..c2e6e1dad876 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/drivers/tuntap_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/drivers/tuntap_user.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/drivers/tuntap_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/drivers/tuntap_user.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static void tuntap_del_addr(unsigned char *addr, unsigned char *netmask,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct tuntap_pre_exec_data {</div><div class='del'>-	int stdout;</div><div class='add'>+	int stdout_fd;</div><div class='ctx'> 	int close_me;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +55,7 @@ static void tuntap_pre_exec(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct tuntap_pre_exec_data *data = arg;</div><div class='ctx'> </div><div class='del'>-	dup2(data-&gt;stdout, 1);</div><div class='add'>+	dup2(data-&gt;stdout_fd, 1);</div><div class='ctx'> 	close(data-&gt;close_me);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,7 +74,7 @@ static int tuntap_open_tramp(char *gate, int *fd_out, int me, int remote,</div><div class='ctx'> </div><div class='ctx'> 	sprintf(version_buf, "%d", UML_NET_VERSION);</div><div class='ctx'> </div><div class='del'>-	data.stdout = remote;</div><div class='add'>+	data.stdout_fd = remote;</div><div class='ctx'> 	data.close_me = me;</div><div class='ctx'> </div><div class='ctx'> 	pid = run_helper(tuntap_pre_exec, &amp;data, argv);</div><div class='head'>diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c<br/>index 08d90fba952c..26e0164895e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/file.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/file.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/file.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/file.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;sys/socket.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;sys/un.h&gt;</div><div class='add'>+#include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void copy_stat(struct uml_stat *dst, const struct stat64 *src)</div><div class='head'>diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c<br/>index 7b605e4dfffa..036d0dbc7b52 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/signal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/signal.c</a></div><div class='hunk'>@@ -112,9 +112,11 @@ void timer_init(void)</div><div class='ctx'> </div><div class='ctx'> void set_sigstack(void *sig_stack, int size)</div><div class='ctx'> {</div><div class='del'>-	stack_t stack = ((stack_t) { .ss_flags	= 0,</div><div class='del'>-				     .ss_sp	= (__ptr_t) sig_stack,</div><div class='del'>-				     .ss_size 	= size - sizeof(void *) });</div><div class='add'>+	stack_t stack = {</div><div class='add'>+		.ss_flags = 0,</div><div class='add'>+		.ss_sp = sig_stack,</div><div class='add'>+		.ss_size = size - sizeof(void *)</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	if (sigaltstack(&amp;stack, NULL) != 0)</div><div class='ctx'> 		panic("enabling signal stack failed, errno = %d\n", errno);</div><div class='head'>diff --git a/arch/um/os-Linux/skas/mem.c b/arch/um/os-Linux/skas/mem.c<br/>index e7f8c945a573..35015e3e1e87 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/skas/mem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/skas/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/skas/mem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/skas/mem.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;sysdep/ptrace.h&gt;</div><div class='ctx'> #include &lt;sysdep/stub.h&gt;</div><div class='ctx'> </div><div class='del'>-extern unsigned long batch_syscall_stub, __syscall_stub_start;</div><div class='add'>+extern char batch_syscall_stub[], __syscall_stub_start[];</div><div class='ctx'> </div><div class='ctx'> extern void wait_stub_done(int pid);</div><div class='ctx'> </div><div class='hunk'>@@ -38,8 +38,8 @@ static int __init init_syscall_regs(void)</div><div class='ctx'> {</div><div class='ctx'> 	get_safe_registers(syscall_regs, NULL);</div><div class='ctx'> 	syscall_regs[REGS_IP_INDEX] = STUB_CODE +</div><div class='del'>-		((unsigned long) &amp;batch_syscall_stub -</div><div class='del'>-		 (unsigned long) &amp;__syscall_stub_start);</div><div class='add'>+		((unsigned long) batch_syscall_stub -</div><div class='add'>+		 (unsigned long) __syscall_stub_start);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c<br/>index 7a9777570a62..3dddedba3a07 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/skas/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/um/os-Linux/skas/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/skas/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/um/os-Linux/skas/process.c</a></div><div class='hunk'>@@ -174,7 +174,7 @@ static void handle_trap(int pid, struct uml_pt_regs *regs,</div><div class='ctx'> 	handle_syscall(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int __syscall_stub_start;</div><div class='add'>+extern char __syscall_stub_start[];</div><div class='ctx'> </div><div class='ctx'> static int userspace_tramp(void *stack)</div><div class='ctx'> {</div><div class='hunk'>@@ -197,7 +197,7 @@ static int userspace_tramp(void *stack)</div><div class='ctx'> 	 * This has a pte, but it can't be mapped in with the usual</div><div class='ctx'> 	 * tlb_flush mechanism because this is part of that mechanism</div><div class='ctx'> 	 */</div><div class='del'>-	fd = phys_mapping(to_phys(&amp;__syscall_stub_start), &amp;offset);</div><div class='add'>+	fd = phys_mapping(to_phys(__syscall_stub_start), &amp;offset);</div><div class='ctx'> 	addr = mmap64((void *) STUB_CODE, UM_KERN_PAGE_SIZE,</div><div class='ctx'> 		      PROT_EXEC, MAP_FIXED | MAP_PRIVATE, fd, offset);</div><div class='ctx'> 	if (addr == MAP_FAILED) {</div><div class='hunk'>@@ -223,7 +223,7 @@ static int userspace_tramp(void *stack)</div><div class='ctx'> </div><div class='ctx'> 		unsigned long v = STUB_CODE +</div><div class='ctx'> 				  (unsigned long) stub_segv_handler -</div><div class='del'>-				  (unsigned long) &amp;__syscall_stub_start;</div><div class='add'>+				  (unsigned long) __syscall_stub_start;</div><div class='ctx'> </div><div class='ctx'> 		set_sigstack((void *) STUB_DATA, UM_KERN_PAGE_SIZE);</div><div class='ctx'> 		sigemptyset(&amp;sa.sa_mask);</div><div class='hunk'>@@ -447,7 +447,7 @@ static int __init init_thread_regs(void)</div><div class='ctx'> 	/* Set parent's instruction pointer to start of clone-stub */</div><div class='ctx'> 	thread_regs[REGS_IP_INDEX] = STUB_CODE +</div><div class='ctx'> 				(unsigned long) stub_clone_handler -</div><div class='del'>-				(unsigned long) &amp;__syscall_stub_start;</div><div class='add'>+				(unsigned long) __syscall_stub_start;</div><div class='ctx'> 	thread_regs[REGS_SP_INDEX] = STUB_DATA + UM_KERN_PAGE_SIZE -</div><div class='ctx'> 		sizeof(void *);</div><div class='ctx'> #ifdef __SIGNAL_FRAMESIZE</div><div class='head'>diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild<br/>index 3e0c19d0f4c5..1fc7a286dc6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/unicore32/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/include/asm/Kbuild</a></div><div class='hunk'>@@ -26,6 +26,7 @@ generic-y += kdebug.h</div><div class='ctx'> generic-y += kmap_types.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += mman.h</div><div class='ctx'> generic-y += module.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='hunk'>@@ -36,7 +37,6 @@ generic-y += poll.h</div><div class='ctx'> generic-y += posix_types.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += segment.h</div><div class='ctx'> generic-y += sembuf.h</div><div class='head'>diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h<br/>index 654407e98619..38b3f3785c3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/unicore32/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/include/asm/pci.h</a></div><div class='hunk'>@@ -18,16 +18,6 @@</div><div class='ctx'> #include &lt;asm-generic/pci.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt; /* for PCIBIOS_MIN_* */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define HAVE_PCI_MMAP</div><div class='ctx'> extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'> 	enum pci_mmap_state mmap_state, int write_combine);</div><div class='head'>diff --git a/arch/unicore32/kernel/fpu-ucf64.c b/arch/unicore32/kernel/fpu-ucf64.c<br/>index 282a60ac82ba..a53343a90ca2 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/kernel/fpu-ucf64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/unicore32/kernel/fpu-ucf64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/kernel/fpu-ucf64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/kernel/fpu-ucf64.c</a></div><div class='hunk'>@@ -90,8 +90,8 @@ void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'> 			tmp &amp;= ~(FPSCR_CON);</div><div class='ctx'> 		exc &amp;= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON);</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_debug(KERN_ERR "UniCore-F64 Error: unhandled exceptions\n");</div><div class='del'>-		pr_debug(KERN_ERR "UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",</div><div class='add'>+		pr_debug("UniCore-F64 Error: unhandled exceptions\n");</div><div class='add'>+		pr_debug("UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",</div><div class='ctx'> 				cff(FPSCR), inst);</div><div class='ctx'> </div><div class='ctx'> 		ucf64_raise_sigfpe(0, regs);</div><div class='head'>diff --git a/arch/unicore32/mm/fault.c b/arch/unicore32/mm/fault.c<br/>index 0dc922dba915..afccef5529cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/unicore32/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/unicore32/mm/fault.c</a></div><div class='hunk'>@@ -218,7 +218,7 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='add'>+	if (faulthandler_disabled() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='head'>diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild<br/>index 3942f74c92d7..1538562cc720 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kbuild</a></div><div class='hunk'>@@ -1,3 +1,6 @@</div><div class='add'>+</div><div class='add'>+obj-y += entry/</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_KVM) += kvm/</div><div class='ctx'> </div><div class='ctx'> # Xen paravirtualization support</div><div class='hunk'>@@ -11,7 +14,7 @@ obj-y += kernel/</div><div class='ctx'> obj-y += mm/</div><div class='ctx'> </div><div class='ctx'> obj-y += crypto/</div><div class='del'>-obj-y += vdso/</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_IA32_EMULATION) += ia32/</div><div class='ctx'> </div><div class='ctx'> obj-y += platform/</div><div class='head'>diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig<br/>index 226d5696e1d1..b3a1a5d77d92 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kconfig</a></div><div class='hunk'>@@ -9,140 +9,147 @@ config 64BIT</div><div class='ctx'> config X86_32</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on !64BIT</div><div class='del'>-	select CLKSRC_I8253</div><div class='del'>-	select HAVE_UID16</div><div class='ctx'> </div><div class='ctx'> config X86_64</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on 64BIT</div><div class='del'>-	select X86_DEV_DMA_OPS</div><div class='del'>-	select ARCH_USE_CMPXCHG_LOCKREF</div><div class='del'>-	select HAVE_LIVEPATCH</div><div class='ctx'> </div><div class='ctx'> ### Arch settings</div><div class='ctx'> config X86</div><div class='ctx'> 	def_bool y</div><div class='del'>-	select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI</div><div class='del'>-	select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI</div><div class='add'>+	select ACPI_LEGACY_TABLES_LOOKUP	if ACPI</div><div class='add'>+	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI</div><div class='add'>+	select ANON_INODES</div><div class='add'>+	select ARCH_CLOCKSOURCE_DATA</div><div class='add'>+	select ARCH_DISCARD_MEMBLOCK</div><div class='add'>+	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='ctx'> 	select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS</div><div class='add'>+	select ARCH_HAS_ELF_RANDOMIZE</div><div class='ctx'> 	select ARCH_HAS_FAST_MULTIPLIER</div><div class='ctx'> 	select ARCH_HAS_GCOV_PROFILE_ALL</div><div class='add'>+	select ARCH_HAS_PMEM_API</div><div class='add'>+	select ARCH_HAS_SG_CHAIN</div><div class='add'>+	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select ARCH_MIGHT_HAVE_ACPI_PDC		if ACPI</div><div class='ctx'> 	select ARCH_MIGHT_HAVE_PC_PARPORT</div><div class='ctx'> 	select ARCH_MIGHT_HAVE_PC_SERIO</div><div class='del'>-	select HAVE_AOUT if X86_32</div><div class='del'>-	select HAVE_UNSTABLE_SCHED_CLOCK</div><div class='del'>-	select ARCH_SUPPORTS_NUMA_BALANCING if X86_64</div><div class='del'>-	select ARCH_SUPPORTS_INT128 if X86_64</div><div class='del'>-	select HAVE_IDE</div><div class='del'>-	select HAVE_OPROFILE</div><div class='del'>-	select HAVE_PCSPKR_PLATFORM</div><div class='del'>-	select HAVE_PERF_EVENTS</div><div class='del'>-	select HAVE_IOREMAP_PROT</div><div class='del'>-	select HAVE_KPROBES</div><div class='del'>-	select HAVE_MEMBLOCK</div><div class='del'>-	select HAVE_MEMBLOCK_NODE_MAP</div><div class='del'>-	select ARCH_DISCARD_MEMBLOCK</div><div class='del'>-	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='add'>+	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='add'>+	select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT</div><div class='add'>+	select ARCH_SUPPORTS_INT128		if X86_64</div><div class='add'>+	select ARCH_SUPPORTS_NUMA_BALANCING	if X86_64</div><div class='add'>+	select ARCH_USE_BUILTIN_BSWAP</div><div class='add'>+	select ARCH_USE_CMPXCHG_LOCKREF		if X86_64</div><div class='add'>+	select ARCH_USE_QUEUED_RWLOCKS</div><div class='add'>+	select ARCH_USE_QUEUED_SPINLOCKS</div><div class='add'>+	select ARCH_WANTS_DYNAMIC_TASK_STRUCT</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='del'>-	select HAVE_DMA_ATTRS</div><div class='del'>-	select HAVE_DMA_CONTIGUOUS</div><div class='del'>-	select HAVE_KRETPROBES</div><div class='add'>+	select ARCH_WANT_IPC_PARSE_VERSION	if X86_32</div><div class='add'>+	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='add'>+	select BUILDTIME_EXTABLE_SORT</div><div class='add'>+	select CLKEVT_I8253</div><div class='add'>+	select CLKSRC_I8253			if X86_32</div><div class='add'>+	select CLOCKSOURCE_VALIDATE_LAST_CYCLE</div><div class='add'>+	select CLOCKSOURCE_WATCHDOG</div><div class='add'>+	select CLONE_BACKWARDS			if X86_32</div><div class='add'>+	select COMPAT_OLD_SIGACTION		if IA32_EMULATION</div><div class='add'>+	select DCACHE_WORD_ACCESS</div><div class='add'>+	select EDAC_ATOMIC_SCRUB</div><div class='add'>+	select EDAC_SUPPORT</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_CLOCKEVENTS_BROADCAST	if X86_64 || (X86_32 &amp;&amp; X86_LOCAL_APIC)</div><div class='add'>+	select GENERIC_CLOCKEVENTS_MIN_ADJUST</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='add'>+	select GENERIC_CPU_AUTOPROBE</div><div class='ctx'> 	select GENERIC_EARLY_IOREMAP</div><div class='del'>-	select HAVE_OPTPROBES</div><div class='del'>-	select HAVE_KPROBES_ON_FTRACE</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='del'>-	select HAVE_FENTRY if X86_64</div><div class='add'>+	select GENERIC_FIND_FIRST_BIT</div><div class='add'>+	select GENERIC_IOMAP</div><div class='add'>+	select GENERIC_IRQ_PROBE</div><div class='add'>+	select GENERIC_IRQ_SHOW</div><div class='add'>+	select GENERIC_PENDING_IRQ		if SMP</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='add'>+	select GENERIC_TIME_VSYSCALL</div><div class='add'>+	select HAVE_ACPI_APEI			if ACPI</div><div class='add'>+	select HAVE_ACPI_APEI_NMI		if ACPI</div><div class='add'>+	select HAVE_ALIGNED_STRUCT_PAGE		if SLUB</div><div class='add'>+	select HAVE_AOUT			if X86_32</div><div class='add'>+	select HAVE_ARCH_AUDITSYSCALL</div><div class='add'>+	select HAVE_ARCH_HUGE_VMAP		if X86_64 || X86_PAE</div><div class='add'>+	select HAVE_ARCH_JUMP_LABEL</div><div class='add'>+	select HAVE_ARCH_KASAN			if X86_64 &amp;&amp; SPARSEMEM_VMEMMAP</div><div class='add'>+	select HAVE_ARCH_KGDB</div><div class='add'>+	select HAVE_ARCH_KMEMCHECK</div><div class='add'>+	select HAVE_ARCH_SECCOMP_FILTER</div><div class='add'>+	select HAVE_ARCH_SOFT_DIRTY		if X86_64</div><div class='add'>+	select HAVE_ARCH_TRACEHOOK</div><div class='add'>+	select HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='add'>+	select HAVE_BPF_JIT			if X86_64</div><div class='add'>+	select HAVE_CC_STACKPROTECTOR</div><div class='add'>+	select HAVE_CMPXCHG_DOUBLE</div><div class='add'>+	select HAVE_CMPXCHG_LOCAL</div><div class='add'>+	select HAVE_CONTEXT_TRACKING		if X86_64</div><div class='add'>+	select HAVE_COPY_THREAD_TLS</div><div class='ctx'> 	select HAVE_C_RECORDMCOUNT</div><div class='add'>+	select HAVE_DEBUG_KMEMLEAK</div><div class='add'>+	select HAVE_DEBUG_STACKOVERFLOW</div><div class='add'>+	select HAVE_DMA_API_DEBUG</div><div class='add'>+	select HAVE_DMA_ATTRS</div><div class='add'>+	select HAVE_DMA_CONTIGUOUS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS</div><div class='del'>-	select HAVE_FUNCTION_TRACER</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_FP_TEST</div><div class='del'>-	select HAVE_SYSCALL_TRACEPOINTS</div><div class='del'>-	select SYSCTL_EXCEPTION_TRACE</div><div class='del'>-	select HAVE_KVM</div><div class='del'>-	select HAVE_ARCH_KGDB</div><div class='del'>-	select HAVE_ARCH_TRACEHOOK</div><div class='del'>-	select HAVE_GENERIC_DMA_COHERENT if X86_32</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='del'>-	select USER_STACKTRACE_SUPPORT</div><div class='del'>-	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='del'>-	select HAVE_DMA_API_DEBUG</div><div class='del'>-	select HAVE_KERNEL_GZIP</div><div class='add'>+	select HAVE_FENTRY			if X86_64</div><div class='add'>+	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FP_TEST</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='add'>+	select HAVE_FUNCTION_TRACER</div><div class='add'>+	select HAVE_GENERIC_DMA_COHERENT	if X86_32</div><div class='add'>+	select HAVE_HW_BREAKPOINT</div><div class='add'>+	select HAVE_IDE</div><div class='add'>+	select HAVE_IOREMAP_PROT</div><div class='add'>+	select HAVE_IRQ_EXIT_ON_IRQ_STACK	if X86_64</div><div class='add'>+	select HAVE_IRQ_TIME_ACCOUNTING</div><div class='ctx'> 	select HAVE_KERNEL_BZIP2</div><div class='add'>+	select HAVE_KERNEL_GZIP</div><div class='add'>+	select HAVE_KERNEL_LZ4</div><div class='ctx'> 	select HAVE_KERNEL_LZMA</div><div class='del'>-	select HAVE_KERNEL_XZ</div><div class='ctx'> 	select HAVE_KERNEL_LZO</div><div class='del'>-	select HAVE_KERNEL_LZ4</div><div class='del'>-	select HAVE_HW_BREAKPOINT</div><div class='add'>+	select HAVE_KERNEL_XZ</div><div class='add'>+	select HAVE_KPROBES</div><div class='add'>+	select HAVE_KPROBES_ON_FTRACE</div><div class='add'>+	select HAVE_KRETPROBES</div><div class='add'>+	select HAVE_KVM</div><div class='add'>+	select HAVE_LIVEPATCH			if X86_64</div><div class='add'>+	select HAVE_MEMBLOCK</div><div class='add'>+	select HAVE_MEMBLOCK_NODE_MAP</div><div class='ctx'> 	select HAVE_MIXED_BREAKPOINTS_REGS</div><div class='del'>-	select PERF_EVENTS</div><div class='add'>+	select HAVE_OPROFILE</div><div class='add'>+	select HAVE_OPTPROBES</div><div class='add'>+	select HAVE_PCSPKR_PLATFORM</div><div class='add'>+	select HAVE_PERF_EVENTS</div><div class='ctx'> 	select HAVE_PERF_EVENTS_NMI</div><div class='ctx'> 	select HAVE_PERF_REGS</div><div class='ctx'> 	select HAVE_PERF_USER_STACK_DUMP</div><div class='del'>-	select HAVE_DEBUG_KMEMLEAK</div><div class='del'>-	select ANON_INODES</div><div class='del'>-	select HAVE_ALIGNED_STRUCT_PAGE if SLUB</div><div class='del'>-	select HAVE_CMPXCHG_LOCAL</div><div class='del'>-	select HAVE_CMPXCHG_DOUBLE</div><div class='del'>-	select HAVE_ARCH_KMEMCHECK</div><div class='del'>-	select HAVE_ARCH_KASAN if X86_64 &amp;&amp; SPARSEMEM_VMEMMAP</div><div class='add'>+	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='add'>+	select HAVE_SYSCALL_TRACEPOINTS</div><div class='add'>+	select HAVE_UID16			if X86_32</div><div class='add'>+	select HAVE_UNSTABLE_SCHED_CLOCK</div><div class='ctx'> 	select HAVE_USER_RETURN_NOTIFIER</div><div class='del'>-	select ARCH_HAS_ELF_RANDOMIZE</div><div class='del'>-	select HAVE_ARCH_JUMP_LABEL</div><div class='del'>-	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE</div><div class='del'>-	select SPARSE_IRQ</div><div class='del'>-	select GENERIC_FIND_FIRST_BIT</div><div class='del'>-	select GENERIC_IRQ_PROBE</div><div class='del'>-	select GENERIC_PENDING_IRQ if SMP</div><div class='del'>-	select GENERIC_IRQ_SHOW</div><div class='del'>-	select GENERIC_CLOCKEVENTS_MIN_ADJUST</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='del'>-	select HAVE_BPF_JIT if X86_64</div><div class='del'>-	select HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='del'>-	select HAVE_ARCH_HUGE_VMAP if X86_64 || (X86_32 &amp;&amp; X86_PAE)</div><div class='del'>-	select ARCH_HAS_SG_CHAIN</div><div class='del'>-	select CLKEVT_I8253</div><div class='del'>-	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='del'>-	select GENERIC_IOMAP</div><div class='del'>-	select DCACHE_WORD_ACCESS</div><div class='del'>-	select GENERIC_SMP_IDLE_THREAD</div><div class='del'>-	select ARCH_WANT_IPC_PARSE_VERSION if X86_32</div><div class='del'>-	select HAVE_ARCH_SECCOMP_FILTER</div><div class='del'>-	select BUILDTIME_EXTABLE_SORT</div><div class='del'>-	select GENERIC_CMOS_UPDATE</div><div class='del'>-	select HAVE_ARCH_SOFT_DIRTY if X86_64</div><div class='del'>-	select CLOCKSOURCE_WATCHDOG</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='del'>-	select ARCH_CLOCKSOURCE_DATA</div><div class='del'>-	select CLOCKSOURCE_VALIDATE_LAST_CYCLE</div><div class='del'>-	select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 &amp;&amp; X86_LOCAL_APIC)</div><div class='del'>-	select GENERIC_TIME_VSYSCALL</div><div class='del'>-	select GENERIC_STRNCPY_FROM_USER</div><div class='del'>-	select GENERIC_STRNLEN_USER</div><div class='del'>-	select HAVE_CONTEXT_TRACKING if X86_64</div><div class='del'>-	select HAVE_IRQ_TIME_ACCOUNTING</div><div class='del'>-	select VIRT_TO_BUS</div><div class='del'>-	select MODULES_USE_ELF_REL if X86_32</div><div class='del'>-	select MODULES_USE_ELF_RELA if X86_64</div><div class='del'>-	select CLONE_BACKWARDS if X86_32</div><div class='del'>-	select ARCH_USE_BUILTIN_BSWAP</div><div class='del'>-	select ARCH_USE_QUEUE_RWLOCK</div><div class='del'>-	select OLD_SIGSUSPEND3 if X86_32 || IA32_EMULATION</div><div class='del'>-	select OLD_SIGACTION if X86_32</div><div class='del'>-	select COMPAT_OLD_SIGACTION if IA32_EMULATION</div><div class='add'>+	select MODULES_USE_ELF_RELA		if X86_64</div><div class='add'>+	select MODULES_USE_ELF_REL		if X86_32</div><div class='add'>+	select OLD_SIGACTION			if X86_32</div><div class='add'>+	select OLD_SIGSUSPEND3			if X86_32 || IA32_EMULATION</div><div class='add'>+	select PERF_EVENTS</div><div class='ctx'> 	select RTC_LIB</div><div class='del'>-	select HAVE_DEBUG_STACKOVERFLOW</div><div class='del'>-	select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64</div><div class='del'>-	select HAVE_CC_STACKPROTECTOR</div><div class='del'>-	select GENERIC_CPU_AUTOPROBE</div><div class='del'>-	select HAVE_ARCH_AUDITSYSCALL</div><div class='del'>-	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='del'>-	select HAVE_ACPI_APEI if ACPI</div><div class='del'>-	select HAVE_ACPI_APEI_NMI if ACPI</div><div class='del'>-	select ACPI_LEGACY_TABLES_LOOKUP if ACPI</div><div class='del'>-	select X86_FEATURE_NAMES if PROC_FS</div><div class='add'>+	select SPARSE_IRQ</div><div class='ctx'> 	select SRCU</div><div class='add'>+	select SYSCTL_EXCEPTION_TRACE</div><div class='add'>+	select USER_STACKTRACE_SUPPORT</div><div class='add'>+	select VIRT_TO_BUS</div><div class='add'>+	select X86_DEV_DMA_OPS			if X86_64</div><div class='add'>+	select X86_FEATURE_NAMES		if PROC_FS</div><div class='ctx'> </div><div class='ctx'> config INSTRUCTION_DECODER</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -248,6 +255,11 @@ config ARCH_SUPPORTS_OPTIMIZED_INLINING</div><div class='ctx'> config ARCH_SUPPORTS_DEBUG_PAGEALLOC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config KASAN_SHADOW_OFFSET</div><div class='add'>+	hex</div><div class='add'>+	depends on KASAN</div><div class='add'>+	default 0xdffffc0000000000</div><div class='add'>+</div><div class='ctx'> config HAVE_INTEL_TXT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on INTEL_IOMMU &amp;&amp; ACPI</div><div class='hunk'>@@ -260,10 +272,6 @@ config X86_64_SMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_64 &amp;&amp; SMP</div><div class='ctx'> </div><div class='del'>-config X86_HT</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on SMP</div><div class='del'>-</div><div class='ctx'> config X86_32_LAZY_GS</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_32 &amp;&amp; !CC_STACKPROTECTOR</div><div class='hunk'>@@ -341,7 +349,7 @@ config X86_FEATURE_NAMES</div><div class='ctx'> </div><div class='ctx'> config X86_X2APIC</div><div class='ctx'> 	bool "Support x2apic"</div><div class='del'>-	depends on X86_LOCAL_APIC &amp;&amp; X86_64 &amp;&amp; IRQ_REMAP</div><div class='add'>+	depends on X86_LOCAL_APIC &amp;&amp; X86_64 &amp;&amp; (IRQ_REMAP || HYPERVISOR_GUEST)</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This enables x2apic support on CPUs that have this feature.</div><div class='ctx'> </div><div class='hunk'>@@ -441,6 +449,7 @@ config X86_UV</div><div class='ctx'> 	depends on X86_EXTENDED_PLATFORM</div><div class='ctx'> 	depends on NUMA</div><div class='ctx'> 	depends on X86_X2APIC</div><div class='add'>+	depends on PCI</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This option is needed in order to support SGI Ultraviolet systems.</div><div class='ctx'> 	  If you don't have one of these, you should say N here.</div><div class='hunk'>@@ -466,7 +475,6 @@ config X86_INTEL_CE</div><div class='ctx'> 	select X86_REBOOTFIXUPS</div><div class='ctx'> 	select OF</div><div class='ctx'> 	select OF_EARLY_FLATTREE</div><div class='del'>-	select IRQ_DOMAIN</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Select for the Intel CE media processor (CE4100) SOC.</div><div class='ctx'> 	  This option compiles in support for the CE4100 SOC for settop</div><div class='hunk'>@@ -666,7 +674,7 @@ config PARAVIRT_DEBUG</div><div class='ctx'> config PARAVIRT_SPINLOCKS</div><div class='ctx'> 	bool "Paravirtualization layer for spinlocks"</div><div class='ctx'> 	depends on PARAVIRT &amp;&amp; SMP</div><div class='del'>-	select UNINLINE_SPIN_UNLOCK</div><div class='add'>+	select UNINLINE_SPIN_UNLOCK if !QUEUED_SPINLOCKS</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Paravirtualized spinlocks allow a pvops backend to replace the</div><div class='ctx'> 	  spinlock implementation with something virtualization-friendly</div><div class='hunk'>@@ -851,11 +859,12 @@ config NR_CPUS</div><div class='ctx'> 	default "1" if !SMP</div><div class='ctx'> 	default "8192" if MAXSMP</div><div class='ctx'> 	default "32" if SMP &amp;&amp; X86_BIGSMP</div><div class='del'>-	default "8" if SMP</div><div class='add'>+	default "8" if SMP &amp;&amp; X86_32</div><div class='add'>+	default "64" if SMP</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This allows you to specify the maximum number of CPUs which this</div><div class='ctx'> 	  kernel will support.  If CPUMASK_OFFSTACK is enabled, the maximum</div><div class='del'>-	  supported value is 4096, otherwise the maximum value is 512.  The</div><div class='add'>+	  supported value is 8192, otherwise the maximum value is 512.  The</div><div class='ctx'> 	  minimum value which makes sense is 2.</div><div class='ctx'> </div><div class='ctx'> 	  This is purely to save memory - each supported CPU adds</div><div class='hunk'>@@ -863,7 +872,7 @@ config NR_CPUS</div><div class='ctx'> </div><div class='ctx'> config SCHED_SMT</div><div class='ctx'> 	bool "SMT (Hyperthreading) scheduler support"</div><div class='del'>-	depends on X86_HT</div><div class='add'>+	depends on SMP</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  SMT scheduler support improves the CPU scheduler's decision making</div><div class='ctx'> 	  when dealing with Intel Pentium 4 chips with HyperThreading at a</div><div class='hunk'>@@ -873,7 +882,7 @@ config SCHED_SMT</div><div class='ctx'> config SCHED_MC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	prompt "Multi-core scheduler support"</div><div class='del'>-	depends on X86_HT</div><div class='add'>+	depends on SMP</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='ctx'> 	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='hunk'>@@ -914,12 +923,12 @@ config X86_UP_IOAPIC</div><div class='ctx'> config X86_LOCAL_APIC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI</div><div class='del'>-	select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ</div><div class='add'>+	select IRQ_DOMAIN_HIERARCHY</div><div class='add'>+	select PCI_MSI_IRQ_DOMAIN if PCI_MSI</div><div class='ctx'> </div><div class='ctx'> config X86_IO_APIC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_LOCAL_APIC || X86_UP_IOAPIC</div><div class='del'>-	select IRQ_DOMAIN</div><div class='ctx'> </div><div class='ctx'> config X86_REROUTE_FOR_BROKEN_BOOT_IRQS</div><div class='ctx'> 	bool "Reroute for broken boot IRQs"</div><div class='hunk'>@@ -1055,24 +1064,19 @@ config TOSHIBA</div><div class='ctx'> 	  Say N otherwise.</div><div class='ctx'> </div><div class='ctx'> config I8K</div><div class='del'>-	tristate "Dell laptop support"</div><div class='add'>+	tristate "Dell i8k legacy laptop support"</div><div class='ctx'> 	select HWMON</div><div class='add'>+	select SENSORS_DELL_SMM</div><div class='ctx'> 	---help---</div><div class='del'>-	  This adds a driver to safely access the System Management Mode</div><div class='del'>-	  of the CPU on the Dell Inspiron 8000. The System Management Mode</div><div class='del'>-	  is used to read cpu temperature and cooling fan status and to</div><div class='del'>-	  control the fans on the I8K portables.</div><div class='del'>-</div><div class='del'>-	  This driver has been tested only on the Inspiron 8000 but it may</div><div class='del'>-	  also work with other Dell laptops. You can force loading on other</div><div class='del'>-	  models by passing the parameter `force=1' to the module. Use at</div><div class='del'>-	  your own risk.</div><div class='del'>-</div><div class='del'>-	  For information on utilities to make use of this driver see the</div><div class='del'>-	  I8K Linux utilities web site at:</div><div class='del'>-	  &lt;http://people.debian.org/~dz/i8k/&gt;</div><div class='add'>+	  This option enables legacy /proc/i8k userspace interface in hwmon</div><div class='add'>+	  dell-smm-hwmon driver. Character file /proc/i8k reports bios version,</div><div class='add'>+	  temperature and allows controlling fan speeds of Dell laptops via</div><div class='add'>+	  System Management Mode. For old Dell laptops (like Dell Inspiron 8000)</div><div class='add'>+	  it reports also power and hotkey status. For fan speed control is</div><div class='add'>+	  needed userspace package i8kutils.</div><div class='ctx'> </div><div class='del'>-	  Say Y if you intend to run this kernel on a Dell Inspiron 8000.</div><div class='add'>+	  Say Y if you intend to run this kernel on old Dell laptops or want to</div><div class='add'>+	  use userspace package i8kutils.</div><div class='ctx'> 	  Say N otherwise.</div><div class='ctx'> </div><div class='ctx'> config X86_REBOOTFIXUPS</div><div class='hunk'>@@ -1424,6 +1428,9 @@ source "mm/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config X86_PMEM_LEGACY</div><div class='ctx'> 	bool "Support non-standard NVDIMMs and ADR protected memory"</div><div class='add'>+	depends on PHYS_ADDR_T_64BIT</div><div class='add'>+	depends on BLK_DEV</div><div class='add'>+	select LIBNVDIMM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Treat memory marked using the non-standard e820 type of 12 as used</div><div class='ctx'> 	  by the Intel Sandy Bridge-EP reference BIOS as protected memory.</div><div class='hunk'>@@ -2014,7 +2021,7 @@ config CMDLINE_BOOL</div><div class='ctx'> </div><div class='ctx'> 	  To compile command line arguments into the kernel,</div><div class='ctx'> 	  set this option to 'Y', then fill in the</div><div class='del'>-	  the boot arguments in CONFIG_CMDLINE.</div><div class='add'>+	  boot arguments in CONFIG_CMDLINE.</div><div class='ctx'> </div><div class='ctx'> 	  Systems with fully functional boot loaders (i.e. non-embedded)</div><div class='ctx'> 	  should leave this option set to 'N'.</div><div class='head'>diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug<br/>index 72484a645f05..d8c0d3266173 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Kconfig.debug?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Kconfig.debug?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Kconfig.debug</a></div><div class='hunk'>@@ -297,6 +297,18 @@ config OPTIMIZE_INLINING</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config DEBUG_ENTRY</div><div class='add'>+	bool "Debug low-level entry code"</div><div class='add'>+	depends on DEBUG_KERNEL</div><div class='add'>+	---help---</div><div class='add'>+	  This option enables sanity checks in x86's low-level entry code.</div><div class='add'>+	  Some of these sanity checks may slow down kernel entries and</div><div class='add'>+	  exits or otherwise impact performance.</div><div class='add'>+</div><div class='add'>+	  This is currently used to help test NMI code.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config DEBUG_NMI_SELFTEST</div><div class='ctx'> 	bool "NMI Selftest"</div><div class='ctx'> 	depends on DEBUG_KERNEL &amp;&amp; X86_LOCAL_APIC</div><div class='hunk'>@@ -332,4 +344,27 @@ config X86_DEBUG_STATIC_CPU_HAS</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config X86_DEBUG_FPU</div><div class='add'>+	bool "Debug the x86 FPU code"</div><div class='add'>+	depends on DEBUG_KERNEL</div><div class='add'>+	default y</div><div class='add'>+	---help---</div><div class='add'>+	  If this option is enabled then there will be extra sanity</div><div class='add'>+	  checks and (boot time) debug printouts added to the kernel.</div><div class='add'>+	  This debugging adds some small amount of runtime overhead</div><div class='add'>+	  to the kernel.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config PUNIT_ATOM_DEBUG</div><div class='add'>+	tristate "ATOM Punit debug driver"</div><div class='add'>+	select DEBUG_FS</div><div class='add'>+	select IOSF_MBI</div><div class='add'>+	---help---</div><div class='add'>+	  This is a debug driver, which gets the power states</div><div class='add'>+	  of all Punit North Complex devices. The power states of</div><div class='add'>+	  each device is exposed as part of the debugfs interface.</div><div class='add'>+	  The current power state can be read from</div><div class='add'>+	  /sys/kernel/debug/punit_atom/dev_power_state</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/x86/Makefile b/arch/x86/Makefile<br/>index 2fda005bb334..118e6debc483 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/Makefile</a></div><div class='hunk'>@@ -77,6 +77,12 @@ else</div><div class='ctx'>         KBUILD_AFLAGS += -m64</div><div class='ctx'>         KBUILD_CFLAGS += -m64</div><div class='ctx'> </div><div class='add'>+        # Align jump targets to 1 byte, not the default 16 bytes:</div><div class='add'>+        KBUILD_CFLAGS += -falign-jumps=1</div><div class='add'>+</div><div class='add'>+        # Pack loops tightly as well:</div><div class='add'>+        KBUILD_CFLAGS += -falign-loops=1</div><div class='add'>+</div><div class='ctx'>         # Don't autogenerate traditional x87 instructions</div><div class='ctx'>         KBUILD_CFLAGS += $(call cc-option,-mno-80387)</div><div class='ctx'>         KBUILD_CFLAGS += $(call cc-option,-mno-fp-ret-in-387)</div><div class='hunk'>@@ -84,6 +90,9 @@ else</div><div class='ctx'> 	# Use -mpreferred-stack-boundary=3 if supported.</div><div class='ctx'> 	KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)</div><div class='ctx'> </div><div class='add'>+	# Use -mskip-rax-setup if supported.</div><div class='add'>+	KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)</div><div class='add'>+</div><div class='ctx'>         # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)</div><div class='ctx'>         cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)</div><div class='ctx'>         cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)</div><div class='hunk'>@@ -140,12 +149,6 @@ endif</div><div class='ctx'> sp-$(CONFIG_X86_32) := esp</div><div class='ctx'> sp-$(CONFIG_X86_64) := rsp</div><div class='ctx'> </div><div class='del'>-# do binutils support CFI?</div><div class='del'>-cfi := $(call as-instr,.cfi_startproc\n.cfi_rel_offset $(sp-y)$(comma)0\n.cfi_endproc,-DCONFIG_AS_CFI=1)</div><div class='del'>-# is .cfi_signal_frame supported too?</div><div class='del'>-cfi-sigframe := $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1)</div><div class='del'>-cfi-sections := $(call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTIONS=1)</div><div class='del'>-</div><div class='ctx'> # does binutils support specific instructions?</div><div class='ctx'> asinstr := $(call as-instr,fxsaveq (%rax),-DCONFIG_AS_FXSAVEQ=1)</div><div class='ctx'> asinstr += $(call as-instr,pshufb %xmm0$(comma)%xmm0,-DCONFIG_AS_SSSE3=1)</div><div class='hunk'>@@ -153,8 +156,8 @@ asinstr += $(call as-instr,crc32l %eax$(comma)%eax,-DCONFIG_AS_CRC32=1)</div><div class='ctx'> avx_instr := $(call as-instr,vxorps %ymm0$(comma)%ymm1$(comma)%ymm2,-DCONFIG_AS_AVX=1)</div><div class='ctx'> avx2_instr :=$(call as-instr,vpbroadcastb %xmm0$(comma)%ymm1,-DCONFIG_AS_AVX2=1)</div><div class='ctx'> </div><div class='del'>-KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr)</div><div class='del'>-KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr)</div><div class='add'>+KBUILD_AFLAGS += $(asinstr) $(avx_instr) $(avx2_instr)</div><div class='add'>+KBUILD_CFLAGS += $(asinstr) $(avx_instr) $(avx2_instr)</div><div class='ctx'> </div><div class='ctx'> LDFLAGS := -m elf_$(UTS_MACHINE)</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +181,7 @@ archscripts: scripts_basic</div><div class='ctx'> # Syscall table generation</div><div class='ctx'> </div><div class='ctx'> archheaders:</div><div class='del'>-	$(Q)$(MAKE) $(build)=arch/x86/syscalls all</div><div class='add'>+	$(Q)$(MAKE) $(build)=arch/x86/entry/syscalls all</div><div class='ctx'> </div><div class='ctx'> archprepare:</div><div class='ctx'> ifeq ($(CONFIG_KEXEC_FILE),y)</div><div class='hunk'>@@ -241,7 +244,7 @@ install:</div><div class='ctx'> </div><div class='ctx'> PHONY += vdso_install</div><div class='ctx'> vdso_install:</div><div class='del'>-	$(Q)$(MAKE) $(build)=arch/x86/vdso $@</div><div class='add'>+	$(Q)$(MAKE) $(build)=arch/x86/entry/vdso $@</div><div class='ctx'> </div><div class='ctx'> archclean:</div><div class='ctx'> 	$(Q)rm -rf $(objtree)/arch/i386</div><div class='head'>diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c<br/>index 48304b89b601..2c82bd150d43 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/boot/compressed/eboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/boot/compressed/eboot.c</a></div><div class='hunk'>@@ -1224,6 +1224,10 @@ static efi_status_t setup_e820(struct boot_params *params,</div><div class='ctx'> 			e820_type = E820_NVS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case EFI_PERSISTENT_MEMORY:</div><div class='add'>+			e820_type = E820_PMEM;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/x86/configs/xen.config b/arch/x86/configs/xen.config<br/>new file mode 100644<br/>index 000000000000..d9fc7139fd46<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/configs/xen.config?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/configs/xen.config</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+# global x86 required specific stuff</div><div class='add'>+# On 32-bit HIGHMEM4G is not allowed</div><div class='add'>+CONFIG_HIGHMEM64G=y</div><div class='add'>+CONFIG_64BIT=y</div><div class='add'>+</div><div class='add'>+# These enable us to allow some of the</div><div class='add'>+# not so generic stuff below</div><div class='add'>+CONFIG_HYPERVISOR_GUEST=y</div><div class='add'>+CONFIG_PCI=y</div><div class='add'>+CONFIG_PCI_MSI=y</div><div class='add'>+CONFIG_X86_MCE=y</div><div class='add'>+CONFIG_ACPI_PROCESSOR=y</div><div class='add'>+CONFIG_CPU_FREQ=y</div><div class='add'>+</div><div class='add'>+# x86 xen specific config options</div><div class='add'>+CONFIG_XEN_PVH=y</div><div class='add'>+CONFIG_XEN_MAX_DOMAIN_MEMORY=500</div><div class='add'>+CONFIG_XEN_SAVE_RESTORE=y</div><div class='add'>+# CONFIG_XEN_DEBUG_FS is not set</div><div class='add'>+CONFIG_XEN_MCE_LOG=y</div><div class='add'>+CONFIG_XEN_ACPI_PROCESSOR=m</div><div class='add'>+# x86 specific backend drivers</div><div class='add'>+CONFIG_XEN_PCIDEV_BACKEND=m</div><div class='add'>+# x86 specific frontend drivers</div><div class='add'>+CONFIG_XEN_PCIDEV_FRONTEND=m</div><div class='add'>+# depends on MEMORY_HOTPLUG, arm64 doesn't enable this yet,</div><div class='add'>+# move to generic config if it ever does.</div><div class='add'>+CONFIG_XEN_BALLOON_MEMORY_HOTPLUG=y</div><div class='head'>diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c<br/>index 112cefacf2af..dccad38b59a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/aesni-intel_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/aesni-intel_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/aesni-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/aesni-intel_glue.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/ablk_helper.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='hunk'>@@ -44,15 +44,19 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#define AESNI_ALIGN	16</div><div class='add'>+#define AES_BLOCK_MASK	(~(AES_BLOCK_SIZE - 1))</div><div class='add'>+#define RFC4106_HASH_SUBKEY_SIZE 16</div><div class='add'>+</div><div class='ctx'> /* This data is stored at the end of the crypto_tfm struct.</div><div class='ctx'>  * It's a type of per "session" data storage location.</div><div class='ctx'>  * This needs to be 16 byte aligned.</div><div class='ctx'>  */</div><div class='ctx'> struct aesni_rfc4106_gcm_ctx {</div><div class='del'>-	u8 hash_subkey[16];</div><div class='del'>-	struct crypto_aes_ctx aes_key_expanded;</div><div class='add'>+	u8 hash_subkey[16] __attribute__ ((__aligned__(AESNI_ALIGN)));</div><div class='add'>+	struct crypto_aes_ctx aes_key_expanded</div><div class='add'>+		__attribute__ ((__aligned__(AESNI_ALIGN)));</div><div class='ctx'> 	u8 nonce[4];</div><div class='del'>-	struct cryptd_aead *cryptd_tfm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct aesni_gcm_set_hash_subkey_result {</div><div class='hunk'>@@ -66,10 +70,6 @@ struct aesni_hash_subkey_req_data {</div><div class='ctx'> 	struct scatterlist sg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define AESNI_ALIGN	(16)</div><div class='del'>-#define AES_BLOCK_MASK	(~(AES_BLOCK_SIZE-1))</div><div class='del'>-#define RFC4106_HASH_SUBKEY_SIZE 16</div><div class='del'>-</div><div class='ctx'> struct aesni_lrw_ctx {</div><div class='ctx'> 	struct lrw_table_ctx lrw_table;</div><div class='ctx'> 	u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];</div><div class='hunk'>@@ -283,10 +283,11 @@ static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,</div><div class='ctx'> static inline struct</div><div class='ctx'> aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	return</div><div class='del'>-		(struct aesni_rfc4106_gcm_ctx *)</div><div class='del'>-		PTR_ALIGN((u8 *)</div><div class='del'>-		crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);</div><div class='add'>+	unsigned long align = AESNI_ALIGN;</div><div class='add'>+</div><div class='add'>+	if (align &lt;= crypto_tfm_ctx_alignment())</div><div class='add'>+		align = 1;</div><div class='add'>+	return PTR_ALIGN(crypto_aead_ctx(tfm), align);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -790,36 +791,30 @@ static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-static int rfc4106_init(struct crypto_tfm *tfm)</div><div class='add'>+static int rfc4106_init(struct crypto_aead *aead)</div><div class='ctx'> {</div><div class='ctx'> 	struct cryptd_aead *cryptd_tfm;</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)</div><div class='del'>-		PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);</div><div class='del'>-	struct crypto_aead *cryptd_child;</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *child_ctx;</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(aead);</div><div class='add'>+</div><div class='ctx'> 	cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni",</div><div class='ctx'> 				       CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 				       CRYPTO_ALG_INTERNAL);</div><div class='ctx'> 	if (IS_ERR(cryptd_tfm))</div><div class='ctx'> 		return PTR_ERR(cryptd_tfm);</div><div class='ctx'> </div><div class='del'>-	cryptd_child = cryptd_aead_child(cryptd_tfm);</div><div class='del'>-	child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);</div><div class='del'>-	memcpy(child_ctx, ctx, sizeof(*ctx));</div><div class='del'>-	ctx-&gt;cryptd_tfm = cryptd_tfm;</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct aead_request)</div><div class='del'>-		+ crypto_aead_reqsize(&amp;cryptd_tfm-&gt;base);</div><div class='add'>+	*ctx = cryptd_tfm;</div><div class='add'>+	crypto_aead_set_reqsize(</div><div class='add'>+		aead,</div><div class='add'>+		sizeof(struct aead_request) +</div><div class='add'>+		crypto_aead_reqsize(&amp;cryptd_tfm-&gt;base));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rfc4106_exit(struct crypto_tfm *tfm)</div><div class='add'>+static void rfc4106_exit(struct crypto_aead *aead)</div><div class='ctx'> {</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx =</div><div class='del'>-		(struct aesni_rfc4106_gcm_ctx *)</div><div class='del'>-		PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);</div><div class='del'>-	if (!IS_ERR(ctx-&gt;cryptd_tfm))</div><div class='del'>-		cryptd_free_aead(ctx-&gt;cryptd_tfm);</div><div class='del'>-	return;</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(aead);</div><div class='add'>+</div><div class='add'>+	cryptd_free_aead(*ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -845,8 +840,6 @@ rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)</div><div class='ctx'> 	if (IS_ERR(ctr_tfm))</div><div class='ctx'> 		return PTR_ERR(ctr_tfm);</div><div class='ctx'> </div><div class='del'>-	crypto_ablkcipher_clear_flags(ctr_tfm, ~0);</div><div class='del'>-</div><div class='ctx'> 	ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_free_ablkcipher;</div><div class='hunk'>@@ -895,73 +888,29 @@ out_free_ablkcipher:</div><div class='ctx'> static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> 				  unsigned int key_len)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct crypto_tfm *tfm = crypto_aead_tfm(aead);</div><div class='ctx'> 	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(aead);</div><div class='del'>-	u8 *new_key_align, *new_key_mem = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (key_len &lt; 4) {</div><div class='del'>-		crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);</div><div class='add'>+		crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*Account for 4 byte nonce at the end.*/</div><div class='ctx'> 	key_len -= 4;</div><div class='del'>-	if (key_len != AES_KEYSIZE_128 &amp;&amp; key_len != AES_KEYSIZE_192 &amp;&amp;</div><div class='del'>-	    key_len != AES_KEYSIZE_256) {</div><div class='del'>-		crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(ctx-&gt;nonce, key + key_len, sizeof(ctx-&gt;nonce));</div><div class='del'>-	/*This must be on a 16 byte boundary!*/</div><div class='del'>-	if ((unsigned long)(&amp;(ctx-&gt;aes_key_expanded.key_enc[0])) % AESNI_ALIGN)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if ((unsigned long)key % AESNI_ALIGN) {</div><div class='del'>-		/*key is not aligned: use an auxuliar aligned pointer*/</div><div class='del'>-		new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);</div><div class='del'>-		if (!new_key_mem)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);</div><div class='del'>-		memcpy(new_key_align, key, key_len);</div><div class='del'>-		key = new_key_align;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!irq_fpu_usable())</div><div class='del'>-		ret = crypto_aes_expand_key(&amp;(ctx-&gt;aes_key_expanded),</div><div class='del'>-		key, key_len);</div><div class='del'>-	else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		ret = aesni_set_key(&amp;(ctx-&gt;aes_key_expanded), key, key_len);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-	/*This must be on a 16 byte boundary!*/</div><div class='del'>-	if ((unsigned long)(&amp;(ctx-&gt;hash_subkey[0])) % AESNI_ALIGN) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	ret = rfc4106_set_hash_subkey(ctx-&gt;hash_subkey, key, key_len);</div><div class='del'>-exit:</div><div class='del'>-	kfree(new_key_mem);</div><div class='del'>-	return ret;</div><div class='add'>+	return aes_set_key_common(crypto_aead_tfm(aead),</div><div class='add'>+				  &amp;ctx-&gt;aes_key_expanded, key, key_len) ?:</div><div class='add'>+	       rfc4106_set_hash_subkey(ctx-&gt;hash_subkey, key, key_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,</div><div class='ctx'> 			   unsigned int key_len)</div><div class='ctx'> {</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);</div><div class='del'>-	struct crypto_aead *child = cryptd_aead_child(ctx-&gt;cryptd_tfm);</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *c_ctx = aesni_rfc4106_gcm_ctx_get(child);</div><div class='del'>-	struct cryptd_aead *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-	int ret;</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(parent);</div><div class='add'>+	struct cryptd_aead *cryptd_tfm = *ctx;</div><div class='ctx'> </div><div class='del'>-	ret = crypto_aead_setkey(child, key, key_len);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		memcpy(ctx, c_ctx, sizeof(*ctx));</div><div class='del'>-		ctx-&gt;cryptd_tfm = cryptd_tfm;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return crypto_aead_setkey(&amp;cryptd_tfm-&gt;base, key, key_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int common_rfc4106_set_authsize(struct crypto_aead *aead,</div><div class='hunk'>@@ -975,7 +924,7 @@ static int common_rfc4106_set_authsize(struct crypto_aead *aead,</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	crypto_aead_crt(aead)-&gt;authsize = authsize;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -984,30 +933,23 @@ static int common_rfc4106_set_authsize(struct crypto_aead *aead,</div><div class='ctx'> static int rfc4106_set_authsize(struct crypto_aead *parent,</div><div class='ctx'> 				unsigned int authsize)</div><div class='ctx'> {</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);</div><div class='del'>-	struct crypto_aead *child = cryptd_aead_child(ctx-&gt;cryptd_tfm);</div><div class='del'>-	int ret;</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(parent);</div><div class='add'>+	struct cryptd_aead *cryptd_tfm = *ctx;</div><div class='ctx'> </div><div class='del'>-	ret = crypto_aead_setauthsize(child, authsize);</div><div class='del'>-	if (!ret)</div><div class='del'>-		crypto_aead_crt(parent)-&gt;authsize = authsize;</div><div class='del'>-	return ret;</div><div class='add'>+	return crypto_aead_setauthsize(&amp;cryptd_tfm-&gt;base, authsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __driver_rfc4106_encrypt(struct aead_request *req)</div><div class='add'>+static int helper_rfc4106_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	u8 one_entry_in_sg = 0;</div><div class='ctx'> 	u8 *src, *dst, *assoc;</div><div class='ctx'> 	__be32 counter = cpu_to_be32(1);</div><div class='ctx'> 	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='ctx'> 	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);</div><div class='del'>-	u32 key_len = ctx-&gt;aes_key_expanded.key_length;</div><div class='ctx'> 	void *aes_ctx = &amp;(ctx-&gt;aes_key_expanded);</div><div class='ctx'> 	unsigned long auth_tag_len = crypto_aead_authsize(tfm);</div><div class='del'>-	u8 iv_tab[16+AESNI_ALIGN];</div><div class='del'>-	u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);</div><div class='add'>+	u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));</div><div class='ctx'> 	struct scatter_walk src_sg_walk;</div><div class='del'>-	struct scatter_walk assoc_sg_walk;</div><div class='ctx'> 	struct scatter_walk dst_sg_walk;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1016,12 +958,6 @@ static int __driver_rfc4106_encrypt(struct aead_request *req)</div><div class='ctx'> 	/* to 8 or 12 bytes */</div><div class='ctx'> 	if (unlikely(req-&gt;assoclen != 8 &amp;&amp; req-&gt;assoclen != 12))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (unlikely(auth_tag_len != 8 &amp;&amp; auth_tag_len != 12 &amp;&amp; auth_tag_len != 16))</div><div class='del'>-	        return -EINVAL;</div><div class='del'>-	if (unlikely(key_len != AES_KEYSIZE_128 &amp;&amp;</div><div class='del'>-	             key_len != AES_KEYSIZE_192 &amp;&amp;</div><div class='del'>-	             key_len != AES_KEYSIZE_256))</div><div class='del'>-	        return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* IV below built */</div><div class='ctx'> 	for (i = 0; i &lt; 4; i++)</div><div class='hunk'>@@ -1030,55 +966,57 @@ static int __driver_rfc4106_encrypt(struct aead_request *req)</div><div class='ctx'> 		*(iv+4+i) = req-&gt;iv[i];</div><div class='ctx'> 	*((__be32 *)(iv+12)) = counter;</div><div class='ctx'> </div><div class='del'>-	if ((sg_is_last(req-&gt;src)) &amp;&amp; (sg_is_last(req-&gt;assoc))) {</div><div class='add'>+	if (sg_is_last(req-&gt;src) &amp;&amp;</div><div class='add'>+	    req-&gt;src-&gt;offset + req-&gt;src-&gt;length &lt;= PAGE_SIZE &amp;&amp;</div><div class='add'>+	    sg_is_last(req-&gt;dst) &amp;&amp;</div><div class='add'>+	    req-&gt;dst-&gt;offset + req-&gt;dst-&gt;length &lt;= PAGE_SIZE) {</div><div class='ctx'> 		one_entry_in_sg = 1;</div><div class='ctx'> 		scatterwalk_start(&amp;src_sg_walk, req-&gt;src);</div><div class='del'>-		scatterwalk_start(&amp;assoc_sg_walk, req-&gt;assoc);</div><div class='del'>-		src = scatterwalk_map(&amp;src_sg_walk);</div><div class='del'>-		assoc = scatterwalk_map(&amp;assoc_sg_walk);</div><div class='add'>+		assoc = scatterwalk_map(&amp;src_sg_walk);</div><div class='add'>+		src = assoc + req-&gt;assoclen;</div><div class='ctx'> 		dst = src;</div><div class='ctx'> 		if (unlikely(req-&gt;src != req-&gt;dst)) {</div><div class='ctx'> 			scatterwalk_start(&amp;dst_sg_walk, req-&gt;dst);</div><div class='del'>-			dst = scatterwalk_map(&amp;dst_sg_walk);</div><div class='add'>+			dst = scatterwalk_map(&amp;dst_sg_walk) + req-&gt;assoclen;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Allocate memory for src, dst, assoc */</div><div class='del'>-		src = kmalloc(req-&gt;cryptlen + auth_tag_len + req-&gt;assoclen,</div><div class='add'>+		assoc = kmalloc(req-&gt;cryptlen + auth_tag_len + req-&gt;assoclen,</div><div class='ctx'> 			GFP_ATOMIC);</div><div class='del'>-		if (unlikely(!src))</div><div class='add'>+		if (unlikely(!assoc))</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		assoc = (src + req-&gt;cryptlen + auth_tag_len);</div><div class='del'>-		scatterwalk_map_and_copy(src, req-&gt;src, 0, req-&gt;cryptlen, 0);</div><div class='del'>-		scatterwalk_map_and_copy(assoc, req-&gt;assoc, 0,</div><div class='del'>-					req-&gt;assoclen, 0);</div><div class='add'>+		scatterwalk_map_and_copy(assoc, req-&gt;src, 0,</div><div class='add'>+					 req-&gt;assoclen + req-&gt;cryptlen, 0);</div><div class='add'>+		src = assoc + req-&gt;assoclen;</div><div class='ctx'> 		dst = src;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kernel_fpu_begin();</div><div class='ctx'> 	aesni_gcm_enc_tfm(aes_ctx, dst, src, (unsigned long)req-&gt;cryptlen, iv,</div><div class='ctx'> 		ctx-&gt;hash_subkey, assoc, (unsigned long)req-&gt;assoclen, dst</div><div class='ctx'> 		+ ((unsigned long)req-&gt;cryptlen), auth_tag_len);</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> </div><div class='ctx'> 	/* The authTag (aka the Integrity Check Value) needs to be written</div><div class='ctx'> 	 * back to the packet. */</div><div class='ctx'> 	if (one_entry_in_sg) {</div><div class='ctx'> 		if (unlikely(req-&gt;src != req-&gt;dst)) {</div><div class='del'>-			scatterwalk_unmap(dst);</div><div class='del'>-			scatterwalk_done(&amp;dst_sg_walk, 0, 0);</div><div class='add'>+			scatterwalk_unmap(dst - req-&gt;assoclen);</div><div class='add'>+			scatterwalk_advance(&amp;dst_sg_walk, req-&gt;dst-&gt;length);</div><div class='add'>+			scatterwalk_done(&amp;dst_sg_walk, 1, 0);</div><div class='ctx'> 		}</div><div class='del'>-		scatterwalk_unmap(src);</div><div class='ctx'> 		scatterwalk_unmap(assoc);</div><div class='del'>-		scatterwalk_done(&amp;src_sg_walk, 0, 0);</div><div class='del'>-		scatterwalk_done(&amp;assoc_sg_walk, 0, 0);</div><div class='add'>+		scatterwalk_advance(&amp;src_sg_walk, req-&gt;src-&gt;length);</div><div class='add'>+		scatterwalk_done(&amp;src_sg_walk, req-&gt;src == req-&gt;dst, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		scatterwalk_map_and_copy(dst, req-&gt;dst, 0,</div><div class='del'>-			req-&gt;cryptlen + auth_tag_len, 1);</div><div class='del'>-		kfree(src);</div><div class='add'>+		scatterwalk_map_and_copy(dst, req-&gt;dst, req-&gt;assoclen,</div><div class='add'>+					 req-&gt;cryptlen + auth_tag_len, 1);</div><div class='add'>+		kfree(assoc);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __driver_rfc4106_decrypt(struct aead_request *req)</div><div class='add'>+static int helper_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	u8 one_entry_in_sg = 0;</div><div class='ctx'> 	u8 *src, *dst, *assoc;</div><div class='hunk'>@@ -1087,26 +1025,16 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> 	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='ctx'> 	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);</div><div class='del'>-	u32 key_len = ctx-&gt;aes_key_expanded.key_length;</div><div class='ctx'> 	void *aes_ctx = &amp;(ctx-&gt;aes_key_expanded);</div><div class='ctx'> 	unsigned long auth_tag_len = crypto_aead_authsize(tfm);</div><div class='del'>-	u8 iv_and_authTag[32+AESNI_ALIGN];</div><div class='del'>-	u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);</div><div class='del'>-	u8 *authTag = iv + 16;</div><div class='add'>+	u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));</div><div class='add'>+	u8 authTag[16];</div><div class='ctx'> 	struct scatter_walk src_sg_walk;</div><div class='del'>-	struct scatter_walk assoc_sg_walk;</div><div class='ctx'> 	struct scatter_walk dst_sg_walk;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	if (unlikely((req-&gt;cryptlen &lt; auth_tag_len) ||</div><div class='del'>-		(req-&gt;assoclen != 8 &amp;&amp; req-&gt;assoclen != 12)))</div><div class='add'>+	if (unlikely(req-&gt;assoclen != 8 &amp;&amp; req-&gt;assoclen != 12))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (unlikely(auth_tag_len != 8 &amp;&amp; auth_tag_len != 12 &amp;&amp; auth_tag_len != 16))</div><div class='del'>-	        return -EINVAL;</div><div class='del'>-	if (unlikely(key_len != AES_KEYSIZE_128 &amp;&amp;</div><div class='del'>-	             key_len != AES_KEYSIZE_192 &amp;&amp;</div><div class='del'>-	             key_len != AES_KEYSIZE_256))</div><div class='del'>-	        return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Assuming we are supporting rfc4106 64-bit extended */</div><div class='ctx'> 	/* sequence numbers We need to have the AAD length */</div><div class='hunk'>@@ -1120,33 +1048,36 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> 		*(iv+4+i) = req-&gt;iv[i];</div><div class='ctx'> 	*((__be32 *)(iv+12)) = counter;</div><div class='ctx'> </div><div class='del'>-	if ((sg_is_last(req-&gt;src)) &amp;&amp; (sg_is_last(req-&gt;assoc))) {</div><div class='add'>+	if (sg_is_last(req-&gt;src) &amp;&amp;</div><div class='add'>+	    req-&gt;src-&gt;offset + req-&gt;src-&gt;length &lt;= PAGE_SIZE &amp;&amp;</div><div class='add'>+	    sg_is_last(req-&gt;dst) &amp;&amp;</div><div class='add'>+	    req-&gt;dst-&gt;offset + req-&gt;dst-&gt;length &lt;= PAGE_SIZE) {</div><div class='ctx'> 		one_entry_in_sg = 1;</div><div class='ctx'> 		scatterwalk_start(&amp;src_sg_walk, req-&gt;src);</div><div class='del'>-		scatterwalk_start(&amp;assoc_sg_walk, req-&gt;assoc);</div><div class='del'>-		src = scatterwalk_map(&amp;src_sg_walk);</div><div class='del'>-		assoc = scatterwalk_map(&amp;assoc_sg_walk);</div><div class='add'>+		assoc = scatterwalk_map(&amp;src_sg_walk);</div><div class='add'>+		src = assoc + req-&gt;assoclen;</div><div class='ctx'> 		dst = src;</div><div class='ctx'> 		if (unlikely(req-&gt;src != req-&gt;dst)) {</div><div class='ctx'> 			scatterwalk_start(&amp;dst_sg_walk, req-&gt;dst);</div><div class='del'>-			dst = scatterwalk_map(&amp;dst_sg_walk);</div><div class='add'>+			dst = scatterwalk_map(&amp;dst_sg_walk) + req-&gt;assoclen;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Allocate memory for src, dst, assoc */</div><div class='del'>-		src = kmalloc(req-&gt;cryptlen + req-&gt;assoclen, GFP_ATOMIC);</div><div class='del'>-		if (!src)</div><div class='add'>+		assoc = kmalloc(req-&gt;cryptlen + req-&gt;assoclen, GFP_ATOMIC);</div><div class='add'>+		if (!assoc)</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		assoc = (src + req-&gt;cryptlen);</div><div class='del'>-		scatterwalk_map_and_copy(src, req-&gt;src, 0, req-&gt;cryptlen, 0);</div><div class='del'>-		scatterwalk_map_and_copy(assoc, req-&gt;assoc, 0,</div><div class='del'>-			req-&gt;assoclen, 0);</div><div class='add'>+		scatterwalk_map_and_copy(assoc, req-&gt;src, 0,</div><div class='add'>+					 req-&gt;assoclen + req-&gt;cryptlen, 0);</div><div class='add'>+		src = assoc + req-&gt;assoclen;</div><div class='ctx'> 		dst = src;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kernel_fpu_begin();</div><div class='ctx'> 	aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,</div><div class='ctx'> 		ctx-&gt;hash_subkey, assoc, (unsigned long)req-&gt;assoclen,</div><div class='ctx'> 		authTag, auth_tag_len);</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> </div><div class='ctx'> 	/* Compare generated tag with passed in tag. */</div><div class='ctx'> 	retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?</div><div class='hunk'>@@ -1154,90 +1085,59 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> </div><div class='ctx'> 	if (one_entry_in_sg) {</div><div class='ctx'> 		if (unlikely(req-&gt;src != req-&gt;dst)) {</div><div class='del'>-			scatterwalk_unmap(dst);</div><div class='del'>-			scatterwalk_done(&amp;dst_sg_walk, 0, 0);</div><div class='add'>+			scatterwalk_unmap(dst - req-&gt;assoclen);</div><div class='add'>+			scatterwalk_advance(&amp;dst_sg_walk, req-&gt;dst-&gt;length);</div><div class='add'>+			scatterwalk_done(&amp;dst_sg_walk, 1, 0);</div><div class='ctx'> 		}</div><div class='del'>-		scatterwalk_unmap(src);</div><div class='ctx'> 		scatterwalk_unmap(assoc);</div><div class='del'>-		scatterwalk_done(&amp;src_sg_walk, 0, 0);</div><div class='del'>-		scatterwalk_done(&amp;assoc_sg_walk, 0, 0);</div><div class='add'>+		scatterwalk_advance(&amp;src_sg_walk, req-&gt;src-&gt;length);</div><div class='add'>+		scatterwalk_done(&amp;src_sg_walk, req-&gt;src == req-&gt;dst, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		scatterwalk_map_and_copy(dst, req-&gt;dst, 0, tempCipherLen, 1);</div><div class='del'>-		kfree(src);</div><div class='add'>+		scatterwalk_map_and_copy(dst, req-&gt;dst, req-&gt;assoclen,</div><div class='add'>+					 tempCipherLen, 1);</div><div class='add'>+		kfree(assoc);</div><div class='ctx'> 	}</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rfc4106_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct cryptd_aead *cryptd_tfm = *ctx;</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='ctx'> </div><div class='del'>-	if (!irq_fpu_usable()) {</div><div class='del'>-		struct aead_request *cryptd_req =</div><div class='del'>-			(struct aead_request *) aead_request_ctx(req);</div><div class='add'>+	aead_request_set_tfm(subreq, irq_fpu_usable() ?</div><div class='add'>+				     cryptd_aead_child(cryptd_tfm) :</div><div class='add'>+				     &amp;cryptd_tfm-&gt;base);</div><div class='ctx'> </div><div class='del'>-		memcpy(cryptd_req, req, sizeof(*req));</div><div class='del'>-		aead_request_set_tfm(cryptd_req, &amp;ctx-&gt;cryptd_tfm-&gt;base);</div><div class='del'>-		ret = crypto_aead_encrypt(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		ret = __driver_rfc4106_encrypt(req);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				  req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_encrypt(subreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='del'>-	struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);</div><div class='add'>+	struct cryptd_aead **ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct cryptd_aead *cryptd_tfm = *ctx;</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='ctx'> </div><div class='del'>-	if (!irq_fpu_usable()) {</div><div class='del'>-		struct aead_request *cryptd_req =</div><div class='del'>-			(struct aead_request *) aead_request_ctx(req);</div><div class='add'>+	aead_request_set_tfm(subreq, irq_fpu_usable() ?</div><div class='add'>+				     cryptd_aead_child(cryptd_tfm) :</div><div class='add'>+				     &amp;cryptd_tfm-&gt;base);</div><div class='ctx'> </div><div class='del'>-		memcpy(cryptd_req, req, sizeof(*req));</div><div class='del'>-		aead_request_set_tfm(cryptd_req, &amp;ctx-&gt;cryptd_tfm-&gt;base);</div><div class='del'>-		ret = crypto_aead_decrypt(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		ret = __driver_rfc4106_decrypt(req);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int helper_rfc4106_encrypt(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (unlikely(!irq_fpu_usable())) {</div><div class='del'>-		WARN_ONCE(1, "__gcm-aes-aesni alg used in invalid context");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		ret = __driver_rfc4106_encrypt(req);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int helper_rfc4106_decrypt(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				  req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!irq_fpu_usable())) {</div><div class='del'>-		WARN_ONCE(1, "__gcm-aes-aesni alg used in invalid context");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		ret = __driver_rfc4106_decrypt(req);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return crypto_aead_decrypt(subreq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1410,51 +1310,6 @@ static struct crypto_alg aesni_algs[] = { {</div><div class='ctx'> 			.geniv		= "chainiv",</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-}, {</div><div class='del'>-	.cra_name		= "__gcm-aes-aesni",</div><div class='del'>-	.cra_driver_name	= "__driver-gcm-aes-aesni",</div><div class='del'>-	.cra_priority		= 0,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_INTERNAL,</div><div class='del'>-	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct aesni_rfc4106_gcm_ctx) +</div><div class='del'>-				  AESNI_ALIGN,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_aead_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.aead = {</div><div class='del'>-			.setkey		= common_rfc4106_set_key,</div><div class='del'>-			.setauthsize	= common_rfc4106_set_authsize,</div><div class='del'>-			.encrypt	= helper_rfc4106_encrypt,</div><div class='del'>-			.decrypt	= helper_rfc4106_decrypt,</div><div class='del'>-			.ivsize		= 8,</div><div class='del'>-			.maxauthsize	= 16,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-}, {</div><div class='del'>-	.cra_name		= "rfc4106(gcm(aes))",</div><div class='del'>-	.cra_driver_name	= "rfc4106-gcm-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct aesni_rfc4106_gcm_ctx) +</div><div class='del'>-				  AESNI_ALIGN,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_nivaead_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_init		= rfc4106_init,</div><div class='del'>-	.cra_exit		= rfc4106_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.aead = {</div><div class='del'>-			.setkey		= rfc4106_set_key,</div><div class='del'>-			.setauthsize	= rfc4106_set_authsize,</div><div class='del'>-			.encrypt	= rfc4106_encrypt,</div><div class='del'>-			.decrypt	= rfc4106_decrypt,</div><div class='del'>-			.geniv		= "seqiv",</div><div class='del'>-			.ivsize		= 8,</div><div class='del'>-			.maxauthsize	= 16,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='ctx'> #endif</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_PCBC)</div><div class='ctx'> }, {</div><div class='hunk'>@@ -1569,6 +1424,46 @@ static struct crypto_alg aesni_algs[] = { {</div><div class='ctx'> 	},</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+static struct aead_alg aesni_aead_algs[] = { {</div><div class='add'>+	.setkey			= common_rfc4106_set_key,</div><div class='add'>+	.setauthsize		= common_rfc4106_set_authsize,</div><div class='add'>+	.encrypt		= helper_rfc4106_encrypt,</div><div class='add'>+	.decrypt		= helper_rfc4106_decrypt,</div><div class='add'>+	.ivsize			= 8,</div><div class='add'>+	.maxauthsize		= 16,</div><div class='add'>+	.base = {</div><div class='add'>+		.cra_name		= "__gcm-aes-aesni",</div><div class='add'>+		.cra_driver_name	= "__driver-gcm-aes-aesni",</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='add'>+		.cra_blocksize		= 1,</div><div class='add'>+		.cra_ctxsize		= sizeof(struct aesni_rfc4106_gcm_ctx),</div><div class='add'>+		.cra_alignmask		= AESNI_ALIGN - 1,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='add'>+	.init			= rfc4106_init,</div><div class='add'>+	.exit			= rfc4106_exit,</div><div class='add'>+	.setkey			= rfc4106_set_key,</div><div class='add'>+	.setauthsize		= rfc4106_set_authsize,</div><div class='add'>+	.encrypt		= rfc4106_encrypt,</div><div class='add'>+	.decrypt		= rfc4106_decrypt,</div><div class='add'>+	.ivsize			= 8,</div><div class='add'>+	.maxauthsize		= 16,</div><div class='add'>+	.base = {</div><div class='add'>+		.cra_name		= "rfc4106(gcm(aes))",</div><div class='add'>+		.cra_driver_name	= "rfc4106-gcm-aesni",</div><div class='add'>+		.cra_priority		= 400,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='add'>+		.cra_blocksize		= 1,</div><div class='add'>+		.cra_ctxsize		= sizeof(struct cryptd_aead *),</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+} };</div><div class='add'>+#else</div><div class='add'>+static struct aead_alg aesni_aead_algs[0];</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id aesni_cpu_id[] = {</div><div class='ctx'> 	X86_FEATURE_MATCH(X86_FEATURE_AES),</div><div class='hunk'>@@ -1616,17 +1511,33 @@ static int __init aesni_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='add'>+	err = crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='add'>+	if (err)</div><div class='add'>+		goto fpu_exit;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_aeads(aesni_aead_algs,</div><div class='add'>+				    ARRAY_SIZE(aesni_aead_algs));</div><div class='add'>+	if (err)</div><div class='add'>+		goto unregister_algs;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+unregister_algs:</div><div class='add'>+	crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='add'>+fpu_exit:</div><div class='add'>+	crypto_fpu_exit();</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit aesni_exit(void)</div><div class='ctx'> {</div><div class='add'>+	crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));</div><div class='ctx'> 	crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='ctx'> </div><div class='ctx'> 	crypto_fpu_exit();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-module_init(aesni_init);</div><div class='add'>+late_initcall(aesni_init);</div><div class='ctx'> module_exit(aesni_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");</div><div class='head'>diff --git a/arch/x86/crypto/camellia_aesni_avx2_glue.c b/arch/x86/crypto/camellia_aesni_avx2_glue.c<br/>index baf0ac21ace5..4c65c70e628b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a></div><div class='hunk'>@@ -19,8 +19,7 @@</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/camellia.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -561,16 +560,15 @@ static struct crypto_alg cmll_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init camellia_aesni_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {</div><div class='ctx'> 		pr_info("AVX2 or AES-NI instructions are not detected.\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX2 detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/camellia_aesni_avx_glue.c b/arch/x86/crypto/camellia_aesni_avx_glue.c<br/>index 78818a1e73e3..80a0e4389c9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/camellia_aesni_avx_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/camellia_aesni_avx_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/camellia_aesni_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/camellia_aesni_avx_glue.c</a></div><div class='hunk'>@@ -19,8 +19,7 @@</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/camellia.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -553,16 +552,10 @@ static struct crypto_alg cmll_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init camellia_aesni_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {</div><div class='del'>-		pr_info("AVX or AES-NI instructions are not detected.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/cast5_avx_glue.c b/arch/x86/crypto/cast5_avx_glue.c<br/>index 236c80974457..be00aa48b2b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/cast5_avx_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/cast5_avx_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/cast5_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/cast5_avx_glue.c</a></div><div class='hunk'>@@ -31,8 +31,7 @@</div><div class='ctx'> #include &lt;crypto/cast5.h&gt;</div><div class='ctx'> #include &lt;crypto/cryptd.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CAST5_PARALLEL_BLOCKS 16</div><div class='hunk'>@@ -468,16 +467,10 @@ static struct crypto_alg cast5_algs[6] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init cast5_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave) {</div><div class='del'>-		pr_info("AVX instructions are not detected.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/cast6_avx_glue.c b/arch/x86/crypto/cast6_avx_glue.c<br/>index f448810ca4ac..5dbba7224221 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/cast6_avx_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/cast6_avx_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/cast6_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/cast6_avx_glue.c</a></div><div class='hunk'>@@ -36,8 +36,7 @@</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CAST6_PARALLEL_BLOCKS 8</div><div class='hunk'>@@ -590,16 +589,10 @@ static struct crypto_alg cast6_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init cast6_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave) {</div><div class='del'>-		pr_info("AVX instructions are not detected.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/crc32-pclmul_glue.c b/arch/x86/crypto/crc32-pclmul_glue.c<br/>index 1937fc1d8763..07d2c6c86a54 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/crc32-pclmul_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/crc32-pclmul_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/crc32-pclmul_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crc32-pclmul_glue.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CHKSUM_BLOCK_SIZE	1</div><div class='ctx'> #define CHKSUM_DIGEST_SIZE	4</div><div class='head'>diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c<br/>index 28640c3d6af7..81a595d75cf5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/crc32c-intel_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/crc32c-intel_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/crc32c-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crc32c-intel_glue.c</a></div><div class='hunk'>@@ -32,8 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CHKSUM_BLOCK_SIZE	1</div><div class='ctx'> #define CHKSUM_DIGEST_SIZE	4</div><div class='head'>diff --git a/arch/x86/crypto/crct10dif-pclmul_glue.c b/arch/x86/crypto/crct10dif-pclmul_glue.c<br/>index b6c67bf30fdf..a3fcfc97a311 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/crct10dif-pclmul_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/crct10dif-pclmul_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/crct10dif-pclmul_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/crct10dif-pclmul_glue.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/fpu.c b/arch/x86/crypto/fpu.c<br/>index f368ba261739..e7d679e2a018 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/fpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/fpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/fpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/fpu.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct crypto_fpu_ctx {</div><div class='ctx'> 	struct crypto_blkcipher *child;</div><div class='hunk'>@@ -156,7 +156,7 @@ int __init crypto_fpu_init(void)</div><div class='ctx'> 	return crypto_register_template(&amp;crypto_fpu_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __exit crypto_fpu_exit(void)</div><div class='add'>+void crypto_fpu_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_fpu_tmpl);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c<br/>index 2079baf06bdd..64d7cf1b50e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;crypto/cryptd.h&gt;</div><div class='ctx'> #include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define GHASH_BLOCK_SIZE	16</div><div class='head'>diff --git a/arch/x86/crypto/serpent_avx2_glue.c b/arch/x86/crypto/serpent_avx2_glue.c<br/>index 2f63dc89e7a9..7d838dc4d888 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/serpent_avx2_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/serpent_avx2_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/serpent_avx2_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/serpent_avx2_glue.c</a></div><div class='hunk'>@@ -20,8 +20,7 @@</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='ctx'> #include &lt;crypto/serpent.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/serpent-avx.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -537,16 +536,14 @@ static struct crypto_alg srp_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has_avx2 || !cpu_has_osxsave) {</div><div class='ctx'> 		pr_info("AVX2 instructions are not detected.\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/serpent_avx_glue.c b/arch/x86/crypto/serpent_avx_glue.c<br/>index c8d478af8456..da7dafc9b16d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/serpent_avx_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/serpent_avx_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/serpent_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/serpent_avx_glue.c</a></div><div class='hunk'>@@ -36,8 +36,7 @@</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/serpent-avx.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -596,16 +595,10 @@ static struct crypto_alg serpent_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init serpent_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave) {</div><div class='del'>-		printk(KERN_INFO "AVX instructions are not detected.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		printk(KERN_INFO "AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha-mb/sha1_mb.c b/arch/x86/crypto/sha-mb/sha1_mb.c<br/>index e510b1c5d690..a841e9765bd6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/sha-mb/sha1_mb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/sha-mb/sha1_mb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/sha-mb/sha1_mb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha-mb/sha1_mb.c</a></div><div class='hunk'>@@ -65,11 +65,8 @@</div><div class='ctx'> #include &lt;crypto/mcryptd.h&gt;</div><div class='ctx'> #include &lt;crypto/crypto_wq.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include "sha_mb_ctx.h"</div><div class='ctx'> </div><div class='ctx'> #define FLUSH_INTERVAL 1000 /* in usec */</div><div class='hunk'>@@ -885,7 +882,8 @@ static int __init sha1_mb_mod_init(void)</div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;cpu_state-&gt;flush, mcryptd_flusher);</div><div class='ctx'> 		cpu_state-&gt;cpu = cpu;</div><div class='ctx'> 		cpu_state-&gt;alg_state = &amp;sha1_mb_alg_state;</div><div class='del'>-		cpu_state-&gt;mgr = (struct sha1_ctx_mgr *) kzalloc(sizeof(struct sha1_ctx_mgr), GFP_KERNEL);</div><div class='add'>+		cpu_state-&gt;mgr = kzalloc(sizeof(struct sha1_ctx_mgr),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 		if (!cpu_state-&gt;mgr)</div><div class='ctx'> 			goto err2;</div><div class='ctx'> 		sha1_ctx_mgr_init(cpu_state-&gt;mgr);</div><div class='head'>diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c<br/>index 33d1b9dc14cc..7c48e8b20848 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/sha1_ssse3_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/sha1_ssse3_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/sha1_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha1_ssse3_glue.c</a></div><div class='hunk'>@@ -29,9 +29,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,</div><div class='hunk'>@@ -123,15 +121,9 @@ static struct shash_alg alg = {</div><div class='ctx'> #ifdef CONFIG_AS_AVX</div><div class='ctx'> static bool __init avx_usable(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='del'>-</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, NULL)) {</div><div class='add'>+		if (cpu_has_avx)</div><div class='add'>+			pr_info("AVX detected but unusable.\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha256_ssse3_glue.c b/arch/x86/crypto/sha256_ssse3_glue.c<br/>index ccc338881ee8..f8097fc0d1d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/sha256_ssse3_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/sha256_ssse3_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/sha256_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha256_ssse3_glue.c</a></div><div class='hunk'>@@ -37,9 +37,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha.h&gt;</div><div class='ctx'> #include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha256_transform_ssse3(u32 *digest, const char *data,</div><div class='hunk'>@@ -132,15 +130,9 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> #ifdef CONFIG_AS_AVX</div><div class='ctx'> static bool __init avx_usable(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='del'>-</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, NULL)) {</div><div class='add'>+		if (cpu_has_avx)</div><div class='add'>+			pr_info("AVX detected but unusable.\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha512_ssse3_glue.c b/arch/x86/crypto/sha512_ssse3_glue.c<br/>index d9fa4c1e063f..2edad7b81870 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/sha512_ssse3_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/sha512_ssse3_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/sha512_ssse3_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/sha512_ssse3_glue.c</a></div><div class='hunk'>@@ -35,9 +35,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -131,15 +129,9 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> #ifdef CONFIG_AS_AVX</div><div class='ctx'> static bool __init avx_usable(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		pr_info("AVX detected but unusable.\n");</div><div class='del'>-</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, NULL)) {</div><div class='add'>+		if (cpu_has_avx)</div><div class='add'>+			pr_info("AVX detected but unusable.\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/twofish_avx_glue.c b/arch/x86/crypto/twofish_avx_glue.c<br/>index b5e2d5651851..c2bd0ce718ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/twofish_avx_glue.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/crypto/twofish_avx_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/twofish_avx_glue.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/crypto/twofish_avx_glue.c</a></div><div class='hunk'>@@ -36,9 +36,7 @@</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='ctx'> #include &lt;crypto/lrw.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/twofish.h&gt;</div><div class='ctx'> #include &lt;asm/crypto/glue_helper.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='hunk'>@@ -558,16 +556,10 @@ static struct crypto_alg twofish_algs[10] = { {</div><div class='ctx'> </div><div class='ctx'> static int __init twofish_init(void)</div><div class='ctx'> {</div><div class='del'>-	u64 xcr0;</div><div class='add'>+	const char *feature_name;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_avx || !cpu_has_osxsave) {</div><div class='del'>-		printk(KERN_INFO "AVX instructions are not detected.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='del'>-	if ((xcr0 &amp; (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {</div><div class='del'>-		printk(KERN_INFO "AVX detected but unusable.\n");</div><div class='add'>+	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &amp;feature_name)) {</div><div class='add'>+		pr_info("CPU feature '%s' is not supported.\n", feature_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/entry/Makefile b/arch/x86/entry/Makefile<br/>new file mode 100644<br/>index 000000000000..7a144971db79<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the x86 low level entry code</div><div class='add'>+#</div><div class='add'>+obj-y				:= entry_$(BITS).o thunk_$(BITS).o syscall_$(BITS).o</div><div class='add'>+</div><div class='add'>+obj-y				+= vdso/</div><div class='add'>+obj-y				+= vsyscall/</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_IA32_EMULATION)	+= entry_64_compat.o syscall_32.o</div><div class='add'>+</div><div class='head'>diff --git a/arch/x86/include/asm/calling.h b/arch/x86/entry/calling.h<br/>index 1c8b50edb2db..f4e6308c4200 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/calling.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/calling.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/calling.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/calling.h</a></div><div class='hunk'>@@ -46,8 +46,6 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'> </div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -91,28 +89,27 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'> #define SIZEOF_PTREGS	21*8</div><div class='ctx'> </div><div class='ctx'> 	.macro ALLOC_PT_GPREGS_ON_STACK addskip=0</div><div class='del'>-	subq	$15*8+\addskip, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 15*8+\addskip</div><div class='add'>+	addq	$-(15*8+\addskip), %rsp</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro SAVE_C_REGS_HELPER offset=0 rax=1 rcx=1 r8910=1 r11=1</div><div class='ctx'> 	.if \r11</div><div class='del'>-	movq_cfi r11, 6*8+\offset</div><div class='add'>+	movq %r11, 6*8+\offset(%rsp)</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \r8910</div><div class='del'>-	movq_cfi r10, 7*8+\offset</div><div class='del'>-	movq_cfi r9,  8*8+\offset</div><div class='del'>-	movq_cfi r8,  9*8+\offset</div><div class='add'>+	movq %r10, 7*8+\offset(%rsp)</div><div class='add'>+	movq %r9,  8*8+\offset(%rsp)</div><div class='add'>+	movq %r8,  9*8+\offset(%rsp)</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rax</div><div class='del'>-	movq_cfi rax, 10*8+\offset</div><div class='add'>+	movq %rax, 10*8+\offset(%rsp)</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rcx</div><div class='del'>-	movq_cfi rcx, 11*8+\offset</div><div class='add'>+	movq %rcx, 11*8+\offset(%rsp)</div><div class='ctx'> 	.endif</div><div class='del'>-	movq_cfi rdx, 12*8+\offset</div><div class='del'>-	movq_cfi rsi, 13*8+\offset</div><div class='del'>-	movq_cfi rdi, 14*8+\offset</div><div class='add'>+	movq %rdx, 12*8+\offset(%rsp)</div><div class='add'>+	movq %rsi, 13*8+\offset(%rsp)</div><div class='add'>+	movq %rdi, 14*8+\offset(%rsp)</div><div class='ctx'> 	.endm</div><div class='ctx'> 	.macro SAVE_C_REGS offset=0</div><div class='ctx'> 	SAVE_C_REGS_HELPER \offset, 1, 1, 1, 1</div><div class='hunk'>@@ -131,24 +128,24 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro SAVE_EXTRA_REGS offset=0</div><div class='del'>-	movq_cfi r15, 0*8+\offset</div><div class='del'>-	movq_cfi r14, 1*8+\offset</div><div class='del'>-	movq_cfi r13, 2*8+\offset</div><div class='del'>-	movq_cfi r12, 3*8+\offset</div><div class='del'>-	movq_cfi rbp, 4*8+\offset</div><div class='del'>-	movq_cfi rbx, 5*8+\offset</div><div class='add'>+	movq %r15, 0*8+\offset(%rsp)</div><div class='add'>+	movq %r14, 1*8+\offset(%rsp)</div><div class='add'>+	movq %r13, 2*8+\offset(%rsp)</div><div class='add'>+	movq %r12, 3*8+\offset(%rsp)</div><div class='add'>+	movq %rbp, 4*8+\offset(%rsp)</div><div class='add'>+	movq %rbx, 5*8+\offset(%rsp)</div><div class='ctx'> 	.endm</div><div class='ctx'> 	.macro SAVE_EXTRA_REGS_RBP offset=0</div><div class='del'>-	movq_cfi rbp, 4*8+\offset</div><div class='add'>+	movq %rbp, 4*8+\offset(%rsp)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro RESTORE_EXTRA_REGS offset=0</div><div class='del'>-	movq_cfi_restore 0*8+\offset, r15</div><div class='del'>-	movq_cfi_restore 1*8+\offset, r14</div><div class='del'>-	movq_cfi_restore 2*8+\offset, r13</div><div class='del'>-	movq_cfi_restore 3*8+\offset, r12</div><div class='del'>-	movq_cfi_restore 4*8+\offset, rbp</div><div class='del'>-	movq_cfi_restore 5*8+\offset, rbx</div><div class='add'>+	movq 0*8+\offset(%rsp), %r15</div><div class='add'>+	movq 1*8+\offset(%rsp), %r14</div><div class='add'>+	movq 2*8+\offset(%rsp), %r13</div><div class='add'>+	movq 3*8+\offset(%rsp), %r12</div><div class='add'>+	movq 4*8+\offset(%rsp), %rbp</div><div class='add'>+	movq 5*8+\offset(%rsp), %rbx</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro ZERO_EXTRA_REGS</div><div class='hunk'>@@ -162,24 +159,24 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'> </div><div class='ctx'> 	.macro RESTORE_C_REGS_HELPER rstor_rax=1, rstor_rcx=1, rstor_r11=1, rstor_r8910=1, rstor_rdx=1</div><div class='ctx'> 	.if \rstor_r11</div><div class='del'>-	movq_cfi_restore 6*8, r11</div><div class='add'>+	movq 6*8(%rsp), %r11</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rstor_r8910</div><div class='del'>-	movq_cfi_restore 7*8, r10</div><div class='del'>-	movq_cfi_restore 8*8, r9</div><div class='del'>-	movq_cfi_restore 9*8, r8</div><div class='add'>+	movq 7*8(%rsp), %r10</div><div class='add'>+	movq 8*8(%rsp), %r9</div><div class='add'>+	movq 9*8(%rsp), %r8</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rstor_rax</div><div class='del'>-	movq_cfi_restore 10*8, rax</div><div class='add'>+	movq 10*8(%rsp), %rax</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rstor_rcx</div><div class='del'>-	movq_cfi_restore 11*8, rcx</div><div class='add'>+	movq 11*8(%rsp), %rcx</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.if \rstor_rdx</div><div class='del'>-	movq_cfi_restore 12*8, rdx</div><div class='add'>+	movq 12*8(%rsp), %rdx</div><div class='ctx'> 	.endif</div><div class='del'>-	movq_cfi_restore 13*8, rsi</div><div class='del'>-	movq_cfi_restore 14*8, rdi</div><div class='add'>+	movq 13*8(%rsp), %rsi</div><div class='add'>+	movq 14*8(%rsp), %rdi</div><div class='ctx'> 	.endm</div><div class='ctx'> 	.macro RESTORE_C_REGS</div><div class='ctx'> 	RESTORE_C_REGS_HELPER 1,1,1,1,1</div><div class='hunk'>@@ -204,8 +201,7 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro REMOVE_PT_GPREGS_FROM_STACK addskip=0</div><div class='del'>-	addq $15*8+\addskip, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -(15*8+\addskip)</div><div class='add'>+	subq $-(15*8+\addskip), %rsp</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro icebp</div><div class='hunk'>@@ -224,23 +220,23 @@ For 32-bit we have the following conventions - kernel is built with</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> 	.macro SAVE_ALL</div><div class='del'>-	pushl_cfi_reg eax</div><div class='del'>-	pushl_cfi_reg ebp</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg edx</div><div class='del'>-	pushl_cfi_reg ecx</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %eax</div><div class='add'>+	pushl %ebp</div><div class='add'>+	pushl %edi</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %edx</div><div class='add'>+	pushl %ecx</div><div class='add'>+	pushl %ebx</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro RESTORE_ALL</div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg ecx</div><div class='del'>-	popl_cfi_reg edx</div><div class='del'>-	popl_cfi_reg esi</div><div class='del'>-	popl_cfi_reg edi</div><div class='del'>-	popl_cfi_reg ebp</div><div class='del'>-	popl_cfi_reg eax</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %ecx</div><div class='add'>+	popl %edx</div><div class='add'>+	popl %esi</div><div class='add'>+	popl %edi</div><div class='add'>+	popl %ebp</div><div class='add'>+	popl %eax</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='head'>diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S<br/>new file mode 100644<br/>index 000000000000..21dc60a60b5f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/entry_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_32.S</a></div><div class='hunk'>@@ -0,0 +1,1248 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 1991,1992  Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * entry_32.S contains the system-call and low-level fault and trap handling routines.</div><div class='add'>+ *</div><div class='add'>+ * Stack layout in 'syscall_exit':</div><div class='add'>+ *	ptrace needs to have all registers on the stack.</div><div class='add'>+ *	If the order here is changed, it needs to be</div><div class='add'>+ *	updated in fork.c:copy_process(), signal.c:do_signal(),</div><div class='add'>+ *	ptrace.c and ptrace.h</div><div class='add'>+ *</div><div class='add'>+ *	 0(%esp) - %ebx</div><div class='add'>+ *	 4(%esp) - %ecx</div><div class='add'>+ *	 8(%esp) - %edx</div><div class='add'>+ *	 C(%esp) - %esi</div><div class='add'>+ *	10(%esp) - %edi</div><div class='add'>+ *	14(%esp) - %ebp</div><div class='add'>+ *	18(%esp) - %eax</div><div class='add'>+ *	1C(%esp) - %ds</div><div class='add'>+ *	20(%esp) - %es</div><div class='add'>+ *	24(%esp) - %fs</div><div class='add'>+ *	28(%esp) - %gs		saved iff !CONFIG_X86_32_LAZY_GS</div><div class='add'>+ *	2C(%esp) - orig_eax</div><div class='add'>+ *	30(%esp) - %eip</div><div class='add'>+ *	34(%esp) - %cs</div><div class='add'>+ *	38(%esp) - %eflags</div><div class='add'>+ *	3C(%esp) - %oldesp</div><div class='add'>+ *	40(%esp) - %oldss</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/irqflags.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/page_types.h&gt;</div><div class='add'>+#include &lt;asm/percpu.h&gt;</div><div class='add'>+#include &lt;asm/processor-flags.h&gt;</div><div class='add'>+#include &lt;asm/ftrace.h&gt;</div><div class='add'>+#include &lt;asm/irq_vectors.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/alternative-asm.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/smap.h&gt;</div><div class='add'>+</div><div class='add'>+/* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='add'>+#include &lt;linux/elf-em.h&gt;</div><div class='add'>+#define AUDIT_ARCH_I386		(EM_386|__AUDIT_ARCH_LE)</div><div class='add'>+#define __AUDIT_ARCH_LE		0x40000000</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_AUDITSYSCALL</div><div class='add'>+# define sysenter_audit		syscall_trace_entry</div><div class='add'>+# define sysexit_audit		syscall_exit_work</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	.section .entry.text, "ax"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * We use macros for low-level operations which need to be overridden</div><div class='add'>+ * for paravirtualization.  The following will never clobber any registers:</div><div class='add'>+ *   INTERRUPT_RETURN (aka. "iret")</div><div class='add'>+ *   GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")</div><div class='add'>+ *   ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").</div><div class='add'>+ *</div><div class='add'>+ * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must</div><div class='add'>+ * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).</div><div class='add'>+ * Allowing a register to be clobbered can shrink the paravirt replacement</div><div class='add'>+ * enough to patch inline, increasing performance.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PREEMPT</div><div class='add'>+# define preempt_stop(clobbers)	DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF</div><div class='add'>+#else</div><div class='add'>+# define preempt_stop(clobbers)</div><div class='add'>+# define resume_kernel		restore_all</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.macro TRACE_IRQS_IRET</div><div class='add'>+#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='add'>+	testl	$X86_EFLAGS_IF, PT_EFLAGS(%esp)     # interrupts off?</div><div class='add'>+	jz	1f</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+1:</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * User gs save/restore</div><div class='add'>+ *</div><div class='add'>+ * %gs is used for userland TLS and kernel only uses it for stack</div><div class='add'>+ * canary which is required to be at %gs:20 by gcc.  Read the comment</div><div class='add'>+ * at the top of stackprotector.h for more info.</div><div class='add'>+ *</div><div class='add'>+ * Local labels 98 and 99 are used.</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_X86_32_LAZY_GS</div><div class='add'>+</div><div class='add'>+ /* unfortunately push/pop can't be no-op */</div><div class='add'>+.macro PUSH_GS</div><div class='add'>+	pushl	$0</div><div class='add'>+.endm</div><div class='add'>+.macro POP_GS pop=0</div><div class='add'>+	addl	$(4 + \pop), %esp</div><div class='add'>+.endm</div><div class='add'>+.macro POP_GS_EX</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+ /* all the rest are no-op */</div><div class='add'>+.macro PTGS_TO_GS</div><div class='add'>+.endm</div><div class='add'>+.macro PTGS_TO_GS_EX</div><div class='add'>+.endm</div><div class='add'>+.macro GS_TO_REG reg</div><div class='add'>+.endm</div><div class='add'>+.macro REG_TO_PTGS reg</div><div class='add'>+.endm</div><div class='add'>+.macro SET_KERNEL_GS reg</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#else	/* CONFIG_X86_32_LAZY_GS */</div><div class='add'>+</div><div class='add'>+.macro PUSH_GS</div><div class='add'>+	pushl	%gs</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro POP_GS pop=0</div><div class='add'>+98:	popl	%gs</div><div class='add'>+  .if \pop &lt;&gt; 0</div><div class='add'>+	add	$\pop, %esp</div><div class='add'>+  .endif</div><div class='add'>+.endm</div><div class='add'>+.macro POP_GS_EX</div><div class='add'>+.pushsection .fixup, "ax"</div><div class='add'>+99:	movl	$0, (%esp)</div><div class='add'>+	jmp	98b</div><div class='add'>+.popsection</div><div class='add'>+	_ASM_EXTABLE(98b, 99b)</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro PTGS_TO_GS</div><div class='add'>+98:	mov	PT_GS(%esp), %gs</div><div class='add'>+.endm</div><div class='add'>+.macro PTGS_TO_GS_EX</div><div class='add'>+.pushsection .fixup, "ax"</div><div class='add'>+99:	movl	$0, PT_GS(%esp)</div><div class='add'>+	jmp	98b</div><div class='add'>+.popsection</div><div class='add'>+	_ASM_EXTABLE(98b, 99b)</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro GS_TO_REG reg</div><div class='add'>+	movl	%gs, \reg</div><div class='add'>+.endm</div><div class='add'>+.macro REG_TO_PTGS reg</div><div class='add'>+	movl	\reg, PT_GS(%esp)</div><div class='add'>+.endm</div><div class='add'>+.macro SET_KERNEL_GS reg</div><div class='add'>+	movl	$(__KERNEL_STACK_CANARY), \reg</div><div class='add'>+	movl	\reg, %gs</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_X86_32_LAZY_GS */</div><div class='add'>+</div><div class='add'>+.macro SAVE_ALL</div><div class='add'>+	cld</div><div class='add'>+	PUSH_GS</div><div class='add'>+	pushl	%fs</div><div class='add'>+	pushl	%es</div><div class='add'>+	pushl	%ds</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ebp</div><div class='add'>+	pushl	%edi</div><div class='add'>+	pushl	%esi</div><div class='add'>+	pushl	%edx</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%ebx</div><div class='add'>+	movl	$(__USER_DS), %edx</div><div class='add'>+	movl	%edx, %ds</div><div class='add'>+	movl	%edx, %es</div><div class='add'>+	movl	$(__KERNEL_PERCPU), %edx</div><div class='add'>+	movl	%edx, %fs</div><div class='add'>+	SET_KERNEL_GS %edx</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro RESTORE_INT_REGS</div><div class='add'>+	popl	%ebx</div><div class='add'>+	popl	%ecx</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%esi</div><div class='add'>+	popl	%edi</div><div class='add'>+	popl	%ebp</div><div class='add'>+	popl	%eax</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro RESTORE_REGS pop=0</div><div class='add'>+	RESTORE_INT_REGS</div><div class='add'>+1:	popl	%ds</div><div class='add'>+2:	popl	%es</div><div class='add'>+3:	popl	%fs</div><div class='add'>+	POP_GS \pop</div><div class='add'>+.pushsection .fixup, "ax"</div><div class='add'>+4:	movl	$0, (%esp)</div><div class='add'>+	jmp	1b</div><div class='add'>+5:	movl	$0, (%esp)</div><div class='add'>+	jmp	2b</div><div class='add'>+6:	movl	$0, (%esp)</div><div class='add'>+	jmp	3b</div><div class='add'>+.popsection</div><div class='add'>+	_ASM_EXTABLE(1b, 4b)</div><div class='add'>+	_ASM_EXTABLE(2b, 5b)</div><div class='add'>+	_ASM_EXTABLE(3b, 6b)</div><div class='add'>+	POP_GS_EX</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+ENTRY(ret_from_fork)</div><div class='add'>+	pushl	%eax</div><div class='add'>+	call	schedule_tail</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+	popl	%eax</div><div class='add'>+	pushl	$0x0202				# Reset kernel eflags</div><div class='add'>+	popfl</div><div class='add'>+	jmp	syscall_exit</div><div class='add'>+END(ret_from_fork)</div><div class='add'>+</div><div class='add'>+ENTRY(ret_from_kernel_thread)</div><div class='add'>+	pushl	%eax</div><div class='add'>+	call	schedule_tail</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+	popl	%eax</div><div class='add'>+	pushl	$0x0202				# Reset kernel eflags</div><div class='add'>+	popfl</div><div class='add'>+	movl	PT_EBP(%esp), %eax</div><div class='add'>+	call	*PT_EBX(%esp)</div><div class='add'>+	movl	$0, PT_EAX(%esp)</div><div class='add'>+	jmp	syscall_exit</div><div class='add'>+ENDPROC(ret_from_kernel_thread)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return to user mode is not as complex as all this looks,</div><div class='add'>+ * but we want the default path for a system call return to</div><div class='add'>+ * go as quickly as possible which is why some of this is</div><div class='add'>+ * less clear than it otherwise should be.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+	# userspace resumption stub bypassing syscall exit tracing</div><div class='add'>+	ALIGN</div><div class='add'>+ret_from_exception:</div><div class='add'>+	preempt_stop(CLBR_ANY)</div><div class='add'>+ret_from_intr:</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+#ifdef CONFIG_VM86</div><div class='add'>+	movl	PT_EFLAGS(%esp), %eax		# mix EFLAGS and CS</div><div class='add'>+	movb	PT_CS(%esp), %al</div><div class='add'>+	andl	$(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * We can be coming here from child spawned by kernel_thread().</div><div class='add'>+	 */</div><div class='add'>+	movl	PT_CS(%esp), %eax</div><div class='add'>+	andl	$SEGMENT_RPL_MASK, %eax</div><div class='add'>+#endif</div><div class='add'>+	cmpl	$USER_RPL, %eax</div><div class='add'>+	jb	resume_kernel			# not returning to v8086 or userspace</div><div class='add'>+</div><div class='add'>+ENTRY(resume_userspace)</div><div class='add'>+	LOCKDEP_SYS_EXIT</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)		# make sure we don't miss an interrupt</div><div class='add'>+						# setting need_resched or sigpending</div><div class='add'>+						# between sampling and the iret</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	TI_flags(%ebp), %ecx</div><div class='add'>+	andl	$_TIF_WORK_MASK, %ecx		# is there any work to be done on</div><div class='add'>+						# int/exception return?</div><div class='add'>+	jne	work_pending</div><div class='add'>+	jmp	restore_all</div><div class='add'>+END(ret_from_exception)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PREEMPT</div><div class='add'>+ENTRY(resume_kernel)</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='add'>+need_resched:</div><div class='add'>+	cmpl	$0, PER_CPU_VAR(__preempt_count)</div><div class='add'>+	jnz	restore_all</div><div class='add'>+	testl	$X86_EFLAGS_IF, PT_EFLAGS(%esp)	# interrupts off (exception path) ?</div><div class='add'>+	jz	restore_all</div><div class='add'>+	call	preempt_schedule_irq</div><div class='add'>+	jmp	need_resched</div><div class='add'>+END(resume_kernel)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SYSENTER_RETURN points to after the SYSENTER instruction</div><div class='add'>+ * in the vsyscall page.  See vsyscall-sysentry.S, which defines</div><div class='add'>+ * the symbol.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+	# SYSENTER  call handler stub</div><div class='add'>+ENTRY(entry_SYSENTER_32)</div><div class='add'>+	movl	TSS_sysenter_sp0(%esp), %esp</div><div class='add'>+sysenter_past_esp:</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupts are disabled here, but we can't trace it until</div><div class='add'>+	 * enough kernel state to call TRACE_IRQS_OFF can be called - but</div><div class='add'>+	 * we immediately enable interrupts at that point anyway.</div><div class='add'>+	 */</div><div class='add'>+	pushl	$__USER_DS</div><div class='add'>+	pushl	%ebp</div><div class='add'>+	pushfl</div><div class='add'>+	orl	$X86_EFLAGS_IF, (%esp)</div><div class='add'>+	pushl	$__USER_CS</div><div class='add'>+	/*</div><div class='add'>+	 * Push current_thread_info()-&gt;sysenter_return to the stack.</div><div class='add'>+	 * A tiny bit of offset fixup is necessary: TI_sysenter_return</div><div class='add'>+	 * is relative to thread_info, which is at the bottom of the</div><div class='add'>+	 * kernel stack page.  4*4 means the 4 words pushed above;</div><div class='add'>+	 * TOP_OF_KERNEL_STACK_PADDING takes us to the top of the stack;</div><div class='add'>+	 * and THREAD_SIZE takes us to the bottom.</div><div class='add'>+	 */</div><div class='add'>+	pushl	((TI_sysenter_return) - THREAD_SIZE + TOP_OF_KERNEL_STACK_PADDING + 4*4)(%esp)</div><div class='add'>+</div><div class='add'>+	pushl	%eax</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load the potential sixth argument from user stack.</div><div class='add'>+ * Careful about security.</div><div class='add'>+ */</div><div class='add'>+	cmpl	$__PAGE_OFFSET-3, %ebp</div><div class='add'>+	jae	syscall_fault</div><div class='add'>+	ASM_STAC</div><div class='add'>+1:	movl	(%ebp), %ebp</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	movl	%ebp, PT_EBP(%esp)</div><div class='add'>+	_ASM_EXTABLE(1b, syscall_fault)</div><div class='add'>+</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, TI_flags(%ebp)</div><div class='add'>+	jnz	sysenter_audit</div><div class='add'>+sysenter_do_call:</div><div class='add'>+	cmpl	$(NR_syscalls), %eax</div><div class='add'>+	jae	sysenter_badsys</div><div class='add'>+	call	*sys_call_table(, %eax, 4)</div><div class='add'>+sysenter_after_call:</div><div class='add'>+	movl	%eax, PT_EAX(%esp)</div><div class='add'>+	LOCKDEP_SYS_EXIT</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	TI_flags(%ebp), %ecx</div><div class='add'>+	testl	$_TIF_ALLWORK_MASK, %ecx</div><div class='add'>+	jnz	sysexit_audit</div><div class='add'>+sysenter_exit:</div><div class='add'>+/* if something modifies registers it must also disable sysexit */</div><div class='add'>+	movl	PT_EIP(%esp), %edx</div><div class='add'>+	movl	PT_OLDESP(%esp), %ecx</div><div class='add'>+	xorl	%ebp, %ebp</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+1:	mov	PT_FS(%esp), %fs</div><div class='add'>+	PTGS_TO_GS</div><div class='add'>+	ENABLE_INTERRUPTS_SYSEXIT</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AUDITSYSCALL</div><div class='add'>+sysenter_audit:</div><div class='add'>+	testl	$(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT), TI_flags(%ebp)</div><div class='add'>+	jnz	syscall_trace_entry</div><div class='add'>+	/* movl	PT_EAX(%esp), %eax already set, syscall number: 1st arg to audit */</div><div class='add'>+	movl	PT_EBX(%esp), %edx		/* ebx/a0: 2nd arg to audit */</div><div class='add'>+	/* movl	PT_ECX(%esp), %ecx already set, a1: 3nd arg to audit */</div><div class='add'>+	pushl	PT_ESI(%esp)			/* a3: 5th arg */</div><div class='add'>+	pushl	PT_EDX+4(%esp)			/* a2: 4th arg */</div><div class='add'>+	call	__audit_syscall_entry</div><div class='add'>+	popl	%ecx				/* get that remapped edx off the stack */</div><div class='add'>+	popl	%ecx				/* get that remapped esi off the stack */</div><div class='add'>+	movl	PT_EAX(%esp), %eax		/* reload syscall number */</div><div class='add'>+	jmp	sysenter_do_call</div><div class='add'>+</div><div class='add'>+sysexit_audit:</div><div class='add'>+	testl	$(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), %ecx</div><div class='add'>+	jnz	syscall_exit_work</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_ANY)</div><div class='add'>+	movl	%eax, %edx			/* second arg, syscall return value */</div><div class='add'>+	cmpl	$-MAX_ERRNO, %eax		/* is it an error ? */</div><div class='add'>+	setbe %al				/* 1 if so, 0 if not */</div><div class='add'>+	movzbl %al, %eax			/* zero-extend that */</div><div class='add'>+	call	__audit_syscall_exit</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	TI_flags(%ebp), %ecx</div><div class='add'>+	testl	$(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), %ecx</div><div class='add'>+	jnz	syscall_exit_work</div><div class='add'>+	movl	PT_EAX(%esp), %eax		/* reload syscall return value */</div><div class='add'>+	jmp	sysenter_exit</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.pushsection .fixup, "ax"</div><div class='add'>+2:	movl	$0, PT_FS(%esp)</div><div class='add'>+	jmp	1b</div><div class='add'>+.popsection</div><div class='add'>+	_ASM_EXTABLE(1b, 2b)</div><div class='add'>+	PTGS_TO_GS_EX</div><div class='add'>+ENDPROC(entry_SYSENTER_32)</div><div class='add'>+</div><div class='add'>+	# system call handler stub</div><div class='add'>+ENTRY(entry_INT80_32)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	%eax				# save orig_eax</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+						# system call tracing in operation / emulation</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, TI_flags(%ebp)</div><div class='add'>+	jnz	syscall_trace_entry</div><div class='add'>+	cmpl	$(NR_syscalls), %eax</div><div class='add'>+	jae	syscall_badsys</div><div class='add'>+syscall_call:</div><div class='add'>+	call	*sys_call_table(, %eax, 4)</div><div class='add'>+syscall_after_call:</div><div class='add'>+	movl	%eax, PT_EAX(%esp)		# store the return value</div><div class='add'>+syscall_exit:</div><div class='add'>+	LOCKDEP_SYS_EXIT</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)		# make sure we don't miss an interrupt</div><div class='add'>+						# setting need_resched or sigpending</div><div class='add'>+						# between sampling and the iret</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	TI_flags(%ebp), %ecx</div><div class='add'>+	testl	$_TIF_ALLWORK_MASK, %ecx	# current-&gt;work</div><div class='add'>+	jnz	syscall_exit_work</div><div class='add'>+</div><div class='add'>+restore_all:</div><div class='add'>+	TRACE_IRQS_IRET</div><div class='add'>+restore_all_notrace:</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+	movl	PT_EFLAGS(%esp), %eax		# mix EFLAGS, SS and CS</div><div class='add'>+	/*</div><div class='add'>+	 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we</div><div class='add'>+	 * are returning to the kernel.</div><div class='add'>+	 * See comments in process.c:copy_thread() for details.</div><div class='add'>+	 */</div><div class='add'>+	movb	PT_OLDSS(%esp), %ah</div><div class='add'>+	movb	PT_CS(%esp), %al</div><div class='add'>+	andl	$(X86_EFLAGS_VM | (SEGMENT_TI_MASK &lt;&lt; 8) | SEGMENT_RPL_MASK), %eax</div><div class='add'>+	cmpl	$((SEGMENT_LDT &lt;&lt; 8) | USER_RPL), %eax</div><div class='add'>+	je ldt_ss				# returning to user-space with LDT SS</div><div class='add'>+#endif</div><div class='add'>+restore_nocheck:</div><div class='add'>+	RESTORE_REGS 4				# skip orig_eax/error_code</div><div class='add'>+irq_return:</div><div class='add'>+	INTERRUPT_RETURN</div><div class='add'>+.section .fixup, "ax"</div><div class='add'>+ENTRY(iret_exc	)</div><div class='add'>+	pushl	$0				# no error code</div><div class='add'>+	pushl	$do_iret_error</div><div class='add'>+	jmp	error_code</div><div class='add'>+.previous</div><div class='add'>+	_ASM_EXTABLE(irq_return, iret_exc)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+ldt_ss:</div><div class='add'>+#ifdef CONFIG_PARAVIRT</div><div class='add'>+	/*</div><div class='add'>+	 * The kernel can't run on a non-flat stack if paravirt mode</div><div class='add'>+	 * is active.  Rather than try to fixup the high bits of</div><div class='add'>+	 * ESP, bypass this code entirely.  This may break DOSemu</div><div class='add'>+	 * and/or Wine support in a paravirt VM, although the option</div><div class='add'>+	 * is still available to implement the setting of the high</div><div class='add'>+	 * 16-bits in the INTERRUPT_RETURN paravirt-op.</div><div class='add'>+	 */</div><div class='add'>+	cmpl	$0, pv_info+PARAVIRT_enabled</div><div class='add'>+	jne	restore_nocheck</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Setup and switch to ESPFIX stack</div><div class='add'>+ *</div><div class='add'>+ * We're returning to userspace with a 16 bit stack. The CPU will not</div><div class='add'>+ * restore the high word of ESP for us on executing iret... This is an</div><div class='add'>+ * "official" bug of all the x86-compatible CPUs, which we can work</div><div class='add'>+ * around to make dosemu and wine happy. We do this by preloading the</div><div class='add'>+ * high word of ESP with the high word of the userspace ESP while</div><div class='add'>+ * compensating for the offset by changing to the ESPFIX segment with</div><div class='add'>+ * a base address that matches for the difference.</div><div class='add'>+ */</div><div class='add'>+#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)</div><div class='add'>+	mov	%esp, %edx			/* load kernel esp */</div><div class='add'>+	mov	PT_OLDESP(%esp), %eax		/* load userspace esp */</div><div class='add'>+	mov	%dx, %ax			/* eax: new kernel esp */</div><div class='add'>+	sub	%eax, %edx			/* offset (low word is 0) */</div><div class='add'>+	shr	$16, %edx</div><div class='add'>+	mov	%dl, GDT_ESPFIX_SS + 4		/* bits 16..23 */</div><div class='add'>+	mov	%dh, GDT_ESPFIX_SS + 7		/* bits 24..31 */</div><div class='add'>+	pushl	$__ESPFIX_SS</div><div class='add'>+	pushl	%eax				/* new kernel esp */</div><div class='add'>+	/*</div><div class='add'>+	 * Disable interrupts, but do not irqtrace this section: we</div><div class='add'>+	 * will soon execute iret and the tracer was already set to</div><div class='add'>+	 * the irqstate after the IRET:</div><div class='add'>+	 */</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_EAX)</div><div class='add'>+	lss	(%esp), %esp			/* switch to espfix segment */</div><div class='add'>+	jmp	restore_nocheck</div><div class='add'>+#endif</div><div class='add'>+ENDPROC(entry_INT80_32)</div><div class='add'>+</div><div class='add'>+	# perform work that needs to be done immediately before resumption</div><div class='add'>+	ALIGN</div><div class='add'>+work_pending:</div><div class='add'>+	testb	$_TIF_NEED_RESCHED, %cl</div><div class='add'>+	jz	work_notifysig</div><div class='add'>+work_resched:</div><div class='add'>+	call	schedule</div><div class='add'>+	LOCKDEP_SYS_EXIT</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_ANY)		# make sure we don't miss an interrupt</div><div class='add'>+						# setting need_resched or sigpending</div><div class='add'>+						# between sampling and the iret</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	TI_flags(%ebp), %ecx</div><div class='add'>+	andl	$_TIF_WORK_MASK, %ecx		# is there any work to be done other</div><div class='add'>+						# than syscall tracing?</div><div class='add'>+	jz	restore_all</div><div class='add'>+	testb	$_TIF_NEED_RESCHED, %cl</div><div class='add'>+	jnz	work_resched</div><div class='add'>+</div><div class='add'>+work_notifysig:					# deal with pending signals and</div><div class='add'>+						# notify-resume requests</div><div class='add'>+#ifdef CONFIG_VM86</div><div class='add'>+	testl	$X86_EFLAGS_VM, PT_EFLAGS(%esp)</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+	jnz	work_notifysig_v86		# returning to kernel-space or</div><div class='add'>+						# vm86-space</div><div class='add'>+1:</div><div class='add'>+#else</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+#endif</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	movb	PT_CS(%esp), %bl</div><div class='add'>+	andb	$SEGMENT_RPL_MASK, %bl</div><div class='add'>+	cmpb	$USER_RPL, %bl</div><div class='add'>+	jb	resume_kernel</div><div class='add'>+	xorl	%edx, %edx</div><div class='add'>+	call	do_notify_resume</div><div class='add'>+	jmp	resume_userspace</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_VM86</div><div class='add'>+	ALIGN</div><div class='add'>+work_notifysig_v86:</div><div class='add'>+	pushl	%ecx				# save ti_flags for do_notify_resume</div><div class='add'>+	call	save_v86_state			# %eax contains pt_regs pointer</div><div class='add'>+	popl	%ecx</div><div class='add'>+	movl	%eax, %esp</div><div class='add'>+	jmp	1b</div><div class='add'>+#endif</div><div class='add'>+END(work_pending)</div><div class='add'>+</div><div class='add'>+	# perform syscall exit tracing</div><div class='add'>+	ALIGN</div><div class='add'>+syscall_trace_entry:</div><div class='add'>+	movl	$-ENOSYS, PT_EAX(%esp)</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+	call	syscall_trace_enter</div><div class='add'>+	/* What it returned is what we'll actually use.  */</div><div class='add'>+	cmpl	$(NR_syscalls), %eax</div><div class='add'>+	jnae	syscall_call</div><div class='add'>+	jmp	syscall_exit</div><div class='add'>+END(syscall_trace_entry)</div><div class='add'>+</div><div class='add'>+	# perform syscall exit tracing</div><div class='add'>+	ALIGN</div><div class='add'>+syscall_exit_work:</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_EXIT, %ecx</div><div class='add'>+	jz	work_pending</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_ANY)		# could let syscall_trace_leave() call</div><div class='add'>+						# schedule() instead</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+	call	syscall_trace_leave</div><div class='add'>+	jmp	resume_userspace</div><div class='add'>+END(syscall_exit_work)</div><div class='add'>+</div><div class='add'>+syscall_fault:</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	GET_THREAD_INFO(%ebp)</div><div class='add'>+	movl	$-EFAULT, PT_EAX(%esp)</div><div class='add'>+	jmp	resume_userspace</div><div class='add'>+END(syscall_fault)</div><div class='add'>+</div><div class='add'>+syscall_badsys:</div><div class='add'>+	movl	$-ENOSYS, %eax</div><div class='add'>+	jmp	syscall_after_call</div><div class='add'>+END(syscall_badsys)</div><div class='add'>+</div><div class='add'>+sysenter_badsys:</div><div class='add'>+	movl	$-ENOSYS, %eax</div><div class='add'>+	jmp	sysenter_after_call</div><div class='add'>+END(sysenter_badsys)</div><div class='add'>+</div><div class='add'>+.macro FIXUP_ESPFIX_STACK</div><div class='add'>+/*</div><div class='add'>+ * Switch back for ESPFIX stack to the normal zerobased stack</div><div class='add'>+ *</div><div class='add'>+ * We can't call C functions using the ESPFIX stack. This code reads</div><div class='add'>+ * the high word of the segment base from the GDT and swiches to the</div><div class='add'>+ * normal stack and adjusts ESP with the matching offset.</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+	/* fixup the stack */</div><div class='add'>+	mov	GDT_ESPFIX_SS + 4, %al /* bits 16..23 */</div><div class='add'>+	mov	GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */</div><div class='add'>+	shl	$16, %eax</div><div class='add'>+	addl	%esp, %eax			/* the adjusted stack pointer */</div><div class='add'>+	pushl	$__KERNEL_DS</div><div class='add'>+	pushl	%eax</div><div class='add'>+	lss	(%esp), %esp			/* switch to the normal stack segment */</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+.macro UNWIND_ESPFIX_STACK</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+	movl	%ss, %eax</div><div class='add'>+	/* see if on espfix stack */</div><div class='add'>+	cmpw	$__ESPFIX_SS, %ax</div><div class='add'>+	jne	27f</div><div class='add'>+	movl	$__KERNEL_DS, %eax</div><div class='add'>+	movl	%eax, %ds</div><div class='add'>+	movl	%eax, %es</div><div class='add'>+	/* switch to normal stack */</div><div class='add'>+	FIXUP_ESPFIX_STACK</div><div class='add'>+27:</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Build the entry stubs with some assembler magic.</div><div class='add'>+ * We pack 1 stub into every 8-byte block.</div><div class='add'>+ */</div><div class='add'>+	.align 8</div><div class='add'>+ENTRY(irq_entries_start)</div><div class='add'>+    vector=FIRST_EXTERNAL_VECTOR</div><div class='add'>+    .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)</div><div class='add'>+	pushl	$(~vector+0x80)			/* Note: always in signed byte range */</div><div class='add'>+    vector=vector+1</div><div class='add'>+	jmp	common_interrupt</div><div class='add'>+	.align	8</div><div class='add'>+    .endr</div><div class='add'>+END(irq_entries_start)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * the CPU automatically disables interrupts when executing an IRQ vector,</div><div class='add'>+ * so IRQ-flags tracing has to follow that:</div><div class='add'>+ */</div><div class='add'>+	.p2align CONFIG_X86_L1_CACHE_SHIFT</div><div class='add'>+common_interrupt:</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	addl	$-0x80, (%esp)			/* Adjust vector into the [-256, -1] range */</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+	call	do_IRQ</div><div class='add'>+	jmp	ret_from_intr</div><div class='add'>+ENDPROC(common_interrupt)</div><div class='add'>+</div><div class='add'>+#define BUILD_INTERRUPT3(name, nr, fn)	\</div><div class='add'>+ENTRY(name)				\</div><div class='add'>+	ASM_CLAC;			\</div><div class='add'>+	pushl	$~(nr);			\</div><div class='add'>+	SAVE_ALL;			\</div><div class='add'>+	TRACE_IRQS_OFF			\</div><div class='add'>+	movl	%esp, %eax;		\</div><div class='add'>+	call	fn;			\</div><div class='add'>+	jmp	ret_from_intr;		\</div><div class='add'>+ENDPROC(name)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TRACING</div><div class='add'>+# define TRACE_BUILD_INTERRUPT(name, nr)	BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)</div><div class='add'>+#else</div><div class='add'>+# define TRACE_BUILD_INTERRUPT(name, nr)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define BUILD_INTERRUPT(name, nr)		\</div><div class='add'>+	BUILD_INTERRUPT3(name, nr, smp_##name);	\</div><div class='add'>+	TRACE_BUILD_INTERRUPT(name, nr)</div><div class='add'>+</div><div class='add'>+/* The include is where all of the SMP etc. interrupts come from */</div><div class='add'>+#include &lt;asm/entry_arch.h&gt;</div><div class='add'>+</div><div class='add'>+ENTRY(coprocessor_error)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_coprocessor_error</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(coprocessor_error)</div><div class='add'>+</div><div class='add'>+ENTRY(simd_coprocessor_error)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+#ifdef CONFIG_X86_INVD_BUG</div><div class='add'>+	/* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */</div><div class='add'>+	ALTERNATIVE "pushl	$do_general_protection",	\</div><div class='add'>+		    "pushl	$do_simd_coprocessor_error",	\</div><div class='add'>+		    X86_FEATURE_XMM</div><div class='add'>+#else</div><div class='add'>+	pushl	$do_simd_coprocessor_error</div><div class='add'>+#endif</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(simd_coprocessor_error)</div><div class='add'>+</div><div class='add'>+ENTRY(device_not_available)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$-1				# mark this as an int</div><div class='add'>+	pushl	$do_device_not_available</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(device_not_available)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PARAVIRT</div><div class='add'>+ENTRY(native_iret)</div><div class='add'>+	iret</div><div class='add'>+	_ASM_EXTABLE(native_iret, iret_exc)</div><div class='add'>+END(native_iret)</div><div class='add'>+</div><div class='add'>+ENTRY(native_irq_enable_sysexit)</div><div class='add'>+	sti</div><div class='add'>+	sysexit</div><div class='add'>+END(native_irq_enable_sysexit)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ENTRY(overflow)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_overflow</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(overflow)</div><div class='add'>+</div><div class='add'>+ENTRY(bounds)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_bounds</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(bounds)</div><div class='add'>+</div><div class='add'>+ENTRY(invalid_op)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_invalid_op</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(invalid_op)</div><div class='add'>+</div><div class='add'>+ENTRY(coprocessor_segment_overrun)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_coprocessor_segment_overrun</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(coprocessor_segment_overrun)</div><div class='add'>+</div><div class='add'>+ENTRY(invalid_TSS)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_invalid_TSS</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(invalid_TSS)</div><div class='add'>+</div><div class='add'>+ENTRY(segment_not_present)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_segment_not_present</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(segment_not_present)</div><div class='add'>+</div><div class='add'>+ENTRY(stack_segment)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_stack_segment</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(stack_segment)</div><div class='add'>+</div><div class='add'>+ENTRY(alignment_check)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_alignment_check</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(alignment_check)</div><div class='add'>+</div><div class='add'>+ENTRY(divide_error)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0				# no error code</div><div class='add'>+	pushl	$do_divide_error</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(divide_error)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_MCE</div><div class='add'>+ENTRY(machine_check)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	machine_check_vector</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(machine_check)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ENTRY(spurious_interrupt_bug)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$0</div><div class='add'>+	pushl	$do_spurious_interrupt_bug</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(spurious_interrupt_bug)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_XEN</div><div class='add'>+/*</div><div class='add'>+ * Xen doesn't set %esp to be precisely what the normal SYSENTER</div><div class='add'>+ * entry point expects, so fix it up before using the normal path.</div><div class='add'>+ */</div><div class='add'>+ENTRY(xen_sysenter_target)</div><div class='add'>+	addl	$5*4, %esp			/* remove xen-provided frame */</div><div class='add'>+	jmp	sysenter_past_esp</div><div class='add'>+</div><div class='add'>+ENTRY(xen_hypervisor_callback)</div><div class='add'>+	pushl	$-1				/* orig_ax = -1 =&gt; not a system call */</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check to see if we got the event in the critical</div><div class='add'>+	 * region in xen_iret_direct, after we've reenabled</div><div class='add'>+	 * events and checked for pending events.  This simulates</div><div class='add'>+	 * iret instruction's behaviour where it delivers a</div><div class='add'>+	 * pending interrupt when enabling interrupts:</div><div class='add'>+	 */</div><div class='add'>+	movl	PT_EIP(%esp), %eax</div><div class='add'>+	cmpl	$xen_iret_start_crit, %eax</div><div class='add'>+	jb	1f</div><div class='add'>+	cmpl	$xen_iret_end_crit, %eax</div><div class='add'>+	jae	1f</div><div class='add'>+</div><div class='add'>+	jmp	xen_iret_crit_fixup</div><div class='add'>+</div><div class='add'>+ENTRY(xen_do_upcall)</div><div class='add'>+1:	mov	%esp, %eax</div><div class='add'>+	call	xen_evtchn_do_upcall</div><div class='add'>+#ifndef CONFIG_PREEMPT</div><div class='add'>+	call	xen_maybe_preempt_hcall</div><div class='add'>+#endif</div><div class='add'>+	jmp	ret_from_intr</div><div class='add'>+ENDPROC(xen_hypervisor_callback)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Hypervisor uses this for application faults while it executes.</div><div class='add'>+ * We get here for two reasons:</div><div class='add'>+ *  1. Fault while reloading DS, ES, FS or GS</div><div class='add'>+ *  2. Fault while executing IRET</div><div class='add'>+ * Category 1 we fix up by reattempting the load, and zeroing the segment</div><div class='add'>+ * register if the load fails.</div><div class='add'>+ * Category 2 we fix up by jumping to do_iret_error. We cannot use the</div><div class='add'>+ * normal Linux return path in this case because if we use the IRET hypercall</div><div class='add'>+ * to pop the stack frame we end up in an infinite loop of failsafe callbacks.</div><div class='add'>+ * We distinguish between categories by maintaining a status value in EAX.</div><div class='add'>+ */</div><div class='add'>+ENTRY(xen_failsafe_callback)</div><div class='add'>+	pushl	%eax</div><div class='add'>+	movl	$1, %eax</div><div class='add'>+1:	mov	4(%esp), %ds</div><div class='add'>+2:	mov	8(%esp), %es</div><div class='add'>+3:	mov	12(%esp), %fs</div><div class='add'>+4:	mov	16(%esp), %gs</div><div class='add'>+	/* EAX == 0 =&gt; Category 1 (Bad segment)</div><div class='add'>+	   EAX != 0 =&gt; Category 2 (Bad IRET) */</div><div class='add'>+	testl	%eax, %eax</div><div class='add'>+	popl	%eax</div><div class='add'>+	lea	16(%esp), %esp</div><div class='add'>+	jz	5f</div><div class='add'>+	jmp	iret_exc</div><div class='add'>+5:	pushl	$-1				/* orig_ax = -1 =&gt; not a system call */</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	jmp	ret_from_exception</div><div class='add'>+</div><div class='add'>+.section .fixup, "ax"</div><div class='add'>+6:	xorl	%eax, %eax</div><div class='add'>+	movl	%eax, 4(%esp)</div><div class='add'>+	jmp	1b</div><div class='add'>+7:	xorl	%eax, %eax</div><div class='add'>+	movl	%eax, 8(%esp)</div><div class='add'>+	jmp	2b</div><div class='add'>+8:	xorl	%eax, %eax</div><div class='add'>+	movl	%eax, 12(%esp)</div><div class='add'>+	jmp	3b</div><div class='add'>+9:	xorl	%eax, %eax</div><div class='add'>+	movl	%eax, 16(%esp)</div><div class='add'>+	jmp	4b</div><div class='add'>+.previous</div><div class='add'>+	_ASM_EXTABLE(1b, 6b)</div><div class='add'>+	_ASM_EXTABLE(2b, 7b)</div><div class='add'>+	_ASM_EXTABLE(3b, 8b)</div><div class='add'>+	_ASM_EXTABLE(4b, 9b)</div><div class='add'>+ENDPROC(xen_failsafe_callback)</div><div class='add'>+</div><div class='add'>+BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,</div><div class='add'>+		xen_evtchn_do_upcall)</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_XEN */</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_HYPERV)</div><div class='add'>+</div><div class='add'>+BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,</div><div class='add'>+	hyperv_vector_handler)</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_HYPERV */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FUNCTION_TRACER</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='add'>+</div><div class='add'>+ENTRY(mcount)</div><div class='add'>+	ret</div><div class='add'>+END(mcount)</div><div class='add'>+</div><div class='add'>+ENTRY(ftrace_caller)</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%edx</div><div class='add'>+	pushl	$0				/* Pass NULL as regs pointer */</div><div class='add'>+	movl	4*4(%esp), %eax</div><div class='add'>+	movl	0x4(%ebp), %edx</div><div class='add'>+	movl	function_trace_op, %ecx</div><div class='add'>+	subl	$MCOUNT_INSN_SIZE, %eax</div><div class='add'>+</div><div class='add'>+.globl ftrace_call</div><div class='add'>+ftrace_call:</div><div class='add'>+	call	ftrace_stub</div><div class='add'>+</div><div class='add'>+	addl	$4, %esp			/* skip NULL pointer */</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%ecx</div><div class='add'>+	popl	%eax</div><div class='add'>+ftrace_ret:</div><div class='add'>+#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='add'>+.globl ftrace_graph_call</div><div class='add'>+ftrace_graph_call:</div><div class='add'>+	jmp	ftrace_stub</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+.globl ftrace_stub</div><div class='add'>+ftrace_stub:</div><div class='add'>+	ret</div><div class='add'>+END(ftrace_caller)</div><div class='add'>+</div><div class='add'>+ENTRY(ftrace_regs_caller)</div><div class='add'>+	pushf	/* push flags before compare (in cs location) */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * i386 does not save SS and ESP when coming from kernel.</div><div class='add'>+	 * Instead, to get sp, &amp;regs-&gt;sp is used (see ptrace.h).</div><div class='add'>+	 * Unfortunately, that means eflags must be at the same location</div><div class='add'>+	 * as the current return ip is. We move the return ip into the</div><div class='add'>+	 * ip location, and move flags into the return ip location.</div><div class='add'>+	 */</div><div class='add'>+	pushl	4(%esp)				/* save return ip into ip slot */</div><div class='add'>+</div><div class='add'>+	pushl	$0				/* Load 0 into orig_ax */</div><div class='add'>+	pushl	%gs</div><div class='add'>+	pushl	%fs</div><div class='add'>+	pushl	%es</div><div class='add'>+	pushl	%ds</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ebp</div><div class='add'>+	pushl	%edi</div><div class='add'>+	pushl	%esi</div><div class='add'>+	pushl	%edx</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%ebx</div><div class='add'>+</div><div class='add'>+	movl	13*4(%esp), %eax		/* Get the saved flags */</div><div class='add'>+	movl	%eax, 14*4(%esp)		/* Move saved flags into regs-&gt;flags location */</div><div class='add'>+						/* clobbering return ip */</div><div class='add'>+	movl	$__KERNEL_CS, 13*4(%esp)</div><div class='add'>+</div><div class='add'>+	movl	12*4(%esp), %eax		/* Load ip (1st parameter) */</div><div class='add'>+	subl	$MCOUNT_INSN_SIZE, %eax		/* Adjust ip */</div><div class='add'>+	movl	0x4(%ebp), %edx			/* Load parent ip (2nd parameter) */</div><div class='add'>+	movl	function_trace_op, %ecx		/* Save ftrace_pos in 3rd parameter */</div><div class='add'>+	pushl	%esp				/* Save pt_regs as 4th parameter */</div><div class='add'>+</div><div class='add'>+GLOBAL(ftrace_regs_call)</div><div class='add'>+	call	ftrace_stub</div><div class='add'>+</div><div class='add'>+	addl	$4, %esp			/* Skip pt_regs */</div><div class='add'>+	movl	14*4(%esp), %eax		/* Move flags back into cs */</div><div class='add'>+	movl	%eax, 13*4(%esp)		/* Needed to keep addl	from modifying flags */</div><div class='add'>+	movl	12*4(%esp), %eax		/* Get return ip from regs-&gt;ip */</div><div class='add'>+	movl	%eax, 14*4(%esp)		/* Put return ip back for ret */</div><div class='add'>+</div><div class='add'>+	popl	%ebx</div><div class='add'>+	popl	%ecx</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%esi</div><div class='add'>+	popl	%edi</div><div class='add'>+	popl	%ebp</div><div class='add'>+	popl	%eax</div><div class='add'>+	popl	%ds</div><div class='add'>+	popl	%es</div><div class='add'>+	popl	%fs</div><div class='add'>+	popl	%gs</div><div class='add'>+	addl	$8, %esp			/* Skip orig_ax and ip */</div><div class='add'>+	popf					/* Pop flags at end (no addl to corrupt flags) */</div><div class='add'>+	jmp	ftrace_ret</div><div class='add'>+</div><div class='add'>+	popf</div><div class='add'>+	jmp	ftrace_stub</div><div class='add'>+#else /* ! CONFIG_DYNAMIC_FTRACE */</div><div class='add'>+</div><div class='add'>+ENTRY(mcount)</div><div class='add'>+	cmpl	$__PAGE_OFFSET, %esp</div><div class='add'>+	jb	ftrace_stub			/* Paging not enabled yet? */</div><div class='add'>+</div><div class='add'>+	cmpl	$ftrace_stub, ftrace_trace_function</div><div class='add'>+	jnz	trace</div><div class='add'>+#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='add'>+	cmpl	$ftrace_stub, ftrace_graph_return</div><div class='add'>+	jnz	ftrace_graph_caller</div><div class='add'>+</div><div class='add'>+	cmpl	$ftrace_graph_entry_stub, ftrace_graph_entry</div><div class='add'>+	jnz	ftrace_graph_caller</div><div class='add'>+#endif</div><div class='add'>+.globl ftrace_stub</div><div class='add'>+ftrace_stub:</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+	/* taken from glibc */</div><div class='add'>+trace:</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%edx</div><div class='add'>+	movl	0xc(%esp), %eax</div><div class='add'>+	movl	0x4(%ebp), %edx</div><div class='add'>+	subl	$MCOUNT_INSN_SIZE, %eax</div><div class='add'>+</div><div class='add'>+	call	*ftrace_trace_function</div><div class='add'>+</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%ecx</div><div class='add'>+	popl	%eax</div><div class='add'>+	jmp	ftrace_stub</div><div class='add'>+END(mcount)</div><div class='add'>+#endif /* CONFIG_DYNAMIC_FTRACE */</div><div class='add'>+#endif /* CONFIG_FUNCTION_TRACER */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='add'>+ENTRY(ftrace_graph_caller)</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%edx</div><div class='add'>+	movl	0xc(%esp), %eax</div><div class='add'>+	lea	0x4(%ebp), %edx</div><div class='add'>+	movl	(%ebp), %ecx</div><div class='add'>+	subl	$MCOUNT_INSN_SIZE, %eax</div><div class='add'>+	call	prepare_ftrace_return</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%ecx</div><div class='add'>+	popl	%eax</div><div class='add'>+	ret</div><div class='add'>+END(ftrace_graph_caller)</div><div class='add'>+</div><div class='add'>+.globl return_to_handler</div><div class='add'>+return_to_handler:</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%edx</div><div class='add'>+	movl	%ebp, %eax</div><div class='add'>+	call	ftrace_return_to_handler</div><div class='add'>+	movl	%eax, %ecx</div><div class='add'>+	popl	%edx</div><div class='add'>+	popl	%eax</div><div class='add'>+	jmp	*%ecx</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TRACING</div><div class='add'>+ENTRY(trace_page_fault)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$trace_do_page_fault</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(trace_page_fault)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ENTRY(page_fault)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_page_fault</div><div class='add'>+	ALIGN</div><div class='add'>+error_code:</div><div class='add'>+	/* the function address is in %gs's slot on the stack */</div><div class='add'>+	pushl	%fs</div><div class='add'>+	pushl	%es</div><div class='add'>+	pushl	%ds</div><div class='add'>+	pushl	%eax</div><div class='add'>+	pushl	%ebp</div><div class='add'>+	pushl	%edi</div><div class='add'>+	pushl	%esi</div><div class='add'>+	pushl	%edx</div><div class='add'>+	pushl	%ecx</div><div class='add'>+	pushl	%ebx</div><div class='add'>+	cld</div><div class='add'>+	movl	$(__KERNEL_PERCPU), %ecx</div><div class='add'>+	movl	%ecx, %fs</div><div class='add'>+	UNWIND_ESPFIX_STACK</div><div class='add'>+	GS_TO_REG %ecx</div><div class='add'>+	movl	PT_GS(%esp), %edi		# get the function address</div><div class='add'>+	movl	PT_ORIG_EAX(%esp), %edx		# get the error code</div><div class='add'>+	movl	$-1, PT_ORIG_EAX(%esp)		# no syscall to restart</div><div class='add'>+	REG_TO_PTGS %ecx</div><div class='add'>+	SET_KERNEL_GS %ecx</div><div class='add'>+	movl	$(__USER_DS), %ecx</div><div class='add'>+	movl	%ecx, %ds</div><div class='add'>+	movl	%ecx, %es</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	movl	%esp, %eax			# pt_regs pointer</div><div class='add'>+	call	*%edi</div><div class='add'>+	jmp	ret_from_exception</div><div class='add'>+END(page_fault)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Debug traps and NMI can happen at the one SYSENTER instruction</div><div class='add'>+ * that sets up the real kernel stack. Check here, since we can't</div><div class='add'>+ * allow the wrong stack to be used.</div><div class='add'>+ *</div><div class='add'>+ * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have</div><div class='add'>+ * already pushed 3 words if it hits on the sysenter instruction:</div><div class='add'>+ * eflags, cs and eip.</div><div class='add'>+ *</div><div class='add'>+ * We just load the right stack, and push the three (known) values</div><div class='add'>+ * by hand onto the new stack - while updating the return eip past</div><div class='add'>+ * the instruction that would have done it for sysenter.</div><div class='add'>+ */</div><div class='add'>+.macro FIX_STACK offset ok label</div><div class='add'>+	cmpw	$__KERNEL_CS, 4(%esp)</div><div class='add'>+	jne	\ok</div><div class='add'>+\label:</div><div class='add'>+	movl	TSS_sysenter_sp0 + \offset(%esp), %esp</div><div class='add'>+	pushfl</div><div class='add'>+	pushl	$__KERNEL_CS</div><div class='add'>+	pushl	$sysenter_past_esp</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+ENTRY(debug)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	cmpl	$entry_SYSENTER_32, (%esp)</div><div class='add'>+	jne	debug_stack_correct</div><div class='add'>+	FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn</div><div class='add'>+debug_stack_correct:</div><div class='add'>+	pushl	$-1				# mark this as an int</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	xorl	%edx, %edx			# error code 0</div><div class='add'>+	movl	%esp, %eax			# pt_regs pointer</div><div class='add'>+	call	do_debug</div><div class='add'>+	jmp	ret_from_exception</div><div class='add'>+END(debug)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * NMI is doubly nasty. It can happen _while_ we're handling</div><div class='add'>+ * a debug fault, and the debug fault hasn't yet been able to</div><div class='add'>+ * clear up the stack. So we first check whether we got  an</div><div class='add'>+ * NMI on the sysenter entry path, but after that we need to</div><div class='add'>+ * check whether we got an NMI on the debug path where the debug</div><div class='add'>+ * fault happened on the sysenter path.</div><div class='add'>+ */</div><div class='add'>+ENTRY(nmi)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+	pushl	%eax</div><div class='add'>+	movl	%ss, %eax</div><div class='add'>+	cmpw	$__ESPFIX_SS, %ax</div><div class='add'>+	popl	%eax</div><div class='add'>+	je	nmi_espfix_stack</div><div class='add'>+#endif</div><div class='add'>+	cmpl	$entry_SYSENTER_32, (%esp)</div><div class='add'>+	je	nmi_stack_fixup</div><div class='add'>+	pushl	%eax</div><div class='add'>+	movl	%esp, %eax</div><div class='add'>+	/*</div><div class='add'>+	 * Do not access memory above the end of our stack page,</div><div class='add'>+	 * it might not exist.</div><div class='add'>+	 */</div><div class='add'>+	andl	$(THREAD_SIZE-1), %eax</div><div class='add'>+	cmpl	$(THREAD_SIZE-20), %eax</div><div class='add'>+	popl	%eax</div><div class='add'>+	jae	nmi_stack_correct</div><div class='add'>+	cmpl	$entry_SYSENTER_32, 12(%esp)</div><div class='add'>+	je	nmi_debug_stack_check</div><div class='add'>+nmi_stack_correct:</div><div class='add'>+	pushl	%eax</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	xorl	%edx, %edx			# zero error code</div><div class='add'>+	movl	%esp, %eax			# pt_regs pointer</div><div class='add'>+	call	do_nmi</div><div class='add'>+	jmp	restore_all_notrace</div><div class='add'>+</div><div class='add'>+nmi_stack_fixup:</div><div class='add'>+	FIX_STACK 12, nmi_stack_correct, 1</div><div class='add'>+	jmp	nmi_stack_correct</div><div class='add'>+</div><div class='add'>+nmi_debug_stack_check:</div><div class='add'>+	cmpw	$__KERNEL_CS, 16(%esp)</div><div class='add'>+	jne	nmi_stack_correct</div><div class='add'>+	cmpl	$debug, (%esp)</div><div class='add'>+	jb	nmi_stack_correct</div><div class='add'>+	cmpl	$debug_esp_fix_insn, (%esp)</div><div class='add'>+	ja	nmi_stack_correct</div><div class='add'>+	FIX_STACK 24, nmi_stack_correct, 1</div><div class='add'>+	jmp	nmi_stack_correct</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX32</div><div class='add'>+nmi_espfix_stack:</div><div class='add'>+	/*</div><div class='add'>+	 * create the pointer to lss back</div><div class='add'>+	 */</div><div class='add'>+	pushl	%ss</div><div class='add'>+	pushl	%esp</div><div class='add'>+	addl	$4, (%esp)</div><div class='add'>+	/* copy the iret frame of 12 bytes */</div><div class='add'>+	.rept 3</div><div class='add'>+	pushl	16(%esp)</div><div class='add'>+	.endr</div><div class='add'>+	pushl	%eax</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	FIXUP_ESPFIX_STACK			# %eax == %esp</div><div class='add'>+	xorl	%edx, %edx			# zero error code</div><div class='add'>+	call	do_nmi</div><div class='add'>+	RESTORE_REGS</div><div class='add'>+	lss	12+4(%esp), %esp		# back to espfix stack</div><div class='add'>+	jmp	irq_return</div><div class='add'>+#endif</div><div class='add'>+END(nmi)</div><div class='add'>+</div><div class='add'>+ENTRY(int3)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$-1				# mark this as an int</div><div class='add'>+	SAVE_ALL</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	xorl	%edx, %edx			# zero error code</div><div class='add'>+	movl	%esp, %eax			# pt_regs pointer</div><div class='add'>+	call	do_int3</div><div class='add'>+	jmp	ret_from_exception</div><div class='add'>+END(int3)</div><div class='add'>+</div><div class='add'>+ENTRY(general_protection)</div><div class='add'>+	pushl	$do_general_protection</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(general_protection)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_GUEST</div><div class='add'>+ENTRY(async_page_fault)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	pushl	$do_async_page_fault</div><div class='add'>+	jmp	error_code</div><div class='add'>+END(async_page_fault)</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/entry/entry_64.S<br/>index 02c2eff7478d..8cb3e438f21e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/entry_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/entry_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/entry_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_64.S</a></div><div class='hunk'>@@ -4,34 +4,25 @@</div><div class='ctx'>  *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='ctx'>  *  Copyright (C) 2000, 2001, 2002  Andi Kleen SuSE Labs</div><div class='ctx'>  *  Copyright (C) 2000  Pavel Machek &lt;pavel@suse.cz&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='add'>+ *</div><div class='ctx'>  * entry.S contains the system-call and fault low-level handling routines.</div><div class='ctx'>  *</div><div class='ctx'>  * Some of this is documented in Documentation/x86/entry_64.txt</div><div class='ctx'>  *</div><div class='del'>- * NOTE: This code handles signal-recognition, which happens every time</div><div class='del'>- * after an interrupt and after each system call.</div><div class='del'>- *</div><div class='ctx'>  * A note on terminology:</div><div class='del'>- * - iret frame: Architecture defined interrupt frame from SS to RIP</div><div class='del'>- * at the top of the kernel process stack.</div><div class='add'>+ * - iret frame:	Architecture defined interrupt frame from SS to RIP</div><div class='add'>+ *			at the top of the kernel process stack.</div><div class='ctx'>  *</div><div class='ctx'>  * Some macro usage:</div><div class='del'>- * - CFI macros are used to generate dwarf2 unwind information for better</div><div class='del'>- * backtraces. They don't change any code.</div><div class='del'>- * - ENTRY/END Define functions in the symbol table.</div><div class='del'>- * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.</div><div class='del'>- * - idtentry - Define exception entry points.</div><div class='add'>+ * - ENTRY/END:		Define functions in the symbol table.</div><div class='add'>+ * - TRACE_IRQ_*:	Trace hardirq state for lock debugging.</div><div class='add'>+ * - idtentry:		Define exception entry points.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-#include &lt;asm/calling.h&gt;</div><div class='add'>+#include "calling.h"</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='hunk'>@@ -49,13 +40,12 @@</div><div class='ctx'> </div><div class='ctx'> /* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='ctx'> #include &lt;linux/elf-em.h&gt;</div><div class='del'>-#define AUDIT_ARCH_X86_64	(EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)</div><div class='del'>-#define __AUDIT_ARCH_64BIT 0x80000000</div><div class='del'>-#define __AUDIT_ARCH_LE	   0x40000000</div><div class='del'>-</div><div class='del'>-	.code64</div><div class='del'>-	.section .entry.text, "ax"</div><div class='add'>+#define AUDIT_ARCH_X86_64			(EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)</div><div class='add'>+#define __AUDIT_ARCH_64BIT			0x80000000</div><div class='add'>+#define __AUDIT_ARCH_LE				0x40000000</div><div class='ctx'> </div><div class='add'>+.code64</div><div class='add'>+.section .entry.text, "ax"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PARAVIRT</div><div class='ctx'> ENTRY(native_usergs_sysret64)</div><div class='hunk'>@@ -64,11 +54,10 @@ ENTRY(native_usergs_sysret64)</div><div class='ctx'> ENDPROC(native_usergs_sysret64)</div><div class='ctx'> #endif /* CONFIG_PARAVIRT */</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> .macro TRACE_IRQS_IRETQ</div><div class='ctx'> #ifdef CONFIG_TRACE_IRQFLAGS</div><div class='del'>-	bt   $9,EFLAGS(%rsp)	/* interrupts off? */</div><div class='del'>-	jnc  1f</div><div class='add'>+	bt	$9, EFLAGS(%rsp)		/* interrupts off? */</div><div class='add'>+	jnc	1f</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 1:</div><div class='ctx'> #endif</div><div class='hunk'>@@ -88,89 +77,34 @@ ENDPROC(native_usergs_sysret64)</div><div class='ctx'> #if defined(CONFIG_DYNAMIC_FTRACE) &amp;&amp; defined(CONFIG_TRACE_IRQFLAGS)</div><div class='ctx'> </div><div class='ctx'> .macro TRACE_IRQS_OFF_DEBUG</div><div class='del'>-	call debug_stack_set_zero</div><div class='add'>+	call	debug_stack_set_zero</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	call debug_stack_reset</div><div class='add'>+	call	debug_stack_reset</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro TRACE_IRQS_ON_DEBUG</div><div class='del'>-	call debug_stack_set_zero</div><div class='add'>+	call	debug_stack_set_zero</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='del'>-	call debug_stack_reset</div><div class='add'>+	call	debug_stack_reset</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro TRACE_IRQS_IRETQ_DEBUG</div><div class='del'>-	bt   $9,EFLAGS(%rsp)	/* interrupts off? */</div><div class='del'>-	jnc  1f</div><div class='add'>+	bt	$9, EFLAGS(%rsp)		/* interrupts off? */</div><div class='add'>+	jnc	1f</div><div class='ctx'> 	TRACE_IRQS_ON_DEBUG</div><div class='ctx'> 1:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='del'>-# define TRACE_IRQS_OFF_DEBUG		TRACE_IRQS_OFF</div><div class='del'>-# define TRACE_IRQS_ON_DEBUG		TRACE_IRQS_ON</div><div class='del'>-# define TRACE_IRQS_IRETQ_DEBUG		TRACE_IRQS_IRETQ</div><div class='add'>+# define TRACE_IRQS_OFF_DEBUG			TRACE_IRQS_OFF</div><div class='add'>+# define TRACE_IRQS_ON_DEBUG			TRACE_IRQS_ON</div><div class='add'>+# define TRACE_IRQS_IRETQ_DEBUG			TRACE_IRQS_IRETQ</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * empty frame</div><div class='del'>- */</div><div class='del'>-	.macro EMPTY_FRAME start=1 offset=0</div><div class='del'>-	.if \start</div><div class='del'>-	CFI_STARTPROC simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA rsp,8+\offset</div><div class='del'>-	.else</div><div class='del'>-	CFI_DEF_CFA_OFFSET 8+\offset</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * initial frame state for interrupts (and exceptions without error code)</div><div class='del'>- */</div><div class='del'>-	.macro INTR_FRAME start=1 offset=0</div><div class='del'>-	EMPTY_FRAME \start, 5*8+\offset</div><div class='del'>-	/*CFI_REL_OFFSET ss, 4*8+\offset*/</div><div class='del'>-	CFI_REL_OFFSET rsp, 3*8+\offset</div><div class='del'>-	/*CFI_REL_OFFSET rflags, 2*8+\offset*/</div><div class='del'>-	/*CFI_REL_OFFSET cs, 1*8+\offset*/</div><div class='del'>-	CFI_REL_OFFSET rip, 0*8+\offset</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * initial frame state for exceptions with error code (and interrupts</div><div class='del'>- * with vector already pushed)</div><div class='del'>- */</div><div class='del'>-	.macro XCPT_FRAME start=1 offset=0</div><div class='del'>-	INTR_FRAME \start, 1*8+\offset</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * frame that enables passing a complete pt_regs to a C function.</div><div class='del'>- */</div><div class='del'>-	.macro DEFAULT_FRAME start=1 offset=0</div><div class='del'>-	XCPT_FRAME \start, ORIG_RAX+\offset</div><div class='del'>-	CFI_REL_OFFSET rdi, RDI+\offset</div><div class='del'>-	CFI_REL_OFFSET rsi, RSI+\offset</div><div class='del'>-	CFI_REL_OFFSET rdx, RDX+\offset</div><div class='del'>-	CFI_REL_OFFSET rcx, RCX+\offset</div><div class='del'>-	CFI_REL_OFFSET rax, RAX+\offset</div><div class='del'>-	CFI_REL_OFFSET r8, R8+\offset</div><div class='del'>-	CFI_REL_OFFSET r9, R9+\offset</div><div class='del'>-	CFI_REL_OFFSET r10, R10+\offset</div><div class='del'>-	CFI_REL_OFFSET r11, R11+\offset</div><div class='del'>-	CFI_REL_OFFSET rbx, RBX+\offset</div><div class='del'>-	CFI_REL_OFFSET rbp, RBP+\offset</div><div class='del'>-	CFI_REL_OFFSET r12, R12+\offset</div><div class='del'>-	CFI_REL_OFFSET r13, R13+\offset</div><div class='del'>-	CFI_REL_OFFSET r14, R14+\offset</div><div class='del'>-	CFI_REL_OFFSET r15, R15+\offset</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.</div><div class='add'>+ * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.</div><div class='ctx'>  *</div><div class='del'>- * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,</div><div class='add'>+ * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,</div><div class='ctx'>  * then loads new ss, cs, and rip from previously programmed MSRs.</div><div class='ctx'>  * rflags gets masked by a value from another MSR (so CLD and CLAC</div><div class='ctx'>  * are not needed). SYSCALL does not save anything on the stack</div><div class='hunk'>@@ -186,7 +120,7 @@ ENDPROC(native_usergs_sysret64)</div><div class='ctx'>  * r10  arg3 (needs to be moved to rcx to conform to C ABI)</div><div class='ctx'>  * r8   arg4</div><div class='ctx'>  * r9   arg5</div><div class='del'>- * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)</div><div class='add'>+ * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)</div><div class='ctx'>  *</div><div class='ctx'>  * Only called from user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -195,13 +129,7 @@ ENDPROC(native_usergs_sysret64)</div><div class='ctx'>  * with them due to bugs in both AMD and Intel CPUs.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-ENTRY(system_call)</div><div class='del'>-	CFI_STARTPROC	simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA	rsp,0</div><div class='del'>-	CFI_REGISTER	rip,rcx</div><div class='del'>-	/*CFI_REGISTER	rflags,r11*/</div><div class='del'>-</div><div class='add'>+ENTRY(entry_SYSCALL_64)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Interrupts are off on entry.</div><div class='ctx'> 	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='hunk'>@@ -213,14 +141,14 @@ ENTRY(system_call)</div><div class='ctx'> 	 * after the swapgs, so that it can do the swapgs</div><div class='ctx'> 	 * for the guest and jump here on syscall.</div><div class='ctx'> 	 */</div><div class='del'>-GLOBAL(system_call_after_swapgs)</div><div class='add'>+GLOBAL(entry_SYSCALL_64_after_swapgs)</div><div class='ctx'> </div><div class='del'>-	movq	%rsp,PER_CPU_VAR(rsp_scratch)</div><div class='del'>-	movq	PER_CPU_VAR(kernel_stack),%rsp</div><div class='add'>+	movq	%rsp, PER_CPU_VAR(rsp_scratch)</div><div class='add'>+	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='ctx'> </div><div class='ctx'> 	/* Construct struct pt_regs on stack */</div><div class='del'>-	pushq_cfi $__USER_DS			/* pt_regs-&gt;ss */</div><div class='del'>-	pushq_cfi PER_CPU_VAR(rsp_scratch)	/* pt_regs-&gt;sp */</div><div class='add'>+	pushq	$__USER_DS			/* pt_regs-&gt;ss */</div><div class='add'>+	pushq	PER_CPU_VAR(rsp_scratch)	/* pt_regs-&gt;sp */</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Re-enable interrupts.</div><div class='ctx'> 	 * We use 'rsp_scratch' as a scratch space, hence irq-off block above</div><div class='hunk'>@@ -229,36 +157,34 @@ GLOBAL(system_call_after_swapgs)</div><div class='ctx'> 	 * with using rsp_scratch:</div><div class='ctx'> 	 */</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	pushq_cfi	%r11			/* pt_regs-&gt;flags */</div><div class='del'>-	pushq_cfi	$__USER_CS		/* pt_regs-&gt;cs */</div><div class='del'>-	pushq_cfi	%rcx			/* pt_regs-&gt;ip */</div><div class='del'>-	CFI_REL_OFFSET rip,0</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;orig_ax */</div><div class='del'>-	pushq_cfi_reg	rdi			/* pt_regs-&gt;di */</div><div class='del'>-	pushq_cfi_reg	rsi			/* pt_regs-&gt;si */</div><div class='del'>-	pushq_cfi_reg	rdx			/* pt_regs-&gt;dx */</div><div class='del'>-	pushq_cfi_reg	rcx			/* pt_regs-&gt;cx */</div><div class='del'>-	pushq_cfi	$-ENOSYS		/* pt_regs-&gt;ax */</div><div class='del'>-	pushq_cfi_reg	r8			/* pt_regs-&gt;r8 */</div><div class='del'>-	pushq_cfi_reg	r9			/* pt_regs-&gt;r9 */</div><div class='del'>-	pushq_cfi_reg	r10			/* pt_regs-&gt;r10 */</div><div class='del'>-	pushq_cfi_reg	r11			/* pt_regs-&gt;r11 */</div><div class='del'>-	sub	$(6*8),%rsp /* pt_regs-&gt;bp,bx,r12-15 not saved */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 6*8</div><div class='del'>-</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz tracesys</div><div class='del'>-system_call_fastpath:</div><div class='add'>+	pushq	%r11				/* pt_regs-&gt;flags */</div><div class='add'>+	pushq	$__USER_CS			/* pt_regs-&gt;cs */</div><div class='add'>+	pushq	%rcx				/* pt_regs-&gt;ip */</div><div class='add'>+	pushq	%rax				/* pt_regs-&gt;orig_ax */</div><div class='add'>+	pushq	%rdi				/* pt_regs-&gt;di */</div><div class='add'>+	pushq	%rsi				/* pt_regs-&gt;si */</div><div class='add'>+	pushq	%rdx				/* pt_regs-&gt;dx */</div><div class='add'>+	pushq	%rcx				/* pt_regs-&gt;cx */</div><div class='add'>+	pushq	$-ENOSYS			/* pt_regs-&gt;ax */</div><div class='add'>+	pushq	%r8				/* pt_regs-&gt;r8 */</div><div class='add'>+	pushq	%r9				/* pt_regs-&gt;r9 */</div><div class='add'>+	pushq	%r10				/* pt_regs-&gt;r10 */</div><div class='add'>+	pushq	%r11				/* pt_regs-&gt;r11 */</div><div class='add'>+	sub	$(6*8), %rsp			/* pt_regs-&gt;bp, bx, r12-15 not saved */</div><div class='add'>+</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	tracesys</div><div class='add'>+entry_SYSCALL_64_fastpath:</div><div class='ctx'> #if __SYSCALL_MASK == ~0</div><div class='del'>-	cmpq $__NR_syscall_max,%rax</div><div class='add'>+	cmpq	$__NR_syscall_max, %rax</div><div class='ctx'> #else</div><div class='del'>-	andl $__SYSCALL_MASK,%eax</div><div class='del'>-	cmpl $__NR_syscall_max,%eax</div><div class='add'>+	andl	$__SYSCALL_MASK, %eax</div><div class='add'>+	cmpl	$__NR_syscall_max, %eax</div><div class='ctx'> #endif</div><div class='del'>-	ja	1f	/* return -ENOSYS (already in pt_regs-&gt;ax) */</div><div class='del'>-	movq %r10,%rcx</div><div class='del'>-	call *sys_call_table(,%rax,8)</div><div class='del'>-	movq %rax,RAX(%rsp)</div><div class='add'>+	ja	1f				/* return -ENOSYS (already in pt_regs-&gt;ax) */</div><div class='add'>+	movq	%r10, %rcx</div><div class='add'>+	call	*sys_call_table(, %rax, 8)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='ctx'> 1:</div><div class='ctx'> /*</div><div class='ctx'>  * Syscall return path ending with SYSRET (fast path).</div><div class='hunk'>@@ -279,19 +205,15 @@ system_call_fastpath:</div><div class='ctx'> 	 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is</div><div class='ctx'> 	 * very bad.</div><div class='ctx'> 	 */</div><div class='del'>-	testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz int_ret_from_sys_call_irqs_off	/* Go to the slow path */</div><div class='del'>-</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='add'>+	testl	$_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	int_ret_from_sys_call_irqs_off	/* Go to the slow path */</div><div class='ctx'> </div><div class='ctx'> 	RESTORE_C_REGS_EXCEPT_RCX_R11</div><div class='del'>-	movq	RIP(%rsp),%rcx</div><div class='del'>-	CFI_REGISTER	rip,rcx</div><div class='del'>-	movq	EFLAGS(%rsp),%r11</div><div class='del'>-	/*CFI_REGISTER	rflags,r11*/</div><div class='del'>-	movq	RSP(%rsp),%rsp</div><div class='add'>+	movq	RIP(%rsp), %rcx</div><div class='add'>+	movq	EFLAGS(%rsp), %r11</div><div class='add'>+	movq	RSP(%rsp), %rsp</div><div class='ctx'> 	/*</div><div class='del'>-	 * 64bit SYSRET restores rip from rcx,</div><div class='add'>+	 * 64-bit SYSRET restores rip from rcx,</div><div class='ctx'> 	 * rflags from r11 (but RF and VM bits are forced to 0),</div><div class='ctx'> 	 * cs and ss are loaded from MSRs.</div><div class='ctx'> 	 * Restoration of rflags re-enables interrupts.</div><div class='hunk'>@@ -307,25 +229,23 @@ system_call_fastpath:</div><div class='ctx'> 	 */</div><div class='ctx'> 	USERGS_SYSRET64</div><div class='ctx'> </div><div class='del'>-	CFI_RESTORE_STATE</div><div class='del'>-</div><div class='ctx'> 	/* Do syscall entry tracing */</div><div class='ctx'> tracesys:</div><div class='del'>-	movq %rsp, %rdi</div><div class='del'>-	movl $AUDIT_ARCH_X86_64, %esi</div><div class='del'>-	call syscall_trace_enter_phase1</div><div class='del'>-	test %rax, %rax</div><div class='del'>-	jnz tracesys_phase2		/* if needed, run the slow path */</div><div class='del'>-	RESTORE_C_REGS_EXCEPT_RAX	/* else restore clobbered regs */</div><div class='del'>-	movq ORIG_RAX(%rsp), %rax</div><div class='del'>-	jmp system_call_fastpath	/*      and return to the fast path */</div><div class='add'>+	movq	%rsp, %rdi</div><div class='add'>+	movl	$AUDIT_ARCH_X86_64, %esi</div><div class='add'>+	call	syscall_trace_enter_phase1</div><div class='add'>+	test	%rax, %rax</div><div class='add'>+	jnz	tracesys_phase2			/* if needed, run the slow path */</div><div class='add'>+	RESTORE_C_REGS_EXCEPT_RAX		/* else restore clobbered regs */</div><div class='add'>+	movq	ORIG_RAX(%rsp), %rax</div><div class='add'>+	jmp	entry_SYSCALL_64_fastpath	/* and return to the fast path */</div><div class='ctx'> </div><div class='ctx'> tracesys_phase2:</div><div class='ctx'> 	SAVE_EXTRA_REGS</div><div class='del'>-	movq %rsp, %rdi</div><div class='del'>-	movl $AUDIT_ARCH_X86_64, %esi</div><div class='del'>-	movq %rax,%rdx</div><div class='del'>-	call syscall_trace_enter_phase2</div><div class='add'>+	movq	%rsp, %rdi</div><div class='add'>+	movl	$AUDIT_ARCH_X86_64, %esi</div><div class='add'>+	movq	%rax, %rdx</div><div class='add'>+	call	syscall_trace_enter_phase2</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reload registers from stack in case ptrace changed them.</div><div class='hunk'>@@ -335,15 +255,15 @@ tracesys_phase2:</div><div class='ctx'> 	RESTORE_C_REGS_EXCEPT_RAX</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> #if __SYSCALL_MASK == ~0</div><div class='del'>-	cmpq $__NR_syscall_max,%rax</div><div class='add'>+	cmpq	$__NR_syscall_max, %rax</div><div class='ctx'> #else</div><div class='del'>-	andl $__SYSCALL_MASK,%eax</div><div class='del'>-	cmpl $__NR_syscall_max,%eax</div><div class='add'>+	andl	$__SYSCALL_MASK, %eax</div><div class='add'>+	cmpl	$__NR_syscall_max, %eax</div><div class='ctx'> #endif</div><div class='del'>-	ja	1f	/* return -ENOSYS (already in pt_regs-&gt;ax) */</div><div class='del'>-	movq %r10,%rcx	/* fixup for C */</div><div class='del'>-	call *sys_call_table(,%rax,8)</div><div class='del'>-	movq %rax,RAX(%rsp)</div><div class='add'>+	ja	1f				/* return -ENOSYS (already in pt_regs-&gt;ax) */</div><div class='add'>+	movq	%r10, %rcx			/* fixup for C */</div><div class='add'>+	call	*sys_call_table(, %rax, 8)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='ctx'> 1:</div><div class='ctx'> 	/* Use IRET because user could have changed pt_regs-&gt;foo */</div><div class='ctx'> </div><div class='hunk'>@@ -355,31 +275,33 @@ GLOBAL(int_ret_from_sys_call)</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	movl $_TIF_ALLWORK_MASK,%edi</div><div class='add'>+	movl	$_TIF_ALLWORK_MASK, %edi</div><div class='ctx'> 	/* edi:	mask to check */</div><div class='ctx'> GLOBAL(int_with_check)</div><div class='ctx'> 	LOCKDEP_SYS_EXIT_IRQ</div><div class='ctx'> 	GET_THREAD_INFO(%rcx)</div><div class='del'>-	movl TI_flags(%rcx),%edx</div><div class='del'>-	andl %edi,%edx</div><div class='del'>-	jnz   int_careful</div><div class='del'>-	andl	$~TS_COMPAT,TI_status(%rcx)</div><div class='add'>+	movl	TI_flags(%rcx), %edx</div><div class='add'>+	andl	%edi, %edx</div><div class='add'>+	jnz	int_careful</div><div class='add'>+	andl	$~TS_COMPAT, TI_status(%rcx)</div><div class='ctx'> 	jmp	syscall_return</div><div class='ctx'> </div><div class='del'>-	/* Either reschedule or signal or syscall exit tracking needed. */</div><div class='del'>-	/* First do a reschedule test. */</div><div class='del'>-	/* edx:	work, edi: workmask */</div><div class='add'>+	/*</div><div class='add'>+	 * Either reschedule or signal or syscall exit tracking needed.</div><div class='add'>+	 * First do a reschedule test.</div><div class='add'>+	 * edx:	work, edi: workmask</div><div class='add'>+	 */</div><div class='ctx'> int_careful:</div><div class='del'>-	bt $TIF_NEED_RESCHED,%edx</div><div class='del'>-	jnc  int_very_careful</div><div class='add'>+	bt	$TIF_NEED_RESCHED, %edx</div><div class='add'>+	jnc	int_very_careful</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	pushq_cfi %rdi</div><div class='add'>+	pushq	%rdi</div><div class='ctx'> 	SCHEDULE_USER</div><div class='del'>-	popq_cfi %rdi</div><div class='add'>+	popq	%rdi</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	jmp int_with_check</div><div class='add'>+	jmp	int_with_check</div><div class='ctx'> </div><div class='ctx'> 	/* handle signals and tracing -- both require a full pt_regs */</div><div class='ctx'> int_very_careful:</div><div class='hunk'>@@ -387,27 +309,27 @@ int_very_careful:</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	SAVE_EXTRA_REGS</div><div class='ctx'> 	/* Check for syscall exit trace */</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_EXIT,%edx</div><div class='del'>-	jz int_signal</div><div class='del'>-	pushq_cfi %rdi</div><div class='del'>-	leaq 8(%rsp),%rdi	# &amp;ptregs -&gt; arg1</div><div class='del'>-	call syscall_trace_leave</div><div class='del'>-	popq_cfi %rdi</div><div class='del'>-	andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi</div><div class='del'>-	jmp int_restore_rest</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_EXIT, %edx</div><div class='add'>+	jz	int_signal</div><div class='add'>+	pushq	%rdi</div><div class='add'>+	leaq	8(%rsp), %rdi			/* &amp;ptregs -&gt; arg1 */</div><div class='add'>+	call	syscall_trace_leave</div><div class='add'>+	popq	%rdi</div><div class='add'>+	andl	$~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU), %edi</div><div class='add'>+	jmp	int_restore_rest</div><div class='ctx'> </div><div class='ctx'> int_signal:</div><div class='del'>-	testl $_TIF_DO_NOTIFY_MASK,%edx</div><div class='del'>-	jz 1f</div><div class='del'>-	movq %rsp,%rdi		# &amp;ptregs -&gt; arg1</div><div class='del'>-	xorl %esi,%esi		# oldset -&gt; arg2</div><div class='del'>-	call do_notify_resume</div><div class='del'>-1:	movl $_TIF_WORK_MASK,%edi</div><div class='add'>+	testl	$_TIF_DO_NOTIFY_MASK, %edx</div><div class='add'>+	jz	1f</div><div class='add'>+	movq	%rsp, %rdi			/* &amp;ptregs -&gt; arg1 */</div><div class='add'>+	xorl	%esi, %esi			/* oldset -&gt; arg2 */</div><div class='add'>+	call	do_notify_resume</div><div class='add'>+1:	movl	$_TIF_WORK_MASK, %edi</div><div class='ctx'> int_restore_rest:</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	jmp int_with_check</div><div class='add'>+	jmp	int_with_check</div><div class='ctx'> </div><div class='ctx'> syscall_return:</div><div class='ctx'> 	/* The IRETQ could re-enable interrupts: */</div><div class='hunk'>@@ -418,34 +340,37 @@ syscall_return:</div><div class='ctx'> 	 * Try to use SYSRET instead of IRET if we're returning to</div><div class='ctx'> 	 * a completely clean 64-bit userspace context.</div><div class='ctx'> 	 */</div><div class='del'>-	movq RCX(%rsp),%rcx</div><div class='del'>-	cmpq %rcx,RIP(%rsp)		/* RCX == RIP */</div><div class='del'>-	jne opportunistic_sysret_failed</div><div class='add'>+	movq	RCX(%rsp), %rcx</div><div class='add'>+	movq	RIP(%rsp), %r11</div><div class='add'>+	cmpq	%rcx, %r11			/* RCX == RIP */</div><div class='add'>+	jne	opportunistic_sysret_failed</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP</div><div class='ctx'> 	 * in kernel space.  This essentially lets the user take over</div><div class='del'>-	 * the kernel, since userspace controls RSP.  It's not worth</div><div class='del'>-	 * testing for canonicalness exactly -- this check detects any</div><div class='del'>-	 * of the 17 high bits set, which is true for non-canonical</div><div class='del'>-	 * or kernel addresses.  (This will pessimize vsyscall=native.</div><div class='del'>-	 * Big deal.)</div><div class='add'>+	 * the kernel, since userspace controls RSP.</div><div class='ctx'> 	 *</div><div class='del'>-	 * If virtual addresses ever become wider, this will need</div><div class='add'>+	 * If width of "canonical tail" ever becomes variable, this will need</div><div class='ctx'> 	 * to be updated to remain correct on both old and new CPUs.</div><div class='ctx'> 	 */</div><div class='ctx'> 	.ifne __VIRTUAL_MASK_SHIFT - 47</div><div class='ctx'> 	.error "virtual address width changed -- SYSRET checks need update"</div><div class='ctx'> 	.endif</div><div class='del'>-	shr $__VIRTUAL_MASK_SHIFT, %rcx</div><div class='del'>-	jnz opportunistic_sysret_failed</div><div class='ctx'> </div><div class='del'>-	cmpq $__USER_CS,CS(%rsp)	/* CS must match SYSRET */</div><div class='del'>-	jne opportunistic_sysret_failed</div><div class='add'>+	/* Change top 16 bits to be the sign-extension of 47th bit */</div><div class='add'>+	shl	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx</div><div class='add'>+	sar	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx</div><div class='add'>+</div><div class='add'>+	/* If this changed %rcx, it was not canonical */</div><div class='add'>+	cmpq	%rcx, %r11</div><div class='add'>+	jne	opportunistic_sysret_failed</div><div class='add'>+</div><div class='add'>+	cmpq	$__USER_CS, CS(%rsp)		/* CS must match SYSRET */</div><div class='add'>+	jne	opportunistic_sysret_failed</div><div class='ctx'> </div><div class='del'>-	movq R11(%rsp),%r11</div><div class='del'>-	cmpq %r11,EFLAGS(%rsp)		/* R11 == RFLAGS */</div><div class='del'>-	jne opportunistic_sysret_failed</div><div class='add'>+	movq	R11(%rsp), %r11</div><div class='add'>+	cmpq	%r11, EFLAGS(%rsp)		/* R11 == RFLAGS */</div><div class='add'>+	jne	opportunistic_sysret_failed</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * SYSRET can't restore RF.  SYSRET can restore TF, but unlike IRET,</div><div class='hunk'>@@ -454,47 +379,41 @@ syscall_return:</div><div class='ctx'> 	 * with register state that satisfies the opportunistic SYSRET</div><div class='ctx'> 	 * conditions.  For example, single-stepping this user code:</div><div class='ctx'> 	 *</div><div class='del'>-	 *           movq $stuck_here,%rcx</div><div class='add'>+	 *           movq	$stuck_here, %rcx</div><div class='ctx'> 	 *           pushfq</div><div class='ctx'> 	 *           popq %r11</div><div class='ctx'> 	 *   stuck_here:</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * would never get past 'stuck_here'.</div><div class='ctx'> 	 */</div><div class='del'>-	testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11</div><div class='del'>-	jnz opportunistic_sysret_failed</div><div class='add'>+	testq	$(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11</div><div class='add'>+	jnz	opportunistic_sysret_failed</div><div class='ctx'> </div><div class='ctx'> 	/* nothing to check for RSP */</div><div class='ctx'> </div><div class='del'>-	cmpq $__USER_DS,SS(%rsp)	/* SS must match SYSRET */</div><div class='del'>-	jne opportunistic_sysret_failed</div><div class='add'>+	cmpq	$__USER_DS, SS(%rsp)		/* SS must match SYSRET */</div><div class='add'>+	jne	opportunistic_sysret_failed</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We win!  This label is here just for ease of understanding</div><div class='del'>-	 * perf profiles.  Nothing jumps here.</div><div class='add'>+	 * We win! This label is here just for ease of understanding</div><div class='add'>+	 * perf profiles. Nothing jumps here.</div><div class='ctx'> 	 */</div><div class='ctx'> syscall_return_via_sysret:</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	/* r11 is already restored (see code above) */</div><div class='del'>-	RESTORE_C_REGS_EXCEPT_R11</div><div class='del'>-	movq RSP(%rsp),%rsp</div><div class='add'>+	/* rcx and r11 are already restored (see code above) */</div><div class='add'>+	RESTORE_C_REGS_EXCEPT_RCX_R11</div><div class='add'>+	movq	RSP(%rsp), %rsp</div><div class='ctx'> 	USERGS_SYSRET64</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> </div><div class='ctx'> opportunistic_sysret_failed:</div><div class='ctx'> 	SWAPGS</div><div class='ctx'> 	jmp	restore_c_regs_and_iret</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(system_call)</div><div class='add'>+END(entry_SYSCALL_64)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	.macro FORK_LIKE func</div><div class='ctx'> ENTRY(stub_\func)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8		/* offset 8: return address */</div><div class='ctx'> 	SAVE_EXTRA_REGS 8</div><div class='del'>-	jmp sys_\func</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	jmp	sys_\func</div><div class='ctx'> END(stub_\func)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -503,8 +422,6 @@ END(stub_\func)</div><div class='ctx'> 	FORK_LIKE  vfork</div><div class='ctx'> </div><div class='ctx'> ENTRY(stub_execve)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='ctx'> 	call	sys_execve</div><div class='ctx'> return_from_execve:</div><div class='ctx'> 	testl	%eax, %eax</div><div class='hunk'>@@ -514,11 +431,9 @@ return_from_execve:</div><div class='ctx'> 1:</div><div class='ctx'> 	/* must use IRET code path (pt_regs-&gt;cs may have changed) */</div><div class='ctx'> 	addq	$8, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='ctx'> 	ZERO_EXTRA_REGS</div><div class='del'>-	movq	%rax,RAX(%rsp)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='ctx'> 	jmp	int_ret_from_sys_call</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(stub_execve)</div><div class='ctx'> /*</div><div class='ctx'>  * Remaining execve stubs are only 7 bytes long.</div><div class='hunk'>@@ -526,47 +441,25 @@ END(stub_execve)</div><div class='ctx'>  */</div><div class='ctx'> 	.align	8</div><div class='ctx'> GLOBAL(stub_execveat)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='ctx'> 	call	sys_execveat</div><div class='ctx'> 	jmp	return_from_execve</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(stub_execveat)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_X32_ABI</div><div class='add'>+#if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION)</div><div class='ctx'> 	.align	8</div><div class='ctx'> GLOBAL(stub_x32_execve)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='del'>-	call	compat_sys_execve</div><div class='del'>-	jmp	return_from_execve</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(stub_x32_execve)</div><div class='del'>-	.align	8</div><div class='del'>-GLOBAL(stub_x32_execveat)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='del'>-	call	compat_sys_execveat</div><div class='del'>-	jmp	return_from_execve</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(stub_x32_execveat)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IA32_EMULATION</div><div class='del'>-	.align	8</div><div class='ctx'> GLOBAL(stub32_execve)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	call	compat_sys_execve</div><div class='ctx'> 	jmp	return_from_execve</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(stub32_execve)</div><div class='add'>+END(stub_x32_execve)</div><div class='ctx'> 	.align	8</div><div class='add'>+GLOBAL(stub_x32_execveat)</div><div class='ctx'> GLOBAL(stub32_execveat)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	call	compat_sys_execveat</div><div class='ctx'> 	jmp	return_from_execve</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(stub32_execveat)</div><div class='add'>+END(stub_x32_execveat)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -574,8 +467,6 @@ END(stub32_execveat)</div><div class='ctx'>  * This cannot be done with SYSRET, so use the IRET return path instead.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(stub_rt_sigreturn)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * SAVE_EXTRA_REGS result is not normally needed:</div><div class='ctx'> 	 * sigreturn overwrites all pt_regs-&gt;GPREGS.</div><div class='hunk'>@@ -584,24 +475,19 @@ ENTRY(stub_rt_sigreturn)</div><div class='ctx'> 	 * we SAVE_EXTRA_REGS here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	SAVE_EXTRA_REGS 8</div><div class='del'>-	call sys_rt_sigreturn</div><div class='add'>+	call	sys_rt_sigreturn</div><div class='ctx'> return_from_stub:</div><div class='ctx'> 	addq	$8, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='del'>-	movq %rax,RAX(%rsp)</div><div class='del'>-	jmp int_ret_from_sys_call</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='add'>+	jmp	int_ret_from_sys_call</div><div class='ctx'> END(stub_rt_sigreturn)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_X32_ABI</div><div class='ctx'> ENTRY(stub_x32_rt_sigreturn)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	DEFAULT_FRAME 0, 8</div><div class='ctx'> 	SAVE_EXTRA_REGS 8</div><div class='del'>-	call sys32_x32_rt_sigreturn</div><div class='del'>-	jmp  return_from_stub</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	call	sys32_x32_rt_sigreturn</div><div class='add'>+	jmp	return_from_stub</div><div class='ctx'> END(stub_x32_rt_sigreturn)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -611,36 +497,36 @@ END(stub_x32_rt_sigreturn)</div><div class='ctx'>  * rdi: prev task we switched from</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(ret_from_fork)</div><div class='del'>-	DEFAULT_FRAME</div><div class='ctx'> </div><div class='del'>-	LOCK ; btr $TIF_FORK,TI_flags(%r8)</div><div class='add'>+	LOCK ; btr $TIF_FORK, TI_flags(%r8)</div><div class='ctx'> </div><div class='del'>-	pushq_cfi $0x0002</div><div class='del'>-	popfq_cfi				# reset kernel eflags</div><div class='add'>+	pushq	$0x0002</div><div class='add'>+	popfq					/* reset kernel eflags */</div><div class='ctx'> </div><div class='del'>-	call schedule_tail			# rdi: 'prev' task parameter</div><div class='add'>+	call	schedule_tail			/* rdi: 'prev' task parameter */</div><div class='ctx'> </div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> </div><div class='del'>-	testl $3,CS(%rsp)			# from kernel_thread?</div><div class='add'>+	testb	$3, CS(%rsp)			/* from kernel_thread? */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * By the time we get here, we have no idea whether our pt_regs,</div><div class='ctx'> 	 * ti flags, and ti status came from the 64-bit SYSCALL fast path,</div><div class='del'>-	 * the slow path, or one of the ia32entry paths.</div><div class='add'>+	 * the slow path, or one of the 32-bit compat paths.</div><div class='ctx'> 	 * Use IRET code path to return, since it can safely handle</div><div class='ctx'> 	 * all of the above.</div><div class='ctx'> 	 */</div><div class='ctx'> 	jnz	int_ret_from_sys_call</div><div class='ctx'> </div><div class='del'>-	/* We came from kernel_thread */</div><div class='del'>-	/* nb: we depend on RESTORE_EXTRA_REGS above */</div><div class='del'>-	movq %rbp, %rdi</div><div class='del'>-	call *%rbx</div><div class='del'>-	movl $0, RAX(%rsp)</div><div class='add'>+	/*</div><div class='add'>+	 * We came from kernel_thread</div><div class='add'>+	 * nb: we depend on RESTORE_EXTRA_REGS above</div><div class='add'>+	 */</div><div class='add'>+	movq	%rbp, %rdi</div><div class='add'>+	call	*%rbx</div><div class='add'>+	movl	$0, RAX(%rsp)</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='del'>-	jmp int_ret_from_sys_call</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	jmp	int_ret_from_sys_call</div><div class='ctx'> END(ret_from_fork)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -649,16 +535,13 @@ END(ret_from_fork)</div><div class='ctx'>  */</div><div class='ctx'> 	.align 8</div><div class='ctx'> ENTRY(irq_entries_start)</div><div class='del'>-	INTR_FRAME</div><div class='ctx'>     vector=FIRST_EXTERNAL_VECTOR</div><div class='ctx'>     .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)</div><div class='del'>-	pushq_cfi $(~vector+0x80)	/* Note: always in signed byte range */</div><div class='add'>+	pushq	$(~vector+0x80)			/* Note: always in signed byte range */</div><div class='ctx'>     vector=vector+1</div><div class='ctx'> 	jmp	common_interrupt</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='ctx'> 	.align	8</div><div class='ctx'>     .endr</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(irq_entries_start)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -684,10 +567,10 @@ END(irq_entries_start)</div><div class='ctx'> 	/* this goes to 0(%rsp) for unwinder, not for saving the value: */</div><div class='ctx'> 	SAVE_EXTRA_REGS_RBP -RBP</div><div class='ctx'> </div><div class='del'>-	leaq -RBP(%rsp),%rdi	/* arg1 for \func (pointer to pt_regs) */</div><div class='add'>+	leaq	-RBP(%rsp), %rdi		/* arg1 for \func (pointer to pt_regs) */</div><div class='ctx'> </div><div class='del'>-	testl $3, CS-RBP(%rsp)</div><div class='del'>-	je 1f</div><div class='add'>+	testb	$3, CS-RBP(%rsp)</div><div class='add'>+	jz	1f</div><div class='ctx'> 	SWAPGS</div><div class='ctx'> 1:</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -697,24 +580,14 @@ END(irq_entries_start)</div><div class='ctx'> 	 * a little cheaper to use a separate counter in the PDA (short of</div><div class='ctx'> 	 * moving irq_enter into assembly, which would be too much work)</div><div class='ctx'> 	 */</div><div class='del'>-	movq %rsp, %rsi</div><div class='del'>-	incl PER_CPU_VAR(irq_count)</div><div class='del'>-	cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp</div><div class='del'>-	CFI_DEF_CFA_REGISTER	rsi</div><div class='del'>-	pushq %rsi</div><div class='del'>-	/*</div><div class='del'>-	 * For debugger:</div><div class='del'>-	 * "CFA (Current Frame Address) is the value on stack + offset"</div><div class='del'>-	 */</div><div class='del'>-	CFI_ESCAPE	0x0f /* DW_CFA_def_cfa_expression */, 6, \</div><div class='del'>-			0x77 /* DW_OP_breg7 (rsp) */, 0, \</div><div class='del'>-			0x06 /* DW_OP_deref */, \</div><div class='del'>-			0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \</div><div class='del'>-			0x22 /* DW_OP_plus */</div><div class='add'>+	movq	%rsp, %rsi</div><div class='add'>+	incl	PER_CPU_VAR(irq_count)</div><div class='add'>+	cmovzq	PER_CPU_VAR(irq_stack_ptr), %rsp</div><div class='add'>+	pushq	%rsi</div><div class='ctx'> 	/* We entered an interrupt context - irqs are off: */</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='ctx'> </div><div class='del'>-	call \func</div><div class='add'>+	call	\func</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -723,42 +596,36 @@ END(irq_entries_start)</div><div class='ctx'> 	 */</div><div class='ctx'> 	.p2align CONFIG_X86_L1_CACHE_SHIFT</div><div class='ctx'> common_interrupt:</div><div class='del'>-	XCPT_FRAME</div><div class='ctx'> 	ASM_CLAC</div><div class='del'>-	addq $-0x80,(%rsp)		/* Adjust vector to [-256,-1] range */</div><div class='add'>+	addq	$-0x80, (%rsp)			/* Adjust vector to [-256, -1] range */</div><div class='ctx'> 	interrupt do_IRQ</div><div class='ctx'> 	/* 0(%rsp): old RSP */</div><div class='ctx'> ret_from_intr:</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	decl PER_CPU_VAR(irq_count)</div><div class='add'>+	decl	PER_CPU_VAR(irq_count)</div><div class='ctx'> </div><div class='ctx'> 	/* Restore saved previous stack */</div><div class='del'>-	popq %rsi</div><div class='del'>-	CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */</div><div class='add'>+	popq	%rsi</div><div class='ctx'> 	/* return code expects complete pt_regs - adjust rsp accordingly: */</div><div class='del'>-	leaq -RBP(%rsi),%rsp</div><div class='del'>-	CFI_DEF_CFA_REGISTER	rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET	RBP</div><div class='add'>+	leaq	-RBP(%rsi), %rsp</div><div class='ctx'> </div><div class='del'>-	testl $3,CS(%rsp)</div><div class='del'>-	je retint_kernel</div><div class='add'>+	testb	$3, CS(%rsp)</div><div class='add'>+	jz	retint_kernel</div><div class='ctx'> 	/* Interrupt came from user space */</div><div class='del'>-</div><div class='add'>+retint_user:</div><div class='ctx'> 	GET_THREAD_INFO(%rcx)</div><div class='del'>-	/*</div><div class='del'>-	 * %rcx: thread info. Interrupts off.</div><div class='del'>-	 */</div><div class='add'>+</div><div class='add'>+	/* %rcx: thread info. Interrupts are off. */</div><div class='ctx'> retint_with_reschedule:</div><div class='del'>-	movl $_TIF_WORK_MASK,%edi</div><div class='add'>+	movl	$_TIF_WORK_MASK, %edi</div><div class='ctx'> retint_check:</div><div class='ctx'> 	LOCKDEP_SYS_EXIT_IRQ</div><div class='del'>-	movl TI_flags(%rcx),%edx</div><div class='del'>-	andl %edi,%edx</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	jnz  retint_careful</div><div class='add'>+	movl	TI_flags(%rcx), %edx</div><div class='add'>+	andl	%edi, %edx</div><div class='add'>+	jnz	retint_careful</div><div class='ctx'> </div><div class='del'>-retint_swapgs:		/* return to user-space */</div><div class='add'>+retint_swapgs:					/* return to user-space */</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The iretq could re-enable interrupts:</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -773,9 +640,9 @@ retint_kernel:</div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> 	/* Interrupts are off */</div><div class='ctx'> 	/* Check if we need preemption */</div><div class='del'>-	bt	$9,EFLAGS(%rsp)	/* interrupts were off? */</div><div class='add'>+	bt	$9, EFLAGS(%rsp)		/* were interrupts off? */</div><div class='ctx'> 	jnc	1f</div><div class='del'>-0:	cmpl	$0,PER_CPU_VAR(__preempt_count)</div><div class='add'>+0:	cmpl	$0, PER_CPU_VAR(__preempt_count)</div><div class='ctx'> 	jnz	1f</div><div class='ctx'> 	call	preempt_schedule_irq</div><div class='ctx'> 	jmp	0b</div><div class='hunk'>@@ -793,8 +660,6 @@ retint_kernel:</div><div class='ctx'> restore_c_regs_and_iret:</div><div class='ctx'> 	RESTORE_C_REGS</div><div class='ctx'> 	REMOVE_PT_GPREGS_FROM_STACK 8</div><div class='del'>-</div><div class='del'>-irq_return:</div><div class='ctx'> 	INTERRUPT_RETURN</div><div class='ctx'> </div><div class='ctx'> ENTRY(native_iret)</div><div class='hunk'>@@ -803,8 +668,8 @@ ENTRY(native_iret)</div><div class='ctx'> 	 * 64-bit mode SS:RSP on the exception stack is always valid.</div><div class='ctx'> 	 */</div><div class='ctx'> #ifdef CONFIG_X86_ESPFIX64</div><div class='del'>-	testb $4,(SS-RIP)(%rsp)</div><div class='del'>-	jnz native_irq_return_ldt</div><div class='add'>+	testb	$4, (SS-RIP)(%rsp)</div><div class='add'>+	jnz	native_irq_return_ldt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> .global native_irq_return_iret</div><div class='hunk'>@@ -819,62 +684,60 @@ native_irq_return_iret:</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_ESPFIX64</div><div class='ctx'> native_irq_return_ldt:</div><div class='del'>-	pushq_cfi %rax</div><div class='del'>-	pushq_cfi %rdi</div><div class='add'>+	pushq	%rax</div><div class='add'>+	pushq	%rdi</div><div class='ctx'> 	SWAPGS</div><div class='del'>-	movq PER_CPU_VAR(espfix_waddr),%rdi</div><div class='del'>-	movq %rax,(0*8)(%rdi)	/* RAX */</div><div class='del'>-	movq (2*8)(%rsp),%rax	/* RIP */</div><div class='del'>-	movq %rax,(1*8)(%rdi)</div><div class='del'>-	movq (3*8)(%rsp),%rax	/* CS */</div><div class='del'>-	movq %rax,(2*8)(%rdi)</div><div class='del'>-	movq (4*8)(%rsp),%rax	/* RFLAGS */</div><div class='del'>-	movq %rax,(3*8)(%rdi)</div><div class='del'>-	movq (6*8)(%rsp),%rax	/* SS */</div><div class='del'>-	movq %rax,(5*8)(%rdi)</div><div class='del'>-	movq (5*8)(%rsp),%rax	/* RSP */</div><div class='del'>-	movq %rax,(4*8)(%rdi)</div><div class='del'>-	andl $0xffff0000,%eax</div><div class='del'>-	popq_cfi %rdi</div><div class='del'>-	orq PER_CPU_VAR(espfix_stack),%rax</div><div class='add'>+	movq	PER_CPU_VAR(espfix_waddr), %rdi</div><div class='add'>+	movq	%rax, (0*8)(%rdi)		/* RAX */</div><div class='add'>+	movq	(2*8)(%rsp), %rax		/* RIP */</div><div class='add'>+	movq	%rax, (1*8)(%rdi)</div><div class='add'>+	movq	(3*8)(%rsp), %rax		/* CS */</div><div class='add'>+	movq	%rax, (2*8)(%rdi)</div><div class='add'>+	movq	(4*8)(%rsp), %rax		/* RFLAGS */</div><div class='add'>+	movq	%rax, (3*8)(%rdi)</div><div class='add'>+	movq	(6*8)(%rsp), %rax		/* SS */</div><div class='add'>+	movq	%rax, (5*8)(%rdi)</div><div class='add'>+	movq	(5*8)(%rsp), %rax		/* RSP */</div><div class='add'>+	movq	%rax, (4*8)(%rdi)</div><div class='add'>+	andl	$0xffff0000, %eax</div><div class='add'>+	popq	%rdi</div><div class='add'>+	orq	PER_CPU_VAR(espfix_stack), %rax</div><div class='ctx'> 	SWAPGS</div><div class='del'>-	movq %rax,%rsp</div><div class='del'>-	popq_cfi %rax</div><div class='del'>-	jmp native_irq_return_iret</div><div class='add'>+	movq	%rax, %rsp</div><div class='add'>+	popq	%rax</div><div class='add'>+	jmp	native_irq_return_iret</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* edi: workmask, edx: work */</div><div class='ctx'> retint_careful:</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='del'>-	bt    $TIF_NEED_RESCHED,%edx</div><div class='del'>-	jnc   retint_signal</div><div class='add'>+	bt	$TIF_NEED_RESCHED, %edx</div><div class='add'>+	jnc	retint_signal</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	pushq_cfi %rdi</div><div class='add'>+	pushq	%rdi</div><div class='ctx'> 	SCHEDULE_USER</div><div class='del'>-	popq_cfi %rdi</div><div class='add'>+	popq	%rdi</div><div class='ctx'> 	GET_THREAD_INFO(%rcx)</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	jmp retint_check</div><div class='add'>+	jmp	retint_check</div><div class='ctx'> </div><div class='ctx'> retint_signal:</div><div class='del'>-	testl $_TIF_DO_NOTIFY_MASK,%edx</div><div class='del'>-	jz    retint_swapgs</div><div class='add'>+	testl	$_TIF_DO_NOTIFY_MASK, %edx</div><div class='add'>+	jz	retint_swapgs</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	SAVE_EXTRA_REGS</div><div class='del'>-	movq $-1,ORIG_RAX(%rsp)</div><div class='del'>-	xorl %esi,%esi		# oldset</div><div class='del'>-	movq %rsp,%rdi		# &amp;pt_regs</div><div class='del'>-	call do_notify_resume</div><div class='add'>+	movq	$-1, ORIG_RAX(%rsp)</div><div class='add'>+	xorl	%esi, %esi			/* oldset */</div><div class='add'>+	movq	%rsp, %rdi			/* &amp;pt_regs */</div><div class='add'>+	call	do_notify_resume</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='ctx'> 	GET_THREAD_INFO(%rcx)</div><div class='del'>-	jmp retint_with_reschedule</div><div class='add'>+	jmp	retint_with_reschedule</div><div class='ctx'> </div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(common_interrupt)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -882,13 +745,11 @@ END(common_interrupt)</div><div class='ctx'>  */</div><div class='ctx'> .macro apicinterrupt3 num sym do_sym</div><div class='ctx'> ENTRY(\sym)</div><div class='del'>-	INTR_FRAME</div><div class='ctx'> 	ASM_CLAC</div><div class='del'>-	pushq_cfi $~(\num)</div><div class='add'>+	pushq	$~(\num)</div><div class='ctx'> .Lcommon_\sym:</div><div class='ctx'> 	interrupt \do_sym</div><div class='del'>-	jmp ret_from_intr</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	jmp	ret_from_intr</div><div class='ctx'> END(\sym)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -910,53 +771,45 @@ trace_apicinterrupt \num \sym</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \</div><div class='del'>-	irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt</div><div class='del'>-apicinterrupt3 REBOOT_VECTOR \</div><div class='del'>-	reboot_interrupt smp_reboot_interrupt</div><div class='add'>+apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR		irq_move_cleanup_interrupt	smp_irq_move_cleanup_interrupt</div><div class='add'>+apicinterrupt3 REBOOT_VECTOR			reboot_interrupt		smp_reboot_interrupt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_UV</div><div class='del'>-apicinterrupt3 UV_BAU_MESSAGE \</div><div class='del'>-	uv_bau_message_intr1 uv_bau_message_interrupt</div><div class='add'>+apicinterrupt3 UV_BAU_MESSAGE			uv_bau_message_intr1		uv_bau_message_interrupt</div><div class='ctx'> #endif</div><div class='del'>-apicinterrupt LOCAL_TIMER_VECTOR \</div><div class='del'>-	apic_timer_interrupt smp_apic_timer_interrupt</div><div class='del'>-apicinterrupt X86_PLATFORM_IPI_VECTOR \</div><div class='del'>-	x86_platform_ipi smp_x86_platform_ipi</div><div class='add'>+</div><div class='add'>+apicinterrupt LOCAL_TIMER_VECTOR		apic_timer_interrupt		smp_apic_timer_interrupt</div><div class='add'>+apicinterrupt X86_PLATFORM_IPI_VECTOR		x86_platform_ipi		smp_x86_platform_ipi</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_KVM</div><div class='del'>-apicinterrupt3 POSTED_INTR_VECTOR \</div><div class='del'>-	kvm_posted_intr_ipi smp_kvm_posted_intr_ipi</div><div class='add'>+apicinterrupt3 POSTED_INTR_VECTOR		kvm_posted_intr_ipi		smp_kvm_posted_intr_ipi</div><div class='add'>+apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR	kvm_posted_intr_wakeup_ipi	smp_kvm_posted_intr_wakeup_ipi</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_MCE_THRESHOLD</div><div class='del'>-apicinterrupt THRESHOLD_APIC_VECTOR \</div><div class='del'>-	threshold_interrupt smp_threshold_interrupt</div><div class='add'>+apicinterrupt THRESHOLD_APIC_VECTOR		threshold_interrupt		smp_threshold_interrupt</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_MCE_AMD</div><div class='add'>+apicinterrupt DEFERRED_ERROR_VECTOR		deferred_error_interrupt	smp_deferred_error_interrupt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_THERMAL_VECTOR</div><div class='del'>-apicinterrupt THERMAL_APIC_VECTOR \</div><div class='del'>-	thermal_interrupt smp_thermal_interrupt</div><div class='add'>+apicinterrupt THERMAL_APIC_VECTOR		thermal_interrupt		smp_thermal_interrupt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \</div><div class='del'>-	call_function_single_interrupt smp_call_function_single_interrupt</div><div class='del'>-apicinterrupt CALL_FUNCTION_VECTOR \</div><div class='del'>-	call_function_interrupt smp_call_function_interrupt</div><div class='del'>-apicinterrupt RESCHEDULE_VECTOR \</div><div class='del'>-	reschedule_interrupt smp_reschedule_interrupt</div><div class='add'>+apicinterrupt CALL_FUNCTION_SINGLE_VECTOR	call_function_single_interrupt	smp_call_function_single_interrupt</div><div class='add'>+apicinterrupt CALL_FUNCTION_VECTOR		call_function_interrupt		smp_call_function_interrupt</div><div class='add'>+apicinterrupt RESCHEDULE_VECTOR			reschedule_interrupt		smp_reschedule_interrupt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-apicinterrupt ERROR_APIC_VECTOR \</div><div class='del'>-	error_interrupt smp_error_interrupt</div><div class='del'>-apicinterrupt SPURIOUS_APIC_VECTOR \</div><div class='del'>-	spurious_interrupt smp_spurious_interrupt</div><div class='add'>+apicinterrupt ERROR_APIC_VECTOR			error_interrupt			smp_error_interrupt</div><div class='add'>+apicinterrupt SPURIOUS_APIC_VECTOR		spurious_interrupt		smp_spurious_interrupt</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IRQ_WORK</div><div class='del'>-apicinterrupt IRQ_WORK_VECTOR \</div><div class='del'>-	irq_work_interrupt smp_irq_work_interrupt</div><div class='add'>+apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -971,100 +824,87 @@ ENTRY(\sym)</div><div class='ctx'> 	.error "using shift_ist requires paranoid=1"</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	.if \has_error_code</div><div class='del'>-	XCPT_FRAME</div><div class='del'>-	.else</div><div class='del'>-	INTR_FRAME</div><div class='del'>-	.endif</div><div class='del'>-</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	PARAVIRT_ADJUST_EXCEPTION_FRAME</div><div class='ctx'> </div><div class='ctx'> 	.ifeq \has_error_code</div><div class='del'>-	pushq_cfi $-1			/* ORIG_RAX: no syscall to restart */</div><div class='add'>+	pushq	$-1				/* ORIG_RAX: no syscall to restart */</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	ALLOC_PT_GPREGS_ON_STACK</div><div class='ctx'> </div><div class='ctx'> 	.if \paranoid</div><div class='ctx'> 	.if \paranoid == 1</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	testl $3, CS(%rsp)		/* If coming from userspace, switch */</div><div class='del'>-	jnz 1f				/* stacks. */</div><div class='add'>+	testb	$3, CS(%rsp)			/* If coming from userspace, switch stacks */</div><div class='add'>+	jnz	1f</div><div class='ctx'> 	.endif</div><div class='del'>-	call paranoid_entry</div><div class='add'>+	call	paranoid_entry</div><div class='ctx'> 	.else</div><div class='del'>-	call error_entry</div><div class='add'>+	call	error_entry</div><div class='ctx'> 	.endif</div><div class='ctx'> 	/* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */</div><div class='ctx'> </div><div class='del'>-	DEFAULT_FRAME 0</div><div class='del'>-</div><div class='ctx'> 	.if \paranoid</div><div class='ctx'> 	.if \shift_ist != -1</div><div class='del'>-	TRACE_IRQS_OFF_DEBUG		/* reload IDT in case of recursion */</div><div class='add'>+	TRACE_IRQS_OFF_DEBUG			/* reload IDT in case of recursion */</div><div class='ctx'> 	.else</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	movq %rsp,%rdi			/* pt_regs pointer */</div><div class='add'>+	movq	%rsp, %rdi			/* pt_regs pointer */</div><div class='ctx'> </div><div class='ctx'> 	.if \has_error_code</div><div class='del'>-	movq ORIG_RAX(%rsp),%rsi	/* get error code */</div><div class='del'>-	movq $-1,ORIG_RAX(%rsp)		/* no syscall to restart */</div><div class='add'>+	movq	ORIG_RAX(%rsp), %rsi		/* get error code */</div><div class='add'>+	movq	$-1, ORIG_RAX(%rsp)		/* no syscall to restart */</div><div class='ctx'> 	.else</div><div class='del'>-	xorl %esi,%esi			/* no error code */</div><div class='add'>+	xorl	%esi, %esi			/* no error code */</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	.if \shift_ist != -1</div><div class='del'>-	subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)</div><div class='add'>+	subq	$EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	call \do_sym</div><div class='add'>+	call	\do_sym</div><div class='ctx'> </div><div class='ctx'> 	.if \shift_ist != -1</div><div class='del'>-	addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)</div><div class='add'>+	addq	$EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	/* these procedures expect "no swapgs" flag in ebx */</div><div class='ctx'> 	.if \paranoid</div><div class='del'>-	jmp paranoid_exit</div><div class='add'>+	jmp	paranoid_exit</div><div class='ctx'> 	.else</div><div class='del'>-	jmp error_exit</div><div class='add'>+	jmp	error_exit</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	.if \paranoid == 1</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Paranoid entry from userspace.  Switch stacks and treat it</div><div class='ctx'> 	 * as a normal entry.  This means that paranoid handlers</div><div class='ctx'> 	 * run in real process context if user_mode(regs).</div><div class='ctx'> 	 */</div><div class='ctx'> 1:</div><div class='del'>-	call error_entry</div><div class='add'>+	call	error_entry</div><div class='ctx'> </div><div class='del'>-	DEFAULT_FRAME 0</div><div class='ctx'> </div><div class='del'>-	movq %rsp,%rdi			/* pt_regs pointer */</div><div class='del'>-	call sync_regs</div><div class='del'>-	movq %rax,%rsp			/* switch stack */</div><div class='add'>+	movq	%rsp, %rdi			/* pt_regs pointer */</div><div class='add'>+	call	sync_regs</div><div class='add'>+	movq	%rax, %rsp			/* switch stack */</div><div class='ctx'> </div><div class='del'>-	movq %rsp,%rdi			/* pt_regs pointer */</div><div class='add'>+	movq	%rsp, %rdi			/* pt_regs pointer */</div><div class='ctx'> </div><div class='ctx'> 	.if \has_error_code</div><div class='del'>-	movq ORIG_RAX(%rsp),%rsi	/* get error code */</div><div class='del'>-	movq $-1,ORIG_RAX(%rsp)		/* no syscall to restart */</div><div class='add'>+	movq	ORIG_RAX(%rsp), %rsi		/* get error code */</div><div class='add'>+	movq	$-1, ORIG_RAX(%rsp)		/* no syscall to restart */</div><div class='ctx'> 	.else</div><div class='del'>-	xorl %esi,%esi			/* no error code */</div><div class='add'>+	xorl	%esi, %esi			/* no error code */</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	call \do_sym</div><div class='add'>+	call	\do_sym</div><div class='ctx'> </div><div class='del'>-	jmp error_exit			/* %ebx: no swapgs flag */</div><div class='add'>+	jmp	error_exit			/* %ebx: no swapgs flag */</div><div class='ctx'> 	.endif</div><div class='del'>-</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(\sym)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -1079,65 +919,58 @@ idtentry \sym \do_sym has_error_code=\has_error_code</div><div class='ctx'> .endm</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-idtentry divide_error do_divide_error has_error_code=0</div><div class='del'>-idtentry overflow do_overflow has_error_code=0</div><div class='del'>-idtentry bounds do_bounds has_error_code=0</div><div class='del'>-idtentry invalid_op do_invalid_op has_error_code=0</div><div class='del'>-idtentry device_not_available do_device_not_available has_error_code=0</div><div class='del'>-idtentry double_fault do_double_fault has_error_code=1 paranoid=2</div><div class='del'>-idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0</div><div class='del'>-idtentry invalid_TSS do_invalid_TSS has_error_code=1</div><div class='del'>-idtentry segment_not_present do_segment_not_present has_error_code=1</div><div class='del'>-idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0</div><div class='del'>-idtentry coprocessor_error do_coprocessor_error has_error_code=0</div><div class='del'>-idtentry alignment_check do_alignment_check has_error_code=1</div><div class='del'>-idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Reload gs selector with exception handling */</div><div class='del'>-	/* edi:  new selector */</div><div class='add'>+idtentry divide_error			do_divide_error			has_error_code=0</div><div class='add'>+idtentry overflow			do_overflow			has_error_code=0</div><div class='add'>+idtentry bounds				do_bounds			has_error_code=0</div><div class='add'>+idtentry invalid_op			do_invalid_op			has_error_code=0</div><div class='add'>+idtentry device_not_available		do_device_not_available		has_error_code=0</div><div class='add'>+idtentry double_fault			do_double_fault			has_error_code=1 paranoid=2</div><div class='add'>+idtentry coprocessor_segment_overrun	do_coprocessor_segment_overrun	has_error_code=0</div><div class='add'>+idtentry invalid_TSS			do_invalid_TSS			has_error_code=1</div><div class='add'>+idtentry segment_not_present		do_segment_not_present		has_error_code=1</div><div class='add'>+idtentry spurious_interrupt_bug		do_spurious_interrupt_bug	has_error_code=0</div><div class='add'>+idtentry coprocessor_error		do_coprocessor_error		has_error_code=0</div><div class='add'>+idtentry alignment_check		do_alignment_check		has_error_code=1</div><div class='add'>+idtentry simd_coprocessor_error		do_simd_coprocessor_error	has_error_code=0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reload gs selector with exception handling</div><div class='add'>+	 * edi:  new selector</div><div class='add'>+	 */</div><div class='ctx'> ENTRY(native_load_gs_index)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushfq_cfi</div><div class='add'>+	pushfq</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_ANY &amp; ~CLBR_RDI)</div><div class='ctx'> 	SWAPGS</div><div class='ctx'> gs_change:</div><div class='del'>-	movl %edi,%gs</div><div class='del'>-2:	mfence		/* workaround */</div><div class='add'>+	movl	%edi, %gs</div><div class='add'>+2:	mfence					/* workaround */</div><div class='ctx'> 	SWAPGS</div><div class='del'>-	popfq_cfi</div><div class='add'>+	popfq</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(native_load_gs_index)</div><div class='ctx'> </div><div class='del'>-	_ASM_EXTABLE(gs_change,bad_gs)</div><div class='del'>-	.section .fixup,"ax"</div><div class='add'>+	_ASM_EXTABLE(gs_change, bad_gs)</div><div class='add'>+	.section .fixup, "ax"</div><div class='ctx'> 	/* running with kernelgs */</div><div class='ctx'> bad_gs:</div><div class='del'>-	SWAPGS			/* switch back to user gs */</div><div class='del'>-	xorl %eax,%eax</div><div class='del'>-	movl %eax,%gs</div><div class='del'>-	jmp  2b</div><div class='add'>+	SWAPGS					/* switch back to user gs */</div><div class='add'>+	xorl	%eax, %eax</div><div class='add'>+	movl	%eax, %gs</div><div class='add'>+	jmp	2b</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='ctx'> /* Call softirq on interrupt stack. Interrupts are off. */</div><div class='ctx'> ENTRY(do_softirq_own_stack)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushq_cfi %rbp</div><div class='del'>-	CFI_REL_OFFSET rbp,0</div><div class='del'>-	mov  %rsp,%rbp</div><div class='del'>-	CFI_DEF_CFA_REGISTER rbp</div><div class='del'>-	incl PER_CPU_VAR(irq_count)</div><div class='del'>-	cmove PER_CPU_VAR(irq_stack_ptr),%rsp</div><div class='del'>-	push  %rbp			# backlink for old unwinder</div><div class='del'>-	call __do_softirq</div><div class='add'>+	pushq	%rbp</div><div class='add'>+	mov	%rsp, %rbp</div><div class='add'>+	incl	PER_CPU_VAR(irq_count)</div><div class='add'>+	cmove	PER_CPU_VAR(irq_stack_ptr), %rsp</div><div class='add'>+	push	%rbp				/* frame pointer backlink */</div><div class='add'>+	call	__do_softirq</div><div class='ctx'> 	leaveq</div><div class='del'>-	CFI_RESTORE		rbp</div><div class='del'>-	CFI_DEF_CFA_REGISTER	rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET   -8</div><div class='del'>-	decl PER_CPU_VAR(irq_count)</div><div class='add'>+	decl	PER_CPU_VAR(irq_count)</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(do_softirq_own_stack)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_XEN</div><div class='hunk'>@@ -1156,29 +989,24 @@ idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0</div><div class='ctx'>  * existing activation in its critical region -- if so, we pop the current</div><div class='ctx'>  * activation and restart the handler using the previous one.</div><div class='ctx'>  */</div><div class='del'>-ENTRY(xen_do_hypervisor_callback)   # do_hypervisor_callback(struct *pt_regs)</div><div class='del'>-	CFI_STARTPROC</div><div class='add'>+ENTRY(xen_do_hypervisor_callback)		/* do_hypervisor_callback(struct *pt_regs) */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will</div><div class='ctx'>  * see the correct pointer to the pt_regs</div><div class='ctx'>  */</div><div class='del'>-	movq %rdi, %rsp            # we don't return, adjust the stack frame</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-	DEFAULT_FRAME</div><div class='del'>-11:	incl PER_CPU_VAR(irq_count)</div><div class='del'>-	movq %rsp,%rbp</div><div class='del'>-	CFI_DEF_CFA_REGISTER rbp</div><div class='del'>-	cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp</div><div class='del'>-	pushq %rbp			# backlink for old unwinder</div><div class='del'>-	call xen_evtchn_do_upcall</div><div class='del'>-	popq %rsp</div><div class='del'>-	CFI_DEF_CFA_REGISTER rsp</div><div class='del'>-	decl PER_CPU_VAR(irq_count)</div><div class='add'>+	movq	%rdi, %rsp			/* we don't return, adjust the stack frame */</div><div class='add'>+11:	incl	PER_CPU_VAR(irq_count)</div><div class='add'>+	movq	%rsp, %rbp</div><div class='add'>+	cmovzq	PER_CPU_VAR(irq_stack_ptr), %rsp</div><div class='add'>+	pushq	%rbp				/* frame pointer backlink */</div><div class='add'>+	call	xen_evtchn_do_upcall</div><div class='add'>+	popq	%rsp</div><div class='add'>+	decl	PER_CPU_VAR(irq_count)</div><div class='ctx'> #ifndef CONFIG_PREEMPT</div><div class='del'>-	call xen_maybe_preempt_hcall</div><div class='add'>+	call	xen_maybe_preempt_hcall</div><div class='ctx'> #endif</div><div class='del'>-	jmp  error_exit</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	jmp	error_exit</div><div class='ctx'> END(xen_do_hypervisor_callback)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1195,51 +1023,35 @@ END(xen_do_hypervisor_callback)</div><div class='ctx'>  * with its current contents: any discrepancy means we in category 1.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(xen_failsafe_callback)</div><div class='del'>-	INTR_FRAME 1 (6*8)</div><div class='del'>-	/*CFI_REL_OFFSET gs,GS*/</div><div class='del'>-	/*CFI_REL_OFFSET fs,FS*/</div><div class='del'>-	/*CFI_REL_OFFSET es,ES*/</div><div class='del'>-	/*CFI_REL_OFFSET ds,DS*/</div><div class='del'>-	CFI_REL_OFFSET r11,8</div><div class='del'>-	CFI_REL_OFFSET rcx,0</div><div class='del'>-	movw %ds,%cx</div><div class='del'>-	cmpw %cx,0x10(%rsp)</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	jne 1f</div><div class='del'>-	movw %es,%cx</div><div class='del'>-	cmpw %cx,0x18(%rsp)</div><div class='del'>-	jne 1f</div><div class='del'>-	movw %fs,%cx</div><div class='del'>-	cmpw %cx,0x20(%rsp)</div><div class='del'>-	jne 1f</div><div class='del'>-	movw %gs,%cx</div><div class='del'>-	cmpw %cx,0x28(%rsp)</div><div class='del'>-	jne 1f</div><div class='add'>+	movl	%ds, %ecx</div><div class='add'>+	cmpw	%cx, 0x10(%rsp)</div><div class='add'>+	jne	1f</div><div class='add'>+	movl	%es, %ecx</div><div class='add'>+	cmpw	%cx, 0x18(%rsp)</div><div class='add'>+	jne	1f</div><div class='add'>+	movl	%fs, %ecx</div><div class='add'>+	cmpw	%cx, 0x20(%rsp)</div><div class='add'>+	jne	1f</div><div class='add'>+	movl	%gs, %ecx</div><div class='add'>+	cmpw	%cx, 0x28(%rsp)</div><div class='add'>+	jne	1f</div><div class='ctx'> 	/* All segments match their saved values =&gt; Category 2 (Bad IRET). */</div><div class='del'>-	movq (%rsp),%rcx</div><div class='del'>-	CFI_RESTORE rcx</div><div class='del'>-	movq 8(%rsp),%r11</div><div class='del'>-	CFI_RESTORE r11</div><div class='del'>-	addq $0x30,%rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -0x30</div><div class='del'>-	pushq_cfi $0	/* RIP */</div><div class='del'>-	pushq_cfi %r11</div><div class='del'>-	pushq_cfi %rcx</div><div class='del'>-	jmp general_protection</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='add'>+	movq	(%rsp), %rcx</div><div class='add'>+	movq	8(%rsp), %r11</div><div class='add'>+	addq	$0x30, %rsp</div><div class='add'>+	pushq	$0				/* RIP */</div><div class='add'>+	pushq	%r11</div><div class='add'>+	pushq	%rcx</div><div class='add'>+	jmp	general_protection</div><div class='ctx'> 1:	/* Segment mismatch =&gt; Category 1 (Bad segment). Retry the IRET. */</div><div class='del'>-	movq (%rsp),%rcx</div><div class='del'>-	CFI_RESTORE rcx</div><div class='del'>-	movq 8(%rsp),%r11</div><div class='del'>-	CFI_RESTORE r11</div><div class='del'>-	addq $0x30,%rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -0x30</div><div class='del'>-	pushq_cfi $-1 /* orig_ax = -1 =&gt; not a system call */</div><div class='add'>+	movq	(%rsp), %rcx</div><div class='add'>+	movq	8(%rsp), %r11</div><div class='add'>+	addq	$0x30, %rsp</div><div class='add'>+	pushq	$-1 /* orig_ax = -1 =&gt; not a system call */</div><div class='ctx'> 	ALLOC_PT_GPREGS_ON_STACK</div><div class='ctx'> 	SAVE_C_REGS</div><div class='ctx'> 	SAVE_EXTRA_REGS</div><div class='del'>-	jmp error_exit</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	jmp	error_exit</div><div class='ctx'> END(xen_failsafe_callback)</div><div class='ctx'> </div><div class='ctx'> apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \</div><div class='hunk'>@@ -1252,21 +1064,25 @@ apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \</div><div class='ctx'> 	hyperv_callback_vector hyperv_vector_handler</div><div class='ctx'> #endif /* CONFIG_HYPERV */</div><div class='ctx'> </div><div class='del'>-idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK</div><div class='del'>-idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK</div><div class='del'>-idtentry stack_segment do_stack_segment has_error_code=1</div><div class='add'>+idtentry debug			do_debug		has_error_code=0	paranoid=1 shift_ist=DEBUG_STACK</div><div class='add'>+idtentry int3			do_int3			has_error_code=0	paranoid=1 shift_ist=DEBUG_STACK</div><div class='add'>+idtentry stack_segment		do_stack_segment	has_error_code=1</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_XEN</div><div class='del'>-idtentry xen_debug do_debug has_error_code=0</div><div class='del'>-idtentry xen_int3 do_int3 has_error_code=0</div><div class='del'>-idtentry xen_stack_segment do_stack_segment has_error_code=1</div><div class='add'>+idtentry xen_debug		do_debug		has_error_code=0</div><div class='add'>+idtentry xen_int3		do_int3			has_error_code=0</div><div class='add'>+idtentry xen_stack_segment	do_stack_segment	has_error_code=1</div><div class='ctx'> #endif</div><div class='del'>-idtentry general_protection do_general_protection has_error_code=1</div><div class='del'>-trace_idtentry page_fault do_page_fault has_error_code=1</div><div class='add'>+</div><div class='add'>+idtentry general_protection	do_general_protection	has_error_code=1</div><div class='add'>+trace_idtentry page_fault	do_page_fault		has_error_code=1</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_KVM_GUEST</div><div class='del'>-idtentry async_page_fault do_async_page_fault has_error_code=1</div><div class='add'>+idtentry async_page_fault	do_async_page_fault	has_error_code=1</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86_MCE</div><div class='del'>-idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)</div><div class='add'>+idtentry machine_check					has_error_code=0	paranoid=1 do_sym=*machine_check_vector(%rip)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1275,19 +1091,17 @@ idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(</div><div class='ctx'>  * Return: ebx=0: need swapgs on exit, ebx=1: otherwise</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(paranoid_entry)</div><div class='del'>-	XCPT_FRAME 1 15*8</div><div class='ctx'> 	cld</div><div class='ctx'> 	SAVE_C_REGS 8</div><div class='ctx'> 	SAVE_EXTRA_REGS 8</div><div class='del'>-	movl $1,%ebx</div><div class='del'>-	movl $MSR_GS_BASE,%ecx</div><div class='add'>+	movl	$1, %ebx</div><div class='add'>+	movl	$MSR_GS_BASE, %ecx</div><div class='ctx'> 	rdmsr</div><div class='del'>-	testl %edx,%edx</div><div class='del'>-	js 1f	/* negative -&gt; in kernel */</div><div class='add'>+	testl	%edx, %edx</div><div class='add'>+	js	1f				/* negative -&gt; in kernel */</div><div class='ctx'> 	SWAPGS</div><div class='del'>-	xorl %ebx,%ebx</div><div class='add'>+	xorl	%ebx, %ebx</div><div class='ctx'> 1:	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(paranoid_entry)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1299,17 +1113,17 @@ END(paranoid_entry)</div><div class='ctx'>  * in syscall entry), so checking for preemption here would</div><div class='ctx'>  * be complicated.  Fortunately, we there's no good reason</div><div class='ctx'>  * to try to handle preemption here.</div><div class='add'>+ *</div><div class='add'>+ * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)</div><div class='ctx'>  */</div><div class='del'>-/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */</div><div class='ctx'> ENTRY(paranoid_exit)</div><div class='del'>-	DEFAULT_FRAME</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF_DEBUG</div><div class='del'>-	testl %ebx,%ebx				/* swapgs needed? */</div><div class='del'>-	jnz paranoid_exit_no_swapgs</div><div class='add'>+	testl	%ebx, %ebx			/* swapgs needed? */</div><div class='add'>+	jnz	paranoid_exit_no_swapgs</div><div class='ctx'> 	TRACE_IRQS_IRETQ</div><div class='ctx'> 	SWAPGS_UNSAFE_STACK</div><div class='del'>-	jmp paranoid_exit_restore</div><div class='add'>+	jmp	paranoid_exit_restore</div><div class='ctx'> paranoid_exit_no_swapgs:</div><div class='ctx'> 	TRACE_IRQS_IRETQ_DEBUG</div><div class='ctx'> paranoid_exit_restore:</div><div class='hunk'>@@ -1317,24 +1131,24 @@ paranoid_exit_restore:</div><div class='ctx'> 	RESTORE_C_REGS</div><div class='ctx'> 	REMOVE_PT_GPREGS_FROM_STACK 8</div><div class='ctx'> 	INTERRUPT_RETURN</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(paranoid_exit)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Save all registers in pt_regs, and switch gs if needed.</div><div class='del'>- * Return: ebx=0: need swapgs on exit, ebx=1: otherwise</div><div class='add'>+ * Return: EBX=0: came from user mode; EBX=1: otherwise</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(error_entry)</div><div class='del'>-	XCPT_FRAME 1 15*8</div><div class='ctx'> 	cld</div><div class='ctx'> 	SAVE_C_REGS 8</div><div class='ctx'> 	SAVE_EXTRA_REGS 8</div><div class='del'>-	xorl %ebx,%ebx</div><div class='del'>-	testl $3,CS+8(%rsp)</div><div class='del'>-	je error_kernelspace</div><div class='del'>-error_swapgs:</div><div class='add'>+	xorl	%ebx, %ebx</div><div class='add'>+	testb	$3, CS+8(%rsp)</div><div class='add'>+	jz	error_kernelspace</div><div class='add'>+</div><div class='add'>+	/* We entered from user mode */</div><div class='ctx'> 	SWAPGS</div><div class='del'>-error_sti:</div><div class='add'>+</div><div class='add'>+error_entry_done:</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='hunk'>@@ -1345,56 +1159,66 @@ error_sti:</div><div class='ctx'> 	 * for these here too.</div><div class='ctx'> 	 */</div><div class='ctx'> error_kernelspace:</div><div class='del'>-	CFI_REL_OFFSET rcx, RCX+8</div><div class='del'>-	incl %ebx</div><div class='del'>-	leaq native_irq_return_iret(%rip),%rcx</div><div class='del'>-	cmpq %rcx,RIP+8(%rsp)</div><div class='del'>-	je error_bad_iret</div><div class='del'>-	movl %ecx,%eax	/* zero extend */</div><div class='del'>-	cmpq %rax,RIP+8(%rsp)</div><div class='del'>-	je bstep_iret</div><div class='del'>-	cmpq $gs_change,RIP+8(%rsp)</div><div class='del'>-	je error_swapgs</div><div class='del'>-	jmp error_sti</div><div class='add'>+	incl	%ebx</div><div class='add'>+	leaq	native_irq_return_iret(%rip), %rcx</div><div class='add'>+	cmpq	%rcx, RIP+8(%rsp)</div><div class='add'>+	je	error_bad_iret</div><div class='add'>+	movl	%ecx, %eax			/* zero extend */</div><div class='add'>+	cmpq	%rax, RIP+8(%rsp)</div><div class='add'>+	je	bstep_iret</div><div class='add'>+	cmpq	$gs_change, RIP+8(%rsp)</div><div class='add'>+	jne	error_entry_done</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * hack: gs_change can fail with user gsbase.  If this happens, fix up</div><div class='add'>+	 * gsbase and proceed.  We'll fix up the exception and land in</div><div class='add'>+	 * gs_change's error handler with kernel gsbase.</div><div class='add'>+	 */</div><div class='add'>+	SWAPGS</div><div class='add'>+	jmp	error_entry_done</div><div class='ctx'> </div><div class='ctx'> bstep_iret:</div><div class='ctx'> 	/* Fix truncated RIP */</div><div class='del'>-	movq %rcx,RIP+8(%rsp)</div><div class='add'>+	movq	%rcx, RIP+8(%rsp)</div><div class='ctx'> 	/* fall through */</div><div class='ctx'> </div><div class='ctx'> error_bad_iret:</div><div class='add'>+	/*</div><div class='add'>+	 * We came from an IRET to user mode, so we have user gsbase.</div><div class='add'>+	 * Switch to kernel gsbase:</div><div class='add'>+	 */</div><div class='ctx'> 	SWAPGS</div><div class='del'>-	mov %rsp,%rdi</div><div class='del'>-	call fixup_bad_iret</div><div class='del'>-	mov %rax,%rsp</div><div class='del'>-	decl %ebx	/* Return to usergs */</div><div class='del'>-	jmp error_sti</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Pretend that the exception came from user mode: set up pt_regs</div><div class='add'>+	 * as if we faulted immediately after IRET and clear EBX so that</div><div class='add'>+	 * error_exit knows that we will be returning to user mode.</div><div class='add'>+	 */</div><div class='add'>+	mov	%rsp, %rdi</div><div class='add'>+	call	fixup_bad_iret</div><div class='add'>+	mov	%rax, %rsp</div><div class='add'>+	decl	%ebx</div><div class='add'>+	jmp	error_entry_done</div><div class='ctx'> END(error_entry)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */</div><div class='add'>+/*</div><div class='add'>+ * On entry, EBS is a "return to kernel mode" flag:</div><div class='add'>+ *   1: already in kernel mode, don't need SWAPGS</div><div class='add'>+ *   0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode</div><div class='add'>+ */</div><div class='ctx'> ENTRY(error_exit)</div><div class='del'>-	DEFAULT_FRAME</div><div class='del'>-	movl %ebx,%eax</div><div class='add'>+	movl	%ebx, %eax</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='del'>-	GET_THREAD_INFO(%rcx)</div><div class='del'>-	testl %eax,%eax</div><div class='del'>-	jne retint_kernel</div><div class='del'>-	LOCKDEP_SYS_EXIT_IRQ</div><div class='del'>-	movl TI_flags(%rcx),%edx</div><div class='del'>-	movl $_TIF_WORK_MASK,%edi</div><div class='del'>-	andl %edi,%edx</div><div class='del'>-	jnz retint_careful</div><div class='del'>-	jmp retint_swapgs</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	testl	%eax, %eax</div><div class='add'>+	jnz	retint_kernel</div><div class='add'>+	jmp	retint_user</div><div class='ctx'> END(error_exit)</div><div class='ctx'> </div><div class='ctx'> /* Runs on exception stack */</div><div class='ctx'> ENTRY(nmi)</div><div class='del'>-	INTR_FRAME</div><div class='ctx'> 	PARAVIRT_ADJUST_EXCEPTION_FRAME</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We allow breakpoints in NMIs. If a breakpoint occurs, then</div><div class='hunk'>@@ -1413,11 +1237,12 @@ ENTRY(nmi)</div><div class='ctx'> 	 *  If the variable is not set and the stack is not the NMI</div><div class='ctx'> 	 *  stack then:</div><div class='ctx'> 	 *    o Set the special variable on the stack</div><div class='del'>-	 *    o Copy the interrupt frame into a "saved" location on the stack</div><div class='del'>-	 *    o Copy the interrupt frame into a "copy" location on the stack</div><div class='add'>+	 *    o Copy the interrupt frame into an "outermost" location on the</div><div class='add'>+	 *      stack</div><div class='add'>+	 *    o Copy the interrupt frame into an "iret" location on the stack</div><div class='ctx'> 	 *    o Continue processing the NMI</div><div class='ctx'> 	 *  If the variable is set or the previous stack is the NMI stack:</div><div class='del'>-	 *    o Modify the "copy" location to jump to the repeate_nmi</div><div class='add'>+	 *    o Modify the "iret" location to jump to the repeat_nmi</div><div class='ctx'> 	 *    o return back to the first NMI</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Now on exit of the first NMI, we first clear the stack variable</div><div class='hunk'>@@ -1426,140 +1251,225 @@ ENTRY(nmi)</div><div class='ctx'> 	 * a nested NMI that updated the copy interrupt stack frame, a</div><div class='ctx'> 	 * jump will be made to the repeat_nmi code that will handle the second</div><div class='ctx'> 	 * NMI.</div><div class='add'>+	 *</div><div class='add'>+	 * However, espfix prevents us from directly returning to userspace</div><div class='add'>+	 * with a single IRET instruction.  Similarly, IRET to user mode</div><div class='add'>+	 * can fault.  We therefore handle NMIs from user space like</div><div class='add'>+	 * other IST entries.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* Use %rdx as our temp variable throughout */</div><div class='del'>-	pushq_cfi %rdx</div><div class='del'>-	CFI_REL_OFFSET rdx, 0</div><div class='add'>+	pushq	%rdx</div><div class='add'>+</div><div class='add'>+	testb	$3, CS-RIP+8(%rsp)</div><div class='add'>+	jz	.Lnmi_from_kernel</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NMI from user mode.  We need to run on the thread stack, but we</div><div class='add'>+	 * can't go through the normal entry paths: NMIs are masked, and</div><div class='add'>+	 * we don't want to enable interrupts, because then we'll end</div><div class='add'>+	 * up in an awkward situation in which IRQs are on but NMIs</div><div class='add'>+	 * are off.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	SWAPGS</div><div class='add'>+	cld</div><div class='add'>+	movq	%rsp, %rdx</div><div class='add'>+	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='add'>+	pushq	5*8(%rdx)	/* pt_regs-&gt;ss */</div><div class='add'>+	pushq	4*8(%rdx)	/* pt_regs-&gt;rsp */</div><div class='add'>+	pushq	3*8(%rdx)	/* pt_regs-&gt;flags */</div><div class='add'>+	pushq	2*8(%rdx)	/* pt_regs-&gt;cs */</div><div class='add'>+	pushq	1*8(%rdx)	/* pt_regs-&gt;rip */</div><div class='add'>+	pushq   $-1		/* pt_regs-&gt;orig_ax */</div><div class='add'>+	pushq   %rdi		/* pt_regs-&gt;di */</div><div class='add'>+	pushq   %rsi		/* pt_regs-&gt;si */</div><div class='add'>+	pushq   (%rdx)		/* pt_regs-&gt;dx */</div><div class='add'>+	pushq   %rcx		/* pt_regs-&gt;cx */</div><div class='add'>+	pushq   %rax		/* pt_regs-&gt;ax */</div><div class='add'>+	pushq   %r8		/* pt_regs-&gt;r8 */</div><div class='add'>+	pushq   %r9		/* pt_regs-&gt;r9 */</div><div class='add'>+	pushq   %r10		/* pt_regs-&gt;r10 */</div><div class='add'>+	pushq   %r11		/* pt_regs-&gt;r11 */</div><div class='add'>+	pushq	%rbx		/* pt_regs-&gt;rbx */</div><div class='add'>+	pushq	%rbp		/* pt_regs-&gt;rbp */</div><div class='add'>+	pushq	%r12		/* pt_regs-&gt;r12 */</div><div class='add'>+	pushq	%r13		/* pt_regs-&gt;r13 */</div><div class='add'>+	pushq	%r14		/* pt_regs-&gt;r14 */</div><div class='add'>+	pushq	%r15		/* pt_regs-&gt;r15 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * At this point we no longer need to worry about stack damage</div><div class='add'>+	 * due to nesting -- we're on the normal thread stack and we're</div><div class='add'>+	 * done with the NMI stack.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	movq	%rsp, %rdi</div><div class='add'>+	movq	$-1, %rsi</div><div class='add'>+	call	do_nmi</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If %cs was not the kernel segment, then the NMI triggered in user</div><div class='del'>-	 * space, which means it is definitely not nested.</div><div class='add'>+	 * Return back to user mode.  We must *not* do the normal exit</div><div class='add'>+	 * work, because we don't want to enable interrupts.  Fortunately,</div><div class='add'>+	 * do_nmi doesn't modify pt_regs.</div><div class='ctx'> 	 */</div><div class='del'>-	cmpl $__KERNEL_CS, 16(%rsp)</div><div class='del'>-	jne first_nmi</div><div class='add'>+	SWAPGS</div><div class='add'>+	jmp	restore_c_regs_and_iret</div><div class='ctx'> </div><div class='add'>+.Lnmi_from_kernel:</div><div class='ctx'> 	/*</div><div class='del'>-	 * Check the special variable on the stack to see if NMIs are</div><div class='del'>-	 * executing.</div><div class='add'>+	 * Here's what our stack frame will look like:</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | original SS                                             |</div><div class='add'>+	 * | original Return RSP                                     |</div><div class='add'>+	 * | original RFLAGS                                         |</div><div class='add'>+	 * | original CS                                             |</div><div class='add'>+	 * | original RIP                                            |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | temp storage for rdx                                    |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | "NMI executing" variable                                |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | iret SS          } Copied from "outermost" frame        |</div><div class='add'>+	 * | iret Return RSP  } on each loop iteration; overwritten  |</div><div class='add'>+	 * | iret RFLAGS      } by a nested NMI to force another     |</div><div class='add'>+	 * | iret CS          } iteration if needed.                 |</div><div class='add'>+	 * | iret RIP         }                                      |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | outermost SS          } initialized in first_nmi;       |</div><div class='add'>+	 * | outermost Return RSP  } will not be changed before      |</div><div class='add'>+	 * | outermost RFLAGS      } NMI processing is done.         |</div><div class='add'>+	 * | outermost CS          } Copied to "iret" frame on each  |</div><div class='add'>+	 * | outermost RIP         } iteration.                      |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 * | pt_regs                                                 |</div><div class='add'>+	 * +---------------------------------------------------------+</div><div class='add'>+	 *</div><div class='add'>+	 * The "original" frame is used by hardware.  Before re-enabling</div><div class='add'>+	 * NMIs, we need to be done with it, and we need to leave enough</div><div class='add'>+	 * space for the asm code here.</div><div class='add'>+	 *</div><div class='add'>+	 * We return by executing IRET while RSP points to the "iret" frame.</div><div class='add'>+	 * That will either return for real or it will loop back into NMI</div><div class='add'>+	 * processing.</div><div class='add'>+	 *</div><div class='add'>+	 * The "outermost" frame is copied to the "iret" frame on each</div><div class='add'>+	 * iteration of the loop, so each iteration starts with the "iret"</div><div class='add'>+	 * frame pointing to the final return target.</div><div class='ctx'> 	 */</div><div class='del'>-	cmpl $1, -8(%rsp)</div><div class='del'>-	je nested_nmi</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Now test if the previous stack was an NMI stack.</div><div class='del'>-	 * We need the double check. We check the NMI stack to satisfy the</div><div class='del'>-	 * race when the first NMI clears the variable before returning.</div><div class='del'>-	 * We check the variable because the first NMI could be in a</div><div class='del'>-	 * breakpoint routine using a breakpoint stack.</div><div class='add'>+	 * Determine whether we're a nested NMI.</div><div class='add'>+	 *</div><div class='add'>+	 * If we interrupted kernel code between repeat_nmi and</div><div class='add'>+	 * end_repeat_nmi, then we are a nested NMI.  We must not</div><div class='add'>+	 * modify the "iret" frame because it's being written by</div><div class='add'>+	 * the outer NMI.  That's okay; the outer NMI handler is</div><div class='add'>+	 * about to about to call do_nmi anyway, so we can just</div><div class='add'>+	 * resume the outer NMI.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	movq	$repeat_nmi, %rdx</div><div class='add'>+	cmpq	8(%rsp), %rdx</div><div class='add'>+	ja	1f</div><div class='add'>+	movq	$end_repeat_nmi, %rdx</div><div class='add'>+	cmpq	8(%rsp), %rdx</div><div class='add'>+	ja	nested_nmi_out</div><div class='add'>+1:</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now check "NMI executing".  If it's set, then we're nested.</div><div class='add'>+	 * This will not detect if we interrupted an outer NMI just</div><div class='add'>+	 * before IRET.</div><div class='add'>+	 */</div><div class='add'>+	cmpl	$1, -8(%rsp)</div><div class='add'>+	je	nested_nmi</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now test if the previous stack was an NMI stack.  This covers</div><div class='add'>+	 * the case where we interrupt an outer NMI after it clears</div><div class='add'>+	 * "NMI executing" but before IRET.  We need to be careful, though:</div><div class='add'>+	 * there is one case in which RSP could point to the NMI stack</div><div class='add'>+	 * despite there being no NMI active: naughty userspace controls</div><div class='add'>+	 * RSP at the very beginning of the SYSCALL targets.  We can</div><div class='add'>+	 * pull a fast one on naughty userspace, though: we program</div><div class='add'>+	 * SYSCALL to mask DF, so userspace cannot cause DF to be set</div><div class='add'>+	 * if it controls the kernel's RSP.  We set DF before we clear</div><div class='add'>+	 * "NMI executing".</div><div class='ctx'> 	 */</div><div class='ctx'> 	lea	6*8(%rsp), %rdx</div><div class='ctx'> 	/* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */</div><div class='ctx'> 	cmpq	%rdx, 4*8(%rsp)</div><div class='ctx'> 	/* If the stack pointer is above the NMI stack, this is a normal NMI */</div><div class='ctx'> 	ja	first_nmi</div><div class='add'>+</div><div class='ctx'> 	subq	$EXCEPTION_STKSZ, %rdx</div><div class='ctx'> 	cmpq	%rdx, 4*8(%rsp)</div><div class='ctx'> 	/* If it is below the NMI stack, it is a normal NMI */</div><div class='ctx'> 	jb	first_nmi</div><div class='del'>-	/* Ah, it is within the NMI stack, treat it as nested */</div><div class='ctx'> </div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='add'>+	/* Ah, it is within the NMI stack. */</div><div class='add'>+</div><div class='add'>+	testb	$(X86_EFLAGS_DF &gt;&gt; 8), (3*8 + 1)(%rsp)</div><div class='add'>+	jz	first_nmi	/* RSP was user controlled. */</div><div class='add'>+</div><div class='add'>+	/* This is a nested NMI. */</div><div class='ctx'> </div><div class='ctx'> nested_nmi:</div><div class='ctx'> 	/*</div><div class='del'>-	 * Do nothing if we interrupted the fixup in repeat_nmi.</div><div class='del'>-	 * It's about to repeat the NMI handler, so we are fine</div><div class='del'>-	 * with ignoring this one.</div><div class='add'>+	 * Modify the "iret" frame to point to repeat_nmi, forcing another</div><div class='add'>+	 * iteration of NMI handling.</div><div class='ctx'> 	 */</div><div class='del'>-	movq $repeat_nmi, %rdx</div><div class='del'>-	cmpq 8(%rsp), %rdx</div><div class='del'>-	ja 1f</div><div class='del'>-	movq $end_repeat_nmi, %rdx</div><div class='del'>-	cmpq 8(%rsp), %rdx</div><div class='del'>-	ja nested_nmi_out</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	/* Set up the interrupted NMIs stack to jump to repeat_nmi */</div><div class='del'>-	leaq -1*8(%rsp), %rdx</div><div class='del'>-	movq %rdx, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 1*8</div><div class='del'>-	leaq -10*8(%rsp), %rdx</div><div class='del'>-	pushq_cfi $__KERNEL_DS</div><div class='del'>-	pushq_cfi %rdx</div><div class='del'>-	pushfq_cfi</div><div class='del'>-	pushq_cfi $__KERNEL_CS</div><div class='del'>-	pushq_cfi $repeat_nmi</div><div class='add'>+	subq	$8, %rsp</div><div class='add'>+	leaq	-10*8(%rsp), %rdx</div><div class='add'>+	pushq	$__KERNEL_DS</div><div class='add'>+	pushq	%rdx</div><div class='add'>+	pushfq</div><div class='add'>+	pushq	$__KERNEL_CS</div><div class='add'>+	pushq	$repeat_nmi</div><div class='ctx'> </div><div class='ctx'> 	/* Put stack back */</div><div class='del'>-	addq $(6*8), %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -6*8</div><div class='add'>+	addq	$(6*8), %rsp</div><div class='ctx'> </div><div class='ctx'> nested_nmi_out:</div><div class='del'>-	popq_cfi %rdx</div><div class='del'>-	CFI_RESTORE rdx</div><div class='add'>+	popq	%rdx</div><div class='ctx'> </div><div class='del'>-	/* No need to check faults here */</div><div class='add'>+	/* We are returning to kernel mode, so this cannot result in a fault. */</div><div class='ctx'> 	INTERRUPT_RETURN</div><div class='ctx'> </div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> first_nmi:</div><div class='del'>-	/*</div><div class='del'>-	 * Because nested NMIs will use the pushed location that we</div><div class='del'>-	 * stored in rdx, we must keep that space available.</div><div class='del'>-	 * Here's what our stack frame will look like:</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | original SS             |</div><div class='del'>-	 * | original Return RSP     |</div><div class='del'>-	 * | original RFLAGS         |</div><div class='del'>-	 * | original CS             |</div><div class='del'>-	 * | original RIP            |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | temp storage for rdx    |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | NMI executing variable  |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | copied SS               |</div><div class='del'>-	 * | copied Return RSP       |</div><div class='del'>-	 * | copied RFLAGS           |</div><div class='del'>-	 * | copied CS               |</div><div class='del'>-	 * | copied RIP              |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | Saved SS                |</div><div class='del'>-	 * | Saved Return RSP        |</div><div class='del'>-	 * | Saved RFLAGS            |</div><div class='del'>-	 * | Saved CS                |</div><div class='del'>-	 * | Saved RIP               |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 * | pt_regs                 |</div><div class='del'>-	 * +-------------------------+</div><div class='del'>-	 *</div><div class='del'>-	 * The saved stack frame is used to fix up the copied stack frame</div><div class='del'>-	 * that a nested NMI may change to make the interrupted NMI iret jump</div><div class='del'>-	 * to the repeat_nmi. The original stack frame and the temp storage</div><div class='del'>-	 * is also used by nested NMIs and can not be trusted on exit.</div><div class='del'>-	 */</div><div class='del'>-	/* Do not pop rdx, nested NMIs will corrupt that part of the stack */</div><div class='del'>-	movq (%rsp), %rdx</div><div class='del'>-	CFI_RESTORE rdx</div><div class='add'>+	/* Restore rdx. */</div><div class='add'>+	movq	(%rsp), %rdx</div><div class='ctx'> </div><div class='del'>-	/* Set the NMI executing variable on the stack. */</div><div class='del'>-	pushq_cfi $1</div><div class='add'>+	/* Make room for "NMI executing". */</div><div class='add'>+	pushq	$0</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Leave room for the "copied" frame</div><div class='del'>-	 */</div><div class='del'>-	subq $(5*8), %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 5*8</div><div class='add'>+	/* Leave room for the "iret" frame */</div><div class='add'>+	subq	$(5*8), %rsp</div><div class='ctx'> </div><div class='del'>-	/* Copy the stack frame to the Saved frame */</div><div class='add'>+	/* Copy the "original" frame to the "outermost" frame */</div><div class='ctx'> 	.rept 5</div><div class='del'>-	pushq_cfi 11*8(%rsp)</div><div class='add'>+	pushq	11*8(%rsp)</div><div class='ctx'> 	.endr</div><div class='del'>-	CFI_DEF_CFA_OFFSET 5*8</div><div class='ctx'> </div><div class='ctx'> 	/* Everything up to here is safe from nested NMIs */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEBUG_ENTRY</div><div class='add'>+	/*</div><div class='add'>+	 * For ease of testing, unmask NMIs right away.  Disabled by</div><div class='add'>+	 * default because IRET is very expensive.</div><div class='add'>+	 */</div><div class='add'>+	pushq	$0		/* SS */</div><div class='add'>+	pushq	%rsp		/* RSP (minus 8 because of the previous push) */</div><div class='add'>+	addq	$8, (%rsp)	/* Fix up RSP */</div><div class='add'>+	pushfq			/* RFLAGS */</div><div class='add'>+	pushq	$__KERNEL_CS	/* CS */</div><div class='add'>+	pushq	$1f		/* RIP */</div><div class='add'>+	INTERRUPT_RETURN	/* continues at repeat_nmi below */</div><div class='add'>+1:</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+repeat_nmi:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there was a nested NMI, the first NMI's iret will return</div><div class='ctx'> 	 * here. But NMIs are still enabled and we can take another</div><div class='hunk'>@@ -1568,31 +1478,33 @@ first_nmi:</div><div class='ctx'> 	 * it will just return, as we are about to repeat an NMI anyway.</div><div class='ctx'> 	 * This makes it safe to copy to the stack frame that a nested</div><div class='ctx'> 	 * NMI will update.</div><div class='add'>+	 *</div><div class='add'>+	 * RSP is pointing to "outermost RIP".  gsbase is unknown, but, if</div><div class='add'>+	 * we're repeating an NMI, gsbase has the same value that it had on</div><div class='add'>+	 * the first iteration.  paranoid_entry will load the kernel</div><div class='add'>+	 * gsbase if needed before we call do_nmi.  "NMI executing"</div><div class='add'>+	 * is zero.</div><div class='ctx'> 	 */</div><div class='del'>-repeat_nmi:</div><div class='add'>+	movq	$1, 10*8(%rsp)		/* Set "NMI executing". */</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='del'>-	 * Update the stack variable to say we are still in NMI (the update</div><div class='del'>-	 * is benign for the non-repeat case, where 1 was pushed just above</div><div class='del'>-	 * to this very stack slot).</div><div class='add'>+	 * Copy the "outermost" frame to the "iret" frame.  NMIs that nest</div><div class='add'>+	 * here must not modify the "iret" frame while we're writing to</div><div class='add'>+	 * it or it will end up containing garbage.</div><div class='ctx'> 	 */</div><div class='del'>-	movq $1, 10*8(%rsp)</div><div class='del'>-</div><div class='del'>-	/* Make another copy, this one may be modified by nested NMIs */</div><div class='del'>-	addq $(10*8), %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -10*8</div><div class='add'>+	addq	$(10*8), %rsp</div><div class='ctx'> 	.rept 5</div><div class='del'>-	pushq_cfi -6*8(%rsp)</div><div class='add'>+	pushq	-6*8(%rsp)</div><div class='ctx'> 	.endr</div><div class='del'>-	subq $(5*8), %rsp</div><div class='del'>-	CFI_DEF_CFA_OFFSET 5*8</div><div class='add'>+	subq	$(5*8), %rsp</div><div class='ctx'> end_repeat_nmi:</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Everything below this point can be preempted by a nested</div><div class='del'>-	 * NMI if the first NMI took an exception and reset our iret stack</div><div class='del'>-	 * so that we repeat another NMI.</div><div class='add'>+	 * Everything below this point can be preempted by a nested NMI.</div><div class='add'>+	 * If this happens, then the inner NMI will change the "iret"</div><div class='add'>+	 * frame to point back to repeat_nmi.</div><div class='ctx'> 	 */</div><div class='del'>-	pushq_cfi $-1		/* ORIG_RAX: no syscall to restart */</div><div class='add'>+	pushq	$-1				/* ORIG_RAX: no syscall to restart */</div><div class='ctx'> 	ALLOC_PT_GPREGS_ON_STACK</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1602,52 +1514,44 @@ end_repeat_nmi:</div><div class='ctx'> 	 * setting NEED_RESCHED or anything that normal interrupts and</div><div class='ctx'> 	 * exceptions might do.</div><div class='ctx'> 	 */</div><div class='del'>-	call paranoid_entry</div><div class='del'>-	DEFAULT_FRAME 0</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Save off the CR2 register. If we take a page fault in the NMI then</div><div class='del'>-	 * it could corrupt the CR2 value. If the NMI preempts a page fault</div><div class='del'>-	 * handler before it was able to read the CR2 register, and then the</div><div class='del'>-	 * NMI itself takes a page fault, the page fault that was preempted</div><div class='del'>-	 * will read the information from the NMI page fault and not the</div><div class='del'>-	 * origin fault. Save it off and restore it if it changes.</div><div class='del'>-	 * Use the r12 callee-saved register.</div><div class='del'>-	 */</div><div class='del'>-	movq %cr2, %r12</div><div class='add'>+	call	paranoid_entry</div><div class='ctx'> </div><div class='ctx'> 	/* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */</div><div class='del'>-	movq %rsp,%rdi</div><div class='del'>-	movq $-1,%rsi</div><div class='del'>-	call do_nmi</div><div class='del'>-</div><div class='del'>-	/* Did the NMI take a page fault? Restore cr2 if it did */</div><div class='del'>-	movq %cr2, %rcx</div><div class='del'>-	cmpq %rcx, %r12</div><div class='del'>-	je 1f</div><div class='del'>-	movq %r12, %cr2</div><div class='del'>-1:</div><div class='del'>-	</div><div class='del'>-	testl %ebx,%ebx				/* swapgs needed? */</div><div class='del'>-	jnz nmi_restore</div><div class='add'>+	movq	%rsp, %rdi</div><div class='add'>+	movq	$-1, %rsi</div><div class='add'>+	call	do_nmi</div><div class='add'>+</div><div class='add'>+	testl	%ebx, %ebx			/* swapgs needed? */</div><div class='add'>+	jnz	nmi_restore</div><div class='ctx'> nmi_swapgs:</div><div class='ctx'> 	SWAPGS_UNSAFE_STACK</div><div class='ctx'> nmi_restore:</div><div class='ctx'> 	RESTORE_EXTRA_REGS</div><div class='ctx'> 	RESTORE_C_REGS</div><div class='del'>-	/* Pop the extra iret frame at once */</div><div class='add'>+</div><div class='add'>+	/* Point RSP at the "iret" frame. */</div><div class='ctx'> 	REMOVE_PT_GPREGS_FROM_STACK 6*8</div><div class='ctx'> </div><div class='del'>-	/* Clear the NMI executing stack variable */</div><div class='del'>-	movq $0, 5*8(%rsp)</div><div class='del'>-	jmp irq_return</div><div class='del'>-	CFI_ENDPROC</div><div class='add'>+	/*</div><div class='add'>+	 * Clear "NMI executing".  Set DF first so that we can easily</div><div class='add'>+	 * distinguish the remaining code between here and IRET from</div><div class='add'>+	 * the SYSCALL entry and exit paths.  On a native kernel, we</div><div class='add'>+	 * could just inspect RIP, but, on paravirt kernels,</div><div class='add'>+	 * INTERRUPT_RETURN can translate into a jump into a</div><div class='add'>+	 * hypercall page.</div><div class='add'>+	 */</div><div class='add'>+	std</div><div class='add'>+	movq	$0, 5*8(%rsp)		/* clear "NMI executing" */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI</div><div class='add'>+	 * stack in a single instruction.  We are returning to kernel</div><div class='add'>+	 * mode, so this cannot result in a fault.</div><div class='add'>+	 */</div><div class='add'>+	INTERRUPT_RETURN</div><div class='ctx'> END(nmi)</div><div class='ctx'> </div><div class='ctx'> ENTRY(ignore_sysret)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	mov $-ENOSYS,%eax</div><div class='add'>+	mov	$-ENOSYS, %eax</div><div class='ctx'> 	sysret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(ignore_sysret)</div><div class='del'>-</div><div class='head'>diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S<br/>new file mode 100644<br/>index 000000000000..bb187a6a877c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/entry_64_compat.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/entry_64_compat.S</a></div><div class='hunk'>@@ -0,0 +1,556 @@</div><div class='add'>+/*</div><div class='add'>+ * Compatibility mode system call entry point for x86-64.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2000-2002 Andi Kleen, SuSE Labs.</div><div class='add'>+ */</div><div class='add'>+#include "calling.h"</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/current.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/ia32_unistd.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/irqflags.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/smap.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+/* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='add'>+#include &lt;linux/elf-em.h&gt;</div><div class='add'>+#define AUDIT_ARCH_I386		(EM_386|__AUDIT_ARCH_LE)</div><div class='add'>+#define __AUDIT_ARCH_LE		0x40000000</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_AUDITSYSCALL</div><div class='add'>+# define sysexit_audit		ia32_ret_from_sys_call</div><div class='add'>+# define sysretl_audit		ia32_ret_from_sys_call</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	.section .entry.text, "ax"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PARAVIRT</div><div class='add'>+ENTRY(native_usergs_sysret32)</div><div class='add'>+	swapgs</div><div class='add'>+	sysretl</div><div class='add'>+ENDPROC(native_usergs_sysret32)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 32-bit SYSENTER instruction entry.</div><div class='add'>+ *</div><div class='add'>+ * SYSENTER loads ss, rsp, cs, and rip from previously programmed MSRs.</div><div class='add'>+ * IF and VM in rflags are cleared (IOW: interrupts are off).</div><div class='add'>+ * SYSENTER does not save anything on the stack,</div><div class='add'>+ * and does not save old rip (!!!) and rflags.</div><div class='add'>+ *</div><div class='add'>+ * Arguments:</div><div class='add'>+ * eax  system call number</div><div class='add'>+ * ebx  arg1</div><div class='add'>+ * ecx  arg2</div><div class='add'>+ * edx  arg3</div><div class='add'>+ * esi  arg4</div><div class='add'>+ * edi  arg5</div><div class='add'>+ * ebp  user stack</div><div class='add'>+ * 0(%ebp) arg6</div><div class='add'>+ *</div><div class='add'>+ * This is purely a fast path. For anything complicated we use the int 0x80</div><div class='add'>+ * path below. We set up a complete hardware stack frame to share code</div><div class='add'>+ * with the int 0x80 path.</div><div class='add'>+ */</div><div class='add'>+ENTRY(entry_SYSENTER_compat)</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupts are off on entry.</div><div class='add'>+	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='add'>+	 * it is too small to ever cause noticeable irq latency.</div><div class='add'>+	 */</div><div class='add'>+	SWAPGS_UNSAFE_STACK</div><div class='add'>+	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+</div><div class='add'>+	/* Zero-extending 32-bit regs, do not remove */</div><div class='add'>+	movl	%ebp, %ebp</div><div class='add'>+	movl	%eax, %eax</div><div class='add'>+</div><div class='add'>+	movl	ASM_THREAD_INFO(TI_sysenter_return, %rsp, 0), %r10d</div><div class='add'>+</div><div class='add'>+	/* Construct struct pt_regs on stack */</div><div class='add'>+	pushq	$__USER32_DS		/* pt_regs-&gt;ss */</div><div class='add'>+	pushq	%rbp			/* pt_regs-&gt;sp */</div><div class='add'>+	pushfq				/* pt_regs-&gt;flags */</div><div class='add'>+	pushq	$__USER32_CS		/* pt_regs-&gt;cs */</div><div class='add'>+	pushq	%r10			/* pt_regs-&gt;ip = thread_info-&gt;sysenter_return */</div><div class='add'>+	pushq	%rax			/* pt_regs-&gt;orig_ax */</div><div class='add'>+	pushq	%rdi			/* pt_regs-&gt;di */</div><div class='add'>+	pushq	%rsi			/* pt_regs-&gt;si */</div><div class='add'>+	pushq	%rdx			/* pt_regs-&gt;dx */</div><div class='add'>+	pushq	%rcx			/* pt_regs-&gt;cx */</div><div class='add'>+	pushq	$-ENOSYS		/* pt_regs-&gt;ax */</div><div class='add'>+	cld</div><div class='add'>+	sub	$(10*8), %rsp /* pt_regs-&gt;r8-11, bp, bx, r12-15 not saved */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * no need to do an access_ok check here because rbp has been</div><div class='add'>+	 * 32-bit zero extended</div><div class='add'>+	 */</div><div class='add'>+	ASM_STAC</div><div class='add'>+1:	movl	(%rbp), %ebp</div><div class='add'>+	_ASM_EXTABLE(1b, ia32_badarg)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sysenter doesn't filter flags, so we need to clear NT</div><div class='add'>+	 * ourselves.  To save a few cycles, we can check whether</div><div class='add'>+	 * NT was set instead of doing an unconditional popfq.</div><div class='add'>+	 */</div><div class='add'>+	testl	$X86_EFLAGS_NT, EFLAGS(%rsp)</div><div class='add'>+	jnz	sysenter_fix_flags</div><div class='add'>+sysenter_flags_fixed:</div><div class='add'>+</div><div class='add'>+	orl	$TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	sysenter_tracesys</div><div class='add'>+</div><div class='add'>+sysenter_do_call:</div><div class='add'>+	/* 32-bit syscall -&gt; 64-bit C ABI argument conversion */</div><div class='add'>+	movl	%edi, %r8d		/* arg5 */</div><div class='add'>+	movl	%ebp, %r9d		/* arg6 */</div><div class='add'>+	xchg	%ecx, %esi		/* rsi:arg2, rcx:arg4 */</div><div class='add'>+	movl	%ebx, %edi		/* arg1 */</div><div class='add'>+	movl	%edx, %edx		/* arg3 (zero extension) */</div><div class='add'>+sysenter_dispatch:</div><div class='add'>+	cmpq	$(IA32_NR_syscalls-1), %rax</div><div class='add'>+	ja	1f</div><div class='add'>+	call	*ia32_sys_call_table(, %rax, 8)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='add'>+1:</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	testl	$_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	sysexit_audit</div><div class='add'>+sysexit_from_sys_call:</div><div class='add'>+	/*</div><div class='add'>+	 * NB: SYSEXIT is not obviously safe for 64-bit kernels -- an</div><div class='add'>+	 * NMI between STI and SYSEXIT has poorly specified behavior,</div><div class='add'>+	 * and and NMI followed by an IRQ with usergs is fatal.  So</div><div class='add'>+	 * we just pretend we're using SYSEXIT but we really use</div><div class='add'>+	 * SYSRETL instead.</div><div class='add'>+	 *</div><div class='add'>+	 * This code path is still called 'sysexit' because it pairs</div><div class='add'>+	 * with 'sysenter' and it uses the SYSENTER calling convention.</div><div class='add'>+	 */</div><div class='add'>+	andl	$~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	movl	RIP(%rsp), %ecx		/* User %eip */</div><div class='add'>+	RESTORE_RSI_RDI</div><div class='add'>+	xorl	%edx, %edx		/* Do not leak kernel information */</div><div class='add'>+	xorq	%r8, %r8</div><div class='add'>+	xorq	%r9, %r9</div><div class='add'>+	xorq	%r10, %r10</div><div class='add'>+	movl	EFLAGS(%rsp), %r11d	/* User eflags */</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * SYSRETL works even on Intel CPUs.  Use it in preference to SYSEXIT,</div><div class='add'>+	 * since it avoids a dicey window with interrupts enabled.</div><div class='add'>+	 */</div><div class='add'>+	movl	RSP(%rsp), %esp</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * USERGS_SYSRET32 does:</div><div class='add'>+	 *  gsbase = user's gs base</div><div class='add'>+	 *  eip = ecx</div><div class='add'>+	 *  rflags = r11</div><div class='add'>+	 *  cs = __USER32_CS</div><div class='add'>+	 *  ss = __USER_DS</div><div class='add'>+	 *</div><div class='add'>+	 * The prologue set RIP(%rsp) to VDSO32_SYSENTER_RETURN, which does:</div><div class='add'>+	 *</div><div class='add'>+	 *  pop %ebp</div><div class='add'>+	 *  pop %edx</div><div class='add'>+	 *  pop %ecx</div><div class='add'>+	 *</div><div class='add'>+	 * Therefore, we invoke SYSRETL with EDX and R8-R10 zeroed to</div><div class='add'>+	 * avoid info leaks.  R11 ends up with VDSO32_SYSENTER_RETURN's</div><div class='add'>+	 * address (already known to user code), and R12-R15 are</div><div class='add'>+	 * callee-saved and therefore don't contain any interesting</div><div class='add'>+	 * kernel data.</div><div class='add'>+	 */</div><div class='add'>+	USERGS_SYSRET32</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AUDITSYSCALL</div><div class='add'>+	.macro auditsys_entry_common</div><div class='add'>+	/*</div><div class='add'>+	 * At this point, registers hold syscall args in the 32-bit syscall ABI:</div><div class='add'>+	 * EAX is syscall number, the 6 args are in EBX,ECX,EDX,ESI,EDI,EBP.</div><div class='add'>+	 *</div><div class='add'>+	 * We want to pass them to __audit_syscall_entry(), which is a 64-bit</div><div class='add'>+	 * C function with 5 parameters, so shuffle them to match what</div><div class='add'>+	 * the function expects: RDI,RSI,RDX,RCX,R8.</div><div class='add'>+	 */</div><div class='add'>+	movl	%esi, %r8d		/* arg5 (R8 ) &lt;= 4th syscall arg (ESI) */</div><div class='add'>+	xchg	%ecx, %edx		/* arg4 (RCX) &lt;= 3rd syscall arg (EDX) */</div><div class='add'>+					/* arg3 (RDX) &lt;= 2nd syscall arg (ECX) */</div><div class='add'>+	movl	%ebx, %esi		/* arg2 (RSI) &lt;= 1st syscall arg (EBX) */</div><div class='add'>+	movl	%eax, %edi		/* arg1 (RDI) &lt;= syscall number  (EAX) */</div><div class='add'>+	call	__audit_syscall_entry</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We are going to jump back to the syscall dispatch code.</div><div class='add'>+	 * Prepare syscall args as required by the 64-bit C ABI.</div><div class='add'>+	 * Registers clobbered by __audit_syscall_entry() are</div><div class='add'>+	 * loaded from pt_regs on stack:</div><div class='add'>+	 */</div><div class='add'>+	movl	ORIG_RAX(%rsp), %eax	/* syscall number */</div><div class='add'>+	movl	%ebx, %edi		/* arg1 */</div><div class='add'>+	movl	RCX(%rsp), %esi		/* arg2 */</div><div class='add'>+	movl	RDX(%rsp), %edx		/* arg3 */</div><div class='add'>+	movl	RSI(%rsp), %ecx		/* arg4 */</div><div class='add'>+	movl	RDI(%rsp), %r8d		/* arg5 */</div><div class='add'>+	movl	%ebp, %r9d		/* arg6 */</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro auditsys_exit exit</div><div class='add'>+	testl	$(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	ia32_ret_from_sys_call</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	movl	%eax, %esi		/* second arg, syscall return value */</div><div class='add'>+	cmpl	$-MAX_ERRNO, %eax	/* is it an error ? */</div><div class='add'>+	jbe	1f</div><div class='add'>+	movslq	%eax, %rsi		/* if error sign extend to 64 bits */</div><div class='add'>+1:	setbe	%al			/* 1 if error, 0 if not */</div><div class='add'>+	movzbl	%al, %edi		/* zero-extend that into %edi */</div><div class='add'>+	call	__audit_syscall_exit</div><div class='add'>+	movq	RAX(%rsp), %rax		/* reload syscall return value */</div><div class='add'>+	movl	$(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), %edi</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	testl	%edi, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jz	\exit</div><div class='add'>+	xorl	%eax, %eax		/* Do not leak kernel information */</div><div class='add'>+	movq	%rax, R11(%rsp)</div><div class='add'>+	movq	%rax, R10(%rsp)</div><div class='add'>+	movq	%rax, R9(%rsp)</div><div class='add'>+	movq	%rax, R8(%rsp)</div><div class='add'>+	jmp	int_with_check</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+sysenter_auditsys:</div><div class='add'>+	auditsys_entry_common</div><div class='add'>+	jmp	sysenter_dispatch</div><div class='add'>+</div><div class='add'>+sysexit_audit:</div><div class='add'>+	auditsys_exit sysexit_from_sys_call</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+sysenter_fix_flags:</div><div class='add'>+	pushq	$(X86_EFLAGS_IF|X86_EFLAGS_FIXED)</div><div class='add'>+	popfq</div><div class='add'>+	jmp	sysenter_flags_fixed</div><div class='add'>+</div><div class='add'>+sysenter_tracesys:</div><div class='add'>+#ifdef CONFIG_AUDITSYSCALL</div><div class='add'>+	testl	$(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jz	sysenter_auditsys</div><div class='add'>+#endif</div><div class='add'>+	SAVE_EXTRA_REGS</div><div class='add'>+	xorl	%eax, %eax		/* Do not leak kernel information */</div><div class='add'>+	movq	%rax, R11(%rsp)</div><div class='add'>+	movq	%rax, R10(%rsp)</div><div class='add'>+	movq	%rax, R9(%rsp)</div><div class='add'>+	movq	%rax, R8(%rsp)</div><div class='add'>+	movq	%rsp, %rdi		/* &amp;pt_regs -&gt; arg1 */</div><div class='add'>+	call	syscall_trace_enter</div><div class='add'>+</div><div class='add'>+	/* Reload arg registers from stack. (see sysenter_tracesys) */</div><div class='add'>+	movl	RCX(%rsp), %ecx</div><div class='add'>+	movl	RDX(%rsp), %edx</div><div class='add'>+	movl	RSI(%rsp), %esi</div><div class='add'>+	movl	RDI(%rsp), %edi</div><div class='add'>+	movl	%eax, %eax		/* zero extension */</div><div class='add'>+</div><div class='add'>+	RESTORE_EXTRA_REGS</div><div class='add'>+	jmp	sysenter_do_call</div><div class='add'>+ENDPROC(entry_SYSENTER_compat)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 32-bit SYSCALL instruction entry.</div><div class='add'>+ *</div><div class='add'>+ * 32-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,</div><div class='add'>+ * then loads new ss, cs, and rip from previously programmed MSRs.</div><div class='add'>+ * rflags gets masked by a value from another MSR (so CLD and CLAC</div><div class='add'>+ * are not needed). SYSCALL does not save anything on the stack</div><div class='add'>+ * and does not change rsp.</div><div class='add'>+ *</div><div class='add'>+ * Note: rflags saving+masking-with-MSR happens only in Long mode</div><div class='add'>+ * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).</div><div class='add'>+ * Don't get confused: rflags saving+masking depends on Long Mode Active bit</div><div class='add'>+ * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes</div><div class='add'>+ * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).</div><div class='add'>+ *</div><div class='add'>+ * Arguments:</div><div class='add'>+ * eax  system call number</div><div class='add'>+ * ecx  return address</div><div class='add'>+ * ebx  arg1</div><div class='add'>+ * ebp  arg2	(note: not saved in the stack frame, should not be touched)</div><div class='add'>+ * edx  arg3</div><div class='add'>+ * esi  arg4</div><div class='add'>+ * edi  arg5</div><div class='add'>+ * esp  user stack</div><div class='add'>+ * 0(%esp) arg6</div><div class='add'>+ *</div><div class='add'>+ * This is purely a fast path. For anything complicated we use the int 0x80</div><div class='add'>+ * path below. We set up a complete hardware stack frame to share code</div><div class='add'>+ * with the int 0x80 path.</div><div class='add'>+ */</div><div class='add'>+ENTRY(entry_SYSCALL_compat)</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupts are off on entry.</div><div class='add'>+	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='add'>+	 * it is too small to ever cause noticeable irq latency.</div><div class='add'>+	 */</div><div class='add'>+	SWAPGS_UNSAFE_STACK</div><div class='add'>+	movl	%esp, %r8d</div><div class='add'>+	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+</div><div class='add'>+	/* Zero-extending 32-bit regs, do not remove */</div><div class='add'>+	movl	%eax, %eax</div><div class='add'>+</div><div class='add'>+	/* Construct struct pt_regs on stack */</div><div class='add'>+	pushq	$__USER32_DS		/* pt_regs-&gt;ss */</div><div class='add'>+	pushq	%r8			/* pt_regs-&gt;sp */</div><div class='add'>+	pushq	%r11			/* pt_regs-&gt;flags */</div><div class='add'>+	pushq	$__USER32_CS		/* pt_regs-&gt;cs */</div><div class='add'>+	pushq	%rcx			/* pt_regs-&gt;ip */</div><div class='add'>+	pushq	%rax			/* pt_regs-&gt;orig_ax */</div><div class='add'>+	pushq	%rdi			/* pt_regs-&gt;di */</div><div class='add'>+	pushq	%rsi			/* pt_regs-&gt;si */</div><div class='add'>+	pushq	%rdx			/* pt_regs-&gt;dx */</div><div class='add'>+	pushq	%rbp			/* pt_regs-&gt;cx */</div><div class='add'>+	movl	%ebp, %ecx</div><div class='add'>+	pushq	$-ENOSYS		/* pt_regs-&gt;ax */</div><div class='add'>+	sub	$(10*8), %rsp		/* pt_regs-&gt;r8-11, bp, bx, r12-15 not saved */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * No need to do an access_ok check here because r8 has been</div><div class='add'>+	 * 32-bit zero extended:</div><div class='add'>+	 */</div><div class='add'>+	ASM_STAC</div><div class='add'>+1:	movl	(%r8), %ebp</div><div class='add'>+	_ASM_EXTABLE(1b, ia32_badarg)</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	orl	$TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	cstar_tracesys</div><div class='add'>+</div><div class='add'>+cstar_do_call:</div><div class='add'>+	/* 32-bit syscall -&gt; 64-bit C ABI argument conversion */</div><div class='add'>+	movl	%edi, %r8d		/* arg5 */</div><div class='add'>+	movl	%ebp, %r9d		/* arg6 */</div><div class='add'>+	xchg	%ecx, %esi		/* rsi:arg2, rcx:arg4 */</div><div class='add'>+	movl	%ebx, %edi		/* arg1 */</div><div class='add'>+	movl	%edx, %edx		/* arg3 (zero extension) */</div><div class='add'>+</div><div class='add'>+cstar_dispatch:</div><div class='add'>+	cmpq	$(IA32_NR_syscalls-1), %rax</div><div class='add'>+	ja	1f</div><div class='add'>+</div><div class='add'>+	call	*ia32_sys_call_table(, %rax, 8)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='add'>+1:</div><div class='add'>+	movl	RCX(%rsp), %ebp</div><div class='add'>+	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	testl	$_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	sysretl_audit</div><div class='add'>+</div><div class='add'>+sysretl_from_sys_call:</div><div class='add'>+	andl	$~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	RESTORE_RSI_RDI_RDX</div><div class='add'>+	movl	RIP(%rsp), %ecx</div><div class='add'>+	movl	EFLAGS(%rsp), %r11d</div><div class='add'>+	xorq	%r10, %r10</div><div class='add'>+	xorq	%r9, %r9</div><div class='add'>+	xorq	%r8, %r8</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	movl	RSP(%rsp), %esp</div><div class='add'>+	/*</div><div class='add'>+	 * 64-bit-&gt;32-bit SYSRET restores eip from ecx,</div><div class='add'>+	 * eflags from r11 (but RF and VM bits are forced to 0),</div><div class='add'>+	 * cs and ss are loaded from MSRs.</div><div class='add'>+	 * (Note: 32-bit-&gt;32-bit SYSRET is different: since r11</div><div class='add'>+	 * does not exist, it merely sets eflags.IF=1).</div><div class='add'>+	 *</div><div class='add'>+	 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss</div><div class='add'>+	 * descriptor is not reinitialized.  This means that we must</div><div class='add'>+	 * avoid SYSRET with SS == NULL, which could happen if we schedule,</div><div class='add'>+	 * exit the kernel, and re-enter using an interrupt vector.  (All</div><div class='add'>+	 * interrupt entries on x86_64 set SS to NULL.)  We prevent that</div><div class='add'>+	 * from happening by reloading SS in __switch_to.</div><div class='add'>+	 */</div><div class='add'>+	USERGS_SYSRET32</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AUDITSYSCALL</div><div class='add'>+cstar_auditsys:</div><div class='add'>+	auditsys_entry_common</div><div class='add'>+	jmp	cstar_dispatch</div><div class='add'>+</div><div class='add'>+sysretl_audit:</div><div class='add'>+	auditsys_exit sysretl_from_sys_call</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+cstar_tracesys:</div><div class='add'>+#ifdef CONFIG_AUDITSYSCALL</div><div class='add'>+	testl	$(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jz	cstar_auditsys</div><div class='add'>+#endif</div><div class='add'>+	SAVE_EXTRA_REGS</div><div class='add'>+	xorl	%eax, %eax		/* Do not leak kernel information */</div><div class='add'>+	movq	%rax, R11(%rsp)</div><div class='add'>+	movq	%rax, R10(%rsp)</div><div class='add'>+	movq	%rax, R9(%rsp)</div><div class='add'>+	movq	%rax, R8(%rsp)</div><div class='add'>+	movq	%rsp, %rdi		/* &amp;pt_regs -&gt; arg1 */</div><div class='add'>+	call	syscall_trace_enter</div><div class='add'>+</div><div class='add'>+	/* Reload arg registers from stack. (see sysenter_tracesys) */</div><div class='add'>+	movl	RCX(%rsp), %ecx</div><div class='add'>+	movl	RDX(%rsp), %edx</div><div class='add'>+	movl	RSI(%rsp), %esi</div><div class='add'>+	movl	RDI(%rsp), %edi</div><div class='add'>+	movl	%eax, %eax		/* zero extension */</div><div class='add'>+</div><div class='add'>+	RESTORE_EXTRA_REGS</div><div class='add'>+	jmp	cstar_do_call</div><div class='add'>+END(entry_SYSCALL_compat)</div><div class='add'>+</div><div class='add'>+ia32_badarg:</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	movq	$-EFAULT, RAX(%rsp)</div><div class='add'>+ia32_ret_from_sys_call:</div><div class='add'>+	xorl	%eax, %eax		/* Do not leak kernel information */</div><div class='add'>+	movq	%rax, R11(%rsp)</div><div class='add'>+	movq	%rax, R10(%rsp)</div><div class='add'>+	movq	%rax, R9(%rsp)</div><div class='add'>+	movq	%rax, R8(%rsp)</div><div class='add'>+	jmp	int_ret_from_sys_call</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Emulated IA32 system calls via int 0x80.</div><div class='add'>+ *</div><div class='add'>+ * Arguments:</div><div class='add'>+ * eax  system call number</div><div class='add'>+ * ebx  arg1</div><div class='add'>+ * ecx  arg2</div><div class='add'>+ * edx  arg3</div><div class='add'>+ * esi  arg4</div><div class='add'>+ * edi  arg5</div><div class='add'>+ * ebp  arg6	(note: not saved in the stack frame, should not be touched)</div><div class='add'>+ *</div><div class='add'>+ * Notes:</div><div class='add'>+ * Uses the same stack frame as the x86-64 version.</div><div class='add'>+ * All registers except eax must be saved (but ptrace may violate that).</div><div class='add'>+ * Arguments are zero extended. For system calls that want sign extension and</div><div class='add'>+ * take long arguments a wrapper is needed. Most calls can just be called</div><div class='add'>+ * directly.</div><div class='add'>+ * Assumes it is only called from user space and entered with interrupts off.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+ENTRY(entry_INT80_compat)</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupts are off on entry.</div><div class='add'>+	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='add'>+	 * it is too small to ever cause noticeable irq latency.</div><div class='add'>+	 */</div><div class='add'>+	PARAVIRT_ADJUST_EXCEPTION_FRAME</div><div class='add'>+	SWAPGS</div><div class='add'>+	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+</div><div class='add'>+	/* Zero-extending 32-bit regs, do not remove */</div><div class='add'>+	movl	%eax, %eax</div><div class='add'>+</div><div class='add'>+	/* Construct struct pt_regs on stack (iret frame is already on stack) */</div><div class='add'>+	pushq	%rax			/* pt_regs-&gt;orig_ax */</div><div class='add'>+	pushq	%rdi			/* pt_regs-&gt;di */</div><div class='add'>+	pushq	%rsi			/* pt_regs-&gt;si */</div><div class='add'>+	pushq	%rdx			/* pt_regs-&gt;dx */</div><div class='add'>+	pushq	%rcx			/* pt_regs-&gt;cx */</div><div class='add'>+	pushq	$-ENOSYS		/* pt_regs-&gt;ax */</div><div class='add'>+	pushq	$0			/* pt_regs-&gt;r8 */</div><div class='add'>+	pushq	$0			/* pt_regs-&gt;r9 */</div><div class='add'>+	pushq	$0			/* pt_regs-&gt;r10 */</div><div class='add'>+	pushq	$0			/* pt_regs-&gt;r11 */</div><div class='add'>+	cld</div><div class='add'>+	sub	$(6*8), %rsp /* pt_regs-&gt;bp, bx, r12-15 not saved */</div><div class='add'>+</div><div class='add'>+	orl	$TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	testl	$_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='add'>+	jnz	ia32_tracesys</div><div class='add'>+</div><div class='add'>+ia32_do_call:</div><div class='add'>+	/* 32-bit syscall -&gt; 64-bit C ABI argument conversion */</div><div class='add'>+	movl	%edi, %r8d		/* arg5 */</div><div class='add'>+	movl	%ebp, %r9d		/* arg6 */</div><div class='add'>+	xchg	%ecx, %esi		/* rsi:arg2, rcx:arg4 */</div><div class='add'>+	movl	%ebx, %edi		/* arg1 */</div><div class='add'>+	movl	%edx, %edx		/* arg3 (zero extension) */</div><div class='add'>+	cmpq	$(IA32_NR_syscalls-1), %rax</div><div class='add'>+	ja	1f</div><div class='add'>+</div><div class='add'>+	call	*ia32_sys_call_table(, %rax, 8)</div><div class='add'>+	movq	%rax, RAX(%rsp)</div><div class='add'>+1:</div><div class='add'>+	jmp	int_ret_from_sys_call</div><div class='add'>+</div><div class='add'>+ia32_tracesys:</div><div class='add'>+	SAVE_EXTRA_REGS</div><div class='add'>+	movq	%rsp, %rdi			/* &amp;pt_regs -&gt; arg1 */</div><div class='add'>+	call	syscall_trace_enter</div><div class='add'>+	/*</div><div class='add'>+	 * Reload arg registers from stack in case ptrace changed them.</div><div class='add'>+	 * Don't reload %eax because syscall_trace_enter() returned</div><div class='add'>+	 * the %rax value we should see.  But do truncate it to 32 bits.</div><div class='add'>+	 * If it's -1 to make us punt the syscall, then (u32)-1 is still</div><div class='add'>+	 * an appropriately invalid value.</div><div class='add'>+	 */</div><div class='add'>+	movl	RCX(%rsp), %ecx</div><div class='add'>+	movl	RDX(%rsp), %edx</div><div class='add'>+	movl	RSI(%rsp), %esi</div><div class='add'>+	movl	RDI(%rsp), %edi</div><div class='add'>+	movl	%eax, %eax		/* zero extension */</div><div class='add'>+	RESTORE_EXTRA_REGS</div><div class='add'>+	jmp	ia32_do_call</div><div class='add'>+END(entry_INT80_compat)</div><div class='add'>+</div><div class='add'>+	.macro PTREGSCALL label, func</div><div class='add'>+	ALIGN</div><div class='add'>+GLOBAL(\label)</div><div class='add'>+	leaq	\func(%rip), %rax</div><div class='add'>+	jmp	ia32_ptregs_common</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	PTREGSCALL stub32_rt_sigreturn,	sys32_rt_sigreturn</div><div class='add'>+	PTREGSCALL stub32_sigreturn,	sys32_sigreturn</div><div class='add'>+	PTREGSCALL stub32_fork,		sys_fork</div><div class='add'>+	PTREGSCALL stub32_vfork,	sys_vfork</div><div class='add'>+</div><div class='add'>+	ALIGN</div><div class='add'>+GLOBAL(stub32_clone)</div><div class='add'>+	leaq	sys_clone(%rip), %rax</div><div class='add'>+	/*</div><div class='add'>+	 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr).</div><div class='add'>+	 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val).</div><div class='add'>+	 *</div><div class='add'>+	 * The native 64-bit kernel's sys_clone() implements the latter,</div><div class='add'>+	 * so we need to swap arguments here before calling it:</div><div class='add'>+	 */</div><div class='add'>+	xchg	%r8, %rcx</div><div class='add'>+	jmp	ia32_ptregs_common</div><div class='add'>+</div><div class='add'>+	ALIGN</div><div class='add'>+ia32_ptregs_common:</div><div class='add'>+	SAVE_EXTRA_REGS 8</div><div class='add'>+	call	*%rax</div><div class='add'>+	RESTORE_EXTRA_REGS 8</div><div class='add'>+	ret</div><div class='add'>+END(ia32_ptregs_common)</div><div class='head'>diff --git a/arch/x86/kernel/syscall_32.c b/arch/x86/entry/syscall_32.c<br/>index 3777189c4a19..8ea34f94e973 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/syscall_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/syscall_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscall_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscall_32.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #else</div><div class='ctx'> #define SYM(sym, compat) sym</div><div class='ctx'> #define ia32_sys_call_table sys_call_table</div><div class='del'>-#define __NR_ia32_syscall_max __NR_syscall_max</div><div class='add'>+#define __NR_syscall_compat_max __NR_syscall_max</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define __SYSCALL_I386(nr, sym, compat) extern asmlinkage void SYM(sym, compat)(void) ;</div><div class='hunk'>@@ -23,11 +23,11 @@ typedef asmlinkage void (*sys_call_ptr_t)(void);</div><div class='ctx'> </div><div class='ctx'> extern asmlinkage void sys_ni_syscall(void);</div><div class='ctx'> </div><div class='del'>-__visible const sys_call_ptr_t ia32_sys_call_table[__NR_ia32_syscall_max+1] = {</div><div class='add'>+__visible const sys_call_ptr_t ia32_sys_call_table[__NR_syscall_compat_max+1] = {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Smells like a compiler bug -- it doesn't work</div><div class='ctx'> 	 * when the &amp; below is removed.</div><div class='ctx'> 	 */</div><div class='del'>-	[0 ... __NR_ia32_syscall_max] = &amp;sys_ni_syscall,</div><div class='add'>+	[0 ... __NR_syscall_compat_max] = &amp;sys_ni_syscall,</div><div class='ctx'> #include &lt;asm/syscalls_32.h&gt;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/kernel/syscall_64.c b/arch/x86/entry/syscall_64.c<br/>index 4ac730b37f0b..4ac730b37f0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/syscall_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/syscall_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscall_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscall_64.c</a></div><div class='head'>diff --git a/arch/x86/syscalls/Makefile b/arch/x86/entry/syscalls/Makefile<br/>index a55abb9f6c5e..57aa59fd140c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/syscalls/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscalls/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-out := $(obj)/../include/generated/asm</div><div class='del'>-uapi := $(obj)/../include/generated/uapi/asm</div><div class='add'>+out := $(obj)/../../include/generated/asm</div><div class='add'>+uapi := $(obj)/../../include/generated/uapi/asm</div><div class='ctx'> </div><div class='ctx'> # Create output directory if not already present</div><div class='ctx'> _dummy := $(shell [ -d '$(out)' ] || mkdir -p '$(out)') \</div><div class='head'>diff --git a/arch/x86/syscalls/syscall_32.tbl b/arch/x86/entry/syscalls/syscall_32.tbl<br/>index ef8187f9d28d..ef8187f9d28d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_32.tbl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/syscalls/syscall_32.tbl</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscalls/syscall_32.tbl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscall_32.tbl</a></div><div class='head'>diff --git a/arch/x86/syscalls/syscall_64.tbl b/arch/x86/entry/syscalls/syscall_64.tbl<br/>index 9ef32d5f1b19..9ef32d5f1b19 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_64.tbl?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/syscalls/syscall_64.tbl</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscalls/syscall_64.tbl?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscall_64.tbl</a></div><div class='head'>diff --git a/arch/x86/syscalls/syscallhdr.sh b/arch/x86/entry/syscalls/syscallhdr.sh<br/>index 31fd5f1f38f7..31fd5f1f38f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscallhdr.sh?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/syscalls/syscallhdr.sh</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscalls/syscallhdr.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscallhdr.sh</a></div><div class='head'>diff --git a/arch/x86/syscalls/syscalltbl.sh b/arch/x86/entry/syscalls/syscalltbl.sh<br/>index 0e7f8ec071e7..0e7f8ec071e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscalltbl.sh?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/syscalls/syscalltbl.sh</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/syscalls/syscalltbl.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/syscalls/syscalltbl.sh</a></div><div class='head'>diff --git a/arch/x86/lib/thunk_32.S b/arch/x86/entry/thunk_32.S<br/>index 5eb715087b80..e5a17114a8c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/thunk_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/thunk_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/thunk_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/thunk_32.S</a></div><div class='hunk'>@@ -6,16 +6,14 @@</div><div class='ctx'>  */</div><div class='ctx'> 	#include &lt;linux/linkage.h&gt;</div><div class='ctx'> 	#include &lt;asm/asm.h&gt;</div><div class='del'>-	#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	/* put return address in eax (arg1) */</div><div class='ctx'> 	.macro THUNK name, func, put_ret_addr_in_eax=0</div><div class='ctx'> 	.globl \name</div><div class='ctx'> \name:</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg eax</div><div class='del'>-	pushl_cfi_reg ecx</div><div class='del'>-	pushl_cfi_reg edx</div><div class='add'>+	pushl %eax</div><div class='add'>+	pushl %ecx</div><div class='add'>+	pushl %edx</div><div class='ctx'> </div><div class='ctx'> 	.if \put_ret_addr_in_eax</div><div class='ctx'> 	/* Place EIP in the arg1 */</div><div class='hunk'>@@ -23,11 +21,10 @@</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	call \func</div><div class='del'>-	popl_cfi_reg edx</div><div class='del'>-	popl_cfi_reg ecx</div><div class='del'>-	popl_cfi_reg eax</div><div class='add'>+	popl %edx</div><div class='add'>+	popl %ecx</div><div class='add'>+	popl %eax</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> 	_ASM_NOKPROBE(\name)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -38,8 +35,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> 	THUNK ___preempt_schedule, preempt_schedule</div><div class='del'>-#ifdef CONFIG_CONTEXT_TRACKING</div><div class='del'>-	THUNK ___preempt_schedule_context, preempt_schedule_context</div><div class='del'>-#endif</div><div class='add'>+	THUNK ___preempt_schedule_notrace, preempt_schedule_notrace</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/lib/thunk_64.S b/arch/x86/entry/thunk_64.S<br/>index f89ba4e93025..efb2b932b748 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/thunk_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/thunk_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/thunk_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/thunk_64.S</a></div><div class='hunk'>@@ -6,35 +6,32 @@</div><div class='ctx'>  * Subject to the GNU public license, v.2. No warranty of any kind.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-#include &lt;asm/calling.h&gt;</div><div class='add'>+#include "calling.h"</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	/* rdi:	arg1 ... normal C conventions. rax is saved/restored. */</div><div class='ctx'> 	.macro THUNK name, func, put_ret_addr_in_rdi=0</div><div class='ctx'> 	.globl \name</div><div class='ctx'> \name:</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> 	/* this one pushes 9 elems, the next one would be %rIP */</div><div class='del'>-	pushq_cfi_reg rdi</div><div class='del'>-	pushq_cfi_reg rsi</div><div class='del'>-	pushq_cfi_reg rdx</div><div class='del'>-	pushq_cfi_reg rcx</div><div class='del'>-	pushq_cfi_reg rax</div><div class='del'>-	pushq_cfi_reg r8</div><div class='del'>-	pushq_cfi_reg r9</div><div class='del'>-	pushq_cfi_reg r10</div><div class='del'>-	pushq_cfi_reg r11</div><div class='add'>+	pushq %rdi</div><div class='add'>+	pushq %rsi</div><div class='add'>+	pushq %rdx</div><div class='add'>+	pushq %rcx</div><div class='add'>+	pushq %rax</div><div class='add'>+	pushq %r8</div><div class='add'>+	pushq %r9</div><div class='add'>+	pushq %r10</div><div class='add'>+	pushq %r11</div><div class='ctx'> </div><div class='ctx'> 	.if \put_ret_addr_in_rdi</div><div class='ctx'> 	/* 9*8(%rsp) is return addr on stack */</div><div class='del'>-	movq_cfi_restore 9*8, rdi</div><div class='add'>+	movq 9*8(%rsp), %rdi</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	call \func</div><div class='ctx'> 	jmp  restore</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> 	_ASM_NOKPROBE(\name)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -49,27 +46,22 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> 	THUNK ___preempt_schedule, preempt_schedule</div><div class='del'>-#ifdef CONFIG_CONTEXT_TRACKING</div><div class='del'>-	THUNK ___preempt_schedule_context, preempt_schedule_context</div><div class='del'>-#endif</div><div class='add'>+	THUNK ___preempt_schedule_notrace, preempt_schedule_notrace</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_TRACE_IRQFLAGS) \</div><div class='ctx'>  || defined(CONFIG_DEBUG_LOCK_ALLOC) \</div><div class='ctx'>  || defined(CONFIG_PREEMPT)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 9*8</div><div class='ctx'> restore:</div><div class='del'>-	popq_cfi_reg r11</div><div class='del'>-	popq_cfi_reg r10</div><div class='del'>-	popq_cfi_reg r9</div><div class='del'>-	popq_cfi_reg r8</div><div class='del'>-	popq_cfi_reg rax</div><div class='del'>-	popq_cfi_reg rcx</div><div class='del'>-	popq_cfi_reg rdx</div><div class='del'>-	popq_cfi_reg rsi</div><div class='del'>-	popq_cfi_reg rdi</div><div class='add'>+	popq %r11</div><div class='add'>+	popq %r10</div><div class='add'>+	popq %r9</div><div class='add'>+	popq %r8</div><div class='add'>+	popq %rax</div><div class='add'>+	popq %rcx</div><div class='add'>+	popq %rdx</div><div class='add'>+	popq %rsi</div><div class='add'>+	popq %rdi</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> 	_ASM_NOKPROBE(restore)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/vdso/.gitignore b/arch/x86/entry/vdso/.gitignore<br/>index aae8ffdd5880..aae8ffdd5880 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/.gitignore?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/.gitignore</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/.gitignore</a></div><div class='head'>diff --git a/arch/x86/vdso/Makefile b/arch/x86/entry/vdso/Makefile<br/>index e97032069f88..e97032069f88 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/Makefile</a></div><div class='head'>diff --git a/arch/x86/vdso/checkundef.sh b/arch/x86/entry/vdso/checkundef.sh<br/>index 7ee90a9b549d..7ee90a9b549d 100755<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/checkundef.sh?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/checkundef.sh</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/checkundef.sh?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/checkundef.sh</a></div><div class='head'>diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/entry/vdso/vclock_gettime.c<br/>index 9793322751e0..9793322751e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vclock_gettime.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vclock_gettime.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vclock_gettime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vclock_gettime.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso-layout.lds.S b/arch/x86/entry/vdso/vdso-layout.lds.S<br/>index de2c921025f5..de2c921025f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso-layout.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso-layout.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso-layout.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso-layout.lds.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso-note.S b/arch/x86/entry/vdso/vdso-note.S<br/>index 79a071e4357e..79a071e4357e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso-note.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso-note.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso-note.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso-note.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso.lds.S b/arch/x86/entry/vdso/vdso.lds.S<br/>index 6807932643c2..6807932643c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso.lds.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso2c.c b/arch/x86/entry/vdso/vdso2c.c<br/>index 8627db24a7f6..8627db24a7f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso2c.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso2c.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso2c.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso2c.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso2c.h b/arch/x86/entry/vdso/vdso2c.h<br/>index 0224987556ce..0224987556ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso2c.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso2c.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso2c.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso2c.h</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/entry/vdso/vdso32-setup.c<br/>index e904c270573b..e904c270573b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32-setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32-setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32-setup.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/.gitignore b/arch/x86/entry/vdso/vdso32/.gitignore<br/>index e45fba9d0ced..e45fba9d0ced 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/.gitignore?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/.gitignore</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/.gitignore</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/int80.S b/arch/x86/entry/vdso/vdso32/int80.S<br/>index b15b7c01aedb..b15b7c01aedb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/int80.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/int80.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/int80.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/int80.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/note.S b/arch/x86/entry/vdso/vdso32/note.S<br/>index c83f25734696..c83f25734696 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/note.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/note.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/note.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/note.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/sigreturn.S b/arch/x86/entry/vdso/vdso32/sigreturn.S<br/>index d7ec4e251c0a..d7ec4e251c0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/sigreturn.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/sigreturn.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/sigreturn.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/sigreturn.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/syscall.S b/arch/x86/entry/vdso/vdso32/syscall.S<br/>index 6b286bb5251c..6b286bb5251c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/syscall.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/syscall.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/syscall.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/syscall.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/sysenter.S b/arch/x86/entry/vdso/vdso32/sysenter.S<br/>index e354bceee0e0..e354bceee0e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/sysenter.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/sysenter.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/sysenter.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/sysenter.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/vclock_gettime.c b/arch/x86/entry/vdso/vdso32/vclock_gettime.c<br/>index 175cc72c0f68..175cc72c0f68 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/vclock_gettime.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/vclock_gettime.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/vclock_gettime.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vclock_gettime.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/vdso-fakesections.c b/arch/x86/entry/vdso/vdso32/vdso-fakesections.c<br/>index 541468e25265..541468e25265 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/vdso-fakesections.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/vdso-fakesections.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/vdso-fakesections.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vdso-fakesections.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vdso32/vdso32.lds.S b/arch/x86/entry/vdso/vdso32/vdso32.lds.S<br/>index 31056cf294bf..31056cf294bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdso32/vdso32.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdso32/vdso32.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdso32/vdso32.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdso32/vdso32.lds.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vdsox32.lds.S b/arch/x86/entry/vdso/vdsox32.lds.S<br/>index 697c11ece90c..697c11ece90c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vdsox32.lds.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vdsox32.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vdsox32.lds.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vdsox32.lds.S</a></div><div class='head'>diff --git a/arch/x86/vdso/vgetcpu.c b/arch/x86/entry/vdso/vgetcpu.c<br/>index 8ec3d1f4ce9a..8ec3d1f4ce9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vgetcpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vgetcpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vgetcpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vgetcpu.c</a></div><div class='head'>diff --git a/arch/x86/vdso/vma.c b/arch/x86/entry/vdso/vma.c<br/>index 1c9f750c3859..1c9f750c3859 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/vdso/vma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/vdso/vma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vdso/vma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vdso/vma.c</a></div><div class='head'>diff --git a/arch/x86/entry/vsyscall/Makefile b/arch/x86/entry/vsyscall/Makefile<br/>new file mode 100644<br/>index 000000000000..a9f4856f622a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vsyscall/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the x86 low level vsyscall code</div><div class='add'>+#</div><div class='add'>+obj-y					:= vsyscall_gtod.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_X86_VSYSCALL_EMULATION)	+= vsyscall_64.o vsyscall_emu_64.o</div><div class='add'>+</div><div class='head'>diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c<br/>index 2dcc6ff6fdcc..2dcc6ff6fdcc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsyscall_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/vsyscall_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vsyscall/vsyscall_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_64.c</a></div><div class='head'>diff --git a/arch/x86/kernel/vsyscall_emu_64.S b/arch/x86/entry/vsyscall/vsyscall_emu_64.S<br/>index c9596a9af159..c9596a9af159 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsyscall_emu_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/vsyscall_emu_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vsyscall/vsyscall_emu_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_emu_64.S</a></div><div class='head'>diff --git a/arch/x86/kernel/vsyscall_gtod.c b/arch/x86/entry/vsyscall/vsyscall_gtod.c<br/>index 51e330416995..51e330416995 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsyscall_gtod.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/vsyscall_gtod.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vsyscall/vsyscall_gtod.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_gtod.c</a></div><div class='head'>diff --git a/arch/x86/kernel/vsyscall_trace.h b/arch/x86/entry/vsyscall/vsyscall_trace.h<br/>index a8b2edec54fe..9dd7359a38a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsyscall_trace.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/vsyscall_trace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/entry/vsyscall/vsyscall_trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/entry/vsyscall/vsyscall_trace.h</a></div><div class='hunk'>@@ -24,6 +24,6 @@ TRACE_EVENT(emulate_vsyscall,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_INCLUDE_PATH</div><div class='del'>-#define TRACE_INCLUDE_PATH ../../arch/x86/kernel</div><div class='add'>+#define TRACE_INCLUDE_PATH ../../arch/x86/entry/vsyscall/</div><div class='ctx'> #define TRACE_INCLUDE_FILE vsyscall_trace</div><div class='ctx'> #include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/arch/x86/ia32/Makefile b/arch/x86/ia32/Makefile<br/>index bb635c641869..cd4339bae066 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/ia32/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/ia32/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the ia32 kernel emulation subsystem.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_IA32_EMULATION) := ia32entry.o sys_ia32.o ia32_signal.o</div><div class='add'>+obj-$(CONFIG_IA32_EMULATION) := sys_ia32.o ia32_signal.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_IA32_AOUT) += ia32_aout.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c<br/>index c81d35e6c7f1..ae3a29ae875b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/ia32_signal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/ia32/ia32_signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/ia32_signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/ia32/ia32_signal.c</a></div><div class='hunk'>@@ -21,8 +21,8 @@</div><div class='ctx'> #include &lt;linux/binfmts.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/ia32_unistd.h&gt;</div><div class='ctx'> #include &lt;asm/user32.h&gt;</div><div class='hunk'>@@ -198,7 +198,7 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,</div><div class='ctx'> 		buf = compat_ptr(tmp);</div><div class='ctx'> 	} get_user_catch(err);</div><div class='ctx'> </div><div class='del'>-	err |= restore_xstate_sig(buf, 1);</div><div class='add'>+	err |= fpu__restore_sig(buf, 1);</div><div class='ctx'> </div><div class='ctx'> 	force_iret();</div><div class='ctx'> </div><div class='hunk'>@@ -308,6 +308,7 @@ static void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,</div><div class='ctx'> 				 size_t frame_size,</div><div class='ctx'> 				 void __user **fpstate)</div><div class='ctx'> {</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='ctx'> 	unsigned long sp;</div><div class='ctx'> </div><div class='ctx'> 	/* Default to using normal stack */</div><div class='hunk'>@@ -322,12 +323,12 @@ static void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,</div><div class='ctx'> 		 ksig-&gt;ka.sa.sa_restorer)</div><div class='ctx'> 		sp = (unsigned long) ksig-&gt;ka.sa.sa_restorer;</div><div class='ctx'> </div><div class='del'>-	if (used_math()) {</div><div class='add'>+	if (fpu-&gt;fpstate_active) {</div><div class='ctx'> 		unsigned long fx_aligned, math_size;</div><div class='ctx'> </div><div class='del'>-		sp = alloc_mathframe(sp, 1, &amp;fx_aligned, &amp;math_size);</div><div class='add'>+		sp = fpu__alloc_mathframe(sp, 1, &amp;fx_aligned, &amp;math_size);</div><div class='ctx'> 		*fpstate = (struct _fpstate_ia32 __user *) sp;</div><div class='del'>-		if (save_xstate_sig(*fpstate, (void __user *)fx_aligned,</div><div class='add'>+		if (copy_fpstate_to_sigframe(*fpstate, (void __user *)fx_aligned,</div><div class='ctx'> 				    math_size) &lt; 0)</div><div class='ctx'> 			return (void __user *) -1L;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S<br/>deleted file mode 100644<br/>index 72bf2680f819..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/ia32entry.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/ia32/ia32entry.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,611 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Compatibility mode system call entry point for x86-64. </div><div class='del'>- * 		</div><div class='del'>- * Copyright 2000-2002 Andi Kleen, SuSE Labs.</div><div class='del'>- */		 </div><div class='del'>-</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-#include &lt;asm/calling.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/current.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/ia32_unistd.h&gt;	</div><div class='del'>-#include &lt;asm/thread_info.h&gt;	</div><div class='del'>-#include &lt;asm/segment.h&gt;</div><div class='del'>-#include &lt;asm/irqflags.h&gt;</div><div class='del'>-#include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/smap.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-</div><div class='del'>-/* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='del'>-#include &lt;linux/elf-em.h&gt;</div><div class='del'>-#define AUDIT_ARCH_I386		(EM_386|__AUDIT_ARCH_LE)</div><div class='del'>-#define __AUDIT_ARCH_LE	   0x40000000</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_AUDITSYSCALL</div><div class='del'>-#define sysexit_audit ia32_ret_from_sys_call</div><div class='del'>-#define sysretl_audit ia32_ret_from_sys_call</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	.section .entry.text, "ax"</div><div class='del'>-</div><div class='del'>-	/* clobbers %rax */</div><div class='del'>-	.macro  CLEAR_RREGS _r9=rax</div><div class='del'>-	xorl 	%eax,%eax</div><div class='del'>-	movq	%rax,R11(%rsp)</div><div class='del'>-	movq	%rax,R10(%rsp)</div><div class='del'>-	movq	%\_r9,R9(%rsp)</div><div class='del'>-	movq	%rax,R8(%rsp)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reload arg registers from stack in case ptrace changed them.</div><div class='del'>-	 * We don't reload %eax because syscall_trace_enter() returned</div><div class='del'>-	 * the %rax value we should see.  Instead, we just truncate that</div><div class='del'>-	 * value to 32 bits again as we did on entry from user mode.</div><div class='del'>-	 * If it's a new value set by user_regset during entry tracing,</div><div class='del'>-	 * this matches the normal truncation of the user-mode value.</div><div class='del'>-	 * If it's -1 to make us punt the syscall, then (u32)-1 is still</div><div class='del'>-	 * an appropriately invalid value.</div><div class='del'>-	 */</div><div class='del'>-	.macro LOAD_ARGS32 _r9=0</div><div class='del'>-	.if \_r9</div><div class='del'>-	movl R9(%rsp),%r9d</div><div class='del'>-	.endif</div><div class='del'>-	movl RCX(%rsp),%ecx</div><div class='del'>-	movl RDX(%rsp),%edx</div><div class='del'>-	movl RSI(%rsp),%esi</div><div class='del'>-	movl RDI(%rsp),%edi</div><div class='del'>-	movl %eax,%eax			/* zero extension */</div><div class='del'>-	.endm</div><div class='del'>-	</div><div class='del'>-	.macro CFI_STARTPROC32 simple</div><div class='del'>-	CFI_STARTPROC	\simple</div><div class='del'>-	CFI_UNDEFINED	r8</div><div class='del'>-	CFI_UNDEFINED	r9</div><div class='del'>-	CFI_UNDEFINED	r10</div><div class='del'>-	CFI_UNDEFINED	r11</div><div class='del'>-	CFI_UNDEFINED	r12</div><div class='del'>-	CFI_UNDEFINED	r13</div><div class='del'>-	CFI_UNDEFINED	r14</div><div class='del'>-	CFI_UNDEFINED	r15</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-ENTRY(native_usergs_sysret32)</div><div class='del'>-	swapgs</div><div class='del'>-	sysretl</div><div class='del'>-ENDPROC(native_usergs_sysret32)</div><div class='del'>-</div><div class='del'>-ENTRY(native_irq_enable_sysexit)</div><div class='del'>-	swapgs</div><div class='del'>-	sti</div><div class='del'>-	sysexit</div><div class='del'>-ENDPROC(native_irq_enable_sysexit)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 32bit SYSENTER instruction entry.</div><div class='del'>- *</div><div class='del'>- * SYSENTER loads ss, rsp, cs, and rip from previously programmed MSRs.</div><div class='del'>- * IF and VM in rflags are cleared (IOW: interrupts are off).</div><div class='del'>- * SYSENTER does not save anything on the stack,</div><div class='del'>- * and does not save old rip (!!!) and rflags.</div><div class='del'>- *</div><div class='del'>- * Arguments:</div><div class='del'>- * eax  system call number</div><div class='del'>- * ebx  arg1</div><div class='del'>- * ecx  arg2</div><div class='del'>- * edx  arg3</div><div class='del'>- * esi  arg4</div><div class='del'>- * edi  arg5</div><div class='del'>- * ebp  user stack</div><div class='del'>- * 0(%ebp) arg6</div><div class='del'>- *</div><div class='del'>- * This is purely a fast path. For anything complicated we use the int 0x80</div><div class='del'>- * path below. We set up a complete hardware stack frame to share code</div><div class='del'>- * with the int 0x80 path.</div><div class='del'>- */</div><div class='del'>-ENTRY(ia32_sysenter_target)</div><div class='del'>-	CFI_STARTPROC32	simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA	rsp,0</div><div class='del'>-	CFI_REGISTER	rsp,rbp</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupts are off on entry.</div><div class='del'>-	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='del'>-	 * it is too small to ever cause noticeable irq latency.</div><div class='del'>-	 */</div><div class='del'>-	SWAPGS_UNSAFE_STACK</div><div class='del'>-	movq	PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-</div><div class='del'>-	/* Zero-extending 32-bit regs, do not remove */</div><div class='del'>-	movl	%ebp, %ebp</div><div class='del'>-	movl	%eax, %eax</div><div class='del'>-</div><div class='del'>-	movl	ASM_THREAD_INFO(TI_sysenter_return, %rsp, 0), %r10d</div><div class='del'>-	CFI_REGISTER rip,r10</div><div class='del'>-</div><div class='del'>-	/* Construct struct pt_regs on stack */</div><div class='del'>-	pushq_cfi	$__USER32_DS		/* pt_regs-&gt;ss */</div><div class='del'>-	pushq_cfi	%rbp			/* pt_regs-&gt;sp */</div><div class='del'>-	CFI_REL_OFFSET	rsp,0</div><div class='del'>-	pushfq_cfi				/* pt_regs-&gt;flags */</div><div class='del'>-	pushq_cfi	$__USER32_CS		/* pt_regs-&gt;cs */</div><div class='del'>-	pushq_cfi	%r10 /* pt_regs-&gt;ip = thread_info-&gt;sysenter_return */</div><div class='del'>-	CFI_REL_OFFSET	rip,0</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;orig_ax */</div><div class='del'>-	pushq_cfi_reg	rdi			/* pt_regs-&gt;di */</div><div class='del'>-	pushq_cfi_reg	rsi			/* pt_regs-&gt;si */</div><div class='del'>-	pushq_cfi_reg	rdx			/* pt_regs-&gt;dx */</div><div class='del'>-	pushq_cfi_reg	rcx			/* pt_regs-&gt;cx */</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;ax */</div><div class='del'>-	cld</div><div class='del'>-	sub	$(10*8),%rsp /* pt_regs-&gt;r8-11,bp,bx,r12-15 not saved */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 10*8</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * no need to do an access_ok check here because rbp has been</div><div class='del'>-	 * 32bit zero extended</div><div class='del'>-	 */</div><div class='del'>-	ASM_STAC</div><div class='del'>-1:	movl	(%rbp),%ebp</div><div class='del'>-	_ASM_EXTABLE(1b,ia32_badarg)</div><div class='del'>-	ASM_CLAC</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Sysenter doesn't filter flags, so we need to clear NT</div><div class='del'>-	 * ourselves.  To save a few cycles, we can check whether</div><div class='del'>-	 * NT was set instead of doing an unconditional popfq.</div><div class='del'>-	 */</div><div class='del'>-	testl $X86_EFLAGS_NT,EFLAGS(%rsp)</div><div class='del'>-	jnz sysenter_fix_flags</div><div class='del'>-sysenter_flags_fixed:</div><div class='del'>-</div><div class='del'>-	orl     $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	testl   $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	jnz  sysenter_tracesys</div><div class='del'>-	cmpq	$(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja	ia32_badsys</div><div class='del'>-sysenter_do_call:</div><div class='del'>-	/* 32bit syscall -&gt; 64bit C ABI argument conversion */</div><div class='del'>-	movl	%edi,%r8d	/* arg5 */</div><div class='del'>-	movl	%ebp,%r9d	/* arg6 */</div><div class='del'>-	xchg	%ecx,%esi	/* rsi:arg2, rcx:arg4 */</div><div class='del'>-	movl	%ebx,%edi	/* arg1 */</div><div class='del'>-	movl	%edx,%edx	/* arg3 (zero extension) */</div><div class='del'>-sysenter_dispatch:</div><div class='del'>-	call	*ia32_sys_call_table(,%rax,8)</div><div class='del'>-	movq	%rax,RAX(%rsp)</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	testl	$_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz	sysexit_audit</div><div class='del'>-sysexit_from_sys_call:</div><div class='del'>-	/*</div><div class='del'>-	 * NB: SYSEXIT is not obviously safe for 64-bit kernels -- an</div><div class='del'>-	 * NMI between STI and SYSEXIT has poorly specified behavior,</div><div class='del'>-	 * and and NMI followed by an IRQ with usergs is fatal.  So</div><div class='del'>-	 * we just pretend we're using SYSEXIT but we really use</div><div class='del'>-	 * SYSRETL instead.</div><div class='del'>-	 *</div><div class='del'>-	 * This code path is still called 'sysexit' because it pairs</div><div class='del'>-	 * with 'sysenter' and it uses the SYSENTER calling convention.</div><div class='del'>-	 */</div><div class='del'>-	andl    $~TS_COMPAT,ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	movl	RIP(%rsp),%ecx		/* User %eip */</div><div class='del'>-	CFI_REGISTER rip,rcx</div><div class='del'>-	RESTORE_RSI_RDI</div><div class='del'>-	xorl	%edx,%edx		/* avoid info leaks */</div><div class='del'>-	xorq	%r8,%r8</div><div class='del'>-	xorq	%r9,%r9</div><div class='del'>-	xorq	%r10,%r10</div><div class='del'>-	movl	EFLAGS(%rsp),%r11d	/* User eflags */</div><div class='del'>-	/*CFI_RESTORE rflags*/</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * SYSRETL works even on Intel CPUs.  Use it in preference to SYSEXIT,</div><div class='del'>-	 * since it avoids a dicey window with interrupts enabled.</div><div class='del'>-	 */</div><div class='del'>-	movl	RSP(%rsp),%esp</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * USERGS_SYSRET32 does:</div><div class='del'>-	 *  gsbase = user's gs base</div><div class='del'>-	 *  eip = ecx</div><div class='del'>-	 *  rflags = r11</div><div class='del'>-	 *  cs = __USER32_CS</div><div class='del'>-	 *  ss = __USER_DS</div><div class='del'>-	 *</div><div class='del'>-	 * The prologue set RIP(%rsp) to VDSO32_SYSENTER_RETURN, which does:</div><div class='del'>-	 *</div><div class='del'>-	 *  pop %ebp</div><div class='del'>-	 *  pop %edx</div><div class='del'>-	 *  pop %ecx</div><div class='del'>-	 *</div><div class='del'>-	 * Therefore, we invoke SYSRETL with EDX and R8-R10 zeroed to</div><div class='del'>-	 * avoid info leaks.  R11 ends up with VDSO32_SYSENTER_RETURN's</div><div class='del'>-	 * address (already known to user code), and R12-R15 are</div><div class='del'>-	 * callee-saved and therefore don't contain any interesting</div><div class='del'>-	 * kernel data.</div><div class='del'>-	 */</div><div class='del'>-	USERGS_SYSRET32</div><div class='del'>-</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AUDITSYSCALL</div><div class='del'>-	.macro auditsys_entry_common</div><div class='del'>-	movl %esi,%r8d			/* 5th arg: 4th syscall arg */</div><div class='del'>-	movl %ecx,%r9d			/*swap with edx*/</div><div class='del'>-	movl %edx,%ecx			/* 4th arg: 3rd syscall arg */</div><div class='del'>-	movl %r9d,%edx			/* 3rd arg: 2nd syscall arg */</div><div class='del'>-	movl %ebx,%esi			/* 2nd arg: 1st syscall arg */</div><div class='del'>-	movl %eax,%edi			/* 1st arg: syscall number */</div><div class='del'>-	call __audit_syscall_entry</div><div class='del'>-	movl RAX(%rsp),%eax	/* reload syscall number */</div><div class='del'>-	cmpq $(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja ia32_badsys</div><div class='del'>-	movl %ebx,%edi			/* reload 1st syscall arg */</div><div class='del'>-	movl RCX(%rsp),%esi	/* reload 2nd syscall arg */</div><div class='del'>-	movl RDX(%rsp),%edx	/* reload 3rd syscall arg */</div><div class='del'>-	movl RSI(%rsp),%ecx	/* reload 4th syscall arg */</div><div class='del'>-	movl RDI(%rsp),%r8d	/* reload 5th syscall arg */</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro auditsys_exit exit</div><div class='del'>-	testl $(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz ia32_ret_from_sys_call</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	movl %eax,%esi		/* second arg, syscall return value */</div><div class='del'>-	cmpl $-MAX_ERRNO,%eax	/* is it an error ? */</div><div class='del'>-	jbe 1f</div><div class='del'>-	movslq %eax, %rsi	/* if error sign extend to 64 bits */</div><div class='del'>-1:	setbe %al		/* 1 if error, 0 if not */</div><div class='del'>-	movzbl %al,%edi		/* zero-extend that into %edi */</div><div class='del'>-	call __audit_syscall_exit</div><div class='del'>-	movq RAX(%rsp),%rax	/* reload syscall return value */</div><div class='del'>-	movl $(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT),%edi</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	testl %edi, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jz \exit</div><div class='del'>-	CLEAR_RREGS</div><div class='del'>-	jmp int_with_check</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-sysenter_auditsys:</div><div class='del'>-	auditsys_entry_common</div><div class='del'>-	movl %ebp,%r9d			/* reload 6th syscall arg */</div><div class='del'>-	jmp sysenter_dispatch</div><div class='del'>-</div><div class='del'>-sysexit_audit:</div><div class='del'>-	auditsys_exit sysexit_from_sys_call</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-sysenter_fix_flags:</div><div class='del'>-	pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_FIXED)</div><div class='del'>-	popfq_cfi</div><div class='del'>-	jmp sysenter_flags_fixed</div><div class='del'>-</div><div class='del'>-sysenter_tracesys:</div><div class='del'>-#ifdef CONFIG_AUDITSYSCALL</div><div class='del'>-	testl	$(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jz	sysenter_auditsys</div><div class='del'>-#endif</div><div class='del'>-	SAVE_EXTRA_REGS</div><div class='del'>-	CLEAR_RREGS</div><div class='del'>-	movq	$-ENOSYS,RAX(%rsp)/* ptrace can change this for a bad syscall */</div><div class='del'>-	movq	%rsp,%rdi        /* &amp;pt_regs -&gt; arg1 */</div><div class='del'>-	call	syscall_trace_enter</div><div class='del'>-	LOAD_ARGS32  /* reload args from stack in case ptrace changed it */</div><div class='del'>-	RESTORE_EXTRA_REGS</div><div class='del'>-	cmpq	$(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja	int_ret_from_sys_call /* sysenter_tracesys has set RAX(%rsp) */</div><div class='del'>-	jmp	sysenter_do_call</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-ENDPROC(ia32_sysenter_target)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 32bit SYSCALL instruction entry.</div><div class='del'>- *</div><div class='del'>- * 32bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,</div><div class='del'>- * then loads new ss, cs, and rip from previously programmed MSRs.</div><div class='del'>- * rflags gets masked by a value from another MSR (so CLD and CLAC</div><div class='del'>- * are not needed). SYSCALL does not save anything on the stack</div><div class='del'>- * and does not change rsp.</div><div class='del'>- *</div><div class='del'>- * Note: rflags saving+masking-with-MSR happens only in Long mode</div><div class='del'>- * (in legacy 32bit mode, IF, RF and VM bits are cleared and that's it).</div><div class='del'>- * Don't get confused: rflags saving+masking depends on Long Mode Active bit</div><div class='del'>- * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes</div><div class='del'>- * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).</div><div class='del'>- *</div><div class='del'>- * Arguments:</div><div class='del'>- * eax  system call number</div><div class='del'>- * ecx  return address</div><div class='del'>- * ebx  arg1</div><div class='del'>- * ebp  arg2	(note: not saved in the stack frame, should not be touched)</div><div class='del'>- * edx  arg3</div><div class='del'>- * esi  arg4</div><div class='del'>- * edi  arg5</div><div class='del'>- * esp  user stack</div><div class='del'>- * 0(%esp) arg6</div><div class='del'>- *</div><div class='del'>- * This is purely a fast path. For anything complicated we use the int 0x80</div><div class='del'>- * path below. We set up a complete hardware stack frame to share code</div><div class='del'>- * with the int 0x80 path.</div><div class='del'>- */</div><div class='del'>-ENTRY(ia32_cstar_target)</div><div class='del'>-	CFI_STARTPROC32	simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA	rsp,0</div><div class='del'>-	CFI_REGISTER	rip,rcx</div><div class='del'>-	/*CFI_REGISTER	rflags,r11*/</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupts are off on entry.</div><div class='del'>-	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='del'>-	 * it is too small to ever cause noticeable irq latency.</div><div class='del'>-	 */</div><div class='del'>-	SWAPGS_UNSAFE_STACK</div><div class='del'>-	movl	%esp,%r8d</div><div class='del'>-	CFI_REGISTER	rsp,r8</div><div class='del'>-	movq	PER_CPU_VAR(kernel_stack),%rsp</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-</div><div class='del'>-	/* Zero-extending 32-bit regs, do not remove */</div><div class='del'>-	movl	%eax,%eax</div><div class='del'>-</div><div class='del'>-	/* Construct struct pt_regs on stack */</div><div class='del'>-	pushq_cfi	$__USER32_DS		/* pt_regs-&gt;ss */</div><div class='del'>-	pushq_cfi	%r8			/* pt_regs-&gt;sp */</div><div class='del'>-	CFI_REL_OFFSET rsp,0</div><div class='del'>-	pushq_cfi	%r11			/* pt_regs-&gt;flags */</div><div class='del'>-	pushq_cfi	$__USER32_CS		/* pt_regs-&gt;cs */</div><div class='del'>-	pushq_cfi	%rcx			/* pt_regs-&gt;ip */</div><div class='del'>-	CFI_REL_OFFSET rip,0</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;orig_ax */</div><div class='del'>-	pushq_cfi_reg	rdi			/* pt_regs-&gt;di */</div><div class='del'>-	pushq_cfi_reg	rsi			/* pt_regs-&gt;si */</div><div class='del'>-	pushq_cfi_reg	rdx			/* pt_regs-&gt;dx */</div><div class='del'>-	pushq_cfi_reg	rbp			/* pt_regs-&gt;cx */</div><div class='del'>-	movl	%ebp,%ecx</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;ax */</div><div class='del'>-	sub	$(10*8),%rsp /* pt_regs-&gt;r8-11,bp,bx,r12-15 not saved */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 10*8</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * no need to do an access_ok check here because r8 has been</div><div class='del'>-	 * 32bit zero extended</div><div class='del'>-	 */</div><div class='del'>-	ASM_STAC</div><div class='del'>-1:	movl	(%r8),%r9d</div><div class='del'>-	_ASM_EXTABLE(1b,ia32_badarg)</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	orl     $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	testl   $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	jnz   cstar_tracesys</div><div class='del'>-	cmpq $IA32_NR_syscalls-1,%rax</div><div class='del'>-	ja  ia32_badsys</div><div class='del'>-cstar_do_call:</div><div class='del'>-	/* 32bit syscall -&gt; 64bit C ABI argument conversion */</div><div class='del'>-	movl	%edi,%r8d	/* arg5 */</div><div class='del'>-	/* r9 already loaded */	/* arg6 */</div><div class='del'>-	xchg	%ecx,%esi	/* rsi:arg2, rcx:arg4 */</div><div class='del'>-	movl	%ebx,%edi	/* arg1 */</div><div class='del'>-	movl	%edx,%edx	/* arg3 (zero extension) */</div><div class='del'>-cstar_dispatch:</div><div class='del'>-	call *ia32_sys_call_table(,%rax,8)</div><div class='del'>-	movq %rax,RAX(%rsp)</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz sysretl_audit</div><div class='del'>-sysretl_from_sys_call:</div><div class='del'>-	andl $~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	RESTORE_RSI_RDI_RDX</div><div class='del'>-	movl RIP(%rsp),%ecx</div><div class='del'>-	CFI_REGISTER rip,rcx</div><div class='del'>-	movl EFLAGS(%rsp),%r11d</div><div class='del'>-	/*CFI_REGISTER rflags,r11*/</div><div class='del'>-	xorq	%r10,%r10</div><div class='del'>-	xorq	%r9,%r9</div><div class='del'>-	xorq	%r8,%r8</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-	movl RSP(%rsp),%esp</div><div class='del'>-	CFI_RESTORE rsp</div><div class='del'>-	/*</div><div class='del'>-	 * 64bit-&gt;32bit SYSRET restores eip from ecx,</div><div class='del'>-	 * eflags from r11 (but RF and VM bits are forced to 0),</div><div class='del'>-	 * cs and ss are loaded from MSRs.</div><div class='del'>-	 * (Note: 32bit-&gt;32bit SYSRET is different: since r11</div><div class='del'>-	 * does not exist, it merely sets eflags.IF=1).</div><div class='del'>-	 *</div><div class='del'>-	 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss</div><div class='del'>-	 * descriptor is not reinitialized.  This means that we must</div><div class='del'>-	 * avoid SYSRET with SS == NULL, which could happen if we schedule,</div><div class='del'>-	 * exit the kernel, and re-enter using an interrupt vector.  (All</div><div class='del'>-	 * interrupt entries on x86_64 set SS to NULL.)  We prevent that</div><div class='del'>-	 * from happening by reloading SS in __switch_to.</div><div class='del'>-	 */</div><div class='del'>-	USERGS_SYSRET32</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AUDITSYSCALL</div><div class='del'>-cstar_auditsys:</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='del'>-	movl %r9d,R9(%rsp)	/* register to be clobbered by call */</div><div class='del'>-	auditsys_entry_common</div><div class='del'>-	movl R9(%rsp),%r9d	/* reload 6th syscall arg */</div><div class='del'>-	jmp cstar_dispatch</div><div class='del'>-</div><div class='del'>-sysretl_audit:</div><div class='del'>-	auditsys_exit sysretl_from_sys_call</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-cstar_tracesys:</div><div class='del'>-#ifdef CONFIG_AUDITSYSCALL</div><div class='del'>-	testl $(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jz cstar_auditsys</div><div class='del'>-#endif</div><div class='del'>-	xchgl %r9d,%ebp</div><div class='del'>-	SAVE_EXTRA_REGS</div><div class='del'>-	CLEAR_RREGS r9</div><div class='del'>-	movq $-ENOSYS,RAX(%rsp)	/* ptrace can change this for a bad syscall */</div><div class='del'>-	movq %rsp,%rdi        /* &amp;pt_regs -&gt; arg1 */</div><div class='del'>-	call syscall_trace_enter</div><div class='del'>-	LOAD_ARGS32 1	/* reload args from stack in case ptrace changed it */</div><div class='del'>-	RESTORE_EXTRA_REGS</div><div class='del'>-	xchgl %ebp,%r9d</div><div class='del'>-	cmpq $(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja int_ret_from_sys_call /* cstar_tracesys has set RAX(%rsp) */</div><div class='del'>-	jmp cstar_do_call</div><div class='del'>-END(ia32_cstar_target)</div><div class='del'>-				</div><div class='del'>-ia32_badarg:</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	movq $-EFAULT,%rax</div><div class='del'>-	jmp ia32_sysret</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Emulated IA32 system calls via int 0x80.</div><div class='del'>- *</div><div class='del'>- * Arguments:</div><div class='del'>- * eax  system call number</div><div class='del'>- * ebx  arg1</div><div class='del'>- * ecx  arg2</div><div class='del'>- * edx  arg3</div><div class='del'>- * esi  arg4</div><div class='del'>- * edi  arg5</div><div class='del'>- * ebp  arg6	(note: not saved in the stack frame, should not be touched)</div><div class='del'>- *</div><div class='del'>- * Notes:</div><div class='del'>- * Uses the same stack frame as the x86-64 version.</div><div class='del'>- * All registers except eax must be saved (but ptrace may violate that).</div><div class='del'>- * Arguments are zero extended. For system calls that want sign extension and</div><div class='del'>- * take long arguments a wrapper is needed. Most calls can just be called</div><div class='del'>- * directly.</div><div class='del'>- * Assumes it is only called from user space and entered with interrupts off.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-ENTRY(ia32_syscall)</div><div class='del'>-	CFI_STARTPROC32	simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA	rsp,5*8</div><div class='del'>-	/*CFI_REL_OFFSET	ss,4*8 */</div><div class='del'>-	CFI_REL_OFFSET	rsp,3*8</div><div class='del'>-	/*CFI_REL_OFFSET	rflags,2*8 */</div><div class='del'>-	/*CFI_REL_OFFSET	cs,1*8 */</div><div class='del'>-	CFI_REL_OFFSET	rip,0*8</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupts are off on entry.</div><div class='del'>-	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,</div><div class='del'>-	 * it is too small to ever cause noticeable irq latency.</div><div class='del'>-	 */</div><div class='del'>-	PARAVIRT_ADJUST_EXCEPTION_FRAME</div><div class='del'>-	SWAPGS</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-</div><div class='del'>-	/* Zero-extending 32-bit regs, do not remove */</div><div class='del'>-	movl	%eax,%eax</div><div class='del'>-</div><div class='del'>-	/* Construct struct pt_regs on stack (iret frame is already on stack) */</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;orig_ax */</div><div class='del'>-	pushq_cfi_reg	rdi			/* pt_regs-&gt;di */</div><div class='del'>-	pushq_cfi_reg	rsi			/* pt_regs-&gt;si */</div><div class='del'>-	pushq_cfi_reg	rdx			/* pt_regs-&gt;dx */</div><div class='del'>-	pushq_cfi_reg	rcx			/* pt_regs-&gt;cx */</div><div class='del'>-	pushq_cfi_reg	rax			/* pt_regs-&gt;ax */</div><div class='del'>-	cld</div><div class='del'>-	sub	$(10*8),%rsp /* pt_regs-&gt;r8-11,bp,bx,r12-15 not saved */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 10*8</div><div class='del'>-</div><div class='del'>-	orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)</div><div class='del'>-	jnz ia32_tracesys</div><div class='del'>-	cmpq $(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja ia32_badsys</div><div class='del'>-ia32_do_call:</div><div class='del'>-	/* 32bit syscall -&gt; 64bit C ABI argument conversion */</div><div class='del'>-	movl %edi,%r8d	/* arg5 */</div><div class='del'>-	movl %ebp,%r9d	/* arg6 */</div><div class='del'>-	xchg %ecx,%esi	/* rsi:arg2, rcx:arg4 */</div><div class='del'>-	movl %ebx,%edi	/* arg1 */</div><div class='del'>-	movl %edx,%edx	/* arg3 (zero extension) */</div><div class='del'>-	call *ia32_sys_call_table(,%rax,8) # xxx: rip relative</div><div class='del'>-ia32_sysret:</div><div class='del'>-	movq %rax,RAX(%rsp)</div><div class='del'>-ia32_ret_from_sys_call:</div><div class='del'>-	CLEAR_RREGS</div><div class='del'>-	jmp int_ret_from_sys_call</div><div class='del'>-</div><div class='del'>-ia32_tracesys:</div><div class='del'>-	SAVE_EXTRA_REGS</div><div class='del'>-	CLEAR_RREGS</div><div class='del'>-	movq $-ENOSYS,RAX(%rsp)	/* ptrace can change this for a bad syscall */</div><div class='del'>-	movq %rsp,%rdi        /* &amp;pt_regs -&gt; arg1 */</div><div class='del'>-	call syscall_trace_enter</div><div class='del'>-	LOAD_ARGS32	/* reload args from stack in case ptrace changed it */</div><div class='del'>-	RESTORE_EXTRA_REGS</div><div class='del'>-	cmpq $(IA32_NR_syscalls-1),%rax</div><div class='del'>-	ja  int_ret_from_sys_call	/* ia32_tracesys has set RAX(%rsp) */</div><div class='del'>-	jmp ia32_do_call</div><div class='del'>-END(ia32_syscall)</div><div class='del'>-</div><div class='del'>-ia32_badsys:</div><div class='del'>-	movq $0,ORIG_RAX(%rsp)</div><div class='del'>-	movq $-ENOSYS,%rax</div><div class='del'>-	jmp ia32_sysret</div><div class='del'>-</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-	</div><div class='del'>-	.macro PTREGSCALL label, func</div><div class='del'>-	ALIGN</div><div class='del'>-GLOBAL(\label)</div><div class='del'>-	leaq \func(%rip),%rax</div><div class='del'>-	jmp  ia32_ptregs_common	</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	CFI_STARTPROC32</div><div class='del'>-</div><div class='del'>-	PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn</div><div class='del'>-	PTREGSCALL stub32_sigreturn, sys32_sigreturn</div><div class='del'>-	PTREGSCALL stub32_fork, sys_fork</div><div class='del'>-	PTREGSCALL stub32_vfork, sys_vfork</div><div class='del'>-</div><div class='del'>-	ALIGN</div><div class='del'>-GLOBAL(stub32_clone)</div><div class='del'>-	leaq sys_clone(%rip),%rax</div><div class='del'>-	mov	%r8, %rcx</div><div class='del'>-	jmp  ia32_ptregs_common	</div><div class='del'>-</div><div class='del'>-	ALIGN</div><div class='del'>-ia32_ptregs_common:</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-	CFI_STARTPROC32	simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA	rsp,SIZEOF_PTREGS</div><div class='del'>-	CFI_REL_OFFSET	rax,RAX</div><div class='del'>-	CFI_REL_OFFSET	rcx,RCX</div><div class='del'>-	CFI_REL_OFFSET	rdx,RDX</div><div class='del'>-	CFI_REL_OFFSET	rsi,RSI</div><div class='del'>-	CFI_REL_OFFSET	rdi,RDI</div><div class='del'>-	CFI_REL_OFFSET	rip,RIP</div><div class='del'>-/*	CFI_REL_OFFSET	cs,CS*/</div><div class='del'>-/*	CFI_REL_OFFSET	rflags,EFLAGS*/</div><div class='del'>-	CFI_REL_OFFSET	rsp,RSP</div><div class='del'>-/*	CFI_REL_OFFSET	ss,SS*/</div><div class='del'>-	SAVE_EXTRA_REGS 8</div><div class='del'>-	call *%rax</div><div class='del'>-	RESTORE_EXTRA_REGS 8</div><div class='del'>-	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(ia32_ptregs_common)</div><div class='head'>diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild<br/>index d55a210a49bf..aeac434c9feb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/Kbuild</a></div><div class='hunk'>@@ -9,4 +9,4 @@ generic-y += cputime.h</div><div class='ctx'> generic-y += dma-contiguous.h</div><div class='ctx'> generic-y += early_ioremap.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='head'>diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h<br/>index bdf02eeee765..e7636bac7372 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/alternative-asm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/alternative-asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/alternative-asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/alternative-asm.h</a></div><div class='hunk'>@@ -18,6 +18,12 @@</div><div class='ctx'> 	.endm</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Issue one struct alt_instr descriptor entry (need to put it into</div><div class='add'>+ * the section .altinstructions, see below). This entry contains</div><div class='add'>+ * enough information for the alternatives patching code to patch an</div><div class='add'>+ * instruction. See apply_alternatives().</div><div class='add'>+ */</div><div class='ctx'> .macro altinstruction_entry orig alt feature orig_len alt_len pad_len</div><div class='ctx'> 	.long \orig - .</div><div class='ctx'> 	.long \alt - .</div><div class='hunk'>@@ -27,6 +33,12 @@</div><div class='ctx'> 	.byte \pad_len</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Define an alternative between two instructions. If @feature is</div><div class='add'>+ * present, early code in apply_alternatives() replaces @oldinstr with</div><div class='add'>+ * @newinstr. ".skip" directive takes care of proper instruction padding</div><div class='add'>+ * in case @newinstr is longer than @oldinstr.</div><div class='add'>+ */</div><div class='ctx'> .macro ALTERNATIVE oldinstr, newinstr, feature</div><div class='ctx'> 140:</div><div class='ctx'> 	\oldinstr</div><div class='hunk'>@@ -55,6 +67,12 @@</div><div class='ctx'>  */</div><div class='ctx'> #define alt_max_short(a, b)	((a) ^ (((a) ^ (b)) &amp; -(-((a) &lt; (b)))))</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Same as ALTERNATIVE macro above but for two alternatives. If CPU</div><div class='add'>+ * has @feature1, it replaces @oldinstr with @newinstr1. If CPU has</div><div class='add'>+ * @feature2, it replaces @oldinstr with @feature2.</div><div class='add'>+ */</div><div class='ctx'> .macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2</div><div class='ctx'> 140:</div><div class='ctx'> 	\oldinstr</div><div class='head'>diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h<br/>index ba32af062f61..7bfc85bbb8ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/alternative.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/alternative.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/alternative.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/alternative.h</a></div><div class='hunk'>@@ -52,6 +52,12 @@ struct alt_instr {</div><div class='ctx'> 	u8  padlen;		/* length of build-time padding */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Debug flag that can be tested to see whether alternative</div><div class='add'>+ * instructions were patched in already:</div><div class='add'>+ */</div><div class='add'>+extern int alternatives_patched;</div><div class='add'>+</div><div class='ctx'> extern void alternative_instructions(void);</div><div class='ctx'> extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h<br/>index aaac3b2fb746..1a5da2e63aee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/amd_nb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/amd_nb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/amd_nb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/amd_nb.h</a></div><div class='hunk'>@@ -98,11 +98,22 @@ static inline u16 amd_get_node_id(struct pci_dev *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool amd_gart_present(void)</div><div class='add'>+{</div><div class='add'>+	/* GART present only on Fam15h, upto model 0fh */</div><div class='add'>+	if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||</div><div class='add'>+	    (boot_cpu_data.x86 == 0x15 &amp;&amp; boot_cpu_data.x86_model &lt; 0x10))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> #define amd_nb_num(x)		0</div><div class='ctx'> #define amd_nb_has_feature(x)	false</div><div class='ctx'> #define node_to_amd_nb(x)	NULL</div><div class='add'>+#define amd_gart_present(x)	false</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h<br/>index 976b86a325e5..c8393634ca0c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/apic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/apic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/apic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/apic.h</a></div><div class='hunk'>@@ -644,6 +644,12 @@ static inline void entering_ack_irq(void)</div><div class='ctx'> 	entering_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void ipi_entering_ack_irq(void)</div><div class='add'>+{</div><div class='add'>+	ack_APIC_irq();</div><div class='add'>+	irq_enter();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void exiting_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	irq_exit();</div><div class='head'>diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h<br/>index 7730c1c5c83a..189679aba703 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/asm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/asm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/asm.h</a></div><div class='hunk'>@@ -63,6 +63,31 @@</div><div class='ctx'> 	_ASM_ALIGN ;						\</div><div class='ctx'> 	_ASM_PTR (entry);					\</div><div class='ctx'> 	.popsection</div><div class='add'>+</div><div class='add'>+.macro ALIGN_DESTINATION</div><div class='add'>+	/* check for bad alignment of destination */</div><div class='add'>+	movl %edi,%ecx</div><div class='add'>+	andl $7,%ecx</div><div class='add'>+	jz 102f				/* already aligned */</div><div class='add'>+	subl $8,%ecx</div><div class='add'>+	negl %ecx</div><div class='add'>+	subl %ecx,%edx</div><div class='add'>+100:	movb (%rsi),%al</div><div class='add'>+101:	movb %al,(%rdi)</div><div class='add'>+	incq %rsi</div><div class='add'>+	incq %rdi</div><div class='add'>+	decl %ecx</div><div class='add'>+	jnz 100b</div><div class='add'>+102:</div><div class='add'>+	.section .fixup,"ax"</div><div class='add'>+103:	addl %ecx,%edx			/* ecx is zerorest also */</div><div class='add'>+	jmp copy_user_handle_tail</div><div class='add'>+	.previous</div><div class='add'>+</div><div class='add'>+	_ASM_EXTABLE(100b,103b)</div><div class='add'>+	_ASM_EXTABLE(101b,103b)</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> # define _ASM_EXTABLE(from,to)					\</div><div class='ctx'> 	" .pushsection \"__ex_table\",\"a\"\n"			\</div><div class='head'>diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h<br/>index 5e5cd123fdfb..e9168955c42f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/atomic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/atomic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/atomic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/atomic.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically reads the value of @v.</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_read(const atomic_t *v)</div><div class='add'>+static __always_inline int atomic_read(const atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	return ACCESS_ONCE((v)-&gt;counter);</div><div class='ctx'> }</div><div class='hunk'>@@ -34,7 +34,7 @@ static inline int atomic_read(const atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically sets the value of @v to @i.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_set(atomic_t *v, int i)</div><div class='add'>+static __always_inline void atomic_set(atomic_t *v, int i)</div><div class='ctx'> {</div><div class='ctx'> 	v-&gt;counter = i;</div><div class='ctx'> }</div><div class='hunk'>@@ -46,7 +46,7 @@ static inline void atomic_set(atomic_t *v, int i)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically adds @i to @v.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_add(int i, atomic_t *v)</div><div class='add'>+static __always_inline void atomic_add(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "addl %1,%0"</div><div class='ctx'> 		     : "+m" (v-&gt;counter)</div><div class='hunk'>@@ -60,7 +60,7 @@ static inline void atomic_add(int i, atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically subtracts @i from @v.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_sub(int i, atomic_t *v)</div><div class='add'>+static __always_inline void atomic_sub(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "subl %1,%0"</div><div class='ctx'> 		     : "+m" (v-&gt;counter)</div><div class='hunk'>@@ -76,7 +76,7 @@ static inline void atomic_sub(int i, atomic_t *v)</div><div class='ctx'>  * true if the result is zero, or false for all</div><div class='ctx'>  * other cases.</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_sub_and_test(int i, atomic_t *v)</div><div class='add'>+static __always_inline int atomic_sub_and_test(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v-&gt;counter, "er", i, "%0", "e");</div><div class='ctx'> }</div><div class='hunk'>@@ -87,7 +87,7 @@ static inline int atomic_sub_and_test(int i, atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically increments @v by 1.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_inc(atomic_t *v)</div><div class='add'>+static __always_inline void atomic_inc(atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "incl %0"</div><div class='ctx'> 		     : "+m" (v-&gt;counter));</div><div class='hunk'>@@ -99,7 +99,7 @@ static inline void atomic_inc(atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically decrements @v by 1.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic_dec(atomic_t *v)</div><div class='add'>+static __always_inline void atomic_dec(atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "decl %0"</div><div class='ctx'> 		     : "+m" (v-&gt;counter));</div><div class='hunk'>@@ -113,7 +113,7 @@ static inline void atomic_dec(atomic_t *v)</div><div class='ctx'>  * returns true if the result is 0, or false for all other</div><div class='ctx'>  * cases.</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_dec_and_test(atomic_t *v)</div><div class='add'>+static __always_inline int atomic_dec_and_test(atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v-&gt;counter, "%0", "e");</div><div class='ctx'> }</div><div class='hunk'>@@ -126,7 +126,7 @@ static inline int atomic_dec_and_test(atomic_t *v)</div><div class='ctx'>  * and returns true if the result is zero, or false for all</div><div class='ctx'>  * other cases.</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_inc_and_test(atomic_t *v)</div><div class='add'>+static __always_inline int atomic_inc_and_test(atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v-&gt;counter, "%0", "e");</div><div class='ctx'> }</div><div class='hunk'>@@ -140,7 +140,7 @@ static inline int atomic_inc_and_test(atomic_t *v)</div><div class='ctx'>  * if the result is negative, or false when</div><div class='ctx'>  * result is greater than or equal to zero.</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_add_negative(int i, atomic_t *v)</div><div class='add'>+static __always_inline int atomic_add_negative(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v-&gt;counter, "er", i, "%0", "s");</div><div class='ctx'> }</div><div class='hunk'>@@ -152,7 +152,7 @@ static inline int atomic_add_negative(int i, atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically adds @i to @v and returns @i + @v</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_add_return(int i, atomic_t *v)</div><div class='add'>+static __always_inline int atomic_add_return(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	return i + xadd(&amp;v-&gt;counter, i);</div><div class='ctx'> }</div><div class='hunk'>@@ -164,7 +164,7 @@ static inline int atomic_add_return(int i, atomic_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically subtracts @i from @v and returns @v - @i</div><div class='ctx'>  */</div><div class='del'>-static inline int atomic_sub_return(int i, atomic_t *v)</div><div class='add'>+static __always_inline int atomic_sub_return(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	return atomic_add_return(-i, v);</div><div class='ctx'> }</div><div class='hunk'>@@ -172,7 +172,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)</div><div class='ctx'> #define atomic_inc_return(v)  (atomic_add_return(1, v))</div><div class='ctx'> #define atomic_dec_return(v)  (atomic_sub_return(1, v))</div><div class='ctx'> </div><div class='del'>-static inline int atomic_cmpxchg(atomic_t *v, int old, int new)</div><div class='add'>+static __always_inline int atomic_cmpxchg(atomic_t *v, int old, int new)</div><div class='ctx'> {</div><div class='ctx'> 	return cmpxchg(&amp;v-&gt;counter, old, new);</div><div class='ctx'> }</div><div class='hunk'>@@ -191,7 +191,7 @@ static inline int atomic_xchg(atomic_t *v, int new)</div><div class='ctx'>  * Atomically adds @a to @v, so long as @v was not already @u.</div><div class='ctx'>  * Returns the old value of @v.</div><div class='ctx'>  */</div><div class='del'>-static inline int __atomic_add_unless(atomic_t *v, int a, int u)</div><div class='add'>+static __always_inline int __atomic_add_unless(atomic_t *v, int a, int u)</div><div class='ctx'> {</div><div class='ctx'> 	int c, old;</div><div class='ctx'> 	c = atomic_read(v);</div><div class='hunk'>@@ -213,7 +213,7 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)</div><div class='ctx'>  * Atomically adds 1 to @v</div><div class='ctx'>  * Returns the new value of @u</div><div class='ctx'>  */</div><div class='del'>-static inline short int atomic_inc_short(short int *v)</div><div class='add'>+static __always_inline short int atomic_inc_short(short int *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));</div><div class='ctx'> 	return *v;</div><div class='head'>diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h<br/>index f8d273e18516..b965f9e03f2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/atomic64_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/atomic64_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/atomic64_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/atomic64_64.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@ static inline void atomic64_set(atomic64_t *v, long i)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically adds @i to @v.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic64_add(long i, atomic64_t *v)</div><div class='add'>+static __always_inline void atomic64_add(long i, atomic64_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "addq %1,%0"</div><div class='ctx'> 		     : "=m" (v-&gt;counter)</div><div class='hunk'>@@ -81,7 +81,7 @@ static inline int atomic64_sub_and_test(long i, atomic64_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically increments @v by 1.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic64_inc(atomic64_t *v)</div><div class='add'>+static __always_inline void atomic64_inc(atomic64_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "incq %0"</div><div class='ctx'> 		     : "=m" (v-&gt;counter)</div><div class='hunk'>@@ -94,7 +94,7 @@ static inline void atomic64_inc(atomic64_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically decrements @v by 1.</div><div class='ctx'>  */</div><div class='del'>-static inline void atomic64_dec(atomic64_t *v)</div><div class='add'>+static __always_inline void atomic64_dec(atomic64_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(LOCK_PREFIX "decq %0"</div><div class='ctx'> 		     : "=m" (v-&gt;counter)</div><div class='hunk'>@@ -148,7 +148,7 @@ static inline int atomic64_add_negative(long i, atomic64_t *v)</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically adds @i to @v and returns @i + @v</div><div class='ctx'>  */</div><div class='del'>-static inline long atomic64_add_return(long i, atomic64_t *v)</div><div class='add'>+static __always_inline long atomic64_add_return(long i, atomic64_t *v)</div><div class='ctx'> {</div><div class='ctx'> 	return i + xadd(&amp;v-&gt;counter, i);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h<br/>index 959e45b81fe2..e51a8f803f55 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/barrier.h</a></div><div class='hunk'>@@ -35,12 +35,12 @@</div><div class='ctx'> #define smp_mb()	mb()</div><div class='ctx'> #define smp_rmb()	dma_rmb()</div><div class='ctx'> #define smp_wmb()	barrier()</div><div class='del'>-#define set_mb(var, value) do { (void)xchg(&amp;var, value); } while (0)</div><div class='add'>+#define smp_store_mb(var, value) do { (void)xchg(&amp;var, value); } while (0)</div><div class='ctx'> #else /* !SMP */</div><div class='ctx'> #define smp_mb()	barrier()</div><div class='ctx'> #define smp_rmb()	barrier()</div><div class='ctx'> #define smp_wmb()	barrier()</div><div class='del'>-#define set_mb(var, value) do { var = value; barrier(); } while (0)</div><div class='add'>+#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)</div><div class='ctx'> #endif /* SMP */</div><div class='ctx'> </div><div class='ctx'> #define read_barrier_depends()		do { } while (0)</div><div class='head'>diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h<br/>index 47c8e32f621a..9bf3ea14b9f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/cacheflush.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/cacheflush.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -4,11 +4,12 @@</div><div class='ctx'> /* Caches aren't brain-dead on the intel. */</div><div class='ctx'> #include &lt;asm-generic/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The set_memory_* API can be used to change various attributes of a virtual</div><div class='ctx'>  * address range. The attributes include:</div><div class='del'>- * Cachability   : UnCached, WriteCombining, WriteBack</div><div class='add'>+ * Cachability   : UnCached, WriteCombining, WriteThrough, WriteBack</div><div class='ctx'>  * Executability : eXeutable, NoteXecutable</div><div class='ctx'>  * Read/Write    : ReadOnly, ReadWrite</div><div class='ctx'>  * Presence      : NotPresent</div><div class='hunk'>@@ -35,9 +36,11 @@</div><div class='ctx'> </div><div class='ctx'> int _set_memory_uc(unsigned long addr, int numpages);</div><div class='ctx'> int _set_memory_wc(unsigned long addr, int numpages);</div><div class='add'>+int _set_memory_wt(unsigned long addr, int numpages);</div><div class='ctx'> int _set_memory_wb(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_uc(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_wc(unsigned long addr, int numpages);</div><div class='add'>+int set_memory_wt(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_wb(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_x(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_nx(unsigned long addr, int numpages);</div><div class='hunk'>@@ -48,10 +51,12 @@ int set_memory_4k(unsigned long addr, int numpages);</div><div class='ctx'> </div><div class='ctx'> int set_memory_array_uc(unsigned long *addr, int addrinarray);</div><div class='ctx'> int set_memory_array_wc(unsigned long *addr, int addrinarray);</div><div class='add'>+int set_memory_array_wt(unsigned long *addr, int addrinarray);</div><div class='ctx'> int set_memory_array_wb(unsigned long *addr, int addrinarray);</div><div class='ctx'> </div><div class='ctx'> int set_pages_array_uc(struct page **pages, int addrinarray);</div><div class='ctx'> int set_pages_array_wc(struct page **pages, int addrinarray);</div><div class='add'>+int set_pages_array_wt(struct page **pages, int addrinarray);</div><div class='ctx'> int set_pages_array_wb(struct page **pages, int addrinarray);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -104,4 +109,75 @@ static inline int rodata_test(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef ARCH_HAS_NOCACHE_UACCESS</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arch_memcpy_to_pmem - copy data to persistent memory</div><div class='add'>+ * @dst: destination buffer for the copy</div><div class='add'>+ * @src: source buffer for the copy</div><div class='add'>+ * @n: length of the copy in bytes</div><div class='add'>+ *</div><div class='add'>+ * Copy data to persistent memory media via non-temporal stores so that</div><div class='add'>+ * a subsequent arch_wmb_pmem() can flush cpu and memory controller</div><div class='add'>+ * write buffers to guarantee durability.</div><div class='add'>+ */</div><div class='add'>+static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,</div><div class='add'>+		size_t n)</div><div class='add'>+{</div><div class='add'>+	int unwritten;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We are copying between two kernel buffers, if</div><div class='add'>+	 * __copy_from_user_inatomic_nocache() returns an error (page</div><div class='add'>+	 * fault) we would have already reported a general protection fault</div><div class='add'>+	 * before the WARN+BUG.</div><div class='add'>+	 */</div><div class='add'>+	unwritten = __copy_from_user_inatomic_nocache((void __force *) dst,</div><div class='add'>+			(void __user *) src, n);</div><div class='add'>+	if (WARN(unwritten, "%s: fault copying %p &lt;- %p unwritten: %d\n",</div><div class='add'>+				__func__, dst, src, unwritten))</div><div class='add'>+		BUG();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arch_wmb_pmem - synchronize writes to persistent memory</div><div class='add'>+ *</div><div class='add'>+ * After a series of arch_memcpy_to_pmem() operations this drains data</div><div class='add'>+ * from cpu write buffers and any platform (memory controller) buffers</div><div class='add'>+ * to ensure that written data is durable on persistent memory media.</div><div class='add'>+ */</div><div class='add'>+static inline void arch_wmb_pmem(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * wmb() to 'sfence' all previous writes such that they are</div><div class='add'>+	 * architecturally visible to 'pcommit'.  Note, that we've</div><div class='add'>+	 * already arranged for pmem writes to avoid the cache via</div><div class='add'>+	 * arch_memcpy_to_pmem().</div><div class='add'>+	 */</div><div class='add'>+	wmb();</div><div class='add'>+	pcommit_sfence();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool __arch_has_wmb_pmem(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	/*</div><div class='add'>+	 * We require that wmb() be an 'sfence', that is only guaranteed on</div><div class='add'>+	 * 64-bit builds</div><div class='add'>+	 */</div><div class='add'>+	return static_cpu_has(X86_FEATURE_PCOMMIT);</div><div class='add'>+#else</div><div class='add'>+	return false;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+#else /* ARCH_HAS_NOCACHE_UACCESS i.e. ARCH=um */</div><div class='add'>+extern void arch_memcpy_to_pmem(void __pmem *dst, const void *src, size_t n);</div><div class='add'>+extern void arch_wmb_pmem(void);</div><div class='add'>+</div><div class='add'>+static inline bool __arch_has_wmb_pmem(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_CACHEFLUSH_H */</div><div class='head'>diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h<br/>index 99c105d78b7e..ad19841eddfe 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/cmpxchg.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/cmpxchg.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -4,8 +4,6 @@</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt; /* Provides LOCK_PREFIX */</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_CMPXCHG 1</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Non-existant functions to indicate usage errors at link time</div><div class='ctx'>  * (or compile-time if the compiler implements __compiletime_error().</div><div class='head'>diff --git a/arch/x86/include/asm/crypto/glue_helper.h b/arch/x86/include/asm/crypto/glue_helper.h<br/>index 1eef55596e82..03bb1065c335 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/crypto/glue_helper.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/crypto/glue_helper.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/crypto/glue_helper.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/crypto/glue_helper.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='ctx'> </div><div class='ctx'> typedef void (*common_glue_func_t)(void *ctx, u8 *dst, const u8 *src);</div><div class='head'>diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h<br/>index 808dae63eeea..1f5b7287d1ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -127,50 +127,14 @@ static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)</div><div class='ctx'> </div><div class='ctx'> #define dma_alloc_coherent(d,s,h,f)	dma_alloc_attrs(d,s,h,f,NULL)</div><div class='ctx'> </div><div class='del'>-static inline void *</div><div class='add'>+void *</div><div class='ctx'> dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,</div><div class='del'>-		gfp_t gfp, struct dma_attrs *attrs)</div><div class='del'>-{</div><div class='del'>-	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='del'>-	void *memory;</div><div class='del'>-</div><div class='del'>-	gfp &amp;= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);</div><div class='del'>-</div><div class='del'>-	if (dma_alloc_from_coherent(dev, size, dma_handle, &amp;memory))</div><div class='del'>-		return memory;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		dev = &amp;x86_dma_fallback_dev;</div><div class='del'>-</div><div class='del'>-	if (!is_device_dma_capable(dev))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (!ops-&gt;alloc)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	memory = ops-&gt;alloc(dev, size, dma_handle,</div><div class='del'>-			    dma_alloc_coherent_gfp_flags(dev, gfp), attrs);</div><div class='del'>-	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);</div><div class='del'>-</div><div class='del'>-	return memory;</div><div class='del'>-}</div><div class='add'>+		gfp_t gfp, struct dma_attrs *attrs);</div><div class='ctx'> </div><div class='ctx'> #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)</div><div class='ctx'> </div><div class='del'>-static inline void dma_free_attrs(struct device *dev, size_t size,</div><div class='del'>-				  void *vaddr, dma_addr_t bus,</div><div class='del'>-				  struct dma_attrs *attrs)</div><div class='del'>-{</div><div class='del'>-	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='del'>-</div><div class='del'>-	WARN_ON(irqs_disabled());       /* for portability */</div><div class='del'>-</div><div class='del'>-	if (dma_release_from_coherent(dev, get_order(size), vaddr))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	debug_dma_free_coherent(dev, size, vaddr, bus);</div><div class='del'>-	if (ops-&gt;free)</div><div class='del'>-		ops-&gt;free(dev, size, vaddr, bus, attrs);</div><div class='del'>-}</div><div class='add'>+void dma_free_attrs(struct device *dev, size_t size,</div><div class='add'>+		    void *vaddr, dma_addr_t bus,</div><div class='add'>+		    struct dma_attrs *attrs);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/dwarf2.h b/arch/x86/include/asm/dwarf2.h<br/>deleted file mode 100644<br/>index de1cdaf4d743..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/dwarf2.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/dwarf2.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,170 +0,0 @@</div><div class='del'>-#ifndef _ASM_X86_DWARF2_H</div><div class='del'>-#define _ASM_X86_DWARF2_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#warning "asm/dwarf2.h should be only included in pure assembly files"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Macros for dwarf2 CFI unwind table entries.</div><div class='del'>- * See "as.info" for details on these pseudo ops. Unfortunately</div><div class='del'>- * they are only supported in very new binutils, so define them</div><div class='del'>- * away for older version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AS_CFI</div><div class='del'>-</div><div class='del'>-#define CFI_STARTPROC		.cfi_startproc</div><div class='del'>-#define CFI_ENDPROC		.cfi_endproc</div><div class='del'>-#define CFI_DEF_CFA		.cfi_def_cfa</div><div class='del'>-#define CFI_DEF_CFA_REGISTER	.cfi_def_cfa_register</div><div class='del'>-#define CFI_DEF_CFA_OFFSET	.cfi_def_cfa_offset</div><div class='del'>-#define CFI_ADJUST_CFA_OFFSET	.cfi_adjust_cfa_offset</div><div class='del'>-#define CFI_OFFSET		.cfi_offset</div><div class='del'>-#define CFI_REL_OFFSET		.cfi_rel_offset</div><div class='del'>-#define CFI_REGISTER		.cfi_register</div><div class='del'>-#define CFI_RESTORE		.cfi_restore</div><div class='del'>-#define CFI_REMEMBER_STATE	.cfi_remember_state</div><div class='del'>-#define CFI_RESTORE_STATE	.cfi_restore_state</div><div class='del'>-#define CFI_UNDEFINED		.cfi_undefined</div><div class='del'>-#define CFI_ESCAPE		.cfi_escape</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AS_CFI_SIGNAL_FRAME</div><div class='del'>-#define CFI_SIGNAL_FRAME	.cfi_signal_frame</div><div class='del'>-#else</div><div class='del'>-#define CFI_SIGNAL_FRAME</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_AS_CFI_SECTIONS) &amp;&amp; defined(__ASSEMBLY__)</div><div class='del'>-	/*</div><div class='del'>-	 * Emit CFI data in .debug_frame sections, not .eh_frame sections.</div><div class='del'>-	 * The latter we currently just discard since we don't do DWARF</div><div class='del'>-	 * unwinding at runtime.  So only the offline DWARF information is</div><div class='del'>-	 * useful to anyone.  Note we should not use this directive if this</div><div class='del'>-	 * file is used in the vDSO assembly, or if vmlinux.lds.S gets</div><div class='del'>-	 * changed so it doesn't discard .eh_frame.</div><div class='del'>-	 */</div><div class='del'>-	.cfi_sections .debug_frame</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Due to the structure of pre-exisiting code, don't use assembler line</div><div class='del'>- * comment character # to ignore the arguments. Instead, use a dummy macro.</div><div class='del'>- */</div><div class='del'>-.macro cfi_ignore a=0, b=0, c=0, d=0</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#define CFI_STARTPROC		cfi_ignore</div><div class='del'>-#define CFI_ENDPROC		cfi_ignore</div><div class='del'>-#define CFI_DEF_CFA		cfi_ignore</div><div class='del'>-#define CFI_DEF_CFA_REGISTER	cfi_ignore</div><div class='del'>-#define CFI_DEF_CFA_OFFSET	cfi_ignore</div><div class='del'>-#define CFI_ADJUST_CFA_OFFSET	cfi_ignore</div><div class='del'>-#define CFI_OFFSET		cfi_ignore</div><div class='del'>-#define CFI_REL_OFFSET		cfi_ignore</div><div class='del'>-#define CFI_REGISTER		cfi_ignore</div><div class='del'>-#define CFI_RESTORE		cfi_ignore</div><div class='del'>-#define CFI_REMEMBER_STATE	cfi_ignore</div><div class='del'>-#define CFI_RESTORE_STATE	cfi_ignore</div><div class='del'>-#define CFI_UNDEFINED		cfi_ignore</div><div class='del'>-#define CFI_ESCAPE		cfi_ignore</div><div class='del'>-#define CFI_SIGNAL_FRAME	cfi_ignore</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * An attempt to make CFI annotations more or less</div><div class='del'>- * correct and shorter. It is implied that you know</div><div class='del'>- * what you're doing if you use them.</div><div class='del'>- */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-	.macro pushq_cfi reg</div><div class='del'>-	pushq \reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 8</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro pushq_cfi_reg reg</div><div class='del'>-	pushq %\reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 8</div><div class='del'>-	CFI_REL_OFFSET \reg, 0</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popq_cfi reg</div><div class='del'>-	popq \reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popq_cfi_reg reg</div><div class='del'>-	popq %\reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-	CFI_RESTORE \reg</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro pushfq_cfi</div><div class='del'>-	pushfq</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 8</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popfq_cfi</div><div class='del'>-	popfq</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro movq_cfi reg offset=0</div><div class='del'>-	movq %\reg, \offset(%rsp)</div><div class='del'>-	CFI_REL_OFFSET \reg, \offset</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro movq_cfi_restore offset reg</div><div class='del'>-	movq \offset(%rsp), %\reg</div><div class='del'>-	CFI_RESTORE \reg</div><div class='del'>-	.endm</div><div class='del'>-#else /*!CONFIG_X86_64*/</div><div class='del'>-	.macro pushl_cfi reg</div><div class='del'>-	pushl \reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 4</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro pushl_cfi_reg reg</div><div class='del'>-	pushl %\reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 4</div><div class='del'>-	CFI_REL_OFFSET \reg, 0</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popl_cfi reg</div><div class='del'>-	popl \reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -4</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popl_cfi_reg reg</div><div class='del'>-	popl %\reg</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -4</div><div class='del'>-	CFI_RESTORE \reg</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro pushfl_cfi</div><div class='del'>-	pushfl</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 4</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro popfl_cfi</div><div class='del'>-	popfl</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -4</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro movl_cfi reg offset=0</div><div class='del'>-	movl %\reg, \offset(%esp)</div><div class='del'>-	CFI_REL_OFFSET \reg, \offset</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro movl_cfi_restore offset reg</div><div class='del'>-	movl \offset(%esp), %\reg</div><div class='del'>-	CFI_RESTORE \reg</div><div class='del'>-	.endm</div><div class='del'>-#endif /*!CONFIG_X86_64*/</div><div class='del'>-#endif /*__ASSEMBLY__*/</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_DWARF2_H */</div><div class='head'>diff --git a/arch/x86/include/asm/edac.h b/arch/x86/include/asm/edac.h<br/>index e9b57ecc70c5..cf8fdf83b231 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/edac.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/edac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/edac.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/edac.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> /* ECC atomic, DMA, SMP and interrupt safe scrub function */</div><div class='ctx'> </div><div class='del'>-static inline void atomic_scrub(void *va, u32 size)</div><div class='add'>+static inline void edac_atomic_scrub(void *va, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i, *virt_addr = va;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h<br/>index 3738b138b843..155162ea0e00 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/efi.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/efi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/efi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/efi.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #ifndef _ASM_X86_EFI_H</div><div class='ctx'> #define _ASM_X86_EFI_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h<br/>index dc5fa661465f..df002992d8fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/entry_arch.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/entry_arch.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/entry_arch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/entry_arch.h</a></div><div class='hunk'>@@ -23,6 +23,8 @@ BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)</div><div class='ctx'> #ifdef CONFIG_HAVE_KVM</div><div class='ctx'> BUILD_INTERRUPT3(kvm_posted_intr_ipi, POSTED_INTR_VECTOR,</div><div class='ctx'> 		 smp_kvm_posted_intr_ipi)</div><div class='add'>+BUILD_INTERRUPT3(kvm_posted_intr_wakeup_ipi, POSTED_INTR_WAKEUP_VECTOR,</div><div class='add'>+		 smp_kvm_posted_intr_wakeup_ipi)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -50,4 +52,7 @@ BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)</div><div class='ctx'> BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_MCE_AMD</div><div class='add'>+BUILD_INTERRUPT(deferred_error_interrupt, DEFERRED_ERROR_VECTOR)</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/espfix.h b/arch/x86/include/asm/espfix.h<br/>index 99efebb2f69d..ca3ce9ab9385 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/espfix.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/espfix.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/espfix.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/espfix.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@ DECLARE_PER_CPU_READ_MOSTLY(unsigned long, espfix_stack);</div><div class='ctx'> DECLARE_PER_CPU_READ_MOSTLY(unsigned long, espfix_waddr);</div><div class='ctx'> </div><div class='ctx'> extern void init_espfix_bsp(void);</div><div class='del'>-extern void init_espfix_ap(void);</div><div class='add'>+extern void init_espfix_ap(int cpu);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h<br/>deleted file mode 100644<br/>index da5e96756570..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/fpu-internal.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/fpu-internal.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,626 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 1994 Linus Torvalds</div><div class='del'>- *</div><div class='del'>- * Pentium III FXSR, SSE support</div><div class='del'>- * General FPU state handling cleanups</div><div class='del'>- *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='del'>- * x86-64 work by Andi Kleen 2002</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _FPU_INTERNAL_H</div><div class='del'>-#define _FPU_INTERNAL_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel_stat.h&gt;</div><div class='del'>-#include &lt;linux/regset.h&gt;</div><div class='del'>-#include &lt;linux/compat.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/sigcontext.h&gt;</div><div class='del'>-#include &lt;asm/user.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='del'>-#include &lt;asm/smap.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-# include &lt;asm/sigcontext32.h&gt;</div><div class='del'>-# include &lt;asm/user32.h&gt;</div><div class='del'>-struct ksignal;</div><div class='del'>-int ia32_setup_rt_frame(int sig, struct ksignal *ksig,</div><div class='del'>-			compat_sigset_t *set, struct pt_regs *regs);</div><div class='del'>-int ia32_setup_frame(int sig, struct ksignal *ksig,</div><div class='del'>-		     compat_sigset_t *set, struct pt_regs *regs);</div><div class='del'>-#else</div><div class='del'>-# define user_i387_ia32_struct	user_i387_struct</div><div class='del'>-# define user32_fxsr_struct	user_fxsr_struct</div><div class='del'>-# define ia32_setup_frame	__setup_frame</div><div class='del'>-# define ia32_setup_rt_frame	__setup_rt_frame</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-extern unsigned int mxcsr_feature_mask;</div><div class='del'>-extern void fpu_init(void);</div><div class='del'>-extern void eager_fpu_init(void);</div><div class='del'>-</div><div class='del'>-DECLARE_PER_CPU(struct task_struct *, fpu_owner_task);</div><div class='del'>-</div><div class='del'>-extern void convert_from_fxsr(struct user_i387_ia32_struct *env,</div><div class='del'>-			      struct task_struct *tsk);</div><div class='del'>-extern void convert_to_fxsr(struct task_struct *tsk,</div><div class='del'>-			    const struct user_i387_ia32_struct *env);</div><div class='del'>-</div><div class='del'>-extern user_regset_active_fn fpregs_active, xfpregs_active;</div><div class='del'>-extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,</div><div class='del'>-				xstateregs_get;</div><div class='del'>-extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,</div><div class='del'>-				 xstateregs_set;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * xstateregs_active == fpregs_active. Please refer to the comment</div><div class='del'>- * at the definition of fpregs_active.</div><div class='del'>- */</div><div class='del'>-#define xstateregs_active	fpregs_active</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MATH_EMULATION</div><div class='del'>-extern void finit_soft_fpu(struct i387_soft_struct *soft);</div><div class='del'>-#else</div><div class='del'>-static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Must be run with preemption disabled: this clears the fpu_owner_task,</div><div class='del'>- * on this CPU.</div><div class='del'>- *</div><div class='del'>- * This will disable any lazy FPU state restore of the current FPU state,</div><div class='del'>- * but if the current thread owns the FPU, it will still be saved by.</div><div class='del'>- */</div><div class='del'>-static inline void __cpu_disable_lazy_restore(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	per_cpu(fpu_owner_task, cpu) = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Used to indicate that the FPU state in memory is newer than the FPU</div><div class='del'>- * state in registers, and the FPU state should be reloaded next time the</div><div class='del'>- * task is run. Only safe on the current task, or non-running tasks.</div><div class='del'>- */</div><div class='del'>-static inline void task_disable_lazy_fpu_restore(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	tsk-&gt;thread.fpu.last_cpu = ~0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	return new == this_cpu_read_stable(fpu_owner_task) &amp;&amp;</div><div class='del'>-		cpu == new-&gt;thread.fpu.last_cpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int is_ia32_compat_frame(void)</div><div class='del'>-{</div><div class='del'>-	return config_enabled(CONFIG_IA32_EMULATION) &amp;&amp;</div><div class='del'>-	       test_thread_flag(TIF_IA32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int is_ia32_frame(void)</div><div class='del'>-{</div><div class='del'>-	return config_enabled(CONFIG_X86_32) || is_ia32_compat_frame();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int is_x32_frame(void)</div><div class='del'>-{</div><div class='del'>-	return config_enabled(CONFIG_X86_X32_ABI) &amp;&amp; test_thread_flag(TIF_X32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define X87_FSW_ES (1 &lt;&lt; 7)	/* Exception Summary */</div><div class='del'>-</div><div class='del'>-static __always_inline __pure bool use_eager_fpu(void)</div><div class='del'>-{</div><div class='del'>-	return static_cpu_has_safe(X86_FEATURE_EAGER_FPU);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline __pure bool use_xsaveopt(void)</div><div class='del'>-{</div><div class='del'>-	return static_cpu_has_safe(X86_FEATURE_XSAVEOPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline __pure bool use_xsave(void)</div><div class='del'>-{</div><div class='del'>-	return static_cpu_has_safe(X86_FEATURE_XSAVE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline __pure bool use_fxsr(void)</div><div class='del'>-{</div><div class='del'>-	return static_cpu_has_safe(X86_FEATURE_FXSR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fx_finit(struct i387_fxsave_struct *fx)</div><div class='del'>-{</div><div class='del'>-	fx-&gt;cwd = 0x37f;</div><div class='del'>-	fx-&gt;mxcsr = MXCSR_DEFAULT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern void __sanitize_i387_state(struct task_struct *);</div><div class='del'>-</div><div class='del'>-static inline void sanitize_i387_state(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (!use_xsaveopt())</div><div class='del'>-		return;</div><div class='del'>-	__sanitize_i387_state(tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define user_insn(insn, output, input...)				\</div><div class='del'>-({									\</div><div class='del'>-	int err;							\</div><div class='del'>-	asm volatile(ASM_STAC "\n"					\</div><div class='del'>-		     "1:" #insn "\n\t"					\</div><div class='del'>-		     "2: " ASM_CLAC "\n"				\</div><div class='del'>-		     ".section .fixup,\"ax\"\n"				\</div><div class='del'>-		     "3:  movl $-1,%[err]\n"				\</div><div class='del'>-		     "    jmp  2b\n"					\</div><div class='del'>-		     ".previous\n"					\</div><div class='del'>-		     _ASM_EXTABLE(1b, 3b)				\</div><div class='del'>-		     : [err] "=r" (err), output				\</div><div class='del'>-		     : "0"(0), input);					\</div><div class='del'>-	err;								\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define check_insn(insn, output, input...)				\</div><div class='del'>-({									\</div><div class='del'>-	int err;							\</div><div class='del'>-	asm volatile("1:" #insn "\n\t"					\</div><div class='del'>-		     "2:\n"						\</div><div class='del'>-		     ".section .fixup,\"ax\"\n"				\</div><div class='del'>-		     "3:  movl $-1,%[err]\n"				\</div><div class='del'>-		     "    jmp  2b\n"					\</div><div class='del'>-		     ".previous\n"					\</div><div class='del'>-		     _ASM_EXTABLE(1b, 3b)				\</div><div class='del'>-		     : [err] "=r" (err), output				\</div><div class='del'>-		     : "0"(0), input);					\</div><div class='del'>-	err;								\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-static inline int fsave_user(struct i387_fsave_struct __user *fx)</div><div class='del'>-{</div><div class='del'>-	return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fxsave_user(struct i387_fxsave_struct __user *fx)</div><div class='del'>-{</div><div class='del'>-	if (config_enabled(CONFIG_X86_32))</div><div class='del'>-		return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));</div><div class='del'>-	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='del'>-		return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));</div><div class='del'>-</div><div class='del'>-	/* See comment in fpu_fxsave() below. */</div><div class='del'>-	return user_insn(rex64/fxsave (%[fx]), "=m" (*fx), [fx] "R" (fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fxrstor_checking(struct i387_fxsave_struct *fx)</div><div class='del'>-{</div><div class='del'>-	if (config_enabled(CONFIG_X86_32))</div><div class='del'>-		return check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='del'>-		return check_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-</div><div class='del'>-	/* See comment in fpu_fxsave() below. */</div><div class='del'>-	return check_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),</div><div class='del'>-			  "m" (*fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fxrstor_user(struct i387_fxsave_struct __user *fx)</div><div class='del'>-{</div><div class='del'>-	if (config_enabled(CONFIG_X86_32))</div><div class='del'>-		return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='del'>-		return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-</div><div class='del'>-	/* See comment in fpu_fxsave() below. */</div><div class='del'>-	return user_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),</div><div class='del'>-			  "m" (*fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int frstor_checking(struct i387_fsave_struct *fx)</div><div class='del'>-{</div><div class='del'>-	return check_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int frstor_user(struct i387_fsave_struct __user *fx)</div><div class='del'>-{</div><div class='del'>-	return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fpu_fxsave(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (config_enabled(CONFIG_X86_32))</div><div class='del'>-		asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu-&gt;state-&gt;fxsave));</div><div class='del'>-	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='del'>-		asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu-&gt;state-&gt;fxsave));</div><div class='del'>-	else {</div><div class='del'>-		/* Using "rex64; fxsave %0" is broken because, if the memory</div><div class='del'>-		 * operand uses any extended registers for addressing, a second</div><div class='del'>-		 * REX prefix will be generated (to the assembler, rex64</div><div class='del'>-		 * followed by semicolon is a separate instruction), and hence</div><div class='del'>-		 * the 64-bitness is lost.</div><div class='del'>-		 *</div><div class='del'>-		 * Using "fxsaveq %0" would be the ideal choice, but is only</div><div class='del'>-		 * supported starting with gas 2.16.</div><div class='del'>-		 *</div><div class='del'>-		 * Using, as a workaround, the properly prefixed form below</div><div class='del'>-		 * isn't accepted by any binutils version so far released,</div><div class='del'>-		 * complaining that the same type of prefix is used twice if</div><div class='del'>-		 * an extended register is needed for addressing (fix submitted</div><div class='del'>-		 * to mainline 2005-11-21).</div><div class='del'>-		 *</div><div class='del'>-		 *  asm volatile("rex64/fxsave %0" : "=m" (fpu-&gt;state-&gt;fxsave));</div><div class='del'>-		 *</div><div class='del'>-		 * This, however, we can work around by forcing the compiler to</div><div class='del'>-		 * select an addressing mode that doesn't require extended</div><div class='del'>-		 * registers.</div><div class='del'>-		 */</div><div class='del'>-		asm volatile( "rex64/fxsave (%[fx])"</div><div class='del'>-			     : "=m" (fpu-&gt;state-&gt;fxsave)</div><div class='del'>-			     : [fx] "R" (&amp;fpu-&gt;state-&gt;fxsave));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * These must be called with preempt disabled. Returns</div><div class='del'>- * 'true' if the FPU state is still intact.</div><div class='del'>- */</div><div class='del'>-static inline int fpu_save_init(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (use_xsave()) {</div><div class='del'>-		fpu_xsave(fpu);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * xsave header may indicate the init state of the FP.</div><div class='del'>-		 */</div><div class='del'>-		if (!(fpu-&gt;state-&gt;xsave.xsave_hdr.xstate_bv &amp; XSTATE_FP))</div><div class='del'>-			return 1;</div><div class='del'>-	} else if (use_fxsr()) {</div><div class='del'>-		fpu_fxsave(fpu);</div><div class='del'>-	} else {</div><div class='del'>-		asm volatile("fnsave %[fx]; fwait"</div><div class='del'>-			     : [fx] "=m" (fpu-&gt;state-&gt;fsave));</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If exceptions are pending, we need to clear them so</div><div class='del'>-	 * that we don't randomly get exceptions later.</div><div class='del'>-	 *</div><div class='del'>-	 * FIXME! Is this perhaps only true for the old-style</div><div class='del'>-	 * irq13 case? Maybe we could leave the x87 state</div><div class='del'>-	 * intact otherwise?</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(fpu-&gt;state-&gt;fxsave.swd &amp; X87_FSW_ES)) {</div><div class='del'>-		asm volatile("fnclex");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int __save_init_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	return fpu_save_init(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fpu_restore_checking(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (use_xsave())</div><div class='del'>-		return fpu_xrstor_checking(&amp;fpu-&gt;state-&gt;xsave);</div><div class='del'>-	else if (use_fxsr())</div><div class='del'>-		return fxrstor_checking(&amp;fpu-&gt;state-&gt;fxsave);</div><div class='del'>-	else</div><div class='del'>-		return frstor_checking(&amp;fpu-&gt;state-&gt;fsave);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int restore_fpu_checking(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is</div><div class='del'>-	 * pending. Clear the x87 state here by setting it to fixed values.</div><div class='del'>-	 * "m" is a random variable that should be in L1.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(static_cpu_has_bug_safe(X86_BUG_FXSAVE_LEAK))) {</div><div class='del'>-		asm volatile(</div><div class='del'>-			"fnclex\n\t"</div><div class='del'>-			"emms\n\t"</div><div class='del'>-			"fildl %P[addr]"	/* set F?P to defined value */</div><div class='del'>-			: : [addr] "m" (tsk-&gt;thread.fpu.has_fpu));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return fpu_restore_checking(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Software FPU state helpers. Careful: these need to</div><div class='del'>- * be preemption protection *and* they need to be</div><div class='del'>- * properly paired with the CR0.TS changes!</div><div class='del'>- */</div><div class='del'>-static inline int __thread_has_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	return tsk-&gt;thread.fpu.has_fpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be paired with an 'stts' after! */</div><div class='del'>-static inline void __thread_clear_has_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	tsk-&gt;thread.fpu.has_fpu = 0;</div><div class='del'>-	this_cpu_write(fpu_owner_task, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be paired with a 'clts' before! */</div><div class='del'>-static inline void __thread_set_has_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	tsk-&gt;thread.fpu.has_fpu = 1;</div><div class='del'>-	this_cpu_write(fpu_owner_task, tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Encapsulate the CR0.TS handling together with the</div><div class='del'>- * software flag.</div><div class='del'>- *</div><div class='del'>- * These generally need preemption protection to work,</div><div class='del'>- * do try to avoid using these on their own.</div><div class='del'>- */</div><div class='del'>-static inline void __thread_fpu_end(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	__thread_clear_has_fpu(tsk);</div><div class='del'>-	if (!use_eager_fpu())</div><div class='del'>-		stts();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __thread_fpu_begin(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (!use_eager_fpu())</div><div class='del'>-		clts();</div><div class='del'>-	__thread_set_has_fpu(tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void drop_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Forget coprocessor state..</div><div class='del'>-	 */</div><div class='del'>-	preempt_disable();</div><div class='del'>-	tsk-&gt;thread.fpu_counter = 0;</div><div class='del'>-</div><div class='del'>-	if (__thread_has_fpu(tsk)) {</div><div class='del'>-		/* Ignore delayed exceptions from user space */</div><div class='del'>-		asm volatile("1: fwait\n"</div><div class='del'>-			     "2:\n"</div><div class='del'>-			     _ASM_EXTABLE(1b, 2b));</div><div class='del'>-		__thread_fpu_end(tsk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clear_stopped_child_used_math(tsk);</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void restore_init_xstate(void)</div><div class='del'>-{</div><div class='del'>-	if (use_xsave())</div><div class='del'>-		xrstor_state(init_xstate_buf, -1);</div><div class='del'>-	else</div><div class='del'>-		fxrstor_checking(&amp;init_xstate_buf-&gt;i387);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reset the FPU state in the eager case and drop it in the lazy case (later use</div><div class='del'>- * will reinit it).</div><div class='del'>- */</div><div class='del'>-static inline void fpu_reset_state(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (!use_eager_fpu())</div><div class='del'>-		drop_fpu(tsk);</div><div class='del'>-	else</div><div class='del'>-		restore_init_xstate();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FPU state switching for scheduling.</div><div class='del'>- *</div><div class='del'>- * This is a two-stage process:</div><div class='del'>- *</div><div class='del'>- *  - switch_fpu_prepare() saves the old state and</div><div class='del'>- *    sets the new state of the CR0.TS bit. This is</div><div class='del'>- *    done within the context of the old process.</div><div class='del'>- *</div><div class='del'>- *  - switch_fpu_finish() restores the new state as</div><div class='del'>- *    necessary.</div><div class='del'>- */</div><div class='del'>-typedef struct { int preload; } fpu_switch_t;</div><div class='del'>-</div><div class='del'>-static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct task_struct *new, int cpu)</div><div class='del'>-{</div><div class='del'>-	fpu_switch_t fpu;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the task has used the math, pre-load the FPU on xsave processors</div><div class='del'>-	 * or if the past 5 consecutive context-switches used math.</div><div class='del'>-	 */</div><div class='del'>-	fpu.preload = tsk_used_math(new) &amp;&amp;</div><div class='del'>-		      (use_eager_fpu() || new-&gt;thread.fpu_counter &gt; 5);</div><div class='del'>-</div><div class='del'>-	if (__thread_has_fpu(old)) {</div><div class='del'>-		if (!__save_init_fpu(old))</div><div class='del'>-			task_disable_lazy_fpu_restore(old);</div><div class='del'>-		else</div><div class='del'>-			old-&gt;thread.fpu.last_cpu = cpu;</div><div class='del'>-</div><div class='del'>-		/* But leave fpu_owner_task! */</div><div class='del'>-		old-&gt;thread.fpu.has_fpu = 0;</div><div class='del'>-</div><div class='del'>-		/* Don't change CR0.TS if we just switch! */</div><div class='del'>-		if (fpu.preload) {</div><div class='del'>-			new-&gt;thread.fpu_counter++;</div><div class='del'>-			__thread_set_has_fpu(new);</div><div class='del'>-			prefetch(new-&gt;thread.fpu.state);</div><div class='del'>-		} else if (!use_eager_fpu())</div><div class='del'>-			stts();</div><div class='del'>-	} else {</div><div class='del'>-		old-&gt;thread.fpu_counter = 0;</div><div class='del'>-		task_disable_lazy_fpu_restore(old);</div><div class='del'>-		if (fpu.preload) {</div><div class='del'>-			new-&gt;thread.fpu_counter++;</div><div class='del'>-			if (fpu_lazy_restore(new, cpu))</div><div class='del'>-				fpu.preload = 0;</div><div class='del'>-			else</div><div class='del'>-				prefetch(new-&gt;thread.fpu.state);</div><div class='del'>-			__thread_fpu_begin(new);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return fpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * By the time this gets called, we've already cleared CR0.TS and</div><div class='del'>- * given the process the FPU if we are going to preload the FPU</div><div class='del'>- * state - all we need to do is to conditionally restore the register</div><div class='del'>- * state itself.</div><div class='del'>- */</div><div class='del'>-static inline void switch_fpu_finish(struct task_struct *new, fpu_switch_t fpu)</div><div class='del'>-{</div><div class='del'>-	if (fpu.preload) {</div><div class='del'>-		if (unlikely(restore_fpu_checking(new)))</div><div class='del'>-			fpu_reset_state(new);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Signal frame handlers...</div><div class='del'>- */</div><div class='del'>-extern int save_xstate_sig(void __user *buf, void __user *fx, int size);</div><div class='del'>-extern int __restore_xstate_sig(void __user *buf, void __user *fx, int size);</div><div class='del'>-</div><div class='del'>-static inline int xstate_sigframe_size(void)</div><div class='del'>-{</div><div class='del'>-	return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int restore_xstate_sig(void __user *buf, int ia32_frame)</div><div class='del'>-{</div><div class='del'>-	void __user *buf_fx = buf;</div><div class='del'>-	int size = xstate_sigframe_size();</div><div class='del'>-</div><div class='del'>-	if (ia32_frame &amp;&amp; use_fxsr()) {</div><div class='del'>-		buf_fx = buf + sizeof(struct i387_fsave_struct);</div><div class='del'>-		size += sizeof(struct i387_fsave_struct);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return __restore_xstate_sig(buf, buf_fx, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Needs to be preemption-safe.</div><div class='del'>- *</div><div class='del'>- * NOTE! user_fpu_begin() must be used only immediately before restoring</div><div class='del'>- * the save state. It does not do any saving/restoring on its own. In</div><div class='del'>- * lazy FPU mode, it is just an optimization to avoid a #NM exception,</div><div class='del'>- * the task can lose the FPU right after preempt_enable().</div><div class='del'>- */</div><div class='del'>-static inline void user_fpu_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	if (!user_has_fpu())</div><div class='del'>-		__thread_fpu_begin(current);</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __save_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (use_xsave()) {</div><div class='del'>-		if (unlikely(system_state == SYSTEM_BOOTING))</div><div class='del'>-			xsave_state_booting(&amp;tsk-&gt;thread.fpu.state-&gt;xsave, -1);</div><div class='del'>-		else</div><div class='del'>-			xsave_state(&amp;tsk-&gt;thread.fpu.state-&gt;xsave, -1);</div><div class='del'>-	} else</div><div class='del'>-		fpu_fxsave(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * i387 state interaction</div><div class='del'>- */</div><div class='del'>-static inline unsigned short get_fpu_cwd(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (cpu_has_fxsr) {</div><div class='del'>-		return tsk-&gt;thread.fpu.state-&gt;fxsave.cwd;</div><div class='del'>-	} else {</div><div class='del'>-		return (unsigned short)tsk-&gt;thread.fpu.state-&gt;fsave.cwd;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned short get_fpu_swd(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (cpu_has_fxsr) {</div><div class='del'>-		return tsk-&gt;thread.fpu.state-&gt;fxsave.swd;</div><div class='del'>-	} else {</div><div class='del'>-		return (unsigned short)tsk-&gt;thread.fpu.state-&gt;fsave.swd;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	if (cpu_has_xmm) {</div><div class='del'>-		return tsk-&gt;thread.fpu.state-&gt;fxsave.mxcsr;</div><div class='del'>-	} else {</div><div class='del'>-		return MXCSR_DEFAULT;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool fpu_allocated(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	return fpu-&gt;state != NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fpu_alloc(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (fpu_allocated(fpu))</div><div class='del'>-		return 0;</div><div class='del'>-	fpu-&gt;state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);</div><div class='del'>-	if (!fpu-&gt;state)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	WARN_ON((unsigned long)fpu-&gt;state &amp; 15);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fpu_free(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (fpu-&gt;state) {</div><div class='del'>-		kmem_cache_free(task_xstate_cachep, fpu-&gt;state);</div><div class='del'>-		fpu-&gt;state = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fpu_copy(struct task_struct *dst, struct task_struct *src)</div><div class='del'>-{</div><div class='del'>-	if (use_eager_fpu()) {</div><div class='del'>-		memset(&amp;dst-&gt;thread.fpu.state-&gt;xsave, 0, xstate_size);</div><div class='del'>-		__save_fpu(dst);</div><div class='del'>-	} else {</div><div class='del'>-		struct fpu *dfpu = &amp;dst-&gt;thread.fpu;</div><div class='del'>-		struct fpu *sfpu = &amp;src-&gt;thread.fpu;</div><div class='del'>-</div><div class='del'>-		unlazy_fpu(src);</div><div class='del'>-		memcpy(dfpu-&gt;state, sfpu-&gt;state, xstate_size);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long</div><div class='del'>-alloc_mathframe(unsigned long sp, int ia32_frame, unsigned long *buf_fx,</div><div class='del'>-		unsigned long *size)</div><div class='del'>-{</div><div class='del'>-	unsigned long frame_size = xstate_sigframe_size();</div><div class='del'>-</div><div class='del'>-	*buf_fx = sp = round_down(sp - frame_size, 64);</div><div class='del'>-	if (ia32_frame &amp;&amp; use_fxsr()) {</div><div class='del'>-		frame_size += sizeof(struct i387_fsave_struct);</div><div class='del'>-		sp -= sizeof(struct i387_fsave_struct);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*size = frame_size;</div><div class='del'>-	return sp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h<br/>new file mode 100644<br/>index 000000000000..1429a7c736db<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/api.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/api.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 1994 Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * Pentium III FXSR, SSE support</div><div class='add'>+ * General FPU state handling cleanups</div><div class='add'>+ *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='add'>+ * x86-64 work by Andi Kleen 2002</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_X86_FPU_API_H</div><div class='add'>+#define _ASM_X86_FPU_API_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Careful: __kernel_fpu_begin/end() must be called with preempt disabled</div><div class='add'>+ * and they don't touch the preempt state on their own.</div><div class='add'>+ * If you enable preemption after __kernel_fpu_begin(), preempt notifier</div><div class='add'>+ * should call the __kernel_fpu_end() to prevent the kernel/user FPU</div><div class='add'>+ * state from getting corrupted. KVM for example uses this model.</div><div class='add'>+ *</div><div class='add'>+ * All other cases use kernel_fpu_begin/end() which disable preemption</div><div class='add'>+ * during kernel FPU usage.</div><div class='add'>+ */</div><div class='add'>+extern void __kernel_fpu_begin(void);</div><div class='add'>+extern void __kernel_fpu_end(void);</div><div class='add'>+extern void kernel_fpu_begin(void);</div><div class='add'>+extern void kernel_fpu_end(void);</div><div class='add'>+extern bool irq_fpu_usable(void);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Some instructions like VIA's padlock instructions generate a spurious</div><div class='add'>+ * DNA fault but don't modify SSE registers. And these instructions</div><div class='add'>+ * get used from interrupt context as well. To prevent these kernel instructions</div><div class='add'>+ * in interrupt context interacting wrongly with other user/kernel fpu usage, we</div><div class='add'>+ * should use them only in the context of irq_ts_save/restore()</div><div class='add'>+ */</div><div class='add'>+extern int  irq_ts_save(void);</div><div class='add'>+extern void irq_ts_restore(int TS_state);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Query the presence of one or more xfeatures. Works on any legacy CPU as well.</div><div class='add'>+ *</div><div class='add'>+ * If 'feature_name' is set then put a human-readable description of</div><div class='add'>+ * the feature there as well - this can be used to print error (or success)</div><div class='add'>+ * messages.</div><div class='add'>+ */</div><div class='add'>+extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_FPU_API_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h<br/>new file mode 100644<br/>index 000000000000..3c3550c3a4a3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/internal.h</a></div><div class='hunk'>@@ -0,0 +1,694 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 1994 Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * Pentium III FXSR, SSE support</div><div class='add'>+ * General FPU state handling cleanups</div><div class='add'>+ *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='add'>+ * x86-64 work by Andi Kleen 2002</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_X86_FPU_INTERNAL_H</div><div class='add'>+#define _ASM_X86_FPU_INTERNAL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compat.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/user.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xstate.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * High level FPU state handling functions:</div><div class='add'>+ */</div><div class='add'>+extern void fpu__activate_curr(struct fpu *fpu);</div><div class='add'>+extern void fpu__activate_fpstate_read(struct fpu *fpu);</div><div class='add'>+extern void fpu__activate_fpstate_write(struct fpu *fpu);</div><div class='add'>+extern void fpu__save(struct fpu *fpu);</div><div class='add'>+extern void fpu__restore(struct fpu *fpu);</div><div class='add'>+extern int  fpu__restore_sig(void __user *buf, int ia32_frame);</div><div class='add'>+extern void fpu__drop(struct fpu *fpu);</div><div class='add'>+extern int  fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu);</div><div class='add'>+extern void fpu__clear(struct fpu *fpu);</div><div class='add'>+extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);</div><div class='add'>+extern int  dump_fpu(struct pt_regs *ptregs, struct user_i387_struct *fpstate);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Boot time FPU initialization functions:</div><div class='add'>+ */</div><div class='add'>+extern void fpu__init_cpu(void);</div><div class='add'>+extern void fpu__init_system_xstate(void);</div><div class='add'>+extern void fpu__init_cpu_xstate(void);</div><div class='add'>+extern void fpu__init_system(struct cpuinfo_x86 *c);</div><div class='add'>+extern void fpu__init_check_bugs(void);</div><div class='add'>+extern void fpu__resume_cpu(void);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Debugging facility:</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_X86_DEBUG_FPU</div><div class='add'>+# define WARN_ON_FPU(x) WARN_ON_ONCE(x)</div><div class='add'>+#else</div><div class='add'>+# define WARN_ON_FPU(x) ({ (void)(x); 0; })</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU related CPU feature flag helper routines:</div><div class='add'>+ */</div><div class='add'>+static __always_inline __pure bool use_eager_fpu(void)</div><div class='add'>+{</div><div class='add'>+	return static_cpu_has_safe(X86_FEATURE_EAGER_FPU);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline __pure bool use_xsaveopt(void)</div><div class='add'>+{</div><div class='add'>+	return static_cpu_has_safe(X86_FEATURE_XSAVEOPT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline __pure bool use_xsave(void)</div><div class='add'>+{</div><div class='add'>+	return static_cpu_has_safe(X86_FEATURE_XSAVE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline __pure bool use_fxsr(void)</div><div class='add'>+{</div><div class='add'>+	return static_cpu_has_safe(X86_FEATURE_FXSR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * fpstate handling functions:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+extern union fpregs_state init_fpstate;</div><div class='add'>+</div><div class='add'>+extern void fpstate_init(union fpregs_state *state);</div><div class='add'>+#ifdef CONFIG_MATH_EMULATION</div><div class='add'>+extern void fpstate_init_soft(struct swregs_state *soft);</div><div class='add'>+#else</div><div class='add'>+static inline void fpstate_init_soft(struct swregs_state *soft) {}</div><div class='add'>+#endif</div><div class='add'>+static inline void fpstate_init_fxstate(struct fxregs_state *fx)</div><div class='add'>+{</div><div class='add'>+	fx-&gt;cwd = 0x37f;</div><div class='add'>+	fx-&gt;mxcsr = MXCSR_DEFAULT;</div><div class='add'>+}</div><div class='add'>+extern void fpstate_sanitize_xstate(struct fpu *fpu);</div><div class='add'>+</div><div class='add'>+#define user_insn(insn, output, input...)				\</div><div class='add'>+({									\</div><div class='add'>+	int err;							\</div><div class='add'>+	asm volatile(ASM_STAC "\n"					\</div><div class='add'>+		     "1:" #insn "\n\t"					\</div><div class='add'>+		     "2: " ASM_CLAC "\n"				\</div><div class='add'>+		     ".section .fixup,\"ax\"\n"				\</div><div class='add'>+		     "3:  movl $-1,%[err]\n"				\</div><div class='add'>+		     "    jmp  2b\n"					\</div><div class='add'>+		     ".previous\n"					\</div><div class='add'>+		     _ASM_EXTABLE(1b, 3b)				\</div><div class='add'>+		     : [err] "=r" (err), output				\</div><div class='add'>+		     : "0"(0), input);					\</div><div class='add'>+	err;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define check_insn(insn, output, input...)				\</div><div class='add'>+({									\</div><div class='add'>+	int err;							\</div><div class='add'>+	asm volatile("1:" #insn "\n\t"					\</div><div class='add'>+		     "2:\n"						\</div><div class='add'>+		     ".section .fixup,\"ax\"\n"				\</div><div class='add'>+		     "3:  movl $-1,%[err]\n"				\</div><div class='add'>+		     "    jmp  2b\n"					\</div><div class='add'>+		     ".previous\n"					\</div><div class='add'>+		     _ASM_EXTABLE(1b, 3b)				\</div><div class='add'>+		     : [err] "=r" (err), output				\</div><div class='add'>+		     : "0"(0), input);					\</div><div class='add'>+	err;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static inline int copy_fregs_to_user(struct fregs_state __user *fx)</div><div class='add'>+{</div><div class='add'>+	return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int copy_fxregs_to_user(struct fxregs_state __user *fx)</div><div class='add'>+{</div><div class='add'>+	if (config_enabled(CONFIG_X86_32))</div><div class='add'>+		return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));</div><div class='add'>+	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='add'>+		return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));</div><div class='add'>+</div><div class='add'>+	/* See comment in copy_fxregs_to_kernel() below. */</div><div class='add'>+	return user_insn(rex64/fxsave (%[fx]), "=m" (*fx), [fx] "R" (fx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void copy_kernel_to_fxregs(struct fxregs_state *fx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (config_enabled(CONFIG_X86_32)) {</div><div class='add'>+		err = check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+	} else {</div><div class='add'>+		if (config_enabled(CONFIG_AS_FXSAVEQ)) {</div><div class='add'>+			err = check_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+		} else {</div><div class='add'>+			/* See comment in copy_fxregs_to_kernel() below. */</div><div class='add'>+			err = check_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx), "m" (*fx));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* Copying from a kernel buffer to FPU registers should never fail: */</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int copy_user_to_fxregs(struct fxregs_state __user *fx)</div><div class='add'>+{</div><div class='add'>+	if (config_enabled(CONFIG_X86_32))</div><div class='add'>+		return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='add'>+		return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+</div><div class='add'>+	/* See comment in copy_fxregs_to_kernel() below. */</div><div class='add'>+	return user_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),</div><div class='add'>+			  "m" (*fx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void copy_kernel_to_fregs(struct fregs_state *fx)</div><div class='add'>+{</div><div class='add'>+	int err = check_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int copy_user_to_fregs(struct fregs_state __user *fx)</div><div class='add'>+{</div><div class='add'>+	return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void copy_fxregs_to_kernel(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	if (config_enabled(CONFIG_X86_32))</div><div class='add'>+		asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu-&gt;state.fxsave));</div><div class='add'>+	else if (config_enabled(CONFIG_AS_FXSAVEQ))</div><div class='add'>+		asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu-&gt;state.fxsave));</div><div class='add'>+	else {</div><div class='add'>+		/* Using "rex64; fxsave %0" is broken because, if the memory</div><div class='add'>+		 * operand uses any extended registers for addressing, a second</div><div class='add'>+		 * REX prefix will be generated (to the assembler, rex64</div><div class='add'>+		 * followed by semicolon is a separate instruction), and hence</div><div class='add'>+		 * the 64-bitness is lost.</div><div class='add'>+		 *</div><div class='add'>+		 * Using "fxsaveq %0" would be the ideal choice, but is only</div><div class='add'>+		 * supported starting with gas 2.16.</div><div class='add'>+		 *</div><div class='add'>+		 * Using, as a workaround, the properly prefixed form below</div><div class='add'>+		 * isn't accepted by any binutils version so far released,</div><div class='add'>+		 * complaining that the same type of prefix is used twice if</div><div class='add'>+		 * an extended register is needed for addressing (fix submitted</div><div class='add'>+		 * to mainline 2005-11-21).</div><div class='add'>+		 *</div><div class='add'>+		 *  asm volatile("rex64/fxsave %0" : "=m" (fpu-&gt;state.fxsave));</div><div class='add'>+		 *</div><div class='add'>+		 * This, however, we can work around by forcing the compiler to</div><div class='add'>+		 * select an addressing mode that doesn't require extended</div><div class='add'>+		 * registers.</div><div class='add'>+		 */</div><div class='add'>+		asm volatile( "rex64/fxsave (%[fx])"</div><div class='add'>+			     : "=m" (fpu-&gt;state.fxsave)</div><div class='add'>+			     : [fx] "R" (&amp;fpu-&gt;state.fxsave));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These macros all use (%edi)/(%rdi) as the single memory argument. */</div><div class='add'>+#define XSAVE		".byte " REX_PREFIX "0x0f,0xae,0x27"</div><div class='add'>+#define XSAVEOPT	".byte " REX_PREFIX "0x0f,0xae,0x37"</div><div class='add'>+#define XSAVES		".byte " REX_PREFIX "0x0f,0xc7,0x2f"</div><div class='add'>+#define XRSTOR		".byte " REX_PREFIX "0x0f,0xae,0x2f"</div><div class='add'>+#define XRSTORS		".byte " REX_PREFIX "0x0f,0xc7,0x1f"</div><div class='add'>+</div><div class='add'>+/* xstate instruction fault handler: */</div><div class='add'>+#define xstate_fault(__err)		\</div><div class='add'>+					\</div><div class='add'>+	".section .fixup,\"ax\"\n"	\</div><div class='add'>+					\</div><div class='add'>+	"3:  movl $-2,%[_err]\n"	\</div><div class='add'>+	"    jmp  2b\n"			\</div><div class='add'>+					\</div><div class='add'>+	".previous\n"			\</div><div class='add'>+					\</div><div class='add'>+	_ASM_EXTABLE(1b, 3b)		\</div><div class='add'>+	: [_err] "=r" (__err)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function is called only during boot time when x86 caps are not set</div><div class='add'>+ * up and alternative can not be used yet.</div><div class='add'>+ */</div><div class='add'>+static inline void copy_xregs_to_kernel_booting(struct xregs_state *xstate)</div><div class='add'>+{</div><div class='add'>+	u64 mask = -1;</div><div class='add'>+	u32 lmask = mask;</div><div class='add'>+	u32 hmask = mask &gt;&gt; 32;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON(system_state != SYSTEM_BOOTING);</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_XSAVES))</div><div class='add'>+		asm volatile("1:"XSAVES"\n\t"</div><div class='add'>+			"2:\n\t"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)</div><div class='add'>+			: "memory");</div><div class='add'>+	else</div><div class='add'>+		asm volatile("1:"XSAVE"\n\t"</div><div class='add'>+			"2:\n\t"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)</div><div class='add'>+			: "memory");</div><div class='add'>+</div><div class='add'>+	/* We should never fault when copying to a kernel buffer: */</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function is called only during boot time when x86 caps are not set</div><div class='add'>+ * up and alternative can not be used yet.</div><div class='add'>+ */</div><div class='add'>+static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)</div><div class='add'>+{</div><div class='add'>+	u64 mask = -1;</div><div class='add'>+	u32 lmask = mask;</div><div class='add'>+	u32 hmask = mask &gt;&gt; 32;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON(system_state != SYSTEM_BOOTING);</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_XSAVES))</div><div class='add'>+		asm volatile("1:"XRSTORS"\n\t"</div><div class='add'>+			"2:\n\t"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)</div><div class='add'>+			: "memory");</div><div class='add'>+	else</div><div class='add'>+		asm volatile("1:"XRSTOR"\n\t"</div><div class='add'>+			"2:\n\t"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)</div><div class='add'>+			: "memory");</div><div class='add'>+</div><div class='add'>+	/* We should never fault when copying from a kernel buffer: */</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save processor xstate to xsave area.</div><div class='add'>+ */</div><div class='add'>+static inline void copy_xregs_to_kernel(struct xregs_state *xstate)</div><div class='add'>+{</div><div class='add'>+	u64 mask = -1;</div><div class='add'>+	u32 lmask = mask;</div><div class='add'>+	u32 hmask = mask &gt;&gt; 32;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!alternatives_patched);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If xsaves is enabled, xsaves replaces xsaveopt because</div><div class='add'>+	 * it supports compact format and supervisor states in addition to</div><div class='add'>+	 * modified optimization in xsaveopt.</div><div class='add'>+	 *</div><div class='add'>+	 * Otherwise, if xsaveopt is enabled, xsaveopt replaces xsave</div><div class='add'>+	 * because xsaveopt supports modified optimization which is not</div><div class='add'>+	 * supported by xsave.</div><div class='add'>+	 *</div><div class='add'>+	 * If none of xsaves and xsaveopt is enabled, use xsave.</div><div class='add'>+	 */</div><div class='add'>+	alternative_input_2(</div><div class='add'>+		"1:"XSAVE,</div><div class='add'>+		XSAVEOPT,</div><div class='add'>+		X86_FEATURE_XSAVEOPT,</div><div class='add'>+		XSAVES,</div><div class='add'>+		X86_FEATURE_XSAVES,</div><div class='add'>+		[xstate] "D" (xstate), "a" (lmask), "d" (hmask) :</div><div class='add'>+		"memory");</div><div class='add'>+	asm volatile("2:\n\t"</div><div class='add'>+		     xstate_fault(err)</div><div class='add'>+		     : "0" (err)</div><div class='add'>+		     : "memory");</div><div class='add'>+</div><div class='add'>+	/* We should never fault when copying to a kernel buffer: */</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore processor xstate from xsave area.</div><div class='add'>+ */</div><div class='add'>+static inline void copy_kernel_to_xregs(struct xregs_state *xstate, u64 mask)</div><div class='add'>+{</div><div class='add'>+	u32 lmask = mask;</div><div class='add'>+	u32 hmask = mask &gt;&gt; 32;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Use xrstors to restore context if it is enabled. xrstors supports</div><div class='add'>+	 * compacted format of xsave area which is not supported by xrstor.</div><div class='add'>+	 */</div><div class='add'>+	alternative_input(</div><div class='add'>+		"1: " XRSTOR,</div><div class='add'>+		XRSTORS,</div><div class='add'>+		X86_FEATURE_XSAVES,</div><div class='add'>+		"D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask)</div><div class='add'>+		: "memory");</div><div class='add'>+</div><div class='add'>+	asm volatile("2:\n"</div><div class='add'>+		     xstate_fault(err)</div><div class='add'>+		     : "0" (err)</div><div class='add'>+		     : "memory");</div><div class='add'>+</div><div class='add'>+	/* We should never fault when copying from a kernel buffer: */</div><div class='add'>+	WARN_ON_FPU(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save xstate to user space xsave area.</div><div class='add'>+ *</div><div class='add'>+ * We don't use modified optimization because xrstor/xrstors might track</div><div class='add'>+ * a different application.</div><div class='add'>+ *</div><div class='add'>+ * We don't use compacted format xsave area for</div><div class='add'>+ * backward compatibility for old applications which don't understand</div><div class='add'>+ * compacted format of xsave area.</div><div class='add'>+ */</div><div class='add'>+static inline int copy_xregs_to_user(struct xregs_state __user *buf)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear the xsave header first, so that reserved fields are</div><div class='add'>+	 * initialized to zero.</div><div class='add'>+	 */</div><div class='add'>+	err = __clear_user(&amp;buf-&gt;header, sizeof(buf-&gt;header));</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(ASM_STAC "\n"</div><div class='add'>+			     "1:"XSAVE"\n"</div><div class='add'>+			     "2: " ASM_CLAC "\n"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			     : "D" (buf), "a" (-1), "d" (-1), "0" (err)</div><div class='add'>+			     : "memory");</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore xstate from user space xsave area.</div><div class='add'>+ */</div><div class='add'>+static inline int copy_user_to_xregs(struct xregs_state __user *buf, u64 mask)</div><div class='add'>+{</div><div class='add'>+	struct xregs_state *xstate = ((__force struct xregs_state *)buf);</div><div class='add'>+	u32 lmask = mask;</div><div class='add'>+	u32 hmask = mask &gt;&gt; 32;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__(ASM_STAC "\n"</div><div class='add'>+			     "1:"XRSTOR"\n"</div><div class='add'>+			     "2: " ASM_CLAC "\n"</div><div class='add'>+			     xstate_fault(err)</div><div class='add'>+			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (err)</div><div class='add'>+			     : "memory");	/* memory required? */</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These must be called with preempt disabled. Returns</div><div class='add'>+ * 'true' if the FPU state is still intact and we can</div><div class='add'>+ * keep registers active.</div><div class='add'>+ *</div><div class='add'>+ * The legacy FNSAVE instruction cleared all FPU state</div><div class='add'>+ * unconditionally, so registers are essentially destroyed.</div><div class='add'>+ * Modern FPU state can be kept in registers, if there are</div><div class='add'>+ * no pending FP exceptions.</div><div class='add'>+ */</div><div class='add'>+static inline int copy_fpregs_to_fpstate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	if (likely(use_xsave())) {</div><div class='add'>+		copy_xregs_to_kernel(&amp;fpu-&gt;state.xsave);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(use_fxsr())) {</div><div class='add'>+		copy_fxregs_to_kernel(fpu);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Legacy FPU register saving, FNSAVE always clears FPU registers,</div><div class='add'>+	 * so we have to mark them inactive:</div><div class='add'>+	 */</div><div class='add'>+	asm volatile("fnsave %[fp]; fwait" : [fp] "=m" (fpu-&gt;state.fsave));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate)</div><div class='add'>+{</div><div class='add'>+	if (use_xsave()) {</div><div class='add'>+		copy_kernel_to_xregs(&amp;fpstate-&gt;xsave, -1);</div><div class='add'>+	} else {</div><div class='add'>+		if (use_fxsr())</div><div class='add'>+			copy_kernel_to_fxregs(&amp;fpstate-&gt;fxsave);</div><div class='add'>+		else</div><div class='add'>+			copy_kernel_to_fregs(&amp;fpstate-&gt;fsave);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void copy_kernel_to_fpregs(union fpregs_state *fpstate)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is</div><div class='add'>+	 * pending. Clear the x87 state here by setting it to fixed values.</div><div class='add'>+	 * "m" is a random variable that should be in L1.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(static_cpu_has_bug_safe(X86_BUG_FXSAVE_LEAK))) {</div><div class='add'>+		asm volatile(</div><div class='add'>+			"fnclex\n\t"</div><div class='add'>+			"emms\n\t"</div><div class='add'>+			"fildl %P[addr]"	/* set F?P to defined value */</div><div class='add'>+			: : [addr] "m" (fpstate));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__copy_kernel_to_fpregs(fpstate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern int copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU context switch related helper methods:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Must be run with preemption disabled: this clears the fpu_fpregs_owner_ctx,</div><div class='add'>+ * on this CPU.</div><div class='add'>+ *</div><div class='add'>+ * This will disable any lazy FPU state restore of the current FPU state,</div><div class='add'>+ * but if the current thread owns the FPU, it will still be saved by.</div><div class='add'>+ */</div><div class='add'>+static inline void __cpu_disable_lazy_restore(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	per_cpu(fpu_fpregs_owner_ctx, cpu) = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int fpu_want_lazy_restore(struct fpu *fpu, unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) &amp;&amp; cpu == fpu-&gt;last_cpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Wrap lazy FPU TS handling in a 'hw fpregs activation/deactivation'</div><div class='add'>+ * idiom, which is then paired with the sw-flag (fpregs_active) later on:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline void __fpregs_activate_hw(void)</div><div class='add'>+{</div><div class='add'>+	if (!use_eager_fpu())</div><div class='add'>+		clts();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __fpregs_deactivate_hw(void)</div><div class='add'>+{</div><div class='add'>+	if (!use_eager_fpu())</div><div class='add'>+		stts();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be paired with an 'stts' (fpregs_deactivate_hw()) after! */</div><div class='add'>+static inline void __fpregs_deactivate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(!fpu-&gt;fpregs_active);</div><div class='add'>+</div><div class='add'>+	fpu-&gt;fpregs_active = 0;</div><div class='add'>+	this_cpu_write(fpu_fpregs_owner_ctx, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be paired with a 'clts' (fpregs_activate_hw()) before! */</div><div class='add'>+static inline void __fpregs_activate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(fpu-&gt;fpregs_active);</div><div class='add'>+</div><div class='add'>+	fpu-&gt;fpregs_active = 1;</div><div class='add'>+	this_cpu_write(fpu_fpregs_owner_ctx, fpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The question "does this thread have fpu access?"</div><div class='add'>+ * is slightly racy, since preemption could come in</div><div class='add'>+ * and revoke it immediately after the test.</div><div class='add'>+ *</div><div class='add'>+ * However, even in that very unlikely scenario,</div><div class='add'>+ * we can just assume we have FPU access - typically</div><div class='add'>+ * to save the FP state - we'll just take a #NM</div><div class='add'>+ * fault and get the FPU access back.</div><div class='add'>+ */</div><div class='add'>+static inline int fpregs_active(void)</div><div class='add'>+{</div><div class='add'>+	return current-&gt;thread.fpu.fpregs_active;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encapsulate the CR0.TS handling together with the</div><div class='add'>+ * software flag.</div><div class='add'>+ *</div><div class='add'>+ * These generally need preemption protection to work,</div><div class='add'>+ * do try to avoid using these on their own.</div><div class='add'>+ */</div><div class='add'>+static inline void fpregs_activate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	__fpregs_activate_hw();</div><div class='add'>+	__fpregs_activate(fpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fpregs_deactivate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	__fpregs_deactivate(fpu);</div><div class='add'>+	__fpregs_deactivate_hw();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU state switching for scheduling.</div><div class='add'>+ *</div><div class='add'>+ * This is a two-stage process:</div><div class='add'>+ *</div><div class='add'>+ *  - switch_fpu_prepare() saves the old state and</div><div class='add'>+ *    sets the new state of the CR0.TS bit. This is</div><div class='add'>+ *    done within the context of the old process.</div><div class='add'>+ *</div><div class='add'>+ *  - switch_fpu_finish() restores the new state as</div><div class='add'>+ *    necessary.</div><div class='add'>+ */</div><div class='add'>+typedef struct { int preload; } fpu_switch_t;</div><div class='add'>+</div><div class='add'>+static inline fpu_switch_t</div><div class='add'>+switch_fpu_prepare(struct fpu *old_fpu, struct fpu *new_fpu, int cpu)</div><div class='add'>+{</div><div class='add'>+	fpu_switch_t fpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the task has used the math, pre-load the FPU on xsave processors</div><div class='add'>+	 * or if the past 5 consecutive context-switches used math.</div><div class='add'>+	 */</div><div class='add'>+	fpu.preload = new_fpu-&gt;fpstate_active &amp;&amp;</div><div class='add'>+		      (use_eager_fpu() || new_fpu-&gt;counter &gt; 5);</div><div class='add'>+</div><div class='add'>+	if (old_fpu-&gt;fpregs_active) {</div><div class='add'>+		if (!copy_fpregs_to_fpstate(old_fpu))</div><div class='add'>+			old_fpu-&gt;last_cpu = -1;</div><div class='add'>+		else</div><div class='add'>+			old_fpu-&gt;last_cpu = cpu;</div><div class='add'>+</div><div class='add'>+		/* But leave fpu_fpregs_owner_ctx! */</div><div class='add'>+		old_fpu-&gt;fpregs_active = 0;</div><div class='add'>+</div><div class='add'>+		/* Don't change CR0.TS if we just switch! */</div><div class='add'>+		if (fpu.preload) {</div><div class='add'>+			new_fpu-&gt;counter++;</div><div class='add'>+			__fpregs_activate(new_fpu);</div><div class='add'>+			prefetch(&amp;new_fpu-&gt;state);</div><div class='add'>+		} else {</div><div class='add'>+			__fpregs_deactivate_hw();</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		old_fpu-&gt;counter = 0;</div><div class='add'>+		old_fpu-&gt;last_cpu = -1;</div><div class='add'>+		if (fpu.preload) {</div><div class='add'>+			new_fpu-&gt;counter++;</div><div class='add'>+			if (fpu_want_lazy_restore(new_fpu, cpu))</div><div class='add'>+				fpu.preload = 0;</div><div class='add'>+			else</div><div class='add'>+				prefetch(&amp;new_fpu-&gt;state);</div><div class='add'>+			fpregs_activate(new_fpu);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return fpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Misc helper functions:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * By the time this gets called, we've already cleared CR0.TS and</div><div class='add'>+ * given the process the FPU if we are going to preload the FPU</div><div class='add'>+ * state - all we need to do is to conditionally restore the register</div><div class='add'>+ * state itself.</div><div class='add'>+ */</div><div class='add'>+static inline void switch_fpu_finish(struct fpu *new_fpu, fpu_switch_t fpu_switch)</div><div class='add'>+{</div><div class='add'>+	if (fpu_switch.preload)</div><div class='add'>+		copy_kernel_to_fpregs(&amp;new_fpu-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Needs to be preemption-safe.</div><div class='add'>+ *</div><div class='add'>+ * NOTE! user_fpu_begin() must be used only immediately before restoring</div><div class='add'>+ * the save state. It does not do any saving/restoring on its own. In</div><div class='add'>+ * lazy FPU mode, it is just an optimization to avoid a #NM exception,</div><div class='add'>+ * the task can lose the FPU right after preempt_enable().</div><div class='add'>+ */</div><div class='add'>+static inline void user_fpu_begin(void)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	preempt_disable();</div><div class='add'>+	if (!fpregs_active())</div><div class='add'>+		fpregs_activate(fpu);</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MXCSR and XCR definitions:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+extern unsigned int mxcsr_feature_mask;</div><div class='add'>+</div><div class='add'>+#define XCR_XFEATURE_ENABLED_MASK	0x00000000</div><div class='add'>+</div><div class='add'>+static inline u64 xgetbv(u32 index)</div><div class='add'>+{</div><div class='add'>+	u32 eax, edx;</div><div class='add'>+</div><div class='add'>+	asm volatile(".byte 0x0f,0x01,0xd0" /* xgetbv */</div><div class='add'>+		     : "=a" (eax), "=d" (edx)</div><div class='add'>+		     : "c" (index));</div><div class='add'>+	return eax + ((u64)edx &lt;&lt; 32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void xsetbv(u32 index, u64 value)</div><div class='add'>+{</div><div class='add'>+	u32 eax = value;</div><div class='add'>+	u32 edx = value &gt;&gt; 32;</div><div class='add'>+</div><div class='add'>+	asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */</div><div class='add'>+		     : : "a" (eax), "d" (edx), "c" (index));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_FPU_INTERNAL_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/regset.h b/arch/x86/include/asm/fpu/regset.h<br/>new file mode 100644<br/>index 000000000000..39d3107ac6c7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/regset.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/regset.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * FPU regset handling methods:</div><div class='add'>+ */</div><div class='add'>+#ifndef _ASM_X86_FPU_REGSET_H</div><div class='add'>+#define _ASM_X86_FPU_REGSET_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/regset.h&gt;</div><div class='add'>+</div><div class='add'>+extern user_regset_active_fn regset_fpregs_active, regset_xregset_fpregs_active;</div><div class='add'>+extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,</div><div class='add'>+				xstateregs_get;</div><div class='add'>+extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,</div><div class='add'>+				 xstateregs_set;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * xstateregs_active == regset_fpregs_active. Please refer to the comment</div><div class='add'>+ * at the definition of regset_fpregs_active.</div><div class='add'>+ */</div><div class='add'>+#define xstateregs_active	regset_fpregs_active</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_FPU_REGSET_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/signal.h b/arch/x86/include/asm/fpu/signal.h<br/>new file mode 100644<br/>index 000000000000..7358e9d61f1e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/signal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/signal.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/*</div><div class='add'>+ * x86 FPU signal frame handling methods:</div><div class='add'>+ */</div><div class='add'>+#ifndef _ASM_X86_FPU_SIGNAL_H</div><div class='add'>+#define _ASM_X86_FPU_SIGNAL_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+# include &lt;asm/sigcontext32.h&gt;</div><div class='add'>+# include &lt;asm/user32.h&gt;</div><div class='add'>+struct ksignal;</div><div class='add'>+int ia32_setup_rt_frame(int sig, struct ksignal *ksig,</div><div class='add'>+			compat_sigset_t *set, struct pt_regs *regs);</div><div class='add'>+int ia32_setup_frame(int sig, struct ksignal *ksig,</div><div class='add'>+		     compat_sigset_t *set, struct pt_regs *regs);</div><div class='add'>+#else</div><div class='add'>+# define user_i387_ia32_struct	user_i387_struct</div><div class='add'>+# define user32_fxsr_struct	user_fxsr_struct</div><div class='add'>+# define ia32_setup_frame	__setup_frame</div><div class='add'>+# define ia32_setup_rt_frame	__setup_rt_frame</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern void convert_from_fxsr(struct user_i387_ia32_struct *env,</div><div class='add'>+			      struct task_struct *tsk);</div><div class='add'>+extern void convert_to_fxsr(struct task_struct *tsk,</div><div class='add'>+			    const struct user_i387_ia32_struct *env);</div><div class='add'>+</div><div class='add'>+unsigned long</div><div class='add'>+fpu__alloc_mathframe(unsigned long sp, int ia32_frame,</div><div class='add'>+		     unsigned long *buf_fx, unsigned long *size);</div><div class='add'>+</div><div class='add'>+extern void fpu__init_prepare_fx_sw_frame(void);</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_FPU_SIGNAL_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h<br/>new file mode 100644<br/>index 000000000000..c49c5173158e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/types.h</a></div><div class='hunk'>@@ -0,0 +1,297 @@</div><div class='add'>+/*</div><div class='add'>+ * FPU data structures:</div><div class='add'>+ */</div><div class='add'>+#ifndef _ASM_X86_FPU_H</div><div class='add'>+#define _ASM_X86_FPU_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The legacy x87 FPU state format, as saved by FSAVE and</div><div class='add'>+ * restored by the FRSTOR instructions:</div><div class='add'>+ */</div><div class='add'>+struct fregs_state {</div><div class='add'>+	u32			cwd;	/* FPU Control Word		*/</div><div class='add'>+	u32			swd;	/* FPU Status Word		*/</div><div class='add'>+	u32			twd;	/* FPU Tag Word			*/</div><div class='add'>+	u32			fip;	/* FPU IP Offset		*/</div><div class='add'>+	u32			fcs;	/* FPU IP Selector		*/</div><div class='add'>+	u32			foo;	/* FPU Operand Pointer Offset	*/</div><div class='add'>+	u32			fos;	/* FPU Operand Pointer Selector	*/</div><div class='add'>+</div><div class='add'>+	/* 8*10 bytes for each FP-reg = 80 bytes:			*/</div><div class='add'>+	u32			st_space[20];</div><div class='add'>+</div><div class='add'>+	/* Software status information [not touched by FSAVE]:		*/</div><div class='add'>+	u32			status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The legacy fx SSE/MMX FPU state format, as saved by FXSAVE and</div><div class='add'>+ * restored by the FXRSTOR instructions. It's similar to the FSAVE</div><div class='add'>+ * format, but differs in some areas, plus has extensions at</div><div class='add'>+ * the end for the XMM registers.</div><div class='add'>+ */</div><div class='add'>+struct fxregs_state {</div><div class='add'>+	u16			cwd; /* Control Word			*/</div><div class='add'>+	u16			swd; /* Status Word			*/</div><div class='add'>+	u16			twd; /* Tag Word			*/</div><div class='add'>+	u16			fop; /* Last Instruction Opcode		*/</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u64	rip; /* Instruction Pointer		*/</div><div class='add'>+			u64	rdp; /* Data Pointer			*/</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u32	fip; /* FPU IP Offset			*/</div><div class='add'>+			u32	fcs; /* FPU IP Selector			*/</div><div class='add'>+			u32	foo; /* FPU Operand Offset		*/</div><div class='add'>+			u32	fos; /* FPU Operand Selector		*/</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	u32			mxcsr;		/* MXCSR Register State */</div><div class='add'>+	u32			mxcsr_mask;	/* MXCSR Mask		*/</div><div class='add'>+</div><div class='add'>+	/* 8*16 bytes for each FP-reg = 128 bytes:			*/</div><div class='add'>+	u32			st_space[32];</div><div class='add'>+</div><div class='add'>+	/* 16*16 bytes for each XMM-reg = 256 bytes:			*/</div><div class='add'>+	u32			xmm_space[64];</div><div class='add'>+</div><div class='add'>+	u32			padding[12];</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32		padding1[12];</div><div class='add'>+		u32		sw_reserved[12];</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+} __attribute__((aligned(16)));</div><div class='add'>+</div><div class='add'>+/* Default value for fxregs_state.mxcsr: */</div><div class='add'>+#define MXCSR_DEFAULT		0x1f80</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Software based FPU emulation state. This is arbitrary really,</div><div class='add'>+ * it matches the x87 format to make it easier to understand:</div><div class='add'>+ */</div><div class='add'>+struct swregs_state {</div><div class='add'>+	u32			cwd;</div><div class='add'>+	u32			swd;</div><div class='add'>+	u32			twd;</div><div class='add'>+	u32			fip;</div><div class='add'>+	u32			fcs;</div><div class='add'>+	u32			foo;</div><div class='add'>+	u32			fos;</div><div class='add'>+	/* 8*10 bytes for each FP-reg = 80 bytes: */</div><div class='add'>+	u32			st_space[20];</div><div class='add'>+	u8			ftop;</div><div class='add'>+	u8			changed;</div><div class='add'>+	u8			lookahead;</div><div class='add'>+	u8			no_update;</div><div class='add'>+	u8			rm;</div><div class='add'>+	u8			alimit;</div><div class='add'>+	struct math_emu_info	*info;</div><div class='add'>+	u32			entry_eip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * List of XSAVE features Linux knows about:</div><div class='add'>+ */</div><div class='add'>+enum xfeature_bit {</div><div class='add'>+	XSTATE_BIT_FP,</div><div class='add'>+	XSTATE_BIT_SSE,</div><div class='add'>+	XSTATE_BIT_YMM,</div><div class='add'>+	XSTATE_BIT_BNDREGS,</div><div class='add'>+	XSTATE_BIT_BNDCSR,</div><div class='add'>+	XSTATE_BIT_OPMASK,</div><div class='add'>+	XSTATE_BIT_ZMM_Hi256,</div><div class='add'>+	XSTATE_BIT_Hi16_ZMM,</div><div class='add'>+</div><div class='add'>+	XFEATURES_NR_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XSTATE_FP		(1 &lt;&lt; XSTATE_BIT_FP)</div><div class='add'>+#define XSTATE_SSE		(1 &lt;&lt; XSTATE_BIT_SSE)</div><div class='add'>+#define XSTATE_YMM		(1 &lt;&lt; XSTATE_BIT_YMM)</div><div class='add'>+#define XSTATE_BNDREGS		(1 &lt;&lt; XSTATE_BIT_BNDREGS)</div><div class='add'>+#define XSTATE_BNDCSR		(1 &lt;&lt; XSTATE_BIT_BNDCSR)</div><div class='add'>+#define XSTATE_OPMASK		(1 &lt;&lt; XSTATE_BIT_OPMASK)</div><div class='add'>+#define XSTATE_ZMM_Hi256	(1 &lt;&lt; XSTATE_BIT_ZMM_Hi256)</div><div class='add'>+#define XSTATE_Hi16_ZMM		(1 &lt;&lt; XSTATE_BIT_Hi16_ZMM)</div><div class='add'>+</div><div class='add'>+#define XSTATE_FPSSE		(XSTATE_FP | XSTATE_SSE)</div><div class='add'>+#define XSTATE_AVX512		(XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * There are 16x 256-bit AVX registers named YMM0-YMM15.</div><div class='add'>+ * The low 128 bits are aliased to the 16 SSE registers (XMM0-XMM15)</div><div class='add'>+ * and are stored in 'struct fxregs_state::xmm_space[]'.</div><div class='add'>+ *</div><div class='add'>+ * The high 128 bits are stored here:</div><div class='add'>+ *    16x 128 bits == 256 bytes.</div><div class='add'>+ */</div><div class='add'>+struct ymmh_struct {</div><div class='add'>+	u8				ymmh_space[256];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* We don't support LWP yet: */</div><div class='add'>+struct lwp_struct {</div><div class='add'>+	u8				reserved[128];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Intel MPX support: */</div><div class='add'>+struct bndreg {</div><div class='add'>+	u64				lower_bound;</div><div class='add'>+	u64				upper_bound;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct bndcsr {</div><div class='add'>+	u64				bndcfgu;</div><div class='add'>+	u64				bndstatus;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct mpx_struct {</div><div class='add'>+	struct bndreg			bndreg[4];</div><div class='add'>+	struct bndcsr			bndcsr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xstate_header {</div><div class='add'>+	u64				xfeatures;</div><div class='add'>+	u64				xcomp_bv;</div><div class='add'>+	u64				reserved[6];</div><div class='add'>+} __attribute__((packed));</div><div class='add'>+</div><div class='add'>+/* New processor state extensions should be added here: */</div><div class='add'>+#define XSTATE_RESERVE			(sizeof(struct ymmh_struct) + \</div><div class='add'>+					 sizeof(struct lwp_struct)  + \</div><div class='add'>+					 sizeof(struct mpx_struct)  )</div><div class='add'>+/*</div><div class='add'>+ * This is our most modern FPU state format, as saved by the XSAVE</div><div class='add'>+ * and restored by the XRSTOR instructions.</div><div class='add'>+ *</div><div class='add'>+ * It consists of a legacy fxregs portion, an xstate header and</div><div class='add'>+ * subsequent fixed size areas as defined by the xstate header.</div><div class='add'>+ * Not all CPUs support all the extensions.</div><div class='add'>+ */</div><div class='add'>+struct xregs_state {</div><div class='add'>+	struct fxregs_state		i387;</div><div class='add'>+	struct xstate_header		header;</div><div class='add'>+	u8				__reserved[XSTATE_RESERVE];</div><div class='add'>+} __attribute__ ((packed, aligned (64)));</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is a union of all the possible FPU state formats</div><div class='add'>+ * put together, so that we can pick the right one runtime.</div><div class='add'>+ *</div><div class='add'>+ * The size of the structure is determined by the largest</div><div class='add'>+ * member - which is the xsave area:</div><div class='add'>+ */</div><div class='add'>+union fpregs_state {</div><div class='add'>+	struct fregs_state		fsave;</div><div class='add'>+	struct fxregs_state		fxsave;</div><div class='add'>+	struct swregs_state		soft;</div><div class='add'>+	struct xregs_state		xsave;</div><div class='add'>+	u8 __padding[PAGE_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Highest level per task FPU state data structure that</div><div class='add'>+ * contains the FPU register state plus various FPU</div><div class='add'>+ * state fields:</div><div class='add'>+ */</div><div class='add'>+struct fpu {</div><div class='add'>+	/*</div><div class='add'>+	 * @last_cpu:</div><div class='add'>+	 *</div><div class='add'>+	 * Records the last CPU on which this context was loaded into</div><div class='add'>+	 * FPU registers. (In the lazy-restore case we might be</div><div class='add'>+	 * able to reuse FPU registers across multiple context switches</div><div class='add'>+	 * this way, if no intermediate task used the FPU.)</div><div class='add'>+	 *</div><div class='add'>+	 * A value of -1 is used to indicate that the FPU state in context</div><div class='add'>+	 * memory is newer than the FPU state in registers, and that the</div><div class='add'>+	 * FPU state should be reloaded next time the task is run.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int			last_cpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * @fpstate_active:</div><div class='add'>+	 *</div><div class='add'>+	 * This flag indicates whether this context is active: if the task</div><div class='add'>+	 * is not running then we can restore from this context, if the task</div><div class='add'>+	 * is running then we should save into this context.</div><div class='add'>+	 */</div><div class='add'>+	unsigned char			fpstate_active;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * @fpregs_active:</div><div class='add'>+	 *</div><div class='add'>+	 * This flag determines whether a given context is actively</div><div class='add'>+	 * loaded into the FPU's registers and that those registers</div><div class='add'>+	 * represent the task's current FPU state.</div><div class='add'>+	 *</div><div class='add'>+	 * Note the interaction with fpstate_active:</div><div class='add'>+	 *</div><div class='add'>+	 *   # task does not use the FPU:</div><div class='add'>+	 *   fpstate_active == 0</div><div class='add'>+	 *</div><div class='add'>+	 *   # task uses the FPU and regs are active:</div><div class='add'>+	 *   fpstate_active == 1 &amp;&amp; fpregs_active == 1</div><div class='add'>+	 *</div><div class='add'>+	 *   # the regs are inactive but still match fpstate:</div><div class='add'>+	 *   fpstate_active == 1 &amp;&amp; fpregs_active == 0 &amp;&amp; fpregs_owner == fpu</div><div class='add'>+	 *</div><div class='add'>+	 * The third state is what we use for the lazy restore optimization</div><div class='add'>+	 * on lazy-switching CPUs.</div><div class='add'>+	 */</div><div class='add'>+	unsigned char			fpregs_active;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * @counter:</div><div class='add'>+	 *</div><div class='add'>+	 * This counter contains the number of consecutive context switches</div><div class='add'>+	 * during which the FPU stays used. If this is over a threshold, the</div><div class='add'>+	 * lazy FPU restore logic becomes eager, to save the trap overhead.</div><div class='add'>+	 * This is an unsigned char so that after 256 iterations the counter</div><div class='add'>+	 * wraps and the context switch behavior turns lazy again; this is to</div><div class='add'>+	 * deal with bursty apps that only use the FPU for a short time:</div><div class='add'>+	 */</div><div class='add'>+	unsigned char			counter;</div><div class='add'>+	/*</div><div class='add'>+	 * @state:</div><div class='add'>+	 *</div><div class='add'>+	 * In-memory copy of all FPU registers that we save/restore</div><div class='add'>+	 * over context switches. If the task is using the FPU then</div><div class='add'>+	 * the registers in the FPU are more recent than this state</div><div class='add'>+	 * copy. If the task context-switches away then they get</div><div class='add'>+	 * saved here and represent the FPU state.</div><div class='add'>+	 *</div><div class='add'>+	 * After context switches there may be a (short) time period</div><div class='add'>+	 * during which the in-FPU hardware registers are unchanged</div><div class='add'>+	 * and still perfectly match this state, if the tasks</div><div class='add'>+	 * scheduled afterwards are not using the FPU.</div><div class='add'>+	 *</div><div class='add'>+	 * This is the 'lazy restore' window of optimization, which</div><div class='add'>+	 * we track though 'fpu_fpregs_owner_ctx' and 'fpu-&gt;last_cpu'.</div><div class='add'>+	 *</div><div class='add'>+	 * We detect whether a subsequent task uses the FPU via setting</div><div class='add'>+	 * CR0::TS to 1, which causes any FPU use to raise a #NM fault.</div><div class='add'>+	 *</div><div class='add'>+	 * During this window, if the task gets scheduled again, we</div><div class='add'>+	 * might be able to skip having to do a restore from this</div><div class='add'>+	 * memory buffer to the hardware registers - at the cost of</div><div class='add'>+	 * incurring the overhead of #NM fault traps.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that on modern CPUs that support the XSAVEOPT (or other</div><div class='add'>+	 * optimized XSAVE instructions), we don't use #NM traps anymore,</div><div class='add'>+	 * as the hardware can track whether FPU registers need saving</div><div class='add'>+	 * or not. On such CPUs we activate the non-lazy ('eagerfpu')</div><div class='add'>+	 * logic, which unconditionally saves/restores all FPU state</div><div class='add'>+	 * across context switches. (if FPU state exists.)</div><div class='add'>+	 */</div><div class='add'>+	union fpregs_state		state;</div><div class='add'>+	/*</div><div class='add'>+	 * WARNING: 'state' is dynamically-sized.  Do not put</div><div class='add'>+	 * anything after it here.</div><div class='add'>+	 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_FPU_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h<br/>new file mode 100644<br/>index 000000000000..4656b25bb9a7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu/xstate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/fpu/xstate.h</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+#ifndef __ASM_X86_XSAVE_H</div><div class='add'>+#define __ASM_X86_XSAVE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+/* Bit 63 of XCR0 is reserved for future expansion */</div><div class='add'>+#define XSTATE_EXTEND_MASK	(~(XSTATE_FPSSE | (1ULL &lt;&lt; 63)))</div><div class='add'>+</div><div class='add'>+#define XSTATE_CPUID		0x0000000d</div><div class='add'>+</div><div class='add'>+#define FXSAVE_SIZE	512</div><div class='add'>+</div><div class='add'>+#define XSAVE_HDR_SIZE	    64</div><div class='add'>+#define XSAVE_HDR_OFFSET    FXSAVE_SIZE</div><div class='add'>+</div><div class='add'>+#define XSAVE_YMM_SIZE	    256</div><div class='add'>+#define XSAVE_YMM_OFFSET    (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)</div><div class='add'>+</div><div class='add'>+/* Supported features which support lazy state saving */</div><div class='add'>+#define XSTATE_LAZY	(XSTATE_FP | XSTATE_SSE | XSTATE_YMM		      \</div><div class='add'>+			| XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)</div><div class='add'>+</div><div class='add'>+/* Supported features which require eager state saving */</div><div class='add'>+#define XSTATE_EAGER	(XSTATE_BNDREGS | XSTATE_BNDCSR)</div><div class='add'>+</div><div class='add'>+/* All currently supported features */</div><div class='add'>+#define XCNTXT_MASK	(XSTATE_LAZY | XSTATE_EAGER)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+#define REX_PREFIX	"0x48, "</div><div class='add'>+#else</div><div class='add'>+#define REX_PREFIX</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern unsigned int xstate_size;</div><div class='add'>+extern u64 xfeatures_mask;</div><div class='add'>+extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];</div><div class='add'>+</div><div class='add'>+extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);</div><div class='add'>+</div><div class='add'>+void *get_xsave_addr(struct xregs_state *xsave, int xstate);</div><div class='add'>+const void *get_xsave_field_ptr(int xstate_field);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/frame.h b/arch/x86/include/asm/frame.h<br/>index 3b629f47eb65..793179cf8e21 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/frame.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/frame.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/frame.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/frame.h</a></div><div class='hunk'>@@ -1,20 +1,17 @@</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The annotation hides the frame from the unwinder and makes it look</div><div class='ctx'>    like a ordinary ebp save/restore. This avoids some special cases for</div><div class='ctx'>    frame pointer later */</div><div class='ctx'> #ifdef CONFIG_FRAME_POINTER</div><div class='ctx'> 	.macro FRAME</div><div class='del'>-	__ASM_SIZE(push,_cfi)	%__ASM_REG(bp)</div><div class='del'>-	CFI_REL_OFFSET		__ASM_REG(bp), 0</div><div class='add'>+	__ASM_SIZE(push,)	%__ASM_REG(bp)</div><div class='ctx'> 	__ASM_SIZE(mov)		%__ASM_REG(sp), %__ASM_REG(bp)</div><div class='ctx'> 	.endm</div><div class='ctx'> 	.macro ENDFRAME</div><div class='del'>-	__ASM_SIZE(pop,_cfi)	%__ASM_REG(bp)</div><div class='del'>-	CFI_RESTORE		__ASM_REG(bp)</div><div class='add'>+	__ASM_SIZE(pop,)	%__ASM_REG(bp)</div><div class='ctx'> 	.endm</div><div class='ctx'> #else</div><div class='ctx'> 	.macro FRAME</div><div class='head'>diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h<br/>index 0f5fb6b6567e..7178043b0e1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/hardirq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/hardirq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/hardirq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hardirq.h</a></div><div class='hunk'>@@ -14,6 +14,7 @@ typedef struct {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_HAVE_KVM</div><div class='ctx'> 	unsigned int kvm_posted_intr_ipis;</div><div class='add'>+	unsigned int kvm_posted_intr_wakeup_ipis;</div><div class='ctx'> #endif</div><div class='ctx'> 	unsigned int x86_platform_ipis;	/* arch dependent */</div><div class='ctx'> 	unsigned int apic_perf_irqs;</div><div class='hunk'>@@ -33,6 +34,9 @@ typedef struct {</div><div class='ctx'> #ifdef CONFIG_X86_MCE_THRESHOLD</div><div class='ctx'> 	unsigned int irq_threshold_count;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_X86_MCE_AMD</div><div class='add'>+	unsigned int irq_deferred_error_count;</div><div class='add'>+#endif</div><div class='ctx'> #if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN)</div><div class='ctx'> 	unsigned int irq_hv_callback_count;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h<br/>index 36f7125945e3..5fa9fb0f8809 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/hpet.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/hpet.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/hpet.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hpet.h</a></div><div class='hunk'>@@ -74,20 +74,16 @@ extern unsigned int hpet_readl(unsigned int a);</div><div class='ctx'> extern void force_hpet_resume(void);</div><div class='ctx'> </div><div class='ctx'> struct irq_data;</div><div class='add'>+struct hpet_dev;</div><div class='add'>+struct irq_domain;</div><div class='add'>+</div><div class='ctx'> extern void hpet_msi_unmask(struct irq_data *data);</div><div class='ctx'> extern void hpet_msi_mask(struct irq_data *data);</div><div class='del'>-struct hpet_dev;</div><div class='ctx'> extern void hpet_msi_write(struct hpet_dev *hdev, struct msi_msg *msg);</div><div class='ctx'> extern void hpet_msi_read(struct hpet_dev *hdev, struct msi_msg *msg);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PCI_MSI</div><div class='del'>-extern int default_setup_hpet_msi(unsigned int irq, unsigned int id);</div><div class='del'>-#else</div><div class='del'>-static inline int default_setup_hpet_msi(unsigned int irq, unsigned int id)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='add'>+extern struct irq_domain *hpet_create_irq_domain(int hpet_id);</div><div class='add'>+extern int hpet_assign_irq(struct irq_domain *domain,</div><div class='add'>+			   struct hpet_dev *dev, int dev_num);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HPET_EMULATE_RTC</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h<br/>index 68c05398bba9..f8a29d2c97b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/hugetlb.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/hugetlb.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -26,9 +26,6 @@ static inline int prepare_hugepage_range(struct file *file,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) {</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,</div><div class='ctx'> 					  unsigned long addr, unsigned long end,</div><div class='ctx'> 					  unsigned long floor,</div><div class='hunk'>@@ -83,15 +80,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)</div><div class='ctx'> 	return *ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int arch_prepare_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void arch_release_hugepage(struct page *page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void arch_clear_hugepage_flags(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h<br/>index e9571ddabc4f..6615032e19c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/hw_irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/hw_irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/hw_irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/hw_irq.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> extern asmlinkage void apic_timer_interrupt(void);</div><div class='ctx'> extern asmlinkage void x86_platform_ipi(void);</div><div class='ctx'> extern asmlinkage void kvm_posted_intr_ipi(void);</div><div class='add'>+extern asmlinkage void kvm_posted_intr_wakeup_ipi(void);</div><div class='ctx'> extern asmlinkage void error_interrupt(void);</div><div class='ctx'> extern asmlinkage void irq_work_interrupt(void);</div><div class='ctx'> </div><div class='hunk'>@@ -36,43 +37,10 @@ extern asmlinkage void spurious_interrupt(void);</div><div class='ctx'> extern asmlinkage void thermal_interrupt(void);</div><div class='ctx'> extern asmlinkage void reschedule_interrupt(void);</div><div class='ctx'> </div><div class='del'>-extern asmlinkage void invalidate_interrupt(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt0(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt1(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt2(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt3(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt4(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt5(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt6(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt7(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt8(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt9(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt10(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt11(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt12(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt13(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt14(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt15(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt16(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt17(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt18(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt19(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt20(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt21(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt22(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt23(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt24(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt25(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt26(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt27(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt28(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt29(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt30(void);</div><div class='del'>-extern asmlinkage void invalidate_interrupt31(void);</div><div class='del'>-</div><div class='ctx'> extern asmlinkage void irq_move_cleanup_interrupt(void);</div><div class='ctx'> extern asmlinkage void reboot_interrupt(void);</div><div class='ctx'> extern asmlinkage void threshold_interrupt(void);</div><div class='add'>+extern asmlinkage void deferred_error_interrupt(void);</div><div class='ctx'> </div><div class='ctx'> extern asmlinkage void call_function_interrupt(void);</div><div class='ctx'> extern asmlinkage void call_function_single_interrupt(void);</div><div class='hunk'>@@ -87,60 +55,93 @@ extern void trace_spurious_interrupt(void);</div><div class='ctx'> extern void trace_thermal_interrupt(void);</div><div class='ctx'> extern void trace_reschedule_interrupt(void);</div><div class='ctx'> extern void trace_threshold_interrupt(void);</div><div class='add'>+extern void trace_deferred_error_interrupt(void);</div><div class='ctx'> extern void trace_call_function_interrupt(void);</div><div class='ctx'> extern void trace_call_function_single_interrupt(void);</div><div class='ctx'> #define trace_irq_move_cleanup_interrupt  irq_move_cleanup_interrupt</div><div class='ctx'> #define trace_reboot_interrupt  reboot_interrupt</div><div class='ctx'> #define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi</div><div class='add'>+#define trace_kvm_posted_intr_wakeup_ipi kvm_posted_intr_wakeup_ipi</div><div class='ctx'> #endif /* CONFIG_TRACING */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IRQ_REMAP</div><div class='del'>-/* Intel specific interrupt remapping information */</div><div class='del'>-struct irq_2_iommu {</div><div class='del'>-	struct intel_iommu *iommu;</div><div class='del'>-	u16 irte_index;</div><div class='del'>-	u16 sub_handle;</div><div class='del'>-	u8  irte_mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* AMD specific interrupt remapping information */</div><div class='del'>-struct irq_2_irte {</div><div class='del'>-	u16 devid; /* Device ID for IRTE table */</div><div class='del'>-	u16 index; /* Index into IRTE table*/</div><div class='del'>-};</div><div class='del'>-#endif	/* CONFIG_IRQ_REMAP */</div><div class='del'>-</div><div class='ctx'> #ifdef	CONFIG_X86_LOCAL_APIC</div><div class='ctx'> struct irq_data;</div><div class='add'>+struct pci_dev;</div><div class='add'>+struct msi_desc;</div><div class='add'>+</div><div class='add'>+enum irq_alloc_type {</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_IOAPIC = 1,</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_HPET,</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_MSI,</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_MSIX,</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_DMAR,</div><div class='add'>+	X86_IRQ_ALLOC_TYPE_UV,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-struct irq_cfg {</div><div class='del'>-	cpumask_var_t		domain;</div><div class='del'>-	cpumask_var_t		old_domain;</div><div class='del'>-	u8			vector;</div><div class='del'>-	u8			move_in_progress : 1;</div><div class='del'>-#ifdef CONFIG_IRQ_REMAP</div><div class='del'>-	u8			remapped : 1;</div><div class='add'>+struct irq_alloc_info {</div><div class='add'>+	enum irq_alloc_type	type;</div><div class='add'>+	u32			flags;</div><div class='add'>+	const struct cpumask	*mask;	/* CPU mask for vector allocation */</div><div class='ctx'> 	union {</div><div class='del'>-		struct irq_2_iommu irq_2_iommu;</div><div class='del'>-		struct irq_2_irte  irq_2_irte;</div><div class='del'>-	};</div><div class='add'>+		int		unused;</div><div class='add'>+#ifdef	CONFIG_HPET_TIMER</div><div class='add'>+		struct {</div><div class='add'>+			int		hpet_id;</div><div class='add'>+			int		hpet_index;</div><div class='add'>+			void		*hpet_data;</div><div class='add'>+		};</div><div class='ctx'> #endif</div><div class='del'>-	union {</div><div class='del'>-#ifdef CONFIG_X86_IO_APIC</div><div class='add'>+#ifdef	CONFIG_PCI_MSI</div><div class='ctx'> 		struct {</div><div class='del'>-			struct list_head	irq_2_pin;</div><div class='add'>+			struct pci_dev	*msi_dev;</div><div class='add'>+			irq_hw_number_t	msi_hwirq;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+#ifdef	CONFIG_X86_IO_APIC</div><div class='add'>+		struct {</div><div class='add'>+			int		ioapic_id;</div><div class='add'>+			int		ioapic_pin;</div><div class='add'>+			int		ioapic_node;</div><div class='add'>+			u32		ioapic_trigger : 1;</div><div class='add'>+			u32		ioapic_polarity : 1;</div><div class='add'>+			u32		ioapic_valid : 1;</div><div class='add'>+			struct IO_APIC_route_entry *ioapic_entry;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+#ifdef	CONFIG_DMAR_TABLE</div><div class='add'>+		struct {</div><div class='add'>+			int		dmar_id;</div><div class='add'>+			void		*dmar_data;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+#ifdef	CONFIG_HT_IRQ</div><div class='add'>+		struct {</div><div class='add'>+			int		ht_pos;</div><div class='add'>+			int		ht_idx;</div><div class='add'>+			struct pci_dev	*ht_dev;</div><div class='add'>+			void		*ht_update;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+#ifdef	CONFIG_X86_UV</div><div class='add'>+		struct {</div><div class='add'>+			int		uv_limit;</div><div class='add'>+			int		uv_blade;</div><div class='add'>+			unsigned long	uv_offset;</div><div class='add'>+			char		*uv_name;</div><div class='ctx'> 		};</div><div class='ctx'> #endif</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct irq_cfg {</div><div class='add'>+	unsigned int		dest_apicid;</div><div class='add'>+	u8			vector;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> extern struct irq_cfg *irq_cfg(unsigned int irq);</div><div class='ctx'> extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);</div><div class='del'>-extern struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node);</div><div class='ctx'> extern void lock_vector_lock(void);</div><div class='ctx'> extern void unlock_vector_lock(void);</div><div class='del'>-extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);</div><div class='del'>-extern void clear_irq_vector(int irq, struct irq_cfg *cfg);</div><div class='ctx'> extern void setup_vector_irq(int cpu);</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> extern void send_cleanup_vector(struct irq_cfg *);</div><div class='hunk'>@@ -150,10 +151,7 @@ static inline void send_cleanup_vector(struct irq_cfg *c) { }</div><div class='ctx'> static inline void irq_complete_move(struct irq_cfg *c) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern int apic_retrigger_irq(struct irq_data *data);</div><div class='ctx'> extern void apic_ack_edge(struct irq_data *data);</div><div class='del'>-extern int apic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-			     unsigned int *dest_id);</div><div class='ctx'> #else	/*  CONFIG_X86_LOCAL_APIC */</div><div class='ctx'> static inline void lock_vector_lock(void) {}</div><div class='ctx'> static inline void unlock_vector_lock(void) {}</div><div class='hunk'>@@ -163,8 +161,7 @@ static inline void unlock_vector_lock(void) {}</div><div class='ctx'> extern atomic_t irq_err_count;</div><div class='ctx'> extern atomic_t irq_mis_count;</div><div class='ctx'> </div><div class='del'>-/* EISA */</div><div class='del'>-extern void eisa_set_level_irq(unsigned int irq);</div><div class='add'>+extern void elcr_set_level_irq(unsigned int irq);</div><div class='ctx'> </div><div class='ctx'> /* SMP */</div><div class='ctx'> extern __visible void smp_apic_timer_interrupt(struct pt_regs *);</div><div class='hunk'>@@ -178,7 +175,6 @@ extern asmlinkage void smp_irq_move_cleanup_interrupt(void);</div><div class='ctx'> extern __visible void smp_reschedule_interrupt(struct pt_regs *);</div><div class='ctx'> extern __visible void smp_call_function_interrupt(struct pt_regs *);</div><div class='ctx'> extern __visible void smp_call_function_single_interrupt(struct pt_regs *);</div><div class='del'>-extern __visible void smp_invalidate_interrupt(struct pt_regs *);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern char irq_entries_start[];</div><div class='head'>diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h<br/>deleted file mode 100644<br/>index 6eb6fcb83f63..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/i387.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/i387.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,108 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 1994 Linus Torvalds</div><div class='del'>- *</div><div class='del'>- * Pentium III FXSR, SSE support</div><div class='del'>- * General FPU state handling cleanups</div><div class='del'>- *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='del'>- * x86-64 work by Andi Kleen 2002</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_X86_I387_H</div><div class='del'>-#define _ASM_X86_I387_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='del'>-</div><div class='del'>-struct pt_regs;</div><div class='del'>-struct user_i387_struct;</div><div class='del'>-</div><div class='del'>-extern int init_fpu(struct task_struct *child);</div><div class='del'>-extern void fpu_finit(struct fpu *fpu);</div><div class='del'>-extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);</div><div class='del'>-extern void math_state_restore(void);</div><div class='del'>-</div><div class='del'>-extern bool irq_fpu_usable(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Careful: __kernel_fpu_begin/end() must be called with preempt disabled</div><div class='del'>- * and they don't touch the preempt state on their own.</div><div class='del'>- * If you enable preemption after __kernel_fpu_begin(), preempt notifier</div><div class='del'>- * should call the __kernel_fpu_end() to prevent the kernel/user FPU</div><div class='del'>- * state from getting corrupted. KVM for example uses this model.</div><div class='del'>- *</div><div class='del'>- * All other cases use kernel_fpu_begin/end() which disable preemption</div><div class='del'>- * during kernel FPU usage.</div><div class='del'>- */</div><div class='del'>-extern void __kernel_fpu_begin(void);</div><div class='del'>-extern void __kernel_fpu_end(void);</div><div class='del'>-</div><div class='del'>-static inline void kernel_fpu_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	WARN_ON_ONCE(!irq_fpu_usable());</div><div class='del'>-	__kernel_fpu_begin();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void kernel_fpu_end(void)</div><div class='del'>-{</div><div class='del'>-	__kernel_fpu_end();</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with preempt disabled */</div><div class='del'>-extern void kernel_fpu_disable(void);</div><div class='del'>-extern void kernel_fpu_enable(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Some instructions like VIA's padlock instructions generate a spurious</div><div class='del'>- * DNA fault but don't modify SSE registers. And these instructions</div><div class='del'>- * get used from interrupt context as well. To prevent these kernel instructions</div><div class='del'>- * in interrupt context interacting wrongly with other user/kernel fpu usage, we</div><div class='del'>- * should use them only in the context of irq_ts_save/restore()</div><div class='del'>- */</div><div class='del'>-static inline int irq_ts_save(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * If in process context and not atomic, we can take a spurious DNA fault.</div><div class='del'>-	 * Otherwise, doing clts() in process context requires disabling preemption</div><div class='del'>-	 * or some heavy lifting like kernel_fpu_begin()</div><div class='del'>-	 */</div><div class='del'>-	if (!in_atomic())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (read_cr0() &amp; X86_CR0_TS) {</div><div class='del'>-		clts();</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void irq_ts_restore(int TS_state)</div><div class='del'>-{</div><div class='del'>-	if (TS_state)</div><div class='del'>-		stts();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The question "does this thread have fpu access?"</div><div class='del'>- * is slightly racy, since preemption could come in</div><div class='del'>- * and revoke it immediately after the test.</div><div class='del'>- *</div><div class='del'>- * However, even in that very unlikely scenario,</div><div class='del'>- * we can just assume we have FPU access - typically</div><div class='del'>- * to save the FP state - we'll just take a #NM</div><div class='del'>- * fault and get the FPU access back.</div><div class='del'>- */</div><div class='del'>-static inline int user_has_fpu(void)</div><div class='del'>-{</div><div class='del'>-	return current-&gt;thread.fpu.has_fpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern void unlazy_fpu(struct task_struct *tsk);</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_I387_H */</div><div class='head'>diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h<br/>new file mode 100644<br/>index 000000000000..cd0310e186f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/intel_pmc_ipc.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/intel_pmc_ipc.h</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+#ifndef _ASM_X86_INTEL_PMC_IPC_H_</div><div class='add'>+#define  _ASM_X86_INTEL_PMC_IPC_H_</div><div class='add'>+</div><div class='add'>+/* Commands */</div><div class='add'>+#define PMC_IPC_PMIC_ACCESS		0xFF</div><div class='add'>+#define		PMC_IPC_PMIC_ACCESS_READ	0x0</div><div class='add'>+#define		PMC_IPC_PMIC_ACCESS_WRITE	0x1</div><div class='add'>+#define PMC_IPC_USB_PWR_CTRL		0xF0</div><div class='add'>+#define PMC_IPC_PMIC_BLACKLIST_SEL	0xEF</div><div class='add'>+#define PMC_IPC_PHY_CONFIG		0xEE</div><div class='add'>+#define PMC_IPC_NORTHPEAK_CTRL		0xED</div><div class='add'>+#define PMC_IPC_PM_DEBUG		0xEC</div><div class='add'>+#define PMC_IPC_PMC_TELEMTRY		0xEB</div><div class='add'>+#define PMC_IPC_PMC_FW_MSG_CTRL		0xEA</div><div class='add'>+</div><div class='add'>+/* IPC return code */</div><div class='add'>+#define IPC_ERR_NONE			0</div><div class='add'>+#define IPC_ERR_CMD_NOT_SUPPORTED	1</div><div class='add'>+#define IPC_ERR_CMD_NOT_SERVICED	2</div><div class='add'>+#define IPC_ERR_UNABLE_TO_SERVICE	3</div><div class='add'>+#define IPC_ERR_CMD_INVALID		4</div><div class='add'>+#define IPC_ERR_CMD_FAILED		5</div><div class='add'>+#define IPC_ERR_EMSECURITY		6</div><div class='add'>+#define IPC_ERR_UNSIGNEDKERNEL		7</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_INTEL_PMC_IPC)</div><div class='add'>+</div><div class='add'>+int intel_pmc_ipc_simple_command(int cmd, int sub);</div><div class='add'>+int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,</div><div class='add'>+		u32 *out, u32 outlen, u32 dptr, u32 sptr);</div><div class='add'>+int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,</div><div class='add'>+		u32 *out, u32 outlen);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int intel_pmc_ipc_simple_command(int cmd, int sub)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,</div><div class='add'>+		u32 *out, u32 outlen, u32 dptr, u32 sptr)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,</div><div class='add'>+		u32 *out, u32 outlen)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /*CONFIG_INTEL_PMC_IPC*/</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h<br/>index 34a5b93704d3..cc9c61bc1abe 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/io.h</a></div><div class='hunk'>@@ -35,11 +35,13 @@</div><div class='ctx'>   */</div><div class='ctx'> </div><div class='ctx'> #define ARCH_HAS_IOREMAP_WC</div><div class='add'>+#define ARCH_HAS_IOREMAP_WT</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/early_ioremap.h&gt;</div><div class='add'>+#include &lt;asm/pgtable_types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define build_mmio_read(name, size, type, reg, barrier) \</div><div class='ctx'> static inline type name(const volatile void __iomem *addr) \</div><div class='hunk'>@@ -177,6 +179,7 @@ static inline unsigned int isa_virt_to_bus(volatile void *address)</div><div class='ctx'>  * look at pci_iomap().</div><div class='ctx'>  */</div><div class='ctx'> extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);</div><div class='add'>+extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);</div><div class='ctx'> extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);</div><div class='ctx'> extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,</div><div class='ctx'> 				unsigned long prot_val);</div><div class='hunk'>@@ -197,8 +200,6 @@ extern void set_iounmap_nonlazy(void);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/iomap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Convert a virtual cached pointer to an uncached pointer</div><div class='ctx'>  */</div><div class='hunk'>@@ -247,6 +248,12 @@ static inline void flush_write_buffers(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void __pmem *arch_memremap_pmem(resource_size_t offset,</div><div class='add'>+	unsigned long size)</div><div class='add'>+{</div><div class='add'>+	return (void __force __pmem *) ioremap_cache(offset, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='ctx'> extern void native_io_delay(void);</div><div class='hunk'>@@ -320,6 +327,7 @@ extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);</div><div class='ctx'> extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,</div><div class='ctx'> 				enum page_cache_mode pcm);</div><div class='ctx'> extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);</div><div class='add'>+extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);</div><div class='ctx'> </div><div class='ctx'> extern bool is_early_ioremap_ptep(pte_t *ptep);</div><div class='ctx'> </div><div class='hunk'>@@ -338,6 +346,9 @@ extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,</div><div class='ctx'> #define IO_SPACE_LIMIT 0xffff</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MTRR</div><div class='add'>+extern int __must_check arch_phys_wc_index(int handle);</div><div class='add'>+#define arch_phys_wc_index arch_phys_wc_index</div><div class='add'>+</div><div class='ctx'> extern int __must_check arch_phys_wc_add(unsigned long base,</div><div class='ctx'> 					 unsigned long size);</div><div class='ctx'> extern void arch_phys_wc_del(int handle);</div><div class='head'>diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h<br/>index 2f91685fe1cd..6cbf2cfb3f8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/io_apic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/io_apic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/io_apic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/io_apic.h</a></div><div class='hunk'>@@ -95,9 +95,22 @@ struct IR_IO_APIC_route_entry {</div><div class='ctx'> 		index		: 15;</div><div class='ctx'> } __attribute__ ((packed));</div><div class='ctx'> </div><div class='del'>-#define IOAPIC_AUTO     -1</div><div class='del'>-#define IOAPIC_EDGE     0</div><div class='del'>-#define IOAPIC_LEVEL    1</div><div class='add'>+struct irq_alloc_info;</div><div class='add'>+struct ioapic_domain_cfg;</div><div class='add'>+</div><div class='add'>+#define IOAPIC_AUTO			-1</div><div class='add'>+#define IOAPIC_EDGE			0</div><div class='add'>+#define IOAPIC_LEVEL			1</div><div class='add'>+</div><div class='add'>+#define IOAPIC_MASKED			1</div><div class='add'>+#define IOAPIC_UNMASKED			0</div><div class='add'>+</div><div class='add'>+#define IOAPIC_POL_HIGH			0</div><div class='add'>+#define IOAPIC_POL_LOW			1</div><div class='add'>+</div><div class='add'>+#define IOAPIC_DEST_MODE_PHYSICAL	0</div><div class='add'>+#define IOAPIC_DEST_MODE_LOGICAL	1</div><div class='add'>+</div><div class='ctx'> #define	IOAPIC_MAP_ALLOC		0x1</div><div class='ctx'> #define	IOAPIC_MAP_CHECK		0x2</div><div class='ctx'> </div><div class='hunk'>@@ -110,9 +123,6 @@ extern int nr_ioapics;</div><div class='ctx'> </div><div class='ctx'> extern int mpc_ioapic_id(int ioapic);</div><div class='ctx'> extern unsigned int mpc_ioapic_addr(int ioapic);</div><div class='del'>-extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);</div><div class='del'>-</div><div class='del'>-#define MP_MAX_IOAPIC_PIN 127</div><div class='ctx'> </div><div class='ctx'> /* # of MP IRQ source entries */</div><div class='ctx'> extern int mp_irq_entries;</div><div class='hunk'>@@ -120,9 +130,6 @@ extern int mp_irq_entries;</div><div class='ctx'> /* MP IRQ source entries */</div><div class='ctx'> extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];</div><div class='ctx'> </div><div class='del'>-/* Older SiS APIC requires we rewrite the index register */</div><div class='del'>-extern int sis_apic_bug;</div><div class='del'>-</div><div class='ctx'> /* 1 if "noapic" boot option passed */</div><div class='ctx'> extern int skip_ioapic_setup;</div><div class='ctx'> </div><div class='hunk'>@@ -132,6 +139,8 @@ extern int noioapicquirk;</div><div class='ctx'> /* -1 if "noapic" boot option passed */</div><div class='ctx'> extern int noioapicreroute;</div><div class='ctx'> </div><div class='add'>+extern u32 gsi_top;</div><div class='add'>+</div><div class='ctx'> extern unsigned long io_apic_irqs;</div><div class='ctx'> </div><div class='ctx'> #define IO_APIC_IRQ(x) (((x) &gt;= NR_IRQS_LEGACY) || ((1 &lt;&lt; (x)) &amp; io_apic_irqs))</div><div class='hunk'>@@ -147,13 +156,6 @@ struct irq_cfg;</div><div class='ctx'> extern void ioapic_insert_resources(void);</div><div class='ctx'> extern int arch_early_ioapic_init(void);</div><div class='ctx'> </div><div class='del'>-extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,</div><div class='del'>-				     unsigned int, int,</div><div class='del'>-				     struct io_apic_irq_attr *);</div><div class='del'>-extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);</div><div class='del'>-</div><div class='del'>-extern void native_eoi_ioapic_pin(int apic, int pin, int vector);</div><div class='del'>-</div><div class='ctx'> extern int save_ioapic_entries(void);</div><div class='ctx'> extern void mask_ioapic_entries(void);</div><div class='ctx'> extern int restore_ioapic_entries(void);</div><div class='hunk'>@@ -161,82 +163,32 @@ extern int restore_ioapic_entries(void);</div><div class='ctx'> extern void setup_ioapic_ids_from_mpc(void);</div><div class='ctx'> extern void setup_ioapic_ids_from_mpc_nocheck(void);</div><div class='ctx'> </div><div class='del'>-struct io_apic_irq_attr {</div><div class='del'>-	int ioapic;</div><div class='del'>-	int ioapic_pin;</div><div class='del'>-	int trigger;</div><div class='del'>-	int polarity;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum ioapic_domain_type {</div><div class='del'>-	IOAPIC_DOMAIN_INVALID,</div><div class='del'>-	IOAPIC_DOMAIN_LEGACY,</div><div class='del'>-	IOAPIC_DOMAIN_STRICT,</div><div class='del'>-	IOAPIC_DOMAIN_DYNAMIC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct device_node;</div><div class='del'>-struct irq_domain;</div><div class='del'>-struct irq_domain_ops;</div><div class='del'>-</div><div class='del'>-struct ioapic_domain_cfg {</div><div class='del'>-	enum ioapic_domain_type		type;</div><div class='del'>-	const struct irq_domain_ops	*ops;</div><div class='del'>-	struct device_node		*dev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mp_ioapic_gsi{</div><div class='del'>-	u32 gsi_base;</div><div class='del'>-	u32 gsi_end;</div><div class='del'>-};</div><div class='del'>-extern u32 gsi_top;</div><div class='del'>-</div><div class='ctx'> extern int mp_find_ioapic(u32 gsi);</div><div class='ctx'> extern int mp_find_ioapic_pin(int ioapic, u32 gsi);</div><div class='del'>-extern u32 mp_pin_to_gsi(int ioapic, int pin);</div><div class='del'>-extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);</div><div class='add'>+extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,</div><div class='add'>+			     struct irq_alloc_info *info);</div><div class='ctx'> extern void mp_unmap_irq(int irq);</div><div class='ctx'> extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,</div><div class='ctx'> 			      struct ioapic_domain_cfg *cfg);</div><div class='ctx'> extern int mp_unregister_ioapic(u32 gsi_base);</div><div class='ctx'> extern int mp_ioapic_registered(u32 gsi_base);</div><div class='del'>-extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,</div><div class='del'>-			    irq_hw_number_t hwirq);</div><div class='del'>-extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);</div><div class='del'>-extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);</div><div class='del'>-extern void __init pre_init_apic_IRQ0(void);</div><div class='add'>+</div><div class='add'>+extern void ioapic_set_alloc_attr(struct irq_alloc_info *info,</div><div class='add'>+				  int node, int trigger, int polarity);</div><div class='ctx'> </div><div class='ctx'> extern void mp_save_irq(struct mpc_intsrc *m);</div><div class='ctx'> </div><div class='ctx'> extern void disable_ioapic_support(void);</div><div class='ctx'> </div><div class='del'>-extern void __init native_io_apic_init_mappings(void);</div><div class='add'>+extern void __init io_apic_init_mappings(void);</div><div class='ctx'> extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);</div><div class='del'>-extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);</div><div class='del'>-extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);</div><div class='ctx'> extern void native_disable_io_apic(void);</div><div class='del'>-extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);</div><div class='del'>-extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);</div><div class='del'>-extern int native_ioapic_set_affinity(struct irq_data *,</div><div class='del'>-				      const struct cpumask *,</div><div class='del'>-				      bool);</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)</div><div class='ctx'> {</div><div class='ctx'> 	return x86_io_apic_ops.read(apic, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	x86_io_apic_ops.write(apic, reg, value);</div><div class='del'>-}</div><div class='del'>-static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	x86_io_apic_ops.modify(apic, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern void io_apic_eoi(unsigned int apic, unsigned int vector);</div><div class='del'>-</div><div class='ctx'> extern void setup_IO_APIC(void);</div><div class='ctx'> extern void enable_IO_APIC(void);</div><div class='ctx'> extern void disable_IO_APIC(void);</div><div class='hunk'>@@ -253,8 +205,12 @@ static inline int arch_early_ioapic_init(void) { return 0; }</div><div class='ctx'> static inline void print_IO_APICs(void) {}</div><div class='ctx'> #define gsi_top (NR_IRQS_LEGACY)</div><div class='ctx'> static inline int mp_find_ioapic(u32 gsi) { return 0; }</div><div class='del'>-static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }</div><div class='del'>-static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }</div><div class='add'>+static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,</div><div class='add'>+				    struct irq_alloc_info *info)</div><div class='add'>+{</div><div class='add'>+	return gsi;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mp_unmap_irq(int irq) { }</div><div class='ctx'> </div><div class='ctx'> static inline int save_ioapic_entries(void)</div><div class='hunk'>@@ -268,17 +224,11 @@ static inline int restore_ioapic_entries(void)</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void mp_save_irq(struct mpc_intsrc *m) { };</div><div class='add'>+static inline void mp_save_irq(struct mpc_intsrc *m) { }</div><div class='ctx'> static inline void disable_ioapic_support(void) { }</div><div class='del'>-#define native_io_apic_init_mappings	NULL</div><div class='add'>+static inline void io_apic_init_mappings(void) { }</div><div class='ctx'> #define native_io_apic_read		NULL</div><div class='del'>-#define native_io_apic_write		NULL</div><div class='del'>-#define native_io_apic_modify		NULL</div><div class='ctx'> #define native_disable_io_apic		NULL</div><div class='del'>-#define native_io_apic_print_entries	NULL</div><div class='del'>-#define native_ioapic_set_affinity	NULL</div><div class='del'>-#define native_setup_ioapic_entry	NULL</div><div class='del'>-#define native_eoi_ioapic_pin		NULL</div><div class='ctx'> </div><div class='ctx'> static inline void setup_IO_APIC(void) { }</div><div class='ctx'> static inline void enable_IO_APIC(void) { }</div><div class='head'>diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h<br/>index a80cbb88ea91..8008d06581c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/irq.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irq.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq.h</a></div><div class='hunk'>@@ -30,6 +30,10 @@ extern void fixup_irqs(void);</div><div class='ctx'> extern void irq_force_complete_move(int);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_KVM</div><div class='add'>+extern void kvm_set_posted_intr_wakeup_handler(void (*handler)(void));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern void (*x86_platform_ipi_callback)(void);</div><div class='ctx'> extern void native_init_IRQ(void);</div><div class='ctx'> extern bool handle_irq(unsigned irq, struct pt_regs *regs);</div><div class='head'>diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h<br/>index 6224d316c405..046c7fb1ca43 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/irq_remapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/irq_remapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irq_remapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq_remapping.h</a></div><div class='hunk'>@@ -22,84 +22,72 @@</div><div class='ctx'> #ifndef __X86_IRQ_REMAPPING_H</div><div class='ctx'> #define __X86_IRQ_REMAPPING_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='add'>+#include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='ctx'> </div><div class='del'>-struct IO_APIC_route_entry;</div><div class='del'>-struct io_apic_irq_attr;</div><div class='del'>-struct irq_chip;</div><div class='ctx'> struct msi_msg;</div><div class='del'>-struct pci_dev;</div><div class='del'>-struct irq_cfg;</div><div class='add'>+struct irq_alloc_info;</div><div class='add'>+</div><div class='add'>+enum irq_remap_cap {</div><div class='add'>+	IRQ_POSTING_CAP = 0,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IRQ_REMAP</div><div class='ctx'> </div><div class='add'>+extern bool irq_remapping_cap(enum irq_remap_cap cap);</div><div class='ctx'> extern void set_irq_remapping_broken(void);</div><div class='ctx'> extern int irq_remapping_prepare(void);</div><div class='ctx'> extern int irq_remapping_enable(void);</div><div class='ctx'> extern void irq_remapping_disable(void);</div><div class='ctx'> extern int irq_remapping_reenable(int);</div><div class='ctx'> extern int irq_remap_enable_fault_handling(void);</div><div class='del'>-extern int setup_ioapic_remapped_entry(int irq,</div><div class='del'>-				       struct IO_APIC_route_entry *entry,</div><div class='del'>-				       unsigned int destination,</div><div class='del'>-				       int vector,</div><div class='del'>-				       struct io_apic_irq_attr *attr);</div><div class='del'>-extern void free_remapped_irq(int irq);</div><div class='del'>-extern void compose_remapped_msi_msg(struct pci_dev *pdev,</div><div class='del'>-				     unsigned int irq, unsigned int dest,</div><div class='del'>-				     struct msi_msg *msg, u8 hpet_id);</div><div class='del'>-extern int setup_hpet_msi_remapped(unsigned int irq, unsigned int id);</div><div class='ctx'> extern void panic_if_irq_remap(const char *msg);</div><div class='del'>-extern bool setup_remapped_irq(int irq,</div><div class='del'>-			       struct irq_cfg *cfg,</div><div class='del'>-			       struct irq_chip *chip);</div><div class='ctx'> </div><div class='del'>-void irq_remap_modify_chip_defaults(struct irq_chip *chip);</div><div class='add'>+extern struct irq_domain *</div><div class='add'>+irq_remapping_get_ir_irq_domain(struct irq_alloc_info *info);</div><div class='add'>+extern struct irq_domain *</div><div class='add'>+irq_remapping_get_irq_domain(struct irq_alloc_info *info);</div><div class='add'>+</div><div class='add'>+/* Create PCI MSI/MSIx irqdomain, use @parent as the parent irqdomain. */</div><div class='add'>+extern struct irq_domain *arch_create_msi_irq_domain(struct irq_domain *parent);</div><div class='add'>+</div><div class='add'>+/* Get parent irqdomain for interrupt remapping irqdomain */</div><div class='add'>+static inline struct irq_domain *arch_get_ir_parent_domain(void)</div><div class='add'>+{</div><div class='add'>+	return x86_vector_domain;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct vcpu_data {</div><div class='add'>+	u64 pi_desc_addr;	/* Physical address of PI Descriptor */</div><div class='add'>+	u32 vector;		/* Guest vector of the interrupt */</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> #else  /* CONFIG_IRQ_REMAP */</div><div class='ctx'> </div><div class='add'>+static inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; }</div><div class='ctx'> static inline void set_irq_remapping_broken(void) { }</div><div class='ctx'> static inline int irq_remapping_prepare(void) { return -ENODEV; }</div><div class='ctx'> static inline int irq_remapping_enable(void) { return -ENODEV; }</div><div class='ctx'> static inline void irq_remapping_disable(void) { }</div><div class='ctx'> static inline int irq_remapping_reenable(int eim) { return -ENODEV; }</div><div class='ctx'> static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; }</div><div class='del'>-static inline int setup_ioapic_remapped_entry(int irq,</div><div class='del'>-					      struct IO_APIC_route_entry *entry,</div><div class='del'>-					      unsigned int destination,</div><div class='del'>-					      int vector,</div><div class='del'>-					      struct io_apic_irq_attr *attr)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-static inline void free_remapped_irq(int irq) { }</div><div class='del'>-static inline void compose_remapped_msi_msg(struct pci_dev *pdev,</div><div class='del'>-					    unsigned int irq, unsigned int dest,</div><div class='del'>-					    struct msi_msg *msg, u8 hpet_id)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)</div><div class='del'>-{</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static inline void panic_if_irq_remap(const char *msg)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)</div><div class='add'>+static inline struct irq_domain *</div><div class='add'>+irq_remapping_get_ir_irq_domain(struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool setup_remapped_irq(int irq,</div><div class='del'>-				      struct irq_cfg *cfg,</div><div class='del'>-				      struct irq_chip *chip)</div><div class='add'>+static inline struct irq_domain *</div><div class='add'>+irq_remapping_get_irq_domain(struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='del'>-	return false;</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_IRQ_REMAP */</div><div class='del'>-</div><div class='del'>-#define dmar_alloc_hwirq()	irq_alloc_hwirq(-1)</div><div class='del'>-#define dmar_free_hwirq		irq_free_hwirq</div><div class='ctx'> </div><div class='add'>+#endif /* CONFIG_IRQ_REMAP */</div><div class='ctx'> #endif /* __X86_IRQ_REMAPPING_H */</div><div class='head'>diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h<br/>index 666c89ec4bd7..4c2d2eb2060a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/irq_vectors.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/irq_vectors.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irq_vectors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irq_vectors.h</a></div><div class='hunk'>@@ -47,31 +47,12 @@</div><div class='ctx'> #define IRQ_MOVE_CLEANUP_VECTOR		FIRST_EXTERNAL_VECTOR</div><div class='ctx'> </div><div class='ctx'> #define IA32_SYSCALL_VECTOR		0x80</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-# define SYSCALL_VECTOR			0x80</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Vectors 0x30-0x3f are used for ISA interrupts.</div><div class='ctx'>  *   round up to the next 16-vector boundary</div><div class='ctx'>  */</div><div class='del'>-#define IRQ0_VECTOR			((FIRST_EXTERNAL_VECTOR + 16) &amp; ~15)</div><div class='del'>-</div><div class='del'>-#define IRQ1_VECTOR			(IRQ0_VECTOR +  1)</div><div class='del'>-#define IRQ2_VECTOR			(IRQ0_VECTOR +  2)</div><div class='del'>-#define IRQ3_VECTOR			(IRQ0_VECTOR +  3)</div><div class='del'>-#define IRQ4_VECTOR			(IRQ0_VECTOR +  4)</div><div class='del'>-#define IRQ5_VECTOR			(IRQ0_VECTOR +  5)</div><div class='del'>-#define IRQ6_VECTOR			(IRQ0_VECTOR +  6)</div><div class='del'>-#define IRQ7_VECTOR			(IRQ0_VECTOR +  7)</div><div class='del'>-#define IRQ8_VECTOR			(IRQ0_VECTOR +  8)</div><div class='del'>-#define IRQ9_VECTOR			(IRQ0_VECTOR +  9)</div><div class='del'>-#define IRQ10_VECTOR			(IRQ0_VECTOR + 10)</div><div class='del'>-#define IRQ11_VECTOR			(IRQ0_VECTOR + 11)</div><div class='del'>-#define IRQ12_VECTOR			(IRQ0_VECTOR + 12)</div><div class='del'>-#define IRQ13_VECTOR			(IRQ0_VECTOR + 13)</div><div class='del'>-#define IRQ14_VECTOR			(IRQ0_VECTOR + 14)</div><div class='del'>-#define IRQ15_VECTOR			(IRQ0_VECTOR + 15)</div><div class='add'>+#define ISA_IRQ_VECTOR(irq)		(((FIRST_EXTERNAL_VECTOR + 16) &amp; ~15) + irq)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff</div><div class='hunk'>@@ -102,21 +83,23 @@</div><div class='ctx'>  */</div><div class='ctx'> #define X86_PLATFORM_IPI_VECTOR		0xf7</div><div class='ctx'> </div><div class='del'>-/* Vector for KVM to deliver posted interrupt IPI */</div><div class='del'>-#ifdef CONFIG_HAVE_KVM</div><div class='del'>-#define POSTED_INTR_VECTOR		0xf2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+#define POSTED_INTR_WAKEUP_VECTOR	0xf1</div><div class='ctx'> /*</div><div class='ctx'>  * IRQ work vector:</div><div class='ctx'>  */</div><div class='ctx'> #define IRQ_WORK_VECTOR			0xf6</div><div class='ctx'> </div><div class='ctx'> #define UV_BAU_MESSAGE			0xf5</div><div class='add'>+#define DEFERRED_ERROR_VECTOR		0xf4</div><div class='ctx'> </div><div class='ctx'> /* Vector on which hypervisor callbacks will be delivered */</div><div class='ctx'> #define HYPERVISOR_CALLBACK_VECTOR	0xf3</div><div class='ctx'> </div><div class='add'>+/* Vector for KVM to deliver posted interrupt IPI */</div><div class='add'>+#ifdef CONFIG_HAVE_KVM</div><div class='add'>+#define POSTED_INTR_VECTOR		0xf2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Local APIC timer IRQ vector is on a different priority level,</div><div class='ctx'>  * to work around the 'lost local interrupt if more than 2 IRQ</div><div class='hunk'>@@ -155,18 +138,22 @@ static inline int invalid_vm86_irq(int irq)</div><div class='ctx'>  * static arrays.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define NR_IRQS_LEGACY			  16</div><div class='add'>+#define NR_IRQS_LEGACY			16</div><div class='ctx'> </div><div class='del'>-#define IO_APIC_VECTOR_LIMIT		( 32 * MAX_IO_APICS )</div><div class='add'>+#define CPU_VECTOR_LIMIT		(64 * NR_CPUS)</div><div class='add'>+#define IO_APIC_VECTOR_LIMIT		(32 * MAX_IO_APICS)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_IO_APIC</div><div class='del'>-# define CPU_VECTOR_LIMIT		(64 * NR_CPUS)</div><div class='del'>-# define NR_IRQS					\</div><div class='add'>+#if defined(CONFIG_X86_IO_APIC) &amp;&amp; defined(CONFIG_PCI_MSI)</div><div class='add'>+#define NR_IRQS						\</div><div class='ctx'> 	(CPU_VECTOR_LIMIT &gt; IO_APIC_VECTOR_LIMIT ?	\</div><div class='ctx'> 		(NR_VECTORS + CPU_VECTOR_LIMIT)  :	\</div><div class='ctx'> 		(NR_VECTORS + IO_APIC_VECTOR_LIMIT))</div><div class='del'>-#else /* !CONFIG_X86_IO_APIC: */</div><div class='del'>-# define NR_IRQS			NR_IRQS_LEGACY</div><div class='add'>+#elif defined(CONFIG_X86_IO_APIC)</div><div class='add'>+#define	NR_IRQS				(NR_VECTORS + IO_APIC_VECTOR_LIMIT)</div><div class='add'>+#elif defined(CONFIG_PCI_MSI)</div><div class='add'>+#define NR_IRQS				(NR_VECTORS + CPU_VECTOR_LIMIT)</div><div class='add'>+#else</div><div class='add'>+#define NR_IRQS				NR_IRQS_LEGACY</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_IRQ_VECTORS_H */</div><div class='head'>diff --git a/arch/x86/include/asm/irqdomain.h b/arch/x86/include/asm/irqdomain.h<br/>new file mode 100644<br/>index 000000000000..d26075b52885<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irqdomain.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/irqdomain.h</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+#ifndef _ASM_IRQDOMAIN_H</div><div class='add'>+#define _ASM_IRQDOMAIN_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;asm/hw_irq.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_LOCAL_APIC</div><div class='add'>+enum {</div><div class='add'>+	/* Allocate contiguous CPU vectors */</div><div class='add'>+	X86_IRQ_ALLOC_CONTIGUOUS_VECTORS		= 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct irq_domain *x86_vector_domain;</div><div class='add'>+</div><div class='add'>+extern void init_irq_alloc_info(struct irq_alloc_info *info,</div><div class='add'>+				const struct cpumask *mask);</div><div class='add'>+extern void copy_irq_alloc_info(struct irq_alloc_info *dst,</div><div class='add'>+				struct irq_alloc_info *src);</div><div class='add'>+#endif /* CONFIG_X86_LOCAL_APIC */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_IO_APIC</div><div class='add'>+struct device_node;</div><div class='add'>+struct irq_data;</div><div class='add'>+</div><div class='add'>+enum ioapic_domain_type {</div><div class='add'>+	IOAPIC_DOMAIN_INVALID,</div><div class='add'>+	IOAPIC_DOMAIN_LEGACY,</div><div class='add'>+	IOAPIC_DOMAIN_STRICT,</div><div class='add'>+	IOAPIC_DOMAIN_DYNAMIC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ioapic_domain_cfg {</div><div class='add'>+	enum ioapic_domain_type		type;</div><div class='add'>+	const struct irq_domain_ops	*ops;</div><div class='add'>+	struct device_node		*dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct irq_domain_ops mp_ioapic_irqdomain_ops;</div><div class='add'>+</div><div class='add'>+extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			      unsigned int nr_irqs, void *arg);</div><div class='add'>+extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			      unsigned int nr_irqs);</div><div class='add'>+extern void mp_irqdomain_activate(struct irq_domain *domain,</div><div class='add'>+				  struct irq_data *irq_data);</div><div class='add'>+extern void mp_irqdomain_deactivate(struct irq_domain *domain,</div><div class='add'>+				    struct irq_data *irq_data);</div><div class='add'>+extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);</div><div class='add'>+#endif /* CONFIG_X86_IO_APIC */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+extern void arch_init_msi_domain(struct irq_domain *domain);</div><div class='add'>+#else</div><div class='add'>+static inline void arch_init_msi_domain(struct irq_domain *domain) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HT_IRQ</div><div class='add'>+extern void arch_init_htirq_domain(struct irq_domain *domain);</div><div class='add'>+#else</div><div class='add'>+static inline void arch_init_htirq_domain(struct irq_domain *domain) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/kasan.h b/arch/x86/include/asm/kasan.h<br/>index 8b22422fbad8..74a2a8dc9908 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kasan.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/kasan.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kasan.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kasan.h</a></div><div class='hunk'>@@ -14,15 +14,11 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-extern pte_t kasan_zero_pte[];</div><div class='del'>-extern pte_t kasan_zero_pmd[];</div><div class='del'>-extern pte_t kasan_zero_pud[];</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_KASAN</div><div class='del'>-void __init kasan_map_early_shadow(pgd_t *pgd);</div><div class='add'>+void __init kasan_early_init(void);</div><div class='ctx'> void __init kasan_init(void);</div><div class='ctx'> #else</div><div class='del'>-static inline void kasan_map_early_shadow(pgd_t *pgd) { }</div><div class='add'>+static inline void kasan_early_init(void) { }</div><div class='ctx'> static inline void kasan_init(void) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h<br/>index 57a9d94fe160..e16466ec473c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_emulate.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/kvm_emulate.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_emulate.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kvm_emulate.h</a></div><div class='hunk'>@@ -193,6 +193,8 @@ struct x86_emulate_ops {</div><div class='ctx'> 	int (*cpl)(struct x86_emulate_ctxt *ctxt);</div><div class='ctx'> 	int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);</div><div class='ctx'> 	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);</div><div class='add'>+	u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);</div><div class='add'>+	void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);</div><div class='ctx'> 	int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);</div><div class='ctx'> 	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);</div><div class='ctx'> 	int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);</div><div class='hunk'>@@ -262,6 +264,11 @@ enum x86emul_mode {</div><div class='ctx'> 	X86EMUL_MODE_PROT64,	/* 64-bit (long) mode.    */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* These match some of the HF_* flags defined in kvm_host.h  */</div><div class='add'>+#define X86EMUL_GUEST_MASK           (1 &lt;&lt; 5) /* VCPU is in guest-mode */</div><div class='add'>+#define X86EMUL_SMM_MASK             (1 &lt;&lt; 6)</div><div class='add'>+#define X86EMUL_SMM_INSIDE_NMI_MASK  (1 &lt;&lt; 7)</div><div class='add'>+</div><div class='ctx'> struct x86_emulate_ctxt {</div><div class='ctx'> 	const struct x86_emulate_ops *ops;</div><div class='ctx'> </div><div class='hunk'>@@ -273,8 +280,8 @@ struct x86_emulate_ctxt {</div><div class='ctx'> </div><div class='ctx'> 	/* interruptibility state, as a result of execution of STI or MOV SS */</div><div class='ctx'> 	int interruptibility;</div><div class='add'>+	int emul_flags;</div><div class='ctx'> </div><div class='del'>-	bool guest_mode; /* guest running a nested guest */</div><div class='ctx'> 	bool perm_ok; /* do not check permissions if true */</div><div class='ctx'> 	bool ud;	/* inject an #UD if host doesn't support insn */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h<br/>index f4a555beef19..49ec9038ec14 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_host.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_host.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -184,23 +184,12 @@ struct kvm_mmu_memory_cache {</div><div class='ctx'> 	void *objects[KVM_NR_MEM_OBJS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * kvm_mmu_page_role, below, is defined as:</div><div class='del'>- *</div><div class='del'>- *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)</div><div class='del'>- *   bits 4:7 - page table level for this shadow (1-4)</div><div class='del'>- *   bits 8:9 - page table quadrant for 2-level guests</div><div class='del'>- *   bit   16 - direct mapping of virtual to physical mapping at gfn</div><div class='del'>- *              used for real mode and two-dimensional paging</div><div class='del'>- *   bits 17:19 - common access permissions for all ptes in this shadow page</div><div class='del'>- */</div><div class='ctx'> union kvm_mmu_page_role {</div><div class='ctx'> 	unsigned word;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		unsigned level:4;</div><div class='ctx'> 		unsigned cr4_pae:1;</div><div class='ctx'> 		unsigned quadrant:2;</div><div class='del'>-		unsigned pad_for_nice_hex_output:6;</div><div class='ctx'> 		unsigned direct:1;</div><div class='ctx'> 		unsigned access:3;</div><div class='ctx'> 		unsigned invalid:1;</div><div class='hunk'>@@ -208,6 +197,15 @@ union kvm_mmu_page_role {</div><div class='ctx'> 		unsigned cr0_wp:1;</div><div class='ctx'> 		unsigned smep_andnot_wp:1;</div><div class='ctx'> 		unsigned smap_andnot_wp:1;</div><div class='add'>+		unsigned :8;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * This is left at the top of the word so that</div><div class='add'>+		 * kvm_memslots_for_spte_role can extract it with a</div><div class='add'>+		 * simple shift.  While there is room, give it a whole</div><div class='add'>+		 * byte so it is also faster to load it from memory.</div><div class='add'>+		 */</div><div class='add'>+		unsigned smm:8;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -338,12 +336,28 @@ struct kvm_pmu {</div><div class='ctx'> 	u64 reprogram_pmi;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kvm_pmu_ops;</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	KVM_DEBUGREG_BP_ENABLED = 1,</div><div class='ctx'> 	KVM_DEBUGREG_WONT_EXIT = 2,</div><div class='ctx'> 	KVM_DEBUGREG_RELOAD = 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kvm_mtrr_range {</div><div class='add'>+	u64 base;</div><div class='add'>+	u64 mask;</div><div class='add'>+	struct list_head node;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_mtrr {</div><div class='add'>+	struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];</div><div class='add'>+	mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];</div><div class='add'>+	u64 deftype;</div><div class='add'>+</div><div class='add'>+	struct list_head head;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * rip and regs accesses must go through</div><div class='hunk'>@@ -368,6 +382,7 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	int32_t apic_arb_prio;</div><div class='ctx'> 	int mp_state;</div><div class='ctx'> 	u64 ia32_misc_enable_msr;</div><div class='add'>+	u64 smbase;</div><div class='ctx'> 	bool tpr_access_reporting;</div><div class='ctx'> 	u64 ia32_xss;</div><div class='ctx'> </div><div class='hunk'>@@ -471,8 +486,9 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */</div><div class='ctx'> 	unsigned nmi_pending; /* NMI queued after currently running handler */</div><div class='ctx'> 	bool nmi_injected;    /* Trying to inject an NMI this entry */</div><div class='add'>+	bool smi_pending;    /* SMI queued after currently running handler */</div><div class='ctx'> </div><div class='del'>-	struct mtrr_state_type mtrr_state;</div><div class='add'>+	struct kvm_mtrr mtrr_state;</div><div class='ctx'> 	u64 pat;</div><div class='ctx'> </div><div class='ctx'> 	unsigned switch_db_regs;</div><div class='hunk'>@@ -588,10 +604,12 @@ struct kvm_arch {</div><div class='ctx'> 	bool iommu_noncoherent;</div><div class='ctx'> #define __KVM_HAVE_ARCH_NONCOHERENT_DMA</div><div class='ctx'> 	atomic_t noncoherent_dma_count;</div><div class='add'>+#define __KVM_HAVE_ARCH_ASSIGNED_DEVICE</div><div class='add'>+	atomic_t assigned_device_count;</div><div class='ctx'> 	struct kvm_pic *vpic;</div><div class='ctx'> 	struct kvm_ioapic *vioapic;</div><div class='ctx'> 	struct kvm_pit *vpit;</div><div class='del'>-	int vapics_in_nmi_mode;</div><div class='add'>+	atomic_t vapics_in_nmi_mode;</div><div class='ctx'> 	struct mutex apic_map_lock;</div><div class='ctx'> 	struct kvm_apic_map *apic_map;</div><div class='ctx'> </div><div class='hunk'>@@ -637,6 +655,8 @@ struct kvm_arch {</div><div class='ctx'> 	#endif</div><div class='ctx'> </div><div class='ctx'> 	bool boot_vcpu_runs_old_kvmclock;</div><div class='add'>+</div><div class='add'>+	u64 disabled_quirks;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_vm_stat {</div><div class='hunk'>@@ -689,12 +709,13 @@ struct msr_data {</div><div class='ctx'> </div><div class='ctx'> struct kvm_lapic_irq {</div><div class='ctx'> 	u32 vector;</div><div class='del'>-	u32 delivery_mode;</div><div class='del'>-	u32 dest_mode;</div><div class='del'>-	u32 level;</div><div class='del'>-	u32 trig_mode;</div><div class='add'>+	u16 delivery_mode;</div><div class='add'>+	u16 dest_mode;</div><div class='add'>+	bool level;</div><div class='add'>+	u16 trig_mode;</div><div class='ctx'> 	u32 shorthand;</div><div class='ctx'> 	u32 dest_id;</div><div class='add'>+	bool msi_redir_hint;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_x86_ops {</div><div class='hunk'>@@ -706,19 +727,20 @@ struct kvm_x86_ops {</div><div class='ctx'> 	int (*hardware_setup)(void);               /* __init */</div><div class='ctx'> 	void (*hardware_unsetup)(void);            /* __exit */</div><div class='ctx'> 	bool (*cpu_has_accelerated_tpr)(void);</div><div class='add'>+	bool (*cpu_has_high_real_mode_segbase)(void);</div><div class='ctx'> 	void (*cpuid_update)(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/* Create, but do not attach this VCPU */</div><div class='ctx'> 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);</div><div class='ctx'> 	void (*vcpu_free)(struct kvm_vcpu *vcpu);</div><div class='del'>-	void (*vcpu_reset)(struct kvm_vcpu *vcpu);</div><div class='add'>+	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);</div><div class='ctx'> </div><div class='ctx'> 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);</div><div class='ctx'> 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);</div><div class='ctx'> 	void (*vcpu_put)(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> 	void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);</div><div class='del'>-	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);</div><div class='add'>+	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);</div><div class='ctx'> 	void (*get_segment)(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -836,6 +858,8 @@ struct kvm_x86_ops {</div><div class='ctx'> 	void (*enable_log_dirty_pt_masked)(struct kvm *kvm,</div><div class='ctx'> 					   struct kvm_memory_slot *slot,</div><div class='ctx'> 					   gfn_t offset, unsigned long mask);</div><div class='add'>+	/* pmu operations of sub-arch */</div><div class='add'>+	const struct kvm_pmu_ops *pmu_ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_arch_async_pf {</div><div class='hunk'>@@ -871,7 +895,7 @@ void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_mmu_slot_remove_write_access(struct kvm *kvm,</div><div class='ctx'> 				      struct kvm_memory_slot *memslot);</div><div class='ctx'> void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,</div><div class='del'>-					struct kvm_memory_slot *memslot);</div><div class='add'>+				   const struct kvm_memory_slot *memslot);</div><div class='ctx'> void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot);</div><div class='ctx'> void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,</div><div class='hunk'>@@ -882,7 +906,7 @@ void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *slot,</div><div class='ctx'> 				   gfn_t gfn_offset, unsigned long mask);</div><div class='ctx'> void kvm_mmu_zap_all(struct kvm *kvm);</div><div class='del'>-void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);</div><div class='add'>+void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);</div><div class='ctx'> unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);</div><div class='ctx'> void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);</div><div class='ctx'> </div><div class='hunk'>@@ -890,7 +914,6 @@ int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);</div><div class='ctx'> </div><div class='ctx'> int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> 			  const void *val, int bytes);</div><div class='del'>-u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);</div><div class='ctx'> </div><div class='ctx'> struct kvm_irq_mask_notifier {</div><div class='ctx'> 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);</div><div class='hunk'>@@ -938,7 +961,7 @@ static inline int emulate_instruction(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> void kvm_enable_efer_bits(u64);</div><div class='ctx'> bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);</div><div class='del'>-int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);</div><div class='add'>+int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> </div><div class='ctx'> struct x86_emulate_ctxt;</div><div class='hunk'>@@ -967,7 +990,7 @@ void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);</div><div class='ctx'> void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);</div><div class='ctx'> int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);</div><div class='ctx'> </div><div class='del'>-int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);</div><div class='add'>+int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='ctx'> </div><div class='ctx'> unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -1002,8 +1025,6 @@ void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);</div><div class='ctx'> </div><div class='ctx'> void kvm_inject_nmi(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='del'>-int fx_init(struct kvm_vcpu *vcpu);</div><div class='del'>-</div><div class='ctx'> void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> 		       const u8 *new, int bytes);</div><div class='ctx'> int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);</div><div class='hunk'>@@ -1112,6 +1133,14 @@ enum {</div><div class='ctx'> #define HF_NMI_MASK		(1 &lt;&lt; 3)</div><div class='ctx'> #define HF_IRET_MASK		(1 &lt;&lt; 4)</div><div class='ctx'> #define HF_GUEST_MASK		(1 &lt;&lt; 5) /* VCPU is in guest-mode */</div><div class='add'>+#define HF_SMM_MASK		(1 &lt;&lt; 6)</div><div class='add'>+#define HF_SMM_INSIDE_NMI_MASK	(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+#define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE</div><div class='add'>+#define KVM_ADDRESS_SPACE_NUM 2</div><div class='add'>+</div><div class='add'>+#define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)-&gt;arch.hflags &amp; HF_SMM_MASK ? 1 : 0)</div><div class='add'>+#define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Hardware virtualization extension instructions may fault if a</div><div class='hunk'>@@ -1146,7 +1175,7 @@ int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);</div><div class='ctx'> int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_cpu_get_interrupt(struct kvm_vcpu *v);</div><div class='del'>-void kvm_vcpu_reset(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);</div><div class='ctx'> void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,</div><div class='ctx'> 					   unsigned long address);</div><div class='hunk'>@@ -1170,16 +1199,9 @@ void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);</div><div class='ctx'> </div><div class='ctx'> int kvm_is_in_guest(void);</div><div class='ctx'> </div><div class='del'>-void kvm_pmu_init(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_pmu_destroy(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_pmu_reset(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);</div><div class='del'>-bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);</div><div class='del'>-int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);</div><div class='del'>-int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);</div><div class='del'>-int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc);</div><div class='del'>-int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);</div><div class='del'>-void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_deliver_pmi(struct kvm_vcpu *vcpu);</div><div class='add'>+int __x86_set_memory_region(struct kvm *kvm,</div><div class='add'>+			    const struct kvm_userspace_memory_region *mem);</div><div class='add'>+int x86_set_memory_region(struct kvm *kvm,</div><div class='add'>+			  const struct kvm_userspace_memory_region *mem);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_KVM_HOST_H */</div><div class='head'>diff --git a/arch/x86/include/asm/livepatch.h b/arch/x86/include/asm/livepatch.h<br/>index 2d29197bd2fb..19c099afa861 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/livepatch.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/livepatch.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/livepatch.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/livepatch.h</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #ifndef _ASM_X86_LIVEPATCH_H</div><div class='ctx'> #define _ASM_X86_LIVEPATCH_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h<br/>index 1f5a86d518db..982dfc3679ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mce.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/mce.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mce.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mce.h</a></div><div class='hunk'>@@ -17,11 +17,16 @@</div><div class='ctx'> #define MCG_EXT_CNT(c)		(((c) &amp; MCG_EXT_CNT_MASK) &gt;&gt; MCG_EXT_CNT_SHIFT)</div><div class='ctx'> #define MCG_SER_P		(1ULL&lt;&lt;24)   /* MCA recovery/new status bits */</div><div class='ctx'> #define MCG_ELOG_P		(1ULL&lt;&lt;26)   /* Extended error log supported */</div><div class='add'>+#define MCG_LMCE_P		(1ULL&lt;&lt;27)   /* Local machine check supported */</div><div class='ctx'> </div><div class='ctx'> /* MCG_STATUS register defines */</div><div class='ctx'> #define MCG_STATUS_RIPV  (1ULL&lt;&lt;0)   /* restart ip valid */</div><div class='ctx'> #define MCG_STATUS_EIPV  (1ULL&lt;&lt;1)   /* ip points to correct instruction */</div><div class='ctx'> #define MCG_STATUS_MCIP  (1ULL&lt;&lt;2)   /* machine check in progress */</div><div class='add'>+#define MCG_STATUS_LMCES (1ULL&lt;&lt;3)   /* LMCE signaled */</div><div class='add'>+</div><div class='add'>+/* MCG_EXT_CTL register defines */</div><div class='add'>+#define MCG_EXT_CTL_LMCE_EN (1ULL&lt;&lt;0) /* Enable LMCE */</div><div class='ctx'> </div><div class='ctx'> /* MCi_STATUS register defines */</div><div class='ctx'> #define MCI_STATUS_VAL   (1ULL&lt;&lt;63)  /* valid error */</div><div class='hunk'>@@ -104,6 +109,7 @@ struct mce_log {</div><div class='ctx'> struct mca_config {</div><div class='ctx'> 	bool dont_log_ce;</div><div class='ctx'> 	bool cmci_disabled;</div><div class='add'>+	bool lmce_disabled;</div><div class='ctx'> 	bool ignore_ce;</div><div class='ctx'> 	bool disabled;</div><div class='ctx'> 	bool ser;</div><div class='hunk'>@@ -117,8 +123,19 @@ struct mca_config {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mce_vendor_flags {</div><div class='del'>-	__u64		overflow_recov	: 1, /* cpuid_ebx(80000007) */</div><div class='del'>-			__reserved_0	: 63;</div><div class='add'>+			/*</div><div class='add'>+			 * overflow recovery cpuid bit indicates that overflow</div><div class='add'>+			 * conditions are not fatal</div><div class='add'>+			 */</div><div class='add'>+	__u64		overflow_recov	: 1,</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * SUCCOR stands for S/W UnCorrectable error COntainment</div><div class='add'>+			 * and Recovery. It indicates support for data poisoning</div><div class='add'>+			 * in HW and deferred error interrupts.</div><div class='add'>+			 */</div><div class='add'>+			succor		: 1,</div><div class='add'>+			__reserved_0	: 62;</div><div class='ctx'> };</div><div class='ctx'> extern struct mce_vendor_flags mce_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -168,12 +185,16 @@ void cmci_clear(void);</div><div class='ctx'> void cmci_reenable(void);</div><div class='ctx'> void cmci_rediscover(void);</div><div class='ctx'> void cmci_recheck(void);</div><div class='add'>+void lmce_clear(void);</div><div class='add'>+void lmce_enable(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }</div><div class='ctx'> static inline void cmci_clear(void) {}</div><div class='ctx'> static inline void cmci_reenable(void) {}</div><div class='ctx'> static inline void cmci_rediscover(void) {}</div><div class='ctx'> static inline void cmci_recheck(void) {}</div><div class='add'>+static inline void lmce_clear(void) {}</div><div class='add'>+static inline void lmce_enable(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_MCE_AMD</div><div class='hunk'>@@ -223,6 +244,9 @@ void do_machine_check(struct pt_regs *, long);</div><div class='ctx'> extern void (*mce_threshold_vector)(void);</div><div class='ctx'> extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);</div><div class='ctx'> </div><div class='add'>+/* Deferred error interrupt handler */</div><div class='add'>+extern void (*deferred_error_int_vector)(void);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Thermal handler</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h<br/>index 2fb20d6f7e23..9e6278c7140e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/microcode.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/microcode.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/microcode.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef _ASM_X86_MICROCODE_H</div><div class='ctx'> #define _ASM_X86_MICROCODE_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/earlycpio.h&gt;</div><div class='add'>+</div><div class='ctx'> #define native_rdmsr(msr, val1, val2)			\</div><div class='ctx'> do {							\</div><div class='ctx'> 	u64 __val = native_read_msr((msr));		\</div><div class='hunk'>@@ -152,6 +154,7 @@ extern void __init load_ucode_bsp(void);</div><div class='ctx'> extern void load_ucode_ap(void);</div><div class='ctx'> extern int __init save_microcode_in_initrd(void);</div><div class='ctx'> void reload_early_microcode(void);</div><div class='add'>+extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);</div><div class='ctx'> #else</div><div class='ctx'> static inline void __init load_ucode_bsp(void) {}</div><div class='ctx'> static inline void load_ucode_ap(void) {}</div><div class='hunk'>@@ -160,6 +163,9 @@ static inline int __init save_microcode_in_initrd(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> static inline void reload_early_microcode(void) {}</div><div class='add'>+static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_X86_MICROCODE_H */</div><div class='head'>diff --git a/arch/x86/include/asm/microcode_amd.h b/arch/x86/include/asm/microcode_amd.h<br/>index af935397e053..ac6d328977a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/microcode_amd.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/microcode_amd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/microcode_amd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode_amd.h</a></div><div class='hunk'>@@ -65,12 +65,12 @@ extern enum ucode_state load_microcode_amd(int cpu, u8 family, const u8 *data, s</div><div class='ctx'> extern u8 amd_ucode_patch[PATCH_MAX_SIZE];</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MICROCODE_AMD_EARLY</div><div class='del'>-extern void __init load_ucode_amd_bsp(void);</div><div class='add'>+extern void __init load_ucode_amd_bsp(unsigned int family);</div><div class='ctx'> extern void load_ucode_amd_ap(void);</div><div class='ctx'> extern int __init save_microcode_in_initrd_amd(void);</div><div class='ctx'> void reload_ucode_amd(void);</div><div class='ctx'> #else</div><div class='del'>-static inline void __init load_ucode_amd_bsp(void) {}</div><div class='add'>+static inline void __init load_ucode_amd_bsp(unsigned int family) {}</div><div class='ctx'> static inline void load_ucode_amd_ap(void) {}</div><div class='ctx'> static inline int __init save_microcode_in_initrd_amd(void) { return -EINVAL; }</div><div class='ctx'> void reload_ucode_amd(void) {}</div><div class='head'>diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h<br/>index 2b9209c46ca9..7991c606125d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/microcode_intel.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/microcode_intel.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/microcode_intel.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/microcode_intel.h</a></div><div class='hunk'>@@ -51,20 +51,11 @@ struct extended_sigtable {</div><div class='ctx'> 	(((struct microcode_intel *)mc)-&gt;hdr.datasize ? \</div><div class='ctx'> 	 ((struct microcode_intel *)mc)-&gt;hdr.datasize : DEFAULT_UCODE_DATASIZE)</div><div class='ctx'> </div><div class='del'>-#define sigmatch(s1, s2, p1, p2) \</div><div class='del'>-	(((s1) == (s2)) &amp;&amp; (((p1) &amp; (p2)) || (((p1) == 0) &amp;&amp; ((p2) == 0))))</div><div class='del'>-</div><div class='ctx'> #define exttable_size(et) ((et)-&gt;count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)</div><div class='ctx'> </div><div class='del'>-extern int get_matching_microcode(unsigned int csig, int cpf, int rev, void *mc);</div><div class='add'>+extern int has_newer_microcode(void *mc, unsigned int csig, int cpf, int rev);</div><div class='ctx'> extern int microcode_sanity_check(void *mc, int print_err);</div><div class='del'>-extern int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc);</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-revision_is_newer(struct microcode_header_intel *mc_header, int rev)</div><div class='del'>-{</div><div class='del'>-	return (mc_header-&gt;rev &lt;= rev) ? 0 : 1;</div><div class='del'>-}</div><div class='add'>+extern int find_matching_signature(void *mc, unsigned int csig, int cpf);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MICROCODE_INTEL_EARLY</div><div class='ctx'> extern void __init load_ucode_intel_bsp(void);</div><div class='head'>diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h<br/>index 883f6b933fa4..804a3a6030ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mmu_context.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mmu_context.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@ extern struct static_key rdpmc_always_available;</div><div class='ctx'> </div><div class='ctx'> static inline void load_mm_cr4(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	if (static_key_true(&amp;rdpmc_always_available) ||</div><div class='add'>+	if (static_key_false(&amp;rdpmc_always_available) ||</div><div class='ctx'> 	    atomic_read(&amp;mm-&gt;context.perf_rdpmc_allowed))</div><div class='ctx'> 		cr4_set_bits(X86_CR4_PCE);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -142,6 +142,19 @@ static inline void arch_exit_mmap(struct mm_struct *mm)</div><div class='ctx'> 	paravirt_arch_exit_mmap(mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+static inline bool is_64bit_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	return	!config_enabled(CONFIG_IA32_EMULATION) ||</div><div class='add'>+		!(mm-&gt;context.ia32_compat == TIF_IA32);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline bool is_64bit_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static inline void arch_bprm_mm_init(struct mm_struct *mm,</div><div class='ctx'> 		struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/mpx.h b/arch/x86/include/asm/mpx.h<br/>index a952a13d59a7..7a35495275a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mpx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/mpx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mpx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mpx.h</a></div><div class='hunk'>@@ -13,55 +13,50 @@</div><div class='ctx'> #define MPX_BNDCFG_ENABLE_FLAG	0x1</div><div class='ctx'> #define MPX_BD_ENTRY_VALID_FLAG	0x1</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-</div><div class='del'>-/* upper 28 bits [47:20] of the virtual address in 64-bit used to</div><div class='del'>- * index into bounds directory (BD).</div><div class='del'>- */</div><div class='del'>-#define MPX_BD_ENTRY_OFFSET	28</div><div class='del'>-#define MPX_BD_ENTRY_SHIFT	3</div><div class='del'>-/* bits [19:3] of the virtual address in 64-bit used to index into</div><div class='del'>- * bounds table (BT).</div><div class='add'>+/*</div><div class='add'>+ * The upper 28 bits [47:20] of the virtual address in 64-bit</div><div class='add'>+ * are used to index into bounds directory (BD).</div><div class='add'>+ *</div><div class='add'>+ * The directory is 2G (2^31) in size, and with 8-byte entries</div><div class='add'>+ * it has 2^28 entries.</div><div class='ctx'>  */</div><div class='del'>-#define MPX_BT_ENTRY_OFFSET	17</div><div class='del'>-#define MPX_BT_ENTRY_SHIFT	5</div><div class='del'>-#define MPX_IGN_BITS		3</div><div class='del'>-#define MPX_BD_ENTRY_TAIL	3</div><div class='add'>+#define MPX_BD_SIZE_BYTES_64	(1UL&lt;&lt;31)</div><div class='add'>+#define MPX_BD_ENTRY_BYTES_64	8</div><div class='add'>+#define MPX_BD_NR_ENTRIES_64	(MPX_BD_SIZE_BYTES_64/MPX_BD_ENTRY_BYTES_64)</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define MPX_BD_ENTRY_OFFSET	20</div><div class='del'>-#define MPX_BD_ENTRY_SHIFT	2</div><div class='del'>-#define MPX_BT_ENTRY_OFFSET	10</div><div class='del'>-#define MPX_BT_ENTRY_SHIFT	4</div><div class='del'>-#define MPX_IGN_BITS		2</div><div class='del'>-#define MPX_BD_ENTRY_TAIL	2</div><div class='add'>+/*</div><div class='add'>+ * The 32-bit directory is 4MB (2^22) in size, and with 4-byte</div><div class='add'>+ * entries it has 2^20 entries.</div><div class='add'>+ */</div><div class='add'>+#define MPX_BD_SIZE_BYTES_32	(1UL&lt;&lt;22)</div><div class='add'>+#define MPX_BD_ENTRY_BYTES_32	4</div><div class='add'>+#define MPX_BD_NR_ENTRIES_32	(MPX_BD_SIZE_BYTES_32/MPX_BD_ENTRY_BYTES_32)</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='add'>+/*</div><div class='add'>+ * A 64-bit table is 4MB total in size, and an entry is</div><div class='add'>+ * 4 64-bit pointers in size.</div><div class='add'>+ */</div><div class='add'>+#define MPX_BT_SIZE_BYTES_64	(1UL&lt;&lt;22)</div><div class='add'>+#define MPX_BT_ENTRY_BYTES_64	32</div><div class='add'>+#define MPX_BT_NR_ENTRIES_64	(MPX_BT_SIZE_BYTES_64/MPX_BT_ENTRY_BYTES_64)</div><div class='ctx'> </div><div class='del'>-#define MPX_BD_SIZE_BYTES (1UL&lt;&lt;(MPX_BD_ENTRY_OFFSET+MPX_BD_ENTRY_SHIFT))</div><div class='del'>-#define MPX_BT_SIZE_BYTES (1UL&lt;&lt;(MPX_BT_ENTRY_OFFSET+MPX_BT_ENTRY_SHIFT))</div><div class='add'>+/*</div><div class='add'>+ * A 32-bit table is 16kB total in size, and an entry is</div><div class='add'>+ * 4 32-bit pointers in size.</div><div class='add'>+ */</div><div class='add'>+#define MPX_BT_SIZE_BYTES_32	(1UL&lt;&lt;14)</div><div class='add'>+#define MPX_BT_ENTRY_BYTES_32	16</div><div class='add'>+#define MPX_BT_NR_ENTRIES_32	(MPX_BT_SIZE_BYTES_32/MPX_BT_ENTRY_BYTES_32)</div><div class='ctx'> </div><div class='ctx'> #define MPX_BNDSTA_TAIL		2</div><div class='ctx'> #define MPX_BNDCFG_TAIL		12</div><div class='ctx'> #define MPX_BNDSTA_ADDR_MASK	(~((1UL&lt;&lt;MPX_BNDSTA_TAIL)-1))</div><div class='ctx'> #define MPX_BNDCFG_ADDR_MASK	(~((1UL&lt;&lt;MPX_BNDCFG_TAIL)-1))</div><div class='del'>-#define MPX_BT_ADDR_MASK	(~((1UL&lt;&lt;MPX_BD_ENTRY_TAIL)-1))</div><div class='del'>-</div><div class='del'>-#define MPX_BNDCFG_ADDR_MASK	(~((1UL&lt;&lt;MPX_BNDCFG_TAIL)-1))</div><div class='ctx'> #define MPX_BNDSTA_ERROR_CODE	0x3</div><div class='ctx'> </div><div class='del'>-#define MPX_BD_ENTRY_MASK	((1&lt;&lt;MPX_BD_ENTRY_OFFSET)-1)</div><div class='del'>-#define MPX_BT_ENTRY_MASK	((1&lt;&lt;MPX_BT_ENTRY_OFFSET)-1)</div><div class='del'>-#define MPX_GET_BD_ENTRY_OFFSET(addr)	((((addr)&gt;&gt;(MPX_BT_ENTRY_OFFSET+ \</div><div class='del'>-		MPX_IGN_BITS)) &amp; MPX_BD_ENTRY_MASK) &lt;&lt; MPX_BD_ENTRY_SHIFT)</div><div class='del'>-#define MPX_GET_BT_ENTRY_OFFSET(addr)	((((addr)&gt;&gt;MPX_IGN_BITS) &amp; \</div><div class='del'>-		MPX_BT_ENTRY_MASK) &lt;&lt; MPX_BT_ENTRY_SHIFT)</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_INTEL_MPX</div><div class='del'>-siginfo_t *mpx_generate_siginfo(struct pt_regs *regs,</div><div class='del'>-				struct xsave_struct *xsave_buf);</div><div class='del'>-int mpx_handle_bd_fault(struct xsave_struct *xsave_buf);</div><div class='add'>+siginfo_t *mpx_generate_siginfo(struct pt_regs *regs);</div><div class='add'>+int mpx_handle_bd_fault(void);</div><div class='ctx'> static inline int kernel_managing_mpx_tables(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	return (mm-&gt;bd_addr != MPX_INVALID_BOUNDS_DIR);</div><div class='hunk'>@@ -77,12 +72,11 @@ static inline void mpx_mm_init(struct mm_struct *mm)</div><div class='ctx'> void mpx_notify_unmap(struct mm_struct *mm, struct vm_area_struct *vma,</div><div class='ctx'> 		      unsigned long start, unsigned long end);</div><div class='ctx'> #else</div><div class='del'>-static inline siginfo_t *mpx_generate_siginfo(struct pt_regs *regs,</div><div class='del'>-					      struct xsave_struct *xsave_buf)</div><div class='add'>+static inline siginfo_t *mpx_generate_siginfo(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='del'>-static inline int mpx_handle_bd_fault(struct xsave_struct *xsave_buf)</div><div class='add'>+static inline int mpx_handle_bd_fault(void)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/msi.h b/arch/x86/include/asm/msi.h<br/>new file mode 100644<br/>index 000000000000..93724cc62177<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/msi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msi.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#ifndef _ASM_X86_MSI_H</div><div class='add'>+#define _ASM_X86_MSI_H</div><div class='add'>+#include &lt;asm/hw_irq.h&gt;</div><div class='add'>+</div><div class='add'>+typedef struct irq_alloc_info msi_alloc_info_t;</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_MSI_H */</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/asm/msr-index.h<br/>index 3c6bb342a48f..9ebc3d009373 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/msr-index.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/msr-index.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/msr-index.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msr-index.h</a></div><div class='hunk'>@@ -56,6 +56,7 @@</div><div class='ctx'> #define MSR_IA32_MCG_CAP		0x00000179</div><div class='ctx'> #define MSR_IA32_MCG_STATUS		0x0000017a</div><div class='ctx'> #define MSR_IA32_MCG_CTL		0x0000017b</div><div class='add'>+#define MSR_IA32_MCG_EXT_CTL		0x000004d0</div><div class='ctx'> </div><div class='ctx'> #define MSR_OFFCORE_RSP_0		0x000001a6</div><div class='ctx'> #define MSR_OFFCORE_RSP_1		0x000001a7</div><div class='hunk'>@@ -380,6 +381,7 @@</div><div class='ctx'> #define FEATURE_CONTROL_LOCKED				(1&lt;&lt;0)</div><div class='ctx'> #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	(1&lt;&lt;1)</div><div class='ctx'> #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX	(1&lt;&lt;2)</div><div class='add'>+#define FEATURE_CONTROL_LMCE				(1&lt;&lt;20)</div><div class='ctx'> </div><div class='ctx'> #define MSR_IA32_APICBASE		0x0000001b</div><div class='ctx'> #define MSR_IA32_APICBASE_BSP		(1&lt;&lt;8)</div><div class='head'>diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h<br/>index de36f22eb0b9..e6a707eb5081 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/msr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/msr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/msr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/msr.h</a></div><div class='hunk'>@@ -1,13 +1,14 @@</div><div class='ctx'> #ifndef _ASM_X86_MSR_H</div><div class='ctx'> #define _ASM_X86_MSR_H</div><div class='ctx'> </div><div class='del'>-#include &lt;uapi/asm/msr.h&gt;</div><div class='add'>+#include "msr-index.h"</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/cpumask.h&gt;</div><div class='add'>+#include &lt;uapi/asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct msr {</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -205,8 +206,13 @@ do {                                                            \</div><div class='ctx'> </div><div class='ctx'> #endif	/* !CONFIG_PARAVIRT */</div><div class='ctx'> </div><div class='del'>-#define wrmsrl_safe(msr, val) wrmsr_safe((msr), (u32)(val),		\</div><div class='del'>-					     (u32)((val) &gt;&gt; 32))</div><div class='add'>+/*</div><div class='add'>+ * 64-bit version of wrmsr_safe():</div><div class='add'>+ */</div><div class='add'>+static inline int wrmsrl_safe(u32 msr, u64 val)</div><div class='add'>+{</div><div class='add'>+	return wrmsr_safe(msr, (u32)val,  (u32)(val &gt;&gt; 32));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h<br/>index f768f6298419..b94f6f64e23d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mtrr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/mtrr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/mtrr.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'>  * arch_phys_wc_add and arch_phys_wc_del.</div><div class='ctx'>  */</div><div class='ctx'> # ifdef CONFIG_MTRR</div><div class='del'>-extern u8 mtrr_type_lookup(u64 addr, u64 end);</div><div class='add'>+extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);</div><div class='ctx'> extern void mtrr_save_fixed_ranges(void *);</div><div class='ctx'> extern void mtrr_save_state(void);</div><div class='ctx'> extern int mtrr_add(unsigned long base, unsigned long size,</div><div class='hunk'>@@ -48,14 +48,13 @@ extern void mtrr_aps_init(void);</div><div class='ctx'> extern void mtrr_bp_restore(void);</div><div class='ctx'> extern int mtrr_trim_uncached_memory(unsigned long end_pfn);</div><div class='ctx'> extern int amd_special_default_mtrr(void);</div><div class='del'>-extern int phys_wc_to_mtrr_index(int handle);</div><div class='ctx'> #  else</div><div class='del'>-static inline u8 mtrr_type_lookup(u64 addr, u64 end)</div><div class='add'>+static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Return no-MTRRs:</div><div class='ctx'> 	 */</div><div class='del'>-	return 0xff;</div><div class='add'>+	return MTRR_TYPE_INVALID;</div><div class='ctx'> }</div><div class='ctx'> #define mtrr_save_fixed_ranges(arg) do {} while (0)</div><div class='ctx'> #define mtrr_save_state() do {} while (0)</div><div class='hunk'>@@ -84,10 +83,6 @@ static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)</div><div class='ctx'> static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline int phys_wc_to_mtrr_index(int handle)</div><div class='del'>-{</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> #define mtrr_ap_init() do {} while (0)</div><div class='ctx'> #define mtrr_bp_init() do {} while (0)</div><div class='hunk'>@@ -127,4 +122,8 @@ struct mtrr_gentry32 {</div><div class='ctx'> 				 _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry32)</div><div class='ctx'> #endif /* CONFIG_COMPAT */</div><div class='ctx'> </div><div class='add'>+/* Bit fields for enabled in struct mtrr_state_type */</div><div class='add'>+#define MTRR_STATE_MTRR_FIXED_ENABLED	0x01</div><div class='add'>+#define MTRR_STATE_MTRR_ENABLED		0x02</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_MTRR_H */</div><div class='head'>diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h<br/>index 8957810ad7d1..d143bfad45d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/paravirt.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/paravirt.h</a></div><div class='hunk'>@@ -712,6 +712,31 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_SMP) &amp;&amp; defined(CONFIG_PARAVIRT_SPINLOCKS)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+</div><div class='add'>+static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,</div><div class='add'>+							u32 val)</div><div class='add'>+{</div><div class='add'>+	PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void pv_wait(u8 *ptr, u8 val)</div><div class='add'>+{</div><div class='add'>+	PVOP_VCALL2(pv_lock_ops.wait, ptr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void pv_kick(int cpu)</div><div class='add'>+{</div><div class='add'>+	PVOP_VCALL1(pv_lock_ops.kick, cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+</div><div class='ctx'> static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,</div><div class='ctx'> 							__ticket_t ticket)</div><div class='ctx'> {</div><div class='hunk'>@@ -724,7 +749,9 @@ static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,</div><div class='ctx'> 	PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='add'>+#endif /* CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+</div><div class='add'>+#endif /* SMP &amp;&amp; PARAVIRT_SPINLOCKS */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"</div><div class='head'>diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h<br/>index f7b0b5c112f2..a6b8f9fadb06 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt_types.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/paravirt_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/paravirt_types.h</a></div><div class='hunk'>@@ -160,13 +160,14 @@ struct pv_cpu_ops {</div><div class='ctx'> 	u64 (*read_pmc)(int counter);</div><div class='ctx'> 	unsigned long long (*read_tscp)(unsigned int *aux);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Atomically enable interrupts and return to userspace.  This</div><div class='del'>-	 * is only ever used to return to 32-bit processes; in a</div><div class='del'>-	 * 64-bit kernel, it's used for 32-on-64 compat processes, but</div><div class='del'>-	 * never native 64-bit processes.  (Jump, not call.)</div><div class='add'>+	 * is only used in 32-bit kernels.  64-bit kernels use</div><div class='add'>+	 * usergs_sysret32 instead.</div><div class='ctx'> 	 */</div><div class='ctx'> 	void (*irq_enable_sysexit)(void);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Switch to usermode gs and return to 64-bit usermode using</div><div class='hunk'>@@ -333,9 +334,19 @@ struct arch_spinlock;</div><div class='ctx'> typedef u16 __ticket_t;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+struct qspinlock;</div><div class='add'>+</div><div class='ctx'> struct pv_lock_ops {</div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+	void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);</div><div class='add'>+	struct paravirt_callee_save queued_spin_unlock;</div><div class='add'>+</div><div class='add'>+	void (*wait)(u8 *ptr, u8 val);</div><div class='add'>+	void (*kick)(int cpu);</div><div class='add'>+#else /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> 	struct paravirt_callee_save lock_spinning;</div><div class='ctx'> 	void (*unlock_kick)(struct arch_spinlock *lock, __ticket_t ticket);</div><div class='add'>+#endif /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This contains all the paravirt structures: we get a convenient</div><div class='head'>diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h<br/>index 91bc4ba95f91..ca6c228d5e62 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pat.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pat.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pat.h</a></div><div class='hunk'>@@ -4,14 +4,9 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable_types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_PAT</div><div class='del'>-extern int pat_enabled;</div><div class='del'>-#else</div><div class='del'>-static const int pat_enabled;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+bool pat_enabled(void);</div><div class='ctx'> extern void pat_init(void);</div><div class='del'>-void pat_init_cache_modes(void);</div><div class='add'>+void pat_init_cache_modes(u64);</div><div class='ctx'> </div><div class='ctx'> extern int reserve_memtype(u64 start, u64 end,</div><div class='ctx'> 		enum page_cache_mode req_pcm, enum page_cache_mode *ret_pcm);</div><div class='head'>diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h<br/>index 4e370a5d8117..462594320d39 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pci.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -80,13 +80,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> extern void early_quirks(void);</div><div class='del'>-static inline void pci_dma_burst_advice(struct pci_dev *pdev,</div><div class='del'>-					enum pci_dma_burst_strategy *strat,</div><div class='del'>-					unsigned long *strategy_parameter)</div><div class='del'>-{</div><div class='del'>-	*strat = PCI_DMA_BURST_INFINITY;</div><div class='del'>-	*strategy_parameter = ~0UL;</div><div class='del'>-}</div><div class='ctx'> #else</div><div class='ctx'> static inline void early_quirks(void) { }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -96,15 +89,10 @@ extern void pci_iommu_alloc(void);</div><div class='ctx'> #ifdef CONFIG_PCI_MSI</div><div class='ctx'> /* implemented in arch/x86/kernel/apic/io_apic. */</div><div class='ctx'> struct msi_desc;</div><div class='del'>-void native_compose_msi_msg(struct pci_dev *pdev, unsigned int irq,</div><div class='del'>-			    unsigned int dest, struct msi_msg *msg, u8 hpet_id);</div><div class='ctx'> int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);</div><div class='ctx'> void native_teardown_msi_irq(unsigned int irq);</div><div class='ctx'> void native_restore_msi_irqs(struct pci_dev *dev);</div><div class='del'>-int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,</div><div class='del'>-		  unsigned int irq_base, unsigned int irq_offset);</div><div class='ctx'> #else</div><div class='del'>-#define native_compose_msi_msg		NULL</div><div class='ctx'> #define native_setup_msi_irqs		NULL</div><div class='ctx'> #define native_teardown_msi_irq		NULL</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h<br/>index fe57e7a98839..867da5bbb4a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pgtable.h</a></div><div class='hunk'>@@ -398,11 +398,17 @@ static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,</div><div class='ctx'> 	 * requested memtype:</div><div class='ctx'> 	 * - request is uncached, return cannot be write-back</div><div class='ctx'> 	 * - request is write-combine, return cannot be write-back</div><div class='add'>+	 * - request is write-through, return cannot be write-back</div><div class='add'>+	 * - request is write-through, return cannot be write-combine</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &amp;&amp;</div><div class='ctx'> 	     new_pcm == _PAGE_CACHE_MODE_WB) ||</div><div class='ctx'> 	    (pcm == _PAGE_CACHE_MODE_WC &amp;&amp;</div><div class='del'>-	     new_pcm == _PAGE_CACHE_MODE_WB)) {</div><div class='add'>+	     new_pcm == _PAGE_CACHE_MODE_WB) ||</div><div class='add'>+	    (pcm == _PAGE_CACHE_MODE_WT &amp;&amp;</div><div class='add'>+	     new_pcm == _PAGE_CACHE_MODE_WB) ||</div><div class='add'>+	    (pcm == _PAGE_CACHE_MODE_WT &amp;&amp;</div><div class='add'>+	     new_pcm == _PAGE_CACHE_MODE_WC)) {</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -799,8 +805,8 @@ static inline int pmd_write(pmd_t pmd)</div><div class='ctx'> 	return pmd_flags(pmd) &amp; _PAGE_RW;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='del'>-static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='add'>+#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				       pmd_t *pmdp)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd = native_pmdp_get_and_clear(pmdp);</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h<br/>index 78f0c8cbe316..13f310bfc09a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable_types.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pgtable_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pgtable_types.h</a></div><div class='hunk'>@@ -367,6 +367,9 @@ extern int nx_enabled;</div><div class='ctx'> #define pgprot_writecombine	pgprot_writecombine</div><div class='ctx'> extern pgprot_t pgprot_writecombine(pgprot_t prot);</div><div class='ctx'> </div><div class='add'>+#define pgprot_writethrough	pgprot_writethrough</div><div class='add'>+extern pgprot_t pgprot_writethrough(pgprot_t prot);</div><div class='add'>+</div><div class='ctx'> /* Indicate that x86 has its own track and untrack pfn vma functions */</div><div class='ctx'> #define __HAVE_PFNMAP_TRACKING</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h<br/>index 8f3271842533..dca71714f860 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/preempt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/preempt.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/preempt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/preempt.h</a></div><div class='hunk'>@@ -99,11 +99,9 @@ static __always_inline bool should_resched(void)</div><div class='ctx'>   extern asmlinkage void ___preempt_schedule(void);</div><div class='ctx'> # define __preempt_schedule() asm ("call ___preempt_schedule")</div><div class='ctx'>   extern asmlinkage void preempt_schedule(void);</div><div class='del'>-# ifdef CONFIG_CONTEXT_TRACKING</div><div class='del'>-    extern asmlinkage void ___preempt_schedule_context(void);</div><div class='del'>-#   define __preempt_schedule_context() asm ("call ___preempt_schedule_context")</div><div class='del'>-    extern asmlinkage void preempt_schedule_context(void);</div><div class='del'>-# endif</div><div class='add'>+  extern asmlinkage void ___preempt_schedule_notrace(void);</div><div class='add'>+# define __preempt_schedule_notrace() asm ("call ___preempt_schedule_notrace")</div><div class='add'>+  extern asmlinkage void preempt_schedule_notrace(void);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PREEMPT_H */</div><div class='head'>diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h<br/>index 23ba6765b718..944f1785ed0d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/processor.h</a></div><div class='hunk'>@@ -21,6 +21,7 @@ struct mm_struct;</div><div class='ctx'> #include &lt;asm/desc_defs.h&gt;</div><div class='ctx'> #include &lt;asm/nops.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='add'>+#include &lt;asm/fpu/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/personality.h&gt;</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='hunk'>@@ -52,11 +53,16 @@ static inline void *current_text_addr(void)</div><div class='ctx'> 	return pc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * These alignment constraints are for performance in the vSMP case,</div><div class='add'>+ * but in the task_struct case we must also meet hardware imposed</div><div class='add'>+ * alignment requirements of the FPU state:</div><div class='add'>+ */</div><div class='ctx'> #ifdef CONFIG_X86_VSMP</div><div class='ctx'> # define ARCH_MIN_TASKALIGN		(1 &lt;&lt; INTERNODE_CACHE_SHIFT)</div><div class='ctx'> # define ARCH_MIN_MMSTRUCT_ALIGN	(1 &lt;&lt; INTERNODE_CACHE_SHIFT)</div><div class='ctx'> #else</div><div class='del'>-# define ARCH_MIN_TASKALIGN		16</div><div class='add'>+# define ARCH_MIN_TASKALIGN		__alignof__(union fpregs_state)</div><div class='ctx'> # define ARCH_MIN_MMSTRUCT_ALIGN	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -166,7 +172,6 @@ extern const struct seq_operations cpuinfo_op;</div><div class='ctx'> #define cache_line_size()	(boot_cpu_data.x86_cache_alignment)</div><div class='ctx'> </div><div class='ctx'> extern void cpu_detect(struct cpuinfo_x86 *c);</div><div class='del'>-extern void fpu_detect(struct cpuinfo_x86 *c);</div><div class='ctx'> </div><div class='ctx'> extern void early_cpu_init(void);</div><div class='ctx'> extern void identify_boot_cpu(void);</div><div class='hunk'>@@ -313,128 +318,6 @@ struct orig_ist {</div><div class='ctx'> 	unsigned long		ist[7];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define	MXCSR_DEFAULT		0x1f80</div><div class='del'>-</div><div class='del'>-struct i387_fsave_struct {</div><div class='del'>-	u32			cwd;	/* FPU Control Word		*/</div><div class='del'>-	u32			swd;	/* FPU Status Word		*/</div><div class='del'>-	u32			twd;	/* FPU Tag Word			*/</div><div class='del'>-	u32			fip;	/* FPU IP Offset		*/</div><div class='del'>-	u32			fcs;	/* FPU IP Selector		*/</div><div class='del'>-	u32			foo;	/* FPU Operand Pointer Offset	*/</div><div class='del'>-	u32			fos;	/* FPU Operand Pointer Selector	*/</div><div class='del'>-</div><div class='del'>-	/* 8*10 bytes for each FP-reg = 80 bytes:			*/</div><div class='del'>-	u32			st_space[20];</div><div class='del'>-</div><div class='del'>-	/* Software status information [not touched by FSAVE ]:		*/</div><div class='del'>-	u32			status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct i387_fxsave_struct {</div><div class='del'>-	u16			cwd; /* Control Word			*/</div><div class='del'>-	u16			swd; /* Status Word			*/</div><div class='del'>-	u16			twd; /* Tag Word			*/</div><div class='del'>-	u16			fop; /* Last Instruction Opcode		*/</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u64	rip; /* Instruction Pointer		*/</div><div class='del'>-			u64	rdp; /* Data Pointer			*/</div><div class='del'>-		};</div><div class='del'>-		struct {</div><div class='del'>-			u32	fip; /* FPU IP Offset			*/</div><div class='del'>-			u32	fcs; /* FPU IP Selector			*/</div><div class='del'>-			u32	foo; /* FPU Operand Offset		*/</div><div class='del'>-			u32	fos; /* FPU Operand Selector		*/</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-	u32			mxcsr;		/* MXCSR Register State */</div><div class='del'>-	u32			mxcsr_mask;	/* MXCSR Mask		*/</div><div class='del'>-</div><div class='del'>-	/* 8*16 bytes for each FP-reg = 128 bytes:			*/</div><div class='del'>-	u32			st_space[32];</div><div class='del'>-</div><div class='del'>-	/* 16*16 bytes for each XMM-reg = 256 bytes:			*/</div><div class='del'>-	u32			xmm_space[64];</div><div class='del'>-</div><div class='del'>-	u32			padding[12];</div><div class='del'>-</div><div class='del'>-	union {</div><div class='del'>-		u32		padding1[12];</div><div class='del'>-		u32		sw_reserved[12];</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-} __attribute__((aligned(16)));</div><div class='del'>-</div><div class='del'>-struct i387_soft_struct {</div><div class='del'>-	u32			cwd;</div><div class='del'>-	u32			swd;</div><div class='del'>-	u32			twd;</div><div class='del'>-	u32			fip;</div><div class='del'>-	u32			fcs;</div><div class='del'>-	u32			foo;</div><div class='del'>-	u32			fos;</div><div class='del'>-	/* 8*10 bytes for each FP-reg = 80 bytes: */</div><div class='del'>-	u32			st_space[20];</div><div class='del'>-	u8			ftop;</div><div class='del'>-	u8			changed;</div><div class='del'>-	u8			lookahead;</div><div class='del'>-	u8			no_update;</div><div class='del'>-	u8			rm;</div><div class='del'>-	u8			alimit;</div><div class='del'>-	struct math_emu_info	*info;</div><div class='del'>-	u32			entry_eip;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ymmh_struct {</div><div class='del'>-	/* 16 * 16 bytes for each YMMH-reg = 256 bytes */</div><div class='del'>-	u32 ymmh_space[64];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* We don't support LWP yet: */</div><div class='del'>-struct lwp_struct {</div><div class='del'>-	u8 reserved[128];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bndreg {</div><div class='del'>-	u64 lower_bound;</div><div class='del'>-	u64 upper_bound;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct bndcsr {</div><div class='del'>-	u64 bndcfgu;</div><div class='del'>-	u64 bndstatus;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct xsave_hdr_struct {</div><div class='del'>-	u64 xstate_bv;</div><div class='del'>-	u64 xcomp_bv;</div><div class='del'>-	u64 reserved[6];</div><div class='del'>-} __attribute__((packed));</div><div class='del'>-</div><div class='del'>-struct xsave_struct {</div><div class='del'>-	struct i387_fxsave_struct i387;</div><div class='del'>-	struct xsave_hdr_struct xsave_hdr;</div><div class='del'>-	struct ymmh_struct ymmh;</div><div class='del'>-	struct lwp_struct lwp;</div><div class='del'>-	struct bndreg bndreg[4];</div><div class='del'>-	struct bndcsr bndcsr;</div><div class='del'>-	/* new processor state extensions will go here */</div><div class='del'>-} __attribute__ ((packed, aligned (64)));</div><div class='del'>-</div><div class='del'>-union thread_xstate {</div><div class='del'>-	struct i387_fsave_struct	fsave;</div><div class='del'>-	struct i387_fxsave_struct	fxsave;</div><div class='del'>-	struct i387_soft_struct		soft;</div><div class='del'>-	struct xsave_struct		xsave;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct fpu {</div><div class='del'>-	unsigned int last_cpu;</div><div class='del'>-	unsigned int has_fpu;</div><div class='del'>-	union thread_xstate *state;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> DECLARE_PER_CPU(struct orig_ist, orig_ist);</div><div class='ctx'> </div><div class='hunk'>@@ -483,8 +366,6 @@ DECLARE_PER_CPU(struct irq_stack *, softirq_stack);</div><div class='ctx'> #endif	/* X86_64 */</div><div class='ctx'> </div><div class='ctx'> extern unsigned int xstate_size;</div><div class='del'>-extern void free_thread_xstate(struct task_struct *);</div><div class='del'>-extern struct kmem_cache *task_xstate_cachep;</div><div class='ctx'> </div><div class='ctx'> struct perf_event;</div><div class='ctx'> </div><div class='hunk'>@@ -508,6 +389,7 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long		fs;</div><div class='ctx'> #endif</div><div class='ctx'> 	unsigned long		gs;</div><div class='add'>+</div><div class='ctx'> 	/* Save middle states of ptrace breakpoints */</div><div class='ctx'> 	struct perf_event	*ptrace_bps[HBP_NUM];</div><div class='ctx'> 	/* Debug status used for traps, single steps, etc... */</div><div class='hunk'>@@ -518,8 +400,6 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long		cr2;</div><div class='ctx'> 	unsigned long		trap_nr;</div><div class='ctx'> 	unsigned long		error_code;</div><div class='del'>-	/* floating point and extended processor state */</div><div class='del'>-	struct fpu		fpu;</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 	/* Virtual 86 mode info */</div><div class='ctx'> 	struct vm86_struct __user *vm86_info;</div><div class='hunk'>@@ -535,15 +415,13 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long		iopl;</div><div class='ctx'> 	/* Max allowed port in the bitmap, in bytes: */</div><div class='ctx'> 	unsigned		io_bitmap_max;</div><div class='add'>+</div><div class='add'>+	/* Floating point and extended processor state */</div><div class='add'>+	struct fpu		fpu;</div><div class='ctx'> 	/*</div><div class='del'>-	 * fpu_counter contains the number of consecutive context switches</div><div class='del'>-	 * that the FPU is used. If this is over a threshold, the lazy fpu</div><div class='del'>-	 * saving becomes unlazy to save the trap. This is an unsigned char</div><div class='del'>-	 * so that after 256 times the counter wraps and the behavior turns</div><div class='del'>-	 * lazy again; this to deal with bursty apps that only use FPU for</div><div class='del'>-	 * a short time</div><div class='add'>+	 * WARNING: 'fpu' is dynamically-sized.  It *MUST* be at</div><div class='add'>+	 * the end.</div><div class='ctx'> 	 */</div><div class='del'>-	unsigned char fpu_counter;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -928,24 +806,25 @@ extern int get_tsc_mode(unsigned long adr);</div><div class='ctx'> extern int set_tsc_mode(unsigned int val);</div><div class='ctx'> </div><div class='ctx'> /* Register/unregister a process' MPX related resource */</div><div class='del'>-#define MPX_ENABLE_MANAGEMENT(tsk)	mpx_enable_management((tsk))</div><div class='del'>-#define MPX_DISABLE_MANAGEMENT(tsk)	mpx_disable_management((tsk))</div><div class='add'>+#define MPX_ENABLE_MANAGEMENT()	mpx_enable_management()</div><div class='add'>+#define MPX_DISABLE_MANAGEMENT()	mpx_disable_management()</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_INTEL_MPX</div><div class='del'>-extern int mpx_enable_management(struct task_struct *tsk);</div><div class='del'>-extern int mpx_disable_management(struct task_struct *tsk);</div><div class='add'>+extern int mpx_enable_management(void);</div><div class='add'>+extern int mpx_disable_management(void);</div><div class='ctx'> #else</div><div class='del'>-static inline int mpx_enable_management(struct task_struct *tsk)</div><div class='add'>+static inline int mpx_enable_management(void)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-static inline int mpx_disable_management(struct task_struct *tsk)</div><div class='add'>+static inline int mpx_disable_management(void)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_X86_INTEL_MPX */</div><div class='ctx'> </div><div class='ctx'> extern u16 amd_get_nb_id(int cpu);</div><div class='add'>+extern u32 amd_get_nodes_per_socket(void);</div><div class='ctx'> </div><div class='ctx'> static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h<br/>index a90f8972dad5..a4a77286cb1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/proto.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/proto.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/proto.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/proto.h</a></div><div class='hunk'>@@ -5,12 +5,14 @@</div><div class='ctx'> </div><div class='ctx'> /* misc architecture specific prototypes */</div><div class='ctx'> </div><div class='del'>-void system_call(void);</div><div class='ctx'> void syscall_init(void);</div><div class='ctx'> </div><div class='del'>-void ia32_syscall(void);</div><div class='del'>-void ia32_cstar_target(void);</div><div class='del'>-void ia32_sysenter_target(void);</div><div class='add'>+void entry_SYSCALL_64(void);</div><div class='add'>+void entry_SYSCALL_compat(void);</div><div class='add'>+void entry_INT80_32(void);</div><div class='add'>+void entry_INT80_compat(void);</div><div class='add'>+void entry_SYSENTER_32(void);</div><div class='add'>+void entry_SYSENTER_compat(void);</div><div class='ctx'> </div><div class='ctx'> void x86_configure_nx(void);</div><div class='ctx'> void x86_report_nx(void);</div><div class='head'>diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/asm/pvclock-abi.h<br/>index 6167fd798188..655e07a48f6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock-abi.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pvclock-abi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock-abi.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pvclock-abi.h</a></div><div class='hunk'>@@ -41,5 +41,6 @@ struct pvclock_wall_clock {</div><div class='ctx'> </div><div class='ctx'> #define PVCLOCK_TSC_STABLE_BIT	(1 &lt;&lt; 0)</div><div class='ctx'> #define PVCLOCK_GUEST_STOPPED	(1 &lt;&lt; 1)</div><div class='add'>+#define PVCLOCK_COUNTS_FROM_ZERO (1 &lt;&lt; 2)</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* _ASM_X86_PVCLOCK_ABI_H */</div><div class='head'>diff --git a/arch/x86/include/asm/pvclock.h b/arch/x86/include/asm/pvclock.h<br/>index d6b078e9fa28..628954ceede1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/pvclock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/pvclock.h</a></div><div class='hunk'>@@ -86,7 +86,6 @@ unsigned __pvclock_read_cycles(const struct pvclock_vcpu_time_info *src,</div><div class='ctx'> 	offset = pvclock_get_nsec_offset(src);</div><div class='ctx'> 	ret = src-&gt;system_time + offset;</div><div class='ctx'> 	ret_flags = src-&gt;flags;</div><div class='del'>-	rdtsc_barrier();</div><div class='ctx'> </div><div class='ctx'> 	*cycles = ret;</div><div class='ctx'> 	*flags = ret_flags;</div><div class='head'>diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h<br/>new file mode 100644<br/>index 000000000000..9d51fae1cba3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/qspinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/qspinlock.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+#ifndef _ASM_X86_QSPINLOCK_H</div><div class='add'>+#define _ASM_X86_QSPINLOCK_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm-generic/qspinlock_types.h&gt;</div><div class='add'>+#include &lt;asm/paravirt.h&gt;</div><div class='add'>+</div><div class='add'>+#define	queued_spin_unlock queued_spin_unlock</div><div class='add'>+/**</div><div class='add'>+ * queued_spin_unlock - release a queued spinlock</div><div class='add'>+ * @lock : Pointer to queued spinlock structure</div><div class='add'>+ *</div><div class='add'>+ * A smp_store_release() on the least-significant byte.</div><div class='add'>+ */</div><div class='add'>+static inline void native_queued_spin_unlock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	smp_store_release((u8 *)lock, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PARAVIRT_SPINLOCKS</div><div class='add'>+extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);</div><div class='add'>+extern void __pv_init_lock_hash(void);</div><div class='add'>+extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);</div><div class='add'>+extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);</div><div class='add'>+</div><div class='add'>+static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)</div><div class='add'>+{</div><div class='add'>+	pv_queued_spin_lock_slowpath(lock, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void queued_spin_unlock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	pv_queued_spin_unlock(lock);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void queued_spin_unlock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	native_queued_spin_unlock(lock);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define virt_queued_spin_lock virt_queued_spin_lock</div><div class='add'>+</div><div class='add'>+static inline bool virt_queued_spin_lock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	while (atomic_cmpxchg(&amp;lock-&gt;val, 0, _Q_LOCKED_VAL) != 0)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/qspinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_QSPINLOCK_H */</div><div class='head'>diff --git a/arch/x86/include/asm/qspinlock_paravirt.h b/arch/x86/include/asm/qspinlock_paravirt.h<br/>new file mode 100644<br/>index 000000000000..b002e711ba88<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/qspinlock_paravirt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/qspinlock_paravirt.h</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+#ifndef __ASM_QSPINLOCK_PARAVIRT_H</div><div class='add'>+#define __ASM_QSPINLOCK_PARAVIRT_H</div><div class='add'>+</div><div class='add'>+PV_CALLEE_SAVE_REGS_THUNK(__pv_queued_spin_unlock);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/serial.h b/arch/x86/include/asm/serial.h<br/>index 8378b8c9109c..bb658211edad 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/serial.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/serial.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/serial.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define BASE_BAUD (1843200/16)</div><div class='ctx'> </div><div class='ctx'> /* Standard COM flags (except for COM4, because of the 8514 problem) */</div><div class='del'>-#ifdef CONFIG_SERIAL_DETECT_IRQ</div><div class='add'>+#ifdef CONFIG_SERIAL_8250_DETECT_IRQ</div><div class='ctx'> # define STD_COMX_FLAGS	(UPF_BOOT_AUTOCONF |	UPF_SKIP_TEST	| UPF_AUTO_IRQ)</div><div class='ctx'> # define STD_COM4_FLAGS	(UPF_BOOT_AUTOCONF |	0		| UPF_AUTO_IRQ)</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h<br/>index f69e06b283fb..11af24e09c8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/setup.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/setup.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/setup.h</a></div><div class='hunk'>@@ -60,17 +60,24 @@ static inline void x86_ce4100_early_setup(void) { }</div><div class='ctx'> #ifndef _SETUP</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/espfix.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is set up by the setup-routine at boot-time</div><div class='ctx'>  */</div><div class='ctx'> extern struct boot_params boot_params;</div><div class='add'>+extern char _text[];</div><div class='ctx'> </div><div class='ctx'> static inline bool kaslr_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	return !!(boot_params.hdr.loadflags &amp; KASLR_FLAG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned long kaslr_offset(void)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)&amp;_text - __START_KERNEL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Do NOT EVER look at the BIOS memory size location.</div><div class='ctx'>  * It does not work on many machines.</div><div class='head'>diff --git a/arch/x86/include/asm/simd.h b/arch/x86/include/asm/simd.h<br/>index ee80b92f0096..6c8a7ed13365 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/simd.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/simd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/simd.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/simd.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * may_use_simd - whether it is allowable at this time to issue SIMD</div><div class='head'>diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h<br/>index 17a8dced12da..222a6a3ca2b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/smp.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/smp.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/smp.h</a></div><div class='hunk'>@@ -37,16 +37,6 @@ DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);</div><div class='ctx'> DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id);</div><div class='ctx'> DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);</div><div class='ctx'> </div><div class='del'>-static inline struct cpumask *cpu_sibling_mask(int cpu)</div><div class='del'>-{</div><div class='del'>-	return per_cpu(cpu_sibling_map, cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct cpumask *cpu_core_mask(int cpu)</div><div class='del'>-{</div><div class='del'>-	return per_cpu(cpu_core_map, cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct cpumask *cpu_llc_shared_mask(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return per_cpu(cpu_llc_shared_map, cpu);</div><div class='head'>diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h<br/>index aeb4666e0c0a..2270e41b32fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/special_insns.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/special_insns.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/special_insns.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/special_insns.h</a></div><div class='hunk'>@@ -215,6 +215,44 @@ static inline void clwb(volatile void *__p)</div><div class='ctx'> 		: [pax] "a" (p));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pcommit_sfence() - persistent commit and fence</div><div class='add'>+ *</div><div class='add'>+ * The PCOMMIT instruction ensures that data that has been flushed from the</div><div class='add'>+ * processor's cache hierarchy with CLWB, CLFLUSHOPT or CLFLUSH is accepted to</div><div class='add'>+ * memory and is durable on the DIMM.  The primary use case for this is</div><div class='add'>+ * persistent memory.</div><div class='add'>+ *</div><div class='add'>+ * This function shows how to properly use CLWB/CLFLUSHOPT/CLFLUSH and PCOMMIT</div><div class='add'>+ * with appropriate fencing.</div><div class='add'>+ *</div><div class='add'>+ * Example:</div><div class='add'>+ * void flush_and_commit_buffer(void *vaddr, unsigned int size)</div><div class='add'>+ * {</div><div class='add'>+ *         unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;</div><div class='add'>+ *         void *vend = vaddr + size;</div><div class='add'>+ *         void *p;</div><div class='add'>+ *</div><div class='add'>+ *         for (p = (void *)((unsigned long)vaddr &amp; ~clflush_mask);</div><div class='add'>+ *              p &lt; vend; p += boot_cpu_data.x86_clflush_size)</div><div class='add'>+ *                 clwb(p);</div><div class='add'>+ *</div><div class='add'>+ *         // SFENCE to order CLWB/CLFLUSHOPT/CLFLUSH cache flushes</div><div class='add'>+ *         // MFENCE via mb() also works</div><div class='add'>+ *         wmb();</div><div class='add'>+ *</div><div class='add'>+ *         // PCOMMIT and the required SFENCE for ordering</div><div class='add'>+ *         pcommit_sfence();</div><div class='add'>+ * }</div><div class='add'>+ *</div><div class='add'>+ * After this function completes the data pointed to by 'vaddr' has been</div><div class='add'>+ * accepted to memory and will be durable if the 'vaddr' points to persistent</div><div class='add'>+ * memory.</div><div class='add'>+ *</div><div class='add'>+ * PCOMMIT must always be ordered by an MFENCE or SFENCE, so to help simplify</div><div class='add'>+ * things we include both the PCOMMIT and the required SFENCE in the</div><div class='add'>+ * alternatives generated by pcommit_sfence().</div><div class='add'>+ */</div><div class='ctx'> static inline void pcommit_sfence(void)</div><div class='ctx'> {</div><div class='ctx'> 	alternative(ASM_NOP7,</div><div class='head'>diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h<br/>index 64b611782ef0..be0a05913b91 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/spinlock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/spinlock.h</a></div><div class='hunk'>@@ -42,6 +42,10 @@</div><div class='ctx'> extern struct static_key paravirt_ticketlocks_enabled;</div><div class='ctx'> static __always_inline bool static_key_false(struct static_key *key);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+#include &lt;asm/qspinlock.h&gt;</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PARAVIRT_SPINLOCKS</div><div class='ctx'> </div><div class='ctx'> static inline void __ticket_enter_slowpath(arch_spinlock_t *lock)</div><div class='hunk'>@@ -196,6 +200,7 @@ static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Read-write spinlocks, allowing multiple readers</div><div class='head'>diff --git a/arch/x86/include/asm/spinlock_types.h b/arch/x86/include/asm/spinlock_types.h<br/>index 5f9d7572d82b..65c3e37f879a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock_types.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock_types.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -23,6 +23,9 @@ typedef u32 __ticketpair_t;</div><div class='ctx'> </div><div class='ctx'> #define TICKET_SHIFT	(sizeof(__ticket_t) * 8)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+#include &lt;asm-generic/qspinlock_types.h&gt;</div><div class='add'>+#else</div><div class='ctx'> typedef struct arch_spinlock {</div><div class='ctx'> 	union {</div><div class='ctx'> 		__ticketpair_t head_tail;</div><div class='hunk'>@@ -33,6 +36,7 @@ typedef struct arch_spinlock {</div><div class='ctx'> } arch_spinlock_t;</div><div class='ctx'> </div><div class='ctx'> #define __ARCH_SPIN_LOCK_UNLOCKED	{ { 0 } }</div><div class='add'>+#endif /* CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/qrwlock_types.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h<br/>index 6a998598f172..c2e00bb2a136 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/stackprotector.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/stackprotector.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/stackprotector.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/stackprotector.h</a></div><div class='hunk'>@@ -39,7 +39,9 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * 24 byte read-only segment initializer for stack canary.  Linker</div><div class='head'>diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h<br/>index 552d6c90a6d4..d1793f06854d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/suspend_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/suspend_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/suspend_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/suspend_32.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define _ASM_X86_SUSPEND_32_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* image of the saved processor state */</div><div class='ctx'> struct saved_context {</div><div class='head'>diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h<br/>index bc6232834bab..7ebf0ebe4e68 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/suspend_64.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/suspend_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/suspend_64.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/suspend_64.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define _ASM_X86_SUSPEND_64_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Image of the saved processor state, used by the low level ACPI suspend to</div><div class='head'>diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h<br/>index b4bdec3e9523..225ee545e1a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/thread_info.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/thread_info.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/thread_info.h</a></div><div class='hunk'>@@ -177,8 +177,6 @@ struct thread_info {</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-DECLARE_PER_CPU(unsigned long, kernel_stack);</div><div class='del'>-</div><div class='ctx'> static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	return (struct thread_info *)(current_top_of_stack() - THREAD_SIZE);</div><div class='hunk'>@@ -197,9 +195,13 @@ static inline unsigned long current_stack_pointer(void)</div><div class='ctx'> </div><div class='ctx'> #else /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+# define cpu_current_top_of_stack (cpu_tss + TSS_sp0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Load thread_info address into "reg" */</div><div class='ctx'> #define GET_THREAD_INFO(reg) \</div><div class='del'>-	_ASM_MOV PER_CPU_VAR(kernel_stack),reg ; \</div><div class='add'>+	_ASM_MOV PER_CPU_VAR(cpu_current_top_of_stack),reg ; \</div><div class='ctx'> 	_ASM_SUB $(THREAD_SIZE),reg ;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h<br/>index 0e8f04f2c26f..0fb46482dfde 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/topology.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/topology.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/topology.h</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #define _ASM_X86_TOPOLOGY_H</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-# ifdef CONFIG_X86_HT</div><div class='add'>+# ifdef CONFIG_SMP</div><div class='ctx'> #  define ENABLE_TOPO_DEFINES</div><div class='ctx'> # endif</div><div class='ctx'> #else</div><div class='hunk'>@@ -124,7 +124,7 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu);</div><div class='ctx'> </div><div class='ctx'> #ifdef ENABLE_TOPO_DEFINES</div><div class='ctx'> #define topology_core_cpumask(cpu)		(per_cpu(cpu_core_map, cpu))</div><div class='del'>-#define topology_thread_cpumask(cpu)		(per_cpu(cpu_sibling_map, cpu))</div><div class='add'>+#define topology_sibling_cpumask(cpu)		(per_cpu(cpu_sibling_map, cpu))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline void arch_fix_phys_package_id(int num, u32 slot)</div><div class='head'>diff --git a/arch/x86/include/asm/trace/irq_vectors.h b/arch/x86/include/asm/trace/irq_vectors.h<br/>index 4cab890007a7..38a09a13a9bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/trace/irq_vectors.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/trace/irq_vectors.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/trace/irq_vectors.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/trace/irq_vectors.h</a></div><div class='hunk'>@@ -101,6 +101,12 @@ DEFINE_IRQ_VECTOR_EVENT(call_function_single);</div><div class='ctx'> DEFINE_IRQ_VECTOR_EVENT(threshold_apic);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * deferred_error_apic - called when entering/exiting a deferred apic interrupt</div><div class='add'>+ * vector handler</div><div class='add'>+ */</div><div class='add'>+DEFINE_IRQ_VECTOR_EVENT(deferred_error_apic);</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * thermal_apic - called when entering/exiting a thermal apic interrupt</div><div class='ctx'>  * vector handler</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/include/asm/trace/mpx.h b/arch/x86/include/asm/trace/mpx.h<br/>new file mode 100644<br/>index 000000000000..173dd3ba108c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/trace/mpx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/trace/mpx.h</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+#undef TRACE_SYSTEM</div><div class='add'>+#define TRACE_SYSTEM mpx</div><div class='add'>+</div><div class='add'>+#if !defined(_TRACE_MPX_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='add'>+#define _TRACE_MPX_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/tracepoint.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_INTEL_MPX</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(mpx_bounds_register_exception,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(void *addr_referenced,</div><div class='add'>+		 const struct bndreg *bndreg),</div><div class='add'>+	TP_ARGS(addr_referenced, bndreg),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(void *, addr_referenced)</div><div class='add'>+		__field(u64, lower_bound)</div><div class='add'>+		__field(u64, upper_bound)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__entry-&gt;addr_referenced = addr_referenced;</div><div class='add'>+		__entry-&gt;lower_bound = bndreg-&gt;lower_bound;</div><div class='add'>+		__entry-&gt;upper_bound = bndreg-&gt;upper_bound;</div><div class='add'>+	),</div><div class='add'>+	/*</div><div class='add'>+	 * Note that we are printing out the '~' of the upper</div><div class='add'>+	 * bounds register here.  It is actually stored in its</div><div class='add'>+	 * one's complement form so that its 'init' state</div><div class='add'>+	 * corresponds to all 0's.  But, that looks like</div><div class='add'>+	 * gibberish when printed out, so print out the 1's</div><div class='add'>+	 * complement instead of the actual value here.  Note</div><div class='add'>+	 * though that you still need to specify filters for the</div><div class='add'>+	 * actual value, not the displayed one.</div><div class='add'>+	 */</div><div class='add'>+	TP_printk("address referenced: 0x%p bounds: lower: 0x%llx ~upper: 0x%llx",</div><div class='add'>+		__entry-&gt;addr_referenced,</div><div class='add'>+		__entry-&gt;lower_bound,</div><div class='add'>+		~__entry-&gt;upper_bound</div><div class='add'>+	)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(bounds_exception_mpx,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(const struct bndcsr *bndcsr),</div><div class='add'>+	TP_ARGS(bndcsr),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(u64, bndcfgu)</div><div class='add'>+		__field(u64, bndstatus)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		/* need to get rid of the 'const' on bndcsr */</div><div class='add'>+		__entry-&gt;bndcfgu   = (u64)bndcsr-&gt;bndcfgu;</div><div class='add'>+		__entry-&gt;bndstatus = (u64)bndcsr-&gt;bndstatus;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("bndcfgu:0x%llx bndstatus:0x%llx",</div><div class='add'>+		__entry-&gt;bndcfgu,</div><div class='add'>+		__entry-&gt;bndstatus)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+DECLARE_EVENT_CLASS(mpx_range_trace,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(unsigned long start,</div><div class='add'>+		 unsigned long end),</div><div class='add'>+	TP_ARGS(start, end),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(unsigned long, start)</div><div class='add'>+		__field(unsigned long, end)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__entry-&gt;start = start;</div><div class='add'>+		__entry-&gt;end   = end;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("[0x%p:0x%p]",</div><div class='add'>+		(void *)__entry-&gt;start,</div><div class='add'>+		(void *)__entry-&gt;end</div><div class='add'>+	)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mpx_range_trace, mpx_unmap_zap,</div><div class='add'>+	TP_PROTO(unsigned long start, unsigned long end),</div><div class='add'>+	TP_ARGS(start, end)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mpx_range_trace, mpx_unmap_search,</div><div class='add'>+	TP_PROTO(unsigned long start, unsigned long end),</div><div class='add'>+	TP_ARGS(start, end)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(mpx_new_bounds_table,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(unsigned long table_vaddr),</div><div class='add'>+	TP_ARGS(table_vaddr),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(unsigned long, table_vaddr)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__entry-&gt;table_vaddr = table_vaddr;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("table vaddr:%p", (void *)__entry-&gt;table_vaddr)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This gets used outside of MPX-specific code, so we need a stub.</div><div class='add'>+ */</div><div class='add'>+static inline void trace_bounds_exception_mpx(const struct bndcsr *bndcsr)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_X86_INTEL_MPX */</div><div class='add'>+</div><div class='add'>+#undef TRACE_INCLUDE_PATH</div><div class='add'>+#define TRACE_INCLUDE_PATH asm/trace/</div><div class='add'>+#undef TRACE_INCLUDE_FILE</div><div class='add'>+#define TRACE_INCLUDE_FILE mpx</div><div class='add'>+#endif /* _TRACE_MPX_H */</div><div class='add'>+</div><div class='add'>+/* This part must be outside protection */</div><div class='add'>+#include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h<br/>index 4e49d7dff78e..c5380bea2a36 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/traps.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/traps.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/traps.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/traps.h</a></div><div class='hunk'>@@ -108,7 +108,8 @@ extern int panic_on_unrecovered_nmi;</div><div class='ctx'> void math_emulate(struct math_emu_info *);</div><div class='ctx'> #ifndef CONFIG_X86_32</div><div class='ctx'> asmlinkage void smp_thermal_interrupt(void);</div><div class='del'>-asmlinkage void mce_threshold_interrupt(void);</div><div class='add'>+asmlinkage void smp_threshold_interrupt(void);</div><div class='add'>+asmlinkage void smp_deferred_error_interrupt(void);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern enum ctx_state ist_enter(struct pt_regs *regs);</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h<br/>index ace9dec050b1..a8df874f3e88 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/uaccess.h</a></div><div class='hunk'>@@ -74,7 +74,8 @@ static inline bool __chk_range_not_ok(unsigned long addr, unsigned long size, un</div><div class='ctx'>  * @addr: User space pointer to start of block to check</div><div class='ctx'>  * @size: Size of block to check</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Checks if a pointer to a block of memory in user space is valid.</div><div class='ctx'>  *</div><div class='hunk'>@@ -145,7 +146,8 @@ __typeof__(__builtin_choose_expr(sizeof(x) &gt; sizeof(0UL), 0ULL, 0UL))</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -240,7 +242,8 @@ extern void __put_user_8(void);</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -455,7 +458,8 @@ struct __large_struct { unsigned long buf[100]; };</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='ctx'>  * @ptr: Source address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple variable from user space to kernel</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='hunk'>@@ -479,7 +483,8 @@ struct __large_struct { unsigned long buf[100]; };</div><div class='ctx'>  * @x:   Value to copy to user space.</div><div class='ctx'>  * @ptr: Destination address, in user space.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * This macro copies a single simple value from kernel space to user</div><div class='ctx'>  * space.  It supports simple types like char and int, but not larger</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h<br/>index 3c03a5de64d3..f5dcb5204dcd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/uaccess_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/uaccess_32.h</a></div><div class='hunk'>@@ -59,6 +59,10 @@ __copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)</div><div class='ctx'> 			__put_user_size(*(u32 *)from, (u32 __user *)to,</div><div class='ctx'> 					4, ret, 4);</div><div class='ctx'> 			return ret;</div><div class='add'>+		case 8:</div><div class='add'>+			__put_user_size(*(u64 *)from, (u64 __user *)to,</div><div class='add'>+					8, ret, 8);</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return __copy_to_user_ll(to, from, n);</div><div class='hunk'>@@ -70,7 +74,8 @@ __copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='hunk'>@@ -117,7 +122,8 @@ __copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.  Caller must check</div><div class='ctx'>  * the specified block with access_ok() before calling this function.</div><div class='head'>diff --git a/arch/x86/include/asm/user.h b/arch/x86/include/asm/user.h<br/>index ccab4af1646d..59a54e869f15 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/user.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/user.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/user.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/user.h</a></div><div class='hunk'>@@ -14,8 +14,8 @@ struct user_ymmh_regs {</div><div class='ctx'> 	__u32 ymmh_space[64];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct user_xsave_hdr {</div><div class='del'>-	__u64 xstate_bv;</div><div class='add'>+struct user_xstate_header {</div><div class='add'>+	__u64 xfeatures;</div><div class='ctx'> 	__u64 reserved1[2];</div><div class='ctx'> 	__u64 reserved2[5];</div><div class='ctx'> };</div><div class='hunk'>@@ -41,11 +41,11 @@ struct user_xsave_hdr {</div><div class='ctx'>  * particular process/thread.</div><div class='ctx'>  *</div><div class='ctx'>  * Also when the user modifies certain state FP/SSE/etc through the</div><div class='del'>- * ptrace interface, they must ensure that the xsave_hdr.xstate_bv</div><div class='add'>+ * ptrace interface, they must ensure that the header.xfeatures</div><div class='ctx'>  * bytes[512..519] of the memory layout are updated correspondingly.</div><div class='ctx'>  * i.e., for example when FP state is modified to a non-init state,</div><div class='del'>- * xsave_hdr.xstate_bv's bit 0 must be set to '1', when SSE is modified to</div><div class='del'>- * non-init state, xsave_hdr.xstate_bv's bit 1 must to be set to '1', etc.</div><div class='add'>+ * header.xfeatures's bit 0 must be set to '1', when SSE is modified to</div><div class='add'>+ * non-init state, header.xfeatures's bit 1 must to be set to '1', etc.</div><div class='ctx'>  */</div><div class='ctx'> #define USER_XSTATE_FX_SW_WORDS 6</div><div class='ctx'> #define USER_XSTATE_XCR0_WORD	0</div><div class='hunk'>@@ -55,7 +55,7 @@ struct user_xstateregs {</div><div class='ctx'> 		__u64 fpx_space[58];</div><div class='ctx'> 		__u64 xstate_fx_sw[USER_XSTATE_FX_SW_WORDS];</div><div class='ctx'> 	} i387;</div><div class='del'>-	struct user_xsave_hdr xsave_hdr;</div><div class='add'>+	struct user_xstate_header header;</div><div class='ctx'> 	struct user_ymmh_regs ymmh;</div><div class='ctx'> 	/* further processor state extensions go here */</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h<br/>index f58a9c7a3c86..48d34d28f5a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/x86_init.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/x86_init.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/x86_init.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/x86_init.h</a></div><div class='hunk'>@@ -171,38 +171,17 @@ struct x86_platform_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct pci_dev;</div><div class='del'>-struct msi_msg;</div><div class='ctx'> </div><div class='ctx'> struct x86_msi_ops {</div><div class='ctx'> 	int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);</div><div class='del'>-	void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,</div><div class='del'>-				unsigned int dest, struct msi_msg *msg,</div><div class='del'>-			       u8 hpet_id);</div><div class='ctx'> 	void (*teardown_msi_irq)(unsigned int irq);</div><div class='ctx'> 	void (*teardown_msi_irqs)(struct pci_dev *dev);</div><div class='ctx'> 	void (*restore_msi_irqs)(struct pci_dev *dev);</div><div class='del'>-	int  (*setup_hpet_msi)(unsigned int irq, unsigned int id);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct IO_APIC_route_entry;</div><div class='del'>-struct io_apic_irq_attr;</div><div class='del'>-struct irq_data;</div><div class='del'>-struct cpumask;</div><div class='del'>-</div><div class='ctx'> struct x86_io_apic_ops {</div><div class='del'>-	void		(*init)   (void);</div><div class='ctx'> 	unsigned int	(*read)   (unsigned int apic, unsigned int reg);</div><div class='del'>-	void		(*write)  (unsigned int apic, unsigned int reg, unsigned int value);</div><div class='del'>-	void		(*modify) (unsigned int apic, unsigned int reg, unsigned int value);</div><div class='ctx'> 	void		(*disable)(void);</div><div class='del'>-	void		(*print_entries)(unsigned int apic, unsigned int nr_entries);</div><div class='del'>-	int		(*set_affinity)(struct irq_data *data,</div><div class='del'>-					const struct cpumask *mask,</div><div class='del'>-					bool force);</div><div class='del'>-	int		(*setup_entry)(int irq, struct IO_APIC_route_entry *entry,</div><div class='del'>-				       unsigned int destination, int vector,</div><div class='del'>-				       struct io_apic_irq_attr *attr);</div><div class='del'>-	void		(*eoi_ioapic_pin)(int apic, int pin, int vector);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct x86_init_ops x86_init;</div><div class='head'>diff --git a/arch/x86/include/asm/xcr.h b/arch/x86/include/asm/xcr.h<br/>deleted file mode 100644<br/>index f2cba4e79a23..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xcr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/xcr.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/* -*- linux-c -*- ------------------------------------------------------- *</div><div class='del'>- *</div><div class='del'>- *   Copyright 2008 rPath, Inc. - All Rights Reserved</div><div class='del'>- *</div><div class='del'>- *   This file is part of the Linux kernel, and is made available under</div><div class='del'>- *   the terms of the GNU General Public License version 2 or (at your</div><div class='del'>- *   option) any later version; incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- * ----------------------------------------------------------------------- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * asm-x86/xcr.h</div><div class='del'>- *</div><div class='del'>- * Definitions for the eXtended Control Register instructions</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_X86_XCR_H</div><div class='del'>-#define _ASM_X86_XCR_H</div><div class='del'>-</div><div class='del'>-#define XCR_XFEATURE_ENABLED_MASK	0x00000000</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-static inline u64 xgetbv(u32 index)</div><div class='del'>-{</div><div class='del'>-	u32 eax, edx;</div><div class='del'>-</div><div class='del'>-	asm volatile(".byte 0x0f,0x01,0xd0" /* xgetbv */</div><div class='del'>-		     : "=a" (eax), "=d" (edx)</div><div class='del'>-		     : "c" (index));</div><div class='del'>-	return eax + ((u64)edx &lt;&lt; 32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void xsetbv(u32 index, u64 value)</div><div class='del'>-{</div><div class='del'>-	u32 eax = value;</div><div class='del'>-	u32 edx = value &gt;&gt; 32;</div><div class='del'>-</div><div class='del'>-	asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */</div><div class='del'>-		     : : "a" (eax), "d" (edx), "c" (index));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_XCR_H */</div><div class='head'>diff --git a/arch/x86/include/asm/xor.h b/arch/x86/include/asm/xor.h<br/>index d8829751b3f8..1f5c5161ead6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/xor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'>  * no advantages to be gotten from x86-64 here anyways.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> /* reduce register pressure */</div><div class='head'>diff --git a/arch/x86/include/asm/xor_32.h b/arch/x86/include/asm/xor_32.h<br/>index ce05722e3c68..5a08bc8bff33 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xor_32.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/xor_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor_32.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor_32.h</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #define XO3(x, y)	"       pxor   8*("#x")(%4), %%mm"#y"   ;\n"</div><div class='ctx'> #define XO4(x, y)	"       pxor   8*("#x")(%5), %%mm"#y"   ;\n"</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> xor_pII_mmx_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)</div><div class='head'>diff --git a/arch/x86/include/asm/xor_avx.h b/arch/x86/include/asm/xor_avx.h<br/>index 492b29802f57..7c0a517ec751 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xor_avx.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/xor_avx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor_avx.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/asm/xor_avx.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #ifdef CONFIG_AS_AVX</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define BLOCK4(i) \</div><div class='ctx'> 		BLOCK(32 * i, 0) \</div><div class='head'>diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h<br/>deleted file mode 100644<br/>index c9a6d68b8d62..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xsave.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/asm/xsave.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,257 +0,0 @@</div><div class='del'>-#ifndef __ASM_X86_XSAVE_H</div><div class='del'>-#define __ASM_X86_XSAVE_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-</div><div class='del'>-#define XSTATE_CPUID		0x0000000d</div><div class='del'>-</div><div class='del'>-#define XSTATE_FP		0x1</div><div class='del'>-#define XSTATE_SSE		0x2</div><div class='del'>-#define XSTATE_YMM		0x4</div><div class='del'>-#define XSTATE_BNDREGS		0x8</div><div class='del'>-#define XSTATE_BNDCSR		0x10</div><div class='del'>-#define XSTATE_OPMASK		0x20</div><div class='del'>-#define XSTATE_ZMM_Hi256	0x40</div><div class='del'>-#define XSTATE_Hi16_ZMM		0x80</div><div class='del'>-</div><div class='del'>-#define XSTATE_FPSSE	(XSTATE_FP | XSTATE_SSE)</div><div class='del'>-#define XSTATE_AVX512	(XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)</div><div class='del'>-/* Bit 63 of XCR0 is reserved for future expansion */</div><div class='del'>-#define XSTATE_EXTEND_MASK	(~(XSTATE_FPSSE | (1ULL &lt;&lt; 63)))</div><div class='del'>-</div><div class='del'>-#define FXSAVE_SIZE	512</div><div class='del'>-</div><div class='del'>-#define XSAVE_HDR_SIZE	    64</div><div class='del'>-#define XSAVE_HDR_OFFSET    FXSAVE_SIZE</div><div class='del'>-</div><div class='del'>-#define XSAVE_YMM_SIZE	    256</div><div class='del'>-#define XSAVE_YMM_OFFSET    (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)</div><div class='del'>-</div><div class='del'>-/* Supported features which support lazy state saving */</div><div class='del'>-#define XSTATE_LAZY	(XSTATE_FP | XSTATE_SSE | XSTATE_YMM		      \</div><div class='del'>-			| XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)</div><div class='del'>-</div><div class='del'>-/* Supported features which require eager state saving */</div><div class='del'>-#define XSTATE_EAGER	(XSTATE_BNDREGS | XSTATE_BNDCSR)</div><div class='del'>-</div><div class='del'>-/* All currently supported features */</div><div class='del'>-#define XCNTXT_MASK	(XSTATE_LAZY | XSTATE_EAGER)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-#define REX_PREFIX	"0x48, "</div><div class='del'>-#else</div><div class='del'>-#define REX_PREFIX</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-extern unsigned int xstate_size;</div><div class='del'>-extern u64 pcntxt_mask;</div><div class='del'>-extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];</div><div class='del'>-extern struct xsave_struct *init_xstate_buf;</div><div class='del'>-</div><div class='del'>-extern void xsave_init(void);</div><div class='del'>-extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);</div><div class='del'>-extern int init_fpu(struct task_struct *child);</div><div class='del'>-</div><div class='del'>-/* These macros all use (%edi)/(%rdi) as the single memory argument. */</div><div class='del'>-#define XSAVE		".byte " REX_PREFIX "0x0f,0xae,0x27"</div><div class='del'>-#define XSAVEOPT	".byte " REX_PREFIX "0x0f,0xae,0x37"</div><div class='del'>-#define XSAVES		".byte " REX_PREFIX "0x0f,0xc7,0x2f"</div><div class='del'>-#define XRSTOR		".byte " REX_PREFIX "0x0f,0xae,0x2f"</div><div class='del'>-#define XRSTORS		".byte " REX_PREFIX "0x0f,0xc7,0x1f"</div><div class='del'>-</div><div class='del'>-#define xstate_fault	".section .fixup,\"ax\"\n"	\</div><div class='del'>-			"3:  movl $-1,%[err]\n"		\</div><div class='del'>-			"    jmp  2b\n"			\</div><div class='del'>-			".previous\n"			\</div><div class='del'>-			_ASM_EXTABLE(1b, 3b)		\</div><div class='del'>-			: [err] "=r" (err)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function is called only during boot time when x86 caps are not set</div><div class='del'>- * up and alternative can not be used yet.</div><div class='del'>- */</div><div class='del'>-static inline int xsave_state_booting(struct xsave_struct *fx, u64 mask)</div><div class='del'>-{</div><div class='del'>-	u32 lmask = mask;</div><div class='del'>-	u32 hmask = mask &gt;&gt; 32;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	WARN_ON(system_state != SYSTEM_BOOTING);</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_XSAVES))</div><div class='del'>-		asm volatile("1:"XSAVES"\n\t"</div><div class='del'>-			"2:\n\t"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			: "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)</div><div class='del'>-			:   "memory");</div><div class='del'>-	else</div><div class='del'>-		asm volatile("1:"XSAVE"\n\t"</div><div class='del'>-			"2:\n\t"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			: "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)</div><div class='del'>-			:   "memory");</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function is called only during boot time when x86 caps are not set</div><div class='del'>- * up and alternative can not be used yet.</div><div class='del'>- */</div><div class='del'>-static inline int xrstor_state_booting(struct xsave_struct *fx, u64 mask)</div><div class='del'>-{</div><div class='del'>-	u32 lmask = mask;</div><div class='del'>-	u32 hmask = mask &gt;&gt; 32;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	WARN_ON(system_state != SYSTEM_BOOTING);</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_XSAVES))</div><div class='del'>-		asm volatile("1:"XRSTORS"\n\t"</div><div class='del'>-			"2:\n\t"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			: "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)</div><div class='del'>-			:   "memory");</div><div class='del'>-	else</div><div class='del'>-		asm volatile("1:"XRSTOR"\n\t"</div><div class='del'>-			"2:\n\t"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			: "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)</div><div class='del'>-			:   "memory");</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Save processor xstate to xsave area.</div><div class='del'>- */</div><div class='del'>-static inline int xsave_state(struct xsave_struct *fx, u64 mask)</div><div class='del'>-{</div><div class='del'>-	u32 lmask = mask;</div><div class='del'>-	u32 hmask = mask &gt;&gt; 32;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If xsaves is enabled, xsaves replaces xsaveopt because</div><div class='del'>-	 * it supports compact format and supervisor states in addition to</div><div class='del'>-	 * modified optimization in xsaveopt.</div><div class='del'>-	 *</div><div class='del'>-	 * Otherwise, if xsaveopt is enabled, xsaveopt replaces xsave</div><div class='del'>-	 * because xsaveopt supports modified optimization which is not</div><div class='del'>-	 * supported by xsave.</div><div class='del'>-	 *</div><div class='del'>-	 * If none of xsaves and xsaveopt is enabled, use xsave.</div><div class='del'>-	 */</div><div class='del'>-	alternative_input_2(</div><div class='del'>-		"1:"XSAVE,</div><div class='del'>-		XSAVEOPT,</div><div class='del'>-		X86_FEATURE_XSAVEOPT,</div><div class='del'>-		XSAVES,</div><div class='del'>-		X86_FEATURE_XSAVES,</div><div class='del'>-		[fx] "D" (fx), "a" (lmask), "d" (hmask) :</div><div class='del'>-		"memory");</div><div class='del'>-	asm volatile("2:\n\t"</div><div class='del'>-		     xstate_fault</div><div class='del'>-		     : "0" (0)</div><div class='del'>-		     : "memory");</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restore processor xstate from xsave area.</div><div class='del'>- */</div><div class='del'>-static inline int xrstor_state(struct xsave_struct *fx, u64 mask)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-	u32 lmask = mask;</div><div class='del'>-	u32 hmask = mask &gt;&gt; 32;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Use xrstors to restore context if it is enabled. xrstors supports</div><div class='del'>-	 * compacted format of xsave area which is not supported by xrstor.</div><div class='del'>-	 */</div><div class='del'>-	alternative_input(</div><div class='del'>-		"1: " XRSTOR,</div><div class='del'>-		XRSTORS,</div><div class='del'>-		X86_FEATURE_XSAVES,</div><div class='del'>-		"D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)</div><div class='del'>-		: "memory");</div><div class='del'>-</div><div class='del'>-	asm volatile("2:\n"</div><div class='del'>-		     xstate_fault</div><div class='del'>-		     : "0" (0)</div><div class='del'>-		     : "memory");</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Save xstate context for old process during context switch.</div><div class='del'>- */</div><div class='del'>-static inline void fpu_xsave(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	xsave_state(&amp;fpu-&gt;state-&gt;xsave, -1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restore xstate context for new process during context switch.</div><div class='del'>- */</div><div class='del'>-static inline int fpu_xrstor_checking(struct xsave_struct *fx)</div><div class='del'>-{</div><div class='del'>-	return xrstor_state(fx, -1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Save xstate to user space xsave area.</div><div class='del'>- *</div><div class='del'>- * We don't use modified optimization because xrstor/xrstors might track</div><div class='del'>- * a different application.</div><div class='del'>- *</div><div class='del'>- * We don't use compacted format xsave area for</div><div class='del'>- * backward compatibility for old applications which don't understand</div><div class='del'>- * compacted format of xsave area.</div><div class='del'>- */</div><div class='del'>-static inline int xsave_user(struct xsave_struct __user *buf)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Clear the xsave header first, so that reserved fields are</div><div class='del'>-	 * initialized to zero.</div><div class='del'>-	 */</div><div class='del'>-	err = __clear_user(&amp;buf-&gt;xsave_hdr, sizeof(buf-&gt;xsave_hdr));</div><div class='del'>-	if (unlikely(err))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(ASM_STAC "\n"</div><div class='del'>-			     "1:"XSAVE"\n"</div><div class='del'>-			     "2: " ASM_CLAC "\n"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			     : "D" (buf), "a" (-1), "d" (-1), "0" (0)</div><div class='del'>-			     : "memory");</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restore xstate from user space xsave area.</div><div class='del'>- */</div><div class='del'>-static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-	struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);</div><div class='del'>-	u32 lmask = mask;</div><div class='del'>-	u32 hmask = mask &gt;&gt; 32;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(ASM_STAC "\n"</div><div class='del'>-			     "1:"XRSTOR"\n"</div><div class='del'>-			     "2: " ASM_CLAC "\n"</div><div class='del'>-			     xstate_fault</div><div class='del'>-			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)</div><div class='del'>-			     : "memory");	/* memory required? */</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void *get_xsave_addr(struct xsave_struct *xsave, int xstate);</div><div class='del'>-void setup_xstate_comp(void);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/e820.h b/arch/x86/include/uapi/asm/e820.h<br/>index 960a8a9dc4ab..0f457e6eab18 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/e820.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/e820.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/e820.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/e820.h</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #define E820_ACPI	3</div><div class='ctx'> #define E820_NVS	4</div><div class='ctx'> #define E820_UNUSABLE	5</div><div class='add'>+#define E820_PMEM	7</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is a non-standardized way to represent ADR or NVDIMM regions that</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h<br/>index ce6068dbcfbc..f36d56bd7632 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/hyperv.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/hyperv.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/hyperv.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/hyperv.h</a></div><div class='hunk'>@@ -108,6 +108,8 @@</div><div class='ctx'> #define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE		(1 &lt;&lt; 4)</div><div class='ctx'> /* Support for a virtual guest idle state is available */</div><div class='ctx'> #define HV_X64_GUEST_IDLE_STATE_AVAILABLE		(1 &lt;&lt; 5)</div><div class='add'>+/* Guest crash data handler available */</div><div class='add'>+#define HV_X64_GUEST_CRASH_MSR_AVAILABLE		(1 &lt;&lt; 10)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Implementation recommendations. Indicates which behaviors the hypervisor</div><div class='hunk'>@@ -199,6 +201,17 @@</div><div class='ctx'> #define HV_X64_MSR_STIMER3_CONFIG		0x400000B6</div><div class='ctx'> #define HV_X64_MSR_STIMER3_COUNT		0x400000B7</div><div class='ctx'> </div><div class='add'>+/* Hyper-V guest crash notification MSR's */</div><div class='add'>+#define HV_X64_MSR_CRASH_P0			0x40000100</div><div class='add'>+#define HV_X64_MSR_CRASH_P1			0x40000101</div><div class='add'>+#define HV_X64_MSR_CRASH_P2			0x40000102</div><div class='add'>+#define HV_X64_MSR_CRASH_P3			0x40000103</div><div class='add'>+#define HV_X64_MSR_CRASH_P4			0x40000104</div><div class='add'>+#define HV_X64_MSR_CRASH_CTL			0x40000105</div><div class='add'>+#define HV_X64_MSR_CRASH_CTL_NOTIFY		(1ULL &lt;&lt; 63)</div><div class='add'>+#define HV_X64_MSR_CRASH_PARAMS		\</div><div class='add'>+		(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))</div><div class='add'>+</div><div class='ctx'> #define HV_X64_MSR_HYPERCALL_ENABLE		0x00000001</div><div class='ctx'> #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT	12</div><div class='ctx'> #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK	\</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h<br/>index d7dcef58aefa..a4ae82eb82aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/kvm.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/kvm.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -106,6 +106,8 @@ struct kvm_ioapic_state {</div><div class='ctx'> #define KVM_IRQCHIP_IOAPIC       2</div><div class='ctx'> #define KVM_NR_IRQCHIPS          3</div><div class='ctx'> </div><div class='add'>+#define KVM_RUN_X86_SMM		 (1 &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> /* for KVM_GET_REGS and KVM_SET_REGS */</div><div class='ctx'> struct kvm_regs {</div><div class='ctx'> 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */</div><div class='hunk'>@@ -281,6 +283,7 @@ struct kvm_reinject_control {</div><div class='ctx'> #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001</div><div class='ctx'> #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002</div><div class='ctx'> #define KVM_VCPUEVENT_VALID_SHADOW	0x00000004</div><div class='add'>+#define KVM_VCPUEVENT_VALID_SMM		0x00000008</div><div class='ctx'> </div><div class='ctx'> /* Interrupt shadow states */</div><div class='ctx'> #define KVM_X86_SHADOW_INT_MOV_SS	0x01</div><div class='hunk'>@@ -309,7 +312,13 @@ struct kvm_vcpu_events {</div><div class='ctx'> 	} nmi;</div><div class='ctx'> 	__u32 sipi_vector;</div><div class='ctx'> 	__u32 flags;</div><div class='del'>-	__u32 reserved[10];</div><div class='add'>+	struct {</div><div class='add'>+		__u8 smm;</div><div class='add'>+		__u8 pending;</div><div class='add'>+		__u8 smm_inside_nmi;</div><div class='add'>+		__u8 latched_init;</div><div class='add'>+	} smi;</div><div class='add'>+	__u32 reserved[9];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* for KVM_GET/SET_DEBUGREGS */</div><div class='hunk'>@@ -345,4 +354,7 @@ struct kvm_xcrs {</div><div class='ctx'> struct kvm_sync_regs {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define KVM_QUIRK_LINT0_REENABLED	(1 &lt;&lt; 0)</div><div class='add'>+#define KVM_QUIRK_CD_NW_CLEARED		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_KVM_H */</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/msr.h b/arch/x86/include/uapi/asm/msr.h<br/>index 155e51048fa4..c41f4fe25483 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/msr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/msr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/msr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/msr.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> #ifndef _UAPI_ASM_X86_MSR_H</div><div class='ctx'> #define _UAPI_ASM_X86_MSR_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/msr-index.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/mtrr.h b/arch/x86/include/uapi/asm/mtrr.h<br/>index d0acb658c8f4..7528dcf59691 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/mtrr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/mtrr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/mtrr.h</a></div><div class='hunk'>@@ -103,7 +103,7 @@ struct mtrr_state_type {</div><div class='ctx'> #define MTRRIOC_GET_PAGE_ENTRY   _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)</div><div class='ctx'> #define MTRRIOC_KILL_PAGE_ENTRY  _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry)</div><div class='ctx'> </div><div class='del'>-/*  These are the region types  */</div><div class='add'>+/* MTRR memory types, which are defined in SDM */</div><div class='ctx'> #define MTRR_TYPE_UNCACHABLE 0</div><div class='ctx'> #define MTRR_TYPE_WRCOMB     1</div><div class='ctx'> /*#define MTRR_TYPE_         2*/</div><div class='hunk'>@@ -113,5 +113,11 @@ struct mtrr_state_type {</div><div class='ctx'> #define MTRR_TYPE_WRBACK     6</div><div class='ctx'> #define MTRR_NUM_TYPES       7</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Invalid MTRR memory type.  mtrr_type_lookup() returns this value when</div><div class='add'>+ * MTRRs are disabled.  Note, this value is allocated from the reserved</div><div class='add'>+ * values (0x7-0xff) of the MTRR memory types.</div><div class='add'>+ */</div><div class='add'>+#define MTRR_TYPE_INVALID    0xff</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_X86_MTRR_H */</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/sigcontext.h b/arch/x86/include/uapi/asm/sigcontext.h<br/>index 16dc4e8a2cd3..0e8a973de9ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/sigcontext.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/include/uapi/asm/sigcontext.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/uapi/asm/sigcontext.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/include/uapi/asm/sigcontext.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@ struct _fpx_sw_bytes {</div><div class='ctx'> 	__u32 extended_size;	/* total size of the layout referred by</div><div class='ctx'> 				 * fpstate pointer in the sigcontext.</div><div class='ctx'> 				 */</div><div class='del'>-	__u64 xstate_bv;</div><div class='add'>+	__u64 xfeatures;</div><div class='ctx'> 				/* feature bit mask (including fp/sse/extended</div><div class='ctx'> 				 * state) that is present in the memory</div><div class='ctx'> 				 * layout.</div><div class='hunk'>@@ -209,8 +209,8 @@ struct sigcontext {</div><div class='ctx'> </div><div class='ctx'> #endif /* !__i386__ */</div><div class='ctx'> </div><div class='del'>-struct _xsave_hdr {</div><div class='del'>-	__u64 xstate_bv;</div><div class='add'>+struct _header {</div><div class='add'>+	__u64 xfeatures;</div><div class='ctx'> 	__u64 reserved1[2];</div><div class='ctx'> 	__u64 reserved2[5];</div><div class='ctx'> };</div><div class='hunk'>@@ -228,7 +228,7 @@ struct _ymmh_state {</div><div class='ctx'>  */</div><div class='ctx'> struct _xstate {</div><div class='ctx'> 	struct _fpstate fpstate;</div><div class='del'>-	struct _xsave_hdr xstate_hdr;</div><div class='add'>+	struct _header xstate_hdr;</div><div class='ctx'> 	struct _ymmh_state ymmh;</div><div class='ctx'> 	/* new processor state extensions go here */</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile<br/>index 9bcd0b56ca17..0f15af41bd80 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/Makefile</a></div><div class='hunk'>@@ -22,7 +22,7 @@ KASAN_SANITIZE_dumpstack_$(BITS).o := n</div><div class='ctx'> </div><div class='ctx'> CFLAGS_irq.o := -I$(src)/../include/asm/trace</div><div class='ctx'> </div><div class='del'>-obj-y			:= process_$(BITS).o signal.o entry_$(BITS).o</div><div class='add'>+obj-y			:= process_$(BITS).o signal.o</div><div class='ctx'> obj-y			+= traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o</div><div class='ctx'> obj-y			+= time.o ioport.o ldt.o dumpstack.o nmi.o</div><div class='ctx'> obj-y			+= setup.o x86_init.o i8259.o irqinit.o jump_label.o</div><div class='hunk'>@@ -31,9 +31,6 @@ obj-y			+= probe_roms.o</div><div class='ctx'> obj-$(CONFIG_X86_32)	+= i386_ksyms_32.o</div><div class='ctx'> obj-$(CONFIG_X86_64)	+= sys_x86_64.o x8664_ksyms_64.o</div><div class='ctx'> obj-$(CONFIG_X86_64)	+= mcount_64.o</div><div class='del'>-obj-y			+= syscall_$(BITS).o vsyscall_gtod.o</div><div class='del'>-obj-$(CONFIG_IA32_EMULATION)	+= syscall_32.o</div><div class='del'>-obj-$(CONFIG_X86_VSYSCALL_EMULATION)	+= vsyscall_64.o vsyscall_emu_64.o</div><div class='ctx'> obj-$(CONFIG_X86_ESPFIX64)	+= espfix_64.o</div><div class='ctx'> obj-$(CONFIG_SYSFS)	+= ksysfs.o</div><div class='ctx'> obj-y			+= bootflag.o e820.o</div><div class='hunk'>@@ -44,7 +41,7 @@ obj-y			+= pci-iommu_table.o</div><div class='ctx'> obj-y			+= resource.o</div><div class='ctx'> </div><div class='ctx'> obj-y				+= process.o</div><div class='del'>-obj-y				+= i387.o xsave.o</div><div class='add'>+obj-y				+= fpu/</div><div class='ctx'> obj-y				+= ptrace.o</div><div class='ctx'> obj-$(CONFIG_X86_32)		+= tls.o</div><div class='ctx'> obj-$(CONFIG_IA32_EMULATION)	+= tls.o</div><div class='head'>diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c<br/>index dbe76a14c3c9..e49ee24da85e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/boot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/acpi/boot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/boot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/boot.c</a></div><div class='hunk'>@@ -31,12 +31,12 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='hunk'>@@ -400,57 +400,13 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,</div><div class='del'>-			   int polarity)</div><div class='del'>-{</div><div class='del'>-	int irq, node;</div><div class='del'>-</div><div class='del'>-	if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)</div><div class='del'>-		return gsi;</div><div class='del'>-</div><div class='del'>-	trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;</div><div class='del'>-	polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;</div><div class='del'>-	node = dev ? dev_to_node(dev) : NUMA_NO_NODE;</div><div class='del'>-	if (mp_set_gsi_attr(gsi, trigger, polarity, node)) {</div><div class='del'>-		pr_warn("Failed to set pin attr for GSI%d\n", gsi);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);</div><div class='del'>-	if (irq &lt; 0)</div><div class='del'>-		return irq;</div><div class='del'>-</div><div class='del'>-	/* Don't set up the ACPI SCI because it's already set up */</div><div class='del'>-	if (enable_update_mptable &amp;&amp; acpi_gbl_FADT.sci_interrupt != gsi)</div><div class='del'>-		mp_config_acpi_gsi(dev, gsi, trigger, polarity);</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mp_unregister_gsi(u32 gsi)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	irq = mp_map_gsi_to_irq(gsi, 0);</div><div class='del'>-	if (irq &gt; 0)</div><div class='del'>-		mp_unmap_irq(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_domain_ops acpi_irqdomain_ops = {</div><div class='del'>-	.map = mp_irqdomain_map,</div><div class='del'>-	.unmap = mp_irqdomain_unmap,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __init</div><div class='ctx'> acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_madt_io_apic *ioapic = NULL;</div><div class='ctx'> 	struct ioapic_domain_cfg cfg = {</div><div class='ctx'> 		.type = IOAPIC_DOMAIN_DYNAMIC,</div><div class='del'>-		.ops = &amp;acpi_irqdomain_ops,</div><div class='add'>+		.ops = &amp;mp_ioapic_irqdomain_ops,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ioapic = (struct acpi_madt_io_apic *)header;</div><div class='hunk'>@@ -652,7 +608,7 @@ static int acpi_register_gsi_pic(struct device *dev, u32 gsi,</div><div class='ctx'> 	 * Make sure all (legacy) PCI IRQs are set as level-triggered.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (trigger == ACPI_LEVEL_SENSITIVE)</div><div class='del'>-		eisa_set_level_irq(gsi);</div><div class='add'>+		elcr_set_level_irq(gsi);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return gsi;</div><div class='hunk'>@@ -663,10 +619,21 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,</div><div class='ctx'> 				    int trigger, int polarity)</div><div class='ctx'> {</div><div class='ctx'> 	int irq = gsi;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_IO_APIC</div><div class='add'>+	int node;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='add'>+</div><div class='add'>+	node = dev ? dev_to_node(dev) : NUMA_NO_NODE;</div><div class='add'>+	trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;</div><div class='add'>+	polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;</div><div class='add'>+	ioapic_set_alloc_attr(&amp;info, node, trigger, polarity);</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;acpi_ioapic_lock);</div><div class='del'>-	irq = mp_register_gsi(dev, gsi, trigger, polarity);</div><div class='add'>+	irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &amp;info);</div><div class='add'>+	/* Don't set up the ACPI SCI because it's already set up */</div><div class='add'>+	if (irq &gt;= 0 &amp;&amp; enable_update_mptable &amp;&amp;</div><div class='add'>+	    acpi_gbl_FADT.sci_interrupt != gsi)</div><div class='add'>+		mp_config_acpi_gsi(dev, gsi, trigger, polarity);</div><div class='ctx'> 	mutex_unlock(&amp;acpi_ioapic_lock);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -676,8 +643,12 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,</div><div class='ctx'> static void acpi_unregister_gsi_ioapic(u32 gsi)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_X86_IO_APIC</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;acpi_ioapic_lock);</div><div class='del'>-	mp_unregister_gsi(gsi);</div><div class='add'>+	irq = mp_map_gsi_to_irq(gsi, 0, NULL);</div><div class='add'>+	if (irq &gt; 0)</div><div class='add'>+		mp_unmap_irq(irq);</div><div class='ctx'> 	mutex_unlock(&amp;acpi_ioapic_lock);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='hunk'>@@ -786,7 +757,7 @@ int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)</div><div class='ctx'> 	u64 addr;</div><div class='ctx'> 	struct ioapic_domain_cfg cfg = {</div><div class='ctx'> 		.type = IOAPIC_DOMAIN_DYNAMIC,</div><div class='del'>-		.ops = &amp;acpi_irqdomain_ops,</div><div class='add'>+		.ops = &amp;mp_ioapic_irqdomain_ops,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &amp;addr);</div><div class='head'>diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S<br/>index 665c6b7d2ea9..0c26b1b44e51 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/wakeup_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/acpi/wakeup_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/wakeup_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/wakeup_32.S</a></div><div class='hunk'>@@ -12,11 +12,13 @@ ENTRY(wakeup_pmode_return)</div><div class='ctx'> wakeup_pmode_return:</div><div class='ctx'> 	movw	$__KERNEL_DS, %ax</div><div class='ctx'> 	movw	%ax, %ss</div><div class='del'>-	movw	%ax, %ds</div><div class='del'>-	movw	%ax, %es</div><div class='ctx'> 	movw	%ax, %fs</div><div class='ctx'> 	movw	%ax, %gs</div><div class='ctx'> </div><div class='add'>+	movw	$__USER_DS, %ax</div><div class='add'>+	movw	%ax, %ds</div><div class='add'>+	movw	%ax, %es</div><div class='add'>+</div><div class='ctx'> 	# reload the gdt, as we need the full 32 bit address</div><div class='ctx'> 	lidt	saved_idt</div><div class='ctx'> 	lldt	saved_ldt</div><div class='head'>diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S<br/>index ae693b51ed8e..8c35df468104 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/wakeup_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/acpi/wakeup_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/wakeup_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/acpi/wakeup_64.S</a></div><div class='hunk'>@@ -62,7 +62,7 @@ ENTRY(do_suspend_lowlevel)</div><div class='ctx'> 	pushfq</div><div class='ctx'> 	popq	pt_regs_flags(%rax)</div><div class='ctx'> </div><div class='del'>-	movq	$resume_point, saved_rip(%rip)</div><div class='add'>+	movq	$.Lresume_point, saved_rip(%rip)</div><div class='ctx'> </div><div class='ctx'> 	movq	%rsp, saved_rsp</div><div class='ctx'> 	movq	%rbp, saved_rbp</div><div class='hunk'>@@ -75,10 +75,10 @@ ENTRY(do_suspend_lowlevel)</div><div class='ctx'> 	xorl	%eax, %eax</div><div class='ctx'> 	call	x86_acpi_enter_sleep_state</div><div class='ctx'> 	/* in case something went wrong, restore the machine status and go on */</div><div class='del'>-	jmp	resume_point</div><div class='add'>+	jmp	.Lresume_point</div><div class='ctx'> </div><div class='ctx'> 	.align 4</div><div class='del'>-resume_point:</div><div class='add'>+.Lresume_point:</div><div class='ctx'> 	/* We don't restore %rax, it must be 0 anyway */</div><div class='ctx'> 	movq	$saved_context, %rax</div><div class='ctx'> 	movq	saved_context_cr4(%rax), %rbx</div><div class='head'>diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c<br/>index aef653193160..c42827eb86cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/alternative.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/alternative.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/alternative.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/alternative.c</a></div><div class='hunk'>@@ -21,6 +21,10 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> </div><div class='add'>+int __read_mostly alternatives_patched;</div><div class='add'>+</div><div class='add'>+EXPORT_SYMBOL_GPL(alternatives_patched);</div><div class='add'>+</div><div class='ctx'> #define MAX_PATCH_LEN (255-1)</div><div class='ctx'> </div><div class='ctx'> static int __initdata_or_module debug_alternative;</div><div class='hunk'>@@ -227,6 +231,15 @@ void __init arch_init_ideal_nops(void)</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case X86_VENDOR_AMD:</div><div class='add'>+		if (boot_cpu_data.x86 &gt; 0xf) {</div><div class='add'>+			ideal_nops = p6_nops;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* fall through */</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 		ideal_nops = k8_nops;</div><div class='hunk'>@@ -627,6 +640,7 @@ void __init alternative_instructions(void)</div><div class='ctx'> 	apply_paravirt(__parainstructions, __parainstructions_end);</div><div class='ctx'> </div><div class='ctx'> 	restart_nmi();</div><div class='add'>+	alternatives_patched = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c<br/>index 5caed1dd7ccf..29fa475ec518 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/amd_nb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/amd_nb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/amd_nb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/amd_nb.c</a></div><div class='hunk'>@@ -89,9 +89,7 @@ int amd_cache_northbridges(void)</div><div class='ctx'> 			next_northbridge(link, amd_nb_link_ids);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* GART present only on Fam15h upto model 0fh */</div><div class='del'>-	if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||</div><div class='del'>-	    (boot_cpu_data.x86 == 0x15 &amp;&amp; boot_cpu_data.x86_model &lt; 0x10))</div><div class='add'>+	if (amd_gart_present())</div><div class='ctx'> 		amd_northbridges.flags |= AMD_NB_GART;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c<br/>index 6a7c23ff21d3..ede92c3364d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apb_timer.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apb_timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apb_timer.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apb_timer.c</a></div><div class='hunk'>@@ -171,10 +171,6 @@ static int __init apbt_clockevent_register(void)</div><div class='ctx'> </div><div class='ctx'> static void apbt_setup_irq(struct apbt_dev *adev)</div><div class='ctx'> {</div><div class='del'>-	/* timer0 irq has been setup early */</div><div class='del'>-	if (adev-&gt;irq == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	irq_modify_status(adev-&gt;irq, 0, IRQ_MOVE_PCNTXT);</div><div class='ctx'> 	irq_set_affinity(adev-&gt;irq, cpumask_of(adev-&gt;cpu));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c<br/>index 76164e173a24..6e85f713641d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/aperture_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/aperture_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/aperture_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/aperture_64.c</a></div><div class='hunk'>@@ -262,6 +262,9 @@ void __init early_gart_iommu_check(void)</div><div class='ctx'> 	u64 aper_base = 0, last_aper_base = 0;</div><div class='ctx'> 	int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0;</div><div class='ctx'> </div><div class='add'>+	if (!amd_gart_present())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (!early_pci_allowed())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -355,6 +358,9 @@ int __init gart_iommu_hole_init(void)</div><div class='ctx'> 	int fix, slot, valid_agp = 0;</div><div class='ctx'> 	int i, node;</div><div class='ctx'> </div><div class='add'>+	if (!amd_gart_present())</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (gart_iommu_aperture_disabled || !fix_aperture ||</div><div class='ctx'> 	    !early_pci_allowed())</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -452,7 +458,7 @@ out:</div><div class='ctx'> 		   force_iommu ||</div><div class='ctx'> 		   valid_agp ||</div><div class='ctx'> 		   fallback_aper_force) {</div><div class='del'>-		pr_info("Your BIOS doesn't leave a aperture memory hole\n");</div><div class='add'>+		pr_info("Your BIOS doesn't leave an aperture memory hole\n");</div><div class='ctx'> 		pr_info("Please enable the IOMMU option in the BIOS setup\n");</div><div class='ctx'> 		pr_info("This costs you %dMB of RAM\n",</div><div class='ctx'> 			32 &lt;&lt; fallback_aper_order);</div><div class='head'>diff --git a/arch/x86/kernel/apic/htirq.c b/arch/x86/kernel/apic/htirq.c<br/>index 816f36e979ad..ae50d3454d78 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/htirq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apic/htirq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/htirq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/htirq.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo</div><div class='ctx'>  *	Moved from arch/x86/kernel/apic/io_apic.c.</div><div class='add'>+ * Jiang Liu &lt;jiang.liu@linux.intel.com&gt;</div><div class='add'>+ *	Add support of hierarchical irqdomain</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -14,78 +16,112 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/htirq.h&gt;</div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/hypertransport.h&gt;</div><div class='ctx'> </div><div class='add'>+static struct irq_domain *htirq_domain;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Hypertransport interrupt support</div><div class='ctx'>  */</div><div class='del'>-static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)</div><div class='del'>-{</div><div class='del'>-	struct ht_irq_msg msg;</div><div class='del'>-</div><div class='del'>-	fetch_ht_irq_msg(irq, &amp;msg);</div><div class='del'>-</div><div class='del'>-	msg.address_lo &amp;= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK);</div><div class='del'>-	msg.address_hi &amp;= ~(HT_IRQ_HIGH_DEST_ID_MASK);</div><div class='del'>-</div><div class='del'>-	msg.address_lo |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest);</div><div class='del'>-	msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest);</div><div class='del'>-</div><div class='del'>-	write_ht_irq_msg(irq, &amp;msg);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> ht_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	unsigned int dest;</div><div class='add'>+	struct irq_data *parent = data-&gt;parent_data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = apic_set_affinity(data, mask, &amp;dest);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	target_ht_irq(data-&gt;irq, dest, cfg-&gt;vector);</div><div class='del'>-	return IRQ_SET_MASK_OK_NOCOPY;</div><div class='add'>+	ret = parent-&gt;chip-&gt;irq_set_affinity(parent, mask, force);</div><div class='add'>+	if (ret &gt;= 0) {</div><div class='add'>+		struct ht_irq_msg msg;</div><div class='add'>+		struct irq_cfg *cfg = irqd_cfg(data);</div><div class='add'>+</div><div class='add'>+		fetch_ht_irq_msg(data-&gt;irq, &amp;msg);</div><div class='add'>+		msg.address_lo &amp;= ~(HT_IRQ_LOW_VECTOR_MASK |</div><div class='add'>+				    HT_IRQ_LOW_DEST_ID_MASK);</div><div class='add'>+		msg.address_lo |= HT_IRQ_LOW_VECTOR(cfg-&gt;vector) |</div><div class='add'>+				  HT_IRQ_LOW_DEST_ID(cfg-&gt;dest_apicid);</div><div class='add'>+		msg.address_hi &amp;= ~(HT_IRQ_HIGH_DEST_ID_MASK);</div><div class='add'>+		msg.address_hi |= HT_IRQ_HIGH_DEST_ID(cfg-&gt;dest_apicid);</div><div class='add'>+		write_ht_irq_msg(data-&gt;irq, &amp;msg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip ht_irq_chip = {</div><div class='ctx'> 	.name			= "PCI-HT",</div><div class='ctx'> 	.irq_mask		= mask_ht_irq,</div><div class='ctx'> 	.irq_unmask		= unmask_ht_irq,</div><div class='del'>-	.irq_ack		= apic_ack_edge,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='ctx'> 	.irq_set_affinity	= ht_set_affinity,</div><div class='del'>-	.irq_retrigger		= apic_retrigger_irq,</div><div class='add'>+	.irq_retrigger		= irq_chip_retrigger_hierarchy,</div><div class='ctx'> 	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)</div><div class='add'>+static int htirq_domain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			      unsigned int nr_irqs, void *arg)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='del'>-	struct ht_irq_msg msg;</div><div class='del'>-	unsigned dest;</div><div class='del'>-	int err;</div><div class='add'>+	struct ht_irq_cfg *ht_cfg;</div><div class='add'>+	struct irq_alloc_info *info = arg;</div><div class='add'>+	struct pci_dev *dev;</div><div class='add'>+	irq_hw_number_t hwirq;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (disable_apic)</div><div class='del'>-		return -ENXIO;</div><div class='add'>+	if (nr_irqs &gt; 1 || !info)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cfg = irq_cfg(irq);</div><div class='del'>-	err = assign_irq_vector(irq, cfg, apic-&gt;target_cpus());</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	dev = info-&gt;ht_dev;</div><div class='add'>+	hwirq = (info-&gt;ht_idx &amp; 0xFF) |</div><div class='add'>+		PCI_DEVID(dev-&gt;bus-&gt;number, dev-&gt;devfn) &lt;&lt; 8 |</div><div class='add'>+		(pci_domain_nr(dev-&gt;bus) &amp; 0xFFFFFFFF) &lt;&lt; 24;</div><div class='add'>+	if (irq_find_mapping(domain, hwirq) &gt; 0)</div><div class='add'>+		return -EEXIST;</div><div class='ctx'> </div><div class='del'>-	err = apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain,</div><div class='del'>-					   apic-&gt;target_cpus(), &amp;dest);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	ht_cfg = kmalloc(sizeof(*ht_cfg), GFP_KERNEL);</div><div class='add'>+	if (!ht_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);</div><div class='add'>+	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(ht_cfg);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize msg to a value that will never match the first write. */</div><div class='add'>+	ht_cfg-&gt;msg.address_lo = 0xffffffff;</div><div class='add'>+	ht_cfg-&gt;msg.address_hi = 0xffffffff;</div><div class='add'>+	ht_cfg-&gt;dev = info-&gt;ht_dev;</div><div class='add'>+	ht_cfg-&gt;update = info-&gt;ht_update;</div><div class='add'>+	ht_cfg-&gt;pos = info-&gt;ht_pos;</div><div class='add'>+	ht_cfg-&gt;idx = 0x10 + (info-&gt;ht_idx * 2);</div><div class='add'>+	irq_domain_set_info(domain, virq, hwirq, &amp;ht_irq_chip, ht_cfg,</div><div class='add'>+			    handle_edge_irq, ht_cfg, "edge");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void htirq_domain_free(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			      unsigned int nr_irqs)</div><div class='add'>+{</div><div class='add'>+	struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq);</div><div class='add'>+</div><div class='add'>+	BUG_ON(nr_irqs != 1);</div><div class='add'>+	kfree(irq_data-&gt;chip_data);</div><div class='add'>+	irq_domain_free_irqs_top(domain, virq, nr_irqs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void htirq_domain_activate(struct irq_domain *domain,</div><div class='add'>+				  struct irq_data *irq_data)</div><div class='add'>+{</div><div class='add'>+	struct ht_irq_msg msg;</div><div class='add'>+	struct irq_cfg *cfg = irqd_cfg(irq_data);</div><div class='add'>+</div><div class='add'>+	msg.address_hi = HT_IRQ_HIGH_DEST_ID(cfg-&gt;dest_apicid);</div><div class='ctx'> 	msg.address_lo =</div><div class='ctx'> 		HT_IRQ_LOW_BASE |</div><div class='del'>-		HT_IRQ_LOW_DEST_ID(dest) |</div><div class='add'>+		HT_IRQ_LOW_DEST_ID(cfg-&gt;dest_apicid) |</div><div class='ctx'> 		HT_IRQ_LOW_VECTOR(cfg-&gt;vector) |</div><div class='ctx'> 		((apic-&gt;irq_dest_mode == 0) ?</div><div class='ctx'> 			HT_IRQ_LOW_DM_PHYSICAL :</div><div class='hunk'>@@ -95,13 +131,56 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)</div><div class='ctx'> 			HT_IRQ_LOW_MT_FIXED :</div><div class='ctx'> 			HT_IRQ_LOW_MT_ARBITRATED) |</div><div class='ctx'> 		HT_IRQ_LOW_IRQ_MASKED;</div><div class='add'>+	write_ht_irq_msg(irq_data-&gt;irq, &amp;msg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	write_ht_irq_msg(irq, &amp;msg);</div><div class='add'>+static void htirq_domain_deactivate(struct irq_domain *domain,</div><div class='add'>+				    struct irq_data *irq_data)</div><div class='add'>+{</div><div class='add'>+	struct ht_irq_msg msg;</div><div class='ctx'> </div><div class='del'>-	irq_set_chip_and_handler_name(irq, &amp;ht_irq_chip,</div><div class='del'>-				      handle_edge_irq, "edge");</div><div class='add'>+	memset(&amp;msg, 0, sizeof(msg));</div><div class='add'>+	write_ht_irq_msg(irq_data-&gt;irq, &amp;msg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;dev-&gt;dev, "irq %d for HT\n", irq);</div><div class='add'>+static const struct irq_domain_ops htirq_domain_ops = {</div><div class='add'>+	.alloc		= htirq_domain_alloc,</div><div class='add'>+	.free		= htirq_domain_free,</div><div class='add'>+	.activate	= htirq_domain_activate,</div><div class='add'>+	.deactivate	= htirq_domain_deactivate,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+void arch_init_htirq_domain(struct irq_domain *parent)</div><div class='add'>+{</div><div class='add'>+	if (disable_apic)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	htirq_domain = irq_domain_add_tree(NULL, &amp;htirq_domain_ops, NULL);</div><div class='add'>+	if (!htirq_domain)</div><div class='add'>+		pr_warn("failed to initialize irqdomain for HTIRQ.\n");</div><div class='add'>+	else</div><div class='add'>+		htirq_domain-&gt;parent = parent;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_setup_ht_irq(int idx, int pos, struct pci_dev *dev,</div><div class='add'>+		      ht_irq_update_t *update)</div><div class='add'>+{</div><div class='add'>+	struct irq_alloc_info info;</div><div class='add'>+</div><div class='add'>+	if (!htirq_domain)</div><div class='add'>+		return -ENOSYS;</div><div class='add'>+</div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.ht_idx = idx;</div><div class='add'>+	info.ht_pos = pos;</div><div class='add'>+	info.ht_dev = dev;</div><div class='add'>+	info.ht_update = update;</div><div class='add'>+</div><div class='add'>+	return irq_domain_alloc_irqs(htirq_domain, 1, dev_to_node(&amp;dev-&gt;dev),</div><div class='add'>+				     &amp;info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_teardown_ht_irq(unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	irq_domain_free_irqs(irq, 1);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c<br/>index f4dc2462a1ac..845dc0df2002 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/io_apic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apic/io_apic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/io_apic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/io_apic.c</a></div><div class='hunk'>@@ -18,6 +18,16 @@</div><div class='ctx'>  *					and Rolf G. Tews</div><div class='ctx'>  *					for testing these extensively</div><div class='ctx'>  *	Paul Diefenbaugh	:	Added full ACPI support</div><div class='add'>+ *</div><div class='add'>+ * Historical information which is worth to be preserved:</div><div class='add'>+ *</div><div class='add'>+ * - SiS APIC rmw bug:</div><div class='add'>+ *</div><div class='add'>+ *	We used to have a workaround for a bug in SiS chips which</div><div class='add'>+ *	required to rewrite the index register for a read-modify-write</div><div class='add'>+ *	operation as the chip lost the index information which was</div><div class='add'>+ *	setup for the read already. We cache the data now, so that</div><div class='add'>+ *	workaround has been removed.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='hunk'>@@ -31,13 +41,13 @@</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/freezer.h&gt;</div><div class='ctx'> #include &lt;linux/kthread.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;	/* time_after() */</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='hunk'>@@ -63,27 +73,31 @@</div><div class='ctx'> #define	for_each_ioapic_pin(idx, pin)	\</div><div class='ctx'> 	for_each_ioapic((idx))		\</div><div class='ctx'> 		for_each_pin((idx), (pin))</div><div class='del'>-</div><div class='ctx'> #define for_each_irq_pin(entry, head) \</div><div class='ctx'> 	list_for_each_entry(entry, &amp;head, list)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *      Is the SiS APIC rmw bug present ?</div><div class='del'>- *      -1 = don't know, 0 = no, 1 = yes</div><div class='del'>- */</div><div class='del'>-int sis_apic_bug = -1;</div><div class='del'>-</div><div class='ctx'> static DEFINE_RAW_SPINLOCK(ioapic_lock);</div><div class='ctx'> static DEFINE_MUTEX(ioapic_mutex);</div><div class='ctx'> static unsigned int ioapic_dynirq_base;</div><div class='ctx'> static int ioapic_initialized;</div><div class='ctx'> </div><div class='del'>-struct mp_pin_info {</div><div class='add'>+struct irq_pin_list {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	int apic, pin;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mp_chip_data {</div><div class='add'>+	struct list_head irq_2_pin;</div><div class='add'>+	struct IO_APIC_route_entry entry;</div><div class='ctx'> 	int trigger;</div><div class='ctx'> 	int polarity;</div><div class='del'>-	int node;</div><div class='del'>-	int set;</div><div class='ctx'> 	u32 count;</div><div class='add'>+	bool isa_irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mp_ioapic_gsi {</div><div class='add'>+	u32 gsi_base;</div><div class='add'>+	u32 gsi_end;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ioapic {</div><div class='hunk'>@@ -101,7 +115,6 @@ static struct ioapic {</div><div class='ctx'> 	struct mp_ioapic_gsi  gsi_config;</div><div class='ctx'> 	struct ioapic_domain_cfg irqdomain_cfg;</div><div class='ctx'> 	struct irq_domain *irqdomain;</div><div class='del'>-	struct mp_pin_info *pin_info;</div><div class='ctx'> 	struct resource *iomem_res;</div><div class='ctx'> } ioapics[MAX_IO_APICS];</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +130,7 @@ unsigned int mpc_ioapic_addr(int ioapic_idx)</div><div class='ctx'> 	return ioapics[ioapic_idx].mp_config.apicaddr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)</div><div class='add'>+static inline struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)</div><div class='ctx'> {</div><div class='ctx'> 	return &amp;ioapics[ioapic_idx].gsi_config;</div><div class='ctx'> }</div><div class='hunk'>@@ -129,11 +142,16 @@ static inline int mp_ioapic_pin_count(int ioapic)</div><div class='ctx'> 	return gsi_cfg-&gt;gsi_end - gsi_cfg-&gt;gsi_base + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 mp_pin_to_gsi(int ioapic, int pin)</div><div class='add'>+static inline u32 mp_pin_to_gsi(int ioapic, int pin)</div><div class='ctx'> {</div><div class='ctx'> 	return mp_ioapic_gsi_routing(ioapic)-&gt;gsi_base + pin;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool mp_is_legacy_irq(int irq)</div><div class='add'>+{</div><div class='add'>+	return irq &gt;= 0 &amp;&amp; irq &lt; nr_legacy_irqs();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Initialize all legacy IRQs and all pins on the first IOAPIC</div><div class='ctx'>  * if we have legacy interrupt controller. Kernel boot option "pirq="</div><div class='hunk'>@@ -144,12 +162,7 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)</div><div class='ctx'> 	if (!nr_legacy_irqs())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return ioapic == 0 || (irq &gt;= 0 &amp;&amp; irq &lt; nr_legacy_irqs());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct mp_pin_info *mp_pin_info(int ioapic_idx, int pin)</div><div class='del'>-{</div><div class='del'>-	return ioapics[ioapic_idx].pin_info + pin;</div><div class='add'>+	return ioapic == 0 || mp_is_legacy_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)</div><div class='hunk'>@@ -216,16 +229,6 @@ void mp_save_irq(struct mpc_intsrc *m)</div><div class='ctx'> 		panic("Max # of irq sources exceeded!!\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct irq_pin_list {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	int apic, pin;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct irq_pin_list *alloc_irq_pin_list(int node)</div><div class='del'>-{</div><div class='del'>-	return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void alloc_ioapic_saved_registers(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	size_t size;</div><div class='hunk'>@@ -247,8 +250,7 @@ static void free_ioapic_saved_registers(int idx)</div><div class='ctx'> </div><div class='ctx'> int __init arch_early_ioapic_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='del'>-	int i, node = cpu_to_node(0);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!nr_legacy_irqs())</div><div class='ctx'> 		io_apic_irqs = ~0UL;</div><div class='hunk'>@@ -256,16 +258,6 @@ int __init arch_early_ioapic_init(void)</div><div class='ctx'> 	for_each_ioapic(i)</div><div class='ctx'> 		alloc_ioapic_saved_registers(i);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * For legacy IRQ's, start with assigning irq0 to irq15 to</div><div class='del'>-	 * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; nr_legacy_irqs(); i++) {</div><div class='del'>-		cfg = alloc_irq_and_cfg_at(i, node);</div><div class='del'>-		cfg-&gt;vector = IRQ0_VECTOR + i;</div><div class='del'>-		cpumask_setall(cfg-&gt;domain);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -283,7 +275,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)</div><div class='ctx'> 		+ (mpc_ioapic_addr(idx) &amp; ~PAGE_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void io_apic_eoi(unsigned int apic, unsigned int vector)</div><div class='add'>+static inline void io_apic_eoi(unsigned int apic, unsigned int vector)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='ctx'> 	writel(vector, &amp;io_apic-&gt;eoi);</div><div class='hunk'>@@ -296,7 +288,8 @@ unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)</div><div class='ctx'> 	return readl(&amp;io_apic-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='add'>+static void io_apic_write(unsigned int apic, unsigned int reg,</div><div class='add'>+			  unsigned int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='ctx'> </div><div class='hunk'>@@ -304,21 +297,6 @@ void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int valu</div><div class='ctx'> 	writel(value, &amp;io_apic-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Re-write a value: to be used for read-modify-write</div><div class='del'>- * cycles where the read already set up the index register.</div><div class='del'>- *</div><div class='del'>- * Older SiS APIC requires we rewrite the index register</div><div class='del'>- */</div><div class='del'>-void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='del'>-</div><div class='del'>-	if (sis_apic_bug)</div><div class='del'>-		writel(reg, &amp;io_apic-&gt;index);</div><div class='del'>-	writel(value, &amp;io_apic-&gt;data);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> union entry_union {</div><div class='ctx'> 	struct { u32 w1, w2; };</div><div class='ctx'> 	struct IO_APIC_route_entry entry;</div><div class='hunk'>@@ -378,7 +356,7 @@ static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)</div><div class='ctx'> static void ioapic_mask_entry(int apic, int pin)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	union entry_union eu = { .entry.mask = 1 };</div><div class='add'>+	union entry_union eu = { .entry.mask = IOAPIC_MASKED };</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='ctx'> 	io_apic_write(apic, 0x10 + 2*pin, eu.w1);</div><div class='hunk'>@@ -391,16 +369,17 @@ static void ioapic_mask_entry(int apic, int pin)</div><div class='ctx'>  * shared ISA-space IRQs, so we have to support them. We are super</div><div class='ctx'>  * fast in the common case, and fast for shared ISA-space IRQs.</div><div class='ctx'>  */</div><div class='del'>-static int __add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin)</div><div class='add'>+static int __add_pin_to_irq_node(struct mp_chip_data *data,</div><div class='add'>+				 int node, int apic, int pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_pin_list *entry;</div><div class='ctx'> </div><div class='ctx'> 	/* don't allow duplicates */</div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin)</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin)</div><div class='ctx'> 		if (entry-&gt;apic == apic &amp;&amp; entry-&gt;pin == pin)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='del'>-	entry = alloc_irq_pin_list(node);</div><div class='add'>+	entry = kzalloc_node(sizeof(struct irq_pin_list), GFP_ATOMIC, node);</div><div class='ctx'> 	if (!entry) {</div><div class='ctx'> 		pr_err("can not alloc irq_pin_list (%d,%d,%d)\n",</div><div class='ctx'> 		       node, apic, pin);</div><div class='hunk'>@@ -408,16 +387,16 @@ static int __add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pi</div><div class='ctx'> 	}</div><div class='ctx'> 	entry-&gt;apic = apic;</div><div class='ctx'> 	entry-&gt;pin = pin;</div><div class='add'>+	list_add_tail(&amp;entry-&gt;list, &amp;data-&gt;irq_2_pin);</div><div class='ctx'> </div><div class='del'>-	list_add_tail(&amp;entry-&gt;list, &amp;cfg-&gt;irq_2_pin);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __remove_pin_from_irq(struct irq_cfg *cfg, int apic, int pin)</div><div class='add'>+static void __remove_pin_from_irq(struct mp_chip_data *data, int apic, int pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_pin_list *tmp, *entry;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(entry, tmp, &amp;cfg-&gt;irq_2_pin, list)</div><div class='add'>+	list_for_each_entry_safe(entry, tmp, &amp;data-&gt;irq_2_pin, list)</div><div class='ctx'> 		if (entry-&gt;apic == apic &amp;&amp; entry-&gt;pin == pin) {</div><div class='ctx'> 			list_del(&amp;entry-&gt;list);</div><div class='ctx'> 			kfree(entry);</div><div class='hunk'>@@ -425,22 +404,23 @@ static void __remove_pin_from_irq(struct irq_cfg *cfg, int apic, int pin)</div><div class='ctx'> 		}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin)</div><div class='add'>+static void add_pin_to_irq_node(struct mp_chip_data *data,</div><div class='add'>+				int node, int apic, int pin)</div><div class='ctx'> {</div><div class='del'>-	if (__add_pin_to_irq_node(cfg, node, apic, pin))</div><div class='add'>+	if (__add_pin_to_irq_node(data, node, apic, pin))</div><div class='ctx'> 		panic("IO-APIC: failed to add irq-pin. Can not proceed\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Reroute an IRQ to a different pin.</div><div class='ctx'>  */</div><div class='del'>-static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node,</div><div class='add'>+static void __init replace_pin_at_irq_node(struct mp_chip_data *data, int node,</div><div class='ctx'> 					   int oldapic, int oldpin,</div><div class='ctx'> 					   int newapic, int newpin)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_pin_list *entry;</div><div class='ctx'> </div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin) {</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin) {</div><div class='ctx'> 		if (entry-&gt;apic == oldapic &amp;&amp; entry-&gt;pin == oldpin) {</div><div class='ctx'> 			entry-&gt;apic = newapic;</div><div class='ctx'> 			entry-&gt;pin = newpin;</div><div class='hunk'>@@ -450,32 +430,26 @@ static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* old apic/pin didn't exist, so just add new ones */</div><div class='del'>-	add_pin_to_irq_node(cfg, node, newapic, newpin);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __io_apic_modify_irq(struct irq_pin_list *entry,</div><div class='del'>-				 int mask_and, int mask_or,</div><div class='del'>-				 void (*final)(struct irq_pin_list *entry))</div><div class='del'>-{</div><div class='del'>-	unsigned int reg, pin;</div><div class='del'>-</div><div class='del'>-	pin = entry-&gt;pin;</div><div class='del'>-	reg = io_apic_read(entry-&gt;apic, 0x10 + pin * 2);</div><div class='del'>-	reg &amp;= mask_and;</div><div class='del'>-	reg |= mask_or;</div><div class='del'>-	io_apic_modify(entry-&gt;apic, 0x10 + pin * 2, reg);</div><div class='del'>-	if (final)</div><div class='del'>-		final(entry);</div><div class='add'>+	add_pin_to_irq_node(data, node, newapic, newpin);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void io_apic_modify_irq(struct irq_cfg *cfg,</div><div class='add'>+static void io_apic_modify_irq(struct mp_chip_data *data,</div><div class='ctx'> 			       int mask_and, int mask_or,</div><div class='ctx'> 			       void (*final)(struct irq_pin_list *entry))</div><div class='ctx'> {</div><div class='add'>+	union entry_union eu;</div><div class='ctx'> 	struct irq_pin_list *entry;</div><div class='ctx'> </div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin)</div><div class='del'>-		__io_apic_modify_irq(entry, mask_and, mask_or, final);</div><div class='add'>+	eu.entry = data-&gt;entry;</div><div class='add'>+	eu.w1 &amp;= mask_and;</div><div class='add'>+	eu.w1 |= mask_or;</div><div class='add'>+	data-&gt;entry = eu.entry;</div><div class='add'>+</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin) {</div><div class='add'>+		io_apic_write(entry-&gt;apic, 0x10 + 2 * entry-&gt;pin, eu.w1);</div><div class='add'>+		if (final)</div><div class='add'>+			final(entry);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void io_apic_sync(struct irq_pin_list *entry)</div><div class='hunk'>@@ -490,39 +464,31 @@ static void io_apic_sync(struct irq_pin_list *entry)</div><div class='ctx'> 	readl(&amp;io_apic-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mask_ioapic(struct irq_cfg *cfg)</div><div class='add'>+static void mask_ioapic_irq(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &amp;io_apic_sync);</div><div class='add'>+	io_apic_modify_irq(data, ~0, IO_APIC_REDIR_MASKED, &amp;io_apic_sync);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mask_ioapic_irq(struct irq_data *data)</div><div class='add'>+static void __unmask_ioapic(struct mp_chip_data *data)</div><div class='ctx'> {</div><div class='del'>-	mask_ioapic(irqd_cfg(data));</div><div class='add'>+	io_apic_modify_irq(data, ~IO_APIC_REDIR_MASKED, 0, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __unmask_ioapic(struct irq_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unmask_ioapic(struct irq_cfg *cfg)</div><div class='add'>+static void unmask_ioapic_irq(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	__unmask_ioapic(cfg);</div><div class='add'>+	__unmask_ioapic(data);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void unmask_ioapic_irq(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	unmask_ioapic(irqd_cfg(data));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * IO-APIC versions below 0x20 don't support EOI register.</div><div class='ctx'>  * For the record, here is the information about various versions:</div><div class='hunk'>@@ -539,7 +505,7 @@ static void unmask_ioapic_irq(struct irq_data *data)</div><div class='ctx'>  * Otherwise, we simulate the EOI message manually by changing the trigger</div><div class='ctx'>  * mode to edge and then back to level, with RTE being masked during this.</div><div class='ctx'>  */</div><div class='del'>-void native_eoi_ioapic_pin(int apic, int pin, int vector)</div><div class='add'>+static void __eoi_ioapic_pin(int apic, int pin, int vector)</div><div class='ctx'> {</div><div class='ctx'> 	if (mpc_ioapic_ver(apic) &gt;= 0x20) {</div><div class='ctx'> 		io_apic_eoi(apic, vector);</div><div class='hunk'>@@ -551,7 +517,7 @@ void native_eoi_ioapic_pin(int apic, int pin, int vector)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Mask the entry and change the trigger mode to edge.</div><div class='ctx'> 		 */</div><div class='del'>-		entry1.mask = 1;</div><div class='add'>+		entry1.mask = IOAPIC_MASKED;</div><div class='ctx'> 		entry1.trigger = IOAPIC_EDGE;</div><div class='ctx'> </div><div class='ctx'> 		__ioapic_write_entry(apic, pin, entry1);</div><div class='hunk'>@@ -563,15 +529,14 @@ void native_eoi_ioapic_pin(int apic, int pin, int vector)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)</div><div class='add'>+void eoi_ioapic_pin(int vector, struct mp_chip_data *data)</div><div class='ctx'> {</div><div class='del'>-	struct irq_pin_list *entry;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	struct irq_pin_list *entry;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin)</div><div class='del'>-		x86_io_apic_ops.eoi_ioapic_pin(entry-&gt;apic, entry-&gt;pin,</div><div class='del'>-					       cfg-&gt;vector);</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin)</div><div class='add'>+		__eoi_ioapic_pin(entry-&gt;apic, entry-&gt;pin, vector);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -588,8 +553,8 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)</div><div class='ctx'> 	 * Make sure the entry is masked and re-read the contents to check</div><div class='ctx'> 	 * if it is a level triggered pin and if the remote-IRR is set.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!entry.mask) {</div><div class='del'>-		entry.mask = 1;</div><div class='add'>+	if (entry.mask == IOAPIC_UNMASKED) {</div><div class='add'>+		entry.mask = IOAPIC_MASKED;</div><div class='ctx'> 		ioapic_write_entry(apic, pin, entry);</div><div class='ctx'> 		entry = ioapic_read_entry(apic, pin);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -602,13 +567,12 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)</div><div class='ctx'> 		 * doesn't clear the remote-IRR if the trigger mode is not</div><div class='ctx'> 		 * set to level.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!entry.trigger) {</div><div class='add'>+		if (entry.trigger == IOAPIC_EDGE) {</div><div class='ctx'> 			entry.trigger = IOAPIC_LEVEL;</div><div class='ctx'> 			ioapic_write_entry(apic, pin, entry);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-		x86_io_apic_ops.eoi_ioapic_pin(apic, pin, entry.vector);</div><div class='add'>+		__eoi_ioapic_pin(apic, pin, entry.vector);</div><div class='ctx'> 		raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -706,8 +670,8 @@ void mask_ioapic_entries(void)</div><div class='ctx'> 			struct IO_APIC_route_entry entry;</div><div class='ctx'> </div><div class='ctx'> 			entry = ioapics[apic].saved_registers[pin];</div><div class='del'>-			if (!entry.mask) {</div><div class='del'>-				entry.mask = 1;</div><div class='add'>+			if (entry.mask == IOAPIC_UNMASKED) {</div><div class='add'>+				entry.mask = IOAPIC_MASKED;</div><div class='ctx'> 				ioapic_write_entry(apic, pin, entry);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -809,11 +773,11 @@ static int EISA_ELCR(unsigned int irq)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* ISA interrupts are always polarity zero edge triggered,</div><div class='add'>+/* ISA interrupts are always active high edge triggered,</div><div class='ctx'>  * when listed as conforming in the MP table. */</div><div class='ctx'> </div><div class='del'>-#define default_ISA_trigger(idx)	(0)</div><div class='del'>-#define default_ISA_polarity(idx)	(0)</div><div class='add'>+#define default_ISA_trigger(idx)	(IOAPIC_EDGE)</div><div class='add'>+#define default_ISA_polarity(idx)	(IOAPIC_POL_HIGH)</div><div class='ctx'> </div><div class='ctx'> /* EISA interrupts are always polarity zero and can be edge or level</div><div class='ctx'>  * trigger depending on the ELCR value.  If an interrupt is listed as</div><div class='hunk'>@@ -823,53 +787,55 @@ static int EISA_ELCR(unsigned int irq)</div><div class='ctx'> #define default_EISA_trigger(idx)	(EISA_ELCR(mp_irqs[idx].srcbusirq))</div><div class='ctx'> #define default_EISA_polarity(idx)	default_ISA_polarity(idx)</div><div class='ctx'> </div><div class='del'>-/* PCI interrupts are always polarity one level triggered,</div><div class='add'>+/* PCI interrupts are always active low level triggered,</div><div class='ctx'>  * when listed as conforming in the MP table. */</div><div class='ctx'> </div><div class='del'>-#define default_PCI_trigger(idx)	(1)</div><div class='del'>-#define default_PCI_polarity(idx)	(1)</div><div class='add'>+#define default_PCI_trigger(idx)	(IOAPIC_LEVEL)</div><div class='add'>+#define default_PCI_polarity(idx)	(IOAPIC_POL_LOW)</div><div class='ctx'> </div><div class='ctx'> static int irq_polarity(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int bus = mp_irqs[idx].srcbus;</div><div class='del'>-	int polarity;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Determine IRQ line polarity (high active or low active):</div><div class='ctx'> 	 */</div><div class='del'>-	switch (mp_irqs[idx].irqflag &amp; 3)</div><div class='del'>-	{</div><div class='del'>-		case 0: /* conforms, ie. bus-type dependent polarity */</div><div class='del'>-			if (test_bit(bus, mp_bus_not_pci))</div><div class='del'>-				polarity = default_ISA_polarity(idx);</div><div class='del'>-			else</div><div class='del'>-				polarity = default_PCI_polarity(idx);</div><div class='del'>-			break;</div><div class='del'>-		case 1: /* high active */</div><div class='del'>-		{</div><div class='del'>-			polarity = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case 2: /* reserved */</div><div class='del'>-		{</div><div class='del'>-			pr_warn("broken BIOS!!\n");</div><div class='del'>-			polarity = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case 3: /* low active */</div><div class='del'>-		{</div><div class='del'>-			polarity = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		default: /* invalid */</div><div class='del'>-		{</div><div class='del'>-			pr_warn("broken BIOS!!\n");</div><div class='del'>-			polarity = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	switch (mp_irqs[idx].irqflag &amp; 0x03) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* conforms to spec, ie. bus-type dependent polarity */</div><div class='add'>+		if (test_bit(bus, mp_bus_not_pci))</div><div class='add'>+			return default_ISA_polarity(idx);</div><div class='add'>+		else</div><div class='add'>+			return default_PCI_polarity(idx);</div><div class='add'>+	case 1:</div><div class='add'>+		return IOAPIC_POL_HIGH;</div><div class='add'>+	case 2:</div><div class='add'>+		pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");</div><div class='add'>+	case 3:</div><div class='add'>+	default: /* Pointless default required due to do gcc stupidity */</div><div class='add'>+		return IOAPIC_POL_LOW;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='add'>+static int eisa_irq_trigger(int idx, int bus, int trigger)</div><div class='add'>+{</div><div class='add'>+	switch (mp_bus_id_to_type[bus]) {</div><div class='add'>+	case MP_BUS_PCI:</div><div class='add'>+	case MP_BUS_ISA:</div><div class='add'>+		return trigger;</div><div class='add'>+	case MP_BUS_EISA:</div><div class='add'>+		return default_EISA_trigger(idx);</div><div class='ctx'> 	}</div><div class='del'>-	return polarity;</div><div class='add'>+	pr_warn("IOAPIC: Invalid srcbus: %d defaulting to level\n", bus);</div><div class='add'>+	return IOAPIC_LEVEL;</div><div class='ctx'> }</div><div class='add'>+#else</div><div class='add'>+static inline int eisa_irq_trigger(int idx, int bus, int trigger)</div><div class='add'>+{</div><div class='add'>+	return trigger;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static int irq_trigger(int idx)</div><div class='ctx'> {</div><div class='hunk'>@@ -879,153 +845,227 @@ static int irq_trigger(int idx)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Determine IRQ trigger mode (edge or level sensitive):</div><div class='ctx'> 	 */</div><div class='del'>-	switch ((mp_irqs[idx].irqflag&gt;&gt;2) &amp; 3)</div><div class='del'>-	{</div><div class='del'>-		case 0: /* conforms, ie. bus-type dependent */</div><div class='del'>-			if (test_bit(bus, mp_bus_not_pci))</div><div class='del'>-				trigger = default_ISA_trigger(idx);</div><div class='del'>-			else</div><div class='del'>-				trigger = default_PCI_trigger(idx);</div><div class='del'>-#ifdef CONFIG_EISA</div><div class='del'>-			switch (mp_bus_id_to_type[bus]) {</div><div class='del'>-				case MP_BUS_ISA: /* ISA pin */</div><div class='del'>-				{</div><div class='del'>-					/* set before the switch */</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				case MP_BUS_EISA: /* EISA pin */</div><div class='del'>-				{</div><div class='del'>-					trigger = default_EISA_trigger(idx);</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				case MP_BUS_PCI: /* PCI pin */</div><div class='del'>-				{</div><div class='del'>-					/* set before the switch */</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				default:</div><div class='del'>-				{</div><div class='del'>-					pr_warn("broken BIOS!!\n");</div><div class='del'>-					trigger = 1;</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='add'>+	switch ((mp_irqs[idx].irqflag &gt;&gt; 2) &amp; 0x03) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* conforms to spec, ie. bus-type dependent trigger mode */</div><div class='add'>+		if (test_bit(bus, mp_bus_not_pci))</div><div class='add'>+			trigger = default_ISA_trigger(idx);</div><div class='add'>+		else</div><div class='add'>+			trigger = default_PCI_trigger(idx);</div><div class='add'>+		/* Take EISA into account */</div><div class='add'>+		return eisa_irq_trigger(idx, bus, trigger);</div><div class='add'>+	case 1:</div><div class='add'>+		return IOAPIC_EDGE;</div><div class='add'>+	case 2:</div><div class='add'>+		pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");</div><div class='add'>+	case 3:</div><div class='add'>+	default: /* Pointless default required due to do gcc stupidity */</div><div class='add'>+		return IOAPIC_LEVEL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ioapic_set_alloc_attr(struct irq_alloc_info *info, int node,</div><div class='add'>+			   int trigger, int polarity)</div><div class='add'>+{</div><div class='add'>+	init_irq_alloc_info(info, NULL);</div><div class='add'>+	info-&gt;type = X86_IRQ_ALLOC_TYPE_IOAPIC;</div><div class='add'>+	info-&gt;ioapic_node = node;</div><div class='add'>+	info-&gt;ioapic_trigger = trigger;</div><div class='add'>+	info-&gt;ioapic_polarity = polarity;</div><div class='add'>+	info-&gt;ioapic_valid = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_ACPI</div><div class='add'>+int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);</div><div class='ctx'> #endif</div><div class='del'>-			break;</div><div class='del'>-		case 1: /* edge */</div><div class='del'>-		{</div><div class='del'>-			trigger = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case 2: /* reserved */</div><div class='del'>-		{</div><div class='del'>-			pr_warn("broken BIOS!!\n");</div><div class='del'>-			trigger = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case 3: /* level */</div><div class='del'>-		{</div><div class='del'>-			trigger = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		default: /* invalid */</div><div class='del'>-		{</div><div class='del'>-			pr_warn("broken BIOS!!\n");</div><div class='del'>-			trigger = 0;</div><div class='del'>-			break;</div><div class='add'>+</div><div class='add'>+static void ioapic_copy_alloc_attr(struct irq_alloc_info *dst,</div><div class='add'>+				   struct irq_alloc_info *src,</div><div class='add'>+				   u32 gsi, int ioapic_idx, int pin)</div><div class='add'>+{</div><div class='add'>+	int trigger, polarity;</div><div class='add'>+</div><div class='add'>+	copy_irq_alloc_info(dst, src);</div><div class='add'>+	dst-&gt;type = X86_IRQ_ALLOC_TYPE_IOAPIC;</div><div class='add'>+	dst-&gt;ioapic_id = mpc_ioapic_id(ioapic_idx);</div><div class='add'>+	dst-&gt;ioapic_pin = pin;</div><div class='add'>+	dst-&gt;ioapic_valid = 1;</div><div class='add'>+	if (src &amp;&amp; src-&gt;ioapic_valid) {</div><div class='add'>+		dst-&gt;ioapic_node = src-&gt;ioapic_node;</div><div class='add'>+		dst-&gt;ioapic_trigger = src-&gt;ioapic_trigger;</div><div class='add'>+		dst-&gt;ioapic_polarity = src-&gt;ioapic_polarity;</div><div class='add'>+	} else {</div><div class='add'>+		dst-&gt;ioapic_node = NUMA_NO_NODE;</div><div class='add'>+		if (acpi_get_override_irq(gsi, &amp;trigger, &amp;polarity) &gt;= 0) {</div><div class='add'>+			dst-&gt;ioapic_trigger = trigger;</div><div class='add'>+			dst-&gt;ioapic_polarity = polarity;</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * PCI interrupts are always active low level</div><div class='add'>+			 * triggered.</div><div class='add'>+			 */</div><div class='add'>+			dst-&gt;ioapic_trigger = IOAPIC_LEVEL;</div><div class='add'>+			dst-&gt;ioapic_polarity = IOAPIC_POL_LOW;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return trigger;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin)</div><div class='add'>+static int ioapic_alloc_attr_node(struct irq_alloc_info *info)</div><div class='add'>+{</div><div class='add'>+	return (info &amp;&amp; info-&gt;ioapic_valid) ? info-&gt;ioapic_node : NUMA_NO_NODE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mp_register_handler(unsigned int irq, unsigned long trigger)</div><div class='add'>+{</div><div class='add'>+	irq_flow_handler_t hdl;</div><div class='add'>+	bool fasteoi;</div><div class='add'>+</div><div class='add'>+	if (trigger) {</div><div class='add'>+		irq_set_status_flags(irq, IRQ_LEVEL);</div><div class='add'>+		fasteoi = true;</div><div class='add'>+	} else {</div><div class='add'>+		irq_clear_status_flags(irq, IRQ_LEVEL);</div><div class='add'>+		fasteoi = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hdl = fasteoi ? handle_fasteoi_irq : handle_edge_irq;</div><div class='add'>+	__irq_set_handler(irq, hdl, 0, fasteoi ? "fasteoi" : "edge");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='add'>+	struct mp_chip_data *data = irq_get_chip_data(irq);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * setup_IO_APIC_irqs() programs all legacy IRQs with default trigger</div><div class='add'>+	 * and polarity attirbutes. So allow the first user to reprogram the</div><div class='add'>+	 * pin with real trigger and polarity attributes.</div><div class='add'>+	 */</div><div class='add'>+	if (irq &lt; nr_legacy_irqs() &amp;&amp; data-&gt;count == 1) {</div><div class='add'>+		if (info-&gt;ioapic_trigger != data-&gt;trigger)</div><div class='add'>+			mp_register_handler(irq, data-&gt;trigger);</div><div class='add'>+		data-&gt;entry.trigger = data-&gt;trigger = info-&gt;ioapic_trigger;</div><div class='add'>+		data-&gt;entry.polarity = data-&gt;polarity = info-&gt;ioapic_polarity;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data-&gt;trigger == info-&gt;ioapic_trigger &amp;&amp;</div><div class='add'>+	       data-&gt;polarity == info-&gt;ioapic_polarity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 gsi,</div><div class='add'>+				 struct irq_alloc_info *info)</div><div class='add'>+{</div><div class='add'>+	bool legacy = false;</div><div class='ctx'> 	int irq = -1;</div><div class='del'>-	int ioapic = (int)(long)domain-&gt;host_data;</div><div class='ctx'> 	int type = ioapics[ioapic].irqdomain_cfg.type;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case IOAPIC_DOMAIN_LEGACY:</div><div class='ctx'> 		/*</div><div class='del'>-		 * Dynamically allocate IRQ number for non-ISA IRQs in the first 16</div><div class='del'>-		 * GSIs on some weird platforms.</div><div class='add'>+		 * Dynamically allocate IRQ number for non-ISA IRQs in the first</div><div class='add'>+		 * 16 GSIs on some weird platforms.</div><div class='ctx'> 		 */</div><div class='del'>-		if (gsi &lt; nr_legacy_irqs())</div><div class='del'>-			irq = irq_create_mapping(domain, pin);</div><div class='del'>-		else if (irq_create_strict_mappings(domain, gsi, pin, 1) == 0)</div><div class='add'>+		if (!ioapic_initialized || gsi &gt;= nr_legacy_irqs())</div><div class='ctx'> 			irq = gsi;</div><div class='add'>+		legacy = mp_is_legacy_irq(irq);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOAPIC_DOMAIN_STRICT:</div><div class='del'>-		if (irq_create_strict_mappings(domain, gsi, pin, 1) == 0)</div><div class='del'>-			irq = gsi;</div><div class='add'>+		irq = gsi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOAPIC_DOMAIN_DYNAMIC:</div><div class='del'>-		irq = irq_create_mapping(domain, pin);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN(1, "ioapic: unknown irqdomain type %d\n", type);</div><div class='del'>-		break;</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __irq_domain_alloc_irqs(domain, irq, 1,</div><div class='add'>+				       ioapic_alloc_attr_node(info),</div><div class='add'>+				       info, legacy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Need special handling for ISA IRQs because there may be multiple IOAPIC pins</div><div class='add'>+ * sharing the same ISA IRQ number and irqdomain only supports 1:1 mapping</div><div class='add'>+ * between IOAPIC pin and IRQ number. A typical IOAPIC has 24 pins, pin 0-15 are</div><div class='add'>+ * used for legacy IRQs and pin 16-23 are used for PCI IRQs (PIRQ A-H).</div><div class='add'>+ * When ACPI is disabled, only legacy IRQ numbers (IRQ0-15) are available, and</div><div class='add'>+ * some BIOSes may use MP Interrupt Source records to override IRQ numbers for</div><div class='add'>+ * PIRQs instead of reprogramming the interrupt routing logic. Thus there may be</div><div class='add'>+ * multiple pins sharing the same legacy IRQ number when ACPI is disabled.</div><div class='add'>+ */</div><div class='add'>+static int alloc_isa_irq_from_domain(struct irq_domain *domain,</div><div class='add'>+				     int irq, int ioapic, int pin,</div><div class='add'>+				     struct irq_alloc_info *info)</div><div class='add'>+{</div><div class='add'>+	struct mp_chip_data *data;</div><div class='add'>+	struct irq_data *irq_data = irq_get_irq_data(irq);</div><div class='add'>+	int node = ioapic_alloc_attr_node(info);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Legacy ISA IRQ has already been allocated, just add pin to</div><div class='add'>+	 * the pin list assoicated with this IRQ and program the IOAPIC</div><div class='add'>+	 * entry. The IOAPIC entry</div><div class='add'>+	 */</div><div class='add'>+	if (irq_data &amp;&amp; irq_data-&gt;parent_data) {</div><div class='add'>+		if (!mp_check_pin_attr(irq, info))</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		if (__add_pin_to_irq_node(irq_data-&gt;chip_data, node, ioapic,</div><div class='add'>+					  info-&gt;ioapic_pin))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	} else {</div><div class='add'>+		irq = __irq_domain_alloc_irqs(domain, irq, 1, node, info, true);</div><div class='add'>+		if (irq &gt;= 0) {</div><div class='add'>+			irq_data = irq_domain_get_irq_data(domain, irq);</div><div class='add'>+			data = irq_data-&gt;chip_data;</div><div class='add'>+			data-&gt;isa_irq = true;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq &gt; 0 ? irq : -1;</div><div class='add'>+	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,</div><div class='del'>-			     unsigned int flags)</div><div class='add'>+			     unsigned int flags, struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	int irq;</div><div class='add'>+	bool legacy = false;</div><div class='add'>+	struct irq_alloc_info tmp;</div><div class='add'>+	struct mp_chip_data *data;</div><div class='ctx'> 	struct irq_domain *domain = mp_ioapic_irqdomain(ioapic);</div><div class='del'>-	struct mp_pin_info *info = mp_pin_info(ioapic, pin);</div><div class='ctx'> </div><div class='ctx'> 	if (!domain)</div><div class='del'>-		return -1;</div><div class='add'>+		return -ENOSYS;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ioapic_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Don't use irqdomain to manage ISA IRQs because there may be</div><div class='del'>-	 * multiple IOAPIC pins sharing the same ISA IRQ number and</div><div class='del'>-	 * irqdomain only supports 1:1 mapping between IOAPIC pin and</div><div class='del'>-	 * IRQ number. A typical IOAPIC has 24 pins, pin 0-15 are used</div><div class='del'>-	 * for legacy IRQs and pin 16-23 are used for PCI IRQs (PIRQ A-H).</div><div class='del'>-	 * When ACPI is disabled, only legacy IRQ numbers (IRQ0-15) are</div><div class='del'>-	 * available, and some BIOSes may use MP Interrupt Source records</div><div class='del'>-	 * to override IRQ numbers for PIRQs instead of reprogramming</div><div class='del'>-	 * the interrupt routing logic. Thus there may be multiple pins</div><div class='del'>-	 * sharing the same legacy IRQ number when ACPI is disabled.</div><div class='del'>-	 */</div><div class='ctx'> 	if (idx &gt;= 0 &amp;&amp; test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {</div><div class='ctx'> 		irq = mp_irqs[idx].srcbusirq;</div><div class='del'>-		if (flags &amp; IOAPIC_MAP_ALLOC) {</div><div class='del'>-			if (info-&gt;count == 0 &amp;&amp;</div><div class='del'>-			    mp_irqdomain_map(domain, irq, pin) != 0)</div><div class='del'>-				irq = -1;</div><div class='add'>+		legacy = mp_is_legacy_irq(irq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			/* special handling for timer IRQ0 */</div><div class='add'>+	mutex_lock(&amp;ioapic_mutex);</div><div class='add'>+	if (!(flags &amp; IOAPIC_MAP_ALLOC)) {</div><div class='add'>+		if (!legacy) {</div><div class='add'>+			irq = irq_find_mapping(domain, pin);</div><div class='ctx'> 			if (irq == 0)</div><div class='del'>-				info-&gt;count++;</div><div class='add'>+				irq = -ENOENT;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		irq = irq_find_mapping(domain, pin);</div><div class='del'>-		if (irq &lt;= 0 &amp;&amp; (flags &amp; IOAPIC_MAP_ALLOC))</div><div class='del'>-			irq = alloc_irq_from_domain(domain, gsi, pin);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (flags &amp; IOAPIC_MAP_ALLOC) {</div><div class='del'>-		/* special handling for legacy IRQs */</div><div class='del'>-		if (irq &lt; nr_legacy_irqs() &amp;&amp; info-&gt;count == 1 &amp;&amp;</div><div class='del'>-		    mp_irqdomain_map(domain, irq, pin) != 0)</div><div class='del'>-			irq = -1;</div><div class='del'>-</div><div class='del'>-		if (irq &gt; 0)</div><div class='del'>-			info-&gt;count++;</div><div class='del'>-		else if (info-&gt;count == 0)</div><div class='del'>-			info-&gt;set = 0;</div><div class='add'>+		ioapic_copy_alloc_attr(&amp;tmp, info, gsi, ioapic, pin);</div><div class='add'>+		if (legacy)</div><div class='add'>+			irq = alloc_isa_irq_from_domain(domain, irq,</div><div class='add'>+							ioapic, pin, &amp;tmp);</div><div class='add'>+		else if ((irq = irq_find_mapping(domain, pin)) == 0)</div><div class='add'>+			irq = alloc_irq_from_domain(domain, ioapic, gsi, &amp;tmp);</div><div class='add'>+		else if (!mp_check_pin_attr(irq, &amp;tmp))</div><div class='add'>+			irq = -EBUSY;</div><div class='add'>+		if (irq &gt;= 0) {</div><div class='add'>+			data = irq_get_chip_data(irq);</div><div class='add'>+			data-&gt;count++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	mutex_unlock(&amp;ioapic_mutex);</div><div class='ctx'> </div><div class='del'>-	return irq &gt; 0 ? irq : -1;</div><div class='add'>+	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)</div><div class='hunk'>@@ -1058,10 +1098,10 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	return  mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags);</div><div class='add'>+	return  mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mp_map_gsi_to_irq(u32 gsi, unsigned int flags)</div><div class='add'>+int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	int ioapic, pin, idx;</div><div class='ctx'> </div><div class='hunk'>@@ -1074,31 +1114,24 @@ int mp_map_gsi_to_irq(u32 gsi, unsigned int flags)</div><div class='ctx'> 	if ((flags &amp; IOAPIC_MAP_CHECK) &amp;&amp; idx &lt; 0)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags);</div><div class='add'>+	return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mp_unmap_irq(int irq)</div><div class='ctx'> {</div><div class='del'>-	struct irq_data *data = irq_get_irq_data(irq);</div><div class='del'>-	struct mp_pin_info *info;</div><div class='del'>-	int ioapic, pin;</div><div class='add'>+	struct irq_data *irq_data = irq_get_irq_data(irq);</div><div class='add'>+	struct mp_chip_data *data;</div><div class='ctx'> </div><div class='del'>-	if (!data || !data-&gt;domain)</div><div class='add'>+	if (!irq_data || !irq_data-&gt;domain)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ioapic = (int)(long)data-&gt;domain-&gt;host_data;</div><div class='del'>-	pin = (int)data-&gt;hwirq;</div><div class='del'>-	info = mp_pin_info(ioapic, pin);</div><div class='add'>+	data = irq_data-&gt;chip_data;</div><div class='add'>+	if (!data || data-&gt;isa_irq)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ioapic_mutex);</div><div class='del'>-	if (--info-&gt;count == 0) {</div><div class='del'>-		info-&gt;set = 0;</div><div class='del'>-		if (irq &lt; nr_legacy_irqs() &amp;&amp;</div><div class='del'>-		    ioapics[ioapic].irqdomain_cfg.type == IOAPIC_DOMAIN_LEGACY)</div><div class='del'>-			mp_irqdomain_unmap(data-&gt;domain, irq);</div><div class='del'>-		else</div><div class='del'>-			irq_dispose_mapping(irq);</div><div class='del'>-	}</div><div class='add'>+	if (--data-&gt;count == 0)</div><div class='add'>+		irq_domain_free_irqs(irq, 1);</div><div class='ctx'> 	mutex_unlock(&amp;ioapic_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1165,7 +1198,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);</div><div class='ctx'> </div><div class='del'>-static struct irq_chip ioapic_chip;</div><div class='add'>+static struct irq_chip ioapic_chip, ioapic_ir_chip;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> static inline int IO_APIC_irq_trigger(int irq)</div><div class='hunk'>@@ -1189,96 +1222,6 @@ static inline int IO_APIC_irq_trigger(int irq)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,</div><div class='del'>-				 unsigned long trigger)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip *chip = &amp;ioapic_chip;</div><div class='del'>-	irq_flow_handler_t hdl;</div><div class='del'>-	bool fasteoi;</div><div class='del'>-</div><div class='del'>-	if ((trigger == IOAPIC_AUTO &amp;&amp; IO_APIC_irq_trigger(irq)) ||</div><div class='del'>-	    trigger == IOAPIC_LEVEL) {</div><div class='del'>-		irq_set_status_flags(irq, IRQ_LEVEL);</div><div class='del'>-		fasteoi = true;</div><div class='del'>-	} else {</div><div class='del'>-		irq_clear_status_flags(irq, IRQ_LEVEL);</div><div class='del'>-		fasteoi = false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (setup_remapped_irq(irq, cfg, chip))</div><div class='del'>-		fasteoi = trigger != 0;</div><div class='del'>-</div><div class='del'>-	hdl = fasteoi ? handle_fasteoi_irq : handle_edge_irq;</div><div class='del'>-	irq_set_chip_and_handler_name(irq, chip, hdl,</div><div class='del'>-				      fasteoi ? "fasteoi" : "edge");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int native_setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,</div><div class='del'>-			      unsigned int destination, int vector,</div><div class='del'>-			      struct io_apic_irq_attr *attr)</div><div class='del'>-{</div><div class='del'>-	memset(entry, 0, sizeof(*entry));</div><div class='del'>-</div><div class='del'>-	entry-&gt;delivery_mode = apic-&gt;irq_delivery_mode;</div><div class='del'>-	entry-&gt;dest_mode     = apic-&gt;irq_dest_mode;</div><div class='del'>-	entry-&gt;dest	     = destination;</div><div class='del'>-	entry-&gt;vector	     = vector;</div><div class='del'>-	entry-&gt;mask	     = 0;			/* enable IRQ */</div><div class='del'>-	entry-&gt;trigger	     = attr-&gt;trigger;</div><div class='del'>-	entry-&gt;polarity	     = attr-&gt;polarity;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mask level triggered irqs.</div><div class='del'>-	 * Use IRQ_DELAYED_DISABLE for edge triggered irqs.</div><div class='del'>-	 */</div><div class='del'>-	if (attr-&gt;trigger)</div><div class='del'>-		entry-&gt;mask = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,</div><div class='del'>-				struct io_apic_irq_attr *attr)</div><div class='del'>-{</div><div class='del'>-	struct IO_APIC_route_entry entry;</div><div class='del'>-	unsigned int dest;</div><div class='del'>-</div><div class='del'>-	if (!IO_APIC_IRQ(irq))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (assign_irq_vector(irq, cfg, apic-&gt;target_cpus()))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain, apic-&gt;target_cpus(),</div><div class='del'>-					 &amp;dest)) {</div><div class='del'>-		pr_warn("Failed to obtain apicid for ioapic %d, pin %d\n",</div><div class='del'>-			mpc_ioapic_id(attr-&gt;ioapic), attr-&gt;ioapic_pin);</div><div class='del'>-		clear_irq_vector(irq, cfg);</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	apic_printk(APIC_VERBOSE,KERN_DEBUG</div><div class='del'>-		    "IOAPIC[%d]: Set routing entry (%d-%d -&gt; 0x%x -&gt; "</div><div class='del'>-		    "IRQ %d Mode:%i Active:%i Dest:%d)\n",</div><div class='del'>-		    attr-&gt;ioapic, mpc_ioapic_id(attr-&gt;ioapic), attr-&gt;ioapic_pin,</div><div class='del'>-		    cfg-&gt;vector, irq, attr-&gt;trigger, attr-&gt;polarity, dest);</div><div class='del'>-</div><div class='del'>-	if (x86_io_apic_ops.setup_entry(irq, &amp;entry, dest, cfg-&gt;vector, attr)) {</div><div class='del'>-		pr_warn("Failed to setup ioapic entry for ioapic  %d, pin %d\n",</div><div class='del'>-			mpc_ioapic_id(attr-&gt;ioapic), attr-&gt;ioapic_pin);</div><div class='del'>-		clear_irq_vector(irq, cfg);</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ioapic_register_intr(irq, cfg, attr-&gt;trigger);</div><div class='del'>-	if (irq &lt; nr_legacy_irqs())</div><div class='del'>-		legacy_pic-&gt;mask(irq);</div><div class='del'>-</div><div class='del'>-	ioapic_write_entry(attr-&gt;ioapic, attr-&gt;ioapic_pin, entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init setup_IO_APIC_irqs(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ioapic, pin;</div><div class='hunk'>@@ -1298,106 +1241,41 @@ static void __init setup_IO_APIC_irqs(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set up the timer pin, possibly with the 8259A-master behind.</div><div class='del'>- */</div><div class='del'>-static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,</div><div class='del'>-					unsigned int pin, int vector)</div><div class='del'>-{</div><div class='del'>-	struct IO_APIC_route_entry entry;</div><div class='del'>-	unsigned int dest;</div><div class='del'>-</div><div class='del'>-	memset(&amp;entry, 0, sizeof(entry));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We use logical delivery to get the timer IRQ</div><div class='del'>-	 * to the first CPU.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(apic-&gt;cpu_mask_to_apicid_and(apic-&gt;target_cpus(),</div><div class='del'>-						  apic-&gt;target_cpus(), &amp;dest)))</div><div class='del'>-		dest = BAD_APICID;</div><div class='del'>-</div><div class='del'>-	entry.dest_mode = apic-&gt;irq_dest_mode;</div><div class='del'>-	entry.mask = 0;			/* don't mask IRQ for edge */</div><div class='del'>-	entry.dest = dest;</div><div class='del'>-	entry.delivery_mode = apic-&gt;irq_delivery_mode;</div><div class='del'>-	entry.polarity = 0;</div><div class='del'>-	entry.trigger = 0;</div><div class='del'>-	entry.vector = vector;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The timer IRQ doesn't have to know that behind the</div><div class='del'>-	 * scene we may have a 8259A-master in AEOI mode ...</div><div class='del'>-	 */</div><div class='del'>-	irq_set_chip_and_handler_name(0, &amp;ioapic_chip, handle_edge_irq,</div><div class='del'>-				      "edge");</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Add it to the IO-APIC irq-routing table:</div><div class='del'>-	 */</div><div class='del'>-	ioapic_write_entry(ioapic_idx, pin, entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries)</div><div class='add'>+void ioapic_zap_locks(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	pr_debug(" NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:\n");</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt;= nr_entries; i++) {</div><div class='del'>-		struct IO_APIC_route_entry entry;</div><div class='del'>-</div><div class='del'>-		entry = ioapic_read_entry(apic, i);</div><div class='del'>-</div><div class='del'>-		pr_debug(" %02x %02X  ", i, entry.dest);</div><div class='del'>-		pr_cont("%1d    %1d    %1d   %1d   %1d    "</div><div class='del'>-			"%1d    %1d    %02X\n",</div><div class='del'>-			entry.mask,</div><div class='del'>-			entry.trigger,</div><div class='del'>-			entry.irr,</div><div class='del'>-			entry.polarity,</div><div class='del'>-			entry.delivery_status,</div><div class='del'>-			entry.dest_mode,</div><div class='del'>-			entry.delivery_mode,</div><div class='del'>-			entry.vector);</div><div class='del'>-	}</div><div class='add'>+	raw_spin_lock_init(&amp;ioapic_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void intel_ir_io_apic_print_entries(unsigned int apic,</div><div class='del'>-				    unsigned int nr_entries)</div><div class='add'>+static void io_apic_print_entries(unsigned int apic, unsigned int nr_entries)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	char buf[256];</div><div class='add'>+	struct IO_APIC_route_entry entry;</div><div class='add'>+	struct IR_IO_APIC_route_entry *ir_entry = (void *)&amp;entry;</div><div class='ctx'> </div><div class='del'>-	pr_debug(" NR Indx Fmt Mask Trig IRR Pol Stat Indx2 Zero Vect:\n");</div><div class='del'>-</div><div class='add'>+	printk(KERN_DEBUG "IOAPIC %d:\n", apic);</div><div class='ctx'> 	for (i = 0; i &lt;= nr_entries; i++) {</div><div class='del'>-		struct IR_IO_APIC_route_entry *ir_entry;</div><div class='del'>-		struct IO_APIC_route_entry entry;</div><div class='del'>-</div><div class='ctx'> 		entry = ioapic_read_entry(apic, i);</div><div class='del'>-</div><div class='del'>-		ir_entry = (struct IR_IO_APIC_route_entry *)&amp;entry;</div><div class='del'>-</div><div class='del'>-		pr_debug(" %02x %04X ", i, ir_entry-&gt;index);</div><div class='del'>-		pr_cont("%1d   %1d    %1d    %1d   %1d   "</div><div class='del'>-			"%1d    %1d     %X    %02X\n",</div><div class='del'>-			ir_entry-&gt;format,</div><div class='del'>-			ir_entry-&gt;mask,</div><div class='del'>-			ir_entry-&gt;trigger,</div><div class='del'>-			ir_entry-&gt;irr,</div><div class='del'>-			ir_entry-&gt;polarity,</div><div class='del'>-			ir_entry-&gt;delivery_status,</div><div class='del'>-			ir_entry-&gt;index2,</div><div class='del'>-			ir_entry-&gt;zero,</div><div class='del'>-			ir_entry-&gt;vector);</div><div class='add'>+		snprintf(buf, sizeof(buf),</div><div class='add'>+			 " pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)",</div><div class='add'>+			 i,</div><div class='add'>+			 entry.mask == IOAPIC_MASKED ? "disabled" : "enabled ",</div><div class='add'>+			 entry.trigger == IOAPIC_LEVEL ? "level" : "edge ",</div><div class='add'>+			 entry.polarity == IOAPIC_POL_LOW ? "low " : "high",</div><div class='add'>+			 entry.vector, entry.irr, entry.delivery_status);</div><div class='add'>+		if (ir_entry-&gt;format)</div><div class='add'>+			printk(KERN_DEBUG "%s, remapped, I(%04X),  Z(%X)\n",</div><div class='add'>+			       buf, (ir_entry-&gt;index &lt;&lt; 15) | ir_entry-&gt;index,</div><div class='add'>+			       ir_entry-&gt;zero);</div><div class='add'>+		else</div><div class='add'>+			printk(KERN_DEBUG "%s, %s, D(%02X), M(%1d)\n",</div><div class='add'>+			       buf,</div><div class='add'>+			       entry.dest_mode == IOAPIC_DEST_MODE_LOGICAL ?</div><div class='add'>+			       "logical " : "physical",</div><div class='add'>+			       entry.dest, entry.delivery_mode);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ioapic_zap_locks(void)</div><div class='del'>-{</div><div class='del'>-	raw_spin_lock_init(&amp;ioapic_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init print_IO_APIC(int ioapic_idx)</div><div class='ctx'> {</div><div class='ctx'> 	union IO_APIC_reg_00 reg_00;</div><div class='hunk'>@@ -1451,16 +1329,13 @@ static void __init print_IO_APIC(int ioapic_idx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG ".... IRQ redirection table:\n");</div><div class='del'>-</div><div class='del'>-	x86_io_apic_ops.print_entries(ioapic_idx, reg_01.bits.entries);</div><div class='add'>+	io_apic_print_entries(ioapic_idx, reg_01.bits.entries);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init print_IO_APICs(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ioapic_idx;</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='ctx'> 	unsigned int irq;</div><div class='del'>-	struct irq_chip *chip;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);</div><div class='ctx'> 	for_each_ioapic(ioapic_idx)</div><div class='hunk'>@@ -1480,18 +1355,20 @@ void __init print_IO_APICs(void)</div><div class='ctx'> 	printk(KERN_DEBUG "IRQ to pin mappings:\n");</div><div class='ctx'> 	for_each_active_irq(irq) {</div><div class='ctx'> 		struct irq_pin_list *entry;</div><div class='add'>+		struct irq_chip *chip;</div><div class='add'>+		struct mp_chip_data *data;</div><div class='ctx'> </div><div class='ctx'> 		chip = irq_get_chip(irq);</div><div class='del'>-		if (chip != &amp;ioapic_chip)</div><div class='add'>+		if (chip != &amp;ioapic_chip &amp;&amp; chip != &amp;ioapic_ir_chip)</div><div class='ctx'> 			continue;</div><div class='del'>-</div><div class='del'>-		cfg = irq_cfg(irq);</div><div class='del'>-		if (!cfg)</div><div class='add'>+		data = irq_get_chip_data(irq);</div><div class='add'>+		if (!data)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (list_empty(&amp;cfg-&gt;irq_2_pin))</div><div class='add'>+		if (list_empty(&amp;data-&gt;irq_2_pin))</div><div class='ctx'> 			continue;</div><div class='add'>+</div><div class='ctx'> 		printk(KERN_DEBUG "IRQ%d ", irq);</div><div class='del'>-		for_each_irq_pin(entry, cfg-&gt;irq_2_pin)</div><div class='add'>+		for_each_irq_pin(entry, data-&gt;irq_2_pin)</div><div class='ctx'> 			pr_cont("-&gt; %d:%d", entry-&gt;apic, entry-&gt;pin);</div><div class='ctx'> 		pr_cont("\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1564,15 +1441,12 @@ void native_disable_io_apic(void)</div><div class='ctx'> 		struct IO_APIC_route_entry entry;</div><div class='ctx'> </div><div class='ctx'> 		memset(&amp;entry, 0, sizeof(entry));</div><div class='del'>-		entry.mask            = 0; /* Enabled */</div><div class='del'>-		entry.trigger         = 0; /* Edge */</div><div class='del'>-		entry.irr             = 0;</div><div class='del'>-		entry.polarity        = 0; /* High */</div><div class='del'>-		entry.delivery_status = 0;</div><div class='del'>-		entry.dest_mode       = 0; /* Physical */</div><div class='del'>-		entry.delivery_mode   = dest_ExtINT; /* ExtInt */</div><div class='del'>-		entry.vector          = 0;</div><div class='del'>-		entry.dest            = read_apic_id();</div><div class='add'>+		entry.mask		= IOAPIC_UNMASKED;</div><div class='add'>+		entry.trigger		= IOAPIC_EDGE;</div><div class='add'>+		entry.polarity		= IOAPIC_POL_HIGH;</div><div class='add'>+		entry.dest_mode		= IOAPIC_DEST_MODE_PHYSICAL;</div><div class='add'>+		entry.delivery_mode	= dest_ExtINT;</div><div class='add'>+		entry.dest		= read_apic_id();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Add it to the IO-APIC irq-routing table:</div><div class='hunk'>@@ -1582,7 +1456,6 @@ void native_disable_io_apic(void)</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_apic || apic_from_smp_config())</div><div class='ctx'> 		disconnect_bsp_APIC(ioapic_i8259.pin != -1);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1792,7 +1665,6 @@ static int __init timer_irq_works(void)</div><div class='ctx'>  * This is not complete - we should be able to fake</div><div class='ctx'>  * an edge even if it isn't on the 8259A...</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> static unsigned int startup_ioapic_irq(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	int was_pending = 0, irq = data-&gt;irq;</div><div class='hunk'>@@ -1804,74 +1676,22 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)</div><div class='ctx'> 		if (legacy_pic-&gt;irq_pending(irq))</div><div class='ctx'> 			was_pending = 1;</div><div class='ctx'> 	}</div><div class='del'>-	__unmask_ioapic(irqd_cfg(data));</div><div class='add'>+	__unmask_ioapic(data-&gt;chip_data);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return was_pending;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Level and edge triggered IO-APIC interrupts need different handling,</div><div class='del'>- * so we use two separate IRQ descriptors. Edge triggered IRQs can be</div><div class='del'>- * handled with the level-triggered descriptor, but that one has slightly</div><div class='del'>- * more overhead. Level-triggered interrupts cannot be handled with the</div><div class='del'>- * edge-triggered handler, without risking IRQ storms and other ugly</div><div class='del'>- * races.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	int apic, pin;</div><div class='del'>-	struct irq_pin_list *entry;</div><div class='del'>-	u8 vector = cfg-&gt;vector;</div><div class='del'>-</div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin) {</div><div class='del'>-		unsigned int reg;</div><div class='del'>-</div><div class='del'>-		apic = entry-&gt;apic;</div><div class='del'>-		pin = entry-&gt;pin;</div><div class='del'>-</div><div class='del'>-		io_apic_write(apic, 0x11 + pin*2, dest);</div><div class='del'>-		reg = io_apic_read(apic, 0x10 + pin*2);</div><div class='del'>-		reg &amp;= ~IO_APIC_REDIR_VECTOR_MASK;</div><div class='del'>-		reg |= vector;</div><div class='del'>-		io_apic_modify(apic, 0x10 + pin*2, reg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int native_ioapic_set_affinity(struct irq_data *data,</div><div class='del'>-			       const struct cpumask *mask,</div><div class='del'>-			       bool force)</div><div class='del'>-{</div><div class='del'>-	unsigned int dest, irq = data-&gt;irq;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!config_enabled(CONFIG_SMP))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	ret = apic_set_affinity(data, mask, &amp;dest);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		/* Only the high 8 bits are valid. */</div><div class='del'>-		dest = SET_APIC_LOGICAL_ID(dest);</div><div class='del'>-		__target_IO_APIC_irq(irq, dest, irqd_cfg(data));</div><div class='del'>-		ret = IRQ_SET_MASK_OK_NOCOPY;</div><div class='del'>-	}</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> atomic_t irq_mis_count;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GENERIC_PENDING_IRQ</div><div class='del'>-static bool io_apic_level_ack_pending(struct irq_cfg *cfg)</div><div class='add'>+static bool io_apic_level_ack_pending(struct mp_chip_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_pin_list *entry;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin) {</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin) {</div><div class='ctx'> 		unsigned int reg;</div><div class='ctx'> 		int pin;</div><div class='ctx'> </div><div class='hunk'>@@ -1888,18 +1708,17 @@ static bool io_apic_level_ack_pending(struct irq_cfg *cfg)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool ioapic_irqd_mask(struct irq_data *data, struct irq_cfg *cfg)</div><div class='add'>+static inline bool ioapic_irqd_mask(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	/* If we are moving the irq we need to mask it */</div><div class='ctx'> 	if (unlikely(irqd_is_setaffinity_pending(data))) {</div><div class='del'>-		mask_ioapic(cfg);</div><div class='add'>+		mask_ioapic_irq(data);</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void ioapic_irqd_unmask(struct irq_data *data,</div><div class='del'>-				      struct irq_cfg *cfg, bool masked)</div><div class='add'>+static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(masked)) {</div><div class='ctx'> 		/* Only migrate the irq if the ack has been received.</div><div class='hunk'>@@ -1928,31 +1747,30 @@ static inline void ioapic_irqd_unmask(struct irq_data *data,</div><div class='ctx'> 		 * accurate and is causing problems then it is a hardware bug</div><div class='ctx'> 		 * and you can go talk to the chipset vendor about it.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!io_apic_level_ack_pending(cfg))</div><div class='add'>+		if (!io_apic_level_ack_pending(data-&gt;chip_data))</div><div class='ctx'> 			irq_move_masked_irq(data);</div><div class='del'>-		unmask_ioapic(cfg);</div><div class='add'>+		unmask_ioapic_irq(data);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static inline bool ioapic_irqd_mask(struct irq_data *data, struct irq_cfg *cfg)</div><div class='add'>+static inline bool ioapic_irqd_mask(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='del'>-static inline void ioapic_irqd_unmask(struct irq_data *data,</div><div class='del'>-				      struct irq_cfg *cfg, bool masked)</div><div class='add'>+static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static void ack_ioapic_level(struct irq_data *data)</div><div class='add'>+static void ioapic_ack_level(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	int i, irq = data-&gt;irq;</div><div class='add'>+	struct irq_cfg *cfg = irqd_cfg(irq_data);</div><div class='ctx'> 	unsigned long v;</div><div class='ctx'> 	bool masked;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	irq_complete_move(cfg);</div><div class='del'>-	masked = ioapic_irqd_mask(data, cfg);</div><div class='add'>+	masked = ioapic_irqd_mask(irq_data);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * It appears there is an erratum which affects at least version 0x11</div><div class='hunk'>@@ -2004,11 +1822,49 @@ static void ack_ioapic_level(struct irq_data *data)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(v &amp; (1 &lt;&lt; (i &amp; 0x1f)))) {</div><div class='ctx'> 		atomic_inc(&amp;irq_mis_count);</div><div class='add'>+		eoi_ioapic_pin(cfg-&gt;vector, irq_data-&gt;chip_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ioapic_irqd_unmask(irq_data, masked);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ioapic_ir_ack_level(struct irq_data *irq_data)</div><div class='add'>+{</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Intr-remapping uses pin number as the virtual vector</div><div class='add'>+	 * in the RTE. Actual vector is programmed in</div><div class='add'>+	 * intr-remapping table entry. Hence for the io-apic</div><div class='add'>+	 * EOI we use the pin number.</div><div class='add'>+	 */</div><div class='add'>+	ack_APIC_irq();</div><div class='add'>+	eoi_ioapic_pin(data-&gt;entry.vector, data);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		eoi_ioapic_irq(irq, cfg);</div><div class='add'>+static int ioapic_set_affinity(struct irq_data *irq_data,</div><div class='add'>+			       const struct cpumask *mask, bool force)</div><div class='add'>+{</div><div class='add'>+	struct irq_data *parent = irq_data-&gt;parent_data;</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='add'>+	struct irq_pin_list *entry;</div><div class='add'>+	struct irq_cfg *cfg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = parent-&gt;chip-&gt;irq_set_affinity(parent, mask, force);</div><div class='add'>+	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='add'>+	if (ret &gt;= 0 &amp;&amp; ret != IRQ_SET_MASK_OK_DONE) {</div><div class='add'>+		cfg = irqd_cfg(irq_data);</div><div class='add'>+		data-&gt;entry.dest = cfg-&gt;dest_apicid;</div><div class='add'>+		data-&gt;entry.vector = cfg-&gt;vector;</div><div class='add'>+		for_each_irq_pin(entry, data-&gt;irq_2_pin)</div><div class='add'>+			__ioapic_write_entry(entry-&gt;apic, entry-&gt;pin,</div><div class='add'>+					     data-&gt;entry);</div><div class='ctx'> 	}</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='ctx'> </div><div class='del'>-	ioapic_irqd_unmask(data, cfg, masked);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip ioapic_chip __read_mostly = {</div><div class='hunk'>@@ -2016,10 +1872,20 @@ static struct irq_chip ioapic_chip __read_mostly = {</div><div class='ctx'> 	.irq_startup		= startup_ioapic_irq,</div><div class='ctx'> 	.irq_mask		= mask_ioapic_irq,</div><div class='ctx'> 	.irq_unmask		= unmask_ioapic_irq,</div><div class='del'>-	.irq_ack		= apic_ack_edge,</div><div class='del'>-	.irq_eoi		= ack_ioapic_level,</div><div class='del'>-	.irq_set_affinity	= native_ioapic_set_affinity,</div><div class='del'>-	.irq_retrigger		= apic_retrigger_irq,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='add'>+	.irq_eoi		= ioapic_ack_level,</div><div class='add'>+	.irq_set_affinity	= ioapic_set_affinity,</div><div class='add'>+	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_chip ioapic_ir_chip __read_mostly = {</div><div class='add'>+	.name			= "IR-IO-APIC",</div><div class='add'>+	.irq_startup		= startup_ioapic_irq,</div><div class='add'>+	.irq_mask		= mask_ioapic_irq,</div><div class='add'>+	.irq_unmask		= unmask_ioapic_irq,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='add'>+	.irq_eoi		= ioapic_ir_ack_level,</div><div class='add'>+	.irq_set_affinity	= ioapic_set_affinity,</div><div class='ctx'> 	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2113,12 +1979,12 @@ static inline void __init unlock_ExtINT_logic(void)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;entry1, 0, sizeof(entry1));</div><div class='ctx'> </div><div class='del'>-	entry1.dest_mode = 0;			/* physical delivery */</div><div class='del'>-	entry1.mask = 0;			/* unmask IRQ now */</div><div class='add'>+	entry1.dest_mode = IOAPIC_DEST_MODE_PHYSICAL;</div><div class='add'>+	entry1.mask = IOAPIC_UNMASKED;</div><div class='ctx'> 	entry1.dest = hard_smp_processor_id();</div><div class='ctx'> 	entry1.delivery_mode = dest_ExtINT;</div><div class='ctx'> 	entry1.polarity = entry0.polarity;</div><div class='del'>-	entry1.trigger = 0;</div><div class='add'>+	entry1.trigger = IOAPIC_EDGE;</div><div class='ctx'> 	entry1.vector = 0;</div><div class='ctx'> </div><div class='ctx'> 	ioapic_write_entry(apic, pin, entry1);</div><div class='hunk'>@@ -2152,6 +2018,25 @@ static int __init disable_timer_pin_setup(char *arg)</div><div class='ctx'> }</div><div class='ctx'> early_param("disable_timer_pin_1", disable_timer_pin_setup);</div><div class='ctx'> </div><div class='add'>+static int mp_alloc_timer_irq(int ioapic, int pin)</div><div class='add'>+{</div><div class='add'>+	int irq = -1;</div><div class='add'>+	struct irq_domain *domain = mp_ioapic_irqdomain(ioapic);</div><div class='add'>+</div><div class='add'>+	if (domain) {</div><div class='add'>+		struct irq_alloc_info info;</div><div class='add'>+</div><div class='add'>+		ioapic_set_alloc_attr(&amp;info, NUMA_NO_NODE, 0, 0);</div><div class='add'>+		info.ioapic_id = mpc_ioapic_id(ioapic);</div><div class='add'>+		info.ioapic_pin = pin;</div><div class='add'>+		mutex_lock(&amp;ioapic_mutex);</div><div class='add'>+		irq = alloc_isa_irq_from_domain(domain, 0, ioapic, pin, &amp;info);</div><div class='add'>+		mutex_unlock(&amp;ioapic_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This code may look a bit paranoid, but it's supposed to cooperate with</div><div class='ctx'>  * a wide range of boards and BIOS bugs.  Fortunately only the timer IRQ</div><div class='hunk'>@@ -2162,7 +2047,9 @@ early_param("disable_timer_pin_1", disable_timer_pin_setup);</div><div class='ctx'>  */</div><div class='ctx'> static inline void __init check_timer(void)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irq_cfg(0);</div><div class='add'>+	struct irq_data *irq_data = irq_get_irq_data(0);</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='add'>+	struct irq_cfg *cfg = irqd_cfg(irq_data);</div><div class='ctx'> 	int node = cpu_to_node(0);</div><div class='ctx'> 	int apic1, pin1, apic2, pin2;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -2174,7 +2061,6 @@ static inline void __init check_timer(void)</div><div class='ctx'> 	 * get/set the timer IRQ vector:</div><div class='ctx'> 	 */</div><div class='ctx'> 	legacy_pic-&gt;mask(0);</div><div class='del'>-	assign_irq_vector(0, cfg, apic-&gt;target_cpus());</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * As IRQ0 is to be enabled in the 8259A, the virtual</div><div class='hunk'>@@ -2215,23 +2101,21 @@ static inline void __init check_timer(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pin1 != -1) {</div><div class='del'>-		/*</div><div class='del'>-		 * Ok, does IRQ0 through the IOAPIC work?</div><div class='del'>-		 */</div><div class='add'>+		/* Ok, does IRQ0 through the IOAPIC work? */</div><div class='ctx'> 		if (no_pin1) {</div><div class='del'>-			add_pin_to_irq_node(cfg, node, apic1, pin1);</div><div class='del'>-			setup_timer_IRQ0_pin(apic1, pin1, cfg-&gt;vector);</div><div class='add'>+			mp_alloc_timer_irq(apic1, pin1);</div><div class='ctx'> 		} else {</div><div class='del'>-			/* for edge trigger, setup_ioapic_irq already</div><div class='del'>-			 * leave it unmasked.</div><div class='add'>+			/*</div><div class='add'>+			 * for edge trigger, it's already unmasked,</div><div class='ctx'> 			 * so only need to unmask if it is level-trigger</div><div class='ctx'> 			 * do we really have level trigger timer?</div><div class='ctx'> 			 */</div><div class='ctx'> 			int idx;</div><div class='ctx'> 			idx = find_irq_entry(apic1, pin1, mp_INT);</div><div class='ctx'> 			if (idx != -1 &amp;&amp; irq_trigger(idx))</div><div class='del'>-				unmask_ioapic(cfg);</div><div class='add'>+				unmask_ioapic_irq(irq_get_chip_data(0));</div><div class='ctx'> 		}</div><div class='add'>+		irq_domain_activate_irq(irq_data);</div><div class='ctx'> 		if (timer_irq_works()) {</div><div class='ctx'> 			if (disable_timer_pin_1 &gt; 0)</div><div class='ctx'> 				clear_IO_APIC_pin(0, pin1);</div><div class='hunk'>@@ -2251,8 +2135,8 @@ static inline void __init check_timer(void)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * legacy devices should be connected to IO APIC #0</div><div class='ctx'> 		 */</div><div class='del'>-		replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2);</div><div class='del'>-		setup_timer_IRQ0_pin(apic2, pin2, cfg-&gt;vector);</div><div class='add'>+		replace_pin_at_irq_node(data, node, apic1, pin1, apic2, pin2);</div><div class='add'>+		irq_domain_activate_irq(irq_data);</div><div class='ctx'> 		legacy_pic-&gt;unmask(0);</div><div class='ctx'> 		if (timer_irq_works()) {</div><div class='ctx'> 			apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");</div><div class='hunk'>@@ -2329,36 +2213,35 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int mp_irqdomain_create(int ioapic)</div><div class='ctx'> {</div><div class='del'>-	size_t size;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='add'>+	struct irq_domain *parent;</div><div class='ctx'> 	int hwirqs = mp_ioapic_pin_count(ioapic);</div><div class='ctx'> 	struct ioapic *ip = &amp;ioapics[ioapic];</div><div class='ctx'> 	struct ioapic_domain_cfg *cfg = &amp;ip-&gt;irqdomain_cfg;</div><div class='ctx'> 	struct mp_ioapic_gsi *gsi_cfg = mp_ioapic_gsi_routing(ioapic);</div><div class='ctx'> </div><div class='del'>-	size = sizeof(struct mp_pin_info) * mp_ioapic_pin_count(ioapic);</div><div class='del'>-	ip-&gt;pin_info = kzalloc(size, GFP_KERNEL);</div><div class='del'>-	if (!ip-&gt;pin_info)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	if (cfg-&gt;type == IOAPIC_DOMAIN_INVALID)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_IOAPIC;</div><div class='add'>+	info.ioapic_id = mpc_ioapic_id(ioapic);</div><div class='add'>+	parent = irq_remapping_get_ir_irq_domain(&amp;info);</div><div class='add'>+	if (!parent)</div><div class='add'>+		parent = x86_vector_domain;</div><div class='add'>+</div><div class='ctx'> 	ip-&gt;irqdomain = irq_domain_add_linear(cfg-&gt;dev, hwirqs, cfg-&gt;ops,</div><div class='ctx'> 					      (void *)(long)ioapic);</div><div class='del'>-	if(!ip-&gt;irqdomain) {</div><div class='del'>-		kfree(ip-&gt;pin_info);</div><div class='del'>-		ip-&gt;pin_info = NULL;</div><div class='add'>+	if (!ip-&gt;irqdomain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	ip-&gt;irqdomain-&gt;parent = parent;</div><div class='ctx'> </div><div class='ctx'> 	if (cfg-&gt;type == IOAPIC_DOMAIN_LEGACY ||</div><div class='ctx'> 	    cfg-&gt;type == IOAPIC_DOMAIN_STRICT)</div><div class='ctx'> 		ioapic_dynirq_base = max(ioapic_dynirq_base,</div><div class='ctx'> 					 gsi_cfg-&gt;gsi_end + 1);</div><div class='ctx'> </div><div class='del'>-	if (gsi_cfg-&gt;gsi_base == 0)</div><div class='del'>-		irq_set_default_host(ip-&gt;irqdomain);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2368,8 +2251,6 @@ static void ioapic_destroy_irqdomain(int idx)</div><div class='ctx'> 		irq_domain_remove(ioapics[idx].irqdomain);</div><div class='ctx'> 		ioapics[idx].irqdomain = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	kfree(ioapics[idx].pin_info);</div><div class='del'>-	ioapics[idx].pin_info = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init setup_IO_APIC(void)</div><div class='hunk'>@@ -2399,20 +2280,6 @@ void __init setup_IO_APIC(void)</div><div class='ctx'> 	ioapic_initialized = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *      Called after all the initialization is done. If we didn't find any</div><div class='del'>- *      APIC bugs then we can allow the modify fast path</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init io_apic_bug_finalize(void)</div><div class='del'>-{</div><div class='del'>-	if (sis_apic_bug == -1)</div><div class='del'>-		sis_apic_bug = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-late_initcall(io_apic_bug_finalize);</div><div class='del'>-</div><div class='ctx'> static void resume_ioapic_id(int ioapic_idx)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -2451,20 +2318,6 @@ static int __init ioapic_init_ops(void)</div><div class='ctx'> </div><div class='ctx'> device_initcall(ioapic_init_ops);</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)</div><div class='del'>-{</div><div class='del'>-	struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cfg)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	ret = __add_pin_to_irq_node(cfg, node, attr-&gt;ioapic, attr-&gt;ioapic_pin);</div><div class='del'>-	if (!ret)</div><div class='del'>-		setup_ioapic_irq(irq, cfg, attr);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int io_apic_get_redir_entries(int ioapic)</div><div class='ctx'> {</div><div class='ctx'> 	union IO_APIC_reg_01	reg_01;</div><div class='hunk'>@@ -2692,7 +2545,7 @@ void __init setup_ioapic_dest(void)</div><div class='ctx'> 		else</div><div class='ctx'> 			mask = apic-&gt;target_cpus();</div><div class='ctx'> </div><div class='del'>-		x86_io_apic_ops.set_affinity(idata, mask, false);</div><div class='add'>+		irq_set_affinity(irq, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -2737,7 +2590,7 @@ static struct resource * __init ioapic_setup_resources(void)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init native_io_apic_init_mappings(void)</div><div class='add'>+void __init io_apic_init_mappings(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;</div><div class='ctx'> 	struct resource *ioapic_res;</div><div class='hunk'>@@ -2962,7 +2815,6 @@ int mp_unregister_ioapic(u32 gsi_base)</div><div class='ctx'> {</div><div class='ctx'> 	int ioapic, pin;</div><div class='ctx'> 	int found = 0;</div><div class='del'>-	struct mp_pin_info *pin_info;</div><div class='ctx'> </div><div class='ctx'> 	for_each_ioapic(ioapic)</div><div class='ctx'> 		if (ioapics[ioapic].gsi_config.gsi_base == gsi_base) {</div><div class='hunk'>@@ -2975,11 +2827,17 @@ int mp_unregister_ioapic(u32 gsi_base)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_pin(ioapic, pin) {</div><div class='del'>-		pin_info = mp_pin_info(ioapic, pin);</div><div class='del'>-		if (pin_info-&gt;count) {</div><div class='del'>-			pr_warn("pin%d on IOAPIC%d is still in use.\n",</div><div class='del'>-				pin, ioapic);</div><div class='del'>-			return -EBUSY;</div><div class='add'>+		u32 gsi = mp_pin_to_gsi(ioapic, pin);</div><div class='add'>+		int irq = mp_map_gsi_to_irq(gsi, 0, NULL);</div><div class='add'>+		struct mp_chip_data *data;</div><div class='add'>+</div><div class='add'>+		if (irq &gt;= 0) {</div><div class='add'>+			data = irq_get_chip_data(irq);</div><div class='add'>+			if (data &amp;&amp; data-&gt;count) {</div><div class='add'>+				pr_warn("pin%d on IOAPIC%d is still in use.\n",</div><div class='add'>+					pin, ioapic);</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3006,108 +2864,141 @@ int mp_ioapic_registered(u32 gsi_base)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,</div><div class='del'>-					int ioapic, int ioapic_pin,</div><div class='del'>-					int trigger, int polarity)</div><div class='add'>+static void mp_irqdomain_get_attr(u32 gsi, struct mp_chip_data *data,</div><div class='add'>+				  struct irq_alloc_info *info)</div><div class='ctx'> {</div><div class='del'>-	irq_attr-&gt;ioapic	= ioapic;</div><div class='del'>-	irq_attr-&gt;ioapic_pin	= ioapic_pin;</div><div class='del'>-	irq_attr-&gt;trigger	= trigger;</div><div class='del'>-	irq_attr-&gt;polarity	= polarity;</div><div class='add'>+	if (info &amp;&amp; info-&gt;ioapic_valid) {</div><div class='add'>+		data-&gt;trigger = info-&gt;ioapic_trigger;</div><div class='add'>+		data-&gt;polarity = info-&gt;ioapic_polarity;</div><div class='add'>+	} else if (acpi_get_override_irq(gsi, &amp;data-&gt;trigger,</div><div class='add'>+					 &amp;data-&gt;polarity) &lt; 0) {</div><div class='add'>+		/* PCI interrupts are always active low level triggered. */</div><div class='add'>+		data-&gt;trigger = IOAPIC_LEVEL;</div><div class='add'>+		data-&gt;polarity = IOAPIC_POL_LOW;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,</div><div class='del'>-		     irq_hw_number_t hwirq)</div><div class='add'>+static void mp_setup_entry(struct irq_cfg *cfg, struct mp_chip_data *data,</div><div class='add'>+			   struct IO_APIC_route_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	int ioapic = (int)(long)domain-&gt;host_data;</div><div class='del'>-	struct mp_pin_info *info = mp_pin_info(ioapic, hwirq);</div><div class='del'>-	struct io_apic_irq_attr attr;</div><div class='add'>+	memset(entry, 0, sizeof(*entry));</div><div class='add'>+	entry-&gt;delivery_mode = apic-&gt;irq_delivery_mode;</div><div class='add'>+	entry-&gt;dest_mode     = apic-&gt;irq_dest_mode;</div><div class='add'>+	entry-&gt;dest	     = cfg-&gt;dest_apicid;</div><div class='add'>+	entry-&gt;vector	     = cfg-&gt;vector;</div><div class='add'>+	entry-&gt;trigger	     = data-&gt;trigger;</div><div class='add'>+	entry-&gt;polarity	     = data-&gt;polarity;</div><div class='add'>+	/*</div><div class='add'>+	 * Mask level triggered irqs. Edge triggered irqs are masked</div><div class='add'>+	 * by the irq core code in case they fire.</div><div class='add'>+	 */</div><div class='add'>+	if (data-&gt;trigger == IOAPIC_LEVEL)</div><div class='add'>+		entry-&gt;mask = IOAPIC_MASKED;</div><div class='add'>+	else</div><div class='add'>+		entry-&gt;mask = IOAPIC_UNMASKED;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Get default attribute if not set by caller yet */</div><div class='del'>-	if (!info-&gt;set) {</div><div class='del'>-		u32 gsi = mp_pin_to_gsi(ioapic, hwirq);</div><div class='add'>+int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+		       unsigned int nr_irqs, void *arg)</div><div class='add'>+{</div><div class='add'>+	int ret, ioapic, pin;</div><div class='add'>+	struct irq_cfg *cfg;</div><div class='add'>+	struct irq_data *irq_data;</div><div class='add'>+	struct mp_chip_data *data;</div><div class='add'>+	struct irq_alloc_info *info = arg;</div><div class='ctx'> </div><div class='del'>-		if (acpi_get_override_irq(gsi, &amp;info-&gt;trigger,</div><div class='del'>-					  &amp;info-&gt;polarity) &lt; 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * PCI interrupts are always polarity one level</div><div class='del'>-			 * triggered.</div><div class='del'>-			 */</div><div class='del'>-			info-&gt;trigger = 1;</div><div class='del'>-			info-&gt;polarity = 1;</div><div class='del'>-		}</div><div class='del'>-		info-&gt;node = NUMA_NO_NODE;</div><div class='add'>+	if (!info || nr_irqs &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	irq_data = irq_domain_get_irq_data(domain, virq);</div><div class='add'>+	if (!irq_data)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * setup_IO_APIC_irqs() programs all legacy IRQs with default</div><div class='del'>-		 * trigger and polarity attributes. Don't set the flag for that</div><div class='del'>-		 * case so the first legacy IRQ user could reprogram the pin</div><div class='del'>-		 * with real trigger and polarity attributes.</div><div class='del'>-		 */</div><div class='del'>-		if (virq &gt;= nr_legacy_irqs() || info-&gt;count)</div><div class='del'>-			info-&gt;set = 1;</div><div class='del'>-	}</div><div class='del'>-	set_io_apic_irq_attr(&amp;attr, ioapic, hwirq, info-&gt;trigger,</div><div class='del'>-			     info-&gt;polarity);</div><div class='add'>+	ioapic = mp_irqdomain_ioapic_idx(domain);</div><div class='add'>+	pin = info-&gt;ioapic_pin;</div><div class='add'>+	if (irq_find_mapping(domain, (irq_hw_number_t)pin) &gt; 0)</div><div class='add'>+		return -EEXIST;</div><div class='ctx'> </div><div class='del'>-	return io_apic_setup_irq_pin(virq, info-&gt;node, &amp;attr);</div><div class='del'>-}</div><div class='add'>+	data = kzalloc(sizeof(*data), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq)</div><div class='del'>-{</div><div class='del'>-	struct irq_data *data = irq_get_irq_data(virq);</div><div class='del'>-	struct irq_cfg *cfg = irq_cfg(virq);</div><div class='del'>-	int ioapic = (int)(long)domain-&gt;host_data;</div><div class='del'>-	int pin = (int)data-&gt;hwirq;</div><div class='add'>+	info-&gt;ioapic_entry = &amp;data-&gt;entry;</div><div class='add'>+	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(data);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;data-&gt;irq_2_pin);</div><div class='add'>+	irq_data-&gt;hwirq = info-&gt;ioapic_pin;</div><div class='add'>+	irq_data-&gt;chip = (domain-&gt;parent == x86_vector_domain) ?</div><div class='add'>+			  &amp;ioapic_chip : &amp;ioapic_ir_chip;</div><div class='add'>+	irq_data-&gt;chip_data = data;</div><div class='add'>+	mp_irqdomain_get_attr(mp_pin_to_gsi(ioapic, pin), data, info);</div><div class='add'>+</div><div class='add'>+	cfg = irqd_cfg(irq_data);</div><div class='add'>+	add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin);</div><div class='add'>+	if (info-&gt;ioapic_entry)</div><div class='add'>+		mp_setup_entry(cfg, data, info-&gt;ioapic_entry);</div><div class='add'>+	mp_register_handler(virq, data-&gt;trigger);</div><div class='add'>+	if (virq &lt; nr_legacy_irqs())</div><div class='add'>+		legacy_pic-&gt;mask(virq);</div><div class='add'>+</div><div class='add'>+	apic_printk(APIC_VERBOSE, KERN_DEBUG</div><div class='add'>+		    "IOAPIC[%d]: Set routing entry (%d-%d -&gt; 0x%x -&gt; IRQ %d Mode:%i Active:%i Dest:%d)\n",</div><div class='add'>+		    ioapic, mpc_ioapic_id(ioapic), pin, cfg-&gt;vector,</div><div class='add'>+		    virq, data-&gt;trigger, data-&gt;polarity, cfg-&gt;dest_apicid);</div><div class='ctx'> </div><div class='del'>-	ioapic_mask_entry(ioapic, pin);</div><div class='del'>-	__remove_pin_from_irq(cfg, ioapic, pin);</div><div class='del'>-	WARN_ON(!list_empty(&amp;cfg-&gt;irq_2_pin));</div><div class='del'>-	arch_teardown_hwirq(virq);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)</div><div class='add'>+void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+		       unsigned int nr_irqs)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int ioapic, pin;</div><div class='del'>-	struct mp_pin_info *info;</div><div class='add'>+	struct irq_data *irq_data;</div><div class='add'>+	struct mp_chip_data *data;</div><div class='ctx'> </div><div class='del'>-	ioapic = mp_find_ioapic(gsi);</div><div class='del'>-	if (ioapic &lt; 0)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pin = mp_find_ioapic_pin(ioapic, gsi);</div><div class='del'>-	info = mp_pin_info(ioapic, pin);</div><div class='del'>-	trigger = trigger ? 1 : 0;</div><div class='del'>-	polarity = polarity ? 1 : 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ioapic_mutex);</div><div class='del'>-	if (!info-&gt;set) {</div><div class='del'>-		info-&gt;trigger = trigger;</div><div class='del'>-		info-&gt;polarity = polarity;</div><div class='del'>-		info-&gt;node = node;</div><div class='del'>-		info-&gt;set = 1;</div><div class='del'>-	} else if (info-&gt;trigger != trigger || info-&gt;polarity != polarity) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	BUG_ON(nr_irqs != 1);</div><div class='add'>+	irq_data = irq_domain_get_irq_data(domain, virq);</div><div class='add'>+	if (irq_data &amp;&amp; irq_data-&gt;chip_data) {</div><div class='add'>+		data = irq_data-&gt;chip_data;</div><div class='add'>+		__remove_pin_from_irq(data, mp_irqdomain_ioapic_idx(domain),</div><div class='add'>+				      (int)irq_data-&gt;hwirq);</div><div class='add'>+		WARN_ON(!list_empty(&amp;data-&gt;irq_2_pin));</div><div class='add'>+		kfree(irq_data-&gt;chip_data);</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;ioapic_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	irq_domain_free_irqs_top(domain, virq, nr_irqs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Enable IOAPIC early just for system timer */</div><div class='del'>-void __init pre_init_apic_IRQ0(void)</div><div class='add'>+void mp_irqdomain_activate(struct irq_domain *domain,</div><div class='add'>+			   struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	struct io_apic_irq_attr attr = { 0, 0, 0, 0 };</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct irq_pin_list *entry;</div><div class='add'>+	struct mp_chip_data *data = irq_data-&gt;chip_data;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Early APIC setup for system timer0\n");</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	physid_set_mask_of_physid(boot_cpu_physical_apicid,</div><div class='del'>-					 &amp;phys_cpu_present_map);</div><div class='del'>-#endif</div><div class='del'>-	setup_local_APIC();</div><div class='add'>+	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='add'>+	for_each_irq_pin(entry, data-&gt;irq_2_pin)</div><div class='add'>+		__ioapic_write_entry(entry-&gt;apic, entry-&gt;pin, data-&gt;entry);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	io_apic_setup_irq_pin(0, 0, &amp;attr);</div><div class='del'>-	irq_set_chip_and_handler_name(0, &amp;ioapic_chip, handle_edge_irq,</div><div class='del'>-				      "edge");</div><div class='add'>+void mp_irqdomain_deactivate(struct irq_domain *domain,</div><div class='add'>+			     struct irq_data *irq_data)</div><div class='add'>+{</div><div class='add'>+	/* It won't be called for IRQ with multiple IOAPIC pins associated */</div><div class='add'>+	ioapic_mask_entry(mp_irqdomain_ioapic_idx(domain),</div><div class='add'>+			  (int)irq_data-&gt;hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mp_irqdomain_ioapic_idx(struct irq_domain *domain)</div><div class='add'>+{</div><div class='add'>+	return (int)(long)domain-&gt;host_data;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const struct irq_domain_ops mp_ioapic_irqdomain_ops = {</div><div class='add'>+	.alloc		= mp_irqdomain_alloc,</div><div class='add'>+	.free		= mp_irqdomain_free,</div><div class='add'>+	.activate	= mp_irqdomain_activate,</div><div class='add'>+	.deactivate	= mp_irqdomain_deactivate,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c<br/>index d6ba2d660dc5..1a9d735e09c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/msi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apic/msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/msi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/msi.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo</div><div class='ctx'>  *	Moved from arch/x86/kernel/apic/io_apic.c.</div><div class='add'>+ * Jiang Liu &lt;jiang.liu@linux.intel.com&gt;</div><div class='add'>+ *	Convert to hierarchical irqdomain</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -14,22 +16,23 @@</div><div class='ctx'> #include &lt;linux/dmar.h&gt;</div><div class='ctx'> #include &lt;linux/hpet.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/msidef.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> </div><div class='del'>-void native_compose_msi_msg(struct pci_dev *pdev,</div><div class='del'>-			    unsigned int irq, unsigned int dest,</div><div class='del'>-			    struct msi_msg *msg, u8 hpet_id)</div><div class='add'>+static struct irq_domain *msi_default_domain;</div><div class='add'>+</div><div class='add'>+static void irq_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irq_cfg(irq);</div><div class='add'>+	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='ctx'> </div><div class='ctx'> 	msg-&gt;address_hi = MSI_ADDR_BASE_HI;</div><div class='ctx'> </div><div class='ctx'> 	if (x2apic_enabled())</div><div class='del'>-		msg-&gt;address_hi |= MSI_ADDR_EXT_DEST_ID(dest);</div><div class='add'>+		msg-&gt;address_hi |= MSI_ADDR_EXT_DEST_ID(cfg-&gt;dest_apicid);</div><div class='ctx'> </div><div class='ctx'> 	msg-&gt;address_lo =</div><div class='ctx'> 		MSI_ADDR_BASE_LO |</div><div class='hunk'>@@ -39,7 +42,7 @@ void native_compose_msi_msg(struct pci_dev *pdev,</div><div class='ctx'> 		((apic-&gt;irq_delivery_mode != dest_LowestPrio) ?</div><div class='ctx'> 			MSI_ADDR_REDIRECTION_CPU :</div><div class='ctx'> 			MSI_ADDR_REDIRECTION_LOWPRI) |</div><div class='del'>-		MSI_ADDR_DEST_ID(dest);</div><div class='add'>+		MSI_ADDR_DEST_ID(cfg-&gt;dest_apicid);</div><div class='ctx'> </div><div class='ctx'> 	msg-&gt;data =</div><div class='ctx'> 		MSI_DATA_TRIGGER_EDGE |</div><div class='hunk'>@@ -50,180 +53,201 @@ void native_compose_msi_msg(struct pci_dev *pdev,</div><div class='ctx'> 		MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,</div><div class='del'>-			   struct msi_msg *msg, u8 hpet_id)</div><div class='add'>+/*</div><div class='add'>+ * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,</div><div class='add'>+ * which implement the MSI or MSI-X Capability Structure.</div><div class='add'>+ */</div><div class='add'>+static struct irq_chip pci_msi_controller = {</div><div class='add'>+	.name			= "PCI-MSI",</div><div class='add'>+	.irq_unmask		= pci_msi_unmask_irq,</div><div class='add'>+	.irq_mask		= pci_msi_mask_irq,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='add'>+	.irq_retrigger		= irq_chip_retrigger_hierarchy,</div><div class='add'>+	.irq_compose_msi_msg	= irq_msi_compose_msg,</div><div class='add'>+	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='del'>-	int err;</div><div class='del'>-	unsigned dest;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> </div><div class='del'>-	if (disable_apic)</div><div class='del'>-		return -ENXIO;</div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_MSI;</div><div class='add'>+	info.msi_dev = dev;</div><div class='ctx'> </div><div class='del'>-	cfg = irq_cfg(irq);</div><div class='del'>-	err = assign_irq_vector(irq, cfg, apic-&gt;target_cpus());</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	domain = irq_remapping_get_irq_domain(&amp;info);</div><div class='add'>+	if (domain == NULL)</div><div class='add'>+		domain = msi_default_domain;</div><div class='add'>+	if (domain == NULL)</div><div class='add'>+		return -ENOSYS;</div><div class='ctx'> </div><div class='del'>-	err = apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain,</div><div class='del'>-					   apic-&gt;target_cpus(), &amp;dest);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);</div><div class='add'>+void native_teardown_msi_irq(unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	irq_domain_free_irqs(irq, 1);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static irq_hw_number_t pci_msi_get_hwirq(struct msi_domain_info *info,</div><div class='add'>+					 msi_alloc_info_t *arg)</div><div class='add'>+{</div><div class='add'>+	return arg-&gt;msi_hwirq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-msi_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)</div><div class='add'>+static int pci_msi_prepare(struct irq_domain *domain, struct device *dev,</div><div class='add'>+			   int nvec, msi_alloc_info_t *arg)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	unsigned int dest;</div><div class='del'>-	int ret;</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct msi_desc *desc = first_pci_msi_entry(pdev);</div><div class='add'>+</div><div class='add'>+	init_irq_alloc_info(arg, NULL);</div><div class='add'>+	arg-&gt;msi_dev = pdev;</div><div class='add'>+	if (desc-&gt;msi_attrib.is_msix) {</div><div class='add'>+		arg-&gt;type = X86_IRQ_ALLOC_TYPE_MSIX;</div><div class='add'>+	} else {</div><div class='add'>+		arg-&gt;type = X86_IRQ_ALLOC_TYPE_MSI;</div><div class='add'>+		arg-&gt;flags |= X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = apic_set_affinity(data, mask, &amp;dest);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	__get_cached_msi_msg(data-&gt;msi_desc, &amp;msg);</div><div class='add'>+static void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)</div><div class='add'>+{</div><div class='add'>+	arg-&gt;msi_hwirq = pci_msi_domain_calc_hwirq(arg-&gt;msi_dev, desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct msi_domain_ops pci_msi_domain_ops = {</div><div class='add'>+	.get_hwirq	= pci_msi_get_hwirq,</div><div class='add'>+	.msi_prepare	= pci_msi_prepare,</div><div class='add'>+	.set_desc	= pci_msi_set_desc,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	msg.data &amp;= ~MSI_DATA_VECTOR_MASK;</div><div class='del'>-	msg.data |= MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='del'>-	msg.address_lo &amp;= ~MSI_ADDR_DEST_ID_MASK;</div><div class='del'>-	msg.address_lo |= MSI_ADDR_DEST_ID(dest);</div><div class='add'>+static struct msi_domain_info pci_msi_domain_info = {</div><div class='add'>+	.flags		= MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |</div><div class='add'>+			  MSI_FLAG_PCI_MSIX,</div><div class='add'>+	.ops		= &amp;pci_msi_domain_ops,</div><div class='add'>+	.chip		= &amp;pci_msi_controller,</div><div class='add'>+	.handler	= handle_edge_irq,</div><div class='add'>+	.handler_name	= "edge",</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	__pci_write_msi_msg(data-&gt;msi_desc, &amp;msg);</div><div class='add'>+void arch_init_msi_domain(struct irq_domain *parent)</div><div class='add'>+{</div><div class='add'>+	if (disable_apic)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return IRQ_SET_MASK_OK_NOCOPY;</div><div class='add'>+	msi_default_domain = pci_msi_create_irq_domain(NULL,</div><div class='add'>+					&amp;pci_msi_domain_info, parent);</div><div class='add'>+	if (!msi_default_domain)</div><div class='add'>+		pr_warn("failed to initialize irqdomain for MSI/MSI-x.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,</div><div class='del'>- * which implement the MSI or MSI-X Capability Structure.</div><div class='del'>- */</div><div class='del'>-static struct irq_chip msi_chip = {</div><div class='del'>-	.name			= "PCI-MSI",</div><div class='add'>+#ifdef CONFIG_IRQ_REMAP</div><div class='add'>+static struct irq_chip pci_msi_ir_controller = {</div><div class='add'>+	.name			= "IR-PCI-MSI",</div><div class='ctx'> 	.irq_unmask		= pci_msi_unmask_irq,</div><div class='ctx'> 	.irq_mask		= pci_msi_mask_irq,</div><div class='del'>-	.irq_ack		= apic_ack_edge,</div><div class='del'>-	.irq_set_affinity	= msi_set_affinity,</div><div class='del'>-	.irq_retrigger		= apic_retrigger_irq,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='add'>+	.irq_retrigger		= irq_chip_retrigger_hierarchy,</div><div class='add'>+	.irq_set_vcpu_affinity	= irq_chip_set_vcpu_affinity_parent,</div><div class='ctx'> 	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,</div><div class='del'>-		  unsigned int irq_base, unsigned int irq_offset)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip *chip = &amp;msi_chip;</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	unsigned int irq = irq_base + irq_offset;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = msi_compose_msg(dev, irq, &amp;msg, -1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	irq_set_msi_desc_off(irq_base, irq_offset, msidesc);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * MSI-X message is written per-IRQ, the offset is always 0.</div><div class='del'>-	 * MSI message denotes a contiguous group of IRQs, written for 0th IRQ.</div><div class='del'>-	 */</div><div class='del'>-	if (!irq_offset)</div><div class='del'>-		pci_write_msi_msg(irq, &amp;msg);</div><div class='add'>+static struct msi_domain_info pci_msi_ir_domain_info = {</div><div class='add'>+	.flags		= MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |</div><div class='add'>+			  MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,</div><div class='add'>+	.ops		= &amp;pci_msi_domain_ops,</div><div class='add'>+	.chip		= &amp;pci_msi_ir_controller,</div><div class='add'>+	.handler	= handle_edge_irq,</div><div class='add'>+	.handler_name	= "edge",</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	setup_remapped_irq(irq, irq_cfg(irq), chip);</div><div class='add'>+struct irq_domain *arch_create_msi_irq_domain(struct irq_domain *parent)</div><div class='add'>+{</div><div class='add'>+	return pci_msi_create_irq_domain(NULL, &amp;pci_msi_ir_domain_info, parent);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge");</div><div class='add'>+#ifdef CONFIG_DMAR_TABLE</div><div class='add'>+static void dmar_msi_write_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='add'>+{</div><div class='add'>+	dmar_msi_write(data-&gt;irq, msg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;dev-&gt;dev, "irq %d for MSI/MSI-X\n", irq);</div><div class='add'>+static struct irq_chip dmar_msi_controller = {</div><div class='add'>+	.name			= "DMAR-MSI",</div><div class='add'>+	.irq_unmask		= dmar_msi_unmask,</div><div class='add'>+	.irq_mask		= dmar_msi_mask,</div><div class='add'>+	.irq_ack		= irq_chip_ack_parent,</div><div class='add'>+	.irq_set_affinity	= msi_domain_set_affinity,</div><div class='add'>+	.irq_retrigger		= irq_chip_retrigger_hierarchy,</div><div class='add'>+	.irq_compose_msi_msg	= irq_msi_compose_msg,</div><div class='add'>+	.irq_write_msi_msg	= dmar_msi_write_msg,</div><div class='add'>+	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,</div><div class='add'>+					  msi_alloc_info_t *arg)</div><div class='add'>+{</div><div class='add'>+	return arg-&gt;dmar_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='add'>+static int dmar_msi_init(struct irq_domain *domain,</div><div class='add'>+			 struct msi_domain_info *info, unsigned int virq,</div><div class='add'>+			 irq_hw_number_t hwirq, msi_alloc_info_t *arg)</div><div class='ctx'> {</div><div class='del'>-	struct msi_desc *msidesc;</div><div class='del'>-	unsigned int irq;</div><div class='del'>-	int node, ret;</div><div class='add'>+	irq_domain_set_info(domain, virq, arg-&gt;dmar_id, info-&gt;chip, NULL,</div><div class='add'>+			    handle_edge_irq, arg-&gt;dmar_data, "edge");</div><div class='ctx'> </div><div class='del'>-	/* Multiple MSI vectors only supported with interrupt remapping */</div><div class='del'>-	if (type == PCI_CAP_ID_MSI &amp;&amp; nvec &gt; 1)</div><div class='del'>-		return 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	node = dev_to_node(&amp;dev-&gt;dev);</div><div class='add'>+static struct msi_domain_ops dmar_msi_domain_ops = {</div><div class='add'>+	.get_hwirq	= dmar_msi_get_hwirq,</div><div class='add'>+	.msi_init	= dmar_msi_init,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(msidesc, &amp;dev-&gt;msi_list, list) {</div><div class='del'>-		irq = irq_alloc_hwirq(node);</div><div class='del'>-		if (!irq)</div><div class='del'>-			return -ENOSPC;</div><div class='add'>+static struct msi_domain_info dmar_msi_domain_info = {</div><div class='add'>+	.ops		= &amp;dmar_msi_domain_ops,</div><div class='add'>+	.chip		= &amp;dmar_msi_controller,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		ret = setup_msi_irq(dev, msidesc, irq, 0);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			irq_free_hwirq(irq);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='add'>+static struct irq_domain *dmar_get_irq_domain(void)</div><div class='add'>+{</div><div class='add'>+	static struct irq_domain *dmar_domain;</div><div class='add'>+	static DEFINE_MUTEX(dmar_lock);</div><div class='ctx'> </div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	mutex_lock(&amp;dmar_lock);</div><div class='add'>+	if (dmar_domain == NULL)</div><div class='add'>+		dmar_domain = msi_create_irq_domain(NULL, &amp;dmar_msi_domain_info,</div><div class='add'>+						    x86_vector_domain);</div><div class='add'>+	mutex_unlock(&amp;dmar_lock);</div><div class='ctx'> </div><div class='del'>-void native_teardown_msi_irq(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	irq_free_hwirq(irq);</div><div class='add'>+	return dmar_domain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DMAR_TABLE</div><div class='del'>-static int</div><div class='del'>-dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-		      bool force)</div><div class='add'>+int dmar_alloc_hwirq(int id, int node, void *arg)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	unsigned int dest, irq = data-&gt;irq;</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = apic_set_affinity(data, mask, &amp;dest);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	struct irq_domain *domain = dmar_get_irq_domain();</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> </div><div class='del'>-	dmar_msi_read(irq, &amp;msg);</div><div class='add'>+	if (!domain)</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	msg.data &amp;= ~MSI_DATA_VECTOR_MASK;</div><div class='del'>-	msg.data |= MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='del'>-	msg.address_lo &amp;= ~MSI_ADDR_DEST_ID_MASK;</div><div class='del'>-	msg.address_lo |= MSI_ADDR_DEST_ID(dest);</div><div class='del'>-	msg.address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(dest);</div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_DMAR;</div><div class='add'>+	info.dmar_id = id;</div><div class='add'>+	info.dmar_data = arg;</div><div class='ctx'> </div><div class='del'>-	dmar_msi_write(irq, &amp;msg);</div><div class='del'>-</div><div class='del'>-	return IRQ_SET_MASK_OK_NOCOPY;</div><div class='add'>+	return irq_domain_alloc_irqs(domain, 1, node, &amp;info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip dmar_msi_type = {</div><div class='del'>-	.name			= "DMAR_MSI",</div><div class='del'>-	.irq_unmask		= dmar_msi_unmask,</div><div class='del'>-	.irq_mask		= dmar_msi_mask,</div><div class='del'>-	.irq_ack		= apic_ack_edge,</div><div class='del'>-	.irq_set_affinity	= dmar_msi_set_affinity,</div><div class='del'>-	.irq_retrigger		= apic_retrigger_irq,</div><div class='del'>-	.flags			= IRQCHIP_SKIP_SET_WAKE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int arch_setup_dmar_msi(unsigned int irq)</div><div class='add'>+void dmar_free_hwirq(int irq)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-</div><div class='del'>-	ret = msi_compose_msg(NULL, irq, &amp;msg, -1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	dmar_msi_write(irq, &amp;msg);</div><div class='del'>-	irq_set_chip_and_handler_name(irq, &amp;dmar_msi_type, handle_edge_irq,</div><div class='del'>-				      "edge");</div><div class='del'>-	return 0;</div><div class='add'>+	irq_domain_free_irqs(irq, 1);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -231,56 +255,103 @@ int arch_setup_dmar_msi(unsigned int irq)</div><div class='ctx'>  * MSI message composition</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_HPET_TIMER</div><div class='add'>+static inline int hpet_dev_id(struct irq_domain *domain)</div><div class='add'>+{</div><div class='add'>+	struct msi_domain_info *info = msi_get_domain_info(domain);</div><div class='add'>+</div><div class='add'>+	return (int)(long)info-&gt;data;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static int hpet_msi_set_affinity(struct irq_data *data,</div><div class='del'>-				 const struct cpumask *mask, bool force)</div><div class='add'>+static void hpet_msi_write_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	unsigned int dest;</div><div class='del'>-	int ret;</div><div class='add'>+	hpet_msi_write(data-&gt;handler_data, msg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ret = apic_set_affinity(data, mask, &amp;dest);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+static struct irq_chip hpet_msi_controller = {</div><div class='add'>+	.name = "HPET-MSI",</div><div class='add'>+	.irq_unmask = hpet_msi_unmask,</div><div class='add'>+	.irq_mask = hpet_msi_mask,</div><div class='add'>+	.irq_ack = irq_chip_ack_parent,</div><div class='add'>+	.irq_set_affinity = msi_domain_set_affinity,</div><div class='add'>+	.irq_retrigger = irq_chip_retrigger_hierarchy,</div><div class='add'>+	.irq_compose_msi_msg = irq_msi_compose_msg,</div><div class='add'>+	.irq_write_msi_msg = hpet_msi_write_msg,</div><div class='add'>+	.flags = IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	hpet_msi_read(data-&gt;handler_data, &amp;msg);</div><div class='add'>+static irq_hw_number_t hpet_msi_get_hwirq(struct msi_domain_info *info,</div><div class='add'>+					  msi_alloc_info_t *arg)</div><div class='add'>+{</div><div class='add'>+	return arg-&gt;hpet_index;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	msg.data &amp;= ~MSI_DATA_VECTOR_MASK;</div><div class='del'>-	msg.data |= MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='del'>-	msg.address_lo &amp;= ~MSI_ADDR_DEST_ID_MASK;</div><div class='del'>-	msg.address_lo |= MSI_ADDR_DEST_ID(dest);</div><div class='add'>+static int hpet_msi_init(struct irq_domain *domain,</div><div class='add'>+			 struct msi_domain_info *info, unsigned int virq,</div><div class='add'>+			 irq_hw_number_t hwirq, msi_alloc_info_t *arg)</div><div class='add'>+{</div><div class='add'>+	irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='add'>+	irq_domain_set_info(domain, virq, arg-&gt;hpet_index, info-&gt;chip, NULL,</div><div class='add'>+			    handle_edge_irq, arg-&gt;hpet_data, "edge");</div><div class='ctx'> </div><div class='del'>-	hpet_msi_write(data-&gt;handler_data, &amp;msg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return IRQ_SET_MASK_OK_NOCOPY;</div><div class='add'>+static void hpet_msi_free(struct irq_domain *domain,</div><div class='add'>+			  struct msi_domain_info *info, unsigned int virq)</div><div class='add'>+{</div><div class='add'>+	irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip hpet_msi_type = {</div><div class='del'>-	.name = "HPET_MSI",</div><div class='del'>-	.irq_unmask = hpet_msi_unmask,</div><div class='del'>-	.irq_mask = hpet_msi_mask,</div><div class='del'>-	.irq_ack = apic_ack_edge,</div><div class='del'>-	.irq_set_affinity = hpet_msi_set_affinity,</div><div class='del'>-	.irq_retrigger = apic_retrigger_irq,</div><div class='del'>-	.flags = IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+static struct msi_domain_ops hpet_msi_domain_ops = {</div><div class='add'>+	.get_hwirq	= hpet_msi_get_hwirq,</div><div class='add'>+	.msi_init	= hpet_msi_init,</div><div class='add'>+	.msi_free	= hpet_msi_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct msi_domain_info hpet_msi_domain_info = {</div><div class='add'>+	.ops		= &amp;hpet_msi_domain_ops,</div><div class='add'>+	.chip		= &amp;hpet_msi_controller,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int default_setup_hpet_msi(unsigned int irq, unsigned int id)</div><div class='add'>+struct irq_domain *hpet_create_irq_domain(int hpet_id)</div><div class='ctx'> {</div><div class='del'>-	struct irq_chip *chip = &amp;hpet_msi_type;</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	int ret;</div><div class='add'>+	struct irq_domain *parent;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='add'>+	struct msi_domain_info *domain_info;</div><div class='add'>+</div><div class='add'>+	if (x86_vector_domain == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	domain_info = kzalloc(sizeof(*domain_info), GFP_KERNEL);</div><div class='add'>+	if (!domain_info)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*domain_info = hpet_msi_domain_info;</div><div class='add'>+	domain_info-&gt;data = (void *)(long)hpet_id;</div><div class='add'>+</div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_HPET;</div><div class='add'>+	info.hpet_id = hpet_id;</div><div class='add'>+	parent = irq_remapping_get_ir_irq_domain(&amp;info);</div><div class='add'>+	if (parent == NULL)</div><div class='add'>+		parent = x86_vector_domain;</div><div class='add'>+	else</div><div class='add'>+		hpet_msi_controller.name = "IR-HPET-MSI";</div><div class='add'>+</div><div class='add'>+	return msi_create_irq_domain(NULL, domain_info, parent);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ret = msi_compose_msg(NULL, irq, &amp;msg, id);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+int hpet_assign_irq(struct irq_domain *domain, struct hpet_dev *dev,</div><div class='add'>+		    int dev_num)</div><div class='add'>+{</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> </div><div class='del'>-	hpet_msi_write(irq_get_handler_data(irq), &amp;msg);</div><div class='del'>-	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);</div><div class='del'>-	setup_remapped_irq(irq, irq_cfg(irq), chip);</div><div class='add'>+	init_irq_alloc_info(&amp;info, NULL);</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_HPET;</div><div class='add'>+	info.hpet_data = dev;</div><div class='add'>+	info.hpet_id = hpet_dev_id(domain);</div><div class='add'>+	info.hpet_index = dev_num;</div><div class='ctx'> </div><div class='del'>-	irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge");</div><div class='del'>-	return 0;</div><div class='add'>+	return irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, &amp;info);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c<br/>index 6cedd7914581..f813261d9740 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/vector.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apic/vector.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/vector.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/vector.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo</div><div class='ctx'>  *	Moved from arch/x86/kernel/apic/io_apic.c.</div><div class='add'>+ * Jiang Liu &lt;jiang.liu@linux.intel.com&gt;</div><div class='add'>+ *	Enable support of hierarchical irqdomains</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -11,15 +13,28 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> </div><div class='add'>+struct apic_chip_data {</div><div class='add'>+	struct irq_cfg		cfg;</div><div class='add'>+	cpumask_var_t		domain;</div><div class='add'>+	cpumask_var_t		old_domain;</div><div class='add'>+	u8			move_in_progress : 1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct irq_domain *x86_vector_domain;</div><div class='ctx'> static DEFINE_RAW_SPINLOCK(vector_lock);</div><div class='add'>+static cpumask_var_t vector_cpumask;</div><div class='add'>+static struct irq_chip lapic_controller;</div><div class='add'>+#ifdef	CONFIG_X86_IO_APIC</div><div class='add'>+static struct apic_chip_data *legacy_irq_data[NR_IRQS_LEGACY];</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void lock_vector_lock(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -34,71 +49,59 @@ void unlock_vector_lock(void)</div><div class='ctx'> 	raw_spin_unlock(&amp;vector_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct irq_cfg *irq_cfg(unsigned int irq)</div><div class='add'>+static struct apic_chip_data *apic_chip_data(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	return irq_get_chip_data(irq);</div><div class='add'>+	if (!irq_data)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	while (irq_data-&gt;parent_data)</div><div class='add'>+		irq_data = irq_data-&gt;parent_data;</div><div class='add'>+</div><div class='add'>+	return irq_data-&gt;chip_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct irq_cfg *irqd_cfg(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	return irq_data-&gt;chip_data;</div><div class='add'>+	struct apic_chip_data *data = apic_chip_data(irq_data);</div><div class='add'>+</div><div class='add'>+	return data ? &amp;data-&gt;cfg : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_cfg *alloc_irq_cfg(unsigned int irq, int node)</div><div class='add'>+struct irq_cfg *irq_cfg(unsigned int irq)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='add'>+	return irqd_cfg(irq_get_irq_data(irq));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	cfg = kzalloc_node(sizeof(*cfg), GFP_KERNEL, node);</div><div class='del'>-	if (!cfg)</div><div class='add'>+static struct apic_chip_data *alloc_apic_chip_data(int node)</div><div class='add'>+{</div><div class='add'>+	struct apic_chip_data *data;</div><div class='add'>+</div><div class='add'>+	data = kzalloc_node(sizeof(*data), GFP_KERNEL, node);</div><div class='add'>+	if (!data)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	if (!zalloc_cpumask_var_node(&amp;cfg-&gt;domain, GFP_KERNEL, node))</div><div class='del'>-		goto out_cfg;</div><div class='del'>-	if (!zalloc_cpumask_var_node(&amp;cfg-&gt;old_domain, GFP_KERNEL, node))</div><div class='add'>+	if (!zalloc_cpumask_var_node(&amp;data-&gt;domain, GFP_KERNEL, node))</div><div class='add'>+		goto out_data;</div><div class='add'>+	if (!zalloc_cpumask_var_node(&amp;data-&gt;old_domain, GFP_KERNEL, node))</div><div class='ctx'> 		goto out_domain;</div><div class='del'>-#ifdef	CONFIG_X86_IO_APIC</div><div class='del'>-	INIT_LIST_HEAD(&amp;cfg-&gt;irq_2_pin);</div><div class='del'>-#endif</div><div class='del'>-	return cfg;</div><div class='add'>+	return data;</div><div class='ctx'> out_domain:</div><div class='del'>-	free_cpumask_var(cfg-&gt;domain);</div><div class='del'>-out_cfg:</div><div class='del'>-	kfree(cfg);</div><div class='add'>+	free_cpumask_var(data-&gt;domain);</div><div class='add'>+out_data:</div><div class='add'>+	kfree(data);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node)</div><div class='add'>+static void free_apic_chip_data(struct apic_chip_data *data)</div><div class='ctx'> {</div><div class='del'>-	int res = irq_alloc_desc_at(at, node);</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='del'>-</div><div class='del'>-	if (res &lt; 0) {</div><div class='del'>-		if (res != -EEXIST)</div><div class='del'>-			return NULL;</div><div class='del'>-		cfg = irq_cfg(at);</div><div class='del'>-		if (cfg)</div><div class='del'>-			return cfg;</div><div class='add'>+	if (data) {</div><div class='add'>+		free_cpumask_var(data-&gt;domain);</div><div class='add'>+		free_cpumask_var(data-&gt;old_domain);</div><div class='add'>+		kfree(data);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	cfg = alloc_irq_cfg(at, node);</div><div class='del'>-	if (cfg)</div><div class='del'>-		irq_set_chip_data(at, cfg);</div><div class='del'>-	else</div><div class='del'>-		irq_free_desc(at);</div><div class='del'>-	return cfg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void free_irq_cfg(unsigned int at, struct irq_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	if (!cfg)</div><div class='del'>-		return;</div><div class='del'>-	irq_set_chip_data(at, NULL);</div><div class='del'>-	free_cpumask_var(cfg-&gt;domain);</div><div class='del'>-	free_cpumask_var(cfg-&gt;old_domain);</div><div class='del'>-	kfree(cfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-__assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)</div><div class='add'>+static int __assign_irq_vector(int irq, struct apic_chip_data *d,</div><div class='add'>+			       const struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * NOTE! The local APIC isn't very good at handling</div><div class='hunk'>@@ -114,36 +117,33 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)</div><div class='ctx'> 	static int current_vector = FIRST_EXTERNAL_VECTOR + VECTOR_OFFSET_START;</div><div class='ctx'> 	static int current_offset = VECTOR_OFFSET_START % 16;</div><div class='ctx'> 	int cpu, err;</div><div class='del'>-	cpumask_var_t tmp_mask;</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;move_in_progress)</div><div class='add'>+	if (d-&gt;move_in_progress)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	if (!alloc_cpumask_var(&amp;tmp_mask, GFP_ATOMIC))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* Only try and allocate irqs on cpus that are present */</div><div class='ctx'> 	err = -ENOSPC;</div><div class='del'>-	cpumask_clear(cfg-&gt;old_domain);</div><div class='add'>+	cpumask_clear(d-&gt;old_domain);</div><div class='ctx'> 	cpu = cpumask_first_and(mask, cpu_online_mask);</div><div class='ctx'> 	while (cpu &lt; nr_cpu_ids) {</div><div class='ctx'> 		int new_cpu, vector, offset;</div><div class='ctx'> </div><div class='del'>-		apic-&gt;vector_allocation_domain(cpu, tmp_mask, mask);</div><div class='add'>+		apic-&gt;vector_allocation_domain(cpu, vector_cpumask, mask);</div><div class='ctx'> </div><div class='del'>-		if (cpumask_subset(tmp_mask, cfg-&gt;domain)) {</div><div class='add'>+		if (cpumask_subset(vector_cpumask, d-&gt;domain)) {</div><div class='ctx'> 			err = 0;</div><div class='del'>-			if (cpumask_equal(tmp_mask, cfg-&gt;domain))</div><div class='add'>+			if (cpumask_equal(vector_cpumask, d-&gt;domain))</div><div class='ctx'> 				break;</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * New cpumask using the vector is a proper subset of</div><div class='ctx'> 			 * the current in use mask. So cleanup the vector</div><div class='ctx'> 			 * allocation for the members that are not used anymore.</div><div class='ctx'> 			 */</div><div class='del'>-			cpumask_andnot(cfg-&gt;old_domain, cfg-&gt;domain, tmp_mask);</div><div class='del'>-			cfg-&gt;move_in_progress =</div><div class='del'>-			   cpumask_intersects(cfg-&gt;old_domain, cpu_online_mask);</div><div class='del'>-			cpumask_and(cfg-&gt;domain, cfg-&gt;domain, tmp_mask);</div><div class='add'>+			cpumask_andnot(d-&gt;old_domain, d-&gt;domain,</div><div class='add'>+				       vector_cpumask);</div><div class='add'>+			d-&gt;move_in_progress =</div><div class='add'>+			   cpumask_intersects(d-&gt;old_domain, cpu_online_mask);</div><div class='add'>+			cpumask_and(d-&gt;domain, d-&gt;domain, vector_cpumask);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -157,16 +157,18 @@ next:</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(current_vector == vector)) {</div><div class='del'>-			cpumask_or(cfg-&gt;old_domain, cfg-&gt;old_domain, tmp_mask);</div><div class='del'>-			cpumask_andnot(tmp_mask, mask, cfg-&gt;old_domain);</div><div class='del'>-			cpu = cpumask_first_and(tmp_mask, cpu_online_mask);</div><div class='add'>+			cpumask_or(d-&gt;old_domain, d-&gt;old_domain,</div><div class='add'>+				   vector_cpumask);</div><div class='add'>+			cpumask_andnot(vector_cpumask, mask, d-&gt;old_domain);</div><div class='add'>+			cpu = cpumask_first_and(vector_cpumask,</div><div class='add'>+						cpu_online_mask);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(vector, used_vectors))</div><div class='ctx'> 			goto next;</div><div class='ctx'> </div><div class='del'>-		for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) {</div><div class='add'>+		for_each_cpu_and(new_cpu, vector_cpumask, cpu_online_mask) {</div><div class='ctx'> 			if (per_cpu(vector_irq, new_cpu)[vector] &gt;</div><div class='ctx'> 			    VECTOR_UNDEFINED)</div><div class='ctx'> 				goto next;</div><div class='hunk'>@@ -174,55 +176,73 @@ next:</div><div class='ctx'> 		/* Found one! */</div><div class='ctx'> 		current_vector = vector;</div><div class='ctx'> 		current_offset = offset;</div><div class='del'>-		if (cfg-&gt;vector) {</div><div class='del'>-			cpumask_copy(cfg-&gt;old_domain, cfg-&gt;domain);</div><div class='del'>-			cfg-&gt;move_in_progress =</div><div class='del'>-			   cpumask_intersects(cfg-&gt;old_domain, cpu_online_mask);</div><div class='add'>+		if (d-&gt;cfg.vector) {</div><div class='add'>+			cpumask_copy(d-&gt;old_domain, d-&gt;domain);</div><div class='add'>+			d-&gt;move_in_progress =</div><div class='add'>+			   cpumask_intersects(d-&gt;old_domain, cpu_online_mask);</div><div class='ctx'> 		}</div><div class='del'>-		for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask)</div><div class='add'>+		for_each_cpu_and(new_cpu, vector_cpumask, cpu_online_mask)</div><div class='ctx'> 			per_cpu(vector_irq, new_cpu)[vector] = irq;</div><div class='del'>-		cfg-&gt;vector = vector;</div><div class='del'>-		cpumask_copy(cfg-&gt;domain, tmp_mask);</div><div class='add'>+		d-&gt;cfg.vector = vector;</div><div class='add'>+		cpumask_copy(d-&gt;domain, vector_cpumask);</div><div class='ctx'> 		err = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	free_cpumask_var(tmp_mask);</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		/* cache destination APIC IDs into cfg-&gt;dest_apicid */</div><div class='add'>+		err = apic-&gt;cpu_mask_to_apicid_and(mask, d-&gt;domain,</div><div class='add'>+						   &amp;d-&gt;cfg.dest_apicid);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)</div><div class='add'>+static int assign_irq_vector(int irq, struct apic_chip_data *data,</div><div class='add'>+			     const struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;vector_lock, flags);</div><div class='del'>-	err = __assign_irq_vector(irq, cfg, mask);</div><div class='add'>+	err = __assign_irq_vector(irq, data, mask);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void clear_irq_vector(int irq, struct irq_cfg *cfg)</div><div class='add'>+static int assign_irq_vector_policy(int irq, int node,</div><div class='add'>+				    struct apic_chip_data *data,</div><div class='add'>+				    struct irq_alloc_info *info)</div><div class='add'>+{</div><div class='add'>+	if (info &amp;&amp; info-&gt;mask)</div><div class='add'>+		return assign_irq_vector(irq, data, info-&gt;mask);</div><div class='add'>+	if (node != NUMA_NO_NODE &amp;&amp;</div><div class='add'>+	    assign_irq_vector(irq, data, cpumask_of_node(node)) == 0)</div><div class='add'>+		return 0;</div><div class='add'>+	return assign_irq_vector(irq, data, apic-&gt;target_cpus());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_irq_vector(int irq, struct apic_chip_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu, vector;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;vector_lock, flags);</div><div class='del'>-	BUG_ON(!cfg-&gt;vector);</div><div class='add'>+	BUG_ON(!data-&gt;cfg.vector);</div><div class='ctx'> </div><div class='del'>-	vector = cfg-&gt;vector;</div><div class='del'>-	for_each_cpu_and(cpu, cfg-&gt;domain, cpu_online_mask)</div><div class='add'>+	vector = data-&gt;cfg.vector;</div><div class='add'>+	for_each_cpu_and(cpu, data-&gt;domain, cpu_online_mask)</div><div class='ctx'> 		per_cpu(vector_irq, cpu)[vector] = VECTOR_UNDEFINED;</div><div class='ctx'> </div><div class='del'>-	cfg-&gt;vector = 0;</div><div class='del'>-	cpumask_clear(cfg-&gt;domain);</div><div class='add'>+	data-&gt;cfg.vector = 0;</div><div class='add'>+	cpumask_clear(data-&gt;domain);</div><div class='ctx'> </div><div class='del'>-	if (likely(!cfg-&gt;move_in_progress)) {</div><div class='add'>+	if (likely(!data-&gt;move_in_progress)) {</div><div class='ctx'> 		raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_cpu_and(cpu, cfg-&gt;old_domain, cpu_online_mask) {</div><div class='add'>+	for_each_cpu_and(cpu, data-&gt;old_domain, cpu_online_mask) {</div><div class='ctx'> 		for (vector = FIRST_EXTERNAL_VECTOR; vector &lt; NR_VECTORS;</div><div class='ctx'> 		     vector++) {</div><div class='ctx'> 			if (per_cpu(vector_irq, cpu)[vector] != irq)</div><div class='hunk'>@@ -231,10 +251,95 @@ void clear_irq_vector(int irq, struct irq_cfg *cfg)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	cfg-&gt;move_in_progress = 0;</div><div class='add'>+	data-&gt;move_in_progress = 0;</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void init_irq_alloc_info(struct irq_alloc_info *info,</div><div class='add'>+			 const struct cpumask *mask)</div><div class='add'>+{</div><div class='add'>+	memset(info, 0, sizeof(*info));</div><div class='add'>+	info-&gt;mask = mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void copy_irq_alloc_info(struct irq_alloc_info *dst, struct irq_alloc_info *src)</div><div class='add'>+{</div><div class='add'>+	if (src)</div><div class='add'>+		*dst = *src;</div><div class='add'>+	else</div><div class='add'>+		memset(dst, 0, sizeof(*dst));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void x86_vector_free_irqs(struct irq_domain *domain,</div><div class='add'>+				 unsigned int virq, unsigned int nr_irqs)</div><div class='add'>+{</div><div class='add'>+	struct irq_data *irq_data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_irqs; i++) {</div><div class='add'>+		irq_data = irq_domain_get_irq_data(x86_vector_domain, virq + i);</div><div class='add'>+		if (irq_data &amp;&amp; irq_data-&gt;chip_data) {</div><div class='add'>+			clear_irq_vector(virq + i, irq_data-&gt;chip_data);</div><div class='add'>+			free_apic_chip_data(irq_data-&gt;chip_data);</div><div class='add'>+#ifdef	CONFIG_X86_IO_APIC</div><div class='add'>+			if (virq + i &lt; nr_legacy_irqs())</div><div class='add'>+				legacy_irq_data[virq + i] = NULL;</div><div class='add'>+#endif</div><div class='add'>+			irq_domain_reset_irq_data(irq_data);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+				 unsigned int nr_irqs, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct irq_alloc_info *info = arg;</div><div class='add'>+	struct apic_chip_data *data;</div><div class='add'>+	struct irq_data *irq_data;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	if (disable_apic)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	/* Currently vector allocator can't guarantee contiguous allocations */</div><div class='add'>+	if ((info-&gt;flags &amp; X86_IRQ_ALLOC_CONTIGUOUS_VECTORS) &amp;&amp; nr_irqs &gt; 1)</div><div class='add'>+		return -ENOSYS;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_irqs; i++) {</div><div class='add'>+		irq_data = irq_domain_get_irq_data(domain, virq + i);</div><div class='add'>+		BUG_ON(!irq_data);</div><div class='add'>+#ifdef	CONFIG_X86_IO_APIC</div><div class='add'>+		if (virq + i &lt; nr_legacy_irqs() &amp;&amp; legacy_irq_data[virq + i])</div><div class='add'>+			data = legacy_irq_data[virq + i];</div><div class='add'>+		else</div><div class='add'>+#endif</div><div class='add'>+			data = alloc_apic_chip_data(irq_data-&gt;node);</div><div class='add'>+		if (!data) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_data-&gt;chip = &amp;lapic_controller;</div><div class='add'>+		irq_data-&gt;chip_data = data;</div><div class='add'>+		irq_data-&gt;hwirq = virq + i;</div><div class='add'>+		err = assign_irq_vector_policy(virq, irq_data-&gt;node, data,</div><div class='add'>+					       info);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	x86_vector_free_irqs(domain, virq, i + 1);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops x86_vector_domain_ops = {</div><div class='add'>+	.alloc	= x86_vector_alloc_irqs,</div><div class='add'>+	.free	= x86_vector_free_irqs,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int __init arch_probe_nr_irqs(void)</div><div class='ctx'> {</div><div class='ctx'> 	int nr;</div><div class='hunk'>@@ -258,8 +363,43 @@ int __init arch_probe_nr_irqs(void)</div><div class='ctx'> 	return nr_legacy_irqs();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef	CONFIG_X86_IO_APIC</div><div class='add'>+static void init_legacy_irqs(void)</div><div class='add'>+{</div><div class='add'>+	int i, node = cpu_to_node(0);</div><div class='add'>+	struct apic_chip_data *data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For legacy IRQ's, start with assigning irq0 to irq15 to</div><div class='add'>+	 * ISA_IRQ_VECTOR(i) for all cpu's.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; nr_legacy_irqs(); i++) {</div><div class='add'>+		data = legacy_irq_data[i] = alloc_apic_chip_data(node);</div><div class='add'>+		BUG_ON(!data);</div><div class='add'>+</div><div class='add'>+		data-&gt;cfg.vector = ISA_IRQ_VECTOR(i);</div><div class='add'>+		cpumask_setall(data-&gt;domain);</div><div class='add'>+		irq_set_chip_data(i, data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void init_legacy_irqs(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> int __init arch_early_irq_init(void)</div><div class='ctx'> {</div><div class='add'>+	init_legacy_irqs();</div><div class='add'>+</div><div class='add'>+	x86_vector_domain = irq_domain_add_tree(NULL, &amp;x86_vector_domain_ops,</div><div class='add'>+						NULL);</div><div class='add'>+	BUG_ON(x86_vector_domain == NULL);</div><div class='add'>+	irq_set_default_host(x86_vector_domain);</div><div class='add'>+</div><div class='add'>+	arch_init_msi_domain(x86_vector_domain);</div><div class='add'>+	arch_init_htirq_domain(x86_vector_domain);</div><div class='add'>+</div><div class='add'>+	BUG_ON(!alloc_cpumask_var(&amp;vector_cpumask, GFP_KERNEL));</div><div class='add'>+</div><div class='ctx'> 	return arch_early_ioapic_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -267,23 +407,17 @@ static void __setup_vector_irq(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize vector_irq on a new cpu */</div><div class='ctx'> 	int irq, vector;</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='add'>+	struct apic_chip_data *data;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * vector_lock will make sure that we don't run into irq vector</div><div class='del'>-	 * assignments that might be happening on another cpu in parallel,</div><div class='del'>-	 * while we setup our initial vector to irq mappings.</div><div class='del'>-	 */</div><div class='del'>-	raw_spin_lock(&amp;vector_lock);</div><div class='ctx'> 	/* Mark the inuse vectors */</div><div class='ctx'> 	for_each_active_irq(irq) {</div><div class='del'>-		cfg = irq_cfg(irq);</div><div class='del'>-		if (!cfg)</div><div class='add'>+		data = apic_chip_data(irq_get_irq_data(irq));</div><div class='add'>+		if (!data)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!cpumask_test_cpu(cpu, cfg-&gt;domain))</div><div class='add'>+		if (!cpumask_test_cpu(cpu, data-&gt;domain))</div><div class='ctx'> 			continue;</div><div class='del'>-		vector = cfg-&gt;vector;</div><div class='add'>+		vector = data-&gt;cfg.vector;</div><div class='ctx'> 		per_cpu(vector_irq, cpu)[vector] = irq;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Mark the free vectors */</div><div class='hunk'>@@ -292,20 +426,20 @@ static void __setup_vector_irq(int cpu)</div><div class='ctx'> 		if (irq &lt;= VECTOR_UNDEFINED)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		cfg = irq_cfg(irq);</div><div class='del'>-		if (!cpumask_test_cpu(cpu, cfg-&gt;domain))</div><div class='add'>+		data = apic_chip_data(irq_get_irq_data(irq));</div><div class='add'>+		if (!cpumask_test_cpu(cpu, data-&gt;domain))</div><div class='ctx'> 			per_cpu(vector_irq, cpu)[vector] = VECTOR_UNDEFINED;</div><div class='ctx'> 	}</div><div class='del'>-	raw_spin_unlock(&amp;vector_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Setup the vector to irq mappings.</div><div class='add'>+ * Setup the vector to irq mappings. Must be called with vector_lock held.</div><div class='ctx'>  */</div><div class='ctx'> void setup_vector_irq(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int irq;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;vector_lock);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On most of the platforms, legacy PIC delivers the interrupts on the</div><div class='ctx'> 	 * boot cpu. But there are certain platforms where PIC interrupts are</div><div class='hunk'>@@ -314,20 +448,20 @@ void setup_vector_irq(int cpu)</div><div class='ctx'> 	 * legacy vector to irq mapping:</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (irq = 0; irq &lt; nr_legacy_irqs(); irq++)</div><div class='del'>-		per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;</div><div class='add'>+		per_cpu(vector_irq, cpu)[ISA_IRQ_VECTOR(irq)] = irq;</div><div class='ctx'> </div><div class='ctx'> 	__setup_vector_irq(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int apic_retrigger_irq(struct irq_data *data)</div><div class='add'>+static int apic_retrigger_irq(struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='add'>+	struct apic_chip_data *data = apic_chip_data(irq_data);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;vector_lock, flags);</div><div class='del'>-	cpu = cpumask_first_and(cfg-&gt;domain, cpu_online_mask);</div><div class='del'>-	apic-&gt;send_IPI_mask(cpumask_of(cpu), cfg-&gt;vector);</div><div class='add'>+	cpu = cpumask_first_and(data-&gt;domain, cpu_online_mask);</div><div class='add'>+	apic-&gt;send_IPI_mask(cpumask_of(cpu), data-&gt;cfg.vector);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -340,73 +474,76 @@ void apic_ack_edge(struct irq_data *data)</div><div class='ctx'> 	ack_APIC_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Either sets data-&gt;affinity to a valid value, and returns</div><div class='del'>- * -&gt;cpu_mask_to_apicid of that in dest_id, or returns -1 and</div><div class='del'>- * leaves data-&gt;affinity untouched.</div><div class='del'>- */</div><div class='del'>-int apic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-		      unsigned int *dest_id)</div><div class='add'>+static int apic_set_affinity(struct irq_data *irq_data,</div><div class='add'>+			     const struct cpumask *dest, bool force)</div><div class='ctx'> {</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	unsigned int irq = data-&gt;irq;</div><div class='del'>-	int err;</div><div class='add'>+	struct apic_chip_data *data = irq_data-&gt;chip_data;</div><div class='add'>+	int err, irq = irq_data-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	if (!config_enabled(CONFIG_SMP))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	if (!cpumask_intersects(mask, cpu_online_mask))</div><div class='add'>+	if (!cpumask_intersects(dest, cpu_online_mask))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	err = assign_irq_vector(irq, cfg, mask);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = apic-&gt;cpu_mask_to_apicid_and(mask, cfg-&gt;domain, dest_id);</div><div class='add'>+	err = assign_irq_vector(irq, data, dest);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		if (assign_irq_vector(irq, cfg, data-&gt;affinity))</div><div class='add'>+		struct irq_data *top = irq_get_irq_data(irq);</div><div class='add'>+</div><div class='add'>+		if (assign_irq_vector(irq, data, top-&gt;affinity))</div><div class='ctx'> 			pr_err("Failed to recover vector for irq %d\n", irq);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cpumask_copy(data-&gt;affinity, mask);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return IRQ_SET_MASK_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct irq_chip lapic_controller = {</div><div class='add'>+	.irq_ack		= apic_ack_edge,</div><div class='add'>+	.irq_set_affinity	= apic_set_affinity,</div><div class='add'>+	.irq_retrigger		= apic_retrigger_irq,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-void send_cleanup_vector(struct irq_cfg *cfg)</div><div class='add'>+static void __send_cleanup_vector(struct apic_chip_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	cpumask_var_t cleanup_mask;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!alloc_cpumask_var(&amp;cleanup_mask, GFP_ATOMIC))) {</div><div class='ctx'> 		unsigned int i;</div><div class='ctx'> </div><div class='del'>-		for_each_cpu_and(i, cfg-&gt;old_domain, cpu_online_mask)</div><div class='add'>+		for_each_cpu_and(i, data-&gt;old_domain, cpu_online_mask)</div><div class='ctx'> 			apic-&gt;send_IPI_mask(cpumask_of(i),</div><div class='ctx'> 					    IRQ_MOVE_CLEANUP_VECTOR);</div><div class='ctx'> 	} else {</div><div class='del'>-		cpumask_and(cleanup_mask, cfg-&gt;old_domain, cpu_online_mask);</div><div class='add'>+		cpumask_and(cleanup_mask, data-&gt;old_domain, cpu_online_mask);</div><div class='ctx'> 		apic-&gt;send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);</div><div class='ctx'> 		free_cpumask_var(cleanup_mask);</div><div class='ctx'> 	}</div><div class='del'>-	cfg-&gt;move_in_progress = 0;</div><div class='add'>+	data-&gt;move_in_progress = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void send_cleanup_vector(struct irq_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct apic_chip_data *data;</div><div class='add'>+</div><div class='add'>+	data = container_of(cfg, struct apic_chip_data, cfg);</div><div class='add'>+	if (data-&gt;move_in_progress)</div><div class='add'>+		__send_cleanup_vector(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned vector, me;</div><div class='ctx'> </div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-	irq_enter();</div><div class='del'>-	exit_idle();</div><div class='add'>+	entering_ack_irq();</div><div class='ctx'> </div><div class='ctx'> 	me = smp_processor_id();</div><div class='ctx'> 	for (vector = FIRST_EXTERNAL_VECTOR; vector &lt; NR_VECTORS; vector++) {</div><div class='ctx'> 		int irq;</div><div class='ctx'> 		unsigned int irr;</div><div class='ctx'> 		struct irq_desc *desc;</div><div class='del'>-		struct irq_cfg *cfg;</div><div class='add'>+		struct apic_chip_data *data;</div><div class='ctx'> </div><div class='ctx'> 		irq = __this_cpu_read(vector_irq[vector]);</div><div class='ctx'> </div><div class='hunk'>@@ -417,8 +554,8 @@ asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)</div><div class='ctx'> 		if (!desc)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		cfg = irq_cfg(irq);</div><div class='del'>-		if (!cfg)</div><div class='add'>+		data = apic_chip_data(&amp;desc-&gt;irq_data);</div><div class='add'>+		if (!data)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock(&amp;desc-&gt;lock);</div><div class='hunk'>@@ -427,10 +564,11 @@ asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)</div><div class='ctx'> 		 * Check if the irq migration is in progress. If so, we</div><div class='ctx'> 		 * haven't received the cleanup request yet for this irq.</div><div class='ctx'> 		 */</div><div class='del'>-		if (cfg-&gt;move_in_progress)</div><div class='add'>+		if (data-&gt;move_in_progress)</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> </div><div class='del'>-		if (vector == cfg-&gt;vector &amp;&amp; cpumask_test_cpu(me, cfg-&gt;domain))</div><div class='add'>+		if (vector == data-&gt;cfg.vector &amp;&amp;</div><div class='add'>+		    cpumask_test_cpu(me, data-&gt;domain))</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> </div><div class='ctx'> 		irr = apic_read(APIC_IRR + (vector / 32 * 0x10));</div><div class='hunk'>@@ -450,20 +588,21 @@ unlock:</div><div class='ctx'> 		raw_spin_unlock(&amp;desc-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_exit();</div><div class='add'>+	exiting_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned me;</div><div class='add'>+	struct apic_chip_data *data;</div><div class='ctx'> </div><div class='del'>-	if (likely(!cfg-&gt;move_in_progress))</div><div class='add'>+	data = container_of(cfg, struct apic_chip_data, cfg);</div><div class='add'>+	if (likely(!data-&gt;move_in_progress))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	me = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	if (vector == cfg-&gt;vector &amp;&amp; cpumask_test_cpu(me, cfg-&gt;domain))</div><div class='del'>-		send_cleanup_vector(cfg);</div><div class='add'>+	if (vector == data-&gt;cfg.vector &amp;&amp; cpumask_test_cpu(me, data-&gt;domain))</div><div class='add'>+		__send_cleanup_vector(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void irq_complete_move(struct irq_cfg *cfg)</div><div class='hunk'>@@ -475,46 +614,11 @@ void irq_force_complete_move(int irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_cfg *cfg = irq_cfg(irq);</div><div class='ctx'> </div><div class='del'>-	if (!cfg)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	__irq_complete_move(cfg, cfg-&gt;vector);</div><div class='add'>+	if (cfg)</div><div class='add'>+		__irq_complete_move(cfg, cfg-&gt;vector);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Dynamic irq allocate and deallocation. Should be replaced by irq domains!</div><div class='del'>- */</div><div class='del'>-int arch_setup_hwirq(unsigned int irq, int node)</div><div class='del'>-{</div><div class='del'>-	struct irq_cfg *cfg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	cfg = alloc_irq_cfg(irq, node);</div><div class='del'>-	if (!cfg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;vector_lock, flags);</div><div class='del'>-	ret = __assign_irq_vector(irq, cfg, apic-&gt;target_cpus());</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (!ret)</div><div class='del'>-		irq_set_chip_data(irq, cfg);</div><div class='del'>-	else</div><div class='del'>-		free_irq_cfg(irq, cfg);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void arch_teardown_hwirq(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	struct irq_cfg *cfg = irq_cfg(irq);</div><div class='del'>-</div><div class='del'>-	free_remapped_irq(irq);</div><div class='del'>-	clear_irq_vector(irq, cfg);</div><div class='del'>-	free_irq_cfg(irq, cfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init print_APIC_field(int base)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c<br/>index 6fae733e9194..3ffd925655e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_phys.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/apic/x2apic_phys.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_phys.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/apic/x2apic_phys.c</a></div><div class='hunk'>@@ -21,11 +21,13 @@ early_param("x2apic_phys", set_x2apic_phys_mode);</div><div class='ctx'> </div><div class='ctx'> static bool x2apic_fadt_phys(void)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='ctx'> 	if ((acpi_gbl_FADT.header.revision &gt;= FADT2_REVISION_ID) &amp;&amp;</div><div class='ctx'> 		(acpi_gbl_FADT.flags &amp; ACPI_FADT_APIC_PHYSICAL)) {</div><div class='ctx'> 		printk(KERN_DEBUG "System requires x2apic physical mode\n");</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='add'>+#endif</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c<br/>index 9f6b9341950f..8e3d22a1af94 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -41,6 +41,25 @@ void common(void) {</div><div class='ctx'> 	OFFSET(pbe_orig_address, pbe, orig_address);</div><div class='ctx'> 	OFFSET(pbe_next, pbe, next);</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)</div><div class='add'>+	BLANK();</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_ax, sigcontext_ia32, ax);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_bx, sigcontext_ia32, bx);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_cx, sigcontext_ia32, cx);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_dx, sigcontext_ia32, dx);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_si, sigcontext_ia32, si);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_di, sigcontext_ia32, di);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_bp, sigcontext_ia32, bp);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_sp, sigcontext_ia32, sp);</div><div class='add'>+	OFFSET(IA32_SIGCONTEXT_ip, sigcontext_ia32, ip);</div><div class='add'>+</div><div class='add'>+	BLANK();</div><div class='add'>+	OFFSET(TI_sysenter_return, thread_info, sysenter_return);</div><div class='add'>+</div><div class='add'>+	BLANK();</div><div class='add'>+	OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PARAVIRT</div><div class='ctx'> 	BLANK();</div><div class='ctx'> 	OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled);</div><div class='hunk'>@@ -49,7 +68,9 @@ void common(void) {</div><div class='ctx'> 	OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable);</div><div class='ctx'> 	OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable);</div><div class='ctx'> 	OFFSET(PV_CPU_iret, pv_cpu_ops, iret);</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='ctx'> 	OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit);</div><div class='add'>+#endif</div><div class='ctx'> 	OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0);</div><div class='ctx'> 	OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c<br/>index 47703aed74cf..6ce39025f467 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/asm-offsets_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets_32.c</a></div><div class='hunk'>@@ -17,17 +17,6 @@ void foo(void);</div><div class='ctx'> </div><div class='ctx'> void foo(void)</div><div class='ctx'> {</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_ax, sigcontext, ax);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_bx, sigcontext, bx);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_cx, sigcontext, cx);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_dx, sigcontext, dx);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_si, sigcontext, si);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_di, sigcontext, di);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_bp, sigcontext, bp);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_sp, sigcontext, sp);</div><div class='del'>-	OFFSET(IA32_SIGCONTEXT_ip, sigcontext, ip);</div><div class='del'>-	BLANK();</div><div class='del'>-</div><div class='ctx'> 	OFFSET(CPUINFO_x86, cpuinfo_x86, x86);</div><div class='ctx'> 	OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);</div><div class='ctx'> 	OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);</div><div class='hunk'>@@ -37,10 +26,6 @@ void foo(void)</div><div class='ctx'> 	OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='del'>-	OFFSET(TI_sysenter_return, thread_info, sysenter_return);</div><div class='del'>-	OFFSET(TI_cpu, thread_info, cpu);</div><div class='del'>-	BLANK();</div><div class='del'>-</div><div class='ctx'> 	OFFSET(PT_EBX, pt_regs, bx);</div><div class='ctx'> 	OFFSET(PT_ECX, pt_regs, cx);</div><div class='ctx'> 	OFFSET(PT_EDX, pt_regs, dx);</div><div class='hunk'>@@ -60,9 +45,6 @@ void foo(void)</div><div class='ctx'> 	OFFSET(PT_OLDSS,  pt_regs, ss);</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='del'>-	OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);</div><div class='del'>-	BLANK();</div><div class='del'>-</div><div class='ctx'> 	OFFSET(saved_context_gdt_desc, saved_context, gdt_desc);</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c<br/>index 5ce6f2da8763..d8f42f902a0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/asm-offsets_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/asm-offsets_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/asm-offsets_64.c</a></div><div class='hunk'>@@ -29,27 +29,6 @@ int main(void)</div><div class='ctx'> 	BLANK();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IA32_EMULATION</div><div class='del'>-	OFFSET(TI_sysenter_return, thread_info, sysenter_return);</div><div class='del'>-	BLANK();</div><div class='del'>-</div><div class='del'>-#define ENTRY(entry) OFFSET(IA32_SIGCONTEXT_ ## entry, sigcontext_ia32, entry)</div><div class='del'>-	ENTRY(ax);</div><div class='del'>-	ENTRY(bx);</div><div class='del'>-	ENTRY(cx);</div><div class='del'>-	ENTRY(dx);</div><div class='del'>-	ENTRY(si);</div><div class='del'>-	ENTRY(di);</div><div class='del'>-	ENTRY(bp);</div><div class='del'>-	ENTRY(sp);</div><div class='del'>-	ENTRY(ip);</div><div class='del'>-	BLANK();</div><div class='del'>-#undef ENTRY</div><div class='del'>-</div><div class='del'>-	OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);</div><div class='del'>-	BLANK();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define ENTRY(entry) OFFSET(pt_regs_ ## entry, pt_regs, entry)</div><div class='ctx'> 	ENTRY(bx);</div><div class='ctx'> 	ENTRY(cx);</div><div class='hunk'>@@ -87,7 +66,7 @@ int main(void)</div><div class='ctx'> 	DEFINE(__NR_syscall_max, sizeof(syscalls_64) - 1);</div><div class='ctx'> 	DEFINE(NR_syscalls, sizeof(syscalls_64));</div><div class='ctx'> </div><div class='del'>-	DEFINE(__NR_ia32_syscall_max, sizeof(syscalls_ia32) - 1);</div><div class='add'>+	DEFINE(__NR_syscall_compat_max, sizeof(syscalls_ia32) - 1);</div><div class='ctx'> 	DEFINE(IA32_NR_syscalls, sizeof(syscalls_ia32));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/x86/kernel/bootflag.c b/arch/x86/kernel/bootflag.c<br/>index 5de7f4c56971..52c8e3c7789d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/bootflag.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/bootflag.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/bootflag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/bootflag.c</a></div><div class='hunk'>@@ -98,4 +98,4 @@ static int __init sbf_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-module_init(sbf_init);</div><div class='add'>+arch_initcall(sbf_init);</div><div class='head'>diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c<br/>index 83a7995625a6..58118e207a69 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/check.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/check.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/check.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/check.c</a></div><div class='hunk'>@@ -91,7 +91,8 @@ void __init setup_bios_corruption_check(void)</div><div class='ctx'> </div><div class='ctx'> 	corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	for_each_free_mem_range(i, NUMA_NO_NODE, &amp;start, &amp;end, NULL) {</div><div class='add'>+	for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE, &amp;start, &amp;end,</div><div class='add'>+				NULL) {</div><div class='ctx'> 		start = clamp_t(phys_addr_t, round_up(start, PAGE_SIZE),</div><div class='ctx'> 				PAGE_SIZE, corruption_check_size);</div><div class='ctx'> 		end = clamp_t(phys_addr_t, round_down(end, PAGE_SIZE),</div><div class='head'>diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c<br/>index e4cf63301ff4..dd3a4baffe50 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/amd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/amd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/amd.c</a></div><div class='hunk'>@@ -19,6 +19,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * nodes_per_socket: Stores the number of nodes per socket.</div><div class='add'>+ * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX</div><div class='add'>+ * Node Identifiers[10:8]</div><div class='add'>+ */</div><div class='add'>+static u32 nodes_per_socket = 1;</div><div class='add'>+</div><div class='ctx'> static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 gprs[8] = { 0 };</div><div class='hunk'>@@ -288,10 +295,10 @@ static int nearby_node(int apicid)</div><div class='ctx'>  *     Assumption: Number of cores in each internal node is the same.</div><div class='ctx'>  * (2) AMD processors supporting compute units</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> static void amd_get_topology(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-	u32 nodes, cores_per_cu = 1;</div><div class='add'>+	u32 cores_per_cu = 1;</div><div class='ctx'> 	u8 node_id;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='hunk'>@@ -300,7 +307,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c)</div><div class='ctx'> 		u32 eax, ebx, ecx, edx;</div><div class='ctx'> </div><div class='ctx'> 		cpuid(0x8000001e, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-		nodes = ((ecx &gt;&gt; 8) &amp; 7) + 1;</div><div class='add'>+		nodes_per_socket = ((ecx &gt;&gt; 8) &amp; 7) + 1;</div><div class='ctx'> 		node_id = ecx &amp; 7;</div><div class='ctx'> </div><div class='ctx'> 		/* get compute unit information */</div><div class='hunk'>@@ -311,18 +318,18 @@ static void amd_get_topology(struct cpuinfo_x86 *c)</div><div class='ctx'> 		u64 value;</div><div class='ctx'> </div><div class='ctx'> 		rdmsrl(MSR_FAM10H_NODE_ID, value);</div><div class='del'>-		nodes = ((value &gt;&gt; 3) &amp; 7) + 1;</div><div class='add'>+		nodes_per_socket = ((value &gt;&gt; 3) &amp; 7) + 1;</div><div class='ctx'> 		node_id = value &amp; 7;</div><div class='ctx'> 	} else</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* fixup multi-node processor information */</div><div class='del'>-	if (nodes &gt; 1) {</div><div class='add'>+	if (nodes_per_socket &gt; 1) {</div><div class='ctx'> 		u32 cores_per_node;</div><div class='ctx'> 		u32 cus_per_node;</div><div class='ctx'> </div><div class='ctx'> 		set_cpu_cap(c, X86_FEATURE_AMD_DCM);</div><div class='del'>-		cores_per_node = c-&gt;x86_max_cores / nodes;</div><div class='add'>+		cores_per_node = c-&gt;x86_max_cores / nodes_per_socket;</div><div class='ctx'> 		cus_per_node = cores_per_node / cores_per_cu;</div><div class='ctx'> </div><div class='ctx'> 		/* store NodeID, use llc_shared_map to store sibling info */</div><div class='hunk'>@@ -341,7 +348,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c)</div><div class='ctx'>  */</div><div class='ctx'> static void amd_detect_cmp(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	unsigned bits;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='hunk'>@@ -366,6 +373,12 @@ u16 amd_get_nb_id(int cpu)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(amd_get_nb_id);</div><div class='ctx'> </div><div class='add'>+u32 amd_get_nodes_per_socket(void)</div><div class='add'>+{</div><div class='add'>+	return nodes_per_socket;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(amd_get_nodes_per_socket);</div><div class='add'>+</div><div class='ctx'> static void srat_detect_node(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_NUMA</div><div class='hunk'>@@ -420,7 +433,7 @@ static void srat_detect_node(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> static void early_init_amd_mc(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	unsigned bits, ecx;</div><div class='ctx'> </div><div class='ctx'> 	/* Multi core CPU? */</div><div class='hunk'>@@ -520,8 +533,16 @@ static void early_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 			set_cpu_cap(c, X86_FEATURE_K6_MTRR);</div><div class='ctx'> #endif</div><div class='ctx'> #if defined(CONFIG_X86_LOCAL_APIC) &amp;&amp; defined(CONFIG_PCI)</div><div class='del'>-	/* check CPU config space for extended APIC ID */</div><div class='del'>-	if (cpu_has_apic &amp;&amp; c-&gt;x86 &gt;= 0xf) {</div><div class='add'>+	/*</div><div class='add'>+	 * ApicID can always be treated as an 8-bit value for AMD APIC versions</div><div class='add'>+	 * &gt;= 0x10, but even old K8s came out of reset with version 0x10. So, we</div><div class='add'>+	 * can safely set X86_FEATURE_EXTD_APICID unconditionally for families</div><div class='add'>+	 * after 16h.</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_has_apic &amp;&amp; c-&gt;x86 &gt; 0x16) {</div><div class='add'>+		set_cpu_cap(c, X86_FEATURE_EXTD_APICID);</div><div class='add'>+	} else if (cpu_has_apic &amp;&amp; c-&gt;x86 &gt;= 0xf) {</div><div class='add'>+		/* check CPU config space for extended APIC ID */</div><div class='ctx'> 		unsigned int val;</div><div class='ctx'> 		val = read_pci_config(0, 24, 0, 0x68);</div><div class='ctx'> 		if ((val &amp; ((1 &lt;&lt; 17) | (1 &lt;&lt; 18))) == ((1 &lt;&lt; 17) | (1 &lt;&lt; 18)))</div><div class='head'>diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c<br/>index 03445346ee0a..bd17db15a2c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/bugs.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/bugs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/bugs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/bugs.c</a></div><div class='hunk'>@@ -12,57 +12,11 @@</div><div class='ctx'> #include &lt;asm/bugs.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> </div><div class='del'>-static double __initdata x = 4195835.0;</div><div class='del'>-static double __initdata y = 3145727.0;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This used to check for exceptions..</div><div class='del'>- * However, it turns out that to support that,</div><div class='del'>- * the XMM trap handlers basically had to</div><div class='del'>- * be buggy. So let's have a correct XMM trap</div><div class='del'>- * handler, and forget about printing out</div><div class='del'>- * some status at boot.</div><div class='del'>- *</div><div class='del'>- * We should really only care about bugs here</div><div class='del'>- * anyway. Not features.</div><div class='del'>- */</div><div class='del'>-static void __init check_fpu(void)</div><div class='del'>-{</div><div class='del'>-	s32 fdiv_bug;</div><div class='del'>-</div><div class='del'>-	kernel_fpu_begin();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * trap_init() enabled FXSR and company _before_ testing for FP</div><div class='del'>-	 * problems here.</div><div class='del'>-	 *</div><div class='del'>-	 * Test for the divl bug: http://en.wikipedia.org/wiki/Fdiv_bug</div><div class='del'>-	 */</div><div class='del'>-	__asm__("fninit\n\t"</div><div class='del'>-		"fldl %1\n\t"</div><div class='del'>-		"fdivl %2\n\t"</div><div class='del'>-		"fmull %2\n\t"</div><div class='del'>-		"fldl %1\n\t"</div><div class='del'>-		"fsubp %%st,%%st(1)\n\t"</div><div class='del'>-		"fistpl %0\n\t"</div><div class='del'>-		"fwait\n\t"</div><div class='del'>-		"fninit"</div><div class='del'>-		: "=m" (*&amp;fdiv_bug)</div><div class='del'>-		: "m" (*&amp;x), "m" (*&amp;y));</div><div class='del'>-</div><div class='del'>-	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	if (fdiv_bug) {</div><div class='del'>-		set_cpu_bug(&amp;boot_cpu_data, X86_BUG_FDIV);</div><div class='del'>-		pr_warn("Hmm, FPU with FDIV bug\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init check_bugs(void)</div><div class='ctx'> {</div><div class='ctx'> 	identify_boot_cpu();</div><div class='hunk'>@@ -85,10 +39,5 @@ void __init check_bugs(void)</div><div class='ctx'> 		'0' + (boot_cpu_data.x86 &gt; 6 ? 6 : boot_cpu_data.x86);</div><div class='ctx'> 	alternative_instructions();</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * kernel_fpu_begin/end() in check_fpu() relies on the patched</div><div class='del'>-	 * alternative instructions.</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_has_fpu)</div><div class='del'>-		check_fpu();</div><div class='add'>+	fpu__init_check_bugs();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c<br/>index a62cf04dac8a..922c5e0cea4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/common.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/common.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/common.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -31,8 +32,7 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;linux/numa.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='hunk'>@@ -145,32 +145,21 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {</div><div class='ctx'> } };</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);</div><div class='ctx'> </div><div class='del'>-static int __init x86_xsave_setup(char *s)</div><div class='add'>+static int __init x86_mpx_setup(char *s)</div><div class='ctx'> {</div><div class='add'>+	/* require an exact match without trailing characters */</div><div class='ctx'> 	if (strlen(s))</div><div class='ctx'> 		return 0;</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVE);</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_AVX);</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_AVX2);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("noxsave", x86_xsave_setup);</div><div class='ctx'> </div><div class='del'>-static int __init x86_xsaveopt_setup(char *s)</div><div class='del'>-{</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("noxsaveopt", x86_xsaveopt_setup);</div><div class='add'>+	/* do not emit a message if the feature is not present */</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_MPX))</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-static int __init x86_xsaves_setup(char *s)</div><div class='del'>-{</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_MPX);</div><div class='add'>+	pr_info("nompx: Intel Memory Protection Extensions (MPX) disabled\n");</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='del'>-__setup("noxsaves", x86_xsaves_setup);</div><div class='add'>+__setup("nompx", x86_mpx_setup);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> static int cachesize_override = -1;</div><div class='hunk'>@@ -183,14 +172,6 @@ static int __init cachesize_setup(char *str)</div><div class='ctx'> }</div><div class='ctx'> __setup("cachesize=", cachesize_setup);</div><div class='ctx'> </div><div class='del'>-static int __init x86_fxsr_setup(char *s)</div><div class='del'>-{</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_FXSR);</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XMM);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("nofxsr", x86_fxsr_setup);</div><div class='del'>-</div><div class='ctx'> static int __init x86_sep_setup(char *s)</div><div class='ctx'> {</div><div class='ctx'> 	setup_clear_cpu_cap(X86_FEATURE_SEP);</div><div class='hunk'>@@ -419,7 +400,7 @@ static const struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};</div><div class='ctx'> static void get_model_name(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int *v;</div><div class='del'>-	char *p, *q;</div><div class='add'>+	char *p, *q, *s;</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;extended_cpuid_level &lt; 0x80000004)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -430,19 +411,21 @@ static void get_model_name(struct cpuinfo_x86 *c)</div><div class='ctx'> 	cpuid(0x80000004, &amp;v[8], &amp;v[9], &amp;v[10], &amp;v[11]);</div><div class='ctx'> 	c-&gt;x86_model_id[48] = 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Intel chips right-justify this string for some dumb reason;</div><div class='del'>-	 * undo that brain damage:</div><div class='del'>-	 */</div><div class='del'>-	p = q = &amp;c-&gt;x86_model_id[0];</div><div class='add'>+	/* Trim whitespace */</div><div class='add'>+	p = q = s = &amp;c-&gt;x86_model_id[0];</div><div class='add'>+</div><div class='ctx'> 	while (*p == ' ')</div><div class='ctx'> 		p++;</div><div class='del'>-	if (p != q) {</div><div class='del'>-		while (*p)</div><div class='del'>-			*q++ = *p++;</div><div class='del'>-		while (q &lt;= &amp;c-&gt;x86_model_id[48])</div><div class='del'>-			*q++ = '\0';	/* Zero-pad the rest */</div><div class='add'>+</div><div class='add'>+	while (*p) {</div><div class='add'>+		/* Note the last non-whitespace index */</div><div class='add'>+		if (!isspace(*p))</div><div class='add'>+			s = q;</div><div class='add'>+</div><div class='add'>+		*q++ = *p++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	*(s + 1) = '\0';</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpu_detect_cache_sizes(struct cpuinfo_x86 *c)</div><div class='hunk'>@@ -508,7 +491,7 @@ static void cpu_detect_tlb(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> void detect_ht(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	u32 eax, ebx, ecx, edx;</div><div class='ctx'> 	int index_msb, core_bits;</div><div class='ctx'> 	static bool printed;</div><div class='hunk'>@@ -759,7 +742,6 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)</div><div class='ctx'> 	cpu_detect(c);</div><div class='ctx'> 	get_cpu_vendor(c);</div><div class='ctx'> 	get_cpu_cap(c);</div><div class='del'>-	fpu_detect(c);</div><div class='ctx'> </div><div class='ctx'> 	if (this_cpu-&gt;c_early_init)</div><div class='ctx'> 		this_cpu-&gt;c_early_init(c);</div><div class='hunk'>@@ -771,6 +753,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)</div><div class='ctx'> 		this_cpu-&gt;c_bsp_init(c);</div><div class='ctx'> </div><div class='ctx'> 	setup_force_cpu_cap(X86_FEATURE_ALWAYS);</div><div class='add'>+	fpu__init_system(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init early_cpu_init(void)</div><div class='hunk'>@@ -844,7 +827,7 @@ static void generic_identify(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (c-&gt;cpuid_level &gt;= 0x00000001) {</div><div class='ctx'> 		c-&gt;initial_apicid = (cpuid_ebx(1) &gt;&gt; 24) &amp; 0xFF;</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-# ifdef CONFIG_X86_HT</div><div class='add'>+# ifdef CONFIG_SMP</div><div class='ctx'> 		c-&gt;apicid = apic-&gt;phys_pkg_id(c-&gt;initial_apicid, 0);</div><div class='ctx'> # else</div><div class='ctx'> 		c-&gt;apicid = c-&gt;initial_apicid;</div><div class='hunk'>@@ -1026,7 +1009,7 @@ void enable_sep_cpu(void)</div><div class='ctx'> 	      (unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),</div><div class='ctx'> 	      0);</div><div class='ctx'> </div><div class='del'>-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)ia32_sysenter_target, 0);</div><div class='add'>+	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	put_cpu();</div><div class='hunk'>@@ -1122,7 +1105,7 @@ void print_cpu_info(struct cpuinfo_x86 *c)</div><div class='ctx'> 		printk(KERN_CONT "%s ", vendor);</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;x86_model_id[0])</div><div class='del'>-		printk(KERN_CONT "%s", strim(c-&gt;x86_model_id));</div><div class='add'>+		printk(KERN_CONT "%s", c-&gt;x86_model_id);</div><div class='ctx'> 	else</div><div class='ctx'> 		printk(KERN_CONT "%d86", c-&gt;x86);</div><div class='ctx'> </div><div class='hunk'>@@ -1155,10 +1138,6 @@ static __init int setup_disablecpuid(char *arg)</div><div class='ctx'> }</div><div class='ctx'> __setup("clearcpuid=", setup_disablecpuid);</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU(unsigned long, kernel_stack) =</div><div class='del'>-	(unsigned long)&amp;init_thread_union + THREAD_SIZE;</div><div class='del'>-EXPORT_PER_CPU_SYMBOL(kernel_stack);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> struct desc_ptr idt_descr = { NR_VECTORS * 16 - 1, (unsigned long) idt_table };</div><div class='ctx'> struct desc_ptr debug_idt_descr = { NR_VECTORS * 16 - 1,</div><div class='hunk'>@@ -1183,8 +1162,6 @@ DEFINE_PER_CPU(unsigned int, irq_count) __visible = -1;</div><div class='ctx'> DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT;</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL(__preempt_count);</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Special IST stacks which the CPU switches to when it calls</div><div class='ctx'>  * an IST-marked descriptor entry. Up to 7 stacks (hardware</div><div class='hunk'>@@ -1208,10 +1185,10 @@ void syscall_init(void)</div><div class='ctx'> 	 * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip.</div><div class='ctx'> 	 */</div><div class='ctx'> 	wrmsrl(MSR_STAR,  ((u64)__USER32_CS)&lt;&lt;48  | ((u64)__KERNEL_CS)&lt;&lt;32);</div><div class='del'>-	wrmsrl(MSR_LSTAR, system_call);</div><div class='add'>+	wrmsrl(MSR_LSTAR, entry_SYSCALL_64);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='del'>-	wrmsrl(MSR_CSTAR, ia32_cstar_target);</div><div class='add'>+	wrmsrl(MSR_CSTAR, entry_SYSCALL_compat);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This only works on Intel CPUs.</div><div class='ctx'> 	 * On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.</div><div class='hunk'>@@ -1220,7 +1197,7 @@ void syscall_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);</div><div class='ctx'> 	wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);</div><div class='del'>-	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);</div><div class='add'>+	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);</div><div class='ctx'> #else</div><div class='ctx'> 	wrmsrl(MSR_CSTAR, ignore_sysret);</div><div class='ctx'> 	wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);</div><div class='hunk'>@@ -1275,7 +1252,6 @@ DEFINE_PER_CPU(struct task_struct *, current_task) = &amp;init_task;</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL(current_task);</div><div class='ctx'> DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT;</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL(__preempt_count);</div><div class='del'>-DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * On x86_32, vm86 modifies tss.sp0, so sp0 isn't a reliable way to find</div><div class='hunk'>@@ -1439,7 +1415,7 @@ void cpu_init(void)</div><div class='ctx'> 	clear_all_debug_regs();</div><div class='ctx'> 	dbg_restore_debug_regs();</div><div class='ctx'> </div><div class='del'>-	fpu_init();</div><div class='add'>+	fpu__init_cpu();</div><div class='ctx'> </div><div class='ctx'> 	if (is_uv_system())</div><div class='ctx'> 		uv_cpu_init();</div><div class='hunk'>@@ -1495,7 +1471,7 @@ void cpu_init(void)</div><div class='ctx'> 	clear_all_debug_regs();</div><div class='ctx'> 	dbg_restore_debug_regs();</div><div class='ctx'> </div><div class='del'>-	fpu_init();</div><div class='add'>+	fpu__init_cpu();</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c<br/>index edcb0e28c336..be4febc58b94 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/intel_cacheinfo.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/intel_cacheinfo.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/intel_cacheinfo.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/intel_cacheinfo.c</a></div><div class='hunk'>@@ -654,7 +654,7 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)</div><div class='ctx'> 	unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */</div><div class='ctx'> 	unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */</div><div class='ctx'> 	unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	unsigned int cpu = c-&gt;cpu_index;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -773,19 +773,19 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> 	if (new_l2) {</div><div class='ctx'> 		l2 = new_l2;</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 		per_cpu(cpu_llc_id, cpu) = l2_id;</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_l3) {</div><div class='ctx'> 		l3 = new_l3;</div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 		per_cpu(cpu_llc_id, cpu) = l3_id;</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_HT</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If cpu_llc_id is not yet set, this means cpuid_level &lt; 4 which in</div><div class='ctx'> 	 * turns means that the only possibility is SMT (as indicated in</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c<br/>index 20190bdac9d5..df919ff103c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mcheck/mce.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce.c</a></div><div class='hunk'>@@ -53,9 +53,12 @@</div><div class='ctx'> static DEFINE_MUTEX(mce_chrdev_read_mutex);</div><div class='ctx'> </div><div class='ctx'> #define rcu_dereference_check_mce(p) \</div><div class='del'>-	rcu_dereference_index_check((p), \</div><div class='del'>-			      rcu_read_lock_sched_held() || \</div><div class='del'>-			      lockdep_is_held(&amp;mce_chrdev_read_mutex))</div><div class='add'>+({ \</div><div class='add'>+	rcu_lockdep_assert(rcu_read_lock_sched_held() || \</div><div class='add'>+			   lockdep_is_held(&amp;mce_chrdev_read_mutex), \</div><div class='add'>+			   "suspicious rcu_dereference_check_mce() usage"); \</div><div class='add'>+	smp_load_acquire(&amp;(p)); \</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;trace/events/mce.h&gt;</div><div class='hunk'>@@ -1050,6 +1053,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	char *msg = "Unknown";</div><div class='ctx'> 	u64 recover_paddr = ~0ull;</div><div class='ctx'> 	int flags = MF_ACTION_REQUIRED;</div><div class='add'>+	int lmce = 0;</div><div class='ctx'> </div><div class='ctx'> 	prev_state = ist_enter(regs);</div><div class='ctx'> </div><div class='hunk'>@@ -1077,11 +1081,20 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 		kill_it = 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Go through all the banks in exclusion of the other CPUs.</div><div class='del'>-	 * This way we don't report duplicated events on shared banks</div><div class='del'>-	 * because the first one to see it will clear it.</div><div class='add'>+	 * Check if this MCE is signaled to only this logical processor</div><div class='ctx'> 	 */</div><div class='del'>-	order = mce_start(&amp;no_way_out);</div><div class='add'>+	if (m.mcgstatus &amp; MCG_STATUS_LMCES)</div><div class='add'>+		lmce = 1;</div><div class='add'>+	else {</div><div class='add'>+		/*</div><div class='add'>+		 * Go through all the banks in exclusion of the other CPUs.</div><div class='add'>+		 * This way we don't report duplicated events on shared banks</div><div class='add'>+		 * because the first one to see it will clear it.</div><div class='add'>+		 * If this is a Local MCE, then no need to perform rendezvous.</div><div class='add'>+		 */</div><div class='add'>+		order = mce_start(&amp;no_way_out);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; cfg-&gt;banks; i++) {</div><div class='ctx'> 		__clear_bit(i, toclear);</div><div class='ctx'> 		if (!test_bit(i, valid_banks))</div><div class='hunk'>@@ -1158,8 +1171,18 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	 * Do most of the synchronization with other CPUs.</div><div class='ctx'> 	 * When there's any problem use only local no_way_out state.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mce_end(order) &lt; 0)</div><div class='del'>-		no_way_out = worst &gt;= MCE_PANIC_SEVERITY;</div><div class='add'>+	if (!lmce) {</div><div class='add'>+		if (mce_end(order) &lt; 0)</div><div class='add'>+			no_way_out = worst &gt;= MCE_PANIC_SEVERITY;</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Local MCE skipped calling mce_reign()</div><div class='add'>+		 * If we found a fatal error, we need to panic here.</div><div class='add'>+		 */</div><div class='add'>+		 if (worst &gt;= MCE_PANIC_SEVERITY &amp;&amp; mca_cfg.tolerant &lt; 3)</div><div class='add'>+			mce_panic("Machine check from unknown source",</div><div class='add'>+				NULL, NULL);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * At insane "tolerant" levels we take no action. Otherwise</div><div class='hunk'>@@ -1640,10 +1663,16 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)</div><div class='ctx'> 		mce_intel_feature_init(c);</div><div class='ctx'> 		mce_adjust_timer = cmci_intel_adjust_timer;</div><div class='ctx'> 		break;</div><div class='del'>-	case X86_VENDOR_AMD:</div><div class='add'>+</div><div class='add'>+	case X86_VENDOR_AMD: {</div><div class='add'>+		u32 ebx = cpuid_ebx(0x80000007);</div><div class='add'>+</div><div class='ctx'> 		mce_amd_feature_init(c);</div><div class='del'>-		mce_flags.overflow_recov = cpuid_ebx(0x80000007) &amp; 0x1;</div><div class='add'>+		mce_flags.overflow_recov = !!(ebx &amp; BIT(0));</div><div class='add'>+		mce_flags.succor	 = !!(ebx &amp; BIT(1));</div><div class='ctx'> 		break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1887,7 +1916,7 @@ out:</div><div class='ctx'> static unsigned int mce_chrdev_poll(struct file *file, poll_table *wait)</div><div class='ctx'> {</div><div class='ctx'> 	poll_wait(file, &amp;mce_chrdev_wait, wait);</div><div class='del'>-	if (rcu_access_index(mcelog.next))</div><div class='add'>+	if (READ_ONCE(mcelog.next))</div><div class='ctx'> 		return POLLIN | POLLRDNORM;</div><div class='ctx'> 	if (!mce_apei_read_done &amp;&amp; apei_check_mce())</div><div class='ctx'> 		return POLLIN | POLLRDNORM;</div><div class='hunk'>@@ -1932,8 +1961,8 @@ void register_mce_write_callback(ssize_t (*fn)(struct file *filp,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(register_mce_write_callback);</div><div class='ctx'> </div><div class='del'>-ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,</div><div class='del'>-			 size_t usize, loff_t *off)</div><div class='add'>+static ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,</div><div class='add'>+				size_t usize, loff_t *off)</div><div class='ctx'> {</div><div class='ctx'> 	if (mce_write)</div><div class='ctx'> 		return mce_write(filp, ubuf, usize, off);</div><div class='hunk'>@@ -1979,6 +2008,7 @@ void mce_disable_bank(int bank)</div><div class='ctx'> /*</div><div class='ctx'>  * mce=off Disables machine check</div><div class='ctx'>  * mce=no_cmci Disables CMCI</div><div class='add'>+ * mce=no_lmce Disables LMCE</div><div class='ctx'>  * mce=dont_log_ce Clears corrected events silently, no log created for CEs.</div><div class='ctx'>  * mce=ignore_ce Disables polling and CMCI, corrected events are not cleared.</div><div class='ctx'>  * mce=TOLERANCELEVEL[,monarchtimeout] (number, see above)</div><div class='hunk'>@@ -2002,6 +2032,8 @@ static int __init mcheck_enable(char *str)</div><div class='ctx'> 		cfg-&gt;disabled = true;</div><div class='ctx'> 	else if (!strcmp(str, "no_cmci"))</div><div class='ctx'> 		cfg-&gt;cmci_disabled = true;</div><div class='add'>+	else if (!strcmp(str, "no_lmce"))</div><div class='add'>+		cfg-&gt;lmce_disabled = true;</div><div class='ctx'> 	else if (!strcmp(str, "dont_log_ce"))</div><div class='ctx'> 		cfg-&gt;dont_log_ce = true;</div><div class='ctx'> 	else if (!strcmp(str, "ignore_ce"))</div><div class='hunk'>@@ -2011,11 +2043,8 @@ static int __init mcheck_enable(char *str)</div><div class='ctx'> 	else if (!strcmp(str, "bios_cmci_threshold"))</div><div class='ctx'> 		cfg-&gt;bios_cmci_threshold = true;</div><div class='ctx'> 	else if (isdigit(str[0])) {</div><div class='del'>-		get_option(&amp;str, &amp;(cfg-&gt;tolerant));</div><div class='del'>-		if (*str == ',') {</div><div class='del'>-			++str;</div><div class='add'>+		if (get_option(&amp;str, &amp;cfg-&gt;tolerant) == 2)</div><div class='ctx'> 			get_option(&amp;str, &amp;(cfg-&gt;monarch_timeout));</div><div class='del'>-		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_info("mce argument %s ignored. Please use /sys\n", str);</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c<br/>index 55ad9b37cae8..e99b15077e94 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a></div><div class='hunk'>@@ -1,19 +1,13 @@</div><div class='ctx'> /*</div><div class='del'>- *  (c) 2005-2012 Advanced Micro Devices, Inc.</div><div class='add'>+ *  (c) 2005-2015 Advanced Micro Devices, Inc.</div><div class='ctx'>  *  Your use of this code is subject to the terms and conditions of the</div><div class='ctx'>  *  GNU general public license version 2. See "COPYING" or</div><div class='ctx'>  *  http://www.gnu.org/licenses/gpl.html</div><div class='ctx'>  *</div><div class='ctx'>  *  Written by Jacob Shin - AMD, Inc.</div><div class='del'>- *</div><div class='ctx'>  *  Maintained by: Borislav Petkov &lt;bp@alien8.de&gt;</div><div class='ctx'>  *</div><div class='del'>- *  April 2006</div><div class='del'>- *     - added support for AMD Family 0x10 processors</div><div class='del'>- *  May 2012</div><div class='del'>- *     - major scrubbing</div><div class='del'>- *</div><div class='del'>- *  All MC4_MISCi registers are shared between multi-cores</div><div class='add'>+ *  All MC4_MISCi registers are shared between cores on a node.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='hunk'>@@ -32,6 +26,7 @@</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='add'>+#include &lt;asm/trace/irq_vectors.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define NR_BLOCKS         9</div><div class='ctx'> #define THRESHOLD_MAX     0xFFF</div><div class='hunk'>@@ -47,6 +42,13 @@</div><div class='ctx'> #define MASK_BLKPTR_LO    0xFF000000</div><div class='ctx'> #define MCG_XBLK_ADDR     0xC0000400</div><div class='ctx'> </div><div class='add'>+/* Deferred error settings */</div><div class='add'>+#define MSR_CU_DEF_ERR		0xC0000410</div><div class='add'>+#define MASK_DEF_LVTOFF		0x000000F0</div><div class='add'>+#define MASK_DEF_INT_TYPE	0x00000006</div><div class='add'>+#define DEF_LVT_OFF		0x2</div><div class='add'>+#define DEF_INT_TYPE_APIC	0x2</div><div class='add'>+</div><div class='ctx'> static const char * const th_names[] = {</div><div class='ctx'> 	"load_store",</div><div class='ctx'> 	"insn_fetch",</div><div class='hunk'>@@ -60,6 +62,13 @@ static DEFINE_PER_CPU(struct threshold_bank **, threshold_banks);</div><div class='ctx'> static DEFINE_PER_CPU(unsigned char, bank_map);	/* see which banks are on */</div><div class='ctx'> </div><div class='ctx'> static void amd_threshold_interrupt(void);</div><div class='add'>+static void amd_deferred_error_interrupt(void);</div><div class='add'>+</div><div class='add'>+static void default_deferred_error_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	pr_err("Unexpected deferred interrupt at vector %x\n", DEFERRED_ERROR_VECTOR);</div><div class='add'>+}</div><div class='add'>+void (*deferred_error_int_vector)(void) = default_deferred_error_interrupt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CPU Initialization</div><div class='hunk'>@@ -196,7 +205,7 @@ static void mce_threshold_block_init(struct threshold_block *b, int offset)</div><div class='ctx'> 	threshold_restart_bank(&amp;tr);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int setup_APIC_mce(int reserved, int new)</div><div class='add'>+static int setup_APIC_mce_threshold(int reserved, int new)</div><div class='ctx'> {</div><div class='ctx'> 	if (reserved &lt; 0 &amp;&amp; !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR,</div><div class='ctx'> 					      APIC_EILVT_MSG_FIX, 0))</div><div class='hunk'>@@ -205,6 +214,39 @@ static int setup_APIC_mce(int reserved, int new)</div><div class='ctx'> 	return reserved;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int setup_APIC_deferred_error(int reserved, int new)</div><div class='add'>+{</div><div class='add'>+	if (reserved &lt; 0 &amp;&amp; !setup_APIC_eilvt(new, DEFERRED_ERROR_VECTOR,</div><div class='add'>+					      APIC_EILVT_MSG_FIX, 0))</div><div class='add'>+		return new;</div><div class='add'>+</div><div class='add'>+	return reserved;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deferred_error_interrupt_enable(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	u32 low = 0, high = 0;</div><div class='add'>+	int def_offset = -1, def_new;</div><div class='add'>+</div><div class='add'>+	if (rdmsr_safe(MSR_CU_DEF_ERR, &amp;low, &amp;high))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	def_new = (low &amp; MASK_DEF_LVTOFF) &gt;&gt; 4;</div><div class='add'>+	if (!(low &amp; MASK_DEF_LVTOFF)) {</div><div class='add'>+		pr_err(FW_BUG "Your BIOS is not setting up LVT offset 0x2 for deferred error IRQs correctly.\n");</div><div class='add'>+		def_new = DEF_LVT_OFF;</div><div class='add'>+		low = (low &amp; ~MASK_DEF_LVTOFF) | (DEF_LVT_OFF &lt;&lt; 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	def_offset = setup_APIC_deferred_error(def_offset, def_new);</div><div class='add'>+	if ((def_offset == def_new) &amp;&amp;</div><div class='add'>+	    (deferred_error_int_vector != amd_deferred_error_interrupt))</div><div class='add'>+		deferred_error_int_vector = amd_deferred_error_interrupt;</div><div class='add'>+</div><div class='add'>+	low = (low &amp; ~MASK_DEF_INT_TYPE) | DEF_INT_TYPE_APIC;</div><div class='add'>+	wrmsr(MSR_CU_DEF_ERR, low, high);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* cpu init entry point, called from mce.c with preempt off */</div><div class='ctx'> void mce_amd_feature_init(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='hunk'>@@ -252,7 +294,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> 			b.interrupt_enable = 1;</div><div class='ctx'> 			new	= (high &amp; MASK_LVTOFF_HI) &gt;&gt; 20;</div><div class='del'>-			offset  = setup_APIC_mce(offset, new);</div><div class='add'>+			offset  = setup_APIC_mce_threshold(offset, new);</div><div class='ctx'> </div><div class='ctx'> 			if ((offset == new) &amp;&amp;</div><div class='ctx'> 			    (mce_threshold_vector != amd_threshold_interrupt))</div><div class='hunk'>@@ -262,6 +304,73 @@ init:</div><div class='ctx'> 			mce_threshold_block_init(&amp;b, offset);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (mce_flags.succor)</div><div class='add'>+		deferred_error_interrupt_enable(c);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __log_error(unsigned int bank, bool threshold_err, u64 misc)</div><div class='add'>+{</div><div class='add'>+	struct mce m;</div><div class='add'>+	u64 status;</div><div class='add'>+</div><div class='add'>+	rdmsrl(MSR_IA32_MCx_STATUS(bank), status);</div><div class='add'>+	if (!(status &amp; MCI_STATUS_VAL))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mce_setup(&amp;m);</div><div class='add'>+</div><div class='add'>+	m.status = status;</div><div class='add'>+	m.bank = bank;</div><div class='add'>+</div><div class='add'>+	if (threshold_err)</div><div class='add'>+		m.misc = misc;</div><div class='add'>+</div><div class='add'>+	if (m.status &amp; MCI_STATUS_ADDRV)</div><div class='add'>+		rdmsrl(MSR_IA32_MCx_ADDR(bank), m.addr);</div><div class='add'>+</div><div class='add'>+	mce_log(&amp;m);</div><div class='add'>+	wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __smp_deferred_error_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	inc_irq_stat(irq_deferred_error_count);</div><div class='add'>+	deferred_error_int_vector();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage __visible void smp_deferred_error_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	entering_irq();</div><div class='add'>+	__smp_deferred_error_interrupt();</div><div class='add'>+	exiting_ack_irq();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage __visible void smp_trace_deferred_error_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	entering_irq();</div><div class='add'>+	trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);</div><div class='add'>+	__smp_deferred_error_interrupt();</div><div class='add'>+	trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);</div><div class='add'>+	exiting_ack_irq();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* APIC interrupt handler for deferred errors */</div><div class='add'>+static void amd_deferred_error_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	u64 status;</div><div class='add'>+	unsigned int bank;</div><div class='add'>+</div><div class='add'>+	for (bank = 0; bank &lt; mca_cfg.banks; ++bank) {</div><div class='add'>+		rdmsrl(MSR_IA32_MCx_STATUS(bank), status);</div><div class='add'>+</div><div class='add'>+		if (!(status &amp; MCI_STATUS_VAL) ||</div><div class='add'>+		    !(status &amp; MCI_STATUS_DEFERRED))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__log_error(bank, false, 0);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -273,12 +382,12 @@ init:</div><div class='ctx'>  * the interrupt goes off when error_count reaches threshold_limit.</div><div class='ctx'>  * the handler will simply log mcelog w/ software defined bank number.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='ctx'> static void amd_threshold_interrupt(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 low = 0, high = 0, address = 0;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	unsigned int bank, block;</div><div class='del'>-	struct mce m;</div><div class='ctx'> </div><div class='ctx'> 	/* assume first bank caused it */</div><div class='ctx'> 	for (bank = 0; bank &lt; mca_cfg.banks; ++bank) {</div><div class='hunk'>@@ -321,15 +430,7 @@ static void amd_threshold_interrupt(void)</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> log:</div><div class='del'>-	mce_setup(&amp;m);</div><div class='del'>-	rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);</div><div class='del'>-	if (!(m.status &amp; MCI_STATUS_VAL))</div><div class='del'>-		return;</div><div class='del'>-	m.misc = ((u64)high &lt;&lt; 32) | low;</div><div class='del'>-	m.bank = bank;</div><div class='del'>-	mce_log(&amp;m);</div><div class='del'>-</div><div class='del'>-	wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);</div><div class='add'>+	__log_error(bank, true, ((u64)high &lt;&lt; 32) | low);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c<br/>index b4a41cf030ed..844f56c5616d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_intel.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mcheck/mce_intel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mcheck/mce_intel.c</a></div><div class='hunk'>@@ -91,6 +91,36 @@ static int cmci_supported(int *banks)</div><div class='ctx'> 	return !!(cap &amp; MCG_CMCI_P);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool lmce_supported(void)</div><div class='add'>+{</div><div class='add'>+	u64 tmp;</div><div class='add'>+</div><div class='add'>+	if (mca_cfg.lmce_disabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	rdmsrl(MSR_IA32_MCG_CAP, tmp);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * LMCE depends on recovery support in the processor. Hence both</div><div class='add'>+	 * MCG_SER_P and MCG_LMCE_P should be present in MCG_CAP.</div><div class='add'>+	 */</div><div class='add'>+	if ((tmp &amp; (MCG_SER_P | MCG_LMCE_P)) !=</div><div class='add'>+		   (MCG_SER_P | MCG_LMCE_P))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * BIOS should indicate support for LMCE by setting bit 20 in</div><div class='add'>+	 * IA32_FEATURE_CONTROL without which touching MCG_EXT_CTL will</div><div class='add'>+	 * generate a #GP fault.</div><div class='add'>+	 */</div><div class='add'>+	rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp);</div><div class='add'>+	if ((tmp &amp; (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE)) ==</div><div class='add'>+		   (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool mce_intel_cmci_poll(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (__this_cpu_read(cmci_storm_state) == CMCI_STORM_NONE)</div><div class='hunk'>@@ -405,8 +435,22 @@ static void intel_init_cmci(void)</div><div class='ctx'> 	cmci_recheck();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void intel_init_lmce(void)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	if (!lmce_supported())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rdmsrl(MSR_IA32_MCG_EXT_CTL, val);</div><div class='add'>+</div><div class='add'>+	if (!(val &amp; MCG_EXT_CTL_LMCE_EN))</div><div class='add'>+		wrmsrl(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mce_intel_feature_init(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	intel_init_thermal(c);</div><div class='ctx'> 	intel_init_cmci();</div><div class='add'>+	intel_init_lmce();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c b/arch/x86/kernel/cpu/microcode/amd_early.c<br/>index 737737edbd1e..e8a215a9a345 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/amd_early.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/amd_early.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/amd_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/amd_early.c</a></div><div class='hunk'>@@ -228,7 +228,23 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init load_ucode_amd_bsp(void)</div><div class='add'>+static bool __init load_builtin_amd_microcode(struct cpio_data *cp,</div><div class='add'>+					      unsigned int family)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	char fw_name[36] = "amd-ucode/microcode_amd.bin";</div><div class='add'>+</div><div class='add'>+	if (family &gt;= 0x15)</div><div class='add'>+		snprintf(fw_name, sizeof(fw_name),</div><div class='add'>+			 "amd-ucode/microcode_amd_fam%.2xh.bin", family);</div><div class='add'>+</div><div class='add'>+	return get_builtin_firmware(cp, fw_name);</div><div class='add'>+#else</div><div class='add'>+	return false;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init load_ucode_amd_bsp(unsigned int family)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpio_data cp;</div><div class='ctx'> 	void **data;</div><div class='hunk'>@@ -243,8 +259,10 @@ void __init load_ucode_amd_bsp(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	cp = find_ucode_in_initrd();</div><div class='del'>-	if (!cp.data)</div><div class='del'>-		return;</div><div class='add'>+	if (!cp.data) {</div><div class='add'>+		if (!load_builtin_amd_microcode(&amp;cp, family))</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	*data = cp.data;</div><div class='ctx'> 	*size = cp.size;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c<br/>index 36a83617eb21..6236a54a63f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/core.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/core.c</a></div><div class='hunk'>@@ -1,74 +1,16 @@</div><div class='ctx'> /*</div><div class='del'>- *	Intel CPU Microcode Update Driver for Linux</div><div class='add'>+ * CPU Microcode Update Driver for Linux</div><div class='ctx'>  *</div><div class='del'>- *	Copyright (C) 2000-2006 Tigran Aivazian &lt;tigran@aivazian.fsnet.co.uk&gt;</div><div class='del'>- *		      2006	Shaohua Li &lt;shaohua.li@intel.com&gt;</div><div class='add'>+ * Copyright (C) 2000-2006 Tigran Aivazian &lt;tigran@aivazian.fsnet.co.uk&gt;</div><div class='add'>+ *	      2006	Shaohua Li &lt;shaohua.li@intel.com&gt;</div><div class='add'>+ *	      2013-2015	Borislav Petkov &lt;bp@alien8.de&gt;</div><div class='ctx'>  *</div><div class='del'>- *	This driver allows to upgrade microcode on Intel processors</div><div class='del'>- *	belonging to IA-32 family - PentiumPro, Pentium II,</div><div class='del'>- *	Pentium III, Xeon, Pentium 4, etc.</div><div class='add'>+ * This driver allows to upgrade microcode on x86 processors.</div><div class='ctx'>  *</div><div class='del'>- *	Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture</div><div class='del'>- *	Software Developer's Manual</div><div class='del'>- *	Order Number 253668 or free download from:</div><div class='del'>- *</div><div class='del'>- *	http://developer.intel.com/Assets/PDF/manual/253668.pdf	</div><div class='del'>- *</div><div class='del'>- *	For more information, go to http://www.urbanmyth.org/microcode</div><div class='del'>- *</div><div class='del'>- *	This program is free software; you can redistribute it and/or</div><div class='del'>- *	modify it under the terms of the GNU General Public License</div><div class='del'>- *	as published by the Free Software Foundation; either version</div><div class='del'>- *	2 of the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *	1.0	16 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Initial release.</div><div class='del'>- *	1.01	18 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Added read() support + cleanups.</div><div class='del'>- *	1.02	21 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Added 'device trimming' support. open(O_WRONLY) zeroes</div><div class='del'>- *		and frees the saved copy of applied microcode.</div><div class='del'>- *	1.03	29 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Made to use devfs (/dev/cpu/microcode) + cleanups.</div><div class='del'>- *	1.04	06 Jun 2000, Simon Trimmer &lt;simon@veritas.com&gt;</div><div class='del'>- *		Added misc device support (now uses both devfs and misc).</div><div class='del'>- *		Added MICROCODE_IOCFREE ioctl to clear memory.</div><div class='del'>- *	1.05	09 Jun 2000, Simon Trimmer &lt;simon@veritas.com&gt;</div><div class='del'>- *		Messages for error cases (non Intel &amp; no suitable microcode).</div><div class='del'>- *	1.06	03 Aug 2000, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Removed -&gt;release(). Removed exclusive open and status bitmap.</div><div class='del'>- *		Added microcode_rwsem to serialize read()/write()/ioctl().</div><div class='del'>- *		Removed global kernel lock usage.</div><div class='del'>- *	1.07	07 Sep 2000, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Write 0 to 0x8B msr and then cpuid before reading revision,</div><div class='del'>- *		so that it works even if there were no update done by the</div><div class='del'>- *		BIOS. Otherwise, reading from 0x8B gives junk (which happened</div><div class='del'>- *		to be 0 on my machine which is why it worked even when I</div><div class='del'>- *		disabled update by the BIOS)</div><div class='del'>- *		Thanks to Eric W. Biederman &lt;ebiederman@lnxi.com&gt; for the fix.</div><div class='del'>- *	1.08	11 Dec 2000, Richard Schaal &lt;richard.schaal@intel.com&gt; and</div><div class='del'>- *			     Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Intel Pentium 4 processor support and bugfixes.</div><div class='del'>- *	1.09	30 Oct 2001, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Bugfix for HT (Hyper-Threading) enabled processors</div><div class='del'>- *		whereby processor resources are shared by all logical processors</div><div class='del'>- *		in a single CPU package.</div><div class='del'>- *	1.10	28 Feb 2002 Asit K Mallick &lt;asit.k.mallick@intel.com&gt; and</div><div class='del'>- *		Tigran Aivazian &lt;tigran@veritas.com&gt;,</div><div class='del'>- *		Serialize updates as required on HT processors due to</div><div class='del'>- *		speculative nature of implementation.</div><div class='del'>- *	1.11	22 Mar 2002 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Fix the panic when writing zero-length microcode chunk.</div><div class='del'>- *	1.12	29 Sep 2003 Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;,</div><div class='del'>- *		Jun Nakajima &lt;jun.nakajima@intel.com&gt;</div><div class='del'>- *		Support for the microcode updates in the new format.</div><div class='del'>- *	1.13	10 Oct 2003 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Removed -&gt;read() method and obsoleted MICROCODE_IOCFREE ioctl</div><div class='del'>- *		because we no longer hold a copy of applied microcode</div><div class='del'>- *		in kernel memory.</div><div class='del'>- *	1.14	25 Jun 2004 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Fix sigmatch() macro to handle old CPUs with pf == 0.</div><div class='del'>- *		Thanks to Stuart Swales for pointing out this bug.</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version</div><div class='add'>+ * 2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/core_early.c b/arch/x86/kernel/cpu/microcode/core_early.c<br/>index a413a69cbd74..8ebc421d6299 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/core_early.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/core_early.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/core_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/core_early.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  *	Copyright (C) 2012 Fenghua Yu &lt;fenghua.yu@intel.com&gt;</div><div class='ctx'>  *			   H Peter Anvin" &lt;hpa@zytor.com&gt;</div><div class='add'>+ *		  (C) 2015 Borislav Petkov &lt;bp@alien8.de&gt;</div><div class='ctx'>  *</div><div class='ctx'>  *	This driver allows to early upgrade microcode on Intel processors</div><div class='ctx'>  *	belonging to IA-32 family - PentiumPro, Pentium II,</div><div class='hunk'>@@ -17,6 +18,7 @@</div><div class='ctx'>  *	2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/microcode.h&gt;</div><div class='ctx'> #include &lt;asm/microcode_intel.h&gt;</div><div class='ctx'> #include &lt;asm/microcode_amd.h&gt;</div><div class='hunk'>@@ -43,9 +45,29 @@ static bool __init check_loader_disabled_bsp(void)</div><div class='ctx'> 	return *res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern struct builtin_fw __start_builtin_fw[];</div><div class='add'>+extern struct builtin_fw __end_builtin_fw[];</div><div class='add'>+</div><div class='add'>+bool get_builtin_firmware(struct cpio_data *cd, const char *name)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_FW_LOADER</div><div class='add'>+	struct builtin_fw *b_fw;</div><div class='add'>+</div><div class='add'>+	for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {</div><div class='add'>+		if (!strcmp(name, b_fw-&gt;name)) {</div><div class='add'>+			cd-&gt;size = b_fw-&gt;size;</div><div class='add'>+			cd-&gt;data = b_fw-&gt;data;</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init load_ucode_bsp(void)</div><div class='ctx'> {</div><div class='del'>-	int vendor, family;</div><div class='add'>+	int vendor;</div><div class='add'>+	unsigned int family;</div><div class='ctx'> </div><div class='ctx'> 	if (check_loader_disabled_bsp())</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -63,7 +85,7 @@ void __init load_ucode_bsp(void)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case X86_VENDOR_AMD:</div><div class='ctx'> 		if (family &gt;= 0x10)</div><div class='del'>-			load_ucode_amd_bsp();</div><div class='add'>+			load_ucode_amd_bsp(family);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c<br/>index a41beadb3db9..969dc17eb1b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/intel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel.c</a></div><div class='hunk'>@@ -1,74 +1,13 @@</div><div class='ctx'> /*</div><div class='del'>- *	Intel CPU Microcode Update Driver for Linux</div><div class='add'>+ * Intel CPU Microcode Update Driver for Linux</div><div class='ctx'>  *</div><div class='del'>- *	Copyright (C) 2000-2006 Tigran Aivazian &lt;tigran@aivazian.fsnet.co.uk&gt;</div><div class='del'>- *		      2006	Shaohua Li &lt;shaohua.li@intel.com&gt;</div><div class='add'>+ * Copyright (C) 2000-2006 Tigran Aivazian &lt;tigran@aivazian.fsnet.co.uk&gt;</div><div class='add'>+ *		 2006 Shaohua Li &lt;shaohua.li@intel.com&gt;</div><div class='ctx'>  *</div><div class='del'>- *	This driver allows to upgrade microcode on Intel processors</div><div class='del'>- *	belonging to IA-32 family - PentiumPro, Pentium II,</div><div class='del'>- *	Pentium III, Xeon, Pentium 4, etc.</div><div class='del'>- *</div><div class='del'>- *	Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture</div><div class='del'>- *	Software Developer's Manual</div><div class='del'>- *	Order Number 253668 or free download from:</div><div class='del'>- *</div><div class='del'>- *	http://developer.intel.com/Assets/PDF/manual/253668.pdf	</div><div class='del'>- *</div><div class='del'>- *	For more information, go to http://www.urbanmyth.org/microcode</div><div class='del'>- *</div><div class='del'>- *	This program is free software; you can redistribute it and/or</div><div class='del'>- *	modify it under the terms of the GNU General Public License</div><div class='del'>- *	as published by the Free Software Foundation; either version</div><div class='del'>- *	2 of the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *	1.0	16 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Initial release.</div><div class='del'>- *	1.01	18 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Added read() support + cleanups.</div><div class='del'>- *	1.02	21 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Added 'device trimming' support. open(O_WRONLY) zeroes</div><div class='del'>- *		and frees the saved copy of applied microcode.</div><div class='del'>- *	1.03	29 Feb 2000, Tigran Aivazian &lt;tigran@sco.com&gt;</div><div class='del'>- *		Made to use devfs (/dev/cpu/microcode) + cleanups.</div><div class='del'>- *	1.04	06 Jun 2000, Simon Trimmer &lt;simon@veritas.com&gt;</div><div class='del'>- *		Added misc device support (now uses both devfs and misc).</div><div class='del'>- *		Added MICROCODE_IOCFREE ioctl to clear memory.</div><div class='del'>- *	1.05	09 Jun 2000, Simon Trimmer &lt;simon@veritas.com&gt;</div><div class='del'>- *		Messages for error cases (non Intel &amp; no suitable microcode).</div><div class='del'>- *	1.06	03 Aug 2000, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Removed -&gt;release(). Removed exclusive open and status bitmap.</div><div class='del'>- *		Added microcode_rwsem to serialize read()/write()/ioctl().</div><div class='del'>- *		Removed global kernel lock usage.</div><div class='del'>- *	1.07	07 Sep 2000, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Write 0 to 0x8B msr and then cpuid before reading revision,</div><div class='del'>- *		so that it works even if there were no update done by the</div><div class='del'>- *		BIOS. Otherwise, reading from 0x8B gives junk (which happened</div><div class='del'>- *		to be 0 on my machine which is why it worked even when I</div><div class='del'>- *		disabled update by the BIOS)</div><div class='del'>- *		Thanks to Eric W. Biederman &lt;ebiederman@lnxi.com&gt; for the fix.</div><div class='del'>- *	1.08	11 Dec 2000, Richard Schaal &lt;richard.schaal@intel.com&gt; and</div><div class='del'>- *			     Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Intel Pentium 4 processor support and bugfixes.</div><div class='del'>- *	1.09	30 Oct 2001, Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Bugfix for HT (Hyper-Threading) enabled processors</div><div class='del'>- *		whereby processor resources are shared by all logical processors</div><div class='del'>- *		in a single CPU package.</div><div class='del'>- *	1.10	28 Feb 2002 Asit K Mallick &lt;asit.k.mallick@intel.com&gt; and</div><div class='del'>- *		Tigran Aivazian &lt;tigran@veritas.com&gt;,</div><div class='del'>- *		Serialize updates as required on HT processors due to</div><div class='del'>- *		speculative nature of implementation.</div><div class='del'>- *	1.11	22 Mar 2002 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Fix the panic when writing zero-length microcode chunk.</div><div class='del'>- *	1.12	29 Sep 2003 Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;,</div><div class='del'>- *		Jun Nakajima &lt;jun.nakajima@intel.com&gt;</div><div class='del'>- *		Support for the microcode updates in the new format.</div><div class='del'>- *	1.13	10 Oct 2003 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Removed -&gt;read() method and obsoleted MICROCODE_IOCFREE ioctl</div><div class='del'>- *		because we no longer hold a copy of applied microcode</div><div class='del'>- *		in kernel memory.</div><div class='del'>- *	1.14	25 Jun 2004 Tigran Aivazian &lt;tigran@veritas.com&gt;</div><div class='del'>- *		Fix sigmatch() macro to handle old CPUs with pf == 0.</div><div class='del'>- *		Thanks to Stuart Swales for pointing out this bug.</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version</div><div class='add'>+ * 2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='hunk'>@@ -124,7 +63,7 @@ static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)</div><div class='ctx'> 	cpf = cpu_sig.pf;</div><div class='ctx'> 	crev = cpu_sig.rev;</div><div class='ctx'> </div><div class='del'>-	return get_matching_microcode(csig, cpf, crev, mc_intel);</div><div class='add'>+	return has_newer_microcode(mc_intel, csig, cpf, crev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int apply_microcode_intel(int cpu)</div><div class='hunk'>@@ -226,7 +165,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,</div><div class='ctx'> </div><div class='ctx'> 		csig = uci-&gt;cpu_sig.sig;</div><div class='ctx'> 		cpf = uci-&gt;cpu_sig.pf;</div><div class='del'>-		if (get_matching_microcode(csig, cpf, new_rev, mc)) {</div><div class='add'>+		if (has_newer_microcode(mc, csig, cpf, new_rev)) {</div><div class='ctx'> 			vfree(new_mc);</div><div class='ctx'> 			new_rev = mc_header.rev;</div><div class='ctx'> 			new_mc  = mc;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel_early.c b/arch/x86/kernel/cpu/microcode/intel_early.c<br/>index 2f49ab4ac0ae..8187b7247d1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel_early.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/intel_early.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel_early.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel_early.c</a></div><div class='hunk'>@@ -59,10 +59,10 @@ load_microcode_early(struct microcode_intel **saved,</div><div class='ctx'> 		ucode_ptr = saved[i];</div><div class='ctx'> 		mc_hdr	  = (struct microcode_header_intel *)ucode_ptr;</div><div class='ctx'> </div><div class='del'>-		ret = get_matching_microcode(uci-&gt;cpu_sig.sig,</div><div class='del'>-					     uci-&gt;cpu_sig.pf,</div><div class='del'>-					     new_rev,</div><div class='del'>-					     ucode_ptr);</div><div class='add'>+		ret = has_newer_microcode(ucode_ptr,</div><div class='add'>+					  uci-&gt;cpu_sig.sig,</div><div class='add'>+					  uci-&gt;cpu_sig.pf,</div><div class='add'>+					  new_rev);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -246,7 +246,7 @@ static unsigned int _save_mc(struct microcode_intel **mc_saved,</div><div class='ctx'> 			     u8 *ucode_ptr, unsigned int num_saved)</div><div class='ctx'> {</div><div class='ctx'> 	struct microcode_header_intel *mc_hdr, *mc_saved_hdr;</div><div class='del'>-	unsigned int sig, pf, new_rev;</div><div class='add'>+	unsigned int sig, pf;</div><div class='ctx'> 	int found = 0, i;</div><div class='ctx'> </div><div class='ctx'> 	mc_hdr = (struct microcode_header_intel *)ucode_ptr;</div><div class='hunk'>@@ -255,14 +255,13 @@ static unsigned int _save_mc(struct microcode_intel **mc_saved,</div><div class='ctx'> 		mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];</div><div class='ctx'> 		sig	     = mc_saved_hdr-&gt;sig;</div><div class='ctx'> 		pf	     = mc_saved_hdr-&gt;pf;</div><div class='del'>-		new_rev	     = mc_hdr-&gt;rev;</div><div class='ctx'> </div><div class='del'>-		if (!get_matching_sig(sig, pf, new_rev, ucode_ptr))</div><div class='add'>+		if (!find_matching_signature(ucode_ptr, sig, pf))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		found = 1;</div><div class='ctx'> </div><div class='del'>-		if (!revision_is_newer(mc_hdr, new_rev))</div><div class='add'>+		if (mc_hdr-&gt;rev &lt;= mc_saved_hdr-&gt;rev)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -522,6 +521,27 @@ out:</div><div class='ctx'> EXPORT_SYMBOL_GPL(save_mc_for_early);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static bool __init load_builtin_intel_microcode(struct cpio_data *cp)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	unsigned int eax = 0x00000001, ebx, ecx = 0, edx;</div><div class='add'>+	unsigned int family, model, stepping;</div><div class='add'>+	char name[30];</div><div class='add'>+</div><div class='add'>+	native_cpuid(&amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+</div><div class='add'>+	family   = __x86_family(eax);</div><div class='add'>+	model    = x86_model(eax);</div><div class='add'>+	stepping = eax &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping);</div><div class='add'>+</div><div class='add'>+	return get_builtin_firmware(cp, name);</div><div class='add'>+#else</div><div class='add'>+	return false;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";</div><div class='ctx'> static __init enum ucode_state</div><div class='ctx'> scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,</div><div class='hunk'>@@ -540,8 +560,10 @@ scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,</div><div class='ctx'> 	cd.size = 0;</div><div class='ctx'> </div><div class='ctx'> 	cd = find_cpio_data(p, (void *)start, size, &amp;offset);</div><div class='del'>-	if (!cd.data)</div><div class='del'>-		return UCODE_ERROR;</div><div class='add'>+	if (!cd.data) {</div><div class='add'>+		if (!load_builtin_intel_microcode(&amp;cd))</div><div class='add'>+			return UCODE_ERROR;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return get_matching_model_microcode(0, start, cd.data, cd.size,</div><div class='ctx'> 					    mc_saved_data, initrd, uci);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel_lib.c b/arch/x86/kernel/cpu/microcode/intel_lib.c<br/>index cd47a510a3f1..1883d252ff7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel_lib.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/microcode/intel_lib.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/microcode/intel_lib.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/microcode/intel_lib.c</a></div><div class='hunk'>@@ -31,11 +31,18 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline int</div><div class='del'>-update_match_cpu(unsigned int csig, unsigned int cpf,</div><div class='del'>-		 unsigned int sig, unsigned int pf)</div><div class='add'>+static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,</div><div class='add'>+					unsigned int s2, unsigned int p2)</div><div class='ctx'> {</div><div class='del'>-	return (!sigmatch(sig, csig, pf, cpf)) ? 0 : 1;</div><div class='add'>+	if (s1 != s2)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Processor flags are either both 0 ... */</div><div class='add'>+	if (!p1 &amp;&amp; !p2)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* ... or they intersect. */</div><div class='add'>+	return p1 &amp; p2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int microcode_sanity_check(void *mc, int print_err)</div><div class='hunk'>@@ -124,27 +131,25 @@ EXPORT_SYMBOL_GPL(microcode_sanity_check);</div><div class='ctx'> /*</div><div class='ctx'>  * Returns 1 if update has been found, 0 otherwise.</div><div class='ctx'>  */</div><div class='del'>-int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc)</div><div class='add'>+int find_matching_signature(void *mc, unsigned int csig, int cpf)</div><div class='ctx'> {</div><div class='del'>-	struct microcode_header_intel *mc_header = mc;</div><div class='del'>-	struct extended_sigtable *ext_header;</div><div class='del'>-	unsigned long total_size = get_totalsize(mc_header);</div><div class='del'>-	int ext_sigcount, i;</div><div class='add'>+	struct microcode_header_intel *mc_hdr = mc;</div><div class='add'>+	struct extended_sigtable *ext_hdr;</div><div class='ctx'> 	struct extended_signature *ext_sig;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	if (update_match_cpu(csig, cpf, mc_header-&gt;sig, mc_header-&gt;pf))</div><div class='add'>+	if (cpu_signatures_match(csig, cpf, mc_hdr-&gt;sig, mc_hdr-&gt;pf))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Look for ext. headers: */</div><div class='del'>-	if (total_size &lt;= get_datasize(mc_header) + MC_HEADER_SIZE)</div><div class='add'>+	if (get_totalsize(mc_hdr) &lt;= get_datasize(mc_hdr) + MC_HEADER_SIZE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;</div><div class='del'>-	ext_sigcount = ext_header-&gt;count;</div><div class='del'>-	ext_sig = (void *)ext_header + EXT_HEADER_SIZE;</div><div class='add'>+	ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;</div><div class='add'>+	ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ext_sigcount; i++) {</div><div class='del'>-		if (update_match_cpu(csig, cpf, ext_sig-&gt;sig, ext_sig-&gt;pf))</div><div class='add'>+	for (i = 0; i &lt; ext_hdr-&gt;count; i++) {</div><div class='add'>+		if (cpu_signatures_match(csig, cpf, ext_sig-&gt;sig, ext_sig-&gt;pf))</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		ext_sig++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -154,13 +159,13 @@ int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc)</div><div class='ctx'> /*</div><div class='ctx'>  * Returns 1 if update has been found, 0 otherwise.</div><div class='ctx'>  */</div><div class='del'>-int get_matching_microcode(unsigned int csig, int cpf, int rev, void *mc)</div><div class='add'>+int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)</div><div class='ctx'> {</div><div class='ctx'> 	struct microcode_header_intel *mc_hdr = mc;</div><div class='ctx'> </div><div class='del'>-	if (!revision_is_newer(mc_hdr, rev))</div><div class='add'>+	if (mc_hdr-&gt;rev &lt;= new_rev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return get_matching_sig(csig, cpf, rev, mc);</div><div class='add'>+	return find_matching_signature(mc, csig, cpf);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(get_matching_microcode);</div><div class='add'>+EXPORT_SYMBOL_GPL(has_newer_microcode);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c<br/>index 939155ffdece..aad4bd84b475 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mshyperv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mshyperv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mshyperv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mshyperv.c</a></div><div class='hunk'>@@ -39,14 +39,12 @@ void hyperv_vector_handler(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='del'>-	irq_enter();</div><div class='del'>-	exit_idle();</div><div class='del'>-</div><div class='add'>+	entering_irq();</div><div class='ctx'> 	inc_irq_stat(irq_hv_callback_count);</div><div class='ctx'> 	if (vmbus_handler)</div><div class='ctx'> 		vmbus_handler();</div><div class='ctx'> </div><div class='del'>-	irq_exit();</div><div class='add'>+	exiting_irq();</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c<br/>index 5f90b85ff22e..70d7c93f4550 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/cleanup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mtrr/cleanup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/cleanup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/cleanup.c</a></div><div class='hunk'>@@ -98,7 +98,8 @@ x86_get_mtrr_mem_range(struct range *range, int nr_range,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		base = range_state[i].base_pfn;</div><div class='ctx'> 		if (base &lt; (1&lt;&lt;(20-PAGE_SHIFT)) &amp;&amp; mtrr_state.have_fixed &amp;&amp;</div><div class='del'>-		    (mtrr_state.enabled &amp; 1)) {</div><div class='add'>+		    (mtrr_state.enabled &amp; MTRR_STATE_MTRR_ENABLED) &amp;&amp;</div><div class='add'>+		    (mtrr_state.enabled &amp; MTRR_STATE_MTRR_FIXED_ENABLED)) {</div><div class='ctx'> 			/* Var MTRR contains UC entry below 1M? Skip it: */</div><div class='ctx'> 			printk(BIOS_BUG_MSG, i);</div><div class='ctx'> 			if (base + size &lt;= (1&lt;&lt;(20-PAGE_SHIFT)))</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c<br/>index 7d74f7b3c6ba..3b533cf37c74 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/generic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mtrr/generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/generic.c</a></div><div class='hunk'>@@ -102,59 +102,76 @@ static int check_type_overlap(u8 *prev, u8 *curr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Error/Semi-error returns:</div><div class='del'>- * 0xFF - when MTRR is not enabled</div><div class='del'>- * *repeat == 1 implies [start:end] spanned across MTRR range and type returned</div><div class='del'>- *		corresponds only to [start:*partial_end].</div><div class='del'>- *		Caller has to lookup again for [*partial_end:end].</div><div class='add'>+/**</div><div class='add'>+ * mtrr_type_lookup_fixed - look up memory type in MTRR fixed entries</div><div class='add'>+ *</div><div class='add'>+ * Return the MTRR fixed memory type of 'start'.</div><div class='add'>+ *</div><div class='add'>+ * MTRR fixed entries are divided into the following ways:</div><div class='add'>+ *  0x00000 - 0x7FFFF : This range is divided into eight 64KB sub-ranges</div><div class='add'>+ *  0x80000 - 0xBFFFF : This range is divided into sixteen 16KB sub-ranges</div><div class='add'>+ *  0xC0000 - 0xFFFFF : This range is divided into sixty-four 4KB sub-ranges</div><div class='add'>+ *</div><div class='add'>+ * Return Values:</div><div class='add'>+ * MTRR_TYPE_(type)  - Matched memory type</div><div class='add'>+ * MTRR_TYPE_INVALID - Unmatched</div><div class='add'>+ */</div><div class='add'>+static u8 mtrr_type_lookup_fixed(u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	if (start &gt;= 0x100000)</div><div class='add'>+		return MTRR_TYPE_INVALID;</div><div class='add'>+</div><div class='add'>+	/* 0x0 - 0x7FFFF */</div><div class='add'>+	if (start &lt; 0x80000) {</div><div class='add'>+		idx = 0;</div><div class='add'>+		idx += (start &gt;&gt; 16);</div><div class='add'>+		return mtrr_state.fixed_ranges[idx];</div><div class='add'>+	/* 0x80000 - 0xBFFFF */</div><div class='add'>+	} else if (start &lt; 0xC0000) {</div><div class='add'>+		idx = 1 * 8;</div><div class='add'>+		idx += ((start - 0x80000) &gt;&gt; 14);</div><div class='add'>+		return mtrr_state.fixed_ranges[idx];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 0xC0000 - 0xFFFFF */</div><div class='add'>+	idx = 3 * 8;</div><div class='add'>+	idx += ((start - 0xC0000) &gt;&gt; 12);</div><div class='add'>+	return mtrr_state.fixed_ranges[idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mtrr_type_lookup_variable - look up memory type in MTRR variable entries</div><div class='add'>+ *</div><div class='add'>+ * Return Value:</div><div class='add'>+ * MTRR_TYPE_(type) - Matched memory type or default memory type (unmatched)</div><div class='add'>+ *</div><div class='add'>+ * Output Arguments:</div><div class='add'>+ * repeat - Set to 1 when [start:end] spanned across MTRR range and type</div><div class='add'>+ *	    returned corresponds only to [start:*partial_end].  Caller has</div><div class='add'>+ *	    to lookup again for [*partial_end:end].</div><div class='add'>+ *</div><div class='add'>+ * uniform - Set to 1 when an MTRR covers the region uniformly, i.e. the</div><div class='add'>+ *	     region is fully covered by a single MTRR entry or the default</div><div class='add'>+ *	     type.</div><div class='ctx'>  */</div><div class='del'>-static u8 __mtrr_type_lookup(u64 start, u64 end, u64 *partial_end, int *repeat)</div><div class='add'>+static u8 mtrr_type_lookup_variable(u64 start, u64 end, u64 *partial_end,</div><div class='add'>+				    int *repeat, u8 *uniform)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u64 base, mask;</div><div class='ctx'> 	u8 prev_match, curr_match;</div><div class='ctx'> </div><div class='ctx'> 	*repeat = 0;</div><div class='del'>-	if (!mtrr_state_set)</div><div class='del'>-		return 0xFF;</div><div class='del'>-</div><div class='del'>-	if (!mtrr_state.enabled)</div><div class='del'>-		return 0xFF;</div><div class='add'>+	*uniform = 1;</div><div class='ctx'> </div><div class='del'>-	/* Make end inclusive end, instead of exclusive */</div><div class='add'>+	/* Make end inclusive instead of exclusive */</div><div class='ctx'> 	end--;</div><div class='ctx'> </div><div class='del'>-	/* Look in fixed ranges. Just return the type as per start */</div><div class='del'>-	if (mtrr_state.have_fixed &amp;&amp; (start &lt; 0x100000)) {</div><div class='del'>-		int idx;</div><div class='del'>-</div><div class='del'>-		if (start &lt; 0x80000) {</div><div class='del'>-			idx = 0;</div><div class='del'>-			idx += (start &gt;&gt; 16);</div><div class='del'>-			return mtrr_state.fixed_ranges[idx];</div><div class='del'>-		} else if (start &lt; 0xC0000) {</div><div class='del'>-			idx = 1 * 8;</div><div class='del'>-			idx += ((start - 0x80000) &gt;&gt; 14);</div><div class='del'>-			return mtrr_state.fixed_ranges[idx];</div><div class='del'>-		} else if (start &lt; 0x1000000) {</div><div class='del'>-			idx = 3 * 8;</div><div class='del'>-			idx += ((start - 0xC0000) &gt;&gt; 12);</div><div class='del'>-			return mtrr_state.fixed_ranges[idx];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Look in variable ranges</div><div class='del'>-	 * Look of multiple ranges matching this address and pick type</div><div class='del'>-	 * as per MTRR precedence</div><div class='del'>-	 */</div><div class='del'>-	if (!(mtrr_state.enabled &amp; 2))</div><div class='del'>-		return mtrr_state.def_type;</div><div class='del'>-</div><div class='del'>-	prev_match = 0xFF;</div><div class='add'>+	prev_match = MTRR_TYPE_INVALID;</div><div class='ctx'> 	for (i = 0; i &lt; num_var_ranges; ++i) {</div><div class='del'>-		unsigned short start_state, end_state;</div><div class='add'>+		unsigned short start_state, end_state, inclusive;</div><div class='ctx'> </div><div class='ctx'> 		if (!(mtrr_state.var_ranges[i].mask_lo &amp; (1 &lt;&lt; 11)))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -166,20 +183,29 @@ static u8 __mtrr_type_lookup(u64 start, u64 end, u64 *partial_end, int *repeat)</div><div class='ctx'> </div><div class='ctx'> 		start_state = ((start &amp; mask) == (base &amp; mask));</div><div class='ctx'> 		end_state = ((end &amp; mask) == (base &amp; mask));</div><div class='add'>+		inclusive = ((start &lt; base) &amp;&amp; (end &gt; base));</div><div class='ctx'> </div><div class='del'>-		if (start_state != end_state) {</div><div class='add'>+		if ((start_state != end_state) || inclusive) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * We have start:end spanning across an MTRR.</div><div class='del'>-			 * We split the region into</div><div class='del'>-			 * either</div><div class='del'>-			 * (start:mtrr_end) (mtrr_end:end)</div><div class='del'>-			 * or</div><div class='del'>-			 * (start:mtrr_start) (mtrr_start:end)</div><div class='add'>+			 * We split the region into either</div><div class='add'>+			 *</div><div class='add'>+			 * - start_state:1</div><div class='add'>+			 * (start:mtrr_end)(mtrr_end:end)</div><div class='add'>+			 * - end_state:1</div><div class='add'>+			 * (start:mtrr_start)(mtrr_start:end)</div><div class='add'>+			 * - inclusive:1</div><div class='add'>+			 * (start:mtrr_start)(mtrr_start:mtrr_end)(mtrr_end:end)</div><div class='add'>+			 *</div><div class='ctx'> 			 * depending on kind of overlap.</div><div class='del'>-			 * Return the type for first region and a pointer to</div><div class='del'>-			 * the start of second region so that caller will</div><div class='del'>-			 * lookup again on the second region.</div><div class='del'>-			 * Note: This way we handle multiple overlaps as well.</div><div class='add'>+			 *</div><div class='add'>+			 * Return the type of the first region and a pointer</div><div class='add'>+			 * to the start of next region so that caller will be</div><div class='add'>+			 * advised to lookup again after having adjusted start</div><div class='add'>+			 * and end.</div><div class='add'>+			 *</div><div class='add'>+			 * Note: This way we handle overlaps with multiple</div><div class='add'>+			 * entries and the default type properly.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (start_state)</div><div class='ctx'> 				*partial_end = base + get_mtrr_size(mask);</div><div class='hunk'>@@ -193,59 +219,94 @@ static u8 __mtrr_type_lookup(u64 start, u64 end, u64 *partial_end, int *repeat)</div><div class='ctx'> </div><div class='ctx'> 			end = *partial_end - 1; /* end is inclusive */</div><div class='ctx'> 			*repeat = 1;</div><div class='add'>+			*uniform = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if ((start &amp; mask) != (base &amp; mask))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		curr_match = mtrr_state.var_ranges[i].base_lo &amp; 0xff;</div><div class='del'>-		if (prev_match == 0xFF) {</div><div class='add'>+		if (prev_match == MTRR_TYPE_INVALID) {</div><div class='ctx'> 			prev_match = curr_match;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		*uniform = 0;</div><div class='ctx'> 		if (check_type_overlap(&amp;prev_match, &amp;curr_match))</div><div class='ctx'> 			return curr_match;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mtrr_tom2) {</div><div class='del'>-		if (start &gt;= (1ULL&lt;&lt;32) &amp;&amp; (end &lt; mtrr_tom2))</div><div class='del'>-			return MTRR_TYPE_WRBACK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (prev_match != 0xFF)</div><div class='add'>+	if (prev_match != MTRR_TYPE_INVALID)</div><div class='ctx'> 		return prev_match;</div><div class='ctx'> </div><div class='ctx'> 	return mtrr_state.def_type;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Returns the effective MTRR type for the region</div><div class='del'>- * Error return:</div><div class='del'>- * 0xFF - when MTRR is not enabled</div><div class='add'>+/**</div><div class='add'>+ * mtrr_type_lookup - look up memory type in MTRR</div><div class='add'>+ *</div><div class='add'>+ * Return Values:</div><div class='add'>+ * MTRR_TYPE_(type)  - The effective MTRR type for the region</div><div class='add'>+ * MTRR_TYPE_INVALID - MTRR is disabled</div><div class='add'>+ *</div><div class='add'>+ * Output Argument:</div><div class='add'>+ * uniform - Set to 1 when an MTRR covers the region uniformly, i.e. the</div><div class='add'>+ *	     region is fully covered by a single MTRR entry or the default</div><div class='add'>+ *	     type.</div><div class='ctx'>  */</div><div class='del'>-u8 mtrr_type_lookup(u64 start, u64 end)</div><div class='add'>+u8 mtrr_type_lookup(u64 start, u64 end, u8 *uniform)</div><div class='ctx'> {</div><div class='del'>-	u8 type, prev_type;</div><div class='add'>+	u8 type, prev_type, is_uniform = 1, dummy;</div><div class='ctx'> 	int repeat;</div><div class='ctx'> 	u64 partial_end;</div><div class='ctx'> </div><div class='del'>-	type = __mtrr_type_lookup(start, end, &amp;partial_end, &amp;repeat);</div><div class='add'>+	if (!mtrr_state_set)</div><div class='add'>+		return MTRR_TYPE_INVALID;</div><div class='add'>+</div><div class='add'>+	if (!(mtrr_state.enabled &amp; MTRR_STATE_MTRR_ENABLED))</div><div class='add'>+		return MTRR_TYPE_INVALID;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Look up the fixed ranges first, which take priority over</div><div class='add'>+	 * the variable ranges.</div><div class='add'>+	 */</div><div class='add'>+	if ((start &lt; 0x100000) &amp;&amp;</div><div class='add'>+	    (mtrr_state.have_fixed) &amp;&amp;</div><div class='add'>+	    (mtrr_state.enabled &amp; MTRR_STATE_MTRR_FIXED_ENABLED)) {</div><div class='add'>+		is_uniform = 0;</div><div class='add'>+		type = mtrr_type_lookup_fixed(start, end);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Look up the variable ranges.  Look of multiple ranges matching</div><div class='add'>+	 * this address and pick type as per MTRR precedence.</div><div class='add'>+	 */</div><div class='add'>+	type = mtrr_type_lookup_variable(start, end, &amp;partial_end,</div><div class='add'>+					 &amp;repeat, &amp;is_uniform);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Common path is with repeat = 0.</div><div class='ctx'> 	 * However, we can have cases where [start:end] spans across some</div><div class='del'>-	 * MTRR range. Do repeated lookups for that case here.</div><div class='add'>+	 * MTRR ranges and/or the default type.  Do repeated lookups for</div><div class='add'>+	 * that case here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	while (repeat) {</div><div class='ctx'> 		prev_type = type;</div><div class='ctx'> 		start = partial_end;</div><div class='del'>-		type = __mtrr_type_lookup(start, end, &amp;partial_end, &amp;repeat);</div><div class='add'>+		is_uniform = 0;</div><div class='add'>+		type = mtrr_type_lookup_variable(start, end, &amp;partial_end,</div><div class='add'>+						 &amp;repeat, &amp;dummy);</div><div class='ctx'> </div><div class='ctx'> 		if (check_type_overlap(&amp;prev_type, &amp;type))</div><div class='del'>-			return type;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (mtrr_tom2 &amp;&amp; (start &gt;= (1ULL&lt;&lt;32)) &amp;&amp; (end &lt; mtrr_tom2))</div><div class='add'>+		type = MTRR_TYPE_WRBACK;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	*uniform = is_uniform;</div><div class='ctx'> 	return type;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -347,7 +408,9 @@ static void __init print_mtrr_state(void)</div><div class='ctx'> 		 mtrr_attrib_to_str(mtrr_state.def_type));</div><div class='ctx'> 	if (mtrr_state.have_fixed) {</div><div class='ctx'> 		pr_debug("MTRR fixed ranges %sabled:\n",</div><div class='del'>-			 mtrr_state.enabled &amp; 1 ? "en" : "dis");</div><div class='add'>+			((mtrr_state.enabled &amp; MTRR_STATE_MTRR_ENABLED) &amp;&amp;</div><div class='add'>+			 (mtrr_state.enabled &amp; MTRR_STATE_MTRR_FIXED_ENABLED)) ?</div><div class='add'>+			 "en" : "dis");</div><div class='ctx'> 		print_fixed(0x00000, 0x10000, mtrr_state.fixed_ranges + 0);</div><div class='ctx'> 		for (i = 0; i &lt; 2; ++i)</div><div class='ctx'> 			print_fixed(0x80000 + i * 0x20000, 0x04000,</div><div class='hunk'>@@ -360,7 +423,7 @@ static void __init print_mtrr_state(void)</div><div class='ctx'> 		print_fixed_last();</div><div class='ctx'> 	}</div><div class='ctx'> 	pr_debug("MTRR variable ranges %sabled:\n",</div><div class='del'>-		 mtrr_state.enabled &amp; 2 ? "en" : "dis");</div><div class='add'>+		 mtrr_state.enabled &amp; MTRR_STATE_MTRR_ENABLED ? "en" : "dis");</div><div class='ctx'> 	high_width = (__ffs64(size_or_mask) - (32 - PAGE_SHIFT) + 3) / 4;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_var_ranges; ++i) {</div><div class='hunk'>@@ -382,7 +445,7 @@ static void __init print_mtrr_state(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Grab all of the MTRR state for this CPU into *state */</div><div class='del'>-void __init get_mtrr_state(void)</div><div class='add'>+bool __init get_mtrr_state(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtrr_var_range *vrs;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -426,6 +489,8 @@ void __init get_mtrr_state(void)</div><div class='ctx'> </div><div class='ctx'> 	post_set();</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return !!(mtrr_state.enabled &amp; MTRR_STATE_MTRR_ENABLED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Some BIOS's are messed up and don't set all MTRRs the same! */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c<br/>index ea5f363a1948..e7ed0d8ebacb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/main.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mtrr/main.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/main.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/main.c</a></div><div class='hunk'>@@ -59,6 +59,12 @@</div><div class='ctx'> #define MTRR_TO_PHYS_WC_OFFSET 1000</div><div class='ctx'> </div><div class='ctx'> u32 num_var_ranges;</div><div class='add'>+static bool __mtrr_enabled;</div><div class='add'>+</div><div class='add'>+static bool mtrr_enabled(void)</div><div class='add'>+{</div><div class='add'>+	return __mtrr_enabled;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];</div><div class='ctx'> static DEFINE_MUTEX(mtrr_mutex);</div><div class='hunk'>@@ -286,7 +292,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,</div><div class='ctx'> 	int i, replace, error;</div><div class='ctx'> 	mtrr_type ltype;</div><div class='ctx'> </div><div class='del'>-	if (!mtrr_if)</div><div class='add'>+	if (!mtrr_enabled())</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='ctx'> 	error = mtrr_if-&gt;validate_add_page(base, size, type);</div><div class='hunk'>@@ -435,6 +441,8 @@ static int mtrr_check(unsigned long base, unsigned long size)</div><div class='ctx'> int mtrr_add(unsigned long base, unsigned long size, unsigned int type,</div><div class='ctx'> 	     bool increment)</div><div class='ctx'> {</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	if (mtrr_check(base, size))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	return mtrr_add_page(base &gt;&gt; PAGE_SHIFT, size &gt;&gt; PAGE_SHIFT, type,</div><div class='hunk'>@@ -463,8 +471,8 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)</div><div class='ctx'> 	unsigned long lbase, lsize;</div><div class='ctx'> 	int error = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!mtrr_if)</div><div class='del'>-		return -ENXIO;</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	max = num_var_ranges;</div><div class='ctx'> 	/* No CPU hotplug when we change MTRR entries */</div><div class='hunk'>@@ -523,6 +531,8 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)</div><div class='ctx'>  */</div><div class='ctx'> int mtrr_del(int reg, unsigned long base, unsigned long size)</div><div class='ctx'> {</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	if (mtrr_check(base, size))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	return mtrr_del_page(reg, base &gt;&gt; PAGE_SHIFT, size &gt;&gt; PAGE_SHIFT);</div><div class='hunk'>@@ -538,6 +548,9 @@ EXPORT_SYMBOL(mtrr_del);</div><div class='ctx'>  * attempts to add a WC MTRR covering size bytes starting at base and</div><div class='ctx'>  * logs an error if this fails.</div><div class='ctx'>  *</div><div class='add'>+ * The called should provide a power of two size on an equivalent</div><div class='add'>+ * power of two boundary.</div><div class='add'>+ *</div><div class='ctx'>  * Drivers must store the return value to pass to mtrr_del_wc_if_needed,</div><div class='ctx'>  * but drivers should not try to interpret that return value.</div><div class='ctx'>  */</div><div class='hunk'>@@ -545,7 +558,7 @@ int arch_phys_wc_add(unsigned long base, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (pat_enabled)</div><div class='add'>+	if (pat_enabled() || !mtrr_enabled())</div><div class='ctx'> 		return 0;  /* Success!  (We don't need to do anything.) */</div><div class='ctx'> </div><div class='ctx'> 	ret = mtrr_add(base, size, MTRR_TYPE_WRCOMB, true);</div><div class='hunk'>@@ -577,7 +590,7 @@ void arch_phys_wc_del(int handle)</div><div class='ctx'> EXPORT_SYMBOL(arch_phys_wc_del);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * phys_wc_to_mtrr_index - translates arch_phys_wc_add's return value</div><div class='add'>+ * arch_phys_wc_index - translates arch_phys_wc_add's return value</div><div class='ctx'>  * @handle: Return value from arch_phys_wc_add</div><div class='ctx'>  *</div><div class='ctx'>  * This will turn the return value from arch_phys_wc_add into an mtrr</div><div class='hunk'>@@ -587,14 +600,14 @@ EXPORT_SYMBOL(arch_phys_wc_del);</div><div class='ctx'>  * in printk line.  Alas there is an illegitimate use in some ancient</div><div class='ctx'>  * drm ioctls.</div><div class='ctx'>  */</div><div class='del'>-int phys_wc_to_mtrr_index(int handle)</div><div class='add'>+int arch_phys_wc_index(int handle)</div><div class='ctx'> {</div><div class='ctx'> 	if (handle &lt; MTRR_TO_PHYS_WC_OFFSET)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	else</div><div class='ctx'> 		return handle - MTRR_TO_PHYS_WC_OFFSET;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(phys_wc_to_mtrr_index);</div><div class='add'>+EXPORT_SYMBOL_GPL(arch_phys_wc_index);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * HACK ALERT!</div><div class='hunk'>@@ -734,10 +747,12 @@ void __init mtrr_bp_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mtrr_if) {</div><div class='add'>+		__mtrr_enabled = true;</div><div class='ctx'> 		set_num_var_ranges();</div><div class='ctx'> 		init_table();</div><div class='ctx'> 		if (use_intel()) {</div><div class='del'>-			get_mtrr_state();</div><div class='add'>+			/* BIOS may override */</div><div class='add'>+			__mtrr_enabled = get_mtrr_state();</div><div class='ctx'> </div><div class='ctx'> 			if (mtrr_cleanup(phys_addr)) {</div><div class='ctx'> 				changed_by_mtrr_cleanup = 1;</div><div class='hunk'>@@ -745,10 +760,16 @@ void __init mtrr_bp_init(void)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		pr_info("MTRR: Disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mtrr_ap_init(void)</div><div class='ctx'> {</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (!use_intel() || mtrr_aps_delayed_init)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -774,6 +795,9 @@ void mtrr_save_state(void)</div><div class='ctx'> {</div><div class='ctx'> 	int first_cpu;</div><div class='ctx'> </div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	get_online_cpus();</div><div class='ctx'> 	first_cpu = cpumask_first(cpu_online_mask);</div><div class='ctx'> 	smp_call_function_single(first_cpu, mtrr_save_fixed_ranges, NULL, 1);</div><div class='hunk'>@@ -782,6 +806,8 @@ void mtrr_save_state(void)</div><div class='ctx'> </div><div class='ctx'> void set_mtrr_aps_delayed_init(void)</div><div class='ctx'> {</div><div class='add'>+	if (!mtrr_enabled())</div><div class='add'>+		return;</div><div class='ctx'> 	if (!use_intel())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -793,7 +819,7 @@ void set_mtrr_aps_delayed_init(void)</div><div class='ctx'>  */</div><div class='ctx'> void mtrr_aps_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (!use_intel())</div><div class='add'>+	if (!use_intel() || !mtrr_enabled())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -810,7 +836,7 @@ void mtrr_aps_init(void)</div><div class='ctx'> </div><div class='ctx'> void mtrr_bp_restore(void)</div><div class='ctx'> {</div><div class='del'>-	if (!use_intel())</div><div class='add'>+	if (!use_intel() || !mtrr_enabled())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mtrr_if-&gt;set_all();</div><div class='hunk'>@@ -818,7 +844,7 @@ void mtrr_bp_restore(void)</div><div class='ctx'> </div><div class='ctx'> static int __init mtrr_init_finialize(void)</div><div class='ctx'> {</div><div class='del'>-	if (!mtrr_if)</div><div class='add'>+	if (!mtrr_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (use_intel()) {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h<br/>index df5e41f31a27..951884dcc433 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/mtrr.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/mtrr/mtrr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/mtrr.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/mtrr/mtrr.h</a></div><div class='hunk'>@@ -51,7 +51,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt);</div><div class='ctx'> </div><div class='ctx'> void fill_mtrr_var_range(unsigned int index,</div><div class='ctx'> 		u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi);</div><div class='del'>-void get_mtrr_state(void);</div><div class='add'>+bool get_mtrr_state(void);</div><div class='ctx'> </div><div class='ctx'> extern void set_mtrr_ops(const struct mtrr_ops *ops);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c<br/>index 4f7001f28936..3658de47900f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event.c</a></div><div class='hunk'>@@ -135,6 +135,7 @@ static int x86_pmu_extra_regs(u64 config, struct perf_event *event)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static atomic_t active_events;</div><div class='add'>+static atomic_t pmc_refcount;</div><div class='ctx'> static DEFINE_MUTEX(pmc_reserve_mutex);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='hunk'>@@ -270,11 +271,8 @@ msr_fail:</div><div class='ctx'> </div><div class='ctx'> static void hw_perf_event_destroy(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	if (atomic_dec_and_mutex_lock(&amp;active_events, &amp;pmc_reserve_mutex)) {</div><div class='del'>-		release_pmc_hardware();</div><div class='del'>-		release_ds_buffers();</div><div class='del'>-		mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='del'>-	}</div><div class='add'>+	x86_release_hardware();</div><div class='add'>+	atomic_dec(&amp;active_events);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hw_perf_lbr_event_destroy(struct perf_event *event)</div><div class='hunk'>@@ -324,33 +322,65 @@ set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event *event)</div><div class='ctx'> 	return x86_pmu_extra_regs(val, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int x86_reserve_hardware(void)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!atomic_inc_not_zero(&amp;pmc_refcount)) {</div><div class='add'>+		mutex_lock(&amp;pmc_reserve_mutex);</div><div class='add'>+		if (atomic_read(&amp;pmc_refcount) == 0) {</div><div class='add'>+			if (!reserve_pmc_hardware())</div><div class='add'>+				err = -EBUSY;</div><div class='add'>+			else</div><div class='add'>+				reserve_ds_buffers();</div><div class='add'>+		}</div><div class='add'>+		if (!err)</div><div class='add'>+			atomic_inc(&amp;pmc_refcount);</div><div class='add'>+		mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void x86_release_hardware(void)</div><div class='add'>+{</div><div class='add'>+	if (atomic_dec_and_mutex_lock(&amp;pmc_refcount, &amp;pmc_reserve_mutex)) {</div><div class='add'>+		release_pmc_hardware();</div><div class='add'>+		release_ds_buffers();</div><div class='add'>+		mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Check if we can create event of a certain type (that no conflicting events</div><div class='ctx'>  * are present).</div><div class='ctx'>  */</div><div class='ctx'> int x86_add_exclusive(unsigned int what)</div><div class='ctx'> {</div><div class='del'>-	int ret = -EBUSY, i;</div><div class='del'>-</div><div class='del'>-	if (atomic_inc_not_zero(&amp;x86_pmu.lbr_exclusive[what]))</div><div class='del'>-		return 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pmc_reserve_mutex);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(x86_pmu.lbr_exclusive); i++)</div><div class='del'>-		if (i != what &amp;&amp; atomic_read(&amp;x86_pmu.lbr_exclusive[i]))</div><div class='del'>-			goto out;</div><div class='add'>+	if (!atomic_inc_not_zero(&amp;x86_pmu.lbr_exclusive[what])) {</div><div class='add'>+		mutex_lock(&amp;pmc_reserve_mutex);</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(x86_pmu.lbr_exclusive); i++) {</div><div class='add'>+			if (i != what &amp;&amp; atomic_read(&amp;x86_pmu.lbr_exclusive[i]))</div><div class='add'>+				goto fail_unlock;</div><div class='add'>+		}</div><div class='add'>+		atomic_inc(&amp;x86_pmu.lbr_exclusive[what]);</div><div class='add'>+		mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	atomic_inc(&amp;x86_pmu.lbr_exclusive[what]);</div><div class='del'>-	ret = 0;</div><div class='add'>+	atomic_inc(&amp;active_events);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='add'>+fail_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='del'>-	return ret;</div><div class='add'>+	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void x86_del_exclusive(unsigned int what)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_dec(&amp;x86_pmu.lbr_exclusive[what]);</div><div class='add'>+	atomic_dec(&amp;active_events);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int x86_setup_perfctr(struct perf_event *event)</div><div class='hunk'>@@ -527,22 +557,11 @@ static int __x86_pmu_event_init(struct perf_event *event)</div><div class='ctx'> 	if (!x86_pmu_initialized())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	err = 0;</div><div class='del'>-	if (!atomic_inc_not_zero(&amp;active_events)) {</div><div class='del'>-		mutex_lock(&amp;pmc_reserve_mutex);</div><div class='del'>-		if (atomic_read(&amp;active_events) == 0) {</div><div class='del'>-			if (!reserve_pmc_hardware())</div><div class='del'>-				err = -EBUSY;</div><div class='del'>-			else</div><div class='del'>-				reserve_ds_buffers();</div><div class='del'>-		}</div><div class='del'>-		if (!err)</div><div class='del'>-			atomic_inc(&amp;active_events);</div><div class='del'>-		mutex_unlock(&amp;pmc_reserve_mutex);</div><div class='del'>-	}</div><div class='add'>+	err = x86_reserve_hardware();</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	atomic_inc(&amp;active_events);</div><div class='ctx'> 	event-&gt;destroy = hw_perf_event_destroy;</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;hw.idx = -1;</div><div class='hunk'>@@ -881,10 +900,7 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)</div><div class='ctx'> 			if (x86_pmu.commit_scheduling)</div><div class='ctx'> 				x86_pmu.commit_scheduling(cpuc, i, assign[i]);</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!assign || unsched) {</div><div class='del'>-</div><div class='add'>+	} else {</div><div class='ctx'> 		for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 			e = cpuc-&gt;event_list[i];</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1097,13 +1113,16 @@ int x86_perf_event_set_period(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	per_cpu(pmc_prev_left[idx], smp_processor_id()) = left;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The hw event starts counting from this event offset,</div><div class='del'>-	 * mark it to be able to extra future deltas:</div><div class='del'>-	 */</div><div class='del'>-	local64_set(&amp;hwc-&gt;prev_count, (u64)-left);</div><div class='add'>+	if (!(hwc-&gt;flags &amp; PERF_X86_EVENT_AUTO_RELOAD) ||</div><div class='add'>+	    local64_read(&amp;hwc-&gt;prev_count) != (u64)-left) {</div><div class='add'>+		/*</div><div class='add'>+		 * The hw event starts counting from this event offset,</div><div class='add'>+		 * mark it to be able to extra future deltas:</div><div class='add'>+		 */</div><div class='add'>+		local64_set(&amp;hwc-&gt;prev_count, (u64)-left);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='add'>+		wrmsrl(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Due to erratum on certan cpu we need</div><div class='hunk'>@@ -1415,6 +1434,10 @@ perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)</div><div class='ctx'> 	u64 finish_clock;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * All PMUs/events that share this PMI handler should make sure to</div><div class='add'>+	 * increment active_events for their events.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!atomic_read(&amp;active_events))</div><div class='ctx'> 		return NMI_DONE;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h<br/>index ef78516850fb..3e7fd27dfe20 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event.h</a></div><div class='hunk'>@@ -75,6 +75,8 @@ struct event_constraint {</div><div class='ctx'> #define PERF_X86_EVENT_DYNAMIC		0x0080 /* dynamic alloc'd constraint */</div><div class='ctx'> #define PERF_X86_EVENT_RDPMC_ALLOWED	0x0100 /* grant rdpmc permission */</div><div class='ctx'> #define PERF_X86_EVENT_EXCL_ACCT	0x0200 /* accounted EXCL event */</div><div class='add'>+#define PERF_X86_EVENT_AUTO_RELOAD	0x0400 /* use PEBS auto-reload */</div><div class='add'>+#define PERF_X86_EVENT_FREERUNNING	0x0800 /* use freerunning PEBS */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> struct amd_nb {</div><div class='hunk'>@@ -88,6 +90,18 @@ struct amd_nb {</div><div class='ctx'> #define MAX_PEBS_EVENTS		8</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Flags PEBS can handle without an PMI.</div><div class='add'>+ *</div><div class='add'>+ * TID can only be handled by flushing at context switch.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#define PEBS_FREERUNNING_FLAGS \</div><div class='add'>+	(PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \</div><div class='add'>+	PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | \</div><div class='add'>+	PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \</div><div class='add'>+	PERF_SAMPLE_TRANSACTION)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * A debug store configuration.</div><div class='ctx'>  *</div><div class='ctx'>  * We only support architectures that use 64bit fields.</div><div class='hunk'>@@ -133,7 +147,6 @@ enum intel_excl_state_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_excl_states {</div><div class='del'>-	enum intel_excl_state_type init_state[X86_PMC_IDX_MAX];</div><div class='ctx'> 	enum intel_excl_state_type state[X86_PMC_IDX_MAX];</div><div class='ctx'> 	bool sched_started; /* true if scheduling has started */</div><div class='ctx'> };</div><div class='hunk'>@@ -527,10 +540,10 @@ struct x86_pmu {</div><div class='ctx'> 	void		(*put_event_constraints)(struct cpu_hw_events *cpuc,</div><div class='ctx'> 						 struct perf_event *event);</div><div class='ctx'> </div><div class='del'>-	void		(*commit_scheduling)(struct cpu_hw_events *cpuc, int idx, int cntr);</div><div class='del'>-</div><div class='ctx'> 	void		(*start_scheduling)(struct cpu_hw_events *cpuc);</div><div class='ctx'> </div><div class='add'>+	void		(*commit_scheduling)(struct cpu_hw_events *cpuc, int idx, int cntr);</div><div class='add'>+</div><div class='ctx'> 	void		(*stop_scheduling)(struct cpu_hw_events *cpuc);</div><div class='ctx'> </div><div class='ctx'> 	struct event_constraint *event_constraints;</div><div class='hunk'>@@ -703,6 +716,10 @@ int x86_add_exclusive(unsigned int what);</div><div class='ctx'> </div><div class='ctx'> void x86_del_exclusive(unsigned int what);</div><div class='ctx'> </div><div class='add'>+int x86_reserve_hardware(void);</div><div class='add'>+</div><div class='add'>+void x86_release_hardware(void);</div><div class='add'>+</div><div class='ctx'> void hw_perf_lbr_event_destroy(struct perf_event *event);</div><div class='ctx'> </div><div class='ctx'> int x86_setup_perfctr(struct perf_event *event);</div><div class='hunk'>@@ -866,6 +883,8 @@ void intel_pmu_pebs_enable_all(void);</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_pebs_disable_all(void);</div><div class='ctx'> </div><div class='add'>+void intel_pmu_pebs_sched_task(struct perf_event_context *ctx, bool sched_in);</div><div class='add'>+</div><div class='ctx'> void intel_ds_init(void);</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c<br/>index a1e35c9f06b9..b9826a981fb2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel.c</a></div><div class='hunk'>@@ -1903,9 +1903,8 @@ static void</div><div class='ctx'> intel_start_scheduling(struct cpu_hw_events *cpuc)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='del'>-	struct intel_excl_states *xl, *xlo;</div><div class='add'>+	struct intel_excl_states *xl;</div><div class='ctx'> 	int tid = cpuc-&gt;excl_thread_id;</div><div class='del'>-	int o_tid = 1 - tid; /* sibling thread */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * nothing needed if in group validation mode</div><div class='hunk'>@@ -1916,10 +1915,9 @@ intel_start_scheduling(struct cpu_hw_events *cpuc)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * no exclusion needed</div><div class='ctx'> 	 */</div><div class='del'>-	if (!excl_cntrs)</div><div class='add'>+	if (WARN_ON_ONCE(!excl_cntrs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	xlo = &amp;excl_cntrs-&gt;states[o_tid];</div><div class='ctx'> 	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='ctx'> </div><div class='ctx'> 	xl-&gt;sched_started = true;</div><div class='hunk'>@@ -1928,22 +1926,41 @@ intel_start_scheduling(struct cpu_hw_events *cpuc)</div><div class='ctx'> 	 * in stop_event_scheduling()</div><div class='ctx'> 	 * makes scheduling appear as a transaction</div><div class='ctx'> 	 */</div><div class='del'>-	WARN_ON_ONCE(!irqs_disabled());</div><div class='ctx'> 	raw_spin_lock(&amp;excl_cntrs-&gt;lock);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * save initial state of sibling thread</div><div class='del'>-	 */</div><div class='del'>-	memcpy(xlo-&gt;init_state, xlo-&gt;state, sizeof(xlo-&gt;init_state));</div><div class='add'>+static void intel_commit_scheduling(struct cpu_hw_events *cpuc, int idx, int cntr)</div><div class='add'>+{</div><div class='add'>+	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='add'>+	struct event_constraint *c = cpuc-&gt;event_constraint[idx];</div><div class='add'>+	struct intel_excl_states *xl;</div><div class='add'>+	int tid = cpuc-&gt;excl_thread_id;</div><div class='add'>+</div><div class='add'>+	if (cpuc-&gt;is_fake || !is_ht_workaround_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!excl_cntrs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!(c-&gt;flags &amp; PERF_X86_EVENT_DYNAMIC))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;excl_cntrs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (c-&gt;flags &amp; PERF_X86_EVENT_EXCL)</div><div class='add'>+		xl-&gt;state[cntr] = INTEL_EXCL_EXCLUSIVE;</div><div class='add'>+	else</div><div class='add'>+		xl-&gt;state[cntr] = INTEL_EXCL_SHARED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> intel_stop_scheduling(struct cpu_hw_events *cpuc)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='del'>-	struct intel_excl_states *xl, *xlo;</div><div class='add'>+	struct intel_excl_states *xl;</div><div class='ctx'> 	int tid = cpuc-&gt;excl_thread_id;</div><div class='del'>-	int o_tid = 1 - tid; /* sibling thread */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * nothing needed if in group validation mode</div><div class='hunk'>@@ -1953,17 +1970,11 @@ intel_stop_scheduling(struct cpu_hw_events *cpuc)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * no exclusion needed</div><div class='ctx'> 	 */</div><div class='del'>-	if (!excl_cntrs)</div><div class='add'>+	if (WARN_ON_ONCE(!excl_cntrs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	xlo = &amp;excl_cntrs-&gt;states[o_tid];</div><div class='ctx'> 	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * make new sibling thread state visible</div><div class='del'>-	 */</div><div class='del'>-	memcpy(xlo-&gt;state, xlo-&gt;init_state, sizeof(xlo-&gt;state));</div><div class='del'>-</div><div class='ctx'> 	xl-&gt;sched_started = false;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * release shared state lock (acquired in intel_start_scheduling())</div><div class='hunk'>@@ -1975,12 +1986,10 @@ static struct event_constraint *</div><div class='ctx'> intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 			   int idx, struct event_constraint *c)</div><div class='ctx'> {</div><div class='del'>-	struct event_constraint *cx;</div><div class='ctx'> 	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='del'>-	struct intel_excl_states *xl, *xlo;</div><div class='del'>-	int is_excl, i;</div><div class='add'>+	struct intel_excl_states *xlo;</div><div class='ctx'> 	int tid = cpuc-&gt;excl_thread_id;</div><div class='del'>-	int o_tid = 1 - tid; /* alternate */</div><div class='add'>+	int is_excl, i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * validating a group does not require</div><div class='hunk'>@@ -1992,27 +2001,8 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * no exclusion needed</div><div class='ctx'> 	 */</div><div class='del'>-	if (!excl_cntrs)</div><div class='add'>+	if (WARN_ON_ONCE(!excl_cntrs))</div><div class='ctx'> 		return c;</div><div class='del'>-	/*</div><div class='del'>-	 * event requires exclusive counter access</div><div class='del'>-	 * across HT threads</div><div class='del'>-	 */</div><div class='del'>-	is_excl = c-&gt;flags &amp; PERF_X86_EVENT_EXCL;</div><div class='del'>-	if (is_excl &amp;&amp; !(event-&gt;hw.flags &amp; PERF_X86_EVENT_EXCL_ACCT)) {</div><div class='del'>-		event-&gt;hw.flags |= PERF_X86_EVENT_EXCL_ACCT;</div><div class='del'>-		if (!cpuc-&gt;n_excl++)</div><div class='del'>-			WRITE_ONCE(excl_cntrs-&gt;has_exclusive[tid], 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * xl = state of current HT</div><div class='del'>-	 * xlo = state of sibling HT</div><div class='del'>-	 */</div><div class='del'>-	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='del'>-	xlo = &amp;excl_cntrs-&gt;states[o_tid];</div><div class='del'>-</div><div class='del'>-	cx = c;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * because we modify the constraint, we need</div><div class='hunk'>@@ -2023,10 +2013,7 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 	 * been cloned (marked dynamic)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(c-&gt;flags &amp; PERF_X86_EVENT_DYNAMIC)) {</div><div class='del'>-</div><div class='del'>-		/* sanity check */</div><div class='del'>-		if (idx &lt; 0)</div><div class='del'>-			return &amp;emptyconstraint;</div><div class='add'>+		struct event_constraint *cx;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * grab pre-allocated constraint entry</div><div class='hunk'>@@ -2037,13 +2024,14 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 		 * initialize dynamic constraint</div><div class='ctx'> 		 * with static constraint</div><div class='ctx'> 		 */</div><div class='del'>-		memcpy(cx, c, sizeof(*cx));</div><div class='add'>+		*cx = *c;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * mark constraint as dynamic, so we</div><div class='ctx'> 		 * can free it later on</div><div class='ctx'> 		 */</div><div class='ctx'> 		cx-&gt;flags |= PERF_X86_EVENT_DYNAMIC;</div><div class='add'>+		c = cx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2054,6 +2042,22 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * state of sibling HT</div><div class='add'>+	 */</div><div class='add'>+	xlo = &amp;excl_cntrs-&gt;states[tid ^ 1];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * event requires exclusive counter access</div><div class='add'>+	 * across HT threads</div><div class='add'>+	 */</div><div class='add'>+	is_excl = c-&gt;flags &amp; PERF_X86_EVENT_EXCL;</div><div class='add'>+	if (is_excl &amp;&amp; !(event-&gt;hw.flags &amp; PERF_X86_EVENT_EXCL_ACCT)) {</div><div class='add'>+		event-&gt;hw.flags |= PERF_X86_EVENT_EXCL_ACCT;</div><div class='add'>+		if (!cpuc-&gt;n_excl++)</div><div class='add'>+			WRITE_ONCE(excl_cntrs-&gt;has_exclusive[tid], 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Modify static constraint with current dynamic</div><div class='ctx'> 	 * state of thread</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -2061,37 +2065,37 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,</div><div class='ctx'> 	 * SHARED   : sibling counter measuring non-exclusive event</div><div class='ctx'> 	 * UNUSED   : sibling counter unused</div><div class='ctx'> 	 */</div><div class='del'>-	for_each_set_bit(i, cx-&gt;idxmsk, X86_PMC_IDX_MAX) {</div><div class='add'>+	for_each_set_bit(i, c-&gt;idxmsk, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * exclusive event in sibling counter</div><div class='ctx'> 		 * our corresponding counter cannot be used</div><div class='ctx'> 		 * regardless of our event</div><div class='ctx'> 		 */</div><div class='del'>-		if (xl-&gt;state[i] == INTEL_EXCL_EXCLUSIVE)</div><div class='del'>-			__clear_bit(i, cx-&gt;idxmsk);</div><div class='add'>+		if (xlo-&gt;state[i] == INTEL_EXCL_EXCLUSIVE)</div><div class='add'>+			__clear_bit(i, c-&gt;idxmsk);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * if measuring an exclusive event, sibling</div><div class='ctx'> 		 * measuring non-exclusive, then counter cannot</div><div class='ctx'> 		 * be used</div><div class='ctx'> 		 */</div><div class='del'>-		if (is_excl &amp;&amp; xl-&gt;state[i] == INTEL_EXCL_SHARED)</div><div class='del'>-			__clear_bit(i, cx-&gt;idxmsk);</div><div class='add'>+		if (is_excl &amp;&amp; xlo-&gt;state[i] == INTEL_EXCL_SHARED)</div><div class='add'>+			__clear_bit(i, c-&gt;idxmsk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * recompute actual bit weight for scheduling algorithm</div><div class='ctx'> 	 */</div><div class='del'>-	cx-&gt;weight = hweight64(cx-&gt;idxmsk64);</div><div class='add'>+	c-&gt;weight = hweight64(c-&gt;idxmsk64);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * if we return an empty mask, then switch</div><div class='ctx'> 	 * back to static empty constraint to avoid</div><div class='ctx'> 	 * the cost of freeing later on</div><div class='ctx'> 	 */</div><div class='del'>-	if (cx-&gt;weight == 0)</div><div class='del'>-		cx = &amp;emptyconstraint;</div><div class='add'>+	if (c-&gt;weight == 0)</div><div class='add'>+		c = &amp;emptyconstraint;</div><div class='ctx'> </div><div class='del'>-	return cx;</div><div class='add'>+	return c;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct event_constraint *</div><div class='hunk'>@@ -2124,10 +2128,8 @@ static void intel_put_excl_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> 	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='del'>-	struct intel_excl_states *xlo, *xl;</div><div class='del'>-	unsigned long flags = 0; /* keep compiler happy */</div><div class='ctx'> 	int tid = cpuc-&gt;excl_thread_id;</div><div class='del'>-	int o_tid = 1 - tid;</div><div class='add'>+	struct intel_excl_states *xl;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * nothing needed if in group validation mode</div><div class='hunk'>@@ -2135,13 +2137,9 @@ static void intel_put_excl_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	if (cpuc-&gt;is_fake)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	WARN_ON_ONCE(!excl_cntrs);</div><div class='del'>-</div><div class='del'>-	if (!excl_cntrs)</div><div class='add'>+	if (WARN_ON_ONCE(!excl_cntrs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='del'>-	xlo = &amp;excl_cntrs-&gt;states[o_tid];</div><div class='ctx'> 	if (hwc-&gt;flags &amp; PERF_X86_EVENT_EXCL_ACCT) {</div><div class='ctx'> 		hwc-&gt;flags &amp;= ~PERF_X86_EVENT_EXCL_ACCT;</div><div class='ctx'> 		if (!--cpuc-&gt;n_excl)</div><div class='hunk'>@@ -2149,22 +2147,25 @@ static void intel_put_excl_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * put_constraint may be called from x86_schedule_events()</div><div class='del'>-	 * which already has the lock held so here make locking</div><div class='del'>-	 * conditional</div><div class='add'>+	 * If event was actually assigned, then mark the counter state as</div><div class='add'>+	 * unused now.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!xl-&gt;sched_started)</div><div class='del'>-		raw_spin_lock_irqsave(&amp;excl_cntrs-&gt;lock, flags);</div><div class='add'>+	if (hwc-&gt;idx &gt;= 0) {</div><div class='add'>+		xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * if event was actually assigned, then mark the</div><div class='del'>-	 * counter state as unused now</div><div class='del'>-	 */</div><div class='del'>-	if (hwc-&gt;idx &gt;= 0)</div><div class='del'>-		xlo-&gt;state[hwc-&gt;idx] = INTEL_EXCL_UNUSED;</div><div class='add'>+		/*</div><div class='add'>+		 * put_constraint may be called from x86_schedule_events()</div><div class='add'>+		 * which already has the lock held so here make locking</div><div class='add'>+		 * conditional.</div><div class='add'>+		 */</div><div class='add'>+		if (!xl-&gt;sched_started)</div><div class='add'>+			raw_spin_lock(&amp;excl_cntrs-&gt;lock);</div><div class='add'>+</div><div class='add'>+		xl-&gt;state[hwc-&gt;idx] = INTEL_EXCL_UNUSED;</div><div class='ctx'> </div><div class='del'>-	if (!xl-&gt;sched_started)</div><div class='del'>-		raw_spin_unlock_irqrestore(&amp;excl_cntrs-&gt;lock, flags);</div><div class='add'>+		if (!xl-&gt;sched_started)</div><div class='add'>+			raw_spin_unlock(&amp;excl_cntrs-&gt;lock);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -2196,41 +2197,6 @@ static void intel_put_event_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 		intel_put_excl_constraints(cpuc, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_commit_scheduling(struct cpu_hw_events *cpuc, int idx, int cntr)</div><div class='del'>-{</div><div class='del'>-	struct intel_excl_cntrs *excl_cntrs = cpuc-&gt;excl_cntrs;</div><div class='del'>-	struct event_constraint *c = cpuc-&gt;event_constraint[idx];</div><div class='del'>-	struct intel_excl_states *xlo, *xl;</div><div class='del'>-	int tid = cpuc-&gt;excl_thread_id;</div><div class='del'>-	int o_tid = 1 - tid;</div><div class='del'>-	int is_excl;</div><div class='del'>-</div><div class='del'>-	if (cpuc-&gt;is_fake || !c)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	is_excl = c-&gt;flags &amp; PERF_X86_EVENT_EXCL;</div><div class='del'>-</div><div class='del'>-	if (!(c-&gt;flags &amp; PERF_X86_EVENT_DYNAMIC))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(!excl_cntrs);</div><div class='del'>-</div><div class='del'>-	if (!excl_cntrs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	xl = &amp;excl_cntrs-&gt;states[tid];</div><div class='del'>-	xlo = &amp;excl_cntrs-&gt;states[o_tid];</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(!raw_spin_is_locked(&amp;excl_cntrs-&gt;lock));</div><div class='del'>-</div><div class='del'>-	if (cntr &gt;= 0) {</div><div class='del'>-		if (is_excl)</div><div class='del'>-			xlo-&gt;init_state[cntr] = INTEL_EXCL_EXCLUSIVE;</div><div class='del'>-		else</div><div class='del'>-			xlo-&gt;init_state[cntr] = INTEL_EXCL_SHARED;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void intel_pebs_aliases_core2(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if ((event-&gt;hw.config &amp; X86_RAW_EVENT_MASK) == 0x003c) {</div><div class='hunk'>@@ -2294,8 +2260,15 @@ static int intel_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (event-&gt;attr.precise_ip &amp;&amp; x86_pmu.pebs_aliases)</div><div class='del'>-		x86_pmu.pebs_aliases(event);</div><div class='add'>+	if (event-&gt;attr.precise_ip) {</div><div class='add'>+		if (!event-&gt;attr.freq) {</div><div class='add'>+			event-&gt;hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;</div><div class='add'>+			if (!(event-&gt;attr.sample_type &amp; ~PEBS_FREERUNNING_FLAGS))</div><div class='add'>+				event-&gt;hw.flags |= PERF_X86_EVENT_FREERUNNING;</div><div class='add'>+		}</div><div class='add'>+		if (x86_pmu.pebs_aliases)</div><div class='add'>+			x86_pmu.pebs_aliases(event);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (needs_branch_stack(event)) {</div><div class='ctx'> 		ret = intel_pmu_setup_lbr_filter(event);</div><div class='hunk'>@@ -2544,19 +2517,11 @@ struct intel_shared_regs *allocate_shared_regs(int cpu)</div><div class='ctx'> static struct intel_excl_cntrs *allocate_excl_cntrs(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_excl_cntrs *c;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	c = kzalloc_node(sizeof(struct intel_excl_cntrs),</div><div class='ctx'> 			 GFP_KERNEL, cpu_to_node(cpu));</div><div class='ctx'> 	if (c) {</div><div class='ctx'> 		raw_spin_lock_init(&amp;c-&gt;lock);</div><div class='del'>-		for (i = 0; i &lt; X86_PMC_IDX_MAX; i++) {</div><div class='del'>-			c-&gt;states[0].state[i] = INTEL_EXCL_UNUSED;</div><div class='del'>-			c-&gt;states[0].init_state[i] = INTEL_EXCL_UNUSED;</div><div class='del'>-</div><div class='del'>-			c-&gt;states[1].state[i] = INTEL_EXCL_UNUSED;</div><div class='del'>-			c-&gt;states[1].init_state[i] = INTEL_EXCL_UNUSED;</div><div class='del'>-		}</div><div class='ctx'> 		c-&gt;core_id = -1;</div><div class='ctx'> 	}</div><div class='ctx'> 	return c;</div><div class='hunk'>@@ -2611,7 +2576,7 @@ static void intel_pmu_cpu_starting(int cpu)</div><div class='ctx'> 	if (!(x86_pmu.flags &amp; PMU_FL_NO_HT_SHARING)) {</div><div class='ctx'> 		void **onln = &amp;cpuc-&gt;kfree_on_online[X86_PERF_KFREE_SHARED];</div><div class='ctx'> </div><div class='del'>-		for_each_cpu(i, topology_thread_cpumask(cpu)) {</div><div class='add'>+		for_each_cpu(i, topology_sibling_cpumask(cpu)) {</div><div class='ctx'> 			struct intel_shared_regs *pc;</div><div class='ctx'> </div><div class='ctx'> 			pc = per_cpu(cpu_hw_events, i).shared_regs;</div><div class='hunk'>@@ -2629,7 +2594,7 @@ static void intel_pmu_cpu_starting(int cpu)</div><div class='ctx'> 		cpuc-&gt;lbr_sel = &amp;cpuc-&gt;shared_regs-&gt;regs[EXTRA_REG_LBR];</div><div class='ctx'> </div><div class='ctx'> 	if (x86_pmu.flags &amp; PMU_FL_EXCL_CNTRS) {</div><div class='del'>-		for_each_cpu(i, topology_thread_cpumask(cpu)) {</div><div class='add'>+		for_each_cpu(i, topology_sibling_cpumask(cpu)) {</div><div class='ctx'> 			struct intel_excl_cntrs *c;</div><div class='ctx'> </div><div class='ctx'> 			c = per_cpu(cpu_hw_events, i).excl_cntrs;</div><div class='hunk'>@@ -2677,6 +2642,15 @@ static void intel_pmu_cpu_dying(int cpu)</div><div class='ctx'> 	fini_debug_store_on_cpu(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_pmu_sched_task(struct perf_event_context *ctx,</div><div class='add'>+				 bool sched_in)</div><div class='add'>+{</div><div class='add'>+	if (x86_pmu.pebs_active)</div><div class='add'>+		intel_pmu_pebs_sched_task(ctx, sched_in);</div><div class='add'>+	if (x86_pmu.lbr_nr)</div><div class='add'>+		intel_pmu_lbr_sched_task(ctx, sched_in);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63");</div><div class='ctx'> </div><div class='ctx'> PMU_FORMAT_ATTR(ldlat, "config1:0-15");</div><div class='hunk'>@@ -2766,7 +2740,7 @@ static __initconst const struct x86_pmu intel_pmu = {</div><div class='ctx'> 	.cpu_starting		= intel_pmu_cpu_starting,</div><div class='ctx'> 	.cpu_dying		= intel_pmu_cpu_dying,</div><div class='ctx'> 	.guest_get_msrs		= intel_guest_get_msrs,</div><div class='del'>-	.sched_task		= intel_pmu_lbr_sched_task,</div><div class='add'>+	.sched_task		= intel_pmu_sched_task,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __init void intel_clovertown_quirk(void)</div><div class='hunk'>@@ -2939,8 +2913,8 @@ static __init void intel_ht_bug(void)</div><div class='ctx'> {</div><div class='ctx'> 	x86_pmu.flags |= PMU_FL_EXCL_CNTRS | PMU_FL_EXCL_ENABLED;</div><div class='ctx'> </div><div class='del'>-	x86_pmu.commit_scheduling = intel_commit_scheduling;</div><div class='ctx'> 	x86_pmu.start_scheduling = intel_start_scheduling;</div><div class='add'>+	x86_pmu.commit_scheduling = intel_commit_scheduling;</div><div class='ctx'> 	x86_pmu.stop_scheduling = intel_stop_scheduling;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3253,6 +3227,8 @@ __init int intel_pmu_init(void)</div><div class='ctx'> </div><div class='ctx'> 	case 61: /* 14nm Broadwell Core-M */</div><div class='ctx'> 	case 86: /* 14nm Broadwell Xeon D */</div><div class='add'>+	case 71: /* 14nm Broadwell + GT3e (Intel Iris Pro graphics) */</div><div class='add'>+	case 79: /* 14nm Broadwell Server */</div><div class='ctx'> 		x86_pmu.late_ack = true;</div><div class='ctx'> 		memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));</div><div class='ctx'> 		memcpy(hw_cache_extra_regs, hsw_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));</div><div class='hunk'>@@ -3322,13 +3298,13 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		 * counter, so do not extend mask to generic counters</div><div class='ctx'> 		 */</div><div class='ctx'> 		for_each_event_constraint(c, x86_pmu.event_constraints) {</div><div class='del'>-			if (c-&gt;cmask != FIXED_EVENT_FLAGS</div><div class='del'>-			    || c-&gt;idxmsk64 == INTEL_PMC_MSK_FIXED_REF_CYCLES) {</div><div class='del'>-				continue;</div><div class='add'>+			if (c-&gt;cmask == FIXED_EVENT_FLAGS</div><div class='add'>+			    &amp;&amp; c-&gt;idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) {</div><div class='add'>+				c-&gt;idxmsk64 |= (1ULL &lt;&lt; x86_pmu.num_counters) - 1;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			c-&gt;idxmsk64 |= (1ULL &lt;&lt; x86_pmu.num_counters) - 1;</div><div class='del'>-			c-&gt;weight += x86_pmu.num_counters;</div><div class='add'>+			c-&gt;idxmsk64 &amp;=</div><div class='add'>+				~(~0UL &lt;&lt; (INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed));</div><div class='add'>+			c-&gt;weight = hweight64(c-&gt;idxmsk64);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3386,7 +3362,7 @@ static __init int fixup_ht_bug(void)</div><div class='ctx'> 	if (!(x86_pmu.flags &amp; PMU_FL_EXCL_ENABLED))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	w = cpumask_weight(topology_thread_cpumask(cpu));</div><div class='add'>+	w = cpumask_weight(topology_sibling_cpumask(cpu));</div><div class='ctx'> 	if (w &gt; 1) {</div><div class='ctx'> 		pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n");</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -3396,8 +3372,8 @@ static __init int fixup_ht_bug(void)</div><div class='ctx'> </div><div class='ctx'> 	x86_pmu.flags &amp;= ~(PMU_FL_EXCL_CNTRS | PMU_FL_EXCL_ENABLED);</div><div class='ctx'> </div><div class='del'>-	x86_pmu.commit_scheduling = NULL;</div><div class='ctx'> 	x86_pmu.start_scheduling = NULL;</div><div class='add'>+	x86_pmu.commit_scheduling = NULL;</div><div class='ctx'> 	x86_pmu.stop_scheduling = NULL;</div><div class='ctx'> </div><div class='ctx'> 	watchdog_nmi_enable_all();</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_bts.c b/arch/x86/kernel/cpu/perf_event_intel_bts.c<br/>index ac1f0c55f379..43dd672d788b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_bts.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_bts.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_bts.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_bts.c</a></div><div class='hunk'>@@ -483,17 +483,26 @@ static int bts_event_add(struct perf_event *event, int mode)</div><div class='ctx'> </div><div class='ctx'> static void bts_event_destroy(struct perf_event *event)</div><div class='ctx'> {</div><div class='add'>+	x86_release_hardware();</div><div class='ctx'> 	x86_del_exclusive(x86_lbr_exclusive_bts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bts_event_init(struct perf_event *event)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	if (event-&gt;attr.type != bts_pmu.type)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	if (x86_add_exclusive(x86_lbr_exclusive_bts))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='add'>+	ret = x86_reserve_hardware();</div><div class='add'>+	if (ret) {</div><div class='add'>+		x86_del_exclusive(x86_lbr_exclusive_bts);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	event-&gt;destroy = bts_event_destroy;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -521,5 +530,4 @@ static __init int bts_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return perf_pmu_register(&amp;bts_pmu, "intel_bts", -1);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(bts_init);</div><div class='add'>+arch_initcall(bts_init);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c<br/>index e4d1b8b738fa..188076161c1b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_cqm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_cqm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_cqm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_cqm.c</a></div><div class='hunk'>@@ -13,16 +13,35 @@</div><div class='ctx'> #define MSR_IA32_QM_CTR		0x0c8e</div><div class='ctx'> #define MSR_IA32_QM_EVTSEL	0x0c8d</div><div class='ctx'> </div><div class='del'>-static unsigned int cqm_max_rmid = -1;</div><div class='add'>+static u32 cqm_max_rmid = -1;</div><div class='ctx'> static unsigned int cqm_l3_scale; /* supposedly cacheline size */</div><div class='ctx'> </div><div class='del'>-struct intel_cqm_state {</div><div class='del'>-	raw_spinlock_t		lock;</div><div class='del'>-	int			rmid;</div><div class='del'>-	int			cnt;</div><div class='add'>+/**</div><div class='add'>+ * struct intel_pqr_state - State cache for the PQR MSR</div><div class='add'>+ * @rmid:		The cached Resource Monitoring ID</div><div class='add'>+ * @closid:		The cached Class Of Service ID</div><div class='add'>+ * @rmid_usecnt:	The usage counter for rmid</div><div class='add'>+ *</div><div class='add'>+ * The upper 32 bits of MSR_IA32_PQR_ASSOC contain closid and the</div><div class='add'>+ * lower 10 bits rmid. The update to MSR_IA32_PQR_ASSOC always</div><div class='add'>+ * contains both parts, so we need to cache them.</div><div class='add'>+ *</div><div class='add'>+ * The cache also helps to avoid pointless updates if the value does</div><div class='add'>+ * not change.</div><div class='add'>+ */</div><div class='add'>+struct intel_pqr_state {</div><div class='add'>+	u32			rmid;</div><div class='add'>+	u32			closid;</div><div class='add'>+	int			rmid_usecnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(struct intel_cqm_state, cqm_state);</div><div class='add'>+/*</div><div class='add'>+ * The cached intel_pqr_state is strictly per CPU and can never be</div><div class='add'>+ * updated from a remote CPU. Both functions which modify the state</div><div class='add'>+ * (intel_cqm_event_start and intel_cqm_event_stop) are called with</div><div class='add'>+ * interrupts disabled, which is sufficient for the protection.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Protects cache_cgroups and cqm_rmid_free_lru and cqm_rmid_limbo_lru.</div><div class='hunk'>@@ -57,7 +76,7 @@ static cpumask_t cqm_cpumask;</div><div class='ctx'>  * near-zero occupancy value, i.e. no cachelines are tagged with this</div><div class='ctx'>  * RMID, once __intel_cqm_rmid_rotate() returns.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int intel_cqm_rotation_rmid;</div><div class='add'>+static u32 intel_cqm_rotation_rmid;</div><div class='ctx'> </div><div class='ctx'> #define INVALID_RMID		(-1)</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +88,7 @@ static unsigned int intel_cqm_rotation_rmid;</div><div class='ctx'>  * Likewise, an rmid value of -1 is used to indicate "no rmid currently</div><div class='ctx'>  * assigned" and is used as part of the rotation code.</div><div class='ctx'>  */</div><div class='del'>-static inline bool __rmid_valid(unsigned int rmid)</div><div class='add'>+static inline bool __rmid_valid(u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	if (!rmid || rmid == INVALID_RMID)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -77,7 +96,7 @@ static inline bool __rmid_valid(unsigned int rmid)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 __rmid_read(unsigned int rmid)</div><div class='add'>+static u64 __rmid_read(u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='hunk'>@@ -102,7 +121,7 @@ enum rmid_recycle_state {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cqm_rmid_entry {</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> 	enum rmid_recycle_state state;</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	unsigned long queue_time;</div><div class='hunk'>@@ -147,7 +166,7 @@ static LIST_HEAD(cqm_rmid_limbo_lru);</div><div class='ctx'>  */</div><div class='ctx'> static struct cqm_rmid_entry **cqm_rmid_ptrs;</div><div class='ctx'> </div><div class='del'>-static inline struct cqm_rmid_entry *__rmid_entry(int rmid)</div><div class='add'>+static inline struct cqm_rmid_entry *__rmid_entry(u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct cqm_rmid_entry *entry;</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +181,7 @@ static inline struct cqm_rmid_entry *__rmid_entry(int rmid)</div><div class='ctx'>  *</div><div class='ctx'>  * We expect to be called with cache_mutex held.</div><div class='ctx'>  */</div><div class='del'>-static int __get_rmid(void)</div><div class='add'>+static u32 __get_rmid(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cqm_rmid_entry *entry;</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +196,7 @@ static int __get_rmid(void)</div><div class='ctx'> 	return entry-&gt;rmid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __put_rmid(unsigned int rmid)</div><div class='add'>+static void __put_rmid(u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct cqm_rmid_entry *entry;</div><div class='ctx'> </div><div class='hunk'>@@ -372,7 +391,7 @@ static bool __conflict_event(struct perf_event *a, struct perf_event *b)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct rmid_read {</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> 	atomic64_t value;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -381,12 +400,11 @@ static void __intel_cqm_event_count(void *info);</div><div class='ctx'> /*</div><div class='ctx'>  * Exchange the RMID of a group of events.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int</div><div class='del'>-intel_cqm_xchg_rmid(struct perf_event *group, unsigned int rmid)</div><div class='add'>+static u32 intel_cqm_xchg_rmid(struct perf_event *group, u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *event;</div><div class='del'>-	unsigned int old_rmid = group-&gt;hw.cqm_rmid;</div><div class='ctx'> 	struct list_head *head = &amp;group-&gt;hw.cqm_group_entry;</div><div class='add'>+	u32 old_rmid = group-&gt;hw.cqm_rmid;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;cache_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -451,7 +469,7 @@ static void intel_cqm_stable(void *arg)</div><div class='ctx'>  * If we have group events waiting for an RMID that don't conflict with</div><div class='ctx'>  * events already running, assign @rmid.</div><div class='ctx'>  */</div><div class='del'>-static bool intel_cqm_sched_in_event(unsigned int rmid)</div><div class='add'>+static bool intel_cqm_sched_in_event(u32 rmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *leader, *event;</div><div class='ctx'> </div><div class='hunk'>@@ -598,7 +616,7 @@ static bool intel_cqm_rmid_stabilize(unsigned int *available)</div><div class='ctx'> static void __intel_cqm_pick_and_rotate(struct perf_event *next)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *rotor;</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;cache_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -626,7 +644,7 @@ static void __intel_cqm_pick_and_rotate(struct perf_event *next)</div><div class='ctx'> static void intel_cqm_sched_out_conflicting_events(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *group, *g;</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;cache_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -828,8 +846,8 @@ static void intel_cqm_setup_event(struct perf_event *event,</div><div class='ctx'> 				  struct perf_event **group)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *iter;</div><div class='del'>-	unsigned int rmid;</div><div class='ctx'> 	bool conflict = false;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(iter, &amp;cache_groups, hw.cqm_groups_entry) {</div><div class='ctx'> 		rmid = iter-&gt;hw.cqm_rmid;</div><div class='hunk'>@@ -860,7 +878,7 @@ static void intel_cqm_setup_event(struct perf_event *event,</div><div class='ctx'> static void intel_cqm_event_read(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -961,55 +979,48 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void intel_cqm_event_start(struct perf_event *event, int mode)</div><div class='ctx'> {</div><div class='del'>-	struct intel_cqm_state *state = this_cpu_ptr(&amp;cqm_state);</div><div class='del'>-	unsigned int rmid = event-&gt;hw.cqm_rmid;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct intel_pqr_state *state = this_cpu_ptr(&amp;pqr_state);</div><div class='add'>+	u32 rmid = event-&gt;hw.cqm_rmid;</div><div class='ctx'> </div><div class='ctx'> 	if (!(event-&gt;hw.cqm_state &amp; PERF_HES_STOPPED))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;hw.cqm_state &amp;= ~PERF_HES_STOPPED;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;state-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (state-&gt;cnt++)</div><div class='del'>-		WARN_ON_ONCE(state-&gt;rmid != rmid);</div><div class='del'>-	else</div><div class='add'>+	if (state-&gt;rmid_usecnt++) {</div><div class='add'>+		if (!WARN_ON_ONCE(state-&gt;rmid != rmid))</div><div class='add'>+			return;</div><div class='add'>+	} else {</div><div class='ctx'> 		WARN_ON_ONCE(state-&gt;rmid);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;rmid = rmid;</div><div class='del'>-	wrmsrl(MSR_IA32_PQR_ASSOC, state-&gt;rmid);</div><div class='del'>-</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;state-&gt;lock, flags);</div><div class='add'>+	wrmsr(MSR_IA32_PQR_ASSOC, rmid, state-&gt;closid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_cqm_event_stop(struct perf_event *event, int mode)</div><div class='ctx'> {</div><div class='del'>-	struct intel_cqm_state *state = this_cpu_ptr(&amp;cqm_state);</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct intel_pqr_state *state = this_cpu_ptr(&amp;pqr_state);</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;hw.cqm_state &amp; PERF_HES_STOPPED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;hw.cqm_state |= PERF_HES_STOPPED;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;state-&gt;lock, flags);</div><div class='ctx'> 	intel_cqm_event_read(event);</div><div class='ctx'> </div><div class='del'>-	if (!--state-&gt;cnt) {</div><div class='add'>+	if (!--state-&gt;rmid_usecnt) {</div><div class='ctx'> 		state-&gt;rmid = 0;</div><div class='del'>-		wrmsrl(MSR_IA32_PQR_ASSOC, 0);</div><div class='add'>+		wrmsr(MSR_IA32_PQR_ASSOC, 0, state-&gt;closid);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN_ON_ONCE(!state-&gt;rmid);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;state-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_cqm_event_add(struct perf_event *event, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int rmid;</div><div class='add'>+	u32 rmid;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;cache_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1024,11 +1035,6 @@ static int intel_cqm_event_add(struct perf_event *event, int mode)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cqm_event_del(struct perf_event *event, int mode)</div><div class='del'>-{</div><div class='del'>-	intel_cqm_event_stop(event, mode);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void intel_cqm_event_destroy(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *group_other = NULL;</div><div class='hunk'>@@ -1057,7 +1063,7 @@ static void intel_cqm_event_destroy(struct perf_event *event)</div><div class='ctx'> 			list_replace(&amp;event-&gt;hw.cqm_groups_entry,</div><div class='ctx'> 				     &amp;group_other-&gt;hw.cqm_groups_entry);</div><div class='ctx'> 		} else {</div><div class='del'>-			unsigned int rmid = event-&gt;hw.cqm_rmid;</div><div class='add'>+			u32 rmid = event-&gt;hw.cqm_rmid;</div><div class='ctx'> </div><div class='ctx'> 			if (__rmid_valid(rmid))</div><div class='ctx'> 				__put_rmid(rmid);</div><div class='hunk'>@@ -1221,7 +1227,7 @@ static struct pmu intel_cqm_pmu = {</div><div class='ctx'> 	.task_ctx_nr	     = perf_sw_context,</div><div class='ctx'> 	.event_init	     = intel_cqm_event_init,</div><div class='ctx'> 	.add		     = intel_cqm_event_add,</div><div class='del'>-	.del		     = intel_cqm_event_del,</div><div class='add'>+	.del		     = intel_cqm_event_stop,</div><div class='ctx'> 	.start		     = intel_cqm_event_start,</div><div class='ctx'> 	.stop		     = intel_cqm_event_stop,</div><div class='ctx'> 	.read		     = intel_cqm_event_read,</div><div class='hunk'>@@ -1243,12 +1249,12 @@ static inline void cqm_pick_event_reader(int cpu)</div><div class='ctx'> </div><div class='ctx'> static void intel_cqm_cpu_prepare(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct intel_cqm_state *state = &amp;per_cpu(cqm_state, cpu);</div><div class='add'>+	struct intel_pqr_state *state = &amp;per_cpu(pqr_state, cpu);</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_init(&amp;state-&gt;lock);</div><div class='ctx'> 	state-&gt;rmid = 0;</div><div class='del'>-	state-&gt;cnt  = 0;</div><div class='add'>+	state-&gt;closid = 0;</div><div class='add'>+	state-&gt;rmid_usecnt = 0;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(c-&gt;x86_cache_max_rmid != cqm_max_rmid);</div><div class='ctx'> 	WARN_ON(c-&gt;x86_cache_occ_scale != cqm_l3_scale);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c<br/>index 7f73b3553e2e..71fc40238843 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define BTS_RECORD_SIZE		24</div><div class='ctx'> </div><div class='ctx'> #define BTS_BUFFER_SIZE		(PAGE_SIZE &lt;&lt; 4)</div><div class='del'>-#define PEBS_BUFFER_SIZE	PAGE_SIZE</div><div class='add'>+#define PEBS_BUFFER_SIZE	(PAGE_SIZE &lt;&lt; 4)</div><div class='ctx'> #define PEBS_FIXUP_SIZE		PAGE_SIZE</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -250,7 +250,7 @@ static int alloc_pebs_buffer(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;</div><div class='ctx'> 	int node = cpu_to_node(cpu);</div><div class='del'>-	int max, thresh = 1; /* always use a single PEBS record */</div><div class='add'>+	int max;</div><div class='ctx'> 	void *buffer, *ibuffer;</div><div class='ctx'> </div><div class='ctx'> 	if (!x86_pmu.pebs)</div><div class='hunk'>@@ -280,9 +280,6 @@ static int alloc_pebs_buffer(int cpu)</div><div class='ctx'> 	ds-&gt;pebs_absolute_maximum = ds-&gt;pebs_buffer_base +</div><div class='ctx'> 		max * x86_pmu.pebs_record_size;</div><div class='ctx'> </div><div class='del'>-	ds-&gt;pebs_interrupt_threshold = ds-&gt;pebs_buffer_base +</div><div class='del'>-		thresh * x86_pmu.pebs_record_size;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -549,6 +546,19 @@ int intel_pmu_drain_bts_buffer(void)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void intel_pmu_drain_pebs_buffer(void)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs regs;</div><div class='add'>+</div><div class='add'>+	x86_pmu.drain_pebs(&amp;regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_pmu_pebs_sched_task(struct perf_event_context *ctx, bool sched_in)</div><div class='add'>+{</div><div class='add'>+	if (!sched_in)</div><div class='add'>+		intel_pmu_drain_pebs_buffer();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * PEBS</div><div class='ctx'>  */</div><div class='hunk'>@@ -684,25 +694,66 @@ struct event_constraint *intel_pebs_constraints(struct perf_event *event)</div><div class='ctx'> 	return &amp;emptyconstraint;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool pebs_is_enabled(struct cpu_hw_events *cpuc)</div><div class='add'>+{</div><div class='add'>+	return (cpuc-&gt;pebs_enabled &amp; ((1ULL &lt;&lt; MAX_PEBS_EVENTS) - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_pmu_pebs_enable(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct debug_store *ds = cpuc-&gt;ds;</div><div class='add'>+	bool first_pebs;</div><div class='add'>+	u64 threshold;</div><div class='ctx'> </div><div class='ctx'> 	hwc-&gt;config &amp;= ~ARCH_PERFMON_EVENTSEL_INT;</div><div class='ctx'> </div><div class='add'>+	first_pebs = !pebs_is_enabled(cpuc);</div><div class='ctx'> 	cpuc-&gt;pebs_enabled |= 1ULL &lt;&lt; hwc-&gt;idx;</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;hw.flags &amp; PERF_X86_EVENT_PEBS_LDLAT)</div><div class='ctx'> 		cpuc-&gt;pebs_enabled |= 1ULL &lt;&lt; (hwc-&gt;idx + 32);</div><div class='ctx'> 	else if (event-&gt;hw.flags &amp; PERF_X86_EVENT_PEBS_ST)</div><div class='ctx'> 		cpuc-&gt;pebs_enabled |= 1ULL &lt;&lt; 63;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When the event is constrained enough we can use a larger</div><div class='add'>+	 * threshold and run the event with less frequent PMI.</div><div class='add'>+	 */</div><div class='add'>+	if (hwc-&gt;flags &amp; PERF_X86_EVENT_FREERUNNING) {</div><div class='add'>+		threshold = ds-&gt;pebs_absolute_maximum -</div><div class='add'>+			x86_pmu.max_pebs_events * x86_pmu.pebs_record_size;</div><div class='add'>+</div><div class='add'>+		if (first_pebs)</div><div class='add'>+			perf_sched_cb_inc(event-&gt;ctx-&gt;pmu);</div><div class='add'>+	} else {</div><div class='add'>+		threshold = ds-&gt;pebs_buffer_base + x86_pmu.pebs_record_size;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If not all events can use larger buffer,</div><div class='add'>+		 * roll back to threshold = 1</div><div class='add'>+		 */</div><div class='add'>+		if (!first_pebs &amp;&amp;</div><div class='add'>+		    (ds-&gt;pebs_interrupt_threshold &gt; threshold))</div><div class='add'>+			perf_sched_cb_dec(event-&gt;ctx-&gt;pmu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use auto-reload if possible to save a MSR write in the PMI */</div><div class='add'>+	if (hwc-&gt;flags &amp; PERF_X86_EVENT_AUTO_RELOAD) {</div><div class='add'>+		ds-&gt;pebs_event_reset[hwc-&gt;idx] =</div><div class='add'>+			(u64)(-hwc-&gt;sample_period) &amp; x86_pmu.cntval_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (first_pebs || ds-&gt;pebs_interrupt_threshold &gt; threshold)</div><div class='add'>+		ds-&gt;pebs_interrupt_threshold = threshold;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_pebs_disable(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct debug_store *ds = cpuc-&gt;ds;</div><div class='ctx'> </div><div class='ctx'> 	cpuc-&gt;pebs_enabled &amp;= ~(1ULL &lt;&lt; hwc-&gt;idx);</div><div class='ctx'> </div><div class='hunk'>@@ -711,6 +762,13 @@ void intel_pmu_pebs_disable(struct perf_event *event)</div><div class='ctx'> 	else if (event-&gt;hw.flags &amp; PERF_X86_EVENT_PEBS_ST)</div><div class='ctx'> 		cpuc-&gt;pebs_enabled &amp;= ~(1ULL &lt;&lt; 63);</div><div class='ctx'> </div><div class='add'>+	if (ds-&gt;pebs_interrupt_threshold &gt;</div><div class='add'>+	    ds-&gt;pebs_buffer_base + x86_pmu.pebs_record_size) {</div><div class='add'>+		intel_pmu_drain_pebs_buffer();</div><div class='add'>+		if (!pebs_is_enabled(cpuc))</div><div class='add'>+			perf_sched_cb_dec(event-&gt;ctx-&gt;pmu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (cpuc-&gt;enabled)</div><div class='ctx'> 		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='ctx'> </div><div class='hunk'>@@ -846,8 +904,10 @@ static inline u64 intel_hsw_transaction(struct pebs_record_hsw *pebs)</div><div class='ctx'> 	return txn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='del'>-				   struct pt_regs *iregs, void *__pebs)</div><div class='add'>+static void setup_pebs_sample_data(struct perf_event *event,</div><div class='add'>+				   struct pt_regs *iregs, void *__pebs,</div><div class='add'>+				   struct perf_sample_data *data,</div><div class='add'>+				   struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> #define PERF_X86_EVENT_PEBS_HSW_PREC \</div><div class='ctx'> 		(PERF_X86_EVENT_PEBS_ST_HSW | \</div><div class='hunk'>@@ -859,13 +919,11 @@ static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct pebs_record_hsw *pebs = __pebs;</div><div class='del'>-	struct perf_sample_data data;</div><div class='del'>-	struct pt_regs regs;</div><div class='ctx'> 	u64 sample_type;</div><div class='ctx'> 	int fll, fst, dsrc;</div><div class='ctx'> 	int fl = event-&gt;hw.flags;</div><div class='ctx'> </div><div class='del'>-	if (!intel_pmu_save_and_restart(event))</div><div class='add'>+	if (pebs == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	sample_type = event-&gt;attr.sample_type;</div><div class='hunk'>@@ -874,15 +932,15 @@ static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='ctx'> 	fll = fl &amp; PERF_X86_EVENT_PEBS_LDLAT;</div><div class='ctx'> 	fst = fl &amp; (PERF_X86_EVENT_PEBS_ST | PERF_X86_EVENT_PEBS_HSW_PREC);</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+	perf_sample_data_init(data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='del'>-	data.period = event-&gt;hw.last_period;</div><div class='add'>+	data-&gt;period = event-&gt;hw.last_period;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use latency for weight (only avail with PEBS-LL)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fll &amp;&amp; (sample_type &amp; PERF_SAMPLE_WEIGHT))</div><div class='del'>-		data.weight = pebs-&gt;lat;</div><div class='add'>+		data-&gt;weight = pebs-&gt;lat;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * data.data_src encodes the data source</div><div class='hunk'>@@ -895,7 +953,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='ctx'> 			val = precise_datala_hsw(event, pebs-&gt;dse);</div><div class='ctx'> 		else if (fst)</div><div class='ctx'> 			val = precise_store_data(pebs-&gt;dse);</div><div class='del'>-		data.data_src.val = val;</div><div class='add'>+		data-&gt;data_src.val = val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -908,61 +966,123 @@ static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='ctx'> 	 * PERF_SAMPLE_IP and PERF_SAMPLE_CALLCHAIN to function properly.</div><div class='ctx'> 	 * A possible PERF_SAMPLE_REGS will have to transfer all regs.</div><div class='ctx'> 	 */</div><div class='del'>-	regs = *iregs;</div><div class='del'>-	regs.flags = pebs-&gt;flags;</div><div class='del'>-	set_linear_ip(&amp;regs, pebs-&gt;ip);</div><div class='del'>-	regs.bp = pebs-&gt;bp;</div><div class='del'>-	regs.sp = pebs-&gt;sp;</div><div class='add'>+	*regs = *iregs;</div><div class='add'>+	regs-&gt;flags = pebs-&gt;flags;</div><div class='add'>+	set_linear_ip(regs, pebs-&gt;ip);</div><div class='add'>+	regs-&gt;bp = pebs-&gt;bp;</div><div class='add'>+	regs-&gt;sp = pebs-&gt;sp;</div><div class='ctx'> </div><div class='ctx'> 	if (sample_type &amp; PERF_SAMPLE_REGS_INTR) {</div><div class='del'>-		regs.ax = pebs-&gt;ax;</div><div class='del'>-		regs.bx = pebs-&gt;bx;</div><div class='del'>-		regs.cx = pebs-&gt;cx;</div><div class='del'>-		regs.dx = pebs-&gt;dx;</div><div class='del'>-		regs.si = pebs-&gt;si;</div><div class='del'>-		regs.di = pebs-&gt;di;</div><div class='del'>-		regs.bp = pebs-&gt;bp;</div><div class='del'>-		regs.sp = pebs-&gt;sp;</div><div class='del'>-</div><div class='del'>-		regs.flags = pebs-&gt;flags;</div><div class='add'>+		regs-&gt;ax = pebs-&gt;ax;</div><div class='add'>+		regs-&gt;bx = pebs-&gt;bx;</div><div class='add'>+		regs-&gt;cx = pebs-&gt;cx;</div><div class='add'>+		regs-&gt;dx = pebs-&gt;dx;</div><div class='add'>+		regs-&gt;si = pebs-&gt;si;</div><div class='add'>+		regs-&gt;di = pebs-&gt;di;</div><div class='add'>+		regs-&gt;bp = pebs-&gt;bp;</div><div class='add'>+		regs-&gt;sp = pebs-&gt;sp;</div><div class='add'>+</div><div class='add'>+		regs-&gt;flags = pebs-&gt;flags;</div><div class='ctx'> #ifndef CONFIG_X86_32</div><div class='del'>-		regs.r8 = pebs-&gt;r8;</div><div class='del'>-		regs.r9 = pebs-&gt;r9;</div><div class='del'>-		regs.r10 = pebs-&gt;r10;</div><div class='del'>-		regs.r11 = pebs-&gt;r11;</div><div class='del'>-		regs.r12 = pebs-&gt;r12;</div><div class='del'>-		regs.r13 = pebs-&gt;r13;</div><div class='del'>-		regs.r14 = pebs-&gt;r14;</div><div class='del'>-		regs.r15 = pebs-&gt;r15;</div><div class='add'>+		regs-&gt;r8 = pebs-&gt;r8;</div><div class='add'>+		regs-&gt;r9 = pebs-&gt;r9;</div><div class='add'>+		regs-&gt;r10 = pebs-&gt;r10;</div><div class='add'>+		regs-&gt;r11 = pebs-&gt;r11;</div><div class='add'>+		regs-&gt;r12 = pebs-&gt;r12;</div><div class='add'>+		regs-&gt;r13 = pebs-&gt;r13;</div><div class='add'>+		regs-&gt;r14 = pebs-&gt;r14;</div><div class='add'>+		regs-&gt;r15 = pebs-&gt;r15;</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;attr.precise_ip &gt; 1 &amp;&amp; x86_pmu.intel_cap.pebs_format &gt;= 2) {</div><div class='del'>-		regs.ip = pebs-&gt;real_ip;</div><div class='del'>-		regs.flags |= PERF_EFLAGS_EXACT;</div><div class='del'>-	} else if (event-&gt;attr.precise_ip &gt; 1 &amp;&amp; intel_pmu_pebs_fixup_ip(&amp;regs))</div><div class='del'>-		regs.flags |= PERF_EFLAGS_EXACT;</div><div class='add'>+		regs-&gt;ip = pebs-&gt;real_ip;</div><div class='add'>+		regs-&gt;flags |= PERF_EFLAGS_EXACT;</div><div class='add'>+	} else if (event-&gt;attr.precise_ip &gt; 1 &amp;&amp; intel_pmu_pebs_fixup_ip(regs))</div><div class='add'>+		regs-&gt;flags |= PERF_EFLAGS_EXACT;</div><div class='ctx'> 	else</div><div class='del'>-		regs.flags &amp;= ~PERF_EFLAGS_EXACT;</div><div class='add'>+		regs-&gt;flags &amp;= ~PERF_EFLAGS_EXACT;</div><div class='ctx'> </div><div class='ctx'> 	if ((sample_type &amp; PERF_SAMPLE_ADDR) &amp;&amp;</div><div class='ctx'> 	    x86_pmu.intel_cap.pebs_format &gt;= 1)</div><div class='del'>-		data.addr = pebs-&gt;dla;</div><div class='add'>+		data-&gt;addr = pebs-&gt;dla;</div><div class='ctx'> </div><div class='ctx'> 	if (x86_pmu.intel_cap.pebs_format &gt;= 2) {</div><div class='ctx'> 		/* Only set the TSX weight when no memory weight. */</div><div class='ctx'> 		if ((sample_type &amp; PERF_SAMPLE_WEIGHT) &amp;&amp; !fll)</div><div class='del'>-			data.weight = intel_hsw_weight(pebs);</div><div class='add'>+			data-&gt;weight = intel_hsw_weight(pebs);</div><div class='ctx'> </div><div class='ctx'> 		if (sample_type &amp; PERF_SAMPLE_TRANSACTION)</div><div class='del'>-			data.txn = intel_hsw_transaction(pebs);</div><div class='add'>+			data-&gt;txn = intel_hsw_transaction(pebs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (has_branch_stack(event))</div><div class='del'>-		data.br_stack = &amp;cpuc-&gt;lbr_stack;</div><div class='add'>+		data-&gt;br_stack = &amp;cpuc-&gt;lbr_stack;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *</div><div class='add'>+get_next_pebs_record_by_bit(void *base, void *top, int bit)</div><div class='add'>+{</div><div class='add'>+	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='add'>+	void *at;</div><div class='add'>+	u64 pebs_status;</div><div class='add'>+</div><div class='add'>+	if (base == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (at = base; at &lt; top; at += x86_pmu.pebs_record_size) {</div><div class='add'>+		struct pebs_record_nhm *p = at;</div><div class='add'>+</div><div class='add'>+		if (test_bit(bit, (unsigned long *)&amp;p-&gt;status)) {</div><div class='add'>+			/* PEBS v3 has accurate status bits */</div><div class='add'>+			if (x86_pmu.intel_cap.pebs_format &gt;= 3)</div><div class='add'>+				return at;</div><div class='ctx'> </div><div class='del'>-	if (perf_event_overflow(event, &amp;data, &amp;regs))</div><div class='add'>+			if (p-&gt;status == (1 &lt;&lt; bit))</div><div class='add'>+				return at;</div><div class='add'>+</div><div class='add'>+			/* clear non-PEBS bit and re-check */</div><div class='add'>+			pebs_status = p-&gt;status &amp; cpuc-&gt;pebs_enabled;</div><div class='add'>+			pebs_status &amp;= (1ULL &lt;&lt; MAX_PEBS_EVENTS) - 1;</div><div class='add'>+			if (pebs_status == (1 &lt;&lt; bit))</div><div class='add'>+				return at;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='add'>+				   struct pt_regs *iregs,</div><div class='add'>+				   void *base, void *top,</div><div class='add'>+				   int bit, int count)</div><div class='add'>+{</div><div class='add'>+	struct perf_sample_data data;</div><div class='add'>+	struct pt_regs regs;</div><div class='add'>+	void *at = get_next_pebs_record_by_bit(base, top, bit);</div><div class='add'>+</div><div class='add'>+	if (!intel_pmu_save_and_restart(event) &amp;&amp;</div><div class='add'>+	    !(event-&gt;hw.flags &amp; PERF_X86_EVENT_AUTO_RELOAD))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	while (count &gt; 1) {</div><div class='add'>+		setup_pebs_sample_data(event, iregs, at, &amp;data, &amp;regs);</div><div class='add'>+		perf_event_output(event, &amp;data, &amp;regs);</div><div class='add'>+		at += x86_pmu.pebs_record_size;</div><div class='add'>+		at = get_next_pebs_record_by_bit(at, top, bit);</div><div class='add'>+		count--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	setup_pebs_sample_data(event, iregs, at, &amp;data, &amp;regs);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * All but the last records are processed.</div><div class='add'>+	 * The last one is left to be able to call the overflow handler.</div><div class='add'>+	 */</div><div class='add'>+	if (perf_event_overflow(event, &amp;data, &amp;regs)) {</div><div class='ctx'> 		x86_pmu_stop(event, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)</div><div class='hunk'>@@ -992,72 +1112,99 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)</div><div class='ctx'> 	if (!event-&gt;attr.precise_ip)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	n = top - at;</div><div class='add'>+	n = (top - at) / x86_pmu.pebs_record_size;</div><div class='ctx'> 	if (n &lt;= 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Should not happen, we program the threshold at 1 and do not</div><div class='del'>-	 * set a reset value.</div><div class='del'>-	 */</div><div class='del'>-	WARN_ONCE(n &gt; 1, "bad leftover pebs %d\n", n);</div><div class='del'>-	at += n - 1;</div><div class='del'>-</div><div class='del'>-	__intel_pmu_pebs_event(event, iregs, at);</div><div class='add'>+	__intel_pmu_pebs_event(event, iregs, at, top, 0, n);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct debug_store *ds = cpuc-&gt;ds;</div><div class='del'>-	struct perf_event *event = NULL;</div><div class='del'>-	void *at, *top;</div><div class='del'>-	u64 status = 0;</div><div class='del'>-	int bit;</div><div class='add'>+	struct perf_event *event;</div><div class='add'>+	void *base, *at, *top;</div><div class='add'>+	short counts[MAX_PEBS_EVENTS] = {};</div><div class='add'>+	short error[MAX_PEBS_EVENTS] = {};</div><div class='add'>+	int bit, i;</div><div class='ctx'> </div><div class='ctx'> 	if (!x86_pmu.pebs_active)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	at  = (struct pebs_record_nhm *)(unsigned long)ds-&gt;pebs_buffer_base;</div><div class='add'>+	base = (struct pebs_record_nhm *)(unsigned long)ds-&gt;pebs_buffer_base;</div><div class='ctx'> 	top = (struct pebs_record_nhm *)(unsigned long)ds-&gt;pebs_index;</div><div class='ctx'> </div><div class='ctx'> 	ds-&gt;pebs_index = ds-&gt;pebs_buffer_base;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(at &gt; top))</div><div class='add'>+	if (unlikely(base &gt;= top))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Should not happen, we program the threshold at 1 and do not</div><div class='del'>-	 * set a reset value.</div><div class='del'>-	 */</div><div class='del'>-	WARN_ONCE(top - at &gt; x86_pmu.max_pebs_events * x86_pmu.pebs_record_size,</div><div class='del'>-		  "Unexpected number of pebs records %ld\n",</div><div class='del'>-		  (long)(top - at) / x86_pmu.pebs_record_size);</div><div class='del'>-</div><div class='del'>-	for (; at &lt; top; at += x86_pmu.pebs_record_size) {</div><div class='add'>+	for (at = base; at &lt; top; at += x86_pmu.pebs_record_size) {</div><div class='ctx'> 		struct pebs_record_nhm *p = at;</div><div class='ctx'> </div><div class='del'>-		for_each_set_bit(bit, (unsigned long *)&amp;p-&gt;status,</div><div class='del'>-				 x86_pmu.max_pebs_events) {</div><div class='del'>-			event = cpuc-&gt;events[bit];</div><div class='del'>-			if (!test_bit(bit, cpuc-&gt;active_mask))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			WARN_ON_ONCE(!event);</div><div class='add'>+		/* PEBS v3 has accurate status bits */</div><div class='add'>+		if (x86_pmu.intel_cap.pebs_format &gt;= 3) {</div><div class='add'>+			for_each_set_bit(bit, (unsigned long *)&amp;p-&gt;status,</div><div class='add'>+					 MAX_PEBS_EVENTS)</div><div class='add'>+				counts[bit]++;</div><div class='ctx'> </div><div class='del'>-			if (!event-&gt;attr.precise_ip)</div><div class='del'>-				continue;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			if (__test_and_set_bit(bit, (unsigned long *)&amp;status))</div><div class='add'>+		bit = find_first_bit((unsigned long *)&amp;p-&gt;status,</div><div class='add'>+					x86_pmu.max_pebs_events);</div><div class='add'>+		if (bit &gt;= x86_pmu.max_pebs_events)</div><div class='add'>+			continue;</div><div class='add'>+		if (!test_bit(bit, cpuc-&gt;active_mask))</div><div class='add'>+			continue;</div><div class='add'>+		/*</div><div class='add'>+		 * The PEBS hardware does not deal well with the situation</div><div class='add'>+		 * when events happen near to each other and multiple bits</div><div class='add'>+		 * are set. But it should happen rarely.</div><div class='add'>+		 *</div><div class='add'>+		 * If these events include one PEBS and multiple non-PEBS</div><div class='add'>+		 * events, it doesn't impact PEBS record. The record will</div><div class='add'>+		 * be handled normally. (slow path)</div><div class='add'>+		 *</div><div class='add'>+		 * If these events include two or more PEBS events, the</div><div class='add'>+		 * records for the events can be collapsed into a single</div><div class='add'>+		 * one, and it's not possible to reconstruct all events</div><div class='add'>+		 * that caused the PEBS record. It's called collision.</div><div class='add'>+		 * If collision happened, the record will be dropped.</div><div class='add'>+		 *</div><div class='add'>+		 */</div><div class='add'>+		if (p-&gt;status != (1 &lt;&lt; bit)) {</div><div class='add'>+			u64 pebs_status;</div><div class='add'>+</div><div class='add'>+			/* slow path */</div><div class='add'>+			pebs_status = p-&gt;status &amp; cpuc-&gt;pebs_enabled;</div><div class='add'>+			pebs_status &amp;= (1ULL &lt;&lt; MAX_PEBS_EVENTS) - 1;</div><div class='add'>+			if (pebs_status != (1 &lt;&lt; bit)) {</div><div class='add'>+				for_each_set_bit(i, (unsigned long *)&amp;pebs_status,</div><div class='add'>+						 MAX_PEBS_EVENTS)</div><div class='add'>+					error[i]++;</div><div class='ctx'> 				continue;</div><div class='del'>-</div><div class='del'>-			break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='add'>+		counts[bit]++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (!event || bit &gt;= x86_pmu.max_pebs_events)</div><div class='add'>+	for (bit = 0; bit &lt; x86_pmu.max_pebs_events; bit++) {</div><div class='add'>+		if ((counts[bit] == 0) &amp;&amp; (error[bit] == 0))</div><div class='ctx'> 			continue;</div><div class='add'>+		event = cpuc-&gt;events[bit];</div><div class='add'>+		WARN_ON_ONCE(!event);</div><div class='add'>+		WARN_ON_ONCE(!event-&gt;attr.precise_ip);</div><div class='ctx'> </div><div class='del'>-		__intel_pmu_pebs_event(event, iregs, at);</div><div class='add'>+		/* log dropped samples number */</div><div class='add'>+		if (error[bit])</div><div class='add'>+			perf_log_lost_samples(event, error[bit]);</div><div class='add'>+</div><div class='add'>+		if (counts[bit]) {</div><div class='add'>+			__intel_pmu_pebs_event(event, iregs, base,</div><div class='add'>+					       top, bit, counts[bit]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c<br/>index 94e5b506caa6..452a7bd2dedb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_lbr.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_lbr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_lbr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_lbr.c</a></div><div class='hunk'>@@ -96,6 +96,7 @@ enum {</div><div class='ctx'> 	X86_BR_NO_TX		= 1 &lt;&lt; 14,/* not in transaction */</div><div class='ctx'> 	X86_BR_ZERO_CALL	= 1 &lt;&lt; 15,/* zero length call */</div><div class='ctx'> 	X86_BR_CALL_STACK	= 1 &lt;&lt; 16,/* call stack */</div><div class='add'>+	X86_BR_IND_JMP		= 1 &lt;&lt; 17,/* indirect jump */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define X86_BR_PLM (X86_BR_USER | X86_BR_KERNEL)</div><div class='hunk'>@@ -113,6 +114,7 @@ enum {</div><div class='ctx'> 	 X86_BR_IRQ	 |\</div><div class='ctx'> 	 X86_BR_ABORT	 |\</div><div class='ctx'> 	 X86_BR_IND_CALL |\</div><div class='add'>+	 X86_BR_IND_JMP  |\</div><div class='ctx'> 	 X86_BR_ZERO_CALL)</div><div class='ctx'> </div><div class='ctx'> #define X86_BR_ALL (X86_BR_PLM | X86_BR_ANY)</div><div class='hunk'>@@ -262,9 +264,6 @@ void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in)</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct x86_perf_task_context *task_ctx;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.lbr_nr)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If LBR callstack feature is enabled and the stack was saved when</div><div class='ctx'> 	 * the task was scheduled out, restore the stack. Otherwise flush</div><div class='hunk'>@@ -523,6 +522,9 @@ static int intel_pmu_setup_sw_lbr_filter(struct perf_event *event)</div><div class='ctx'> 			X86_BR_CALL_STACK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (br_type &amp; PERF_SAMPLE_BRANCH_IND_JUMP)</div><div class='add'>+		mask |= X86_BR_IND_JMP;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * stash actual user request into reg, it may</div><div class='ctx'> 	 * be used by fixup code for some CPU</div><div class='hunk'>@@ -736,7 +738,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='ctx'> 		case 5:</div><div class='del'>-			ret = X86_BR_JMP;</div><div class='add'>+			ret = X86_BR_IND_JMP;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -844,6 +846,7 @@ static const int nhm_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {</div><div class='ctx'> 	 */</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_IND_CALL_SHIFT] = LBR_IND_CALL | LBR_IND_JMP,</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_COND_SHIFT]     = LBR_JCC,</div><div class='add'>+	[PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT] = LBR_IND_JMP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {</div><div class='hunk'>@@ -856,6 +859,7 @@ static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {</div><div class='ctx'> 						| LBR_FAR,</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_IND_CALL_SHIFT]	= LBR_IND_CALL,</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_COND_SHIFT]		= LBR_JCC,</div><div class='add'>+	[PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT]	= LBR_IND_JMP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const int hsw_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {</div><div class='hunk'>@@ -870,6 +874,7 @@ static const int hsw_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_COND_SHIFT]		= LBR_JCC,</div><div class='ctx'> 	[PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT]	= LBR_REL_CALL | LBR_IND_CALL</div><div class='ctx'> 						| LBR_RETURN | LBR_CALL_STACK,</div><div class='add'>+	[PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT]	= LBR_IND_JMP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* core */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_pt.c b/arch/x86/kernel/cpu/perf_event_intel_pt.c<br/>index 123ff1bb2f60..183de719628d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_pt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_pt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_pt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_pt.c</a></div><div class='hunk'>@@ -187,15 +187,6 @@ static bool pt_event_valid(struct perf_event *event)</div><div class='ctx'>  * These all are cpu affine and operate on a local PT</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static bool pt_is_running(void)</div><div class='del'>-{</div><div class='del'>-	u64 ctl;</div><div class='del'>-</div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_CTL, ctl);</div><div class='del'>-</div><div class='del'>-	return !!(ctl &amp; RTIT_CTL_TRACEEN);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void pt_config(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	u64 reg;</div><div class='hunk'>@@ -609,7 +600,12 @@ static unsigned int pt_topa_next_entry(struct pt_buffer *buf, unsigned int pg)</div><div class='ctx'>  * @handle:	Current output handle.</div><div class='ctx'>  *</div><div class='ctx'>  * Place INT and STOP marks to prevent overwriting old data that the consumer</div><div class='del'>- * hasn't yet collected.</div><div class='add'>+ * hasn't yet collected and waking up the consumer after a certain fraction of</div><div class='add'>+ * the buffer has filled up. Only needed and sensible for non-snapshot counters.</div><div class='add'>+ *</div><div class='add'>+ * This obviously relies on buf::head to figure out buffer markers, so it has</div><div class='add'>+ * to be called after pt_buffer_reset_offsets() and before the hardware tracing</div><div class='add'>+ * is enabled.</div><div class='ctx'>  */</div><div class='ctx'> static int pt_buffer_reset_markers(struct pt_buffer *buf,</div><div class='ctx'> 				   struct perf_output_handle *handle)</div><div class='hunk'>@@ -618,9 +614,6 @@ static int pt_buffer_reset_markers(struct pt_buffer *buf,</div><div class='ctx'> 	unsigned long head = local64_read(&amp;buf-&gt;head);</div><div class='ctx'> 	unsigned long idx, npages, wakeup;</div><div class='ctx'> </div><div class='del'>-	if (buf-&gt;snapshot)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	/* can't stop in the middle of an output region */</div><div class='ctx'> 	if (buf-&gt;output_off + handle-&gt;size + 1 &lt;</div><div class='ctx'> 	    sizes(TOPA_ENTRY(buf-&gt;cur, buf-&gt;cur_idx)-&gt;size))</div><div class='hunk'>@@ -674,7 +667,7 @@ static void pt_buffer_setup_topa_index(struct pt_buffer *buf)</div><div class='ctx'> 	struct topa *cur = buf-&gt;first, *prev = buf-&gt;last;</div><div class='ctx'> 	struct topa_entry *te_cur = TOPA_ENTRY(cur, 0),</div><div class='ctx'> 		*te_prev = TOPA_ENTRY(prev, prev-&gt;last - 1);</div><div class='del'>-	int pg = 0, idx = 0, ntopa = 0;</div><div class='add'>+	int pg = 0, idx = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (pg &lt; buf-&gt;nr_pages) {</div><div class='ctx'> 		int tidx;</div><div class='hunk'>@@ -689,9 +682,9 @@ static void pt_buffer_setup_topa_index(struct pt_buffer *buf)</div><div class='ctx'> 			/* advance to next topa table */</div><div class='ctx'> 			idx = 0;</div><div class='ctx'> 			cur = list_entry(cur-&gt;list.next, struct topa, list);</div><div class='del'>-			ntopa++;</div><div class='del'>-		} else</div><div class='add'>+		} else {</div><div class='ctx'> 			idx++;</div><div class='add'>+		}</div><div class='ctx'> 		te_cur = TOPA_ENTRY(cur, idx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -703,7 +696,14 @@ static void pt_buffer_setup_topa_index(struct pt_buffer *buf)</div><div class='ctx'>  * @head:	Write pointer (aux_head) from AUX buffer.</div><div class='ctx'>  *</div><div class='ctx'>  * Find the ToPA table and entry corresponding to given @head and set buffer's</div><div class='del'>- * "current" pointers accordingly.</div><div class='add'>+ * "current" pointers accordingly. This is done after we have obtained the</div><div class='add'>+ * current aux_head position from a successful call to perf_aux_output_begin()</div><div class='add'>+ * to make sure the hardware is writing to the right place.</div><div class='add'>+ *</div><div class='add'>+ * This function modifies buf::{cur,cur_idx,output_off} that will be programmed</div><div class='add'>+ * into PT msrs when the tracing is enabled and buf::head and buf::data_size,</div><div class='add'>+ * which are used to determine INT and STOP markers' locations by a subsequent</div><div class='add'>+ * call to pt_buffer_reset_markers().</div><div class='ctx'>  */</div><div class='ctx'> static void pt_buffer_reset_offsets(struct pt_buffer *buf, unsigned long head)</div><div class='ctx'> {</div><div class='hunk'>@@ -901,6 +901,7 @@ void intel_pt_interrupt(void)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pt_buffer_reset_offsets(buf, pt-&gt;handle.head);</div><div class='add'>+		/* snapshot counters don't use PMI, so it's safe */</div><div class='ctx'> 		ret = pt_buffer_reset_markers(buf, &amp;pt-&gt;handle);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			perf_aux_output_end(&amp;pt-&gt;handle, 0, true);</div><div class='hunk'>@@ -923,7 +924,7 @@ static void pt_event_start(struct perf_event *event, int mode)</div><div class='ctx'> 	struct pt *pt = this_cpu_ptr(&amp;pt_ctx);</div><div class='ctx'> 	struct pt_buffer *buf = perf_get_aux(&amp;pt-&gt;handle);</div><div class='ctx'> </div><div class='del'>-	if (pt_is_running() || !buf || pt_buffer_is_full(buf, pt)) {</div><div class='add'>+	if (!buf || pt_buffer_is_full(buf, pt)) {</div><div class='ctx'> 		event-&gt;hw.state = PERF_HES_STOPPED;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -954,7 +955,6 @@ static void pt_event_stop(struct perf_event *event, int mode)</div><div class='ctx'> 	event-&gt;hw.state = PERF_HES_STOPPED;</div><div class='ctx'> </div><div class='ctx'> 	if (mode &amp; PERF_EF_UPDATE) {</div><div class='del'>-		struct pt *pt = this_cpu_ptr(&amp;pt_ctx);</div><div class='ctx'> 		struct pt_buffer *buf = perf_get_aux(&amp;pt-&gt;handle);</div><div class='ctx'> </div><div class='ctx'> 		if (!buf)</div><div class='hunk'>@@ -1106,5 +1106,4 @@ static __init int pt_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(pt_init);</div><div class='add'>+arch_initcall(pt_init);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c<br/>index 358c54ad20d4..5cbd4e64feb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_rapl.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_rapl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_rapl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_rapl.c</a></div><div class='hunk'>@@ -204,9 +204,8 @@ again:</div><div class='ctx'> </div><div class='ctx'> static void rapl_start_hrtimer(struct rapl_pmu *pmu)</div><div class='ctx'> {</div><div class='del'>-	__hrtimer_start_range_ns(&amp;pmu-&gt;hrtimer,</div><div class='del'>-			pmu-&gt;timer_interval, 0,</div><div class='del'>-			HRTIMER_MODE_REL_PINNED, 0);</div><div class='add'>+       hrtimer_start(&amp;pmu-&gt;hrtimer, pmu-&gt;timer_interval,</div><div class='add'>+		     HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rapl_stop_hrtimer(struct rapl_pmu *pmu)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c<br/>index 90b7c501c95b..21b5e38c921b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_uncore.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore.c</a></div><div class='hunk'>@@ -233,9 +233,8 @@ static enum hrtimer_restart uncore_pmu_hrtimer(struct hrtimer *hrtimer)</div><div class='ctx'> </div><div class='ctx'> void uncore_pmu_start_hrtimer(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	__hrtimer_start_range_ns(&amp;box-&gt;hrtimer,</div><div class='del'>-			ns_to_ktime(box-&gt;hrtimer_duration), 0,</div><div class='del'>-			HRTIMER_MODE_REL_PINNED, 0);</div><div class='add'>+	hrtimer_start(&amp;box-&gt;hrtimer, ns_to_ktime(box-&gt;hrtimer_duration),</div><div class='add'>+		      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box)</div><div class='hunk'>@@ -922,6 +921,9 @@ static int __init uncore_pci_init(void)</div><div class='ctx'> 	case 69: /* Haswell Celeron */</div><div class='ctx'> 		ret = hsw_uncore_pci_init();</div><div class='ctx'> 		break;</div><div class='add'>+	case 61: /* Broadwell */</div><div class='add'>+		ret = bdw_uncore_pci_init();</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/kernel/cpu/perf_event_intel_uncore.h<br/>index ceac8f5dc018..0f77f0a196e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_uncore.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore.h</a></div><div class='hunk'>@@ -325,6 +325,7 @@ extern struct event_constraint uncore_constraint_empty;</div><div class='ctx'> int snb_uncore_pci_init(void);</div><div class='ctx'> int ivb_uncore_pci_init(void);</div><div class='ctx'> int hsw_uncore_pci_init(void);</div><div class='add'>+int bdw_uncore_pci_init(void);</div><div class='ctx'> void snb_uncore_cpu_init(void);</div><div class='ctx'> void nhm_uncore_cpu_init(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c<br/>index 4562e9e22c60..b005a78c7012 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IVB_E3_IMC	0x0150</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_HSW_IMC	0x0c00</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_HSW_U_IMC	0x0a04</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_BDW_IMC	0x1604</div><div class='ctx'> </div><div class='ctx'> /* SNB event control */</div><div class='ctx'> #define SNB_UNC_CTL_EV_SEL_MASK			0x000000ff</div><div class='hunk'>@@ -486,6 +487,14 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {</div><div class='ctx'> 	{ /* end: all zeroes */ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct pci_device_id bdw_uncore_pci_ids[] = {</div><div class='add'>+	{ /* IMC */</div><div class='add'>+		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BDW_IMC),</div><div class='add'>+		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),</div><div class='add'>+	},</div><div class='add'>+	{ /* end: all zeroes */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct pci_driver snb_uncore_pci_driver = {</div><div class='ctx'> 	.name		= "snb_uncore",</div><div class='ctx'> 	.id_table	= snb_uncore_pci_ids,</div><div class='hunk'>@@ -501,6 +510,11 @@ static struct pci_driver hsw_uncore_pci_driver = {</div><div class='ctx'> 	.id_table	= hsw_uncore_pci_ids,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct pci_driver bdw_uncore_pci_driver = {</div><div class='add'>+	.name		= "bdw_uncore",</div><div class='add'>+	.id_table	= bdw_uncore_pci_ids,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct imc_uncore_pci_dev {</div><div class='ctx'> 	__u32 pci_id;</div><div class='ctx'> 	struct pci_driver *driver;</div><div class='hunk'>@@ -514,6 +528,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {</div><div class='ctx'> 	IMC_DEV(IVB_E3_IMC, &amp;ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */</div><div class='ctx'> 	IMC_DEV(HSW_IMC, &amp;hsw_uncore_pci_driver),    /* 4th Gen Core Processor */</div><div class='ctx'> 	IMC_DEV(HSW_U_IMC, &amp;hsw_uncore_pci_driver),  /* 4th Gen Core ULT Mobile Processor */</div><div class='add'>+	IMC_DEV(BDW_IMC, &amp;bdw_uncore_pci_driver),    /* 5th Gen Core U */</div><div class='ctx'> 	{  /* end marker */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -561,6 +576,11 @@ int hsw_uncore_pci_init(void)</div><div class='ctx'> 	return imc_uncore_pci_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int bdw_uncore_pci_init(void)</div><div class='add'>+{</div><div class='add'>+	return imc_uncore_pci_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* end of Sandy Bridge uncore support */</div><div class='ctx'> </div><div class='ctx'> /* Nehalem uncore support */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c<br/>index e7d8c7608471..18ca99f2798b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/proc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/cpu/proc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/cpu/proc.c</a></div><div class='hunk'>@@ -12,7 +12,8 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	seq_printf(m, "physical id\t: %d\n", c-&gt;phys_proc_id);</div><div class='del'>-	seq_printf(m, "siblings\t: %d\n", cpumask_weight(cpu_core_mask(cpu)));</div><div class='add'>+	seq_printf(m, "siblings\t: %d\n",</div><div class='add'>+		   cpumask_weight(topology_core_cpumask(cpu)));</div><div class='ctx'> 	seq_printf(m, "core id\t\t: %d\n", c-&gt;cpu_core_id);</div><div class='ctx'> 	seq_printf(m, "cpu cores\t: %d\n", c-&gt;booted_cores);</div><div class='ctx'> 	seq_printf(m, "apicid\t\t: %d\n", c-&gt;apicid);</div><div class='head'>diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c<br/>index c76d3e37c6e1..e068d6683dba 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/crash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/crash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/crash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/crash.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/elfcore.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c<br/>index 6367a780cc8c..1f4acd68b98b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/devicetree.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/devicetree.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/devicetree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/devicetree.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='hunk'>@@ -17,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/of_pci.h&gt;</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='hunk'>@@ -65,7 +65,7 @@ static int __init add_bus_probe(void)</div><div class='ctx'> </div><div class='ctx'> 	return of_platform_bus_probe(NULL, ce4100_ids, NULL);</div><div class='ctx'> }</div><div class='del'>-module_init(add_bus_probe);</div><div class='add'>+device_initcall(add_bus_probe);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)</div><div class='hunk'>@@ -196,38 +196,31 @@ static struct of_ioapic_type of_ioapic_type[] =</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ioapic_xlate(struct irq_domain *domain,</div><div class='del'>-			struct device_node *controller,</div><div class='del'>-			const u32 *intspec, u32 intsize,</div><div class='del'>-			irq_hw_number_t *out_hwirq, u32 *out_type)</div><div class='add'>+static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			      unsigned int nr_irqs, void *arg)</div><div class='ctx'> {</div><div class='add'>+	struct of_phandle_args *irq_data = (void *)arg;</div><div class='ctx'> 	struct of_ioapic_type *it;</div><div class='del'>-	u32 line, idx, gsi;</div><div class='add'>+	struct irq_alloc_info tmp;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(intsize &lt; 2))</div><div class='add'>+	if (WARN_ON(irq_data-&gt;args_count &lt; 2))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	line = intspec[0];</div><div class='del'>-</div><div class='del'>-	if (intspec[1] &gt;= ARRAY_SIZE(of_ioapic_type))</div><div class='add'>+	if (irq_data-&gt;args[1] &gt;= ARRAY_SIZE(of_ioapic_type))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	it = &amp;of_ioapic_type[intspec[1]];</div><div class='add'>+	it = &amp;of_ioapic_type[irq_data-&gt;args[1]];</div><div class='add'>+	ioapic_set_alloc_attr(&amp;tmp, NUMA_NO_NODE, it-&gt;trigger, it-&gt;polarity);</div><div class='add'>+	tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));</div><div class='add'>+	tmp.ioapic_pin = irq_data-&gt;args[0];</div><div class='ctx'> </div><div class='del'>-	idx = (u32)(long)domain-&gt;host_data;</div><div class='del'>-	gsi = mp_pin_to_gsi(idx, line);</div><div class='del'>-	if (mp_set_gsi_attr(gsi, it-&gt;trigger, it-&gt;polarity, cpu_to_node(0)))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	*out_hwirq = line;</div><div class='del'>-	*out_type = it-&gt;out_type;</div><div class='del'>-	return 0;</div><div class='add'>+	return mp_irqdomain_alloc(domain, virq, nr_irqs, &amp;tmp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct irq_domain_ops ioapic_irq_domain_ops = {</div><div class='del'>-	.map = mp_irqdomain_map,</div><div class='del'>-	.unmap = mp_irqdomain_unmap,</div><div class='del'>-	.xlate = ioapic_xlate,</div><div class='add'>+static const struct irq_domain_ops ioapic_irq_domain_ops = {</div><div class='add'>+	.alloc		= dt_irqdomain_alloc,</div><div class='add'>+	.free		= mp_irqdomain_free,</div><div class='add'>+	.activate	= mp_irqdomain_activate,</div><div class='add'>+	.deactivate	= mp_irqdomain_deactivate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init dtb_add_ioapic(struct device_node *dn)</div><div class='head'>diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c<br/>index e2ce85db2283..a102564d08eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/e820.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/e820.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/e820.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/e820.c</a></div><div class='hunk'>@@ -149,6 +149,7 @@ static void __init e820_print_type(u32 type)</div><div class='ctx'> 	case E820_UNUSABLE:</div><div class='ctx'> 		printk(KERN_CONT "unusable");</div><div class='ctx'> 		break;</div><div class='add'>+	case E820_PMEM:</div><div class='ctx'> 	case E820_PRAM:</div><div class='ctx'> 		printk(KERN_CONT "persistent (type %u)", type);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -918,11 +919,32 @@ static inline const char *e820_type_to_string(int e820_type)</div><div class='ctx'> 	case E820_ACPI:	return "ACPI Tables";</div><div class='ctx'> 	case E820_NVS:	return "ACPI Non-volatile Storage";</div><div class='ctx'> 	case E820_UNUSABLE:	return "Unusable memory";</div><div class='del'>-	case E820_PRAM: return "Persistent RAM";</div><div class='add'>+	case E820_PRAM: return "Persistent Memory (legacy)";</div><div class='add'>+	case E820_PMEM: return "Persistent Memory";</div><div class='ctx'> 	default:	return "reserved";</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool do_mark_busy(u32 type, struct resource *res)</div><div class='add'>+{</div><div class='add'>+	/* this is the legacy bios/dos rom-shadow + mmio region */</div><div class='add'>+	if (res-&gt;start &lt; (1ULL&lt;&lt;20))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Treat persistent memory like device memory, i.e. reserve it</div><div class='add'>+	 * for exclusive use of a driver</div><div class='add'>+	 */</div><div class='add'>+	switch (type) {</div><div class='add'>+	case E820_RESERVED:</div><div class='add'>+	case E820_PRAM:</div><div class='add'>+	case E820_PMEM:</div><div class='add'>+		return false;</div><div class='add'>+	default:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Mark e820 reserved areas as busy for the resource manager.</div><div class='ctx'>  */</div><div class='hunk'>@@ -952,9 +974,7 @@ void __init e820_reserve_resources(void)</div><div class='ctx'> 		 * pci device BAR resource and insert them later in</div><div class='ctx'> 		 * pcibios_resource_survey()</div><div class='ctx'> 		 */</div><div class='del'>-		if (((e820.map[i].type != E820_RESERVED) &amp;&amp;</div><div class='del'>-		     (e820.map[i].type != E820_PRAM)) ||</div><div class='del'>-		     res-&gt;start &lt; (1ULL&lt;&lt;20)) {</div><div class='add'>+		if (do_mark_busy(e820.map[i].type, res)) {</div><div class='ctx'> 			res-&gt;flags |= IORESOURCE_BUSY;</div><div class='ctx'> 			insert_resource(&amp;iomem_resource, res);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1123,7 +1143,8 @@ void __init memblock_find_dma_reserve(void)</div><div class='ctx'> 		nr_pages += end_pfn - start_pfn;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_free_mem_range(u, NUMA_NO_NODE, &amp;start, &amp;end, NULL) {</div><div class='add'>+	for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &amp;start, &amp;end,</div><div class='add'>+				NULL) {</div><div class='ctx'> 		start_pfn = min_t(unsigned long, PFN_UP(start), MAX_DMA_PFN);</div><div class='ctx'> 		end_pfn = min_t(unsigned long, PFN_DOWN(end), MAX_DMA_PFN);</div><div class='ctx'> 		if (start_pfn &lt; end_pfn)</div><div class='head'>diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c<br/>index fe9f0b79a18b..9f9cc682e561 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/early-quirks.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/early-quirks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/early-quirks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/early-quirks.c</a></div><div class='hunk'>@@ -546,6 +546,7 @@ static const struct pci_device_id intel_stolen_ids[] __initconst = {</div><div class='ctx'> 	INTEL_BDW_D_IDS(&amp;gen8_stolen_funcs),</div><div class='ctx'> 	INTEL_CHV_IDS(&amp;chv_stolen_funcs),</div><div class='ctx'> 	INTEL_SKL_IDS(&amp;gen9_stolen_funcs),</div><div class='add'>+	INTEL_BXT_IDS(&amp;gen9_stolen_funcs),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init intel_graphics_stolen(int num, int slot, int func)</div><div class='hunk'>@@ -627,8 +628,12 @@ static struct chipset early_qrk[] __initdata = {</div><div class='ctx'> 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID,</div><div class='ctx'> 	  QFLAG_APPLY_ONCE, intel_graphics_stolen },</div><div class='ctx'> 	/*</div><div class='del'>-	 * HPET on current version of Baytrail platform has accuracy</div><div class='del'>-	 * problems, disable it for now:</div><div class='add'>+	 * HPET on the current version of the Baytrail platform has accuracy</div><div class='add'>+	 * problems: it will halt in deep idle state - so we disable it.</div><div class='add'>+	 *</div><div class='add'>+	 * More details can be found in section 18.10.1.3 of the datasheet:</div><div class='add'>+	 *</div><div class='add'>+	 *    http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-z8000-datasheet-vol-1.pdf</div><div class='ctx'> 	 */</div><div class='ctx'> 	{ PCI_VENDOR_ID_INTEL, 0x0f00,</div><div class='ctx'> 		PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},</div><div class='head'>diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c<br/>index 89427d8d4fc5..eec40f595ab9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/early_printk.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/early_printk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/early_printk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/early_printk.c</a></div><div class='hunk'>@@ -175,7 +175,9 @@ static __init void early_serial_init(char *s)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*s) {</div><div class='del'>-		if (kstrtoul(s, 0, &amp;baud) &lt; 0 || baud == 0)</div><div class='add'>+		baud = simple_strtoull(s, &amp;e, 0);</div><div class='add'>+</div><div class='add'>+		if (baud == 0 || s == e)</div><div class='ctx'> 			baud = DEFAULT_BAUD;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S<br/>deleted file mode 100644<br/>index 1c309763e321..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/entry_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/entry_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1401 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * entry.S contains the system-call and fault low-level handling routines.</div><div class='del'>- * This also contains the timer-interrupt handler, as well as all interrupts</div><div class='del'>- * and faults that can result in a task-switch.</div><div class='del'>- *</div><div class='del'>- * NOTE: This code handles signal-recognition, which happens every time</div><div class='del'>- * after a timer-interrupt and after each system call.</div><div class='del'>- *</div><div class='del'>- * I changed all the .align's to 4 (16 byte alignment), as that's faster</div><div class='del'>- * on a 486.</div><div class='del'>- *</div><div class='del'>- * Stack layout in 'syscall_exit':</div><div class='del'>- * 	ptrace needs to have all regs on the stack.</div><div class='del'>- *	if the order here is changed, it needs to be</div><div class='del'>- *	updated in fork.c:copy_process, signal.c:do_signal,</div><div class='del'>- *	ptrace.c and ptrace.h</div><div class='del'>- *</div><div class='del'>- *	 0(%esp) - %ebx</div><div class='del'>- *	 4(%esp) - %ecx</div><div class='del'>- *	 8(%esp) - %edx</div><div class='del'>- *       C(%esp) - %esi</div><div class='del'>- *	10(%esp) - %edi</div><div class='del'>- *	14(%esp) - %ebp</div><div class='del'>- *	18(%esp) - %eax</div><div class='del'>- *	1C(%esp) - %ds</div><div class='del'>- *	20(%esp) - %es</div><div class='del'>- *	24(%esp) - %fs</div><div class='del'>- *	28(%esp) - %gs		saved iff !CONFIG_X86_32_LAZY_GS</div><div class='del'>- *	2C(%esp) - orig_eax</div><div class='del'>- *	30(%esp) - %eip</div><div class='del'>- *	34(%esp) - %cs</div><div class='del'>- *	38(%esp) - %eflags</div><div class='del'>- *	3C(%esp) - %oldesp</div><div class='del'>- *	40(%esp) - %oldss</div><div class='del'>- *</div><div class='del'>- * "current" is in register %ebx during any slow entries.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;asm/thread_info.h&gt;</div><div class='del'>-#include &lt;asm/irqflags.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/segment.h&gt;</div><div class='del'>-#include &lt;asm/smp.h&gt;</div><div class='del'>-#include &lt;asm/page_types.h&gt;</div><div class='del'>-#include &lt;asm/percpu.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-#include &lt;asm/processor-flags.h&gt;</div><div class='del'>-#include &lt;asm/ftrace.h&gt;</div><div class='del'>-#include &lt;asm/irq_vectors.h&gt;</div><div class='del'>-#include &lt;asm/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/alternative-asm.h&gt;</div><div class='del'>-#include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/smap.h&gt;</div><div class='del'>-</div><div class='del'>-/* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='del'>-#include &lt;linux/elf-em.h&gt;</div><div class='del'>-#define AUDIT_ARCH_I386		(EM_386|__AUDIT_ARCH_LE)</div><div class='del'>-#define __AUDIT_ARCH_LE	   0x40000000</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_AUDITSYSCALL</div><div class='del'>-#define sysenter_audit	syscall_trace_entry</div><div class='del'>-#define sysexit_audit	syscall_exit_work</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	.section .entry.text, "ax"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We use macros for low-level operations which need to be overridden</div><div class='del'>- * for paravirtualization.  The following will never clobber any registers:</div><div class='del'>- *   INTERRUPT_RETURN (aka. "iret")</div><div class='del'>- *   GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")</div><div class='del'>- *   ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").</div><div class='del'>- *</div><div class='del'>- * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must</div><div class='del'>- * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).</div><div class='del'>- * Allowing a register to be clobbered can shrink the paravirt replacement</div><div class='del'>- * enough to patch inline, increasing performance.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PREEMPT</div><div class='del'>-#define preempt_stop(clobbers)	DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF</div><div class='del'>-#else</div><div class='del'>-#define preempt_stop(clobbers)</div><div class='del'>-#define resume_kernel		restore_all</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.macro TRACE_IRQS_IRET</div><div class='del'>-#ifdef CONFIG_TRACE_IRQFLAGS</div><div class='del'>-	testl $X86_EFLAGS_IF,PT_EFLAGS(%esp)     # interrupts off?</div><div class='del'>-	jz 1f</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-1:</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * User gs save/restore</div><div class='del'>- *</div><div class='del'>- * %gs is used for userland TLS and kernel only uses it for stack</div><div class='del'>- * canary which is required to be at %gs:20 by gcc.  Read the comment</div><div class='del'>- * at the top of stackprotector.h for more info.</div><div class='del'>- *</div><div class='del'>- * Local labels 98 and 99 are used.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_X86_32_LAZY_GS</div><div class='del'>-</div><div class='del'>- /* unfortunately push/pop can't be no-op */</div><div class='del'>-.macro PUSH_GS</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-.endm</div><div class='del'>-.macro POP_GS pop=0</div><div class='del'>-	addl $(4 + \pop), %esp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -(4 + \pop)</div><div class='del'>-.endm</div><div class='del'>-.macro POP_GS_EX</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>- /* all the rest are no-op */</div><div class='del'>-.macro PTGS_TO_GS</div><div class='del'>-.endm</div><div class='del'>-.macro PTGS_TO_GS_EX</div><div class='del'>-.endm</div><div class='del'>-.macro GS_TO_REG reg</div><div class='del'>-.endm</div><div class='del'>-.macro REG_TO_PTGS reg</div><div class='del'>-.endm</div><div class='del'>-.macro SET_KERNEL_GS reg</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#else	/* CONFIG_X86_32_LAZY_GS */</div><div class='del'>-</div><div class='del'>-.macro PUSH_GS</div><div class='del'>-	pushl_cfi %gs</div><div class='del'>-	/*CFI_REL_OFFSET gs, 0*/</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro POP_GS pop=0</div><div class='del'>-98:	popl_cfi %gs</div><div class='del'>-	/*CFI_RESTORE gs*/</div><div class='del'>-  .if \pop &lt;&gt; 0</div><div class='del'>-	add $\pop, %esp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -\pop</div><div class='del'>-  .endif</div><div class='del'>-.endm</div><div class='del'>-.macro POP_GS_EX</div><div class='del'>-.pushsection .fixup, "ax"</div><div class='del'>-99:	movl $0, (%esp)</div><div class='del'>-	jmp 98b</div><div class='del'>-.popsection</div><div class='del'>-	_ASM_EXTABLE(98b,99b)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro PTGS_TO_GS</div><div class='del'>-98:	mov PT_GS(%esp), %gs</div><div class='del'>-.endm</div><div class='del'>-.macro PTGS_TO_GS_EX</div><div class='del'>-.pushsection .fixup, "ax"</div><div class='del'>-99:	movl $0, PT_GS(%esp)</div><div class='del'>-	jmp 98b</div><div class='del'>-.popsection</div><div class='del'>-	_ASM_EXTABLE(98b,99b)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro GS_TO_REG reg</div><div class='del'>-	movl %gs, \reg</div><div class='del'>-	/*CFI_REGISTER gs, \reg*/</div><div class='del'>-.endm</div><div class='del'>-.macro REG_TO_PTGS reg</div><div class='del'>-	movl \reg, PT_GS(%esp)</div><div class='del'>-	/*CFI_REL_OFFSET gs, PT_GS*/</div><div class='del'>-.endm</div><div class='del'>-.macro SET_KERNEL_GS reg</div><div class='del'>-	movl $(__KERNEL_STACK_CANARY), \reg</div><div class='del'>-	movl \reg, %gs</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#endif	/* CONFIG_X86_32_LAZY_GS */</div><div class='del'>-</div><div class='del'>-.macro SAVE_ALL</div><div class='del'>-	cld</div><div class='del'>-	PUSH_GS</div><div class='del'>-	pushl_cfi %fs</div><div class='del'>-	/*CFI_REL_OFFSET fs, 0;*/</div><div class='del'>-	pushl_cfi %es</div><div class='del'>-	/*CFI_REL_OFFSET es, 0;*/</div><div class='del'>-	pushl_cfi %ds</div><div class='del'>-	/*CFI_REL_OFFSET ds, 0;*/</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	CFI_REL_OFFSET eax, 0</div><div class='del'>-	pushl_cfi %ebp</div><div class='del'>-	CFI_REL_OFFSET ebp, 0</div><div class='del'>-	pushl_cfi %edi</div><div class='del'>-	CFI_REL_OFFSET edi, 0</div><div class='del'>-	pushl_cfi %esi</div><div class='del'>-	CFI_REL_OFFSET esi, 0</div><div class='del'>-	pushl_cfi %edx</div><div class='del'>-	CFI_REL_OFFSET edx, 0</div><div class='del'>-	pushl_cfi %ecx</div><div class='del'>-	CFI_REL_OFFSET ecx, 0</div><div class='del'>-	pushl_cfi %ebx</div><div class='del'>-	CFI_REL_OFFSET ebx, 0</div><div class='del'>-	movl $(__USER_DS), %edx</div><div class='del'>-	movl %edx, %ds</div><div class='del'>-	movl %edx, %es</div><div class='del'>-	movl $(__KERNEL_PERCPU), %edx</div><div class='del'>-	movl %edx, %fs</div><div class='del'>-	SET_KERNEL_GS %edx</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RESTORE_INT_REGS</div><div class='del'>-	popl_cfi %ebx</div><div class='del'>-	CFI_RESTORE ebx</div><div class='del'>-	popl_cfi %ecx</div><div class='del'>-	CFI_RESTORE ecx</div><div class='del'>-	popl_cfi %edx</div><div class='del'>-	CFI_RESTORE edx</div><div class='del'>-	popl_cfi %esi</div><div class='del'>-	CFI_RESTORE esi</div><div class='del'>-	popl_cfi %edi</div><div class='del'>-	CFI_RESTORE edi</div><div class='del'>-	popl_cfi %ebp</div><div class='del'>-	CFI_RESTORE ebp</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	CFI_RESTORE eax</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RESTORE_REGS pop=0</div><div class='del'>-	RESTORE_INT_REGS</div><div class='del'>-1:	popl_cfi %ds</div><div class='del'>-	/*CFI_RESTORE ds;*/</div><div class='del'>-2:	popl_cfi %es</div><div class='del'>-	/*CFI_RESTORE es;*/</div><div class='del'>-3:	popl_cfi %fs</div><div class='del'>-	/*CFI_RESTORE fs;*/</div><div class='del'>-	POP_GS \pop</div><div class='del'>-.pushsection .fixup, "ax"</div><div class='del'>-4:	movl $0, (%esp)</div><div class='del'>-	jmp 1b</div><div class='del'>-5:	movl $0, (%esp)</div><div class='del'>-	jmp 2b</div><div class='del'>-6:	movl $0, (%esp)</div><div class='del'>-	jmp 3b</div><div class='del'>-.popsection</div><div class='del'>-	_ASM_EXTABLE(1b,4b)</div><div class='del'>-	_ASM_EXTABLE(2b,5b)</div><div class='del'>-	_ASM_EXTABLE(3b,6b)</div><div class='del'>-	POP_GS_EX</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RING0_INT_FRAME</div><div class='del'>-	CFI_STARTPROC simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA esp, 3*4</div><div class='del'>-	/*CFI_OFFSET cs, -2*4;*/</div><div class='del'>-	CFI_OFFSET eip, -3*4</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RING0_EC_FRAME</div><div class='del'>-	CFI_STARTPROC simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA esp, 4*4</div><div class='del'>-	/*CFI_OFFSET cs, -2*4;*/</div><div class='del'>-	CFI_OFFSET eip, -3*4</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RING0_PTREGS_FRAME</div><div class='del'>-	CFI_STARTPROC simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA esp, PT_OLDESP-PT_EBX</div><div class='del'>-	/*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/</div><div class='del'>-	CFI_OFFSET eip, PT_EIP-PT_OLDESP</div><div class='del'>-	/*CFI_OFFSET es, PT_ES-PT_OLDESP;*/</div><div class='del'>-	/*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/</div><div class='del'>-	CFI_OFFSET eax, PT_EAX-PT_OLDESP</div><div class='del'>-	CFI_OFFSET ebp, PT_EBP-PT_OLDESP</div><div class='del'>-	CFI_OFFSET edi, PT_EDI-PT_OLDESP</div><div class='del'>-	CFI_OFFSET esi, PT_ESI-PT_OLDESP</div><div class='del'>-	CFI_OFFSET edx, PT_EDX-PT_OLDESP</div><div class='del'>-	CFI_OFFSET ecx, PT_ECX-PT_OLDESP</div><div class='del'>-	CFI_OFFSET ebx, PT_EBX-PT_OLDESP</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-ENTRY(ret_from_fork)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	call schedule_tail</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	pushl_cfi $0x0202		# Reset kernel eflags</div><div class='del'>-	popfl_cfi</div><div class='del'>-	jmp syscall_exit</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(ret_from_fork)</div><div class='del'>-</div><div class='del'>-ENTRY(ret_from_kernel_thread)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	call schedule_tail</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	pushl_cfi $0x0202		# Reset kernel eflags</div><div class='del'>-	popfl_cfi</div><div class='del'>-	movl PT_EBP(%esp),%eax</div><div class='del'>-	call *PT_EBX(%esp)</div><div class='del'>-	movl $0,PT_EAX(%esp)</div><div class='del'>-	jmp syscall_exit</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-ENDPROC(ret_from_kernel_thread)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return to user mode is not as complex as all this looks,</div><div class='del'>- * but we want the default path for a system call return to</div><div class='del'>- * go as quickly as possible which is why some of this is</div><div class='del'>- * less clear than it otherwise should be.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	# userspace resumption stub bypassing syscall exit tracing</div><div class='del'>-	ALIGN</div><div class='del'>-	RING0_PTREGS_FRAME</div><div class='del'>-ret_from_exception:</div><div class='del'>-	preempt_stop(CLBR_ANY)</div><div class='del'>-ret_from_intr:</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-#ifdef CONFIG_VM86</div><div class='del'>-	movl PT_EFLAGS(%esp), %eax	# mix EFLAGS and CS</div><div class='del'>-	movb PT_CS(%esp), %al</div><div class='del'>-	andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax</div><div class='del'>-#else</div><div class='del'>-	/*</div><div class='del'>-	 * We can be coming here from child spawned by kernel_thread().</div><div class='del'>-	 */</div><div class='del'>-	movl PT_CS(%esp), %eax</div><div class='del'>-	andl $SEGMENT_RPL_MASK, %eax</div><div class='del'>-#endif</div><div class='del'>-	cmpl $USER_RPL, %eax</div><div class='del'>-	jb resume_kernel		# not returning to v8086 or userspace</div><div class='del'>-</div><div class='del'>-ENTRY(resume_userspace)</div><div class='del'>-	LOCKDEP_SYS_EXIT</div><div class='del'>- 	DISABLE_INTERRUPTS(CLBR_ANY)	# make sure we don't miss an interrupt</div><div class='del'>-					# setting need_resched or sigpending</div><div class='del'>-					# between sampling and the iret</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl TI_flags(%ebp), %ecx</div><div class='del'>-	andl $_TIF_WORK_MASK, %ecx	# is there any work to be done on</div><div class='del'>-					# int/exception return?</div><div class='del'>-	jne work_pending</div><div class='del'>-	jmp restore_all</div><div class='del'>-END(ret_from_exception)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PREEMPT</div><div class='del'>-ENTRY(resume_kernel)</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='del'>-need_resched:</div><div class='del'>-	cmpl $0,PER_CPU_VAR(__preempt_count)</div><div class='del'>-	jnz restore_all</div><div class='del'>-	testl $X86_EFLAGS_IF,PT_EFLAGS(%esp)	# interrupts off (exception path) ?</div><div class='del'>-	jz restore_all</div><div class='del'>-	call preempt_schedule_irq</div><div class='del'>-	jmp need_resched</div><div class='del'>-END(resume_kernel)</div><div class='del'>-#endif</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-/* SYSENTER_RETURN points to after the "sysenter" instruction in</div><div class='del'>-   the vsyscall page.  See vsyscall-sysentry.S, which defines the symbol.  */</div><div class='del'>-</div><div class='del'>-	# sysenter call handler stub</div><div class='del'>-ENTRY(ia32_sysenter_target)</div><div class='del'>-	CFI_STARTPROC simple</div><div class='del'>-	CFI_SIGNAL_FRAME</div><div class='del'>-	CFI_DEF_CFA esp, 0</div><div class='del'>-	CFI_REGISTER esp, ebp</div><div class='del'>-	movl TSS_sysenter_sp0(%esp),%esp</div><div class='del'>-sysenter_past_esp:</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupts are disabled here, but we can't trace it until</div><div class='del'>-	 * enough kernel state to call TRACE_IRQS_OFF can be called - but</div><div class='del'>-	 * we immediately enable interrupts at that point anyway.</div><div class='del'>-	 */</div><div class='del'>-	pushl_cfi $__USER_DS</div><div class='del'>-	/*CFI_REL_OFFSET ss, 0*/</div><div class='del'>-	pushl_cfi %ebp</div><div class='del'>-	CFI_REL_OFFSET esp, 0</div><div class='del'>-	pushfl_cfi</div><div class='del'>-	orl $X86_EFLAGS_IF, (%esp)</div><div class='del'>-	pushl_cfi $__USER_CS</div><div class='del'>-	/*CFI_REL_OFFSET cs, 0*/</div><div class='del'>-	/*</div><div class='del'>-	 * Push current_thread_info()-&gt;sysenter_return to the stack.</div><div class='del'>-	 * A tiny bit of offset fixup is necessary: TI_sysenter_return</div><div class='del'>-	 * is relative to thread_info, which is at the bottom of the</div><div class='del'>-	 * kernel stack page.  4*4 means the 4 words pushed above;</div><div class='del'>-	 * TOP_OF_KERNEL_STACK_PADDING takes us to the top of the stack;</div><div class='del'>-	 * and THREAD_SIZE takes us to the bottom.</div><div class='del'>-	 */</div><div class='del'>-	pushl_cfi ((TI_sysenter_return) - THREAD_SIZE + TOP_OF_KERNEL_STACK_PADDING + 4*4)(%esp)</div><div class='del'>-	CFI_REL_OFFSET eip, 0</div><div class='del'>-</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Load the potential sixth argument from user stack.</div><div class='del'>- * Careful about security.</div><div class='del'>- */</div><div class='del'>-	cmpl $__PAGE_OFFSET-3,%ebp</div><div class='del'>-	jae syscall_fault</div><div class='del'>-	ASM_STAC</div><div class='del'>-1:	movl (%ebp),%ebp</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	movl %ebp,PT_EBP(%esp)</div><div class='del'>-	_ASM_EXTABLE(1b,syscall_fault)</div><div class='del'>-</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)</div><div class='del'>-	jnz sysenter_audit</div><div class='del'>-sysenter_do_call:</div><div class='del'>-	cmpl $(NR_syscalls), %eax</div><div class='del'>-	jae sysenter_badsys</div><div class='del'>-	call *sys_call_table(,%eax,4)</div><div class='del'>-sysenter_after_call:</div><div class='del'>-	movl %eax,PT_EAX(%esp)</div><div class='del'>-	LOCKDEP_SYS_EXIT</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl TI_flags(%ebp), %ecx</div><div class='del'>-	testl $_TIF_ALLWORK_MASK, %ecx</div><div class='del'>-	jnz sysexit_audit</div><div class='del'>-sysenter_exit:</div><div class='del'>-/* if something modifies registers it must also disable sysexit */</div><div class='del'>-	movl PT_EIP(%esp), %edx</div><div class='del'>-	movl PT_OLDESP(%esp), %ecx</div><div class='del'>-	xorl %ebp,%ebp</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-1:	mov  PT_FS(%esp), %fs</div><div class='del'>-	PTGS_TO_GS</div><div class='del'>-	ENABLE_INTERRUPTS_SYSEXIT</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AUDITSYSCALL</div><div class='del'>-sysenter_audit:</div><div class='del'>-	testl $(_TIF_WORK_SYSCALL_ENTRY &amp; ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp)</div><div class='del'>-	jnz syscall_trace_entry</div><div class='del'>-	/* movl PT_EAX(%esp), %eax	already set, syscall number: 1st arg to audit */</div><div class='del'>-	movl PT_EBX(%esp), %edx		/* ebx/a0: 2nd arg to audit */</div><div class='del'>-	/* movl PT_ECX(%esp), %ecx	already set, a1: 3nd arg to audit */</div><div class='del'>-	pushl_cfi PT_ESI(%esp)		/* a3: 5th arg */</div><div class='del'>-	pushl_cfi PT_EDX+4(%esp)	/* a2: 4th arg */</div><div class='del'>-	call __audit_syscall_entry</div><div class='del'>-	popl_cfi %ecx /* get that remapped edx off the stack */</div><div class='del'>-	popl_cfi %ecx /* get that remapped esi off the stack */</div><div class='del'>-	movl PT_EAX(%esp),%eax		/* reload syscall number */</div><div class='del'>-	jmp sysenter_do_call</div><div class='del'>-</div><div class='del'>-sysexit_audit:</div><div class='del'>-	testl $(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), %ecx</div><div class='del'>-	jnz syscall_exit_work</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_ANY)</div><div class='del'>-	movl %eax,%edx		/* second arg, syscall return value */</div><div class='del'>-	cmpl $-MAX_ERRNO,%eax	/* is it an error ? */</div><div class='del'>-	setbe %al		/* 1 if so, 0 if not */</div><div class='del'>-	movzbl %al,%eax		/* zero-extend that */</div><div class='del'>-	call __audit_syscall_exit</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_ANY)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl TI_flags(%ebp), %ecx</div><div class='del'>-	testl $(_TIF_ALLWORK_MASK &amp; ~_TIF_SYSCALL_AUDIT), %ecx</div><div class='del'>-	jnz syscall_exit_work</div><div class='del'>-	movl PT_EAX(%esp),%eax	/* reload syscall return value */</div><div class='del'>-	jmp sysenter_exit</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-.pushsection .fixup,"ax"</div><div class='del'>-2:	movl $0,PT_FS(%esp)</div><div class='del'>-	jmp 1b</div><div class='del'>-.popsection</div><div class='del'>-	_ASM_EXTABLE(1b,2b)</div><div class='del'>-	PTGS_TO_GS_EX</div><div class='del'>-ENDPROC(ia32_sysenter_target)</div><div class='del'>-</div><div class='del'>-	# system call handler stub</div><div class='del'>-ENTRY(system_call)</div><div class='del'>-	RING0_INT_FRAME			# can't unwind into user space anyway</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi %eax			# save orig_eax</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-					# system call tracing in operation / emulation</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)</div><div class='del'>-	jnz syscall_trace_entry</div><div class='del'>-	cmpl $(NR_syscalls), %eax</div><div class='del'>-	jae syscall_badsys</div><div class='del'>-syscall_call:</div><div class='del'>-	call *sys_call_table(,%eax,4)</div><div class='del'>-syscall_after_call:</div><div class='del'>-	movl %eax,PT_EAX(%esp)		# store the return value</div><div class='del'>-syscall_exit:</div><div class='del'>-	LOCKDEP_SYS_EXIT</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_ANY)	# make sure we don't miss an interrupt</div><div class='del'>-					# setting need_resched or sigpending</div><div class='del'>-					# between sampling and the iret</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl TI_flags(%ebp), %ecx</div><div class='del'>-	testl $_TIF_ALLWORK_MASK, %ecx	# current-&gt;work</div><div class='del'>-	jnz syscall_exit_work</div><div class='del'>-</div><div class='del'>-restore_all:</div><div class='del'>-	TRACE_IRQS_IRET</div><div class='del'>-restore_all_notrace:</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-	movl PT_EFLAGS(%esp), %eax	# mix EFLAGS, SS and CS</div><div class='del'>-	# Warning: PT_OLDSS(%esp) contains the wrong/random values if we</div><div class='del'>-	# are returning to the kernel.</div><div class='del'>-	# See comments in process.c:copy_thread() for details.</div><div class='del'>-	movb PT_OLDSS(%esp), %ah</div><div class='del'>-	movb PT_CS(%esp), %al</div><div class='del'>-	andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK &lt;&lt; 8) | SEGMENT_RPL_MASK), %eax</div><div class='del'>-	cmpl $((SEGMENT_LDT &lt;&lt; 8) | USER_RPL), %eax</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	je ldt_ss			# returning to user-space with LDT SS</div><div class='del'>-#endif</div><div class='del'>-restore_nocheck:</div><div class='del'>-	RESTORE_REGS 4			# skip orig_eax/error_code</div><div class='del'>-irq_return:</div><div class='del'>-	INTERRUPT_RETURN</div><div class='del'>-.section .fixup,"ax"</div><div class='del'>-ENTRY(iret_exc)</div><div class='del'>-	pushl $0			# no error code</div><div class='del'>-	pushl $do_iret_error</div><div class='del'>-	jmp error_code</div><div class='del'>-.previous</div><div class='del'>-	_ASM_EXTABLE(irq_return,iret_exc)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='del'>-ldt_ss:</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-	/*</div><div class='del'>-	 * The kernel can't run on a non-flat stack if paravirt mode</div><div class='del'>-	 * is active.  Rather than try to fixup the high bits of</div><div class='del'>-	 * ESP, bypass this code entirely.  This may break DOSemu</div><div class='del'>-	 * and/or Wine support in a paravirt VM, although the option</div><div class='del'>-	 * is still available to implement the setting of the high</div><div class='del'>-	 * 16-bits in the INTERRUPT_RETURN paravirt-op.</div><div class='del'>-	 */</div><div class='del'>-	cmpl $0, pv_info+PARAVIRT_enabled</div><div class='del'>-	jne restore_nocheck</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Setup and switch to ESPFIX stack</div><div class='del'>- *</div><div class='del'>- * We're returning to userspace with a 16 bit stack. The CPU will not</div><div class='del'>- * restore the high word of ESP for us on executing iret... This is an</div><div class='del'>- * "official" bug of all the x86-compatible CPUs, which we can work</div><div class='del'>- * around to make dosemu and wine happy. We do this by preloading the</div><div class='del'>- * high word of ESP with the high word of the userspace ESP while</div><div class='del'>- * compensating for the offset by changing to the ESPFIX segment with</div><div class='del'>- * a base address that matches for the difference.</div><div class='del'>- */</div><div class='del'>-#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)</div><div class='del'>-	mov %esp, %edx			/* load kernel esp */</div><div class='del'>-	mov PT_OLDESP(%esp), %eax	/* load userspace esp */</div><div class='del'>-	mov %dx, %ax			/* eax: new kernel esp */</div><div class='del'>-	sub %eax, %edx			/* offset (low word is 0) */</div><div class='del'>-	shr $16, %edx</div><div class='del'>-	mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */</div><div class='del'>-	mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */</div><div class='del'>-	pushl_cfi $__ESPFIX_SS</div><div class='del'>-	pushl_cfi %eax			/* new kernel esp */</div><div class='del'>-	/* Disable interrupts, but do not irqtrace this section: we</div><div class='del'>-	 * will soon execute iret and the tracer was already set to</div><div class='del'>-	 * the irqstate after the iret */</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_EAX)</div><div class='del'>-	lss (%esp), %esp		/* switch to espfix segment */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-	jmp restore_nocheck</div><div class='del'>-#endif</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-ENDPROC(system_call)</div><div class='del'>-</div><div class='del'>-	# perform work that needs to be done immediately before resumption</div><div class='del'>-	ALIGN</div><div class='del'>-	RING0_PTREGS_FRAME		# can't unwind into user space anyway</div><div class='del'>-work_pending:</div><div class='del'>-	testb $_TIF_NEED_RESCHED, %cl</div><div class='del'>-	jz work_notifysig</div><div class='del'>-work_resched:</div><div class='del'>-	call schedule</div><div class='del'>-	LOCKDEP_SYS_EXIT</div><div class='del'>-	DISABLE_INTERRUPTS(CLBR_ANY)	# make sure we don't miss an interrupt</div><div class='del'>-					# setting need_resched or sigpending</div><div class='del'>-					# between sampling and the iret</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl TI_flags(%ebp), %ecx</div><div class='del'>-	andl $_TIF_WORK_MASK, %ecx	# is there any work to be done other</div><div class='del'>-					# than syscall tracing?</div><div class='del'>-	jz restore_all</div><div class='del'>-	testb $_TIF_NEED_RESCHED, %cl</div><div class='del'>-	jnz work_resched</div><div class='del'>-</div><div class='del'>-work_notifysig:				# deal with pending signals and</div><div class='del'>-					# notify-resume requests</div><div class='del'>-#ifdef CONFIG_VM86</div><div class='del'>-	testl $X86_EFLAGS_VM, PT_EFLAGS(%esp)</div><div class='del'>-	movl %esp, %eax</div><div class='del'>-	jnz work_notifysig_v86		# returning to kernel-space or</div><div class='del'>-					# vm86-space</div><div class='del'>-1:</div><div class='del'>-#else</div><div class='del'>-	movl %esp, %eax</div><div class='del'>-#endif</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	movb PT_CS(%esp), %bl</div><div class='del'>-	andb $SEGMENT_RPL_MASK, %bl</div><div class='del'>-	cmpb $USER_RPL, %bl</div><div class='del'>-	jb resume_kernel</div><div class='del'>-	xorl %edx, %edx</div><div class='del'>-	call do_notify_resume</div><div class='del'>-	jmp resume_userspace</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_VM86</div><div class='del'>-	ALIGN</div><div class='del'>-work_notifysig_v86:</div><div class='del'>-	pushl_cfi %ecx			# save ti_flags for do_notify_resume</div><div class='del'>-	call save_v86_state		# %eax contains pt_regs pointer</div><div class='del'>-	popl_cfi %ecx</div><div class='del'>-	movl %eax, %esp</div><div class='del'>-	jmp 1b</div><div class='del'>-#endif</div><div class='del'>-END(work_pending)</div><div class='del'>-</div><div class='del'>-	# perform syscall exit tracing</div><div class='del'>-	ALIGN</div><div class='del'>-syscall_trace_entry:</div><div class='del'>-	movl $-ENOSYS,PT_EAX(%esp)</div><div class='del'>-	movl %esp, %eax</div><div class='del'>-	call syscall_trace_enter</div><div class='del'>-	/* What it returned is what we'll actually use.  */</div><div class='del'>-	cmpl $(NR_syscalls), %eax</div><div class='del'>-	jnae syscall_call</div><div class='del'>-	jmp syscall_exit</div><div class='del'>-END(syscall_trace_entry)</div><div class='del'>-</div><div class='del'>-	# perform syscall exit tracing</div><div class='del'>-	ALIGN</div><div class='del'>-syscall_exit_work:</div><div class='del'>-	testl $_TIF_WORK_SYSCALL_EXIT, %ecx</div><div class='del'>-	jz work_pending</div><div class='del'>-	TRACE_IRQS_ON</div><div class='del'>-	ENABLE_INTERRUPTS(CLBR_ANY)	# could let syscall_trace_leave() call</div><div class='del'>-					# schedule() instead</div><div class='del'>-	movl %esp, %eax</div><div class='del'>-	call syscall_trace_leave</div><div class='del'>-	jmp resume_userspace</div><div class='del'>-END(syscall_exit_work)</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-	RING0_INT_FRAME			# can't unwind into user space anyway</div><div class='del'>-syscall_fault:</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	GET_THREAD_INFO(%ebp)</div><div class='del'>-	movl $-EFAULT,PT_EAX(%esp)</div><div class='del'>-	jmp resume_userspace</div><div class='del'>-END(syscall_fault)</div><div class='del'>-</div><div class='del'>-syscall_badsys:</div><div class='del'>-	movl $-ENOSYS,%eax</div><div class='del'>-	jmp syscall_after_call</div><div class='del'>-END(syscall_badsys)</div><div class='del'>-</div><div class='del'>-sysenter_badsys:</div><div class='del'>-	movl $-ENOSYS,%eax</div><div class='del'>-	jmp sysenter_after_call</div><div class='del'>-END(sysenter_badsys)</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-.macro FIXUP_ESPFIX_STACK</div><div class='del'>-/*</div><div class='del'>- * Switch back for ESPFIX stack to the normal zerobased stack</div><div class='del'>- *</div><div class='del'>- * We can't call C functions using the ESPFIX stack. This code reads</div><div class='del'>- * the high word of the segment base from the GDT and swiches to the</div><div class='del'>- * normal stack and adjusts ESP with the matching offset.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-	/* fixup the stack */</div><div class='del'>-	mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */</div><div class='del'>-	mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */</div><div class='del'>-	shl $16, %eax</div><div class='del'>-	addl %esp, %eax			/* the adjusted stack pointer */</div><div class='del'>-	pushl_cfi $__KERNEL_DS</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	lss (%esp), %esp		/* switch to the normal stack segment */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-.macro UNWIND_ESPFIX_STACK</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-	movl %ss, %eax</div><div class='del'>-	/* see if on espfix stack */</div><div class='del'>-	cmpw $__ESPFIX_SS, %ax</div><div class='del'>-	jne 27f</div><div class='del'>-	movl $__KERNEL_DS, %eax</div><div class='del'>-	movl %eax, %ds</div><div class='del'>-	movl %eax, %es</div><div class='del'>-	/* switch to normal stack */</div><div class='del'>-	FIXUP_ESPFIX_STACK</div><div class='del'>-27:</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Build the entry stubs with some assembler magic.</div><div class='del'>- * We pack 1 stub into every 8-byte block.</div><div class='del'>- */</div><div class='del'>-	.align 8</div><div class='del'>-ENTRY(irq_entries_start)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-    vector=FIRST_EXTERNAL_VECTOR</div><div class='del'>-    .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)</div><div class='del'>-	pushl_cfi $(~vector+0x80)	/* Note: always in signed byte range */</div><div class='del'>-    vector=vector+1</div><div class='del'>-	jmp	common_interrupt</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -4</div><div class='del'>-	.align	8</div><div class='del'>-    .endr</div><div class='del'>-END(irq_entries_start)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the CPU automatically disables interrupts when executing an IRQ vector,</div><div class='del'>- * so IRQ-flags tracing has to follow that:</div><div class='del'>- */</div><div class='del'>-	.p2align CONFIG_X86_L1_CACHE_SHIFT</div><div class='del'>-common_interrupt:</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	addl $-0x80,(%esp)	/* Adjust vector into the [-256,-1] range */</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl %esp,%eax</div><div class='del'>-	call do_IRQ</div><div class='del'>-	jmp ret_from_intr</div><div class='del'>-ENDPROC(common_interrupt)</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-#define BUILD_INTERRUPT3(name, nr, fn)	\</div><div class='del'>-ENTRY(name)				\</div><div class='del'>-	RING0_INT_FRAME;		\</div><div class='del'>-	ASM_CLAC;			\</div><div class='del'>-	pushl_cfi $~(nr);		\</div><div class='del'>-	SAVE_ALL;			\</div><div class='del'>-	TRACE_IRQS_OFF			\</div><div class='del'>-	movl %esp,%eax;			\</div><div class='del'>-	call fn;			\</div><div class='del'>-	jmp ret_from_intr;		\</div><div class='del'>-	CFI_ENDPROC;			\</div><div class='del'>-ENDPROC(name)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRACING</div><div class='del'>-#define TRACE_BUILD_INTERRUPT(name, nr)		\</div><div class='del'>-	BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)</div><div class='del'>-#else</div><div class='del'>-#define TRACE_BUILD_INTERRUPT(name, nr)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define BUILD_INTERRUPT(name, nr) \</div><div class='del'>-	BUILD_INTERRUPT3(name, nr, smp_##name); \</div><div class='del'>-	TRACE_BUILD_INTERRUPT(name, nr)</div><div class='del'>-</div><div class='del'>-/* The include is where all of the SMP etc. interrupts come from */</div><div class='del'>-#include &lt;asm/entry_arch.h&gt;</div><div class='del'>-</div><div class='del'>-ENTRY(coprocessor_error)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_coprocessor_error</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(coprocessor_error)</div><div class='del'>-</div><div class='del'>-ENTRY(simd_coprocessor_error)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-#ifdef CONFIG_X86_INVD_BUG</div><div class='del'>-	/* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */</div><div class='del'>-	ALTERNATIVE "pushl_cfi $do_general_protection",	\</div><div class='del'>-		    "pushl $do_simd_coprocessor_error", \</div><div class='del'>-		    X86_FEATURE_XMM</div><div class='del'>-#else</div><div class='del'>-	pushl_cfi $do_simd_coprocessor_error</div><div class='del'>-#endif</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(simd_coprocessor_error)</div><div class='del'>-</div><div class='del'>-ENTRY(device_not_available)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $-1			# mark this as an int</div><div class='del'>-	pushl_cfi $do_device_not_available</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(device_not_available)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARAVIRT</div><div class='del'>-ENTRY(native_iret)</div><div class='del'>-	iret</div><div class='del'>-	_ASM_EXTABLE(native_iret, iret_exc)</div><div class='del'>-END(native_iret)</div><div class='del'>-</div><div class='del'>-ENTRY(native_irq_enable_sysexit)</div><div class='del'>-	sti</div><div class='del'>-	sysexit</div><div class='del'>-END(native_irq_enable_sysexit)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-ENTRY(overflow)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_overflow</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(overflow)</div><div class='del'>-</div><div class='del'>-ENTRY(bounds)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_bounds</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(bounds)</div><div class='del'>-</div><div class='del'>-ENTRY(invalid_op)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_invalid_op</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(invalid_op)</div><div class='del'>-</div><div class='del'>-ENTRY(coprocessor_segment_overrun)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_coprocessor_segment_overrun</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(coprocessor_segment_overrun)</div><div class='del'>-</div><div class='del'>-ENTRY(invalid_TSS)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_invalid_TSS</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(invalid_TSS)</div><div class='del'>-</div><div class='del'>-ENTRY(segment_not_present)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_segment_not_present</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(segment_not_present)</div><div class='del'>-</div><div class='del'>-ENTRY(stack_segment)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_stack_segment</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(stack_segment)</div><div class='del'>-</div><div class='del'>-ENTRY(alignment_check)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_alignment_check</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(alignment_check)</div><div class='del'>-</div><div class='del'>-ENTRY(divide_error)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0			# no error code</div><div class='del'>-	pushl_cfi $do_divide_error</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(divide_error)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_MCE</div><div class='del'>-ENTRY(machine_check)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi machine_check_vector</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(machine_check)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-ENTRY(spurious_interrupt_bug)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $0</div><div class='del'>-	pushl_cfi $do_spurious_interrupt_bug</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(spurious_interrupt_bug)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_XEN</div><div class='del'>-/* Xen doesn't set %esp to be precisely what the normal sysenter</div><div class='del'>-   entrypoint expects, so fix it up before using the normal path. */</div><div class='del'>-ENTRY(xen_sysenter_target)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	addl $5*4, %esp		/* remove xen-provided frame */</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -5*4</div><div class='del'>-	jmp sysenter_past_esp</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-ENTRY(xen_hypervisor_callback)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi $-1 /* orig_ax = -1 =&gt; not a system call */</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-</div><div class='del'>-	/* Check to see if we got the event in the critical</div><div class='del'>-	   region in xen_iret_direct, after we've reenabled</div><div class='del'>-	   events and checked for pending events.  This simulates</div><div class='del'>-	   iret instruction's behaviour where it delivers a</div><div class='del'>-	   pending interrupt when enabling interrupts. */</div><div class='del'>-	movl PT_EIP(%esp),%eax</div><div class='del'>-	cmpl $xen_iret_start_crit,%eax</div><div class='del'>-	jb   1f</div><div class='del'>-	cmpl $xen_iret_end_crit,%eax</div><div class='del'>-	jae  1f</div><div class='del'>-</div><div class='del'>-	jmp  xen_iret_crit_fixup</div><div class='del'>-</div><div class='del'>-ENTRY(xen_do_upcall)</div><div class='del'>-1:	mov %esp, %eax</div><div class='del'>-	call xen_evtchn_do_upcall</div><div class='del'>-#ifndef CONFIG_PREEMPT</div><div class='del'>-	call xen_maybe_preempt_hcall</div><div class='del'>-#endif</div><div class='del'>-	jmp  ret_from_intr</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-ENDPROC(xen_hypervisor_callback)</div><div class='del'>-</div><div class='del'>-# Hypervisor uses this for application faults while it executes.</div><div class='del'>-# We get here for two reasons:</div><div class='del'>-#  1. Fault while reloading DS, ES, FS or GS</div><div class='del'>-#  2. Fault while executing IRET</div><div class='del'>-# Category 1 we fix up by reattempting the load, and zeroing the segment</div><div class='del'>-# register if the load fails.</div><div class='del'>-# Category 2 we fix up by jumping to do_iret_error. We cannot use the</div><div class='del'>-# normal Linux return path in this case because if we use the IRET hypercall</div><div class='del'>-# to pop the stack frame we end up in an infinite loop of failsafe callbacks.</div><div class='del'>-# We distinguish between categories by maintaining a status value in EAX.</div><div class='del'>-ENTRY(xen_failsafe_callback)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	movl $1,%eax</div><div class='del'>-1:	mov 4(%esp),%ds</div><div class='del'>-2:	mov 8(%esp),%es</div><div class='del'>-3:	mov 12(%esp),%fs</div><div class='del'>-4:	mov 16(%esp),%gs</div><div class='del'>-	/* EAX == 0 =&gt; Category 1 (Bad segment)</div><div class='del'>-	   EAX != 0 =&gt; Category 2 (Bad IRET) */</div><div class='del'>-	testl %eax,%eax</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	lea 16(%esp),%esp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -16</div><div class='del'>-	jz 5f</div><div class='del'>-	jmp iret_exc</div><div class='del'>-5:	pushl_cfi $-1 /* orig_ax = -1 =&gt; not a system call */</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	jmp ret_from_exception</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-.section .fixup,"ax"</div><div class='del'>-6:	xorl %eax,%eax</div><div class='del'>-	movl %eax,4(%esp)</div><div class='del'>-	jmp 1b</div><div class='del'>-7:	xorl %eax,%eax</div><div class='del'>-	movl %eax,8(%esp)</div><div class='del'>-	jmp 2b</div><div class='del'>-8:	xorl %eax,%eax</div><div class='del'>-	movl %eax,12(%esp)</div><div class='del'>-	jmp 3b</div><div class='del'>-9:	xorl %eax,%eax</div><div class='del'>-	movl %eax,16(%esp)</div><div class='del'>-	jmp 4b</div><div class='del'>-.previous</div><div class='del'>-	_ASM_EXTABLE(1b,6b)</div><div class='del'>-	_ASM_EXTABLE(2b,7b)</div><div class='del'>-	_ASM_EXTABLE(3b,8b)</div><div class='del'>-	_ASM_EXTABLE(4b,9b)</div><div class='del'>-ENDPROC(xen_failsafe_callback)</div><div class='del'>-</div><div class='del'>-BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,</div><div class='del'>-		xen_evtchn_do_upcall)</div><div class='del'>-</div><div class='del'>-#endif	/* CONFIG_XEN */</div><div class='del'>-</div><div class='del'>-#if IS_ENABLED(CONFIG_HYPERV)</div><div class='del'>-</div><div class='del'>-BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,</div><div class='del'>-	hyperv_vector_handler)</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_HYPERV */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_FUNCTION_TRACER</div><div class='del'>-#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='del'>-</div><div class='del'>-ENTRY(mcount)</div><div class='del'>-	ret</div><div class='del'>-END(mcount)</div><div class='del'>-</div><div class='del'>-ENTRY(ftrace_caller)</div><div class='del'>-	pushl %eax</div><div class='del'>-	pushl %ecx</div><div class='del'>-	pushl %edx</div><div class='del'>-	pushl $0	/* Pass NULL as regs pointer */</div><div class='del'>-	movl 4*4(%esp), %eax</div><div class='del'>-	movl 0x4(%ebp), %edx</div><div class='del'>-	movl function_trace_op, %ecx</div><div class='del'>-	subl $MCOUNT_INSN_SIZE, %eax</div><div class='del'>-</div><div class='del'>-.globl ftrace_call</div><div class='del'>-ftrace_call:</div><div class='del'>-	call ftrace_stub</div><div class='del'>-</div><div class='del'>-	addl $4,%esp	/* skip NULL pointer */</div><div class='del'>-	popl %edx</div><div class='del'>-	popl %ecx</div><div class='del'>-	popl %eax</div><div class='del'>-ftrace_ret:</div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-.globl ftrace_graph_call</div><div class='del'>-ftrace_graph_call:</div><div class='del'>-	jmp ftrace_stub</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.globl ftrace_stub</div><div class='del'>-ftrace_stub:</div><div class='del'>-	ret</div><div class='del'>-END(ftrace_caller)</div><div class='del'>-</div><div class='del'>-ENTRY(ftrace_regs_caller)</div><div class='del'>-	pushf	/* push flags before compare (in cs location) */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * i386 does not save SS and ESP when coming from kernel.</div><div class='del'>-	 * Instead, to get sp, &amp;regs-&gt;sp is used (see ptrace.h).</div><div class='del'>-	 * Unfortunately, that means eflags must be at the same location</div><div class='del'>-	 * as the current return ip is. We move the return ip into the</div><div class='del'>-	 * ip location, and move flags into the return ip location.</div><div class='del'>-	 */</div><div class='del'>-	pushl 4(%esp)	/* save return ip into ip slot */</div><div class='del'>-</div><div class='del'>-	pushl $0	/* Load 0 into orig_ax */</div><div class='del'>-	pushl %gs</div><div class='del'>-	pushl %fs</div><div class='del'>-	pushl %es</div><div class='del'>-	pushl %ds</div><div class='del'>-	pushl %eax</div><div class='del'>-	pushl %ebp</div><div class='del'>-	pushl %edi</div><div class='del'>-	pushl %esi</div><div class='del'>-	pushl %edx</div><div class='del'>-	pushl %ecx</div><div class='del'>-	pushl %ebx</div><div class='del'>-</div><div class='del'>-	movl 13*4(%esp), %eax	/* Get the saved flags */</div><div class='del'>-	movl %eax, 14*4(%esp)	/* Move saved flags into regs-&gt;flags location */</div><div class='del'>-				/* clobbering return ip */</div><div class='del'>-	movl $__KERNEL_CS,13*4(%esp)</div><div class='del'>-</div><div class='del'>-	movl 12*4(%esp), %eax	/* Load ip (1st parameter) */</div><div class='del'>-	subl $MCOUNT_INSN_SIZE, %eax	/* Adjust ip */</div><div class='del'>-	movl 0x4(%ebp), %edx	/* Load parent ip (2nd parameter) */</div><div class='del'>-	movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */</div><div class='del'>-	pushl %esp		/* Save pt_regs as 4th parameter */</div><div class='del'>-</div><div class='del'>-GLOBAL(ftrace_regs_call)</div><div class='del'>-	call ftrace_stub</div><div class='del'>-</div><div class='del'>-	addl $4, %esp		/* Skip pt_regs */</div><div class='del'>-	movl 14*4(%esp), %eax	/* Move flags back into cs */</div><div class='del'>-	movl %eax, 13*4(%esp)	/* Needed to keep addl from modifying flags */</div><div class='del'>-	movl 12*4(%esp), %eax	/* Get return ip from regs-&gt;ip */</div><div class='del'>-	movl %eax, 14*4(%esp)	/* Put return ip back for ret */</div><div class='del'>-</div><div class='del'>-	popl %ebx</div><div class='del'>-	popl %ecx</div><div class='del'>-	popl %edx</div><div class='del'>-	popl %esi</div><div class='del'>-	popl %edi</div><div class='del'>-	popl %ebp</div><div class='del'>-	popl %eax</div><div class='del'>-	popl %ds</div><div class='del'>-	popl %es</div><div class='del'>-	popl %fs</div><div class='del'>-	popl %gs</div><div class='del'>-	addl $8, %esp		/* Skip orig_ax and ip */</div><div class='del'>-	popf			/* Pop flags at end (no addl to corrupt flags) */</div><div class='del'>-	jmp ftrace_ret</div><div class='del'>-</div><div class='del'>-	popf</div><div class='del'>-	jmp  ftrace_stub</div><div class='del'>-#else /* ! CONFIG_DYNAMIC_FTRACE */</div><div class='del'>-</div><div class='del'>-ENTRY(mcount)</div><div class='del'>-	cmpl $__PAGE_OFFSET, %esp</div><div class='del'>-	jb ftrace_stub		/* Paging not enabled yet? */</div><div class='del'>-</div><div class='del'>-	cmpl $ftrace_stub, ftrace_trace_function</div><div class='del'>-	jnz trace</div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-	cmpl $ftrace_stub, ftrace_graph_return</div><div class='del'>-	jnz ftrace_graph_caller</div><div class='del'>-</div><div class='del'>-	cmpl $ftrace_graph_entry_stub, ftrace_graph_entry</div><div class='del'>-	jnz ftrace_graph_caller</div><div class='del'>-#endif</div><div class='del'>-.globl ftrace_stub</div><div class='del'>-ftrace_stub:</div><div class='del'>-	ret</div><div class='del'>-</div><div class='del'>-	/* taken from glibc */</div><div class='del'>-trace:</div><div class='del'>-	pushl %eax</div><div class='del'>-	pushl %ecx</div><div class='del'>-	pushl %edx</div><div class='del'>-	movl 0xc(%esp), %eax</div><div class='del'>-	movl 0x4(%ebp), %edx</div><div class='del'>-	subl $MCOUNT_INSN_SIZE, %eax</div><div class='del'>-</div><div class='del'>-	call *ftrace_trace_function</div><div class='del'>-</div><div class='del'>-	popl %edx</div><div class='del'>-	popl %ecx</div><div class='del'>-	popl %eax</div><div class='del'>-	jmp ftrace_stub</div><div class='del'>-END(mcount)</div><div class='del'>-#endif /* CONFIG_DYNAMIC_FTRACE */</div><div class='del'>-#endif /* CONFIG_FUNCTION_TRACER */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-ENTRY(ftrace_graph_caller)</div><div class='del'>-	pushl %eax</div><div class='del'>-	pushl %ecx</div><div class='del'>-	pushl %edx</div><div class='del'>-	movl 0xc(%esp), %eax</div><div class='del'>-	lea 0x4(%ebp), %edx</div><div class='del'>-	movl (%ebp), %ecx</div><div class='del'>-	subl $MCOUNT_INSN_SIZE, %eax</div><div class='del'>-	call prepare_ftrace_return</div><div class='del'>-	popl %edx</div><div class='del'>-	popl %ecx</div><div class='del'>-	popl %eax</div><div class='del'>-	ret</div><div class='del'>-END(ftrace_graph_caller)</div><div class='del'>-</div><div class='del'>-.globl return_to_handler</div><div class='del'>-return_to_handler:</div><div class='del'>-	pushl %eax</div><div class='del'>-	pushl %edx</div><div class='del'>-	movl %ebp, %eax</div><div class='del'>-	call ftrace_return_to_handler</div><div class='del'>-	movl %eax, %ecx</div><div class='del'>-	popl %edx</div><div class='del'>-	popl %eax</div><div class='del'>-	jmp *%ecx</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRACING</div><div class='del'>-ENTRY(trace_page_fault)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $trace_do_page_fault</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(trace_page_fault)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-ENTRY(page_fault)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_page_fault</div><div class='del'>-	ALIGN</div><div class='del'>-error_code:</div><div class='del'>-	/* the function address is in %gs's slot on the stack */</div><div class='del'>-	pushl_cfi %fs</div><div class='del'>-	/*CFI_REL_OFFSET fs, 0*/</div><div class='del'>-	pushl_cfi %es</div><div class='del'>-	/*CFI_REL_OFFSET es, 0*/</div><div class='del'>-	pushl_cfi %ds</div><div class='del'>-	/*CFI_REL_OFFSET ds, 0*/</div><div class='del'>-	pushl_cfi_reg eax</div><div class='del'>-	pushl_cfi_reg ebp</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg edx</div><div class='del'>-	pushl_cfi_reg ecx</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='del'>-	cld</div><div class='del'>-	movl $(__KERNEL_PERCPU), %ecx</div><div class='del'>-	movl %ecx, %fs</div><div class='del'>-	UNWIND_ESPFIX_STACK</div><div class='del'>-	GS_TO_REG %ecx</div><div class='del'>-	movl PT_GS(%esp), %edi		# get the function address</div><div class='del'>-	movl PT_ORIG_EAX(%esp), %edx	# get the error code</div><div class='del'>-	movl $-1, PT_ORIG_EAX(%esp)	# no syscall to restart</div><div class='del'>-	REG_TO_PTGS %ecx</div><div class='del'>-	SET_KERNEL_GS %ecx</div><div class='del'>-	movl $(__USER_DS), %ecx</div><div class='del'>-	movl %ecx, %ds</div><div class='del'>-	movl %ecx, %es</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	movl %esp,%eax			# pt_regs pointer</div><div class='del'>-	call *%edi</div><div class='del'>-	jmp ret_from_exception</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(page_fault)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Debug traps and NMI can happen at the one SYSENTER instruction</div><div class='del'>- * that sets up the real kernel stack. Check here, since we can't</div><div class='del'>- * allow the wrong stack to be used.</div><div class='del'>- *</div><div class='del'>- * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have</div><div class='del'>- * already pushed 3 words if it hits on the sysenter instruction:</div><div class='del'>- * eflags, cs and eip.</div><div class='del'>- *</div><div class='del'>- * We just load the right stack, and push the three (known) values</div><div class='del'>- * by hand onto the new stack - while updating the return eip past</div><div class='del'>- * the instruction that would have done it for sysenter.</div><div class='del'>- */</div><div class='del'>-.macro FIX_STACK offset ok label</div><div class='del'>-	cmpw $__KERNEL_CS, 4(%esp)</div><div class='del'>-	jne \ok</div><div class='del'>-\label:</div><div class='del'>-	movl TSS_sysenter_sp0 + \offset(%esp), %esp</div><div class='del'>-	CFI_DEF_CFA esp, 0</div><div class='del'>-	CFI_UNDEFINED eip</div><div class='del'>-	pushfl_cfi</div><div class='del'>-	pushl_cfi $__KERNEL_CS</div><div class='del'>-	pushl_cfi $sysenter_past_esp</div><div class='del'>-	CFI_REL_OFFSET eip, 0</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-ENTRY(debug)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	cmpl $ia32_sysenter_target,(%esp)</div><div class='del'>-	jne debug_stack_correct</div><div class='del'>-	FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn</div><div class='del'>-debug_stack_correct:</div><div class='del'>-	pushl_cfi $-1			# mark this as an int</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	xorl %edx,%edx			# error code 0</div><div class='del'>-	movl %esp,%eax			# pt_regs pointer</div><div class='del'>-	call do_debug</div><div class='del'>-	jmp ret_from_exception</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(debug)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NMI is doubly nasty. It can happen _while_ we're handling</div><div class='del'>- * a debug fault, and the debug fault hasn't yet been able to</div><div class='del'>- * clear up the stack. So we first check whether we got  an</div><div class='del'>- * NMI on the sysenter entry path, but after that we need to</div><div class='del'>- * check whether we got an NMI on the debug path where the debug</div><div class='del'>- * fault happened on the sysenter path.</div><div class='del'>- */</div><div class='del'>-ENTRY(nmi)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	movl %ss, %eax</div><div class='del'>-	cmpw $__ESPFIX_SS, %ax</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	je nmi_espfix_stack</div><div class='del'>-#endif</div><div class='del'>-	cmpl $ia32_sysenter_target,(%esp)</div><div class='del'>-	je nmi_stack_fixup</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	movl %esp,%eax</div><div class='del'>-	/* Do not access memory above the end of our stack page,</div><div class='del'>-	 * it might not exist.</div><div class='del'>-	 */</div><div class='del'>-	andl $(THREAD_SIZE-1),%eax</div><div class='del'>-	cmpl $(THREAD_SIZE-20),%eax</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	jae nmi_stack_correct</div><div class='del'>-	cmpl $ia32_sysenter_target,12(%esp)</div><div class='del'>-	je nmi_debug_stack_check</div><div class='del'>-nmi_stack_correct:</div><div class='del'>-	/* We have a RING0_INT_FRAME here */</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	xorl %edx,%edx		# zero error code</div><div class='del'>-	movl %esp,%eax		# pt_regs pointer</div><div class='del'>-	call do_nmi</div><div class='del'>-	jmp restore_all_notrace</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-</div><div class='del'>-nmi_stack_fixup:</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	FIX_STACK 12, nmi_stack_correct, 1</div><div class='del'>-	jmp nmi_stack_correct</div><div class='del'>-</div><div class='del'>-nmi_debug_stack_check:</div><div class='del'>-	/* We have a RING0_INT_FRAME here */</div><div class='del'>-	cmpw $__KERNEL_CS,16(%esp)</div><div class='del'>-	jne nmi_stack_correct</div><div class='del'>-	cmpl $debug,(%esp)</div><div class='del'>-	jb nmi_stack_correct</div><div class='del'>-	cmpl $debug_esp_fix_insn,(%esp)</div><div class='del'>-	ja nmi_stack_correct</div><div class='del'>-	FIX_STACK 24, nmi_stack_correct, 1</div><div class='del'>-	jmp nmi_stack_correct</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX32</div><div class='del'>-nmi_espfix_stack:</div><div class='del'>-	/* We have a RING0_INT_FRAME here.</div><div class='del'>-	 *</div><div class='del'>-	 * create the pointer to lss back</div><div class='del'>-	 */</div><div class='del'>-	pushl_cfi %ss</div><div class='del'>-	pushl_cfi %esp</div><div class='del'>-	addl $4, (%esp)</div><div class='del'>-	/* copy the iret frame of 12 bytes */</div><div class='del'>-	.rept 3</div><div class='del'>-	pushl_cfi 16(%esp)</div><div class='del'>-	.endr</div><div class='del'>-	pushl_cfi %eax</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	FIXUP_ESPFIX_STACK		# %eax == %esp</div><div class='del'>-	xorl %edx,%edx			# zero error code</div><div class='del'>-	call do_nmi</div><div class='del'>-	RESTORE_REGS</div><div class='del'>-	lss 12+4(%esp), %esp		# back to espfix stack</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -24</div><div class='del'>-	jmp irq_return</div><div class='del'>-#endif</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(nmi)</div><div class='del'>-</div><div class='del'>-ENTRY(int3)</div><div class='del'>-	RING0_INT_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $-1			# mark this as an int</div><div class='del'>-	SAVE_ALL</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='del'>-	xorl %edx,%edx		# zero error code</div><div class='del'>-	movl %esp,%eax		# pt_regs pointer</div><div class='del'>-	call do_int3</div><div class='del'>-	jmp ret_from_exception</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(int3)</div><div class='del'>-</div><div class='del'>-ENTRY(general_protection)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	pushl_cfi $do_general_protection</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(general_protection)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_KVM_GUEST</div><div class='del'>-ENTRY(async_page_fault)</div><div class='del'>-	RING0_EC_FRAME</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	pushl_cfi $do_async_page_fault</div><div class='del'>-	jmp error_code</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-END(async_page_fault)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/x86/kernel/espfix_64.c b/arch/x86/kernel/espfix_64.c<br/>index f5d0730e7b08..ce95676abd60 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/espfix_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/espfix_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/espfix_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/espfix_64.c</a></div><div class='hunk'>@@ -131,25 +131,24 @@ void __init init_espfix_bsp(void)</div><div class='ctx'> 	init_espfix_random();</div><div class='ctx'> </div><div class='ctx'> 	/* The rest is the same as for any other processor */</div><div class='del'>-	init_espfix_ap();</div><div class='add'>+	init_espfix_ap(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void init_espfix_ap(void)</div><div class='add'>+void init_espfix_ap(int cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpu, page;</div><div class='add'>+	unsigned int page;</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> 	pud_t pud, *pud_p;</div><div class='ctx'> 	pmd_t pmd, *pmd_p;</div><div class='ctx'> 	pte_t pte, *pte_p;</div><div class='del'>-	int n;</div><div class='add'>+	int n, node;</div><div class='ctx'> 	void *stack_page;</div><div class='ctx'> 	pteval_t ptemask;</div><div class='ctx'> </div><div class='ctx'> 	/* We only have to do this once... */</div><div class='del'>-	if (likely(this_cpu_read(espfix_stack)))</div><div class='add'>+	if (likely(per_cpu(espfix_stack, cpu)))</div><div class='ctx'> 		return;		/* Already initialized */</div><div class='ctx'> </div><div class='del'>-	cpu = smp_processor_id();</div><div class='ctx'> 	addr = espfix_base_addr(cpu);</div><div class='ctx'> 	page = cpu/ESPFIX_STACKS_PER_PAGE;</div><div class='ctx'> </div><div class='hunk'>@@ -165,12 +164,15 @@ void init_espfix_ap(void)</div><div class='ctx'> 	if (stack_page)</div><div class='ctx'> 		goto unlock_done;</div><div class='ctx'> </div><div class='add'>+	node = cpu_to_node(cpu);</div><div class='ctx'> 	ptemask = __supported_pte_mask;</div><div class='ctx'> </div><div class='ctx'> 	pud_p = &amp;espfix_pud_page[pud_index(addr)];</div><div class='ctx'> 	pud = *pud_p;</div><div class='ctx'> 	if (!pud_present(pud)) {</div><div class='del'>-		pmd_p = (pmd_t *)__get_free_page(PGALLOC_GFP);</div><div class='add'>+		struct page *page = alloc_pages_node(node, PGALLOC_GFP, 0);</div><div class='add'>+</div><div class='add'>+		pmd_p = (pmd_t *)page_address(page);</div><div class='ctx'> 		pud = __pud(__pa(pmd_p) | (PGTABLE_PROT &amp; ptemask));</div><div class='ctx'> 		paravirt_alloc_pmd(&amp;init_mm, __pa(pmd_p) &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 		for (n = 0; n &lt; ESPFIX_PUD_CLONES; n++)</div><div class='hunk'>@@ -180,7 +182,9 @@ void init_espfix_ap(void)</div><div class='ctx'> 	pmd_p = pmd_offset(&amp;pud, addr);</div><div class='ctx'> 	pmd = *pmd_p;</div><div class='ctx'> 	if (!pmd_present(pmd)) {</div><div class='del'>-		pte_p = (pte_t *)__get_free_page(PGALLOC_GFP);</div><div class='add'>+		struct page *page = alloc_pages_node(node, PGALLOC_GFP, 0);</div><div class='add'>+</div><div class='add'>+		pte_p = (pte_t *)page_address(page);</div><div class='ctx'> 		pmd = __pmd(__pa(pte_p) | (PGTABLE_PROT &amp; ptemask));</div><div class='ctx'> 		paravirt_alloc_pte(&amp;init_mm, __pa(pte_p) &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 		for (n = 0; n &lt; ESPFIX_PMD_CLONES; n++)</div><div class='hunk'>@@ -188,7 +192,7 @@ void init_espfix_ap(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pte_p = pte_offset_kernel(&amp;pmd, addr);</div><div class='del'>-	stack_page = (void *)__get_free_page(GFP_KERNEL);</div><div class='add'>+	stack_page = page_address(alloc_pages_node(node, GFP_KERNEL, 0));</div><div class='ctx'> 	pte = __pte(__pa(stack_page) | (__PAGE_KERNEL_RO &amp; ptemask));</div><div class='ctx'> 	for (n = 0; n &lt; ESPFIX_PTE_CLONES; n++)</div><div class='ctx'> 		set_pte(&amp;pte_p[n*PTE_STRIDE], pte);</div><div class='hunk'>@@ -199,7 +203,7 @@ void init_espfix_ap(void)</div><div class='ctx'> unlock_done:</div><div class='ctx'> 	mutex_unlock(&amp;espfix_init_mutex);</div><div class='ctx'> done:</div><div class='del'>-	this_cpu_write(espfix_stack, addr);</div><div class='del'>-	this_cpu_write(espfix_waddr, (unsigned long)stack_page</div><div class='del'>-		       + (addr &amp; ~PAGE_MASK));</div><div class='add'>+	per_cpu(espfix_stack, cpu) = addr;</div><div class='add'>+	per_cpu(espfix_waddr, cpu) = (unsigned long)stack_page</div><div class='add'>+				      + (addr &amp; ~PAGE_MASK);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/fpu/Makefile b/arch/x86/kernel/fpu/Makefile<br/>new file mode 100644<br/>index 000000000000..68279efb811a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+#</div><div class='add'>+# Build rules for the FPU support code:</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y				+= init.o bugs.o core.o regset.o signal.o xstate.o</div><div class='head'>diff --git a/arch/x86/kernel/fpu/bugs.c b/arch/x86/kernel/fpu/bugs.c<br/>new file mode 100644<br/>index 000000000000..dd9ca9b60ff3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/bugs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/bugs.c</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+/*</div><div class='add'>+ * x86 FPU bug checks:</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Boot time CPU/FPU FDIV bug detection code:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static double __initdata x = 4195835.0;</div><div class='add'>+static double __initdata y = 3145727.0;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This used to check for exceptions..</div><div class='add'>+ * However, it turns out that to support that,</div><div class='add'>+ * the XMM trap handlers basically had to</div><div class='add'>+ * be buggy. So let's have a correct XMM trap</div><div class='add'>+ * handler, and forget about printing out</div><div class='add'>+ * some status at boot.</div><div class='add'>+ *</div><div class='add'>+ * We should really only care about bugs here</div><div class='add'>+ * anyway. Not features.</div><div class='add'>+ */</div><div class='add'>+static void __init check_fpu(void)</div><div class='add'>+{</div><div class='add'>+	u32 cr0_saved;</div><div class='add'>+	s32 fdiv_bug;</div><div class='add'>+</div><div class='add'>+	/* We might have CR0::TS set already, clear it: */</div><div class='add'>+	cr0_saved = read_cr0();</div><div class='add'>+	write_cr0(cr0_saved &amp; ~X86_CR0_TS);</div><div class='add'>+</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * trap_init() enabled FXSR and company _before_ testing for FP</div><div class='add'>+	 * problems here.</div><div class='add'>+	 *</div><div class='add'>+	 * Test for the divl bug: http://en.wikipedia.org/wiki/Fdiv_bug</div><div class='add'>+	 */</div><div class='add'>+	__asm__("fninit\n\t"</div><div class='add'>+		"fldl %1\n\t"</div><div class='add'>+		"fdivl %2\n\t"</div><div class='add'>+		"fmull %2\n\t"</div><div class='add'>+		"fldl %1\n\t"</div><div class='add'>+		"fsubp %%st,%%st(1)\n\t"</div><div class='add'>+		"fistpl %0\n\t"</div><div class='add'>+		"fwait\n\t"</div><div class='add'>+		"fninit"</div><div class='add'>+		: "=m" (*&amp;fdiv_bug)</div><div class='add'>+		: "m" (*&amp;x), "m" (*&amp;y));</div><div class='add'>+</div><div class='add'>+	kernel_fpu_end();</div><div class='add'>+</div><div class='add'>+	write_cr0(cr0_saved);</div><div class='add'>+</div><div class='add'>+	if (fdiv_bug) {</div><div class='add'>+		set_cpu_bug(&amp;boot_cpu_data, X86_BUG_FDIV);</div><div class='add'>+		pr_warn("Hmm, FPU with FDIV bug\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init fpu__init_check_bugs(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * kernel_fpu_begin/end() in check_fpu() relies on the patched</div><div class='add'>+	 * alternative instructions.</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_has_fpu)</div><div class='add'>+		check_fpu();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c<br/>new file mode 100644<br/>index 000000000000..79de954626fd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/core.c</a></div><div class='hunk'>@@ -0,0 +1,523 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 1994 Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ *  Pentium III FXSR, SSE support</div><div class='add'>+ *  General FPU state handling cleanups</div><div class='add'>+ *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/regset.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Represents the initial FPU state. It's mostly (but not completely) zeroes,</div><div class='add'>+ * depending on the FPU hardware format:</div><div class='add'>+ */</div><div class='add'>+union fpregs_state init_fpstate __read_mostly;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Track whether the kernel is using the FPU state</div><div class='add'>+ * currently.</div><div class='add'>+ *</div><div class='add'>+ * This flag is used:</div><div class='add'>+ *</div><div class='add'>+ *   - by IRQ context code to potentially use the FPU</div><div class='add'>+ *     if it's unused.</div><div class='add'>+ *</div><div class='add'>+ *   - to debug kernel_fpu_begin()/end() correctness</div><div class='add'>+ */</div><div class='add'>+static DEFINE_PER_CPU(bool, in_kernel_fpu);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Track which context is using the FPU on the CPU:</div><div class='add'>+ */</div><div class='add'>+DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);</div><div class='add'>+</div><div class='add'>+static void kernel_fpu_disable(void)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(this_cpu_read(in_kernel_fpu));</div><div class='add'>+	this_cpu_write(in_kernel_fpu, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kernel_fpu_enable(void)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(!this_cpu_read(in_kernel_fpu));</div><div class='add'>+	this_cpu_write(in_kernel_fpu, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kernel_fpu_disabled(void)</div><div class='add'>+{</div><div class='add'>+	return this_cpu_read(in_kernel_fpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Were we in an interrupt that interrupted kernel mode?</div><div class='add'>+ *</div><div class='add'>+ * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that</div><div class='add'>+ * pair does nothing at all: the thread must not have fpu (so</div><div class='add'>+ * that we don't try to save the FPU state), and TS must</div><div class='add'>+ * be set (so that the clts/stts pair does nothing that is</div><div class='add'>+ * visible in the interrupted kernel thread).</div><div class='add'>+ *</div><div class='add'>+ * Except for the eagerfpu case when we return true; in the likely case</div><div class='add'>+ * the thread has FPU but we are not going to set/clear TS.</div><div class='add'>+ */</div><div class='add'>+static bool interrupted_kernel_fpu_idle(void)</div><div class='add'>+{</div><div class='add'>+	if (kernel_fpu_disabled())</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (use_eager_fpu())</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return !current-&gt;thread.fpu.fpregs_active &amp;&amp; (read_cr0() &amp; X86_CR0_TS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Were we in user mode (or vm86 mode) when we were</div><div class='add'>+ * interrupted?</div><div class='add'>+ *</div><div class='add'>+ * Doing kernel_fpu_begin/end() is ok if we are running</div><div class='add'>+ * in an interrupt context from user mode - we'll just</div><div class='add'>+ * save the FPU state as required.</div><div class='add'>+ */</div><div class='add'>+static bool interrupted_user_mode(void)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = get_irq_regs();</div><div class='add'>+	return regs &amp;&amp; user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Can we use the FPU in kernel mode with the</div><div class='add'>+ * whole "kernel_fpu_begin/end()" sequence?</div><div class='add'>+ *</div><div class='add'>+ * It's always ok in process context (ie "not interrupt")</div><div class='add'>+ * but it is sometimes ok even from an irq.</div><div class='add'>+ */</div><div class='add'>+bool irq_fpu_usable(void)</div><div class='add'>+{</div><div class='add'>+	return !in_interrupt() ||</div><div class='add'>+		interrupted_user_mode() ||</div><div class='add'>+		interrupted_kernel_fpu_idle();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(irq_fpu_usable);</div><div class='add'>+</div><div class='add'>+void __kernel_fpu_begin(void)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(!irq_fpu_usable());</div><div class='add'>+</div><div class='add'>+	kernel_fpu_disable();</div><div class='add'>+</div><div class='add'>+	if (fpu-&gt;fpregs_active) {</div><div class='add'>+		copy_fpregs_to_fpstate(fpu);</div><div class='add'>+	} else {</div><div class='add'>+		this_cpu_write(fpu_fpregs_owner_ctx, NULL);</div><div class='add'>+		__fpregs_activate_hw();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__kernel_fpu_begin);</div><div class='add'>+</div><div class='add'>+void __kernel_fpu_end(void)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	if (fpu-&gt;fpregs_active)</div><div class='add'>+		copy_kernel_to_fpregs(&amp;fpu-&gt;state);</div><div class='add'>+	else</div><div class='add'>+		__fpregs_deactivate_hw();</div><div class='add'>+</div><div class='add'>+	kernel_fpu_enable();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__kernel_fpu_end);</div><div class='add'>+</div><div class='add'>+void kernel_fpu_begin(void)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+	__kernel_fpu_begin();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kernel_fpu_begin);</div><div class='add'>+</div><div class='add'>+void kernel_fpu_end(void)</div><div class='add'>+{</div><div class='add'>+	__kernel_fpu_end();</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kernel_fpu_end);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CR0::TS save/restore functions:</div><div class='add'>+ */</div><div class='add'>+int irq_ts_save(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If in process context and not atomic, we can take a spurious DNA fault.</div><div class='add'>+	 * Otherwise, doing clts() in process context requires disabling preemption</div><div class='add'>+	 * or some heavy lifting like kernel_fpu_begin()</div><div class='add'>+	 */</div><div class='add'>+	if (!in_atomic())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (read_cr0() &amp; X86_CR0_TS) {</div><div class='add'>+		clts();</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(irq_ts_save);</div><div class='add'>+</div><div class='add'>+void irq_ts_restore(int TS_state)</div><div class='add'>+{</div><div class='add'>+	if (TS_state)</div><div class='add'>+		stts();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(irq_ts_restore);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save the FPU state (mark it for reload if necessary):</div><div class='add'>+ *</div><div class='add'>+ * This only ever gets called for the current task.</div><div class='add'>+ */</div><div class='add'>+void fpu__save(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(fpu != &amp;current-&gt;thread.fpu);</div><div class='add'>+</div><div class='add'>+	preempt_disable();</div><div class='add'>+	if (fpu-&gt;fpregs_active) {</div><div class='add'>+		if (!copy_fpregs_to_fpstate(fpu))</div><div class='add'>+			fpregs_deactivate(fpu);</div><div class='add'>+	}</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fpu__save);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Legacy x87 fpstate state init:</div><div class='add'>+ */</div><div class='add'>+static inline void fpstate_init_fstate(struct fregs_state *fp)</div><div class='add'>+{</div><div class='add'>+	fp-&gt;cwd = 0xffff037fu;</div><div class='add'>+	fp-&gt;swd = 0xffff0000u;</div><div class='add'>+	fp-&gt;twd = 0xffffffffu;</div><div class='add'>+	fp-&gt;fos = 0xffff0000u;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fpstate_init(union fpregs_state *state)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_has_fpu) {</div><div class='add'>+		fpstate_init_soft(&amp;state-&gt;soft);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(state, 0, xstate_size);</div><div class='add'>+</div><div class='add'>+	if (cpu_has_fxsr)</div><div class='add'>+		fpstate_init_fxstate(&amp;state-&gt;fxsave);</div><div class='add'>+	else</div><div class='add'>+		fpstate_init_fstate(&amp;state-&gt;fsave);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fpstate_init);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copy the current task's FPU state to a new task's FPU context.</div><div class='add'>+ *</div><div class='add'>+ * In both the 'eager' and the 'lazy' case we save hardware registers</div><div class='add'>+ * directly to the destination buffer.</div><div class='add'>+ */</div><div class='add'>+static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(src_fpu != &amp;current-&gt;thread.fpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Don't let 'init optimized' areas of the XSAVE area</div><div class='add'>+	 * leak into the child task:</div><div class='add'>+	 */</div><div class='add'>+	if (use_eager_fpu())</div><div class='add'>+		memset(&amp;dst_fpu-&gt;state.xsave, 0, xstate_size);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Save current FPU registers directly into the child</div><div class='add'>+	 * FPU context, without any memory-to-memory copying.</div><div class='add'>+	 *</div><div class='add'>+	 * If the FPU context got destroyed in the process (FNSAVE</div><div class='add'>+	 * done on old CPUs) then copy it back into the source</div><div class='add'>+	 * context and mark the current task for lazy restore.</div><div class='add'>+	 *</div><div class='add'>+	 * We have to do all this with preemption disabled,</div><div class='add'>+	 * mostly because of the FNSAVE case, because in that</div><div class='add'>+	 * case we must not allow preemption in the window</div><div class='add'>+	 * between the FNSAVE and us marking the context lazy.</div><div class='add'>+	 *</div><div class='add'>+	 * It shouldn't be an issue as even FNSAVE is plenty</div><div class='add'>+	 * fast in terms of critical section length.</div><div class='add'>+	 */</div><div class='add'>+	preempt_disable();</div><div class='add'>+	if (!copy_fpregs_to_fpstate(dst_fpu)) {</div><div class='add'>+		memcpy(&amp;src_fpu-&gt;state, &amp;dst_fpu-&gt;state, xstate_size);</div><div class='add'>+		fpregs_deactivate(src_fpu);</div><div class='add'>+	}</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)</div><div class='add'>+{</div><div class='add'>+	dst_fpu-&gt;counter = 0;</div><div class='add'>+	dst_fpu-&gt;fpregs_active = 0;</div><div class='add'>+	dst_fpu-&gt;last_cpu = -1;</div><div class='add'>+</div><div class='add'>+	if (src_fpu-&gt;fpstate_active)</div><div class='add'>+		fpu_copy(dst_fpu, src_fpu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Activate the current task's in-memory FPU context,</div><div class='add'>+ * if it has not been used before:</div><div class='add'>+ */</div><div class='add'>+void fpu__activate_curr(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(fpu != &amp;current-&gt;thread.fpu);</div><div class='add'>+</div><div class='add'>+	if (!fpu-&gt;fpstate_active) {</div><div class='add'>+		fpstate_init(&amp;fpu-&gt;state);</div><div class='add'>+</div><div class='add'>+		/* Safe to do for the current task: */</div><div class='add'>+		fpu-&gt;fpstate_active = 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fpu__activate_curr);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function must be called before we read a task's fpstate.</div><div class='add'>+ *</div><div class='add'>+ * If the task has not used the FPU before then initialize its</div><div class='add'>+ * fpstate.</div><div class='add'>+ *</div><div class='add'>+ * If the task has used the FPU before then save it.</div><div class='add'>+ */</div><div class='add'>+void fpu__activate_fpstate_read(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If fpregs are active (in the current CPU), then</div><div class='add'>+	 * copy them to the fpstate:</div><div class='add'>+	 */</div><div class='add'>+	if (fpu-&gt;fpregs_active) {</div><div class='add'>+		fpu__save(fpu);</div><div class='add'>+	} else {</div><div class='add'>+		if (!fpu-&gt;fpstate_active) {</div><div class='add'>+			fpstate_init(&amp;fpu-&gt;state);</div><div class='add'>+</div><div class='add'>+			/* Safe to do for current and for stopped child tasks: */</div><div class='add'>+			fpu-&gt;fpstate_active = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function must be called before we write a task's fpstate.</div><div class='add'>+ *</div><div class='add'>+ * If the task has used the FPU before then unlazy it.</div><div class='add'>+ * If the task has not used the FPU before then initialize its fpstate.</div><div class='add'>+ *</div><div class='add'>+ * After this function call, after registers in the fpstate are</div><div class='add'>+ * modified and the child task has woken up, the child task will</div><div class='add'>+ * restore the modified FPU state from the modified context. If we</div><div class='add'>+ * didn't clear its lazy status here then the lazy in-registers</div><div class='add'>+ * state pending on its former CPU could be restored, corrupting</div><div class='add'>+ * the modifications.</div><div class='add'>+ */</div><div class='add'>+void fpu__activate_fpstate_write(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Only stopped child tasks can be used to modify the FPU</div><div class='add'>+	 * state in the fpstate buffer:</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_FPU(fpu == &amp;current-&gt;thread.fpu);</div><div class='add'>+</div><div class='add'>+	if (fpu-&gt;fpstate_active) {</div><div class='add'>+		/* Invalidate any lazy state: */</div><div class='add'>+		fpu-&gt;last_cpu = -1;</div><div class='add'>+	} else {</div><div class='add'>+		fpstate_init(&amp;fpu-&gt;state);</div><div class='add'>+</div><div class='add'>+		/* Safe to do for stopped child tasks: */</div><div class='add'>+		fpu-&gt;fpstate_active = 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'fpu__restore()' is called to copy FPU registers from</div><div class='add'>+ * the FPU fpstate to the live hw registers and to activate</div><div class='add'>+ * access to the hardware registers, so that FPU instructions</div><div class='add'>+ * can be used afterwards.</div><div class='add'>+ *</div><div class='add'>+ * Must be called with kernel preemption disabled (for example</div><div class='add'>+ * with local interrupts disabled, as it is in the case of</div><div class='add'>+ * do_device_not_available()).</div><div class='add'>+ */</div><div class='add'>+void fpu__restore(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	fpu__activate_curr(fpu);</div><div class='add'>+</div><div class='add'>+	/* Avoid __kernel_fpu_begin() right after fpregs_activate() */</div><div class='add'>+	kernel_fpu_disable();</div><div class='add'>+	fpregs_activate(fpu);</div><div class='add'>+	copy_kernel_to_fpregs(&amp;fpu-&gt;state);</div><div class='add'>+	fpu-&gt;counter++;</div><div class='add'>+	kernel_fpu_enable();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fpu__restore);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Drops current FPU state: deactivates the fpregs and</div><div class='add'>+ * the fpstate. NOTE: it still leaves previous contents</div><div class='add'>+ * in the fpregs in the eager-FPU case.</div><div class='add'>+ *</div><div class='add'>+ * This function can be used in cases where we know that</div><div class='add'>+ * a state-restore is coming: either an explicit one,</div><div class='add'>+ * or a reschedule.</div><div class='add'>+ */</div><div class='add'>+void fpu__drop(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+	fpu-&gt;counter = 0;</div><div class='add'>+</div><div class='add'>+	if (fpu-&gt;fpregs_active) {</div><div class='add'>+		/* Ignore delayed exceptions from user space */</div><div class='add'>+		asm volatile("1: fwait\n"</div><div class='add'>+			     "2:\n"</div><div class='add'>+			     _ASM_EXTABLE(1b, 2b));</div><div class='add'>+		fpregs_deactivate(fpu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fpu-&gt;fpstate_active = 0;</div><div class='add'>+</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Clear FPU registers by setting them up from</div><div class='add'>+ * the init fpstate:</div><div class='add'>+ */</div><div class='add'>+static inline void copy_init_fpstate_to_fpregs(void)</div><div class='add'>+{</div><div class='add'>+	if (use_xsave())</div><div class='add'>+		copy_kernel_to_xregs(&amp;init_fpstate.xsave, -1);</div><div class='add'>+	else</div><div class='add'>+		copy_kernel_to_fxregs(&amp;init_fpstate.fxsave);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Clear the FPU state back to init state.</div><div class='add'>+ *</div><div class='add'>+ * Called by sys_execve(), by the signal handler code and by various</div><div class='add'>+ * error paths.</div><div class='add'>+ */</div><div class='add'>+void fpu__clear(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_FPU(fpu != &amp;current-&gt;thread.fpu); /* Almost certainly an anomaly */</div><div class='add'>+</div><div class='add'>+	if (!use_eager_fpu()) {</div><div class='add'>+		/* FPU state will be reallocated lazily at the first use. */</div><div class='add'>+		fpu__drop(fpu);</div><div class='add'>+	} else {</div><div class='add'>+		if (!fpu-&gt;fpstate_active) {</div><div class='add'>+			fpu__activate_curr(fpu);</div><div class='add'>+			user_fpu_begin();</div><div class='add'>+		}</div><div class='add'>+		copy_init_fpstate_to_fpregs();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * x87 math exception handling:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline unsigned short get_fpu_cwd(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_fxsr) {</div><div class='add'>+		return fpu-&gt;state.fxsave.cwd;</div><div class='add'>+	} else {</div><div class='add'>+		return (unsigned short)fpu-&gt;state.fsave.cwd;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned short get_fpu_swd(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_fxsr) {</div><div class='add'>+		return fpu-&gt;state.fxsave.swd;</div><div class='add'>+	} else {</div><div class='add'>+		return (unsigned short)fpu-&gt;state.fsave.swd;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned short get_fpu_mxcsr(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_xmm) {</div><div class='add'>+		return fpu-&gt;state.fxsave.mxcsr;</div><div class='add'>+	} else {</div><div class='add'>+		return MXCSR_DEFAULT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fpu__exception_code(struct fpu *fpu, int trap_nr)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (trap_nr == X86_TRAP_MF) {</div><div class='add'>+		unsigned short cwd, swd;</div><div class='add'>+		/*</div><div class='add'>+		 * (~cwd &amp; swd) will mask out exceptions that are not set to unmasked</div><div class='add'>+		 * status.  0x3f is the exception bits in these regs, 0x200 is the</div><div class='add'>+		 * C1 reg you need in case of a stack fault, 0x040 is the stack</div><div class='add'>+		 * fault bit.  We should only be taking one exception at a time,</div><div class='add'>+		 * so if this combination doesn't produce any single exception,</div><div class='add'>+		 * then we have a bad program that isn't synchronizing its FPU usage</div><div class='add'>+		 * and it will suffer the consequences since we won't be able to</div><div class='add'>+		 * fully reproduce the context of the exception</div><div class='add'>+		 */</div><div class='add'>+		cwd = get_fpu_cwd(fpu);</div><div class='add'>+		swd = get_fpu_swd(fpu);</div><div class='add'>+</div><div class='add'>+		err = swd &amp; ~cwd;</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * The SIMD FPU exceptions are handled a little differently, as there</div><div class='add'>+		 * is only a single status/control register.  Thus, to determine which</div><div class='add'>+		 * unmasked exception was caught we must mask the exception mask bits</div><div class='add'>+		 * at 0x1f80, and then use these to mask the exception bits at 0x3f.</div><div class='add'>+		 */</div><div class='add'>+		unsigned short mxcsr = get_fpu_mxcsr(fpu);</div><div class='add'>+		err = ~(mxcsr &gt;&gt; 7) &amp; mxcsr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err &amp; 0x001) {	/* Invalid op */</div><div class='add'>+		/*</div><div class='add'>+		 * swd &amp; 0x240 == 0x040: Stack Underflow</div><div class='add'>+		 * swd &amp; 0x240 == 0x240: Stack Overflow</div><div class='add'>+		 * User must clear the SF bit (0x40) if set</div><div class='add'>+		 */</div><div class='add'>+		return FPE_FLTINV;</div><div class='add'>+	} else if (err &amp; 0x004) { /* Divide by Zero */</div><div class='add'>+		return FPE_FLTDIV;</div><div class='add'>+	} else if (err &amp; 0x008) { /* Overflow */</div><div class='add'>+		return FPE_FLTOVF;</div><div class='add'>+	} else if (err &amp; 0x012) { /* Denormal, Underflow */</div><div class='add'>+		return FPE_FLTUND;</div><div class='add'>+	} else if (err &amp; 0x020) { /* Precision */</div><div class='add'>+		return FPE_FLTRES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're using IRQ 13, or supposedly even some trap</div><div class='add'>+	 * X86_TRAP_MF implementations, it's possible</div><div class='add'>+	 * we get a spurious trap, which is not an error.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c<br/>new file mode 100644<br/>index 000000000000..0b39173dd971<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/init.c</a></div><div class='hunk'>@@ -0,0 +1,395 @@</div><div class='add'>+/*</div><div class='add'>+ * x86 FPU boot time init code:</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the TS bit in CR0 according to the style of context-switches</div><div class='add'>+ * we are using:</div><div class='add'>+ */</div><div class='add'>+static void fpu__init_cpu_ctx_switch(void)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_has_eager_fpu)</div><div class='add'>+		stts();</div><div class='add'>+	else</div><div class='add'>+		clts();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the registers found in all CPUs, CR0 and CR4:</div><div class='add'>+ */</div><div class='add'>+static void fpu__init_cpu_generic(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0;</div><div class='add'>+	unsigned long cr4_mask = 0;</div><div class='add'>+</div><div class='add'>+	if (cpu_has_fxsr)</div><div class='add'>+		cr4_mask |= X86_CR4_OSFXSR;</div><div class='add'>+	if (cpu_has_xmm)</div><div class='add'>+		cr4_mask |= X86_CR4_OSXMMEXCPT;</div><div class='add'>+	if (cr4_mask)</div><div class='add'>+		cr4_set_bits(cr4_mask);</div><div class='add'>+</div><div class='add'>+	cr0 = read_cr0();</div><div class='add'>+	cr0 &amp;= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */</div><div class='add'>+	if (!cpu_has_fpu)</div><div class='add'>+		cr0 |= X86_CR0_EM;</div><div class='add'>+	write_cr0(cr0);</div><div class='add'>+</div><div class='add'>+	/* Flush out any pending x87 state: */</div><div class='add'>+	asm volatile ("fninit");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable all supported FPU features. Called when a CPU is brought online:</div><div class='add'>+ */</div><div class='add'>+void fpu__init_cpu(void)</div><div class='add'>+{</div><div class='add'>+	fpu__init_cpu_generic();</div><div class='add'>+	fpu__init_cpu_xstate();</div><div class='add'>+	fpu__init_cpu_ctx_switch();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The earliest FPU detection code.</div><div class='add'>+ *</div><div class='add'>+ * Set the X86_FEATURE_FPU CPU-capability bit based on</div><div class='add'>+ * trying to execute an actual sequence of FPU instructions:</div><div class='add'>+ */</div><div class='add'>+static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0;</div><div class='add'>+	u16 fsw, fcw;</div><div class='add'>+</div><div class='add'>+	fsw = fcw = 0xffff;</div><div class='add'>+</div><div class='add'>+	cr0 = read_cr0();</div><div class='add'>+	cr0 &amp;= ~(X86_CR0_TS | X86_CR0_EM);</div><div class='add'>+	write_cr0(cr0);</div><div class='add'>+</div><div class='add'>+	asm volatile("fninit ; fnstsw %0 ; fnstcw %1"</div><div class='add'>+		     : "+m" (fsw), "+m" (fcw));</div><div class='add'>+</div><div class='add'>+	if (fsw == 0 &amp;&amp; (fcw &amp; 0x103f) == 0x003f)</div><div class='add'>+		set_cpu_cap(c, X86_FEATURE_FPU);</div><div class='add'>+	else</div><div class='add'>+		clear_cpu_cap(c, X86_FEATURE_FPU);</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_MATH_EMULATION</div><div class='add'>+	if (!cpu_has_fpu) {</div><div class='add'>+		pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");</div><div class='add'>+		for (;;)</div><div class='add'>+			asm volatile("hlt");</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Boot time FPU feature detection code:</div><div class='add'>+ */</div><div class='add'>+unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;</div><div class='add'>+</div><div class='add'>+static void __init fpu__init_system_mxcsr(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int mask = 0;</div><div class='add'>+</div><div class='add'>+	if (cpu_has_fxsr) {</div><div class='add'>+		/* Static because GCC does not get 16-byte stack alignment right: */</div><div class='add'>+		static struct fxregs_state fxregs __initdata;</div><div class='add'>+</div><div class='add'>+		asm volatile("fxsave %0" : "+m" (fxregs));</div><div class='add'>+</div><div class='add'>+		mask = fxregs.mxcsr_mask;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If zero then use the default features mask,</div><div class='add'>+		 * which has all features set, except the</div><div class='add'>+		 * denormals-are-zero feature bit:</div><div class='add'>+		 */</div><div class='add'>+		if (mask == 0)</div><div class='add'>+			mask = 0x0000ffbf;</div><div class='add'>+	}</div><div class='add'>+	mxcsr_feature_mask &amp;= mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Once per bootup FPU initialization sequences that will run on most x86 CPUs:</div><div class='add'>+ */</div><div class='add'>+static void __init fpu__init_system_generic(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Set up the legacy init FPU context. (xstate init might overwrite this</div><div class='add'>+	 * with a more modern format, if the CPU supports it.)</div><div class='add'>+	 */</div><div class='add'>+	fpstate_init_fxstate(&amp;init_fpstate.fxsave);</div><div class='add'>+</div><div class='add'>+	fpu__init_system_mxcsr();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Size of the FPU context state. All tasks in the system use the</div><div class='add'>+ * same context size, regardless of what portion they use.</div><div class='add'>+ * This is inherent to the XSAVE architecture which puts all state</div><div class='add'>+ * components into a single, continuous memory block:</div><div class='add'>+ */</div><div class='add'>+unsigned int xstate_size;</div><div class='add'>+EXPORT_SYMBOL_GPL(xstate_size);</div><div class='add'>+</div><div class='add'>+/* Enforce that 'MEMBER' is the last field of 'TYPE': */</div><div class='add'>+#define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \</div><div class='add'>+	BUILD_BUG_ON(sizeof(TYPE) != offsetofend(TYPE, MEMBER))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * We append the 'struct fpu' to the task_struct:</div><div class='add'>+ */</div><div class='add'>+static void __init fpu__init_task_struct_size(void)</div><div class='add'>+{</div><div class='add'>+	int task_size = sizeof(struct task_struct);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Subtract off the static size of the register state.</div><div class='add'>+	 * It potentially has a bunch of padding.</div><div class='add'>+	 */</div><div class='add'>+	task_size -= sizeof(((struct task_struct *)0)-&gt;thread.fpu.state);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Add back the dynamically-calculated register state</div><div class='add'>+	 * size.</div><div class='add'>+	 */</div><div class='add'>+	task_size += xstate_size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We dynamically size 'struct fpu', so we require that</div><div class='add'>+	 * it be at the end of 'thread_struct' and that</div><div class='add'>+	 * 'thread_struct' be at the end of 'task_struct'.  If</div><div class='add'>+	 * you hit a compile error here, check the structure to</div><div class='add'>+	 * see if something got added to the end.</div><div class='add'>+	 */</div><div class='add'>+	CHECK_MEMBER_AT_END_OF(struct fpu, state);</div><div class='add'>+	CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);</div><div class='add'>+	CHECK_MEMBER_AT_END_OF(struct task_struct, thread);</div><div class='add'>+</div><div class='add'>+	arch_task_struct_size = task_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set up the xstate_size based on the legacy FPU context size.</div><div class='add'>+ *</div><div class='add'>+ * We set this up first, and later it will be overwritten by</div><div class='add'>+ * fpu__init_system_xstate() if the CPU knows about xstates.</div><div class='add'>+ */</div><div class='add'>+static void __init fpu__init_system_xstate_size_legacy(void)</div><div class='add'>+{</div><div class='add'>+	static int on_boot_cpu = 1;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(!on_boot_cpu);</div><div class='add'>+	on_boot_cpu = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Note that xstate_size might be overwriten later during</div><div class='add'>+	 * fpu__init_system_xstate().</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_fpu) {</div><div class='add'>+		/*</div><div class='add'>+		 * Disable xsave as we do not support it if i387</div><div class='add'>+		 * emulation is enabled.</div><div class='add'>+		 */</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_XSAVE);</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='add'>+		xstate_size = sizeof(struct swregs_state);</div><div class='add'>+	} else {</div><div class='add'>+		if (cpu_has_fxsr)</div><div class='add'>+			xstate_size = sizeof(struct fxregs_state);</div><div class='add'>+		else</div><div class='add'>+			xstate_size = sizeof(struct fregs_state);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Quirk: we don't yet handle the XSAVES* instructions</div><div class='add'>+	 * correctly, as we don't correctly convert between</div><div class='add'>+	 * standard and compacted format when interfacing</div><div class='add'>+	 * with user-space - so disable it for now.</div><div class='add'>+	 *</div><div class='add'>+	 * The difference is small: with recent CPUs the</div><div class='add'>+	 * compacted format is only marginally smaller than</div><div class='add'>+	 * the standard FPU state format.</div><div class='add'>+	 *</div><div class='add'>+	 * ( This is easy to backport while we are fixing</div><div class='add'>+	 *   XSAVES* support. )</div><div class='add'>+	 */</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU context switching strategies:</div><div class='add'>+ *</div><div class='add'>+ * Against popular belief, we don't do lazy FPU saves, due to the</div><div class='add'>+ * task migration complications it brings on SMP - we only do</div><div class='add'>+ * lazy FPU restores.</div><div class='add'>+ *</div><div class='add'>+ * 'lazy' is the traditional strategy, which is based on setting</div><div class='add'>+ * CR0::TS to 1 during context-switch (instead of doing a full</div><div class='add'>+ * restore of the FPU state), which causes the first FPU instruction</div><div class='add'>+ * after the context switch (whenever it is executed) to fault - at</div><div class='add'>+ * which point we lazily restore the FPU state into FPU registers.</div><div class='add'>+ *</div><div class='add'>+ * Tasks are of course under no obligation to execute FPU instructions,</div><div class='add'>+ * so it can easily happen that another context-switch occurs without</div><div class='add'>+ * a single FPU instruction being executed. If we eventually switch</div><div class='add'>+ * back to the original task (that still owns the FPU) then we have</div><div class='add'>+ * not only saved the restores along the way, but we also have the</div><div class='add'>+ * FPU ready to be used for the original task.</div><div class='add'>+ *</div><div class='add'>+ * 'eager' switching is used on modern CPUs, there we switch the FPU</div><div class='add'>+ * state during every context switch, regardless of whether the task</div><div class='add'>+ * has used FPU instructions in that time slice or not. This is done</div><div class='add'>+ * because modern FPU context saving instructions are able to optimize</div><div class='add'>+ * state saving and restoration in hardware: they can detect both</div><div class='add'>+ * unused and untouched FPU state and optimize accordingly.</div><div class='add'>+ *</div><div class='add'>+ * [ Note that even in 'lazy' mode we might optimize context switches</div><div class='add'>+ *   to use 'eager' restores, if we detect that a task is using the FPU</div><div class='add'>+ *   frequently. See the fpu-&gt;counter logic in fpu/internal.h for that. ]</div><div class='add'>+ */</div><div class='add'>+static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;</div><div class='add'>+</div><div class='add'>+static int __init eager_fpu_setup(char *s)</div><div class='add'>+{</div><div class='add'>+	if (!strcmp(s, "on"))</div><div class='add'>+		eagerfpu = ENABLE;</div><div class='add'>+	else if (!strcmp(s, "off"))</div><div class='add'>+		eagerfpu = DISABLE;</div><div class='add'>+	else if (!strcmp(s, "auto"))</div><div class='add'>+		eagerfpu = AUTO;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("eagerfpu=", eager_fpu_setup);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Pick the FPU context switching strategy:</div><div class='add'>+ */</div><div class='add'>+static void __init fpu__init_system_ctx_switch(void)</div><div class='add'>+{</div><div class='add'>+	static bool on_boot_cpu = 1;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(!on_boot_cpu);</div><div class='add'>+	on_boot_cpu = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(current-&gt;thread.fpu.fpstate_active);</div><div class='add'>+	current_thread_info()-&gt;status = 0;</div><div class='add'>+</div><div class='add'>+	/* Auto enable eagerfpu for xsaveopt */</div><div class='add'>+	if (cpu_has_xsaveopt &amp;&amp; eagerfpu != DISABLE)</div><div class='add'>+		eagerfpu = ENABLE;</div><div class='add'>+</div><div class='add'>+	if (xfeatures_mask &amp; XSTATE_EAGER) {</div><div class='add'>+		if (eagerfpu == DISABLE) {</div><div class='add'>+			pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",</div><div class='add'>+			       xfeatures_mask &amp; XSTATE_EAGER);</div><div class='add'>+			xfeatures_mask &amp;= ~XSTATE_EAGER;</div><div class='add'>+		} else {</div><div class='add'>+			eagerfpu = ENABLE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eagerfpu == ENABLE)</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called on the boot CPU once per system bootup, to set up the initial</div><div class='add'>+ * FPU state that is later cloned into all processes:</div><div class='add'>+ */</div><div class='add'>+void __init fpu__init_system(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	fpu__init_system_early_generic(c);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The FPU has to be operational for some of the</div><div class='add'>+	 * later FPU init activities:</div><div class='add'>+	 */</div><div class='add'>+	fpu__init_cpu();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * But don't leave CR0::TS set yet, as some of the FPU setup</div><div class='add'>+	 * methods depend on being able to execute FPU instructions</div><div class='add'>+	 * that will fault on a set TS, such as the FXSAVE in</div><div class='add'>+	 * fpu__init_system_mxcsr().</div><div class='add'>+	 */</div><div class='add'>+	clts();</div><div class='add'>+</div><div class='add'>+	fpu__init_system_generic();</div><div class='add'>+	fpu__init_system_xstate_size_legacy();</div><div class='add'>+	fpu__init_system_xstate();</div><div class='add'>+	fpu__init_task_struct_size();</div><div class='add'>+</div><div class='add'>+	fpu__init_system_ctx_switch();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Boot parameter to turn off FPU support and fall back to math-emu:</div><div class='add'>+ */</div><div class='add'>+static int __init no_387(char *s)</div><div class='add'>+{</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_FPU);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("no387", no_387);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disable all xstate CPU features:</div><div class='add'>+ */</div><div class='add'>+static int __init x86_noxsave_setup(char *s)</div><div class='add'>+{</div><div class='add'>+	if (strlen(s))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVE);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_AVX);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_AVX2);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("noxsave", x86_noxsave_setup);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disable the XSAVEOPT instruction specifically:</div><div class='add'>+ */</div><div class='add'>+static int __init x86_noxsaveopt_setup(char *s)</div><div class='add'>+{</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("noxsaveopt", x86_noxsaveopt_setup);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disable the XSAVES instruction:</div><div class='add'>+ */</div><div class='add'>+static int __init x86_noxsaves_setup(char *s)</div><div class='add'>+{</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("noxsaves", x86_noxsaves_setup);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disable FX save/restore and SSE support:</div><div class='add'>+ */</div><div class='add'>+static int __init x86_nofxsr_setup(char *s)</div><div class='add'>+{</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_FXSR);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);</div><div class='add'>+	setup_clear_cpu_cap(X86_FEATURE_XMM);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+__setup("nofxsr", x86_nofxsr_setup);</div><div class='head'>diff --git a/arch/x86/kernel/fpu/regset.c b/arch/x86/kernel/fpu/regset.c<br/>new file mode 100644<br/>index 000000000000..dc60810c1c74<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/regset.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/regset.c</a></div><div class='hunk'>@@ -0,0 +1,356 @@</div><div class='add'>+/*</div><div class='add'>+ * FPU register's regset abstraction, for ptrace, core dumps, etc.</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/regset.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,</div><div class='add'>+ * as the "regset-&gt;n" for the xstate regset will be updated based on the feature</div><div class='add'>+ * capabilites supported by the xsave.</div><div class='add'>+ */</div><div class='add'>+int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)</div><div class='add'>+{</div><div class='add'>+	struct fpu *target_fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	return target_fpu-&gt;fpstate_active ? regset-&gt;n : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)</div><div class='add'>+{</div><div class='add'>+	struct fpu *target_fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	return (cpu_has_fxsr &amp;&amp; target_fpu-&gt;fpstate_active) ? regset-&gt;n : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xfpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+		unsigned int pos, unsigned int count,</div><div class='add'>+		void *kbuf, void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_fxsr)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_read(fpu);</div><div class='add'>+	fpstate_sanitize_xstate(fpu);</div><div class='add'>+</div><div class='add'>+	return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+				   &amp;fpu-&gt;state.fxsave, 0, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xfpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+		unsigned int pos, unsigned int count,</div><div class='add'>+		const void *kbuf, const void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_fxsr)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_write(fpu);</div><div class='add'>+	fpstate_sanitize_xstate(fpu);</div><div class='add'>+</div><div class='add'>+	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+				 &amp;fpu-&gt;state.fxsave, 0, -1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * mxcsr reserved bits must be masked to zero for security reasons.</div><div class='add'>+	 */</div><div class='add'>+	fpu-&gt;state.fxsave.mxcsr &amp;= mxcsr_feature_mask;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * update the header bits in the xsave header, indicating the</div><div class='add'>+	 * presence of FP and SSE state.</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_has_xsave)</div><div class='add'>+		fpu-&gt;state.xsave.header.xfeatures |= XSTATE_FPSSE;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xstateregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+		unsigned int pos, unsigned int count,</div><div class='add'>+		void *kbuf, void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct xregs_state *xsave;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsave)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_read(fpu);</div><div class='add'>+</div><div class='add'>+	xsave = &amp;fpu-&gt;state.xsave;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the 48bytes defined by the software first into the xstate</div><div class='add'>+	 * memory layout in the thread struct, so that we can copy the entire</div><div class='add'>+	 * xstateregs to the user using one user_regset_copyout().</div><div class='add'>+	 */</div><div class='add'>+	memcpy(&amp;xsave-&gt;i387.sw_reserved,</div><div class='add'>+		xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the xstate memory layout.</div><div class='add'>+	 */</div><div class='add'>+	ret = user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, xsave, 0, -1);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xstateregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+		  unsigned int pos, unsigned int count,</div><div class='add'>+		  const void *kbuf, const void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct xregs_state *xsave;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsave)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_write(fpu);</div><div class='add'>+</div><div class='add'>+	xsave = &amp;fpu-&gt;state.xsave;</div><div class='add'>+</div><div class='add'>+	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, xsave, 0, -1);</div><div class='add'>+	/*</div><div class='add'>+	 * mxcsr reserved bits must be masked to zero for security reasons.</div><div class='add'>+	 */</div><div class='add'>+	xsave-&gt;i387.mxcsr &amp;= mxcsr_feature_mask;</div><div class='add'>+	xsave-&gt;header.xfeatures &amp;= xfeatures_mask;</div><div class='add'>+	/*</div><div class='add'>+	 * These bits must be zero.</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;xsave-&gt;header.reserved, 0, 48);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU tag word conversions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline unsigned short twd_i387_to_fxsr(unsigned short twd)</div><div class='add'>+{</div><div class='add'>+	unsigned int tmp; /* to avoid 16 bit prefixes in the code */</div><div class='add'>+</div><div class='add'>+	/* Transform each pair of bits into 01 (valid) or 00 (empty) */</div><div class='add'>+	tmp = ~twd;</div><div class='add'>+	tmp = (tmp | (tmp&gt;&gt;1)) &amp; 0x5555; /* 0V0V0V0V0V0V0V0V */</div><div class='add'>+	/* and move the valid bits to the lower byte. */</div><div class='add'>+	tmp = (tmp | (tmp &gt;&gt; 1)) &amp; 0x3333; /* 00VV00VV00VV00VV */</div><div class='add'>+	tmp = (tmp | (tmp &gt;&gt; 2)) &amp; 0x0f0f; /* 0000VVVV0000VVVV */</div><div class='add'>+	tmp = (tmp | (tmp &gt;&gt; 4)) &amp; 0x00ff; /* 00000000VVVVVVVV */</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define FPREG_ADDR(f, n)	((void *)&amp;(f)-&gt;st_space + (n) * 16)</div><div class='add'>+#define FP_EXP_TAG_VALID	0</div><div class='add'>+#define FP_EXP_TAG_ZERO		1</div><div class='add'>+#define FP_EXP_TAG_SPECIAL	2</div><div class='add'>+#define FP_EXP_TAG_EMPTY	3</div><div class='add'>+</div><div class='add'>+static inline u32 twd_fxsr_to_i387(struct fxregs_state *fxsave)</div><div class='add'>+{</div><div class='add'>+	struct _fpxreg *st;</div><div class='add'>+	u32 tos = (fxsave-&gt;swd &gt;&gt; 11) &amp; 7;</div><div class='add'>+	u32 twd = (unsigned long) fxsave-&gt;twd;</div><div class='add'>+	u32 tag;</div><div class='add'>+	u32 ret = 0xffff0000u;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++, twd &gt;&gt;= 1) {</div><div class='add'>+		if (twd &amp; 0x1) {</div><div class='add'>+			st = FPREG_ADDR(fxsave, (i - tos) &amp; 7);</div><div class='add'>+</div><div class='add'>+			switch (st-&gt;exponent &amp; 0x7fff) {</div><div class='add'>+			case 0x7fff:</div><div class='add'>+				tag = FP_EXP_TAG_SPECIAL;</div><div class='add'>+				break;</div><div class='add'>+			case 0x0000:</div><div class='add'>+				if (!st-&gt;significand[0] &amp;&amp;</div><div class='add'>+				    !st-&gt;significand[1] &amp;&amp;</div><div class='add'>+				    !st-&gt;significand[2] &amp;&amp;</div><div class='add'>+				    !st-&gt;significand[3])</div><div class='add'>+					tag = FP_EXP_TAG_ZERO;</div><div class='add'>+				else</div><div class='add'>+					tag = FP_EXP_TAG_SPECIAL;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				if (st-&gt;significand[3] &amp; 0x8000)</div><div class='add'>+					tag = FP_EXP_TAG_VALID;</div><div class='add'>+				else</div><div class='add'>+					tag = FP_EXP_TAG_SPECIAL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			tag = FP_EXP_TAG_EMPTY;</div><div class='add'>+		}</div><div class='add'>+		ret |= tag &lt;&lt; (2 * i);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FXSR floating point environment conversions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)</div><div class='add'>+{</div><div class='add'>+	struct fxregs_state *fxsave = &amp;tsk-&gt;thread.fpu.state.fxsave;</div><div class='add'>+	struct _fpreg *to = (struct _fpreg *) &amp;env-&gt;st_space[0];</div><div class='add'>+	struct _fpxreg *from = (struct _fpxreg *) &amp;fxsave-&gt;st_space[0];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	env-&gt;cwd = fxsave-&gt;cwd | 0xffff0000u;</div><div class='add'>+	env-&gt;swd = fxsave-&gt;swd | 0xffff0000u;</div><div class='add'>+	env-&gt;twd = twd_fxsr_to_i387(fxsave);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	env-&gt;fip = fxsave-&gt;rip;</div><div class='add'>+	env-&gt;foo = fxsave-&gt;rdp;</div><div class='add'>+	/*</div><div class='add'>+	 * should be actually ds/cs at fpu exception time, but</div><div class='add'>+	 * that information is not available in 64bit mode.</div><div class='add'>+	 */</div><div class='add'>+	env-&gt;fcs = task_pt_regs(tsk)-&gt;cs;</div><div class='add'>+	if (tsk == current) {</div><div class='add'>+		savesegment(ds, env-&gt;fos);</div><div class='add'>+	} else {</div><div class='add'>+		env-&gt;fos = tsk-&gt;thread.ds;</div><div class='add'>+	}</div><div class='add'>+	env-&gt;fos |= 0xffff0000;</div><div class='add'>+#else</div><div class='add'>+	env-&gt;fip = fxsave-&gt;fip;</div><div class='add'>+	env-&gt;fcs = (u16) fxsave-&gt;fcs | ((u32) fxsave-&gt;fop &lt;&lt; 16);</div><div class='add'>+	env-&gt;foo = fxsave-&gt;foo;</div><div class='add'>+	env-&gt;fos = fxsave-&gt;fos;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; ++i)</div><div class='add'>+		memcpy(&amp;to[i], &amp;from[i], sizeof(to[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void convert_to_fxsr(struct task_struct *tsk,</div><div class='add'>+		     const struct user_i387_ia32_struct *env)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	struct fxregs_state *fxsave = &amp;tsk-&gt;thread.fpu.state.fxsave;</div><div class='add'>+	struct _fpreg *from = (struct _fpreg *) &amp;env-&gt;st_space[0];</div><div class='add'>+	struct _fpxreg *to = (struct _fpxreg *) &amp;fxsave-&gt;st_space[0];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fxsave-&gt;cwd = env-&gt;cwd;</div><div class='add'>+	fxsave-&gt;swd = env-&gt;swd;</div><div class='add'>+	fxsave-&gt;twd = twd_i387_to_fxsr(env-&gt;twd);</div><div class='add'>+	fxsave-&gt;fop = (u16) ((u32) env-&gt;fcs &gt;&gt; 16);</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	fxsave-&gt;rip = env-&gt;fip;</div><div class='add'>+	fxsave-&gt;rdp = env-&gt;foo;</div><div class='add'>+	/* cs and ds ignored */</div><div class='add'>+#else</div><div class='add'>+	fxsave-&gt;fip = env-&gt;fip;</div><div class='add'>+	fxsave-&gt;fcs = (env-&gt;fcs &amp; 0xffff);</div><div class='add'>+	fxsave-&gt;foo = env-&gt;foo;</div><div class='add'>+	fxsave-&gt;fos = env-&gt;fos;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; ++i)</div><div class='add'>+		memcpy(&amp;to[i], &amp;from[i], sizeof(from[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+	       unsigned int pos, unsigned int count,</div><div class='add'>+	       void *kbuf, void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct user_i387_ia32_struct env;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_read(fpu);</div><div class='add'>+</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='add'>+		return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_fxsr)</div><div class='add'>+		return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+					   &amp;fpu-&gt;state.fsave, 0,</div><div class='add'>+					   -1);</div><div class='add'>+</div><div class='add'>+	fpstate_sanitize_xstate(fpu);</div><div class='add'>+</div><div class='add'>+	if (kbuf &amp;&amp; pos == 0 &amp;&amp; count == sizeof(env)) {</div><div class='add'>+		convert_from_fxsr(kbuf, target);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	convert_from_fxsr(&amp;env, target);</div><div class='add'>+</div><div class='add'>+	return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;env, 0, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='add'>+	       unsigned int pos, unsigned int count,</div><div class='add'>+	       const void *kbuf, const void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct user_i387_ia32_struct env;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fpu__activate_fpstate_write(fpu);</div><div class='add'>+	fpstate_sanitize_xstate(fpu);</div><div class='add'>+</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='add'>+		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_fxsr)</div><div class='add'>+		return user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+					  &amp;fpu-&gt;state.fsave, 0,</div><div class='add'>+					  -1);</div><div class='add'>+</div><div class='add'>+	if (pos &gt; 0 || count &lt; sizeof(env))</div><div class='add'>+		convert_from_fxsr(&amp;env, target);</div><div class='add'>+</div><div class='add'>+	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;env, 0, -1);</div><div class='add'>+	if (!ret)</div><div class='add'>+		convert_to_fxsr(target, &amp;env);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * update the header bit in the xsave header, indicating the</div><div class='add'>+	 * presence of FP.</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_has_xsave)</div><div class='add'>+		fpu-&gt;state.xsave.header.xfeatures |= XSTATE_FP;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FPU state for core dumps.</div><div class='add'>+ * This is only used for a.out dumps now.</div><div class='add'>+ * It is declared generically using elf_fpregset_t (which is</div><div class='add'>+ * struct user_i387_struct) but is in fact only used for 32-bit</div><div class='add'>+ * dumps, so on 64-bit it is really struct user_i387_ia32_struct.</div><div class='add'>+ */</div><div class='add'>+int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)</div><div class='add'>+{</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+	struct fpu *fpu = &amp;tsk-&gt;thread.fpu;</div><div class='add'>+	int fpvalid;</div><div class='add'>+</div><div class='add'>+	fpvalid = fpu-&gt;fpstate_active;</div><div class='add'>+	if (fpvalid)</div><div class='add'>+		fpvalid = !fpregs_get(tsk, NULL,</div><div class='add'>+				      0, sizeof(struct user_i387_ia32_struct),</div><div class='add'>+				      ufpu, NULL);</div><div class='add'>+</div><div class='add'>+	return fpvalid;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dump_fpu);</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */</div><div class='head'>diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c<br/>new file mode 100644<br/>index 000000000000..50ec9af1bd51<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/signal.c</a></div><div class='hunk'>@@ -0,0 +1,404 @@</div><div class='add'>+/*</div><div class='add'>+ * FPU signal frame handling routines.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compat.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/regset.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/sigframe.h&gt;</div><div class='add'>+</div><div class='add'>+static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check for the presence of extended state information in the</div><div class='add'>+ * user fpstate pointer in the sigcontext.</div><div class='add'>+ */</div><div class='add'>+static inline int check_for_xstate(struct fxregs_state __user *buf,</div><div class='add'>+				   void __user *fpstate,</div><div class='add'>+				   struct _fpx_sw_bytes *fx_sw)</div><div class='add'>+{</div><div class='add'>+	int min_xstate_size = sizeof(struct fxregs_state) +</div><div class='add'>+			      sizeof(struct xstate_header);</div><div class='add'>+	unsigned int magic2;</div><div class='add'>+</div><div class='add'>+	if (__copy_from_user(fx_sw, &amp;buf-&gt;sw_reserved[0], sizeof(*fx_sw)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* Check for the first magic field and other error scenarios. */</div><div class='add'>+	if (fx_sw-&gt;magic1 != FP_XSTATE_MAGIC1 ||</div><div class='add'>+	    fx_sw-&gt;xstate_size &lt; min_xstate_size ||</div><div class='add'>+	    fx_sw-&gt;xstate_size &gt; xstate_size ||</div><div class='add'>+	    fx_sw-&gt;xstate_size &gt; fx_sw-&gt;extended_size)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check for the presence of second magic word at the end of memory</div><div class='add'>+	 * layout. This detects the case where the user just copied the legacy</div><div class='add'>+	 * fpstate layout with out copying the extended state information</div><div class='add'>+	 * in the memory layout.</div><div class='add'>+	 */</div><div class='add'>+	if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw-&gt;xstate_size))</div><div class='add'>+	    || magic2 != FP_XSTATE_MAGIC2)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Signal frame handlers.</div><div class='add'>+ */</div><div class='add'>+static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)</div><div class='add'>+{</div><div class='add'>+	if (use_fxsr()) {</div><div class='add'>+		struct xregs_state *xsave = &amp;tsk-&gt;thread.fpu.state.xsave;</div><div class='add'>+		struct user_i387_ia32_struct env;</div><div class='add'>+		struct _fpstate_ia32 __user *fp = buf;</div><div class='add'>+</div><div class='add'>+		convert_from_fxsr(&amp;env, tsk);</div><div class='add'>+</div><div class='add'>+		if (__copy_to_user(buf, &amp;env, sizeof(env)) ||</div><div class='add'>+		    __put_user(xsave-&gt;i387.swd, &amp;fp-&gt;status) ||</div><div class='add'>+		    __put_user(X86_FXSR_MAGIC, &amp;fp-&gt;magic))</div><div class='add'>+			return -1;</div><div class='add'>+	} else {</div><div class='add'>+		struct fregs_state __user *fp = buf;</div><div class='add'>+		u32 swd;</div><div class='add'>+		if (__get_user(swd, &amp;fp-&gt;swd) || __put_user(swd, &amp;fp-&gt;status))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int save_xstate_epilog(void __user *buf, int ia32_frame)</div><div class='add'>+{</div><div class='add'>+	struct xregs_state __user *x = buf;</div><div class='add'>+	struct _fpx_sw_bytes *sw_bytes;</div><div class='add'>+	u32 xfeatures;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Setup the bytes not touched by the [f]xsave and reserved for SW. */</div><div class='add'>+	sw_bytes = ia32_frame ? &amp;fx_sw_reserved_ia32 : &amp;fx_sw_reserved;</div><div class='add'>+	err = __copy_to_user(&amp;x-&gt;i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));</div><div class='add'>+</div><div class='add'>+	if (!use_xsave())</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Read the xfeatures which we copied (directly from the cpu or</div><div class='add'>+	 * from the state in task struct) to the user buffers.</div><div class='add'>+	 */</div><div class='add'>+	err |= __get_user(xfeatures, (__u32 *)&amp;x-&gt;header.xfeatures);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For legacy compatible, we always set FP/SSE bits in the bit</div><div class='add'>+	 * vector while saving the state to the user context. This will</div><div class='add'>+	 * enable us capturing any changes(during sigreturn) to</div><div class='add'>+	 * the FP/SSE bits by the legacy applications which don't touch</div><div class='add'>+	 * xfeatures in the xsave header.</div><div class='add'>+	 *</div><div class='add'>+	 * xsave aware apps can change the xfeatures in the xsave</div><div class='add'>+	 * header as well as change any contents in the memory layout.</div><div class='add'>+	 * xrestore as part of sigreturn will capture all the changes.</div><div class='add'>+	 */</div><div class='add'>+	xfeatures |= XSTATE_FPSSE;</div><div class='add'>+</div><div class='add'>+	err |= __put_user(xfeatures, (__u32 *)&amp;x-&gt;header.xfeatures);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (use_xsave())</div><div class='add'>+		err = copy_xregs_to_user(buf);</div><div class='add'>+	else if (use_fxsr())</div><div class='add'>+		err = copy_fxregs_to_user((struct fxregs_state __user *) buf);</div><div class='add'>+	else</div><div class='add'>+		err = copy_fregs_to_user((struct fregs_state __user *) buf);</div><div class='add'>+</div><div class='add'>+	if (unlikely(err) &amp;&amp; __clear_user(buf, xstate_size))</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save the fpu, extended register state to the user signal frame.</div><div class='add'>+ *</div><div class='add'>+ * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save</div><div class='add'>+ *  state is copied.</div><div class='add'>+ *  'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.</div><div class='add'>+ *</div><div class='add'>+ *	buf == buf_fx for 64-bit frames and 32-bit fsave frame.</div><div class='add'>+ *	buf != buf_fx for 32-bit frames with fxstate.</div><div class='add'>+ *</div><div class='add'>+ * If the fpu, extended register state is live, save the state directly</div><div class='add'>+ * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,</div><div class='add'>+ * copy the thread's fpu state to the user frame starting at 'buf_fx'.</div><div class='add'>+ *</div><div class='add'>+ * If this is a 32-bit frame with fxstate, put a fsave header before</div><div class='add'>+ * the aligned state at 'buf_fx'.</div><div class='add'>+ *</div><div class='add'>+ * For [f]xsave state, update the SW reserved fields in the [f]xsave frame</div><div class='add'>+ * indicating the absence/presence of the extended state to the user.</div><div class='add'>+ */</div><div class='add'>+int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)</div><div class='add'>+{</div><div class='add'>+	struct xregs_state *xsave = &amp;current-&gt;thread.fpu.state.xsave;</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+	int ia32_fxstate = (buf != buf_fx);</div><div class='add'>+</div><div class='add'>+	ia32_fxstate &amp;= (config_enabled(CONFIG_X86_32) ||</div><div class='add'>+			 config_enabled(CONFIG_IA32_EMULATION));</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_WRITE, buf, size))</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='add'>+		return fpregs_soft_get(current, NULL, 0,</div><div class='add'>+			sizeof(struct user_i387_ia32_struct), NULL,</div><div class='add'>+			(struct _fpstate_ia32 __user *) buf) ? -1 : 1;</div><div class='add'>+</div><div class='add'>+	if (fpregs_active()) {</div><div class='add'>+		/* Save the live register state to the user directly. */</div><div class='add'>+		if (copy_fpregs_to_sigframe(buf_fx))</div><div class='add'>+			return -1;</div><div class='add'>+		/* Update the thread's fxstate to save the fsave header. */</div><div class='add'>+		if (ia32_fxstate)</div><div class='add'>+			copy_fxregs_to_kernel(&amp;tsk-&gt;thread.fpu);</div><div class='add'>+	} else {</div><div class='add'>+		fpstate_sanitize_xstate(&amp;tsk-&gt;thread.fpu);</div><div class='add'>+		if (__copy_to_user(buf_fx, xsave, xstate_size))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Save the fsave header for the 32-bit frames. */</div><div class='add'>+	if ((ia32_fxstate || !use_fxsr()) &amp;&amp; save_fsave_header(tsk, buf))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (use_fxsr() &amp;&amp; save_xstate_epilog(buf_fx, ia32_fxstate))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+sanitize_restored_xstate(struct task_struct *tsk,</div><div class='add'>+			 struct user_i387_ia32_struct *ia32_env,</div><div class='add'>+			 u64 xfeatures, int fx_only)</div><div class='add'>+{</div><div class='add'>+	struct xregs_state *xsave = &amp;tsk-&gt;thread.fpu.state.xsave;</div><div class='add'>+	struct xstate_header *header = &amp;xsave-&gt;header;</div><div class='add'>+</div><div class='add'>+	if (use_xsave()) {</div><div class='add'>+		/* These bits must be zero. */</div><div class='add'>+		memset(header-&gt;reserved, 0, 48);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Init the state that is not present in the memory</div><div class='add'>+		 * layout and not enabled by the OS.</div><div class='add'>+		 */</div><div class='add'>+		if (fx_only)</div><div class='add'>+			header-&gt;xfeatures = XSTATE_FPSSE;</div><div class='add'>+		else</div><div class='add'>+			header-&gt;xfeatures &amp;= (xfeatures_mask &amp; xfeatures);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (use_fxsr()) {</div><div class='add'>+		/*</div><div class='add'>+		 * mscsr reserved bits must be masked to zero for security</div><div class='add'>+		 * reasons.</div><div class='add'>+		 */</div><div class='add'>+		xsave-&gt;i387.mxcsr &amp;= mxcsr_feature_mask;</div><div class='add'>+</div><div class='add'>+		convert_to_fxsr(tsk, ia32_env);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore the extended state if present. Otherwise, restore the FP/SSE state.</div><div class='add'>+ */</div><div class='add'>+static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only)</div><div class='add'>+{</div><div class='add'>+	if (use_xsave()) {</div><div class='add'>+		if ((unsigned long)buf % 64 || fx_only) {</div><div class='add'>+			u64 init_bv = xfeatures_mask &amp; ~XSTATE_FPSSE;</div><div class='add'>+			copy_kernel_to_xregs(&amp;init_fpstate.xsave, init_bv);</div><div class='add'>+			return copy_user_to_fxregs(buf);</div><div class='add'>+		} else {</div><div class='add'>+			u64 init_bv = xfeatures_mask &amp; ~xbv;</div><div class='add'>+			if (unlikely(init_bv))</div><div class='add'>+				copy_kernel_to_xregs(&amp;init_fpstate.xsave, init_bv);</div><div class='add'>+			return copy_user_to_xregs(buf, xbv);</div><div class='add'>+		}</div><div class='add'>+	} else if (use_fxsr()) {</div><div class='add'>+		return copy_user_to_fxregs(buf);</div><div class='add'>+	} else</div><div class='add'>+		return copy_user_to_fregs(buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)</div><div class='add'>+{</div><div class='add'>+	int ia32_fxstate = (buf != buf_fx);</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+	struct fpu *fpu = &amp;tsk-&gt;thread.fpu;</div><div class='add'>+	int state_size = xstate_size;</div><div class='add'>+	u64 xfeatures = 0;</div><div class='add'>+	int fx_only = 0;</div><div class='add'>+</div><div class='add'>+	ia32_fxstate &amp;= (config_enabled(CONFIG_X86_32) ||</div><div class='add'>+			 config_enabled(CONFIG_IA32_EMULATION));</div><div class='add'>+</div><div class='add'>+	if (!buf) {</div><div class='add'>+		fpu__clear(fpu);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_READ, buf, size))</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	fpu__activate_curr(fpu);</div><div class='add'>+</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='add'>+		return fpregs_soft_set(current, NULL,</div><div class='add'>+				       0, sizeof(struct user_i387_ia32_struct),</div><div class='add'>+				       NULL, buf) != 0;</div><div class='add'>+</div><div class='add'>+	if (use_xsave()) {</div><div class='add'>+		struct _fpx_sw_bytes fx_sw_user;</div><div class='add'>+		if (unlikely(check_for_xstate(buf_fx, buf_fx, &amp;fx_sw_user))) {</div><div class='add'>+			/*</div><div class='add'>+			 * Couldn't find the extended state information in the</div><div class='add'>+			 * memory layout. Restore just the FP/SSE and init all</div><div class='add'>+			 * the other extended state.</div><div class='add'>+			 */</div><div class='add'>+			state_size = sizeof(struct fxregs_state);</div><div class='add'>+			fx_only = 1;</div><div class='add'>+		} else {</div><div class='add'>+			state_size = fx_sw_user.xstate_size;</div><div class='add'>+			xfeatures = fx_sw_user.xfeatures;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ia32_fxstate) {</div><div class='add'>+		/*</div><div class='add'>+		 * For 32-bit frames with fxstate, copy the user state to the</div><div class='add'>+		 * thread's fpu state, reconstruct fxstate from the fsave</div><div class='add'>+		 * header. Sanitize the copied state etc.</div><div class='add'>+		 */</div><div class='add'>+		struct fpu *fpu = &amp;tsk-&gt;thread.fpu;</div><div class='add'>+		struct user_i387_ia32_struct env;</div><div class='add'>+		int err = 0;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Drop the current fpu which clears fpu-&gt;fpstate_active. This ensures</div><div class='add'>+		 * that any context-switch during the copy of the new state,</div><div class='add'>+		 * avoids the intermediate state from getting restored/saved.</div><div class='add'>+		 * Thus avoiding the new restored state from getting corrupted.</div><div class='add'>+		 * We will be ready to restore/save the state only after</div><div class='add'>+		 * fpu-&gt;fpstate_active is again set.</div><div class='add'>+		 */</div><div class='add'>+		fpu__drop(fpu);</div><div class='add'>+</div><div class='add'>+		if (__copy_from_user(&amp;fpu-&gt;state.xsave, buf_fx, state_size) ||</div><div class='add'>+		    __copy_from_user(&amp;env, buf, sizeof(env))) {</div><div class='add'>+			fpstate_init(&amp;fpu-&gt;state);</div><div class='add'>+			err = -1;</div><div class='add'>+		} else {</div><div class='add'>+			sanitize_restored_xstate(tsk, &amp;env, xfeatures, fx_only);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fpu-&gt;fpstate_active = 1;</div><div class='add'>+		if (use_eager_fpu()) {</div><div class='add'>+			preempt_disable();</div><div class='add'>+			fpu__restore(fpu);</div><div class='add'>+			preempt_enable();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * For 64-bit frames and 32-bit fsave frames, restore the user</div><div class='add'>+		 * state to the registers directly (with exceptions handled).</div><div class='add'>+		 */</div><div class='add'>+		user_fpu_begin();</div><div class='add'>+		if (copy_user_to_fpregs_zeroing(buf_fx, xfeatures, fx_only)) {</div><div class='add'>+			fpu__clear(fpu);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int xstate_sigframe_size(void)</div><div class='add'>+{</div><div class='add'>+	return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore FPU state from a sigframe:</div><div class='add'>+ */</div><div class='add'>+int fpu__restore_sig(void __user *buf, int ia32_frame)</div><div class='add'>+{</div><div class='add'>+	void __user *buf_fx = buf;</div><div class='add'>+	int size = xstate_sigframe_size();</div><div class='add'>+</div><div class='add'>+	if (ia32_frame &amp;&amp; use_fxsr()) {</div><div class='add'>+		buf_fx = buf + sizeof(struct fregs_state);</div><div class='add'>+		size += sizeof(struct fregs_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __fpu__restore_sig(buf, buf_fx, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long</div><div class='add'>+fpu__alloc_mathframe(unsigned long sp, int ia32_frame,</div><div class='add'>+		     unsigned long *buf_fx, unsigned long *size)</div><div class='add'>+{</div><div class='add'>+	unsigned long frame_size = xstate_sigframe_size();</div><div class='add'>+</div><div class='add'>+	*buf_fx = sp = round_down(sp - frame_size, 64);</div><div class='add'>+	if (ia32_frame &amp;&amp; use_fxsr()) {</div><div class='add'>+		frame_size += sizeof(struct fregs_state);</div><div class='add'>+		sp -= sizeof(struct fregs_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*size = frame_size;</div><div class='add'>+</div><div class='add'>+	return sp;</div><div class='add'>+}</div><div class='add'>+/*</div><div class='add'>+ * Prepare the SW reserved portion of the fxsave memory layout, indicating</div><div class='add'>+ * the presence of the extended state information in the memory layout</div><div class='add'>+ * pointed by the fpstate pointer in the sigcontext.</div><div class='add'>+ * This will be saved when ever the FP and extended state context is</div><div class='add'>+ * saved on the user stack during the signal handler delivery to the user.</div><div class='add'>+ */</div><div class='add'>+void fpu__init_prepare_fx_sw_frame(void)</div><div class='add'>+{</div><div class='add'>+	int fsave_header_size = sizeof(struct fregs_state);</div><div class='add'>+	int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;</div><div class='add'>+</div><div class='add'>+	if (config_enabled(CONFIG_X86_32))</div><div class='add'>+		size += fsave_header_size;</div><div class='add'>+</div><div class='add'>+	fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;</div><div class='add'>+	fx_sw_reserved.extended_size = size;</div><div class='add'>+	fx_sw_reserved.xfeatures = xfeatures_mask;</div><div class='add'>+	fx_sw_reserved.xstate_size = xstate_size;</div><div class='add'>+</div><div class='add'>+	if (config_enabled(CONFIG_IA32_EMULATION)) {</div><div class='add'>+		fx_sw_reserved_ia32 = fx_sw_reserved;</div><div class='add'>+		fx_sw_reserved_ia32.extended_size += fsave_header_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c<br/>new file mode 100644<br/>index 000000000000..62fc001c7846<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/fpu/xstate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/fpu/xstate.c</a></div><div class='hunk'>@@ -0,0 +1,461 @@</div><div class='add'>+/*</div><div class='add'>+ * xsave/xrstor support.</div><div class='add'>+ *</div><div class='add'>+ * Author: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/compat.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/regset.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+</div><div class='add'>+static const char *xfeature_names[] =</div><div class='add'>+{</div><div class='add'>+	"x87 floating point registers"	,</div><div class='add'>+	"SSE registers"			,</div><div class='add'>+	"AVX registers"			,</div><div class='add'>+	"MPX bounds registers"		,</div><div class='add'>+	"MPX CSR"			,</div><div class='add'>+	"AVX-512 opmask"		,</div><div class='add'>+	"AVX-512 Hi256"			,</div><div class='add'>+	"AVX-512 ZMM_Hi256"		,</div><div class='add'>+	"unknown xstate feature"	,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Mask of xstate features supported by the CPU and the kernel:</div><div class='add'>+ */</div><div class='add'>+u64 xfeatures_mask __read_mostly;</div><div class='add'>+</div><div class='add'>+static unsigned int xstate_offsets[XFEATURES_NR_MAX] = { [ 0 ... XFEATURES_NR_MAX - 1] = -1};</div><div class='add'>+static unsigned int xstate_sizes[XFEATURES_NR_MAX]   = { [ 0 ... XFEATURES_NR_MAX - 1] = -1};</div><div class='add'>+static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];</div><div class='add'>+</div><div class='add'>+/* The number of supported xfeatures in xfeatures_mask: */</div><div class='add'>+static unsigned int xfeatures_nr;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return whether the system supports a given xfeature.</div><div class='add'>+ *</div><div class='add'>+ * Also return the name of the (most advanced) feature that the caller requested:</div><div class='add'>+ */</div><div class='add'>+int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)</div><div class='add'>+{</div><div class='add'>+	u64 xfeatures_missing = xfeatures_needed &amp; ~xfeatures_mask;</div><div class='add'>+</div><div class='add'>+	if (unlikely(feature_name)) {</div><div class='add'>+		long xfeature_idx, max_idx;</div><div class='add'>+		u64 xfeatures_print;</div><div class='add'>+		/*</div><div class='add'>+		 * So we use FLS here to be able to print the most advanced</div><div class='add'>+		 * feature that was requested but is missing. So if a driver</div><div class='add'>+		 * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the</div><div class='add'>+		 * missing AVX feature - this is the most informative message</div><div class='add'>+		 * to users:</div><div class='add'>+		 */</div><div class='add'>+		if (xfeatures_missing)</div><div class='add'>+			xfeatures_print = xfeatures_missing;</div><div class='add'>+		else</div><div class='add'>+			xfeatures_print = xfeatures_needed;</div><div class='add'>+</div><div class='add'>+		xfeature_idx = fls64(xfeatures_print)-1;</div><div class='add'>+		max_idx = ARRAY_SIZE(xfeature_names)-1;</div><div class='add'>+		xfeature_idx = min(xfeature_idx, max_idx);</div><div class='add'>+</div><div class='add'>+		*feature_name = xfeature_names[xfeature_idx];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xfeatures_missing)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cpu_has_xfeatures);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * When executing XSAVEOPT (or other optimized XSAVE instructions), if</div><div class='add'>+ * a processor implementation detects that an FPU state component is still</div><div class='add'>+ * (or is again) in its initialized state, it may clear the corresponding</div><div class='add'>+ * bit in the header.xfeatures field, and can skip the writeout of registers</div><div class='add'>+ * to the corresponding memory layout.</div><div class='add'>+ *</div><div class='add'>+ * This means that when the bit is zero, the state component might still contain</div><div class='add'>+ * some previous - non-initialized register state.</div><div class='add'>+ *</div><div class='add'>+ * Before writing xstate information to user-space we sanitize those components,</div><div class='add'>+ * to always ensure that the memory layout of a feature will be in the init state</div><div class='add'>+ * if the corresponding header bit is zero. This is to ensure that user-space doesn't</div><div class='add'>+ * see some stale state in the memory layout during signal handling, debugging etc.</div><div class='add'>+ */</div><div class='add'>+void fpstate_sanitize_xstate(struct fpu *fpu)</div><div class='add'>+{</div><div class='add'>+	struct fxregs_state *fx = &amp;fpu-&gt;state.fxsave;</div><div class='add'>+	int feature_bit;</div><div class='add'>+	u64 xfeatures;</div><div class='add'>+</div><div class='add'>+	if (!use_xsaveopt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xfeatures = fpu-&gt;state.xsave.header.xfeatures;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * None of the feature bits are in init state. So nothing else</div><div class='add'>+	 * to do for us, as the memory layout is up to date.</div><div class='add'>+	 */</div><div class='add'>+	if ((xfeatures &amp; xfeatures_mask) == xfeatures_mask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * FP is in init state</div><div class='add'>+	 */</div><div class='add'>+	if (!(xfeatures &amp; XSTATE_FP)) {</div><div class='add'>+		fx-&gt;cwd = 0x37f;</div><div class='add'>+		fx-&gt;swd = 0;</div><div class='add'>+		fx-&gt;twd = 0;</div><div class='add'>+		fx-&gt;fop = 0;</div><div class='add'>+		fx-&gt;rip = 0;</div><div class='add'>+		fx-&gt;rdp = 0;</div><div class='add'>+		memset(&amp;fx-&gt;st_space[0], 0, 128);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * SSE is in init state</div><div class='add'>+	 */</div><div class='add'>+	if (!(xfeatures &amp; XSTATE_SSE))</div><div class='add'>+		memset(&amp;fx-&gt;xmm_space[0], 0, 256);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * First two features are FPU and SSE, which above we handled</div><div class='add'>+	 * in a special way already:</div><div class='add'>+	 */</div><div class='add'>+	feature_bit = 0x2;</div><div class='add'>+	xfeatures = (xfeatures_mask &amp; ~xfeatures) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Update all the remaining memory layouts according to their</div><div class='add'>+	 * standard xstate layout, if their header bit is in the init</div><div class='add'>+	 * state:</div><div class='add'>+	 */</div><div class='add'>+	while (xfeatures) {</div><div class='add'>+		if (xfeatures &amp; 0x1) {</div><div class='add'>+			int offset = xstate_offsets[feature_bit];</div><div class='add'>+			int size = xstate_sizes[feature_bit];</div><div class='add'>+</div><div class='add'>+			memcpy((void *)fx + offset,</div><div class='add'>+			       (void *)&amp;init_fpstate.xsave + offset,</div><div class='add'>+			       size);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		xfeatures &gt;&gt;= 1;</div><div class='add'>+		feature_bit++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable the extended processor state save/restore feature.</div><div class='add'>+ * Called once per CPU onlining.</div><div class='add'>+ */</div><div class='add'>+void fpu__init_cpu_xstate(void)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_has_xsave || !xfeatures_mask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cr4_set_bits(X86_CR4_OSXSAVE);</div><div class='add'>+	xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Record the offsets and sizes of various xstates contained</div><div class='add'>+ * in the XSAVE state memory layout.</div><div class='add'>+ *</div><div class='add'>+ * ( Note that certain features might be non-present, for them</div><div class='add'>+ *   we'll have 0 offset and 0 size. )</div><div class='add'>+ */</div><div class='add'>+static void __init setup_xstate_features(void)</div><div class='add'>+{</div><div class='add'>+	u32 eax, ebx, ecx, edx, leaf;</div><div class='add'>+</div><div class='add'>+	xfeatures_nr = fls64(xfeatures_mask);</div><div class='add'>+</div><div class='add'>+	for (leaf = 2; leaf &lt; xfeatures_nr; leaf++) {</div><div class='add'>+		cpuid_count(XSTATE_CPUID, leaf, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+</div><div class='add'>+		xstate_offsets[leaf] = ebx;</div><div class='add'>+		xstate_sizes[leaf] = eax;</div><div class='add'>+</div><div class='add'>+		printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %04x, xstate_sizes[%d]: %04x\n", leaf, ebx, leaf, eax);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init print_xstate_feature(u64 xstate_mask)</div><div class='add'>+{</div><div class='add'>+	const char *feature_name;</div><div class='add'>+</div><div class='add'>+	if (cpu_has_xfeatures(xstate_mask, &amp;feature_name))</div><div class='add'>+		pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print out all the supported xstate features:</div><div class='add'>+ */</div><div class='add'>+static void __init print_xstate_features(void)</div><div class='add'>+{</div><div class='add'>+	print_xstate_feature(XSTATE_FP);</div><div class='add'>+	print_xstate_feature(XSTATE_SSE);</div><div class='add'>+	print_xstate_feature(XSTATE_YMM);</div><div class='add'>+	print_xstate_feature(XSTATE_BNDREGS);</div><div class='add'>+	print_xstate_feature(XSTATE_BNDCSR);</div><div class='add'>+	print_xstate_feature(XSTATE_OPMASK);</div><div class='add'>+	print_xstate_feature(XSTATE_ZMM_Hi256);</div><div class='add'>+	print_xstate_feature(XSTATE_Hi16_ZMM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function sets up offsets and sizes of all extended states in</div><div class='add'>+ * xsave area. This supports both standard format and compacted format</div><div class='add'>+ * of the xsave aread.</div><div class='add'>+ */</div><div class='add'>+static void __init setup_xstate_comp(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The FP xstates and SSE xstates are legacy states. They are always</div><div class='add'>+	 * in the fixed offsets in the xsave area in either compacted form</div><div class='add'>+	 * or standard form.</div><div class='add'>+	 */</div><div class='add'>+	xstate_comp_offsets[0] = 0;</div><div class='add'>+	xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsaves) {</div><div class='add'>+		for (i = 2; i &lt; xfeatures_nr; i++) {</div><div class='add'>+			if (test_bit(i, (unsigned long *)&amp;xfeatures_mask)) {</div><div class='add'>+				xstate_comp_offsets[i] = xstate_offsets[i];</div><div class='add'>+				xstate_comp_sizes[i] = xstate_sizes[i];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;</div><div class='add'>+</div><div class='add'>+	for (i = 2; i &lt; xfeatures_nr; i++) {</div><div class='add'>+		if (test_bit(i, (unsigned long *)&amp;xfeatures_mask))</div><div class='add'>+			xstate_comp_sizes[i] = xstate_sizes[i];</div><div class='add'>+		else</div><div class='add'>+			xstate_comp_sizes[i] = 0;</div><div class='add'>+</div><div class='add'>+		if (i &gt; 2)</div><div class='add'>+			xstate_comp_offsets[i] = xstate_comp_offsets[i-1]</div><div class='add'>+					+ xstate_comp_sizes[i-1];</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * setup the xstate image representing the init state</div><div class='add'>+ */</div><div class='add'>+static void __init setup_init_fpu_buf(void)</div><div class='add'>+{</div><div class='add'>+	static int on_boot_cpu = 1;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(!on_boot_cpu);</div><div class='add'>+	on_boot_cpu = 0;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsave)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	setup_xstate_features();</div><div class='add'>+	print_xstate_features();</div><div class='add'>+</div><div class='add'>+	if (cpu_has_xsaves) {</div><div class='add'>+		init_fpstate.xsave.header.xcomp_bv = (u64)1 &lt;&lt; 63 | xfeatures_mask;</div><div class='add'>+		init_fpstate.xsave.header.xfeatures = xfeatures_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Init all the features state with header_bv being 0x0</div><div class='add'>+	 */</div><div class='add'>+	copy_kernel_to_xregs_booting(&amp;init_fpstate.xsave);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dump the init state again. This is to identify the init state</div><div class='add'>+	 * of any feature which is not represented by all zero's.</div><div class='add'>+	 */</div><div class='add'>+	copy_xregs_to_kernel_booting(&amp;init_fpstate.xsave);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calculate total size of enabled xstates in XCR0/xfeatures_mask.</div><div class='add'>+ */</div><div class='add'>+static void __init init_xstate_size(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int eax, ebx, ecx, edx;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsaves) {</div><div class='add'>+		cpuid_count(XSTATE_CPUID, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+		xstate_size = ebx;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;</div><div class='add'>+	for (i = 2; i &lt; 64; i++) {</div><div class='add'>+		if (test_bit(i, (unsigned long *)&amp;xfeatures_mask)) {</div><div class='add'>+			cpuid_count(XSTATE_CPUID, i, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+			xstate_size += eax;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable and initialize the xsave feature.</div><div class='add'>+ * Called once per system bootup.</div><div class='add'>+ */</div><div class='add'>+void __init fpu__init_system_xstate(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int eax, ebx, ecx, edx;</div><div class='add'>+	static int on_boot_cpu = 1;</div><div class='add'>+</div><div class='add'>+	WARN_ON_FPU(!on_boot_cpu);</div><div class='add'>+	on_boot_cpu = 0;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_xsave) {</div><div class='add'>+		pr_info("x86/fpu: Legacy x87 FPU detected.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_data.cpuid_level &lt; XSTATE_CPUID) {</div><div class='add'>+		WARN_ON_FPU(1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuid_count(XSTATE_CPUID, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	xfeatures_mask = eax + ((u64)edx &lt;&lt; 32);</div><div class='add'>+</div><div class='add'>+	if ((xfeatures_mask &amp; XSTATE_FPSSE) != XSTATE_FPSSE) {</div><div class='add'>+		pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Support only the state known to the OS: */</div><div class='add'>+	xfeatures_mask = xfeatures_mask &amp; XCNTXT_MASK;</div><div class='add'>+</div><div class='add'>+	/* Enable xstate instructions to be able to continue with initialization: */</div><div class='add'>+	fpu__init_cpu_xstate();</div><div class='add'>+</div><div class='add'>+	/* Recompute the context size for enabled features: */</div><div class='add'>+	init_xstate_size();</div><div class='add'>+</div><div class='add'>+	update_regset_xstate_info(xstate_size, xfeatures_mask);</div><div class='add'>+	fpu__init_prepare_fx_sw_frame();</div><div class='add'>+	setup_init_fpu_buf();</div><div class='add'>+	setup_xstate_comp();</div><div class='add'>+</div><div class='add'>+	pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",</div><div class='add'>+		xfeatures_mask,</div><div class='add'>+		xstate_size,</div><div class='add'>+		cpu_has_xsaves ? "compacted" : "standard");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore minimal FPU state after suspend:</div><div class='add'>+ */</div><div class='add'>+void fpu__resume_cpu(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Restore XCR0 on xsave capable CPUs:</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_has_xsave)</div><div class='add'>+		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Given the xsave area and a state inside, this function returns the</div><div class='add'>+ * address of the state.</div><div class='add'>+ *</div><div class='add'>+ * This is the API that is called to get xstate address in either</div><div class='add'>+ * standard format or compacted format of xsave area.</div><div class='add'>+ *</div><div class='add'>+ * Note that if there is no data for the field in the xsave buffer</div><div class='add'>+ * this will return NULL.</div><div class='add'>+ *</div><div class='add'>+ * Inputs:</div><div class='add'>+ *	xstate: the thread's storage area for all FPU data</div><div class='add'>+ *	xstate_feature: state which is defined in xsave.h (e.g.</div><div class='add'>+ *	XSTATE_FP, XSTATE_SSE, etc...)</div><div class='add'>+ * Output:</div><div class='add'>+ *	address of the state in the xsave area, or NULL if the</div><div class='add'>+ *	field is not present in the xsave buffer.</div><div class='add'>+ */</div><div class='add'>+void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)</div><div class='add'>+{</div><div class='add'>+	int feature_nr = fls64(xstate_feature) - 1;</div><div class='add'>+	/*</div><div class='add'>+	 * Do we even *have* xsave state?</div><div class='add'>+	 */</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_XSAVE))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	xsave = &amp;current-&gt;thread.fpu.state.xsave;</div><div class='add'>+	/*</div><div class='add'>+	 * We should not ever be requesting features that we</div><div class='add'>+	 * have not enabled.  Remember that pcntxt_mask is</div><div class='add'>+	 * what we write to the XCR0 register.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ONCE(!(xfeatures_mask &amp; xstate_feature),</div><div class='add'>+		  "get of unsupported state");</div><div class='add'>+	/*</div><div class='add'>+	 * This assumes the last 'xsave*' instruction to</div><div class='add'>+	 * have requested that 'xstate_feature' be saved.</div><div class='add'>+	 * If it did not, we might be seeing and old value</div><div class='add'>+	 * of the field in the buffer.</div><div class='add'>+	 *</div><div class='add'>+	 * This can happen because the last 'xsave' did not</div><div class='add'>+	 * request that this feature be saved (unlikely)</div><div class='add'>+	 * or because the "init optimization" caused it</div><div class='add'>+	 * to not be saved.</div><div class='add'>+	 */</div><div class='add'>+	if (!(xsave-&gt;header.xfeatures &amp; xstate_feature))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return (void *)xsave + xstate_comp_offsets[feature_nr];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(get_xsave_addr);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This wraps up the common operations that need to occur when retrieving</div><div class='add'>+ * data from xsave state.  It first ensures that the current task was</div><div class='add'>+ * using the FPU and retrieves the data in to a buffer.  It then calculates</div><div class='add'>+ * the offset of the requested field in the buffer.</div><div class='add'>+ *</div><div class='add'>+ * This function is safe to call whether the FPU is in use or not.</div><div class='add'>+ *</div><div class='add'>+ * Note that this only works on the current task.</div><div class='add'>+ *</div><div class='add'>+ * Inputs:</div><div class='add'>+ *	@xsave_state: state which is defined in xsave.h (e.g. XSTATE_FP,</div><div class='add'>+ *	XSTATE_SSE, etc...)</div><div class='add'>+ * Output:</div><div class='add'>+ *	address of the state in the xsave area or NULL if the state</div><div class='add'>+ *	is not present or is in its 'init state'.</div><div class='add'>+ */</div><div class='add'>+const void *get_xsave_field_ptr(int xsave_state)</div><div class='add'>+{</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+</div><div class='add'>+	if (!fpu-&gt;fpstate_active)</div><div class='add'>+		return NULL;</div><div class='add'>+	/*</div><div class='add'>+	 * fpu__save() takes the CPU's xstate registers</div><div class='add'>+	 * and saves them off to the 'fpu memory buffer.</div><div class='add'>+	 */</div><div class='add'>+	fpu__save(fpu);</div><div class='add'>+</div><div class='add'>+	return get_xsave_addr(&amp;fpu-&gt;state.xsave, xsave_state);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c<br/>index 5a4668136e98..f129a9af6357 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/head64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head64.c</a></div><div class='hunk'>@@ -161,11 +161,12 @@ asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)</div><div class='ctx'> 	/* Kill off the identity-map trampoline */</div><div class='ctx'> 	reset_early_page_tables();</div><div class='ctx'> </div><div class='del'>-	kasan_map_early_shadow(early_level4_pgt);</div><div class='del'>-</div><div class='del'>-	/* clear bss before set_intr_gate with early_idt_handler */</div><div class='ctx'> 	clear_bss();</div><div class='ctx'> </div><div class='add'>+	clear_page(init_level4_pgt);</div><div class='add'>+</div><div class='add'>+	kasan_early_init();</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; NUM_EXCEPTION_VECTORS; i++)</div><div class='ctx'> 		set_intr_gate(i, early_idt_handler_array[i]);</div><div class='ctx'> 	load_idt((const struct desc_ptr *)&amp;idt_descr);</div><div class='hunk'>@@ -177,12 +178,9 @@ asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)</div><div class='ctx'> 	 */</div><div class='ctx'> 	load_ucode_bsp();</div><div class='ctx'> </div><div class='del'>-	clear_page(init_level4_pgt);</div><div class='ctx'> 	/* set init_level4_pgt kernel high mapping*/</div><div class='ctx'> 	init_level4_pgt[511] = early_level4_pgt[511];</div><div class='ctx'> </div><div class='del'>-	kasan_map_early_shadow(init_level4_pgt);</div><div class='del'>-</div><div class='ctx'> 	x86_64_start_reservations(real_mode_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S<br/>index 53eeb226657c..0e2d96ffd158 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/head_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head_32.S</a></div><div class='hunk'>@@ -62,9 +62,16 @@</div><div class='ctx'> #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* Number of possible pages in the lowmem region */</div><div class='del'>-LOWMEM_PAGES = (((1&lt;&lt;32) - __PAGE_OFFSET) &gt;&gt; PAGE_SHIFT)</div><div class='del'>-	</div><div class='add'>+/*</div><div class='add'>+ * Number of possible pages in the lowmem region.</div><div class='add'>+ *</div><div class='add'>+ * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a</div><div class='add'>+ * gas warning about overflowing shift count when gas has been compiled</div><div class='add'>+ * with only a host target support using a 32-bit type for internal</div><div class='add'>+ * representation.</div><div class='add'>+ */</div><div class='add'>+LOWMEM_PAGES = (((2&lt;&lt;31) - __PAGE_OFFSET) &gt;&gt; PAGE_SHIFT)</div><div class='add'>+</div><div class='ctx'> /* Enough space to fit pagetables for the low memory linear map */</div><div class='ctx'> MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) &lt;&lt; PAGE_SHIFT</div><div class='ctx'> </div><div class='hunk'>@@ -550,7 +557,7 @@ early_idt_handler_common:</div><div class='ctx'> 	cld</div><div class='ctx'> </div><div class='ctx'> 	cmpl $2,(%esp)		# X86_TRAP_NMI</div><div class='del'>-	je is_nmi		# Ignore NMI</div><div class='add'>+	je .Lis_nmi		# Ignore NMI</div><div class='ctx'> </div><div class='ctx'> 	cmpl $2,%ss:early_recursion_flag</div><div class='ctx'> 	je hlt_loop</div><div class='hunk'>@@ -603,7 +610,7 @@ ex_entry:</div><div class='ctx'> 	pop %ecx</div><div class='ctx'> 	pop %eax</div><div class='ctx'> 	decl %ss:early_recursion_flag</div><div class='del'>-is_nmi:</div><div class='add'>+.Lis_nmi:</div><div class='ctx'> 	addl $8,%esp		/* drop vector number and error code */</div><div class='ctx'> 	iret</div><div class='ctx'> ENDPROC(early_idt_handler_common)</div><div class='head'>diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S<br/>index df7e78057ae0..1d40ca8a73f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/head_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/head_64.S</a></div><div class='hunk'>@@ -346,7 +346,7 @@ early_idt_handler_common:</div><div class='ctx'> 	cld</div><div class='ctx'> </div><div class='ctx'> 	cmpl $2,(%rsp)		# X86_TRAP_NMI</div><div class='del'>-	je is_nmi		# Ignore NMI</div><div class='add'>+	je .Lis_nmi		# Ignore NMI</div><div class='ctx'> </div><div class='ctx'> 	cmpl $2,early_recursion_flag(%rip)</div><div class='ctx'> 	jz  1f</div><div class='hunk'>@@ -411,7 +411,7 @@ early_idt_handler_common:</div><div class='ctx'> 	popq %rcx</div><div class='ctx'> 	popq %rax</div><div class='ctx'> 	decl early_recursion_flag(%rip)</div><div class='del'>-is_nmi:</div><div class='add'>+.Lis_nmi:</div><div class='ctx'> 	addq $16,%rsp		# drop vector number and error code</div><div class='ctx'> 	INTERRUPT_RETURN</div><div class='ctx'> ENDPROC(early_idt_handler_common)</div><div class='hunk'>@@ -516,38 +516,9 @@ ENTRY(phys_base)</div><div class='ctx'> 	/* This must match the first entry in level2_kernel_pgt */</div><div class='ctx'> 	.quad   0x0000000000000000</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KASAN</div><div class='del'>-#define FILL(VAL, COUNT)				\</div><div class='del'>-	.rept (COUNT) ;					\</div><div class='del'>-	.quad	(VAL) ;					\</div><div class='del'>-	.endr</div><div class='del'>-</div><div class='del'>-NEXT_PAGE(kasan_zero_pte)</div><div class='del'>-	FILL(kasan_zero_page - __START_KERNEL_map + _KERNPG_TABLE, 512)</div><div class='del'>-NEXT_PAGE(kasan_zero_pmd)</div><div class='del'>-	FILL(kasan_zero_pte - __START_KERNEL_map + _KERNPG_TABLE, 512)</div><div class='del'>-NEXT_PAGE(kasan_zero_pud)</div><div class='del'>-	FILL(kasan_zero_pmd - __START_KERNEL_map + _KERNPG_TABLE, 512)</div><div class='del'>-</div><div class='del'>-#undef FILL</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #include "../../x86/xen/xen-head.S"</div><div class='ctx'> 	</div><div class='ctx'> 	__PAGE_ALIGNED_BSS</div><div class='ctx'> NEXT_PAGE(empty_zero_page)</div><div class='ctx'> 	.skip PAGE_SIZE</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KASAN</div><div class='del'>-/*</div><div class='del'>- * This page used as early shadow. We don't use empty_zero_page</div><div class='del'>- * at early stages, stack instrumentation could write some garbage</div><div class='del'>- * to this page.</div><div class='del'>- * Latter we reuse it as zero shadow for large ranges of memory</div><div class='del'>- * that allowed to access, but not instrumented by kasan</div><div class='del'>- * (vmalloc/vmemmap ...).</div><div class='del'>- */</div><div class='del'>-NEXT_PAGE(kasan_zero_page)</div><div class='del'>-	.skip PAGE_SIZE</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c<br/>index 3acbff4716b0..10757d0a3fcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/hpet.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/hpet.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/hpet.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/hpet.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='hunk'>@@ -305,8 +306,6 @@ static void hpet_legacy_clockevent_register(void)</div><div class='ctx'> 	printk(KERN_DEBUG "hpet clockevent registered\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hpet_setup_msi_irq(unsigned int irq);</div><div class='del'>-</div><div class='ctx'> static void hpet_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 			  struct clock_event_device *evt, int timer)</div><div class='ctx'> {</div><div class='hunk'>@@ -357,7 +356,7 @@ static void hpet_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 			hpet_enable_legacy_int();</div><div class='ctx'> 		} else {</div><div class='ctx'> 			struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);</div><div class='del'>-			hpet_setup_msi_irq(hdev-&gt;irq);</div><div class='add'>+			irq_domain_activate_irq(irq_get_irq_data(hdev-&gt;irq));</div><div class='ctx'> 			disable_irq(hdev-&gt;irq);</div><div class='ctx'> 			irq_set_affinity(hdev-&gt;irq, cpumask_of(hdev-&gt;cpu));</div><div class='ctx'> 			enable_irq(hdev-&gt;irq);</div><div class='hunk'>@@ -423,6 +422,7 @@ static int hpet_legacy_next_event(unsigned long delta,</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);</div><div class='ctx'> static struct hpet_dev	*hpet_devs;</div><div class='add'>+static struct irq_domain *hpet_domain;</div><div class='ctx'> </div><div class='ctx'> void hpet_msi_unmask(struct irq_data *data)</div><div class='ctx'> {</div><div class='hunk'>@@ -473,31 +473,6 @@ static int hpet_msi_next_event(unsigned long delta,</div><div class='ctx'> 	return hpet_next_event(delta, evt, hdev-&gt;num);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hpet_setup_msi_irq(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	if (x86_msi.setup_hpet_msi(irq, hpet_blockid)) {</div><div class='del'>-		irq_free_hwirq(irq);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hpet_assign_irq(struct hpet_dev *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = irq_alloc_hwirq(-1);</div><div class='del'>-</div><div class='del'>-	if (!irq)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	irq_set_handler_data(irq, dev);</div><div class='del'>-</div><div class='del'>-	if (hpet_setup_msi_irq(irq))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static irqreturn_t hpet_interrupt_handler(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hpet_dev *dev = (struct hpet_dev *)data;</div><div class='hunk'>@@ -540,9 +515,6 @@ static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)</div><div class='ctx'> 	if (!(hdev-&gt;flags &amp; HPET_DEV_VALID))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (hpet_setup_msi_irq(hdev-&gt;irq))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	hdev-&gt;cpu = cpu;</div><div class='ctx'> 	per_cpu(cpu_hpet_dev, cpu) = hdev;</div><div class='ctx'> 	evt-&gt;name = hdev-&gt;name;</div><div class='hunk'>@@ -574,7 +546,7 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)</div><div class='ctx'> 	unsigned int id;</div><div class='ctx'> 	unsigned int num_timers;</div><div class='ctx'> 	unsigned int num_timers_used = 0;</div><div class='del'>-	int i;</div><div class='add'>+	int i, irq;</div><div class='ctx'> </div><div class='ctx'> 	if (hpet_msi_disable)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -587,6 +559,10 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)</div><div class='ctx'> 	num_timers++; /* Value read out starts from 0 */</div><div class='ctx'> 	hpet_print_config();</div><div class='ctx'> </div><div class='add'>+	hpet_domain = hpet_create_irq_domain(hpet_blockid);</div><div class='add'>+	if (!hpet_domain)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);</div><div class='ctx'> 	if (!hpet_devs)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -604,12 +580,14 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)</div><div class='ctx'> 		hdev-&gt;flags = 0;</div><div class='ctx'> 		if (cfg &amp; HPET_TN_PERIODIC_CAP)</div><div class='ctx'> 			hdev-&gt;flags |= HPET_DEV_PERI_CAP;</div><div class='add'>+		sprintf(hdev-&gt;name, "hpet%d", i);</div><div class='ctx'> 		hdev-&gt;num = i;</div><div class='ctx'> </div><div class='del'>-		sprintf(hdev-&gt;name, "hpet%d", i);</div><div class='del'>-		if (hpet_assign_irq(hdev))</div><div class='add'>+		irq = hpet_assign_irq(hpet_domain, hdev, hdev-&gt;num);</div><div class='add'>+		if (irq &lt;= 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		hdev-&gt;irq = irq;</div><div class='ctx'> 		hdev-&gt;flags |= HPET_DEV_FSB_CAP;</div><div class='ctx'> 		hdev-&gt;flags |= HPET_DEV_VALID;</div><div class='ctx'> 		num_timers_used++;</div><div class='hunk'>@@ -709,10 +687,6 @@ static int hpet_cpuhp_notify(struct notifier_block *n,</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static int hpet_setup_msi_irq(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> static void hpet_msi_capability_lookup(unsigned int start_timer)</div><div class='ctx'> {</div><div class='ctx'> 	return;</div><div class='head'>diff --git a/arch/x86/kernel/i386_ksyms_32.c b/arch/x86/kernel/i386_ksyms_32.c<br/>index 05fd74f537d6..64341aa485ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/i386_ksyms_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/i386_ksyms_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/i386_ksyms_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/i386_ksyms_32.c</a></div><div class='hunk'>@@ -40,7 +40,5 @@ EXPORT_SYMBOL(empty_zero_page);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> EXPORT_SYMBOL(___preempt_schedule);</div><div class='del'>-#ifdef CONFIG_CONTEXT_TRACKING</div><div class='del'>-EXPORT_SYMBOL(___preempt_schedule_context);</div><div class='del'>-#endif</div><div class='add'>+EXPORT_SYMBOL(___preempt_schedule_notrace);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c<br/>deleted file mode 100644<br/>index 6185d3141219..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/i387.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/i387.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,671 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 1994 Linus Torvalds</div><div class='del'>- *</div><div class='del'>- *  Pentium III FXSR, SSE support</div><div class='del'>- *  General FPU state handling cleanups</div><div class='del'>- *	Gareth Hughes &lt;gareth@valinux.com&gt;, May 2000</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/regset.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sigcontext.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/math_emu.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='del'>-#include &lt;asm/user.h&gt;</div><div class='del'>-</div><div class='del'>-static DEFINE_PER_CPU(bool, in_kernel_fpu);</div><div class='del'>-</div><div class='del'>-void kernel_fpu_disable(void)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(this_cpu_read(in_kernel_fpu));</div><div class='del'>-	this_cpu_write(in_kernel_fpu, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kernel_fpu_enable(void)</div><div class='del'>-{</div><div class='del'>-	this_cpu_write(in_kernel_fpu, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Were we in an interrupt that interrupted kernel mode?</div><div class='del'>- *</div><div class='del'>- * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that</div><div class='del'>- * pair does nothing at all: the thread must not have fpu (so</div><div class='del'>- * that we don't try to save the FPU state), and TS must</div><div class='del'>- * be set (so that the clts/stts pair does nothing that is</div><div class='del'>- * visible in the interrupted kernel thread).</div><div class='del'>- *</div><div class='del'>- * Except for the eagerfpu case when we return true; in the likely case</div><div class='del'>- * the thread has FPU but we are not going to set/clear TS.</div><div class='del'>- */</div><div class='del'>-static inline bool interrupted_kernel_fpu_idle(void)</div><div class='del'>-{</div><div class='del'>-	if (this_cpu_read(in_kernel_fpu))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (use_eager_fpu())</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return !__thread_has_fpu(current) &amp;&amp;</div><div class='del'>-		(read_cr0() &amp; X86_CR0_TS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Were we in user mode (or vm86 mode) when we were</div><div class='del'>- * interrupted?</div><div class='del'>- *</div><div class='del'>- * Doing kernel_fpu_begin/end() is ok if we are running</div><div class='del'>- * in an interrupt context from user mode - we'll just</div><div class='del'>- * save the FPU state as required.</div><div class='del'>- */</div><div class='del'>-static inline bool interrupted_user_mode(void)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = get_irq_regs();</div><div class='del'>-	return regs &amp;&amp; user_mode(regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Can we use the FPU in kernel mode with the</div><div class='del'>- * whole "kernel_fpu_begin/end()" sequence?</div><div class='del'>- *</div><div class='del'>- * It's always ok in process context (ie "not interrupt")</div><div class='del'>- * but it is sometimes ok even from an irq.</div><div class='del'>- */</div><div class='del'>-bool irq_fpu_usable(void)</div><div class='del'>-{</div><div class='del'>-	return !in_interrupt() ||</div><div class='del'>-		interrupted_user_mode() ||</div><div class='del'>-		interrupted_kernel_fpu_idle();</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(irq_fpu_usable);</div><div class='del'>-</div><div class='del'>-void __kernel_fpu_begin(void)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *me = current;</div><div class='del'>-</div><div class='del'>-	this_cpu_write(in_kernel_fpu, true);</div><div class='del'>-</div><div class='del'>-	if (__thread_has_fpu(me)) {</div><div class='del'>-		__save_init_fpu(me);</div><div class='del'>-	} else {</div><div class='del'>-		this_cpu_write(fpu_owner_task, NULL);</div><div class='del'>-		if (!use_eager_fpu())</div><div class='del'>-			clts();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__kernel_fpu_begin);</div><div class='del'>-</div><div class='del'>-void __kernel_fpu_end(void)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *me = current;</div><div class='del'>-</div><div class='del'>-	if (__thread_has_fpu(me)) {</div><div class='del'>-		if (WARN_ON(restore_fpu_checking(me)))</div><div class='del'>-			fpu_reset_state(me);</div><div class='del'>-	} else if (!use_eager_fpu()) {</div><div class='del'>-		stts();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	this_cpu_write(in_kernel_fpu, false);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__kernel_fpu_end);</div><div class='del'>-</div><div class='del'>-void unlazy_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	if (__thread_has_fpu(tsk)) {</div><div class='del'>-		if (use_eager_fpu()) {</div><div class='del'>-			__save_fpu(tsk);</div><div class='del'>-		} else {</div><div class='del'>-			__save_init_fpu(tsk);</div><div class='del'>-			__thread_fpu_end(tsk);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(unlazy_fpu);</div><div class='del'>-</div><div class='del'>-unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;</div><div class='del'>-unsigned int xstate_size;</div><div class='del'>-EXPORT_SYMBOL_GPL(xstate_size);</div><div class='del'>-static struct i387_fxsave_struct fx_scratch;</div><div class='del'>-</div><div class='del'>-static void mxcsr_feature_mask_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = 0;</div><div class='del'>-</div><div class='del'>-	if (cpu_has_fxsr) {</div><div class='del'>-		memset(&amp;fx_scratch, 0, sizeof(struct i387_fxsave_struct));</div><div class='del'>-		asm volatile("fxsave %0" : "+m" (fx_scratch));</div><div class='del'>-		mask = fx_scratch.mxcsr_mask;</div><div class='del'>-		if (mask == 0)</div><div class='del'>-			mask = 0x0000ffbf;</div><div class='del'>-	}</div><div class='del'>-	mxcsr_feature_mask &amp;= mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void init_thread_xstate(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Note that xstate_size might be overwriten later during</div><div class='del'>-	 * xsave_init().</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_fpu) {</div><div class='del'>-		/*</div><div class='del'>-		 * Disable xsave as we do not support it if i387</div><div class='del'>-		 * emulation is enabled.</div><div class='del'>-		 */</div><div class='del'>-		setup_clear_cpu_cap(X86_FEATURE_XSAVE);</div><div class='del'>-		setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);</div><div class='del'>-		xstate_size = sizeof(struct i387_soft_struct);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cpu_has_fxsr)</div><div class='del'>-		xstate_size = sizeof(struct i387_fxsave_struct);</div><div class='del'>-	else</div><div class='del'>-		xstate_size = sizeof(struct i387_fsave_struct);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Quirk: we don't yet handle the XSAVES* instructions</div><div class='del'>-	 * correctly, as we don't correctly convert between</div><div class='del'>-	 * standard and compacted format when interfacing</div><div class='del'>-	 * with user-space - so disable it for now.</div><div class='del'>-	 *</div><div class='del'>-	 * The difference is small: with recent CPUs the</div><div class='del'>-	 * compacted format is only marginally smaller than</div><div class='del'>-	 * the standard FPU state format.</div><div class='del'>-	 *</div><div class='del'>-	 * ( This is easy to backport while we are fixing</div><div class='del'>-	 *   XSAVES* support. )</div><div class='del'>-	 */</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_XSAVES);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called at bootup to set up the initial FPU state that is later cloned</div><div class='del'>- * into all processes.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void fpu_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long cr0;</div><div class='del'>-	unsigned long cr4_mask = 0;</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_MATH_EMULATION</div><div class='del'>-	if (!cpu_has_fpu) {</div><div class='del'>-		pr_emerg("No FPU found and no math emulation present\n");</div><div class='del'>-		pr_emerg("Giving up\n");</div><div class='del'>-		for (;;)</div><div class='del'>-			asm volatile("hlt");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	if (cpu_has_fxsr)</div><div class='del'>-		cr4_mask |= X86_CR4_OSFXSR;</div><div class='del'>-	if (cpu_has_xmm)</div><div class='del'>-		cr4_mask |= X86_CR4_OSXMMEXCPT;</div><div class='del'>-	if (cr4_mask)</div><div class='del'>-		cr4_set_bits(cr4_mask);</div><div class='del'>-</div><div class='del'>-	cr0 = read_cr0();</div><div class='del'>-	cr0 &amp;= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */</div><div class='del'>-	if (!cpu_has_fpu)</div><div class='del'>-		cr0 |= X86_CR0_EM;</div><div class='del'>-	write_cr0(cr0);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * init_thread_xstate is only called once to avoid overriding</div><div class='del'>-	 * xstate_size during boot time or during CPU hotplug.</div><div class='del'>-	 */</div><div class='del'>-	if (xstate_size == 0)</div><div class='del'>-		init_thread_xstate();</div><div class='del'>-</div><div class='del'>-	mxcsr_feature_mask_init();</div><div class='del'>-	xsave_init();</div><div class='del'>-	eager_fpu_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void fpu_finit(struct fpu *fpu)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_fpu) {</div><div class='del'>-		finit_soft_fpu(&amp;fpu-&gt;state-&gt;soft);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(fpu-&gt;state, 0, xstate_size);</div><div class='del'>-</div><div class='del'>-	if (cpu_has_fxsr) {</div><div class='del'>-		fx_finit(&amp;fpu-&gt;state-&gt;fxsave);</div><div class='del'>-	} else {</div><div class='del'>-		struct i387_fsave_struct *fp = &amp;fpu-&gt;state-&gt;fsave;</div><div class='del'>-		fp-&gt;cwd = 0xffff037fu;</div><div class='del'>-		fp-&gt;swd = 0xffff0000u;</div><div class='del'>-		fp-&gt;twd = 0xffffffffu;</div><div class='del'>-		fp-&gt;fos = 0xffff0000u;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(fpu_finit);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The _current_ task is using the FPU for the first time</div><div class='del'>- * so initialize it and set the mxcsr to its default</div><div class='del'>- * value at reset if we support XMM instructions and then</div><div class='del'>- * remember the current task has used the FPU.</div><div class='del'>- */</div><div class='del'>-int init_fpu(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (tsk_used_math(tsk)) {</div><div class='del'>-		if (cpu_has_fpu &amp;&amp; tsk == current)</div><div class='del'>-			unlazy_fpu(tsk);</div><div class='del'>-		task_disable_lazy_fpu_restore(tsk);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Memory allocation at the first usage of the FPU and other state.</div><div class='del'>-	 */</div><div class='del'>-	ret = fpu_alloc(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	fpu_finit(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-</div><div class='del'>-	set_stopped_child_used_math(tsk);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(init_fpu);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The xstateregs_active() routine is the same as the fpregs_active() routine,</div><div class='del'>- * as the "regset-&gt;n" for the xstate regset will be updated based on the feature</div><div class='del'>- * capabilites supported by the xsave.</div><div class='del'>- */</div><div class='del'>-int fpregs_active(struct task_struct *target, const struct user_regset *regset)</div><div class='del'>-{</div><div class='del'>-	return tsk_used_math(target) ? regset-&gt;n : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int xfpregs_active(struct task_struct *target, const struct user_regset *regset)</div><div class='del'>-{</div><div class='del'>-	return (cpu_has_fxsr &amp;&amp; tsk_used_math(target)) ? regset-&gt;n : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int xfpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-		unsigned int pos, unsigned int count,</div><div class='del'>-		void *kbuf, void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_fxsr)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	sanitize_i387_state(target);</div><div class='del'>-</div><div class='del'>-	return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='del'>-				   &amp;target-&gt;thread.fpu.state-&gt;fxsave, 0, -1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int xfpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-		unsigned int pos, unsigned int count,</div><div class='del'>-		const void *kbuf, const void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_fxsr)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	sanitize_i387_state(target);</div><div class='del'>-</div><div class='del'>-	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='del'>-				 &amp;target-&gt;thread.fpu.state-&gt;fxsave, 0, -1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * mxcsr reserved bits must be masked to zero for security reasons.</div><div class='del'>-	 */</div><div class='del'>-	target-&gt;thread.fpu.state-&gt;fxsave.mxcsr &amp;= mxcsr_feature_mask;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * update the header bits in the xsave header, indicating the</div><div class='del'>-	 * presence of FP and SSE state.</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_has_xsave)</div><div class='del'>-		target-&gt;thread.fpu.state-&gt;xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int xstateregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-		unsigned int pos, unsigned int count,</div><div class='del'>-		void *kbuf, void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	struct xsave_struct *xsave;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsave)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	xsave = &amp;target-&gt;thread.fpu.state-&gt;xsave;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the 48bytes defined by the software first into the xstate</div><div class='del'>-	 * memory layout in the thread struct, so that we can copy the entire</div><div class='del'>-	 * xstateregs to the user using one user_regset_copyout().</div><div class='del'>-	 */</div><div class='del'>-	memcpy(&amp;xsave-&gt;i387.sw_reserved,</div><div class='del'>-		xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the xstate memory layout.</div><div class='del'>-	 */</div><div class='del'>-	ret = user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, xsave, 0, -1);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int xstateregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-		  unsigned int pos, unsigned int count,</div><div class='del'>-		  const void *kbuf, const void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	struct xsave_struct *xsave;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsave)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	xsave = &amp;target-&gt;thread.fpu.state-&gt;xsave;</div><div class='del'>-</div><div class='del'>-	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, xsave, 0, -1);</div><div class='del'>-	/*</div><div class='del'>-	 * mxcsr reserved bits must be masked to zero for security reasons.</div><div class='del'>-	 */</div><div class='del'>-	xsave-&gt;i387.mxcsr &amp;= mxcsr_feature_mask;</div><div class='del'>-	xsave-&gt;xsave_hdr.xstate_bv &amp;= pcntxt_mask;</div><div class='del'>-	/*</div><div class='del'>-	 * These bits must be zero.</div><div class='del'>-	 */</div><div class='del'>-	memset(&amp;xsave-&gt;xsave_hdr.reserved, 0, 48);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FPU tag word conversions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline unsigned short twd_i387_to_fxsr(unsigned short twd)</div><div class='del'>-{</div><div class='del'>-	unsigned int tmp; /* to avoid 16 bit prefixes in the code */</div><div class='del'>-</div><div class='del'>-	/* Transform each pair of bits into 01 (valid) or 00 (empty) */</div><div class='del'>-	tmp = ~twd;</div><div class='del'>-	tmp = (tmp | (tmp&gt;&gt;1)) &amp; 0x5555; /* 0V0V0V0V0V0V0V0V */</div><div class='del'>-	/* and move the valid bits to the lower byte. */</div><div class='del'>-	tmp = (tmp | (tmp &gt;&gt; 1)) &amp; 0x3333; /* 00VV00VV00VV00VV */</div><div class='del'>-	tmp = (tmp | (tmp &gt;&gt; 2)) &amp; 0x0f0f; /* 0000VVVV0000VVVV */</div><div class='del'>-	tmp = (tmp | (tmp &gt;&gt; 4)) &amp; 0x00ff; /* 00000000VVVVVVVV */</div><div class='del'>-</div><div class='del'>-	return tmp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define FPREG_ADDR(f, n)	((void *)&amp;(f)-&gt;st_space + (n) * 16)</div><div class='del'>-#define FP_EXP_TAG_VALID	0</div><div class='del'>-#define FP_EXP_TAG_ZERO		1</div><div class='del'>-#define FP_EXP_TAG_SPECIAL	2</div><div class='del'>-#define FP_EXP_TAG_EMPTY	3</div><div class='del'>-</div><div class='del'>-static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)</div><div class='del'>-{</div><div class='del'>-	struct _fpxreg *st;</div><div class='del'>-	u32 tos = (fxsave-&gt;swd &gt;&gt; 11) &amp; 7;</div><div class='del'>-	u32 twd = (unsigned long) fxsave-&gt;twd;</div><div class='del'>-	u32 tag;</div><div class='del'>-	u32 ret = 0xffff0000u;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; i++, twd &gt;&gt;= 1) {</div><div class='del'>-		if (twd &amp; 0x1) {</div><div class='del'>-			st = FPREG_ADDR(fxsave, (i - tos) &amp; 7);</div><div class='del'>-</div><div class='del'>-			switch (st-&gt;exponent &amp; 0x7fff) {</div><div class='del'>-			case 0x7fff:</div><div class='del'>-				tag = FP_EXP_TAG_SPECIAL;</div><div class='del'>-				break;</div><div class='del'>-			case 0x0000:</div><div class='del'>-				if (!st-&gt;significand[0] &amp;&amp;</div><div class='del'>-				    !st-&gt;significand[1] &amp;&amp;</div><div class='del'>-				    !st-&gt;significand[2] &amp;&amp;</div><div class='del'>-				    !st-&gt;significand[3])</div><div class='del'>-					tag = FP_EXP_TAG_ZERO;</div><div class='del'>-				else</div><div class='del'>-					tag = FP_EXP_TAG_SPECIAL;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				if (st-&gt;significand[3] &amp; 0x8000)</div><div class='del'>-					tag = FP_EXP_TAG_VALID;</div><div class='del'>-				else</div><div class='del'>-					tag = FP_EXP_TAG_SPECIAL;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			tag = FP_EXP_TAG_EMPTY;</div><div class='del'>-		}</div><div class='del'>-		ret |= tag &lt;&lt; (2 * i);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FXSR floating point environment conversions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	struct i387_fxsave_struct *fxsave = &amp;tsk-&gt;thread.fpu.state-&gt;fxsave;</div><div class='del'>-	struct _fpreg *to = (struct _fpreg *) &amp;env-&gt;st_space[0];</div><div class='del'>-	struct _fpxreg *from = (struct _fpxreg *) &amp;fxsave-&gt;st_space[0];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	env-&gt;cwd = fxsave-&gt;cwd | 0xffff0000u;</div><div class='del'>-	env-&gt;swd = fxsave-&gt;swd | 0xffff0000u;</div><div class='del'>-	env-&gt;twd = twd_fxsr_to_i387(fxsave);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-	env-&gt;fip = fxsave-&gt;rip;</div><div class='del'>-	env-&gt;foo = fxsave-&gt;rdp;</div><div class='del'>-	/*</div><div class='del'>-	 * should be actually ds/cs at fpu exception time, but</div><div class='del'>-	 * that information is not available in 64bit mode.</div><div class='del'>-	 */</div><div class='del'>-	env-&gt;fcs = task_pt_regs(tsk)-&gt;cs;</div><div class='del'>-	if (tsk == current) {</div><div class='del'>-		savesegment(ds, env-&gt;fos);</div><div class='del'>-	} else {</div><div class='del'>-		env-&gt;fos = tsk-&gt;thread.ds;</div><div class='del'>-	}</div><div class='del'>-	env-&gt;fos |= 0xffff0000;</div><div class='del'>-#else</div><div class='del'>-	env-&gt;fip = fxsave-&gt;fip;</div><div class='del'>-	env-&gt;fcs = (u16) fxsave-&gt;fcs | ((u32) fxsave-&gt;fop &lt;&lt; 16);</div><div class='del'>-	env-&gt;foo = fxsave-&gt;foo;</div><div class='del'>-	env-&gt;fos = fxsave-&gt;fos;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; ++i)</div><div class='del'>-		memcpy(&amp;to[i], &amp;from[i], sizeof(to[0]));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void convert_to_fxsr(struct task_struct *tsk,</div><div class='del'>-		     const struct user_i387_ia32_struct *env)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	struct i387_fxsave_struct *fxsave = &amp;tsk-&gt;thread.fpu.state-&gt;fxsave;</div><div class='del'>-	struct _fpreg *from = (struct _fpreg *) &amp;env-&gt;st_space[0];</div><div class='del'>-	struct _fpxreg *to = (struct _fpxreg *) &amp;fxsave-&gt;st_space[0];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	fxsave-&gt;cwd = env-&gt;cwd;</div><div class='del'>-	fxsave-&gt;swd = env-&gt;swd;</div><div class='del'>-	fxsave-&gt;twd = twd_i387_to_fxsr(env-&gt;twd);</div><div class='del'>-	fxsave-&gt;fop = (u16) ((u32) env-&gt;fcs &gt;&gt; 16);</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-	fxsave-&gt;rip = env-&gt;fip;</div><div class='del'>-	fxsave-&gt;rdp = env-&gt;foo;</div><div class='del'>-	/* cs and ds ignored */</div><div class='del'>-#else</div><div class='del'>-	fxsave-&gt;fip = env-&gt;fip;</div><div class='del'>-	fxsave-&gt;fcs = (env-&gt;fcs &amp; 0xffff);</div><div class='del'>-	fxsave-&gt;foo = env-&gt;foo;</div><div class='del'>-	fxsave-&gt;fos = env-&gt;fos;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; ++i)</div><div class='del'>-		memcpy(&amp;to[i], &amp;from[i], sizeof(from[0]));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int fpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-	       unsigned int pos, unsigned int count,</div><div class='del'>-	       void *kbuf, void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	struct user_i387_ia32_struct env;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='del'>-		return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_fxsr)</div><div class='del'>-		return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='del'>-					   &amp;target-&gt;thread.fpu.state-&gt;fsave, 0,</div><div class='del'>-					   -1);</div><div class='del'>-</div><div class='del'>-	sanitize_i387_state(target);</div><div class='del'>-</div><div class='del'>-	if (kbuf &amp;&amp; pos == 0 &amp;&amp; count == sizeof(env)) {</div><div class='del'>-		convert_from_fxsr(kbuf, target);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	convert_from_fxsr(&amp;env, target);</div><div class='del'>-</div><div class='del'>-	return user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;env, 0, -1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int fpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='del'>-	       unsigned int pos, unsigned int count,</div><div class='del'>-	       const void *kbuf, const void __user *ubuf)</div><div class='del'>-{</div><div class='del'>-	struct user_i387_ia32_struct env;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = init_fpu(target);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	sanitize_i387_state(target);</div><div class='del'>-</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='del'>-		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_fxsr)</div><div class='del'>-		return user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='del'>-					  &amp;target-&gt;thread.fpu.state-&gt;fsave, 0,</div><div class='del'>-					  -1);</div><div class='del'>-</div><div class='del'>-	if (pos &gt; 0 || count &lt; sizeof(env))</div><div class='del'>-		convert_from_fxsr(&amp;env, target);</div><div class='del'>-</div><div class='del'>-	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;env, 0, -1);</div><div class='del'>-	if (!ret)</div><div class='del'>-		convert_to_fxsr(target, &amp;env);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * update the header bit in the xsave header, indicating the</div><div class='del'>-	 * presence of FP.</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_has_xsave)</div><div class='del'>-		target-&gt;thread.fpu.state-&gt;xsave.xsave_hdr.xstate_bv |= XSTATE_FP;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FPU state for core dumps.</div><div class='del'>- * This is only used for a.out dumps now.</div><div class='del'>- * It is declared generically using elf_fpregset_t (which is</div><div class='del'>- * struct user_i387_struct) but is in fact only used for 32-bit</div><div class='del'>- * dumps, so on 64-bit it is really struct user_i387_ia32_struct.</div><div class='del'>- */</div><div class='del'>-int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-	int fpvalid;</div><div class='del'>-</div><div class='del'>-	fpvalid = !!used_math();</div><div class='del'>-	if (fpvalid)</div><div class='del'>-		fpvalid = !fpregs_get(tsk, NULL,</div><div class='del'>-				      0, sizeof(struct user_i387_ia32_struct),</div><div class='del'>-				      fpu, NULL);</div><div class='del'>-</div><div class='del'>-	return fpvalid;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dump_fpu);</div><div class='del'>-</div><div class='del'>-#endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */</div><div class='del'>-</div><div class='del'>-static int __init no_387(char *s)</div><div class='del'>-{</div><div class='del'>-	setup_clear_cpu_cap(X86_FEATURE_FPU);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("no387", no_387);</div><div class='del'>-</div><div class='del'>-void fpu_detect(struct cpuinfo_x86 *c)</div><div class='del'>-{</div><div class='del'>-	unsigned long cr0;</div><div class='del'>-	u16 fsw, fcw;</div><div class='del'>-</div><div class='del'>-	fsw = fcw = 0xffff;</div><div class='del'>-</div><div class='del'>-	cr0 = read_cr0();</div><div class='del'>-	cr0 &amp;= ~(X86_CR0_TS | X86_CR0_EM);</div><div class='del'>-	write_cr0(cr0);</div><div class='del'>-</div><div class='del'>-	asm volatile("fninit ; fnstsw %0 ; fnstcw %1"</div><div class='del'>-		     : "+m" (fsw), "+m" (fcw));</div><div class='del'>-</div><div class='del'>-	if (fsw == 0 &amp;&amp; (fcw &amp; 0x103f) == 0x003f)</div><div class='del'>-		set_cpu_cap(c, X86_FEATURE_FPU);</div><div class='del'>-	else</div><div class='del'>-		clear_cpu_cap(c, X86_FEATURE_FPU);</div><div class='del'>-</div><div class='del'>-	/* The final cr0 value is set in fpu_init() */</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c<br/>index e7cc5370cd2f..16cb827a5b27 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/i8259.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/i8259.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/i8259.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/i8259.c</a></div><div class='hunk'>@@ -329,8 +329,8 @@ static void init_8259A(int auto_eoi)</div><div class='ctx'> 	 */</div><div class='ctx'> 	outb_pic(0x11, PIC_MASTER_CMD);	/* ICW1: select 8259A-1 init */</div><div class='ctx'> </div><div class='del'>-	/* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */</div><div class='del'>-	outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);</div><div class='add'>+	/* ICW2: 8259A-1 IR0-7 mapped to ISA_IRQ_VECTOR(0) */</div><div class='add'>+	outb_pic(ISA_IRQ_VECTOR(0), PIC_MASTER_IMR);</div><div class='ctx'> </div><div class='ctx'> 	/* 8259A-1 (the master) has a slave on IR2 */</div><div class='ctx'> 	outb_pic(1U &lt;&lt; PIC_CASCADE_IR, PIC_MASTER_IMR);</div><div class='hunk'>@@ -342,8 +342,8 @@ static void init_8259A(int auto_eoi)</div><div class='ctx'> </div><div class='ctx'> 	outb_pic(0x11, PIC_SLAVE_CMD);	/* ICW1: select 8259A-2 init */</div><div class='ctx'> </div><div class='del'>-	/* ICW2: 8259A-2 IR0-7 mapped to IRQ8_VECTOR */</div><div class='del'>-	outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR);</div><div class='add'>+	/* ICW2: 8259A-2 IR0-7 mapped to ISA_IRQ_VECTOR(8) */</div><div class='add'>+	outb_pic(ISA_IRQ_VECTOR(8), PIC_SLAVE_IMR);</div><div class='ctx'> 	/* 8259A-2 is a slave on master's IR2 */</div><div class='ctx'> 	outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);</div><div class='ctx'> 	/* (slave's support for AEOI in flat mode is to be investigated) */</div><div class='head'>diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c<br/>index e5952c225532..c7dfe1be784e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq.c</a></div><div class='hunk'>@@ -22,6 +22,12 @@</div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;asm/trace/irq_vectors.h&gt;</div><div class='ctx'> </div><div class='add'>+DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);</div><div class='add'>+EXPORT_PER_CPU_SYMBOL(irq_stat);</div><div class='add'>+</div><div class='add'>+DEFINE_PER_CPU(struct pt_regs *, irq_regs);</div><div class='add'>+EXPORT_PER_CPU_SYMBOL(irq_regs);</div><div class='add'>+</div><div class='ctx'> atomic_t irq_err_count;</div><div class='ctx'> </div><div class='ctx'> /* Function pointer for generic interrupt vector handling */</div><div class='hunk'>@@ -116,6 +122,12 @@ int arch_show_interrupts(struct seq_file *p, int prec)</div><div class='ctx'> 		seq_printf(p, "%10u ", irq_stats(j)-&gt;irq_threshold_count);</div><div class='ctx'> 	seq_puts(p, "  Threshold APIC interrupts\n");</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_X86_MCE_AMD</div><div class='add'>+	seq_printf(p, "%*s: ", prec, "DFR");</div><div class='add'>+	for_each_online_cpu(j)</div><div class='add'>+		seq_printf(p, "%10u ", irq_stats(j)-&gt;irq_deferred_error_count);</div><div class='add'>+	seq_puts(p, "  Deferred Error APIC interrupts\n");</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_X86_MCE</div><div class='ctx'> 	seq_printf(p, "%*s: ", prec, "MCE");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='hunk'>@@ -136,6 +148,18 @@ int arch_show_interrupts(struct seq_file *p, int prec)</div><div class='ctx'> #if defined(CONFIG_X86_IO_APIC)</div><div class='ctx'> 	seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&amp;irq_mis_count));</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_HAVE_KVM</div><div class='add'>+	seq_printf(p, "%*s: ", prec, "PIN");</div><div class='add'>+	for_each_online_cpu(j)</div><div class='add'>+		seq_printf(p, "%10u ", irq_stats(j)-&gt;kvm_posted_intr_ipis);</div><div class='add'>+	seq_puts(p, "  Posted-interrupt notification event\n");</div><div class='add'>+</div><div class='add'>+	seq_printf(p, "%*s: ", prec, "PIW");</div><div class='add'>+	for_each_online_cpu(j)</div><div class='add'>+		seq_printf(p, "%10u ",</div><div class='add'>+			   irq_stats(j)-&gt;kvm_posted_intr_wakeup_ipis);</div><div class='add'>+	seq_puts(p, "  Posted-interrupt wakeup event\n");</div><div class='add'>+#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -192,8 +216,7 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)</div><div class='ctx'> 	unsigned vector = ~regs-&gt;orig_ax;</div><div class='ctx'> 	unsigned irq;</div><div class='ctx'> </div><div class='del'>-	irq_enter();</div><div class='del'>-	exit_idle();</div><div class='add'>+	entering_irq();</div><div class='ctx'> </div><div class='ctx'> 	irq = __this_cpu_read(vector_irq[vector]);</div><div class='ctx'> </div><div class='hunk'>@@ -209,7 +232,7 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_exit();</div><div class='add'>+	exiting_irq();</div><div class='ctx'> </div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -237,6 +260,18 @@ __visible void smp_x86_platform_ipi(struct pt_regs *regs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_KVM</div><div class='add'>+static void dummy_handler(void) {}</div><div class='add'>+static void (*kvm_posted_intr_wakeup_handler)(void) = dummy_handler;</div><div class='add'>+</div><div class='add'>+void kvm_set_posted_intr_wakeup_handler(void (*handler)(void))</div><div class='add'>+{</div><div class='add'>+	if (handler)</div><div class='add'>+		kvm_posted_intr_wakeup_handler = handler;</div><div class='add'>+	else</div><div class='add'>+		kvm_posted_intr_wakeup_handler = dummy_handler;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wakeup_handler);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Handler for POSTED_INTERRUPT_VECTOR.</div><div class='ctx'>  */</div><div class='hunk'>@@ -244,16 +279,23 @@ __visible void smp_kvm_posted_intr_ipi(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-</div><div class='del'>-	irq_enter();</div><div class='del'>-</div><div class='del'>-	exit_idle();</div><div class='del'>-</div><div class='add'>+	entering_ack_irq();</div><div class='ctx'> 	inc_irq_stat(kvm_posted_intr_ipis);</div><div class='add'>+	exiting_irq();</div><div class='add'>+	set_irq_regs(old_regs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	irq_exit();</div><div class='add'>+/*</div><div class='add'>+ * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.</div><div class='add'>+ */</div><div class='add'>+__visible void smp_kvm_posted_intr_wakeup_ipi(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='add'>+	entering_ack_irq();</div><div class='add'>+	inc_irq_stat(kvm_posted_intr_wakeup_ipis);</div><div class='add'>+	kvm_posted_intr_wakeup_handler();</div><div class='add'>+	exiting_irq();</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -305,14 +347,22 @@ int check_irq_vectors_for_cpu_disable(void)</div><div class='ctx'> 			if (!desc)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='add'>+			/*</div><div class='add'>+			 * Protect against concurrent action removal,</div><div class='add'>+			 * affinity changes etc.</div><div class='add'>+			 */</div><div class='add'>+			raw_spin_lock(&amp;desc-&gt;lock);</div><div class='ctx'> 			data = irq_desc_get_irq_data(desc);</div><div class='ctx'> 			cpumask_copy(&amp;affinity_new, data-&gt;affinity);</div><div class='ctx'> 			cpumask_clear_cpu(this_cpu, &amp;affinity_new);</div><div class='ctx'> </div><div class='ctx'> 			/* Do not count inactive or per-cpu irqs. */</div><div class='del'>-			if (!irq_has_action(irq) || irqd_is_per_cpu(data))</div><div class='add'>+			if (!irq_has_action(irq) || irqd_is_per_cpu(data)) {</div><div class='add'>+				raw_spin_unlock(&amp;desc-&gt;lock);</div><div class='ctx'> 				continue;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='add'>+			raw_spin_unlock(&amp;desc-&gt;lock);</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * A single irq may be mapped to multiple</div><div class='ctx'> 			 * cpu's vector_irq[] (for example IOAPIC cluster</div><div class='hunk'>@@ -343,6 +393,9 @@ int check_irq_vectors_for_cpu_disable(void)</div><div class='ctx'> 		 * vector. If the vector is marked in the used vectors</div><div class='ctx'> 		 * bitmap or an irq is assigned to it, we don't count</div><div class='ctx'> 		 * it as available.</div><div class='add'>+		 *</div><div class='add'>+		 * As this is an inaccurate snapshot anyway, we can do</div><div class='add'>+		 * this w/o holding vector_lock.</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (vector = FIRST_EXTERNAL_VECTOR;</div><div class='ctx'> 		     vector &lt; first_system_vector; vector++) {</div><div class='hunk'>@@ -444,6 +497,11 @@ void fixup_irqs(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	mdelay(1);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * We can walk the vector array of this cpu without holding</div><div class='add'>+	 * vector_lock because the cpu is already marked !online, so</div><div class='add'>+	 * nothing else will touch it.</div><div class='add'>+	 */</div><div class='ctx'> 	for (vector = FIRST_EXTERNAL_VECTOR; vector &lt; NR_VECTORS; vector++) {</div><div class='ctx'> 		unsigned int irr;</div><div class='ctx'> </div><div class='hunk'>@@ -455,9 +513,9 @@ void fixup_irqs(void)</div><div class='ctx'> 			irq = __this_cpu_read(vector_irq[vector]);</div><div class='ctx'> </div><div class='ctx'> 			desc = irq_to_desc(irq);</div><div class='add'>+			raw_spin_lock(&amp;desc-&gt;lock);</div><div class='ctx'> 			data = irq_desc_get_irq_data(desc);</div><div class='ctx'> 			chip = irq_data_get_irq_chip(data);</div><div class='del'>-			raw_spin_lock(&amp;desc-&gt;lock);</div><div class='ctx'> 			if (chip-&gt;irq_retrigger) {</div><div class='ctx'> 				chip-&gt;irq_retrigger(data);</div><div class='ctx'> 				__this_cpu_write(vector_irq[vector], VECTOR_RETRIGGERED);</div><div class='head'>diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c<br/>index f9fd86a7fcc7..cd74f5978ab9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irq_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/irq_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irq_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_32.c</a></div><div class='hunk'>@@ -21,12 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);</div><div class='del'>-EXPORT_PER_CPU_SYMBOL(irq_stat);</div><div class='del'>-</div><div class='del'>-DEFINE_PER_CPU(struct pt_regs *, irq_regs);</div><div class='del'>-EXPORT_PER_CPU_SYMBOL(irq_regs);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_DEBUG_STACKOVERFLOW</div><div class='ctx'> </div><div class='ctx'> int sysctl_panic_on_stackoverflow __read_mostly;</div><div class='head'>diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c<br/>index 394e643d7830..bc4604e500a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irq_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/irq_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irq_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_64.c</a></div><div class='hunk'>@@ -20,12 +20,6 @@</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);</div><div class='del'>-EXPORT_PER_CPU_SYMBOL(irq_stat);</div><div class='del'>-</div><div class='del'>-DEFINE_PER_CPU(struct pt_regs *, irq_regs);</div><div class='del'>-EXPORT_PER_CPU_SYMBOL(irq_regs);</div><div class='del'>-</div><div class='ctx'> int sysctl_panic_on_stackoverflow;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/kernel/irq_work.c b/arch/x86/kernel/irq_work.c<br/>index 15d741ddfeeb..dc5fa6a1e8d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irq_work.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/irq_work.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irq_work.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irq_work.c</a></div><div class='hunk'>@@ -10,12 +10,6 @@</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/trace/irq_vectors.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline void irq_work_entering_irq(void)</div><div class='del'>-{</div><div class='del'>-	irq_enter();</div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void __smp_irq_work_interrupt(void)</div><div class='ctx'> {</div><div class='ctx'> 	inc_irq_stat(apic_irq_work_irqs);</div><div class='hunk'>@@ -24,14 +18,14 @@ static inline void __smp_irq_work_interrupt(void)</div><div class='ctx'> </div><div class='ctx'> __visible void smp_irq_work_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	irq_work_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	__smp_irq_work_interrupt();</div><div class='ctx'> 	exiting_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __visible void smp_trace_irq_work_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	irq_work_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	trace_irq_work_entry(IRQ_WORK_VECTOR);</div><div class='ctx'> 	__smp_irq_work_interrupt();</div><div class='ctx'> 	trace_irq_work_exit(IRQ_WORK_VECTOR);</div><div class='head'>diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c<br/>index cd10a6437264..a3a5e158ed69 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irqinit.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/irqinit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irqinit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/irqinit.c</a></div><div class='hunk'>@@ -86,7 +86,7 @@ void __init init_IRQ(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.</div><div class='add'>+	 * On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15.</div><div class='ctx'> 	 * If these IRQ's are handled by legacy interrupt-controllers like PIC,</div><div class='ctx'> 	 * then this configuration will likely be static after the boot. If</div><div class='ctx'> 	 * these IRQ's are handled by more mordern controllers like IO-APIC,</div><div class='hunk'>@@ -94,7 +94,7 @@ void __init init_IRQ(void)</div><div class='ctx'> 	 * irq's migrate etc.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; nr_legacy_irqs(); i++)</div><div class='del'>-		per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;</div><div class='add'>+		per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = i;</div><div class='ctx'> </div><div class='ctx'> 	x86_init.irqs.intr_init();</div><div class='ctx'> }</div><div class='hunk'>@@ -135,6 +135,10 @@ static void __init apic_intr_init(void)</div><div class='ctx'> 	alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_MCE_AMD</div><div class='add'>+	alloc_intr_gate(DEFERRED_ERROR_VECTOR, deferred_error_interrupt);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='ctx'> 	/* self generated IPI for local APIC timer */</div><div class='ctx'> 	alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);</div><div class='hunk'>@@ -144,6 +148,8 @@ static void __init apic_intr_init(void)</div><div class='ctx'> #ifdef CONFIG_HAVE_KVM</div><div class='ctx'> 	/* IPI for KVM to deliver posted interrupt */</div><div class='ctx'> 	alloc_intr_gate(POSTED_INTR_VECTOR, kvm_posted_intr_ipi);</div><div class='add'>+	/* IPI for KVM to deliver interrupt to wake up tasks */</div><div class='add'>+	alloc_intr_gate(POSTED_INTR_WAKEUP_VECTOR, kvm_posted_intr_wakeup_ipi);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* IPI vectors for APIC spurious and error interrupts */</div><div class='head'>diff --git a/arch/x86/kernel/kexec-bzimage64.c b/arch/x86/kernel/kexec-bzimage64.c<br/>index ca05f86481aa..ca83f7ac388b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kexec-bzimage64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/kexec-bzimage64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kexec-bzimage64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kexec-bzimage64.c</a></div><div class='hunk'>@@ -72,15 +72,16 @@ static int setup_cmdline(struct kimage *image, struct boot_params *params,</div><div class='ctx'> 			 unsigned long cmdline_len)</div><div class='ctx'> {</div><div class='ctx'> 	char *cmdline_ptr = ((char *)params) + cmdline_offset;</div><div class='del'>-	unsigned long cmdline_ptr_phys, len;</div><div class='add'>+	unsigned long cmdline_ptr_phys, len = 0;</div><div class='ctx'> 	uint32_t cmdline_low_32, cmdline_ext_32;</div><div class='ctx'> </div><div class='del'>-	memcpy(cmdline_ptr, cmdline, cmdline_len);</div><div class='ctx'> 	if (image-&gt;type == KEXEC_TYPE_CRASH) {</div><div class='del'>-		len = sprintf(cmdline_ptr + cmdline_len - 1,</div><div class='del'>-			" elfcorehdr=0x%lx", image-&gt;arch.elf_load_addr);</div><div class='del'>-		cmdline_len += len;</div><div class='add'>+		len = sprintf(cmdline_ptr,</div><div class='add'>+			"elfcorehdr=0x%lx ", image-&gt;arch.elf_load_addr);</div><div class='ctx'> 	}</div><div class='add'>+	memcpy(cmdline_ptr + len, cmdline, cmdline_len);</div><div class='add'>+	cmdline_len += len;</div><div class='add'>+</div><div class='ctx'> 	cmdline_ptr[cmdline_len - 1] = '\0';</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Final command line is: %s\n", cmdline_ptr);</div><div class='head'>diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c<br/>index 9435620062df..47190bd399e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kvm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/kvm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kvm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kvm.c</a></div><div class='hunk'>@@ -331,7 +331,7 @@ static void kvm_guest_apic_eoi_write(u32 reg, u32 val)</div><div class='ctx'> 	apic_write(APIC_EOI, APIC_EOI_ACK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_guest_cpu_init(void)</div><div class='add'>+static void kvm_guest_cpu_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!kvm_para_available())</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -584,6 +584,39 @@ static void kvm_kick_cpu(int cpu)</div><div class='ctx'> 	kvm_hypercall2(KVM_HC_KICK_CPU, flags, apicid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+</div><div class='add'>+#include &lt;asm/qspinlock.h&gt;</div><div class='add'>+</div><div class='add'>+static void kvm_wait(u8 *ptr, u8 val)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (in_nmi())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+	if (READ_ONCE(*ptr) != val)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * halt until it's our turn and kicked. Note that we do safe halt</div><div class='add'>+	 * for irq enabled case to avoid hang when lock info is overwritten</div><div class='add'>+	 * in irq spinlock slowpath and no spurious interrupt occur to save us.</div><div class='add'>+	 */</div><div class='add'>+	if (arch_irqs_disabled_flags(flags))</div><div class='add'>+		halt();</div><div class='add'>+	else</div><div class='add'>+		safe_halt();</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+</div><div class='ctx'> enum kvm_contention_stat {</div><div class='ctx'> 	TAKEN_SLOW,</div><div class='ctx'> 	TAKEN_SLOW_PICKUP,</div><div class='hunk'>@@ -655,7 +688,7 @@ static inline void spin_time_accum_blocked(u64 start)</div><div class='ctx'> static struct dentry *d_spin_debug;</div><div class='ctx'> static struct dentry *d_kvm_debug;</div><div class='ctx'> </div><div class='del'>-struct dentry *kvm_init_debugfs(void)</div><div class='add'>+static struct dentry *kvm_init_debugfs(void)</div><div class='ctx'> {</div><div class='ctx'> 	d_kvm_debug = debugfs_create_dir("kvm-guest", NULL);</div><div class='ctx'> 	if (!d_kvm_debug)</div><div class='hunk'>@@ -817,6 +850,8 @@ static void kvm_unlock_kick(struct arch_spinlock *lock, __ticket_t ticket)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Setup pv_lock_ops to exploit KVM_FEATURE_PV_UNHALT if present.</div><div class='ctx'>  */</div><div class='hunk'>@@ -828,8 +863,16 @@ void __init kvm_spinlock_init(void)</div><div class='ctx'> 	if (!kvm_para_has_feature(KVM_FEATURE_PV_UNHALT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+	__pv_init_lock_hash();</div><div class='add'>+	pv_lock_ops.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;</div><div class='add'>+	pv_lock_ops.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);</div><div class='add'>+	pv_lock_ops.wait = kvm_wait;</div><div class='add'>+	pv_lock_ops.kick = kvm_kick_cpu;</div><div class='add'>+#else /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> 	pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(kvm_lock_spinning);</div><div class='ctx'> 	pv_lock_ops.unlock_kick = kvm_unlock_kick;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __init int kvm_spinlock_init_jump(void)</div><div class='head'>diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c<br/>index 42caaef897c8..49487b488061 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kvmclock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/kvmclock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kvmclock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/kvmclock.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='hunk'>@@ -217,8 +218,10 @@ static void kvm_shutdown(void)</div><div class='ctx'> </div><div class='ctx'> void __init kvmclock_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct pvclock_vcpu_time_info *vcpu_time;</div><div class='ctx'> 	unsigned long mem;</div><div class='del'>-	int size;</div><div class='add'>+	int size, cpu;</div><div class='add'>+	u8 flags;</div><div class='ctx'> </div><div class='ctx'> 	size = PAGE_ALIGN(sizeof(struct pvclock_vsyscall_time_info)*NR_CPUS);</div><div class='ctx'> </div><div class='hunk'>@@ -264,7 +267,14 @@ void __init kvmclock_init(void)</div><div class='ctx'> 	pv_info.name = "KVM";</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT))</div><div class='del'>-		pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT);</div><div class='add'>+		pvclock_set_flags(~0);</div><div class='add'>+</div><div class='add'>+	cpu = get_cpu();</div><div class='add'>+	vcpu_time = &amp;hv_clock[cpu].pvti;</div><div class='add'>+	flags = pvclock_read_flags(vcpu_time);</div><div class='add'>+	if (flags &amp; PVCLOCK_COUNTS_FROM_ZERO)</div><div class='add'>+		set_sched_clock_stable();</div><div class='add'>+	put_cpu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __init kvm_setup_vsyscall_timeinfo(void)</div><div class='head'>diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c<br/>index 415480d3ea84..819ab3f9c9c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/machine_kexec_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/machine_kexec_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/machine_kexec_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/machine_kexec_64.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/init.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='hunk'>@@ -25,6 +26,7 @@</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/kexec-bzimage64.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KEXEC_FILE</div><div class='ctx'> static struct kexec_file_ops *kexec_file_loaders[] = {</div><div class='hunk'>@@ -334,7 +336,7 @@ void arch_crash_save_vmcoreinfo(void)</div><div class='ctx'> 	VMCOREINFO_LENGTH(node_data, MAX_NUMNODES);</div><div class='ctx'> #endif</div><div class='ctx'> 	vmcoreinfo_append_str("KERNELOFFSET=%lx\n",</div><div class='del'>-			      (unsigned long)&amp;_text - __START_KERNEL);</div><div class='add'>+			      kaslr_offset());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* arch-dependent functionality related to kexec file-based syscall */</div><div class='head'>diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c<br/>index 2d2a237f2c73..30ca7607cbbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/mpparse.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/mpparse.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/mpparse.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/mpparse.c</a></div><div class='hunk'>@@ -19,8 +19,8 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='hunk'>@@ -113,11 +113,6 @@ static void __init MP_bus_info(struct mpc_bus *m)</div><div class='ctx'> 		pr_warn("Unknown bustype %s - ignoring\n", str);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_domain_ops mp_ioapic_irqdomain_ops = {</div><div class='del'>-	.map = mp_irqdomain_map,</div><div class='del'>-	.unmap = mp_irqdomain_unmap,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init MP_ioapic_info(struct mpc_ioapic *m)</div><div class='ctx'> {</div><div class='ctx'> 	struct ioapic_domain_cfg cfg = {</div><div class='head'>diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c<br/>index c3e985d1751c..d05bd2e2ee91 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/nmi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/nmi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/nmi.c</a></div><div class='hunk'>@@ -408,15 +408,15 @@ static void default_do_nmi(struct pt_regs *regs)</div><div class='ctx'> NOKPROBE_SYMBOL(default_do_nmi);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * NMIs can hit breakpoints which will cause it to lose its</div><div class='del'>- * NMI context with the CPU when the breakpoint does an iret.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-/*</div><div class='del'>- * For i386, NMIs use the same stack as the kernel, and we can</div><div class='del'>- * add a workaround to the iret problem in C (preventing nested</div><div class='del'>- * NMIs if an NMI takes a trap). Simply have 3 states the NMI</div><div class='del'>- * can be in:</div><div class='add'>+ * NMIs can page fault or hit breakpoints which will cause it to lose</div><div class='add'>+ * its NMI context with the CPU when the breakpoint or page fault does an IRET.</div><div class='add'>+ *</div><div class='add'>+ * As a result, NMIs can nest if NMIs get unmasked due an IRET during</div><div class='add'>+ * NMI processing.  On x86_64, the asm glue protects us from nested NMIs</div><div class='add'>+ * if the outer NMI came from kernel mode, but we can still nest if the</div><div class='add'>+ * outer NMI came from user mode.</div><div class='add'>+ *</div><div class='add'>+ * To handle these nested NMIs, we have three states:</div><div class='ctx'>  *</div><div class='ctx'>  *  1) not running</div><div class='ctx'>  *  2) executing</div><div class='hunk'>@@ -430,15 +430,14 @@ NOKPROBE_SYMBOL(default_do_nmi);</div><div class='ctx'>  * (Note, the latch is binary, thus multiple NMIs triggering,</div><div class='ctx'>  *  when one is running, are ignored. Only one NMI is restarted.)</div><div class='ctx'>  *</div><div class='del'>- * If an NMI hits a breakpoint that executes an iret, another</div><div class='del'>- * NMI can preempt it. We do not want to allow this new NMI</div><div class='del'>- * to run, but we want to execute it when the first one finishes.</div><div class='del'>- * We set the state to "latched", and the exit of the first NMI will</div><div class='del'>- * perform a dec_return, if the result is zero (NOT_RUNNING), then</div><div class='del'>- * it will simply exit the NMI handler. If not, the dec_return</div><div class='del'>- * would have set the state to NMI_EXECUTING (what we want it to</div><div class='del'>- * be when we are running). In this case, we simply jump back</div><div class='del'>- * to rerun the NMI handler again, and restart the 'latched' NMI.</div><div class='add'>+ * If an NMI executes an iret, another NMI can preempt it. We do not</div><div class='add'>+ * want to allow this new NMI to run, but we want to execute it when the</div><div class='add'>+ * first one finishes.  We set the state to "latched", and the exit of</div><div class='add'>+ * the first NMI will perform a dec_return, if the result is zero</div><div class='add'>+ * (NOT_RUNNING), then it will simply exit the NMI handler. If not, the</div><div class='add'>+ * dec_return would have set the state to NMI_EXECUTING (what we want it</div><div class='add'>+ * to be when we are running). In this case, we simply jump back to</div><div class='add'>+ * rerun the NMI handler again, and restart the 'latched' NMI.</div><div class='ctx'>  *</div><div class='ctx'>  * No trap (breakpoint or page fault) should be hit before nmi_restart,</div><div class='ctx'>  * thus there is no race between the first check of state for NOT_RUNNING</div><div class='hunk'>@@ -461,49 +460,36 @@ enum nmi_states {</div><div class='ctx'> static DEFINE_PER_CPU(enum nmi_states, nmi_state);</div><div class='ctx'> static DEFINE_PER_CPU(unsigned long, nmi_cr2);</div><div class='ctx'> </div><div class='del'>-#define nmi_nesting_preprocess(regs)					\</div><div class='del'>-	do {								\</div><div class='del'>-		if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) {	\</div><div class='del'>-			this_cpu_write(nmi_state, NMI_LATCHED);		\</div><div class='del'>-			return;						\</div><div class='del'>-		}							\</div><div class='del'>-		this_cpu_write(nmi_state, NMI_EXECUTING);		\</div><div class='del'>-		this_cpu_write(nmi_cr2, read_cr2());			\</div><div class='del'>-	} while (0);							\</div><div class='del'>-	nmi_restart:</div><div class='del'>-</div><div class='del'>-#define nmi_nesting_postprocess()					\</div><div class='del'>-	do {								\</div><div class='del'>-		if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))	\</div><div class='del'>-			write_cr2(this_cpu_read(nmi_cr2));		\</div><div class='del'>-		if (this_cpu_dec_return(nmi_state))			\</div><div class='del'>-			goto nmi_restart;				\</div><div class='del'>-	} while (0)</div><div class='del'>-#else /* x86_64 */</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='ctx'> /*</div><div class='del'>- * In x86_64 things are a bit more difficult. This has the same problem</div><div class='del'>- * where an NMI hitting a breakpoint that calls iret will remove the</div><div class='del'>- * NMI context, allowing a nested NMI to enter. What makes this more</div><div class='del'>- * difficult is that both NMIs and breakpoints have their own stack.</div><div class='del'>- * When a new NMI or breakpoint is executed, the stack is set to a fixed</div><div class='del'>- * point. If an NMI is nested, it will have its stack set at that same</div><div class='del'>- * fixed address that the first NMI had, and will start corrupting the</div><div class='del'>- * stack. This is handled in entry_64.S, but the same problem exists with</div><div class='del'>- * the breakpoint stack.</div><div class='add'>+ * In x86_64, we need to handle breakpoint -&gt; NMI -&gt; breakpoint.  Without</div><div class='add'>+ * some care, the inner breakpoint will clobber the outer breakpoint's</div><div class='add'>+ * stack.</div><div class='ctx'>  *</div><div class='del'>- * If a breakpoint is being processed, and the debug stack is being used,</div><div class='del'>- * if an NMI comes in and also hits a breakpoint, the stack pointer</div><div class='del'>- * will be set to the same fixed address as the breakpoint that was</div><div class='del'>- * interrupted, causing that stack to be corrupted. To handle this case,</div><div class='del'>- * check if the stack that was interrupted is the debug stack, and if</div><div class='del'>- * so, change the IDT so that new breakpoints will use the current stack</div><div class='del'>- * and not switch to the fixed address. On return of the NMI, switch back</div><div class='del'>- * to the original IDT.</div><div class='add'>+ * If a breakpoint is being processed, and the debug stack is being</div><div class='add'>+ * used, if an NMI comes in and also hits a breakpoint, the stack</div><div class='add'>+ * pointer will be set to the same fixed address as the breakpoint that</div><div class='add'>+ * was interrupted, causing that stack to be corrupted. To handle this</div><div class='add'>+ * case, check if the stack that was interrupted is the debug stack, and</div><div class='add'>+ * if so, change the IDT so that new breakpoints will use the current</div><div class='add'>+ * stack and not switch to the fixed address. On return of the NMI,</div><div class='add'>+ * switch back to the original IDT.</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_PER_CPU(int, update_debug_stack);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static inline void nmi_nesting_preprocess(struct pt_regs *regs)</div><div class='add'>+dotraplinkage notrace void</div><div class='add'>+do_nmi(struct pt_regs *regs, long error_code)</div><div class='ctx'> {</div><div class='add'>+	if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) {</div><div class='add'>+		this_cpu_write(nmi_state, NMI_LATCHED);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	this_cpu_write(nmi_state, NMI_EXECUTING);</div><div class='add'>+	this_cpu_write(nmi_cr2, read_cr2());</div><div class='add'>+nmi_restart:</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we interrupted a breakpoint, it is possible that</div><div class='ctx'> 	 * the nmi handler will have breakpoints too. We need to</div><div class='hunk'>@@ -514,22 +500,8 @@ static inline void nmi_nesting_preprocess(struct pt_regs *regs)</div><div class='ctx'> 		debug_stack_set_zero();</div><div class='ctx'> 		this_cpu_write(update_debug_stack, 1);</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void nmi_nesting_postprocess(void)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(this_cpu_read(update_debug_stack))) {</div><div class='del'>-		debug_stack_reset();</div><div class='del'>-		this_cpu_write(update_debug_stack, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-dotraplinkage notrace void</div><div class='del'>-do_nmi(struct pt_regs *regs, long error_code)</div><div class='del'>-{</div><div class='del'>-	nmi_nesting_preprocess(regs);</div><div class='del'>-</div><div class='ctx'> 	nmi_enter();</div><div class='ctx'> </div><div class='ctx'> 	inc_irq_stat(__nmi_count);</div><div class='hunk'>@@ -539,8 +511,17 @@ do_nmi(struct pt_regs *regs, long error_code)</div><div class='ctx'> </div><div class='ctx'> 	nmi_exit();</div><div class='ctx'> </div><div class='del'>-	/* On i386, may loop back to preprocess */</div><div class='del'>-	nmi_nesting_postprocess();</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	if (unlikely(this_cpu_read(update_debug_stack))) {</div><div class='add'>+		debug_stack_reset();</div><div class='add'>+		this_cpu_write(update_debug_stack, 0);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))</div><div class='add'>+		write_cr2(this_cpu_read(nmi_cr2));</div><div class='add'>+	if (this_cpu_dec_return(nmi_state))</div><div class='add'>+		goto nmi_restart;</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(do_nmi);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c<br/>index bbb6c7316341..33ee3e0efd65 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/paravirt-spinlocks.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/paravirt-spinlocks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/paravirt-spinlocks.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt-spinlocks.c</a></div><div class='hunk'>@@ -8,11 +8,33 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+__visible void __native_queued_spin_unlock(struct qspinlock *lock)</div><div class='add'>+{</div><div class='add'>+	native_queued_spin_unlock(lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+PV_CALLEE_SAVE_REGS_THUNK(__native_queued_spin_unlock);</div><div class='add'>+</div><div class='add'>+bool pv_is_native_spin_unlock(void)</div><div class='add'>+{</div><div class='add'>+	return pv_lock_ops.queued_spin_unlock.func ==</div><div class='add'>+		__raw_callee_save___native_queued_spin_unlock;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct pv_lock_ops pv_lock_ops = {</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+	.queued_spin_lock_slowpath = native_queued_spin_lock_slowpath,</div><div class='add'>+	.queued_spin_unlock = PV_CALLEE_SAVE(__native_queued_spin_unlock),</div><div class='add'>+	.wait = paravirt_nop,</div><div class='add'>+	.kick = paravirt_nop,</div><div class='add'>+#else /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> 	.lock_spinning = __PV_IS_CALLEE_SAVE(paravirt_nop),</div><div class='ctx'> 	.unlock_kick = paravirt_nop,</div><div class='del'>-#endif</div><div class='add'>+#endif /* !CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+#endif /* SMP */</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL(pv_lock_ops);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c<br/>index c614dd492f5f..58bcfb67c01f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/paravirt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/paravirt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/paravirt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt.c</a></div><div class='hunk'>@@ -154,7 +154,9 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,</div><div class='ctx'> 		ret = paravirt_patch_ident_64(insnbuf, len);</div><div class='ctx'> </div><div class='ctx'> 	else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='ctx'> 		 type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||</div><div class='add'>+#endif</div><div class='ctx'> 		 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||</div><div class='ctx'> 		 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64))</div><div class='ctx'> 		/* If operation requires a jmp, then jmp */</div><div class='hunk'>@@ -371,7 +373,7 @@ __visible struct pv_cpu_ops pv_cpu_ops = {</div><div class='ctx'> </div><div class='ctx'> 	.load_sp0 = native_load_sp0,</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)</div><div class='add'>+#if defined(CONFIG_X86_32)</div><div class='ctx'> 	.irq_enable_sysexit = native_irq_enable_sysexit,</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='head'>diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c<br/>index d9f32e6d6ab6..e1b013696dde 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/paravirt_patch_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/paravirt_patch_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/paravirt_patch_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt_patch_32.c</a></div><div class='hunk'>@@ -12,6 +12,10 @@ DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");</div><div class='ctx'> DEF_NATIVE(pv_cpu_ops, clts, "clts");</div><div class='ctx'> DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc");</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PARAVIRT_SPINLOCKS) &amp;&amp; defined(CONFIG_QUEUED_SPINLOCKS)</div><div class='add'>+DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	/* arg in %eax, return in %eax */</div><div class='hunk'>@@ -24,6 +28,8 @@ unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern bool pv_is_native_spin_unlock(void);</div><div class='add'>+</div><div class='ctx'> unsigned native_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 		      unsigned long addr, unsigned len)</div><div class='ctx'> {</div><div class='hunk'>@@ -47,14 +53,22 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 		PATCH_SITE(pv_mmu_ops, write_cr3);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, clts);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, read_tsc);</div><div class='del'>-</div><div class='del'>-	patch_site:</div><div class='del'>-		ret = paravirt_patch_insns(ibuf, len, start, end);</div><div class='del'>-		break;</div><div class='add'>+#if defined(CONFIG_PARAVIRT_SPINLOCKS) &amp;&amp; defined(CONFIG_QUEUED_SPINLOCKS)</div><div class='add'>+		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):</div><div class='add'>+			if (pv_is_native_spin_unlock()) {</div><div class='add'>+				start = start_pv_lock_ops_queued_spin_unlock;</div><div class='add'>+				end   = end_pv_lock_ops_queued_spin_unlock;</div><div class='add'>+				goto patch_site;</div><div class='add'>+			}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+patch_site:</div><div class='add'>+		ret = paravirt_patch_insns(ibuf, len, start, end);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> #undef PATCH_SITE</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c<br/>index a1da6737ba5b..8aa05583bc42 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/paravirt_patch_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/paravirt_patch_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/paravirt_patch_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/paravirt_patch_64.c</a></div><div class='hunk'>@@ -21,6 +21,10 @@ DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");</div><div class='ctx'> DEF_NATIVE(, mov32, "mov %edi, %eax");</div><div class='ctx'> DEF_NATIVE(, mov64, "mov %rdi, %rax");</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PARAVIRT_SPINLOCKS) &amp;&amp; defined(CONFIG_QUEUED_SPINLOCKS)</div><div class='add'>+DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	return paravirt_patch_insns(insnbuf, len,</div><div class='hunk'>@@ -33,6 +37,8 @@ unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)</div><div class='ctx'> 				    start__mov64, end__mov64);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern bool pv_is_native_spin_unlock(void);</div><div class='add'>+</div><div class='ctx'> unsigned native_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 		      unsigned long addr, unsigned len)</div><div class='ctx'> {</div><div class='hunk'>@@ -49,7 +55,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 		PATCH_SITE(pv_irq_ops, save_fl);</div><div class='ctx'> 		PATCH_SITE(pv_irq_ops, irq_enable);</div><div class='ctx'> 		PATCH_SITE(pv_irq_ops, irq_disable);</div><div class='del'>-		PATCH_SITE(pv_cpu_ops, irq_enable_sysexit);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, usergs_sysret32);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, usergs_sysret64);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, swapgs);</div><div class='hunk'>@@ -59,14 +64,22 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, clts);</div><div class='ctx'> 		PATCH_SITE(pv_mmu_ops, flush_tlb_single);</div><div class='ctx'> 		PATCH_SITE(pv_cpu_ops, wbinvd);</div><div class='del'>-</div><div class='del'>-	patch_site:</div><div class='del'>-		ret = paravirt_patch_insns(ibuf, len, start, end);</div><div class='del'>-		break;</div><div class='add'>+#if defined(CONFIG_PARAVIRT_SPINLOCKS) &amp;&amp; defined(CONFIG_QUEUED_SPINLOCKS)</div><div class='add'>+		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):</div><div class='add'>+			if (pv_is_native_spin_unlock()) {</div><div class='add'>+				start = start_pv_lock_ops_queued_spin_unlock;</div><div class='add'>+				end   = end_pv_lock_ops_queued_spin_unlock;</div><div class='add'>+				goto patch_site;</div><div class='add'>+			}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+patch_site:</div><div class='add'>+		ret = paravirt_patch_insns(ibuf, len, start, end);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> #undef PATCH_SITE</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c<br/>index a25e202bb319..353972c1946c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pci-dma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/pci-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pci-dma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pci-dma.c</a></div><div class='hunk'>@@ -140,6 +140,51 @@ void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='ctx'> 		free_pages((unsigned long)vaddr, get_order(size));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,</div><div class='add'>+		      gfp_t gfp, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	void *memory;</div><div class='add'>+</div><div class='add'>+	gfp &amp;= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);</div><div class='add'>+</div><div class='add'>+	if (dma_alloc_from_coherent(dev, size, dma_handle, &amp;memory))</div><div class='add'>+		return memory;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		dev = &amp;x86_dma_fallback_dev;</div><div class='add'>+</div><div class='add'>+	if (!is_device_dma_capable(dev))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;alloc)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	memory = ops-&gt;alloc(dev, size, dma_handle,</div><div class='add'>+			    dma_alloc_coherent_gfp_flags(dev, gfp), attrs);</div><div class='add'>+	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);</div><div class='add'>+</div><div class='add'>+	return memory;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_alloc_attrs);</div><div class='add'>+</div><div class='add'>+void dma_free_attrs(struct device *dev, size_t size,</div><div class='add'>+		    void *vaddr, dma_addr_t bus,</div><div class='add'>+		    struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+</div><div class='add'>+	WARN_ON(irqs_disabled());       /* for portability */</div><div class='add'>+</div><div class='add'>+	if (dma_release_from_coherent(dev, get_order(size), vaddr))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	debug_dma_free_coherent(dev, size, vaddr, bus);</div><div class='add'>+	if (ops-&gt;free)</div><div class='add'>+		ops-&gt;free(dev, size, vaddr, bus, attrs);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_free_attrs);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * See &lt;Documentation/x86/x86_64/boot-options.txt&gt; for the iommu kernel</div><div class='ctx'>  * parameter documentation.</div><div class='head'>diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c<br/>index 77dd0ad58be4..adf0392d549a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pci-swiotlb.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/pci-swiotlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pci-swiotlb.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pci-swiotlb.c</a></div><div class='hunk'>@@ -20,6 +20,13 @@ void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,</div><div class='ctx'> {</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Don't print a warning when the first allocation attempt fails.</div><div class='add'>+	 * swiotlb_alloc_coherent() will print a warning when the DMA</div><div class='add'>+	 * memory allocation ultimately failed.</div><div class='add'>+	 */</div><div class='add'>+	flags |= __GFP_NOWARN;</div><div class='add'>+</div><div class='ctx'> 	vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags,</div><div class='ctx'> 					   attrs);</div><div class='ctx'> 	if (vaddr)</div><div class='head'>diff --git a/arch/x86/kernel/pmem.c b/arch/x86/kernel/pmem.c<br/>index 3420c874ddc5..64f90f53bb85 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/pmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/pmem.c</a></div><div class='hunk'>@@ -1,53 +1,82 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2015, Christoph Hellwig.</div><div class='add'>+ * Copyright (c) 2015, Intel Corporation.</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/libnvdimm.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='del'>-#include &lt;asm/page_types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-static __init void register_pmem_device(struct resource *res)</div><div class='add'>+static void e820_pmem_release(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int error;</div><div class='add'>+	struct nvdimm_bus *nvdimm_bus = dev-&gt;platform_data;</div><div class='ctx'> </div><div class='del'>-	pdev = platform_device_alloc("pmem", PLATFORM_DEVID_AUTO);</div><div class='del'>-	if (!pdev)</div><div class='del'>-		return;</div><div class='add'>+	if (nvdimm_bus)</div><div class='add'>+		nvdimm_bus_unregister(nvdimm_bus);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	error = platform_device_add_resources(pdev, res, 1);</div><div class='del'>-	if (error)</div><div class='del'>-		goto out_put_pdev;</div><div class='add'>+static struct platform_device e820_pmem = {</div><div class='add'>+	.name = "e820_pmem",</div><div class='add'>+	.id = -1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.release = e820_pmem_release,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	error = platform_device_add(pdev);</div><div class='del'>-	if (error)</div><div class='del'>-		goto out_put_pdev;</div><div class='del'>-	return;</div><div class='add'>+static const struct attribute_group *e820_pmem_attribute_groups[] = {</div><div class='add'>+	&amp;nvdimm_bus_attribute_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-out_put_pdev:</div><div class='del'>-	dev_warn(&amp;pdev-&gt;dev, "failed to add 'pmem' (persistent memory) device!\n");</div><div class='del'>-	platform_device_put(pdev);</div><div class='del'>-}</div><div class='add'>+static const struct attribute_group *e820_pmem_region_attribute_groups[] = {</div><div class='add'>+	&amp;nd_region_attribute_group,</div><div class='add'>+	&amp;nd_device_attribute_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static __init int register_pmem_devices(void)</div><div class='add'>+static __init int register_e820_pmem(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	static struct nvdimm_bus_descriptor nd_desc;</div><div class='add'>+	struct device *dev = &amp;e820_pmem.dev;</div><div class='add'>+	struct nvdimm_bus *nvdimm_bus;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	rc = platform_device_register(&amp;e820_pmem);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	nd_desc.attr_groups = e820_pmem_attribute_groups;</div><div class='add'>+	nd_desc.provider_name = "e820";</div><div class='add'>+	nvdimm_bus = nvdimm_bus_register(dev, &amp;nd_desc);</div><div class='add'>+	if (!nvdimm_bus)</div><div class='add'>+		goto err;</div><div class='add'>+	dev-&gt;platform_data = nvdimm_bus;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; e820.nr_map; i++) {</div><div class='ctx'> 		struct e820entry *ei = &amp;e820.map[i];</div><div class='add'>+		struct resource res = {</div><div class='add'>+			.flags	= IORESOURCE_MEM,</div><div class='add'>+			.start	= ei-&gt;addr,</div><div class='add'>+			.end	= ei-&gt;addr + ei-&gt;size - 1,</div><div class='add'>+		};</div><div class='add'>+		struct nd_region_desc ndr_desc;</div><div class='add'>+</div><div class='add'>+		if (ei-&gt;type != E820_PRAM)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		if (ei-&gt;type == E820_PRAM) {</div><div class='del'>-			struct resource res = {</div><div class='del'>-				.flags	= IORESOURCE_MEM,</div><div class='del'>-				.start	= ei-&gt;addr,</div><div class='del'>-				.end	= ei-&gt;addr + ei-&gt;size - 1,</div><div class='del'>-			};</div><div class='del'>-			register_pmem_device(&amp;res);</div><div class='del'>-		}</div><div class='add'>+		memset(&amp;ndr_desc, 0, sizeof(ndr_desc));</div><div class='add'>+		ndr_desc.res = &amp;res;</div><div class='add'>+		ndr_desc.attr_groups = e820_pmem_region_attribute_groups;</div><div class='add'>+		ndr_desc.numa_node = NUMA_NO_NODE;</div><div class='add'>+		if (!nvdimm_pmem_region_create(nvdimm_bus, &amp;ndr_desc))</div><div class='add'>+			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+ err:</div><div class='add'>+	dev_err(dev, "failed to register legacy persistent memory ranges\n");</div><div class='add'>+	platform_device_unregister(&amp;e820_pmem);</div><div class='add'>+	return -ENXIO;</div><div class='ctx'> }</div><div class='del'>-device_initcall(register_pmem_devices);</div><div class='add'>+device_initcall(register_e820_pmem);</div><div class='head'>diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c<br/>index 6e338e3b1dc0..397688beed4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process.c</a></div><div class='hunk'>@@ -25,8 +25,7 @@</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -76,47 +75,15 @@ void idle_notifier_unregister(struct notifier_block *n)</div><div class='ctx'> EXPORT_SYMBOL_GPL(idle_notifier_unregister);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-struct kmem_cache *task_xstate_cachep;</div><div class='del'>-EXPORT_SYMBOL_GPL(task_xstate_cachep);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * this gets called so that we can store lazy state into memory and copy the</div><div class='ctx'>  * current task into the new thread.</div><div class='ctx'>  */</div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	*dst = *src;</div><div class='del'>-</div><div class='del'>-	dst-&gt;thread.fpu_counter = 0;</div><div class='del'>-	dst-&gt;thread.fpu.has_fpu = 0;</div><div class='del'>-	dst-&gt;thread.fpu.state = NULL;</div><div class='del'>-	task_disable_lazy_fpu_restore(dst);</div><div class='del'>-	if (tsk_used_math(src)) {</div><div class='del'>-		int err = fpu_alloc(&amp;dst-&gt;thread.fpu);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		fpu_copy(dst, src);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_thread_xstate(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	fpu_free(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-}</div><div class='add'>+	memcpy(dst, src, arch_task_struct_size);</div><div class='ctx'> </div><div class='del'>-void arch_release_task_struct(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	free_thread_xstate(tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void arch_task_cache_init(void)</div><div class='del'>-{</div><div class='del'>-        task_xstate_cachep =</div><div class='del'>-        	kmem_cache_create("task_xstate", xstate_size,</div><div class='del'>-				  __alignof__(union thread_xstate),</div><div class='del'>-				  SLAB_PANIC | SLAB_NOTRACK, NULL);</div><div class='del'>-	setup_xstate_comp();</div><div class='add'>+	return fpu__copy(&amp;dst-&gt;thread.fpu, &amp;src-&gt;thread.fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -127,6 +94,7 @@ void exit_thread(void)</div><div class='ctx'> 	struct task_struct *me = current;</div><div class='ctx'> 	struct thread_struct *t = &amp;me-&gt;thread;</div><div class='ctx'> 	unsigned long *bp = t-&gt;io_bitmap_ptr;</div><div class='add'>+	struct fpu *fpu = &amp;t-&gt;fpu;</div><div class='ctx'> </div><div class='ctx'> 	if (bp) {</div><div class='ctx'> 		struct tss_struct *tss = &amp;per_cpu(cpu_tss, get_cpu());</div><div class='hunk'>@@ -142,7 +110,7 @@ void exit_thread(void)</div><div class='ctx'> 		kfree(bp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drop_fpu(me);</div><div class='add'>+	fpu__drop(fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void flush_thread(void)</div><div class='hunk'>@@ -152,19 +120,7 @@ void flush_thread(void)</div><div class='ctx'> 	flush_ptrace_hw_breakpoint(tsk);</div><div class='ctx'> 	memset(tsk-&gt;thread.tls_array, 0, sizeof(tsk-&gt;thread.tls_array));</div><div class='ctx'> </div><div class='del'>-	if (!use_eager_fpu()) {</div><div class='del'>-		/* FPU state will be reallocated lazily at the first use. */</div><div class='del'>-		drop_fpu(tsk);</div><div class='del'>-		free_thread_xstate(tsk);</div><div class='del'>-	} else {</div><div class='del'>-		if (!tsk_used_math(tsk)) {</div><div class='del'>-			/* kthread execs. TODO: cleanup this horror. */</div><div class='del'>-			if (WARN_ON(init_fpu(tsk)))</div><div class='del'>-				force_sig(SIGKILL, tsk);</div><div class='del'>-			user_fpu_begin();</div><div class='del'>-		}</div><div class='del'>-		restore_init_xstate();</div><div class='del'>-	}</div><div class='add'>+	fpu__clear(&amp;tsk-&gt;thread.fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hard_disable_TSC(void)</div><div class='hunk'>@@ -445,11 +401,10 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * MONITOR/MWAIT with no hints, used for default default C1 state.</div><div class='del'>- * This invokes MWAIT with interrutps enabled and no flags,</div><div class='del'>- * which is backwards compatible with the original MWAIT implementation.</div><div class='add'>+ * MONITOR/MWAIT with no hints, used for default C1 state. This invokes MWAIT</div><div class='add'>+ * with interrupts enabled and no flags, which is backwards compatible with the</div><div class='add'>+ * original MWAIT implementation.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> static void mwait_idle(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!current_set_polling_and_test()) {</div><div class='head'>diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c<br/>index 8ed2106b06da..f73c962fe636 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/process_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process_32.c</a></div><div class='hunk'>@@ -39,8 +39,7 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/ldt.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #ifdef CONFIG_MATH_EMULATION</div><div class='ctx'> #include &lt;asm/math_emu.h&gt;</div><div class='hunk'>@@ -129,8 +128,8 @@ void release_thread(struct task_struct *dead_task)</div><div class='ctx'> 	release_vm86_irqs(dead_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='del'>-	unsigned long arg, struct task_struct *p)</div><div class='add'>+int copy_thread_tls(unsigned long clone_flags, unsigned long sp,</div><div class='add'>+	unsigned long arg, struct task_struct *p, unsigned long tls)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *childregs = task_pt_regs(p);</div><div class='ctx'> 	struct task_struct *tsk;</div><div class='hunk'>@@ -185,7 +184,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (clone_flags &amp; CLONE_SETTLS)</div><div class='ctx'> 		err = do_set_thread_area(p, -1,</div><div class='del'>-			(struct user_desc __user *)childregs-&gt;si, 0);</div><div class='add'>+			(struct user_desc __user *)tls, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (err &amp;&amp; p-&gt;thread.io_bitmap_ptr) {</div><div class='ctx'> 		kfree(p-&gt;thread.io_bitmap_ptr);</div><div class='hunk'>@@ -242,14 +241,16 @@ __visible __notrace_funcgraph struct task_struct *</div><div class='ctx'> __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_struct *prev = &amp;prev_p-&gt;thread,</div><div class='del'>-				 *next = &amp;next_p-&gt;thread;</div><div class='add'>+			     *next = &amp;next_p-&gt;thread;</div><div class='add'>+	struct fpu *prev_fpu = &amp;prev-&gt;fpu;</div><div class='add'>+	struct fpu *next_fpu = &amp;next-&gt;fpu;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	struct tss_struct *tss = &amp;per_cpu(cpu_tss, cpu);</div><div class='del'>-	fpu_switch_t fpu;</div><div class='add'>+	fpu_switch_t fpu_switch;</div><div class='ctx'> </div><div class='ctx'> 	/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */</div><div class='ctx'> </div><div class='del'>-	fpu = switch_fpu_prepare(prev_p, next_p, cpu);</div><div class='add'>+	fpu_switch = switch_fpu_prepare(prev_fpu, next_fpu, cpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Save away %gs. No need to save %fs, as it was saved on the</div><div class='hunk'>@@ -296,19 +297,16 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	 * Leave lazy mode, flushing any hypercalls made here.</div><div class='ctx'> 	 * This must be done before restoring TLS segments so</div><div class='ctx'> 	 * the GDT and LDT are properly updated, and must be</div><div class='del'>-	 * done before math_state_restore, so the TS bit is up</div><div class='add'>+	 * done before fpu__restore(), so the TS bit is up</div><div class='ctx'> 	 * to date.</div><div class='ctx'> 	 */</div><div class='ctx'> 	arch_end_context_switch(next_p);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Reload esp0, kernel_stack, and current_top_of_stack.  This changes</div><div class='add'>+	 * Reload esp0 and cpu_current_top_of_stack.  This changes</div><div class='ctx'> 	 * current_thread_info().</div><div class='ctx'> 	 */</div><div class='ctx'> 	load_sp0(tss, next);</div><div class='del'>-	this_cpu_write(kernel_stack,</div><div class='del'>-		       (unsigned long)task_stack_page(next_p) +</div><div class='del'>-		       THREAD_SIZE);</div><div class='ctx'> 	this_cpu_write(cpu_current_top_of_stack,</div><div class='ctx'> 		       (unsigned long)task_stack_page(next_p) +</div><div class='ctx'> 		       THREAD_SIZE);</div><div class='hunk'>@@ -319,7 +317,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	if (prev-&gt;gs | next-&gt;gs)</div><div class='ctx'> 		lazy_load_gs(next-&gt;gs);</div><div class='ctx'> </div><div class='del'>-	switch_fpu_finish(next_p, fpu);</div><div class='add'>+	switch_fpu_finish(next_fpu, fpu_switch);</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(current_task, next_p);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c<br/>index ddfdbf74f174..71d7849a07f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/process_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/process_64.c</a></div><div class='hunk'>@@ -38,8 +38,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/prctl.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='hunk'>@@ -151,8 +150,8 @@ static inline u32 read_32bit_tls(struct task_struct *t, int tls)</div><div class='ctx'> 	return get_desc_base(&amp;t-&gt;thread.tls_array[tls]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='del'>-		unsigned long arg, struct task_struct *p)</div><div class='add'>+int copy_thread_tls(unsigned long clone_flags, unsigned long sp,</div><div class='add'>+		unsigned long arg, struct task_struct *p, unsigned long tls)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct pt_regs *childregs;</div><div class='hunk'>@@ -208,10 +207,10 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='ctx'> 		if (is_ia32_task())</div><div class='ctx'> 			err = do_set_thread_area(p, -1,</div><div class='del'>-				(struct user_desc __user *)childregs-&gt;si, 0);</div><div class='add'>+				(struct user_desc __user *)tls, 0);</div><div class='ctx'> 		else</div><div class='ctx'> #endif</div><div class='del'>-			err = do_arch_prctl(p, ARCH_SET_FS, childregs-&gt;r8);</div><div class='add'>+			err = do_arch_prctl(p, ARCH_SET_FS, tls);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -274,12 +273,14 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_struct *prev = &amp;prev_p-&gt;thread;</div><div class='ctx'> 	struct thread_struct *next = &amp;next_p-&gt;thread;</div><div class='add'>+	struct fpu *prev_fpu = &amp;prev-&gt;fpu;</div><div class='add'>+	struct fpu *next_fpu = &amp;next-&gt;fpu;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	struct tss_struct *tss = &amp;per_cpu(cpu_tss, cpu);</div><div class='ctx'> 	unsigned fsindex, gsindex;</div><div class='del'>-	fpu_switch_t fpu;</div><div class='add'>+	fpu_switch_t fpu_switch;</div><div class='ctx'> </div><div class='del'>-	fpu = switch_fpu_prepare(prev_p, next_p, cpu);</div><div class='add'>+	fpu_switch = switch_fpu_prepare(prev_fpu, next_fpu, cpu);</div><div class='ctx'> </div><div class='ctx'> 	/* We must save %fs and %gs before load_TLS() because</div><div class='ctx'> 	 * %fs and %gs may be cleared by load_TLS().</div><div class='hunk'>@@ -299,7 +300,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	 * Leave lazy mode, flushing any hypercalls made here.  This</div><div class='ctx'> 	 * must be done after loading TLS entries in the GDT but before</div><div class='ctx'> 	 * loading segments that might reference them, and and it must</div><div class='del'>-	 * be done before math_state_restore, so the TS bit is up to</div><div class='add'>+	 * be done before fpu__restore(), so the TS bit is up to</div><div class='ctx'> 	 * date.</div><div class='ctx'> 	 */</div><div class='ctx'> 	arch_end_context_switch(next_p);</div><div class='hunk'>@@ -391,7 +392,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 		wrmsrl(MSR_KERNEL_GS_BASE, next-&gt;gs);</div><div class='ctx'> 	prev-&gt;gsindex = gsindex;</div><div class='ctx'> </div><div class='del'>-	switch_fpu_finish(next_p, fpu);</div><div class='add'>+	switch_fpu_finish(next_fpu, fpu_switch);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Switch the PDA and FPU contexts.</div><div class='hunk'>@@ -409,9 +410,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	/* Reload esp0 and ss1.  This changes current_thread_info(). */</div><div class='ctx'> 	load_sp0(tss, next);</div><div class='ctx'> </div><div class='del'>-	this_cpu_write(kernel_stack,</div><div class='del'>-		(unsigned long)task_stack_page(next_p) + THREAD_SIZE);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now maybe reload the debug registers and handle I/O bitmaps</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c<br/>index a7bc79480719..9be72bc3613f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/ptrace.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/ptrace.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/ptrace.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/regset.h&gt;</div><div class='ctx'> #include &lt;linux/tracehook.h&gt;</div><div class='ctx'> #include &lt;linux/user.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='hunk'>@@ -28,8 +27,9 @@</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/regset.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/ldt.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='hunk'>@@ -1297,7 +1297,7 @@ static struct user_regset x86_64_regsets[] __read_mostly = {</div><div class='ctx'> 		.core_note_type = NT_PRFPREG,</div><div class='ctx'> 		.n = sizeof(struct user_i387_struct) / sizeof(long),</div><div class='ctx'> 		.size = sizeof(long), .align = sizeof(long),</div><div class='del'>-		.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set</div><div class='add'>+		.active = regset_xregset_fpregs_active, .get = xfpregs_get, .set = xfpregs_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_XSTATE] = {</div><div class='ctx'> 		.core_note_type = NT_X86_XSTATE,</div><div class='hunk'>@@ -1338,13 +1338,13 @@ static struct user_regset x86_32_regsets[] __read_mostly = {</div><div class='ctx'> 		.core_note_type = NT_PRFPREG,</div><div class='ctx'> 		.n = sizeof(struct user_i387_ia32_struct) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32), .align = sizeof(u32),</div><div class='del'>-		.active = fpregs_active, .get = fpregs_get, .set = fpregs_set</div><div class='add'>+		.active = regset_fpregs_active, .get = fpregs_get, .set = fpregs_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_XFP] = {</div><div class='ctx'> 		.core_note_type = NT_PRXFPREG,</div><div class='ctx'> 		.n = sizeof(struct user32_fxsr_struct) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32), .align = sizeof(u32),</div><div class='del'>-		.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set</div><div class='add'>+		.active = regset_xregset_fpregs_active, .get = xfpregs_get, .set = xfpregs_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_XSTATE] = {</div><div class='ctx'> 		.core_note_type = NT_X86_XSTATE,</div><div class='head'>diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c<br/>index d74ac33290ae..80f874bf999e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/setup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/setup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/setup.c</a></div><div class='hunk'>@@ -461,19 +461,18 @@ static void __init e820_reserve_setup_data(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct setup_data *data;</div><div class='ctx'> 	u64 pa_data;</div><div class='del'>-	int found = 0;</div><div class='ctx'> </div><div class='ctx'> 	pa_data = boot_params.hdr.setup_data;</div><div class='add'>+	if (!pa_data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	while (pa_data) {</div><div class='ctx'> 		data = early_memremap(pa_data, sizeof(*data));</div><div class='ctx'> 		e820_update_range(pa_data, sizeof(*data)+data-&gt;len,</div><div class='ctx'> 			 E820_RAM, E820_RESERVED_KERN);</div><div class='del'>-		found = 1;</div><div class='ctx'> 		pa_data = data-&gt;next;</div><div class='ctx'> 		early_memunmap(data, sizeof(*data));</div><div class='ctx'> 	}</div><div class='del'>-	if (!found)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &amp;e820.nr_map);</div><div class='ctx'> 	memcpy(&amp;e820_saved, &amp;e820, sizeof(struct e820map));</div><div class='hunk'>@@ -531,12 +530,14 @@ static void __init reserve_crashkernel_low(void)</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * two parts from lib/swiotlb.c:</div><div class='del'>-		 *	swiotlb size: user specified with swiotlb= or default.</div><div class='del'>-		 *	swiotlb overflow buffer: now is hardcoded to 32k.</div><div class='del'>-		 *		We round it to 8M for other buffers that</div><div class='del'>-		 *		may need to stay low too.</div><div class='add'>+		 * -swiotlb size: user-specified with swiotlb= or default.</div><div class='add'>+		 *</div><div class='add'>+		 * -swiotlb overflow buffer: now hardcoded to 32k. We round it</div><div class='add'>+		 * to 8M for other buffers that may need to stay low too. Also</div><div class='add'>+		 * make sure we allocate enough extra low memory so that we</div><div class='add'>+		 * don't run out of DMA buffers for 32-bit devices.</div><div class='ctx'> 		 */</div><div class='del'>-		low_size = swiotlb_size_or_default() + (8UL&lt;&lt;20);</div><div class='add'>+		low_size = max(swiotlb_size_or_default() + (8UL&lt;&lt;20), 256UL&lt;&lt;20);</div><div class='ctx'> 		auto_set = true;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* passed with crashkernel=0,low ? */</div><div class='hunk'>@@ -834,7 +835,7 @@ dump_kernel_offset(struct notifier_block *self, unsigned long v, void *p)</div><div class='ctx'> {</div><div class='ctx'> 	if (kaslr_enabled()) {</div><div class='ctx'> 		pr_emerg("Kernel Offset: 0x%lx from 0x%lx (relocation range: 0x%lx-0x%lx)\n",</div><div class='del'>-			 (unsigned long)&amp;_text - __START_KERNEL,</div><div class='add'>+			 kaslr_offset(),</div><div class='ctx'> 			 __START_KERNEL,</div><div class='ctx'> 			 __START_KERNEL_map,</div><div class='ctx'> 			 MODULES_VADDR-1);</div><div class='hunk'>@@ -1103,6 +1104,9 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	memblock_set_current_limit(ISA_END_ADDRESS);</div><div class='ctx'> 	memblock_x86_fill();</div><div class='ctx'> </div><div class='add'>+	if (efi_enabled(EFI_BOOT))</div><div class='add'>+		efi_find_mirror();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The EFI specification says that boot service code won't be called</div><div class='ctx'> 	 * after ExitBootServices(). This is, in fact, a lie.</div><div class='hunk'>@@ -1222,8 +1226,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	init_cpu_to_node();</div><div class='ctx'> </div><div class='ctx'> 	init_apic_mappings();</div><div class='del'>-	if (x86_io_apic_ops.init)</div><div class='del'>-		x86_io_apic_ops.init();</div><div class='add'>+	io_apic_init_mappings();</div><div class='ctx'> </div><div class='ctx'> 	kvm_guest_init();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c<br/>index 1ea14fd53933..206996c1669d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/signal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/signal.c</a></div><div class='hunk'>@@ -26,8 +26,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/signal.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> #include &lt;asm/sighandling.h&gt;</div><div class='hunk'>@@ -103,7 +103,7 @@ int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)</div><div class='ctx'> 		get_user_ex(buf, &amp;sc-&gt;fpstate);</div><div class='ctx'> 	} get_user_catch(err);</div><div class='ctx'> </div><div class='del'>-	err |= restore_xstate_sig(buf, config_enabled(CONFIG_X86_32));</div><div class='add'>+	err |= fpu__restore_sig(buf, config_enabled(CONFIG_X86_32));</div><div class='ctx'> </div><div class='ctx'> 	force_iret();</div><div class='ctx'> </div><div class='hunk'>@@ -199,6 +199,7 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,</div><div class='ctx'> 	unsigned long sp = regs-&gt;sp;</div><div class='ctx'> 	unsigned long buf_fx = 0;</div><div class='ctx'> 	int onsigstack = on_sig_stack(sp);</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='ctx'> </div><div class='ctx'> 	/* redzone */</div><div class='ctx'> 	if (config_enabled(CONFIG_X86_64))</div><div class='hunk'>@@ -218,9 +219,9 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (used_math()) {</div><div class='del'>-		sp = alloc_mathframe(sp, config_enabled(CONFIG_X86_32),</div><div class='del'>-				     &amp;buf_fx, &amp;math_size);</div><div class='add'>+	if (fpu-&gt;fpstate_active) {</div><div class='add'>+		sp = fpu__alloc_mathframe(sp, config_enabled(CONFIG_X86_32),</div><div class='add'>+					  &amp;buf_fx, &amp;math_size);</div><div class='ctx'> 		*fpstate = (void __user *)sp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -234,8 +235,8 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,</div><div class='ctx'> 		return (void __user *)-1L;</div><div class='ctx'> </div><div class='ctx'> 	/* save i387 and extended state */</div><div class='del'>-	if (used_math() &amp;&amp;</div><div class='del'>-	    save_xstate_sig(*fpstate, (void __user *)buf_fx, math_size) &lt; 0)</div><div class='add'>+	if (fpu-&gt;fpstate_active &amp;&amp;</div><div class='add'>+	    copy_fpstate_to_sigframe(*fpstate, (void __user *)buf_fx, math_size) &lt; 0)</div><div class='ctx'> 		return (void __user *)-1L;</div><div class='ctx'> </div><div class='ctx'> 	return (void __user *)sp;</div><div class='hunk'>@@ -593,6 +594,22 @@ badframe:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int is_ia32_compat_frame(void)</div><div class='add'>+{</div><div class='add'>+	return config_enabled(CONFIG_IA32_EMULATION) &amp;&amp;</div><div class='add'>+	       test_thread_flag(TIF_IA32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is_ia32_frame(void)</div><div class='add'>+{</div><div class='add'>+	return config_enabled(CONFIG_X86_32) || is_ia32_compat_frame();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is_x32_frame(void)</div><div class='add'>+{</div><div class='add'>+	return config_enabled(CONFIG_X86_X32_ABI) &amp;&amp; test_thread_flag(TIF_X32);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -617,6 +634,7 @@ static void</div><div class='ctx'> handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool stepping, failed;</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='ctx'> </div><div class='ctx'> 	/* Are we from a system call? */</div><div class='ctx'> 	if (syscall_get_nr(current, regs) &gt;= 0) {</div><div class='hunk'>@@ -665,8 +683,8 @@ handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Ensure the signal handler starts with the new fpu state.</div><div class='ctx'> 		 */</div><div class='del'>-		if (used_math())</div><div class='del'>-			fpu_reset_state(current);</div><div class='add'>+		if (fpu-&gt;fpstate_active)</div><div class='add'>+			fpu__clear(fpu);</div><div class='ctx'> 	}</div><div class='ctx'> 	signal_setup_done(failed, ksig, stepping);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c<br/>index be8e1bde07aa..15aaa69bbb5e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/smp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/smp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/smp.c</a></div><div class='hunk'>@@ -170,8 +170,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> asmlinkage __visible void smp_reboot_interrupt(void)</div><div class='ctx'> {</div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-	irq_enter();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	stop_this_cpu(NULL);</div><div class='ctx'> 	irq_exit();</div><div class='ctx'> }</div><div class='hunk'>@@ -265,12 +264,6 @@ __visible void smp_reschedule_interrupt(struct pt_regs *regs)</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void smp_entering_irq(void)</div><div class='del'>-{</div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-	irq_enter();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> __visible void smp_trace_reschedule_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -279,7 +272,7 @@ __visible void smp_trace_reschedule_interrupt(struct pt_regs *regs)</div><div class='ctx'> 	 * scheduler_ipi(). This is OK, since those functions are allowed</div><div class='ctx'> 	 * to nest.</div><div class='ctx'> 	 */</div><div class='del'>-	smp_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	trace_reschedule_entry(RESCHEDULE_VECTOR);</div><div class='ctx'> 	__smp_reschedule_interrupt();</div><div class='ctx'> 	trace_reschedule_exit(RESCHEDULE_VECTOR);</div><div class='hunk'>@@ -297,14 +290,14 @@ static inline void __smp_call_function_interrupt(void)</div><div class='ctx'> </div><div class='ctx'> __visible void smp_call_function_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	smp_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	__smp_call_function_interrupt();</div><div class='ctx'> 	exiting_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __visible void smp_trace_call_function_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	smp_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	trace_call_function_entry(CALL_FUNCTION_VECTOR);</div><div class='ctx'> 	__smp_call_function_interrupt();</div><div class='ctx'> 	trace_call_function_exit(CALL_FUNCTION_VECTOR);</div><div class='hunk'>@@ -319,14 +312,14 @@ static inline void __smp_call_function_single_interrupt(void)</div><div class='ctx'> </div><div class='ctx'> __visible void smp_call_function_single_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	smp_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	__smp_call_function_single_interrupt();</div><div class='ctx'> 	exiting_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __visible void smp_trace_call_function_single_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	smp_entering_irq();</div><div class='add'>+	ipi_entering_ack_irq();</div><div class='ctx'> 	trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR);</div><div class='ctx'> 	__smp_call_function_single_interrupt();</div><div class='ctx'> 	trace_call_function_single_exit(CALL_FUNCTION_SINGLE_VECTOR);</div><div class='head'>diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c<br/>index 50e547eac8cd..b1f3ed9c7a9e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/smpboot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/smpboot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/smpboot.c</a></div><div class='hunk'>@@ -68,8 +68,7 @@</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/uv/uv.h&gt;</div><div class='ctx'> #include &lt;linux/mc146818rtc.h&gt;</div><div class='hunk'>@@ -172,11 +171,6 @@ static void smp_callin(void)</div><div class='ctx'> 	apic_ap_setup();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Need to setup vector mappings before we enable interrupts.</div><div class='del'>-	 */</div><div class='del'>-	setup_vector_irq(smp_processor_id());</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Save our processor parameters. Note: this information</div><div class='ctx'> 	 * is needed for clock calibration.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -240,18 +234,13 @@ static void notrace start_secondary(void *unused)</div><div class='ctx'> 	check_tsc_sync_target();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Enable the espfix hack for this CPU</div><div class='del'>-	 */</div><div class='del'>-#ifdef CONFIG_X86_ESPFIX64</div><div class='del'>-	init_espfix_ap();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We need to hold vector_lock so there the set of online cpus</div><div class='del'>-	 * does not change while we are assigning vectors to cpus.  Holding</div><div class='del'>-	 * this lock ensures we don't half assign or remove an irq from a cpu.</div><div class='add'>+	 * Lock vector_lock and initialize the vectors on this cpu</div><div class='add'>+	 * before setting the cpu online. We must set it online with</div><div class='add'>+	 * vector_lock held to prevent a concurrent setup/teardown</div><div class='add'>+	 * from seeing a half valid vector space.</div><div class='ctx'> 	 */</div><div class='ctx'> 	lock_vector_lock();</div><div class='add'>+	setup_vector_irq(smp_processor_id());</div><div class='ctx'> 	set_cpu_online(smp_processor_id(), true);</div><div class='ctx'> 	unlock_vector_lock();</div><div class='ctx'> 	cpu_set_state_online(smp_processor_id());</div><div class='hunk'>@@ -314,10 +303,10 @@ topology_sane(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o, const char *name)</div><div class='ctx'> 		cpu1, name, cpu2, cpu_to_node(cpu1), cpu_to_node(cpu2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define link_mask(_m, c1, c2)						\</div><div class='add'>+#define link_mask(mfunc, c1, c2)					\</div><div class='ctx'> do {									\</div><div class='del'>-	cpumask_set_cpu((c1), cpu_##_m##_mask(c2));			\</div><div class='del'>-	cpumask_set_cpu((c2), cpu_##_m##_mask(c1));			\</div><div class='add'>+	cpumask_set_cpu((c1), mfunc(c2));				\</div><div class='add'>+	cpumask_set_cpu((c2), mfunc(c1));				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)</div><div class='hunk'>@@ -398,9 +387,9 @@ void set_cpu_sibling_map(int cpu)</div><div class='ctx'> 	cpumask_set_cpu(cpu, cpu_sibling_setup_mask);</div><div class='ctx'> </div><div class='ctx'> 	if (!has_mp) {</div><div class='del'>-		cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));</div><div class='add'>+		cpumask_set_cpu(cpu, topology_sibling_cpumask(cpu));</div><div class='ctx'> 		cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu));</div><div class='del'>-		cpumask_set_cpu(cpu, cpu_core_mask(cpu));</div><div class='add'>+		cpumask_set_cpu(cpu, topology_core_cpumask(cpu));</div><div class='ctx'> 		c-&gt;booted_cores = 1;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -409,32 +398,34 @@ void set_cpu_sibling_map(int cpu)</div><div class='ctx'> 		o = &amp;cpu_data(i);</div><div class='ctx'> </div><div class='ctx'> 		if ((i == cpu) || (has_smt &amp;&amp; match_smt(c, o)))</div><div class='del'>-			link_mask(sibling, cpu, i);</div><div class='add'>+			link_mask(topology_sibling_cpumask, cpu, i);</div><div class='ctx'> </div><div class='ctx'> 		if ((i == cpu) || (has_mp &amp;&amp; match_llc(c, o)))</div><div class='del'>-			link_mask(llc_shared, cpu, i);</div><div class='add'>+			link_mask(cpu_llc_shared_mask, cpu, i);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This needs a separate iteration over the cpus because we rely on all</div><div class='del'>-	 * cpu_sibling_mask links to be set-up.</div><div class='add'>+	 * topology_sibling_cpumask links to be set-up.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_cpu(i, cpu_sibling_setup_mask) {</div><div class='ctx'> 		o = &amp;cpu_data(i);</div><div class='ctx'> </div><div class='ctx'> 		if ((i == cpu) || (has_mp &amp;&amp; match_die(c, o))) {</div><div class='del'>-			link_mask(core, cpu, i);</div><div class='add'>+			link_mask(topology_core_cpumask, cpu, i);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 *  Does this new cpu bringup a new core?</div><div class='ctx'> 			 */</div><div class='del'>-			if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {</div><div class='add'>+			if (cpumask_weight(</div><div class='add'>+			    topology_sibling_cpumask(cpu)) == 1) {</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * for each core in package, increment</div><div class='ctx'> 				 * the booted_cores for this new cpu</div><div class='ctx'> 				 */</div><div class='del'>-				if (cpumask_first(cpu_sibling_mask(i)) == i)</div><div class='add'>+				if (cpumask_first(</div><div class='add'>+				    topology_sibling_cpumask(i)) == i)</div><div class='ctx'> 					c-&gt;booted_cores++;</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * increment the core count for all</div><div class='hunk'>@@ -514,6 +505,40 @@ void __inquire_remote_apic(int apicid)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * The Multiprocessor Specification 1.4 (1997) example code suggests</div><div class='add'>+ * that there should be a 10ms delay between the BSP asserting INIT</div><div class='add'>+ * and de-asserting INIT, when starting a remote processor.</div><div class='add'>+ * But that slows boot and resume on modern processors, which include</div><div class='add'>+ * many cores and don't require that delay.</div><div class='add'>+ *</div><div class='add'>+ * Cmdline "init_cpu_udelay=" is available to over-ride this delay.</div><div class='add'>+ * Modern processor families are quirked to remove the delay entirely.</div><div class='add'>+ */</div><div class='add'>+#define UDELAY_10MS_DEFAULT 10000</div><div class='add'>+</div><div class='add'>+static unsigned int init_udelay = UDELAY_10MS_DEFAULT;</div><div class='add'>+</div><div class='add'>+static int __init cpu_init_udelay(char *str)</div><div class='add'>+{</div><div class='add'>+	get_option(&amp;str, &amp;init_udelay);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("cpu_init_udelay", cpu_init_udelay);</div><div class='add'>+</div><div class='add'>+static void __init smp_quirk_init_udelay(void)</div><div class='add'>+{</div><div class='add'>+	/* if cmdline changed it from default, leave it alone */</div><div class='add'>+	if (init_udelay != UDELAY_10MS_DEFAULT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* if modern processor, use no delay */</div><div class='add'>+	if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &amp;&amp; (boot_cpu_data.x86 == 6)) ||</div><div class='add'>+	    ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &amp;&amp; (boot_cpu_data.x86 &gt;= 0xF)))</div><div class='add'>+		init_udelay = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal</div><div class='ctx'>  * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this</div><div class='ctx'>  * won't ... remember to clear down the APIC, etc later.</div><div class='hunk'>@@ -555,7 +580,7 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)</div><div class='ctx'> static int</div><div class='ctx'> wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)</div><div class='ctx'> {</div><div class='del'>-	unsigned long send_status, accept_status = 0;</div><div class='add'>+	unsigned long send_status = 0, accept_status = 0;</div><div class='ctx'> 	int maxlvt, num_starts, j;</div><div class='ctx'> </div><div class='ctx'> 	maxlvt = lapic_get_maxlvt();</div><div class='hunk'>@@ -583,7 +608,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)</div><div class='ctx'> 	pr_debug("Waiting for send to finish...\n");</div><div class='ctx'> 	send_status = safe_apic_wait_icr_idle();</div><div class='ctx'> </div><div class='del'>-	mdelay(10);</div><div class='add'>+	udelay(init_udelay);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Deasserting INIT\n");</div><div class='ctx'> </div><div class='hunk'>@@ -651,6 +676,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)</div><div class='ctx'> 		 * Give the other CPU some time to accept the IPI.</div><div class='ctx'> 		 */</div><div class='ctx'> 		udelay(200);</div><div class='add'>+</div><div class='ctx'> 		if (maxlvt &gt; 3)		/* Due to the Pentium erratum 3AP.  */</div><div class='ctx'> 			apic_write(APIC_ESR, 0);</div><div class='ctx'> 		accept_status = (apic_read(APIC_ESR) &amp; 0xEF);</div><div class='hunk'>@@ -792,8 +818,6 @@ void common_cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 	clear_tsk_thread_flag(idle, TIF_FORK);</div><div class='ctx'> 	initial_gs = per_cpu_offset(cpu);</div><div class='ctx'> #endif</div><div class='del'>-	per_cpu(kernel_stack, cpu) =</div><div class='del'>-		(unsigned long)task_stack_page(idle) + THREAD_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -820,6 +844,13 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)</div><div class='ctx'> 	initial_code = (unsigned long)start_secondary;</div><div class='ctx'> 	stack_start  = idle-&gt;thread.sp;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Enable the espfix hack for this CPU</div><div class='add'>+	*/</div><div class='add'>+#ifdef CONFIG_X86_ESPFIX64</div><div class='add'>+	init_espfix_ap(cpu);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* So we see what's up */</div><div class='ctx'> 	announce_cpu(cpu, apicid);</div><div class='ctx'> </div><div class='hunk'>@@ -961,8 +992,17 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> </div><div class='ctx'> 	common_cpu_up(cpu, tidle);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * We have to walk the irq descriptors to setup the vector</div><div class='add'>+	 * space for the cpu which comes online.  Prevent irq</div><div class='add'>+	 * alloc/free across the bringup.</div><div class='add'>+	 */</div><div class='add'>+	irq_lock_sparse();</div><div class='add'>+</div><div class='ctx'> 	err = do_boot_cpu(apicid, cpu, tidle);</div><div class='add'>+</div><div class='ctx'> 	if (err) {</div><div class='add'>+		irq_unlock_sparse();</div><div class='ctx'> 		pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -980,6 +1020,8 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> 		touch_nmi_watchdog();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	irq_unlock_sparse();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1009,8 +1051,8 @@ static __init void disable_smp(void)</div><div class='ctx'> 		physid_set_mask_of_physid(boot_cpu_physical_apicid, &amp;phys_cpu_present_map);</div><div class='ctx'> 	else</div><div class='ctx'> 		physid_set_mask_of_physid(0, &amp;phys_cpu_present_map);</div><div class='del'>-	cpumask_set_cpu(0, cpu_sibling_mask(0));</div><div class='del'>-	cpumask_set_cpu(0, cpu_core_mask(0));</div><div class='add'>+	cpumask_set_cpu(0, topology_sibling_cpumask(0));</div><div class='add'>+	cpumask_set_cpu(0, topology_core_cpumask(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -1176,6 +1218,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 		uv_system_init();</div><div class='ctx'> </div><div class='ctx'> 	set_mtrr_aps_delayed_init();</div><div class='add'>+</div><div class='add'>+	smp_quirk_init_udelay();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_enable_nonboot_cpus_begin(void)</div><div class='hunk'>@@ -1293,22 +1337,22 @@ static void remove_siblinginfo(int cpu)</div><div class='ctx'> 	int sibling;</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='ctx'> </div><div class='del'>-	for_each_cpu(sibling, cpu_core_mask(cpu)) {</div><div class='del'>-		cpumask_clear_cpu(cpu, cpu_core_mask(sibling));</div><div class='add'>+	for_each_cpu(sibling, topology_core_cpumask(cpu)) {</div><div class='add'>+		cpumask_clear_cpu(cpu, topology_core_cpumask(sibling));</div><div class='ctx'> 		/*/</div><div class='ctx'> 		 * last thread sibling in this cpu core going down</div><div class='ctx'> 		 */</div><div class='del'>-		if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)</div><div class='add'>+		if (cpumask_weight(topology_sibling_cpumask(cpu)) == 1)</div><div class='ctx'> 			cpu_data(sibling).booted_cores--;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_cpu(sibling, cpu_sibling_mask(cpu))</div><div class='del'>-		cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));</div><div class='add'>+	for_each_cpu(sibling, topology_sibling_cpumask(cpu))</div><div class='add'>+		cpumask_clear_cpu(cpu, topology_sibling_cpumask(sibling));</div><div class='ctx'> 	for_each_cpu(sibling, cpu_llc_shared_mask(cpu))</div><div class='ctx'> 		cpumask_clear_cpu(cpu, cpu_llc_shared_mask(sibling));</div><div class='ctx'> 	cpumask_clear(cpu_llc_shared_mask(cpu));</div><div class='del'>-	cpumask_clear(cpu_sibling_mask(cpu));</div><div class='del'>-	cpumask_clear(cpu_core_mask(cpu));</div><div class='add'>+	cpumask_clear(topology_sibling_cpumask(cpu));</div><div class='add'>+	cpumask_clear(topology_core_cpumask(cpu));</div><div class='ctx'> 	c-&gt;phys_proc_id = 0;</div><div class='ctx'> 	c-&gt;cpu_core_id = 0;</div><div class='ctx'> 	cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);</div><div class='head'>diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c<br/>index 324ab5247687..f5791927aa64 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/traps.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/traps.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/traps.c</a></div><div class='hunk'>@@ -54,12 +54,13 @@</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/mach_traps.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xstate.h&gt;</div><div class='add'>+#include &lt;asm/trace/mpx.h&gt;</div><div class='ctx'> #include &lt;asm/mpx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='hunk'>@@ -72,8 +73,7 @@ gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;</div><div class='ctx'> #else</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage int system_call(void);</div><div class='add'>+#include &lt;asm/proto.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Must be page-aligned because the real IDT is used in a fixmap. */</div><div class='hunk'>@@ -371,10 +371,8 @@ dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)</div><div class='ctx'> </div><div class='ctx'> dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-	struct xsave_struct *xsave_buf;</div><div class='ctx'> 	enum ctx_state prev_state;</div><div class='del'>-	struct bndcsr *bndcsr;</div><div class='add'>+	const struct bndcsr *bndcsr;</div><div class='ctx'> 	siginfo_t *info;</div><div class='ctx'> </div><div class='ctx'> 	prev_state = exception_enter();</div><div class='hunk'>@@ -393,15 +391,15 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We need to look at BNDSTATUS to resolve this exception.</div><div class='del'>-	 * It is not directly accessible, though, so we need to</div><div class='del'>-	 * do an xsave and then pull it out of the xsave buffer.</div><div class='add'>+	 * A NULL here might mean that it is in its 'init state',</div><div class='add'>+	 * which is all zeros which indicates MPX was not</div><div class='add'>+	 * responsible for the exception.</div><div class='ctx'> 	 */</div><div class='del'>-	fpu_save_init(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-	xsave_buf = &amp;(tsk-&gt;thread.fpu.state-&gt;xsave);</div><div class='del'>-	bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR);</div><div class='add'>+	bndcsr = get_xsave_field_ptr(XSTATE_BNDCSR);</div><div class='ctx'> 	if (!bndcsr)</div><div class='ctx'> 		goto exit_trap;</div><div class='ctx'> </div><div class='add'>+	trace_bounds_exception_mpx(bndcsr);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The error code field of the BNDSTATUS register communicates status</div><div class='ctx'> 	 * information of a bound range exception #BR or operation involving</div><div class='hunk'>@@ -409,11 +407,11 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (bndcsr-&gt;bndstatus &amp; MPX_BNDSTA_ERROR_CODE) {</div><div class='ctx'> 	case 2:	/* Bound directory has invalid entry. */</div><div class='del'>-		if (mpx_handle_bd_fault(xsave_buf))</div><div class='add'>+		if (mpx_handle_bd_fault())</div><div class='ctx'> 			goto exit_trap;</div><div class='ctx'> 		break; /* Success, it was handled */</div><div class='ctx'> 	case 1: /* Bound violation. */</div><div class='del'>-		info = mpx_generate_siginfo(regs, xsave_buf);</div><div class='add'>+		info = mpx_generate_siginfo(regs);</div><div class='ctx'> 		if (IS_ERR(info)) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * We failed to decode the MPX instruction.  Act as if</div><div class='hunk'>@@ -709,8 +707,8 @@ NOKPROBE_SYMBOL(do_debug);</div><div class='ctx'> static void math_error(struct pt_regs *regs, int error_code, int trapnr)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *task = current;</div><div class='add'>+	struct fpu *fpu = &amp;task-&gt;thread.fpu;</div><div class='ctx'> 	siginfo_t info;</div><div class='del'>-	unsigned short err;</div><div class='ctx'> 	char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :</div><div class='ctx'> 						"simd exception";</div><div class='ctx'> </div><div class='hunk'>@@ -718,8 +716,7 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr)</div><div class='ctx'> 		return;</div><div class='ctx'> 	conditional_sti(regs);</div><div class='ctx'> </div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-	{</div><div class='add'>+	if (!user_mode(regs)) {</div><div class='ctx'> 		if (!fixup_exception(regs)) {</div><div class='ctx'> 			task-&gt;thread.error_code = error_code;</div><div class='ctx'> 			task-&gt;thread.trap_nr = trapnr;</div><div class='hunk'>@@ -731,62 +728,20 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Save the info for the exception handler and clear the error.</div><div class='ctx'> 	 */</div><div class='del'>-	unlazy_fpu(task);</div><div class='del'>-	task-&gt;thread.trap_nr = trapnr;</div><div class='add'>+	fpu__save(fpu);</div><div class='add'>+</div><div class='add'>+	task-&gt;thread.trap_nr	= trapnr;</div><div class='ctx'> 	task-&gt;thread.error_code = error_code;</div><div class='del'>-	info.si_signo = SIGFPE;</div><div class='del'>-	info.si_errno = 0;</div><div class='del'>-	info.si_addr = (void __user *)uprobe_get_trap_addr(regs);</div><div class='del'>-	if (trapnr == X86_TRAP_MF) {</div><div class='del'>-		unsigned short cwd, swd;</div><div class='del'>-		/*</div><div class='del'>-		 * (~cwd &amp; swd) will mask out exceptions that are not set to unmasked</div><div class='del'>-		 * status.  0x3f is the exception bits in these regs, 0x200 is the</div><div class='del'>-		 * C1 reg you need in case of a stack fault, 0x040 is the stack</div><div class='del'>-		 * fault bit.  We should only be taking one exception at a time,</div><div class='del'>-		 * so if this combination doesn't produce any single exception,</div><div class='del'>-		 * then we have a bad program that isn't synchronizing its FPU usage</div><div class='del'>-		 * and it will suffer the consequences since we won't be able to</div><div class='del'>-		 * fully reproduce the context of the exception</div><div class='del'>-		 */</div><div class='del'>-		cwd = get_fpu_cwd(task);</div><div class='del'>-		swd = get_fpu_swd(task);</div><div class='add'>+	info.si_signo		= SIGFPE;</div><div class='add'>+	info.si_errno		= 0;</div><div class='add'>+	info.si_addr		= (void __user *)uprobe_get_trap_addr(regs);</div><div class='ctx'> </div><div class='del'>-		err = swd &amp; ~cwd;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * The SIMD FPU exceptions are handled a little differently, as there</div><div class='del'>-		 * is only a single status/control register.  Thus, to determine which</div><div class='del'>-		 * unmasked exception was caught we must mask the exception mask bits</div><div class='del'>-		 * at 0x1f80, and then use these to mask the exception bits at 0x3f.</div><div class='del'>-		 */</div><div class='del'>-		unsigned short mxcsr = get_fpu_mxcsr(task);</div><div class='del'>-		err = ~(mxcsr &gt;&gt; 7) &amp; mxcsr;</div><div class='del'>-	}</div><div class='add'>+	info.si_code = fpu__exception_code(fpu, trapnr);</div><div class='ctx'> </div><div class='del'>-	if (err &amp; 0x001) {	/* Invalid op */</div><div class='del'>-		/*</div><div class='del'>-		 * swd &amp; 0x240 == 0x040: Stack Underflow</div><div class='del'>-		 * swd &amp; 0x240 == 0x240: Stack Overflow</div><div class='del'>-		 * User must clear the SF bit (0x40) if set</div><div class='del'>-		 */</div><div class='del'>-		info.si_code = FPE_FLTINV;</div><div class='del'>-	} else if (err &amp; 0x004) { /* Divide by Zero */</div><div class='del'>-		info.si_code = FPE_FLTDIV;</div><div class='del'>-	} else if (err &amp; 0x008) { /* Overflow */</div><div class='del'>-		info.si_code = FPE_FLTOVF;</div><div class='del'>-	} else if (err &amp; 0x012) { /* Denormal, Underflow */</div><div class='del'>-		info.si_code = FPE_FLTUND;</div><div class='del'>-	} else if (err &amp; 0x020) { /* Precision */</div><div class='del'>-		info.si_code = FPE_FLTRES;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * If we're using IRQ 13, or supposedly even some trap</div><div class='del'>-		 * X86_TRAP_MF implementations, it's possible</div><div class='del'>-		 * we get a spurious trap, which is not an error.</div><div class='del'>-		 */</div><div class='add'>+	/* Retry when we get spurious exceptions: */</div><div class='add'>+	if (!info.si_code)</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	force_sig_info(SIGFPE, &amp;info, task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -813,62 +768,8 @@ dotraplinkage void</div><div class='ctx'> do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)</div><div class='ctx'> {</div><div class='ctx'> 	conditional_sti(regs);</div><div class='del'>-#if 0</div><div class='del'>-	/* No need to warn about this any longer. */</div><div class='del'>-	pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)</div><div class='del'>-{</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 'math_state_restore()' saves the current math information in the</div><div class='del'>- * old math state array, and gets the new ones from the current task</div><div class='del'>- *</div><div class='del'>- * Careful.. There are problems with IBM-designed IRQ13 behaviour.</div><div class='del'>- * Don't touch unless you *really* know how it works.</div><div class='del'>- *</div><div class='del'>- * Must be called with kernel preemption disabled (eg with local</div><div class='del'>- * local interrupts as in the case of do_device_not_available).</div><div class='del'>- */</div><div class='del'>-void math_state_restore(void)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-</div><div class='del'>-	if (!tsk_used_math(tsk)) {</div><div class='del'>-		local_irq_enable();</div><div class='del'>-		/*</div><div class='del'>-		 * does a slab alloc which can sleep</div><div class='del'>-		 */</div><div class='del'>-		if (init_fpu(tsk)) {</div><div class='del'>-			/*</div><div class='del'>-			 * ran out of memory!</div><div class='del'>-			 */</div><div class='del'>-			do_group_exit(SIGKILL);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		local_irq_disable();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */</div><div class='del'>-	kernel_fpu_disable();</div><div class='del'>-	__thread_fpu_begin(tsk);</div><div class='del'>-	if (unlikely(restore_fpu_checking(tsk))) {</div><div class='del'>-		fpu_reset_state(tsk);</div><div class='del'>-		force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);</div><div class='del'>-	} else {</div><div class='del'>-		tsk-&gt;thread.fpu_counter++;</div><div class='del'>-	}</div><div class='del'>-	kernel_fpu_enable();</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(math_state_restore);</div><div class='del'>-</div><div class='ctx'> dotraplinkage void</div><div class='ctx'> do_device_not_available(struct pt_regs *regs, long error_code)</div><div class='ctx'> {</div><div class='hunk'>@@ -889,7 +790,7 @@ do_device_not_available(struct pt_regs *regs, long error_code)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-	math_state_restore(); /* interrupts still off */</div><div class='add'>+	fpu__restore(&amp;current-&gt;thread.fpu); /* interrupts still off */</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 	conditional_sti(regs);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -992,13 +893,13 @@ void __init trap_init(void)</div><div class='ctx'> 		set_bit(i, used_vectors);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='del'>-	set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);</div><div class='add'>+	set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);</div><div class='ctx'> 	set_bit(IA32_SYSCALL_VECTOR, used_vectors);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-	set_system_trap_gate(SYSCALL_VECTOR, &amp;system_call);</div><div class='del'>-	set_bit(SYSCALL_VECTOR, used_vectors);</div><div class='add'>+	set_system_trap_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);</div><div class='add'>+	set_bit(IA32_SYSCALL_VECTOR, used_vectors);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c<br/>index 505449700e0c..7437b41f6a47 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/tsc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/tsc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/tsc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/tsc.c</a></div><div class='hunk'>@@ -598,10 +598,19 @@ static unsigned long quick_pit_calibrate(void)</div><div class='ctx'> 			if (!pit_expect_msb(0xff-i, &amp;delta, &amp;d2))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			delta -= tsc;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Extrapolate the error and fail fast if the error will</div><div class='add'>+			 * never be below 500 ppm.</div><div class='add'>+			 */</div><div class='add'>+			if (i == 1 &amp;&amp;</div><div class='add'>+			    d1 + d2 &gt;= (delta * MAX_QUICK_PIT_ITERATIONS) &gt;&gt; 11)</div><div class='add'>+				return 0;</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Iterate until the error is less than 500 ppm</div><div class='ctx'> 			 */</div><div class='del'>-			delta -= tsc;</div><div class='ctx'> 			if (d1+d2 &gt;= delta &gt;&gt; 11)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c<br/>index 26488487bc61..dd8d0791dfb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/tsc_sync.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/tsc_sync.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/tsc_sync.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/tsc_sync.c</a></div><div class='hunk'>@@ -113,7 +113,7 @@ static void check_tsc_warp(unsigned int timeout)</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned int loop_timeout(int cpu)</div><div class='ctx'> {</div><div class='del'>-	return (cpumask_weight(cpu_core_mask(cpu)) &gt; 1) ? 2 : 20;</div><div class='add'>+	return (cpumask_weight(topology_core_cpumask(cpu)) &gt; 1) ? 2 : 20;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c<br/>index 0b81ad67da07..66476244731e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/uprobes.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/uprobes.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/uprobes.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/uprobes.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Post-execution fixups. */</div><div class='ctx'> </div><div class='hunk'>@@ -312,11 +313,6 @@ static int uprobe_init_insn(struct arch_uprobe *auprobe, struct insn *insn, bool</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-static inline bool is_64bit_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	return	!config_enabled(CONFIG_IA32_EMULATION) ||</div><div class='del'>-		!(mm-&gt;context.ia32_compat == TIF_IA32);</div><div class='del'>-}</div><div class='ctx'> /*</div><div class='ctx'>  * If arch_uprobe-&gt;insn doesn't use rip-relative addressing, return</div><div class='ctx'>  * immediately.  Otherwise, rewrite the instruction so that it accesses</div><div class='hunk'>@@ -497,10 +493,6 @@ static void riprel_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #else /* 32-bit: */</div><div class='del'>-static inline bool is_64bit_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='ctx'> /*</div><div class='ctx'>  * No RIP-relative addressing on 32-bit</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c<br/>index ee22c1d93ae5..b034b1b14b9c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsmp_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/vsmp_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/vsmp_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/vsmp_64.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ asmlinkage __visible void vsmp_irq_enable(void)</div><div class='ctx'> }</div><div class='ctx'> PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);</div><div class='ctx'> </div><div class='del'>-static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='add'>+static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf,</div><div class='ctx'> 				  unsigned long addr, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	switch (type) {</div><div class='head'>diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c<br/>index 37d8fa4438f0..a0695be19864 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/x8664_ksyms_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/x8664_ksyms_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/x8664_ksyms_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/x8664_ksyms_64.c</a></div><div class='hunk'>@@ -75,7 +75,5 @@ EXPORT_SYMBOL(native_load_gs_index);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> EXPORT_SYMBOL(___preempt_schedule);</div><div class='del'>-#ifdef CONFIG_CONTEXT_TRACKING</div><div class='del'>-EXPORT_SYMBOL(___preempt_schedule_context);</div><div class='del'>-#endif</div><div class='add'>+EXPORT_SYMBOL(___preempt_schedule_notrace);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c<br/>index 234b0722de53..3839628d962e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/x86_init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/x86_init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/x86_init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kernel/x86_init.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='hunk'>@@ -111,11 +110,9 @@ EXPORT_SYMBOL_GPL(x86_platform);</div><div class='ctx'> #if defined(CONFIG_PCI_MSI)</div><div class='ctx'> struct x86_msi_ops x86_msi = {</div><div class='ctx'> 	.setup_msi_irqs		= native_setup_msi_irqs,</div><div class='del'>-	.compose_msi_msg	= native_compose_msi_msg,</div><div class='ctx'> 	.teardown_msi_irq	= native_teardown_msi_irq,</div><div class='ctx'> 	.teardown_msi_irqs	= default_teardown_msi_irqs,</div><div class='ctx'> 	.restore_msi_irqs	= default_restore_msi_irqs,</div><div class='del'>-	.setup_hpet_msi		= default_setup_hpet_msi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MSI arch specific hooks */</div><div class='hunk'>@@ -141,13 +138,6 @@ void arch_restore_msi_irqs(struct pci_dev *dev)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> struct x86_io_apic_ops x86_io_apic_ops = {</div><div class='del'>-	.init			= native_io_apic_init_mappings,</div><div class='ctx'> 	.read			= native_io_apic_read,</div><div class='del'>-	.write			= native_io_apic_write,</div><div class='del'>-	.modify			= native_io_apic_modify,</div><div class='ctx'> 	.disable		= native_disable_io_apic,</div><div class='del'>-	.print_entries		= native_io_apic_print_entries,</div><div class='del'>-	.set_affinity		= native_ioapic_set_affinity,</div><div class='del'>-	.setup_entry		= native_setup_ioapic_entry,</div><div class='del'>-	.eoi_ioapic_pin		= native_eoi_ioapic_pin,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c<br/>deleted file mode 100644<br/>index 87a815b85f3e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/xsave.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kernel/xsave.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,724 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * xsave/xrstor support.</div><div class='del'>- *</div><div class='del'>- * Author: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/bootmem.h&gt;</div><div class='del'>-#include &lt;linux/compat.h&gt;</div><div class='del'>-#include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='del'>-#include &lt;asm/sigframe.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Supported feature mask by the CPU and the kernel.</div><div class='del'>- */</div><div class='del'>-u64 pcntxt_mask;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Represents init state for the supported extended state.</div><div class='del'>- */</div><div class='del'>-struct xsave_struct *init_xstate_buf;</div><div class='del'>-</div><div class='del'>-static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;</div><div class='del'>-static unsigned int *xstate_offsets, *xstate_sizes;</div><div class='del'>-static unsigned int xstate_comp_offsets[sizeof(pcntxt_mask)*8];</div><div class='del'>-static unsigned int xstate_features;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If a processor implementation discern that a processor state component is</div><div class='del'>- * in its initialized state it may modify the corresponding bit in the</div><div class='del'>- * xsave_hdr.xstate_bv as '0', with out modifying the corresponding memory</div><div class='del'>- * layout in the case of xsaveopt. While presenting the xstate information to</div><div class='del'>- * the user, we always ensure that the memory layout of a feature will be in</div><div class='del'>- * the init state if the corresponding header bit is zero. This is to ensure</div><div class='del'>- * that the user doesn't see some stale state in the memory layout during</div><div class='del'>- * signal handling, debugging etc.</div><div class='del'>- */</div><div class='del'>-void __sanitize_i387_state(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	struct i387_fxsave_struct *fx = &amp;tsk-&gt;thread.fpu.state-&gt;fxsave;</div><div class='del'>-	int feature_bit = 0x2;</div><div class='del'>-	u64 xstate_bv;</div><div class='del'>-</div><div class='del'>-	if (!fx)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	xstate_bv = tsk-&gt;thread.fpu.state-&gt;xsave.xsave_hdr.xstate_bv;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * None of the feature bits are in init state. So nothing else</div><div class='del'>-	 * to do for us, as the memory layout is up to date.</div><div class='del'>-	 */</div><div class='del'>-	if ((xstate_bv &amp; pcntxt_mask) == pcntxt_mask)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * FP is in init state</div><div class='del'>-	 */</div><div class='del'>-	if (!(xstate_bv &amp; XSTATE_FP)) {</div><div class='del'>-		fx-&gt;cwd = 0x37f;</div><div class='del'>-		fx-&gt;swd = 0;</div><div class='del'>-		fx-&gt;twd = 0;</div><div class='del'>-		fx-&gt;fop = 0;</div><div class='del'>-		fx-&gt;rip = 0;</div><div class='del'>-		fx-&gt;rdp = 0;</div><div class='del'>-		memset(&amp;fx-&gt;st_space[0], 0, 128);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * SSE is in init state</div><div class='del'>-	 */</div><div class='del'>-	if (!(xstate_bv &amp; XSTATE_SSE))</div><div class='del'>-		memset(&amp;fx-&gt;xmm_space[0], 0, 256);</div><div class='del'>-</div><div class='del'>-	xstate_bv = (pcntxt_mask &amp; ~xstate_bv) &gt;&gt; 2;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update all the other memory layouts for which the corresponding</div><div class='del'>-	 * header bit is in the init state.</div><div class='del'>-	 */</div><div class='del'>-	while (xstate_bv) {</div><div class='del'>-		if (xstate_bv &amp; 0x1) {</div><div class='del'>-			int offset = xstate_offsets[feature_bit];</div><div class='del'>-			int size = xstate_sizes[feature_bit];</div><div class='del'>-</div><div class='del'>-			memcpy(((void *) fx) + offset,</div><div class='del'>-			       ((void *) init_xstate_buf) + offset,</div><div class='del'>-			       size);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		xstate_bv &gt;&gt;= 1;</div><div class='del'>-		feature_bit++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check for the presence of extended state information in the</div><div class='del'>- * user fpstate pointer in the sigcontext.</div><div class='del'>- */</div><div class='del'>-static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,</div><div class='del'>-				   void __user *fpstate,</div><div class='del'>-				   struct _fpx_sw_bytes *fx_sw)</div><div class='del'>-{</div><div class='del'>-	int min_xstate_size = sizeof(struct i387_fxsave_struct) +</div><div class='del'>-			      sizeof(struct xsave_hdr_struct);</div><div class='del'>-	unsigned int magic2;</div><div class='del'>-</div><div class='del'>-	if (__copy_from_user(fx_sw, &amp;buf-&gt;sw_reserved[0], sizeof(*fx_sw)))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/* Check for the first magic field and other error scenarios. */</div><div class='del'>-	if (fx_sw-&gt;magic1 != FP_XSTATE_MAGIC1 ||</div><div class='del'>-	    fx_sw-&gt;xstate_size &lt; min_xstate_size ||</div><div class='del'>-	    fx_sw-&gt;xstate_size &gt; xstate_size ||</div><div class='del'>-	    fx_sw-&gt;xstate_size &gt; fx_sw-&gt;extended_size)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check for the presence of second magic word at the end of memory</div><div class='del'>-	 * layout. This detects the case where the user just copied the legacy</div><div class='del'>-	 * fpstate layout with out copying the extended state information</div><div class='del'>-	 * in the memory layout.</div><div class='del'>-	 */</div><div class='del'>-	if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw-&gt;xstate_size))</div><div class='del'>-	    || magic2 != FP_XSTATE_MAGIC2)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Signal frame handlers.</div><div class='del'>- */</div><div class='del'>-static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)</div><div class='del'>-{</div><div class='del'>-	if (use_fxsr()) {</div><div class='del'>-		struct xsave_struct *xsave = &amp;tsk-&gt;thread.fpu.state-&gt;xsave;</div><div class='del'>-		struct user_i387_ia32_struct env;</div><div class='del'>-		struct _fpstate_ia32 __user *fp = buf;</div><div class='del'>-</div><div class='del'>-		convert_from_fxsr(&amp;env, tsk);</div><div class='del'>-</div><div class='del'>-		if (__copy_to_user(buf, &amp;env, sizeof(env)) ||</div><div class='del'>-		    __put_user(xsave-&gt;i387.swd, &amp;fp-&gt;status) ||</div><div class='del'>-		    __put_user(X86_FXSR_MAGIC, &amp;fp-&gt;magic))</div><div class='del'>-			return -1;</div><div class='del'>-	} else {</div><div class='del'>-		struct i387_fsave_struct __user *fp = buf;</div><div class='del'>-		u32 swd;</div><div class='del'>-		if (__get_user(swd, &amp;fp-&gt;swd) || __put_user(swd, &amp;fp-&gt;status))</div><div class='del'>-			return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int save_xstate_epilog(void __user *buf, int ia32_frame)</div><div class='del'>-{</div><div class='del'>-	struct xsave_struct __user *x = buf;</div><div class='del'>-	struct _fpx_sw_bytes *sw_bytes;</div><div class='del'>-	u32 xstate_bv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Setup the bytes not touched by the [f]xsave and reserved for SW. */</div><div class='del'>-	sw_bytes = ia32_frame ? &amp;fx_sw_reserved_ia32 : &amp;fx_sw_reserved;</div><div class='del'>-	err = __copy_to_user(&amp;x-&gt;i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));</div><div class='del'>-</div><div class='del'>-	if (!use_xsave())</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Read the xstate_bv which we copied (directly from the cpu or</div><div class='del'>-	 * from the state in task struct) to the user buffers.</div><div class='del'>-	 */</div><div class='del'>-	err |= __get_user(xstate_bv, (__u32 *)&amp;x-&gt;xsave_hdr.xstate_bv);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For legacy compatible, we always set FP/SSE bits in the bit</div><div class='del'>-	 * vector while saving the state to the user context. This will</div><div class='del'>-	 * enable us capturing any changes(during sigreturn) to</div><div class='del'>-	 * the FP/SSE bits by the legacy applications which don't touch</div><div class='del'>-	 * xstate_bv in the xsave header.</div><div class='del'>-	 *</div><div class='del'>-	 * xsave aware apps can change the xstate_bv in the xsave</div><div class='del'>-	 * header as well as change any contents in the memory layout.</div><div class='del'>-	 * xrestore as part of sigreturn will capture all the changes.</div><div class='del'>-	 */</div><div class='del'>-	xstate_bv |= XSTATE_FPSSE;</div><div class='del'>-</div><div class='del'>-	err |= __put_user(xstate_bv, (__u32 *)&amp;x-&gt;xsave_hdr.xstate_bv);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int save_user_xstate(struct xsave_struct __user *buf)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (use_xsave())</div><div class='del'>-		err = xsave_user(buf);</div><div class='del'>-	else if (use_fxsr())</div><div class='del'>-		err = fxsave_user((struct i387_fxsave_struct __user *) buf);</div><div class='del'>-	else</div><div class='del'>-		err = fsave_user((struct i387_fsave_struct __user *) buf);</div><div class='del'>-</div><div class='del'>-	if (unlikely(err) &amp;&amp; __clear_user(buf, xstate_size))</div><div class='del'>-		err = -EFAULT;</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Save the fpu, extended register state to the user signal frame.</div><div class='del'>- *</div><div class='del'>- * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save</div><div class='del'>- *  state is copied.</div><div class='del'>- *  'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.</div><div class='del'>- *</div><div class='del'>- *	buf == buf_fx for 64-bit frames and 32-bit fsave frame.</div><div class='del'>- *	buf != buf_fx for 32-bit frames with fxstate.</div><div class='del'>- *</div><div class='del'>- * If the fpu, extended register state is live, save the state directly</div><div class='del'>- * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,</div><div class='del'>- * copy the thread's fpu state to the user frame starting at 'buf_fx'.</div><div class='del'>- *</div><div class='del'>- * If this is a 32-bit frame with fxstate, put a fsave header before</div><div class='del'>- * the aligned state at 'buf_fx'.</div><div class='del'>- *</div><div class='del'>- * For [f]xsave state, update the SW reserved fields in the [f]xsave frame</div><div class='del'>- * indicating the absence/presence of the extended state to the user.</div><div class='del'>- */</div><div class='del'>-int save_xstate_sig(void __user *buf, void __user *buf_fx, int size)</div><div class='del'>-{</div><div class='del'>-	struct xsave_struct *xsave = &amp;current-&gt;thread.fpu.state-&gt;xsave;</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-	int ia32_fxstate = (buf != buf_fx);</div><div class='del'>-</div><div class='del'>-	ia32_fxstate &amp;= (config_enabled(CONFIG_X86_32) ||</div><div class='del'>-			 config_enabled(CONFIG_IA32_EMULATION));</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_WRITE, buf, size))</div><div class='del'>-		return -EACCES;</div><div class='del'>-</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='del'>-		return fpregs_soft_get(current, NULL, 0,</div><div class='del'>-			sizeof(struct user_i387_ia32_struct), NULL,</div><div class='del'>-			(struct _fpstate_ia32 __user *) buf) ? -1 : 1;</div><div class='del'>-</div><div class='del'>-	if (user_has_fpu()) {</div><div class='del'>-		/* Save the live register state to the user directly. */</div><div class='del'>-		if (save_user_xstate(buf_fx))</div><div class='del'>-			return -1;</div><div class='del'>-		/* Update the thread's fxstate to save the fsave header. */</div><div class='del'>-		if (ia32_fxstate)</div><div class='del'>-			fpu_fxsave(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-	} else {</div><div class='del'>-		sanitize_i387_state(tsk);</div><div class='del'>-		if (__copy_to_user(buf_fx, xsave, xstate_size))</div><div class='del'>-			return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Save the fsave header for the 32-bit frames. */</div><div class='del'>-	if ((ia32_fxstate || !use_fxsr()) &amp;&amp; save_fsave_header(tsk, buf))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (use_fxsr() &amp;&amp; save_xstate_epilog(buf_fx, ia32_fxstate))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-sanitize_restored_xstate(struct task_struct *tsk,</div><div class='del'>-			 struct user_i387_ia32_struct *ia32_env,</div><div class='del'>-			 u64 xstate_bv, int fx_only)</div><div class='del'>-{</div><div class='del'>-	struct xsave_struct *xsave = &amp;tsk-&gt;thread.fpu.state-&gt;xsave;</div><div class='del'>-	struct xsave_hdr_struct *xsave_hdr = &amp;xsave-&gt;xsave_hdr;</div><div class='del'>-</div><div class='del'>-	if (use_xsave()) {</div><div class='del'>-		/* These bits must be zero. */</div><div class='del'>-		memset(xsave_hdr-&gt;reserved, 0, 48);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Init the state that is not present in the memory</div><div class='del'>-		 * layout and not enabled by the OS.</div><div class='del'>-		 */</div><div class='del'>-		if (fx_only)</div><div class='del'>-			xsave_hdr-&gt;xstate_bv = XSTATE_FPSSE;</div><div class='del'>-		else</div><div class='del'>-			xsave_hdr-&gt;xstate_bv &amp;= (pcntxt_mask &amp; xstate_bv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (use_fxsr()) {</div><div class='del'>-		/*</div><div class='del'>-		 * mscsr reserved bits must be masked to zero for security</div><div class='del'>-		 * reasons.</div><div class='del'>-		 */</div><div class='del'>-		xsave-&gt;i387.mxcsr &amp;= mxcsr_feature_mask;</div><div class='del'>-</div><div class='del'>-		convert_to_fxsr(tsk, ia32_env);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restore the extended state if present. Otherwise, restore the FP/SSE state.</div><div class='del'>- */</div><div class='del'>-static inline int restore_user_xstate(void __user *buf, u64 xbv, int fx_only)</div><div class='del'>-{</div><div class='del'>-	if (use_xsave()) {</div><div class='del'>-		if ((unsigned long)buf % 64 || fx_only) {</div><div class='del'>-			u64 init_bv = pcntxt_mask &amp; ~XSTATE_FPSSE;</div><div class='del'>-			xrstor_state(init_xstate_buf, init_bv);</div><div class='del'>-			return fxrstor_user(buf);</div><div class='del'>-		} else {</div><div class='del'>-			u64 init_bv = pcntxt_mask &amp; ~xbv;</div><div class='del'>-			if (unlikely(init_bv))</div><div class='del'>-				xrstor_state(init_xstate_buf, init_bv);</div><div class='del'>-			return xrestore_user(buf, xbv);</div><div class='del'>-		}</div><div class='del'>-	} else if (use_fxsr()) {</div><div class='del'>-		return fxrstor_user(buf);</div><div class='del'>-	} else</div><div class='del'>-		return frstor_user(buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)</div><div class='del'>-{</div><div class='del'>-	int ia32_fxstate = (buf != buf_fx);</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-	int state_size = xstate_size;</div><div class='del'>-	u64 xstate_bv = 0;</div><div class='del'>-	int fx_only = 0;</div><div class='del'>-</div><div class='del'>-	ia32_fxstate &amp;= (config_enabled(CONFIG_X86_32) ||</div><div class='del'>-			 config_enabled(CONFIG_IA32_EMULATION));</div><div class='del'>-</div><div class='del'>-	if (!buf) {</div><div class='del'>-		fpu_reset_state(tsk);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_READ, buf, size))</div><div class='del'>-		return -EACCES;</div><div class='del'>-</div><div class='del'>-	if (!used_math() &amp;&amp; init_fpu(tsk))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_FPU))</div><div class='del'>-		return fpregs_soft_set(current, NULL,</div><div class='del'>-				       0, sizeof(struct user_i387_ia32_struct),</div><div class='del'>-				       NULL, buf) != 0;</div><div class='del'>-</div><div class='del'>-	if (use_xsave()) {</div><div class='del'>-		struct _fpx_sw_bytes fx_sw_user;</div><div class='del'>-		if (unlikely(check_for_xstate(buf_fx, buf_fx, &amp;fx_sw_user))) {</div><div class='del'>-			/*</div><div class='del'>-			 * Couldn't find the extended state information in the</div><div class='del'>-			 * memory layout. Restore just the FP/SSE and init all</div><div class='del'>-			 * the other extended state.</div><div class='del'>-			 */</div><div class='del'>-			state_size = sizeof(struct i387_fxsave_struct);</div><div class='del'>-			fx_only = 1;</div><div class='del'>-		} else {</div><div class='del'>-			state_size = fx_sw_user.xstate_size;</div><div class='del'>-			xstate_bv = fx_sw_user.xstate_bv;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ia32_fxstate) {</div><div class='del'>-		/*</div><div class='del'>-		 * For 32-bit frames with fxstate, copy the user state to the</div><div class='del'>-		 * thread's fpu state, reconstruct fxstate from the fsave</div><div class='del'>-		 * header. Sanitize the copied state etc.</div><div class='del'>-		 */</div><div class='del'>-		struct fpu *fpu = &amp;tsk-&gt;thread.fpu;</div><div class='del'>-		struct user_i387_ia32_struct env;</div><div class='del'>-		int err = 0;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Drop the current fpu which clears used_math(). This ensures</div><div class='del'>-		 * that any context-switch during the copy of the new state,</div><div class='del'>-		 * avoids the intermediate state from getting restored/saved.</div><div class='del'>-		 * Thus avoiding the new restored state from getting corrupted.</div><div class='del'>-		 * We will be ready to restore/save the state only after</div><div class='del'>-		 * set_used_math() is again set.</div><div class='del'>-		 */</div><div class='del'>-		drop_fpu(tsk);</div><div class='del'>-</div><div class='del'>-		if (__copy_from_user(&amp;fpu-&gt;state-&gt;xsave, buf_fx, state_size) ||</div><div class='del'>-		    __copy_from_user(&amp;env, buf, sizeof(env))) {</div><div class='del'>-			fpu_finit(fpu);</div><div class='del'>-			err = -1;</div><div class='del'>-		} else {</div><div class='del'>-			sanitize_restored_xstate(tsk, &amp;env, xstate_bv, fx_only);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		set_used_math();</div><div class='del'>-		if (use_eager_fpu()) {</div><div class='del'>-			preempt_disable();</div><div class='del'>-			math_state_restore();</div><div class='del'>-			preempt_enable();</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return err;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * For 64-bit frames and 32-bit fsave frames, restore the user</div><div class='del'>-		 * state to the registers directly (with exceptions handled).</div><div class='del'>-		 */</div><div class='del'>-		user_fpu_begin();</div><div class='del'>-		if (restore_user_xstate(buf_fx, xstate_bv, fx_only)) {</div><div class='del'>-			fpu_reset_state(tsk);</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Prepare the SW reserved portion of the fxsave memory layout, indicating</div><div class='del'>- * the presence of the extended state information in the memory layout</div><div class='del'>- * pointed by the fpstate pointer in the sigcontext.</div><div class='del'>- * This will be saved when ever the FP and extended state context is</div><div class='del'>- * saved on the user stack during the signal handler delivery to the user.</div><div class='del'>- */</div><div class='del'>-static void prepare_fx_sw_frame(void)</div><div class='del'>-{</div><div class='del'>-	int fsave_header_size = sizeof(struct i387_fsave_struct);</div><div class='del'>-	int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;</div><div class='del'>-</div><div class='del'>-	if (config_enabled(CONFIG_X86_32))</div><div class='del'>-		size += fsave_header_size;</div><div class='del'>-</div><div class='del'>-	fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;</div><div class='del'>-	fx_sw_reserved.extended_size = size;</div><div class='del'>-	fx_sw_reserved.xstate_bv = pcntxt_mask;</div><div class='del'>-	fx_sw_reserved.xstate_size = xstate_size;</div><div class='del'>-</div><div class='del'>-	if (config_enabled(CONFIG_IA32_EMULATION)) {</div><div class='del'>-		fx_sw_reserved_ia32 = fx_sw_reserved;</div><div class='del'>-		fx_sw_reserved_ia32.extended_size += fsave_header_size;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable the extended processor state save/restore feature</div><div class='del'>- */</div><div class='del'>-static inline void xstate_enable(void)</div><div class='del'>-{</div><div class='del'>-	cr4_set_bits(X86_CR4_OSXSAVE);</div><div class='del'>-	xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Record the offsets and sizes of different state managed by the xsave</div><div class='del'>- * memory layout.</div><div class='del'>- */</div><div class='del'>-static void __init setup_xstate_features(void)</div><div class='del'>-{</div><div class='del'>-	int eax, ebx, ecx, edx, leaf = 0x2;</div><div class='del'>-</div><div class='del'>-	xstate_features = fls64(pcntxt_mask);</div><div class='del'>-	xstate_offsets = alloc_bootmem(xstate_features * sizeof(int));</div><div class='del'>-	xstate_sizes = alloc_bootmem(xstate_features * sizeof(int));</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		cpuid_count(XSTATE_CPUID, leaf, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-</div><div class='del'>-		if (eax == 0)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		xstate_offsets[leaf] = ebx;</div><div class='del'>-		xstate_sizes[leaf] = eax;</div><div class='del'>-</div><div class='del'>-		leaf++;</div><div class='del'>-	} while (1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function sets up offsets and sizes of all extended states in</div><div class='del'>- * xsave area. This supports both standard format and compacted format</div><div class='del'>- * of the xsave aread.</div><div class='del'>- *</div><div class='del'>- * Input: void</div><div class='del'>- * Output: void</div><div class='del'>- */</div><div class='del'>-void setup_xstate_comp(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int xstate_comp_sizes[sizeof(pcntxt_mask)*8];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The FP xstates and SSE xstates are legacy states. They are always</div><div class='del'>-	 * in the fixed offsets in the xsave area in either compacted form</div><div class='del'>-	 * or standard form.</div><div class='del'>-	 */</div><div class='del'>-	xstate_comp_offsets[0] = 0;</div><div class='del'>-	xstate_comp_offsets[1] = offsetof(struct i387_fxsave_struct, xmm_space);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsaves) {</div><div class='del'>-		for (i = 2; i &lt; xstate_features; i++) {</div><div class='del'>-			if (test_bit(i, (unsigned long *)&amp;pcntxt_mask)) {</div><div class='del'>-				xstate_comp_offsets[i] = xstate_offsets[i];</div><div class='del'>-				xstate_comp_sizes[i] = xstate_sizes[i];</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;</div><div class='del'>-</div><div class='del'>-	for (i = 2; i &lt; xstate_features; i++) {</div><div class='del'>-		if (test_bit(i, (unsigned long *)&amp;pcntxt_mask))</div><div class='del'>-			xstate_comp_sizes[i] = xstate_sizes[i];</div><div class='del'>-		else</div><div class='del'>-			xstate_comp_sizes[i] = 0;</div><div class='del'>-</div><div class='del'>-		if (i &gt; 2)</div><div class='del'>-			xstate_comp_offsets[i] = xstate_comp_offsets[i-1]</div><div class='del'>-					+ xstate_comp_sizes[i-1];</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * setup the xstate image representing the init state</div><div class='del'>- */</div><div class='del'>-static void __init setup_init_fpu_buf(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Setup init_xstate_buf to represent the init state of</div><div class='del'>-	 * all the features managed by the xsave</div><div class='del'>-	 */</div><div class='del'>-	init_xstate_buf = alloc_bootmem_align(xstate_size,</div><div class='del'>-					      __alignof__(struct xsave_struct));</div><div class='del'>-	fx_finit(&amp;init_xstate_buf-&gt;i387);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsave)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	setup_xstate_features();</div><div class='del'>-</div><div class='del'>-	if (cpu_has_xsaves) {</div><div class='del'>-		init_xstate_buf-&gt;xsave_hdr.xcomp_bv =</div><div class='del'>-						(u64)1 &lt;&lt; 63 | pcntxt_mask;</div><div class='del'>-		init_xstate_buf-&gt;xsave_hdr.xstate_bv = pcntxt_mask;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Init all the features state with header_bv being 0x0</div><div class='del'>-	 */</div><div class='del'>-	xrstor_state_booting(init_xstate_buf, -1);</div><div class='del'>-	/*</div><div class='del'>-	 * Dump the init state again. This is to identify the init state</div><div class='del'>-	 * of any feature which is not represented by all zero's.</div><div class='del'>-	 */</div><div class='del'>-	xsave_state_booting(init_xstate_buf, -1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;</div><div class='del'>-static int __init eager_fpu_setup(char *s)</div><div class='del'>-{</div><div class='del'>-	if (!strcmp(s, "on"))</div><div class='del'>-		eagerfpu = ENABLE;</div><div class='del'>-	else if (!strcmp(s, "off"))</div><div class='del'>-		eagerfpu = DISABLE;</div><div class='del'>-	else if (!strcmp(s, "auto"))</div><div class='del'>-		eagerfpu = AUTO;</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("eagerfpu=", eager_fpu_setup);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculate total size of enabled xstates in XCR0/pcntxt_mask.</div><div class='del'>- */</div><div class='del'>-static void __init init_xstate_size(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int eax, ebx, ecx, edx;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsaves) {</div><div class='del'>-		cpuid_count(XSTATE_CPUID, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-		xstate_size = ebx;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;</div><div class='del'>-	for (i = 2; i &lt; 64; i++) {</div><div class='del'>-		if (test_bit(i, (unsigned long *)&amp;pcntxt_mask)) {</div><div class='del'>-			cpuid_count(XSTATE_CPUID, i, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-			xstate_size += eax;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable and initialize the xsave feature.</div><div class='del'>- */</div><div class='del'>-static void __init xstate_enable_boot_cpu(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int eax, ebx, ecx, edx;</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_data.cpuid_level &lt; XSTATE_CPUID) {</div><div class='del'>-		WARN(1, KERN_ERR "XSTATE_CPUID missing\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cpuid_count(XSTATE_CPUID, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-	pcntxt_mask = eax + ((u64)edx &lt;&lt; 32);</div><div class='del'>-</div><div class='del'>-	if ((pcntxt_mask &amp; XSTATE_FPSSE) != XSTATE_FPSSE) {</div><div class='del'>-		pr_err("FP/SSE not shown under xsave features 0x%llx\n",</div><div class='del'>-		       pcntxt_mask);</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Support only the state known to OS.</div><div class='del'>-	 */</div><div class='del'>-	pcntxt_mask = pcntxt_mask &amp; XCNTXT_MASK;</div><div class='del'>-</div><div class='del'>-	xstate_enable();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Recompute the context size for enabled features</div><div class='del'>-	 */</div><div class='del'>-	init_xstate_size();</div><div class='del'>-</div><div class='del'>-	update_regset_xstate_info(xstate_size, pcntxt_mask);</div><div class='del'>-	prepare_fx_sw_frame();</div><div class='del'>-	setup_init_fpu_buf();</div><div class='del'>-</div><div class='del'>-	/* Auto enable eagerfpu for xsaveopt */</div><div class='del'>-	if (cpu_has_xsaveopt &amp;&amp; eagerfpu != DISABLE)</div><div class='del'>-		eagerfpu = ENABLE;</div><div class='del'>-</div><div class='del'>-	if (pcntxt_mask &amp; XSTATE_EAGER) {</div><div class='del'>-		if (eagerfpu == DISABLE) {</div><div class='del'>-			pr_err("eagerfpu not present, disabling some xstate features: 0x%llx\n",</div><div class='del'>-					pcntxt_mask &amp; XSTATE_EAGER);</div><div class='del'>-			pcntxt_mask &amp;= ~XSTATE_EAGER;</div><div class='del'>-		} else {</div><div class='del'>-			eagerfpu = ENABLE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_info("enabled xstate_bv 0x%llx, cntxt size 0x%x using %s\n",</div><div class='del'>-		pcntxt_mask, xstate_size,</div><div class='del'>-		cpu_has_xsaves ? "compacted form" : "standard form");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For the very first instance, this calls xstate_enable_boot_cpu();</div><div class='del'>- * for all subsequent instances, this calls xstate_enable().</div><div class='del'>- *</div><div class='del'>- * This is somewhat obfuscated due to the lack of powerful enough</div><div class='del'>- * overrides for the section checks.</div><div class='del'>- */</div><div class='del'>-void xsave_init(void)</div><div class='del'>-{</div><div class='del'>-	static __refdata void (*next_func)(void) = xstate_enable_boot_cpu;</div><div class='del'>-	void (*this_func)(void);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_xsave)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	this_func = next_func;</div><div class='del'>-	next_func = xstate_enable;</div><div class='del'>-	this_func();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * setup_init_fpu_buf() is __init and it is OK to call it here because</div><div class='del'>- * init_xstate_buf will be unset only once during boot.</div><div class='del'>- */</div><div class='del'>-void __init_refok eager_fpu_init(void)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(used_math());</div><div class='del'>-	current_thread_info()-&gt;status = 0;</div><div class='del'>-</div><div class='del'>-	if (eagerfpu == ENABLE)</div><div class='del'>-		setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_eager_fpu) {</div><div class='del'>-		stts();</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!init_xstate_buf)</div><div class='del'>-		setup_init_fpu_buf();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Given the xsave area and a state inside, this function returns the</div><div class='del'>- * address of the state.</div><div class='del'>- *</div><div class='del'>- * This is the API that is called to get xstate address in either</div><div class='del'>- * standard format or compacted format of xsave area.</div><div class='del'>- *</div><div class='del'>- * Inputs:</div><div class='del'>- *	xsave: base address of the xsave area;</div><div class='del'>- *	xstate: state which is defined in xsave.h (e.g. XSTATE_FP, XSTATE_SSE,</div><div class='del'>- *	etc.)</div><div class='del'>- * Output:</div><div class='del'>- *	address of the state in the xsave area.</div><div class='del'>- */</div><div class='del'>-void *get_xsave_addr(struct xsave_struct *xsave, int xstate)</div><div class='del'>-{</div><div class='del'>-	int feature = fls64(xstate) - 1;</div><div class='del'>-	if (!test_bit(feature, (unsigned long *)&amp;pcntxt_mask))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return (void *)xsave + xstate_comp_offsets[feature];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(get_xsave_addr);</div><div class='head'>diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig<br/>index 413a7bf9efbb..d8a1d56276e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/Kconfig</a></div><div class='hunk'>@@ -86,15 +86,16 @@ config KVM_MMU_AUDIT</div><div class='ctx'> 	 auditing of KVM MMU events at runtime.</div><div class='ctx'> </div><div class='ctx'> config KVM_DEVICE_ASSIGNMENT</div><div class='del'>-	bool "KVM legacy PCI device assignment support"</div><div class='add'>+	bool "KVM legacy PCI device assignment support (DEPRECATED)"</div><div class='ctx'> 	depends on KVM &amp;&amp; PCI &amp;&amp; IOMMU_API</div><div class='del'>-	default y</div><div class='add'>+	default n</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Provide support for legacy PCI device assignment through KVM.  The</div><div class='ctx'> 	  kernel now also supports a full featured userspace device driver</div><div class='del'>-	  framework through VFIO, which supersedes much of this support.</div><div class='add'>+	  framework through VFIO, which supersedes this support and provides</div><div class='add'>+	  better security.</div><div class='ctx'> </div><div class='del'>-	  If unsure, say Y.</div><div class='add'>+	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> # OK, it's a little counter-intuitive to do this, but it puts it neatly under</div><div class='ctx'> # the virtualization menu.</div><div class='head'>diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile<br/>index 16e8f962eaad..67d215cb8953 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/Makefile</a></div><div class='hunk'>@@ -12,10 +12,10 @@ kvm-y			+= $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \</div><div class='ctx'> kvm-$(CONFIG_KVM_ASYNC_PF)	+= $(KVM)/async_pf.o</div><div class='ctx'> </div><div class='ctx'> kvm-y			+= x86.o mmu.o emulate.o i8259.o irq.o lapic.o \</div><div class='del'>-			   i8254.o ioapic.o irq_comm.o cpuid.o pmu.o</div><div class='add'>+			   i8254.o ioapic.o irq_comm.o cpuid.o pmu.o mtrr.o</div><div class='ctx'> kvm-$(CONFIG_KVM_DEVICE_ASSIGNMENT)	+= assigned-dev.o iommu.o</div><div class='del'>-kvm-intel-y		+= vmx.o</div><div class='del'>-kvm-amd-y		+= svm.o</div><div class='add'>+kvm-intel-y		+= vmx.o pmu_intel.o</div><div class='add'>+kvm-amd-y		+= svm.o pmu_amd.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KVM)	+= kvm.o</div><div class='ctx'> obj-$(CONFIG_KVM_INTEL)	+= kvm-intel.o</div><div class='head'>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c<br/>index 1d08ad3582d0..2fbea2544f24 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/cpuid.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/cpuid.c</a></div><div class='hunk'>@@ -16,14 +16,14 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt; /* For use_eager_fpu.  Ugh! */</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt; /* For use_eager_fpu.  Ugh! */</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt; /* For use_eager_fpu.  Ugh! */</div><div class='ctx'> #include &lt;asm/user.h&gt;</div><div class='del'>-#include &lt;asm/xsave.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xstate.h&gt;</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "lapic.h"</div><div class='ctx'> #include "mmu.h"</div><div class='ctx'> #include "trace.h"</div><div class='add'>+#include "pmu.h"</div><div class='ctx'> </div><div class='ctx'> static u32 xstate_required_size(u64 xstate_bv, bool compacted)</div><div class='ctx'> {</div><div class='hunk'>@@ -97,7 +97,9 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (best &amp;&amp; (best-&gt;eax &amp; (F(XSAVES) | F(XSAVEC))))</div><div class='ctx'> 		best-&gt;ebx = xstate_required_size(vcpu-&gt;arch.xcr0, true);</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.eager_fpu = guest_cpuid_has_mpx(vcpu);</div><div class='add'>+	vcpu-&gt;arch.eager_fpu = use_eager_fpu() || guest_cpuid_has_mpx(vcpu);</div><div class='add'>+	if (vcpu-&gt;arch.eager_fpu)</div><div class='add'>+		kvm_x86_ops-&gt;fpu_activate(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The existing code assumes virtual address is 48-bit in the canonical</div><div class='hunk'>@@ -111,7 +113,7 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* Update physical-address width */</div><div class='ctx'> 	vcpu-&gt;arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);</div><div class='ctx'> </div><div class='del'>-	kvm_pmu_cpuid_update(vcpu);</div><div class='add'>+	kvm_pmu_refresh(vcpu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -415,6 +417,12 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case 6: /* Thermal management */</div><div class='add'>+		entry-&gt;eax = 0x4; /* allow ARAT */</div><div class='add'>+		entry-&gt;ebx = 0;</div><div class='add'>+		entry-&gt;ecx = 0;</div><div class='add'>+		entry-&gt;edx = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	case 7: {</div><div class='ctx'> 		entry-&gt;flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;</div><div class='ctx'> 		/* Mask ebx against host capability word 9 */</div><div class='hunk'>@@ -591,7 +599,6 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3: /* Processor serial number */</div><div class='ctx'> 	case 5: /* MONITOR/MWAIT */</div><div class='del'>-	case 6: /* Thermal management */</div><div class='ctx'> 	case 0xC0000002:</div><div class='ctx'> 	case 0xC0000003:</div><div class='ctx'> 	case 0xC0000004:</div><div class='head'>diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h<br/>index 496b3695d3d3..dd05b9cef6ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/cpuid.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/cpuid.h</a></div><div class='hunk'>@@ -70,6 +70,14 @@ static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return best &amp;&amp; (best-&gt;ebx &amp; bit(X86_FEATURE_FSGSBASE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool guest_cpuid_has_longmode(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_cpuid_entry2 *best;</div><div class='add'>+</div><div class='add'>+	best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);</div><div class='add'>+	return best &amp;&amp; (best-&gt;edx &amp; bit(X86_FEATURE_LM));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool guest_cpuid_has_osvw(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpuid_entry2 *best;</div><div class='head'>diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c<br/>index 630bcb0d7a04..e7a4fde5d631 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/emulate.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/emulate.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/emulate.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_emulate.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='add'>+#include &lt;asm/debugreg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "tss.h"</div><div class='hunk'>@@ -523,13 +524,9 @@ static void masked_increment(ulong *reg, ulong mask, int inc)</div><div class='ctx'> static inline void</div><div class='ctx'> register_address_increment(struct x86_emulate_ctxt *ctxt, int reg, int inc)</div><div class='ctx'> {</div><div class='del'>-	ulong mask;</div><div class='add'>+	ulong *preg = reg_rmw(ctxt, reg);</div><div class='ctx'> </div><div class='del'>-	if (ctxt-&gt;ad_bytes == sizeof(unsigned long))</div><div class='del'>-		mask = ~0UL;</div><div class='del'>-	else</div><div class='del'>-		mask = ad_mask(ctxt);</div><div class='del'>-	masked_increment(reg_rmw(ctxt, reg), mask, inc);</div><div class='add'>+	assign_register(preg, *preg + inc, ctxt-&gt;ad_bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rsp_increment(struct x86_emulate_ctxt *ctxt, int inc)</div><div class='hunk'>@@ -2262,6 +2259,260 @@ static int em_lseg(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emulator_has_longmode(struct x86_emulate_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	u32 eax, ebx, ecx, edx;</div><div class='add'>+</div><div class='add'>+	eax = 0x80000001;</div><div class='add'>+	ecx = 0;</div><div class='add'>+	ctxt-&gt;ops-&gt;get_cpuid(ctxt, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	return edx &amp; bit(X86_FEATURE_LM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define GET_SMSTATE(type, smbase, offset)				  \</div><div class='add'>+	({								  \</div><div class='add'>+	 type __val;							  \</div><div class='add'>+	 int r = ctxt-&gt;ops-&gt;read_std(ctxt, smbase + offset, &amp;__val,       \</div><div class='add'>+				     sizeof(__val), NULL);		  \</div><div class='add'>+	 if (r != X86EMUL_CONTINUE)					  \</div><div class='add'>+		 return X86EMUL_UNHANDLEABLE;				  \</div><div class='add'>+	 __val;								  \</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+static void rsm_set_desc_flags(struct desc_struct *desc, u32 flags)</div><div class='add'>+{</div><div class='add'>+	desc-&gt;g    = (flags &gt;&gt; 23) &amp; 1;</div><div class='add'>+	desc-&gt;d    = (flags &gt;&gt; 22) &amp; 1;</div><div class='add'>+	desc-&gt;l    = (flags &gt;&gt; 21) &amp; 1;</div><div class='add'>+	desc-&gt;avl  = (flags &gt;&gt; 20) &amp; 1;</div><div class='add'>+	desc-&gt;p    = (flags &gt;&gt; 15) &amp; 1;</div><div class='add'>+	desc-&gt;dpl  = (flags &gt;&gt; 13) &amp; 3;</div><div class='add'>+	desc-&gt;s    = (flags &gt;&gt; 12) &amp; 1;</div><div class='add'>+	desc-&gt;type = (flags &gt;&gt;  8) &amp; 15;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsm_load_seg_32(struct x86_emulate_ctxt *ctxt, u64 smbase, int n)</div><div class='add'>+{</div><div class='add'>+	struct desc_struct desc;</div><div class='add'>+	int offset;</div><div class='add'>+	u16 selector;</div><div class='add'>+</div><div class='add'>+	selector = GET_SMSTATE(u32, smbase, 0x7fa8 + n * 4);</div><div class='add'>+</div><div class='add'>+	if (n &lt; 3)</div><div class='add'>+		offset = 0x7f84 + n * 12;</div><div class='add'>+	else</div><div class='add'>+		offset = 0x7f2c + (n - 3) * 12;</div><div class='add'>+</div><div class='add'>+	set_desc_base(&amp;desc,      GET_SMSTATE(u32, smbase, offset + 8));</div><div class='add'>+	set_desc_limit(&amp;desc,     GET_SMSTATE(u32, smbase, offset + 4));</div><div class='add'>+	rsm_set_desc_flags(&amp;desc, GET_SMSTATE(u32, smbase, offset));</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, 0, n);</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsm_load_seg_64(struct x86_emulate_ctxt *ctxt, u64 smbase, int n)</div><div class='add'>+{</div><div class='add'>+	struct desc_struct desc;</div><div class='add'>+	int offset;</div><div class='add'>+	u16 selector;</div><div class='add'>+	u32 base3;</div><div class='add'>+</div><div class='add'>+	offset = 0x7e00 + n * 16;</div><div class='add'>+</div><div class='add'>+	selector =                GET_SMSTATE(u16, smbase, offset);</div><div class='add'>+	rsm_set_desc_flags(&amp;desc, GET_SMSTATE(u16, smbase, offset + 2) &lt;&lt; 8);</div><div class='add'>+	set_desc_limit(&amp;desc,     GET_SMSTATE(u32, smbase, offset + 4));</div><div class='add'>+	set_desc_base(&amp;desc,      GET_SMSTATE(u32, smbase, offset + 8));</div><div class='add'>+	base3 =                   GET_SMSTATE(u32, smbase, offset + 12);</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, base3, n);</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,</div><div class='add'>+				     u64 cr0, u64 cr4)</div><div class='add'>+{</div><div class='add'>+	int bad;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * First enable PAE, long mode needs it before CR0.PG = 1 is set.</div><div class='add'>+	 * Then enable protected mode.	However, PCID cannot be enabled</div><div class='add'>+	 * if EFER.LMA=0, so set it separately.</div><div class='add'>+	 */</div><div class='add'>+	bad = ctxt-&gt;ops-&gt;set_cr(ctxt, 4, cr4 &amp; ~X86_CR4_PCIDE);</div><div class='add'>+	if (bad)</div><div class='add'>+		return X86EMUL_UNHANDLEABLE;</div><div class='add'>+</div><div class='add'>+	bad = ctxt-&gt;ops-&gt;set_cr(ctxt, 0, cr0);</div><div class='add'>+	if (bad)</div><div class='add'>+		return X86EMUL_UNHANDLEABLE;</div><div class='add'>+</div><div class='add'>+	if (cr4 &amp; X86_CR4_PCIDE) {</div><div class='add'>+		bad = ctxt-&gt;ops-&gt;set_cr(ctxt, 4, cr4);</div><div class='add'>+		if (bad)</div><div class='add'>+			return X86EMUL_UNHANDLEABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt, u64 smbase)</div><div class='add'>+{</div><div class='add'>+	struct desc_struct desc;</div><div class='add'>+	struct desc_ptr dt;</div><div class='add'>+	u16 selector;</div><div class='add'>+	u32 val, cr0, cr4;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cr0 =                      GET_SMSTATE(u32, smbase, 0x7ffc);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_cr(ctxt, 3, GET_SMSTATE(u32, smbase, 0x7ff8));</div><div class='add'>+	ctxt-&gt;eflags =             GET_SMSTATE(u32, smbase, 0x7ff4) | X86_EFLAGS_FIXED;</div><div class='add'>+	ctxt-&gt;_eip =               GET_SMSTATE(u32, smbase, 0x7ff0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		*reg_write(ctxt, i) = GET_SMSTATE(u32, smbase, 0x7fd0 + i * 4);</div><div class='add'>+</div><div class='add'>+	val = GET_SMSTATE(u32, smbase, 0x7fcc);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_dr(ctxt, 6, (val &amp; DR6_VOLATILE) | DR6_FIXED_1);</div><div class='add'>+	val = GET_SMSTATE(u32, smbase, 0x7fc8);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_dr(ctxt, 7, (val &amp; DR7_VOLATILE) | DR7_FIXED_1);</div><div class='add'>+</div><div class='add'>+	selector =                 GET_SMSTATE(u32, smbase, 0x7fc4);</div><div class='add'>+	set_desc_base(&amp;desc,       GET_SMSTATE(u32, smbase, 0x7f64));</div><div class='add'>+	set_desc_limit(&amp;desc,      GET_SMSTATE(u32, smbase, 0x7f60));</div><div class='add'>+	rsm_set_desc_flags(&amp;desc,  GET_SMSTATE(u32, smbase, 0x7f5c));</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, 0, VCPU_SREG_TR);</div><div class='add'>+</div><div class='add'>+	selector =                 GET_SMSTATE(u32, smbase, 0x7fc0);</div><div class='add'>+	set_desc_base(&amp;desc,       GET_SMSTATE(u32, smbase, 0x7f80));</div><div class='add'>+	set_desc_limit(&amp;desc,      GET_SMSTATE(u32, smbase, 0x7f7c));</div><div class='add'>+	rsm_set_desc_flags(&amp;desc,  GET_SMSTATE(u32, smbase, 0x7f78));</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, 0, VCPU_SREG_LDTR);</div><div class='add'>+</div><div class='add'>+	dt.address =               GET_SMSTATE(u32, smbase, 0x7f74);</div><div class='add'>+	dt.size =                  GET_SMSTATE(u32, smbase, 0x7f70);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_gdt(ctxt, &amp;dt);</div><div class='add'>+</div><div class='add'>+	dt.address =               GET_SMSTATE(u32, smbase, 0x7f58);</div><div class='add'>+	dt.size =                  GET_SMSTATE(u32, smbase, 0x7f54);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_idt(ctxt, &amp;dt);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++) {</div><div class='add'>+		int r = rsm_load_seg_32(ctxt, smbase, i);</div><div class='add'>+		if (r != X86EMUL_CONTINUE)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cr4 = GET_SMSTATE(u32, smbase, 0x7f14);</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;ops-&gt;set_smbase(ctxt, GET_SMSTATE(u32, smbase, 0x7ef8));</div><div class='add'>+</div><div class='add'>+	return rsm_enter_protected_mode(ctxt, cr0, cr4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase)</div><div class='add'>+{</div><div class='add'>+	struct desc_struct desc;</div><div class='add'>+	struct desc_ptr dt;</div><div class='add'>+	u64 val, cr0, cr4;</div><div class='add'>+	u32 base3;</div><div class='add'>+	u16 selector;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 16; i++)</div><div class='add'>+		*reg_write(ctxt, i) = GET_SMSTATE(u64, smbase, 0x7ff8 - i * 8);</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;_eip   = GET_SMSTATE(u64, smbase, 0x7f78);</div><div class='add'>+	ctxt-&gt;eflags = GET_SMSTATE(u32, smbase, 0x7f70) | X86_EFLAGS_FIXED;</div><div class='add'>+</div><div class='add'>+	val = GET_SMSTATE(u32, smbase, 0x7f68);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_dr(ctxt, 6, (val &amp; DR6_VOLATILE) | DR6_FIXED_1);</div><div class='add'>+	val = GET_SMSTATE(u32, smbase, 0x7f60);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_dr(ctxt, 7, (val &amp; DR7_VOLATILE) | DR7_FIXED_1);</div><div class='add'>+</div><div class='add'>+	cr0 =                       GET_SMSTATE(u64, smbase, 0x7f58);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_cr(ctxt, 3,  GET_SMSTATE(u64, smbase, 0x7f50));</div><div class='add'>+	cr4 =                       GET_SMSTATE(u64, smbase, 0x7f48);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_smbase(ctxt, GET_SMSTATE(u32, smbase, 0x7f00));</div><div class='add'>+	val =                       GET_SMSTATE(u64, smbase, 0x7ed0);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_msr(ctxt, MSR_EFER, val &amp; ~EFER_LMA);</div><div class='add'>+</div><div class='add'>+	selector =                  GET_SMSTATE(u32, smbase, 0x7e90);</div><div class='add'>+	rsm_set_desc_flags(&amp;desc,   GET_SMSTATE(u32, smbase, 0x7e92) &lt;&lt; 8);</div><div class='add'>+	set_desc_limit(&amp;desc,       GET_SMSTATE(u32, smbase, 0x7e94));</div><div class='add'>+	set_desc_base(&amp;desc,        GET_SMSTATE(u32, smbase, 0x7e98));</div><div class='add'>+	base3 =                     GET_SMSTATE(u32, smbase, 0x7e9c);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, base3, VCPU_SREG_TR);</div><div class='add'>+</div><div class='add'>+	dt.size =                   GET_SMSTATE(u32, smbase, 0x7e84);</div><div class='add'>+	dt.address =                GET_SMSTATE(u64, smbase, 0x7e88);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_idt(ctxt, &amp;dt);</div><div class='add'>+</div><div class='add'>+	selector =                  GET_SMSTATE(u32, smbase, 0x7e70);</div><div class='add'>+	rsm_set_desc_flags(&amp;desc,   GET_SMSTATE(u32, smbase, 0x7e72) &lt;&lt; 8);</div><div class='add'>+	set_desc_limit(&amp;desc,       GET_SMSTATE(u32, smbase, 0x7e74));</div><div class='add'>+	set_desc_base(&amp;desc,        GET_SMSTATE(u32, smbase, 0x7e78));</div><div class='add'>+	base3 =                     GET_SMSTATE(u32, smbase, 0x7e7c);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, base3, VCPU_SREG_LDTR);</div><div class='add'>+</div><div class='add'>+	dt.size =                   GET_SMSTATE(u32, smbase, 0x7e64);</div><div class='add'>+	dt.address =                GET_SMSTATE(u64, smbase, 0x7e68);</div><div class='add'>+	ctxt-&gt;ops-&gt;set_gdt(ctxt, &amp;dt);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++) {</div><div class='add'>+		int r = rsm_load_seg_64(ctxt, smbase, i);</div><div class='add'>+		if (r != X86EMUL_CONTINUE)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rsm_enter_protected_mode(ctxt, cr0, cr4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_rsm(struct x86_emulate_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0, cr4, efer;</div><div class='add'>+	u64 smbase;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if ((ctxt-&gt;emul_flags &amp; X86EMUL_SMM_MASK) == 0)</div><div class='add'>+		return emulate_ud(ctxt);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get back to real mode, to prepare a safe state in which to load</div><div class='add'>+	 * CR0/CR3/CR4/EFER.  Also this will ensure that addresses passed</div><div class='add'>+	 * to read_std/write_std are not virtual.</div><div class='add'>+	 *</div><div class='add'>+	 * CR4.PCIDE must be zero, because it is a 64-bit mode only feature.</div><div class='add'>+	 */</div><div class='add'>+	cr0 = ctxt-&gt;ops-&gt;get_cr(ctxt, 0);</div><div class='add'>+	if (cr0 &amp; X86_CR0_PE)</div><div class='add'>+		ctxt-&gt;ops-&gt;set_cr(ctxt, 0, cr0 &amp; ~(X86_CR0_PG | X86_CR0_PE));</div><div class='add'>+	cr4 = ctxt-&gt;ops-&gt;get_cr(ctxt, 4);</div><div class='add'>+	if (cr4 &amp; X86_CR4_PAE)</div><div class='add'>+		ctxt-&gt;ops-&gt;set_cr(ctxt, 4, cr4 &amp; ~X86_CR4_PAE);</div><div class='add'>+	efer = 0;</div><div class='add'>+	ctxt-&gt;ops-&gt;set_msr(ctxt, MSR_EFER, efer);</div><div class='add'>+</div><div class='add'>+	smbase = ctxt-&gt;ops-&gt;get_smbase(ctxt);</div><div class='add'>+	if (emulator_has_longmode(ctxt))</div><div class='add'>+		ret = rsm_load_state_64(ctxt, smbase + 0x8000);</div><div class='add'>+	else</div><div class='add'>+		ret = rsm_load_state_32(ctxt, smbase + 0x8000);</div><div class='add'>+</div><div class='add'>+	if (ret != X86EMUL_CONTINUE) {</div><div class='add'>+		/* FIXME: should triple fault */</div><div class='add'>+		return X86EMUL_UNHANDLEABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((ctxt-&gt;emul_flags &amp; X86EMUL_SMM_INSIDE_NMI_MASK) == 0)</div><div class='add'>+		ctxt-&gt;ops-&gt;set_nmi_mask(ctxt, false);</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;emul_flags &amp;= ~X86EMUL_SMM_INSIDE_NMI_MASK;</div><div class='add'>+	ctxt-&gt;emul_flags &amp;= ~X86EMUL_SMM_MASK;</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> setup_syscalls_segments(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 			struct desc_struct *cs, struct desc_struct *ss)</div><div class='hunk'>@@ -2573,6 +2824,30 @@ static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void string_registers_quirk(struct x86_emulate_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Intel CPUs mask the counter and pointers in quite strange</div><div class='add'>+	 * manner when ECX is zero due to REP-string optimizations.</div><div class='add'>+	 */</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	if (ctxt-&gt;ad_bytes != 4 || !vendor_intel(ctxt))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	*reg_write(ctxt, VCPU_REGS_RCX) = 0;</div><div class='add'>+</div><div class='add'>+	switch (ctxt-&gt;b) {</div><div class='add'>+	case 0xa4:	/* movsb */</div><div class='add'>+	case 0xa5:	/* movsd/w */</div><div class='add'>+		*reg_rmw(ctxt, VCPU_REGS_RSI) &amp;= (u32)-1;</div><div class='add'>+		/* fall through */</div><div class='add'>+	case 0xaa:	/* stosb */</div><div class='add'>+	case 0xab:	/* stosd/w */</div><div class='add'>+		*reg_rmw(ctxt, VCPU_REGS_RDI) &amp;= (u32)-1;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void save_state_to_tss16(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 				struct tss_segment_16 *tss)</div><div class='ctx'> {</div><div class='hunk'>@@ -2849,7 +3124,7 @@ static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	ulong old_tss_base =</div><div class='ctx'> 		ops-&gt;get_cached_segment_base(ctxt, VCPU_SREG_TR);</div><div class='ctx'> 	u32 desc_limit;</div><div class='del'>-	ulong desc_addr;</div><div class='add'>+	ulong desc_addr, dr7;</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: old_tss_base == ~0 ? */</div><div class='ctx'> </div><div class='hunk'>@@ -2934,6 +3209,9 @@ static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 		ret = em_push(ctxt);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ops-&gt;get_dr(ctxt, 7, &amp;dr7);</div><div class='add'>+	ops-&gt;set_dr(ctxt, 7, dr7 &amp; ~(DR_LOCAL_ENABLE_MASK | DR_LOCAL_SLOWDOWN));</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3840,7 +4118,7 @@ static const struct opcode group5[] = {</div><div class='ctx'> 	F(DstMem | SrcNone | Lock,		em_inc),</div><div class='ctx'> 	F(DstMem | SrcNone | Lock,		em_dec),</div><div class='ctx'> 	I(SrcMem | NearBranch,			em_call_near_abs),</div><div class='del'>-	I(SrcMemFAddr | ImplicitOps | Stack,	em_call_far),</div><div class='add'>+	I(SrcMemFAddr | ImplicitOps,		em_call_far),</div><div class='ctx'> 	I(SrcMem | NearBranch,			em_jmp_abs),</div><div class='ctx'> 	I(SrcMemFAddr | ImplicitOps,		em_jmp_far),</div><div class='ctx'> 	I(SrcMem | Stack,			em_push), D(Undefined),</div><div class='hunk'>@@ -4173,7 +4451,7 @@ static const struct opcode twobyte_table[256] = {</div><div class='ctx'> 	F(DstMem | SrcReg | Src2CL | ModRM, em_shld), N, N,</div><div class='ctx'> 	/* 0xA8 - 0xAF */</div><div class='ctx'> 	I(Stack | Src2GS, em_push_sreg), I(Stack | Src2GS, em_pop_sreg),</div><div class='del'>-	DI(ImplicitOps, rsm),</div><div class='add'>+	II(No64 | EmulateOnUD | ImplicitOps, em_rsm, rsm),</div><div class='ctx'> 	F(DstMem | SrcReg | ModRM | BitOp | Lock | PageTable, em_bts),</div><div class='ctx'> 	F(DstMem | SrcReg | Src2ImmByte | ModRM, em_shrd),</div><div class='ctx'> 	F(DstMem | SrcReg | Src2CL | ModRM, em_shrd),</div><div class='hunk'>@@ -4871,7 +5149,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 				fetch_possible_mmx_operand(ctxt, &amp;ctxt-&gt;dst);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (unlikely(ctxt-&gt;guest_mode) &amp;&amp; (ctxt-&gt;d &amp; Intercept)) {</div><div class='add'>+		if (unlikely(ctxt-&gt;emul_flags &amp; X86EMUL_GUEST_MASK) &amp;&amp; ctxt-&gt;intercept) {</div><div class='ctx'> 			rc = emulator_check_intercept(ctxt, ctxt-&gt;intercept,</div><div class='ctx'> 						      X86_ICPT_PRE_EXCEPT);</div><div class='ctx'> 			if (rc != X86EMUL_CONTINUE)</div><div class='hunk'>@@ -4900,7 +5178,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 				goto done;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (unlikely(ctxt-&gt;guest_mode) &amp;&amp; (ctxt-&gt;d &amp; Intercept)) {</div><div class='add'>+		if (unlikely(ctxt-&gt;emul_flags &amp; X86EMUL_GUEST_MASK) &amp;&amp; (ctxt-&gt;d &amp; Intercept)) {</div><div class='ctx'> 			rc = emulator_check_intercept(ctxt, ctxt-&gt;intercept,</div><div class='ctx'> 						      X86_ICPT_POST_EXCEPT);</div><div class='ctx'> 			if (rc != X86EMUL_CONTINUE)</div><div class='hunk'>@@ -4910,6 +5188,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 		if (ctxt-&gt;rep_prefix &amp;&amp; (ctxt-&gt;d &amp; String)) {</div><div class='ctx'> 			/* All REP prefixes have the same first termination condition */</div><div class='ctx'> 			if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) {</div><div class='add'>+				string_registers_quirk(ctxt);</div><div class='ctx'> 				ctxt-&gt;eip = ctxt-&gt;_eip;</div><div class='ctx'> 				ctxt-&gt;eflags &amp;= ~X86_EFLAGS_RF;</div><div class='ctx'> 				goto done;</div><div class='hunk'>@@ -4953,7 +5232,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> </div><div class='ctx'> special_insn:</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ctxt-&gt;guest_mode) &amp;&amp; (ctxt-&gt;d &amp; Intercept)) {</div><div class='add'>+	if (unlikely(ctxt-&gt;emul_flags &amp; X86EMUL_GUEST_MASK) &amp;&amp; (ctxt-&gt;d &amp; Intercept)) {</div><div class='ctx'> 		rc = emulator_check_intercept(ctxt, ctxt-&gt;intercept,</div><div class='ctx'> 					      X86_ICPT_POST_MEMACCESS);</div><div class='ctx'> 		if (rc != X86EMUL_CONTINUE)</div><div class='head'>diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c<br/>index 4dce6f8b6129..f90952f64e79 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/i8254.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/i8254.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/i8254.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/i8254.c</a></div><div class='hunk'>@@ -305,7 +305,7 @@ static void pit_do_work(struct kthread_work *work)</div><div class='ctx'> 		 * LVT0 to NMI delivery. Other PIC interrupts are just sent to</div><div class='ctx'> 		 * VCPU0, and only if its LVT0 is in EXTINT mode.</div><div class='ctx'> 		 */</div><div class='del'>-		if (kvm-&gt;arch.vapics_in_nmi_mode &gt; 0)</div><div class='add'>+		if (atomic_read(&amp;kvm-&gt;arch.vapics_in_nmi_mode) &gt; 0)</div><div class='ctx'> 			kvm_for_each_vcpu(i, vcpu, kvm)</div><div class='ctx'> 				kvm_apic_nmi_wd_deliver(vcpu);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c<br/>index 28146f03c514..856f79105bb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/ioapic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/ioapic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/ioapic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/ioapic.c</a></div><div class='hunk'>@@ -349,6 +349,7 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)</div><div class='ctx'> 	irqe.delivery_mode = entry-&gt;fields.delivery_mode &lt;&lt; 8;</div><div class='ctx'> 	irqe.level = 1;</div><div class='ctx'> 	irqe.shorthand = 0;</div><div class='add'>+	irqe.msi_redir_hint = false;</div><div class='ctx'> </div><div class='ctx'> 	if (irqe.trig_mode == IOAPIC_EDGE_TRIG)</div><div class='ctx'> 		ioapic-&gt;irr_delivered |= 1 &lt;&lt; irq;</div><div class='hunk'>@@ -637,11 +638,9 @@ void kvm_ioapic_destroy(struct kvm *kvm)</div><div class='ctx'> 	struct kvm_ioapic *ioapic = kvm-&gt;arch.vioapic;</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ioapic-&gt;eoi_inject);</div><div class='del'>-	if (ioapic) {</div><div class='del'>-		kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &amp;ioapic-&gt;dev);</div><div class='del'>-		kvm-&gt;arch.vioapic = NULL;</div><div class='del'>-		kfree(ioapic);</div><div class='del'>-	}</div><div class='add'>+	kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &amp;ioapic-&gt;dev);</div><div class='add'>+	kvm-&gt;arch.vioapic = NULL;</div><div class='add'>+	kfree(ioapic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)</div><div class='head'>diff --git a/arch/x86/kvm/iommu.c b/arch/x86/kvm/iommu.c<br/>index 7dbced309ddb..5c520ebf6343 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/iommu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/iommu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/iommu.c</a></div><div class='hunk'>@@ -200,6 +200,7 @@ int kvm_assign_device(struct kvm *kvm, struct pci_dev *pdev)</div><div class='ctx'> 			goto out_unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvm_arch_start_assignment(kvm);</div><div class='ctx'> 	pci_set_dev_assigned(pdev);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "kvm assign device\n");</div><div class='hunk'>@@ -224,6 +225,7 @@ int kvm_deassign_device(struct kvm *kvm, struct pci_dev *pdev)</div><div class='ctx'> 	iommu_detach_device(domain, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	pci_clear_dev_assigned(pdev);</div><div class='add'>+	kvm_arch_end_assignment(kvm);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "kvm deassign device\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/irq_comm.c b/arch/x86/kvm/irq_comm.c<br/>index 72298b3ac025..9efff9e5b58c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/irq_comm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/irq_comm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/irq_comm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/irq_comm.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "ioapic.h"</div><div class='ctx'> </div><div class='add'>+#include "lapic.h"</div><div class='add'>+</div><div class='ctx'> static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,</div><div class='ctx'> 			   struct kvm *kvm, int irq_source_id, int level,</div><div class='ctx'> 			   bool line_status)</div><div class='hunk'>@@ -48,11 +50,6 @@ static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,</div><div class='ctx'> 				line_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)</div><div class='del'>-{</div><div class='del'>-	return irq-&gt;delivery_mode == APIC_DM_LOWEST;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,</div><div class='ctx'> 		struct kvm_lapic_irq *irq, unsigned long *dest_map)</div><div class='ctx'> {</div><div class='hunk'>@@ -60,7 +57,7 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,</div><div class='ctx'> 	struct kvm_vcpu *vcpu, *lowest = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (irq-&gt;dest_mode == 0 &amp;&amp; irq-&gt;dest_id == 0xff &amp;&amp;</div><div class='del'>-			kvm_is_dm_lowest_prio(irq)) {</div><div class='add'>+			kvm_lowest_prio_delivery(irq)) {</div><div class='ctx'> 		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");</div><div class='ctx'> 		irq-&gt;delivery_mode = APIC_DM_FIXED;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -76,7 +73,7 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,</div><div class='ctx'> 					irq-&gt;dest_id, irq-&gt;dest_mode))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!kvm_is_dm_lowest_prio(irq)) {</div><div class='add'>+		if (!kvm_lowest_prio_delivery(irq)) {</div><div class='ctx'> 			if (r &lt; 0)</div><div class='ctx'> 				r = 0;</div><div class='ctx'> 			r += kvm_apic_set_irq(vcpu, irq, dest_map);</div><div class='hunk'>@@ -106,9 +103,10 @@ static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,</div><div class='ctx'> 	irq-&gt;dest_mode = (1 &lt;&lt; MSI_ADDR_DEST_MODE_SHIFT) &amp; e-&gt;msi.address_lo;</div><div class='ctx'> 	irq-&gt;trig_mode = (1 &lt;&lt; MSI_DATA_TRIGGER_SHIFT) &amp; e-&gt;msi.data;</div><div class='ctx'> 	irq-&gt;delivery_mode = e-&gt;msi.data &amp; 0x700;</div><div class='add'>+	irq-&gt;msi_redir_hint = ((e-&gt;msi.address_lo</div><div class='add'>+		&amp; MSI_ADDR_REDIRECTION_LOWPRI) &gt; 0);</div><div class='ctx'> 	irq-&gt;level = 1;</div><div class='ctx'> 	irq-&gt;shorthand = 0;</div><div class='del'>-	/* TODO Deal with RH bit of MSI message address */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,</div><div class='head'>diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h<br/>index 544076c4f44b..e1e89ee4af75 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/kvm_cache_regs.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/kvm_cache_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/kvm_cache_regs.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/kvm_cache_regs.h</a></div><div class='hunk'>@@ -99,4 +99,9 @@ static inline bool is_guest_mode(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return vcpu-&gt;arch.hflags &amp; HF_GUEST_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_smm(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu-&gt;arch.hflags &amp; HF_SMM_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c<br/>index 629af0f1c5c4..954e98a8c2e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/lapic.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/lapic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/lapic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/lapic.c</a></div><div class='hunk'>@@ -240,6 +240,15 @@ static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id)</div><div class='ctx'> 	recalculate_apic_map(apic-&gt;vcpu-&gt;kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u8 id)</div><div class='add'>+{</div><div class='add'>+	u32 ldr = ((id &gt;&gt; 4) &lt;&lt; 16) | (1 &lt;&lt; (id &amp; 0xf));</div><div class='add'>+</div><div class='add'>+	apic_set_reg(apic, APIC_ID, id &lt;&lt; 24);</div><div class='add'>+	apic_set_reg(apic, APIC_LDR, ldr);</div><div class='add'>+	recalculate_apic_map(apic-&gt;vcpu-&gt;kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type)</div><div class='ctx'> {</div><div class='ctx'> 	return !(kvm_apic_get_reg(apic, lvt_type) &amp; APIC_LVT_MASKED);</div><div class='hunk'>@@ -728,7 +737,7 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,</div><div class='ctx'> </div><div class='ctx'> 		dst = map-&gt;logical_map[cid];</div><div class='ctx'> </div><div class='del'>-		if (irq-&gt;delivery_mode == APIC_DM_LOWEST) {</div><div class='add'>+		if (kvm_lowest_prio_delivery(irq)) {</div><div class='ctx'> 			int l = -1;</div><div class='ctx'> 			for_each_set_bit(i, &amp;bitmap, 16) {</div><div class='ctx'> 				if (!dst[i])</div><div class='hunk'>@@ -799,7 +808,9 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case APIC_DM_SMI:</div><div class='del'>-		apic_debug("Ignoring guest SMI\n");</div><div class='add'>+		result = 1;</div><div class='add'>+		kvm_make_request(KVM_REQ_SMI, vcpu);</div><div class='add'>+		kvm_vcpu_kick(vcpu);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case APIC_DM_NMI:</div><div class='hunk'>@@ -914,9 +925,10 @@ static void apic_send_ipi(struct kvm_lapic *apic)</div><div class='ctx'> 	irq.vector = icr_low &amp; APIC_VECTOR_MASK;</div><div class='ctx'> 	irq.delivery_mode = icr_low &amp; APIC_MODE_MASK;</div><div class='ctx'> 	irq.dest_mode = icr_low &amp; APIC_DEST_MASK;</div><div class='del'>-	irq.level = icr_low &amp; APIC_INT_ASSERT;</div><div class='add'>+	irq.level = (icr_low &amp; APIC_INT_ASSERT) != 0;</div><div class='ctx'> 	irq.trig_mode = icr_low &amp; APIC_INT_LEVELTRIG;</div><div class='ctx'> 	irq.shorthand = icr_low &amp; APIC_SHORT_MASK;</div><div class='add'>+	irq.msi_redir_hint = false;</div><div class='ctx'> 	if (apic_x2apic_mode(apic))</div><div class='ctx'> 		irq.dest_id = icr_high;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -926,10 +938,11 @@ static void apic_send_ipi(struct kvm_lapic *apic)</div><div class='ctx'> </div><div class='ctx'> 	apic_debug("icr_high 0x%x, icr_low 0x%x, "</div><div class='ctx'> 		   "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "</div><div class='del'>-		   "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x\n",</div><div class='add'>+		   "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x, "</div><div class='add'>+		   "msi_redir_hint 0x%x\n",</div><div class='ctx'> 		   icr_high, icr_low, irq.shorthand, irq.dest_id,</div><div class='ctx'> 		   irq.trig_mode, irq.level, irq.dest_mode, irq.delivery_mode,</div><div class='del'>-		   irq.vector);</div><div class='add'>+		   irq.vector, irq.msi_redir_hint);</div><div class='ctx'> </div><div class='ctx'> 	kvm_irq_delivery_to_apic(apic-&gt;vcpu-&gt;kvm, apic, &amp;irq, NULL);</div><div class='ctx'> }</div><div class='hunk'>@@ -1090,6 +1103,17 @@ static void update_divide_count(struct kvm_lapic *apic)</div><div class='ctx'> 				   apic-&gt;divide_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void apic_update_lvtt(struct kvm_lapic *apic)</div><div class='add'>+{</div><div class='add'>+	u32 timer_mode = kvm_apic_get_reg(apic, APIC_LVTT) &amp;</div><div class='add'>+			apic-&gt;lapic_timer.timer_mode_mask;</div><div class='add'>+</div><div class='add'>+	if (apic-&gt;lapic_timer.timer_mode != timer_mode) {</div><div class='add'>+		apic-&gt;lapic_timer.timer_mode = timer_mode;</div><div class='add'>+		hrtimer_cancel(&amp;apic-&gt;lapic_timer.timer);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void apic_timer_expired(struct kvm_lapic *apic)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = apic-&gt;vcpu;</div><div class='hunk'>@@ -1233,16 +1257,17 @@ static void start_apic_timer(struct kvm_lapic *apic)</div><div class='ctx'> </div><div class='ctx'> static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)</div><div class='ctx'> {</div><div class='del'>-	int nmi_wd_enabled = apic_lvt_nmi_mode(kvm_apic_get_reg(apic, APIC_LVT0));</div><div class='add'>+	bool lvt0_in_nmi_mode = apic_lvt_nmi_mode(lvt0_val);</div><div class='ctx'> </div><div class='del'>-	if (apic_lvt_nmi_mode(lvt0_val)) {</div><div class='del'>-		if (!nmi_wd_enabled) {</div><div class='add'>+	if (apic-&gt;lvt0_in_nmi_mode != lvt0_in_nmi_mode) {</div><div class='add'>+		apic-&gt;lvt0_in_nmi_mode = lvt0_in_nmi_mode;</div><div class='add'>+		if (lvt0_in_nmi_mode) {</div><div class='ctx'> 			apic_debug("Receive NMI setting on APIC_LVT0 "</div><div class='ctx'> 				   "for cpu %d\n", apic-&gt;vcpu-&gt;vcpu_id);</div><div class='del'>-			apic-&gt;vcpu-&gt;kvm-&gt;arch.vapics_in_nmi_mode++;</div><div class='del'>-		}</div><div class='del'>-	} else if (nmi_wd_enabled)</div><div class='del'>-		apic-&gt;vcpu-&gt;kvm-&gt;arch.vapics_in_nmi_mode--;</div><div class='add'>+			atomic_inc(&amp;apic-&gt;vcpu-&gt;kvm-&gt;arch.vapics_in_nmi_mode);</div><div class='add'>+		} else</div><div class='add'>+			atomic_dec(&amp;apic-&gt;vcpu-&gt;kvm-&gt;arch.vapics_in_nmi_mode);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)</div><div class='hunk'>@@ -1298,6 +1323,7 @@ static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)</div><div class='ctx'> 				apic_set_reg(apic, APIC_LVTT + 0x10 * i,</div><div class='ctx'> 					     lvt_val | APIC_LVT_MASKED);</div><div class='ctx'> 			}</div><div class='add'>+			apic_update_lvtt(apic);</div><div class='ctx'> 			atomic_set(&amp;apic-&gt;lapic_timer.pending, 0);</div><div class='ctx'> </div><div class='ctx'> 		}</div><div class='hunk'>@@ -1330,20 +1356,13 @@ static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case APIC_LVTT: {</div><div class='del'>-		u32 timer_mode = val &amp; apic-&gt;lapic_timer.timer_mode_mask;</div><div class='del'>-</div><div class='del'>-		if (apic-&gt;lapic_timer.timer_mode != timer_mode) {</div><div class='del'>-			apic-&gt;lapic_timer.timer_mode = timer_mode;</div><div class='del'>-			hrtimer_cancel(&amp;apic-&gt;lapic_timer.timer);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	case APIC_LVTT:</div><div class='ctx'> 		if (!kvm_apic_sw_enabled(apic))</div><div class='ctx'> 			val |= APIC_LVT_MASKED;</div><div class='ctx'> 		val &amp;= (apic_lvt_mask[0] | apic-&gt;lapic_timer.timer_mode_mask);</div><div class='ctx'> 		apic_set_reg(apic, APIC_LVTT, val);</div><div class='add'>+		apic_update_lvtt(apic);</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	case APIC_TMICT:</div><div class='ctx'> 		if (apic_lvtt_tscdeadline(apic))</div><div class='hunk'>@@ -1536,9 +1555,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)</div><div class='ctx'> </div><div class='ctx'> 	if ((old_value ^ value) &amp; X2APIC_ENABLE) {</div><div class='ctx'> 		if (value &amp; X2APIC_ENABLE) {</div><div class='del'>-			u32 id = kvm_apic_id(apic);</div><div class='del'>-			u32 ldr = ((id &gt;&gt; 4) &lt;&lt; 16) | (1 &lt;&lt; (id &amp; 0xf));</div><div class='del'>-			kvm_apic_set_ldr(apic, ldr);</div><div class='add'>+			kvm_apic_set_x2apic_id(apic, vcpu-&gt;vcpu_id);</div><div class='ctx'> 			kvm_x86_ops-&gt;set_virtual_x2apic_mode(vcpu, true);</div><div class='ctx'> 		} else</div><div class='ctx'> 			kvm_x86_ops-&gt;set_virtual_x2apic_mode(vcpu, false);</div><div class='hunk'>@@ -1557,7 +1574,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_lapic_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_lapic *apic;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1571,19 +1588,23 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* Stop the timer in case it's a reset to an active apic */</div><div class='ctx'> 	hrtimer_cancel(&amp;apic-&gt;lapic_timer.timer);</div><div class='ctx'> </div><div class='del'>-	kvm_apic_set_id(apic, vcpu-&gt;vcpu_id);</div><div class='add'>+	if (!init_event)</div><div class='add'>+		kvm_apic_set_id(apic, vcpu-&gt;vcpu_id);</div><div class='ctx'> 	kvm_apic_set_version(apic-&gt;vcpu);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; APIC_LVT_NUM; i++)</div><div class='ctx'> 		apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);</div><div class='del'>-	apic-&gt;lapic_timer.timer_mode = 0;</div><div class='del'>-	apic_set_reg(apic, APIC_LVT0,</div><div class='del'>-		     SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));</div><div class='add'>+	apic_update_lvtt(apic);</div><div class='add'>+	if (!(vcpu-&gt;kvm-&gt;arch.disabled_quirks &amp; KVM_QUIRK_LINT0_REENABLED))</div><div class='add'>+		apic_set_reg(apic, APIC_LVT0,</div><div class='add'>+			     SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));</div><div class='add'>+	apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));</div><div class='ctx'> </div><div class='ctx'> 	apic_set_reg(apic, APIC_DFR, 0xffffffffU);</div><div class='ctx'> 	apic_set_spiv(apic, 0xff);</div><div class='ctx'> 	apic_set_reg(apic, APIC_TASKPRI, 0);</div><div class='del'>-	kvm_apic_set_ldr(apic, 0);</div><div class='add'>+	if (!apic_x2apic_mode(apic))</div><div class='add'>+		kvm_apic_set_ldr(apic, 0);</div><div class='ctx'> 	apic_set_reg(apic, APIC_ESR, 0);</div><div class='ctx'> 	apic_set_reg(apic, APIC_ICR, 0);</div><div class='ctx'> 	apic_set_reg(apic, APIC_ICR2, 0);</div><div class='hunk'>@@ -1712,7 +1733,7 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	static_key_slow_inc(&amp;apic_sw_disabled.key); /* sw disabled at reset */</div><div class='del'>-	kvm_lapic_reset(vcpu);</div><div class='add'>+	kvm_lapic_reset(vcpu, false);</div><div class='ctx'> 	kvm_iodevice_init(&amp;apic-&gt;dev, &amp;apic_mmio_ops);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1802,6 +1823,8 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	apic_update_ppr(apic);</div><div class='ctx'> 	hrtimer_cancel(&amp;apic-&gt;lapic_timer.timer);</div><div class='add'>+	apic_update_lvtt(apic);</div><div class='add'>+	apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));</div><div class='ctx'> 	update_divide_count(apic);</div><div class='ctx'> 	start_apic_timer(apic);</div><div class='ctx'> 	apic-&gt;irr_pending = true;</div><div class='hunk'>@@ -2043,11 +2066,22 @@ void kvm_apic_accept_events(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!kvm_vcpu_has_lapic(vcpu) || !apic-&gt;pending_events)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pe = xchg(&amp;apic-&gt;pending_events, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * INITs are latched while in SMM.  Because an SMM CPU cannot</div><div class='add'>+	 * be in KVM_MP_STATE_INIT_RECEIVED state, just eat SIPIs</div><div class='add'>+	 * and delay processing of INIT until the next RSM.</div><div class='add'>+	 */</div><div class='add'>+	if (is_smm(vcpu)) {</div><div class='add'>+		WARN_ON_ONCE(vcpu-&gt;arch.mp_state == KVM_MP_STATE_INIT_RECEIVED);</div><div class='add'>+		if (test_bit(KVM_APIC_SIPI, &amp;apic-&gt;pending_events))</div><div class='add'>+			clear_bit(KVM_APIC_SIPI, &amp;apic-&gt;pending_events);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	pe = xchg(&amp;apic-&gt;pending_events, 0);</div><div class='ctx'> 	if (test_bit(KVM_APIC_INIT, &amp;pe)) {</div><div class='del'>-		kvm_lapic_reset(vcpu);</div><div class='del'>-		kvm_vcpu_reset(vcpu);</div><div class='add'>+		kvm_lapic_reset(vcpu, true);</div><div class='add'>+		kvm_vcpu_reset(vcpu, true);</div><div class='ctx'> 		if (kvm_vcpu_is_bsp(apic-&gt;vcpu))</div><div class='ctx'> 			vcpu-&gt;arch.mp_state = KVM_MP_STATE_RUNNABLE;</div><div class='ctx'> 		else</div><div class='head'>diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h<br/>index 9d28383fc1e7..71952748222a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/lapic.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/lapic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/lapic.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/lapic.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@ struct kvm_lapic {</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='ctx'> 	bool sw_enabled;</div><div class='ctx'> 	bool irr_pending;</div><div class='add'>+	bool lvt0_in_nmi_mode;</div><div class='ctx'> 	/* Number of bits set in ISR. */</div><div class='ctx'> 	s16 isr_count;</div><div class='ctx'> 	/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */</div><div class='hunk'>@@ -48,7 +49,7 @@ int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_apic_accept_events(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_lapic_reset(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);</div><div class='ctx'> u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);</div><div class='ctx'> void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -150,7 +151,18 @@ static inline bool kvm_apic_vid_enabled(struct kvm *kvm)</div><div class='ctx'> </div><div class='ctx'> static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return vcpu-&gt;arch.apic-&gt;pending_events;</div><div class='add'>+	return kvm_vcpu_has_lapic(vcpu) &amp;&amp; vcpu-&gt;arch.apic-&gt;pending_events;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)</div><div class='add'>+{</div><div class='add'>+	return (irq-&gt;delivery_mode == APIC_DM_LOWEST ||</div><div class='add'>+			irq-&gt;msi_redir_hint);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return kvm_vcpu_has_lapic(vcpu) &amp;&amp; test_bit(KVM_APIC_INIT, &amp;vcpu-&gt;arch.apic-&gt;pending_events);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);</div><div class='head'>diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c<br/>index b73337634214..44171462bd2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu.c</a></div><div class='hunk'>@@ -223,15 +223,15 @@ static unsigned int get_mmio_spte_generation(u64 spte)</div><div class='ctx'> 	return gen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int kvm_current_mmio_generation(struct kvm *kvm)</div><div class='add'>+static unsigned int kvm_current_mmio_generation(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return kvm_memslots(kvm)-&gt;generation &amp; MMIO_GEN_MASK;</div><div class='add'>+	return kvm_vcpu_memslots(vcpu)-&gt;generation &amp; MMIO_GEN_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mark_mmio_spte(struct kvm *kvm, u64 *sptep, u64 gfn,</div><div class='add'>+static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,</div><div class='ctx'> 			   unsigned access)</div><div class='ctx'> {</div><div class='del'>-	unsigned int gen = kvm_current_mmio_generation(kvm);</div><div class='add'>+	unsigned int gen = kvm_current_mmio_generation(vcpu);</div><div class='ctx'> 	u64 mask = generation_mmio_spte_mask(gen);</div><div class='ctx'> </div><div class='ctx'> 	access &amp;= ACC_WRITE_MASK | ACC_USER_MASK;</div><div class='hunk'>@@ -258,22 +258,22 @@ static unsigned get_mmio_spte_access(u64 spte)</div><div class='ctx'> 	return (spte &amp; ~mask) &amp; ~PAGE_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool set_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,</div><div class='add'>+static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,</div><div class='ctx'> 			  pfn_t pfn, unsigned access)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(is_noslot_pfn(pfn))) {</div><div class='del'>-		mark_mmio_spte(kvm, sptep, gfn, access);</div><div class='add'>+		mark_mmio_spte(vcpu, sptep, gfn, access);</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool check_mmio_spte(struct kvm *kvm, u64 spte)</div><div class='add'>+static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int kvm_gen, spte_gen;</div><div class='ctx'> </div><div class='del'>-	kvm_gen = kvm_current_mmio_generation(kvm);</div><div class='add'>+	kvm_gen = kvm_current_mmio_generation(vcpu);</div><div class='ctx'> 	spte_gen = get_mmio_spte_generation(spte);</div><div class='ctx'> </div><div class='ctx'> 	trace_check_mmio_spte(spte, kvm_gen, spte_gen);</div><div class='hunk'>@@ -804,30 +804,36 @@ static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,</div><div class='ctx'> 	return &amp;slot-&gt;arch.lpage_info[level - 2][idx];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void account_shadowed(struct kvm *kvm, gfn_t gfn)</div><div class='add'>+static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	struct kvm_lpage_info *linfo;</div><div class='add'>+	gfn_t gfn;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(kvm, gfn);</div><div class='del'>-	for (i = PT_DIRECTORY_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='add'>+	gfn = sp-&gt;gfn;</div><div class='add'>+	slots = kvm_memslots_for_spte_role(kvm, sp-&gt;role);</div><div class='add'>+	slot = __gfn_to_memslot(slots, gfn);</div><div class='add'>+	for (i = PT_DIRECTORY_LEVEL; i &lt;= PT_MAX_HUGEPAGE_LEVEL; ++i) {</div><div class='ctx'> 		linfo = lpage_info_slot(gfn, slot, i);</div><div class='ctx'> 		linfo-&gt;write_count += 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	kvm-&gt;arch.indirect_shadow_pages++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)</div><div class='add'>+static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	struct kvm_lpage_info *linfo;</div><div class='add'>+	gfn_t gfn;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(kvm, gfn);</div><div class='del'>-	for (i = PT_DIRECTORY_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='add'>+	gfn = sp-&gt;gfn;</div><div class='add'>+	slots = kvm_memslots_for_spte_role(kvm, sp-&gt;role);</div><div class='add'>+	slot = __gfn_to_memslot(slots, gfn);</div><div class='add'>+	for (i = PT_DIRECTORY_LEVEL; i &lt;= PT_MAX_HUGEPAGE_LEVEL; ++i) {</div><div class='ctx'> 		linfo = lpage_info_slot(gfn, slot, i);</div><div class='ctx'> 		linfo-&gt;write_count -= 1;</div><div class='ctx'> 		WARN_ON(linfo-&gt;write_count &lt; 0);</div><div class='hunk'>@@ -835,14 +841,14 @@ static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)</div><div class='ctx'> 	kvm-&gt;arch.indirect_shadow_pages--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int has_wrprotected_page(struct kvm *kvm,</div><div class='add'>+static int has_wrprotected_page(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				gfn_t gfn,</div><div class='ctx'> 				int level)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	struct kvm_lpage_info *linfo;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(kvm, gfn);</div><div class='add'>+	slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);</div><div class='ctx'> 	if (slot) {</div><div class='ctx'> 		linfo = lpage_info_slot(gfn, slot, level);</div><div class='ctx'> 		return linfo-&gt;write_count;</div><div class='hunk'>@@ -858,8 +864,7 @@ static int host_mapping_level(struct kvm *kvm, gfn_t gfn)</div><div class='ctx'> </div><div class='ctx'> 	page_size = kvm_host_page_size(kvm, gfn);</div><div class='ctx'> </div><div class='del'>-	for (i = PT_PAGE_TABLE_LEVEL;</div><div class='del'>-	     i &lt; (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {</div><div class='add'>+	for (i = PT_PAGE_TABLE_LEVEL; i &lt;= PT_MAX_HUGEPAGE_LEVEL; ++i) {</div><div class='ctx'> 		if (page_size &gt;= KVM_HPAGE_SIZE(i))</div><div class='ctx'> 			ret = i;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -875,7 +880,7 @@ gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(vcpu-&gt;kvm, gfn);</div><div class='add'>+	slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);</div><div class='ctx'> 	if (!slot || slot-&gt;flags &amp; KVM_MEMSLOT_INVALID ||</div><div class='ctx'> 	      (no_dirty_log &amp;&amp; slot-&gt;dirty_bitmap))</div><div class='ctx'> 		slot = NULL;</div><div class='hunk'>@@ -900,7 +905,7 @@ static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)</div><div class='ctx'> 	max_level = min(kvm_x86_ops-&gt;get_lpage_level(), host_level);</div><div class='ctx'> </div><div class='ctx'> 	for (level = PT_DIRECTORY_LEVEL; level &lt;= max_level; ++level)</div><div class='del'>-		if (has_wrprotected_page(vcpu-&gt;kvm, large_gfn, level))</div><div class='add'>+		if (has_wrprotected_page(vcpu, large_gfn, level))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 	return level - 1;</div><div class='hunk'>@@ -1042,12 +1047,14 @@ static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,</div><div class='ctx'> /*</div><div class='ctx'>  * Take gfn and return the reverse mapping to it.</div><div class='ctx'>  */</div><div class='del'>-static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)</div><div class='add'>+static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(kvm, gfn);</div><div class='del'>-	return __gfn_to_rmap(gfn, level, slot);</div><div class='add'>+	slots = kvm_memslots_for_spte_role(kvm, sp-&gt;role);</div><div class='add'>+	slot = __gfn_to_memslot(slots, gfn);</div><div class='add'>+	return __gfn_to_rmap(gfn, sp-&gt;role.level, slot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool rmap_can_add(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -1065,7 +1072,7 @@ static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)</div><div class='ctx'> </div><div class='ctx'> 	sp = page_header(__pa(spte));</div><div class='ctx'> 	kvm_mmu_page_set_gfn(sp, spte - sp-&gt;spt, gfn);</div><div class='del'>-	rmapp = gfn_to_rmap(vcpu-&gt;kvm, gfn, sp-&gt;role.level);</div><div class='add'>+	rmapp = gfn_to_rmap(vcpu-&gt;kvm, gfn, sp);</div><div class='ctx'> 	return pte_list_add(vcpu, spte, rmapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1077,7 +1084,7 @@ static void rmap_remove(struct kvm *kvm, u64 *spte)</div><div class='ctx'> </div><div class='ctx'> 	sp = page_header(__pa(spte));</div><div class='ctx'> 	gfn = kvm_mmu_page_get_gfn(sp, spte - sp-&gt;spt);</div><div class='del'>-	rmapp = gfn_to_rmap(kvm, gfn, sp-&gt;role.level);</div><div class='add'>+	rmapp = gfn_to_rmap(kvm, gfn, sp);</div><div class='ctx'> 	pte_list_remove(spte, rmapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1142,6 +1149,11 @@ static u64 *rmap_get_next(struct rmap_iterator *iter)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define for_each_rmap_spte(_rmap_, _iter_, _spte_)			    \</div><div class='add'>+	   for (_spte_ = rmap_get_first(*_rmap_, _iter_);		    \</div><div class='add'>+		_spte_ &amp;&amp; ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;});  \</div><div class='add'>+			_spte_ = rmap_get_next(_iter_))</div><div class='add'>+</div><div class='ctx'> static void drop_spte(struct kvm *kvm, u64 *sptep)</div><div class='ctx'> {</div><div class='ctx'> 	if (mmu_spte_clear_track_bits(sptep))</div><div class='hunk'>@@ -1205,12 +1217,8 @@ static bool __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	struct rmap_iterator iter;</div><div class='ctx'> 	bool flush = false;</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='del'>-		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='del'>-</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		flush |= spte_write_protect(kvm, sptep, pt_protect);</div><div class='del'>-		sptep = rmap_get_next(&amp;iter);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return flush;</div><div class='ctx'> }</div><div class='hunk'>@@ -1232,12 +1240,8 @@ static bool __rmap_clear_dirty(struct kvm *kvm, unsigned long *rmapp)</div><div class='ctx'> 	struct rmap_iterator iter;</div><div class='ctx'> 	bool flush = false;</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='del'>-		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='del'>-</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		flush |= spte_clear_dirty(kvm, sptep);</div><div class='del'>-		sptep = rmap_get_next(&amp;iter);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return flush;</div><div class='ctx'> }</div><div class='hunk'>@@ -1259,12 +1263,8 @@ static bool __rmap_set_dirty(struct kvm *kvm, unsigned long *rmapp)</div><div class='ctx'> 	struct rmap_iterator iter;</div><div class='ctx'> 	bool flush = false;</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='del'>-		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='del'>-</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		flush |= spte_set_dirty(kvm, sptep);</div><div class='del'>-		sptep = rmap_get_next(&amp;iter);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return flush;</div><div class='ctx'> }</div><div class='hunk'>@@ -1342,42 +1342,45 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,</div><div class='ctx'> 		kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool rmap_write_protect(struct kvm *kvm, u64 gfn)</div><div class='add'>+static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	unsigned long *rmapp;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	bool write_protected = false;</div><div class='ctx'> </div><div class='del'>-	slot = gfn_to_memslot(kvm, gfn);</div><div class='add'>+	slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);</div><div class='ctx'> </div><div class='del'>-	for (i = PT_PAGE_TABLE_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='add'>+	for (i = PT_PAGE_TABLE_LEVEL; i &lt;= PT_MAX_HUGEPAGE_LEVEL; ++i) {</div><div class='ctx'> 		rmapp = __gfn_to_rmap(gfn, i, slot);</div><div class='del'>-		write_protected |= __rmap_write_protect(kvm, rmapp, true);</div><div class='add'>+		write_protected |= __rmap_write_protect(vcpu-&gt;kvm, rmapp, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return write_protected;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='del'>-			   struct kvm_memory_slot *slot, gfn_t gfn, int level,</div><div class='del'>-			   unsigned long data)</div><div class='add'>+static bool kvm_zap_rmapp(struct kvm *kvm, unsigned long *rmapp)</div><div class='ctx'> {</div><div class='ctx'> 	u64 *sptep;</div><div class='ctx'> 	struct rmap_iterator iter;</div><div class='del'>-	int need_tlb_flush = 0;</div><div class='add'>+	bool flush = false;</div><div class='ctx'> </div><div class='ctx'> 	while ((sptep = rmap_get_first(*rmapp, &amp;iter))) {</div><div class='ctx'> 		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='del'>-		rmap_printk("kvm_rmap_unmap_hva: spte %p %llx gfn %llx (%d)\n",</div><div class='del'>-			     sptep, *sptep, gfn, level);</div><div class='add'>+		rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep);</div><div class='ctx'> </div><div class='ctx'> 		drop_spte(kvm, sptep);</div><div class='del'>-		need_tlb_flush = 1;</div><div class='add'>+		flush = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return need_tlb_flush;</div><div class='add'>+	return flush;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='add'>+			   struct kvm_memory_slot *slot, gfn_t gfn, int level,</div><div class='add'>+			   unsigned long data)</div><div class='add'>+{</div><div class='add'>+	return kvm_zap_rmapp(kvm, rmapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='hunk'>@@ -1394,8 +1397,8 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	WARN_ON(pte_huge(*ptep));</div><div class='ctx'> 	new_pfn = pte_pfn(*ptep);</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='del'>-		BUG_ON(!is_shadow_present_pte(*sptep));</div><div class='add'>+restart:</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep) {</div><div class='ctx'> 		rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",</div><div class='ctx'> 			     sptep, *sptep, gfn, level);</div><div class='ctx'> </div><div class='hunk'>@@ -1403,7 +1406,7 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> </div><div class='ctx'> 		if (pte_write(*ptep)) {</div><div class='ctx'> 			drop_spte(kvm, sptep);</div><div class='del'>-			sptep = rmap_get_first(*rmapp, &amp;iter);</div><div class='add'>+			goto restart;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			new_spte = *sptep &amp; ~PT64_BASE_ADDR_MASK;</div><div class='ctx'> 			new_spte |= (u64)new_pfn &lt;&lt; PAGE_SHIFT;</div><div class='hunk'>@@ -1414,7 +1417,6 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> </div><div class='ctx'> 			mmu_spte_clear_track_bits(sptep);</div><div class='ctx'> 			mmu_spte_set(sptep, new_spte);</div><div class='del'>-			sptep = rmap_get_next(&amp;iter);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1424,6 +1426,74 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct slot_rmap_walk_iterator {</div><div class='add'>+	/* input fields. */</div><div class='add'>+	struct kvm_memory_slot *slot;</div><div class='add'>+	gfn_t start_gfn;</div><div class='add'>+	gfn_t end_gfn;</div><div class='add'>+	int start_level;</div><div class='add'>+	int end_level;</div><div class='add'>+</div><div class='add'>+	/* output fields. */</div><div class='add'>+	gfn_t gfn;</div><div class='add'>+	unsigned long *rmap;</div><div class='add'>+	int level;</div><div class='add'>+</div><div class='add'>+	/* private field. */</div><div class='add'>+	unsigned long *end_rmap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)</div><div class='add'>+{</div><div class='add'>+	iterator-&gt;level = level;</div><div class='add'>+	iterator-&gt;gfn = iterator-&gt;start_gfn;</div><div class='add'>+	iterator-&gt;rmap = __gfn_to_rmap(iterator-&gt;gfn, level, iterator-&gt;slot);</div><div class='add'>+	iterator-&gt;end_rmap = __gfn_to_rmap(iterator-&gt;end_gfn, level,</div><div class='add'>+					   iterator-&gt;slot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,</div><div class='add'>+		    struct kvm_memory_slot *slot, int start_level,</div><div class='add'>+		    int end_level, gfn_t start_gfn, gfn_t end_gfn)</div><div class='add'>+{</div><div class='add'>+	iterator-&gt;slot = slot;</div><div class='add'>+	iterator-&gt;start_level = start_level;</div><div class='add'>+	iterator-&gt;end_level = end_level;</div><div class='add'>+	iterator-&gt;start_gfn = start_gfn;</div><div class='add'>+	iterator-&gt;end_gfn = end_gfn;</div><div class='add'>+</div><div class='add'>+	rmap_walk_init_level(iterator, iterator-&gt;start_level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)</div><div class='add'>+{</div><div class='add'>+	return !!iterator-&gt;rmap;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)</div><div class='add'>+{</div><div class='add'>+	if (++iterator-&gt;rmap &lt;= iterator-&gt;end_rmap) {</div><div class='add'>+		iterator-&gt;gfn += (1UL &lt;&lt; KVM_HPAGE_GFN_SHIFT(iterator-&gt;level));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (++iterator-&gt;level &gt; iterator-&gt;end_level) {</div><div class='add'>+		iterator-&gt;rmap = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rmap_walk_init_level(iterator, iterator-&gt;level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_,	\</div><div class='add'>+	   _start_gfn, _end_gfn, _iter_)				\</div><div class='add'>+	for (slot_rmap_walk_init(_iter_, _slot_, _start_level_,		\</div><div class='add'>+				 _end_level_, _start_gfn, _end_gfn);	\</div><div class='add'>+	     slot_rmap_walk_okay(_iter_);				\</div><div class='add'>+	     slot_rmap_walk_next(_iter_))</div><div class='add'>+</div><div class='ctx'> static int kvm_handle_hva_range(struct kvm *kvm,</div><div class='ctx'> 				unsigned long start,</div><div class='ctx'> 				unsigned long end,</div><div class='hunk'>@@ -1435,48 +1505,36 @@ static int kvm_handle_hva_range(struct kvm *kvm,</div><div class='ctx'> 					       int level,</div><div class='ctx'> 					       unsigned long data))</div><div class='ctx'> {</div><div class='del'>-	int j;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='add'>+	struct slot_rmap_walk_iterator iterator;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	slots = kvm_memslots(kvm);</div><div class='del'>-</div><div class='del'>-	kvm_for_each_memslot(memslot, slots) {</div><div class='del'>-		unsigned long hva_start, hva_end;</div><div class='del'>-		gfn_t gfn_start, gfn_end;</div><div class='del'>-</div><div class='del'>-		hva_start = max(start, memslot-&gt;userspace_addr);</div><div class='del'>-		hva_end = min(end, memslot-&gt;userspace_addr +</div><div class='del'>-					(memslot-&gt;npages &lt;&lt; PAGE_SHIFT));</div><div class='del'>-		if (hva_start &gt;= hva_end)</div><div class='del'>-			continue;</div><div class='del'>-		/*</div><div class='del'>-		 * {gfn(page) | page intersects with [hva_start, hva_end)} =</div><div class='del'>-		 * {gfn_start, gfn_start+1, ..., gfn_end-1}.</div><div class='del'>-		 */</div><div class='del'>-		gfn_start = hva_to_gfn_memslot(hva_start, memslot);</div><div class='del'>-		gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);</div><div class='del'>-</div><div class='del'>-		for (j = PT_PAGE_TABLE_LEVEL;</div><div class='del'>-		     j &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++j) {</div><div class='del'>-			unsigned long idx, idx_end;</div><div class='del'>-			unsigned long *rmapp;</div><div class='del'>-			gfn_t gfn = gfn_start;</div><div class='add'>+	for (i = 0; i &lt; KVM_ADDRESS_SPACE_NUM; i++) {</div><div class='add'>+		slots = __kvm_memslots(kvm, i);</div><div class='add'>+		kvm_for_each_memslot(memslot, slots) {</div><div class='add'>+			unsigned long hva_start, hva_end;</div><div class='add'>+			gfn_t gfn_start, gfn_end;</div><div class='ctx'> </div><div class='add'>+			hva_start = max(start, memslot-&gt;userspace_addr);</div><div class='add'>+			hva_end = min(end, memslot-&gt;userspace_addr +</div><div class='add'>+				      (memslot-&gt;npages &lt;&lt; PAGE_SHIFT));</div><div class='add'>+			if (hva_start &gt;= hva_end)</div><div class='add'>+				continue;</div><div class='ctx'> 			/*</div><div class='del'>-			 * {idx(page_j) | page_j intersects with</div><div class='del'>-			 *  [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.</div><div class='add'>+			 * {gfn(page) | page intersects with [hva_start, hva_end)} =</div><div class='add'>+			 * {gfn_start, gfn_start+1, ..., gfn_end-1}.</div><div class='ctx'> 			 */</div><div class='del'>-			idx = gfn_to_index(gfn_start, memslot-&gt;base_gfn, j);</div><div class='del'>-			idx_end = gfn_to_index(gfn_end - 1, memslot-&gt;base_gfn, j);</div><div class='del'>-</div><div class='del'>-			rmapp = __gfn_to_rmap(gfn_start, j, memslot);</div><div class='del'>-</div><div class='del'>-			for (; idx &lt;= idx_end;</div><div class='del'>-			       ++idx, gfn += (1UL &lt;&lt; KVM_HPAGE_GFN_SHIFT(j)))</div><div class='del'>-				ret |= handler(kvm, rmapp++, memslot,</div><div class='del'>-					       gfn, j, data);</div><div class='add'>+			gfn_start = hva_to_gfn_memslot(hva_start, memslot);</div><div class='add'>+			gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);</div><div class='add'>+</div><div class='add'>+			for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL,</div><div class='add'>+						 PT_MAX_HUGEPAGE_LEVEL,</div><div class='add'>+						 gfn_start, gfn_end - 1,</div><div class='add'>+						 &amp;iterator)</div><div class='add'>+				ret |= handler(kvm, iterator.rmap, memslot,</div><div class='add'>+					       iterator.gfn, iterator.level, data);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1518,16 +1576,13 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!shadow_accessed_mask);</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='del'>-	     sptep = rmap_get_next(&amp;iter)) {</div><div class='del'>-		BUG_ON(!is_shadow_present_pte(*sptep));</div><div class='del'>-</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		if (*sptep &amp; shadow_accessed_mask) {</div><div class='ctx'> 			young = 1;</div><div class='ctx'> 			clear_bit((ffs(shadow_accessed_mask) - 1),</div><div class='ctx'> 				 (unsigned long *)sptep);</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	trace_kvm_age_page(gfn, level, slot, young);</div><div class='ctx'> 	return young;</div><div class='ctx'> }</div><div class='hunk'>@@ -1548,15 +1603,11 @@ static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	if (!shadow_accessed_mask)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='del'>-	     sptep = rmap_get_next(&amp;iter)) {</div><div class='del'>-		BUG_ON(!is_shadow_present_pte(*sptep));</div><div class='del'>-</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		if (*sptep &amp; shadow_accessed_mask) {</div><div class='ctx'> 			young = 1;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> out:</div><div class='ctx'> 	return young;</div><div class='ctx'> }</div><div class='hunk'>@@ -1570,7 +1621,7 @@ static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)</div><div class='ctx'> </div><div class='ctx'> 	sp = page_header(__pa(spte));</div><div class='ctx'> </div><div class='del'>-	rmapp = gfn_to_rmap(vcpu-&gt;kvm, gfn, sp-&gt;role.level);</div><div class='add'>+	rmapp = gfn_to_rmap(vcpu-&gt;kvm, gfn, sp);</div><div class='ctx'> </div><div class='ctx'> 	kvm_unmap_rmapp(vcpu-&gt;kvm, rmapp, NULL, gfn, sp-&gt;role.level, 0);</div><div class='ctx'> 	kvm_flush_remote_tlbs(vcpu-&gt;kvm);</div><div class='hunk'>@@ -1990,7 +2041,7 @@ static void mmu_sync_children(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		bool protected = false;</div><div class='ctx'> </div><div class='ctx'> 		for_each_sp(pages, sp, parents, i)</div><div class='del'>-			protected |= rmap_write_protect(vcpu-&gt;kvm, sp-&gt;gfn);</div><div class='add'>+			protected |= rmap_write_protect(vcpu, sp-&gt;gfn);</div><div class='ctx'> </div><div class='ctx'> 		if (protected)</div><div class='ctx'> 			kvm_flush_remote_tlbs(vcpu-&gt;kvm);</div><div class='hunk'>@@ -2088,12 +2139,12 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	hlist_add_head(&amp;sp-&gt;hash_link,</div><div class='ctx'> 		&amp;vcpu-&gt;kvm-&gt;arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);</div><div class='ctx'> 	if (!direct) {</div><div class='del'>-		if (rmap_write_protect(vcpu-&gt;kvm, gfn))</div><div class='add'>+		if (rmap_write_protect(vcpu, gfn))</div><div class='ctx'> 			kvm_flush_remote_tlbs(vcpu-&gt;kvm);</div><div class='ctx'> 		if (level &gt; PT_PAGE_TABLE_LEVEL &amp;&amp; need_sync)</div><div class='ctx'> 			kvm_sync_pages(vcpu, gfn);</div><div class='ctx'> </div><div class='del'>-		account_shadowed(vcpu-&gt;kvm, gfn);</div><div class='add'>+		account_shadowed(vcpu-&gt;kvm, sp);</div><div class='ctx'> 	}</div><div class='ctx'> 	sp-&gt;mmu_valid_gen = vcpu-&gt;kvm-&gt;arch.mmu_valid_gen;</div><div class='ctx'> 	init_shadow_page_table(sp);</div><div class='hunk'>@@ -2274,7 +2325,7 @@ static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,</div><div class='ctx'> 	kvm_mmu_unlink_parents(kvm, sp);</div><div class='ctx'> </div><div class='ctx'> 	if (!sp-&gt;role.invalid &amp;&amp; !sp-&gt;role.direct)</div><div class='del'>-		unaccount_shadowed(kvm, sp-&gt;gfn);</div><div class='add'>+		unaccount_shadowed(kvm, sp);</div><div class='ctx'> </div><div class='ctx'> 	if (sp-&gt;unsync)</div><div class='ctx'> 		kvm_unlink_unsync_page(kvm, sp);</div><div class='hunk'>@@ -2386,111 +2437,6 @@ int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The function is based on mtrr_type_lookup() in</div><div class='del'>- * arch/x86/kernel/cpu/mtrr/generic.c</div><div class='del'>- */</div><div class='del'>-static int get_mtrr_type(struct mtrr_state_type *mtrr_state,</div><div class='del'>-			 u64 start, u64 end)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	u64 base, mask;</div><div class='del'>-	u8 prev_match, curr_match;</div><div class='del'>-	int num_var_ranges = KVM_NR_VAR_MTRR;</div><div class='del'>-</div><div class='del'>-	if (!mtrr_state-&gt;enabled)</div><div class='del'>-		return 0xFF;</div><div class='del'>-</div><div class='del'>-	/* Make end inclusive end, instead of exclusive */</div><div class='del'>-	end--;</div><div class='del'>-</div><div class='del'>-	/* Look in fixed ranges. Just return the type as per start */</div><div class='del'>-	if (mtrr_state-&gt;have_fixed &amp;&amp; (start &lt; 0x100000)) {</div><div class='del'>-		int idx;</div><div class='del'>-</div><div class='del'>-		if (start &lt; 0x80000) {</div><div class='del'>-			idx = 0;</div><div class='del'>-			idx += (start &gt;&gt; 16);</div><div class='del'>-			return mtrr_state-&gt;fixed_ranges[idx];</div><div class='del'>-		} else if (start &lt; 0xC0000) {</div><div class='del'>-			idx = 1 * 8;</div><div class='del'>-			idx += ((start - 0x80000) &gt;&gt; 14);</div><div class='del'>-			return mtrr_state-&gt;fixed_ranges[idx];</div><div class='del'>-		} else if (start &lt; 0x1000000) {</div><div class='del'>-			idx = 3 * 8;</div><div class='del'>-			idx += ((start - 0xC0000) &gt;&gt; 12);</div><div class='del'>-			return mtrr_state-&gt;fixed_ranges[idx];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Look in variable ranges</div><div class='del'>-	 * Look of multiple ranges matching this address and pick type</div><div class='del'>-	 * as per MTRR precedence</div><div class='del'>-	 */</div><div class='del'>-	if (!(mtrr_state-&gt;enabled &amp; 2))</div><div class='del'>-		return mtrr_state-&gt;def_type;</div><div class='del'>-</div><div class='del'>-	prev_match = 0xFF;</div><div class='del'>-	for (i = 0; i &lt; num_var_ranges; ++i) {</div><div class='del'>-		unsigned short start_state, end_state;</div><div class='del'>-</div><div class='del'>-		if (!(mtrr_state-&gt;var_ranges[i].mask_lo &amp; (1 &lt;&lt; 11)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		base = (((u64)mtrr_state-&gt;var_ranges[i].base_hi) &lt;&lt; 32) +</div><div class='del'>-		       (mtrr_state-&gt;var_ranges[i].base_lo &amp; PAGE_MASK);</div><div class='del'>-		mask = (((u64)mtrr_state-&gt;var_ranges[i].mask_hi) &lt;&lt; 32) +</div><div class='del'>-		       (mtrr_state-&gt;var_ranges[i].mask_lo &amp; PAGE_MASK);</div><div class='del'>-</div><div class='del'>-		start_state = ((start &amp; mask) == (base &amp; mask));</div><div class='del'>-		end_state = ((end &amp; mask) == (base &amp; mask));</div><div class='del'>-		if (start_state != end_state)</div><div class='del'>-			return 0xFE;</div><div class='del'>-</div><div class='del'>-		if ((start &amp; mask) != (base &amp; mask))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		curr_match = mtrr_state-&gt;var_ranges[i].base_lo &amp; 0xff;</div><div class='del'>-		if (prev_match == 0xFF) {</div><div class='del'>-			prev_match = curr_match;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (prev_match == MTRR_TYPE_UNCACHABLE ||</div><div class='del'>-		    curr_match == MTRR_TYPE_UNCACHABLE)</div><div class='del'>-			return MTRR_TYPE_UNCACHABLE;</div><div class='del'>-</div><div class='del'>-		if ((prev_match == MTRR_TYPE_WRBACK &amp;&amp;</div><div class='del'>-		     curr_match == MTRR_TYPE_WRTHROUGH) ||</div><div class='del'>-		    (prev_match == MTRR_TYPE_WRTHROUGH &amp;&amp;</div><div class='del'>-		     curr_match == MTRR_TYPE_WRBACK)) {</div><div class='del'>-			prev_match = MTRR_TYPE_WRTHROUGH;</div><div class='del'>-			curr_match = MTRR_TYPE_WRTHROUGH;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (prev_match != curr_match)</div><div class='del'>-			return MTRR_TYPE_UNCACHABLE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (prev_match != 0xFF)</div><div class='del'>-		return prev_match;</div><div class='del'>-</div><div class='del'>-	return mtrr_state-&gt;def_type;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)</div><div class='del'>-{</div><div class='del'>-	u8 mtrr;</div><div class='del'>-</div><div class='del'>-	mtrr = get_mtrr_type(&amp;vcpu-&gt;arch.mtrr_state, gfn &lt;&lt; PAGE_SHIFT,</div><div class='del'>-			     (gfn &lt;&lt; PAGE_SHIFT) + PAGE_SIZE);</div><div class='del'>-	if (mtrr == 0xfe || mtrr == 0xff)</div><div class='del'>-		mtrr = MTRR_TYPE_WRBACK;</div><div class='del'>-	return mtrr;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);</div><div class='del'>-</div><div class='ctx'> static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	trace_kvm_mmu_unsync_page(sp);</div><div class='hunk'>@@ -2533,6 +2479,14 @@ static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool kvm_is_mmio_pfn(pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	if (pfn_valid(pfn))</div><div class='add'>+		return !is_zero_pfn(pfn) &amp;&amp; PageReserved(pfn_to_page(pfn));</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,</div><div class='ctx'> 		    unsigned pte_access, int level,</div><div class='ctx'> 		    gfn_t gfn, pfn_t pfn, bool speculative,</div><div class='hunk'>@@ -2541,7 +2495,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,</div><div class='ctx'> 	u64 spte;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (set_mmio_spte(vcpu-&gt;kvm, sptep, gfn, pfn, pte_access))</div><div class='add'>+	if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	spte = PT_PRESENT_MASK;</div><div class='hunk'>@@ -2560,7 +2514,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,</div><div class='ctx'> 		spte |= PT_PAGE_SIZE_MASK;</div><div class='ctx'> 	if (tdp_enabled)</div><div class='ctx'> 		spte |= kvm_x86_ops-&gt;get_mt_mask(vcpu, gfn,</div><div class='del'>-			kvm_is_reserved_pfn(pfn));</div><div class='add'>+			kvm_is_mmio_pfn(pfn));</div><div class='ctx'> </div><div class='ctx'> 	if (host_writable)</div><div class='ctx'> 		spte |= SPTE_HOST_WRITEABLE;</div><div class='hunk'>@@ -2578,7 +2532,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,</div><div class='ctx'> 		 * be fixed if guest refault.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (level &gt; PT_PAGE_TABLE_LEVEL &amp;&amp;</div><div class='del'>-		    has_wrprotected_page(vcpu-&gt;kvm, gfn, level))</div><div class='add'>+		    has_wrprotected_page(vcpu, gfn, level))</div><div class='ctx'> 			goto done;</div><div class='ctx'> </div><div class='ctx'> 		spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;</div><div class='hunk'>@@ -2602,7 +2556,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pte_access &amp; ACC_WRITE_MASK) {</div><div class='del'>-		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='add'>+		kvm_vcpu_mark_page_dirty(vcpu, gfn);</div><div class='ctx'> 		spte |= shadow_dirty_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2692,15 +2646,17 @@ static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				    u64 *start, u64 *end)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *pages[PTE_PREFETCH_NUM];</div><div class='add'>+	struct kvm_memory_slot *slot;</div><div class='ctx'> 	unsigned access = sp-&gt;role.access;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> 	gfn_t gfn;</div><div class='ctx'> </div><div class='ctx'> 	gfn = kvm_mmu_page_get_gfn(sp, start - sp-&gt;spt);</div><div class='del'>-	if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access &amp; ACC_WRITE_MASK))</div><div class='add'>+	slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access &amp; ACC_WRITE_MASK);</div><div class='add'>+	if (!slot)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = gfn_to_page_many_atomic(vcpu-&gt;kvm, gfn, pages, end - start);</div><div class='add'>+	ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);</div><div class='ctx'> 	if (ret &lt;= 0)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='hunk'>@@ -2818,7 +2774,7 @@ static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if (pfn == KVM_PFN_ERR_HWPOISON) {</div><div class='del'>-		kvm_send_hwpoison_signal(gfn_to_hva(vcpu-&gt;kvm, gfn), current);</div><div class='add'>+		kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2841,7 +2797,7 @@ static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (!is_error_noslot_pfn(pfn) &amp;&amp; !kvm_is_reserved_pfn(pfn) &amp;&amp;</div><div class='ctx'> 	    level == PT_PAGE_TABLE_LEVEL &amp;&amp;</div><div class='ctx'> 	    PageTransCompound(pfn_to_page(pfn)) &amp;&amp;</div><div class='del'>-	    !has_wrprotected_page(vcpu-&gt;kvm, gfn, PT_DIRECTORY_LEVEL)) {</div><div class='add'>+	    !has_wrprotected_page(vcpu, gfn, PT_DIRECTORY_LEVEL)) {</div><div class='ctx'> 		unsigned long mask;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * mmu_notifier_retry was successful and we hold the</div><div class='hunk'>@@ -2933,7 +2889,7 @@ fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,</div><div class='ctx'> 	 * Compare with set_spte where instead shadow_dirty_mask is set.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)</div><div class='del'>-		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='add'>+		kvm_vcpu_mark_page_dirty(vcpu, gfn);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -3388,7 +3344,7 @@ int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)</div><div class='ctx'> 		gfn_t gfn = get_mmio_spte_gfn(spte);</div><div class='ctx'> 		unsigned access = get_mmio_spte_access(spte);</div><div class='ctx'> </div><div class='del'>-		if (!check_mmio_spte(vcpu-&gt;kvm, spte))</div><div class='add'>+		if (!check_mmio_spte(vcpu, spte))</div><div class='ctx'> 			return RET_MMIO_PF_INVALID;</div><div class='ctx'> </div><div class='ctx'> 		if (direct)</div><div class='hunk'>@@ -3460,7 +3416,7 @@ static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)</div><div class='ctx'> 	arch.direct_map = vcpu-&gt;arch.mmu.direct_map;</div><div class='ctx'> 	arch.cr3 = vcpu-&gt;arch.mmu.get_cr3(vcpu);</div><div class='ctx'> </div><div class='del'>-	return kvm_setup_async_pf(vcpu, gva, gfn_to_hva(vcpu-&gt;kvm, gfn), &amp;arch);</div><div class='add'>+	return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &amp;arch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool can_do_async_pf(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -3475,10 +3431,12 @@ static bool can_do_async_pf(struct kvm_vcpu *vcpu)</div><div class='ctx'> static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,</div><div class='ctx'> 			 gva_t gva, pfn_t *pfn, bool write, bool *writable)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memory_slot *slot;</div><div class='ctx'> 	bool async;</div><div class='ctx'> </div><div class='del'>-	*pfn = gfn_to_pfn_async(vcpu-&gt;kvm, gfn, &amp;async, write, writable);</div><div class='del'>-</div><div class='add'>+	slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);</div><div class='add'>+	async = false;</div><div class='add'>+	*pfn = __gfn_to_pfn_memslot(slot, gfn, false, &amp;async, write, writable);</div><div class='ctx'> 	if (!async)</div><div class='ctx'> 		return false; /* *pfn has correct page already */</div><div class='ctx'> </div><div class='hunk'>@@ -3492,11 +3450,20 @@ static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,</div><div class='ctx'> 			return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*pfn = gfn_to_pfn_prot(vcpu-&gt;kvm, gfn, write, writable);</div><div class='del'>-</div><div class='add'>+	*pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+check_hugepage_cache_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, int level)</div><div class='add'>+{</div><div class='add'>+	int page_num = KVM_PAGES_PER_HPAGE(level);</div><div class='add'>+</div><div class='add'>+	gfn &amp;= ~(page_num - 1);</div><div class='add'>+</div><div class='add'>+	return kvm_mtrr_check_gfn_range_consistency(vcpu, gfn, page_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,</div><div class='ctx'> 			  bool prefault)</div><div class='ctx'> {</div><div class='hunk'>@@ -3522,9 +3489,17 @@ static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);</div><div class='add'>+	if (mapping_level_dirty_bitmap(vcpu, gfn) ||</div><div class='add'>+	    !check_hugepage_cache_consistency(vcpu, gfn, PT_DIRECTORY_LEVEL))</div><div class='add'>+		force_pt_level = 1;</div><div class='add'>+	else</div><div class='add'>+		force_pt_level = 0;</div><div class='add'>+</div><div class='ctx'> 	if (likely(!force_pt_level)) {</div><div class='ctx'> 		level = mapping_level(vcpu, gfn);</div><div class='add'>+		if (level &gt; PT_DIRECTORY_LEVEL &amp;&amp;</div><div class='add'>+		    !check_hugepage_cache_consistency(vcpu, gfn, level))</div><div class='add'>+			level = PT_DIRECTORY_LEVEL;</div><div class='ctx'> 		gfn &amp;= ~(KVM_PAGES_PER_HPAGE(level) - 1);</div><div class='ctx'> 	} else</div><div class='ctx'> 		level = PT_PAGE_TABLE_LEVEL;</div><div class='hunk'>@@ -3590,7 +3565,7 @@ static void inject_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vcpu-&gt;arch.mmu.inject_page_fault(vcpu, fault);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool sync_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,</div><div class='add'>+static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,</div><div class='ctx'> 			   unsigned access, int *nr_present)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(is_mmio_spte(*sptep))) {</div><div class='hunk'>@@ -3600,7 +3575,7 @@ static bool sync_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		(*nr_present)++;</div><div class='del'>-		mark_mmio_spte(kvm, sptep, gfn, access);</div><div class='add'>+		mark_mmio_spte(vcpu, sptep, gfn, access);</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3878,6 +3853,7 @@ static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_mmu *context = &amp;vcpu-&gt;arch.mmu;</div><div class='ctx'> </div><div class='ctx'> 	context-&gt;base_role.word = 0;</div><div class='add'>+	context-&gt;base_role.smm = is_smm(vcpu);</div><div class='ctx'> 	context-&gt;page_fault = tdp_page_fault;</div><div class='ctx'> 	context-&gt;sync_page = nonpaging_sync_page;</div><div class='ctx'> 	context-&gt;invlpg = nonpaging_invlpg;</div><div class='hunk'>@@ -3939,6 +3915,7 @@ void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		= smep &amp;&amp; !is_write_protection(vcpu);</div><div class='ctx'> 	context-&gt;base_role.smap_andnot_wp</div><div class='ctx'> 		= smap &amp;&amp; !is_write_protection(vcpu);</div><div class='add'>+	context-&gt;base_role.smm = is_smm(vcpu);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);</div><div class='ctx'> </div><div class='hunk'>@@ -4110,7 +4087,7 @@ static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,</div><div class='ctx'> 		/* Handle a 32-bit guest writing two halves of a 64-bit gpte */</div><div class='ctx'> 		*gpa &amp;= ~(gpa_t)7;</div><div class='ctx'> 		*bytes = 8;</div><div class='del'>-		r = kvm_read_guest(vcpu-&gt;kvm, *gpa, &amp;gentry, 8);</div><div class='add'>+		r = kvm_vcpu_read_guest(vcpu, *gpa, &amp;gentry, 8);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			gentry = 0;</div><div class='ctx'> 		new = (const u8 *)&amp;gentry;</div><div class='hunk'>@@ -4222,6 +4199,7 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> 	mask.nxe = 1;</div><div class='ctx'> 	mask.smep_andnot_wp = 1;</div><div class='ctx'> 	mask.smap_andnot_wp = 1;</div><div class='add'>+	mask.smm = 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we don't have indirect shadow pages, it means no page is</div><div class='hunk'>@@ -4420,36 +4398,115 @@ void kvm_mmu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	init_kvm_mmu(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_mmu_slot_remove_write_access(struct kvm *kvm,</div><div class='del'>-				      struct kvm_memory_slot *memslot)</div><div class='add'>+/* The return value indicates if tlb flush on all vcpus is needed. */</div><div class='add'>+typedef bool (*slot_level_handler) (struct kvm *kvm, unsigned long *rmap);</div><div class='add'>+</div><div class='add'>+/* The caller should hold mmu-lock before calling this function. */</div><div class='add'>+static bool</div><div class='add'>+slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot,</div><div class='add'>+			slot_level_handler fn, int start_level, int end_level,</div><div class='add'>+			gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb)</div><div class='ctx'> {</div><div class='del'>-	gfn_t last_gfn;</div><div class='del'>-	int i;</div><div class='add'>+	struct slot_rmap_walk_iterator iterator;</div><div class='ctx'> 	bool flush = false;</div><div class='ctx'> </div><div class='del'>-	last_gfn = memslot-&gt;base_gfn + memslot-&gt;npages - 1;</div><div class='add'>+	for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,</div><div class='add'>+			end_gfn, &amp;iterator) {</div><div class='add'>+		if (iterator.rmap)</div><div class='add'>+			flush |= fn(kvm, iterator.rmap);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+		if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock)) {</div><div class='add'>+			if (flush &amp;&amp; lock_flush_tlb) {</div><div class='add'>+				kvm_flush_remote_tlbs(kvm);</div><div class='add'>+				flush = false;</div><div class='add'>+			}</div><div class='add'>+			cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flush &amp;&amp; lock_flush_tlb) {</div><div class='add'>+		kvm_flush_remote_tlbs(kvm);</div><div class='add'>+		flush = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return flush;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot,</div><div class='add'>+		  slot_level_handler fn, int start_level, int end_level,</div><div class='add'>+		  bool lock_flush_tlb)</div><div class='add'>+{</div><div class='add'>+	return slot_handle_level_range(kvm, memslot, fn, start_level,</div><div class='add'>+			end_level, memslot-&gt;base_gfn,</div><div class='add'>+			memslot-&gt;base_gfn + memslot-&gt;npages - 1,</div><div class='add'>+			lock_flush_tlb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot,</div><div class='add'>+		      slot_level_handler fn, bool lock_flush_tlb)</div><div class='add'>+{</div><div class='add'>+	return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,</div><div class='add'>+				 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot,</div><div class='add'>+			slot_level_handler fn, bool lock_flush_tlb)</div><div class='add'>+{</div><div class='add'>+	return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1,</div><div class='add'>+				 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = PT_PAGE_TABLE_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='del'>-		unsigned long *rmapp;</div><div class='del'>-		unsigned long last_index, index;</div><div class='add'>+static bool</div><div class='add'>+slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot,</div><div class='add'>+		 slot_level_handler fn, bool lock_flush_tlb)</div><div class='add'>+{</div><div class='add'>+	return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,</div><div class='add'>+				 PT_PAGE_TABLE_LEVEL, lock_flush_tlb);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		rmapp = memslot-&gt;arch.rmap[i - PT_PAGE_TABLE_LEVEL];</div><div class='del'>-		last_index = gfn_to_index(last_gfn, memslot-&gt;base_gfn, i);</div><div class='add'>+void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)</div><div class='add'>+{</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='add'>+	struct kvm_memory_slot *memslot;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-		for (index = 0; index &lt;= last_index; ++index, ++rmapp) {</div><div class='del'>-			if (*rmapp)</div><div class='del'>-				flush |= __rmap_write_protect(kvm, rmapp,</div><div class='del'>-						false);</div><div class='add'>+	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	for (i = 0; i &lt; KVM_ADDRESS_SPACE_NUM; i++) {</div><div class='add'>+		slots = __kvm_memslots(kvm, i);</div><div class='add'>+		kvm_for_each_memslot(memslot, slots) {</div><div class='add'>+			gfn_t start, end;</div><div class='add'>+</div><div class='add'>+			start = max(gfn_start, memslot-&gt;base_gfn);</div><div class='add'>+			end = min(gfn_end, memslot-&gt;base_gfn + memslot-&gt;npages);</div><div class='add'>+			if (start &gt;= end)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-			if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock))</div><div class='del'>-				cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+			slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,</div><div class='add'>+						PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL,</div><div class='add'>+						start, end - 1, true);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool slot_rmap_write_protect(struct kvm *kvm, unsigned long *rmapp)</div><div class='add'>+{</div><div class='add'>+	return __rmap_write_protect(kvm, rmapp, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_mmu_slot_remove_write_access(struct kvm *kvm,</div><div class='add'>+				      struct kvm_memory_slot *memslot)</div><div class='add'>+{</div><div class='add'>+	bool flush;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect,</div><div class='add'>+				      false);</div><div class='add'>+	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()</div><div class='hunk'>@@ -4482,9 +4539,8 @@ static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,</div><div class='ctx'> 	pfn_t pfn;</div><div class='ctx'> 	struct kvm_mmu_page *sp;</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='del'>-		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='del'>-</div><div class='add'>+restart:</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep) {</div><div class='ctx'> 		sp = page_header(__pa(sptep));</div><div class='ctx'> 		pfn = spte_to_pfn(*sptep);</div><div class='ctx'> </div><div class='hunk'>@@ -4499,71 +4555,31 @@ static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,</div><div class='ctx'> 			!kvm_is_reserved_pfn(pfn) &amp;&amp;</div><div class='ctx'> 			PageTransCompound(pfn_to_page(pfn))) {</div><div class='ctx'> 			drop_spte(kvm, sptep);</div><div class='del'>-			sptep = rmap_get_first(*rmapp, &amp;iter);</div><div class='ctx'> 			need_tlb_flush = 1;</div><div class='del'>-		} else</div><div class='del'>-			sptep = rmap_get_next(&amp;iter);</div><div class='add'>+			goto restart;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return need_tlb_flush;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,</div><div class='del'>-			struct kvm_memory_slot *memslot)</div><div class='add'>+				   const struct kvm_memory_slot *memslot)</div><div class='ctx'> {</div><div class='del'>-	bool flush = false;</div><div class='del'>-	unsigned long *rmapp;</div><div class='del'>-	unsigned long last_index, index;</div><div class='del'>-</div><div class='add'>+	/* FIXME: const-ify all uses of struct kvm_memory_slot.  */</div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	rmapp = memslot-&gt;arch.rmap[0];</div><div class='del'>-	last_index = gfn_to_index(memslot-&gt;base_gfn + memslot-&gt;npages - 1,</div><div class='del'>-				memslot-&gt;base_gfn, PT_PAGE_TABLE_LEVEL);</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt;= last_index; ++index, ++rmapp) {</div><div class='del'>-		if (*rmapp)</div><div class='del'>-			flush |= kvm_mmu_zap_collapsible_spte(kvm, rmapp);</div><div class='del'>-</div><div class='del'>-		if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock)) {</div><div class='del'>-			if (flush) {</div><div class='del'>-				kvm_flush_remote_tlbs(kvm);</div><div class='del'>-				flush = false;</div><div class='del'>-			}</div><div class='del'>-			cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (flush)</div><div class='del'>-		kvm_flush_remote_tlbs(kvm);</div><div class='del'>-</div><div class='add'>+	slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot,</div><div class='add'>+			 kvm_mmu_zap_collapsible_spte, true);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot)</div><div class='ctx'> {</div><div class='del'>-	gfn_t last_gfn;</div><div class='del'>-	unsigned long *rmapp;</div><div class='del'>-	unsigned long last_index, index;</div><div class='del'>-	bool flush = false;</div><div class='del'>-</div><div class='del'>-	last_gfn = memslot-&gt;base_gfn + memslot-&gt;npages - 1;</div><div class='add'>+	bool flush;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	rmapp = memslot-&gt;arch.rmap[PT_PAGE_TABLE_LEVEL - 1];</div><div class='del'>-	last_index = gfn_to_index(last_gfn, memslot-&gt;base_gfn,</div><div class='del'>-			PT_PAGE_TABLE_LEVEL);</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt;= last_index; ++index, ++rmapp) {</div><div class='del'>-		if (*rmapp)</div><div class='del'>-			flush |= __rmap_clear_dirty(kvm, rmapp);</div><div class='del'>-</div><div class='del'>-		if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock))</div><div class='del'>-			cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;slots_lock);</div><div class='hunk'>@@ -4582,31 +4598,11 @@ EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty);</div><div class='ctx'> void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,</div><div class='ctx'> 					struct kvm_memory_slot *memslot)</div><div class='ctx'> {</div><div class='del'>-	gfn_t last_gfn;</div><div class='del'>-	int i;</div><div class='del'>-	bool flush = false;</div><div class='del'>-</div><div class='del'>-	last_gfn = memslot-&gt;base_gfn + memslot-&gt;npages - 1;</div><div class='add'>+	bool flush;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	for (i = PT_PAGE_TABLE_LEVEL + 1; /* skip rmap for 4K page */</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='del'>-		unsigned long *rmapp;</div><div class='del'>-		unsigned long last_index, index;</div><div class='del'>-</div><div class='del'>-		rmapp = memslot-&gt;arch.rmap[i - PT_PAGE_TABLE_LEVEL];</div><div class='del'>-		last_index = gfn_to_index(last_gfn, memslot-&gt;base_gfn, i);</div><div class='del'>-</div><div class='del'>-		for (index = 0; index &lt;= last_index; ++index, ++rmapp) {</div><div class='del'>-			if (*rmapp)</div><div class='del'>-				flush |= __rmap_write_protect(kvm, rmapp,</div><div class='del'>-						false);</div><div class='del'>-</div><div class='del'>-			if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock))</div><div class='del'>-				cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect,</div><div class='add'>+					false);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* see kvm_mmu_slot_remove_write_access */</div><div class='hunk'>@@ -4620,31 +4616,10 @@ EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access);</div><div class='ctx'> void kvm_mmu_slot_set_dirty(struct kvm *kvm,</div><div class='ctx'> 			    struct kvm_memory_slot *memslot)</div><div class='ctx'> {</div><div class='del'>-	gfn_t last_gfn;</div><div class='del'>-	int i;</div><div class='del'>-	bool flush = false;</div><div class='del'>-</div><div class='del'>-	last_gfn = memslot-&gt;base_gfn + memslot-&gt;npages - 1;</div><div class='add'>+	bool flush;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	for (i = PT_PAGE_TABLE_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='del'>-		unsigned long *rmapp;</div><div class='del'>-		unsigned long last_index, index;</div><div class='del'>-</div><div class='del'>-		rmapp = memslot-&gt;arch.rmap[i - PT_PAGE_TABLE_LEVEL];</div><div class='del'>-		last_index = gfn_to_index(last_gfn, memslot-&gt;base_gfn, i);</div><div class='del'>-</div><div class='del'>-		for (index = 0; index &lt;= last_index; ++index, ++rmapp) {</div><div class='del'>-			if (*rmapp)</div><div class='del'>-				flush |= __rmap_set_dirty(kvm, rmapp);</div><div class='del'>-</div><div class='del'>-			if (need_resched() || spin_needbreak(&amp;kvm-&gt;mmu_lock))</div><div class='del'>-				cond_resched_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;slots_lock);</div><div class='hunk'>@@ -4741,13 +4716,13 @@ static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)</div><div class='ctx'> 	return unlikely(!list_empty_careful(&amp;kvm-&gt;arch.zapped_obsolete_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm)</div><div class='add'>+void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The very rare case: if the generation-number is round,</div><div class='ctx'> 	 * zap all shadow pages.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(kvm_current_mmio_generation(kvm) == 0)) {</div><div class='add'>+	if (unlikely((slots-&gt;generation &amp; MMIO_GEN_MASK) == 0)) {</div><div class='ctx'> 		printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n");</div><div class='ctx'> 		kvm_mmu_invalidate_zap_all_pages(kvm);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4869,15 +4844,18 @@ unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)</div><div class='ctx'> 	unsigned int  nr_pages = 0;</div><div class='ctx'> 	struct kvm_memslots *slots;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	slots = kvm_memslots(kvm);</div><div class='add'>+	for (i = 0; i &lt; KVM_ADDRESS_SPACE_NUM; i++) {</div><div class='add'>+		slots = __kvm_memslots(kvm, i);</div><div class='ctx'> </div><div class='del'>-	kvm_for_each_memslot(memslot, slots)</div><div class='del'>-		nr_pages += memslot-&gt;npages;</div><div class='add'>+		kvm_for_each_memslot(memslot, slots)</div><div class='add'>+			nr_pages += memslot-&gt;npages;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;</div><div class='ctx'> 	nr_mmu_pages = max(nr_mmu_pages,</div><div class='del'>-			(unsigned int) KVM_MIN_ALLOC_MMU_PAGES);</div><div class='add'>+			   (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);</div><div class='ctx'> </div><div class='ctx'> 	return nr_mmu_pages;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h<br/>index 0ada65ecddcf..398d21c0f6dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmu.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu.h</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #define PT_PDPE_LEVEL 3</div><div class='ctx'> #define PT_DIRECTORY_LEVEL 2</div><div class='ctx'> #define PT_PAGE_TABLE_LEVEL 1</div><div class='add'>+#define PT_MAX_HUGEPAGE_LEVEL (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES - 1)</div><div class='ctx'> </div><div class='ctx'> static inline u64 rsvd_bits(int s, int e)</div><div class='ctx'> {</div><div class='hunk'>@@ -170,4 +171,5 @@ static inline bool permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm);</div><div class='add'>+void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kvm/mmu_audit.c b/arch/x86/kvm/mmu_audit.c<br/>index 9ade5cfb5a4c..03d518e499a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmu_audit.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/mmu_audit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmu_audit.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmu_audit.c</a></div><div class='hunk'>@@ -114,7 +114,7 @@ static void audit_mappings(struct kvm_vcpu *vcpu, u64 *sptep, int level)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	gfn = kvm_mmu_page_get_gfn(sp, sptep - sp-&gt;spt);</div><div class='del'>-	pfn = gfn_to_pfn_atomic(vcpu-&gt;kvm, gfn);</div><div class='add'>+	pfn = kvm_vcpu_gfn_to_pfn_atomic(vcpu, gfn);</div><div class='ctx'> </div><div class='ctx'> 	if (is_error_pfn(pfn))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -131,12 +131,16 @@ static void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)</div><div class='ctx'> 	static DEFINE_RATELIMIT_STATE(ratelimit_state, 5 * HZ, 10);</div><div class='ctx'> 	unsigned long *rmapp;</div><div class='ctx'> 	struct kvm_mmu_page *rev_sp;</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='add'>+	struct kvm_memory_slot *slot;</div><div class='ctx'> 	gfn_t gfn;</div><div class='ctx'> </div><div class='ctx'> 	rev_sp = page_header(__pa(sptep));</div><div class='ctx'> 	gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp-&gt;spt);</div><div class='ctx'> </div><div class='del'>-	if (!gfn_to_memslot(kvm, gfn)) {</div><div class='add'>+	slots = kvm_memslots_for_spte_role(kvm, rev_sp-&gt;role);</div><div class='add'>+	slot = __gfn_to_memslot(slots, gfn);</div><div class='add'>+	if (!slot) {</div><div class='ctx'> 		if (!__ratelimit(&amp;ratelimit_state))</div><div class='ctx'> 			return;</div><div class='ctx'> 		audit_printk(kvm, "no memslot for gfn %llx\n", gfn);</div><div class='hunk'>@@ -146,7 +150,7 @@ static void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rmapp = gfn_to_rmap(kvm, gfn, rev_sp-&gt;role.level);</div><div class='add'>+	rmapp = __gfn_to_rmap(gfn, rev_sp-&gt;role.level, slot);</div><div class='ctx'> 	if (!*rmapp) {</div><div class='ctx'> 		if (!__ratelimit(&amp;ratelimit_state))</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -191,19 +195,21 @@ static void audit_write_protection(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> 	unsigned long *rmapp;</div><div class='ctx'> 	u64 *sptep;</div><div class='ctx'> 	struct rmap_iterator iter;</div><div class='add'>+	struct kvm_memslots *slots;</div><div class='add'>+	struct kvm_memory_slot *slot;</div><div class='ctx'> </div><div class='ctx'> 	if (sp-&gt;role.direct || sp-&gt;unsync || sp-&gt;role.invalid)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rmapp = gfn_to_rmap(kvm, sp-&gt;gfn, PT_PAGE_TABLE_LEVEL);</div><div class='add'>+	slots = kvm_memslots_for_spte_role(kvm, sp-&gt;role);</div><div class='add'>+	slot = __gfn_to_memslot(slots, sp-&gt;gfn);</div><div class='add'>+	rmapp = __gfn_to_rmap(sp-&gt;gfn, PT_PAGE_TABLE_LEVEL, slot);</div><div class='ctx'> </div><div class='del'>-	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='del'>-	     sptep = rmap_get_next(&amp;iter)) {</div><div class='add'>+	for_each_rmap_spte(rmapp, &amp;iter, sptep)</div><div class='ctx'> 		if (is_writable_pte(*sptep))</div><div class='ctx'> 			audit_printk(kvm, "shadow page has writable "</div><div class='ctx'> 				     "mappings: gfn %llx role %x\n",</div><div class='ctx'> 				     sp-&gt;gfn, sp-&gt;role.word);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void audit_sp(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='hunk'>@@ -291,7 +297,7 @@ static int mmu_audit_set(const char *val, const struct kernel_param *kp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct kernel_param_ops audit_param_ops = {</div><div class='add'>+static const struct kernel_param_ops audit_param_ops = {</div><div class='ctx'> 	.set = mmu_audit_set,</div><div class='ctx'> 	.get = param_get_bool,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/kvm/mmutrace.h b/arch/x86/kvm/mmutrace.h<br/>index ce463a9cc8fb..5a24b846a1cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmutrace.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/mmutrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmutrace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mmutrace.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #define _TRACE_KVMMMU_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/tracepoint.h&gt;</div><div class='del'>-#include &lt;linux/ftrace_event.h&gt;</div><div class='add'>+#include &lt;linux/trace_events.h&gt;</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_SYSTEM</div><div class='ctx'> #define TRACE_SYSTEM kvmmmu</div><div class='head'>diff --git a/arch/x86/kvm/mtrr.c b/arch/x86/kvm/mtrr.c<br/>new file mode 100644<br/>index 000000000000..de1d2d8062e2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mtrr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/mtrr.c</a></div><div class='hunk'>@@ -0,0 +1,699 @@</div><div class='add'>+/*</div><div class='add'>+ * vMTRR implementation</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2006 Qumranet, Inc.</div><div class='add'>+ * Copyright 2010 Red Hat, Inc. and/or its affiliates.</div><div class='add'>+ * Copyright(C) 2015 Intel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *   Yaniv Kamay  &lt;yaniv@qumranet.com&gt;</div><div class='add'>+ *   Avi Kivity   &lt;avi@qumranet.com&gt;</div><div class='add'>+ *   Marcelo Tosatti &lt;mtosatti@redhat.com&gt;</div><div class='add'>+ *   Paolo Bonzini &lt;pbonzini@redhat.com&gt;</div><div class='add'>+ *   Xiao Guangrong &lt;guangrong.xiao@linux.intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This work is licensed under the terms of the GNU GPL, version 2.  See</div><div class='add'>+ * the COPYING file in the top-level directory.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/mtrr.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cpuid.h"</div><div class='add'>+#include "mmu.h"</div><div class='add'>+</div><div class='add'>+#define IA32_MTRR_DEF_TYPE_E		(1ULL &lt;&lt; 11)</div><div class='add'>+#define IA32_MTRR_DEF_TYPE_FE		(1ULL &lt;&lt; 10)</div><div class='add'>+#define IA32_MTRR_DEF_TYPE_TYPE_MASK	(0xff)</div><div class='add'>+</div><div class='add'>+static bool msr_mtrr_valid(unsigned msr)</div><div class='add'>+{</div><div class='add'>+	switch (msr) {</div><div class='add'>+	case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:</div><div class='add'>+	case MSR_MTRRfix64K_00000:</div><div class='add'>+	case MSR_MTRRfix16K_80000:</div><div class='add'>+	case MSR_MTRRfix16K_A0000:</div><div class='add'>+	case MSR_MTRRfix4K_C0000:</div><div class='add'>+	case MSR_MTRRfix4K_C8000:</div><div class='add'>+	case MSR_MTRRfix4K_D0000:</div><div class='add'>+	case MSR_MTRRfix4K_D8000:</div><div class='add'>+	case MSR_MTRRfix4K_E0000:</div><div class='add'>+	case MSR_MTRRfix4K_E8000:</div><div class='add'>+	case MSR_MTRRfix4K_F0000:</div><div class='add'>+	case MSR_MTRRfix4K_F8000:</div><div class='add'>+	case MSR_MTRRdefType:</div><div class='add'>+	case MSR_IA32_CR_PAT:</div><div class='add'>+		return true;</div><div class='add'>+	case 0x2f8:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool valid_pat_type(unsigned t)</div><div class='add'>+{</div><div class='add'>+	return t &lt; 8 &amp;&amp; (1 &lt;&lt; t) &amp; 0xf3; /* 0, 1, 4, 5, 6, 7 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool valid_mtrr_type(unsigned t)</div><div class='add'>+{</div><div class='add'>+	return t &lt; 8 &amp;&amp; (1 &lt;&lt; t) &amp; 0x73; /* 0, 1, 4, 5, 6 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u64 mask;</div><div class='add'>+</div><div class='add'>+	if (!msr_mtrr_valid(msr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (msr == MSR_IA32_CR_PAT) {</div><div class='add'>+		for (i = 0; i &lt; 8; i++)</div><div class='add'>+			if (!valid_pat_type((data &gt;&gt; (i * 8)) &amp; 0xff))</div><div class='add'>+				return false;</div><div class='add'>+		return true;</div><div class='add'>+	} else if (msr == MSR_MTRRdefType) {</div><div class='add'>+		if (data &amp; ~0xcff)</div><div class='add'>+			return false;</div><div class='add'>+		return valid_mtrr_type(data &amp; 0xff);</div><div class='add'>+	} else if (msr &gt;= MSR_MTRRfix64K_00000 &amp;&amp; msr &lt;= MSR_MTRRfix4K_F8000) {</div><div class='add'>+		for (i = 0; i &lt; 8 ; i++)</div><div class='add'>+			if (!valid_mtrr_type((data &gt;&gt; (i * 8)) &amp; 0xff))</div><div class='add'>+				return false;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* variable MTRRs */</div><div class='add'>+	WARN_ON(!(msr &gt;= 0x200 &amp;&amp; msr &lt; 0x200 + 2 * KVM_NR_VAR_MTRR));</div><div class='add'>+</div><div class='add'>+	mask = (~0ULL) &lt;&lt; cpuid_maxphyaddr(vcpu);</div><div class='add'>+	if ((msr &amp; 1) == 0) {</div><div class='add'>+		/* MTRR base */</div><div class='add'>+		if (!valid_mtrr_type(data &amp; 0xff))</div><div class='add'>+			return false;</div><div class='add'>+		mask |= 0xf00;</div><div class='add'>+	} else</div><div class='add'>+		/* MTRR mask */</div><div class='add'>+		mask |= 0x7ff;</div><div class='add'>+	if (data &amp; mask) {</div><div class='add'>+		kvm_inject_gp(vcpu, 0);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_mtrr_valid);</div><div class='add'>+</div><div class='add'>+static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)</div><div class='add'>+{</div><div class='add'>+	return !!(mtrr_state-&gt;deftype &amp; IA32_MTRR_DEF_TYPE_E);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)</div><div class='add'>+{</div><div class='add'>+	return !!(mtrr_state-&gt;deftype &amp; IA32_MTRR_DEF_TYPE_FE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)</div><div class='add'>+{</div><div class='add'>+	return mtrr_state-&gt;deftype &amp; IA32_MTRR_DEF_TYPE_TYPE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+* Three terms are used in the following code:</div><div class='add'>+* - segment, it indicates the address segments covered by fixed MTRRs.</div><div class='add'>+* - unit, it corresponds to the MSR entry in the segment.</div><div class='add'>+* - range, a range is covered in one memory cache type.</div><div class='add'>+*/</div><div class='add'>+struct fixed_mtrr_segment {</div><div class='add'>+	u64 start;</div><div class='add'>+	u64 end;</div><div class='add'>+</div><div class='add'>+	int range_shift;</div><div class='add'>+</div><div class='add'>+	/* the start position in kvm_mtrr.fixed_ranges[]. */</div><div class='add'>+	int range_start;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fixed_mtrr_segment fixed_seg_table[] = {</div><div class='add'>+	/* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */</div><div class='add'>+	{</div><div class='add'>+		.start = 0x0,</div><div class='add'>+		.end = 0x80000,</div><div class='add'>+		.range_shift = 16, /* 64K */</div><div class='add'>+		.range_start = 0,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units,</div><div class='add'>+	 * 16K fixed mtrr.</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+		.start = 0x80000,</div><div class='add'>+		.end = 0xc0000,</div><div class='add'>+		.range_shift = 14, /* 16K */</div><div class='add'>+		.range_start = 8,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units,</div><div class='add'>+	 * 4K fixed mtrr.</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+		.start = 0xc0000,</div><div class='add'>+		.end = 0x100000,</div><div class='add'>+		.range_shift = 12, /* 12K */</div><div class='add'>+		.range_start = 24,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The size of unit is covered in one MSR, one MSR entry contains</div><div class='add'>+ * 8 ranges so that unit size is always 8 * 2^range_shift.</div><div class='add'>+ */</div><div class='add'>+static u64 fixed_mtrr_seg_unit_size(int seg)</div><div class='add'>+{</div><div class='add'>+	return 8 &lt;&lt; fixed_seg_table[seg].range_shift;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit)</div><div class='add'>+{</div><div class='add'>+	switch (msr) {</div><div class='add'>+	case MSR_MTRRfix64K_00000:</div><div class='add'>+		*seg = 0;</div><div class='add'>+		*unit = 0;</div><div class='add'>+		break;</div><div class='add'>+	case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000:</div><div class='add'>+		*seg = 1;</div><div class='add'>+		*unit = msr - MSR_MTRRfix16K_80000;</div><div class='add'>+		break;</div><div class='add'>+	case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:</div><div class='add'>+		*seg = 2;</div><div class='add'>+		*unit = msr - MSR_MTRRfix4K_C0000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+	u64 unit_size = fixed_mtrr_seg_unit_size(seg);</div><div class='add'>+</div><div class='add'>+	*start = mtrr_seg-&gt;start + unit * unit_size;</div><div class='add'>+	*end = *start + unit_size;</div><div class='add'>+	WARN_ON(*end &gt; mtrr_seg-&gt;end);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fixed_mtrr_seg_unit_range_index(int seg, int unit)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+</div><div class='add'>+	WARN_ON(mtrr_seg-&gt;start + unit * fixed_mtrr_seg_unit_size(seg)</div><div class='add'>+		&gt; mtrr_seg-&gt;end);</div><div class='add'>+</div><div class='add'>+	/* each unit has 8 ranges. */</div><div class='add'>+	return mtrr_seg-&gt;range_start + 8 * unit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fixed_mtrr_seg_end_range_index(int seg)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	n = (mtrr_seg-&gt;end - mtrr_seg-&gt;start) &gt;&gt; mtrr_seg-&gt;range_shift;</div><div class='add'>+	return mtrr_seg-&gt;range_start + n - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end)</div><div class='add'>+{</div><div class='add'>+	int seg, unit;</div><div class='add'>+</div><div class='add'>+	if (!fixed_msr_to_seg_unit(msr, &amp;seg, &amp;unit))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	fixed_mtrr_seg_unit_range(seg, unit, start, end);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fixed_msr_to_range_index(u32 msr)</div><div class='add'>+{</div><div class='add'>+	int seg, unit;</div><div class='add'>+</div><div class='add'>+	if (!fixed_msr_to_seg_unit(msr, &amp;seg, &amp;unit))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return fixed_mtrr_seg_unit_range_index(seg, unit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fixed_mtrr_addr_to_seg(u64 addr)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg;</div><div class='add'>+	int seg, seg_num = ARRAY_SIZE(fixed_seg_table);</div><div class='add'>+</div><div class='add'>+	for (seg = 0; seg &lt; seg_num; seg++) {</div><div class='add'>+		mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+		if (mtrr_seg-&gt;start &gt;= addr &amp;&amp; addr &lt; mtrr_seg-&gt;end)</div><div class='add'>+			return seg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+	index = mtrr_seg-&gt;range_start;</div><div class='add'>+	index += (addr - mtrr_seg-&gt;start) &gt;&gt; mtrr_seg-&gt;range_shift;</div><div class='add'>+	return index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 fixed_mtrr_range_end_addr(int seg, int index)</div><div class='add'>+{</div><div class='add'>+	struct fixed_mtrr_segment *mtrr_seg = &amp;fixed_seg_table[seg];</div><div class='add'>+	int pos = index - mtrr_seg-&gt;range_start;</div><div class='add'>+</div><div class='add'>+	return mtrr_seg-&gt;start + ((pos + 1) &lt;&lt; mtrr_seg-&gt;range_shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)</div><div class='add'>+{</div><div class='add'>+	u64 mask;</div><div class='add'>+</div><div class='add'>+	*start = range-&gt;base &amp; PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	mask = range-&gt;mask &amp; PAGE_MASK;</div><div class='add'>+	mask |= ~0ULL &lt;&lt; boot_cpu_data.x86_phys_bits;</div><div class='add'>+</div><div class='add'>+	/* This cannot overflow because writing to the reserved bits of</div><div class='add'>+	 * variable MTRRs causes a #GP.</div><div class='add'>+	 */</div><div class='add'>+	*end = (*start | ~mask) + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = &amp;vcpu-&gt;arch.mtrr_state;</div><div class='add'>+	gfn_t start, end;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||</div><div class='add'>+	      !kvm_arch_has_noncoherent_dma(vcpu-&gt;kvm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!mtrr_is_enabled(mtrr_state) &amp;&amp; msr != MSR_MTRRdefType)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* fixed MTRRs. */</div><div class='add'>+	if (fixed_msr_to_range(msr, &amp;start, &amp;end)) {</div><div class='add'>+		if (!fixed_mtrr_is_enabled(mtrr_state))</div><div class='add'>+			return;</div><div class='add'>+	} else if (msr == MSR_MTRRdefType) {</div><div class='add'>+		start = 0x0;</div><div class='add'>+		end = ~0ULL;</div><div class='add'>+	} else {</div><div class='add'>+		/* variable range MTRRs. */</div><div class='add'>+		index = (msr - 0x200) / 2;</div><div class='add'>+		var_mtrr_range(&amp;mtrr_state-&gt;var_ranges[index], &amp;start, &amp;end);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_zap_gfn_range(vcpu-&gt;kvm, gpa_to_gfn(start), gpa_to_gfn(end));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range)</div><div class='add'>+{</div><div class='add'>+	return (range-&gt;mask &amp; (1 &lt;&lt; 11)) != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = &amp;vcpu-&gt;arch.mtrr_state;</div><div class='add'>+	struct kvm_mtrr_range *tmp, *cur;</div><div class='add'>+	int index, is_mtrr_mask;</div><div class='add'>+</div><div class='add'>+	index = (msr - 0x200) / 2;</div><div class='add'>+	is_mtrr_mask = msr - 0x200 - 2 * index;</div><div class='add'>+	cur = &amp;mtrr_state-&gt;var_ranges[index];</div><div class='add'>+</div><div class='add'>+	/* remove the entry if it's in the list. */</div><div class='add'>+	if (var_mtrr_range_is_valid(cur))</div><div class='add'>+		list_del(&amp;mtrr_state-&gt;var_ranges[index].node);</div><div class='add'>+</div><div class='add'>+	if (!is_mtrr_mask)</div><div class='add'>+		cur-&gt;base = data;</div><div class='add'>+	else</div><div class='add'>+		cur-&gt;mask = data;</div><div class='add'>+</div><div class='add'>+	/* add it to the list if it's enabled. */</div><div class='add'>+	if (var_mtrr_range_is_valid(cur)) {</div><div class='add'>+		list_for_each_entry(tmp, &amp;mtrr_state-&gt;head, node)</div><div class='add'>+			if (cur-&gt;base &gt;= tmp-&gt;base)</div><div class='add'>+				break;</div><div class='add'>+		list_add_tail(&amp;cur-&gt;node, &amp;tmp-&gt;node);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!kvm_mtrr_valid(vcpu, msr, data))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	index = fixed_msr_to_range_index(msr);</div><div class='add'>+	if (index &gt;= 0)</div><div class='add'>+		*(u64 *)&amp;vcpu-&gt;arch.mtrr_state.fixed_ranges[index] = data;</div><div class='add'>+	else if (msr == MSR_MTRRdefType)</div><div class='add'>+		vcpu-&gt;arch.mtrr_state.deftype = data;</div><div class='add'>+	else if (msr == MSR_IA32_CR_PAT)</div><div class='add'>+		vcpu-&gt;arch.pat = data;</div><div class='add'>+	else</div><div class='add'>+		set_var_mtrr_msr(vcpu, msr, data);</div><div class='add'>+</div><div class='add'>+	update_mtrr(vcpu, msr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	/* MSR_MTRRcap is a readonly MSR. */</div><div class='add'>+	if (msr == MSR_MTRRcap) {</div><div class='add'>+		/*</div><div class='add'>+		 * SMRR = 0</div><div class='add'>+		 * WC = 1</div><div class='add'>+		 * FIX = 1</div><div class='add'>+		 * VCNT = KVM_NR_VAR_MTRR</div><div class='add'>+		 */</div><div class='add'>+		*pdata = 0x500 | KVM_NR_VAR_MTRR;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!msr_mtrr_valid(msr))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	index = fixed_msr_to_range_index(msr);</div><div class='add'>+	if (index &gt;= 0)</div><div class='add'>+		*pdata = *(u64 *)&amp;vcpu-&gt;arch.mtrr_state.fixed_ranges[index];</div><div class='add'>+	else if (msr == MSR_MTRRdefType)</div><div class='add'>+		*pdata = vcpu-&gt;arch.mtrr_state.deftype;</div><div class='add'>+	else if (msr == MSR_IA32_CR_PAT)</div><div class='add'>+		*pdata = vcpu-&gt;arch.pat;</div><div class='add'>+	else {	/* Variable MTRRs */</div><div class='add'>+		int is_mtrr_mask;</div><div class='add'>+</div><div class='add'>+		index = (msr - 0x200) / 2;</div><div class='add'>+		is_mtrr_mask = msr - 0x200 - 2 * index;</div><div class='add'>+		if (!is_mtrr_mask)</div><div class='add'>+			*pdata = vcpu-&gt;arch.mtrr_state.var_ranges[index].base;</div><div class='add'>+		else</div><div class='add'>+			*pdata = vcpu-&gt;arch.mtrr_state.var_ranges[index].mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD(&amp;vcpu-&gt;arch.mtrr_state.head);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mtrr_iter {</div><div class='add'>+	/* input fields. */</div><div class='add'>+	struct kvm_mtrr *mtrr_state;</div><div class='add'>+	u64 start;</div><div class='add'>+	u64 end;</div><div class='add'>+</div><div class='add'>+	/* output fields. */</div><div class='add'>+	int mem_type;</div><div class='add'>+	/* [start, end) is not fully covered in MTRRs? */</div><div class='add'>+	bool partial_map;</div><div class='add'>+</div><div class='add'>+	/* private fields. */</div><div class='add'>+	union {</div><div class='add'>+		/* used for fixed MTRRs. */</div><div class='add'>+		struct {</div><div class='add'>+			int index;</div><div class='add'>+			int seg;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* used for var MTRRs. */</div><div class='add'>+		struct {</div><div class='add'>+			struct kvm_mtrr_range *range;</div><div class='add'>+			/* max address has been covered in var MTRRs. */</div><div class='add'>+			u64 start_max;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bool fixed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	int seg, index;</div><div class='add'>+</div><div class='add'>+	if (!fixed_mtrr_is_enabled(iter-&gt;mtrr_state))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	seg = fixed_mtrr_addr_to_seg(iter-&gt;start);</div><div class='add'>+	if (seg &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	iter-&gt;fixed = true;</div><div class='add'>+	index = fixed_mtrr_addr_seg_to_range_index(iter-&gt;start, seg);</div><div class='add'>+	iter-&gt;index = index;</div><div class='add'>+	iter-&gt;seg = seg;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool match_var_range(struct mtrr_iter *iter,</div><div class='add'>+			    struct kvm_mtrr_range *range)</div><div class='add'>+{</div><div class='add'>+	u64 start, end;</div><div class='add'>+</div><div class='add'>+	var_mtrr_range(range, &amp;start, &amp;end);</div><div class='add'>+	if (!(start &gt;= iter-&gt;end || end &lt;= iter-&gt;start)) {</div><div class='add'>+		iter-&gt;range = range;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * the function is called when we do kvm_mtrr.head walking.</div><div class='add'>+		 * Range has the minimum base address which interleaves</div><div class='add'>+		 * [looker-&gt;start_max, looker-&gt;end).</div><div class='add'>+		 */</div><div class='add'>+		iter-&gt;partial_map |= iter-&gt;start_max &lt; start;</div><div class='add'>+</div><div class='add'>+		/* update the max address has been covered. */</div><div class='add'>+		iter-&gt;start_max = max(iter-&gt;start_max, end);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __mtrr_lookup_var_next(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = iter-&gt;mtrr_state;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_continue(iter-&gt;range, &amp;mtrr_state-&gt;head, node)</div><div class='add'>+		if (match_var_range(iter, iter-&gt;range))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+	iter-&gt;range = NULL;</div><div class='add'>+	iter-&gt;partial_map |= iter-&gt;start_max &lt; iter-&gt;end;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_var_start(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = iter-&gt;mtrr_state;</div><div class='add'>+</div><div class='add'>+	iter-&gt;fixed = false;</div><div class='add'>+	iter-&gt;start_max = iter-&gt;start;</div><div class='add'>+	iter-&gt;range = list_prepare_entry(iter-&gt;range, &amp;mtrr_state-&gt;head, node);</div><div class='add'>+</div><div class='add'>+	__mtrr_lookup_var_next(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_fixed_next(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	/* terminate the lookup. */</div><div class='add'>+	if (fixed_mtrr_range_end_addr(iter-&gt;seg, iter-&gt;index) &gt;= iter-&gt;end) {</div><div class='add'>+		iter-&gt;fixed = false;</div><div class='add'>+		iter-&gt;range = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iter-&gt;index++;</div><div class='add'>+</div><div class='add'>+	/* have looked up for all fixed MTRRs. */</div><div class='add'>+	if (iter-&gt;index &gt;= ARRAY_SIZE(iter-&gt;mtrr_state-&gt;fixed_ranges))</div><div class='add'>+		return mtrr_lookup_var_start(iter);</div><div class='add'>+</div><div class='add'>+	/* switch to next segment. */</div><div class='add'>+	if (iter-&gt;index &gt; fixed_mtrr_seg_end_range_index(iter-&gt;seg))</div><div class='add'>+		iter-&gt;seg++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_var_next(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	__mtrr_lookup_var_next(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_start(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	if (!mtrr_is_enabled(iter-&gt;mtrr_state)) {</div><div class='add'>+		iter-&gt;partial_map = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mtrr_lookup_fixed_start(iter))</div><div class='add'>+		mtrr_lookup_var_start(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_init(struct mtrr_iter *iter,</div><div class='add'>+			     struct kvm_mtrr *mtrr_state, u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	iter-&gt;mtrr_state = mtrr_state;</div><div class='add'>+	iter-&gt;start = start;</div><div class='add'>+	iter-&gt;end = end;</div><div class='add'>+	iter-&gt;partial_map = false;</div><div class='add'>+	iter-&gt;fixed = false;</div><div class='add'>+	iter-&gt;range = NULL;</div><div class='add'>+</div><div class='add'>+	mtrr_lookup_start(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mtrr_lookup_okay(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	if (iter-&gt;fixed) {</div><div class='add'>+		iter-&gt;mem_type = iter-&gt;mtrr_state-&gt;fixed_ranges[iter-&gt;index];</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (iter-&gt;range) {</div><div class='add'>+		iter-&gt;mem_type = iter-&gt;range-&gt;base &amp; 0xff;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtrr_lookup_next(struct mtrr_iter *iter)</div><div class='add'>+{</div><div class='add'>+	if (iter-&gt;fixed)</div><div class='add'>+		mtrr_lookup_fixed_next(iter);</div><div class='add'>+	else</div><div class='add'>+		mtrr_lookup_var_next(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \</div><div class='add'>+	for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \</div><div class='add'>+	     mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_))</div><div class='add'>+</div><div class='add'>+u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = &amp;vcpu-&gt;arch.mtrr_state;</div><div class='add'>+	struct mtrr_iter iter;</div><div class='add'>+	u64 start, end;</div><div class='add'>+	int type = -1;</div><div class='add'>+	const int wt_wb_mask = (1 &lt;&lt; MTRR_TYPE_WRBACK)</div><div class='add'>+			       | (1 &lt;&lt; MTRR_TYPE_WRTHROUGH);</div><div class='add'>+</div><div class='add'>+	start = gfn_to_gpa(gfn);</div><div class='add'>+	end = start + PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	mtrr_for_each_mem_type(&amp;iter, mtrr_state, start, end) {</div><div class='add'>+		int curr_type = iter.mem_type;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR</div><div class='add'>+		 * Precedences.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		if (type == -1) {</div><div class='add'>+			type = curr_type;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If two or more variable memory ranges match and the</div><div class='add'>+		 * memory types are identical, then that memory type is</div><div class='add'>+		 * used.</div><div class='add'>+		 */</div><div class='add'>+		if (type == curr_type)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If two or more variable memory ranges match and one of</div><div class='add'>+		 * the memory types is UC, the UC memory type used.</div><div class='add'>+		 */</div><div class='add'>+		if (curr_type == MTRR_TYPE_UNCACHABLE)</div><div class='add'>+			return MTRR_TYPE_UNCACHABLE;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If two or more variable memory ranges match and the</div><div class='add'>+		 * memory types are WT and WB, the WT memory type is used.</div><div class='add'>+		 */</div><div class='add'>+		if (((1 &lt;&lt; type) &amp; wt_wb_mask) &amp;&amp;</div><div class='add'>+		      ((1 &lt;&lt; curr_type) &amp; wt_wb_mask)) {</div><div class='add'>+			type = MTRR_TYPE_WRTHROUGH;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For overlaps not defined by the above rules, processor</div><div class='add'>+		 * behavior is undefined.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* We use WB for this undefined behavior. :( */</div><div class='add'>+		return MTRR_TYPE_WRBACK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* It is not covered by MTRRs. */</div><div class='add'>+	if (iter.partial_map) {</div><div class='add'>+		/*</div><div class='add'>+		 * We just check one page, partially covered by MTRRs is</div><div class='add'>+		 * impossible.</div><div class='add'>+		 */</div><div class='add'>+		WARN_ON(type != -1);</div><div class='add'>+		type = mtrr_default_type(mtrr_state);</div><div class='add'>+	}</div><div class='add'>+	return type;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);</div><div class='add'>+</div><div class='add'>+bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,</div><div class='add'>+					  int page_num)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mtrr *mtrr_state = &amp;vcpu-&gt;arch.mtrr_state;</div><div class='add'>+	struct mtrr_iter iter;</div><div class='add'>+	u64 start, end;</div><div class='add'>+	int type = -1;</div><div class='add'>+</div><div class='add'>+	start = gfn_to_gpa(gfn);</div><div class='add'>+	end = gfn_to_gpa(gfn + page_num);</div><div class='add'>+	mtrr_for_each_mem_type(&amp;iter, mtrr_state, start, end) {</div><div class='add'>+		if (type == -1) {</div><div class='add'>+			type = iter.mem_type;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (type != iter.mem_type)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iter.partial_map)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (type == -1)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return type == mtrr_default_type(mtrr_state);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h<br/>index 6e6d115fe9b5..0f67d7e24800 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/paging_tmpl.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/paging_tmpl.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/paging_tmpl.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/paging_tmpl.h</a></div><div class='hunk'>@@ -256,7 +256,7 @@ static int FNAME(update_accessed_dirty_bits)(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		mark_page_dirty(vcpu-&gt;kvm, table_gfn);</div><div class='add'>+		kvm_vcpu_mark_page_dirty(vcpu, table_gfn);</div><div class='ctx'> 		walker-&gt;ptes[level] = pte;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -338,7 +338,7 @@ retry_walk:</div><div class='ctx'> </div><div class='ctx'> 		real_gfn = gpa_to_gfn(real_gfn);</div><div class='ctx'> </div><div class='del'>-		host_addr = gfn_to_hva_prot(vcpu-&gt;kvm, real_gfn,</div><div class='add'>+		host_addr = kvm_vcpu_gfn_to_hva_prot(vcpu, real_gfn,</div><div class='ctx'> 					    &amp;walker-&gt;pte_writable[walker-&gt;level - 1]);</div><div class='ctx'> 		if (unlikely(kvm_is_error_hva(host_addr)))</div><div class='ctx'> 			goto error;</div><div class='hunk'>@@ -511,11 +511,11 @@ static bool FNAME(gpte_changed)(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		base_gpa = pte_gpa &amp; ~mask;</div><div class='ctx'> 		index = (pte_gpa - base_gpa) / sizeof(pt_element_t);</div><div class='ctx'> </div><div class='del'>-		r = kvm_read_guest_atomic(vcpu-&gt;kvm, base_gpa,</div><div class='add'>+		r = kvm_vcpu_read_guest_atomic(vcpu, base_gpa,</div><div class='ctx'> 				gw-&gt;prefetch_ptes, sizeof(gw-&gt;prefetch_ptes));</div><div class='ctx'> 		curr_pte = gw-&gt;prefetch_ptes[index];</div><div class='ctx'> 	} else</div><div class='del'>-		r = kvm_read_guest_atomic(vcpu-&gt;kvm, pte_gpa,</div><div class='add'>+		r = kvm_vcpu_read_guest_atomic(vcpu, pte_gpa,</div><div class='ctx'> 				  &amp;curr_pte, sizeof(curr_pte));</div><div class='ctx'> </div><div class='ctx'> 	return r || curr_pte != gw-&gt;ptes[level - 1];</div><div class='hunk'>@@ -869,8 +869,8 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)</div><div class='ctx'> 			if (!rmap_can_add(vcpu))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			if (kvm_read_guest_atomic(vcpu-&gt;kvm, pte_gpa, &amp;gpte,</div><div class='del'>-						  sizeof(pt_element_t)))</div><div class='add'>+			if (kvm_vcpu_read_guest_atomic(vcpu, pte_gpa, &amp;gpte,</div><div class='add'>+						       sizeof(pt_element_t)))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			FNAME(update_pte)(vcpu, sp, sptep, &amp;gpte);</div><div class='hunk'>@@ -956,8 +956,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)</div><div class='ctx'> </div><div class='ctx'> 		pte_gpa = first_pte_gpa + i * sizeof(pt_element_t);</div><div class='ctx'> </div><div class='del'>-		if (kvm_read_guest_atomic(vcpu-&gt;kvm, pte_gpa, &amp;gpte,</div><div class='del'>-					  sizeof(pt_element_t)))</div><div class='add'>+		if (kvm_vcpu_read_guest_atomic(vcpu, pte_gpa, &amp;gpte,</div><div class='add'>+					       sizeof(pt_element_t)))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		if (FNAME(prefetch_invalid_gpte)(vcpu, sp, &amp;sp-&gt;spt[i], gpte)) {</div><div class='hunk'>@@ -970,7 +970,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)</div><div class='ctx'> 		pte_access &amp;= FNAME(gpte_access)(vcpu, gpte);</div><div class='ctx'> 		FNAME(protect_clean_gpte)(&amp;pte_access, gpte);</div><div class='ctx'> </div><div class='del'>-		if (sync_mmio_spte(vcpu-&gt;kvm, &amp;sp-&gt;spt[i], gfn, pte_access,</div><div class='add'>+		if (sync_mmio_spte(vcpu, &amp;sp-&gt;spt[i], gfn, pte_access,</div><div class='ctx'> 		      &amp;nr_present))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c<br/>index 29fbf9dfdc54..31aa2c85dc97 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/pmu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/pmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/pmu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu.c</a></div><div class='hunk'>@@ -1,11 +1,12 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Kernel-based Virtual Machine -- Performance Monitoring Unit support</div><div class='ctx'>  *</div><div class='del'>- * Copyright 2011 Red Hat, Inc. and/or its affiliates.</div><div class='add'>+ * Copyright 2015 Red Hat, Inc. and/or its affiliates.</div><div class='ctx'>  *</div><div class='ctx'>  * Authors:</div><div class='ctx'>  *   Avi Kivity   &lt;avi@redhat.com&gt;</div><div class='ctx'>  *   Gleb Natapov &lt;gleb@redhat.com&gt;</div><div class='add'>+ *   Wei Huang    &lt;wei@redhat.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This work is licensed under the terms of the GNU GPL, version 2.  See</div><div class='ctx'>  * the COPYING file in the top-level directory.</div><div class='hunk'>@@ -19,88 +20,39 @@</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "lapic.h"</div><div class='add'>+#include "pmu.h"</div><div class='add'>+</div><div class='add'>+/* NOTE:</div><div class='add'>+ * - Each perf counter is defined as "struct kvm_pmc";</div><div class='add'>+ * - There are two types of perf counters: general purpose (gp) and fixed.</div><div class='add'>+ *   gp counters are stored in gp_counters[] and fixed counters are stored</div><div class='add'>+ *   in fixed_counters[] respectively. Both of them are part of "struct</div><div class='add'>+ *   kvm_pmu";</div><div class='add'>+ * - pmu.c understands the difference between gp counters and fixed counters.</div><div class='add'>+ *   However AMD doesn't support fixed-counters;</div><div class='add'>+ * - There are three types of index to access perf counters (PMC):</div><div class='add'>+ *     1. MSR (named msr): For example Intel has MSR_IA32_PERFCTRn and AMD</div><div class='add'>+ *        has MSR_K7_PERFCTRn.</div><div class='add'>+ *     2. MSR Index (named idx): This normally is used by RDPMC instruction.</div><div class='add'>+ *        For instance AMD RDPMC instruction uses 0000_0003h in ECX to access</div><div class='add'>+ *        C001_0007h (MSR_K7_PERCTR3). Intel has a similar mechanism, except</div><div class='add'>+ *        that it also supports fixed counters. idx can be used to as index to</div><div class='add'>+ *        gp and fixed counters.</div><div class='add'>+ *     3. Global PMC Index (named pmc): pmc is an index specific to PMU</div><div class='add'>+ *        code. Each pmc, stored in kvm_pmc.idx field, is unique across</div><div class='add'>+ *        all perf counters (both gp and fixed). The mapping relationship</div><div class='add'>+ *        between pmc and perf counters is as the following:</div><div class='add'>+ *        * Intel: [0 .. INTEL_PMC_MAX_GENERIC-1] &lt;=&gt; gp counters</div><div class='add'>+ *                 [INTEL_PMC_IDX_FIXED .. INTEL_PMC_IDX_FIXED + 2] &lt;=&gt; fixed</div><div class='add'>+ *        * AMD:   [0 .. AMD64_NUM_COUNTERS-1] &lt;=&gt; gp counters</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static struct kvm_arch_event_perf_mapping {</div><div class='del'>-	u8 eventsel;</div><div class='del'>-	u8 unit_mask;</div><div class='del'>-	unsigned event_type;</div><div class='del'>-	bool inexact;</div><div class='del'>-} arch_events[] = {</div><div class='del'>-	/* Index must match CPUID 0x0A.EBX bit vector */</div><div class='del'>-	[0] = { 0x3c, 0x00, PERF_COUNT_HW_CPU_CYCLES },</div><div class='del'>-	[1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },</div><div class='del'>-	[2] = { 0x3c, 0x01, PERF_COUNT_HW_BUS_CYCLES  },</div><div class='del'>-	[3] = { 0x2e, 0x4f, PERF_COUNT_HW_CACHE_REFERENCES },</div><div class='del'>-	[4] = { 0x2e, 0x41, PERF_COUNT_HW_CACHE_MISSES },</div><div class='del'>-	[5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },</div><div class='del'>-	[6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES },</div><div class='del'>-	[7] = { 0x00, 0x30, PERF_COUNT_HW_REF_CPU_CYCLES },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mapping between fixed pmc index and arch_events array */</div><div class='del'>-static int fixed_pmc_events[] = {1, 0, 7};</div><div class='del'>-</div><div class='del'>-static bool pmc_is_gp(struct kvm_pmc *pmc)</div><div class='del'>-{</div><div class='del'>-	return pmc-&gt;type == KVM_PMC_GP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u64 pmc_bitmask(struct kvm_pmc *pmc)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;pmc-&gt;vcpu-&gt;arch.pmu;</div><div class='del'>-</div><div class='del'>-	return pmu-&gt;counter_bitmask[pmc-&gt;type];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pmc_enabled(struct kvm_pmc *pmc)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;pmc-&gt;vcpu-&gt;arch.pmu;</div><div class='del'>-	return test_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;global_ctrl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,</div><div class='del'>-					 u32 base)</div><div class='del'>-{</div><div class='del'>-	if (msr &gt;= base &amp;&amp; msr &lt; base + pmu-&gt;nr_arch_gp_counters)</div><div class='del'>-		return &amp;pmu-&gt;gp_counters[msr - base];</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)</div><div class='del'>-{</div><div class='del'>-	int base = MSR_CORE_PERF_FIXED_CTR0;</div><div class='del'>-	if (msr &gt;= base &amp;&amp; msr &lt; base + pmu-&gt;nr_arch_fixed_counters)</div><div class='del'>-		return &amp;pmu-&gt;fixed_counters[msr - base];</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct kvm_pmc *get_fixed_pmc_idx(struct kvm_pmu *pmu, int idx)</div><div class='del'>-{</div><div class='del'>-	return get_fixed_pmc(pmu, MSR_CORE_PERF_FIXED_CTR0 + idx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct kvm_pmc *global_idx_to_pmc(struct kvm_pmu *pmu, int idx)</div><div class='del'>-{</div><div class='del'>-	if (idx &lt; INTEL_PMC_IDX_FIXED)</div><div class='del'>-		return get_gp_pmc(pmu, MSR_P6_EVNTSEL0 + idx, MSR_P6_EVNTSEL0);</div><div class='del'>-	else</div><div class='del'>-		return get_fixed_pmc_idx(pmu, idx - INTEL_PMC_IDX_FIXED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kvm_deliver_pmi(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	if (vcpu-&gt;arch.apic)</div><div class='del'>-		kvm_apic_local_deliver(vcpu-&gt;arch.apic, APIC_LVTPC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void trigger_pmi(struct irq_work *irq_work)</div><div class='add'>+static void kvm_pmi_trigger_fn(struct irq_work *irq_work)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_pmu *pmu = container_of(irq_work, struct kvm_pmu,</div><div class='del'>-			irq_work);</div><div class='del'>-	struct kvm_vcpu *vcpu = container_of(pmu, struct kvm_vcpu,</div><div class='del'>-			arch.pmu);</div><div class='add'>+	struct kvm_pmu *pmu = container_of(irq_work, struct kvm_pmu, irq_work);</div><div class='add'>+	struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu);</div><div class='ctx'> </div><div class='del'>-	kvm_deliver_pmi(vcpu);</div><div class='add'>+	kvm_pmu_deliver_pmi(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_perf_overflow(struct perf_event *perf_event,</div><div class='hunk'>@@ -108,63 +60,46 @@ static void kvm_perf_overflow(struct perf_event *perf_event,</div><div class='ctx'> 			      struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pmc *pmc = perf_event-&gt;overflow_handler_context;</div><div class='del'>-	struct kvm_pmu *pmu = &amp;pmc-&gt;vcpu-&gt;arch.pmu;</div><div class='del'>-	if (!test_and_set_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;reprogram_pmi)) {</div><div class='add'>+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);</div><div class='add'>+</div><div class='add'>+	if (!test_and_set_bit(pmc-&gt;idx,</div><div class='add'>+			      (unsigned long *)&amp;pmu-&gt;reprogram_pmi)) {</div><div class='ctx'> 		__set_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;global_status);</div><div class='ctx'> 		kvm_make_request(KVM_REQ_PMU, pmc-&gt;vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_perf_overflow_intr(struct perf_event *perf_event,</div><div class='del'>-		struct perf_sample_data *data, struct pt_regs *regs)</div><div class='add'>+				   struct perf_sample_data *data,</div><div class='add'>+				   struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pmc *pmc = perf_event-&gt;overflow_handler_context;</div><div class='del'>-	struct kvm_pmu *pmu = &amp;pmc-&gt;vcpu-&gt;arch.pmu;</div><div class='del'>-	if (!test_and_set_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;reprogram_pmi)) {</div><div class='add'>+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);</div><div class='add'>+</div><div class='add'>+	if (!test_and_set_bit(pmc-&gt;idx,</div><div class='add'>+			      (unsigned long *)&amp;pmu-&gt;reprogram_pmi)) {</div><div class='ctx'> 		__set_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;global_status);</div><div class='ctx'> 		kvm_make_request(KVM_REQ_PMU, pmc-&gt;vcpu);</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Inject PMI. If vcpu was in a guest mode during NMI PMI</div><div class='ctx'> 		 * can be ejected on a guest mode re-entry. Otherwise we can't</div><div class='ctx'> 		 * be sure that vcpu wasn't executing hlt instruction at the</div><div class='del'>-		 * time of vmexit and is not going to re-enter guest mode until,</div><div class='add'>+		 * time of vmexit and is not going to re-enter guest mode until</div><div class='ctx'> 		 * woken up. So we should wake it, but this is impossible from</div><div class='ctx'> 		 * NMI context. Do it from irq work instead.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!kvm_is_in_guest())</div><div class='del'>-			irq_work_queue(&amp;pmc-&gt;vcpu-&gt;arch.pmu.irq_work);</div><div class='add'>+			irq_work_queue(&amp;pmc_to_pmu(pmc)-&gt;irq_work);</div><div class='ctx'> 		else</div><div class='ctx'> 			kvm_make_request(KVM_REQ_PMI, pmc-&gt;vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 read_pmc(struct kvm_pmc *pmc)</div><div class='del'>-{</div><div class='del'>-	u64 counter, enabled, running;</div><div class='del'>-</div><div class='del'>-	counter = pmc-&gt;counter;</div><div class='del'>-</div><div class='del'>-	if (pmc-&gt;perf_event)</div><div class='del'>-		counter += perf_event_read_value(pmc-&gt;perf_event,</div><div class='del'>-						 &amp;enabled, &amp;running);</div><div class='del'>-</div><div class='del'>-	/* FIXME: Scaling needed? */</div><div class='del'>-</div><div class='del'>-	return counter &amp; pmc_bitmask(pmc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void stop_counter(struct kvm_pmc *pmc)</div><div class='del'>-{</div><div class='del'>-	if (pmc-&gt;perf_event) {</div><div class='del'>-		pmc-&gt;counter = read_pmc(pmc);</div><div class='del'>-		perf_event_release_kernel(pmc-&gt;perf_event);</div><div class='del'>-		pmc-&gt;perf_event = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void reprogram_counter(struct kvm_pmc *pmc, u32 type,</div><div class='del'>-		unsigned config, bool exclude_user, bool exclude_kernel,</div><div class='del'>-		bool intr, bool in_tx, bool in_tx_cp)</div><div class='add'>+static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,</div><div class='add'>+				  unsigned config, bool exclude_user,</div><div class='add'>+				  bool exclude_kernel, bool intr,</div><div class='add'>+				  bool in_tx, bool in_tx_cp)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_event *event;</div><div class='ctx'> 	struct perf_event_attr attr = {</div><div class='hunk'>@@ -177,6 +112,7 @@ static void reprogram_counter(struct kvm_pmc *pmc, u32 type,</div><div class='ctx'> 		.exclude_kernel = exclude_kernel,</div><div class='ctx'> 		.config = config,</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='ctx'> 	if (in_tx)</div><div class='ctx'> 		attr.config |= HSW_IN_TX;</div><div class='ctx'> 	if (in_tx_cp)</div><div class='hunk'>@@ -188,33 +124,16 @@ static void reprogram_counter(struct kvm_pmc *pmc, u32 type,</div><div class='ctx'> 						 intr ? kvm_perf_overflow_intr :</div><div class='ctx'> 						 kvm_perf_overflow, pmc);</div><div class='ctx'> 	if (IS_ERR(event)) {</div><div class='del'>-		printk_once("kvm: pmu event creation failed %ld\n",</div><div class='del'>-				PTR_ERR(event));</div><div class='add'>+		printk_once("kvm_pmu: event creation failed %ld\n",</div><div class='add'>+			    PTR_ERR(event));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pmc-&gt;perf_event = event;</div><div class='del'>-	clear_bit(pmc-&gt;idx, (unsigned long*)&amp;pmc-&gt;vcpu-&gt;arch.pmu.reprogram_pmi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned find_arch_event(struct kvm_pmu *pmu, u8 event_select,</div><div class='del'>-		u8 unit_mask)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(arch_events); i++)</div><div class='del'>-		if (arch_events[i].eventsel == event_select</div><div class='del'>-				&amp;&amp; arch_events[i].unit_mask == unit_mask</div><div class='del'>-				&amp;&amp; (pmu-&gt;available_event_types &amp; (1 &lt;&lt; i)))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (i == ARRAY_SIZE(arch_events))</div><div class='del'>-		return PERF_COUNT_HW_MAX;</div><div class='del'>-</div><div class='del'>-	return arch_events[i].event_type;</div><div class='add'>+	clear_bit(pmc-&gt;idx, (unsigned long*)&amp;pmc_to_pmu(pmc)-&gt;reprogram_pmi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)</div><div class='add'>+void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned config, type = PERF_TYPE_RAW;</div><div class='ctx'> 	u8 event_select, unit_mask;</div><div class='hunk'>@@ -224,21 +143,22 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)</div><div class='ctx'> </div><div class='ctx'> 	pmc-&gt;eventsel = eventsel;</div><div class='ctx'> </div><div class='del'>-	stop_counter(pmc);</div><div class='add'>+	pmc_stop_counter(pmc);</div><div class='ctx'> </div><div class='del'>-	if (!(eventsel &amp; ARCH_PERFMON_EVENTSEL_ENABLE) || !pmc_enabled(pmc))</div><div class='add'>+	if (!(eventsel &amp; ARCH_PERFMON_EVENTSEL_ENABLE) || !pmc_is_enabled(pmc))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	event_select = eventsel &amp; ARCH_PERFMON_EVENTSEL_EVENT;</div><div class='ctx'> 	unit_mask = (eventsel &amp; ARCH_PERFMON_EVENTSEL_UMASK) &gt;&gt; 8;</div><div class='ctx'> </div><div class='ctx'> 	if (!(eventsel &amp; (ARCH_PERFMON_EVENTSEL_EDGE |</div><div class='del'>-				ARCH_PERFMON_EVENTSEL_INV |</div><div class='del'>-				ARCH_PERFMON_EVENTSEL_CMASK |</div><div class='del'>-				HSW_IN_TX |</div><div class='del'>-				HSW_IN_TX_CHECKPOINTED))) {</div><div class='del'>-		config = find_arch_event(&amp;pmc-&gt;vcpu-&gt;arch.pmu, event_select,</div><div class='del'>-				unit_mask);</div><div class='add'>+			  ARCH_PERFMON_EVENTSEL_INV |</div><div class='add'>+			  ARCH_PERFMON_EVENTSEL_CMASK |</div><div class='add'>+			  HSW_IN_TX |</div><div class='add'>+			  HSW_IN_TX_CHECKPOINTED))) {</div><div class='add'>+		config = kvm_x86_ops-&gt;pmu_ops-&gt;find_arch_event(pmc_to_pmu(pmc),</div><div class='add'>+						      event_select,</div><div class='add'>+						      unit_mask);</div><div class='ctx'> 		if (config != PERF_COUNT_HW_MAX)</div><div class='ctx'> 			type = PERF_TYPE_HARDWARE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -246,56 +166,36 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)</div><div class='ctx'> 	if (type == PERF_TYPE_RAW)</div><div class='ctx'> 		config = eventsel &amp; X86_RAW_EVENT_MASK;</div><div class='ctx'> </div><div class='del'>-	reprogram_counter(pmc, type, config,</div><div class='del'>-			!(eventsel &amp; ARCH_PERFMON_EVENTSEL_USR),</div><div class='del'>-			!(eventsel &amp; ARCH_PERFMON_EVENTSEL_OS),</div><div class='del'>-			eventsel &amp; ARCH_PERFMON_EVENTSEL_INT,</div><div class='del'>-			(eventsel &amp; HSW_IN_TX),</div><div class='del'>-			(eventsel &amp; HSW_IN_TX_CHECKPOINTED));</div><div class='add'>+	pmc_reprogram_counter(pmc, type, config,</div><div class='add'>+			      !(eventsel &amp; ARCH_PERFMON_EVENTSEL_USR),</div><div class='add'>+			      !(eventsel &amp; ARCH_PERFMON_EVENTSEL_OS),</div><div class='add'>+			      eventsel &amp; ARCH_PERFMON_EVENTSEL_INT,</div><div class='add'>+			      (eventsel &amp; HSW_IN_TX),</div><div class='add'>+			      (eventsel &amp; HSW_IN_TX_CHECKPOINTED));</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(reprogram_gp_counter);</div><div class='ctx'> </div><div class='del'>-static void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 en_pmi, int idx)</div><div class='add'>+void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int idx)</div><div class='ctx'> {</div><div class='del'>-	unsigned en = en_pmi &amp; 0x3;</div><div class='del'>-	bool pmi = en_pmi &amp; 0x8;</div><div class='add'>+	unsigned en_field = ctrl &amp; 0x3;</div><div class='add'>+	bool pmi = ctrl &amp; 0x8;</div><div class='ctx'> </div><div class='del'>-	stop_counter(pmc);</div><div class='add'>+	pmc_stop_counter(pmc);</div><div class='ctx'> </div><div class='del'>-	if (!en || !pmc_enabled(pmc))</div><div class='add'>+	if (!en_field || !pmc_is_enabled(pmc))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	reprogram_counter(pmc, PERF_TYPE_HARDWARE,</div><div class='del'>-			arch_events[fixed_pmc_events[idx]].event_type,</div><div class='del'>-			!(en &amp; 0x2), /* exclude user */</div><div class='del'>-			!(en &amp; 0x1), /* exclude kernel */</div><div class='del'>-			pmi, false, false);</div><div class='add'>+	pmc_reprogram_counter(pmc, PERF_TYPE_HARDWARE,</div><div class='add'>+			      kvm_x86_ops-&gt;pmu_ops-&gt;find_fixed_event(idx),</div><div class='add'>+			      !(en_field &amp; 0x2), /* exclude user */</div><div class='add'>+			      !(en_field &amp; 0x1), /* exclude kernel */</div><div class='add'>+			      pmi, false, false);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(reprogram_fixed_counter);</div><div class='ctx'> </div><div class='del'>-static inline u8 fixed_en_pmi(u64 ctrl, int idx)</div><div class='add'>+void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx)</div><div class='ctx'> {</div><div class='del'>-	return (ctrl &gt;&gt; (idx * 4)) &amp; 0xf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pmu-&gt;nr_arch_fixed_counters; i++) {</div><div class='del'>-		u8 en_pmi = fixed_en_pmi(data, i);</div><div class='del'>-		struct kvm_pmc *pmc = get_fixed_pmc_idx(pmu, i);</div><div class='del'>-</div><div class='del'>-		if (fixed_en_pmi(pmu-&gt;fixed_ctr_ctrl, i) == en_pmi)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		reprogram_fixed_counter(pmc, en_pmi, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pmu-&gt;fixed_ctr_ctrl = data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void reprogram_idx(struct kvm_pmu *pmu, int idx)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmc *pmc = global_idx_to_pmc(pmu, idx);</div><div class='add'>+	struct kvm_pmc *pmc = kvm_x86_ops-&gt;pmu_ops-&gt;pmc_idx_to_pmc(pmu, pmc_idx);</div><div class='ctx'> </div><div class='ctx'> 	if (!pmc)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -303,274 +203,107 @@ static void reprogram_idx(struct kvm_pmu *pmu, int idx)</div><div class='ctx'> 	if (pmc_is_gp(pmc))</div><div class='ctx'> 		reprogram_gp_counter(pmc, pmc-&gt;eventsel);</div><div class='ctx'> 	else {</div><div class='del'>-		int fidx = idx - INTEL_PMC_IDX_FIXED;</div><div class='del'>-		reprogram_fixed_counter(pmc,</div><div class='del'>-				fixed_en_pmi(pmu-&gt;fixed_ctr_ctrl, fidx), fidx);</div><div class='add'>+		int idx = pmc_idx - INTEL_PMC_IDX_FIXED;</div><div class='add'>+		u8 ctrl = fixed_ctrl_field(pmu-&gt;fixed_ctr_ctrl, idx);</div><div class='add'>+</div><div class='add'>+		reprogram_fixed_counter(pmc, ctrl, idx);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(reprogram_counter);</div><div class='ctx'> </div><div class='del'>-static void global_ctrl_changed(struct kvm_pmu *pmu, u64 data)</div><div class='add'>+void kvm_pmu_handle_event(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	u64 bitmask;</div><div class='ctx'> 	int bit;</div><div class='del'>-	u64 diff = pmu-&gt;global_ctrl ^ data;</div><div class='del'>-</div><div class='del'>-	pmu-&gt;global_ctrl = data;</div><div class='del'>-</div><div class='del'>-	for_each_set_bit(bit, (unsigned long *)&amp;diff, X86_PMC_IDX_MAX)</div><div class='del'>-		reprogram_idx(pmu, bit);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (msr) {</div><div class='del'>-	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='del'>-		ret = pmu-&gt;version &gt; 1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)</div><div class='del'>-			|| get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0)</div><div class='del'>-			|| get_fixed_pmc(pmu, msr);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+	bitmask = pmu-&gt;reprogram_pmi;</div><div class='ctx'> </div><div class='del'>-int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	struct kvm_pmc *pmc;</div><div class='add'>+	for_each_set_bit(bit, (unsigned long *)&amp;bitmask, X86_PMC_IDX_MAX) {</div><div class='add'>+		struct kvm_pmc *pmc = kvm_x86_ops-&gt;pmu_ops-&gt;pmc_idx_to_pmc(pmu, bit);</div><div class='ctx'> </div><div class='del'>-	switch (index) {</div><div class='del'>-	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='del'>-		*data = pmu-&gt;fixed_ctr_ctrl;</div><div class='del'>-		return 0;</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='del'>-		*data = pmu-&gt;global_status;</div><div class='del'>-		return 0;</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='del'>-		*data = pmu-&gt;global_ctrl;</div><div class='del'>-		return 0;</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='del'>-		*data = pmu-&gt;global_ovf_ctrl;</div><div class='del'>-		return 0;</div><div class='del'>-	default:</div><div class='del'>-		if ((pmc = get_gp_pmc(pmu, index, MSR_IA32_PERFCTR0)) ||</div><div class='del'>-				(pmc = get_fixed_pmc(pmu, index))) {</div><div class='del'>-			*data = read_pmc(pmc);</div><div class='del'>-			return 0;</div><div class='del'>-		} else if ((pmc = get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) {</div><div class='del'>-			*data = pmc-&gt;eventsel;</div><div class='del'>-			return 0;</div><div class='add'>+		if (unlikely(!pmc || !pmc-&gt;perf_event)) {</div><div class='add'>+			clear_bit(bit, (unsigned long *)&amp;pmu-&gt;reprogram_pmi);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	struct kvm_pmc *pmc;</div><div class='del'>-	u32 index = msr_info-&gt;index;</div><div class='del'>-	u64 data = msr_info-&gt;data;</div><div class='del'>-</div><div class='del'>-	switch (index) {</div><div class='del'>-	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='del'>-		if (pmu-&gt;fixed_ctr_ctrl == data)</div><div class='del'>-			return 0;</div><div class='del'>-		if (!(data &amp; 0xfffffffffffff444ull)) {</div><div class='del'>-			reprogram_fixed_counters(pmu, data);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='del'>-		if (msr_info-&gt;host_initiated) {</div><div class='del'>-			pmu-&gt;global_status = data;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break; /* RO MSR */</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='del'>-		if (pmu-&gt;global_ctrl == data)</div><div class='del'>-			return 0;</div><div class='del'>-		if (!(data &amp; pmu-&gt;global_ctrl_mask)) {</div><div class='del'>-			global_ctrl_changed(pmu, data);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='del'>-		if (!(data &amp; (pmu-&gt;global_ctrl_mask &amp; ~(3ull&lt;&lt;62)))) {</div><div class='del'>-			if (!msr_info-&gt;host_initiated)</div><div class='del'>-				pmu-&gt;global_status &amp;= ~data;</div><div class='del'>-			pmu-&gt;global_ovf_ctrl = data;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		if ((pmc = get_gp_pmc(pmu, index, MSR_IA32_PERFCTR0)) ||</div><div class='del'>-				(pmc = get_fixed_pmc(pmu, index))) {</div><div class='del'>-			if (!msr_info-&gt;host_initiated)</div><div class='del'>-				data = (s64)(s32)data;</div><div class='del'>-			pmc-&gt;counter += data - read_pmc(pmc);</div><div class='del'>-			return 0;</div><div class='del'>-		} else if ((pmc = get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) {</div><div class='del'>-			if (data == pmc-&gt;eventsel)</div><div class='del'>-				return 0;</div><div class='del'>-			if (!(data &amp; pmu-&gt;reserved_bits)) {</div><div class='del'>-				reprogram_gp_counter(pmc, data);</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		reprogram_counter(pmu, bit);</div><div class='ctx'> 	}</div><div class='del'>-	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc)</div><div class='add'>+/* check if idx is a valid index to access PMU */</div><div class='add'>+int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	bool fixed = pmc &amp; (1u &lt;&lt; 30);</div><div class='del'>-	pmc &amp;= ~(3u &lt;&lt; 30);</div><div class='del'>-	return (!fixed &amp;&amp; pmc &gt;= pmu-&gt;nr_arch_gp_counters) ||</div><div class='del'>-		(fixed &amp;&amp; pmc &gt;= pmu-&gt;nr_arch_fixed_counters);</div><div class='add'>+	return kvm_x86_ops-&gt;pmu_ops-&gt;is_valid_msr_idx(vcpu, idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data)</div><div class='add'>+int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	bool fast_mode = pmc &amp; (1u &lt;&lt; 31);</div><div class='del'>-	bool fixed = pmc &amp; (1u &lt;&lt; 30);</div><div class='del'>-	struct kvm_pmc *counters;</div><div class='del'>-	u64 ctr;</div><div class='del'>-</div><div class='del'>-	pmc &amp;= ~(3u &lt;&lt; 30);</div><div class='del'>-	if (!fixed &amp;&amp; pmc &gt;= pmu-&gt;nr_arch_gp_counters)</div><div class='del'>-		return 1;</div><div class='del'>-	if (fixed &amp;&amp; pmc &gt;= pmu-&gt;nr_arch_fixed_counters)</div><div class='add'>+	bool fast_mode = idx &amp; (1u &lt;&lt; 31);</div><div class='add'>+	struct kvm_pmc *pmc;</div><div class='add'>+	u64 ctr_val;</div><div class='add'>+</div><div class='add'>+	pmc = kvm_x86_ops-&gt;pmu_ops-&gt;msr_idx_to_pmc(vcpu, idx);</div><div class='add'>+	if (!pmc)</div><div class='ctx'> 		return 1;</div><div class='del'>-	counters = fixed ? pmu-&gt;fixed_counters : pmu-&gt;gp_counters;</div><div class='del'>-	ctr = read_pmc(&amp;counters[pmc]);</div><div class='add'>+</div><div class='add'>+	ctr_val = pmc_read_counter(pmc);</div><div class='ctx'> 	if (fast_mode)</div><div class='del'>-		ctr = (u32)ctr;</div><div class='del'>-	*data = ctr;</div><div class='add'>+		ctr_val = (u32)ctr_val;</div><div class='ctx'> </div><div class='add'>+	*data = ctr_val;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	struct kvm_cpuid_entry2 *entry;</div><div class='del'>-	union cpuid10_eax eax;</div><div class='del'>-	union cpuid10_edx edx;</div><div class='del'>-</div><div class='del'>-	pmu-&gt;nr_arch_gp_counters = 0;</div><div class='del'>-	pmu-&gt;nr_arch_fixed_counters = 0;</div><div class='del'>-	pmu-&gt;counter_bitmask[KVM_PMC_GP] = 0;</div><div class='del'>-	pmu-&gt;counter_bitmask[KVM_PMC_FIXED] = 0;</div><div class='del'>-	pmu-&gt;version = 0;</div><div class='del'>-	pmu-&gt;reserved_bits = 0xffffffff00200000ull;</div><div class='del'>-</div><div class='del'>-	entry = kvm_find_cpuid_entry(vcpu, 0xa, 0);</div><div class='del'>-	if (!entry)</div><div class='del'>-		return;</div><div class='del'>-	eax.full = entry-&gt;eax;</div><div class='del'>-	edx.full = entry-&gt;edx;</div><div class='del'>-</div><div class='del'>-	pmu-&gt;version = eax.split.version_id;</div><div class='del'>-	if (!pmu-&gt;version)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pmu-&gt;nr_arch_gp_counters = min_t(int, eax.split.num_counters,</div><div class='del'>-					INTEL_PMC_MAX_GENERIC);</div><div class='del'>-	pmu-&gt;counter_bitmask[KVM_PMC_GP] = ((u64)1 &lt;&lt; eax.split.bit_width) - 1;</div><div class='del'>-	pmu-&gt;available_event_types = ~entry-&gt;ebx &amp;</div><div class='del'>-					((1ull &lt;&lt; eax.split.mask_length) - 1);</div><div class='del'>-</div><div class='del'>-	if (pmu-&gt;version == 1) {</div><div class='del'>-		pmu-&gt;nr_arch_fixed_counters = 0;</div><div class='del'>-	} else {</div><div class='del'>-		pmu-&gt;nr_arch_fixed_counters =</div><div class='del'>-			min_t(int, edx.split.num_counters_fixed,</div><div class='del'>-				INTEL_PMC_MAX_FIXED);</div><div class='del'>-		pmu-&gt;counter_bitmask[KVM_PMC_FIXED] =</div><div class='del'>-			((u64)1 &lt;&lt; edx.split.bit_width_fixed) - 1;</div><div class='del'>-	}</div><div class='add'>+	if (vcpu-&gt;arch.apic)</div><div class='add'>+		kvm_apic_local_deliver(vcpu-&gt;arch.apic, APIC_LVTPC);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	pmu-&gt;global_ctrl = ((1 &lt;&lt; pmu-&gt;nr_arch_gp_counters) - 1) |</div><div class='del'>-		(((1ull &lt;&lt; pmu-&gt;nr_arch_fixed_counters) - 1) &lt;&lt; INTEL_PMC_IDX_FIXED);</div><div class='del'>-	pmu-&gt;global_ctrl_mask = ~pmu-&gt;global_ctrl;</div><div class='add'>+bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)</div><div class='add'>+{</div><div class='add'>+	return kvm_x86_ops-&gt;pmu_ops-&gt;is_valid_msr(vcpu, msr);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	entry = kvm_find_cpuid_entry(vcpu, 7, 0);</div><div class='del'>-	if (entry &amp;&amp;</div><div class='del'>-	    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &amp;&amp;</div><div class='del'>-	    (entry-&gt;ebx &amp; (X86_FEATURE_HLE|X86_FEATURE_RTM)))</div><div class='del'>-		pmu-&gt;reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;</div><div class='add'>+int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data)</div><div class='add'>+{</div><div class='add'>+	return kvm_x86_ops-&gt;pmu_ops-&gt;get_msr(vcpu, msr, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_pmu_init(struct kvm_vcpu *vcpu)</div><div class='add'>+int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='add'>+	return kvm_x86_ops-&gt;pmu_ops-&gt;set_msr(vcpu, msr_info);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	memset(pmu, 0, sizeof(*pmu));</div><div class='del'>-	for (i = 0; i &lt; INTEL_PMC_MAX_GENERIC; i++) {</div><div class='del'>-		pmu-&gt;gp_counters[i].type = KVM_PMC_GP;</div><div class='del'>-		pmu-&gt;gp_counters[i].vcpu = vcpu;</div><div class='del'>-		pmu-&gt;gp_counters[i].idx = i;</div><div class='del'>-	}</div><div class='del'>-	for (i = 0; i &lt; INTEL_PMC_MAX_FIXED; i++) {</div><div class='del'>-		pmu-&gt;fixed_counters[i].type = KVM_PMC_FIXED;</div><div class='del'>-		pmu-&gt;fixed_counters[i].vcpu = vcpu;</div><div class='del'>-		pmu-&gt;fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED;</div><div class='del'>-	}</div><div class='del'>-	init_irq_work(&amp;pmu-&gt;irq_work, trigger_pmi);</div><div class='del'>-	kvm_pmu_cpuid_update(vcpu);</div><div class='add'>+/* refresh PMU settings. This function generally is called when underlying</div><div class='add'>+ * settings are changed (such as changes of PMU CPUID by guest VMs), which</div><div class='add'>+ * should rarely happen.</div><div class='add'>+ */</div><div class='add'>+void kvm_pmu_refresh(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	kvm_x86_ops-&gt;pmu_ops-&gt;refresh(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_pmu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	int i;</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	irq_work_sync(&amp;pmu-&gt;irq_work);</div><div class='del'>-	for (i = 0; i &lt; INTEL_PMC_MAX_GENERIC; i++) {</div><div class='del'>-		struct kvm_pmc *pmc = &amp;pmu-&gt;gp_counters[i];</div><div class='del'>-		stop_counter(pmc);</div><div class='del'>-		pmc-&gt;counter = pmc-&gt;eventsel = 0;</div><div class='del'>-	}</div><div class='add'>+	kvm_x86_ops-&gt;pmu_ops-&gt;reset(vcpu);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; INTEL_PMC_MAX_FIXED; i++)</div><div class='del'>-		stop_counter(&amp;pmu-&gt;fixed_counters[i]);</div><div class='add'>+void kvm_pmu_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='ctx'> </div><div class='del'>-	pmu-&gt;fixed_ctr_ctrl = pmu-&gt;global_ctrl = pmu-&gt;global_status =</div><div class='del'>-		pmu-&gt;global_ovf_ctrl = 0;</div><div class='add'>+	memset(pmu, 0, sizeof(*pmu));</div><div class='add'>+	kvm_x86_ops-&gt;pmu_ops-&gt;init(vcpu);</div><div class='add'>+	init_irq_work(&amp;pmu-&gt;irq_work, kvm_pmi_trigger_fn);</div><div class='add'>+	kvm_pmu_refresh(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_pmu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_pmu_reset(vcpu);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void kvm_handle_pmu_event(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='del'>-	u64 bitmask;</div><div class='del'>-	int bit;</div><div class='del'>-</div><div class='del'>-	bitmask = pmu-&gt;reprogram_pmi;</div><div class='del'>-</div><div class='del'>-	for_each_set_bit(bit, (unsigned long *)&amp;bitmask, X86_PMC_IDX_MAX) {</div><div class='del'>-		struct kvm_pmc *pmc = global_idx_to_pmc(pmu, bit);</div><div class='del'>-</div><div class='del'>-		if (unlikely(!pmc || !pmc-&gt;perf_event)) {</div><div class='del'>-			clear_bit(bit, (unsigned long *)&amp;pmu-&gt;reprogram_pmi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		reprogram_idx(pmu, bit);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h<br/>new file mode 100644<br/>index 000000000000..f96e1f962587<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/pmu.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu.h</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+#ifndef __KVM_X86_PMU_H</div><div class='add'>+#define __KVM_X86_PMU_H</div><div class='add'>+</div><div class='add'>+#define vcpu_to_pmu(vcpu) (&amp;(vcpu)-&gt;arch.pmu)</div><div class='add'>+#define pmu_to_vcpu(pmu)  (container_of((pmu), struct kvm_vcpu, arch.pmu))</div><div class='add'>+#define pmc_to_pmu(pmc)   (&amp;(pmc)-&gt;vcpu-&gt;arch.pmu)</div><div class='add'>+</div><div class='add'>+/* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */</div><div class='add'>+#define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) &gt;&gt; ((idx)*4)) &amp; 0xf)</div><div class='add'>+</div><div class='add'>+struct kvm_event_hw_type_mapping {</div><div class='add'>+	u8 eventsel;</div><div class='add'>+	u8 unit_mask;</div><div class='add'>+	unsigned event_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_pmu_ops {</div><div class='add'>+	unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,</div><div class='add'>+				    u8 unit_mask);</div><div class='add'>+	unsigned (*find_fixed_event)(int idx);</div><div class='add'>+	bool (*pmc_is_enabled)(struct kvm_pmc *pmc);</div><div class='add'>+	struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);</div><div class='add'>+	struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx);</div><div class='add'>+	int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx);</div><div class='add'>+	bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);</div><div class='add'>+	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);</div><div class='add'>+	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);</div><div class='add'>+	void (*refresh)(struct kvm_vcpu *vcpu);</div><div class='add'>+	void (*init)(struct kvm_vcpu *vcpu);</div><div class='add'>+	void (*reset)(struct kvm_vcpu *vcpu);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u64 pmc_bitmask(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);</div><div class='add'>+</div><div class='add'>+	return pmu-&gt;counter_bitmask[pmc-&gt;type];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 pmc_read_counter(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	u64 counter, enabled, running;</div><div class='add'>+</div><div class='add'>+	counter = pmc-&gt;counter;</div><div class='add'>+	if (pmc-&gt;perf_event)</div><div class='add'>+		counter += perf_event_read_value(pmc-&gt;perf_event,</div><div class='add'>+						 &amp;enabled, &amp;running);</div><div class='add'>+	/* FIXME: Scaling needed? */</div><div class='add'>+	return counter &amp; pmc_bitmask(pmc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pmc_stop_counter(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	if (pmc-&gt;perf_event) {</div><div class='add'>+		pmc-&gt;counter = pmc_read_counter(pmc);</div><div class='add'>+		perf_event_release_kernel(pmc-&gt;perf_event);</div><div class='add'>+		pmc-&gt;perf_event = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pmc_is_gp(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	return pmc-&gt;type == KVM_PMC_GP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pmc_is_fixed(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	return pmc-&gt;type == KVM_PMC_FIXED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pmc_is_enabled(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	return kvm_x86_ops-&gt;pmu_ops-&gt;pmc_is_enabled(pmc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* returns general purpose PMC with the specified MSR. Note that it can be</div><div class='add'>+ * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a</div><div class='add'>+ * paramenter to tell them apart.</div><div class='add'>+ */</div><div class='add'>+static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,</div><div class='add'>+					 u32 base)</div><div class='add'>+{</div><div class='add'>+	if (msr &gt;= base &amp;&amp; msr &lt; base + pmu-&gt;nr_arch_gp_counters)</div><div class='add'>+		return &amp;pmu-&gt;gp_counters[msr - base];</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* returns fixed PMC with the specified MSR */</div><div class='add'>+static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)</div><div class='add'>+{</div><div class='add'>+	int base = MSR_CORE_PERF_FIXED_CTR0;</div><div class='add'>+</div><div class='add'>+	if (msr &gt;= base &amp;&amp; msr &lt; base + pmu-&gt;nr_arch_fixed_counters)</div><div class='add'>+		return &amp;pmu-&gt;fixed_counters[msr - base];</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);</div><div class='add'>+void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);</div><div class='add'>+void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);</div><div class='add'>+</div><div class='add'>+void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);</div><div class='add'>+int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx);</div><div class='add'>+bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);</div><div class='add'>+int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);</div><div class='add'>+int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);</div><div class='add'>+void kvm_pmu_refresh(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_pmu_reset(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_pmu_init(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_pmu_destroy(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+extern struct kvm_pmu_ops intel_pmu_ops;</div><div class='add'>+extern struct kvm_pmu_ops amd_pmu_ops;</div><div class='add'>+#endif /* __KVM_X86_PMU_H */</div><div class='head'>diff --git a/arch/x86/kvm/pmu_amd.c b/arch/x86/kvm/pmu_amd.c<br/>new file mode 100644<br/>index 000000000000..886aa25a7131<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/pmu_amd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu_amd.c</a></div><div class='hunk'>@@ -0,0 +1,207 @@</div><div class='add'>+/*</div><div class='add'>+ * KVM PMU support for AMD</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2015, Red Hat, Inc. and/or its affiliates.</div><div class='add'>+ *</div><div class='add'>+ * Author:</div><div class='add'>+ *   Wei Huang &lt;wei@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This work is licensed under the terms of the GNU GPL, version 2.  See</div><div class='add'>+ * the COPYING file in the top-level directory.</div><div class='add'>+ *</div><div class='add'>+ * Implementation is based on pmu_intel.c file</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include "x86.h"</div><div class='add'>+#include "cpuid.h"</div><div class='add'>+#include "lapic.h"</div><div class='add'>+#include "pmu.h"</div><div class='add'>+</div><div class='add'>+/* duplicated from amd_perfmon_event_map, K7 and above should work. */</div><div class='add'>+static struct kvm_event_hw_type_mapping amd_event_mapping[] = {</div><div class='add'>+	[0] = { 0x76, 0x00, PERF_COUNT_HW_CPU_CYCLES },</div><div class='add'>+	[1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },</div><div class='add'>+	[2] = { 0x80, 0x00, PERF_COUNT_HW_CACHE_REFERENCES },</div><div class='add'>+	[3] = { 0x81, 0x00, PERF_COUNT_HW_CACHE_MISSES },</div><div class='add'>+	[4] = { 0xc2, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },</div><div class='add'>+	[5] = { 0xc3, 0x00, PERF_COUNT_HW_BRANCH_MISSES },</div><div class='add'>+	[6] = { 0xd0, 0x00, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND },</div><div class='add'>+	[7] = { 0xd1, 0x00, PERF_COUNT_HW_STALLED_CYCLES_BACKEND },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned amd_find_arch_event(struct kvm_pmu *pmu,</div><div class='add'>+				    u8 event_select,</div><div class='add'>+				    u8 unit_mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(amd_event_mapping); i++)</div><div class='add'>+		if (amd_event_mapping[i].eventsel == event_select</div><div class='add'>+		    &amp;&amp; amd_event_mapping[i].unit_mask == unit_mask)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (i == ARRAY_SIZE(amd_event_mapping))</div><div class='add'>+		return PERF_COUNT_HW_MAX;</div><div class='add'>+</div><div class='add'>+	return amd_event_mapping[i].event_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* return PERF_COUNT_HW_MAX as AMD doesn't have fixed events */</div><div class='add'>+static unsigned amd_find_fixed_event(int idx)</div><div class='add'>+{</div><div class='add'>+	return PERF_COUNT_HW_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* check if a PMC is enabled by comparing it against global_ctrl bits. Because</div><div class='add'>+ * AMD CPU doesn't have global_ctrl MSR, all PMCs are enabled (return TRUE).</div><div class='add'>+ */</div><div class='add'>+static bool amd_pmc_is_enabled(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_pmc *amd_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx)</div><div class='add'>+{</div><div class='add'>+	return get_gp_pmc(pmu, MSR_K7_EVNTSEL0 + pmc_idx, MSR_K7_EVNTSEL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* returns 0 if idx's corresponding MSR exists; otherwise returns 1. */</div><div class='add'>+static int amd_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+</div><div class='add'>+	idx &amp;= ~(3u &lt;&lt; 30);</div><div class='add'>+</div><div class='add'>+	return (idx &gt;= pmu-&gt;nr_arch_gp_counters);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* idx is the ECX register of RDPMC instruction */</div><div class='add'>+static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, unsigned idx)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_pmc *counters;</div><div class='add'>+</div><div class='add'>+	idx &amp;= ~(3u &lt;&lt; 30);</div><div class='add'>+	if (idx &gt;= pmu-&gt;nr_arch_gp_counters)</div><div class='add'>+		return NULL;</div><div class='add'>+	counters = pmu-&gt;gp_counters;</div><div class='add'>+</div><div class='add'>+	return &amp;counters[idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amd_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	int ret = false;</div><div class='add'>+</div><div class='add'>+	ret = get_gp_pmc(pmu, msr, MSR_K7_PERFCTR0) ||</div><div class='add'>+		get_gp_pmc(pmu, msr, MSR_K7_EVNTSEL0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amd_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_pmc *pmc;</div><div class='add'>+</div><div class='add'>+	/* MSR_K7_PERFCTRn */</div><div class='add'>+	pmc = get_gp_pmc(pmu, msr, MSR_K7_PERFCTR0);</div><div class='add'>+	if (pmc) {</div><div class='add'>+		*data = pmc_read_counter(pmc);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	/* MSR_K7_EVNTSELn */</div><div class='add'>+	pmc = get_gp_pmc(pmu, msr, MSR_K7_EVNTSEL0);</div><div class='add'>+	if (pmc) {</div><div class='add'>+		*data = pmc-&gt;eventsel;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_pmc *pmc;</div><div class='add'>+	u32 msr = msr_info-&gt;index;</div><div class='add'>+	u64 data = msr_info-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* MSR_K7_PERFCTRn */</div><div class='add'>+	pmc = get_gp_pmc(pmu, msr, MSR_K7_PERFCTR0);</div><div class='add'>+	if (pmc) {</div><div class='add'>+		if (!msr_info-&gt;host_initiated)</div><div class='add'>+			data = (s64)data;</div><div class='add'>+		pmc-&gt;counter += data - pmc_read_counter(pmc);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	/* MSR_K7_EVNTSELn */</div><div class='add'>+	pmc = get_gp_pmc(pmu, msr, MSR_K7_EVNTSEL0);</div><div class='add'>+	if (pmc) {</div><div class='add'>+		if (data == pmc-&gt;eventsel)</div><div class='add'>+			return 0;</div><div class='add'>+		if (!(data &amp; pmu-&gt;reserved_bits)) {</div><div class='add'>+			reprogram_gp_counter(pmc, data);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_pmu_refresh(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+</div><div class='add'>+	pmu-&gt;nr_arch_gp_counters = AMD64_NUM_COUNTERS;</div><div class='add'>+	pmu-&gt;counter_bitmask[KVM_PMC_GP] = ((u64)1 &lt;&lt; 48) - 1;</div><div class='add'>+	pmu-&gt;reserved_bits = 0xffffffff00200000ull;</div><div class='add'>+	/* not applicable to AMD; but clean them to prevent any fall out */</div><div class='add'>+	pmu-&gt;counter_bitmask[KVM_PMC_FIXED] = 0;</div><div class='add'>+	pmu-&gt;nr_arch_fixed_counters = 0;</div><div class='add'>+	pmu-&gt;version = 0;</div><div class='add'>+	pmu-&gt;global_status = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_pmu_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AMD64_NUM_COUNTERS ; i++) {</div><div class='add'>+		pmu-&gt;gp_counters[i].type = KVM_PMC_GP;</div><div class='add'>+		pmu-&gt;gp_counters[i].vcpu = vcpu;</div><div class='add'>+		pmu-&gt;gp_counters[i].idx = i;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_pmu_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AMD64_NUM_COUNTERS; i++) {</div><div class='add'>+		struct kvm_pmc *pmc = &amp;pmu-&gt;gp_counters[i];</div><div class='add'>+</div><div class='add'>+		pmc_stop_counter(pmc);</div><div class='add'>+		pmc-&gt;counter = pmc-&gt;eventsel = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct kvm_pmu_ops amd_pmu_ops = {</div><div class='add'>+	.find_arch_event = amd_find_arch_event,</div><div class='add'>+	.find_fixed_event = amd_find_fixed_event,</div><div class='add'>+	.pmc_is_enabled = amd_pmc_is_enabled,</div><div class='add'>+	.pmc_idx_to_pmc = amd_pmc_idx_to_pmc,</div><div class='add'>+	.msr_idx_to_pmc = amd_msr_idx_to_pmc,</div><div class='add'>+	.is_valid_msr_idx = amd_is_valid_msr_idx,</div><div class='add'>+	.is_valid_msr = amd_is_valid_msr,</div><div class='add'>+	.get_msr = amd_pmu_get_msr,</div><div class='add'>+	.set_msr = amd_pmu_set_msr,</div><div class='add'>+	.refresh = amd_pmu_refresh,</div><div class='add'>+	.init = amd_pmu_init,</div><div class='add'>+	.reset = amd_pmu_reset,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/x86/kvm/pmu_intel.c b/arch/x86/kvm/pmu_intel.c<br/>new file mode 100644<br/>index 000000000000..ab38af4f4947<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/pmu_intel.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/pmu_intel.c</a></div><div class='hunk'>@@ -0,0 +1,358 @@</div><div class='add'>+/*</div><div class='add'>+ * KVM PMU support for Intel CPUs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Red Hat, Inc. and/or its affiliates.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *   Avi Kivity   &lt;avi@redhat.com&gt;</div><div class='add'>+ *   Gleb Natapov &lt;gleb@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This work is licensed under the terms of the GNU GPL, version 2.  See</div><div class='add'>+ * the COPYING file in the top-level directory.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/perf_event.h&gt;</div><div class='add'>+#include "x86.h"</div><div class='add'>+#include "cpuid.h"</div><div class='add'>+#include "lapic.h"</div><div class='add'>+#include "pmu.h"</div><div class='add'>+</div><div class='add'>+static struct kvm_event_hw_type_mapping intel_arch_events[] = {</div><div class='add'>+	/* Index must match CPUID 0x0A.EBX bit vector */</div><div class='add'>+	[0] = { 0x3c, 0x00, PERF_COUNT_HW_CPU_CYCLES },</div><div class='add'>+	[1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },</div><div class='add'>+	[2] = { 0x3c, 0x01, PERF_COUNT_HW_BUS_CYCLES  },</div><div class='add'>+	[3] = { 0x2e, 0x4f, PERF_COUNT_HW_CACHE_REFERENCES },</div><div class='add'>+	[4] = { 0x2e, 0x41, PERF_COUNT_HW_CACHE_MISSES },</div><div class='add'>+	[5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },</div><div class='add'>+	[6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES },</div><div class='add'>+	[7] = { 0x00, 0x30, PERF_COUNT_HW_REF_CPU_CYCLES },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mapping between fixed pmc index and intel_arch_events array */</div><div class='add'>+static int fixed_pmc_events[] = {1, 0, 7};</div><div class='add'>+</div><div class='add'>+static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pmu-&gt;nr_arch_fixed_counters; i++) {</div><div class='add'>+		u8 new_ctrl = fixed_ctrl_field(data, i);</div><div class='add'>+		u8 old_ctrl = fixed_ctrl_field(pmu-&gt;fixed_ctr_ctrl, i);</div><div class='add'>+		struct kvm_pmc *pmc;</div><div class='add'>+</div><div class='add'>+		pmc = get_fixed_pmc(pmu, MSR_CORE_PERF_FIXED_CTR0 + i);</div><div class='add'>+</div><div class='add'>+		if (old_ctrl == new_ctrl)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		reprogram_fixed_counter(pmc, new_ctrl, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmu-&gt;fixed_ctr_ctrl = data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* function is called when global control register has been updated. */</div><div class='add'>+static void global_ctrl_changed(struct kvm_pmu *pmu, u64 data)</div><div class='add'>+{</div><div class='add'>+	int bit;</div><div class='add'>+	u64 diff = pmu-&gt;global_ctrl ^ data;</div><div class='add'>+</div><div class='add'>+	pmu-&gt;global_ctrl = data;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(bit, (unsigned long *)&amp;diff, X86_PMC_IDX_MAX)</div><div class='add'>+		reprogram_counter(pmu, bit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned intel_find_arch_event(struct kvm_pmu *pmu,</div><div class='add'>+				      u8 event_select,</div><div class='add'>+				      u8 unit_mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(intel_arch_events); i++)</div><div class='add'>+		if (intel_arch_events[i].eventsel == event_select</div><div class='add'>+		    &amp;&amp; intel_arch_events[i].unit_mask == unit_mask</div><div class='add'>+		    &amp;&amp; (pmu-&gt;available_event_types &amp; (1 &lt;&lt; i)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (i == ARRAY_SIZE(intel_arch_events))</div><div class='add'>+		return PERF_COUNT_HW_MAX;</div><div class='add'>+</div><div class='add'>+	return intel_arch_events[i].event_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned intel_find_fixed_event(int idx)</div><div class='add'>+{</div><div class='add'>+	if (idx &gt;= ARRAY_SIZE(fixed_pmc_events))</div><div class='add'>+		return PERF_COUNT_HW_MAX;</div><div class='add'>+</div><div class='add'>+	return intel_arch_events[fixed_pmc_events[idx]].event_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* check if a PMC is enabled by comparising it with globl_ctrl bits. */</div><div class='add'>+static bool intel_pmc_is_enabled(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);</div><div class='add'>+</div><div class='add'>+	return test_bit(pmc-&gt;idx, (unsigned long *)&amp;pmu-&gt;global_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_pmc *intel_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx)</div><div class='add'>+{</div><div class='add'>+	if (pmc_idx &lt; INTEL_PMC_IDX_FIXED)</div><div class='add'>+		return get_gp_pmc(pmu, MSR_P6_EVNTSEL0 + pmc_idx,</div><div class='add'>+				  MSR_P6_EVNTSEL0);</div><div class='add'>+	else {</div><div class='add'>+		u32 idx = pmc_idx - INTEL_PMC_IDX_FIXED;</div><div class='add'>+</div><div class='add'>+		return get_fixed_pmc(pmu, idx + MSR_CORE_PERF_FIXED_CTR0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* returns 0 if idx's corresponding MSR exists; otherwise returns 1. */</div><div class='add'>+static int intel_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	bool fixed = idx &amp; (1u &lt;&lt; 30);</div><div class='add'>+</div><div class='add'>+	idx &amp;= ~(3u &lt;&lt; 30);</div><div class='add'>+</div><div class='add'>+	return (!fixed &amp;&amp; idx &gt;= pmu-&gt;nr_arch_gp_counters) ||</div><div class='add'>+		(fixed &amp;&amp; idx &gt;= pmu-&gt;nr_arch_fixed_counters);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu,</div><div class='add'>+					    unsigned idx)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	bool fixed = idx &amp; (1u &lt;&lt; 30);</div><div class='add'>+	struct kvm_pmc *counters;</div><div class='add'>+</div><div class='add'>+	idx &amp;= ~(3u &lt;&lt; 30);</div><div class='add'>+	if (!fixed &amp;&amp; idx &gt;= pmu-&gt;nr_arch_gp_counters)</div><div class='add'>+		return NULL;</div><div class='add'>+	if (fixed &amp;&amp; idx &gt;= pmu-&gt;nr_arch_fixed_counters)</div><div class='add'>+		return NULL;</div><div class='add'>+	counters = fixed ? pmu-&gt;fixed_counters : pmu-&gt;gp_counters;</div><div class='add'>+</div><div class='add'>+	return &amp;counters[idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (msr) {</div><div class='add'>+	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='add'>+		ret = pmu-&gt;version &gt; 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0) ||</div><div class='add'>+			get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) ||</div><div class='add'>+			get_fixed_pmc(pmu, msr);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_pmc *pmc;</div><div class='add'>+</div><div class='add'>+	switch (msr) {</div><div class='add'>+	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='add'>+		*data = pmu-&gt;fixed_ctr_ctrl;</div><div class='add'>+		return 0;</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='add'>+		*data = pmu-&gt;global_status;</div><div class='add'>+		return 0;</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='add'>+		*data = pmu-&gt;global_ctrl;</div><div class='add'>+		return 0;</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='add'>+		*data = pmu-&gt;global_ovf_ctrl;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||</div><div class='add'>+		    (pmc = get_fixed_pmc(pmu, msr))) {</div><div class='add'>+			*data = pmc_read_counter(pmc);</div><div class='add'>+			return 0;</div><div class='add'>+		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {</div><div class='add'>+			*data = pmc-&gt;eventsel;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_pmc *pmc;</div><div class='add'>+	u32 msr = msr_info-&gt;index;</div><div class='add'>+	u64 data = msr_info-&gt;data;</div><div class='add'>+</div><div class='add'>+	switch (msr) {</div><div class='add'>+	case MSR_CORE_PERF_FIXED_CTR_CTRL:</div><div class='add'>+		if (pmu-&gt;fixed_ctr_ctrl == data)</div><div class='add'>+			return 0;</div><div class='add'>+		if (!(data &amp; 0xfffffffffffff444ull)) {</div><div class='add'>+			reprogram_fixed_counters(pmu, data);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_STATUS:</div><div class='add'>+		if (msr_info-&gt;host_initiated) {</div><div class='add'>+			pmu-&gt;global_status = data;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break; /* RO MSR */</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_CTRL:</div><div class='add'>+		if (pmu-&gt;global_ctrl == data)</div><div class='add'>+			return 0;</div><div class='add'>+		if (!(data &amp; pmu-&gt;global_ctrl_mask)) {</div><div class='add'>+			global_ctrl_changed(pmu, data);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:</div><div class='add'>+		if (!(data &amp; (pmu-&gt;global_ctrl_mask &amp; ~(3ull&lt;&lt;62)))) {</div><div class='add'>+			if (!msr_info-&gt;host_initiated)</div><div class='add'>+				pmu-&gt;global_status &amp;= ~data;</div><div class='add'>+			pmu-&gt;global_ovf_ctrl = data;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||</div><div class='add'>+		    (pmc = get_fixed_pmc(pmu, msr))) {</div><div class='add'>+			if (!msr_info-&gt;host_initiated)</div><div class='add'>+				data = (s64)(s32)data;</div><div class='add'>+			pmc-&gt;counter += data - pmc_read_counter(pmc);</div><div class='add'>+			return 0;</div><div class='add'>+		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {</div><div class='add'>+			if (data == pmc-&gt;eventsel)</div><div class='add'>+				return 0;</div><div class='add'>+			if (!(data &amp; pmu-&gt;reserved_bits)) {</div><div class='add'>+				reprogram_gp_counter(pmc, data);</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_pmu_refresh(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	struct kvm_cpuid_entry2 *entry;</div><div class='add'>+	union cpuid10_eax eax;</div><div class='add'>+	union cpuid10_edx edx;</div><div class='add'>+</div><div class='add'>+	pmu-&gt;nr_arch_gp_counters = 0;</div><div class='add'>+	pmu-&gt;nr_arch_fixed_counters = 0;</div><div class='add'>+	pmu-&gt;counter_bitmask[KVM_PMC_GP] = 0;</div><div class='add'>+	pmu-&gt;counter_bitmask[KVM_PMC_FIXED] = 0;</div><div class='add'>+	pmu-&gt;version = 0;</div><div class='add'>+	pmu-&gt;reserved_bits = 0xffffffff00200000ull;</div><div class='add'>+</div><div class='add'>+	entry = kvm_find_cpuid_entry(vcpu, 0xa, 0);</div><div class='add'>+	if (!entry)</div><div class='add'>+		return;</div><div class='add'>+	eax.full = entry-&gt;eax;</div><div class='add'>+	edx.full = entry-&gt;edx;</div><div class='add'>+</div><div class='add'>+	pmu-&gt;version = eax.split.version_id;</div><div class='add'>+	if (!pmu-&gt;version)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pmu-&gt;nr_arch_gp_counters = min_t(int, eax.split.num_counters,</div><div class='add'>+					INTEL_PMC_MAX_GENERIC);</div><div class='add'>+	pmu-&gt;counter_bitmask[KVM_PMC_GP] = ((u64)1 &lt;&lt; eax.split.bit_width) - 1;</div><div class='add'>+	pmu-&gt;available_event_types = ~entry-&gt;ebx &amp;</div><div class='add'>+					((1ull &lt;&lt; eax.split.mask_length) - 1);</div><div class='add'>+</div><div class='add'>+	if (pmu-&gt;version == 1) {</div><div class='add'>+		pmu-&gt;nr_arch_fixed_counters = 0;</div><div class='add'>+	} else {</div><div class='add'>+		pmu-&gt;nr_arch_fixed_counters =</div><div class='add'>+			min_t(int, edx.split.num_counters_fixed,</div><div class='add'>+				INTEL_PMC_MAX_FIXED);</div><div class='add'>+		pmu-&gt;counter_bitmask[KVM_PMC_FIXED] =</div><div class='add'>+			((u64)1 &lt;&lt; edx.split.bit_width_fixed) - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmu-&gt;global_ctrl = ((1 &lt;&lt; pmu-&gt;nr_arch_gp_counters) - 1) |</div><div class='add'>+		(((1ull &lt;&lt; pmu-&gt;nr_arch_fixed_counters) - 1) &lt;&lt; INTEL_PMC_IDX_FIXED);</div><div class='add'>+	pmu-&gt;global_ctrl_mask = ~pmu-&gt;global_ctrl;</div><div class='add'>+</div><div class='add'>+	entry = kvm_find_cpuid_entry(vcpu, 7, 0);</div><div class='add'>+	if (entry &amp;&amp;</div><div class='add'>+	    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &amp;&amp;</div><div class='add'>+	    (entry-&gt;ebx &amp; (X86_FEATURE_HLE|X86_FEATURE_RTM)))</div><div class='add'>+		pmu-&gt;reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_pmu_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; INTEL_PMC_MAX_GENERIC; i++) {</div><div class='add'>+		pmu-&gt;gp_counters[i].type = KVM_PMC_GP;</div><div class='add'>+		pmu-&gt;gp_counters[i].vcpu = vcpu;</div><div class='add'>+		pmu-&gt;gp_counters[i].idx = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; INTEL_PMC_MAX_FIXED; i++) {</div><div class='add'>+		pmu-&gt;fixed_counters[i].type = KVM_PMC_FIXED;</div><div class='add'>+		pmu-&gt;fixed_counters[i].vcpu = vcpu;</div><div class='add'>+		pmu-&gt;fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_pmu_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; INTEL_PMC_MAX_GENERIC; i++) {</div><div class='add'>+		struct kvm_pmc *pmc = &amp;pmu-&gt;gp_counters[i];</div><div class='add'>+</div><div class='add'>+		pmc_stop_counter(pmc);</div><div class='add'>+		pmc-&gt;counter = pmc-&gt;eventsel = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; INTEL_PMC_MAX_FIXED; i++)</div><div class='add'>+		pmc_stop_counter(&amp;pmu-&gt;fixed_counters[i]);</div><div class='add'>+</div><div class='add'>+	pmu-&gt;fixed_ctr_ctrl = pmu-&gt;global_ctrl = pmu-&gt;global_status =</div><div class='add'>+		pmu-&gt;global_ovf_ctrl = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct kvm_pmu_ops intel_pmu_ops = {</div><div class='add'>+	.find_arch_event = intel_find_arch_event,</div><div class='add'>+	.find_fixed_event = intel_find_fixed_event,</div><div class='add'>+	.pmc_is_enabled = intel_pmc_is_enabled,</div><div class='add'>+	.pmc_idx_to_pmc = intel_pmc_idx_to_pmc,</div><div class='add'>+	.msr_idx_to_pmc = intel_msr_idx_to_pmc,</div><div class='add'>+	.is_valid_msr_idx = intel_is_valid_msr_idx,</div><div class='add'>+	.is_valid_msr = intel_is_valid_msr,</div><div class='add'>+	.get_msr = intel_pmu_get_msr,</div><div class='add'>+	.set_msr = intel_pmu_set_msr,</div><div class='add'>+	.refresh = intel_pmu_refresh,</div><div class='add'>+	.init = intel_pmu_init,</div><div class='add'>+	.reset = intel_pmu_reset,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c<br/>index 9afa233b5482..bbc678a66b18 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/svm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/svm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/svm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/svm.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include "kvm_cache_regs.h"</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='add'>+#include "pmu.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='hunk'>@@ -28,7 +29,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/ftrace_event.h&gt;</div><div class='add'>+#include &lt;linux/trace_events.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='hunk'>@@ -511,8 +512,10 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_svm *svm = to_svm(vcpu);</div><div class='ctx'> </div><div class='del'>-	if (svm-&gt;vmcb-&gt;control.next_rip != 0)</div><div class='add'>+	if (svm-&gt;vmcb-&gt;control.next_rip != 0) {</div><div class='add'>+		WARN_ON(!static_cpu_has(X86_FEATURE_NRIPS));</div><div class='ctx'> 		svm-&gt;next_rip = svm-&gt;vmcb-&gt;control.next_rip;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!svm-&gt;next_rip) {</div><div class='ctx'> 		if (emulate_instruction(vcpu, EMULTYPE_SKIP) !=</div><div class='hunk'>@@ -862,6 +865,64 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)</div><div class='ctx'> 	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MTRR_TYPE_UC_MINUS	7</div><div class='add'>+#define MTRR2PROTVAL_INVALID 0xff</div><div class='add'>+</div><div class='add'>+static u8 mtrr2protval[8];</div><div class='add'>+</div><div class='add'>+static u8 fallback_mtrr_type(int mtrr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * WT and WP aren't always available in the host PAT.  Treat</div><div class='add'>+	 * them as UC and UC- respectively.  Everything else should be</div><div class='add'>+	 * there.</div><div class='add'>+	 */</div><div class='add'>+	switch (mtrr)</div><div class='add'>+	{</div><div class='add'>+	case MTRR_TYPE_WRTHROUGH:</div><div class='add'>+		return MTRR_TYPE_UNCACHABLE;</div><div class='add'>+	case MTRR_TYPE_WRPROT:</div><div class='add'>+		return MTRR_TYPE_UC_MINUS;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void build_mtrr2protval(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u64 pat;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		mtrr2protval[i] = MTRR2PROTVAL_INVALID;</div><div class='add'>+</div><div class='add'>+	/* Ignore the invalid MTRR types.  */</div><div class='add'>+	mtrr2protval[2] = 0;</div><div class='add'>+	mtrr2protval[3] = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Use host PAT value to figure out the mapping from guest MTRR</div><div class='add'>+	 * values to nested page table PAT/PCD/PWT values.  We do not</div><div class='add'>+	 * want to change the host PAT value every time we enter the</div><div class='add'>+	 * guest.</div><div class='add'>+	 */</div><div class='add'>+	rdmsrl(MSR_IA32_CR_PAT, pat);</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		u8 mtrr = pat &gt;&gt; (8 * i);</div><div class='add'>+</div><div class='add'>+		if (mtrr2protval[mtrr] == MTRR2PROTVAL_INVALID)</div><div class='add'>+			mtrr2protval[mtrr] = __cm_idx2pte(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		if (mtrr2protval[i] == MTRR2PROTVAL_INVALID) {</div><div class='add'>+			u8 fallback = fallback_mtrr_type(i);</div><div class='add'>+			mtrr2protval[i] = mtrr2protval[fallback];</div><div class='add'>+			BUG_ON(mtrr2protval[i] == MTRR2PROTVAL_INVALID);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __init int svm_hardware_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='hunk'>@@ -928,6 +989,7 @@ static __init int svm_hardware_setup(void)</div><div class='ctx'> 	} else</div><div class='ctx'> 		kvm_disable_tdp();</div><div class='ctx'> </div><div class='add'>+	build_mtrr2protval();</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -1082,7 +1144,40 @@ static u64 svm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)</div><div class='ctx'> 	return target_tsc - tsc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void init_vmcb(struct vcpu_svm *svm)</div><div class='add'>+static void svm_set_guest_pat(struct vcpu_svm *svm, u64 *g_pat)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = &amp;svm-&gt;vcpu;</div><div class='add'>+</div><div class='add'>+	/* Unlike Intel, AMD takes the guest's CR0.CD into account.</div><div class='add'>+	 *</div><div class='add'>+	 * AMD does not have IPAT.  To emulate it for the case of guests</div><div class='add'>+	 * with no assigned devices, just set everything to WB.  If guests</div><div class='add'>+	 * have assigned devices, however, we cannot force WB for RAM</div><div class='add'>+	 * pages only, so use the guest PAT directly.</div><div class='add'>+	 */</div><div class='add'>+	if (!kvm_arch_has_assigned_device(vcpu-&gt;kvm))</div><div class='add'>+		*g_pat = 0x0606060606060606;</div><div class='add'>+	else</div><div class='add'>+		*g_pat = vcpu-&gt;arch.pat;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)</div><div class='add'>+{</div><div class='add'>+	u8 mtrr;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 1. MMIO: trust guest MTRR, so same as item 3.</div><div class='add'>+	 * 2. No passthrough: always map as WB, and force guest PAT to WB as well</div><div class='add'>+	 * 3. Passthrough: can't guarantee the result, try to trust guest.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_mmio &amp;&amp; !kvm_arch_has_assigned_device(vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mtrr = kvm_mtrr_get_guest_memory_type(vcpu, gfn);</div><div class='add'>+	return mtrr2protval[mtrr];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void init_vmcb(struct vcpu_svm *svm, bool init_event)</div><div class='ctx'> {</div><div class='ctx'> 	struct vmcb_control_area *control = &amp;svm-&gt;vmcb-&gt;control;</div><div class='ctx'> 	struct vmcb_save_area *save = &amp;svm-&gt;vmcb-&gt;save;</div><div class='hunk'>@@ -1153,17 +1248,17 @@ static void init_vmcb(struct vcpu_svm *svm)</div><div class='ctx'> 	init_sys_seg(&amp;save-&gt;ldtr, SEG_TYPE_LDT);</div><div class='ctx'> 	init_sys_seg(&amp;save-&gt;tr, SEG_TYPE_BUSY_TSS16);</div><div class='ctx'> </div><div class='del'>-	svm_set_efer(&amp;svm-&gt;vcpu, 0);</div><div class='add'>+	if (!init_event)</div><div class='add'>+		svm_set_efer(&amp;svm-&gt;vcpu, 0);</div><div class='ctx'> 	save-&gt;dr6 = 0xffff0ff0;</div><div class='ctx'> 	kvm_set_rflags(&amp;svm-&gt;vcpu, 2);</div><div class='ctx'> 	save-&gt;rip = 0x0000fff0;</div><div class='ctx'> 	svm-&gt;vcpu.arch.regs[VCPU_REGS_RIP] = save-&gt;rip;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * This is the guest-visible cr0 value.</div><div class='ctx'> 	 * svm_set_cr0() sets PG and WP and clears NW and CD on save-&gt;cr0.</div><div class='add'>+	 * It also updates the guest-visible cr0 value.</div><div class='ctx'> 	 */</div><div class='del'>-	svm-&gt;vcpu.arch.cr0 = 0;</div><div class='ctx'> 	(void)kvm_set_cr0(&amp;svm-&gt;vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);</div><div class='ctx'> </div><div class='ctx'> 	save-&gt;cr4 = X86_CR4_PAE;</div><div class='hunk'>@@ -1176,7 +1271,8 @@ static void init_vmcb(struct vcpu_svm *svm)</div><div class='ctx'> 		clr_exception_intercept(svm, PF_VECTOR);</div><div class='ctx'> 		clr_cr_intercept(svm, INTERCEPT_CR3_READ);</div><div class='ctx'> 		clr_cr_intercept(svm, INTERCEPT_CR3_WRITE);</div><div class='del'>-		save-&gt;g_pat = 0x0007040600070406ULL;</div><div class='add'>+		save-&gt;g_pat = svm-&gt;vcpu.arch.pat;</div><div class='add'>+		svm_set_guest_pat(svm, &amp;save-&gt;g_pat);</div><div class='ctx'> 		save-&gt;cr3 = 0;</div><div class='ctx'> 		save-&gt;cr4 = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1195,13 +1291,19 @@ static void init_vmcb(struct vcpu_svm *svm)</div><div class='ctx'> 	enable_gif(svm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void svm_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_svm *svm = to_svm(vcpu);</div><div class='ctx'> 	u32 dummy;</div><div class='ctx'> 	u32 eax = 1;</div><div class='ctx'> </div><div class='del'>-	init_vmcb(svm);</div><div class='add'>+	if (!init_event) {</div><div class='add'>+		svm-&gt;vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE |</div><div class='add'>+					   MSR_IA32_APICBASE_ENABLE;</div><div class='add'>+		if (kvm_vcpu_is_reset_bsp(&amp;svm-&gt;vcpu))</div><div class='add'>+			svm-&gt;vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;</div><div class='add'>+	}</div><div class='add'>+	init_vmcb(svm, init_event);</div><div class='ctx'> </div><div class='ctx'> 	kvm_cpuid(vcpu, &amp;eax, &amp;dummy, &amp;dummy, &amp;dummy);</div><div class='ctx'> 	kvm_register_write(vcpu, VCPU_REGS_RDX, eax);</div><div class='hunk'>@@ -1257,12 +1359,7 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 	clear_page(svm-&gt;vmcb);</div><div class='ctx'> 	svm-&gt;vmcb_pa = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	svm-&gt;asid_generation = 0;</div><div class='del'>-	init_vmcb(svm);</div><div class='del'>-</div><div class='del'>-	svm-&gt;vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE |</div><div class='del'>-				   MSR_IA32_APICBASE_ENABLE;</div><div class='del'>-	if (kvm_vcpu_is_reset_bsp(&amp;svm-&gt;vcpu))</div><div class='del'>-		svm-&gt;vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;</div><div class='add'>+	init_vmcb(svm, false);</div><div class='ctx'> </div><div class='ctx'> 	svm_init_osvw(&amp;svm-&gt;vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -1575,7 +1672,8 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='ctx'> 	 * does not do it - this results in some delay at</div><div class='ctx'> 	 * reboot</div><div class='ctx'> 	 */</div><div class='del'>-	cr0 &amp;= ~(X86_CR0_CD | X86_CR0_NW);</div><div class='add'>+	if (!(vcpu-&gt;kvm-&gt;arch.disabled_quirks &amp; KVM_QUIRK_CD_NW_CLEARED))</div><div class='add'>+		cr0 &amp;= ~(X86_CR0_CD | X86_CR0_NW);</div><div class='ctx'> 	svm-&gt;vmcb-&gt;save.cr0 = cr0;</div><div class='ctx'> 	mark_dirty(svm-&gt;vmcb, VMCB_CR);</div><div class='ctx'> 	update_cr0_intercept(svm);</div><div class='hunk'>@@ -1883,7 +1981,7 @@ static int shutdown_interception(struct vcpu_svm *svm)</div><div class='ctx'> 	 * so reinitialize it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	clear_page(svm-&gt;vmcb);</div><div class='del'>-	init_vmcb(svm);</div><div class='add'>+	init_vmcb(svm, false);</div><div class='ctx'> </div><div class='ctx'> 	kvm_run-&gt;exit_reason = KVM_EXIT_SHUTDOWN;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1953,8 +2051,8 @@ static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)</div><div class='ctx'> 	u64 pdpte;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_read_guest_page(vcpu-&gt;kvm, gpa_to_gfn(cr3), &amp;pdpte,</div><div class='del'>-				  offset_in_page(cr3) + index * 8, 8);</div><div class='add'>+	ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &amp;pdpte,</div><div class='add'>+				       offset_in_page(cr3) + index * 8, 8);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return pdpte;</div><div class='hunk'>@@ -2112,7 +2210,7 @@ static void *nested_svm_map(struct vcpu_svm *svm, u64 gpa, struct page **_page)</div><div class='ctx'> </div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='del'>-	page = gfn_to_page(svm-&gt;vcpu.kvm, gpa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	page = kvm_vcpu_gfn_to_page(&amp;svm-&gt;vcpu, gpa &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	if (is_error_page(page))</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='hunk'>@@ -2151,7 +2249,7 @@ static int nested_svm_intercept_ioio(struct vcpu_svm *svm)</div><div class='ctx'> 	mask = (0xf &gt;&gt; (4 - size)) &lt;&lt; start_bit;</div><div class='ctx'> 	val = 0;</div><div class='ctx'> </div><div class='del'>-	if (kvm_read_guest(svm-&gt;vcpu.kvm, gpa, &amp;val, iopm_len))</div><div class='add'>+	if (kvm_vcpu_read_guest(&amp;svm-&gt;vcpu, gpa, &amp;val, iopm_len))</div><div class='ctx'> 		return NESTED_EXIT_DONE;</div><div class='ctx'> </div><div class='ctx'> 	return (val &amp; mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;</div><div class='hunk'>@@ -2176,7 +2274,7 @@ static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)</div><div class='ctx'> 	/* Offset is in 32 bit units but need in 8 bit units */</div><div class='ctx'> 	offset *= 4;</div><div class='ctx'> </div><div class='del'>-	if (kvm_read_guest(svm-&gt;vcpu.kvm, svm-&gt;nested.vmcb_msrpm + offset, &amp;value, 4))</div><div class='add'>+	if (kvm_vcpu_read_guest(&amp;svm-&gt;vcpu, svm-&gt;nested.vmcb_msrpm + offset, &amp;value, 4))</div><div class='ctx'> 		return NESTED_EXIT_DONE;</div><div class='ctx'> </div><div class='ctx'> 	return (value &amp; mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;</div><div class='hunk'>@@ -2447,7 +2545,7 @@ static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm)</div><div class='ctx'> 		p      = msrpm_offsets[i];</div><div class='ctx'> 		offset = svm-&gt;nested.vmcb_msrpm + (p * 4);</div><div class='ctx'> </div><div class='del'>-		if (kvm_read_guest(svm-&gt;vcpu.kvm, offset, &amp;value, 4))</div><div class='add'>+		if (kvm_vcpu_read_guest(&amp;svm-&gt;vcpu, offset, &amp;value, 4))</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='ctx'> 		svm-&gt;nested.msrpm[p] = svm-&gt;msrpm[p] | value;</div><div class='hunk'>@@ -3067,42 +3165,42 @@ static u64 svm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)</div><div class='ctx'> 		svm_scale_tsc(vcpu, host_tsc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)</div><div class='add'>+static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_svm *svm = to_svm(vcpu);</div><div class='ctx'> </div><div class='del'>-	switch (ecx) {</div><div class='add'>+	switch (msr_info-&gt;index) {</div><div class='ctx'> 	case MSR_IA32_TSC: {</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;control.tsc_offset +</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;control.tsc_offset +</div><div class='ctx'> 			svm_scale_tsc(vcpu, native_read_tsc());</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case MSR_STAR:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.star;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.star;</div><div class='ctx'> 		break;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	case MSR_LSTAR:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.lstar;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.lstar;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_CSTAR:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.cstar;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.cstar;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KERNEL_GS_BASE:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.kernel_gs_base;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.kernel_gs_base;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_SYSCALL_MASK:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.sfmask;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.sfmask;</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='ctx'> 	case MSR_IA32_SYSENTER_CS:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.sysenter_cs;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.sysenter_cs;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_SYSENTER_EIP:</div><div class='del'>-		*data = svm-&gt;sysenter_eip;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;sysenter_eip;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_SYSENTER_ESP:</div><div class='del'>-		*data = svm-&gt;sysenter_esp;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;sysenter_esp;</div><div class='ctx'> 		break;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Nobody will change the following 5 values in the VMCB so we can</div><div class='hunk'>@@ -3110,31 +3208,31 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)</div><div class='ctx'> 	 * implemented.</div><div class='ctx'> 	 */</div><div class='ctx'> 	case MSR_IA32_DEBUGCTLMSR:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.dbgctl;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.dbgctl;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_LASTBRANCHFROMIP:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.br_from;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.br_from;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_LASTBRANCHTOIP:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.br_to;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.br_to;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_LASTINTFROMIP:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.last_excp_from;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.last_excp_from;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_LASTINTTOIP:</div><div class='del'>-		*data = svm-&gt;vmcb-&gt;save.last_excp_to;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;vmcb-&gt;save.last_excp_to;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_VM_HSAVE_PA:</div><div class='del'>-		*data = svm-&gt;nested.hsave_msr;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;nested.hsave_msr;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_VM_CR:</div><div class='del'>-		*data = svm-&gt;nested.vm_cr_msr;</div><div class='add'>+		msr_info-&gt;data = svm-&gt;nested.vm_cr_msr;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_UCODE_REV:</div><div class='del'>-		*data = 0x01000065;</div><div class='add'>+		msr_info-&gt;data = 0x01000065;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return kvm_get_msr_common(vcpu, ecx, data);</div><div class='add'>+		return kvm_get_msr_common(vcpu, msr_info);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3142,16 +3240,20 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)</div><div class='ctx'> static int rdmsr_interception(struct vcpu_svm *svm)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ecx = kvm_register_read(&amp;svm-&gt;vcpu, VCPU_REGS_RCX);</div><div class='del'>-	u64 data;</div><div class='add'>+	struct msr_data msr_info;</div><div class='ctx'> </div><div class='del'>-	if (svm_get_msr(&amp;svm-&gt;vcpu, ecx, &amp;data)) {</div><div class='add'>+	msr_info.index = ecx;</div><div class='add'>+	msr_info.host_initiated = false;</div><div class='add'>+	if (svm_get_msr(&amp;svm-&gt;vcpu, &amp;msr_info)) {</div><div class='ctx'> 		trace_kvm_msr_read_ex(ecx);</div><div class='ctx'> 		kvm_inject_gp(&amp;svm-&gt;vcpu, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		trace_kvm_msr_read(ecx, data);</div><div class='add'>+		trace_kvm_msr_read(ecx, msr_info.data);</div><div class='ctx'> </div><div class='del'>-		kvm_register_write(&amp;svm-&gt;vcpu, VCPU_REGS_RAX, data &amp; 0xffffffff);</div><div class='del'>-		kvm_register_write(&amp;svm-&gt;vcpu, VCPU_REGS_RDX, data &gt;&gt; 32);</div><div class='add'>+		kvm_register_write(&amp;svm-&gt;vcpu, VCPU_REGS_RAX,</div><div class='add'>+				   msr_info.data &amp; 0xffffffff);</div><div class='add'>+		kvm_register_write(&amp;svm-&gt;vcpu, VCPU_REGS_RDX,</div><div class='add'>+				   msr_info.data &gt;&gt; 32);</div><div class='ctx'> 		svm-&gt;next_rip = kvm_rip_read(&amp;svm-&gt;vcpu) + 2;</div><div class='ctx'> 		skip_emulated_instruction(&amp;svm-&gt;vcpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3245,6 +3347,16 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)</div><div class='ctx'> 	case MSR_VM_IGNNE:</div><div class='ctx'> 		vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data);</div><div class='ctx'> 		break;</div><div class='add'>+	case MSR_IA32_CR_PAT:</div><div class='add'>+		if (npt_enabled) {</div><div class='add'>+			if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))</div><div class='add'>+				return 1;</div><div class='add'>+			vcpu-&gt;arch.pat = data;</div><div class='add'>+			svm_set_guest_pat(svm, &amp;svm-&gt;vmcb-&gt;save.g_pat);</div><div class='add'>+			mark_dirty(svm-&gt;vmcb, VMCB_NPT);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* fall through */</div><div class='ctx'> 	default:</div><div class='ctx'> 		return kvm_set_msr_common(vcpu, msr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3388,6 +3500,7 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = {</div><div class='ctx'> 	[SVM_EXIT_MWAIT]			= mwait_interception,</div><div class='ctx'> 	[SVM_EXIT_XSETBV]			= xsetbv_interception,</div><div class='ctx'> 	[SVM_EXIT_NPF]				= pf_interception,</div><div class='add'>+	[SVM_EXIT_RSM]                          = emulate_on_interception,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dump_vmcb(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -4073,9 +4186,9 @@ static bool svm_cpu_has_accelerated_tpr(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)</div><div class='add'>+static bool svm_has_high_real_mode_segbase(void)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void svm_cpuid_update(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -4317,7 +4430,9 @@ static int svm_check_intercept(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vmcb-&gt;control.next_rip  = info-&gt;next_rip;</div><div class='add'>+	/* TODO: Advertise NRIPS to guest hypervisor unconditionally */</div><div class='add'>+	if (static_cpu_has(X86_FEATURE_NRIPS))</div><div class='add'>+		vmcb-&gt;control.next_rip  = info-&gt;next_rip;</div><div class='ctx'> 	vmcb-&gt;control.exit_code = icpt_info.exit_code;</div><div class='ctx'> 	vmexit = nested_svm_exit_handled(svm);</div><div class='ctx'> </div><div class='hunk'>@@ -4346,6 +4461,7 @@ static struct kvm_x86_ops svm_x86_ops = {</div><div class='ctx'> 	.hardware_enable = svm_hardware_enable,</div><div class='ctx'> 	.hardware_disable = svm_hardware_disable,</div><div class='ctx'> 	.cpu_has_accelerated_tpr = svm_cpu_has_accelerated_tpr,</div><div class='add'>+	.cpu_has_high_real_mode_segbase = svm_has_high_real_mode_segbase,</div><div class='ctx'> </div><div class='ctx'> 	.vcpu_create = svm_create_vcpu,</div><div class='ctx'> 	.vcpu_free = svm_free_vcpu,</div><div class='hunk'>@@ -4440,6 +4556,8 @@ static struct kvm_x86_ops svm_x86_ops = {</div><div class='ctx'> 	.handle_external_intr = svm_handle_external_intr,</div><div class='ctx'> </div><div class='ctx'> 	.sched_in = svm_sched_in,</div><div class='add'>+</div><div class='add'>+	.pmu_ops = &amp;amd_pmu_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init svm_init(void)</div><div class='head'>diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h<br/>index 7c7bc8bef21f..4eae7c35ddf5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/trace.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/trace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/trace.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/trace.h</a></div><div class='hunk'>@@ -952,6 +952,28 @@ TRACE_EVENT(kvm_wait_lapic_expire,</div><div class='ctx'> 		  __entry-&gt;delta &lt; 0 ? "early" : "late")</div><div class='ctx'> );</div><div class='ctx'> </div><div class='add'>+TRACE_EVENT(kvm_enter_smm,</div><div class='add'>+	TP_PROTO(unsigned int vcpu_id, u64 smbase, bool entering),</div><div class='add'>+	TP_ARGS(vcpu_id, smbase, entering),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(	unsigned int,	vcpu_id		)</div><div class='add'>+		__field(	u64,		smbase		)</div><div class='add'>+		__field(	bool,		entering	)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__entry-&gt;vcpu_id	= vcpu_id;</div><div class='add'>+		__entry-&gt;smbase		= smbase;</div><div class='add'>+		__entry-&gt;entering	= entering;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("vcpu %u: %s SMM, smbase 0x%llx",</div><div class='add'>+		  __entry-&gt;vcpu_id,</div><div class='add'>+		  __entry-&gt;entering ? "entering" : "leaving",</div><div class='add'>+		  __entry-&gt;smbase)</div><div class='add'>+);</div><div class='add'>+</div><div class='ctx'> #endif /* _TRACE_KVM_H */</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_INCLUDE_PATH</div><div class='head'>diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c<br/>index 2d73807f0d31..5b4e9384717a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/vmx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/vmx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/vmx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/vmx.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='del'>-#include &lt;linux/ftrace_event.h&gt;</div><div class='add'>+#include &lt;linux/trace_events.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/tboot.h&gt;</div><div class='ctx'> #include &lt;linux/hrtimer.h&gt;</div><div class='hunk'>@@ -40,14 +40,14 @@</div><div class='ctx'> #include &lt;asm/vmx.h&gt;</div><div class='ctx'> #include &lt;asm/virtext.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "trace.h"</div><div class='add'>+#include "pmu.h"</div><div class='ctx'> </div><div class='ctx'> #define __ex(x) __kvm_handle_fault_on_reboot(x)</div><div class='ctx'> #define __ex_clear(x, reg) \</div><div class='hunk'>@@ -786,7 +786,7 @@ static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static struct page *nested_get_page(struct kvm_vcpu *vcpu, gpa_t addr)</div><div class='ctx'> {</div><div class='del'>-	struct page *page = gfn_to_page(vcpu-&gt;kvm, addr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	struct page *page = kvm_vcpu_gfn_to_page(vcpu, addr &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	if (is_error_page(page))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -1883,7 +1883,7 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx)</div><div class='ctx'> 	 * If the FPU is not active (through the host task or</div><div class='ctx'> 	 * the guest vcpu), then restore the cr0.TS bit.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!user_has_fpu() &amp;&amp; !vmx-&gt;vcpu.guest_fpu_loaded)</div><div class='add'>+	if (!fpregs_active() &amp;&amp; !vmx-&gt;vcpu.guest_fpu_loaded)</div><div class='ctx'> 		stts();</div><div class='ctx'> 	load_gdt(this_cpu_ptr(&amp;host_gdt));</div><div class='ctx'> }</div><div class='hunk'>@@ -2170,8 +2170,7 @@ static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	if (is_guest_mode(vcpu))</div><div class='ctx'> 		msr_bitmap = vmx_msr_bitmap_nested;</div><div class='del'>-	else if (irqchip_in_kernel(vcpu-&gt;kvm) &amp;&amp;</div><div class='del'>-		apic_x2apic_mode(vcpu-&gt;arch.apic)) {</div><div class='add'>+	else if (vcpu-&gt;arch.apic_base &amp; X2APIC_ENABLE) {</div><div class='ctx'> 		if (is_long_mode(vcpu))</div><div class='ctx'> 			msr_bitmap = vmx_msr_bitmap_longmode_x2apic;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -2623,76 +2622,69 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)</div><div class='ctx'>  * Returns 0 on success, non-0 otherwise.</div><div class='ctx'>  * Assumes vcpu_load() was already called.</div><div class='ctx'>  */</div><div class='del'>-static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)</div><div class='add'>+static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> {</div><div class='del'>-	u64 data;</div><div class='ctx'> 	struct shared_msr_entry *msr;</div><div class='ctx'> </div><div class='del'>-	if (!pdata) {</div><div class='del'>-		printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (msr_index) {</div><div class='add'>+	switch (msr_info-&gt;index) {</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	case MSR_FS_BASE:</div><div class='del'>-		data = vmcs_readl(GUEST_FS_BASE);</div><div class='add'>+		msr_info-&gt;data = vmcs_readl(GUEST_FS_BASE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_GS_BASE:</div><div class='del'>-		data = vmcs_readl(GUEST_GS_BASE);</div><div class='add'>+		msr_info-&gt;data = vmcs_readl(GUEST_GS_BASE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KERNEL_GS_BASE:</div><div class='ctx'> 		vmx_load_host_state(to_vmx(vcpu));</div><div class='del'>-		data = to_vmx(vcpu)-&gt;msr_guest_kernel_gs_base;</div><div class='add'>+		msr_info-&gt;data = to_vmx(vcpu)-&gt;msr_guest_kernel_gs_base;</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='ctx'> 	case MSR_EFER:</div><div class='del'>-		return kvm_get_msr_common(vcpu, msr_index, pdata);</div><div class='add'>+		return kvm_get_msr_common(vcpu, msr_info);</div><div class='ctx'> 	case MSR_IA32_TSC:</div><div class='del'>-		data = guest_read_tsc();</div><div class='add'>+		msr_info-&gt;data = guest_read_tsc();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_SYSENTER_CS:</div><div class='del'>-		data = vmcs_read32(GUEST_SYSENTER_CS);</div><div class='add'>+		msr_info-&gt;data = vmcs_read32(GUEST_SYSENTER_CS);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_SYSENTER_EIP:</div><div class='del'>-		data = vmcs_readl(GUEST_SYSENTER_EIP);</div><div class='add'>+		msr_info-&gt;data = vmcs_readl(GUEST_SYSENTER_EIP);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_SYSENTER_ESP:</div><div class='del'>-		data = vmcs_readl(GUEST_SYSENTER_ESP);</div><div class='add'>+		msr_info-&gt;data = vmcs_readl(GUEST_SYSENTER_ESP);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_BNDCFGS:</div><div class='ctx'> 		if (!vmx_mpx_supported())</div><div class='ctx'> 			return 1;</div><div class='del'>-		data = vmcs_read64(GUEST_BNDCFGS);</div><div class='add'>+		msr_info-&gt;data = vmcs_read64(GUEST_BNDCFGS);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_FEATURE_CONTROL:</div><div class='ctx'> 		if (!nested_vmx_allowed(vcpu))</div><div class='ctx'> 			return 1;</div><div class='del'>-		data = to_vmx(vcpu)-&gt;nested.msr_ia32_feature_control;</div><div class='add'>+		msr_info-&gt;data = to_vmx(vcpu)-&gt;nested.msr_ia32_feature_control;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:</div><div class='ctx'> 		if (!nested_vmx_allowed(vcpu))</div><div class='ctx'> 			return 1;</div><div class='del'>-		return vmx_get_vmx_msr(vcpu, msr_index, pdata);</div><div class='add'>+		return vmx_get_vmx_msr(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 	case MSR_IA32_XSS:</div><div class='ctx'> 		if (!vmx_xsaves_supported())</div><div class='ctx'> 			return 1;</div><div class='del'>-		data = vcpu-&gt;arch.ia32_xss;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.ia32_xss;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_TSC_AUX:</div><div class='ctx'> 		if (!to_vmx(vcpu)-&gt;rdtscp_enabled)</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		/* Otherwise falls through */</div><div class='ctx'> 	default:</div><div class='del'>-		msr = find_msr_entry(to_vmx(vcpu), msr_index);</div><div class='add'>+		msr = find_msr_entry(to_vmx(vcpu), msr_info-&gt;index);</div><div class='ctx'> 		if (msr) {</div><div class='del'>-			data = msr-&gt;data;</div><div class='add'>+			msr_info-&gt;data = msr-&gt;data;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		return kvm_get_msr_common(vcpu, msr_index, pdata);</div><div class='add'>+		return kvm_get_msr_common(vcpu, msr_info);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*pdata = data;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4123,7 +4115,7 @@ static int alloc_apic_access_page(struct kvm *kvm)</div><div class='ctx'> 	kvm_userspace_mem.flags = 0;</div><div class='ctx'> 	kvm_userspace_mem.guest_phys_addr = APIC_DEFAULT_PHYS_BASE;</div><div class='ctx'> 	kvm_userspace_mem.memory_size = PAGE_SIZE;</div><div class='del'>-	r = __kvm_set_memory_region(kvm, &amp;kvm_userspace_mem);</div><div class='add'>+	r = __x86_set_memory_region(kvm, &amp;kvm_userspace_mem);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -4158,7 +4150,7 @@ static int alloc_identity_pagetable(struct kvm *kvm)</div><div class='ctx'> 	kvm_userspace_mem.guest_phys_addr =</div><div class='ctx'> 		kvm-&gt;arch.ept_identity_map_addr;</div><div class='ctx'> 	kvm_userspace_mem.memory_size = PAGE_SIZE;</div><div class='del'>-	r = __kvm_set_memory_region(kvm, &amp;kvm_userspace_mem);</div><div class='add'>+	r = __x86_set_memory_region(kvm, &amp;kvm_userspace_mem);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -4667,16 +4659,8 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)</div><div class='ctx'> 	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);</div><div class='ctx'> 	vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx-&gt;msr_autoload.guest));</div><div class='ctx'> </div><div class='del'>-	if (vmcs_config.vmentry_ctrl &amp; VM_ENTRY_LOAD_IA32_PAT) {</div><div class='del'>-		u32 msr_low, msr_high;</div><div class='del'>-		u64 host_pat;</div><div class='del'>-		rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);</div><div class='del'>-		host_pat = msr_low | ((u64) msr_high &lt;&lt; 32);</div><div class='del'>-		/* Write the default value follow host pat */</div><div class='del'>-		vmcs_write64(GUEST_IA32_PAT, host_pat);</div><div class='del'>-		/* Keep arch.pat sync with GUEST_IA32_PAT */</div><div class='del'>-		vmx-&gt;vcpu.arch.pat = host_pat;</div><div class='del'>-	}</div><div class='add'>+	if (vmcs_config.vmentry_ctrl &amp; VM_ENTRY_LOAD_IA32_PAT)</div><div class='add'>+		vmcs_write64(GUEST_IA32_PAT, vmx-&gt;vcpu.arch.pat);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(vmx_msr_index); ++i) {</div><div class='ctx'> 		u32 index = vmx_msr_index[i];</div><div class='hunk'>@@ -4708,22 +4692,27 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='ctx'> 	struct msr_data apic_base_msr;</div><div class='add'>+	u64 cr0;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;rmode.vm86_active = 0;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;soft_vnmi_blocked = 0;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();</div><div class='del'>-	kvm_set_cr8(&amp;vmx-&gt;vcpu, 0);</div><div class='del'>-	apic_base_msr.data = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE;</div><div class='del'>-	if (kvm_vcpu_is_reset_bsp(&amp;vmx-&gt;vcpu))</div><div class='del'>-		apic_base_msr.data |= MSR_IA32_APICBASE_BSP;</div><div class='del'>-	apic_base_msr.host_initiated = true;</div><div class='del'>-	kvm_set_apic_base(&amp;vmx-&gt;vcpu, &amp;apic_base_msr);</div><div class='add'>+	kvm_set_cr8(vcpu, 0);</div><div class='add'>+</div><div class='add'>+	if (!init_event) {</div><div class='add'>+		apic_base_msr.data = APIC_DEFAULT_PHYS_BASE |</div><div class='add'>+				     MSR_IA32_APICBASE_ENABLE;</div><div class='add'>+		if (kvm_vcpu_is_reset_bsp(vcpu))</div><div class='add'>+			apic_base_msr.data |= MSR_IA32_APICBASE_BSP;</div><div class='add'>+		apic_base_msr.host_initiated = true;</div><div class='add'>+		kvm_set_apic_base(vcpu, &amp;apic_base_msr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vmx_segment_cache_clear(vmx);</div><div class='ctx'> </div><div class='hunk'>@@ -4747,9 +4736,12 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);</div><div class='ctx'> 	vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);</div><div class='ctx'> </div><div class='del'>-	vmcs_write32(GUEST_SYSENTER_CS, 0);</div><div class='del'>-	vmcs_writel(GUEST_SYSENTER_ESP, 0);</div><div class='del'>-	vmcs_writel(GUEST_SYSENTER_EIP, 0);</div><div class='add'>+	if (!init_event) {</div><div class='add'>+		vmcs_write32(GUEST_SYSENTER_CS, 0);</div><div class='add'>+		vmcs_writel(GUEST_SYSENTER_ESP, 0);</div><div class='add'>+		vmcs_writel(GUEST_SYSENTER_EIP, 0);</div><div class='add'>+		vmcs_write64(GUEST_IA32_DEBUGCTL, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vmcs_writel(GUEST_RFLAGS, 0x02);</div><div class='ctx'> 	kvm_rip_write(vcpu, 0xfff0);</div><div class='hunk'>@@ -4764,18 +4756,15 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);</div><div class='ctx'> 	vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);</div><div class='ctx'> </div><div class='del'>-	/* Special registers */</div><div class='del'>-	vmcs_write64(GUEST_IA32_DEBUGCTL, 0);</div><div class='del'>-</div><div class='ctx'> 	setup_msrs(vmx);</div><div class='ctx'> </div><div class='ctx'> 	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */</div><div class='ctx'> </div><div class='del'>-	if (cpu_has_vmx_tpr_shadow()) {</div><div class='add'>+	if (cpu_has_vmx_tpr_shadow() &amp;&amp; !init_event) {</div><div class='ctx'> 		vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);</div><div class='del'>-		if (vm_need_tpr_shadow(vmx-&gt;vcpu.kvm))</div><div class='add'>+		if (vm_need_tpr_shadow(vcpu-&gt;kvm))</div><div class='ctx'> 			vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,</div><div class='del'>-				     __pa(vmx-&gt;vcpu.arch.apic-&gt;regs));</div><div class='add'>+				     __pa(vcpu-&gt;arch.apic-&gt;regs));</div><div class='ctx'> 		vmcs_write32(TPR_THRESHOLD, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4787,12 +4776,14 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vmx-&gt;vpid != 0)</div><div class='ctx'> 		vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx-&gt;vpid);</div><div class='ctx'> </div><div class='del'>-	vmx-&gt;vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;</div><div class='del'>-	vmx_set_cr0(&amp;vmx-&gt;vcpu, kvm_read_cr0(vcpu)); /* enter rmode */</div><div class='del'>-	vmx_set_cr4(&amp;vmx-&gt;vcpu, 0);</div><div class='del'>-	vmx_set_efer(&amp;vmx-&gt;vcpu, 0);</div><div class='del'>-	vmx_fpu_activate(&amp;vmx-&gt;vcpu);</div><div class='del'>-	update_exception_bitmap(&amp;vmx-&gt;vcpu);</div><div class='add'>+	cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;</div><div class='add'>+	vmx_set_cr0(vcpu, cr0); /* enter rmode */</div><div class='add'>+	vmx-&gt;vcpu.arch.cr0 = cr0;</div><div class='add'>+	vmx_set_cr4(vcpu, 0);</div><div class='add'>+	if (!init_event)</div><div class='add'>+		vmx_set_efer(vcpu, 0);</div><div class='add'>+	vmx_fpu_activate(vcpu);</div><div class='add'>+	update_exception_bitmap(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	vpid_sync_context(vmx);</div><div class='ctx'> }</div><div class='hunk'>@@ -4965,7 +4956,7 @@ static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)</div><div class='ctx'> 		.flags = 0,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ret = kvm_set_memory_region(kvm, &amp;tss_mem);</div><div class='add'>+	ret = x86_set_memory_region(kvm, &amp;tss_mem);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	kvm-&gt;arch.tss_addr = addr;</div><div class='hunk'>@@ -5475,19 +5466,21 @@ static int handle_cpuid(struct kvm_vcpu *vcpu)</div><div class='ctx'> static int handle_rdmsr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ecx = vcpu-&gt;arch.regs[VCPU_REGS_RCX];</div><div class='del'>-	u64 data;</div><div class='add'>+	struct msr_data msr_info;</div><div class='ctx'> </div><div class='del'>-	if (vmx_get_msr(vcpu, ecx, &amp;data)) {</div><div class='add'>+	msr_info.index = ecx;</div><div class='add'>+	msr_info.host_initiated = false;</div><div class='add'>+	if (vmx_get_msr(vcpu, &amp;msr_info)) {</div><div class='ctx'> 		trace_kvm_msr_read_ex(ecx);</div><div class='ctx'> 		kvm_inject_gp(vcpu, 0);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	trace_kvm_msr_read(ecx, data);</div><div class='add'>+	trace_kvm_msr_read(ecx, msr_info.data);</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: handling of bits 32:63 of rax, rdx */</div><div class='del'>-	vcpu-&gt;arch.regs[VCPU_REGS_RAX] = data &amp; -1u;</div><div class='del'>-	vcpu-&gt;arch.regs[VCPU_REGS_RDX] = (data &gt;&gt; 32) &amp; -1u;</div><div class='add'>+	vcpu-&gt;arch.regs[VCPU_REGS_RAX] = msr_info.data &amp; -1u;</div><div class='add'>+	vcpu-&gt;arch.regs[VCPU_REGS_RDX] = (msr_info.data &gt;&gt; 32) &amp; -1u;</div><div class='ctx'> 	skip_emulated_instruction(vcpu);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -5710,9 +5703,6 @@ static int handle_task_switch(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* clear all local breakpoint enable flags */</div><div class='del'>-	vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) &amp; ~0x155);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO: What about debug traps on tss switch?</div><div class='ctx'> 	 *       Are we supposed to inject them and update dr6?</div><div class='hunk'>@@ -7333,7 +7323,7 @@ static bool nested_vmx_exit_handled_io(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		bitmap += (port &amp; 0x7fff) / 8;</div><div class='ctx'> </div><div class='ctx'> 		if (last_bitmap != bitmap)</div><div class='del'>-			if (kvm_read_guest(vcpu-&gt;kvm, bitmap, &amp;b, 1))</div><div class='add'>+			if (kvm_vcpu_read_guest(vcpu, bitmap, &amp;b, 1))</div><div class='ctx'> 				return true;</div><div class='ctx'> 		if (b &amp; (1 &lt;&lt; (port &amp; 7)))</div><div class='ctx'> 			return true;</div><div class='hunk'>@@ -7377,7 +7367,7 @@ static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	/* Then read the msr_index'th bit from this bitmap: */</div><div class='ctx'> 	if (msr_index &lt; 1024*8) {</div><div class='ctx'> 		unsigned char b;</div><div class='del'>-		if (kvm_read_guest(vcpu-&gt;kvm, bitmap + msr_index/8, &amp;b, 1))</div><div class='add'>+		if (kvm_vcpu_read_guest(vcpu, bitmap + msr_index/8, &amp;b, 1))</div><div class='ctx'> 			return true;</div><div class='ctx'> 		return 1 &amp; (b &gt;&gt; (msr_index &amp; 7));</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -7642,9 +7632,9 @@ static void vmx_disable_pml(struct vcpu_vmx *vmx)</div><div class='ctx'> 	vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vmx_flush_pml_buffer(struct vcpu_vmx *vmx)</div><div class='add'>+static void vmx_flush_pml_buffer(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct kvm *kvm = vmx-&gt;vcpu.kvm;</div><div class='add'>+	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='ctx'> 	u64 *pml_buf;</div><div class='ctx'> 	u16 pml_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -7666,7 +7656,7 @@ static void vmx_flush_pml_buffer(struct vcpu_vmx *vmx)</div><div class='ctx'> </div><div class='ctx'> 		gpa = pml_buf[pml_idx];</div><div class='ctx'> 		WARN_ON(gpa &amp; (PAGE_SIZE - 1));</div><div class='del'>-		mark_page_dirty(kvm, gpa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		kvm_vcpu_mark_page_dirty(vcpu, gpa &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* reset PML index */</div><div class='hunk'>@@ -7691,6 +7681,158 @@ static void kvm_flush_pml_buffers(struct kvm *kvm)</div><div class='ctx'> 		kvm_vcpu_kick(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void vmx_dump_sel(char *name, uint32_t sel)</div><div class='add'>+{</div><div class='add'>+	pr_err("%s sel=0x%04x, attr=0x%05x, limit=0x%08x, base=0x%016lx\n",</div><div class='add'>+	       name, vmcs_read32(sel),</div><div class='add'>+	       vmcs_read32(sel + GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR),</div><div class='add'>+	       vmcs_read32(sel + GUEST_ES_LIMIT - GUEST_ES_SELECTOR),</div><div class='add'>+	       vmcs_readl(sel + GUEST_ES_BASE - GUEST_ES_SELECTOR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vmx_dump_dtsel(char *name, uint32_t limit)</div><div class='add'>+{</div><div class='add'>+	pr_err("%s                           limit=0x%08x, base=0x%016lx\n",</div><div class='add'>+	       name, vmcs_read32(limit),</div><div class='add'>+	       vmcs_readl(limit + GUEST_GDTR_BASE - GUEST_GDTR_LIMIT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dump_vmcs(void)</div><div class='add'>+{</div><div class='add'>+	u32 vmentry_ctl = vmcs_read32(VM_ENTRY_CONTROLS);</div><div class='add'>+	u32 vmexit_ctl = vmcs_read32(VM_EXIT_CONTROLS);</div><div class='add'>+	u32 cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);</div><div class='add'>+	u32 pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL);</div><div class='add'>+	u32 secondary_exec_control = 0;</div><div class='add'>+	unsigned long cr4 = vmcs_readl(GUEST_CR4);</div><div class='add'>+	u64 efer = vmcs_readl(GUEST_IA32_EFER);</div><div class='add'>+	int i, n;</div><div class='add'>+</div><div class='add'>+	if (cpu_has_secondary_exec_ctrls())</div><div class='add'>+		secondary_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);</div><div class='add'>+</div><div class='add'>+	pr_err("*** Guest State ***\n");</div><div class='add'>+	pr_err("CR0: actual=0x%016lx, shadow=0x%016lx, gh_mask=%016lx\n",</div><div class='add'>+	       vmcs_readl(GUEST_CR0), vmcs_readl(CR0_READ_SHADOW),</div><div class='add'>+	       vmcs_readl(CR0_GUEST_HOST_MASK));</div><div class='add'>+	pr_err("CR4: actual=0x%016lx, shadow=0x%016lx, gh_mask=%016lx\n",</div><div class='add'>+	       cr4, vmcs_readl(CR4_READ_SHADOW), vmcs_readl(CR4_GUEST_HOST_MASK));</div><div class='add'>+	pr_err("CR3 = 0x%016lx\n", vmcs_readl(GUEST_CR3));</div><div class='add'>+	if ((secondary_exec_control &amp; SECONDARY_EXEC_ENABLE_EPT) &amp;&amp;</div><div class='add'>+	    (cr4 &amp; X86_CR4_PAE) &amp;&amp; !(efer &amp; EFER_LMA))</div><div class='add'>+	{</div><div class='add'>+		pr_err("PDPTR0 = 0x%016lx  PDPTR1 = 0x%016lx\n",</div><div class='add'>+		       vmcs_readl(GUEST_PDPTR0), vmcs_readl(GUEST_PDPTR1));</div><div class='add'>+		pr_err("PDPTR2 = 0x%016lx  PDPTR3 = 0x%016lx\n",</div><div class='add'>+		       vmcs_readl(GUEST_PDPTR2), vmcs_readl(GUEST_PDPTR3));</div><div class='add'>+	}</div><div class='add'>+	pr_err("RSP = 0x%016lx  RIP = 0x%016lx\n",</div><div class='add'>+	       vmcs_readl(GUEST_RSP), vmcs_readl(GUEST_RIP));</div><div class='add'>+	pr_err("RFLAGS=0x%08lx         DR7 = 0x%016lx\n",</div><div class='add'>+	       vmcs_readl(GUEST_RFLAGS), vmcs_readl(GUEST_DR7));</div><div class='add'>+	pr_err("Sysenter RSP=%016lx CS:RIP=%04x:%016lx\n",</div><div class='add'>+	       vmcs_readl(GUEST_SYSENTER_ESP),</div><div class='add'>+	       vmcs_read32(GUEST_SYSENTER_CS), vmcs_readl(GUEST_SYSENTER_EIP));</div><div class='add'>+	vmx_dump_sel("CS:  ", GUEST_CS_SELECTOR);</div><div class='add'>+	vmx_dump_sel("DS:  ", GUEST_DS_SELECTOR);</div><div class='add'>+	vmx_dump_sel("SS:  ", GUEST_SS_SELECTOR);</div><div class='add'>+	vmx_dump_sel("ES:  ", GUEST_ES_SELECTOR);</div><div class='add'>+	vmx_dump_sel("FS:  ", GUEST_FS_SELECTOR);</div><div class='add'>+	vmx_dump_sel("GS:  ", GUEST_GS_SELECTOR);</div><div class='add'>+	vmx_dump_dtsel("GDTR:", GUEST_GDTR_LIMIT);</div><div class='add'>+	vmx_dump_sel("LDTR:", GUEST_LDTR_SELECTOR);</div><div class='add'>+	vmx_dump_dtsel("IDTR:", GUEST_IDTR_LIMIT);</div><div class='add'>+	vmx_dump_sel("TR:  ", GUEST_TR_SELECTOR);</div><div class='add'>+	if ((vmexit_ctl &amp; (VM_EXIT_SAVE_IA32_PAT | VM_EXIT_SAVE_IA32_EFER)) ||</div><div class='add'>+	    (vmentry_ctl &amp; (VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_IA32_EFER)))</div><div class='add'>+		pr_err("EFER =     0x%016llx  PAT = 0x%016lx\n",</div><div class='add'>+		       efer, vmcs_readl(GUEST_IA32_PAT));</div><div class='add'>+	pr_err("DebugCtl = 0x%016lx  DebugExceptions = 0x%016lx\n",</div><div class='add'>+	       vmcs_readl(GUEST_IA32_DEBUGCTL),</div><div class='add'>+	       vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS));</div><div class='add'>+	if (vmentry_ctl &amp; VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)</div><div class='add'>+		pr_err("PerfGlobCtl = 0x%016lx\n",</div><div class='add'>+		       vmcs_readl(GUEST_IA32_PERF_GLOBAL_CTRL));</div><div class='add'>+	if (vmentry_ctl &amp; VM_ENTRY_LOAD_BNDCFGS)</div><div class='add'>+		pr_err("BndCfgS = 0x%016lx\n", vmcs_readl(GUEST_BNDCFGS));</div><div class='add'>+	pr_err("Interruptibility = %08x  ActivityState = %08x\n",</div><div class='add'>+	       vmcs_read32(GUEST_INTERRUPTIBILITY_INFO),</div><div class='add'>+	       vmcs_read32(GUEST_ACTIVITY_STATE));</div><div class='add'>+	if (secondary_exec_control &amp; SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)</div><div class='add'>+		pr_err("InterruptStatus = %04x\n",</div><div class='add'>+		       vmcs_read16(GUEST_INTR_STATUS));</div><div class='add'>+</div><div class='add'>+	pr_err("*** Host State ***\n");</div><div class='add'>+	pr_err("RIP = 0x%016lx  RSP = 0x%016lx\n",</div><div class='add'>+	       vmcs_readl(HOST_RIP), vmcs_readl(HOST_RSP));</div><div class='add'>+	pr_err("CS=%04x SS=%04x DS=%04x ES=%04x FS=%04x GS=%04x TR=%04x\n",</div><div class='add'>+	       vmcs_read16(HOST_CS_SELECTOR), vmcs_read16(HOST_SS_SELECTOR),</div><div class='add'>+	       vmcs_read16(HOST_DS_SELECTOR), vmcs_read16(HOST_ES_SELECTOR),</div><div class='add'>+	       vmcs_read16(HOST_FS_SELECTOR), vmcs_read16(HOST_GS_SELECTOR),</div><div class='add'>+	       vmcs_read16(HOST_TR_SELECTOR));</div><div class='add'>+	pr_err("FSBase=%016lx GSBase=%016lx TRBase=%016lx\n",</div><div class='add'>+	       vmcs_readl(HOST_FS_BASE), vmcs_readl(HOST_GS_BASE),</div><div class='add'>+	       vmcs_readl(HOST_TR_BASE));</div><div class='add'>+	pr_err("GDTBase=%016lx IDTBase=%016lx\n",</div><div class='add'>+	       vmcs_readl(HOST_GDTR_BASE), vmcs_readl(HOST_IDTR_BASE));</div><div class='add'>+	pr_err("CR0=%016lx CR3=%016lx CR4=%016lx\n",</div><div class='add'>+	       vmcs_readl(HOST_CR0), vmcs_readl(HOST_CR3),</div><div class='add'>+	       vmcs_readl(HOST_CR4));</div><div class='add'>+	pr_err("Sysenter RSP=%016lx CS:RIP=%04x:%016lx\n",</div><div class='add'>+	       vmcs_readl(HOST_IA32_SYSENTER_ESP),</div><div class='add'>+	       vmcs_read32(HOST_IA32_SYSENTER_CS),</div><div class='add'>+	       vmcs_readl(HOST_IA32_SYSENTER_EIP));</div><div class='add'>+	if (vmexit_ctl &amp; (VM_EXIT_LOAD_IA32_PAT | VM_EXIT_LOAD_IA32_EFER))</div><div class='add'>+		pr_err("EFER = 0x%016lx  PAT = 0x%016lx\n",</div><div class='add'>+		       vmcs_readl(HOST_IA32_EFER), vmcs_readl(HOST_IA32_PAT));</div><div class='add'>+	if (vmexit_ctl &amp; VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)</div><div class='add'>+		pr_err("PerfGlobCtl = 0x%016lx\n",</div><div class='add'>+		       vmcs_readl(HOST_IA32_PERF_GLOBAL_CTRL));</div><div class='add'>+</div><div class='add'>+	pr_err("*** Control State ***\n");</div><div class='add'>+	pr_err("PinBased=%08x CPUBased=%08x SecondaryExec=%08x\n",</div><div class='add'>+	       pin_based_exec_ctrl, cpu_based_exec_ctrl, secondary_exec_control);</div><div class='add'>+	pr_err("EntryControls=%08x ExitControls=%08x\n", vmentry_ctl, vmexit_ctl);</div><div class='add'>+	pr_err("ExceptionBitmap=%08x PFECmask=%08x PFECmatch=%08x\n",</div><div class='add'>+	       vmcs_read32(EXCEPTION_BITMAP),</div><div class='add'>+	       vmcs_read32(PAGE_FAULT_ERROR_CODE_MASK),</div><div class='add'>+	       vmcs_read32(PAGE_FAULT_ERROR_CODE_MATCH));</div><div class='add'>+	pr_err("VMEntry: intr_info=%08x errcode=%08x ilen=%08x\n",</div><div class='add'>+	       vmcs_read32(VM_ENTRY_INTR_INFO_FIELD),</div><div class='add'>+	       vmcs_read32(VM_ENTRY_EXCEPTION_ERROR_CODE),</div><div class='add'>+	       vmcs_read32(VM_ENTRY_INSTRUCTION_LEN));</div><div class='add'>+	pr_err("VMExit: intr_info=%08x errcode=%08x ilen=%08x\n",</div><div class='add'>+	       vmcs_read32(VM_EXIT_INTR_INFO),</div><div class='add'>+	       vmcs_read32(VM_EXIT_INTR_ERROR_CODE),</div><div class='add'>+	       vmcs_read32(VM_EXIT_INSTRUCTION_LEN));</div><div class='add'>+	pr_err("        reason=%08x qualification=%016lx\n",</div><div class='add'>+	       vmcs_read32(VM_EXIT_REASON), vmcs_readl(EXIT_QUALIFICATION));</div><div class='add'>+	pr_err("IDTVectoring: info=%08x errcode=%08x\n",</div><div class='add'>+	       vmcs_read32(IDT_VECTORING_INFO_FIELD),</div><div class='add'>+	       vmcs_read32(IDT_VECTORING_ERROR_CODE));</div><div class='add'>+	pr_err("TSC Offset = 0x%016lx\n", vmcs_readl(TSC_OFFSET));</div><div class='add'>+	if (cpu_based_exec_ctrl &amp; CPU_BASED_TPR_SHADOW)</div><div class='add'>+		pr_err("TPR Threshold = 0x%02x\n", vmcs_read32(TPR_THRESHOLD));</div><div class='add'>+	if (pin_based_exec_ctrl &amp; PIN_BASED_POSTED_INTR)</div><div class='add'>+		pr_err("PostedIntrVec = 0x%02x\n", vmcs_read16(POSTED_INTR_NV));</div><div class='add'>+	if ((secondary_exec_control &amp; SECONDARY_EXEC_ENABLE_EPT))</div><div class='add'>+		pr_err("EPT pointer = 0x%016lx\n", vmcs_readl(EPT_POINTER));</div><div class='add'>+	n = vmcs_read32(CR3_TARGET_COUNT);</div><div class='add'>+	for (i = 0; i + 1 &lt; n; i += 4)</div><div class='add'>+		pr_err("CR3 target%u=%016lx target%u=%016lx\n",</div><div class='add'>+		       i, vmcs_readl(CR3_TARGET_VALUE0 + i * 2),</div><div class='add'>+		       i + 1, vmcs_readl(CR3_TARGET_VALUE0 + i * 2 + 2));</div><div class='add'>+	if (i &lt; n)</div><div class='add'>+		pr_err("CR3 target%u=%016lx\n",</div><div class='add'>+		       i, vmcs_readl(CR3_TARGET_VALUE0 + i * 2));</div><div class='add'>+	if (secondary_exec_control &amp; SECONDARY_EXEC_PAUSE_LOOP_EXITING)</div><div class='add'>+		pr_err("PLE Gap=%08x Window=%08x\n",</div><div class='add'>+		       vmcs_read32(PLE_GAP), vmcs_read32(PLE_WINDOW));</div><div class='add'>+	if (secondary_exec_control &amp; SECONDARY_EXEC_ENABLE_VPID)</div><div class='add'>+		pr_err("Virtual processor ID = 0x%04x\n",</div><div class='add'>+		       vmcs_read16(VIRTUAL_PROCESSOR_ID));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The guest has exited.  See if we can fix it or if we need userspace</div><div class='ctx'>  * assistance.</div><div class='hunk'>@@ -7709,7 +7851,7 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * flushed already.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (enable_pml)</div><div class='del'>-		vmx_flush_pml_buffer(vmx);</div><div class='add'>+		vmx_flush_pml_buffer(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/* If guest state is invalid, start emulating */</div><div class='ctx'> 	if (vmx-&gt;emulation_required)</div><div class='hunk'>@@ -7723,6 +7865,7 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (exit_reason &amp; VMX_EXIT_REASONS_FAILED_VMENTRY) {</div><div class='add'>+		dump_vmcs();</div><div class='ctx'> 		vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_FAIL_ENTRY;</div><div class='ctx'> 		vcpu-&gt;run-&gt;fail_entry.hardware_entry_failure_reason</div><div class='ctx'> 			= exit_reason;</div><div class='hunk'>@@ -7996,6 +8139,11 @@ static void vmx_handle_external_intr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool vmx_has_high_real_mode_segbase(void)</div><div class='add'>+{</div><div class='add'>+	return enable_unrestricted_guest || emulate_invalid_guest_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool vmx_mpx_supported(void)</div><div class='ctx'> {</div><div class='ctx'> 	return (vmcs_config.vmexit_ctrl &amp; VM_EXIT_CLEAR_BNDCFGS) &amp;&amp;</div><div class='hunk'>@@ -8480,29 +8628,36 @@ static int get_ept_level(void)</div><div class='ctx'> </div><div class='ctx'> static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)</div><div class='ctx'> {</div><div class='del'>-	u64 ret;</div><div class='add'>+	u8 cache;</div><div class='add'>+	u64 ipat = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* For VT-d and EPT combination</div><div class='del'>-	 * 1. MMIO: always map as UC</div><div class='add'>+	 * 1. MMIO: guest may want to apply WC, trust it.</div><div class='ctx'> 	 * 2. EPT with VT-d:</div><div class='ctx'> 	 *   a. VT-d without snooping control feature: can't guarantee the</div><div class='del'>-	 *	result, try to trust guest.</div><div class='add'>+	 *	result, try to trust guest.  So the same as item 1.</div><div class='ctx'> 	 *   b. VT-d with snooping control feature: snooping control feature of</div><div class='ctx'> 	 *	VT-d engine can guarantee the cache correctness. Just set it</div><div class='ctx'> 	 *	to WB to keep consistent with host. So the same as item 3.</div><div class='ctx'> 	 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep</div><div class='ctx'> 	 *    consistent with host MTRR</div><div class='ctx'> 	 */</div><div class='del'>-	if (is_mmio)</div><div class='del'>-		ret = MTRR_TYPE_UNCACHABLE &lt;&lt; VMX_EPT_MT_EPTE_SHIFT;</div><div class='del'>-	else if (kvm_arch_has_noncoherent_dma(vcpu-&gt;kvm))</div><div class='del'>-		ret = kvm_get_guest_memory_type(vcpu, gfn) &lt;&lt;</div><div class='del'>-		      VMX_EPT_MT_EPTE_SHIFT;</div><div class='del'>-	else</div><div class='del'>-		ret = (MTRR_TYPE_WRBACK &lt;&lt; VMX_EPT_MT_EPTE_SHIFT)</div><div class='del'>-			| VMX_EPT_IPAT_BIT;</div><div class='add'>+	if (!is_mmio &amp;&amp; !kvm_arch_has_noncoherent_dma(vcpu-&gt;kvm)) {</div><div class='add'>+		ipat = VMX_EPT_IPAT_BIT;</div><div class='add'>+		cache = MTRR_TYPE_WRBACK;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	if (kvm_read_cr0(vcpu) &amp; X86_CR0_CD) {</div><div class='add'>+		ipat = VMX_EPT_IPAT_BIT;</div><div class='add'>+		cache = MTRR_TYPE_UNCACHABLE;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cache = kvm_mtrr_get_guest_memory_type(vcpu, gfn);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	return (cache &lt;&lt; VMX_EPT_MT_EPTE_SHIFT) | ipat;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vmx_get_lpage_level(void)</div><div class='hunk'>@@ -8924,7 +9079,7 @@ static int nested_vmx_msr_check_common(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				       struct vmx_msr_entry *e)</div><div class='ctx'> {</div><div class='ctx'> 	/* x2APIC MSR accesses are not allowed */</div><div class='del'>-	if (apic_x2apic_mode(vcpu-&gt;arch.apic) &amp;&amp; e-&gt;index &gt;&gt; 8 == 0x8)</div><div class='add'>+	if (vcpu-&gt;arch.apic_base &amp; X2APIC_ENABLE &amp;&amp; e-&gt;index &gt;&gt; 8 == 0x8)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (e-&gt;index == MSR_IA32_UCODE_WRITE || /* SDM Table 35-2 */</div><div class='ctx'> 	    e-&gt;index == MSR_IA32_UCODE_REV)</div><div class='hunk'>@@ -8966,8 +9121,8 @@ static u32 nested_vmx_load_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)</div><div class='ctx'> </div><div class='ctx'> 	msr.host_initiated = false;</div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		if (kvm_read_guest(vcpu-&gt;kvm, gpa + i * sizeof(e),</div><div class='del'>-				   &amp;e, sizeof(e))) {</div><div class='add'>+		if (kvm_vcpu_read_guest(vcpu, gpa + i * sizeof(e),</div><div class='add'>+					&amp;e, sizeof(e))) {</div><div class='ctx'> 			pr_warn_ratelimited(</div><div class='ctx'> 				"%s cannot read MSR entry (%u, 0x%08llx)\n",</div><div class='ctx'> 				__func__, i, gpa + i * sizeof(e));</div><div class='hunk'>@@ -8999,9 +9154,10 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)</div><div class='ctx'> 	struct vmx_msr_entry e;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		if (kvm_read_guest(vcpu-&gt;kvm,</div><div class='del'>-				   gpa + i * sizeof(e),</div><div class='del'>-				   &amp;e, 2 * sizeof(u32))) {</div><div class='add'>+		struct msr_data msr_info;</div><div class='add'>+		if (kvm_vcpu_read_guest(vcpu,</div><div class='add'>+					gpa + i * sizeof(e),</div><div class='add'>+					&amp;e, 2 * sizeof(u32))) {</div><div class='ctx'> 			pr_warn_ratelimited(</div><div class='ctx'> 				"%s cannot read MSR entry (%u, 0x%08llx)\n",</div><div class='ctx'> 				__func__, i, gpa + i * sizeof(e));</div><div class='hunk'>@@ -9013,19 +9169,21 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)</div><div class='ctx'> 				__func__, i, e.index, e.reserved);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		if (kvm_get_msr(vcpu, e.index, &amp;e.value)) {</div><div class='add'>+		msr_info.host_initiated = false;</div><div class='add'>+		msr_info.index = e.index;</div><div class='add'>+		if (kvm_get_msr(vcpu, &amp;msr_info)) {</div><div class='ctx'> 			pr_warn_ratelimited(</div><div class='ctx'> 				"%s cannot read MSR (%u, 0x%x)\n",</div><div class='ctx'> 				__func__, i, e.index);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		if (kvm_write_guest(vcpu-&gt;kvm,</div><div class='del'>-				    gpa + i * sizeof(e) +</div><div class='del'>-					offsetof(struct vmx_msr_entry, value),</div><div class='del'>-				    &amp;e.value, sizeof(e.value))) {</div><div class='add'>+		if (kvm_vcpu_write_guest(vcpu,</div><div class='add'>+					 gpa + i * sizeof(e) +</div><div class='add'>+					     offsetof(struct vmx_msr_entry, value),</div><div class='add'>+					 &amp;msr_info.data, sizeof(msr_info.data))) {</div><div class='ctx'> 			pr_warn_ratelimited(</div><div class='ctx'> 				"%s cannot write MSR (%u, 0x%x, 0x%llx)\n",</div><div class='del'>-				__func__, i, e.index, e.value);</div><div class='add'>+				__func__, i, e.index, msr_info.data);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -10150,6 +10308,7 @@ static struct kvm_x86_ops vmx_x86_ops = {</div><div class='ctx'> 	.hardware_enable = hardware_enable,</div><div class='ctx'> 	.hardware_disable = hardware_disable,</div><div class='ctx'> 	.cpu_has_accelerated_tpr = report_flexpriority,</div><div class='add'>+	.cpu_has_high_real_mode_segbase = vmx_has_high_real_mode_segbase,</div><div class='ctx'> </div><div class='ctx'> 	.vcpu_create = vmx_create_vcpu,</div><div class='ctx'> 	.vcpu_free = vmx_free_vcpu,</div><div class='hunk'>@@ -10255,6 +10414,8 @@ static struct kvm_x86_ops vmx_x86_ops = {</div><div class='ctx'> 	.slot_disable_log_dirty = vmx_slot_disable_log_dirty,</div><div class='ctx'> 	.flush_log_dirty = vmx_flush_log_dirty,</div><div class='ctx'> 	.enable_log_dirty_pt_masked = vmx_enable_log_dirty_pt_masked,</div><div class='add'>+</div><div class='add'>+	.pmu_ops = &amp;intel_pmu_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init vmx_init(void)</div><div class='head'>diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c<br/>index ea306adbbc13..5ef2560075bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/x86.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/x86.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/x86.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/x86.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "assigned-dev.h"</div><div class='add'>+#include "pmu.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -57,11 +58,9 @@</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='del'>-#include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt; /* Ugh! */</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='add'>+#include &lt;linux/kernel_stat.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt; /* Ugh! */</div><div class='ctx'> #include &lt;asm/pvclock.h&gt;</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -99,6 +98,9 @@ module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);</div><div class='ctx'> unsigned int min_timer_period_us = 500;</div><div class='ctx'> module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);</div><div class='ctx'> </div><div class='add'>+static bool __read_mostly kvmclock_periodic_sync = true;</div><div class='add'>+module_param(kvmclock_periodic_sync, bool, S_IRUGO);</div><div class='add'>+</div><div class='ctx'> bool kvm_has_tsc_control;</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_has_tsc_control);</div><div class='ctx'> u32  kvm_max_guest_tsc_khz;</div><div class='hunk'>@@ -475,7 +477,7 @@ EXPORT_SYMBOL_GPL(kvm_require_dr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This function will be used to read from the physical memory of the currently</div><div class='del'>- * running guest. The difference to kvm_read_guest_page is that this function</div><div class='add'>+ * running guest. The difference to kvm_vcpu_read_guest_page is that this function</div><div class='ctx'>  * can read from guest physical or from the guest's guest physical memory.</div><div class='ctx'>  */</div><div class='ctx'> int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,</div><div class='hunk'>@@ -493,7 +495,7 @@ int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,</div><div class='ctx'> </div><div class='ctx'> 	real_gfn = gpa_to_gfn(real_gfn);</div><div class='ctx'> </div><div class='del'>-	return kvm_read_guest_page(vcpu-&gt;kvm, real_gfn, data, offset, len);</div><div class='add'>+	return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);</div><div class='ctx'> </div><div class='hunk'>@@ -572,8 +574,7 @@ out:</div><div class='ctx'> int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long old_cr0 = kvm_read_cr0(vcpu);</div><div class='del'>-	unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |</div><div class='del'>-				    X86_CR0_CD | X86_CR0_NW;</div><div class='add'>+	unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;</div><div class='ctx'> </div><div class='ctx'> 	cr0 |= X86_CR0_ET;</div><div class='ctx'> </div><div class='hunk'>@@ -619,6 +620,10 @@ int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='ctx'> </div><div class='ctx'> 	if ((cr0 ^ old_cr0) &amp; update_bits)</div><div class='ctx'> 		kvm_mmu_reset_context(vcpu);</div><div class='add'>+</div><div class='add'>+	if ((cr0 ^ old_cr0) &amp; X86_CR0_CD)</div><div class='add'>+		kvm_zap_gfn_range(vcpu-&gt;kvm, 0, ~0ULL);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_set_cr0);</div><div class='hunk'>@@ -908,7 +913,7 @@ bool kvm_rdpmc(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	u64 data;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = kvm_pmu_read_pmc(vcpu, ecx, &amp;data);</div><div class='add'>+	err = kvm_pmu_rdpmc(vcpu, ecx, &amp;data);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);</div><div class='hunk'>@@ -923,17 +928,11 @@ EXPORT_SYMBOL_GPL(kvm_rdpmc);</div><div class='ctx'>  *</div><div class='ctx'>  * This list is modified at module load time to reflect the</div><div class='ctx'>  * capabilities of the host cpu. This capabilities test skips MSRs that are</div><div class='del'>- * kvm-specific. Those are put in the beginning of the list.</div><div class='add'>+ * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs</div><div class='add'>+ * may depend on host virtualization features rather than host cpu features.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define KVM_SAVE_MSRS_BEGIN	12</div><div class='ctx'> static u32 msrs_to_save[] = {</div><div class='del'>-	MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,</div><div class='del'>-	MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,</div><div class='del'>-	HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,</div><div class='del'>-	HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,</div><div class='del'>-	HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,</div><div class='del'>-	MSR_KVM_PV_EOI_EN,</div><div class='ctx'> 	MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,</div><div class='ctx'> 	MSR_STAR,</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='hunk'>@@ -945,14 +944,24 @@ static u32 msrs_to_save[] = {</div><div class='ctx'> </div><div class='ctx'> static unsigned num_msrs_to_save;</div><div class='ctx'> </div><div class='del'>-static const u32 emulated_msrs[] = {</div><div class='add'>+static u32 emulated_msrs[] = {</div><div class='add'>+	MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,</div><div class='add'>+	MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,</div><div class='add'>+	HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,</div><div class='add'>+	HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,</div><div class='add'>+	HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,</div><div class='add'>+	MSR_KVM_PV_EOI_EN,</div><div class='add'>+</div><div class='ctx'> 	MSR_IA32_TSC_ADJUST,</div><div class='ctx'> 	MSR_IA32_TSCDEADLINE,</div><div class='ctx'> 	MSR_IA32_MISC_ENABLE,</div><div class='ctx'> 	MSR_IA32_MCG_STATUS,</div><div class='ctx'> 	MSR_IA32_MCG_CTL,</div><div class='add'>+	MSR_IA32_SMBASE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static unsigned num_emulated_msrs;</div><div class='add'>+</div><div class='ctx'> bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)</div><div class='ctx'> {</div><div class='ctx'> 	if (efer &amp; efer_reserved_bits)</div><div class='hunk'>@@ -1046,6 +1055,21 @@ EXPORT_SYMBOL_GPL(kvm_set_msr);</div><div class='ctx'> /*</div><div class='ctx'>  * Adapt set_msr() to msr_io()'s calling convention</div><div class='ctx'>  */</div><div class='add'>+static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct msr_data msr;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	msr.index = index;</div><div class='add'>+	msr.host_initiated = true;</div><div class='add'>+	r = kvm_get_msr(vcpu, &amp;msr);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	*data = msr.data;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct msr_data msr;</div><div class='hunk'>@@ -1698,6 +1722,8 @@ static int kvm_guest_time_update(struct kvm_vcpu *v)</div><div class='ctx'> 		vcpu-&gt;pvclock_set_guest_stopped_request = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;</div><div class='add'>+</div><div class='ctx'> 	/* If the host uses TSC clocksource, then it is stable */</div><div class='ctx'> 	if (use_master_clock)</div><div class='ctx'> 		pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;</div><div class='hunk'>@@ -1768,127 +1794,14 @@ static void kvmclock_sync_fn(struct work_struct *work)</div><div class='ctx'> 					   kvmclock_sync_work);</div><div class='ctx'> 	struct kvm *kvm = container_of(ka, struct kvm, arch);</div><div class='ctx'> </div><div class='add'>+	if (!kvmclock_periodic_sync)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	schedule_delayed_work(&amp;kvm-&gt;arch.kvmclock_update_work, 0);</div><div class='ctx'> 	schedule_delayed_work(&amp;kvm-&gt;arch.kvmclock_sync_work,</div><div class='ctx'> 					KVMCLOCK_SYNC_PERIOD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool msr_mtrr_valid(unsigned msr)</div><div class='del'>-{</div><div class='del'>-	switch (msr) {</div><div class='del'>-	case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:</div><div class='del'>-	case MSR_MTRRfix64K_00000:</div><div class='del'>-	case MSR_MTRRfix16K_80000:</div><div class='del'>-	case MSR_MTRRfix16K_A0000:</div><div class='del'>-	case MSR_MTRRfix4K_C0000:</div><div class='del'>-	case MSR_MTRRfix4K_C8000:</div><div class='del'>-	case MSR_MTRRfix4K_D0000:</div><div class='del'>-	case MSR_MTRRfix4K_D8000:</div><div class='del'>-	case MSR_MTRRfix4K_E0000:</div><div class='del'>-	case MSR_MTRRfix4K_E8000:</div><div class='del'>-	case MSR_MTRRfix4K_F0000:</div><div class='del'>-	case MSR_MTRRfix4K_F8000:</div><div class='del'>-	case MSR_MTRRdefType:</div><div class='del'>-	case MSR_IA32_CR_PAT:</div><div class='del'>-		return true;</div><div class='del'>-	case 0x2f8:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool valid_pat_type(unsigned t)</div><div class='del'>-{</div><div class='del'>-	return t &lt; 8 &amp;&amp; (1 &lt;&lt; t) &amp; 0xf3; /* 0, 1, 4, 5, 6, 7 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool valid_mtrr_type(unsigned t)</div><div class='del'>-{</div><div class='del'>-	return t &lt; 8 &amp;&amp; (1 &lt;&lt; t) &amp; 0x73; /* 0, 1, 4, 5, 6 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	u64 mask;</div><div class='del'>-</div><div class='del'>-	if (!msr_mtrr_valid(msr))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (msr == MSR_IA32_CR_PAT) {</div><div class='del'>-		for (i = 0; i &lt; 8; i++)</div><div class='del'>-			if (!valid_pat_type((data &gt;&gt; (i * 8)) &amp; 0xff))</div><div class='del'>-				return false;</div><div class='del'>-		return true;</div><div class='del'>-	} else if (msr == MSR_MTRRdefType) {</div><div class='del'>-		if (data &amp; ~0xcff)</div><div class='del'>-			return false;</div><div class='del'>-		return valid_mtrr_type(data &amp; 0xff);</div><div class='del'>-	} else if (msr &gt;= MSR_MTRRfix64K_00000 &amp;&amp; msr &lt;= MSR_MTRRfix4K_F8000) {</div><div class='del'>-		for (i = 0; i &lt; 8 ; i++)</div><div class='del'>-			if (!valid_mtrr_type((data &gt;&gt; (i * 8)) &amp; 0xff))</div><div class='del'>-				return false;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* variable MTRRs */</div><div class='del'>-	WARN_ON(!(msr &gt;= 0x200 &amp;&amp; msr &lt; 0x200 + 2 * KVM_NR_VAR_MTRR));</div><div class='del'>-</div><div class='del'>-	mask = (~0ULL) &lt;&lt; cpuid_maxphyaddr(vcpu);</div><div class='del'>-	if ((msr &amp; 1) == 0) {</div><div class='del'>-		/* MTRR base */</div><div class='del'>-		if (!valid_mtrr_type(data &amp; 0xff))</div><div class='del'>-			return false;</div><div class='del'>-		mask |= 0xf00;</div><div class='del'>-	} else</div><div class='del'>-		/* MTRR mask */</div><div class='del'>-		mask |= 0x7ff;</div><div class='del'>-	if (data &amp; mask) {</div><div class='del'>-		kvm_inject_gp(vcpu, 0);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(kvm_mtrr_valid);</div><div class='del'>-</div><div class='del'>-static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='del'>-{</div><div class='del'>-	u64 *p = (u64 *)&amp;vcpu-&gt;arch.mtrr_state.fixed_ranges;</div><div class='del'>-</div><div class='del'>-	if (!kvm_mtrr_valid(vcpu, msr, data))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (msr == MSR_MTRRdefType) {</div><div class='del'>-		vcpu-&gt;arch.mtrr_state.def_type = data;</div><div class='del'>-		vcpu-&gt;arch.mtrr_state.enabled = (data &amp; 0xc00) &gt;&gt; 10;</div><div class='del'>-	} else if (msr == MSR_MTRRfix64K_00000)</div><div class='del'>-		p[0] = data;</div><div class='del'>-	else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)</div><div class='del'>-		p[1 + msr - MSR_MTRRfix16K_80000] = data;</div><div class='del'>-	else if (msr &gt;= MSR_MTRRfix4K_C0000 &amp;&amp; msr &lt;= MSR_MTRRfix4K_F8000)</div><div class='del'>-		p[3 + msr - MSR_MTRRfix4K_C0000] = data;</div><div class='del'>-	else if (msr == MSR_IA32_CR_PAT)</div><div class='del'>-		vcpu-&gt;arch.pat = data;</div><div class='del'>-	else {	/* Variable MTRRs */</div><div class='del'>-		int idx, is_mtrr_mask;</div><div class='del'>-		u64 *pt;</div><div class='del'>-</div><div class='del'>-		idx = (msr - 0x200) / 2;</div><div class='del'>-		is_mtrr_mask = msr - 0x200 - 2 * idx;</div><div class='del'>-		if (!is_mtrr_mask)</div><div class='del'>-			pt =</div><div class='del'>-			  (u64 *)&amp;vcpu-&gt;arch.mtrr_state.var_ranges[idx].base_lo;</div><div class='del'>-		else</div><div class='del'>-			pt =</div><div class='del'>-			  (u64 *)&amp;vcpu-&gt;arch.mtrr_state.var_ranges[idx].mask_lo;</div><div class='del'>-		*pt = data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kvm_mmu_reset_context(vcpu);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mcg_cap = vcpu-&gt;arch.mcg_cap;</div><div class='hunk'>@@ -1947,7 +1860,7 @@ static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)</div><div class='ctx'> 		r = PTR_ERR(page);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))</div><div class='add'>+	if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	r = 0;</div><div class='ctx'> out_free:</div><div class='hunk'>@@ -2047,13 +1960,13 @@ static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		gfn = data &gt;&gt; HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;</div><div class='del'>-		addr = gfn_to_hva(vcpu-&gt;kvm, gfn);</div><div class='add'>+		addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);</div><div class='ctx'> 		if (kvm_is_error_hva(addr))</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		if (__clear_user((void __user *)addr, PAGE_SIZE))</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		vcpu-&gt;arch.hv_vapic = data;</div><div class='del'>-		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='add'>+		kvm_vcpu_mark_page_dirty(vcpu, gfn);</div><div class='ctx'> 		if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2180,7 +2093,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 			    __func__, data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x200 ... 0x2ff:</div><div class='del'>-		return set_msr_mtrr(vcpu, msr, data);</div><div class='add'>+		return kvm_mtrr_set_msr(vcpu, msr, data);</div><div class='ctx'> 	case MSR_IA32_APICBASE:</div><div class='ctx'> 		return kvm_set_apic_base(vcpu, msr_info);</div><div class='ctx'> 	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:</div><div class='hunk'>@@ -2200,6 +2113,11 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 	case MSR_IA32_MISC_ENABLE:</div><div class='ctx'> 		vcpu-&gt;arch.ia32_misc_enable_msr = data;</div><div class='ctx'> 		break;</div><div class='add'>+	case MSR_IA32_SMBASE:</div><div class='add'>+		if (!msr_info-&gt;host_initiated)</div><div class='add'>+			return 1;</div><div class='add'>+		vcpu-&gt;arch.smbase = data;</div><div class='add'>+		break;</div><div class='ctx'> 	case MSR_KVM_WALL_CLOCK_NEW:</div><div class='ctx'> 	case MSR_KVM_WALL_CLOCK:</div><div class='ctx'> 		vcpu-&gt;kvm-&gt;arch.wall_clock = data;</div><div class='hunk'>@@ -2220,6 +2138,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 					&amp;vcpu-&gt;requests);</div><div class='ctx'> </div><div class='ctx'> 			ka-&gt;boot_vcpu_runs_old_kvmclock = tmp;</div><div class='add'>+</div><div class='add'>+			ka-&gt;kvmclock_offset = -get_kernel_ns();</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		vcpu-&gt;arch.time = data;</div><div class='hunk'>@@ -2281,37 +2201,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:</div><div class='ctx'> 		return set_msr_mce(vcpu, msr, data);</div><div class='ctx'> </div><div class='del'>-	/* Performance counters are not protected by a CPUID bit,</div><div class='del'>-	 * so we should check all of them in the generic path for the sake of</div><div class='del'>-	 * cross vendor migration.</div><div class='del'>-	 * Writing a zero into the event select MSRs disables them,</div><div class='del'>-	 * which we perfectly emulate ;-). Any other value should be at least</div><div class='del'>-	 * reported, some guests depend on them.</div><div class='del'>-	 */</div><div class='del'>-	case MSR_K7_EVNTSEL0:</div><div class='del'>-	case MSR_K7_EVNTSEL1:</div><div class='del'>-	case MSR_K7_EVNTSEL2:</div><div class='del'>-	case MSR_K7_EVNTSEL3:</div><div class='del'>-		if (data != 0)</div><div class='del'>-			vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "</div><div class='del'>-				    "0x%x data 0x%llx\n", msr, data);</div><div class='del'>-		break;</div><div class='del'>-	/* at least RHEL 4 unconditionally writes to the perfctr registers,</div><div class='del'>-	 * so we ignore writes to make it happy.</div><div class='del'>-	 */</div><div class='del'>-	case MSR_K7_PERFCTR0:</div><div class='del'>-	case MSR_K7_PERFCTR1:</div><div class='del'>-	case MSR_K7_PERFCTR2:</div><div class='del'>-	case MSR_K7_PERFCTR3:</div><div class='del'>-		vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "</div><div class='del'>-			    "0x%x data 0x%llx\n", msr, data);</div><div class='del'>-		break;</div><div class='del'>-	case MSR_P6_PERFCTR0:</div><div class='del'>-	case MSR_P6_PERFCTR1:</div><div class='del'>-		pr = true;</div><div class='del'>-	case MSR_P6_EVNTSEL0:</div><div class='del'>-	case MSR_P6_EVNTSEL1:</div><div class='del'>-		if (kvm_pmu_msr(vcpu, msr))</div><div class='add'>+	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:</div><div class='add'>+	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:</div><div class='add'>+		pr = true; /* fall through */</div><div class='add'>+	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:</div><div class='add'>+	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:</div><div class='add'>+		if (kvm_pmu_is_valid_msr(vcpu, msr))</div><div class='ctx'> 			return kvm_pmu_set_msr(vcpu, msr_info);</div><div class='ctx'> </div><div class='ctx'> 		if (pr || data != 0)</div><div class='hunk'>@@ -2357,7 +2252,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 	default:</div><div class='ctx'> 		if (msr &amp;&amp; (msr == vcpu-&gt;kvm-&gt;arch.xen_hvm_config.msr))</div><div class='ctx'> 			return xen_hvm_config(vcpu, data);</div><div class='del'>-		if (kvm_pmu_msr(vcpu, msr))</div><div class='add'>+		if (kvm_pmu_is_valid_msr(vcpu, msr))</div><div class='ctx'> 			return kvm_pmu_set_msr(vcpu, msr_info);</div><div class='ctx'> 		if (!ignore_msrs) {</div><div class='ctx'> 			vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",</div><div class='hunk'>@@ -2379,48 +2274,12 @@ EXPORT_SYMBOL_GPL(kvm_set_msr_common);</div><div class='ctx'>  * Returns 0 on success, non-0 otherwise.</div><div class='ctx'>  * Assumes vcpu_load() was already called.</div><div class='ctx'>  */</div><div class='del'>-int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)</div><div class='add'>+int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)</div><div class='ctx'> {</div><div class='del'>-	return kvm_x86_ops-&gt;get_msr(vcpu, msr_index, pdata);</div><div class='add'>+	return kvm_x86_ops-&gt;get_msr(vcpu, msr);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_get_msr);</div><div class='ctx'> </div><div class='del'>-static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='del'>-{</div><div class='del'>-	u64 *p = (u64 *)&amp;vcpu-&gt;arch.mtrr_state.fixed_ranges;</div><div class='del'>-</div><div class='del'>-	if (!msr_mtrr_valid(msr))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (msr == MSR_MTRRdefType)</div><div class='del'>-		*pdata = vcpu-&gt;arch.mtrr_state.def_type +</div><div class='del'>-			 (vcpu-&gt;arch.mtrr_state.enabled &lt;&lt; 10);</div><div class='del'>-	else if (msr == MSR_MTRRfix64K_00000)</div><div class='del'>-		*pdata = p[0];</div><div class='del'>-	else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)</div><div class='del'>-		*pdata = p[1 + msr - MSR_MTRRfix16K_80000];</div><div class='del'>-	else if (msr &gt;= MSR_MTRRfix4K_C0000 &amp;&amp; msr &lt;= MSR_MTRRfix4K_F8000)</div><div class='del'>-		*pdata = p[3 + msr - MSR_MTRRfix4K_C0000];</div><div class='del'>-	else if (msr == MSR_IA32_CR_PAT)</div><div class='del'>-		*pdata = vcpu-&gt;arch.pat;</div><div class='del'>-	else {	/* Variable MTRRs */</div><div class='del'>-		int idx, is_mtrr_mask;</div><div class='del'>-		u64 *pt;</div><div class='del'>-</div><div class='del'>-		idx = (msr - 0x200) / 2;</div><div class='del'>-		is_mtrr_mask = msr - 0x200 - 2 * idx;</div><div class='del'>-		if (!is_mtrr_mask)</div><div class='del'>-			pt =</div><div class='del'>-			  (u64 *)&amp;vcpu-&gt;arch.mtrr_state.var_ranges[idx].base_lo;</div><div class='del'>-		else</div><div class='del'>-			pt =</div><div class='del'>-			  (u64 *)&amp;vcpu-&gt;arch.mtrr_state.var_ranges[idx].mask_lo;</div><div class='del'>-		*pdata = *pt;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u64 data;</div><div class='hunk'>@@ -2518,11 +2377,9 @@ static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='add'>+int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> {</div><div class='del'>-	u64 data;</div><div class='del'>-</div><div class='del'>-	switch (msr) {</div><div class='add'>+	switch (msr_info-&gt;index) {</div><div class='ctx'> 	case MSR_IA32_PLATFORM_ID:</div><div class='ctx'> 	case MSR_IA32_EBL_CR_POWERON:</div><div class='ctx'> 	case MSR_IA32_DEBUGCTLMSR:</div><div class='hunk'>@@ -2533,38 +2390,28 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 	case MSR_K8_SYSCFG:</div><div class='ctx'> 	case MSR_K7_HWCR:</div><div class='ctx'> 	case MSR_VM_HSAVE_PA:</div><div class='del'>-	case MSR_K7_EVNTSEL0:</div><div class='del'>-	case MSR_K7_EVNTSEL1:</div><div class='del'>-	case MSR_K7_EVNTSEL2:</div><div class='del'>-	case MSR_K7_EVNTSEL3:</div><div class='del'>-	case MSR_K7_PERFCTR0:</div><div class='del'>-	case MSR_K7_PERFCTR1:</div><div class='del'>-	case MSR_K7_PERFCTR2:</div><div class='del'>-	case MSR_K7_PERFCTR3:</div><div class='ctx'> 	case MSR_K8_INT_PENDING_MSG:</div><div class='ctx'> 	case MSR_AMD64_NB_CFG:</div><div class='ctx'> 	case MSR_FAM10H_MMIO_CONF_BASE:</div><div class='ctx'> 	case MSR_AMD64_BU_CFG2:</div><div class='del'>-		data = 0;</div><div class='add'>+		msr_info-&gt;data = 0;</div><div class='ctx'> 		break;</div><div class='del'>-	case MSR_P6_PERFCTR0:</div><div class='del'>-	case MSR_P6_PERFCTR1:</div><div class='del'>-	case MSR_P6_EVNTSEL0:</div><div class='del'>-	case MSR_P6_EVNTSEL1:</div><div class='del'>-		if (kvm_pmu_msr(vcpu, msr))</div><div class='del'>-			return kvm_pmu_get_msr(vcpu, msr, pdata);</div><div class='del'>-		data = 0;</div><div class='add'>+	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:</div><div class='add'>+	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:</div><div class='add'>+	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:</div><div class='add'>+	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:</div><div class='add'>+		if (kvm_pmu_is_valid_msr(vcpu, msr_info-&gt;index))</div><div class='add'>+			return kvm_pmu_get_msr(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='add'>+		msr_info-&gt;data = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_UCODE_REV:</div><div class='del'>-		data = 0x100000000ULL;</div><div class='add'>+		msr_info-&gt;data = 0x100000000ULL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_MTRRcap:</div><div class='del'>-		data = 0x500 | KVM_NR_VAR_MTRR;</div><div class='del'>-		break;</div><div class='ctx'> 	case 0x200 ... 0x2ff:</div><div class='del'>-		return get_msr_mtrr(vcpu, msr, pdata);</div><div class='add'>+		return kvm_mtrr_get_msr(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 	case 0xcd: /* fsb frequency */</div><div class='del'>-		data = 3;</div><div class='add'>+		msr_info-&gt;data = 3;</div><div class='ctx'> 		break;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * MSR_EBC_FREQUENCY_ID</div><div class='hunk'>@@ -2578,48 +2425,53 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 		 * multiplying by zero otherwise.</div><div class='ctx'> 		 */</div><div class='ctx'> 	case MSR_EBC_FREQUENCY_ID:</div><div class='del'>-		data = 1 &lt;&lt; 24;</div><div class='add'>+		msr_info-&gt;data = 1 &lt;&lt; 24;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_APICBASE:</div><div class='del'>-		data = kvm_get_apic_base(vcpu);</div><div class='add'>+		msr_info-&gt;data = kvm_get_apic_base(vcpu);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:</div><div class='del'>-		return kvm_x2apic_msr_read(vcpu, msr, pdata);</div><div class='add'>+		return kvm_x2apic_msr_read(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_TSCDEADLINE:</div><div class='del'>-		data = kvm_get_lapic_tscdeadline_msr(vcpu);</div><div class='add'>+		msr_info-&gt;data = kvm_get_lapic_tscdeadline_msr(vcpu);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_TSC_ADJUST:</div><div class='del'>-		data = (u64)vcpu-&gt;arch.ia32_tsc_adjust_msr;</div><div class='add'>+		msr_info-&gt;data = (u64)vcpu-&gt;arch.ia32_tsc_adjust_msr;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_MISC_ENABLE:</div><div class='del'>-		data = vcpu-&gt;arch.ia32_misc_enable_msr;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.ia32_misc_enable_msr;</div><div class='add'>+		break;</div><div class='add'>+	case MSR_IA32_SMBASE:</div><div class='add'>+		if (!msr_info-&gt;host_initiated)</div><div class='add'>+			return 1;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.smbase;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_PERF_STATUS:</div><div class='ctx'> 		/* TSC increment by tick */</div><div class='del'>-		data = 1000ULL;</div><div class='add'>+		msr_info-&gt;data = 1000ULL;</div><div class='ctx'> 		/* CPU multiplier */</div><div class='del'>-		data |= (((uint64_t)4ULL) &lt;&lt; 40);</div><div class='add'>+		msr_info-&gt;data |= (((uint64_t)4ULL) &lt;&lt; 40);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_EFER:</div><div class='del'>-		data = vcpu-&gt;arch.efer;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.efer;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KVM_WALL_CLOCK:</div><div class='ctx'> 	case MSR_KVM_WALL_CLOCK_NEW:</div><div class='del'>-		data = vcpu-&gt;kvm-&gt;arch.wall_clock;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;kvm-&gt;arch.wall_clock;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KVM_SYSTEM_TIME:</div><div class='ctx'> 	case MSR_KVM_SYSTEM_TIME_NEW:</div><div class='del'>-		data = vcpu-&gt;arch.time;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.time;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KVM_ASYNC_PF_EN:</div><div class='del'>-		data = vcpu-&gt;arch.apf.msr_val;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.apf.msr_val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KVM_STEAL_TIME:</div><div class='del'>-		data = vcpu-&gt;arch.st.msr_val;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.st.msr_val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_KVM_PV_EOI_EN:</div><div class='del'>-		data = vcpu-&gt;arch.pv_eoi.msr_val;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.pv_eoi.msr_val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_P5_MC_ADDR:</div><div class='ctx'> 	case MSR_IA32_P5_MC_TYPE:</div><div class='hunk'>@@ -2627,7 +2479,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 	case MSR_IA32_MCG_CTL:</div><div class='ctx'> 	case MSR_IA32_MCG_STATUS:</div><div class='ctx'> 	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:</div><div class='del'>-		return get_msr_mce(vcpu, msr, pdata);</div><div class='add'>+		return get_msr_mce(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 	case MSR_K7_CLK_CTL:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Provide expected ramp-up count for K7. All other</div><div class='hunk'>@@ -2638,17 +2490,17 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 		 * type 6, model 8 and higher from exploding due to</div><div class='ctx'> 		 * the rdmsr failing.</div><div class='ctx'> 		 */</div><div class='del'>-		data = 0x20000000;</div><div class='add'>+		msr_info-&gt;data = 0x20000000;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:</div><div class='del'>-		if (kvm_hv_msr_partition_wide(msr)) {</div><div class='add'>+		if (kvm_hv_msr_partition_wide(msr_info-&gt;index)) {</div><div class='ctx'> 			int r;</div><div class='ctx'> 			mutex_lock(&amp;vcpu-&gt;kvm-&gt;lock);</div><div class='del'>-			r = get_msr_hyperv_pw(vcpu, msr, pdata);</div><div class='add'>+			r = get_msr_hyperv_pw(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 			mutex_unlock(&amp;vcpu-&gt;kvm-&gt;lock);</div><div class='ctx'> 			return r;</div><div class='ctx'> 		} else</div><div class='del'>-			return get_msr_hyperv(vcpu, msr, pdata);</div><div class='add'>+			return get_msr_hyperv(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_BBL_CR_CTL3:</div><div class='ctx'> 		/* This legacy MSR exists but isn't fully documented in current</div><div class='hunk'>@@ -2661,31 +2513,30 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)</div><div class='ctx'> 		 * L2 cache control register 3: 64GB range, 256KB size,</div><div class='ctx'> 		 * enabled, latency 0x1, configured</div><div class='ctx'> 		 */</div><div class='del'>-		data = 0xbe702111;</div><div class='add'>+		msr_info-&gt;data = 0xbe702111;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_AMD64_OSVW_ID_LENGTH:</div><div class='ctx'> 		if (!guest_cpuid_has_osvw(vcpu))</div><div class='ctx'> 			return 1;</div><div class='del'>-		data = vcpu-&gt;arch.osvw.length;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.osvw.length;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_AMD64_OSVW_STATUS:</div><div class='ctx'> 		if (!guest_cpuid_has_osvw(vcpu))</div><div class='ctx'> 			return 1;</div><div class='del'>-		data = vcpu-&gt;arch.osvw.status;</div><div class='add'>+		msr_info-&gt;data = vcpu-&gt;arch.osvw.status;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		if (kvm_pmu_msr(vcpu, msr))</div><div class='del'>-			return kvm_pmu_get_msr(vcpu, msr, pdata);</div><div class='add'>+		if (kvm_pmu_is_valid_msr(vcpu, msr_info-&gt;index))</div><div class='add'>+			return kvm_pmu_get_msr(vcpu, msr_info-&gt;index, &amp;msr_info-&gt;data);</div><div class='ctx'> 		if (!ignore_msrs) {</div><div class='del'>-			vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);</div><div class='add'>+			vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info-&gt;index);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		} else {</div><div class='del'>-			vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);</div><div class='del'>-			data = 0;</div><div class='add'>+			vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info-&gt;index);</div><div class='add'>+			msr_info-&gt;data = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	*pdata = data;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_get_msr_common);</div><div class='hunk'>@@ -2798,12 +2649,25 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	case KVM_CAP_HYPERV_TIME:</div><div class='ctx'> 	case KVM_CAP_IOAPIC_POLARITY_IGNORED:</div><div class='ctx'> 	case KVM_CAP_TSC_DEADLINE_TIMER:</div><div class='add'>+	case KVM_CAP_ENABLE_CAP_VM:</div><div class='add'>+	case KVM_CAP_DISABLE_QUIRKS:</div><div class='ctx'> #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT</div><div class='ctx'> 	case KVM_CAP_ASSIGN_DEV_IRQ:</div><div class='ctx'> 	case KVM_CAP_PCI_2_3:</div><div class='ctx'> #endif</div><div class='ctx'> 		r = 1;</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_X86_SMM:</div><div class='add'>+		/* SMBASE is usually relocated above 1M on modern chipsets,</div><div class='add'>+		 * and SMM handlers might indeed rely on 4G segment limits,</div><div class='add'>+		 * so do not report SMM to be available if real mode is</div><div class='add'>+		 * emulated via vm86 mode.  Still, do not go to great lengths</div><div class='add'>+		 * to avoid userspace's usage of the feature, because it is a</div><div class='add'>+		 * fringe case that is not enabled except via specific settings</div><div class='add'>+		 * of the module parameters.</div><div class='add'>+		 */</div><div class='add'>+		r = kvm_x86_ops-&gt;cpu_has_high_real_mode_segbase();</div><div class='add'>+		break;</div><div class='ctx'> 	case KVM_CAP_COALESCED_MMIO:</div><div class='ctx'> 		r = KVM_COALESCED_MMIO_PAGE_OFFSET;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2860,7 +2724,7 @@ long kvm_arch_dev_ioctl(struct file *filp,</div><div class='ctx'> 		if (copy_from_user(&amp;msr_list, user_msr_list, sizeof msr_list))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		n = msr_list.nmsrs;</div><div class='del'>-		msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);</div><div class='add'>+		msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;</div><div class='ctx'> 		if (copy_to_user(user_msr_list, &amp;msr_list, sizeof msr_list))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		r = -E2BIG;</div><div class='hunk'>@@ -2872,7 +2736,7 @@ long kvm_arch_dev_ioctl(struct file *filp,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		if (copy_to_user(user_msr_list-&gt;indices + num_msrs_to_save,</div><div class='ctx'> 				 &amp;emulated_msrs,</div><div class='del'>-				 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))</div><div class='add'>+				 num_emulated_msrs * sizeof(u32)))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3016,6 +2880,13 @@ static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	kvm_make_request(KVM_REQ_SMI, vcpu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					   struct kvm_tpr_access_ctl *tac)</div><div class='ctx'> {</div><div class='hunk'>@@ -3121,8 +2992,15 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	events-&gt;sipi_vector = 0; /* never valid when reporting to user space */</div><div class='ctx'> </div><div class='add'>+	events-&gt;smi.smm = is_smm(vcpu);</div><div class='add'>+	events-&gt;smi.pending = vcpu-&gt;arch.smi_pending;</div><div class='add'>+	events-&gt;smi.smm_inside_nmi =</div><div class='add'>+		!!(vcpu-&gt;arch.hflags &amp; HF_SMM_INSIDE_NMI_MASK);</div><div class='add'>+	events-&gt;smi.latched_init = kvm_lapic_latched_init(vcpu);</div><div class='add'>+</div><div class='ctx'> 	events-&gt;flags = (KVM_VCPUEVENT_VALID_NMI_PENDING</div><div class='del'>-			 | KVM_VCPUEVENT_VALID_SHADOW);</div><div class='add'>+			 | KVM_VCPUEVENT_VALID_SHADOW</div><div class='add'>+			 | KVM_VCPUEVENT_VALID_SMM);</div><div class='ctx'> 	memset(&amp;events-&gt;reserved, 0, sizeof(events-&gt;reserved));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3131,7 +3009,8 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	if (events-&gt;flags &amp; ~(KVM_VCPUEVENT_VALID_NMI_PENDING</div><div class='ctx'> 			      | KVM_VCPUEVENT_VALID_SIPI_VECTOR</div><div class='del'>-			      | KVM_VCPUEVENT_VALID_SHADOW))</div><div class='add'>+			      | KVM_VCPUEVENT_VALID_SHADOW</div><div class='add'>+			      | KVM_VCPUEVENT_VALID_SMM))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	process_nmi(vcpu);</div><div class='hunk'>@@ -3156,6 +3035,24 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	    kvm_vcpu_has_lapic(vcpu))</div><div class='ctx'> 		vcpu-&gt;arch.apic-&gt;sipi_vector = events-&gt;sipi_vector;</div><div class='ctx'> </div><div class='add'>+	if (events-&gt;flags &amp; KVM_VCPUEVENT_VALID_SMM) {</div><div class='add'>+		if (events-&gt;smi.smm)</div><div class='add'>+			vcpu-&gt;arch.hflags |= HF_SMM_MASK;</div><div class='add'>+		else</div><div class='add'>+			vcpu-&gt;arch.hflags &amp;= ~HF_SMM_MASK;</div><div class='add'>+		vcpu-&gt;arch.smi_pending = events-&gt;smi.pending;</div><div class='add'>+		if (events-&gt;smi.smm_inside_nmi)</div><div class='add'>+			vcpu-&gt;arch.hflags |= HF_SMM_INSIDE_NMI_MASK;</div><div class='add'>+		else</div><div class='add'>+			vcpu-&gt;arch.hflags &amp;= ~HF_SMM_INSIDE_NMI_MASK;</div><div class='add'>+		if (kvm_vcpu_has_lapic(vcpu)) {</div><div class='add'>+			if (events-&gt;smi.latched_init)</div><div class='add'>+				set_bit(KVM_APIC_INIT, &amp;vcpu-&gt;arch.apic-&gt;pending_events);</div><div class='add'>+			else</div><div class='add'>+				clear_bit(KVM_APIC_INIT, &amp;vcpu-&gt;arch.apic-&gt;pending_events);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	kvm_make_request(KVM_REQ_EVENT, vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3194,8 +3091,8 @@ static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct xsave_struct *xsave = &amp;vcpu-&gt;arch.guest_fpu.state-&gt;xsave;</div><div class='del'>-	u64 xstate_bv = xsave-&gt;xsave_hdr.xstate_bv;</div><div class='add'>+	struct xregs_state *xsave = &amp;vcpu-&gt;arch.guest_fpu.state.xsave;</div><div class='add'>+	u64 xstate_bv = xsave-&gt;header.xfeatures;</div><div class='ctx'> 	u64 valid;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3230,7 +3127,7 @@ static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)</div><div class='ctx'> {</div><div class='del'>-	struct xsave_struct *xsave = &amp;vcpu-&gt;arch.guest_fpu.state-&gt;xsave;</div><div class='add'>+	struct xregs_state *xsave = &amp;vcpu-&gt;arch.guest_fpu.state.xsave;</div><div class='ctx'> 	u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);</div><div class='ctx'> 	u64 valid;</div><div class='ctx'> </div><div class='hunk'>@@ -3241,9 +3138,9 @@ static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)</div><div class='ctx'> 	memcpy(xsave, src, XSAVE_HDR_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	/* Set XSTATE_BV and possibly XCOMP_BV.  */</div><div class='del'>-	xsave-&gt;xsave_hdr.xstate_bv = xstate_bv;</div><div class='add'>+	xsave-&gt;header.xfeatures = xstate_bv;</div><div class='ctx'> 	if (cpu_has_xsaves)</div><div class='del'>-		xsave-&gt;xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;</div><div class='add'>+		xsave-&gt;header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Copy each region from the non-compacted offset to the</div><div class='hunk'>@@ -3260,8 +3157,7 @@ static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)</div><div class='ctx'> 			cpuid_count(XSTATE_CPUID, index,</div><div class='ctx'> 				    &amp;size, &amp;offset, &amp;ecx, &amp;edx);</div><div class='ctx'> 			memcpy(dest, src + offset, size);</div><div class='del'>-		} else</div><div class='del'>-			WARN_ON_ONCE(1);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		valid -= feature;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3275,8 +3171,8 @@ static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		fill_xsave((u8 *) guest_xsave-&gt;region, vcpu);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memcpy(guest_xsave-&gt;region,</div><div class='del'>-			&amp;vcpu-&gt;arch.guest_fpu.state-&gt;fxsave,</div><div class='del'>-			sizeof(struct i387_fxsave_struct));</div><div class='add'>+			&amp;vcpu-&gt;arch.guest_fpu.state.fxsave,</div><div class='add'>+			sizeof(struct fxregs_state));</div><div class='ctx'> 		*(u64 *)&amp;guest_xsave-&gt;region[XSAVE_HDR_OFFSET / sizeof(u32)] =</div><div class='ctx'> 			XSTATE_FPSSE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3300,8 +3196,8 @@ static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (xstate_bv &amp; ~XSTATE_FPSSE)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		memcpy(&amp;vcpu-&gt;arch.guest_fpu.state-&gt;fxsave,</div><div class='del'>-			guest_xsave-&gt;region, sizeof(struct i387_fxsave_struct));</div><div class='add'>+		memcpy(&amp;vcpu-&gt;arch.guest_fpu.state.fxsave,</div><div class='add'>+			guest_xsave-&gt;region, sizeof(struct fxregs_state));</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3415,6 +3311,10 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 		r = kvm_vcpu_ioctl_nmi(vcpu);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case KVM_SMI: {</div><div class='add'>+		r = kvm_vcpu_ioctl_smi(vcpu);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	case KVM_SET_CPUID: {</div><div class='ctx'> 		struct kvm_cpuid __user *cpuid_arg = argp;</div><div class='ctx'> 		struct kvm_cpuid cpuid;</div><div class='hunk'>@@ -3454,7 +3354,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case KVM_GET_MSRS:</div><div class='del'>-		r = msr_io(vcpu, argp, kvm_get_msr, 1);</div><div class='add'>+		r = msr_io(vcpu, argp, do_get_msr, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_SET_MSRS:</div><div class='ctx'> 		r = msr_io(vcpu, argp, do_set_msr, 0);</div><div class='hunk'>@@ -3845,6 +3745,26 @@ int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,</div><div class='add'>+				   struct kvm_enable_cap *cap)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (cap-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (cap-&gt;cap) {</div><div class='add'>+	case KVM_CAP_DISABLE_QUIRKS:</div><div class='add'>+		kvm-&gt;arch.disabled_quirks = cap-&gt;args[0];</div><div class='add'>+		r = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> long kvm_arch_vm_ioctl(struct file *filp,</div><div class='ctx'> 		       unsigned int ioctl, unsigned long arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -4097,7 +4017,15 @@ long kvm_arch_vm_ioctl(struct file *filp,</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case KVM_ENABLE_CAP: {</div><div class='add'>+		struct kvm_enable_cap cap;</div><div class='ctx'> </div><div class='add'>+		r = -EFAULT;</div><div class='add'>+		if (copy_from_user(&amp;cap, argp, sizeof(cap)))</div><div class='add'>+			goto out;</div><div class='add'>+		r = kvm_vm_ioctl_enable_cap(kvm, &amp;cap);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4110,8 +4038,7 @@ static void kvm_init_msr_list(void)</div><div class='ctx'> 	u32 dummy[2];</div><div class='ctx'> 	unsigned i, j;</div><div class='ctx'> </div><div class='del'>-	/* skip the first msrs in the list. KVM-specific */</div><div class='del'>-	for (i = j = KVM_SAVE_MSRS_BEGIN; i &lt; ARRAY_SIZE(msrs_to_save); i++) {</div><div class='add'>+	for (i = j = 0; i &lt; ARRAY_SIZE(msrs_to_save); i++) {</div><div class='ctx'> 		if (rdmsr_safe(msrs_to_save[i], &amp;dummy[0], &amp;dummy[1]) &lt; 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -4136,6 +4063,22 @@ static void kvm_init_msr_list(void)</div><div class='ctx'> 		j++;</div><div class='ctx'> 	}</div><div class='ctx'> 	num_msrs_to_save = j;</div><div class='add'>+</div><div class='add'>+	for (i = j = 0; i &lt; ARRAY_SIZE(emulated_msrs); i++) {</div><div class='add'>+		switch (emulated_msrs[i]) {</div><div class='add'>+		case MSR_IA32_SMBASE:</div><div class='add'>+			if (!kvm_x86_ops-&gt;cpu_has_high_real_mode_segbase())</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j &lt; i)</div><div class='add'>+			emulated_msrs[j] = emulated_msrs[i];</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+	num_emulated_msrs = j;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,</div><div class='hunk'>@@ -4253,8 +4196,8 @@ static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,</div><div class='ctx'> </div><div class='ctx'> 		if (gpa == UNMAPPED_GVA)</div><div class='ctx'> 			return X86EMUL_PROPAGATE_FAULT;</div><div class='del'>-		ret = kvm_read_guest_page(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT, data,</div><div class='del'>-					  offset, toread);</div><div class='add'>+		ret = kvm_vcpu_read_guest_page(vcpu, gpa &gt;&gt; PAGE_SHIFT, data,</div><div class='add'>+					       offset, toread);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			r = X86EMUL_IO_NEEDED;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -4287,8 +4230,8 @@ static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	offset = addr &amp; (PAGE_SIZE-1);</div><div class='ctx'> 	if (WARN_ON(offset + bytes &gt; PAGE_SIZE))</div><div class='ctx'> 		bytes = (unsigned)PAGE_SIZE - offset;</div><div class='del'>-	ret = kvm_read_guest_page(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT, val,</div><div class='del'>-				  offset, bytes);</div><div class='add'>+	ret = kvm_vcpu_read_guest_page(vcpu, gpa &gt;&gt; PAGE_SHIFT, val,</div><div class='add'>+				       offset, bytes);</div><div class='ctx'> 	if (unlikely(ret &lt; 0))</div><div class='ctx'> 		return X86EMUL_IO_NEEDED;</div><div class='ctx'> </div><div class='hunk'>@@ -4334,7 +4277,7 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> </div><div class='ctx'> 		if (gpa == UNMAPPED_GVA)</div><div class='ctx'> 			return X86EMUL_PROPAGATE_FAULT;</div><div class='del'>-		ret = kvm_write_guest(vcpu-&gt;kvm, gpa, data, towrite);</div><div class='add'>+		ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			r = X86EMUL_IO_NEEDED;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -4387,7 +4330,7 @@ int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_write_guest(vcpu-&gt;kvm, gpa, val, bytes);</div><div class='add'>+	ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	kvm_mmu_pte_write(vcpu, gpa, val, bytes);</div><div class='hunk'>@@ -4421,7 +4364,7 @@ static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)</div><div class='ctx'> static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> 			void *val, int bytes)</div><div class='ctx'> {</div><div class='del'>-	return !kvm_read_guest(vcpu-&gt;kvm, gpa, val, bytes);</div><div class='add'>+	return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='hunk'>@@ -4619,7 +4562,7 @@ static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	if (((gpa + bytes - 1) &amp; PAGE_MASK) != (gpa &amp; PAGE_MASK))</div><div class='ctx'> 		goto emul_write;</div><div class='ctx'> </div><div class='del'>-	page = gfn_to_page(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	page = kvm_vcpu_gfn_to_page(vcpu, gpa &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	if (is_error_page(page))</div><div class='ctx'> 		goto emul_write;</div><div class='ctx'> </div><div class='hunk'>@@ -4647,7 +4590,7 @@ static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	if (!exchanged)</div><div class='ctx'> 		return X86EMUL_CMPXCHG_FAILED;</div><div class='ctx'> </div><div class='del'>-	mark_page_dirty(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	kvm_vcpu_mark_page_dirty(vcpu, gpa &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	kvm_mmu_pte_write(vcpu, gpa, new, bytes);</div><div class='ctx'> </div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='hunk'>@@ -4946,7 +4889,17 @@ static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,</div><div class='ctx'> static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 			    u32 msr_index, u64 *pdata)</div><div class='ctx'> {</div><div class='del'>-	return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);</div><div class='add'>+	struct msr_data msr;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	msr.index = msr_index;</div><div class='add'>+	msr.host_initiated = false;</div><div class='add'>+	r = kvm_get_msr(emul_to_vcpu(ctxt), &amp;msr);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	*pdata = msr.data;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,</div><div class='hunk'>@@ -4960,16 +4913,30 @@ static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	return kvm_set_msr(emul_to_vcpu(ctxt), &amp;msr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);</div><div class='add'>+</div><div class='add'>+	return vcpu-&gt;arch.smbase;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.smbase = smbase;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 			      u32 pmc)</div><div class='ctx'> {</div><div class='del'>-	return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);</div><div class='add'>+	return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 			     u32 pmc, u64 *pdata)</div><div class='ctx'> {</div><div class='del'>-	return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);</div><div class='add'>+	return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void emulator_halt(struct x86_emulate_ctxt *ctxt)</div><div class='hunk'>@@ -5045,6 +5012,8 @@ static const struct x86_emulate_ops emulate_ops = {</div><div class='ctx'> 	.cpl                 = emulator_get_cpl,</div><div class='ctx'> 	.get_dr              = emulator_get_dr,</div><div class='ctx'> 	.set_dr              = emulator_set_dr,</div><div class='add'>+	.get_smbase          = emulator_get_smbase,</div><div class='add'>+	.set_smbase          = emulator_set_smbase,</div><div class='ctx'> 	.set_msr             = emulator_set_msr,</div><div class='ctx'> 	.get_msr             = emulator_get_msr,</div><div class='ctx'> 	.check_pmc	     = emulator_check_pmc,</div><div class='hunk'>@@ -5106,7 +5075,10 @@ static void init_emulate_ctxt(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		     (cs_l &amp;&amp; is_long_mode(vcpu))	? X86EMUL_MODE_PROT64 :</div><div class='ctx'> 		     cs_db				? X86EMUL_MODE_PROT32 :</div><div class='ctx'> 							  X86EMUL_MODE_PROT16;</div><div class='del'>-	ctxt-&gt;guest_mode = is_guest_mode(vcpu);</div><div class='add'>+	BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);</div><div class='add'>+	BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);</div><div class='add'>+	BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);</div><div class='add'>+	ctxt-&gt;emul_flags = vcpu-&gt;arch.hflags;</div><div class='ctx'> </div><div class='ctx'> 	init_decode_cache(ctxt);</div><div class='ctx'> 	vcpu-&gt;arch.emulate_regs_need_sync_from_vcpu = false;</div><div class='hunk'>@@ -5275,6 +5247,34 @@ static bool retry_instruction(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> static int complete_emulated_mmio(struct kvm_vcpu *vcpu);</div><div class='ctx'> static int complete_emulated_pio(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+static void kvm_smm_changed(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!(vcpu-&gt;arch.hflags &amp; HF_SMM_MASK)) {</div><div class='add'>+		/* This is a good place to trace that we are exiting SMM.  */</div><div class='add'>+		trace_kvm_enter_smm(vcpu-&gt;vcpu_id, vcpu-&gt;arch.smbase, false);</div><div class='add'>+</div><div class='add'>+		if (unlikely(vcpu-&gt;arch.smi_pending)) {</div><div class='add'>+			kvm_make_request(KVM_REQ_SMI, vcpu);</div><div class='add'>+			vcpu-&gt;arch.smi_pending = 0;</div><div class='add'>+		} else {</div><div class='add'>+			/* Process a latched INIT, if any.  */</div><div class='add'>+			kvm_make_request(KVM_REQ_EVENT, vcpu);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_mmu_reset_context(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)</div><div class='add'>+{</div><div class='add'>+	unsigned changed = vcpu-&gt;arch.hflags ^ emul_flags;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.hflags = emul_flags;</div><div class='add'>+</div><div class='add'>+	if (changed &amp; HF_SMM_MASK)</div><div class='add'>+		kvm_smm_changed(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,</div><div class='ctx'> 				unsigned long *db)</div><div class='ctx'> {</div><div class='hunk'>@@ -5474,6 +5474,8 @@ restart:</div><div class='ctx'> 		unsigned long rflags = kvm_x86_ops-&gt;get_rflags(vcpu);</div><div class='ctx'> 		toggle_interruptibility(vcpu, ctxt-&gt;interruptibility);</div><div class='ctx'> 		vcpu-&gt;arch.emulate_regs_need_sync_to_vcpu = false;</div><div class='add'>+		if (vcpu-&gt;arch.hflags != ctxt-&gt;emul_flags)</div><div class='add'>+			kvm_set_hflags(vcpu, ctxt-&gt;emul_flags);</div><div class='ctx'> 		kvm_rip_write(vcpu, ctxt-&gt;eip);</div><div class='ctx'> 		if (r == EMULATE_DONE)</div><div class='ctx'> 			kvm_vcpu_check_singlestep(vcpu, rflags, &amp;r);</div><div class='hunk'>@@ -5952,6 +5954,7 @@ static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)</div><div class='ctx'> 	lapic_irq.shorthand = 0;</div><div class='ctx'> 	lapic_irq.dest_mode = 0;</div><div class='ctx'> 	lapic_irq.dest_id = apicid;</div><div class='add'>+	lapic_irq.msi_redir_hint = false;</div><div class='ctx'> </div><div class='ctx'> 	lapic_irq.delivery_mode = APIC_DM_REMRD;</div><div class='ctx'> 	kvm_irq_delivery_to_apic(kvm, NULL, &amp;lapic_irq, NULL);</div><div class='hunk'>@@ -6039,6 +6042,7 @@ static void post_kvm_run_save(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_run *kvm_run = vcpu-&gt;run;</div><div class='ctx'> </div><div class='ctx'> 	kvm_run-&gt;if_flag = (kvm_get_rflags(vcpu) &amp; X86_EFLAGS_IF) != 0;</div><div class='add'>+	kvm_run-&gt;flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;</div><div class='ctx'> 	kvm_run-&gt;cr8 = kvm_get_cr8(vcpu);</div><div class='ctx'> 	kvm_run-&gt;apic_base = kvm_get_apic_base(vcpu);</div><div class='ctx'> 	if (irqchip_in_kernel(vcpu-&gt;kvm))</div><div class='hunk'>@@ -6162,6 +6166,233 @@ static void process_nmi(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_make_request(KVM_REQ_EVENT, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define put_smstate(type, buf, offset, val)			  \</div><div class='add'>+	*(type *)((buf) + (offset) - 0x7e00) = val</div><div class='add'>+</div><div class='add'>+static u32 process_smi_get_segment_flags(struct kvm_segment *seg)</div><div class='add'>+{</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	flags |= seg-&gt;g       &lt;&lt; 23;</div><div class='add'>+	flags |= seg-&gt;db      &lt;&lt; 22;</div><div class='add'>+	flags |= seg-&gt;l       &lt;&lt; 21;</div><div class='add'>+	flags |= seg-&gt;avl     &lt;&lt; 20;</div><div class='add'>+	flags |= seg-&gt;present &lt;&lt; 15;</div><div class='add'>+	flags |= seg-&gt;dpl     &lt;&lt; 13;</div><div class='add'>+	flags |= seg-&gt;s       &lt;&lt; 12;</div><div class='add'>+	flags |= seg-&gt;type    &lt;&lt; 8;</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)</div><div class='add'>+{</div><div class='add'>+	struct kvm_segment seg;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, n);</div><div class='add'>+	put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);</div><div class='add'>+</div><div class='add'>+	if (n &lt; 3)</div><div class='add'>+		offset = 0x7f84 + n * 12;</div><div class='add'>+	else</div><div class='add'>+		offset = 0x7f2c + (n - 3) * 12;</div><div class='add'>+</div><div class='add'>+	put_smstate(u32, buf, offset + 8, seg.base);</div><div class='add'>+	put_smstate(u32, buf, offset + 4, seg.limit);</div><div class='add'>+	put_smstate(u32, buf, offset, process_smi_get_segment_flags(&amp;seg));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)</div><div class='add'>+{</div><div class='add'>+	struct kvm_segment seg;</div><div class='add'>+	int offset;</div><div class='add'>+	u16 flags;</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, n);</div><div class='add'>+	offset = 0x7e00 + n * 16;</div><div class='add'>+</div><div class='add'>+	flags = process_smi_get_segment_flags(&amp;seg) &gt;&gt; 8;</div><div class='add'>+	put_smstate(u16, buf, offset, seg.selector);</div><div class='add'>+	put_smstate(u16, buf, offset + 2, flags);</div><div class='add'>+	put_smstate(u32, buf, offset + 4, seg.limit);</div><div class='add'>+	put_smstate(u64, buf, offset + 8, seg.base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct desc_ptr dt;</div><div class='add'>+	struct kvm_segment seg;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));</div><div class='add'>+	put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));</div><div class='add'>+	put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));</div><div class='add'>+	put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));</div><div class='add'>+</div><div class='add'>+	kvm_get_dr(vcpu, 6, &amp;val);</div><div class='add'>+	put_smstate(u32, buf, 0x7fcc, (u32)val);</div><div class='add'>+	kvm_get_dr(vcpu, 7, &amp;val);</div><div class='add'>+	put_smstate(u32, buf, 0x7fc8, (u32)val);</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, VCPU_SREG_TR);</div><div class='add'>+	put_smstate(u32, buf, 0x7fc4, seg.selector);</div><div class='add'>+	put_smstate(u32, buf, 0x7f64, seg.base);</div><div class='add'>+	put_smstate(u32, buf, 0x7f60, seg.limit);</div><div class='add'>+	put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&amp;seg));</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, VCPU_SREG_LDTR);</div><div class='add'>+	put_smstate(u32, buf, 0x7fc0, seg.selector);</div><div class='add'>+	put_smstate(u32, buf, 0x7f80, seg.base);</div><div class='add'>+	put_smstate(u32, buf, 0x7f7c, seg.limit);</div><div class='add'>+	put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&amp;seg));</div><div class='add'>+</div><div class='add'>+	kvm_x86_ops-&gt;get_gdt(vcpu, &amp;dt);</div><div class='add'>+	put_smstate(u32, buf, 0x7f74, dt.address);</div><div class='add'>+	put_smstate(u32, buf, 0x7f70, dt.size);</div><div class='add'>+</div><div class='add'>+	kvm_x86_ops-&gt;get_idt(vcpu, &amp;dt);</div><div class='add'>+	put_smstate(u32, buf, 0x7f58, dt.address);</div><div class='add'>+	put_smstate(u32, buf, 0x7f54, dt.size);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		process_smi_save_seg_32(vcpu, buf, i);</div><div class='add'>+</div><div class='add'>+	put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));</div><div class='add'>+</div><div class='add'>+	/* revision id */</div><div class='add'>+	put_smstate(u32, buf, 0x7efc, 0x00020000);</div><div class='add'>+	put_smstate(u32, buf, 0x7ef8, vcpu-&gt;arch.smbase);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	struct desc_ptr dt;</div><div class='add'>+	struct kvm_segment seg;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 16; i++)</div><div class='add'>+		put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));</div><div class='add'>+</div><div class='add'>+	put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));</div><div class='add'>+	put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));</div><div class='add'>+</div><div class='add'>+	kvm_get_dr(vcpu, 6, &amp;val);</div><div class='add'>+	put_smstate(u64, buf, 0x7f68, val);</div><div class='add'>+	kvm_get_dr(vcpu, 7, &amp;val);</div><div class='add'>+	put_smstate(u64, buf, 0x7f60, val);</div><div class='add'>+</div><div class='add'>+	put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));</div><div class='add'>+	put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));</div><div class='add'>+	put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));</div><div class='add'>+</div><div class='add'>+	put_smstate(u32, buf, 0x7f00, vcpu-&gt;arch.smbase);</div><div class='add'>+</div><div class='add'>+	/* revision id */</div><div class='add'>+	put_smstate(u32, buf, 0x7efc, 0x00020064);</div><div class='add'>+</div><div class='add'>+	put_smstate(u64, buf, 0x7ed0, vcpu-&gt;arch.efer);</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, VCPU_SREG_TR);</div><div class='add'>+	put_smstate(u16, buf, 0x7e90, seg.selector);</div><div class='add'>+	put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&amp;seg) &gt;&gt; 8);</div><div class='add'>+	put_smstate(u32, buf, 0x7e94, seg.limit);</div><div class='add'>+	put_smstate(u64, buf, 0x7e98, seg.base);</div><div class='add'>+</div><div class='add'>+	kvm_x86_ops-&gt;get_idt(vcpu, &amp;dt);</div><div class='add'>+	put_smstate(u32, buf, 0x7e84, dt.size);</div><div class='add'>+	put_smstate(u64, buf, 0x7e88, dt.address);</div><div class='add'>+</div><div class='add'>+	kvm_get_segment(vcpu, &amp;seg, VCPU_SREG_LDTR);</div><div class='add'>+	put_smstate(u16, buf, 0x7e70, seg.selector);</div><div class='add'>+	put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&amp;seg) &gt;&gt; 8);</div><div class='add'>+	put_smstate(u32, buf, 0x7e74, seg.limit);</div><div class='add'>+	put_smstate(u64, buf, 0x7e78, seg.base);</div><div class='add'>+</div><div class='add'>+	kvm_x86_ops-&gt;get_gdt(vcpu, &amp;dt);</div><div class='add'>+	put_smstate(u32, buf, 0x7e64, dt.size);</div><div class='add'>+	put_smstate(u64, buf, 0x7e68, dt.address);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		process_smi_save_seg_64(vcpu, buf, i);</div><div class='add'>+#else</div><div class='add'>+	WARN_ON_ONCE(1);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_smi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_segment cs, ds;</div><div class='add'>+	char buf[512];</div><div class='add'>+	u32 cr0;</div><div class='add'>+</div><div class='add'>+	if (is_smm(vcpu)) {</div><div class='add'>+		vcpu-&gt;arch.smi_pending = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	trace_kvm_enter_smm(vcpu-&gt;vcpu_id, vcpu-&gt;arch.smbase, true);</div><div class='add'>+	vcpu-&gt;arch.hflags |= HF_SMM_MASK;</div><div class='add'>+	memset(buf, 0, 512);</div><div class='add'>+	if (guest_cpuid_has_longmode(vcpu))</div><div class='add'>+		process_smi_save_state_64(vcpu, buf);</div><div class='add'>+	else</div><div class='add'>+		process_smi_save_state_32(vcpu, buf);</div><div class='add'>+</div><div class='add'>+	kvm_vcpu_write_guest(vcpu, vcpu-&gt;arch.smbase + 0xfe00, buf, sizeof(buf));</div><div class='add'>+</div><div class='add'>+	if (kvm_x86_ops-&gt;get_nmi_mask(vcpu))</div><div class='add'>+		vcpu-&gt;arch.hflags |= HF_SMM_INSIDE_NMI_MASK;</div><div class='add'>+	else</div><div class='add'>+		kvm_x86_ops-&gt;set_nmi_mask(vcpu, true);</div><div class='add'>+</div><div class='add'>+	kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);</div><div class='add'>+	kvm_rip_write(vcpu, 0x8000);</div><div class='add'>+</div><div class='add'>+	cr0 = vcpu-&gt;arch.cr0 &amp; ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);</div><div class='add'>+	kvm_x86_ops-&gt;set_cr0(vcpu, cr0);</div><div class='add'>+	vcpu-&gt;arch.cr0 = cr0;</div><div class='add'>+</div><div class='add'>+	kvm_x86_ops-&gt;set_cr4(vcpu, 0);</div><div class='add'>+</div><div class='add'>+	__kvm_set_dr(vcpu, 7, DR7_FIXED_1);</div><div class='add'>+</div><div class='add'>+	cs.selector = (vcpu-&gt;arch.smbase &gt;&gt; 4) &amp; 0xffff;</div><div class='add'>+	cs.base = vcpu-&gt;arch.smbase;</div><div class='add'>+</div><div class='add'>+	ds.selector = 0;</div><div class='add'>+	ds.base = 0;</div><div class='add'>+</div><div class='add'>+	cs.limit    = ds.limit = 0xffffffff;</div><div class='add'>+	cs.type     = ds.type = 0x3;</div><div class='add'>+	cs.dpl      = ds.dpl = 0;</div><div class='add'>+	cs.db       = ds.db = 0;</div><div class='add'>+	cs.s        = ds.s = 1;</div><div class='add'>+	cs.l        = ds.l = 0;</div><div class='add'>+	cs.g        = ds.g = 1;</div><div class='add'>+	cs.avl      = ds.avl = 0;</div><div class='add'>+	cs.present  = ds.present = 1;</div><div class='add'>+	cs.unusable = ds.unusable = 0;</div><div class='add'>+	cs.padding  = ds.padding = 0;</div><div class='add'>+</div><div class='add'>+	kvm_set_segment(vcpu, &amp;cs, VCPU_SREG_CS);</div><div class='add'>+	kvm_set_segment(vcpu, &amp;ds, VCPU_SREG_DS);</div><div class='add'>+	kvm_set_segment(vcpu, &amp;ds, VCPU_SREG_ES);</div><div class='add'>+	kvm_set_segment(vcpu, &amp;ds, VCPU_SREG_FS);</div><div class='add'>+	kvm_set_segment(vcpu, &amp;ds, VCPU_SREG_GS);</div><div class='add'>+	kvm_set_segment(vcpu, &amp;ds, VCPU_SREG_SS);</div><div class='add'>+</div><div class='add'>+	if (guest_cpuid_has_longmode(vcpu))</div><div class='add'>+		kvm_x86_ops-&gt;set_efer(vcpu, 0);</div><div class='add'>+</div><div class='add'>+	kvm_update_cpuid(vcpu);</div><div class='add'>+	kvm_mmu_reset_context(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 eoi_exit_bitmap[4];</div><div class='hunk'>@@ -6270,12 +6501,14 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))</div><div class='ctx'> 			record_steal_time(vcpu);</div><div class='add'>+		if (kvm_check_request(KVM_REQ_SMI, vcpu))</div><div class='add'>+			process_smi(vcpu);</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_NMI, vcpu))</div><div class='ctx'> 			process_nmi(vcpu);</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_PMU, vcpu))</div><div class='del'>-			kvm_handle_pmu_event(vcpu);</div><div class='add'>+			kvm_pmu_handle_event(vcpu);</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_PMI, vcpu))</div><div class='del'>-			kvm_deliver_pmi(vcpu);</div><div class='add'>+			kvm_pmu_deliver_pmi(vcpu);</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))</div><div class='ctx'> 			vcpu_scan_ioapic(vcpu);</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))</div><div class='hunk'>@@ -6347,7 +6580,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (req_immediate_exit)</div><div class='ctx'> 		smp_send_reschedule(vcpu-&gt;cpu);</div><div class='ctx'> </div><div class='del'>-	kvm_guest_enter();</div><div class='add'>+	__kvm_guest_enter();</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(vcpu-&gt;arch.switch_db_regs)) {</div><div class='ctx'> 		set_debugreg(0, 7);</div><div class='hunk'>@@ -6597,11 +6830,11 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)</div><div class='ctx'> {</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='ctx'> 	int r;</div><div class='ctx'> 	sigset_t sigsaved;</div><div class='ctx'> </div><div class='del'>-	if (!tsk_used_math(current) &amp;&amp; init_fpu(current))</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	fpu__activate_curr(fpu);</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;sigset_active)</div><div class='ctx'> 		sigprocmask(SIG_SETMASK, &amp;vcpu-&gt;sigset, &amp;sigsaved);</div><div class='hunk'>@@ -6971,8 +7204,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)</div><div class='ctx'> {</div><div class='del'>-	struct i387_fxsave_struct *fxsave =</div><div class='del'>-			&amp;vcpu-&gt;arch.guest_fpu.state-&gt;fxsave;</div><div class='add'>+	struct fxregs_state *fxsave =</div><div class='add'>+			&amp;vcpu-&gt;arch.guest_fpu.state.fxsave;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(fpu-&gt;fpr, fxsave-&gt;st_space, 128);</div><div class='ctx'> 	fpu-&gt;fcw = fxsave-&gt;cwd;</div><div class='hunk'>@@ -6988,8 +7221,8 @@ int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)</div><div class='ctx'> {</div><div class='del'>-	struct i387_fxsave_struct *fxsave =</div><div class='del'>-			&amp;vcpu-&gt;arch.guest_fpu.state-&gt;fxsave;</div><div class='add'>+	struct fxregs_state *fxsave =</div><div class='add'>+			&amp;vcpu-&gt;arch.guest_fpu.state.fxsave;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(fxsave-&gt;st_space, fpu-&gt;fpr, 128);</div><div class='ctx'> 	fxsave-&gt;cwd = fpu-&gt;fcw;</div><div class='hunk'>@@ -7003,17 +7236,11 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int fx_init(struct kvm_vcpu *vcpu)</div><div class='add'>+static void fx_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = fpu_alloc(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	fpu_finit(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='add'>+	fpstate_init(&amp;vcpu-&gt;arch.guest_fpu.state);</div><div class='ctx'> 	if (cpu_has_xsaves)</div><div class='del'>-		vcpu-&gt;arch.guest_fpu.state-&gt;xsave.xsave_hdr.xcomp_bv =</div><div class='add'>+		vcpu-&gt;arch.guest_fpu.state.xsave.header.xcomp_bv =</div><div class='ctx'> 			host_xcr0 | XSTATE_COMPACTION_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -7022,14 +7249,6 @@ int fx_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vcpu-&gt;arch.xcr0 = XSTATE_FP;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.cr0 |= X86_CR0_ET;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(fx_init);</div><div class='del'>-</div><div class='del'>-static void fx_free(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	fpu_free(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -7045,7 +7264,7 @@ void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_put_guest_xcr0(vcpu);</div><div class='ctx'> 	vcpu-&gt;guest_fpu_loaded = 1;</div><div class='ctx'> 	__kernel_fpu_begin();</div><div class='del'>-	fpu_restore_checking(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='add'>+	__copy_kernel_to_fpregs(&amp;vcpu-&gt;arch.guest_fpu.state);</div><div class='ctx'> 	trace_kvm_fpu(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7053,16 +7272,25 @@ void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_put_guest_xcr0(vcpu);</div><div class='ctx'> </div><div class='del'>-	if (!vcpu-&gt;guest_fpu_loaded)</div><div class='add'>+	if (!vcpu-&gt;guest_fpu_loaded) {</div><div class='add'>+		vcpu-&gt;fpu_counter = 0;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;guest_fpu_loaded = 0;</div><div class='del'>-	fpu_save_init(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='add'>+	copy_fpregs_to_fpstate(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='ctx'> 	__kernel_fpu_end();</div><div class='ctx'> 	++vcpu-&gt;stat.fpu_reload;</div><div class='del'>-	if (!vcpu-&gt;arch.eager_fpu)</div><div class='del'>-		kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * If using eager FPU mode, or if the guest is a frequent user</div><div class='add'>+	 * of the FPU, just leave the FPU active for next time.</div><div class='add'>+	 * Every 255 times fpu_counter rolls over to 0; a guest that uses</div><div class='add'>+	 * the FPU in bursts will revert to loading it on demand.</div><div class='add'>+	 */</div><div class='add'>+	if (!vcpu-&gt;arch.eager_fpu) {</div><div class='add'>+		if (++vcpu-&gt;fpu_counter &lt; 5)</div><div class='add'>+			kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);</div><div class='add'>+	}</div><div class='ctx'> 	trace_kvm_fpu(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7071,7 +7299,6 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvmclock_reset(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	free_cpumask_var(vcpu-&gt;arch.wbinvd_dirty_mask);</div><div class='del'>-	fx_free(vcpu);</div><div class='ctx'> 	kvm_x86_ops-&gt;vcpu_free(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7087,11 +7314,6 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> 	vcpu = kvm_x86_ops-&gt;vcpu_create(kvm, id);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Activate fpu unconditionally in case the guest needs eager FPU.  It will be</div><div class='del'>-	 * deactivated soon if it doesn't.</div><div class='del'>-	 */</div><div class='del'>-	kvm_x86_ops-&gt;fpu_activate(vcpu);</div><div class='ctx'> 	return vcpu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7099,14 +7321,13 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.mtrr_state.have_fixed = 1;</div><div class='add'>+	kvm_vcpu_mtrr_init(vcpu);</div><div class='ctx'> 	r = vcpu_load(vcpu);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	kvm_vcpu_reset(vcpu);</div><div class='add'>+	kvm_vcpu_reset(vcpu, false);</div><div class='ctx'> 	kvm_mmu_setup(vcpu);</div><div class='ctx'> 	vcpu_put(vcpu);</div><div class='del'>-</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7123,6 +7344,9 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_write_tsc(vcpu, &amp;msr);</div><div class='ctx'> 	vcpu_put(vcpu);</div><div class='ctx'> </div><div class='add'>+	if (!kvmclock_periodic_sync)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	schedule_delayed_work(&amp;kvm-&gt;arch.kvmclock_sync_work,</div><div class='ctx'> 					KVMCLOCK_SYNC_PERIOD);</div><div class='ctx'> }</div><div class='hunk'>@@ -7137,12 +7361,13 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_mmu_unload(vcpu);</div><div class='ctx'> 	vcpu_put(vcpu);</div><div class='ctx'> </div><div class='del'>-	fx_free(vcpu);</div><div class='ctx'> 	kvm_x86_ops-&gt;vcpu_free(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='ctx'> {</div><div class='add'>+	vcpu-&gt;arch.hflags = 0;</div><div class='add'>+</div><div class='ctx'> 	atomic_set(&amp;vcpu-&gt;arch.nmi_queued, 0);</div><div class='ctx'> 	vcpu-&gt;arch.nmi_pending = 0;</div><div class='ctx'> 	vcpu-&gt;arch.nmi_injected = false;</div><div class='hunk'>@@ -7168,13 +7393,16 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_async_pf_hash_reset(vcpu);</div><div class='ctx'> 	vcpu-&gt;arch.apf.halted = false;</div><div class='ctx'> </div><div class='del'>-	kvm_pmu_reset(vcpu);</div><div class='add'>+	if (!init_event) {</div><div class='add'>+		kvm_pmu_reset(vcpu);</div><div class='add'>+		vcpu-&gt;arch.smbase = 0x30000;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	memset(vcpu-&gt;arch.regs, 0, sizeof(vcpu-&gt;arch.regs));</div><div class='ctx'> 	vcpu-&gt;arch.regs_avail = ~0;</div><div class='ctx'> 	vcpu-&gt;arch.regs_dirty = ~0;</div><div class='ctx'> </div><div class='del'>-	kvm_x86_ops-&gt;vcpu_reset(vcpu);</div><div class='add'>+	kvm_x86_ops-&gt;vcpu_reset(vcpu, init_event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)</div><div class='hunk'>@@ -7363,9 +7591,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		goto fail_free_mce_banks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = fx_init(vcpu);</div><div class='del'>-	if (r)</div><div class='del'>-		goto fail_free_wbinvd_dirty_mask;</div><div class='add'>+	fx_init(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.ia32_tsc_adjust_msr = 0x0;</div><div class='ctx'> 	vcpu-&gt;arch.pv_time_enabled = false;</div><div class='hunk'>@@ -7375,12 +7601,13 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);</div><div class='ctx'> </div><div class='add'>+	vcpu-&gt;arch.pat = MSR_IA32_CR_PAT_DEFAULT;</div><div class='add'>+</div><div class='ctx'> 	kvm_async_pf_hash_reset(vcpu);</div><div class='ctx'> 	kvm_pmu_init(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-fail_free_wbinvd_dirty_mask:</div><div class='del'>-	free_cpumask_var(vcpu-&gt;arch.wbinvd_dirty_mask);</div><div class='add'>+</div><div class='ctx'> fail_free_mce_banks:</div><div class='ctx'> 	kfree(vcpu-&gt;arch.mce_banks);</div><div class='ctx'> fail_free_lapic:</div><div class='hunk'>@@ -7482,6 +7709,40 @@ void kvm_arch_sync_events(struct kvm *kvm)</div><div class='ctx'> 	kvm_free_pit(kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int __x86_set_memory_region(struct kvm *kvm,</div><div class='add'>+			    const struct kvm_userspace_memory_region *mem)</div><div class='add'>+{</div><div class='add'>+	int i, r;</div><div class='add'>+</div><div class='add'>+	/* Called with kvm-&gt;slots_lock held.  */</div><div class='add'>+	BUG_ON(mem-&gt;slot &gt;= KVM_MEM_SLOTS_NUM);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVM_ADDRESS_SPACE_NUM; i++) {</div><div class='add'>+		struct kvm_userspace_memory_region m = *mem;</div><div class='add'>+</div><div class='add'>+		m.slot |= i &lt;&lt; 16;</div><div class='add'>+		r = __kvm_set_memory_region(kvm, &amp;m);</div><div class='add'>+		if (r &lt; 0)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__x86_set_memory_region);</div><div class='add'>+</div><div class='add'>+int x86_set_memory_region(struct kvm *kvm,</div><div class='add'>+			  const struct kvm_userspace_memory_region *mem)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	r = __x86_set_memory_region(kvm, mem);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(x86_set_memory_region);</div><div class='add'>+</div><div class='ctx'> void kvm_arch_destroy_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	if (current-&gt;mm == kvm-&gt;mm) {</div><div class='hunk'>@@ -7493,13 +7754,13 @@ void kvm_arch_destroy_vm(struct kvm *kvm)</div><div class='ctx'> 		struct kvm_userspace_memory_region mem;</div><div class='ctx'> 		memset(&amp;mem, 0, sizeof(mem));</div><div class='ctx'> 		mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;</div><div class='del'>-		kvm_set_memory_region(kvm, &amp;mem);</div><div class='add'>+		x86_set_memory_region(kvm, &amp;mem);</div><div class='ctx'> </div><div class='ctx'> 		mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;</div><div class='del'>-		kvm_set_memory_region(kvm, &amp;mem);</div><div class='add'>+		x86_set_memory_region(kvm, &amp;mem);</div><div class='ctx'> </div><div class='ctx'> 		mem.slot = TSS_PRIVATE_MEMSLOT;</div><div class='del'>-		kvm_set_memory_region(kvm, &amp;mem);</div><div class='add'>+		x86_set_memory_region(kvm, &amp;mem);</div><div class='ctx'> 	}</div><div class='ctx'> 	kvm_iommu_unmap_guest(kvm);</div><div class='ctx'> 	kfree(kvm-&gt;arch.vpic);</div><div class='hunk'>@@ -7588,18 +7849,18 @@ out_free:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_arch_memslots_updated(struct kvm *kvm)</div><div class='add'>+void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * memslots-&gt;generation has been incremented.</div><div class='ctx'> 	 * mmio generation may have reached its maximum value.</div><div class='ctx'> 	 */</div><div class='del'>-	kvm_mmu_invalidate_mmio_sptes(kvm);</div><div class='add'>+	kvm_mmu_invalidate_mmio_sptes(kvm, slots);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_memory_slot *memslot,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -7677,14 +7938,14 @@ static void kvm_mmu_slot_apply_flags(struct kvm *kvm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='del'>-				struct kvm_userspace_memory_region *mem,</div><div class='add'>+				const struct kvm_userspace_memory_region *mem,</div><div class='ctx'> 				const struct kvm_memory_slot *old,</div><div class='add'>+				const struct kvm_memory_slot *new,</div><div class='ctx'> 				enum kvm_mr_change change)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_memory_slot *new;</div><div class='ctx'> 	int nr_mmu_pages = 0;</div><div class='ctx'> </div><div class='del'>-	if ((mem-&gt;slot &gt;= KVM_USER_MEM_SLOTS) &amp;&amp; (change == KVM_MR_DELETE)) {</div><div class='add'>+	if (change == KVM_MR_DELETE &amp;&amp; old-&gt;id &gt;= KVM_USER_MEM_SLOTS) {</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = vm_munmap(old-&gt;userspace_addr,</div><div class='hunk'>@@ -7701,9 +7962,6 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> 	if (nr_mmu_pages)</div><div class='ctx'> 		kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);</div><div class='ctx'> </div><div class='del'>-	/* It's OK to get 'new' slot here as it has already been installed */</div><div class='del'>-	new = id_to_memslot(kvm-&gt;memslots, mem-&gt;slot);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Dirty logging tracks sptes in 4k granularity, meaning that large</div><div class='ctx'> 	 * sptes have to be split.  If live migration is successful, the guest</div><div class='hunk'>@@ -7728,9 +7986,11 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> 	 * been zapped so no dirty logging staff is needed for old slot. For</div><div class='ctx'> 	 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the</div><div class='ctx'> 	 * new and it's also covered when dealing with the new slot.</div><div class='add'>+	 *</div><div class='add'>+	 * FIXME: const-ify all uses of struct kvm_memory_slot.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (change != KVM_MR_DELETE)</div><div class='del'>-		kvm_mmu_slot_apply_flags(kvm, new);</div><div class='add'>+		kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_flush_shadow_all(struct kvm *kvm)</div><div class='hunk'>@@ -7952,6 +8212,24 @@ bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			kvm_x86_ops-&gt;interrupt_allowed(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kvm_arch_start_assignment(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	atomic_inc(&amp;kvm-&gt;arch.assigned_device_count);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);</div><div class='add'>+</div><div class='add'>+void kvm_arch_end_assignment(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	atomic_dec(&amp;kvm-&gt;arch.assigned_device_count);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);</div><div class='add'>+</div><div class='add'>+bool kvm_arch_has_assigned_device(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return atomic_read(&amp;kvm-&gt;arch.assigned_device_count);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);</div><div class='add'>+</div><div class='ctx'> void kvm_arch_register_noncoherent_dma(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_inc(&amp;kvm-&gt;arch.noncoherent_dma_count);</div><div class='head'>diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h<br/>index f5fef1868096..edc8cdcd786b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/x86.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/kvm/x86.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/x86.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/kvm/x86.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include "kvm_cache_regs.h"</div><div class='ctx'> </div><div class='add'>+#define MSR_IA32_CR_PAT_DEFAULT  0x0007040600070406ULL</div><div class='add'>+</div><div class='ctx'> static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	vcpu-&gt;arch.exception.pending = false;</div><div class='hunk'>@@ -160,7 +162,13 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	gva_t addr, void *val, unsigned int bytes,</div><div class='ctx'> 	struct x86_exception *exception);</div><div class='ctx'> </div><div class='add'>+void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);</div><div class='add'>+u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);</div><div class='ctx'> bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);</div><div class='add'>+int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);</div><div class='add'>+int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);</div><div class='add'>+bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,</div><div class='add'>+					  int page_num);</div><div class='ctx'> </div><div class='ctx'> #define KVM_SUPPORTED_XCR0     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \</div><div class='ctx'> 				| XSTATE_BNDREGS | XSTATE_BNDCSR \</div><div class='head'>diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c<br/>index 8f9a133cc099..f2dc08c003eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lguest/boot.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lguest/boot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lguest/boot.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lguest/boot.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/stackprotector.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;		/* for struct machine_ops */</div><div class='ctx'> #include &lt;asm/kvm_para.h&gt;</div><div class='hunk'>@@ -90,7 +90,7 @@ struct lguest_data lguest_data = {</div><div class='ctx'> 	.noirq_iret = (u32)lguest_noirq_iret,</div><div class='ctx'> 	.kernel_address = PAGE_OFFSET,</div><div class='ctx'> 	.blocked_interrupts = { 1 }, /* Block timer interrupts */</div><div class='del'>-	.syscall_vec = SYSCALL_VECTOR,</div><div class='add'>+	.syscall_vec = IA32_SYSCALL_VECTOR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*G:037</div><div class='hunk'>@@ -866,7 +866,7 @@ static void __init lguest_init_IRQ(void)</div><div class='ctx'> 	for (i = FIRST_EXTERNAL_VECTOR; i &lt; FIRST_SYSTEM_VECTOR; i++) {</div><div class='ctx'> 		/* Some systems map "vectors" to interrupts weirdly.  Not us! */</div><div class='ctx'> 		__this_cpu_write(vector_irq[i], i - FIRST_EXTERNAL_VECTOR);</div><div class='del'>-		if (i != SYSCALL_VECTOR)</div><div class='add'>+		if (i != IA32_SYSCALL_VECTOR)</div><div class='ctx'> 			set_intr_gate(i, irq_entries_start +</div><div class='ctx'> 					8 * (i - FIRST_EXTERNAL_VECTOR));</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile<br/>index 1530afb07c85..f2587888d987 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/Makefile</a></div><div class='hunk'>@@ -17,7 +17,6 @@ clean-files := inat-tables.c</div><div class='ctx'> obj-$(CONFIG_SMP) += msr-smp.o cache-smp.o</div><div class='ctx'> </div><div class='ctx'> lib-y := delay.o misc.o cmdline.o</div><div class='del'>-lib-y += thunk_$(BITS).o</div><div class='ctx'> lib-y += usercopy_$(BITS).o usercopy.o getuser.o putuser.o</div><div class='ctx'> lib-y += memcpy_$(BITS).o</div><div class='ctx'> lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem.o</div><div class='hunk'>@@ -40,6 +39,6 @@ else</div><div class='ctx'>         lib-y += csum-partial_64.o csum-copy_64.o csum-wrappers_64.o</div><div class='ctx'>         lib-y += clear_page_64.o copy_page_64.o</div><div class='ctx'>         lib-y += memmove_64.o memset_64.o</div><div class='del'>-        lib-y += copy_user_64.o copy_user_nocache_64.o</div><div class='add'>+        lib-y += copy_user_64.o</div><div class='ctx'> 	lib-y += cmpxchg16b_emu.o</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/x86/lib/atomic64_386_32.S b/arch/x86/lib/atomic64_386_32.S<br/>index 00933d5e992f..9b0ca8fe80fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/atomic64_386_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/atomic64_386_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/atomic64_386_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/atomic64_386_32.S</a></div><div class='hunk'>@@ -11,26 +11,23 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* if you want SMP support, implement these with real spinlocks */</div><div class='ctx'> .macro LOCK reg</div><div class='del'>-	pushfl_cfi</div><div class='add'>+	pushfl</div><div class='ctx'> 	cli</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro UNLOCK reg</div><div class='del'>-	popfl_cfi</div><div class='add'>+	popfl</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #define BEGIN(op) \</div><div class='ctx'> .macro endp; \</div><div class='del'>-	CFI_ENDPROC; \</div><div class='ctx'> ENDPROC(atomic64_##op##_386); \</div><div class='ctx'> .purgem endp; \</div><div class='ctx'> .endm; \</div><div class='ctx'> ENTRY(atomic64_##op##_386); \</div><div class='del'>-	CFI_STARTPROC; \</div><div class='ctx'> 	LOCK v;</div><div class='ctx'> </div><div class='ctx'> #define ENDP endp</div><div class='head'>diff --git a/arch/x86/lib/atomic64_cx8_32.S b/arch/x86/lib/atomic64_cx8_32.S<br/>index 082a85167a5b..db3ae85440ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/atomic64_cx8_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/atomic64_cx8_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/atomic64_cx8_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/atomic64_cx8_32.S</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> .macro read64 reg</div><div class='ctx'> 	movl %ebx, %eax</div><div class='hunk'>@@ -22,16 +21,11 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_read_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-</div><div class='ctx'> 	read64 %ecx</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_read_cx8)</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_set_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-</div><div class='ctx'> 1:</div><div class='ctx'> /* we don't need LOCK_PREFIX since aligned 64-bit writes</div><div class='ctx'>  * are atomic on 586 and newer */</div><div class='hunk'>@@ -39,28 +33,23 @@ ENTRY(atomic64_set_cx8)</div><div class='ctx'> 	jne 1b</div><div class='ctx'> </div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_set_cx8)</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_xchg_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-</div><div class='ctx'> 1:</div><div class='ctx'> 	LOCK_PREFIX</div><div class='ctx'> 	cmpxchg8b (%esi)</div><div class='ctx'> 	jne 1b</div><div class='ctx'> </div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_xchg_cx8)</div><div class='ctx'> </div><div class='ctx'> .macro addsub_return func ins insc</div><div class='ctx'> ENTRY(atomic64_\func\()_return_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebp</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg edi</div><div class='add'>+	pushl %ebp</div><div class='add'>+	pushl %ebx</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %edi</div><div class='ctx'> </div><div class='ctx'> 	movl %eax, %esi</div><div class='ctx'> 	movl %edx, %edi</div><div class='hunk'>@@ -79,12 +68,11 @@ ENTRY(atomic64_\func\()_return_cx8)</div><div class='ctx'> 10:</div><div class='ctx'> 	movl %ebx, %eax</div><div class='ctx'> 	movl %ecx, %edx</div><div class='del'>-	popl_cfi_reg edi</div><div class='del'>-	popl_cfi_reg esi</div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg ebp</div><div class='add'>+	popl %edi</div><div class='add'>+	popl %esi</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %ebp</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_\func\()_return_cx8)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -93,8 +81,7 @@ addsub_return sub sub sbb</div><div class='ctx'> </div><div class='ctx'> .macro incdec_return func ins insc</div><div class='ctx'> ENTRY(atomic64_\func\()_return_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %ebx</div><div class='ctx'> </div><div class='ctx'> 	read64 %esi</div><div class='ctx'> 1:</div><div class='hunk'>@@ -109,9 +96,8 @@ ENTRY(atomic64_\func\()_return_cx8)</div><div class='ctx'> 10:</div><div class='ctx'> 	movl %ebx, %eax</div><div class='ctx'> 	movl %ecx, %edx</div><div class='del'>-	popl_cfi_reg ebx</div><div class='add'>+	popl %ebx</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_\func\()_return_cx8)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -119,8 +105,7 @@ incdec_return inc add adc</div><div class='ctx'> incdec_return dec sub sbb</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_dec_if_positive_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %ebx</div><div class='ctx'> </div><div class='ctx'> 	read64 %esi</div><div class='ctx'> 1:</div><div class='hunk'>@@ -136,18 +121,16 @@ ENTRY(atomic64_dec_if_positive_cx8)</div><div class='ctx'> 2:</div><div class='ctx'> 	movl %ebx, %eax</div><div class='ctx'> 	movl %ecx, %edx</div><div class='del'>-	popl_cfi_reg ebx</div><div class='add'>+	popl %ebx</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_dec_if_positive_cx8)</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_add_unless_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebp</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %ebp</div><div class='add'>+	pushl %ebx</div><div class='ctx'> /* these just push these two parameters on the stack */</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi_reg ecx</div><div class='add'>+	pushl %edi</div><div class='add'>+	pushl %ecx</div><div class='ctx'> </div><div class='ctx'> 	movl %eax, %ebp</div><div class='ctx'> 	movl %edx, %edi</div><div class='hunk'>@@ -168,21 +151,18 @@ ENTRY(atomic64_add_unless_cx8)</div><div class='ctx'> 	movl $1, %eax</div><div class='ctx'> 3:</div><div class='ctx'> 	addl $8, %esp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -8</div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg ebp</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %ebp</div><div class='ctx'> 	ret</div><div class='ctx'> 4:</div><div class='ctx'> 	cmpl %edx, 4(%esp)</div><div class='ctx'> 	jne 2b</div><div class='ctx'> 	xorl %eax, %eax</div><div class='ctx'> 	jmp 3b</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_add_unless_cx8)</div><div class='ctx'> </div><div class='ctx'> ENTRY(atomic64_inc_not_zero_cx8)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %ebx</div><div class='ctx'> </div><div class='ctx'> 	read64 %esi</div><div class='ctx'> 1:</div><div class='hunk'>@@ -199,7 +179,6 @@ ENTRY(atomic64_inc_not_zero_cx8)</div><div class='ctx'> </div><div class='ctx'> 	movl $1, %eax</div><div class='ctx'> 3:</div><div class='del'>-	popl_cfi_reg ebx</div><div class='add'>+	popl %ebx</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(atomic64_inc_not_zero_cx8)</div><div class='head'>diff --git a/arch/x86/lib/checksum_32.S b/arch/x86/lib/checksum_32.S<br/>index 9bc944a91274..c1e623209853 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/checksum_32.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/checksum_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/checksum_32.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/checksum_32.S</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> 				</div><div class='hunk'>@@ -50,9 +49,8 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum)</div><div class='ctx'> 	   * alignment for the unrolled loop.</div><div class='ctx'> 	   */		</div><div class='ctx'> ENTRY(csum_partial)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %ebx</div><div class='ctx'> 	movl 20(%esp),%eax	# Function arg: unsigned int sum</div><div class='ctx'> 	movl 16(%esp),%ecx	# Function arg: int len</div><div class='ctx'> 	movl 12(%esp),%esi	# Function arg: unsigned char *buff</div><div class='hunk'>@@ -129,10 +127,9 @@ ENTRY(csum_partial)</div><div class='ctx'> 	jz 8f</div><div class='ctx'> 	roll $8, %eax</div><div class='ctx'> 8:</div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg esi</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %esi</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(csum_partial)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -140,9 +137,8 @@ ENDPROC(csum_partial)</div><div class='ctx'> /* Version for PentiumII/PPro */</div><div class='ctx'> </div><div class='ctx'> ENTRY(csum_partial)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %ebx</div><div class='ctx'> 	movl 20(%esp),%eax	# Function arg: unsigned int sum</div><div class='ctx'> 	movl 16(%esp),%ecx	# Function arg: int len</div><div class='ctx'> 	movl 12(%esp),%esi	# Function arg:	const unsigned char *buf</div><div class='hunk'>@@ -249,10 +245,9 @@ ENTRY(csum_partial)</div><div class='ctx'> 	jz 90f</div><div class='ctx'> 	roll $8, %eax</div><div class='ctx'> 90: </div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg esi</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %esi</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(csum_partial)</div><div class='ctx'> 				</div><div class='ctx'> #endif</div><div class='hunk'>@@ -287,12 +282,10 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst,</div><div class='ctx'> #define FP		12</div><div class='ctx'> 		</div><div class='ctx'> ENTRY(csum_partial_copy_generic)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	subl  $4,%esp	</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 4</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='add'>+	pushl %edi</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %ebx</div><div class='ctx'> 	movl ARGBASE+16(%esp),%eax	# sum</div><div class='ctx'> 	movl ARGBASE+12(%esp),%ecx	# len</div><div class='ctx'> 	movl ARGBASE+4(%esp),%esi	# src</div><div class='hunk'>@@ -401,12 +394,11 @@ DST(	movb %cl, (%edi)	)</div><div class='ctx'> </div><div class='ctx'> .previous</div><div class='ctx'> </div><div class='del'>-	popl_cfi_reg ebx</div><div class='del'>-	popl_cfi_reg esi</div><div class='del'>-	popl_cfi_reg edi</div><div class='del'>-	popl_cfi %ecx			# equivalent to addl $4,%esp</div><div class='add'>+	popl %ebx</div><div class='add'>+	popl %esi</div><div class='add'>+	popl %edi</div><div class='add'>+	popl %ecx			# equivalent to addl $4,%esp</div><div class='ctx'> 	ret	</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(csum_partial_copy_generic)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -426,10 +418,9 @@ ENDPROC(csum_partial_copy_generic)</div><div class='ctx'> #define ARGBASE 12</div><div class='ctx'> 		</div><div class='ctx'> ENTRY(csum_partial_copy_generic)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi_reg esi</div><div class='add'>+	pushl %ebx</div><div class='add'>+	pushl %edi</div><div class='add'>+	pushl %esi</div><div class='ctx'> 	movl ARGBASE+4(%esp),%esi	#src</div><div class='ctx'> 	movl ARGBASE+8(%esp),%edi	#dst	</div><div class='ctx'> 	movl ARGBASE+12(%esp),%ecx	#len</div><div class='hunk'>@@ -489,11 +480,10 @@ DST(	movb %dl, (%edi)         )</div><div class='ctx'> 	jmp  7b			</div><div class='ctx'> .previous				</div><div class='ctx'> </div><div class='del'>-	popl_cfi_reg esi</div><div class='del'>-	popl_cfi_reg edi</div><div class='del'>-	popl_cfi_reg ebx</div><div class='add'>+	popl %esi</div><div class='add'>+	popl %edi</div><div class='add'>+	popl %ebx</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(csum_partial_copy_generic)</div><div class='ctx'> 				</div><div class='ctx'> #undef ROUND</div><div class='head'>diff --git a/arch/x86/lib/clear_page_64.S b/arch/x86/lib/clear_page_64.S<br/>index e67e579c93bd..a2fe51b00cce 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/clear_page_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/clear_page_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/clear_page_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/clear_page_64.S</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -15,7 +14,6 @@</div><div class='ctx'>  * %rdi	- page</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(clear_page)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> 	ALTERNATIVE_2 "jmp clear_page_orig", "", X86_FEATURE_REP_GOOD, \</div><div class='ctx'> 		      "jmp clear_page_c_e", X86_FEATURE_ERMS</div><div class='hunk'>@@ -24,11 +22,9 @@ ENTRY(clear_page)</div><div class='ctx'> 	xorl %eax,%eax</div><div class='ctx'> 	rep stosq</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(clear_page)</div><div class='ctx'> </div><div class='ctx'> ENTRY(clear_page_orig)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> 	xorl   %eax,%eax</div><div class='ctx'> 	movl   $4096/64,%ecx</div><div class='hunk'>@@ -48,14 +44,11 @@ ENTRY(clear_page_orig)</div><div class='ctx'> 	jnz	.Lloop</div><div class='ctx'> 	nop</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(clear_page_orig)</div><div class='ctx'> </div><div class='ctx'> ENTRY(clear_page_c_e)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movl $4096,%ecx</div><div class='ctx'> 	xorl %eax,%eax</div><div class='ctx'> 	rep stosb</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(clear_page_c_e)</div><div class='head'>diff --git a/arch/x86/lib/cmpxchg16b_emu.S b/arch/x86/lib/cmpxchg16b_emu.S<br/>index 40a172541ee2..9b330242e740 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/cmpxchg16b_emu.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/cmpxchg16b_emu.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/cmpxchg16b_emu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/cmpxchg16b_emu.S</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='hunk'>@@ -21,7 +20,6 @@</div><div class='ctx'>  * %al  : Operation successful</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(this_cpu_cmpxchg16b_emu)</div><div class='del'>-CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Emulate 'cmpxchg16b %gs:(%rsi)' except we return the result in %al not</div><div class='hunk'>@@ -32,7 +30,7 @@ CFI_STARTPROC</div><div class='ctx'> # *atomic* on a single cpu (as provided by the this_cpu_xx class of</div><div class='ctx'> # macros).</div><div class='ctx'> #</div><div class='del'>-	pushfq_cfi</div><div class='add'>+	pushfq</div><div class='ctx'> 	cli</div><div class='ctx'> </div><div class='ctx'> 	cmpq PER_CPU_VAR((%rsi)), %rax</div><div class='hunk'>@@ -43,17 +41,13 @@ CFI_STARTPROC</div><div class='ctx'> 	movq %rbx, PER_CPU_VAR((%rsi))</div><div class='ctx'> 	movq %rcx, PER_CPU_VAR(8(%rsi))</div><div class='ctx'> </div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	popfq_cfi</div><div class='add'>+	popfq</div><div class='ctx'> 	mov $1, %al</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> .Lnot_same:</div><div class='del'>-	popfq_cfi</div><div class='add'>+	popfq</div><div class='ctx'> 	xor %al,%al</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-CFI_ENDPROC</div><div class='del'>-</div><div class='ctx'> ENDPROC(this_cpu_cmpxchg16b_emu)</div><div class='head'>diff --git a/arch/x86/lib/cmpxchg8b_emu.S b/arch/x86/lib/cmpxchg8b_emu.S<br/>index b4807fce5177..ad5349778490 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/cmpxchg8b_emu.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/cmpxchg8b_emu.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/cmpxchg8b_emu.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/cmpxchg8b_emu.S</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> </div><div class='hunk'>@@ -20,14 +19,13 @@</div><div class='ctx'>  * %ecx : high 32 bits of new value</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(cmpxchg8b_emu)</div><div class='del'>-CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Emulate 'cmpxchg8b (%esi)' on UP except we don't</div><div class='ctx'> # set the whole ZF thing (caller will just compare</div><div class='ctx'> # eax:edx with the expected value)</div><div class='ctx'> #</div><div class='del'>-	pushfl_cfi</div><div class='add'>+	pushfl</div><div class='ctx'> 	cli</div><div class='ctx'> </div><div class='ctx'> 	cmpl  (%esi), %eax</div><div class='hunk'>@@ -38,18 +36,15 @@ CFI_STARTPROC</div><div class='ctx'> 	movl %ebx,  (%esi)</div><div class='ctx'> 	movl %ecx, 4(%esi)</div><div class='ctx'> </div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='del'>-	popfl_cfi</div><div class='add'>+	popfl</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> .Lnot_same:</div><div class='ctx'> 	movl  (%esi), %eax</div><div class='ctx'> .Lhalf_same:</div><div class='ctx'> 	movl 4(%esi), %edx</div><div class='ctx'> </div><div class='del'>-	popfl_cfi</div><div class='add'>+	popfl</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-CFI_ENDPROC</div><div class='ctx'> ENDPROC(cmpxchg8b_emu)</div><div class='head'>diff --git a/arch/x86/lib/copy_page_64.S b/arch/x86/lib/copy_page_64.S<br/>index 8239dbcbf984..009f98216b7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/copy_page_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/copy_page_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/copy_page_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/copy_page_64.S</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> /* Written 2003 by Andi Kleen, based on a kernel by Evandro Menezes */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -13,22 +12,16 @@</div><div class='ctx'>  */</div><div class='ctx'> 	ALIGN</div><div class='ctx'> ENTRY(copy_page)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	ALTERNATIVE "jmp copy_page_regs", "", X86_FEATURE_REP_GOOD</div><div class='ctx'> 	movl	$4096/8, %ecx</div><div class='ctx'> 	rep	movsq</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_page)</div><div class='ctx'> </div><div class='ctx'> ENTRY(copy_page_regs)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	subq	$2*8,	%rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 2*8</div><div class='ctx'> 	movq	%rbx,	(%rsp)</div><div class='del'>-	CFI_REL_OFFSET rbx, 0</div><div class='ctx'> 	movq	%r12,	1*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET r12, 1*8</div><div class='ctx'> </div><div class='ctx'> 	movl	$(4096/64)-5,	%ecx</div><div class='ctx'> 	.p2align 4</div><div class='hunk'>@@ -87,11 +80,7 @@ ENTRY(copy_page_regs)</div><div class='ctx'> 	jnz	.Loop2</div><div class='ctx'> </div><div class='ctx'> 	movq	(%rsp), %rbx</div><div class='del'>-	CFI_RESTORE rbx</div><div class='ctx'> 	movq	1*8(%rsp), %r12</div><div class='del'>-	CFI_RESTORE r12</div><div class='ctx'> 	addq	$2*8, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -2*8</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_page_regs)</div><div class='head'>diff --git a/arch/x86/lib/copy_user_64.S b/arch/x86/lib/copy_user_64.S<br/>index fa997dfaef24..982ce34f4a9b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/copy_user_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/copy_user_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/copy_user_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/copy_user_64.S</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='hunk'>@@ -16,33 +15,8 @@</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/smap.h&gt;</div><div class='ctx'> </div><div class='del'>-	.macro ALIGN_DESTINATION</div><div class='del'>-	/* check for bad alignment of destination */</div><div class='del'>-	movl %edi,%ecx</div><div class='del'>-	andl $7,%ecx</div><div class='del'>-	jz 102f				/* already aligned */</div><div class='del'>-	subl $8,%ecx</div><div class='del'>-	negl %ecx</div><div class='del'>-	subl %ecx,%edx</div><div class='del'>-100:	movb (%rsi),%al</div><div class='del'>-101:	movb %al,(%rdi)</div><div class='del'>-	incq %rsi</div><div class='del'>-	incq %rdi</div><div class='del'>-	decl %ecx</div><div class='del'>-	jnz 100b</div><div class='del'>-102:</div><div class='del'>-	.section .fixup,"ax"</div><div class='del'>-103:	addl %ecx,%edx			/* ecx is zerorest also */</div><div class='del'>-	jmp copy_user_handle_tail</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	_ASM_EXTABLE(100b,103b)</div><div class='del'>-	_ASM_EXTABLE(101b,103b)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='ctx'> /* Standard copy_to_user with segment limit checking */</div><div class='ctx'> ENTRY(_copy_to_user)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	GET_THREAD_INFO(%rax)</div><div class='ctx'> 	movq %rdi,%rcx</div><div class='ctx'> 	addq %rdx,%rcx</div><div class='hunk'>@@ -54,12 +28,10 @@ ENTRY(_copy_to_user)</div><div class='ctx'> 		      X86_FEATURE_REP_GOOD,			\</div><div class='ctx'> 		      "jmp copy_user_enhanced_fast_string",	\</div><div class='ctx'> 		      X86_FEATURE_ERMS</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(_copy_to_user)</div><div class='ctx'> </div><div class='ctx'> /* Standard copy_from_user with segment limit checking */</div><div class='ctx'> ENTRY(_copy_from_user)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	GET_THREAD_INFO(%rax)</div><div class='ctx'> 	movq %rsi,%rcx</div><div class='ctx'> 	addq %rdx,%rcx</div><div class='hunk'>@@ -71,14 +43,12 @@ ENTRY(_copy_from_user)</div><div class='ctx'> 		      X86_FEATURE_REP_GOOD,			\</div><div class='ctx'> 		      "jmp copy_user_enhanced_fast_string",	\</div><div class='ctx'> 		      X86_FEATURE_ERMS</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(_copy_from_user)</div><div class='ctx'> </div><div class='ctx'> 	.section .fixup,"ax"</div><div class='ctx'> 	/* must zero dest */</div><div class='ctx'> ENTRY(bad_from_user)</div><div class='ctx'> bad_from_user:</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movl %edx,%ecx</div><div class='ctx'> 	xorl %eax,%eax</div><div class='ctx'> 	rep</div><div class='hunk'>@@ -86,7 +56,6 @@ bad_from_user:</div><div class='ctx'> bad_to_user:</div><div class='ctx'> 	movl %edx,%eax</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(bad_from_user)</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='hunk'>@@ -104,7 +73,6 @@ ENDPROC(bad_from_user)</div><div class='ctx'>  * eax uncopied bytes or 0 if successful.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(copy_user_generic_unrolled)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	ASM_STAC</div><div class='ctx'> 	cmpl $8,%edx</div><div class='ctx'> 	jb 20f		/* less then 8 bytes, go to byte copy loop */</div><div class='hunk'>@@ -186,7 +154,6 @@ ENTRY(copy_user_generic_unrolled)</div><div class='ctx'> 	_ASM_EXTABLE(19b,40b)</div><div class='ctx'> 	_ASM_EXTABLE(21b,50b)</div><div class='ctx'> 	_ASM_EXTABLE(22b,50b)</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_generic_unrolled)</div><div class='ctx'> </div><div class='ctx'> /* Some CPUs run faster using the string copy instructions.</div><div class='hunk'>@@ -208,7 +175,6 @@ ENDPROC(copy_user_generic_unrolled)</div><div class='ctx'>  * eax uncopied bytes or 0 if successful.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(copy_user_generic_string)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	ASM_STAC</div><div class='ctx'> 	cmpl $8,%edx</div><div class='ctx'> 	jb 2f		/* less than 8 bytes, go to byte copy loop */</div><div class='hunk'>@@ -233,7 +199,6 @@ ENTRY(copy_user_generic_string)</div><div class='ctx'> </div><div class='ctx'> 	_ASM_EXTABLE(1b,11b)</div><div class='ctx'> 	_ASM_EXTABLE(3b,12b)</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_generic_string)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -249,7 +214,6 @@ ENDPROC(copy_user_generic_string)</div><div class='ctx'>  * eax uncopied bytes or 0 if successful.</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(copy_user_enhanced_fast_string)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	ASM_STAC</div><div class='ctx'> 	movl %edx,%ecx</div><div class='ctx'> 1:	rep</div><div class='hunk'>@@ -264,5 +228,94 @@ ENTRY(copy_user_enhanced_fast_string)</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='ctx'> 	_ASM_EXTABLE(1b,12b)</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_enhanced_fast_string)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * copy_user_nocache - Uncached memory copy with exception handling</div><div class='add'>+ * This will force destination/source out of cache for more performance.</div><div class='add'>+ */</div><div class='add'>+ENTRY(__copy_user_nocache)</div><div class='add'>+	ASM_STAC</div><div class='add'>+	cmpl $8,%edx</div><div class='add'>+	jb 20f		/* less then 8 bytes, go to byte copy loop */</div><div class='add'>+	ALIGN_DESTINATION</div><div class='add'>+	movl %edx,%ecx</div><div class='add'>+	andl $63,%edx</div><div class='add'>+	shrl $6,%ecx</div><div class='add'>+	jz 17f</div><div class='add'>+1:	movq (%rsi),%r8</div><div class='add'>+2:	movq 1*8(%rsi),%r9</div><div class='add'>+3:	movq 2*8(%rsi),%r10</div><div class='add'>+4:	movq 3*8(%rsi),%r11</div><div class='add'>+5:	movnti %r8,(%rdi)</div><div class='add'>+6:	movnti %r9,1*8(%rdi)</div><div class='add'>+7:	movnti %r10,2*8(%rdi)</div><div class='add'>+8:	movnti %r11,3*8(%rdi)</div><div class='add'>+9:	movq 4*8(%rsi),%r8</div><div class='add'>+10:	movq 5*8(%rsi),%r9</div><div class='add'>+11:	movq 6*8(%rsi),%r10</div><div class='add'>+12:	movq 7*8(%rsi),%r11</div><div class='add'>+13:	movnti %r8,4*8(%rdi)</div><div class='add'>+14:	movnti %r9,5*8(%rdi)</div><div class='add'>+15:	movnti %r10,6*8(%rdi)</div><div class='add'>+16:	movnti %r11,7*8(%rdi)</div><div class='add'>+	leaq 64(%rsi),%rsi</div><div class='add'>+	leaq 64(%rdi),%rdi</div><div class='add'>+	decl %ecx</div><div class='add'>+	jnz 1b</div><div class='add'>+17:	movl %edx,%ecx</div><div class='add'>+	andl $7,%edx</div><div class='add'>+	shrl $3,%ecx</div><div class='add'>+	jz 20f</div><div class='add'>+18:	movq (%rsi),%r8</div><div class='add'>+19:	movnti %r8,(%rdi)</div><div class='add'>+	leaq 8(%rsi),%rsi</div><div class='add'>+	leaq 8(%rdi),%rdi</div><div class='add'>+	decl %ecx</div><div class='add'>+	jnz 18b</div><div class='add'>+20:	andl %edx,%edx</div><div class='add'>+	jz 23f</div><div class='add'>+	movl %edx,%ecx</div><div class='add'>+21:	movb (%rsi),%al</div><div class='add'>+22:	movb %al,(%rdi)</div><div class='add'>+	incq %rsi</div><div class='add'>+	incq %rdi</div><div class='add'>+	decl %ecx</div><div class='add'>+	jnz 21b</div><div class='add'>+23:	xorl %eax,%eax</div><div class='add'>+	ASM_CLAC</div><div class='add'>+	sfence</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+	.section .fixup,"ax"</div><div class='add'>+30:	shll $6,%ecx</div><div class='add'>+	addl %ecx,%edx</div><div class='add'>+	jmp 60f</div><div class='add'>+40:	lea (%rdx,%rcx,8),%rdx</div><div class='add'>+	jmp 60f</div><div class='add'>+50:	movl %ecx,%edx</div><div class='add'>+60:	sfence</div><div class='add'>+	jmp copy_user_handle_tail</div><div class='add'>+	.previous</div><div class='add'>+</div><div class='add'>+	_ASM_EXTABLE(1b,30b)</div><div class='add'>+	_ASM_EXTABLE(2b,30b)</div><div class='add'>+	_ASM_EXTABLE(3b,30b)</div><div class='add'>+	_ASM_EXTABLE(4b,30b)</div><div class='add'>+	_ASM_EXTABLE(5b,30b)</div><div class='add'>+	_ASM_EXTABLE(6b,30b)</div><div class='add'>+	_ASM_EXTABLE(7b,30b)</div><div class='add'>+	_ASM_EXTABLE(8b,30b)</div><div class='add'>+	_ASM_EXTABLE(9b,30b)</div><div class='add'>+	_ASM_EXTABLE(10b,30b)</div><div class='add'>+	_ASM_EXTABLE(11b,30b)</div><div class='add'>+	_ASM_EXTABLE(12b,30b)</div><div class='add'>+	_ASM_EXTABLE(13b,30b)</div><div class='add'>+	_ASM_EXTABLE(14b,30b)</div><div class='add'>+	_ASM_EXTABLE(15b,30b)</div><div class='add'>+	_ASM_EXTABLE(16b,30b)</div><div class='add'>+	_ASM_EXTABLE(18b,40b)</div><div class='add'>+	_ASM_EXTABLE(19b,40b)</div><div class='add'>+	_ASM_EXTABLE(21b,50b)</div><div class='add'>+	_ASM_EXTABLE(22b,50b)</div><div class='add'>+ENDPROC(__copy_user_nocache)</div><div class='head'>diff --git a/arch/x86/lib/copy_user_nocache_64.S b/arch/x86/lib/copy_user_nocache_64.S<br/>deleted file mode 100644<br/>index 6a4f43c2d9e6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/copy_user_nocache_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/copy_user_nocache_64.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,136 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2008 Vitaly Mayatskikh &lt;vmayatsk@redhat.com&gt;</div><div class='del'>- * Copyright 2002 Andi Kleen, SuSE Labs.</div><div class='del'>- * Subject to the GNU Public License v2.</div><div class='del'>- *</div><div class='del'>- * Functions to copy from and to user space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='del'>-</div><div class='del'>-#define FIX_ALIGNMENT 1</div><div class='del'>-</div><div class='del'>-#include &lt;asm/current.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/thread_info.h&gt;</div><div class='del'>-#include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/smap.h&gt;</div><div class='del'>-</div><div class='del'>-	.macro ALIGN_DESTINATION</div><div class='del'>-#ifdef FIX_ALIGNMENT</div><div class='del'>-	/* check for bad alignment of destination */</div><div class='del'>-	movl %edi,%ecx</div><div class='del'>-	andl $7,%ecx</div><div class='del'>-	jz 102f				/* already aligned */</div><div class='del'>-	subl $8,%ecx</div><div class='del'>-	negl %ecx</div><div class='del'>-	subl %ecx,%edx</div><div class='del'>-100:	movb (%rsi),%al</div><div class='del'>-101:	movb %al,(%rdi)</div><div class='del'>-	incq %rsi</div><div class='del'>-	incq %rdi</div><div class='del'>-	decl %ecx</div><div class='del'>-	jnz 100b</div><div class='del'>-102:</div><div class='del'>-	.section .fixup,"ax"</div><div class='del'>-103:	addl %ecx,%edx			/* ecx is zerorest also */</div><div class='del'>-	jmp copy_user_handle_tail</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	_ASM_EXTABLE(100b,103b)</div><div class='del'>-	_ASM_EXTABLE(101b,103b)</div><div class='del'>-#endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * copy_user_nocache - Uncached memory copy with exception handling</div><div class='del'>- * This will force destination/source out of cache for more performance.</div><div class='del'>- */</div><div class='del'>-ENTRY(__copy_user_nocache)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	ASM_STAC</div><div class='del'>-	cmpl $8,%edx</div><div class='del'>-	jb 20f		/* less then 8 bytes, go to byte copy loop */</div><div class='del'>-	ALIGN_DESTINATION</div><div class='del'>-	movl %edx,%ecx</div><div class='del'>-	andl $63,%edx</div><div class='del'>-	shrl $6,%ecx</div><div class='del'>-	jz 17f</div><div class='del'>-1:	movq (%rsi),%r8</div><div class='del'>-2:	movq 1*8(%rsi),%r9</div><div class='del'>-3:	movq 2*8(%rsi),%r10</div><div class='del'>-4:	movq 3*8(%rsi),%r11</div><div class='del'>-5:	movnti %r8,(%rdi)</div><div class='del'>-6:	movnti %r9,1*8(%rdi)</div><div class='del'>-7:	movnti %r10,2*8(%rdi)</div><div class='del'>-8:	movnti %r11,3*8(%rdi)</div><div class='del'>-9:	movq 4*8(%rsi),%r8</div><div class='del'>-10:	movq 5*8(%rsi),%r9</div><div class='del'>-11:	movq 6*8(%rsi),%r10</div><div class='del'>-12:	movq 7*8(%rsi),%r11</div><div class='del'>-13:	movnti %r8,4*8(%rdi)</div><div class='del'>-14:	movnti %r9,5*8(%rdi)</div><div class='del'>-15:	movnti %r10,6*8(%rdi)</div><div class='del'>-16:	movnti %r11,7*8(%rdi)</div><div class='del'>-	leaq 64(%rsi),%rsi</div><div class='del'>-	leaq 64(%rdi),%rdi</div><div class='del'>-	decl %ecx</div><div class='del'>-	jnz 1b</div><div class='del'>-17:	movl %edx,%ecx</div><div class='del'>-	andl $7,%edx</div><div class='del'>-	shrl $3,%ecx</div><div class='del'>-	jz 20f</div><div class='del'>-18:	movq (%rsi),%r8</div><div class='del'>-19:	movnti %r8,(%rdi)</div><div class='del'>-	leaq 8(%rsi),%rsi</div><div class='del'>-	leaq 8(%rdi),%rdi</div><div class='del'>-	decl %ecx</div><div class='del'>-	jnz 18b</div><div class='del'>-20:	andl %edx,%edx</div><div class='del'>-	jz 23f</div><div class='del'>-	movl %edx,%ecx</div><div class='del'>-21:	movb (%rsi),%al</div><div class='del'>-22:	movb %al,(%rdi)</div><div class='del'>-	incq %rsi</div><div class='del'>-	incq %rdi</div><div class='del'>-	decl %ecx</div><div class='del'>-	jnz 21b</div><div class='del'>-23:	xorl %eax,%eax</div><div class='del'>-	ASM_CLAC</div><div class='del'>-	sfence</div><div class='del'>-	ret</div><div class='del'>-</div><div class='del'>-	.section .fixup,"ax"</div><div class='del'>-30:	shll $6,%ecx</div><div class='del'>-	addl %ecx,%edx</div><div class='del'>-	jmp 60f</div><div class='del'>-40:	lea (%rdx,%rcx,8),%rdx</div><div class='del'>-	jmp 60f</div><div class='del'>-50:	movl %ecx,%edx</div><div class='del'>-60:	sfence</div><div class='del'>-	jmp copy_user_handle_tail</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	_ASM_EXTABLE(1b,30b)</div><div class='del'>-	_ASM_EXTABLE(2b,30b)</div><div class='del'>-	_ASM_EXTABLE(3b,30b)</div><div class='del'>-	_ASM_EXTABLE(4b,30b)</div><div class='del'>-	_ASM_EXTABLE(5b,30b)</div><div class='del'>-	_ASM_EXTABLE(6b,30b)</div><div class='del'>-	_ASM_EXTABLE(7b,30b)</div><div class='del'>-	_ASM_EXTABLE(8b,30b)</div><div class='del'>-	_ASM_EXTABLE(9b,30b)</div><div class='del'>-	_ASM_EXTABLE(10b,30b)</div><div class='del'>-	_ASM_EXTABLE(11b,30b)</div><div class='del'>-	_ASM_EXTABLE(12b,30b)</div><div class='del'>-	_ASM_EXTABLE(13b,30b)</div><div class='del'>-	_ASM_EXTABLE(14b,30b)</div><div class='del'>-	_ASM_EXTABLE(15b,30b)</div><div class='del'>-	_ASM_EXTABLE(16b,30b)</div><div class='del'>-	_ASM_EXTABLE(18b,40b)</div><div class='del'>-	_ASM_EXTABLE(19b,40b)</div><div class='del'>-	_ASM_EXTABLE(21b,50b)</div><div class='del'>-	_ASM_EXTABLE(22b,50b)</div><div class='del'>-	CFI_ENDPROC</div><div class='del'>-ENDPROC(__copy_user_nocache)</div><div class='head'>diff --git a/arch/x86/lib/csum-copy_64.S b/arch/x86/lib/csum-copy_64.S<br/>index 9734182966f3..7e48807b2fa1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/csum-copy_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/csum-copy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/csum-copy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/csum-copy_64.S</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  * for more details. No warranty for anything given at all.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -47,23 +46,16 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> ENTRY(csum_partial_copy_generic)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	cmpl	$3*64, %edx</div><div class='ctx'> 	jle	.Lignore</div><div class='ctx'> </div><div class='ctx'> .Lignore:</div><div class='ctx'> 	subq  $7*8, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET 7*8</div><div class='ctx'> 	movq  %rbx, 2*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET rbx, 2*8</div><div class='ctx'> 	movq  %r12, 3*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET r12, 3*8</div><div class='ctx'> 	movq  %r14, 4*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET r14, 4*8</div><div class='ctx'> 	movq  %r13, 5*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET r13, 5*8</div><div class='ctx'> 	movq  %rbp, 6*8(%rsp)</div><div class='del'>-	CFI_REL_OFFSET rbp, 6*8</div><div class='ctx'> </div><div class='ctx'> 	movq  %r8, (%rsp)</div><div class='ctx'> 	movq  %r9, 1*8(%rsp)</div><div class='hunk'>@@ -206,22 +198,14 @@ ENTRY(csum_partial_copy_generic)</div><div class='ctx'> 	addl %ebx, %eax</div><div class='ctx'> 	adcl %r9d, %eax		/* carry */</div><div class='ctx'> </div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='ctx'> .Lende:</div><div class='ctx'> 	movq 2*8(%rsp), %rbx</div><div class='del'>-	CFI_RESTORE rbx</div><div class='ctx'> 	movq 3*8(%rsp), %r12</div><div class='del'>-	CFI_RESTORE r12</div><div class='ctx'> 	movq 4*8(%rsp), %r14</div><div class='del'>-	CFI_RESTORE r14</div><div class='ctx'> 	movq 5*8(%rsp), %r13</div><div class='del'>-	CFI_RESTORE r13</div><div class='ctx'> 	movq 6*8(%rsp), %rbp</div><div class='del'>-	CFI_RESTORE rbp</div><div class='ctx'> 	addq $7*8, %rsp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -7*8</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> </div><div class='ctx'> 	/* Exception handlers. Very simple, zeroing is done in the wrappers */</div><div class='ctx'> .Lbad_source:</div><div class='hunk'>@@ -237,5 +221,4 @@ ENTRY(csum_partial_copy_generic)</div><div class='ctx'> 	jz   .Lende</div><div class='ctx'> 	movl $-EFAULT, (%rax)</div><div class='ctx'> 	jmp .Lende</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(csum_partial_copy_generic)</div><div class='head'>diff --git a/arch/x86/lib/getuser.S b/arch/x86/lib/getuser.S<br/>index a4512359656a..46668cda4ffd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/getuser.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/getuser.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/getuser.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/getuser.S</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/page_types.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='hunk'>@@ -36,7 +35,6 @@</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='ctx'> ENTRY(__get_user_1)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	GET_THREAD_INFO(%_ASM_DX)</div><div class='ctx'> 	cmp TI_addr_limit(%_ASM_DX),%_ASM_AX</div><div class='ctx'> 	jae bad_get_user</div><div class='hunk'>@@ -45,11 +43,9 @@ ENTRY(__get_user_1)</div><div class='ctx'> 	xor %eax,%eax</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__get_user_1)</div><div class='ctx'> </div><div class='ctx'> ENTRY(__get_user_2)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	add $1,%_ASM_AX</div><div class='ctx'> 	jc bad_get_user</div><div class='ctx'> 	GET_THREAD_INFO(%_ASM_DX)</div><div class='hunk'>@@ -60,11 +56,9 @@ ENTRY(__get_user_2)</div><div class='ctx'> 	xor %eax,%eax</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__get_user_2)</div><div class='ctx'> </div><div class='ctx'> ENTRY(__get_user_4)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	add $3,%_ASM_AX</div><div class='ctx'> 	jc bad_get_user</div><div class='ctx'> 	GET_THREAD_INFO(%_ASM_DX)</div><div class='hunk'>@@ -75,11 +69,9 @@ ENTRY(__get_user_4)</div><div class='ctx'> 	xor %eax,%eax</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__get_user_4)</div><div class='ctx'> </div><div class='ctx'> ENTRY(__get_user_8)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	add $7,%_ASM_AX</div><div class='ctx'> 	jc bad_get_user</div><div class='hunk'>@@ -104,28 +96,23 @@ ENTRY(__get_user_8)</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='ctx'> #endif</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__get_user_8)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> bad_get_user:</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	xor %edx,%edx</div><div class='ctx'> 	mov $(-EFAULT),%_ASM_AX</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(bad_get_user)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> bad_get_user_8:</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	xor %edx,%edx</div><div class='ctx'> 	xor %ecx,%ecx</div><div class='ctx'> 	mov $(-EFAULT),%_ASM_AX</div><div class='ctx'> 	ASM_CLAC</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> END(bad_get_user_8)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/lib/iomap_copy_64.S b/arch/x86/lib/iomap_copy_64.S<br/>index 05a95e713da8..33147fef3452 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/iomap_copy_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/iomap_copy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/iomap_copy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/iomap_copy_64.S</a></div><div class='hunk'>@@ -16,15 +16,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * override generic version in lib/iomap_copy.c</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(__iowrite32_copy)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movl %edx,%ecx</div><div class='ctx'> 	rep movsd</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__iowrite32_copy)</div><div class='head'>diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S<br/>index b046664f5a1c..16698bba87de 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/memcpy_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/memcpy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/memcpy_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memcpy_64.S</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -53,7 +52,6 @@ ENTRY(memcpy_erms)</div><div class='ctx'> ENDPROC(memcpy_erms)</div><div class='ctx'> </div><div class='ctx'> ENTRY(memcpy_orig)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movq %rdi, %rax</div><div class='ctx'> </div><div class='ctx'> 	cmpq $0x20, %rdx</div><div class='hunk'>@@ -178,5 +176,4 @@ ENTRY(memcpy_orig)</div><div class='ctx'> </div><div class='ctx'> .Lend:</div><div class='ctx'> 	retq</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(memcpy_orig)</div><div class='head'>diff --git a/arch/x86/lib/memmove_64.S b/arch/x86/lib/memmove_64.S<br/>index 0f8a0d0331b9..ca2afdd6d98e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/memmove_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/memmove_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/memmove_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memmove_64.S</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  *	- Copyright 2011 Fenghua Yu &lt;fenghua.yu@intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +26,6 @@</div><div class='ctx'> </div><div class='ctx'> ENTRY(memmove)</div><div class='ctx'> ENTRY(__memmove)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> </div><div class='ctx'> 	/* Handle more 32 bytes in loop */</div><div class='ctx'> 	mov %rdi, %rax</div><div class='hunk'>@@ -207,6 +205,5 @@ ENTRY(__memmove)</div><div class='ctx'> 	movb %r11b, (%rdi)</div><div class='ctx'> 13:</div><div class='ctx'> 	retq</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__memmove)</div><div class='ctx'> ENDPROC(memmove)</div><div class='head'>diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S<br/>index 93118fb23976..2661fad05827 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/memset_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/memset_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/memset_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/memset_64.S</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> /* Copyright 2002 Andi Kleen, SuSE Labs */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +65,6 @@ ENTRY(memset_erms)</div><div class='ctx'> ENDPROC(memset_erms)</div><div class='ctx'> </div><div class='ctx'> ENTRY(memset_orig)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movq %rdi,%r10</div><div class='ctx'> </div><div class='ctx'> 	/* expand byte value  */</div><div class='hunk'>@@ -78,7 +76,6 @@ ENTRY(memset_orig)</div><div class='ctx'> 	movl  %edi,%r9d</div><div class='ctx'> 	andl  $7,%r9d</div><div class='ctx'> 	jnz  .Lbad_alignment</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='ctx'> .Lafter_bad_alignment:</div><div class='ctx'> </div><div class='ctx'> 	movq  %rdx,%rcx</div><div class='hunk'>@@ -128,7 +125,6 @@ ENTRY(memset_orig)</div><div class='ctx'> 	movq	%r10,%rax</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> .Lbad_alignment:</div><div class='ctx'> 	cmpq $7,%rdx</div><div class='ctx'> 	jbe	.Lhandle_7</div><div class='hunk'>@@ -139,5 +135,4 @@ ENTRY(memset_orig)</div><div class='ctx'> 	subq %r8,%rdx</div><div class='ctx'> 	jmp .Lafter_bad_alignment</div><div class='ctx'> .Lfinal:</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(memset_orig)</div><div class='head'>diff --git a/arch/x86/lib/mmx_32.c b/arch/x86/lib/mmx_32.c<br/>index c9f2d9ba8dd8..e5e3ed8dc079 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/mmx_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/mmx_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/mmx_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/mmx_32.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> void *_mmx_memcpy(void *to, const void *from, size_t len)</div><div class='head'>diff --git a/arch/x86/lib/msr-reg.S b/arch/x86/lib/msr-reg.S<br/>index 3ca5218fbece..c81556409bbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/msr-reg.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/msr-reg.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/msr-reg.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/msr-reg.S</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -13,9 +12,8 @@</div><div class='ctx'>  */</div><div class='ctx'> .macro op_safe_regs op</div><div class='ctx'> ENTRY(\op\()_safe_regs)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushq_cfi_reg rbx</div><div class='del'>-	pushq_cfi_reg rbp</div><div class='add'>+	pushq %rbx</div><div class='add'>+	pushq %rbp</div><div class='ctx'> 	movq	%rdi, %r10	/* Save pointer */</div><div class='ctx'> 	xorl	%r11d, %r11d	/* Return value */</div><div class='ctx'> 	movl    (%rdi), %eax</div><div class='hunk'>@@ -25,7 +23,6 @@ ENTRY(\op\()_safe_regs)</div><div class='ctx'> 	movl    20(%rdi), %ebp</div><div class='ctx'> 	movl    24(%rdi), %esi</div><div class='ctx'> 	movl    28(%rdi), %edi</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='ctx'> 1:	\op</div><div class='ctx'> 2:	movl    %eax, (%r10)</div><div class='ctx'> 	movl	%r11d, %eax	/* Return value */</div><div class='hunk'>@@ -35,16 +32,14 @@ ENTRY(\op\()_safe_regs)</div><div class='ctx'> 	movl    %ebp, 20(%r10)</div><div class='ctx'> 	movl    %esi, 24(%r10)</div><div class='ctx'> 	movl    %edi, 28(%r10)</div><div class='del'>-	popq_cfi_reg rbp</div><div class='del'>-	popq_cfi_reg rbx</div><div class='add'>+	popq %rbp</div><div class='add'>+	popq %rbx</div><div class='ctx'> 	ret</div><div class='ctx'> 3:</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> 	movl    $-EIO, %r11d</div><div class='ctx'> 	jmp     2b</div><div class='ctx'> </div><div class='ctx'> 	_ASM_EXTABLE(1b, 3b)</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(\op\()_safe_regs)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -52,13 +47,12 @@ ENDPROC(\op\()_safe_regs)</div><div class='ctx'> </div><div class='ctx'> .macro op_safe_regs op</div><div class='ctx'> ENTRY(\op\()_safe_regs)</div><div class='del'>-	CFI_STARTPROC</div><div class='del'>-	pushl_cfi_reg ebx</div><div class='del'>-	pushl_cfi_reg ebp</div><div class='del'>-	pushl_cfi_reg esi</div><div class='del'>-	pushl_cfi_reg edi</div><div class='del'>-	pushl_cfi $0              /* Return value */</div><div class='del'>-	pushl_cfi %eax</div><div class='add'>+	pushl %ebx</div><div class='add'>+	pushl %ebp</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %edi</div><div class='add'>+	pushl $0              /* Return value */</div><div class='add'>+	pushl %eax</div><div class='ctx'> 	movl    4(%eax), %ecx</div><div class='ctx'> 	movl    8(%eax), %edx</div><div class='ctx'> 	movl    12(%eax), %ebx</div><div class='hunk'>@@ -66,32 +60,28 @@ ENTRY(\op\()_safe_regs)</div><div class='ctx'> 	movl    24(%eax), %esi</div><div class='ctx'> 	movl    28(%eax), %edi</div><div class='ctx'> 	movl    (%eax), %eax</div><div class='del'>-	CFI_REMEMBER_STATE</div><div class='ctx'> 1:	\op</div><div class='del'>-2:	pushl_cfi %eax</div><div class='add'>+2:	pushl %eax</div><div class='ctx'> 	movl    4(%esp), %eax</div><div class='del'>-	popl_cfi (%eax)</div><div class='add'>+	popl (%eax)</div><div class='ctx'> 	addl    $4, %esp</div><div class='del'>-	CFI_ADJUST_CFA_OFFSET -4</div><div class='ctx'> 	movl    %ecx, 4(%eax)</div><div class='ctx'> 	movl    %edx, 8(%eax)</div><div class='ctx'> 	movl    %ebx, 12(%eax)</div><div class='ctx'> 	movl    %ebp, 20(%eax)</div><div class='ctx'> 	movl    %esi, 24(%eax)</div><div class='ctx'> 	movl    %edi, 28(%eax)</div><div class='del'>-	popl_cfi %eax</div><div class='del'>-	popl_cfi_reg edi</div><div class='del'>-	popl_cfi_reg esi</div><div class='del'>-	popl_cfi_reg ebp</div><div class='del'>-	popl_cfi_reg ebx</div><div class='add'>+	popl %eax</div><div class='add'>+	popl %edi</div><div class='add'>+	popl %esi</div><div class='add'>+	popl %ebp</div><div class='add'>+	popl %ebx</div><div class='ctx'> 	ret</div><div class='ctx'> 3:</div><div class='del'>-	CFI_RESTORE_STATE</div><div class='ctx'> 	movl    $-EIO, 4(%esp)</div><div class='ctx'> 	jmp     2b</div><div class='ctx'> </div><div class='ctx'> 	_ASM_EXTABLE(1b, 3b)</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(\op\()_safe_regs)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/lib/putuser.S b/arch/x86/lib/putuser.S<br/>index fc6ba17a7eec..e0817a12d323 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/putuser.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/putuser.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/putuser.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/putuser.S</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'>  * return value.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='hunk'>@@ -30,11 +29,9 @@</div><div class='ctx'>  * as they get called from within inline assembly.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define ENTER	CFI_STARTPROC ; \</div><div class='del'>-		GET_THREAD_INFO(%_ASM_BX)</div><div class='add'>+#define ENTER	GET_THREAD_INFO(%_ASM_BX)</div><div class='ctx'> #define EXIT	ASM_CLAC ;	\</div><div class='del'>-		ret ;		\</div><div class='del'>-		CFI_ENDPROC</div><div class='add'>+		ret</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> ENTRY(__put_user_1)</div><div class='hunk'>@@ -87,7 +84,6 @@ ENTRY(__put_user_8)</div><div class='ctx'> ENDPROC(__put_user_8)</div><div class='ctx'> </div><div class='ctx'> bad_put_user:</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	movl $-EFAULT,%eax</div><div class='ctx'> 	EXIT</div><div class='ctx'> END(bad_put_user)</div><div class='head'>diff --git a/arch/x86/lib/rwsem.S b/arch/x86/lib/rwsem.S<br/>index 2322abe4da3b..40027db99140 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/rwsem.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/rwsem.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/rwsem.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/rwsem.S</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define __ASM_HALF_REG(reg)	__ASM_SEL(reg, e##reg)</div><div class='ctx'> #define __ASM_HALF_SIZE(inst)	__ASM_SEL(inst##w, inst##l)</div><div class='hunk'>@@ -34,10 +33,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define save_common_regs \</div><div class='del'>-	pushl_cfi_reg ecx</div><div class='add'>+	pushl %ecx</div><div class='ctx'> </div><div class='ctx'> #define restore_common_regs \</div><div class='del'>-	popl_cfi_reg ecx</div><div class='add'>+	popl %ecx</div><div class='ctx'> </div><div class='ctx'> 	/* Avoid uglifying the argument copying x86-64 needs to do. */</div><div class='ctx'> 	.macro movq src, dst</div><div class='hunk'>@@ -64,50 +63,45 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define save_common_regs \</div><div class='del'>-	pushq_cfi_reg rdi; \</div><div class='del'>-	pushq_cfi_reg rsi; \</div><div class='del'>-	pushq_cfi_reg rcx; \</div><div class='del'>-	pushq_cfi_reg r8;  \</div><div class='del'>-	pushq_cfi_reg r9;  \</div><div class='del'>-	pushq_cfi_reg r10; \</div><div class='del'>-	pushq_cfi_reg r11</div><div class='add'>+	pushq %rdi; \</div><div class='add'>+	pushq %rsi; \</div><div class='add'>+	pushq %rcx; \</div><div class='add'>+	pushq %r8;  \</div><div class='add'>+	pushq %r9;  \</div><div class='add'>+	pushq %r10; \</div><div class='add'>+	pushq %r11</div><div class='ctx'> </div><div class='ctx'> #define restore_common_regs \</div><div class='del'>-	popq_cfi_reg r11; \</div><div class='del'>-	popq_cfi_reg r10; \</div><div class='del'>-	popq_cfi_reg r9; \</div><div class='del'>-	popq_cfi_reg r8; \</div><div class='del'>-	popq_cfi_reg rcx; \</div><div class='del'>-	popq_cfi_reg rsi; \</div><div class='del'>-	popq_cfi_reg rdi</div><div class='add'>+	popq %r11; \</div><div class='add'>+	popq %r10; \</div><div class='add'>+	popq %r9; \</div><div class='add'>+	popq %r8; \</div><div class='add'>+	popq %rcx; \</div><div class='add'>+	popq %rsi; \</div><div class='add'>+	popq %rdi</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Fix up special calling conventions */</div><div class='ctx'> ENTRY(call_rwsem_down_read_failed)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	save_common_regs</div><div class='del'>-	__ASM_SIZE(push,_cfi_reg) __ASM_REG(dx)</div><div class='add'>+	__ASM_SIZE(push,) %__ASM_REG(dx)</div><div class='ctx'> 	movq %rax,%rdi</div><div class='ctx'> 	call rwsem_down_read_failed</div><div class='del'>-	__ASM_SIZE(pop,_cfi_reg) __ASM_REG(dx)</div><div class='add'>+	__ASM_SIZE(pop,) %__ASM_REG(dx)</div><div class='ctx'> 	restore_common_regs</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(call_rwsem_down_read_failed)</div><div class='ctx'> </div><div class='ctx'> ENTRY(call_rwsem_down_write_failed)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	save_common_regs</div><div class='ctx'> 	movq %rax,%rdi</div><div class='ctx'> 	call rwsem_down_write_failed</div><div class='ctx'> 	restore_common_regs</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(call_rwsem_down_write_failed)</div><div class='ctx'> </div><div class='ctx'> ENTRY(call_rwsem_wake)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	/* do nothing if still outstanding active readers */</div><div class='ctx'> 	__ASM_HALF_SIZE(dec) %__ASM_HALF_REG(dx)</div><div class='ctx'> 	jnz 1f</div><div class='hunk'>@@ -116,17 +110,14 @@ ENTRY(call_rwsem_wake)</div><div class='ctx'> 	call rwsem_wake</div><div class='ctx'> 	restore_common_regs</div><div class='ctx'> 1:	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(call_rwsem_wake)</div><div class='ctx'> </div><div class='ctx'> ENTRY(call_rwsem_downgrade_wake)</div><div class='del'>-	CFI_STARTPROC</div><div class='ctx'> 	save_common_regs</div><div class='del'>-	__ASM_SIZE(push,_cfi_reg) __ASM_REG(dx)</div><div class='add'>+	__ASM_SIZE(push,) %__ASM_REG(dx)</div><div class='ctx'> 	movq %rax,%rdi</div><div class='ctx'> 	call rwsem_downgrade_wake</div><div class='del'>-	__ASM_SIZE(pop,_cfi_reg) __ASM_REG(dx)</div><div class='add'>+	__ASM_SIZE(pop,) %__ASM_REG(dx)</div><div class='ctx'> 	restore_common_regs</div><div class='ctx'> 	ret</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> ENDPROC(call_rwsem_downgrade_wake)</div><div class='head'>diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c<br/>index ddf9ecb53cc3..e342586db6e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/usercopy.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/usercopy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/usercopy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/usercopy.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)</div><div class='ctx'> 	unsigned long ret;</div><div class='ctx'> </div><div class='ctx'> 	if (__range_not_ok(from, n, TASK_SIZE))</div><div class='del'>-		return 0;</div><div class='add'>+		return n;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Even though this function is typically called from NMI/IRQ context</div><div class='head'>diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c<br/>index e2f5e21c03b3..91d93b95bd86 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/usercopy_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/lib/usercopy_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/usercopy_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/lib/usercopy_32.c</a></div><div class='hunk'>@@ -647,7 +647,8 @@ EXPORT_SYMBOL(__copy_from_user_ll_nocache_nozero);</div><div class='ctx'>  * @from: Source address, in kernel space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from kernel space to user space.</div><div class='ctx'>  *</div><div class='hunk'>@@ -668,7 +669,8 @@ EXPORT_SYMBOL(_copy_to_user);</div><div class='ctx'>  * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='add'>+ * Context: User context only. This function may sleep if pagefaults are</div><div class='add'>+ *          enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * Copy data from user space to kernel space.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c<br/>index dc8adad10a2f..dd76a05729b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_aux.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/math-emu/fpu_aux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_aux.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_aux.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@ static void fclex(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Needs to be externally visible */</div><div class='del'>-void finit_soft_fpu(struct i387_soft_struct *soft)</div><div class='add'>+void fpstate_init_soft(struct swregs_state *soft)</div><div class='ctx'> {</div><div class='ctx'> 	struct address *oaddr, *iaddr;</div><div class='ctx'> 	memset(soft, 0, sizeof(*soft));</div><div class='hunk'>@@ -52,7 +52,7 @@ void finit_soft_fpu(struct i387_soft_struct *soft)</div><div class='ctx'> </div><div class='ctx'> void finit(void)</div><div class='ctx'> {</div><div class='del'>-	finit_soft_fpu(&amp;current-&gt;thread.fpu.state-&gt;soft);</div><div class='add'>+	fpstate_init_soft(&amp;current-&gt;thread.fpu.state.soft);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c<br/>index 9b868124128d..f37e84ab49f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_entry.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/math-emu/fpu_entry.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_entry.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_entry.c</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/user.h&gt;</div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fpu_system.h"</div><div class='ctx'> #include "fpu_emu.h"</div><div class='hunk'>@@ -147,13 +147,9 @@ void math_emulate(struct math_emu_info *info)</div><div class='ctx'> 	unsigned long code_base = 0;</div><div class='ctx'> 	unsigned long code_limit = 0;	/* Initialized to stop compiler warnings */</div><div class='ctx'> 	struct desc_struct code_descriptor;</div><div class='add'>+	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='ctx'> </div><div class='del'>-	if (!used_math()) {</div><div class='del'>-		if (init_fpu(current)) {</div><div class='del'>-			do_group_exit(SIGKILL);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	fpu__activate_curr(fpu);</div><div class='ctx'> </div><div class='ctx'> #ifdef RE_ENTRANT_CHECKING</div><div class='ctx'> 	if (emulating) {</div><div class='hunk'>@@ -673,7 +669,7 @@ void math_abort(struct math_emu_info *info, unsigned int signal)</div><div class='ctx'> #endif /* PARANOID */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define S387 ((struct i387_soft_struct *)s387)</div><div class='add'>+#define S387 ((struct swregs_state *)s387)</div><div class='ctx'> #define sstatus_word() \</div><div class='ctx'>   ((S387-&gt;swd &amp; ~SW_Top &amp; 0xffff) | ((S387-&gt;ftop &lt;&lt; SW_Top_Shift) &amp; SW_Top))</div><div class='ctx'> </div><div class='hunk'>@@ -682,14 +678,14 @@ int fpregs_soft_set(struct task_struct *target,</div><div class='ctx'> 		    unsigned int pos, unsigned int count,</div><div class='ctx'> 		    const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct i387_soft_struct *s387 = &amp;target-&gt;thread.fpu.state-&gt;soft;</div><div class='add'>+	struct swregs_state *s387 = &amp;target-&gt;thread.fpu.state.soft;</div><div class='ctx'> 	void *space = s387-&gt;st_space;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int offset, other, i, tags, regnr, tag, newtop;</div><div class='ctx'> </div><div class='ctx'> 	RE_ENTRANT_CHECK_OFF;</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, s387, 0,</div><div class='del'>-				 offsetof(struct i387_soft_struct, st_space));</div><div class='add'>+				 offsetof(struct swregs_state, st_space));</div><div class='ctx'> 	RE_ENTRANT_CHECK_ON;</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -734,7 +730,7 @@ int fpregs_soft_get(struct task_struct *target,</div><div class='ctx'> 		    unsigned int pos, unsigned int count,</div><div class='ctx'> 		    void *kbuf, void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct i387_soft_struct *s387 = &amp;target-&gt;thread.fpu.state-&gt;soft;</div><div class='add'>+	struct swregs_state *s387 = &amp;target-&gt;thread.fpu.state.soft;</div><div class='ctx'> 	const void *space = s387-&gt;st_space;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int offset = (S387-&gt;ftop &amp; 7) * 10, other = 80 - offset;</div><div class='hunk'>@@ -752,7 +748,7 @@ int fpregs_soft_get(struct task_struct *target,</div><div class='ctx'> #endif /* PECULIAR_486 */</div><div class='ctx'> </div><div class='ctx'> 	ret = user_regset_copyout(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, s387, 0,</div><div class='del'>-				  offsetof(struct i387_soft_struct, st_space));</div><div class='add'>+				  offsetof(struct swregs_state, st_space));</div><div class='ctx'> </div><div class='ctx'> 	/* Copy all registers in stack order. */</div><div class='ctx'> 	if (!ret)</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_system.h b/arch/x86/math-emu/fpu_system.h<br/>index 2c614410a5f3..9ccecb61a4fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_system.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/math-emu/fpu_system.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/math-emu/fpu_system.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/math-emu/fpu_system.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #define SEG_EXPAND_DOWN(s)	(((s).b &amp; ((1 &lt;&lt; 11) | (1 &lt;&lt; 10))) \</div><div class='ctx'> 				 == (1 &lt;&lt; 10))</div><div class='ctx'> </div><div class='del'>-#define I387			(current-&gt;thread.fpu.state)</div><div class='add'>+#define I387			(&amp;current-&gt;thread.fpu.state)</div><div class='ctx'> #define FPU_info		(I387-&gt;soft.info)</div><div class='ctx'> </div><div class='ctx'> #define FPU_CS			(*(unsigned short *) &amp;(FPU_info-&gt;regs-&gt;cs))</div><div class='head'>diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c<br/>index 181c53bac3a7..9dc909841739 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/fault.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;		/* hstate_index_to_shift	*/</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;		/* prefetchw			*/</div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;	/* exception_enter(), ...	*/</div><div class='add'>+#include &lt;linux/uaccess.h&gt;		/* faulthandler_disabled()	*/</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/traps.h&gt;			/* dotraplinkage, ...		*/</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;		/* pgd_*(), ...			*/</div><div class='hunk'>@@ -1126,9 +1127,9 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt, have no user context or are running</div><div class='del'>-	 * in an atomic region then we must not take the fault:</div><div class='add'>+	 * in a region with pagefaults disabled then we must not take the fault</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(in_atomic() || !mm)) {</div><div class='add'>+	if (unlikely(faulthandler_disabled() || !mm)) {</div><div class='ctx'> 		bad_area_nosemaphore(regs, error_code, address);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c<br/>index 4500142bc4aa..eecb207a2037 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/highmem_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/highmem_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/highmem_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/highmem_32.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='del'>-	/* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */</div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='hunk'>@@ -100,6 +100,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c<br/>index 1d553186c434..8533b46e6bee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/init.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/init.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/init.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'>  */</div><div class='ctx'> uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {</div><div class='ctx'> 	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,</div><div class='del'>-	[_PAGE_CACHE_MODE_WC      ]	= _PAGE_PWT | 0        ,</div><div class='add'>+	[_PAGE_CACHE_MODE_WC      ]	= 0         | _PAGE_PCD,</div><div class='ctx'> 	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,</div><div class='ctx'> 	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,</div><div class='ctx'> 	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,</div><div class='hunk'>@@ -50,11 +50,11 @@ EXPORT_SYMBOL(__cachemode2pte_tbl);</div><div class='ctx'> </div><div class='ctx'> uint8_t __pte2cachemode_tbl[8] = {</div><div class='ctx'> 	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,</div><div class='del'>-	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_WC,</div><div class='add'>+	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,</div><div class='ctx'> 	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,</div><div class='ctx'> 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,</div><div class='ctx'> 	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,</div><div class='del'>-	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,</div><div class='add'>+	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,</div><div class='ctx'> 	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,</div><div class='ctx'> 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c<br/>index c8140e12816a..8340e45c891a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/init_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/init_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/init_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/init_32.c</a></div><div class='hunk'>@@ -433,7 +433,7 @@ void __init add_highpages_with_active_regions(int nid,</div><div class='ctx'> 	phys_addr_t start, end;</div><div class='ctx'> 	u64 i;</div><div class='ctx'> </div><div class='del'>-	for_each_free_mem_range(i, nid, &amp;start, &amp;end, NULL) {</div><div class='add'>+	for_each_free_mem_range(i, nid, MEMBLOCK_NONE, &amp;start, &amp;end, NULL) {</div><div class='ctx'> 		unsigned long pfn = clamp_t(unsigned long, PFN_UP(start),</div><div class='ctx'> 					    start_pfn, end_pfn);</div><div class='ctx'> 		unsigned long e_pfn = clamp_t(unsigned long, PFN_DOWN(end),</div><div class='head'>diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c<br/>index 9ca35fc60cfe..9c0ff045fdd4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/iomap_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/iomap_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/iomap_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/iomap_32.c</a></div><div class='hunk'>@@ -59,6 +59,7 @@ void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> 	int idx, type;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> </div><div class='ctx'> 	type = kmap_atomic_idx_push();</div><div class='hunk'>@@ -77,13 +78,13 @@ void __iomem *</div><div class='ctx'> iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * For non-PAT systems, promote PAGE_KERNEL_WC to PAGE_KERNEL_UC_MINUS.</div><div class='del'>-	 * PAGE_KERNEL_WC maps to PWT, which translates to uncached if the</div><div class='del'>-	 * MTRR is UC or WC.  UC_MINUS gets the real intention, of the</div><div class='del'>-	 * user, which is "WC if the MTRR is WC, UC if you can't do that."</div><div class='add'>+	 * For non-PAT systems, translate non-WB request to UC- just in</div><div class='add'>+	 * case the caller set the PWT bit to prot directly without using</div><div class='add'>+	 * pgprot_writecombine(). UC- translates to uncached if the MTRR</div><div class='add'>+	 * is UC or WC. UC- gets the real intention, of the user, which is</div><div class='add'>+	 * "WC if the MTRR is WC, UC if you can't do that."</div><div class='ctx'> 	 */</div><div class='del'>-	if (!pat_enabled &amp;&amp; pgprot_val(prot) ==</div><div class='del'>-	    (__PAGE_KERNEL | cachemode2protval(_PAGE_CACHE_MODE_WC)))</div><div class='add'>+	if (!pat_enabled() &amp;&amp; pgprot2cachemode(prot) != _PAGE_CACHE_MODE_WB)</div><div class='ctx'> 		prot = __pgprot(__PAGE_KERNEL |</div><div class='ctx'> 				cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS));</div><div class='ctx'> </div><div class='hunk'>@@ -117,5 +118,6 @@ iounmap_atomic(void __iomem *kvaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iounmap_atomic);</div><div class='head'>diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c<br/>index 70e7444c6835..cc5ccc415cc0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/ioremap.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/ioremap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/ioremap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/ioremap.c</a></div><div class='hunk'>@@ -42,6 +42,9 @@ int ioremap_change_attr(unsigned long vaddr, unsigned long size,</div><div class='ctx'> 	case _PAGE_CACHE_MODE_WC:</div><div class='ctx'> 		err = _set_memory_wc(vaddr, nrpages);</div><div class='ctx'> 		break;</div><div class='add'>+	case _PAGE_CACHE_MODE_WT:</div><div class='add'>+		err = _set_memory_wt(vaddr, nrpages);</div><div class='add'>+		break;</div><div class='ctx'> 	case _PAGE_CACHE_MODE_WB:</div><div class='ctx'> 		err = _set_memory_wb(vaddr, nrpages);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -172,6 +175,10 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,</div><div class='ctx'> 		prot = __pgprot(pgprot_val(prot) |</div><div class='ctx'> 				cachemode2protval(_PAGE_CACHE_MODE_WC));</div><div class='ctx'> 		break;</div><div class='add'>+	case _PAGE_CACHE_MODE_WT:</div><div class='add'>+		prot = __pgprot(pgprot_val(prot) |</div><div class='add'>+				cachemode2protval(_PAGE_CACHE_MODE_WT));</div><div class='add'>+		break;</div><div class='ctx'> 	case _PAGE_CACHE_MODE_WB:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -234,10 +241,11 @@ void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ideally, this should be:</div><div class='del'>-	 *	pat_enabled ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS;</div><div class='add'>+	 *	pat_enabled() ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS;</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Till we fix all X drivers to use ioremap_wc(), we will use</div><div class='del'>-	 * UC MINUS.</div><div class='add'>+	 * UC MINUS. Drivers that are certain they need or can already</div><div class='add'>+	 * be converted over to strong UC can use ioremap_uc().</div><div class='ctx'> 	 */</div><div class='ctx'> 	enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_MINUS;</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +255,39 @@ void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size)</div><div class='ctx'> EXPORT_SYMBOL(ioremap_nocache);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ioremap_uc     -   map bus memory into CPU space as strongly uncachable</div><div class='add'>+ * @phys_addr:    bus address of the memory</div><div class='add'>+ * @size:      size of the resource to map</div><div class='add'>+ *</div><div class='add'>+ * ioremap_uc performs a platform specific sequence of operations to</div><div class='add'>+ * make bus memory CPU accessible via the readb/readw/readl/writeb/</div><div class='add'>+ * writew/writel functions and the other mmio helpers. The returned</div><div class='add'>+ * address is not guaranteed to be usable directly as a virtual</div><div class='add'>+ * address.</div><div class='add'>+ *</div><div class='add'>+ * This version of ioremap ensures that the memory is marked with a strong</div><div class='add'>+ * preference as completely uncachable on the CPU when possible. For non-PAT</div><div class='add'>+ * systems this ends up setting page-attribute flags PCD=1, PWT=1. For PAT</div><div class='add'>+ * systems this will set the PAT entry for the pages as strong UC.  This call</div><div class='add'>+ * will honor existing caching rules from things like the PCI bus. Note that</div><div class='add'>+ * there are other caches and buffers on many busses. In particular driver</div><div class='add'>+ * authors should read up on PCI writes.</div><div class='add'>+ *</div><div class='add'>+ * It's useful if some control registers are in such an area and</div><div class='add'>+ * write combining or read caching is not desirable:</div><div class='add'>+ *</div><div class='add'>+ * Must be freed with iounmap.</div><div class='add'>+ */</div><div class='add'>+void __iomem *ioremap_uc(resource_size_t phys_addr, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC;</div><div class='add'>+</div><div class='add'>+	return __ioremap_caller(phys_addr, size, pcm,</div><div class='add'>+				__builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ioremap_uc);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ioremap_wc	-	map memory into CPU space write combined</div><div class='ctx'>  * @phys_addr:	bus address of the memory</div><div class='ctx'>  * @size:	size of the resource to map</div><div class='hunk'>@@ -258,14 +299,28 @@ EXPORT_SYMBOL(ioremap_nocache);</div><div class='ctx'>  */</div><div class='ctx'> void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	if (pat_enabled)</div><div class='del'>-		return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WC,</div><div class='add'>+	return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WC,</div><div class='ctx'> 					__builtin_return_address(0));</div><div class='del'>-	else</div><div class='del'>-		return ioremap_nocache(phys_addr, size);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap_wc);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ioremap_wt	-	map memory into CPU space write through</div><div class='add'>+ * @phys_addr:	bus address of the memory</div><div class='add'>+ * @size:	size of the resource to map</div><div class='add'>+ *</div><div class='add'>+ * This version of ioremap ensures that the memory is marked write through.</div><div class='add'>+ * Write through stores data into memory while keeping the cache up-to-date.</div><div class='add'>+ *</div><div class='add'>+ * Must be freed with iounmap.</div><div class='add'>+ */</div><div class='add'>+void __iomem *ioremap_wt(resource_size_t phys_addr, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WT,</div><div class='add'>+					__builtin_return_address(0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ioremap_wt);</div><div class='add'>+</div><div class='ctx'> void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB,</div><div class='hunk'>@@ -331,7 +386,7 @@ void iounmap(volatile void __iomem *addr)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(iounmap);</div><div class='ctx'> </div><div class='del'>-int arch_ioremap_pud_supported(void)</div><div class='add'>+int __init arch_ioremap_pud_supported(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	return cpu_has_gbpages;</div><div class='hunk'>@@ -340,7 +395,7 @@ int arch_ioremap_pud_supported(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int arch_ioremap_pmd_supported(void)</div><div class='add'>+int __init arch_ioremap_pmd_supported(void)</div><div class='ctx'> {</div><div class='ctx'> 	return cpu_has_pse;</div><div class='ctx'> }</div><div class='hunk'>@@ -353,18 +408,18 @@ void *xlate_dev_mem_ptr(phys_addr_t phys)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start  = phys &amp;  PAGE_MASK;</div><div class='ctx'> 	unsigned long offset = phys &amp; ~PAGE_MASK;</div><div class='del'>-	unsigned long vaddr;</div><div class='add'>+	void *vaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* If page is RAM, we can use __va. Otherwise ioremap and unmap. */</div><div class='ctx'> 	if (page_is_ram(start &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> 		return __va(phys);</div><div class='ctx'> </div><div class='del'>-	vaddr = (unsigned long)ioremap_cache(start, PAGE_SIZE);</div><div class='add'>+	vaddr = ioremap_cache(start, PAGE_SIZE);</div><div class='ctx'> 	/* Only add the offset on success and return NULL if the ioremap() failed: */</div><div class='ctx'> 	if (vaddr)</div><div class='ctx'> 		vaddr += offset;</div><div class='ctx'> </div><div class='del'>-	return (void *)vaddr;</div><div class='add'>+	return vaddr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)</div><div class='hunk'>@@ -373,7 +428,6 @@ void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	iounmap((void __iomem *)((unsigned long)addr &amp; PAGE_MASK));</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] __page_aligned_bss;</div><div class='head'>diff --git a/arch/x86/mm/kasan_init_64.c b/arch/x86/mm/kasan_init_64.c<br/>index 4860906c6b9f..e1840f3db5b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/kasan_init_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/kasan_init_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/kasan_init_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/kasan_init_64.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+#define pr_fmt(fmt) "kasan: " fmt</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='hunk'>@@ -11,7 +12,19 @@</div><div class='ctx'> extern pgd_t early_level4_pgt[PTRS_PER_PGD];</div><div class='ctx'> extern struct range pfn_mapped[E820_X_MAX];</div><div class='ctx'> </div><div class='del'>-extern unsigned char kasan_zero_page[PAGE_SIZE];</div><div class='add'>+static pud_t kasan_zero_pud[PTRS_PER_PUD] __page_aligned_bss;</div><div class='add'>+static pmd_t kasan_zero_pmd[PTRS_PER_PMD] __page_aligned_bss;</div><div class='add'>+static pte_t kasan_zero_pte[PTRS_PER_PTE] __page_aligned_bss;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This page used as early shadow. We don't use empty_zero_page</div><div class='add'>+ * at early stages, stack instrumentation could write some garbage</div><div class='add'>+ * to this page.</div><div class='add'>+ * Latter we reuse it as zero shadow for large ranges of memory</div><div class='add'>+ * that allowed to access, but not instrumented by kasan</div><div class='add'>+ * (vmalloc/vmemmap ...).</div><div class='add'>+ */</div><div class='add'>+static unsigned char kasan_zero_page[PAGE_SIZE] __page_aligned_bss;</div><div class='ctx'> </div><div class='ctx'> static int __init map_range(struct range *range)</div><div class='ctx'> {</div><div class='hunk'>@@ -36,7 +49,7 @@ static void __init clear_pgds(unsigned long start,</div><div class='ctx'> 		pgd_clear(pgd_offset_k(start));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init kasan_map_early_shadow(pgd_t *pgd)</div><div class='add'>+static void __init kasan_map_early_shadow(pgd_t *pgd)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	unsigned long start = KASAN_SHADOW_START;</div><div class='hunk'>@@ -73,7 +86,7 @@ static int __init zero_pmd_populate(pud_t *pud, unsigned long addr,</div><div class='ctx'> 	while (IS_ALIGNED(addr, PMD_SIZE) &amp;&amp; addr + PMD_SIZE &lt;= end) {</div><div class='ctx'> 		WARN_ON(!pmd_none(*pmd));</div><div class='ctx'> 		set_pmd(pmd, __pmd(__pa_nodebug(kasan_zero_pte)</div><div class='del'>-					| __PAGE_KERNEL_RO));</div><div class='add'>+					| _KERNPG_TABLE));</div><div class='ctx'> 		addr += PMD_SIZE;</div><div class='ctx'> 		pmd = pmd_offset(pud, addr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -99,7 +112,7 @@ static int __init zero_pud_populate(pgd_t *pgd, unsigned long addr,</div><div class='ctx'> 	while (IS_ALIGNED(addr, PUD_SIZE) &amp;&amp; addr + PUD_SIZE &lt;= end) {</div><div class='ctx'> 		WARN_ON(!pud_none(*pud));</div><div class='ctx'> 		set_pud(pud, __pud(__pa_nodebug(kasan_zero_pmd)</div><div class='del'>-					| __PAGE_KERNEL_RO));</div><div class='add'>+					| _KERNPG_TABLE));</div><div class='ctx'> 		addr += PUD_SIZE;</div><div class='ctx'> 		pud = pud_offset(pgd, addr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -124,7 +137,7 @@ static int __init zero_pgd_populate(unsigned long addr, unsigned long end)</div><div class='ctx'> 	while (IS_ALIGNED(addr, PGDIR_SIZE) &amp;&amp; addr + PGDIR_SIZE &lt;= end) {</div><div class='ctx'> 		WARN_ON(!pgd_none(*pgd));</div><div class='ctx'> 		set_pgd(pgd, __pgd(__pa_nodebug(kasan_zero_pud)</div><div class='del'>-					| __PAGE_KERNEL_RO));</div><div class='add'>+					| _KERNPG_TABLE));</div><div class='ctx'> 		addr += PGDIR_SIZE;</div><div class='ctx'> 		pgd = pgd_offset_k(addr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -166,6 +179,26 @@ static struct notifier_block kasan_die_notifier = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+void __init kasan_early_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	pteval_t pte_val = __pa_nodebug(kasan_zero_page) | __PAGE_KERNEL;</div><div class='add'>+	pmdval_t pmd_val = __pa_nodebug(kasan_zero_pte) | _KERNPG_TABLE;</div><div class='add'>+	pudval_t pud_val = __pa_nodebug(kasan_zero_pmd) | _KERNPG_TABLE;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PTE; i++)</div><div class='add'>+		kasan_zero_pte[i] = __pte(pte_val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PMD; i++)</div><div class='add'>+		kasan_zero_pmd[i] = __pmd(pmd_val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PUD; i++)</div><div class='add'>+		kasan_zero_pud[i] = __pud(pud_val);</div><div class='add'>+</div><div class='add'>+	kasan_map_early_shadow(early_level4_pgt);</div><div class='add'>+	kasan_map_early_shadow(init_level4_pgt);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init kasan_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -176,6 +209,7 @@ void __init kasan_init(void)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(early_level4_pgt, init_level4_pgt, sizeof(early_level4_pgt));</div><div class='ctx'> 	load_cr3(early_level4_pgt);</div><div class='add'>+	__flush_tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	clear_pgds(KASAN_SHADOW_START, KASAN_SHADOW_END);</div><div class='ctx'> </div><div class='hunk'>@@ -202,5 +236,8 @@ void __init kasan_init(void)</div><div class='ctx'> 	memset(kasan_zero_page, 0, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	load_cr3(init_level4_pgt);</div><div class='add'>+	__flush_tlb_all();</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='add'>+</div><div class='add'>+	pr_info("Kernel address sanitizer initialized\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c<br/>index c439ec478216..7a657f58bbea 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/mpx.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/mpx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/mpx.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/mpx.c</a></div><div class='hunk'>@@ -10,13 +10,15 @@</div><div class='ctx'> #include &lt;linux/syscalls.h&gt;</div><div class='ctx'> #include &lt;linux/sched/sysctl.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/i387.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/mman.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/mpx.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='add'>+</div><div class='add'>+#define CREATE_TRACE_POINTS</div><div class='add'>+#include &lt;asm/trace/mpx.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const char *mpx_mapping_name(struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='hunk'>@@ -32,6 +34,22 @@ static int is_mpx_vma(struct vm_area_struct *vma)</div><div class='ctx'> 	return (vma-&gt;vm_ops == &amp;mpx_vma_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned long mpx_bd_size_bytes(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	if (is_64bit_mm(mm))</div><div class='add'>+		return MPX_BD_SIZE_BYTES_64;</div><div class='add'>+	else</div><div class='add'>+		return MPX_BD_SIZE_BYTES_32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long mpx_bt_size_bytes(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	if (is_64bit_mm(mm))</div><div class='add'>+		return MPX_BT_SIZE_BYTES_64;</div><div class='add'>+	else</div><div class='add'>+		return MPX_BT_SIZE_BYTES_32;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is really a simplified "vm_mmap". it only handles MPX</div><div class='ctx'>  * bounds tables (the bounds directory is user-allocated).</div><div class='hunk'>@@ -47,8 +65,8 @@ static unsigned long mpx_mmap(unsigned long len)</div><div class='ctx'> 	vm_flags_t vm_flags;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> </div><div class='del'>-	/* Only bounds table and bounds directory can be allocated here */</div><div class='del'>-	if (len != MPX_BD_SIZE_BYTES &amp;&amp; len != MPX_BT_SIZE_BYTES)</div><div class='add'>+	/* Only bounds table can be allocated here */</div><div class='add'>+	if (len != mpx_bt_size_bytes(mm))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;mm-&gt;mmap_sem);</div><div class='hunk'>@@ -272,10 +290,9 @@ bad_opcode:</div><div class='ctx'>  *</div><div class='ctx'>  * The caller is expected to kfree() the returned siginfo_t.</div><div class='ctx'>  */</div><div class='del'>-siginfo_t *mpx_generate_siginfo(struct pt_regs *regs,</div><div class='del'>-				struct xsave_struct *xsave_buf)</div><div class='add'>+siginfo_t *mpx_generate_siginfo(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct bndreg *bndregs, *bndreg;</div><div class='add'>+	const struct bndreg *bndregs, *bndreg;</div><div class='ctx'> 	siginfo_t *info = NULL;</div><div class='ctx'> 	struct insn insn;</div><div class='ctx'> 	uint8_t bndregno;</div><div class='hunk'>@@ -295,8 +312,8 @@ siginfo_t *mpx_generate_siginfo(struct pt_regs *regs,</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='del'>-	/* get the bndregs _area_ of the xsave structure */</div><div class='del'>-	bndregs = get_xsave_addr(xsave_buf, XSTATE_BNDREGS);</div><div class='add'>+	/* get bndregs field from current task's xsave area */</div><div class='add'>+	bndregs = get_xsave_field_ptr(XSTATE_BNDREGS);</div><div class='ctx'> 	if (!bndregs) {</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto err_out;</div><div class='hunk'>@@ -334,6 +351,7 @@ siginfo_t *mpx_generate_siginfo(struct pt_regs *regs,</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='add'>+	trace_mpx_bounds_register_exception(info-&gt;si_addr, bndreg);</div><div class='ctx'> 	return info;</div><div class='ctx'> err_out:</div><div class='ctx'> 	/* info might be NULL, but kfree() handles that */</div><div class='hunk'>@@ -341,25 +359,18 @@ err_out:</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __user void *task_get_bounds_dir(struct task_struct *tsk)</div><div class='add'>+static __user void *mpx_get_bounds_dir(void)</div><div class='ctx'> {</div><div class='del'>-	struct bndcsr *bndcsr;</div><div class='add'>+	const struct bndcsr *bndcsr;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_MPX))</div><div class='ctx'> 		return MPX_INVALID_BOUNDS_DIR;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * 32-bit binaries on 64-bit kernels are currently</div><div class='del'>-	 * unsupported.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_X86_64) &amp;&amp; test_thread_flag(TIF_IA32))</div><div class='del'>-		return MPX_INVALID_BOUNDS_DIR;</div><div class='del'>-	/*</div><div class='ctx'> 	 * The bounds directory pointer is stored in a register</div><div class='ctx'> 	 * only accessible if we first do an xsave.</div><div class='ctx'> 	 */</div><div class='del'>-	fpu_save_init(&amp;tsk-&gt;thread.fpu);</div><div class='del'>-	bndcsr = get_xsave_addr(&amp;tsk-&gt;thread.fpu.state-&gt;xsave, XSTATE_BNDCSR);</div><div class='add'>+	bndcsr = get_xsave_field_ptr(XSTATE_BNDCSR);</div><div class='ctx'> 	if (!bndcsr)</div><div class='ctx'> 		return MPX_INVALID_BOUNDS_DIR;</div><div class='ctx'> </div><div class='hunk'>@@ -378,10 +389,10 @@ static __user void *task_get_bounds_dir(struct task_struct *tsk)</div><div class='ctx'> 		(bndcsr-&gt;bndcfgu &amp; MPX_BNDCFG_ADDR_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mpx_enable_management(struct task_struct *tsk)</div><div class='add'>+int mpx_enable_management(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __user *bd_base = MPX_INVALID_BOUNDS_DIR;</div><div class='del'>-	struct mm_struct *mm = tsk-&gt;mm;</div><div class='add'>+	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -390,11 +401,12 @@ int mpx_enable_management(struct task_struct *tsk)</div><div class='ctx'> 	 * directory into XSAVE/XRSTOR Save Area and enable MPX through</div><div class='ctx'> 	 * XRSTOR instruction.</div><div class='ctx'> 	 *</div><div class='del'>-	 * fpu_xsave() is expected to be very expensive. Storing the bounds</div><div class='del'>-	 * directory here means that we do not have to do xsave in the unmap</div><div class='del'>-	 * path; we can just use mm-&gt;bd_addr instead.</div><div class='add'>+	 * The copy_xregs_to_kernel() beneath get_xsave_field_ptr() is</div><div class='add'>+	 * expected to be relatively expensive. Storing the bounds</div><div class='add'>+	 * directory here means that we do not have to do xsave in the</div><div class='add'>+	 * unmap path; we can just use mm-&gt;bd_addr instead.</div><div class='ctx'> 	 */</div><div class='del'>-	bd_base = task_get_bounds_dir(tsk);</div><div class='add'>+	bd_base = mpx_get_bounds_dir();</div><div class='ctx'> 	down_write(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	mm-&gt;bd_addr = bd_base;</div><div class='ctx'> 	if (mm-&gt;bd_addr == MPX_INVALID_BOUNDS_DIR)</div><div class='hunk'>@@ -404,7 +416,7 @@ int mpx_enable_management(struct task_struct *tsk)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mpx_disable_management(struct task_struct *tsk)</div><div class='add'>+int mpx_disable_management(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> </div><div class='hunk'>@@ -417,29 +429,59 @@ int mpx_disable_management(struct task_struct *tsk)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mpx_cmpxchg_bd_entry(struct mm_struct *mm,</div><div class='add'>+		unsigned long *curval,</div><div class='add'>+		unsigned long __user *addr,</div><div class='add'>+		unsigned long old_val, unsigned long new_val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	/*</div><div class='add'>+	 * user_atomic_cmpxchg_inatomic() actually uses sizeof()</div><div class='add'>+	 * the pointer that we pass to it to figure out how much</div><div class='add'>+	 * data to cmpxchg.  We have to be careful here not to</div><div class='add'>+	 * pass a pointer to a 64-bit data type when we only want</div><div class='add'>+	 * a 32-bit copy.</div><div class='add'>+	 */</div><div class='add'>+	if (is_64bit_mm(mm)) {</div><div class='add'>+		ret = user_atomic_cmpxchg_inatomic(curval,</div><div class='add'>+				addr, old_val, new_val);</div><div class='add'>+	} else {</div><div class='add'>+		u32 uninitialized_var(curval_32);</div><div class='add'>+		u32 old_val_32 = old_val;</div><div class='add'>+		u32 new_val_32 = new_val;</div><div class='add'>+		u32 __user *addr_32 = (u32 __user *)addr;</div><div class='add'>+</div><div class='add'>+		ret = user_atomic_cmpxchg_inatomic(&amp;curval_32,</div><div class='add'>+				addr_32, old_val_32, new_val_32);</div><div class='add'>+		*curval = curval_32;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * With 32-bit mode, MPX_BT_SIZE_BYTES is 4MB, and the size of each</div><div class='del'>- * bounds table is 16KB. With 64-bit mode, MPX_BT_SIZE_BYTES is 2GB,</div><div class='add'>+ * With 32-bit mode, a bounds directory is 4MB, and the size of each</div><div class='add'>+ * bounds table is 16KB. With 64-bit mode, a bounds directory is 2GB,</div><div class='ctx'>  * and the size of each bounds table is 4MB.</div><div class='ctx'>  */</div><div class='del'>-static int allocate_bt(long __user *bd_entry)</div><div class='add'>+static int allocate_bt(struct mm_struct *mm, long __user *bd_entry)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long expected_old_val = 0;</div><div class='ctx'> 	unsigned long actual_old_val = 0;</div><div class='ctx'> 	unsigned long bt_addr;</div><div class='add'>+	unsigned long bd_new_entry;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Carve the virtual space out of userspace for the new</div><div class='ctx'> 	 * bounds table:</div><div class='ctx'> 	 */</div><div class='del'>-	bt_addr = mpx_mmap(MPX_BT_SIZE_BYTES);</div><div class='add'>+	bt_addr = mpx_mmap(mpx_bt_size_bytes(mm));</div><div class='ctx'> 	if (IS_ERR((void *)bt_addr))</div><div class='ctx'> 		return PTR_ERR((void *)bt_addr);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set the valid flag (kinda like _PAGE_PRESENT in a pte)</div><div class='ctx'> 	 */</div><div class='del'>-	bt_addr = bt_addr | MPX_BD_ENTRY_VALID_FLAG;</div><div class='add'>+	bd_new_entry = bt_addr | MPX_BD_ENTRY_VALID_FLAG;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Go poke the address of the new bounds table in to the</div><div class='hunk'>@@ -452,8 +494,8 @@ static int allocate_bt(long __user *bd_entry)</div><div class='ctx'> 	 * mmap_sem at this point, unlike some of the other part</div><div class='ctx'> 	 * of the MPX code that have to pagefault_disable().</div><div class='ctx'> 	 */</div><div class='del'>-	ret = user_atomic_cmpxchg_inatomic(&amp;actual_old_val, bd_entry,</div><div class='del'>-					   expected_old_val, bt_addr);</div><div class='add'>+	ret = mpx_cmpxchg_bd_entry(mm, &amp;actual_old_val,	bd_entry,</div><div class='add'>+				   expected_old_val, bd_new_entry);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_unmap;</div><div class='ctx'> </div><div class='hunk'>@@ -481,9 +523,10 @@ static int allocate_bt(long __user *bd_entry)</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out_unmap;</div><div class='ctx'> 	}</div><div class='add'>+	trace_mpx_new_bounds_table(bt_addr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> out_unmap:</div><div class='del'>-	vm_munmap(bt_addr &amp; MPX_BT_ADDR_MASK, MPX_BT_SIZE_BYTES);</div><div class='add'>+	vm_munmap(bt_addr, mpx_bt_size_bytes(mm));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -498,12 +541,13 @@ out_unmap:</div><div class='ctx'>  * bound table is 16KB. With 64-bit mode, the size of BD is 2GB,</div><div class='ctx'>  * and the size of each bound table is 4MB.</div><div class='ctx'>  */</div><div class='del'>-static int do_mpx_bt_fault(struct xsave_struct *xsave_buf)</div><div class='add'>+static int do_mpx_bt_fault(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long bd_entry, bd_base;</div><div class='del'>-	struct bndcsr *bndcsr;</div><div class='add'>+	const struct bndcsr *bndcsr;</div><div class='add'>+	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> </div><div class='del'>-	bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR);</div><div class='add'>+	bndcsr = get_xsave_field_ptr(XSTATE_BNDCSR);</div><div class='ctx'> 	if (!bndcsr)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -520,13 +564,13 @@ static int do_mpx_bt_fault(struct xsave_struct *xsave_buf)</div><div class='ctx'> 	 * the directory is.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((bd_entry &lt; bd_base) ||</div><div class='del'>-	    (bd_entry &gt;= bd_base + MPX_BD_SIZE_BYTES))</div><div class='add'>+	    (bd_entry &gt;= bd_base + mpx_bd_size_bytes(mm)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return allocate_bt((long __user *)bd_entry);</div><div class='add'>+	return allocate_bt(mm, (long __user *)bd_entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mpx_handle_bd_fault(struct xsave_struct *xsave_buf)</div><div class='add'>+int mpx_handle_bd_fault(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Userspace never asked us to manage the bounds tables,</div><div class='hunk'>@@ -535,7 +579,7 @@ int mpx_handle_bd_fault(struct xsave_struct *xsave_buf)</div><div class='ctx'> 	if (!kernel_managing_mpx_tables(current-&gt;mm))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (do_mpx_bt_fault(xsave_buf)) {</div><div class='add'>+	if (do_mpx_bt_fault()) {</div><div class='ctx'> 		force_sig(SIGSEGV, current);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The force_sig() is essentially "handling" this</div><div class='hunk'>@@ -572,29 +616,55 @@ static int mpx_resolve_fault(long __user *addr, int write)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned long mpx_bd_entry_to_bt_addr(struct mm_struct *mm,</div><div class='add'>+					     unsigned long bd_entry)</div><div class='add'>+{</div><div class='add'>+	unsigned long bt_addr = bd_entry;</div><div class='add'>+	int align_to_bytes;</div><div class='add'>+	/*</div><div class='add'>+	 * Bit 0 in a bt_entry is always the valid bit.</div><div class='add'>+	 */</div><div class='add'>+	bt_addr &amp;= ~MPX_BD_ENTRY_VALID_FLAG;</div><div class='add'>+	/*</div><div class='add'>+	 * Tables are naturally aligned at 8-byte boundaries</div><div class='add'>+	 * on 64-bit and 4-byte boundaries on 32-bit.  The</div><div class='add'>+	 * documentation makes it appear that the low bits</div><div class='add'>+	 * are ignored by the hardware, so we do the same.</div><div class='add'>+	 */</div><div class='add'>+	if (is_64bit_mm(mm))</div><div class='add'>+		align_to_bytes = 8;</div><div class='add'>+	else</div><div class='add'>+		align_to_bytes = 4;</div><div class='add'>+	bt_addr &amp;= ~(align_to_bytes-1);</div><div class='add'>+	return bt_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Get the base of bounds tables pointed by specific bounds</div><div class='ctx'>  * directory entry.</div><div class='ctx'>  */</div><div class='ctx'> static int get_bt_addr(struct mm_struct *mm,</div><div class='del'>-			long __user *bd_entry, unsigned long *bt_addr)</div><div class='add'>+			long __user *bd_entry_ptr,</div><div class='add'>+			unsigned long *bt_addr_result)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int valid_bit;</div><div class='add'>+	unsigned long bd_entry;</div><div class='add'>+	unsigned long bt_addr;</div><div class='ctx'> </div><div class='del'>-	if (!access_ok(VERIFY_READ, (bd_entry), sizeof(*bd_entry)))</div><div class='add'>+	if (!access_ok(VERIFY_READ, (bd_entry_ptr), sizeof(*bd_entry_ptr)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		int need_write = 0;</div><div class='ctx'> </div><div class='ctx'> 		pagefault_disable();</div><div class='del'>-		ret = get_user(*bt_addr, bd_entry);</div><div class='add'>+		ret = get_user(bd_entry, bd_entry_ptr);</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (ret == -EFAULT)</div><div class='del'>-			ret = mpx_resolve_fault(bd_entry, need_write);</div><div class='add'>+			ret = mpx_resolve_fault(bd_entry_ptr, need_write);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If we could not resolve the fault, consider it</div><div class='ctx'> 		 * userspace's fault and error out.</div><div class='hunk'>@@ -603,8 +673,8 @@ static int get_bt_addr(struct mm_struct *mm,</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	valid_bit = *bt_addr &amp; MPX_BD_ENTRY_VALID_FLAG;</div><div class='del'>-	*bt_addr &amp;= MPX_BT_ADDR_MASK;</div><div class='add'>+	valid_bit = bd_entry &amp; MPX_BD_ENTRY_VALID_FLAG;</div><div class='add'>+	bt_addr = mpx_bd_entry_to_bt_addr(mm, bd_entry);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When the kernel is managing bounds tables, a bounds directory</div><div class='hunk'>@@ -613,7 +683,7 @@ static int get_bt_addr(struct mm_struct *mm,</div><div class='ctx'> 	 * data in the address field, we know something is wrong. This</div><div class='ctx'> 	 * -EINVAL return will cause a SIGSEGV.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!valid_bit &amp;&amp; *bt_addr)</div><div class='add'>+	if (!valid_bit &amp;&amp; bt_addr)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Do we have an completely zeroed bt entry?  That is OK.  It</div><div class='hunk'>@@ -624,19 +694,100 @@ static int get_bt_addr(struct mm_struct *mm,</div><div class='ctx'> 	if (!valid_bit)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='add'>+	*bt_addr_result = bt_addr;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int bt_entry_size_bytes(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	if (is_64bit_mm(mm))</div><div class='add'>+		return MPX_BT_ENTRY_BYTES_64;</div><div class='add'>+	else</div><div class='add'>+		return MPX_BT_ENTRY_BYTES_32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Take a virtual address and turns it in to the offset in bytes</div><div class='add'>+ * inside of the bounds table where the bounds table entry</div><div class='add'>+ * controlling 'addr' can be found.</div><div class='add'>+ */</div><div class='add'>+static unsigned long mpx_get_bt_entry_offset_bytes(struct mm_struct *mm,</div><div class='add'>+		unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long bt_table_nr_entries;</div><div class='add'>+	unsigned long offset = addr;</div><div class='add'>+</div><div class='add'>+	if (is_64bit_mm(mm)) {</div><div class='add'>+		/* Bottom 3 bits are ignored on 64-bit */</div><div class='add'>+		offset &gt;&gt;= 3;</div><div class='add'>+		bt_table_nr_entries = MPX_BT_NR_ENTRIES_64;</div><div class='add'>+	} else {</div><div class='add'>+		/* Bottom 2 bits are ignored on 32-bit */</div><div class='add'>+		offset &gt;&gt;= 2;</div><div class='add'>+		bt_table_nr_entries = MPX_BT_NR_ENTRIES_32;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * We know the size of the table in to which we are</div><div class='add'>+	 * indexing, and we have eliminated all the low bits</div><div class='add'>+	 * which are ignored for indexing.</div><div class='add'>+	 *</div><div class='add'>+	 * Mask out all the high bits which we do not need</div><div class='add'>+	 * to index in to the table.  Note that the tables</div><div class='add'>+	 * are always powers of two so this gives us a proper</div><div class='add'>+	 * mask.</div><div class='add'>+	 */</div><div class='add'>+	offset &amp;= (bt_table_nr_entries-1);</div><div class='add'>+	/*</div><div class='add'>+	 * We now have an entry offset in terms of *entries* in</div><div class='add'>+	 * the table.  We need to scale it back up to bytes.</div><div class='add'>+	 */</div><div class='add'>+	offset *= bt_entry_size_bytes(mm);</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * How much virtual address space does a single bounds</div><div class='add'>+ * directory entry cover?</div><div class='add'>+ *</div><div class='add'>+ * Note, we need a long long because 4GB doesn't fit in</div><div class='add'>+ * to a long on 32-bit.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long bd_entry_virt_space(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	unsigned long long virt_space = (1ULL &lt;&lt; boot_cpu_data.x86_virt_bits);</div><div class='add'>+	if (is_64bit_mm(mm))</div><div class='add'>+		return virt_space / MPX_BD_NR_ENTRIES_64;</div><div class='add'>+	else</div><div class='add'>+		return virt_space / MPX_BD_NR_ENTRIES_32;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Free the backing physical pages of bounds table 'bt_addr'.</div><div class='ctx'>  * Assume start...end is within that bounds table.</div><div class='ctx'>  */</div><div class='del'>-static int zap_bt_entries(struct mm_struct *mm,</div><div class='add'>+static noinline int zap_bt_entries_mapping(struct mm_struct *mm,</div><div class='ctx'> 		unsigned long bt_addr,</div><div class='del'>-		unsigned long start, unsigned long end)</div><div class='add'>+		unsigned long start_mapping, unsigned long end_mapping)</div><div class='ctx'> {</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> 	unsigned long addr, len;</div><div class='add'>+	unsigned long start;</div><div class='add'>+	unsigned long end;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if we 'end' on a boundary, the offset will be 0 which</div><div class='add'>+	 * is not what we want.  Back it up a byte to get the</div><div class='add'>+	 * last bt entry.  Then once we have the entry itself,</div><div class='add'>+	 * move 'end' back up by the table entry size.</div><div class='add'>+	 */</div><div class='add'>+	start = bt_addr + mpx_get_bt_entry_offset_bytes(mm, start_mapping);</div><div class='add'>+	end   = bt_addr + mpx_get_bt_entry_offset_bytes(mm, end_mapping - 1);</div><div class='add'>+	/*</div><div class='add'>+	 * Move end back up by one entry.  Among other things</div><div class='add'>+	 * this ensures that it remains page-aligned and does</div><div class='add'>+	 * not screw up zap_page_range()</div><div class='add'>+	 */</div><div class='add'>+	end += bt_entry_size_bytes(mm);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Find the first overlapping vma. If vma-&gt;vm_start &gt; start, there</div><div class='hunk'>@@ -648,7 +799,7 @@ static int zap_bt_entries(struct mm_struct *mm,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * A NUMA policy on a VM_MPX VMA could cause this bouds table to</div><div class='add'>+	 * A NUMA policy on a VM_MPX VMA could cause this bounds table to</div><div class='ctx'> 	 * be split. So we need to look across the entire 'start -&gt; end'</div><div class='ctx'> 	 * range of this bounds table, find all of the VM_MPX VMAs, and</div><div class='ctx'> 	 * zap only those.</div><div class='hunk'>@@ -666,27 +817,65 @@ static int zap_bt_entries(struct mm_struct *mm,</div><div class='ctx'> </div><div class='ctx'> 		len = min(vma-&gt;vm_end, end) - addr;</div><div class='ctx'> 		zap_page_range(vma, addr, len, NULL);</div><div class='add'>+		trace_mpx_unmap_zap(addr, addr+len);</div><div class='ctx'> </div><div class='ctx'> 		vma = vma-&gt;vm_next;</div><div class='ctx'> 		addr = vma-&gt;vm_start;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int unmap_single_bt(struct mm_struct *mm,</div><div class='add'>+static unsigned long mpx_get_bd_entry_offset(struct mm_struct *mm,</div><div class='add'>+		unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * There are several ways to derive the bd offsets.  We</div><div class='add'>+	 * use the following approach here:</div><div class='add'>+	 * 1. We know the size of the virtual address space</div><div class='add'>+	 * 2. We know the number of entries in a bounds table</div><div class='add'>+	 * 3. We know that each entry covers a fixed amount of</div><div class='add'>+	 *    virtual address space.</div><div class='add'>+	 * So, we can just divide the virtual address by the</div><div class='add'>+	 * virtual space used by one entry to determine which</div><div class='add'>+	 * entry "controls" the given virtual address.</div><div class='add'>+	 */</div><div class='add'>+	if (is_64bit_mm(mm)) {</div><div class='add'>+		int bd_entry_size = 8; /* 64-bit pointer */</div><div class='add'>+		/*</div><div class='add'>+		 * Take the 64-bit addressing hole in to account.</div><div class='add'>+		 */</div><div class='add'>+		addr &amp;= ((1UL &lt;&lt; boot_cpu_data.x86_virt_bits) - 1);</div><div class='add'>+		return (addr / bd_entry_virt_space(mm)) * bd_entry_size;</div><div class='add'>+	} else {</div><div class='add'>+		int bd_entry_size = 4; /* 32-bit pointer */</div><div class='add'>+		/*</div><div class='add'>+		 * 32-bit has no hole so this case needs no mask</div><div class='add'>+		 */</div><div class='add'>+		return (addr / bd_entry_virt_space(mm)) * bd_entry_size;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * The two return calls above are exact copies.  If we</div><div class='add'>+	 * pull out a single copy and put it in here, gcc won't</div><div class='add'>+	 * realize that we're doing a power-of-2 divide and use</div><div class='add'>+	 * shifts.  It uses a real divide.  If we put them up</div><div class='add'>+	 * there, it manages to figure it out (gcc 4.8.3).</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int unmap_entire_bt(struct mm_struct *mm,</div><div class='ctx'> 		long __user *bd_entry, unsigned long bt_addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long expected_old_val = bt_addr | MPX_BD_ENTRY_VALID_FLAG;</div><div class='del'>-	unsigned long actual_old_val = 0;</div><div class='add'>+	unsigned long uninitialized_var(actual_old_val);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		int need_write = 1;</div><div class='add'>+		unsigned long cleared_bd_entry = 0;</div><div class='ctx'> </div><div class='ctx'> 		pagefault_disable();</div><div class='del'>-		ret = user_atomic_cmpxchg_inatomic(&amp;actual_old_val, bd_entry,</div><div class='del'>-						   expected_old_val, 0);</div><div class='add'>+		ret = mpx_cmpxchg_bd_entry(mm, &amp;actual_old_val,</div><div class='add'>+				bd_entry, expected_old_val, cleared_bd_entry);</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -705,9 +894,8 @@ static int unmap_single_bt(struct mm_struct *mm,</div><div class='ctx'> 	if (actual_old_val != expected_old_val) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Someone else raced with us to unmap the table.</div><div class='del'>-		 * There was no bounds table pointed to by the</div><div class='del'>-		 * directory, so declare success.  Somebody freed</div><div class='del'>-		 * it.</div><div class='add'>+		 * That is OK, since we were both trying to do</div><div class='add'>+		 * the same thing.  Declare success.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!actual_old_val)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -720,176 +908,113 @@ static int unmap_single_bt(struct mm_struct *mm,</div><div class='ctx'> 		 */</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note, we are likely being called under do_munmap() already. To</div><div class='ctx'> 	 * avoid recursion, do_munmap() will check whether it comes</div><div class='ctx'> 	 * from one bounds table through VM_MPX flag.</div><div class='ctx'> 	 */</div><div class='del'>-	return do_munmap(mm, bt_addr, MPX_BT_SIZE_BYTES);</div><div class='add'>+	return do_munmap(mm, bt_addr, mpx_bt_size_bytes(mm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * If the bounds table pointed by bounds directory 'bd_entry' is</div><div class='del'>- * not shared, unmap this whole bounds table. Otherwise, only free</div><div class='del'>- * those backing physical pages of bounds table entries covered</div><div class='del'>- * in this virtual address region start...end.</div><div class='del'>- */</div><div class='del'>-static int unmap_shared_bt(struct mm_struct *mm,</div><div class='del'>-		long __user *bd_entry, unsigned long start,</div><div class='del'>-		unsigned long end, bool prev_shared, bool next_shared)</div><div class='add'>+static int try_unmap_single_bt(struct mm_struct *mm,</div><div class='add'>+	       unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	unsigned long bt_addr;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = get_bt_addr(mm, bd_entry, &amp;bt_addr);</div><div class='add'>+	struct vm_area_struct *next;</div><div class='add'>+	struct vm_area_struct *prev;</div><div class='ctx'> 	/*</div><div class='del'>-	 * We could see an "error" ret for not-present bounds</div><div class='del'>-	 * tables (not really an error), or actual errors, but</div><div class='del'>-	 * stop unmapping either way.</div><div class='add'>+	 * "bta" == Bounds Table Area: the area controlled by the</div><div class='add'>+	 * bounds table that we are unmapping.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (prev_shared &amp;&amp; next_shared)</div><div class='del'>-		ret = zap_bt_entries(mm, bt_addr,</div><div class='del'>-				bt_addr+MPX_GET_BT_ENTRY_OFFSET(start),</div><div class='del'>-				bt_addr+MPX_GET_BT_ENTRY_OFFSET(end));</div><div class='del'>-	else if (prev_shared)</div><div class='del'>-		ret = zap_bt_entries(mm, bt_addr,</div><div class='del'>-				bt_addr+MPX_GET_BT_ENTRY_OFFSET(start),</div><div class='del'>-				bt_addr+MPX_BT_SIZE_BYTES);</div><div class='del'>-	else if (next_shared)</div><div class='del'>-		ret = zap_bt_entries(mm, bt_addr, bt_addr,</div><div class='del'>-				bt_addr+MPX_GET_BT_ENTRY_OFFSET(end));</div><div class='del'>-	else</div><div class='del'>-		ret = unmap_single_bt(mm, bd_entry, bt_addr);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * A virtual address region being munmap()ed might share bounds table</div><div class='del'>- * with adjacent VMAs. We only need to free the backing physical</div><div class='del'>- * memory of these shared bounds tables entries covered in this virtual</div><div class='del'>- * address region.</div><div class='del'>- */</div><div class='del'>-static int unmap_edge_bts(struct mm_struct *mm,</div><div class='del'>-		unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='add'>+	unsigned long bta_start_vaddr = start &amp; ~(bd_entry_virt_space(mm)-1);</div><div class='add'>+	unsigned long bta_end_vaddr = bta_start_vaddr + bd_entry_virt_space(mm);</div><div class='add'>+	unsigned long uninitialized_var(bt_addr);</div><div class='add'>+	void __user *bde_vaddr;</div><div class='ctx'> 	int ret;</div><div class='del'>-	long __user *bde_start, *bde_end;</div><div class='del'>-	struct vm_area_struct *prev, *next;</div><div class='del'>-	bool prev_shared = false, next_shared = false;</div><div class='del'>-</div><div class='del'>-	bde_start = mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(start);</div><div class='del'>-	bde_end = mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(end-1);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * Check whether bde_start and bde_end are shared with adjacent</div><div class='del'>-	 * VMAs.</div><div class='del'>-	 *</div><div class='del'>-	 * We already unliked the VMAs from the mm's rbtree so 'start'</div><div class='add'>+	 * We already unlinked the VMAs from the mm's rbtree so 'start'</div><div class='ctx'> 	 * is guaranteed to be in a hole. This gets us the first VMA</div><div class='ctx'> 	 * before the hole in to 'prev' and the next VMA after the hole</div><div class='ctx'> 	 * in to 'next'.</div><div class='ctx'> 	 */</div><div class='ctx'> 	next = find_vma_prev(mm, start, &amp;prev);</div><div class='del'>-	if (prev &amp;&amp; (mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(prev-&gt;vm_end-1))</div><div class='del'>-			== bde_start)</div><div class='del'>-		prev_shared = true;</div><div class='del'>-	if (next &amp;&amp; (mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(next-&gt;vm_start))</div><div class='del'>-			== bde_end)</div><div class='del'>-		next_shared = true;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * This virtual address region being munmap()ed is only</div><div class='del'>-	 * covered by one bounds table.</div><div class='del'>-	 *</div><div class='del'>-	 * In this case, if this table is also shared with adjacent</div><div class='del'>-	 * VMAs, only part of the backing physical memory of the bounds</div><div class='del'>-	 * table need be freeed. Otherwise the whole bounds table need</div><div class='del'>-	 * be unmapped.</div><div class='del'>-	 */</div><div class='del'>-	if (bde_start == bde_end) {</div><div class='del'>-		return unmap_shared_bt(mm, bde_start, start, end,</div><div class='del'>-				prev_shared, next_shared);</div><div class='add'>+	 * Do not count other MPX bounds table VMAs as neighbors.</div><div class='add'>+	 * Although theoretically possible, we do not allow bounds</div><div class='add'>+	 * tables for bounds tables so our heads do not explode.</div><div class='add'>+	 * If we count them as neighbors here, we may end up with</div><div class='add'>+	 * lots of tables even though we have no actual table</div><div class='add'>+	 * entries in use.</div><div class='add'>+	 */</div><div class='add'>+	while (next &amp;&amp; is_mpx_vma(next))</div><div class='add'>+		next = next-&gt;vm_next;</div><div class='add'>+	while (prev &amp;&amp; is_mpx_vma(prev))</div><div class='add'>+		prev = prev-&gt;vm_prev;</div><div class='add'>+	/*</div><div class='add'>+	 * We know 'start' and 'end' lie within an area controlled</div><div class='add'>+	 * by a single bounds table.  See if there are any other</div><div class='add'>+	 * VMAs controlled by that bounds table.  If there are not</div><div class='add'>+	 * then we can "expand" the are we are unmapping to possibly</div><div class='add'>+	 * cover the entire table.</div><div class='add'>+	 */</div><div class='add'>+	next = find_vma_prev(mm, start, &amp;prev);</div><div class='add'>+	if ((!prev || prev-&gt;vm_end &lt;= bta_start_vaddr) &amp;&amp;</div><div class='add'>+	    (!next || next-&gt;vm_start &gt;= bta_end_vaddr)) {</div><div class='add'>+		/*</div><div class='add'>+		 * No neighbor VMAs controlled by same bounds</div><div class='add'>+		 * table.  Try to unmap the whole thing</div><div class='add'>+		 */</div><div class='add'>+		start = bta_start_vaddr;</div><div class='add'>+		end = bta_end_vaddr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	bde_vaddr = mm-&gt;bd_addr + mpx_get_bd_entry_offset(mm, start);</div><div class='add'>+	ret = get_bt_addr(mm, bde_vaddr, &amp;bt_addr);</div><div class='ctx'> 	/*</div><div class='del'>-	 * If more than one bounds tables are covered in this virtual</div><div class='del'>-	 * address region being munmap()ed, we need to separately check</div><div class='del'>-	 * whether bde_start and bde_end are shared with adjacent VMAs.</div><div class='add'>+	 * No bounds table there, so nothing to unmap.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = unmap_shared_bt(mm, bde_start, start, end, prev_shared, false);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = unmap_shared_bt(mm, bde_end, start, end, false, next_shared);</div><div class='add'>+	if (ret == -ENOENT) {</div><div class='add'>+		ret = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * We are unmapping an entire table.  Either because the</div><div class='add'>+	 * unmap that started this whole process was large enough</div><div class='add'>+	 * to cover an entire table, or that the unmap was small</div><div class='add'>+	 * but was the area covered by a bounds table.</div><div class='add'>+	 */</div><div class='add'>+	if ((start == bta_start_vaddr) &amp;&amp;</div><div class='add'>+	    (end == bta_end_vaddr))</div><div class='add'>+		return unmap_entire_bt(mm, bde_vaddr, bt_addr);</div><div class='add'>+	return zap_bt_entries_mapping(mm, bt_addr, start, end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mpx_unmap_tables(struct mm_struct *mm,</div><div class='ctx'> 		unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	long __user *bd_entry, *bde_start, *bde_end;</div><div class='del'>-	unsigned long bt_addr;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * "Edge" bounds tables are those which are being used by the region</div><div class='del'>-	 * (start -&gt; end), but that may be shared with adjacent areas.  If they</div><div class='del'>-	 * turn out to be completely unshared, they will be freed.  If they are</div><div class='del'>-	 * shared, we will free the backing store (like an MADV_DONTNEED) for</div><div class='del'>-	 * areas used by this region.</div><div class='del'>-	 */</div><div class='del'>-	ret = unmap_edge_bts(mm, start, end);</div><div class='del'>-	switch (ret) {</div><div class='del'>-		/* non-present tables are OK */</div><div class='del'>-		case 0:</div><div class='del'>-		case -ENOENT:</div><div class='del'>-			/* Success, or no tables to unmap */</div><div class='del'>-			break;</div><div class='del'>-		case -EINVAL:</div><div class='del'>-		case -EFAULT:</div><div class='del'>-		default:</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only unmap the bounds table that are</div><div class='del'>-	 *   1. fully covered</div><div class='del'>-	 *   2. not at the edges of the mapping, even if full aligned</div><div class='del'>-	 */</div><div class='del'>-	bde_start = mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(start);</div><div class='del'>-	bde_end = mm-&gt;bd_addr + MPX_GET_BD_ENTRY_OFFSET(end-1);</div><div class='del'>-	for (bd_entry = bde_start + 1; bd_entry &lt; bde_end; bd_entry++) {</div><div class='del'>-		ret = get_bt_addr(mm, bd_entry, &amp;bt_addr);</div><div class='del'>-		switch (ret) {</div><div class='del'>-			case 0:</div><div class='del'>-				break;</div><div class='del'>-			case -ENOENT:</div><div class='del'>-				/* No table here, try the next one */</div><div class='del'>-				continue;</div><div class='del'>-			case -EINVAL:</div><div class='del'>-			case -EFAULT:</div><div class='del'>-			default:</div><div class='del'>-				/*</div><div class='del'>-				 * Note: we are being strict here.</div><div class='del'>-				 * Any time we run in to an issue</div><div class='del'>-				 * unmapping tables, we stop and</div><div class='del'>-				 * SIGSEGV.</div><div class='del'>-				 */</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = unmap_single_bt(mm, bd_entry, bt_addr);</div><div class='add'>+	unsigned long one_unmap_start;</div><div class='add'>+	trace_mpx_unmap_search(start, end);</div><div class='add'>+</div><div class='add'>+	one_unmap_start = start;</div><div class='add'>+	while (one_unmap_start &lt; end) {</div><div class='add'>+		int ret;</div><div class='add'>+		unsigned long next_unmap_start = ALIGN(one_unmap_start+1,</div><div class='add'>+						       bd_entry_virt_space(mm));</div><div class='add'>+		unsigned long one_unmap_end = end;</div><div class='add'>+		/*</div><div class='add'>+		 * if the end is beyond the current bounds table,</div><div class='add'>+		 * move it back so we only deal with a single one</div><div class='add'>+		 * at a time</div><div class='add'>+		 */</div><div class='add'>+		if (one_unmap_end &gt; next_unmap_start)</div><div class='add'>+			one_unmap_end = next_unmap_start;</div><div class='add'>+		ret = try_unmap_single_bt(mm, one_unmap_start, one_unmap_end);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+		one_unmap_start = next_unmap_start;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/pageattr-test.c b/arch/x86/mm/pageattr-test.c<br/>index 6629f397b467..8ff686aa7e8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pageattr-test.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pageattr-test.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pageattr-test.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pageattr-test.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='head'>diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c<br/>index 89af288ec674..727158cb3b3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pageattr.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pageattr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pageattr.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pageattr.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -129,16 +130,15 @@ within(unsigned long addr, unsigned long start, unsigned long end)</div><div class='ctx'>  */</div><div class='ctx'> void clflush_cache_range(void *vaddr, unsigned int size)</div><div class='ctx'> {</div><div class='del'>-	void *vend = vaddr + size - 1;</div><div class='add'>+	unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;</div><div class='add'>+	void *vend = vaddr + size;</div><div class='add'>+	void *p;</div><div class='ctx'> </div><div class='ctx'> 	mb();</div><div class='ctx'> </div><div class='del'>-	for (; vaddr &lt; vend; vaddr += boot_cpu_data.x86_clflush_size)</div><div class='del'>-		clflushopt(vaddr);</div><div class='del'>-	/*</div><div class='del'>-	 * Flush any possible final partial cacheline:</div><div class='del'>-	 */</div><div class='del'>-	clflushopt(vend);</div><div class='add'>+	for (p = (void *)((unsigned long)vaddr &amp; ~clflush_mask);</div><div class='add'>+	     p &lt; vend; p += boot_cpu_data.x86_clflush_size)</div><div class='add'>+		clflushopt(p);</div><div class='ctx'> </div><div class='ctx'> 	mb();</div><div class='ctx'> }</div><div class='hunk'>@@ -418,13 +418,11 @@ phys_addr_t slow_virt_to_phys(void *__virt_addr)</div><div class='ctx'> 	phys_addr_t phys_addr;</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	enum pg_level level;</div><div class='del'>-	unsigned long psize;</div><div class='ctx'> 	unsigned long pmask;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='ctx'> 	pte = lookup_address(virt_addr, &amp;level);</div><div class='ctx'> 	BUG_ON(!pte);</div><div class='del'>-	psize = page_level_size(level);</div><div class='ctx'> 	pmask = page_level_mask(level);</div><div class='ctx'> 	offset = virt_addr &amp; ~pmask;</div><div class='ctx'> 	phys_addr = (phys_addr_t)pte_pfn(*pte) &lt;&lt; PAGE_SHIFT;</div><div class='hunk'>@@ -1468,6 +1466,9 @@ int _set_memory_uc(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * for now UC MINUS. see comments in ioremap_nocache()</div><div class='add'>+	 * If you really need strong UC use ioremap_uc(), but note</div><div class='add'>+	 * that you cannot override IO areas with set_memory_*() as</div><div class='add'>+	 * these helpers cannot work with IO memory.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return change_page_attr_set(&amp;addr, numpages,</div><div class='ctx'> 				    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),</div><div class='hunk'>@@ -1502,12 +1503,10 @@ EXPORT_SYMBOL(set_memory_uc);</div><div class='ctx'> static int _set_memory_array(unsigned long *addr, int addrinarray,</div><div class='ctx'> 		enum page_cache_mode new_type)</div><div class='ctx'> {</div><div class='add'>+	enum page_cache_mode set_type;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * for now UC MINUS. see comments in ioremap_nocache()</div><div class='del'>-	 */</div><div class='ctx'> 	for (i = 0; i &lt; addrinarray; i++) {</div><div class='ctx'> 		ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,</div><div class='ctx'> 					new_type, NULL);</div><div class='hunk'>@@ -1515,9 +1514,12 @@ static int _set_memory_array(unsigned long *addr, int addrinarray,</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If WC, set to UC- first and then WC */</div><div class='add'>+	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?</div><div class='add'>+				_PAGE_CACHE_MODE_UC_MINUS : new_type;</div><div class='add'>+</div><div class='ctx'> 	ret = change_page_attr_set(addr, addrinarray,</div><div class='del'>-				   cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),</div><div class='del'>-				   1);</div><div class='add'>+				   cachemode2pgprot(set_type), 1);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret &amp;&amp; new_type == _PAGE_CACHE_MODE_WC)</div><div class='ctx'> 		ret = change_page_attr_set_clr(addr, addrinarray,</div><div class='hunk'>@@ -1549,6 +1551,12 @@ int set_memory_array_wc(unsigned long *addr, int addrinarray)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(set_memory_array_wc);</div><div class='ctx'> </div><div class='add'>+int set_memory_array_wt(unsigned long *addr, int addrinarray)</div><div class='add'>+{</div><div class='add'>+	return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(set_memory_array_wt);</div><div class='add'>+</div><div class='ctx'> int _set_memory_wc(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1571,27 +1579,42 @@ int set_memory_wc(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='del'>-		return set_memory_uc(addr, numpages);</div><div class='del'>-</div><div class='ctx'> 	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,</div><div class='ctx'> 		_PAGE_CACHE_MODE_WC, NULL);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_err;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = _set_memory_wc(addr, numpages);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-out_free:</div><div class='del'>-	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);</div><div class='del'>-out_err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(set_memory_wc);</div><div class='ctx'> </div><div class='add'>+int _set_memory_wt(unsigned long addr, int numpages)</div><div class='add'>+{</div><div class='add'>+	return change_page_attr_set(&amp;addr, numpages,</div><div class='add'>+				    cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int set_memory_wt(unsigned long addr, int numpages)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,</div><div class='add'>+			      _PAGE_CACHE_MODE_WT, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = _set_memory_wt(addr, numpages);</div><div class='add'>+	if (ret)</div><div class='add'>+		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(set_memory_wt);</div><div class='add'>+</div><div class='ctx'> int _set_memory_wb(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	/* WB cache mode is hard wired to all cache attribute bits being 0 */</div><div class='hunk'>@@ -1682,6 +1705,7 @@ static int _set_pages_array(struct page **pages, int addrinarray,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start;</div><div class='ctx'> 	unsigned long end;</div><div class='add'>+	enum page_cache_mode set_type;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int free_idx;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1695,8 +1719,12 @@ static int _set_pages_array(struct page **pages, int addrinarray,</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If WC, set to UC- first and then WC */</div><div class='add'>+	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?</div><div class='add'>+				_PAGE_CACHE_MODE_UC_MINUS : new_type;</div><div class='add'>+</div><div class='ctx'> 	ret = cpa_set_pages_array(pages, addrinarray,</div><div class='del'>-			cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));</div><div class='add'>+				  cachemode2pgprot(set_type));</div><div class='ctx'> 	if (!ret &amp;&amp; new_type == _PAGE_CACHE_MODE_WC)</div><div class='ctx'> 		ret = change_page_attr_set_clr(NULL, addrinarray,</div><div class='ctx'> 					       cachemode2pgprot(</div><div class='hunk'>@@ -1730,6 +1758,12 @@ int set_pages_array_wc(struct page **pages, int addrinarray)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(set_pages_array_wc);</div><div class='ctx'> </div><div class='add'>+int set_pages_array_wt(struct page **pages, int addrinarray)</div><div class='add'>+{</div><div class='add'>+	return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(set_pages_array_wt);</div><div class='add'>+</div><div class='ctx'> int set_pages_wb(struct page *page, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr = (unsigned long)page_address(page);</div><div class='head'>diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c<br/>index 35af6771a95a..188e3e07eeeb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pat.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pat.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pat.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat.c</a></div><div class='hunk'>@@ -33,13 +33,17 @@</div><div class='ctx'> #include "pat_internal.h"</div><div class='ctx'> #include "mm_internal.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_PAT</div><div class='del'>-int __read_mostly pat_enabled = 1;</div><div class='add'>+#undef pr_fmt</div><div class='add'>+#define pr_fmt(fmt) "" fmt</div><div class='add'>+</div><div class='add'>+static bool boot_cpu_done;</div><div class='add'>+</div><div class='add'>+static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT);</div><div class='ctx'> </div><div class='ctx'> static inline void pat_disable(const char *reason)</div><div class='ctx'> {</div><div class='del'>-	pat_enabled = 0;</div><div class='del'>-	printk(KERN_INFO "%s\n", reason);</div><div class='add'>+	__pat_enabled = 0;</div><div class='add'>+	pr_info("x86/PAT: %s\n", reason);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init nopat(char *str)</div><div class='hunk'>@@ -48,13 +52,12 @@ static int __init nopat(char *str)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_param("nopat", nopat);</div><div class='del'>-#else</div><div class='del'>-static inline void pat_disable(const char *reason)</div><div class='add'>+</div><div class='add'>+bool pat_enabled(void)</div><div class='ctx'> {</div><div class='del'>-	(void)reason;</div><div class='add'>+	return !!__pat_enabled;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+EXPORT_SYMBOL_GPL(pat_enabled);</div><div class='ctx'> </div><div class='ctx'> int pat_debug_enable;</div><div class='ctx'> </div><div class='hunk'>@@ -65,22 +68,24 @@ static int __init pat_debug_setup(char *str)</div><div class='ctx'> }</div><div class='ctx'> __setup("debugpat", pat_debug_setup);</div><div class='ctx'> </div><div class='del'>-static u64 __read_mostly boot_pat_state;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_PAT</div><div class='ctx'> /*</div><div class='del'>- * X86 PAT uses page flags WC and Uncached together to keep track of</div><div class='del'>- * memory type of pages that have backing page struct. X86 PAT supports 3</div><div class='del'>- * different memory types, _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC and</div><div class='del'>- * _PAGE_CACHE_MODE_UC_MINUS and fourth state where page's memory type has not</div><div class='del'>- * been changed from its default (value of -1 used to denote this).</div><div class='del'>- * Note we do not support _PAGE_CACHE_MODE_UC here.</div><div class='add'>+ * X86 PAT uses page flags arch_1 and uncached together to keep track of</div><div class='add'>+ * memory type of pages that have backing page struct.</div><div class='add'>+ *</div><div class='add'>+ * X86 PAT supports 4 different memory types:</div><div class='add'>+ *  - _PAGE_CACHE_MODE_WB</div><div class='add'>+ *  - _PAGE_CACHE_MODE_WC</div><div class='add'>+ *  - _PAGE_CACHE_MODE_UC_MINUS</div><div class='add'>+ *  - _PAGE_CACHE_MODE_WT</div><div class='add'>+ *</div><div class='add'>+ * _PAGE_CACHE_MODE_WB is the default type.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define _PGMT_DEFAULT		0</div><div class='add'>+#define _PGMT_WB		0</div><div class='ctx'> #define _PGMT_WC		(1UL &lt;&lt; PG_arch_1)</div><div class='ctx'> #define _PGMT_UC_MINUS		(1UL &lt;&lt; PG_uncached)</div><div class='del'>-#define _PGMT_WB		(1UL &lt;&lt; PG_uncached | 1UL &lt;&lt; PG_arch_1)</div><div class='add'>+#define _PGMT_WT		(1UL &lt;&lt; PG_uncached | 1UL &lt;&lt; PG_arch_1)</div><div class='ctx'> #define _PGMT_MASK		(1UL &lt;&lt; PG_uncached | 1UL &lt;&lt; PG_arch_1)</div><div class='ctx'> #define _PGMT_CLEAR_MASK	(~_PGMT_MASK)</div><div class='ctx'> </div><div class='hunk'>@@ -88,14 +93,14 @@ static inline enum page_cache_mode get_page_memtype(struct page *pg)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pg_flags = pg-&gt;flags &amp; _PGMT_MASK;</div><div class='ctx'> </div><div class='del'>-	if (pg_flags == _PGMT_DEFAULT)</div><div class='del'>-		return -1;</div><div class='add'>+	if (pg_flags == _PGMT_WB)</div><div class='add'>+		return _PAGE_CACHE_MODE_WB;</div><div class='ctx'> 	else if (pg_flags == _PGMT_WC)</div><div class='ctx'> 		return _PAGE_CACHE_MODE_WC;</div><div class='ctx'> 	else if (pg_flags == _PGMT_UC_MINUS)</div><div class='ctx'> 		return _PAGE_CACHE_MODE_UC_MINUS;</div><div class='ctx'> 	else</div><div class='del'>-		return _PAGE_CACHE_MODE_WB;</div><div class='add'>+		return _PAGE_CACHE_MODE_WT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void set_page_memtype(struct page *pg,</div><div class='hunk'>@@ -112,11 +117,12 @@ static inline void set_page_memtype(struct page *pg,</div><div class='ctx'> 	case _PAGE_CACHE_MODE_UC_MINUS:</div><div class='ctx'> 		memtype_flags = _PGMT_UC_MINUS;</div><div class='ctx'> 		break;</div><div class='del'>-	case _PAGE_CACHE_MODE_WB:</div><div class='del'>-		memtype_flags = _PGMT_WB;</div><div class='add'>+	case _PAGE_CACHE_MODE_WT:</div><div class='add'>+		memtype_flags = _PGMT_WT;</div><div class='ctx'> 		break;</div><div class='add'>+	case _PAGE_CACHE_MODE_WB:</div><div class='ctx'> 	default:</div><div class='del'>-		memtype_flags = _PGMT_DEFAULT;</div><div class='add'>+		memtype_flags = _PGMT_WB;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -174,78 +180,154 @@ static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)</div><div class='ctx'>  * configuration.</div><div class='ctx'>  * Using lower indices is preferred, so we start with highest index.</div><div class='ctx'>  */</div><div class='del'>-void pat_init_cache_modes(void)</div><div class='add'>+void pat_init_cache_modes(u64 pat)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	enum page_cache_mode cache;</div><div class='ctx'> 	char pat_msg[33];</div><div class='del'>-	u64 pat;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_CR_PAT, pat);</div><div class='ctx'> 	pat_msg[32] = 0;</div><div class='ctx'> 	for (i = 7; i &gt;= 0; i--) {</div><div class='ctx'> 		cache = pat_get_cache_mode((pat &gt;&gt; (i * 8)) &amp; 7,</div><div class='ctx'> 					   pat_msg + 4 * i);</div><div class='ctx'> 		update_cache_mode_entry(i, cache);</div><div class='ctx'> 	}</div><div class='del'>-	pr_info("PAT configuration [0-7]: %s\n", pat_msg);</div><div class='add'>+	pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define PAT(x, y)	((u64)PAT_ ## y &lt;&lt; ((x)*8))</div><div class='ctx'> </div><div class='del'>-void pat_init(void)</div><div class='add'>+static void pat_bsp_init(u64 pat)</div><div class='ctx'> {</div><div class='del'>-	u64 pat;</div><div class='del'>-	bool boot_cpu = !boot_pat_state;</div><div class='add'>+	u64 tmp_pat;</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='add'>+	if (!cpu_has_pat) {</div><div class='add'>+		pat_disable("PAT not supported by CPU.");</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!cpu_has_pat) {</div><div class='del'>-		if (!boot_pat_state) {</div><div class='del'>-			pat_disable("PAT not supported by CPU.");</div><div class='del'>-			return;</div><div class='del'>-		} else {</div><div class='del'>-			/*</div><div class='del'>-			 * If this happens we are on a secondary CPU, but</div><div class='del'>-			 * switched to PAT on the boot CPU. We have no way to</div><div class='del'>-			 * undo PAT.</div><div class='del'>-			 */</div><div class='del'>-			printk(KERN_ERR "PAT enabled, "</div><div class='del'>-			       "but not supported by secondary CPU\n");</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='add'>+	if (!pat_enabled())</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	rdmsrl(MSR_IA32_CR_PAT, tmp_pat);</div><div class='add'>+	if (!tmp_pat) {</div><div class='add'>+		pat_disable("PAT MSR is 0, disabled.");</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Set PWT to Write-Combining. All other bits stay the same */</div><div class='del'>-	/*</div><div class='del'>-	 * PTE encoding used in Linux:</div><div class='del'>-	 *      PAT</div><div class='del'>-	 *      |PCD</div><div class='del'>-	 *      ||PWT</div><div class='del'>-	 *      |||</div><div class='del'>-	 *      000 WB		_PAGE_CACHE_WB</div><div class='del'>-	 *      001 WC		_PAGE_CACHE_WC</div><div class='del'>-	 *      010 UC-		_PAGE_CACHE_UC_MINUS</div><div class='del'>-	 *      011 UC		_PAGE_CACHE_UC</div><div class='del'>-	 * PAT bit unused</div><div class='del'>-	 */</div><div class='del'>-	pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |</div><div class='del'>-	      PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);</div><div class='del'>-</div><div class='del'>-	/* Boot CPU check */</div><div class='del'>-	if (!boot_pat_state) {</div><div class='del'>-		rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);</div><div class='del'>-		if (!boot_pat_state) {</div><div class='del'>-			pat_disable("PAT read returns always zero, disabled.");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	wrmsrl(MSR_IA32_CR_PAT, pat);</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	pat_init_cache_modes(pat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pat_ap_init(u64 pat)</div><div class='add'>+{</div><div class='add'>+	if (!pat_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_pat) {</div><div class='add'>+		/*</div><div class='add'>+		 * If this happens we are on a secondary CPU, but switched to</div><div class='add'>+		 * PAT on the boot CPU. We have no way to undo PAT.</div><div class='add'>+		 */</div><div class='add'>+		panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wrmsrl(MSR_IA32_CR_PAT, pat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pat_init(void)</div><div class='add'>+{</div><div class='add'>+	u64 pat;</div><div class='add'>+	struct cpuinfo_x86 *c = &amp;boot_cpu_data;</div><div class='add'>+</div><div class='add'>+	if (!pat_enabled()) {</div><div class='add'>+		/*</div><div class='add'>+		 * No PAT. Emulate the PAT table that corresponds to the two</div><div class='add'>+		 * cache bits, PWT (Write Through) and PCD (Cache Disable). This</div><div class='add'>+		 * setup is the same as the BIOS default setup when the system</div><div class='add'>+		 * has PAT but the "nopat" boot option has been specified. This</div><div class='add'>+		 * emulated PAT table is used when MSR_IA32_CR_PAT returns 0.</div><div class='add'>+		 *</div><div class='add'>+		 * PTE encoding:</div><div class='add'>+		 *</div><div class='add'>+		 *       PCD</div><div class='add'>+		 *       |PWT  PAT</div><div class='add'>+		 *       ||    slot</div><div class='add'>+		 *       00    0    WB : _PAGE_CACHE_MODE_WB</div><div class='add'>+		 *       01    1    WT : _PAGE_CACHE_MODE_WT</div><div class='add'>+		 *       10    2    UC-: _PAGE_CACHE_MODE_UC_MINUS</div><div class='add'>+		 *       11    3    UC : _PAGE_CACHE_MODE_UC</div><div class='add'>+		 *</div><div class='add'>+		 * NOTE: When WC or WP is used, it is redirected to UC- per</div><div class='add'>+		 * the default setup in __cachemode2pte_tbl[].</div><div class='add'>+		 */</div><div class='add'>+		pat = PAT(0, WB) | PAT(1, WT) | PAT(2, UC_MINUS) | PAT(3, UC) |</div><div class='add'>+		      PAT(4, WB) | PAT(5, WT) | PAT(6, UC_MINUS) | PAT(7, UC);</div><div class='ctx'> </div><div class='del'>-	if (boot_cpu)</div><div class='del'>-		pat_init_cache_modes();</div><div class='add'>+	} else if ((c-&gt;x86_vendor == X86_VENDOR_INTEL) &amp;&amp;</div><div class='add'>+		   (((c-&gt;x86 == 0x6) &amp;&amp; (c-&gt;x86_model &lt;= 0xd)) ||</div><div class='add'>+		    ((c-&gt;x86 == 0xf) &amp;&amp; (c-&gt;x86_model &lt;= 0x6)))) {</div><div class='add'>+		/*</div><div class='add'>+		 * PAT support with the lower four entries. Intel Pentium 2,</div><div class='add'>+		 * 3, M, and 4 are affected by PAT errata, which makes the</div><div class='add'>+		 * upper four entries unusable. To be on the safe side, we don't</div><div class='add'>+		 * use those.</div><div class='add'>+		 *</div><div class='add'>+		 *  PTE encoding:</div><div class='add'>+		 *      PAT</div><div class='add'>+		 *      |PCD</div><div class='add'>+		 *      ||PWT  PAT</div><div class='add'>+		 *      |||    slot</div><div class='add'>+		 *      000    0    WB : _PAGE_CACHE_MODE_WB</div><div class='add'>+		 *      001    1    WC : _PAGE_CACHE_MODE_WC</div><div class='add'>+		 *      010    2    UC-: _PAGE_CACHE_MODE_UC_MINUS</div><div class='add'>+		 *      011    3    UC : _PAGE_CACHE_MODE_UC</div><div class='add'>+		 * PAT bit unused</div><div class='add'>+		 *</div><div class='add'>+		 * NOTE: When WT or WP is used, it is redirected to UC- per</div><div class='add'>+		 * the default setup in __cachemode2pte_tbl[].</div><div class='add'>+		 */</div><div class='add'>+		pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |</div><div class='add'>+		      PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Full PAT support.  We put WT in slot 7 to improve</div><div class='add'>+		 * robustness in the presence of errata that might cause</div><div class='add'>+		 * the high PAT bit to be ignored.  This way, a buggy slot 7</div><div class='add'>+		 * access will hit slot 3, and slot 3 is UC, so at worst</div><div class='add'>+		 * we lose performance without causing a correctness issue.</div><div class='add'>+		 * Pentium 4 erratum N46 is an example for such an erratum,</div><div class='add'>+		 * although we try not to use PAT at all on affected CPUs.</div><div class='add'>+		 *</div><div class='add'>+		 *  PTE encoding:</div><div class='add'>+		 *      PAT</div><div class='add'>+		 *      |PCD</div><div class='add'>+		 *      ||PWT  PAT</div><div class='add'>+		 *      |||    slot</div><div class='add'>+		 *      000    0    WB : _PAGE_CACHE_MODE_WB</div><div class='add'>+		 *      001    1    WC : _PAGE_CACHE_MODE_WC</div><div class='add'>+		 *      010    2    UC-: _PAGE_CACHE_MODE_UC_MINUS</div><div class='add'>+		 *      011    3    UC : _PAGE_CACHE_MODE_UC</div><div class='add'>+		 *      100    4    WB : Reserved</div><div class='add'>+		 *      101    5    WC : Reserved</div><div class='add'>+		 *      110    6    UC-: Reserved</div><div class='add'>+		 *      111    7    WT : _PAGE_CACHE_MODE_WT</div><div class='add'>+		 *</div><div class='add'>+		 * The reserved slots are unused, but mapped to their</div><div class='add'>+		 * corresponding types in the presence of PAT errata.</div><div class='add'>+		 */</div><div class='add'>+		pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |</div><div class='add'>+		      PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!boot_cpu_done) {</div><div class='add'>+		pat_bsp_init(pat);</div><div class='add'>+		boot_cpu_done = true;</div><div class='add'>+	} else {</div><div class='add'>+		pat_ap_init(pat);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #undef PAT</div><div class='hunk'>@@ -267,9 +349,9 @@ static unsigned long pat_x_mtrr_type(u64 start, u64 end,</div><div class='ctx'> 	 * request is for WB.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (req_type == _PAGE_CACHE_MODE_WB) {</div><div class='del'>-		u8 mtrr_type;</div><div class='add'>+		u8 mtrr_type, uniform;</div><div class='ctx'> </div><div class='del'>-		mtrr_type = mtrr_type_lookup(start, end);</div><div class='add'>+		mtrr_type = mtrr_type_lookup(start, end, &amp;uniform);</div><div class='ctx'> 		if (mtrr_type != MTRR_TYPE_WRBACK)</div><div class='ctx'> 			return _PAGE_CACHE_MODE_UC_MINUS;</div><div class='ctx'> </div><div class='hunk'>@@ -324,9 +406,14 @@ static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * For RAM pages, we use page flags to mark the pages with appropriate type.</div><div class='del'>- * Here we do two pass:</div><div class='del'>- * - Find the memtype of all the pages in the range, look for any conflicts</div><div class='del'>- * - In case of no conflicts, set the new memtype for pages in the range</div><div class='add'>+ * The page flags are limited to four types, WB (default), WC, WT and UC-.</div><div class='add'>+ * WP request fails with -EINVAL, and UC gets redirected to UC-.  Setting</div><div class='add'>+ * a new memory type is only allowed for a page mapped with the default WB</div><div class='add'>+ * type.</div><div class='add'>+ *</div><div class='add'>+ * Here we do two passes:</div><div class='add'>+ * - Find the memtype of all the pages in the range, look for any conflicts.</div><div class='add'>+ * - In case of no conflicts, set the new memtype for pages in the range.</div><div class='ctx'>  */</div><div class='ctx'> static int reserve_ram_pages_type(u64 start, u64 end,</div><div class='ctx'> 				  enum page_cache_mode req_type,</div><div class='hunk'>@@ -335,6 +422,12 @@ static int reserve_ram_pages_type(u64 start, u64 end,</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	u64 pfn;</div><div class='ctx'> </div><div class='add'>+	if (req_type == _PAGE_CACHE_MODE_WP) {</div><div class='add'>+		if (new_type)</div><div class='add'>+			*new_type = _PAGE_CACHE_MODE_UC_MINUS;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (req_type == _PAGE_CACHE_MODE_UC) {</div><div class='ctx'> 		/* We do not support strong UC */</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='hunk'>@@ -346,8 +439,8 @@ static int reserve_ram_pages_type(u64 start, u64 end,</div><div class='ctx'> </div><div class='ctx'> 		page = pfn_to_page(pfn);</div><div class='ctx'> 		type = get_page_memtype(page);</div><div class='del'>-		if (type != -1) {</div><div class='del'>-			pr_info("reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",</div><div class='add'>+		if (type != _PAGE_CACHE_MODE_WB) {</div><div class='add'>+			pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",</div><div class='ctx'> 				start, end - 1, type, req_type);</div><div class='ctx'> 			if (new_type)</div><div class='ctx'> 				*new_type = type;</div><div class='hunk'>@@ -373,7 +466,7 @@ static int free_ram_pages_type(u64 start, u64 end)</div><div class='ctx'> </div><div class='ctx'> 	for (pfn = (start &gt;&gt; PAGE_SHIFT); pfn &lt; (end &gt;&gt; PAGE_SHIFT); ++pfn) {</div><div class='ctx'> 		page = pfn_to_page(pfn);</div><div class='del'>-		set_page_memtype(page, -1);</div><div class='add'>+		set_page_memtype(page, _PAGE_CACHE_MODE_WB);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -384,6 +477,7 @@ static int free_ram_pages_type(u64 start, u64 end)</div><div class='ctx'>  * - _PAGE_CACHE_MODE_WC</div><div class='ctx'>  * - _PAGE_CACHE_MODE_UC_MINUS</div><div class='ctx'>  * - _PAGE_CACHE_MODE_UC</div><div class='add'>+ * - _PAGE_CACHE_MODE_WT</div><div class='ctx'>  *</div><div class='ctx'>  * If new_type is NULL, function will return an error if it cannot reserve the</div><div class='ctx'>  * region with req_type. If new_type is non-NULL, function will return</div><div class='hunk'>@@ -400,14 +494,10 @@ int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type,</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(start &gt;= end); /* end is exclusive */</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled) {</div><div class='add'>+	if (!pat_enabled()) {</div><div class='ctx'> 		/* This is identical to page table setting without PAT */</div><div class='del'>-		if (new_type) {</div><div class='del'>-			if (req_type == _PAGE_CACHE_MODE_WC)</div><div class='del'>-				*new_type = _PAGE_CACHE_MODE_UC_MINUS;</div><div class='del'>-			else</div><div class='del'>-				*new_type = req_type;</div><div class='del'>-		}</div><div class='add'>+		if (new_type)</div><div class='add'>+			*new_type = req_type;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -451,9 +541,9 @@ int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type,</div><div class='ctx'> </div><div class='ctx'> 	err = rbt_memtype_check_insert(new, new_type);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_INFO "reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",</div><div class='del'>-		       start, end - 1,</div><div class='del'>-		       cattr_name(new-&gt;type), cattr_name(req_type));</div><div class='add'>+		pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",</div><div class='add'>+			start, end - 1,</div><div class='add'>+			cattr_name(new-&gt;type), cattr_name(req_type));</div><div class='ctx'> 		kfree(new);</div><div class='ctx'> 		spin_unlock(&amp;memtype_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -475,7 +565,7 @@ int free_memtype(u64 start, u64 end)</div><div class='ctx'> 	int is_range_ram;</div><div class='ctx'> 	struct memtype *entry;</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='add'>+	if (!pat_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Low ISA region is always mapped WB. No need to track */</div><div class='hunk'>@@ -497,8 +587,8 @@ int free_memtype(u64 start, u64 end)</div><div class='ctx'> 	spin_unlock(&amp;memtype_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!entry) {</div><div class='del'>-		printk(KERN_INFO "%s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",</div><div class='del'>-		       current-&gt;comm, current-&gt;pid, start, end - 1);</div><div class='add'>+		pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+			current-&gt;comm, current-&gt;pid, start, end - 1);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -517,7 +607,7 @@ int free_memtype(u64 start, u64 end)</div><div class='ctx'>  * Only to be called when PAT is enabled</div><div class='ctx'>  *</div><div class='ctx'>  * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS</div><div class='del'>- * or _PAGE_CACHE_MODE_UC</div><div class='add'>+ * or _PAGE_CACHE_MODE_WT.</div><div class='ctx'>  */</div><div class='ctx'> static enum page_cache_mode lookup_memtype(u64 paddr)</div><div class='ctx'> {</div><div class='hunk'>@@ -529,16 +619,9 @@ static enum page_cache_mode lookup_memtype(u64 paddr)</div><div class='ctx'> </div><div class='ctx'> 	if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {</div><div class='ctx'> 		struct page *page;</div><div class='del'>-		page = pfn_to_page(paddr &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		rettype = get_page_memtype(page);</div><div class='del'>-		/*</div><div class='del'>-		 * -1 from get_page_memtype() implies RAM page is in its</div><div class='del'>-		 * default state and not reserved, and hence of type WB</div><div class='del'>-		 */</div><div class='del'>-		if (rettype == -1)</div><div class='del'>-			rettype = _PAGE_CACHE_MODE_WB;</div><div class='ctx'> </div><div class='del'>-		return rettype;</div><div class='add'>+		page = pfn_to_page(paddr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		return get_page_memtype(page);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;memtype_lock);</div><div class='hunk'>@@ -623,13 +706,13 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='ctx'> 	u64 to = from + size;</div><div class='ctx'> 	u64 cursor = from;</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='add'>+	if (!pat_enabled())</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	while (cursor &lt; to) {</div><div class='ctx'> 		if (!devmem_is_allowed(pfn)) {</div><div class='del'>-			printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n",</div><div class='del'>-			       current-&gt;comm, from, to - 1);</div><div class='add'>+			pr_info("x86/PAT: Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n",</div><div class='add'>+				current-&gt;comm, from, to - 1);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		cursor += PAGE_SIZE;</div><div class='hunk'>@@ -659,7 +742,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,</div><div class='ctx'> 	 * caching for the high addresses through the KEN pin, but</div><div class='ctx'> 	 * we maintain the tradition of paranoia in this code.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!pat_enabled &amp;&amp;</div><div class='add'>+	if (!pat_enabled() &amp;&amp;</div><div class='ctx'> 	    !(boot_cpu_has(X86_FEATURE_MTRR) ||</div><div class='ctx'> 	      boot_cpu_has(X86_FEATURE_K6_MTRR) ||</div><div class='ctx'> 	      boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||</div><div class='hunk'>@@ -698,8 +781,7 @@ int kernel_map_sync_memtype(u64 base, unsigned long size,</div><div class='ctx'> 				size;</div><div class='ctx'> </div><div class='ctx'> 	if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) &lt; 0) {</div><div class='del'>-		printk(KERN_INFO "%s:%d ioremap_change_attr failed %s "</div><div class='del'>-			"for [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+		pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n",</div><div class='ctx'> 			current-&gt;comm, current-&gt;pid,</div><div class='ctx'> 			cattr_name(pcm),</div><div class='ctx'> 			base, (unsigned long long)(base + size-1));</div><div class='hunk'>@@ -729,12 +811,12 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,</div><div class='ctx'> 	 * the type requested matches the type of first page in the range.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_ram) {</div><div class='del'>-		if (!pat_enabled)</div><div class='add'>+		if (!pat_enabled())</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		pcm = lookup_memtype(paddr);</div><div class='ctx'> 		if (want_pcm != pcm) {</div><div class='del'>-			printk(KERN_WARNING "%s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='add'>+			pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='ctx'> 				current-&gt;comm, current-&gt;pid,</div><div class='ctx'> 				cattr_name(want_pcm),</div><div class='ctx'> 				(unsigned long long)paddr,</div><div class='hunk'>@@ -755,13 +837,12 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,</div><div class='ctx'> 		if (strict_prot ||</div><div class='ctx'> 		    !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) {</div><div class='ctx'> 			free_memtype(paddr, paddr + size);</div><div class='del'>-			printk(KERN_ERR "%s:%d map pfn expected mapping type %s"</div><div class='del'>-				" for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='del'>-				current-&gt;comm, current-&gt;pid,</div><div class='del'>-				cattr_name(want_pcm),</div><div class='del'>-				(unsigned long long)paddr,</div><div class='del'>-				(unsigned long long)(paddr + size - 1),</div><div class='del'>-				cattr_name(pcm));</div><div class='add'>+			pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='add'>+			       current-&gt;comm, current-&gt;pid,</div><div class='add'>+			       cattr_name(want_pcm),</div><div class='add'>+			       (unsigned long long)paddr,</div><div class='add'>+			       (unsigned long long)(paddr + size - 1),</div><div class='add'>+			       cattr_name(pcm));</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -844,7 +925,7 @@ int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='add'>+	if (!pat_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -872,7 +953,7 @@ int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,</div><div class='ctx'> {</div><div class='ctx'> 	enum page_cache_mode pcm;</div><div class='ctx'> </div><div class='del'>-	if (!pat_enabled)</div><div class='add'>+	if (!pat_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Set prot based on lookup */</div><div class='hunk'>@@ -913,14 +994,18 @@ void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,</div><div class='ctx'> </div><div class='ctx'> pgprot_t pgprot_writecombine(pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	if (pat_enabled)</div><div class='del'>-		return __pgprot(pgprot_val(prot) |</div><div class='add'>+	return __pgprot(pgprot_val(prot) |</div><div class='ctx'> 				cachemode2protval(_PAGE_CACHE_MODE_WC));</div><div class='del'>-	else</div><div class='del'>-		return pgprot_noncached(prot);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pgprot_writecombine);</div><div class='ctx'> </div><div class='add'>+pgprot_t pgprot_writethrough(pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	return __pgprot(pgprot_val(prot) |</div><div class='add'>+				cachemode2protval(_PAGE_CACHE_MODE_WT));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pgprot_writethrough);</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS) &amp;&amp; defined(CONFIG_X86_PAT)</div><div class='ctx'> </div><div class='ctx'> static struct memtype *memtype_get_idx(loff_t pos)</div><div class='hunk'>@@ -996,7 +1081,7 @@ static const struct file_operations memtype_fops = {</div><div class='ctx'> </div><div class='ctx'> static int __init pat_memtype_list_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (pat_enabled) {</div><div class='add'>+	if (pat_enabled()) {</div><div class='ctx'> 		debugfs_create_file("pat_memtype_list", S_IRUSR,</div><div class='ctx'> 				    arch_debugfs_dir, NULL, &amp;memtype_fops);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/mm/pat_internal.h b/arch/x86/mm/pat_internal.h<br/>index f6411620305d..a739bfc40690 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pat_internal.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pat_internal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pat_internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat_internal.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> extern int pat_debug_enable;</div><div class='ctx'> </div><div class='ctx'> #define dprintk(fmt, arg...) \</div><div class='del'>-	do { if (pat_debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)</div><div class='add'>+	do { if (pat_debug_enable) pr_info("x86/PAT: " fmt, ##arg); } while (0)</div><div class='ctx'> </div><div class='ctx'> struct memtype {</div><div class='ctx'> 	u64			start;</div><div class='head'>diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c<br/>index 6582adcc8bd9..63931080366a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pat_rbtree.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pat_rbtree.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pat_rbtree.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pat_rbtree.c</a></div><div class='hunk'>@@ -160,9 +160,9 @@ success:</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> failure:</div><div class='del'>-	printk(KERN_INFO "%s:%d conflicting memory types "</div><div class='del'>-		"%Lx-%Lx %s&lt;-&gt;%s\n", current-&gt;comm, current-&gt;pid, start,</div><div class='del'>-		end, cattr_name(found_type), cattr_name(match-&gt;type));</div><div class='add'>+	pr_info("x86/PAT: %s:%d conflicting memory types %Lx-%Lx %s&lt;-&gt;%s\n",</div><div class='add'>+		current-&gt;comm, current-&gt;pid, start, end,</div><div class='add'>+		cattr_name(found_type), cattr_name(match-&gt;type));</div><div class='ctx'> 	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c<br/>index 0b97d2c75df3..fb0a9dd1d6e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pgtable.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/mm/pgtable.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pgtable.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/mm/pgtable.c</a></div><div class='hunk'>@@ -563,16 +563,31 @@ void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP</div><div class='add'>+/**</div><div class='add'>+ * pud_set_huge - setup kernel PUD mapping</div><div class='add'>+ *</div><div class='add'>+ * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this</div><div class='add'>+ * function sets up a huge page only if any of the following conditions are met:</div><div class='add'>+ *</div><div class='add'>+ * - MTRRs are disabled, or</div><div class='add'>+ *</div><div class='add'>+ * - MTRRs are enabled and the range is completely covered by a single MTRR, or</div><div class='add'>+ *</div><div class='add'>+ * - MTRRs are enabled and the corresponding MTRR memory type is WB, which</div><div class='add'>+ *   has no effect on the requested PAT memory type.</div><div class='add'>+ *</div><div class='add'>+ * Callers should try to decrease page size (1GB -&gt; 2MB -&gt; 4K) if the bigger</div><div class='add'>+ * page mapping attempt fails.</div><div class='add'>+ *</div><div class='add'>+ * Returns 1 on success and 0 on failure.</div><div class='add'>+ */</div><div class='ctx'> int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	u8 mtrr;</div><div class='add'>+	u8 mtrr, uniform;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Do not use a huge page when the range is covered by non-WB type</div><div class='del'>-	 * of MTRRs.</div><div class='del'>-	 */</div><div class='del'>-	mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE);</div><div class='del'>-	if ((mtrr != MTRR_TYPE_WRBACK) &amp;&amp; (mtrr != 0xFF))</div><div class='add'>+	mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &amp;uniform);</div><div class='add'>+	if ((mtrr != MTRR_TYPE_INVALID) &amp;&amp; (!uniform) &amp;&amp;</div><div class='add'>+	    (mtrr != MTRR_TYPE_WRBACK))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	prot = pgprot_4k_2_large(prot);</div><div class='hunk'>@@ -584,17 +599,24 @@ int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pmd_set_huge - setup kernel PMD mapping</div><div class='add'>+ *</div><div class='add'>+ * See text over pud_set_huge() above.</div><div class='add'>+ *</div><div class='add'>+ * Returns 1 on success and 0 on failure.</div><div class='add'>+ */</div><div class='ctx'> int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	u8 mtrr;</div><div class='add'>+	u8 mtrr, uniform;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Do not use a huge page when the range is covered by non-WB type</div><div class='del'>-	 * of MTRRs.</div><div class='del'>-	 */</div><div class='del'>-	mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE);</div><div class='del'>-	if ((mtrr != MTRR_TYPE_WRBACK) &amp;&amp; (mtrr != 0xFF))</div><div class='add'>+	mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &amp;uniform);</div><div class='add'>+	if ((mtrr != MTRR_TYPE_INVALID) &amp;&amp; (!uniform) &amp;&amp;</div><div class='add'>+	    (mtrr != MTRR_TYPE_WRBACK)) {</div><div class='add'>+		pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",</div><div class='add'>+			     __func__, addr, addr + PMD_SIZE);</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	prot = pgprot_4k_2_large(prot);</div><div class='ctx'> </div><div class='hunk'>@@ -605,6 +627,11 @@ int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pud_clear_huge - clear kernel PUD mapping when it is set</div><div class='add'>+ *</div><div class='add'>+ * Returns 1 on success and 0 on failure (no PUD map is found).</div><div class='add'>+ */</div><div class='ctx'> int pud_clear_huge(pud_t *pud)</div><div class='ctx'> {</div><div class='ctx'> 	if (pud_large(*pud)) {</div><div class='hunk'>@@ -615,6 +642,11 @@ int pud_clear_huge(pud_t *pud)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pmd_clear_huge - clear kernel PMD mapping when it is set</div><div class='add'>+ *</div><div class='add'>+ * Returns 1 on success and 0 on failure (no PMD map is found).</div><div class='add'>+ */</div><div class='ctx'> int pmd_clear_huge(pmd_t *pmd)</div><div class='ctx'> {</div><div class='ctx'> 	if (pmd_large(*pmd)) {</div><div class='head'>diff --git a/arch/x86/net/bpf_jit.S b/arch/x86/net/bpf_jit.S<br/>index 6440221ced0d..4093216b3791 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/net/bpf_jit.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/net/bpf_jit.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/net/bpf_jit.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/net/bpf_jit.S</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'>  * of the License.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Calling convention :</div><div class='head'>diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c<br/>index ddeff4844a10..579a8fd74be0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/net/bpf_jit_comp.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/net/bpf_jit_comp.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='ctx'> </div><div class='ctx'> int bpf_jit_enable __read_mostly;</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +38,8 @@ static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)</div><div class='ctx'> 	return ptr + len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define EMIT(bytes, len)	do { prog = emit_code(prog, bytes, len); } while (0)</div><div class='add'>+#define EMIT(bytes, len) \</div><div class='add'>+	do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)</div><div class='ctx'> </div><div class='ctx'> #define EMIT1(b1)		EMIT(b1, 1)</div><div class='ctx'> #define EMIT2(b1, b2)		EMIT((b1) + ((b2) &lt;&lt; 8), 2)</div><div class='hunk'>@@ -186,31 +188,31 @@ struct jit_context {</div><div class='ctx'> #define BPF_MAX_INSN_SIZE	128</div><div class='ctx'> #define BPF_INSN_SAFETY		64</div><div class='ctx'> </div><div class='del'>-static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,</div><div class='del'>-		  int oldproglen, struct jit_context *ctx)</div><div class='add'>+#define STACKSIZE \</div><div class='add'>+	(MAX_BPF_STACK + \</div><div class='add'>+	 32 /* space for rbx, r13, r14, r15 */ + \</div><div class='add'>+	 8 /* space for skb_copy_bits() buffer */)</div><div class='add'>+</div><div class='add'>+#define PROLOGUE_SIZE 51</div><div class='add'>+</div><div class='add'>+/* emit x64 prologue code for BPF program and check it's size.</div><div class='add'>+ * bpf_tail_call helper will skip it while jumping into another program</div><div class='add'>+ */</div><div class='add'>+static void emit_prologue(u8 **pprog)</div><div class='ctx'> {</div><div class='del'>-	struct bpf_insn *insn = bpf_prog-&gt;insnsi;</div><div class='del'>-	int insn_cnt = bpf_prog-&gt;len;</div><div class='del'>-	bool seen_ld_abs = ctx-&gt;seen_ld_abs | (oldproglen == 0);</div><div class='del'>-	bool seen_exit = false;</div><div class='del'>-	u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];</div><div class='del'>-	int i;</div><div class='del'>-	int proglen = 0;</div><div class='del'>-	u8 *prog = temp;</div><div class='del'>-	int stacksize = MAX_BPF_STACK +</div><div class='del'>-		32 /* space for rbx, r13, r14, r15 */ +</div><div class='del'>-		8 /* space for skb_copy_bits() buffer */;</div><div class='add'>+	u8 *prog = *pprog;</div><div class='add'>+	int cnt = 0;</div><div class='ctx'> </div><div class='ctx'> 	EMIT1(0x55); /* push rbp */</div><div class='ctx'> 	EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */</div><div class='ctx'> </div><div class='del'>-	/* sub rsp, stacksize */</div><div class='del'>-	EMIT3_off32(0x48, 0x81, 0xEC, stacksize);</div><div class='add'>+	/* sub rsp, STACKSIZE */</div><div class='add'>+	EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* all classic BPF filters use R6(rbx) save it */</div><div class='ctx'> </div><div class='ctx'> 	/* mov qword ptr [rbp-X],rbx */</div><div class='del'>-	EMIT3_off32(0x48, 0x89, 0x9D, -stacksize);</div><div class='add'>+	EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* bpf_convert_filter() maps classic BPF register X to R7 and uses R8</div><div class='ctx'> 	 * as temporary, so all tcpdump filters need to spill/fill R7(r13) and</div><div class='hunk'>@@ -221,16 +223,112 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* mov qword ptr [rbp-X],r13 */</div><div class='del'>-	EMIT3_off32(0x4C, 0x89, 0xAD, -stacksize + 8);</div><div class='add'>+	EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);</div><div class='ctx'> 	/* mov qword ptr [rbp-X],r14 */</div><div class='del'>-	EMIT3_off32(0x4C, 0x89, 0xB5, -stacksize + 16);</div><div class='add'>+	EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);</div><div class='ctx'> 	/* mov qword ptr [rbp-X],r15 */</div><div class='del'>-	EMIT3_off32(0x4C, 0x89, 0xBD, -stacksize + 24);</div><div class='add'>+	EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);</div><div class='ctx'> </div><div class='ctx'> 	/* clear A and X registers */</div><div class='ctx'> 	EMIT2(0x31, 0xc0); /* xor eax, eax */</div><div class='ctx'> 	EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */</div><div class='ctx'> </div><div class='add'>+	/* clear tail_cnt: mov qword ptr [rbp-X], rax */</div><div class='add'>+	EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(cnt != PROLOGUE_SIZE);</div><div class='add'>+	*pprog = prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* generate the following code:</div><div class='add'>+ * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...</div><div class='add'>+ *   if (index &gt;= array-&gt;map.max_entries)</div><div class='add'>+ *     goto out;</div><div class='add'>+ *   if (++tail_call_cnt &gt; MAX_TAIL_CALL_CNT)</div><div class='add'>+ *     goto out;</div><div class='add'>+ *   prog = array-&gt;prog[index];</div><div class='add'>+ *   if (prog == NULL)</div><div class='add'>+ *     goto out;</div><div class='add'>+ *   goto *(prog-&gt;bpf_func + prologue_size);</div><div class='add'>+ * out:</div><div class='add'>+ */</div><div class='add'>+static void emit_bpf_tail_call(u8 **pprog)</div><div class='add'>+{</div><div class='add'>+	u8 *prog = *pprog;</div><div class='add'>+	int label1, label2, label3;</div><div class='add'>+	int cnt = 0;</div><div class='add'>+</div><div class='add'>+	/* rdi - pointer to ctx</div><div class='add'>+	 * rsi - pointer to bpf_array</div><div class='add'>+	 * rdx - index in bpf_array</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* if (index &gt;= array-&gt;map.max_entries)</div><div class='add'>+	 *   goto out;</div><div class='add'>+	 */</div><div class='add'>+	EMIT4(0x48, 0x8B, 0x46,                   /* mov rax, qword ptr [rsi + 16] */</div><div class='add'>+	      offsetof(struct bpf_array, map.max_entries));</div><div class='add'>+	EMIT3(0x48, 0x39, 0xD0);                  /* cmp rax, rdx */</div><div class='add'>+#define OFFSET1 44 /* number of bytes to jump */</div><div class='add'>+	EMIT2(X86_JBE, OFFSET1);                  /* jbe out */</div><div class='add'>+	label1 = cnt;</div><div class='add'>+</div><div class='add'>+	/* if (tail_call_cnt &gt; MAX_TAIL_CALL_CNT)</div><div class='add'>+	 *   goto out;</div><div class='add'>+	 */</div><div class='add'>+	EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */</div><div class='add'>+	EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT);     /* cmp eax, MAX_TAIL_CALL_CNT */</div><div class='add'>+#define OFFSET2 33</div><div class='add'>+	EMIT2(X86_JA, OFFSET2);                   /* ja out */</div><div class='add'>+	label2 = cnt;</div><div class='add'>+	EMIT3(0x83, 0xC0, 0x01);                  /* add eax, 1 */</div><div class='add'>+	EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */</div><div class='add'>+</div><div class='add'>+	/* prog = array-&gt;prog[index]; */</div><div class='add'>+	EMIT4(0x48, 0x8D, 0x44, 0xD6);            /* lea rax, [rsi + rdx * 8 + 0x50] */</div><div class='add'>+	EMIT1(offsetof(struct bpf_array, prog));</div><div class='add'>+	EMIT3(0x48, 0x8B, 0x00);                  /* mov rax, qword ptr [rax] */</div><div class='add'>+</div><div class='add'>+	/* if (prog == NULL)</div><div class='add'>+	 *   goto out;</div><div class='add'>+	 */</div><div class='add'>+	EMIT4(0x48, 0x83, 0xF8, 0x00);            /* cmp rax, 0 */</div><div class='add'>+#define OFFSET3 10</div><div class='add'>+	EMIT2(X86_JE, OFFSET3);                   /* je out */</div><div class='add'>+	label3 = cnt;</div><div class='add'>+</div><div class='add'>+	/* goto *(prog-&gt;bpf_func + prologue_size); */</div><div class='add'>+	EMIT4(0x48, 0x8B, 0x40,                   /* mov rax, qword ptr [rax + 32] */</div><div class='add'>+	      offsetof(struct bpf_prog, bpf_func));</div><div class='add'>+	EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE);   /* add rax, prologue_size */</div><div class='add'>+</div><div class='add'>+	/* now we're ready to jump into next BPF program</div><div class='add'>+	 * rdi == ctx (1st arg)</div><div class='add'>+	 * rax == prog-&gt;bpf_func + prologue_size</div><div class='add'>+	 */</div><div class='add'>+	EMIT2(0xFF, 0xE0);                        /* jmp rax */</div><div class='add'>+</div><div class='add'>+	/* out: */</div><div class='add'>+	BUILD_BUG_ON(cnt - label1 != OFFSET1);</div><div class='add'>+	BUILD_BUG_ON(cnt - label2 != OFFSET2);</div><div class='add'>+	BUILD_BUG_ON(cnt - label3 != OFFSET3);</div><div class='add'>+	*pprog = prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,</div><div class='add'>+		  int oldproglen, struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn *insn = bpf_prog-&gt;insnsi;</div><div class='add'>+	int insn_cnt = bpf_prog-&gt;len;</div><div class='add'>+	bool seen_ld_abs = ctx-&gt;seen_ld_abs | (oldproglen == 0);</div><div class='add'>+	bool seen_exit = false;</div><div class='add'>+	u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];</div><div class='add'>+	int i, cnt = 0;</div><div class='add'>+	int proglen = 0;</div><div class='add'>+	u8 *prog = temp;</div><div class='add'>+</div><div class='add'>+	emit_prologue(&amp;prog);</div><div class='add'>+</div><div class='ctx'> 	if (seen_ld_abs) {</div><div class='ctx'> 		/* r9d : skb-&gt;len - skb-&gt;data_len (headlen)</div><div class='ctx'> 		 * r10 : skb-&gt;data</div><div class='hunk'>@@ -739,6 +837,10 @@ xadd:			if (is_imm8(insn-&gt;off))</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case BPF_JMP | BPF_CALL | BPF_X:</div><div class='add'>+			emit_bpf_tail_call(&amp;prog);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 			/* cond jump */</div><div class='ctx'> 		case BPF_JMP | BPF_JEQ | BPF_X:</div><div class='ctx'> 		case BPF_JMP | BPF_JNE | BPF_X:</div><div class='hunk'>@@ -891,13 +993,13 @@ common_load:</div><div class='ctx'> 			/* update cleanup_addr */</div><div class='ctx'> 			ctx-&gt;cleanup_addr = proglen;</div><div class='ctx'> 			/* mov rbx, qword ptr [rbp-X] */</div><div class='del'>-			EMIT3_off32(0x48, 0x8B, 0x9D, -stacksize);</div><div class='add'>+			EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);</div><div class='ctx'> 			/* mov r13, qword ptr [rbp-X] */</div><div class='del'>-			EMIT3_off32(0x4C, 0x8B, 0xAD, -stacksize + 8);</div><div class='add'>+			EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);</div><div class='ctx'> 			/* mov r14, qword ptr [rbp-X] */</div><div class='del'>-			EMIT3_off32(0x4C, 0x8B, 0xB5, -stacksize + 16);</div><div class='add'>+			EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);</div><div class='ctx'> 			/* mov r15, qword ptr [rbp-X] */</div><div class='del'>-			EMIT3_off32(0x4C, 0x8B, 0xBD, -stacksize + 24);</div><div class='add'>+			EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);</div><div class='ctx'> </div><div class='ctx'> 			EMIT1(0xC9); /* leave */</div><div class='ctx'> 			EMIT1(0xC3); /* ret */</div><div class='head'>diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c<br/>index 14a63ed6fe09..ff9911707160 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/acpi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/pci/acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/acpi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/acpi.c</a></div><div class='hunk'>@@ -81,6 +81,17 @@ static const struct dmi_system_id pci_crs_quirks[] __initconst = {</div><div class='ctx'> 			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	/* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/931368 */</div><div class='add'>+	/* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1033299 */</div><div class='add'>+	{</div><div class='add'>+		.callback = set_use_crs,</div><div class='add'>+		.ident = "Foxconn K8M890-8237A",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "Foxconn"),</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "K8M890-8237A"),</div><div class='add'>+			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> </div><div class='ctx'> 	/* Now for the blacklist.. */</div><div class='ctx'> </div><div class='hunk'>@@ -121,8 +132,10 @@ void __init pci_acpi_crs_quirks(void)</div><div class='ctx'> {</div><div class='ctx'> 	int year;</div><div class='ctx'> </div><div class='del'>-	if (dmi_get_date(DMI_BIOS_DATE, &amp;year, NULL, NULL) &amp;&amp; year &lt; 2008)</div><div class='del'>-		pci_use_crs = false;</div><div class='add'>+	if (dmi_get_date(DMI_BIOS_DATE, &amp;year, NULL, NULL) &amp;&amp; year &lt; 2008) {</div><div class='add'>+		if (iomem_resource.end &lt;= 0xffffffff)</div><div class='add'>+			pci_use_crs = false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dmi_check_system(pci_crs_quirks);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c<br/>index 349c0d32cc0b..0a9f2caf358f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/i386.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/pci/i386.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/i386.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/i386.c</a></div><div class='hunk'>@@ -429,12 +429,12 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,</div><div class='ctx'>  	 * Caller can followup with UC MINUS request and add a WC mtrr if there</div><div class='ctx'>  	 * is a free mtrr slot.</div><div class='ctx'>  	 */</div><div class='del'>-	if (!pat_enabled &amp;&amp; write_combine)</div><div class='add'>+	if (!pat_enabled() &amp;&amp; write_combine)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (pat_enabled &amp;&amp; write_combine)</div><div class='add'>+	if (pat_enabled() &amp;&amp; write_combine)</div><div class='ctx'> 		prot |= cachemode2protval(_PAGE_CACHE_MODE_WC);</div><div class='del'>-	else if (pat_enabled || boot_cpu_data.x86 &gt; 3)</div><div class='add'>+	else if (pat_enabled() || boot_cpu_data.x86 &gt; 3)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.</div><div class='ctx'> 		 * To avoid attribute conflicts, request UC MINUS here</div><div class='head'>diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c<br/>index 852aa4c92da0..27062303c881 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/intel_mid_pci.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/pci/intel_mid_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/intel_mid_pci.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/intel_mid_pci.c</a></div><div class='hunk'>@@ -208,6 +208,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='ctx'> </div><div class='ctx'> static int intel_mid_pci_irq_enable(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> 	int polarity;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;irq_managed &amp;&amp; dev-&gt;irq &gt; 0)</div><div class='hunk'>@@ -217,14 +218,13 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)</div><div class='ctx'> 		polarity = 0; /* active high */</div><div class='ctx'> 	else</div><div class='ctx'> 		polarity = 1; /* active low */</div><div class='add'>+	ioapic_set_alloc_attr(&amp;info, dev_to_node(&amp;dev-&gt;dev), 1, polarity);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to</div><div class='ctx'> 	 * IOAPIC RTE entries, so we just enable RTE for the device.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mp_set_gsi_attr(dev-&gt;irq, 1, polarity, dev_to_node(&amp;dev-&gt;dev)))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	if (mp_map_gsi_to_irq(dev-&gt;irq, IOAPIC_MAP_ALLOC) &lt; 0)</div><div class='add'>+	if (mp_map_gsi_to_irq(dev-&gt;irq, IOAPIC_MAP_ALLOC, &amp;info) &lt; 0)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;irq_managed = 1;</div><div class='head'>diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c<br/>index 5dc6ca5e1741..9bd115484745 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/pci/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/pci/irq.c</a></div><div class='hunk'>@@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *  Code for querying and setting of IRQ routes on various interrupt routers.</div><div class='add'>+ *  PIC Edge/Level Control Registers (ELCR) 0x4d0 &amp; 0x4d1.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-void eisa_set_level_irq(unsigned int irq)</div><div class='add'>+void elcr_set_level_irq(unsigned int irq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char mask = 1 &lt;&lt; (irq &amp; 7);</div><div class='ctx'> 	unsigned int port = 0x4d0 + (irq &gt;&gt; 3);</div><div class='ctx'> 	unsigned char val;</div><div class='del'>-	static u16 eisa_irq_mask;</div><div class='add'>+	static u16 elcr_irq_mask;</div><div class='ctx'> </div><div class='del'>-	if (irq &gt;= 16 || (1 &lt;&lt; irq) &amp; eisa_irq_mask)</div><div class='add'>+	if (irq &gt;= 16 || (1 &lt;&lt; irq) &amp; elcr_irq_mask)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	eisa_irq_mask |= (1 &lt;&lt; irq);</div><div class='add'>+	elcr_irq_mask |= (1 &lt;&lt; irq);</div><div class='ctx'> 	printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);</div><div class='ctx'> 	val = inb(port);</div><div class='ctx'> 	if (!(val &amp; mask)) {</div><div class='hunk'>@@ -965,11 +966,11 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)</div><div class='ctx'> 	} else if (r-&gt;get &amp;&amp; (irq = r-&gt;get(pirq_router_dev, dev, pirq)) &amp;&amp; \</div><div class='ctx'> 	((!(pci_probe &amp; PCI_USE_PIRQ_MASK)) || ((1 &lt;&lt; irq) &amp; mask))) {</div><div class='ctx'> 		msg = "found";</div><div class='del'>-		eisa_set_level_irq(irq);</div><div class='add'>+		elcr_set_level_irq(irq);</div><div class='ctx'> 	} else if (newirq &amp;&amp; r-&gt;set &amp;&amp;</div><div class='ctx'> 		(dev-&gt;class &gt;&gt; 8) != PCI_CLASS_DISPLAY_VGA) {</div><div class='ctx'> 		if (r-&gt;set(pirq_router_dev, dev, pirq, newirq)) {</div><div class='del'>-			eisa_set_level_irq(newirq);</div><div class='add'>+			elcr_set_level_irq(newirq);</div><div class='ctx'> 			msg = "assigned";</div><div class='ctx'> 			irq = newirq;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/x86/platform/Makefile b/arch/x86/platform/Makefile<br/>index a62e0be3a2f1..f1a6c8e86ddd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/Makefile</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> # Platform specific code goes here</div><div class='add'>+obj-y	+= atom/</div><div class='ctx'> obj-y	+= ce4100/</div><div class='ctx'> obj-y	+= efi/</div><div class='ctx'> obj-y	+= geode/</div><div class='head'>diff --git a/arch/x86/platform/atom/Makefile b/arch/x86/platform/atom/Makefile<br/>new file mode 100644<br/>index 000000000000..0a3a40cbc794<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/atom/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/atom/Makefile</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+obj-$(CONFIG_PUNIT_ATOM_DEBUG) += punit_atom_debug.o</div><div class='head'>diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c<br/>new file mode 100644<br/>index 000000000000..5ca8ead91579<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/atom/punit_atom_debug.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/atom/punit_atom_debug.c</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+/*</div><div class='add'>+ * Intel SOC Punit device state debug driver</div><div class='add'>+ * Punit controls power management for North Complex devices (Graphics</div><div class='add'>+ * blocks, Image Signal Processing, video processing, display, DSP etc.)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015, Intel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/iosf_mbi.h&gt;</div><div class='add'>+</div><div class='add'>+/* Side band Interface port */</div><div class='add'>+#define PUNIT_PORT		0x04</div><div class='add'>+/* Power gate status reg */</div><div class='add'>+#define PWRGT_STATUS		0x61</div><div class='add'>+/* Subsystem config/status Video processor */</div><div class='add'>+#define VED_SS_PM0		0x32</div><div class='add'>+/* Subsystem config/status ISP (Image Signal Processor) */</div><div class='add'>+#define ISP_SS_PM0		0x39</div><div class='add'>+/* Subsystem config/status Input/output controller */</div><div class='add'>+#define MIO_SS_PM		0x3B</div><div class='add'>+/* Shift bits for getting status for video, isp and i/o */</div><div class='add'>+#define SSS_SHIFT		24</div><div class='add'>+/* Shift bits for getting status for graphics rendering */</div><div class='add'>+#define RENDER_POS		0</div><div class='add'>+/* Shift bits for getting status for media control */</div><div class='add'>+#define MEDIA_POS		2</div><div class='add'>+/* Shift bits for getting status for Valley View/Baytrail display */</div><div class='add'>+#define VLV_DISPLAY_POS		6</div><div class='add'>+/* Subsystem config/status display for Cherry Trail SOC */</div><div class='add'>+#define CHT_DSP_SSS		0x36</div><div class='add'>+/* Shift bits for getting status for display */</div><div class='add'>+#define CHT_DSP_SSS_POS		16</div><div class='add'>+</div><div class='add'>+struct punit_device {</div><div class='add'>+	char *name;</div><div class='add'>+	int reg;</div><div class='add'>+	int sss_pos;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct punit_device punit_device_byt[] = {</div><div class='add'>+	{ "GFX RENDER",	PWRGT_STATUS,	RENDER_POS },</div><div class='add'>+	{ "GFX MEDIA",	PWRGT_STATUS,	MEDIA_POS },</div><div class='add'>+	{ "DISPLAY",	PWRGT_STATUS,	VLV_DISPLAY_POS },</div><div class='add'>+	{ "VED",	VED_SS_PM0,	SSS_SHIFT },</div><div class='add'>+	{ "ISP",	ISP_SS_PM0,	SSS_SHIFT },</div><div class='add'>+	{ "MIO",	MIO_SS_PM,	SSS_SHIFT },</div><div class='add'>+	{ NULL }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct punit_device punit_device_cht[] = {</div><div class='add'>+	{ "GFX RENDER",	PWRGT_STATUS,	RENDER_POS },</div><div class='add'>+	{ "GFX MEDIA",	PWRGT_STATUS,	MEDIA_POS },</div><div class='add'>+	{ "DISPLAY",	CHT_DSP_SSS,	CHT_DSP_SSS_POS },</div><div class='add'>+	{ "VED",	VED_SS_PM0,	SSS_SHIFT },</div><div class='add'>+	{ "ISP",	ISP_SS_PM0,	SSS_SHIFT },</div><div class='add'>+	{ "MIO",	MIO_SS_PM,	SSS_SHIFT },</div><div class='add'>+	{ NULL }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const dstates[] = {"D0", "D0i1", "D0i2", "D0i3"};</div><div class='add'>+</div><div class='add'>+static int punit_dev_state_show(struct seq_file *seq_file, void *unused)</div><div class='add'>+{</div><div class='add'>+	u32 punit_pwr_status;</div><div class='add'>+	struct punit_device *punit_devp = seq_file-&gt;private;</div><div class='add'>+	int index;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n");</div><div class='add'>+	while (punit_devp-&gt;name) {</div><div class='add'>+		status = iosf_mbi_read(PUNIT_PORT, BT_MBI_PMC_READ,</div><div class='add'>+				       punit_devp-&gt;reg,</div><div class='add'>+				       &amp;punit_pwr_status);</div><div class='add'>+		if (status) {</div><div class='add'>+			seq_printf(seq_file, "%9s : Read Failed\n",</div><div class='add'>+				   punit_devp-&gt;name);</div><div class='add'>+		} else  {</div><div class='add'>+			index = (punit_pwr_status &gt;&gt; punit_devp-&gt;sss_pos) &amp; 3;</div><div class='add'>+			seq_printf(seq_file, "%9s : %s\n", punit_devp-&gt;name,</div><div class='add'>+				   dstates[index]);</div><div class='add'>+		}</div><div class='add'>+		punit_devp++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int punit_dev_state_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, punit_dev_state_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations punit_dev_state_ops = {</div><div class='add'>+	.open		= punit_dev_state_open,</div><div class='add'>+	.read		= seq_read,</div><div class='add'>+	.llseek		= seq_lseek,</div><div class='add'>+	.release	= single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dentry *punit_dbg_file;</div><div class='add'>+</div><div class='add'>+static int punit_dbgfs_register(struct punit_device *punit_device)</div><div class='add'>+{</div><div class='add'>+	static struct dentry *dev_state;</div><div class='add'>+</div><div class='add'>+	punit_dbg_file = debugfs_create_dir("punit_atom", NULL);</div><div class='add'>+	if (!punit_dbg_file)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	dev_state = debugfs_create_file("dev_power_state", S_IFREG | S_IRUGO,</div><div class='add'>+					punit_dbg_file, punit_device,</div><div class='add'>+					&amp;punit_dev_state_ops);</div><div class='add'>+	if (!dev_state) {</div><div class='add'>+		pr_err("punit_dev_state register failed\n");</div><div class='add'>+		debugfs_remove(punit_dbg_file);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void punit_dbgfs_unregister(void)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(punit_dbg_file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ICPU(model, drv_data) \</div><div class='add'>+	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT,\</div><div class='add'>+	  (kernel_ulong_t)&amp;drv_data }</div><div class='add'>+</div><div class='add'>+static const struct x86_cpu_id intel_punit_cpu_ids[] = {</div><div class='add'>+	ICPU(55, punit_device_byt), /* Valleyview, Bay Trail */</div><div class='add'>+	ICPU(76, punit_device_cht), /* Braswell, Cherry Trail */</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids);</div><div class='add'>+</div><div class='add'>+static int __init punit_atom_debug_init(void)</div><div class='add'>+{</div><div class='add'>+	const struct x86_cpu_id *id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	id = x86_match_cpu(intel_punit_cpu_ids);</div><div class='add'>+	if (!id)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = punit_dbgfs_register((struct punit_device *)id-&gt;driver_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit punit_atom_debug_exit(void)</div><div class='add'>+{</div><div class='add'>+	punit_dbgfs_unregister();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(punit_atom_debug_init);</div><div class='add'>+module_exit(punit_atom_debug_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Kumar P, Mahesh &lt;mahesh.kumar.p@intel.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Punit devices states debugging");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c<br/>index 02744df576d5..cfba30f27392 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/efi/efi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/efi/efi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/efi/efi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/efi/efi.c</a></div><div class='hunk'>@@ -117,6 +117,27 @@ void efi_get_time(struct timespec *now)</div><div class='ctx'> 	now-&gt;tv_nsec = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init efi_find_mirror(void)</div><div class='add'>+{</div><div class='add'>+	void *p;</div><div class='add'>+	u64 mirror_size = 0, total_size = 0;</div><div class='add'>+</div><div class='add'>+	for (p = memmap.map; p &lt; memmap.map_end; p += memmap.desc_size) {</div><div class='add'>+		efi_memory_desc_t *md = p;</div><div class='add'>+		unsigned long long start = md-&gt;phys_addr;</div><div class='add'>+		unsigned long long size = md-&gt;num_pages &lt;&lt; EFI_PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+		total_size += size;</div><div class='add'>+		if (md-&gt;attribute &amp; EFI_MEMORY_MORE_RELIABLE) {</div><div class='add'>+			memblock_mark_mirror(start, size);</div><div class='add'>+			mirror_size += size;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (mirror_size)</div><div class='add'>+		pr_info("Memory: %lldM/%lldM mirrored memory\n",</div><div class='add'>+			mirror_size&gt;&gt;20, total_size&gt;&gt;20);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Tell the kernel about the EFI memory map.  This might include</div><div class='ctx'>  * more than the max 128 entries that can fit in the e820 legacy</div><div class='hunk'>@@ -153,6 +174,9 @@ static void __init do_add_efi_memmap(void)</div><div class='ctx'> 		case EFI_UNUSABLE_MEMORY:</div><div class='ctx'> 			e820_type = E820_UNUSABLE;</div><div class='ctx'> 			break;</div><div class='add'>+		case EFI_PERSISTENT_MEMORY:</div><div class='add'>+			e820_type = E820_PMEM;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * EFI_RESERVED_TYPE EFI_RUNTIME_SERVICES_CODE</div><div class='hunk'>@@ -501,6 +525,8 @@ void __init efi_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (efi_enabled(EFI_DBG))</div><div class='ctx'> 		print_efi_memmap();</div><div class='add'>+</div><div class='add'>+	efi_esrt_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init efi_late_init(void)</div><div class='head'>diff --git a/arch/x86/platform/intel-mid/device_libs/platform_wdt.c b/arch/x86/platform/intel-mid/device_libs/platform_wdt.c<br/>index 0b283d4d0ad7..de734134bc8d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/device_libs/platform_wdt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/intel-mid/device_libs/platform_wdt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/device_libs/platform_wdt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/device_libs/platform_wdt.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@ static struct platform_device wdt_dev = {</div><div class='ctx'> static int tangier_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int gsi;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> 	struct intel_mid_wdt_pdata *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> </div><div class='ctx'> 	if (!pdata)</div><div class='hunk'>@@ -34,8 +35,8 @@ static int tangier_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* IOAPIC builds identity mapping between GSI and IRQ on MID */</div><div class='ctx'> 	gsi = pdata-&gt;irq;</div><div class='del'>-	if (mp_set_gsi_attr(gsi, 1, 0, cpu_to_node(0)) ||</div><div class='del'>-	    mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC) &lt;= 0) {</div><div class='add'>+	ioapic_set_alloc_attr(&amp;info, cpu_to_node(0), 1, 0);</div><div class='add'>+	if (mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &amp;info) &lt;= 0) {</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "cannot find interrupt %d in ioapic\n",</div><div class='ctx'> 			 gsi);</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c<br/>index 3005f0c89f2e..01d54ea766c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/intel-mid.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/intel-mid/intel-mid.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/intel-mid.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/intel-mid.c</a></div><div class='hunk'>@@ -81,26 +81,34 @@ static unsigned long __init intel_mid_calibrate_tsc(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init intel_mid_setup_bp_timer(void)</div><div class='add'>+{</div><div class='add'>+	apbt_time_init();</div><div class='add'>+	setup_boot_APIC_clock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init intel_mid_time_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);</div><div class='add'>+</div><div class='ctx'> 	switch (intel_mid_timer_options) {</div><div class='ctx'> 	case INTEL_MID_TIMER_APBT_ONLY:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INTEL_MID_TIMER_LAPIC_APBT:</div><div class='del'>-		x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;</div><div class='add'>+		/* Use apbt and local apic */</div><div class='add'>+		x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer;</div><div class='ctx'> 		x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;</div><div class='del'>-		break;</div><div class='add'>+		return;</div><div class='ctx'> 	default:</div><div class='ctx'> 		if (!boot_cpu_has(X86_FEATURE_ARAT))</div><div class='ctx'> 			break;</div><div class='add'>+		/* Lapic only, no apbt */</div><div class='ctx'> 		x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;</div><div class='ctx'> 		x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	/* we need at least one APB timer */</div><div class='del'>-	pre_init_apic_IRQ0();</div><div class='del'>-	apbt_time_init();</div><div class='add'>+</div><div class='add'>+	x86_init.timers.setup_percpu_clockev = apbt_time_init;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_mid_arch_setup(void)</div><div class='head'>diff --git a/arch/x86/platform/intel-mid/intel_mid_vrtc.c b/arch/x86/platform/intel-mid/intel_mid_vrtc.c<br/>index 32947ba0f62d..ee40fcb6e54d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/intel_mid_vrtc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/intel-mid/intel_mid_vrtc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/intel_mid_vrtc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/intel_mid_vrtc.c</a></div><div class='hunk'>@@ -173,5 +173,4 @@ static int __init intel_mid_device_create(void)</div><div class='ctx'> </div><div class='ctx'> 	return platform_device_register(&amp;vrtc_device);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(intel_mid_device_create);</div><div class='add'>+device_initcall(intel_mid_device_create);</div><div class='head'>diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c<br/>index c14ad34776c4..ce992e8cc065 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/sfi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/intel-mid/sfi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/intel-mid/sfi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/intel-mid/sfi.c</a></div><div class='hunk'>@@ -95,18 +95,16 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)</div><div class='ctx'> 		pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",</div><div class='ctx'> 			totallen, (u32)pentry-&gt;phys_addr,</div><div class='ctx'> 			pentry-&gt;freq_hz, pentry-&gt;irq);</div><div class='del'>-			if (!pentry-&gt;irq)</div><div class='del'>-				continue;</div><div class='del'>-			mp_irq.type = MP_INTSRC;</div><div class='del'>-			mp_irq.irqtype = mp_INT;</div><div class='del'>-/* triggering mode edge bit 2-3, active high polarity bit 0-1 */</div><div class='del'>-			mp_irq.irqflag = 5;</div><div class='del'>-			mp_irq.srcbus = MP_BUS_ISA;</div><div class='del'>-			mp_irq.srcbusirq = pentry-&gt;irq;	/* IRQ */</div><div class='del'>-			mp_irq.dstapic = MP_APIC_ALL;</div><div class='del'>-			mp_irq.dstirq = pentry-&gt;irq;</div><div class='del'>-			mp_save_irq(&amp;mp_irq);</div><div class='del'>-			mp_map_gsi_to_irq(pentry-&gt;irq, IOAPIC_MAP_ALLOC);</div><div class='add'>+		mp_irq.type = MP_INTSRC;</div><div class='add'>+		mp_irq.irqtype = mp_INT;</div><div class='add'>+		/* triggering mode edge bit 2-3, active high polarity bit 0-1 */</div><div class='add'>+		mp_irq.irqflag = 5;</div><div class='add'>+		mp_irq.srcbus = MP_BUS_ISA;</div><div class='add'>+		mp_irq.srcbusirq = pentry-&gt;irq;	/* IRQ */</div><div class='add'>+		mp_irq.dstapic = MP_APIC_ALL;</div><div class='add'>+		mp_irq.dstirq = pentry-&gt;irq;</div><div class='add'>+		mp_save_irq(&amp;mp_irq);</div><div class='add'>+		mp_map_gsi_to_irq(pentry-&gt;irq, IOAPIC_MAP_ALLOC, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -177,7 +175,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)</div><div class='ctx'> 		mp_irq.dstapic = MP_APIC_ALL;</div><div class='ctx'> 		mp_irq.dstirq = pentry-&gt;irq;</div><div class='ctx'> 		mp_save_irq(&amp;mp_irq);</div><div class='del'>-		mp_map_gsi_to_irq(pentry-&gt;irq, IOAPIC_MAP_ALLOC);</div><div class='add'>+		mp_map_gsi_to_irq(pentry-&gt;irq, IOAPIC_MAP_ALLOC, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -436,6 +434,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)</div><div class='ctx'> 	struct devs_id *dev = NULL;</div><div class='ctx'> 	int num, i, ret;</div><div class='ctx'> 	int polarity;</div><div class='add'>+	struct irq_alloc_info info;</div><div class='ctx'> </div><div class='ctx'> 	sb = (struct sfi_table_simple *)table;</div><div class='ctx'> 	num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);</div><div class='hunk'>@@ -469,9 +468,8 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)</div><div class='ctx'> 				polarity = 1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			ret = mp_set_gsi_attr(irq, 1, polarity, NUMA_NO_NODE);</div><div class='del'>-			if (ret == 0)</div><div class='del'>-				ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC);</div><div class='add'>+			ioapic_set_alloc_attr(&amp;info, NUMA_NO_NODE, 1, polarity);</div><div class='add'>+			ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &amp;info);</div><div class='ctx'> 			WARN_ON(ret &lt; 0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/platform/sfi/sfi.c b/arch/x86/platform/sfi/sfi.c<br/>index 2a8a74f3bd76..6c7111bbd1e9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/sfi/sfi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/sfi/sfi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/sfi/sfi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/sfi/sfi.c</a></div><div class='hunk'>@@ -25,8 +25,8 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/sfi.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -71,9 +71,6 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)</div><div class='ctx'> #endif /* CONFIG_X86_LOCAL_APIC */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_IO_APIC</div><div class='del'>-static struct irq_domain_ops sfi_ioapic_irqdomain_ops = {</div><div class='del'>-	.map = mp_irqdomain_map,</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> static int __init sfi_parse_ioapic(struct sfi_table_header *table)</div><div class='ctx'> {</div><div class='hunk'>@@ -82,7 +79,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table)</div><div class='ctx'> 	int i, num;</div><div class='ctx'> 	struct ioapic_domain_cfg cfg = {</div><div class='ctx'> 		.type = IOAPIC_DOMAIN_STRICT,</div><div class='del'>-		.ops = &amp;sfi_ioapic_irqdomain_ops,</div><div class='add'>+		.ops = &amp;mp_ioapic_irqdomain_ops,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sb = (struct sfi_table_simple *)table;</div><div class='head'>diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c<br/>index 0ce673645432..8570abe68be1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/uv/uv_irq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/uv/uv_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/uv/uv_irq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/uv/uv_irq.c</a></div><div class='hunk'>@@ -13,22 +13,37 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/uv/uv_irq.h&gt;</div><div class='ctx'> #include &lt;asm/uv/uv_hub.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* MMR offset and pnode of hub sourcing interrupts for a given irq */</div><div class='del'>-struct uv_irq_2_mmr_pnode{</div><div class='del'>-	struct rb_node		list;</div><div class='add'>+struct uv_irq_2_mmr_pnode {</div><div class='ctx'> 	unsigned long		offset;</div><div class='ctx'> 	int			pnode;</div><div class='del'>-	int			irq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_SPINLOCK(uv_irq_lock);</div><div class='del'>-static struct rb_root		uv_irq_root;</div><div class='add'>+static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info)</div><div class='add'>+{</div><div class='add'>+	unsigned long mmr_value;</div><div class='add'>+	struct uv_IO_APIC_route_entry *entry;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=</div><div class='add'>+		     sizeof(unsigned long));</div><div class='add'>+</div><div class='add'>+	mmr_value = 0;</div><div class='add'>+	entry = (struct uv_IO_APIC_route_entry *)&amp;mmr_value;</div><div class='add'>+	entry-&gt;vector		= cfg-&gt;vector;</div><div class='add'>+	entry-&gt;delivery_mode	= apic-&gt;irq_delivery_mode;</div><div class='add'>+	entry-&gt;dest_mode	= apic-&gt;irq_dest_mode;</div><div class='add'>+	entry-&gt;polarity		= 0;</div><div class='add'>+	entry-&gt;trigger		= 0;</div><div class='add'>+	entry-&gt;mask		= 0;</div><div class='add'>+	entry-&gt;dest		= cfg-&gt;dest_apicid;</div><div class='ctx'> </div><div class='del'>-static int uv_set_irq_affinity(struct irq_data *, const struct cpumask *, bool);</div><div class='add'>+	uv_write_global_mmr64(info-&gt;pnode, info-&gt;offset, mmr_value);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void uv_noop(struct irq_data *data) { }</div><div class='ctx'> </div><div class='hunk'>@@ -37,6 +52,23 @@ static void uv_ack_apic(struct irq_data *data)</div><div class='ctx'> 	ack_APIC_irq();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='add'>+		    bool force)</div><div class='add'>+{</div><div class='add'>+	struct irq_data *parent = data-&gt;parent_data;</div><div class='add'>+	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = parent-&gt;chip-&gt;irq_set_affinity(parent, mask, force);</div><div class='add'>+	if (ret &gt;= 0) {</div><div class='add'>+		uv_program_mmr(cfg, data-&gt;chip_data);</div><div class='add'>+		send_cleanup_vector(cfg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct irq_chip uv_irq_chip = {</div><div class='ctx'> 	.name			= "UV-CORE",</div><div class='ctx'> 	.irq_mask		= uv_noop,</div><div class='hunk'>@@ -45,189 +77,99 @@ static struct irq_chip uv_irq_chip = {</div><div class='ctx'> 	.irq_set_affinity	= uv_set_irq_affinity,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Add offset and pnode information of the hub sourcing interrupts to the</div><div class='del'>- * rb tree for a specific irq.</div><div class='del'>- */</div><div class='del'>-static int uv_set_irq_2_mmr_info(int irq, unsigned long offset, unsigned blade)</div><div class='add'>+static int uv_domain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			   unsigned int nr_irqs, void *arg)</div><div class='ctx'> {</div><div class='del'>-	struct rb_node **link = &amp;uv_irq_root.rb_node;</div><div class='del'>-	struct rb_node *parent = NULL;</div><div class='del'>-	struct uv_irq_2_mmr_pnode *n;</div><div class='del'>-	struct uv_irq_2_mmr_pnode *e;</div><div class='del'>-	unsigned long irqflags;</div><div class='del'>-</div><div class='del'>-	n = kmalloc_node(sizeof(struct uv_irq_2_mmr_pnode), GFP_KERNEL,</div><div class='del'>-				uv_blade_to_memory_nid(blade));</div><div class='del'>-	if (!n)</div><div class='add'>+	struct uv_irq_2_mmr_pnode *chip_data;</div><div class='add'>+	struct irq_alloc_info *info = arg;</div><div class='add'>+	struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (nr_irqs &gt; 1 || !info || info-&gt;type != X86_IRQ_ALLOC_TYPE_UV)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	chip_data = kmalloc_node(sizeof(*chip_data), GFP_KERNEL,</div><div class='add'>+				 irq_data-&gt;node);</div><div class='add'>+	if (!chip_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	n-&gt;irq = irq;</div><div class='del'>-	n-&gt;offset = offset;</div><div class='del'>-	n-&gt;pnode = uv_blade_to_pnode(blade);</div><div class='del'>-	spin_lock_irqsave(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	/* Find the right place in the rbtree: */</div><div class='del'>-	while (*link) {</div><div class='del'>-		parent = *link;</div><div class='del'>-		e = rb_entry(parent, struct uv_irq_2_mmr_pnode, list);</div><div class='del'>-</div><div class='del'>-		if (unlikely(irq == e-&gt;irq)) {</div><div class='del'>-			/* irq entry exists */</div><div class='del'>-			e-&gt;pnode = uv_blade_to_pnode(blade);</div><div class='del'>-			e-&gt;offset = offset;</div><div class='del'>-			spin_unlock_irqrestore(&amp;uv_irq_lock, irqflags);</div><div class='del'>-			kfree(n);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (irq &lt; e-&gt;irq)</div><div class='del'>-			link = &amp;(*link)-&gt;rb_left;</div><div class='add'>+	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);</div><div class='add'>+	if (ret &gt;= 0) {</div><div class='add'>+		if (info-&gt;uv_limit == UV_AFFINITY_CPU)</div><div class='add'>+			irq_set_status_flags(virq, IRQ_NO_BALANCING);</div><div class='ctx'> 		else</div><div class='del'>-			link = &amp;(*link)-&gt;rb_right;</div><div class='add'>+			irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='add'>+</div><div class='add'>+		chip_data-&gt;pnode = uv_blade_to_pnode(info-&gt;uv_blade);</div><div class='add'>+		chip_data-&gt;offset = info-&gt;uv_offset;</div><div class='add'>+		irq_domain_set_info(domain, virq, virq, &amp;uv_irq_chip, chip_data,</div><div class='add'>+				    handle_percpu_irq, NULL, info-&gt;uv_name);</div><div class='add'>+	} else {</div><div class='add'>+		kfree(chip_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Insert the node into the rbtree. */</div><div class='del'>-	rb_link_node(&amp;n-&gt;list, parent, link);</div><div class='del'>-	rb_insert_color(&amp;n-&gt;list, &amp;uv_irq_root);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Retrieve offset and pnode information from the rb tree for a specific irq */</div><div class='del'>-int uv_irq_2_mmr_info(int irq, unsigned long *offset, int *pnode)</div><div class='add'>+static void uv_domain_free(struct irq_domain *domain, unsigned int virq,</div><div class='add'>+			   unsigned int nr_irqs)</div><div class='ctx'> {</div><div class='del'>-	struct uv_irq_2_mmr_pnode *e;</div><div class='del'>-	struct rb_node *n;</div><div class='del'>-	unsigned long irqflags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	n = uv_irq_root.rb_node;</div><div class='del'>-	while (n) {</div><div class='del'>-		e = rb_entry(n, struct uv_irq_2_mmr_pnode, list);</div><div class='del'>-</div><div class='del'>-		if (e-&gt;irq == irq) {</div><div class='del'>-			*offset = e-&gt;offset;</div><div class='del'>-			*pnode = e-&gt;pnode;</div><div class='del'>-			spin_unlock_irqrestore(&amp;uv_irq_lock, irqflags);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (irq &lt; e-&gt;irq)</div><div class='del'>-			n = n-&gt;rb_left;</div><div class='del'>-		else</div><div class='del'>-			n = n-&gt;rb_right;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	return -1;</div><div class='add'>+	struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq);</div><div class='add'>+</div><div class='add'>+	BUG_ON(nr_irqs != 1);</div><div class='add'>+	kfree(irq_data-&gt;chip_data);</div><div class='add'>+	irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='add'>+	irq_clear_status_flags(virq, IRQ_NO_BALANCING);</div><div class='add'>+	irq_domain_free_irqs_top(domain, virq, nr_irqs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Re-target the irq to the specified CPU and enable the specified MMR located</div><div class='ctx'>  * on the specified blade to allow the sending of MSIs to the specified CPU.</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,</div><div class='del'>-		       unsigned long mmr_offset, int limit)</div><div class='add'>+static void uv_domain_activate(struct irq_domain *domain,</div><div class='add'>+			       struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='del'>-	const struct cpumask *eligible_cpu = cpumask_of(cpu);</div><div class='del'>-	struct irq_cfg *cfg = irq_cfg(irq);</div><div class='del'>-	unsigned long mmr_value;</div><div class='del'>-	struct uv_IO_APIC_route_entry *entry;</div><div class='del'>-	int mmr_pnode, err;</div><div class='del'>-	unsigned int dest;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=</div><div class='del'>-			sizeof(unsigned long));</div><div class='del'>-</div><div class='del'>-	err = assign_irq_vector(irq, cfg, eligible_cpu);</div><div class='del'>-	if (err != 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = apic-&gt;cpu_mask_to_apicid_and(eligible_cpu, eligible_cpu, &amp;dest);</div><div class='del'>-	if (err != 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (limit == UV_AFFINITY_CPU)</div><div class='del'>-		irq_set_status_flags(irq, IRQ_NO_BALANCING);</div><div class='del'>-	else</div><div class='del'>-		irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);</div><div class='del'>-</div><div class='del'>-	irq_set_chip_and_handler_name(irq, &amp;uv_irq_chip, handle_percpu_irq,</div><div class='del'>-				      irq_name);</div><div class='del'>-</div><div class='del'>-	mmr_value = 0;</div><div class='del'>-	entry = (struct uv_IO_APIC_route_entry *)&amp;mmr_value;</div><div class='del'>-	entry-&gt;vector		= cfg-&gt;vector;</div><div class='del'>-	entry-&gt;delivery_mode	= apic-&gt;irq_delivery_mode;</div><div class='del'>-	entry-&gt;dest_mode	= apic-&gt;irq_dest_mode;</div><div class='del'>-	entry-&gt;polarity		= 0;</div><div class='del'>-	entry-&gt;trigger		= 0;</div><div class='del'>-	entry-&gt;mask		= 0;</div><div class='del'>-	entry-&gt;dest		= dest;</div><div class='del'>-</div><div class='del'>-	mmr_pnode = uv_blade_to_pnode(mmr_blade);</div><div class='del'>-	uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);</div><div class='del'>-</div><div class='del'>-	if (cfg-&gt;move_in_progress)</div><div class='del'>-		send_cleanup_vector(cfg);</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='add'>+	uv_program_mmr(irqd_cfg(irq_data), irq_data-&gt;chip_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Disable the specified MMR located on the specified blade so that MSIs are</div><div class='ctx'>  * longer allowed to be sent.</div><div class='ctx'>  */</div><div class='del'>-static void arch_disable_uv_irq(int mmr_pnode, unsigned long mmr_offset)</div><div class='add'>+static void uv_domain_deactivate(struct irq_domain *domain,</div><div class='add'>+				 struct irq_data *irq_data)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mmr_value;</div><div class='ctx'> 	struct uv_IO_APIC_route_entry *entry;</div><div class='ctx'> </div><div class='del'>-	BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=</div><div class='del'>-			sizeof(unsigned long));</div><div class='del'>-</div><div class='ctx'> 	mmr_value = 0;</div><div class='ctx'> 	entry = (struct uv_IO_APIC_route_entry *)&amp;mmr_value;</div><div class='ctx'> 	entry-&gt;mask = 1;</div><div class='del'>-</div><div class='del'>-	uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);</div><div class='add'>+	uv_program_mmr(irqd_cfg(irq_data), irq_data-&gt;chip_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-		    bool force)</div><div class='del'>-{</div><div class='del'>-	struct irq_cfg *cfg = irqd_cfg(data);</div><div class='del'>-	unsigned int dest;</div><div class='del'>-	unsigned long mmr_value, mmr_offset;</div><div class='del'>-	struct uv_IO_APIC_route_entry *entry;</div><div class='del'>-	int mmr_pnode;</div><div class='del'>-</div><div class='del'>-	if (apic_set_affinity(data, mask, &amp;dest))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	mmr_value = 0;</div><div class='del'>-	entry = (struct uv_IO_APIC_route_entry *)&amp;mmr_value;</div><div class='del'>-</div><div class='del'>-	entry-&gt;vector		= cfg-&gt;vector;</div><div class='del'>-	entry-&gt;delivery_mode	= apic-&gt;irq_delivery_mode;</div><div class='del'>-	entry-&gt;dest_mode	= apic-&gt;irq_dest_mode;</div><div class='del'>-	entry-&gt;polarity		= 0;</div><div class='del'>-	entry-&gt;trigger		= 0;</div><div class='del'>-	entry-&gt;mask		= 0;</div><div class='del'>-	entry-&gt;dest		= dest;</div><div class='del'>-</div><div class='del'>-	/* Get previously stored MMR and pnode of hub sourcing interrupts */</div><div class='del'>-	if (uv_irq_2_mmr_info(data-&gt;irq, &amp;mmr_offset, &amp;mmr_pnode))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);</div><div class='add'>+static const struct irq_domain_ops uv_domain_ops = {</div><div class='add'>+	.alloc		= uv_domain_alloc,</div><div class='add'>+	.free		= uv_domain_free,</div><div class='add'>+	.activate	= uv_domain_activate,</div><div class='add'>+	.deactivate	= uv_domain_deactivate,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;move_in_progress)</div><div class='del'>-		send_cleanup_vector(cfg);</div><div class='add'>+static struct irq_domain *uv_get_irq_domain(void)</div><div class='add'>+{</div><div class='add'>+	static struct irq_domain *uv_domain;</div><div class='add'>+	static DEFINE_MUTEX(uv_lock);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uv_lock);</div><div class='add'>+	if (uv_domain == NULL) {</div><div class='add'>+		uv_domain = irq_domain_add_tree(NULL, &amp;uv_domain_ops, NULL);</div><div class='add'>+		if (uv_domain)</div><div class='add'>+			uv_domain-&gt;parent = x86_vector_domain;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;uv_lock);</div><div class='ctx'> </div><div class='del'>-	return IRQ_SET_MASK_OK_NOCOPY;</div><div class='add'>+	return uv_domain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -238,19 +180,21 @@ uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='ctx'> int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,</div><div class='ctx'> 		 unsigned long mmr_offset, int limit)</div><div class='ctx'> {</div><div class='del'>-	int ret, irq = irq_alloc_hwirq(uv_blade_to_memory_nid(mmr_blade));</div><div class='add'>+	struct irq_alloc_info info;</div><div class='add'>+	struct irq_domain *domain = uv_get_irq_domain();</div><div class='ctx'> </div><div class='del'>-	if (!irq)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (!domain)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset,</div><div class='del'>-		limit);</div><div class='del'>-	if (ret == irq)</div><div class='del'>-		uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade);</div><div class='del'>-	else</div><div class='del'>-		irq_free_hwirq(irq);</div><div class='add'>+	init_irq_alloc_info(&amp;info, cpumask_of(cpu));</div><div class='add'>+	info.type = X86_IRQ_ALLOC_TYPE_UV;</div><div class='add'>+	info.uv_limit = limit;</div><div class='add'>+	info.uv_blade = mmr_blade;</div><div class='add'>+	info.uv_offset = mmr_offset;</div><div class='add'>+	info.uv_name = irq_name;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return irq_domain_alloc_irqs(domain, 1,</div><div class='add'>+				     uv_blade_to_memory_nid(mmr_blade), &amp;info);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(uv_setup_irq);</div><div class='ctx'> </div><div class='hunk'>@@ -263,26 +207,6 @@ EXPORT_SYMBOL_GPL(uv_setup_irq);</div><div class='ctx'>  */</div><div class='ctx'> void uv_teardown_irq(unsigned int irq)</div><div class='ctx'> {</div><div class='del'>-	struct uv_irq_2_mmr_pnode *e;</div><div class='del'>-	struct rb_node *n;</div><div class='del'>-	unsigned long irqflags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	n = uv_irq_root.rb_node;</div><div class='del'>-	while (n) {</div><div class='del'>-		e = rb_entry(n, struct uv_irq_2_mmr_pnode, list);</div><div class='del'>-		if (e-&gt;irq == irq) {</div><div class='del'>-			arch_disable_uv_irq(e-&gt;pnode, e-&gt;offset);</div><div class='del'>-			rb_erase(n, &amp;uv_irq_root);</div><div class='del'>-			kfree(e);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (irq &lt; e-&gt;irq)</div><div class='del'>-			n = n-&gt;rb_left;</div><div class='del'>-		else</div><div class='del'>-			n = n-&gt;rb_right;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;uv_irq_lock, irqflags);</div><div class='del'>-	irq_free_hwirq(irq);</div><div class='add'>+	irq_domain_free_irqs(irq, 1);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(uv_teardown_irq);</div><div class='head'>diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c<br/>index 7488cafab955..020c101c255f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/uv/uv_nmi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/platform/uv/uv_nmi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/uv/uv_nmi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/platform/uv/uv_nmi.c</a></div><div class='hunk'>@@ -104,7 +104,7 @@ static int param_set_local64(const char *val, const struct kernel_param *kp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct kernel_param_ops param_ops_local64 = {</div><div class='add'>+static const struct kernel_param_ops param_ops_local64 = {</div><div class='ctx'> 	.get = param_get_local64,</div><div class='ctx'> 	.set = param_set_local64,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c<br/>index 757678fb26e1..0d7dd1f5ac36 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/power/cpu.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/power/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/power/cpu.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/power/cpu.c</a></div><div class='hunk'>@@ -18,10 +18,9 @@</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='del'>-#include &lt;asm/xcr.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='add'>+#include &lt;asm/fpu/internal.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='del'>-#include &lt;asm/fpu-internal.h&gt; /* pcntxt_mask */</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -155,6 +154,8 @@ static void fix_processor_context(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	load_TR_desc();				/* This does ltr */</div><div class='ctx'> 	load_LDT(&amp;current-&gt;active_mm-&gt;context);	/* This does lldt */</div><div class='add'>+</div><div class='add'>+	fpu__resume_cpu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -221,12 +222,6 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	wrmsrl(MSR_KERNEL_GS_BASE, ctxt-&gt;gs_kernel_base);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * restore XCR0 for xsave capable cpu's.</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_has_xsave)</div><div class='del'>-		xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);</div><div class='del'>-</div><div class='ctx'> 	fix_processor_context();</div><div class='ctx'> </div><div class='ctx'> 	do_fpu_end();</div><div class='head'>diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S<br/>index 3c4469a7a929..e2386cb4e0c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/power/hibernate_asm_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/power/hibernate_asm_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/power/hibernate_asm_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/power/hibernate_asm_64.S</a></div><div class='hunk'>@@ -78,9 +78,9 @@ ENTRY(restore_image)</div><div class='ctx'> </div><div class='ctx'> 	/* code below has been relocated to a safe page */</div><div class='ctx'> ENTRY(core_restore_code)</div><div class='del'>-loop:</div><div class='add'>+.Lloop:</div><div class='ctx'> 	testq	%rdx, %rdx</div><div class='del'>-	jz	done</div><div class='add'>+	jz	.Ldone</div><div class='ctx'> </div><div class='ctx'> 	/* get addresses from the pbe and copy the page */</div><div class='ctx'> 	movq	pbe_address(%rdx), %rsi</div><div class='hunk'>@@ -91,8 +91,8 @@ loop:</div><div class='ctx'> </div><div class='ctx'> 	/* progress to the next pbe */</div><div class='ctx'> 	movq	pbe_next(%rdx), %rdx</div><div class='del'>-	jmp	loop</div><div class='del'>-done:</div><div class='add'>+	jmp	.Lloop</div><div class='add'>+.Ldone:</div><div class='ctx'> 	/* jump to the restore_registers address from the image header */</div><div class='ctx'> 	jmpq	*%rax</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/um/Makefile b/arch/x86/um/Makefile<br/>index acb384d24669..a8fecc226946 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/Makefile</a></div><div class='hunk'>@@ -26,7 +26,7 @@ else</div><div class='ctx'> </div><div class='ctx'> obj-y += syscalls_64.o vdso/</div><div class='ctx'> </div><div class='del'>-subarch-y = ../lib/csum-partial_64.o ../lib/memcpy_64.o ../lib/thunk_64.o \</div><div class='add'>+subarch-y = ../lib/csum-partial_64.o ../lib/memcpy_64.o ../entry/thunk_64.o \</div><div class='ctx'> 		../lib/rwsem.o</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/x86/um/asm/barrier.h b/arch/x86/um/asm/barrier.h<br/>index 7e8a1a650435..b9531d343134 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/barrier.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/barrier.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/barrier.h</a></div><div class='hunk'>@@ -39,7 +39,8 @@</div><div class='ctx'> #define smp_mb()	barrier()</div><div class='ctx'> #define smp_rmb()	barrier()</div><div class='ctx'> #define smp_wmb()	barrier()</div><div class='del'>-#define set_mb(var, value) do { var = value; barrier(); } while (0)</div><div class='add'>+</div><div class='add'>+#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define read_barrier_depends()		do { } while (0)</div><div class='ctx'> #define smp_read_barrier_depends()	do { } while (0)</div><div class='head'>diff --git a/arch/x86/um/asm/checksum.h b/arch/x86/um/asm/checksum.h<br/>index 4b181b74454f..ee940185e89f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/checksum.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/asm/checksum.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/checksum.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/checksum.h</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/in6.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * computes the checksum of a memory block at buff, length len,</div><div class='head'>diff --git a/arch/x86/um/asm/elf.h b/arch/x86/um/asm/elf.h<br/>index 0a656b727b1a..548197212a45 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/elf.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/elf.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/elf.h</a></div><div class='hunk'>@@ -200,8 +200,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];</div><div class='ctx'> </div><div class='ctx'> typedef struct user_i387_struct elf_fpregset_t;</div><div class='ctx'> </div><div class='del'>-#define task_pt_regs(t) (&amp;(t)-&gt;thread.regs)</div><div class='del'>-</div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='ctx'> extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu);</div><div class='head'>diff --git a/arch/x86/um/asm/processor.h b/arch/x86/um/asm/processor.h<br/>index 2a206d2b14ab..233ee09c1ce8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/processor.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/processor.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/processor.h</a></div><div class='hunk'>@@ -28,6 +28,8 @@ static inline void rep_nop(void)</div><div class='ctx'> #define cpu_relax()		rep_nop()</div><div class='ctx'> #define cpu_relax_lowlatency()	cpu_relax()</div><div class='ctx'> </div><div class='add'>+#define task_pt_regs(t) (&amp;(t)-&gt;thread.regs)</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/processor-generic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/um/asm/segment.h b/arch/x86/um/asm/segment.h<br/>index 45183fcd10b6..41dd5e1f3cd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/segment.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/asm/segment.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/segment.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/asm/segment.h</a></div><div class='hunk'>@@ -7,4 +7,12 @@ extern int host_gdt_entry_tls_min;</div><div class='ctx'> #define GDT_ENTRY_TLS_MIN host_gdt_entry_tls_min</div><div class='ctx'> #define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)</div><div class='ctx'> </div><div class='add'>+typedef struct {</div><div class='add'>+	unsigned long seg;</div><div class='add'>+} mm_segment_t;</div><div class='add'>+</div><div class='add'>+#define MAKE_MM_SEG(s)	((mm_segment_t) { (s) })</div><div class='add'>+#define KERNEL_DS	MAKE_MM_SEG(~0UL)</div><div class='add'>+#define USER_DS		MAKE_MM_SEG(TASK_SIZE)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/um/ldt.c b/arch/x86/um/ldt.c<br/>index 5c0b711d2433..9701a4fd7bf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/ldt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/ldt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/ldt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ldt.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> #include &lt;skas.h&gt;</div><div class='head'>diff --git a/arch/x86/um/mem_32.c b/arch/x86/um/mem_32.c<br/>index f40281e5d6a2..744afdc18cf3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/mem_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/mem_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/mem_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/mem_32.c</a></div><div class='hunk'>@@ -7,8 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/mman.h&gt;</div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct vm_area_struct gate_vma;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/mem_64.c b/arch/x86/um/mem_64.c<br/>index f8fecaddcc0d..7642e2e2aa61 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/mem_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/mem_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/mem_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/mem_64.c</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/mman.h&gt;</div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='ctx'> const char *arch_vma_name(struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/um/ptrace_32.c b/arch/x86/um/ptrace_32.c<br/>index ce3dd4f36f3f..a29756f2d940 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/ptrace_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/ptrace_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/ptrace_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ptrace_32.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> #include &lt;skas.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern int arch_switch_tls(struct task_struct *to);</div><div class='head'>diff --git a/arch/x86/um/ptrace_64.c b/arch/x86/um/ptrace_64.c<br/>index 3b52bf0b418a..a629694ee750 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/ptrace_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/ptrace_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/ptrace_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/ptrace_64.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #define __FRAME_OFFSETS</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * determines which flags the user has access to.</div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/tls.h b/arch/x86/um/shared/sysdep/tls.h<br/>index 27cce00c6b30..a682db13df23 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/tls.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/shared/sysdep/tls.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/tls.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/shared/sysdep/tls.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #ifndef _SYSDEP_TLS_H</div><div class='ctx'> #define _SYSDEP_TLS_H</div><div class='ctx'> </div><div class='del'>-# ifndef __KERNEL__</div><div class='add'>+#ifdef __UM_HOST__</div><div class='ctx'> </div><div class='ctx'> /* Change name to avoid conflicts with the original one from &lt;asm/ldt.h&gt;, which</div><div class='ctx'>  * may be named user_desc (but in 2.4 and in header matching its API was named</div><div class='hunk'>@@ -22,11 +22,11 @@ typedef struct um_dup_user_desc {</div><div class='ctx'> #endif</div><div class='ctx'> } user_desc_t;</div><div class='ctx'> </div><div class='del'>-# else /* __KERNEL__ */</div><div class='add'>+#else /* __UM_HOST__ */</div><div class='ctx'> </div><div class='ctx'> typedef struct user_desc user_desc_t;</div><div class='ctx'> </div><div class='del'>-# endif /* __KERNEL__ */</div><div class='add'>+#endif /* __UM_HOST__ */</div><div class='ctx'> </div><div class='ctx'> extern int os_set_thread_area(user_desc_t *info, int pid);</div><div class='ctx'> extern int os_get_thread_area(user_desc_t *info, int pid);</div><div class='head'>diff --git a/arch/x86/um/signal.c b/arch/x86/um/signal.c<br/>index 592491d1d70d..06934a8a4872 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/signal.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/signal.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/signal.c</a></div><div class='hunk'>@@ -541,7 +541,8 @@ int setup_signal_stack_si(unsigned long stack_top, struct ksignal *ksig,</div><div class='ctx'> 	 */</div><div class='ctx'> 	/* x86-64 should always use SA_RESTORER. */</div><div class='ctx'> 	if (ksig-&gt;ka.sa.sa_flags &amp; SA_RESTORER)</div><div class='del'>-		err |= __put_user(ksig-&gt;ka.sa.sa_restorer, &amp;frame-&gt;pretcode);</div><div class='add'>+		err |= __put_user((void *)ksig-&gt;ka.sa.sa_restorer,</div><div class='add'>+				  &amp;frame-&gt;pretcode);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* could use a vstub here */</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/arch/x86/um/syscalls_64.c b/arch/x86/um/syscalls_64.c<br/>index adb08eb5c22a..e6552275320b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/syscalls_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/syscalls_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/syscalls_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/syscalls_64.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/prctl.h&gt; /* XXX This should get the constants from libc */</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/tls_32.c b/arch/x86/um/tls_32.c<br/>index 80ffa5b9982d..48e38584d5c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/tls_32.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/tls_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/tls_32.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/tls_32.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/syscalls.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> #include &lt;os.h&gt;</div><div class='ctx'> #include &lt;skas.h&gt;</div><div class='ctx'> #include &lt;sysdep/tls.h&gt;</div><div class='head'>diff --git a/arch/x86/um/tls_64.c b/arch/x86/um/tls_64.c<br/>index d22363cb854e..3ad714373d7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/tls_64.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/tls_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/tls_64.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/tls_64.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;asm/ptrace-abi.h&gt;</div><div class='ctx'> </div><div class='ctx'> void clear_flushed_tls(struct task_struct *task)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/um/vdso/vma.c b/arch/x86/um/vdso/vma.c<br/>index 916cda4cd5b4..237c6831e095 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/vdso/vma.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/um/vdso/vma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/vdso/vma.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/um/vdso/vma.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='ctx'> static unsigned int __read_mostly vdso_enabled = 1;</div><div class='head'>diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c<br/>index 46957ead3060..0b95c9b8283f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/enlighten.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/xen/enlighten.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/enlighten.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/enlighten.c</a></div><div class='hunk'>@@ -1181,10 +1181,11 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {</div><div class='ctx'> 	.read_tscp = native_read_tscp,</div><div class='ctx'> </div><div class='ctx'> 	.iret = xen_iret,</div><div class='del'>-	.irq_enable_sysexit = xen_sysexit,</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	.usergs_sysret32 = xen_sysret32,</div><div class='ctx'> 	.usergs_sysret64 = xen_sysret64,</div><div class='add'>+#else</div><div class='add'>+	.irq_enable_sysexit = xen_sysexit,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	.load_tr_desc = paravirt_nop,</div><div class='hunk'>@@ -1423,7 +1424,7 @@ static void xen_pvh_set_cr_flags(int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For BSP, PSE PGE are set in probe_page_size_mask(), for APs</div><div class='del'>-	 * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu_init.</div><div class='add'>+	 * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu().</div><div class='ctx'> 	*/</div><div class='ctx'> 	if (cpu_has_pse)</div><div class='ctx'> 		cr4_set_bits_and_update_boot(X86_CR4_PSE);</div><div class='hunk'>@@ -1467,6 +1468,7 @@ asmlinkage __visible void __init xen_start_kernel(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct physdev_set_iopl set_iopl;</div><div class='ctx'> 	unsigned long initrd_start = 0;</div><div class='add'>+	u64 pat;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (!xen_start_info)</div><div class='hunk'>@@ -1574,8 +1576,8 @@ asmlinkage __visible void __init xen_start_kernel(void)</div><div class='ctx'> 	 * Modify the cache mode translation tables to match Xen's PAT</div><div class='ctx'> 	 * configuration.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	pat_init_cache_modes();</div><div class='add'>+	rdmsrl(MSR_IA32_CR_PAT, pat);</div><div class='add'>+	pat_init_cache_modes(pat);</div><div class='ctx'> </div><div class='ctx'> 	/* keep using Xen gdt for now; no urgent need to change it */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c<br/>index b47124d4cd67..8b7f18e200aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/p2m.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/xen/p2m.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/p2m.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/p2m.c</a></div><div class='hunk'>@@ -67,6 +67,7 @@</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='head'>diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c<br/>index 956374c1edbc..9e2ba5c6e1dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/spinlock.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/xen/spinlock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/spinlock.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/spinlock.c</a></div><div class='hunk'>@@ -17,6 +17,56 @@</div><div class='ctx'> #include "xen-ops.h"</div><div class='ctx'> #include "debugfs.h"</div><div class='ctx'> </div><div class='add'>+static DEFINE_PER_CPU(int, lock_kicker_irq) = -1;</div><div class='add'>+static DEFINE_PER_CPU(char *, irq_name);</div><div class='add'>+static bool xen_pvspin = true;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+</div><div class='add'>+#include &lt;asm/qspinlock.h&gt;</div><div class='add'>+</div><div class='add'>+static void xen_qlock_kick(int cpu)</div><div class='add'>+{</div><div class='add'>+	xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Halt the current CPU &amp; release it back to the host</div><div class='add'>+ */</div><div class='add'>+static void xen_qlock_wait(u8 *byte, u8 val)</div><div class='add'>+{</div><div class='add'>+	int irq = __this_cpu_read(lock_kicker_irq);</div><div class='add'>+</div><div class='add'>+	/* If kicker interrupts not initialized yet, just spin */</div><div class='add'>+	if (irq == -1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* clear pending */</div><div class='add'>+	xen_clear_irq_pending(irq);</div><div class='add'>+	barrier();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We check the byte value after clearing pending IRQ to make sure</div><div class='add'>+	 * that we won't miss a wakeup event because of the clearing.</div><div class='add'>+	 *</div><div class='add'>+	 * The sync_clear_bit() call in xen_clear_irq_pending() is atomic.</div><div class='add'>+	 * So it is effectively a memory barrier for x86.</div><div class='add'>+	 */</div><div class='add'>+	if (READ_ONCE(*byte) != val)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If an interrupt happens here, it will leave the wakeup irq</div><div class='add'>+	 * pending, which will cause xen_poll_irq() to return</div><div class='add'>+	 * immediately.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Block until irq becomes pending (or perhaps a spurious wakeup) */</div><div class='add'>+	xen_poll_irq(irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_QUEUED_SPINLOCKS */</div><div class='add'>+</div><div class='ctx'> enum xen_contention_stat {</div><div class='ctx'> 	TAKEN_SLOW,</div><div class='ctx'> 	TAKEN_SLOW_PICKUP,</div><div class='hunk'>@@ -100,12 +150,9 @@ struct xen_lock_waiting {</div><div class='ctx'> 	__ticket_t want;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(int, lock_kicker_irq) = -1;</div><div class='del'>-static DEFINE_PER_CPU(char *, irq_name);</div><div class='ctx'> static DEFINE_PER_CPU(struct xen_lock_waiting, lock_waiting);</div><div class='ctx'> static cpumask_t waiting_cpus;</div><div class='ctx'> </div><div class='del'>-static bool xen_pvspin = true;</div><div class='ctx'> __visible void xen_lock_spinning(struct arch_spinlock *lock, __ticket_t want)</div><div class='ctx'> {</div><div class='ctx'> 	int irq = __this_cpu_read(lock_kicker_irq);</div><div class='hunk'>@@ -217,6 +264,7 @@ static void xen_unlock_kick(struct arch_spinlock *lock, __ticket_t next)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_QUEUED_SPINLOCKS */</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t dummy_handler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -280,8 +328,16 @@ void __init xen_init_spinlocks(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	printk(KERN_DEBUG "xen: PV spinlocks enabled\n");</div><div class='add'>+#ifdef CONFIG_QUEUED_SPINLOCKS</div><div class='add'>+	__pv_init_lock_hash();</div><div class='add'>+	pv_lock_ops.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;</div><div class='add'>+	pv_lock_ops.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);</div><div class='add'>+	pv_lock_ops.wait = xen_qlock_wait;</div><div class='add'>+	pv_lock_ops.kick = xen_qlock_kick;</div><div class='add'>+#else</div><div class='ctx'> 	pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(xen_lock_spinning);</div><div class='ctx'> 	pv_lock_ops.unlock_kick = xen_unlock_kick;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -310,7 +366,7 @@ static __init int xen_parse_nopvspin(char *arg)</div><div class='ctx'> }</div><div class='ctx'> early_param("xen_nopvspin", xen_parse_nopvspin);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_XEN_DEBUG_FS</div><div class='add'>+#if defined(CONFIG_XEN_DEBUG_FS) &amp;&amp; !defined(CONFIG_QUEUED_SPINLOCKS)</div><div class='ctx'> </div><div class='ctx'> static struct dentry *d_spin_debug;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S<br/>index 985fc3ee0973..f22667abf7b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/xen-asm_64.S?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/xen/xen-asm_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/xen-asm_64.S?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/xen-asm_64.S</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;xen/interface/xen.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -47,29 +49,13 @@ ENTRY(xen_iret)</div><div class='ctx'> ENDPATCH(xen_iret)</div><div class='ctx'> RELOC(xen_iret, 1b+1)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * sysexit is not used for 64-bit processes, so it's only ever used to</div><div class='del'>- * return to 32-bit compat userspace.</div><div class='del'>- */</div><div class='del'>-ENTRY(xen_sysexit)</div><div class='del'>-	pushq $__USER32_DS</div><div class='del'>-	pushq %rcx</div><div class='del'>-	pushq $X86_EFLAGS_IF</div><div class='del'>-	pushq $__USER32_CS</div><div class='del'>-	pushq %rdx</div><div class='del'>-</div><div class='del'>-	pushq $0</div><div class='del'>-1:	jmp hypercall_iret</div><div class='del'>-ENDPATCH(xen_sysexit)</div><div class='del'>-RELOC(xen_sysexit, 1b+1)</div><div class='del'>-</div><div class='ctx'> ENTRY(xen_sysret64)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We're already on the usermode stack at this point, but</div><div class='ctx'> 	 * still with the kernel gs, so we can easily switch back</div><div class='ctx'> 	 */</div><div class='ctx'> 	movq %rsp, PER_CPU_VAR(rsp_scratch)</div><div class='del'>-	movq PER_CPU_VAR(kernel_stack), %rsp</div><div class='add'>+	movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='ctx'> </div><div class='ctx'> 	pushq $__USER_DS</div><div class='ctx'> 	pushq PER_CPU_VAR(rsp_scratch)</div><div class='hunk'>@@ -88,7 +74,7 @@ ENTRY(xen_sysret32)</div><div class='ctx'> 	 * still with the kernel gs, so we can easily switch back</div><div class='ctx'> 	 */</div><div class='ctx'> 	movq %rsp, PER_CPU_VAR(rsp_scratch)</div><div class='del'>-	movq PER_CPU_VAR(kernel_stack), %rsp</div><div class='add'>+	movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp</div><div class='ctx'> </div><div class='ctx'> 	pushq $__USER32_DS</div><div class='ctx'> 	pushq PER_CPU_VAR(rsp_scratch)</div><div class='hunk'>@@ -128,7 +114,7 @@ RELOC(xen_sysret32, 1b+1)</div><div class='ctx'> /* Normal 64-bit system call target */</div><div class='ctx'> ENTRY(xen_syscall_target)</div><div class='ctx'> 	undo_xen_syscall</div><div class='del'>-	jmp system_call_after_swapgs</div><div class='add'>+	jmp entry_SYSCALL_64_after_swapgs</div><div class='ctx'> ENDPROC(xen_syscall_target)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='hunk'>@@ -136,13 +122,13 @@ ENDPROC(xen_syscall_target)</div><div class='ctx'> /* 32-bit compat syscall target */</div><div class='ctx'> ENTRY(xen_syscall32_target)</div><div class='ctx'> 	undo_xen_syscall</div><div class='del'>-	jmp ia32_cstar_target</div><div class='add'>+	jmp entry_SYSCALL_compat</div><div class='ctx'> ENDPROC(xen_syscall32_target)</div><div class='ctx'> </div><div class='ctx'> /* 32-bit compat sysenter target */</div><div class='ctx'> ENTRY(xen_sysenter_target)</div><div class='ctx'> 	undo_xen_syscall</div><div class='del'>-	jmp ia32_sysenter_target</div><div class='add'>+	jmp entry_SYSENTER_compat</div><div class='ctx'> ENDPROC(xen_sysenter_target)</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_IA32_EMULATION */</div><div class='head'>diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h<br/>index 9e195c683549..c20fe29e65f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/xen-ops.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/x86/xen/xen-ops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/xen-ops.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/x86/xen/xen-ops.h</a></div><div class='hunk'>@@ -134,7 +134,9 @@ DECL_ASM(void, xen_restore_fl_direct, unsigned long);</div><div class='ctx'> </div><div class='ctx'> /* These are not functions, and cannot be called normally */</div><div class='ctx'> __visible void xen_iret(void);</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='ctx'> __visible void xen_sysexit(void);</div><div class='add'>+#endif</div><div class='ctx'> __visible void xen_sysret32(void);</div><div class='ctx'> __visible void xen_sysret64(void);</div><div class='ctx'> __visible void xen_adjust_exception_frame(void);</div><div class='head'>diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig<br/>index 87be10e8b57a..e5b872ba2484 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/Kconfig</a></div><div class='hunk'>@@ -151,7 +151,7 @@ config HAVE_SMP</div><div class='ctx'> 	  the CPU core definition and currently needs to be selected manually.</div><div class='ctx'> </div><div class='ctx'> 	  Multiprocessor support in implemented with external cache and</div><div class='del'>-	  interrupt controlers.</div><div class='add'>+	  interrupt controllers.</div><div class='ctx'> </div><div class='ctx'> 	  The MX interrupt distributer adds Interprocessor Interrupts</div><div class='ctx'> 	  and causes the IRQ numbers to be increased by 4 for devices</div><div class='head'>diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild<br/>index 86a9ab2e2ca9..5b478accd5fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/Kbuild?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/Kbuild?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/Kbuild</a></div><div class='hunk'>@@ -19,10 +19,10 @@ generic-y += linkage.h</div><div class='ctx'> generic-y += local.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += mm-arch-hooks.h</div><div class='ctx'> generic-y += percpu.h</div><div class='ctx'> generic-y += preempt.h</div><div class='ctx'> generic-y += resource.h</div><div class='del'>-generic-y += scatterlist.h</div><div class='ctx'> generic-y += sections.h</div><div class='ctx'> generic-y += siginfo.h</div><div class='ctx'> generic-y += statfs.h</div><div class='head'>diff --git a/arch/xtensa/include/asm/dma-mapping.h b/arch/xtensa/include/asm/dma-mapping.h<br/>index ba78ccf651e7..1f5f6dc09736 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/dma-mapping.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/dma-mapping.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -52,14 +52,15 @@ dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,</div><div class='ctx'> 	   enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(direction == DMA_NONE);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nents; i++, sg++ ) {</div><div class='add'>+	for_each_sg(sglist, sg, nents, i) {</div><div class='ctx'> 		BUG_ON(!sg_page(sg));</div><div class='ctx'> </div><div class='ctx'> 		sg-&gt;dma_address = sg_phys(sg);</div><div class='hunk'>@@ -124,20 +125,24 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,</div><div class='ctx'> 	consistent_sync((void *)bus_to_virt(dma_handle)+offset,size,direction);</div><div class='ctx'> }</div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='add'>+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nelems,</div><div class='ctx'> 		 enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		consistent_sync(sg_virt(sg), sg-&gt;length, dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,</div><div class='del'>-		 enum dma_data_direction dir)</div><div class='add'>+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,</div><div class='add'>+		       int nelems, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	for (i = 0; i &lt; nelems; i++, sg++)</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sglist, sg, nelems, i)</div><div class='ctx'> 		consistent_sync(sg_virt(sg), sg-&gt;length, dir);</div><div class='ctx'> }</div><div class='ctx'> static inline int</div><div class='head'>diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h<br/>index fe1600a09438..c39bb6e61911 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/io.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/io.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/io.h</a></div><div class='hunk'>@@ -59,6 +59,7 @@ static inline void __iomem *ioremap_cache(unsigned long offset,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc ioremap_nocache</div><div class='add'>+#define ioremap_wt ioremap_nocache</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *ioremap(unsigned long offset, unsigned long size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h<br/>index 5d52dc43dfe7..e438a00fbd63 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/pci.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/pci.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/include/asm/pci.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@ extern struct pci_controller* pcibios_alloc_controller(void);</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c<br/>index 9e3571a6535c..83a44a33cfa1 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/mm/fault.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/mm/fault.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/mm/fault.c</a></div><div class='hunk'>@@ -15,10 +15,10 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU(unsigned long, asid_cache) = ASID_USER_FIRST;</div><div class='hunk'>@@ -57,7 +57,7 @@ void do_page_fault(struct pt_regs *regs)</div><div class='ctx'> 	/* If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-	if (in_atomic() || !mm) {</div><div class='add'>+	if (faulthandler_disabled() || !mm) {</div><div class='ctx'> 		bad_page_fault(regs, address, SIGSEGV);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c<br/>index 8cfb71ec0937..184ceadccc1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/mm/highmem.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/mm/highmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/mm/highmem.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/mm/highmem.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ void *kmap_atomic(struct page *page)</div><div class='ctx'> 	enum fixed_addresses idx;</div><div class='ctx'> 	unsigned long vaddr;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	if (!PageHighMem(page))</div><div class='ctx'> 		return page_address(page);</div><div class='hunk'>@@ -79,6 +80,7 @@ void __kunmap_atomic(void *kvaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pagefault_enable();</div><div class='add'>+	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__kunmap_atomic);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c<br/>index 17b1ef3232e4..8ab021b1f141 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/platforms/iss/network.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>arch/xtensa/platforms/iss/network.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/platforms/iss/network.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>arch/xtensa/platforms/iss/network.c</a></div><div class='hunk'>@@ -681,6 +681,4 @@ static int iss_net_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(iss_net_init);</div><div class='del'>-</div><div class='add'>+device_initcall(iss_net_init);</div><div class='head'>diff --git a/block/bio-integrity.c b/block/bio-integrity.c<br/>index 5cbd5d9ea61d..719b7152aed1 100644<br/>--- a/<a href='/drm-misc/tree/block/bio-integrity.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/bio-integrity.c</a><br/>+++ b/<a href='/drm-misc/tree/block/bio-integrity.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bio-integrity.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ struct bio_integrity_payload *bio_integrity_alloc(struct bio *bio,</div><div class='ctx'> 	unsigned long idx = BIO_POOL_NONE;</div><div class='ctx'> 	unsigned inline_vecs;</div><div class='ctx'> </div><div class='del'>-	if (!bs) {</div><div class='add'>+	if (!bs || !bs-&gt;bio_integrity_pool) {</div><div class='ctx'> 		bip = kmalloc(sizeof(struct bio_integrity_payload) +</div><div class='ctx'> 			      sizeof(struct bio_vec) * nr_vecs, gfp_mask);</div><div class='ctx'> 		inline_vecs = nr_vecs;</div><div class='hunk'>@@ -104,7 +104,7 @@ void bio_integrity_free(struct bio *bio)</div><div class='ctx'> 		kfree(page_address(bip-&gt;bip_vec-&gt;bv_page) +</div><div class='ctx'> 		      bip-&gt;bip_vec-&gt;bv_offset);</div><div class='ctx'> </div><div class='del'>-	if (bs) {</div><div class='add'>+	if (bs &amp;&amp; bs-&gt;bio_integrity_pool) {</div><div class='ctx'> 		if (bip-&gt;bip_slab != BIO_POOL_NONE)</div><div class='ctx'> 			bvec_free(bs-&gt;bvec_integrity_pool, bip-&gt;bip_vec,</div><div class='ctx'> 				  bip-&gt;bip_slab);</div><div class='hunk'>@@ -361,7 +361,7 @@ static void bio_integrity_verify_fn(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* Restore original bio completion handler */</div><div class='ctx'> 	bio-&gt;bi_end_io = bip-&gt;bip_end_io;</div><div class='del'>-	bio_endio_nodec(bio, error);</div><div class='add'>+	bio_endio(bio, error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -388,7 +388,7 @@ void bio_integrity_endio(struct bio *bio, int error)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		bio-&gt;bi_end_io = bip-&gt;bip_end_io;</div><div class='del'>-		bio_endio_nodec(bio, error);</div><div class='add'>+		bio_endio(bio, error);</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/block/bio.c b/block/bio.c<br/>index f66a4eae16ee..2a00d349cd68 100644<br/>--- a/<a href='/drm-misc/tree/block/bio.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/bio.c</a><br/>+++ b/<a href='/drm-misc/tree/block/bio.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bio.c</a></div><div class='hunk'>@@ -270,8 +270,8 @@ void bio_init(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	memset(bio, 0, sizeof(*bio));</div><div class='ctx'> 	bio-&gt;bi_flags = 1 &lt;&lt; BIO_UPTODATE;</div><div class='del'>-	atomic_set(&amp;bio-&gt;bi_remaining, 1);</div><div class='del'>-	atomic_set(&amp;bio-&gt;bi_cnt, 1);</div><div class='add'>+	atomic_set(&amp;bio-&gt;__bi_remaining, 1);</div><div class='add'>+	atomic_set(&amp;bio-&gt;__bi_cnt, 1);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_init);</div><div class='ctx'> </div><div class='hunk'>@@ -292,8 +292,8 @@ void bio_reset(struct bio *bio)</div><div class='ctx'> 	__bio_free(bio);</div><div class='ctx'> </div><div class='ctx'> 	memset(bio, 0, BIO_RESET_BYTES);</div><div class='del'>-	bio-&gt;bi_flags = flags|(1 &lt;&lt; BIO_UPTODATE);</div><div class='del'>-	atomic_set(&amp;bio-&gt;bi_remaining, 1);</div><div class='add'>+	bio-&gt;bi_flags = flags | (1 &lt;&lt; BIO_UPTODATE);</div><div class='add'>+	atomic_set(&amp;bio-&gt;__bi_remaining, 1);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_reset);</div><div class='ctx'> </div><div class='hunk'>@@ -303,6 +303,17 @@ static void bio_chain_endio(struct bio *bio, int error)</div><div class='ctx'> 	bio_put(bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Increment chain count for the bio. Make sure the CHAIN flag update</div><div class='add'>+ * is visible before the raised count.</div><div class='add'>+ */</div><div class='add'>+static inline void bio_inc_remaining(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	bio-&gt;bi_flags |= (1 &lt;&lt; BIO_CHAIN);</div><div class='add'>+	smp_mb__before_atomic();</div><div class='add'>+	atomic_inc(&amp;bio-&gt;__bi_remaining);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * bio_chain - chain bio completions</div><div class='ctx'>  * @bio: the target bio</div><div class='hunk'>@@ -320,7 +331,7 @@ void bio_chain(struct bio *bio, struct bio *parent)</div><div class='ctx'> </div><div class='ctx'> 	bio-&gt;bi_private = parent;</div><div class='ctx'> 	bio-&gt;bi_end_io	= bio_chain_endio;</div><div class='del'>-	atomic_inc(&amp;parent-&gt;bi_remaining);</div><div class='add'>+	bio_inc_remaining(parent);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_chain);</div><div class='ctx'> </div><div class='hunk'>@@ -524,13 +535,17 @@ EXPORT_SYMBOL(zero_fill_bio);</div><div class='ctx'>  **/</div><div class='ctx'> void bio_put(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	BIO_BUG_ON(!atomic_read(&amp;bio-&gt;bi_cnt));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * last put frees it</div><div class='del'>-	 */</div><div class='del'>-	if (atomic_dec_and_test(&amp;bio-&gt;bi_cnt))</div><div class='add'>+	if (!bio_flagged(bio, BIO_REFFED))</div><div class='ctx'> 		bio_free(bio);</div><div class='add'>+	else {</div><div class='add'>+		BIO_BUG_ON(!atomic_read(&amp;bio-&gt;__bi_cnt));</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * last put frees it</div><div class='add'>+		 */</div><div class='add'>+		if (atomic_dec_and_test(&amp;bio-&gt;__bi_cnt))</div><div class='add'>+			bio_free(bio);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_put);</div><div class='ctx'> </div><div class='hunk'>@@ -1741,6 +1756,25 @@ void bio_flush_dcache_pages(struct bio *bi)</div><div class='ctx'> EXPORT_SYMBOL(bio_flush_dcache_pages);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static inline bool bio_remaining_done(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If we're not chaining, then -&gt;__bi_remaining is always 1 and</div><div class='add'>+	 * we always end io on the first invocation.</div><div class='add'>+	 */</div><div class='add'>+	if (!bio_flagged(bio, BIO_CHAIN))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	BUG_ON(atomic_read(&amp;bio-&gt;__bi_remaining) &lt;= 0);</div><div class='add'>+</div><div class='add'>+	if (atomic_dec_and_test(&amp;bio-&gt;__bi_remaining)) {</div><div class='add'>+		clear_bit(BIO_CHAIN, &amp;bio-&gt;bi_flags);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * bio_endio - end I/O on a bio</div><div class='ctx'>  * @bio:	bio</div><div class='hunk'>@@ -1758,15 +1792,13 @@ EXPORT_SYMBOL(bio_flush_dcache_pages);</div><div class='ctx'> void bio_endio(struct bio *bio, int error)</div><div class='ctx'> {</div><div class='ctx'> 	while (bio) {</div><div class='del'>-		BUG_ON(atomic_read(&amp;bio-&gt;bi_remaining) &lt;= 0);</div><div class='del'>-</div><div class='ctx'> 		if (error)</div><div class='ctx'> 			clear_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags);</div><div class='ctx'> 		else if (!test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags))</div><div class='ctx'> 			error = -EIO;</div><div class='ctx'> </div><div class='del'>-		if (!atomic_dec_and_test(&amp;bio-&gt;bi_remaining))</div><div class='del'>-			return;</div><div class='add'>+		if (unlikely(!bio_remaining_done(bio)))</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Need to have a real endio function for chained bios,</div><div class='hunk'>@@ -1790,21 +1822,6 @@ void bio_endio(struct bio *bio, int error)</div><div class='ctx'> EXPORT_SYMBOL(bio_endio);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bio_endio_nodec - end I/O on a bio, without decrementing bi_remaining</div><div class='del'>- * @bio:	bio</div><div class='del'>- * @error:	error, if any</div><div class='del'>- *</div><div class='del'>- * For code that has saved and restored bi_end_io; thing hard before using this</div><div class='del'>- * function, probably you should've cloned the entire bio.</div><div class='del'>- **/</div><div class='del'>-void bio_endio_nodec(struct bio *bio, int error)</div><div class='del'>-{</div><div class='del'>-	atomic_inc(&amp;bio-&gt;bi_remaining);</div><div class='del'>-	bio_endio(bio, error);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(bio_endio_nodec);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * bio_split - split a bio</div><div class='ctx'>  * @bio:	bio to split</div><div class='ctx'>  * @sectors:	number of sectors to split from the front of @bio</div><div class='hunk'>@@ -1971,6 +1988,28 @@ struct bio_set *bioset_create_nobvec(unsigned int pool_size, unsigned int front_</div><div class='ctx'> EXPORT_SYMBOL(bioset_create_nobvec);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BLK_CGROUP</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bio_associate_blkcg - associate a bio with the specified blkcg</div><div class='add'>+ * @bio: target bio</div><div class='add'>+ * @blkcg_css: css of the blkcg to associate</div><div class='add'>+ *</div><div class='add'>+ * Associate @bio with the blkcg specified by @blkcg_css.  Block layer will</div><div class='add'>+ * treat @bio as if it were issued by a task which belongs to the blkcg.</div><div class='add'>+ *</div><div class='add'>+ * This function takes an extra reference of @blkcg_css which will be put</div><div class='add'>+ * when @bio is released.  The caller must own @bio and is responsible for</div><div class='add'>+ * synchronizing calls to this function.</div><div class='add'>+ */</div><div class='add'>+int bio_associate_blkcg(struct bio *bio, struct cgroup_subsys_state *blkcg_css)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(bio-&gt;bi_css))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	css_get(blkcg_css);</div><div class='add'>+	bio-&gt;bi_css = blkcg_css;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * bio_associate_current - associate a bio with %current</div><div class='ctx'>  * @bio: target bio</div><div class='hunk'>@@ -1987,26 +2026,17 @@ EXPORT_SYMBOL(bioset_create_nobvec);</div><div class='ctx'> int bio_associate_current(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_context *ioc;</div><div class='del'>-	struct cgroup_subsys_state *css;</div><div class='ctx'> </div><div class='del'>-	if (bio-&gt;bi_ioc)</div><div class='add'>+	if (bio-&gt;bi_css)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	ioc = current-&gt;io_context;</div><div class='ctx'> 	if (!ioc)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	/* acquire active ref on @ioc and associate */</div><div class='ctx'> 	get_io_context_active(ioc);</div><div class='ctx'> 	bio-&gt;bi_ioc = ioc;</div><div class='del'>-</div><div class='del'>-	/* associate blkcg if exists */</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	css = task_css(current, blkio_cgrp_id);</div><div class='del'>-	if (css &amp;&amp; css_tryget_online(css))</div><div class='del'>-		bio-&gt;bi_css = css;</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='add'>+	bio-&gt;bi_css = task_get_css(current, blkio_cgrp_id);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c<br/>index 0ac817b750db..9da02c021ebe 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-cgroup.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-cgroup.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-cgroup.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-cgroup.c</a></div><div class='hunk'>@@ -9,29 +9,45 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Vivek Goyal &lt;vgoyal@redhat.com&gt;</div><div class='ctx'>  * 	              Nauman Rafique &lt;nauman@google.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * For policy-specific per-blkcg data:</div><div class='add'>+ * Copyright (C) 2015 Paolo Valente &lt;paolo.valente@unimore.it&gt;</div><div class='add'>+ *                    Arianna Avanzini &lt;avanzini.arianna@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/ioprio.h&gt;</div><div class='ctx'> #include &lt;linux/kdev_t.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/backing-dev.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/genhd.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='del'>-#include "blk-cgroup.h"</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> #include "blk.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_KEY_LEN 100</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * blkcg_pol_mutex protects blkcg_policy[] and policy [de]activation.</div><div class='add'>+ * blkcg_pol_register_mutex nests outside of it and synchronizes entire</div><div class='add'>+ * policy [un]register operations including cgroup file additions /</div><div class='add'>+ * removals.  Putting cgroup file registration outside blkcg_pol_mutex</div><div class='add'>+ * allows grabbing it from cgroup callbacks.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(blkcg_pol_register_mutex);</div><div class='ctx'> static DEFINE_MUTEX(blkcg_pol_mutex);</div><div class='ctx'> </div><div class='del'>-struct blkcg blkcg_root = { .cfq_weight = 2 * CFQ_WEIGHT_DEFAULT,</div><div class='del'>-			    .cfq_leaf_weight = 2 * CFQ_WEIGHT_DEFAULT, };</div><div class='add'>+struct blkcg blkcg_root;</div><div class='ctx'> EXPORT_SYMBOL_GPL(blkcg_root);</div><div class='ctx'> </div><div class='add'>+struct cgroup_subsys_state * const blkcg_root_css = &amp;blkcg_root.css;</div><div class='add'>+</div><div class='ctx'> static struct blkcg_policy *blkcg_policy[BLKCG_MAX_POLS];</div><div class='ctx'> </div><div class='add'>+static LIST_HEAD(all_blkcgs);		/* protected by blkcg_pol_mutex */</div><div class='add'>+</div><div class='ctx'> static bool blkcg_policy_enabled(struct request_queue *q,</div><div class='ctx'> 				 const struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='hunk'>@@ -179,6 +195,7 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg,</div><div class='ctx'> 				    struct blkcg_gq *new_blkg)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg_gq *blkg;</div><div class='add'>+	struct bdi_writeback_congested *wb_congested;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_ONCE(!rcu_read_lock_held());</div><div class='hunk'>@@ -190,22 +207,30 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg,</div><div class='ctx'> 		goto err_free_blkg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wb_congested = wb_congested_get_create(&amp;q-&gt;backing_dev_info,</div><div class='add'>+					       blkcg-&gt;css.id, GFP_ATOMIC);</div><div class='add'>+	if (!wb_congested) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_put_css;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* allocate */</div><div class='ctx'> 	if (!new_blkg) {</div><div class='ctx'> 		new_blkg = blkg_alloc(blkcg, q, GFP_ATOMIC);</div><div class='ctx'> 		if (unlikely(!new_blkg)) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='del'>-			goto err_put_css;</div><div class='add'>+			goto err_put_congested;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	blkg = new_blkg;</div><div class='add'>+	blkg-&gt;wb_congested = wb_congested;</div><div class='ctx'> </div><div class='ctx'> 	/* link parent */</div><div class='ctx'> 	if (blkcg_parent(blkcg)) {</div><div class='ctx'> 		blkg-&gt;parent = __blkg_lookup(blkcg_parent(blkcg), q, false);</div><div class='ctx'> 		if (WARN_ON_ONCE(!blkg-&gt;parent)) {</div><div class='ctx'> 			ret = -EINVAL;</div><div class='del'>-			goto err_put_css;</div><div class='add'>+			goto err_put_congested;</div><div class='ctx'> 		}</div><div class='ctx'> 		blkg_get(blkg-&gt;parent);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -235,18 +260,15 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg,</div><div class='ctx'> 	blkg-&gt;online = true;</div><div class='ctx'> 	spin_unlock(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!ret) {</div><div class='del'>-		if (blkcg == &amp;blkcg_root) {</div><div class='del'>-			q-&gt;root_blkg = blkg;</div><div class='del'>-			q-&gt;root_rl.blkg = blkg;</div><div class='del'>-		}</div><div class='add'>+	if (!ret)</div><div class='ctx'> 		return blkg;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* @blkg failed fully initialized, use the usual release path */</div><div class='ctx'> 	blkg_put(blkg);</div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='ctx'> </div><div class='add'>+err_put_congested:</div><div class='add'>+	wb_congested_put(wb_congested);</div><div class='ctx'> err_put_css:</div><div class='ctx'> 	css_put(&amp;blkcg-&gt;css);</div><div class='ctx'> err_free_blkg:</div><div class='hunk'>@@ -340,15 +362,6 @@ static void blkg_destroy(struct blkcg_gq *blkg)</div><div class='ctx'> 		rcu_assign_pointer(blkcg-&gt;blkg_hint, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If root blkg is destroyed.  Just clear the pointer since root_rl</div><div class='del'>-	 * does not take reference on root blkg.</div><div class='del'>-	 */</div><div class='del'>-	if (blkcg == &amp;blkcg_root) {</div><div class='del'>-		blkg-&gt;q-&gt;root_blkg = NULL;</div><div class='del'>-		blkg-&gt;q-&gt;root_rl.blkg = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Put the reference taken at the time of creation so that when all</div><div class='ctx'> 	 * queues are gone, group can be destroyed.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -402,6 +415,8 @@ void __blkg_release_rcu(struct rcu_head *rcu_head)</div><div class='ctx'> 	if (blkg-&gt;parent)</div><div class='ctx'> 		blkg_put(blkg-&gt;parent);</div><div class='ctx'> </div><div class='add'>+	wb_congested_put(blkg-&gt;wb_congested);</div><div class='add'>+</div><div class='ctx'> 	blkg_free(blkg);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__blkg_release_rcu);</div><div class='hunk'>@@ -448,20 +463,7 @@ static int blkcg_reset_stats(struct cgroup_subsys_state *css,</div><div class='ctx'> 	struct blkcg_gq *blkg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * XXX: We invoke cgroup_add/rm_cftypes() under blkcg_pol_mutex</div><div class='del'>-	 * which ends up putting cgroup's internal cgroup_tree_mutex under</div><div class='del'>-	 * it; however, cgroup_tree_mutex is nested above cgroup file</div><div class='del'>-	 * active protection and grabbing blkcg_pol_mutex from a cgroup</div><div class='del'>-	 * file operation creates a possible circular dependency.  cgroup</div><div class='del'>-	 * internal locking is planned to go through further simplification</div><div class='del'>-	 * and this issue should go away soon.  For now, let's trylock</div><div class='del'>-	 * blkcg_pol_mutex and restart the write on failure.</div><div class='del'>-	 *</div><div class='del'>-	 * http://lkml.kernel.org/g/5363C04B.4010400@oracle.com</div><div class='del'>-	 */</div><div class='del'>-	if (!mutex_trylock(&amp;blkcg_pol_mutex))</div><div class='del'>-		return restart_syscall();</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='ctx'> 	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -809,20 +811,35 @@ static void blkcg_css_offline(struct cgroup_subsys_state *css)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+</div><div class='add'>+	wb_blkcg_offline(blkcg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void blkcg_css_free(struct cgroup_subsys_state *css)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg *blkcg = css_to_blkcg(css);</div><div class='ctx'> </div><div class='del'>-	if (blkcg != &amp;blkcg_root)</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='add'>+	list_del(&amp;blkcg-&gt;all_blkcgs_node);</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+</div><div class='add'>+	if (blkcg != &amp;blkcg_root) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; BLKCG_MAX_POLS; i++)</div><div class='add'>+			kfree(blkcg-&gt;pd[i]);</div><div class='ctx'> 		kfree(blkcg);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct cgroup_subsys_state *</div><div class='ctx'> blkcg_css_alloc(struct cgroup_subsys_state *parent_css)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg *blkcg;</div><div class='add'>+	struct cgroup_subsys_state *ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (!parent_css) {</div><div class='ctx'> 		blkcg = &amp;blkcg_root;</div><div class='hunk'>@@ -830,17 +847,54 @@ blkcg_css_alloc(struct cgroup_subsys_state *parent_css)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	blkcg = kzalloc(sizeof(*blkcg), GFP_KERNEL);</div><div class='del'>-	if (!blkcg)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+	if (!blkcg) {</div><div class='add'>+		ret = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto free_blkcg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BLKCG_MAX_POLS ; i++) {</div><div class='add'>+		struct blkcg_policy *pol = blkcg_policy[i];</div><div class='add'>+		struct blkcg_policy_data *cpd;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the policy hasn't been attached yet, wait for it</div><div class='add'>+		 * to be attached before doing anything else. Otherwise,</div><div class='add'>+		 * check if the policy requires any specific per-cgroup</div><div class='add'>+		 * data: if it does, allocate and initialize it.</div><div class='add'>+		 */</div><div class='add'>+		if (!pol || !pol-&gt;cpd_size)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		BUG_ON(blkcg-&gt;pd[i]);</div><div class='add'>+		cpd = kzalloc(pol-&gt;cpd_size, GFP_KERNEL);</div><div class='add'>+		if (!cpd) {</div><div class='add'>+			ret = ERR_PTR(-ENOMEM);</div><div class='add'>+			goto free_pd_blkcg;</div><div class='add'>+		}</div><div class='add'>+		blkcg-&gt;pd[i] = cpd;</div><div class='add'>+		cpd-&gt;plid = i;</div><div class='add'>+		pol-&gt;cpd_init_fn(blkcg);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	blkcg-&gt;cfq_weight = CFQ_WEIGHT_DEFAULT;</div><div class='del'>-	blkcg-&gt;cfq_leaf_weight = CFQ_WEIGHT_DEFAULT;</div><div class='ctx'> done:</div><div class='ctx'> 	spin_lock_init(&amp;blkcg-&gt;lock);</div><div class='ctx'> 	INIT_RADIX_TREE(&amp;blkcg-&gt;blkg_tree, GFP_ATOMIC);</div><div class='ctx'> 	INIT_HLIST_HEAD(&amp;blkcg-&gt;blkg_list);</div><div class='add'>+#ifdef CONFIG_CGROUP_WRITEBACK</div><div class='add'>+	INIT_LIST_HEAD(&amp;blkcg-&gt;cgwb_list);</div><div class='add'>+#endif</div><div class='add'>+	list_add_tail(&amp;blkcg-&gt;all_blkcgs_node, &amp;all_blkcgs);</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='ctx'> 	return &amp;blkcg-&gt;css;</div><div class='add'>+</div><div class='add'>+free_pd_blkcg:</div><div class='add'>+	for (i--; i &gt;= 0; i--)</div><div class='add'>+		kfree(blkcg-&gt;pd[i]);</div><div class='add'>+free_blkcg:</div><div class='add'>+	kfree(blkcg);</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -855,9 +909,45 @@ done:</div><div class='ctx'>  */</div><div class='ctx'> int blkcg_init_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	might_sleep();</div><div class='add'>+	struct blkcg_gq *new_blkg, *blkg;</div><div class='add'>+	bool preloaded;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	new_blkg = blkg_alloc(&amp;blkcg_root, q, GFP_KERNEL);</div><div class='add'>+	if (!new_blkg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	preloaded = !radix_tree_preload(GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure the root blkg exists and count the existing blkgs.  As</div><div class='add'>+	 * @q is bypassing at this point, blkg_lookup_create() can't be</div><div class='add'>+	 * used.  Open code insertion.</div><div class='add'>+	 */</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	blkg = blkg_create(&amp;blkcg_root, q, new_blkg);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (preloaded)</div><div class='add'>+		radix_tree_preload_end();</div><div class='ctx'> </div><div class='del'>-	return blk_throtl_init(q);</div><div class='add'>+	if (IS_ERR(blkg)) {</div><div class='add'>+		kfree(new_blkg);</div><div class='add'>+		return PTR_ERR(blkg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q-&gt;root_blkg = blkg;</div><div class='add'>+	q-&gt;root_rl.blkg = blkg;</div><div class='add'>+</div><div class='add'>+	ret = blk_throtl_init(q);</div><div class='add'>+	if (ret) {</div><div class='add'>+		spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+		blkg_destroy_all(q);</div><div class='add'>+		spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -958,52 +1048,21 @@ int blkcg_activate_policy(struct request_queue *q,</div><div class='ctx'> 			  const struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='ctx'> 	LIST_HEAD(pds);</div><div class='del'>-	struct blkcg_gq *blkg, *new_blkg;</div><div class='del'>-	struct blkg_policy_data *pd, *n;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	struct blkg_policy_data *pd, *nd;</div><div class='ctx'> 	int cnt = 0, ret;</div><div class='del'>-	bool preloaded;</div><div class='ctx'> </div><div class='ctx'> 	if (blkcg_policy_enabled(q, pol))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* preallocations for root blkg */</div><div class='del'>-	new_blkg = blkg_alloc(&amp;blkcg_root, q, GFP_KERNEL);</div><div class='del'>-	if (!new_blkg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='add'>+	/* count and allocate policy_data for all existing blkgs */</div><div class='ctx'> 	blk_queue_bypass_start(q);</div><div class='del'>-</div><div class='del'>-	preloaded = !radix_tree_preload(GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Make sure the root blkg exists and count the existing blkgs.  As</div><div class='del'>-	 * @q is bypassing at this point, blkg_lookup_create() can't be</div><div class='del'>-	 * used.  Open code it.</div><div class='del'>-	 */</div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkg = __blkg_lookup(&amp;blkcg_root, q, false);</div><div class='del'>-	if (blkg)</div><div class='del'>-		blkg_free(new_blkg);</div><div class='del'>-	else</div><div class='del'>-		blkg = blkg_create(&amp;blkcg_root, q, new_blkg);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	if (preloaded)</div><div class='del'>-		radix_tree_preload_end();</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(blkg)) {</div><div class='del'>-		ret = PTR_ERR(blkg);</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	list_for_each_entry(blkg, &amp;q-&gt;blkg_list, q_node)</div><div class='ctx'> 		cnt++;</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	/* allocate policy_data for all existing blkgs */</div><div class='add'>+	/* allocate per-blkg policy data for all existing blkgs */</div><div class='ctx'> 	while (cnt--) {</div><div class='ctx'> 		pd = kzalloc_node(pol-&gt;pd_size, GFP_KERNEL, q-&gt;node);</div><div class='ctx'> 		if (!pd) {</div><div class='hunk'>@@ -1014,7 +1073,7 @@ int blkcg_activate_policy(struct request_queue *q,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Install the allocated pds.  With @q bypassing, no new blkg</div><div class='add'>+	 * Install the allocated pds and cpds. With @q bypassing, no new blkg</div><div class='ctx'> 	 * should have been created while the queue lock was dropped.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='hunk'>@@ -1045,7 +1104,7 @@ out_unlock:</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> out_free:</div><div class='ctx'> 	blk_queue_bypass_end(q);</div><div class='del'>-	list_for_each_entry_safe(pd, n, &amp;pds, alloc_node)</div><div class='add'>+	list_for_each_entry_safe(pd, nd, &amp;pds, alloc_node)</div><div class='ctx'> 		kfree(pd);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1072,10 +1131,6 @@ void blkcg_deactivate_policy(struct request_queue *q,</div><div class='ctx'> </div><div class='ctx'> 	__clear_bit(pol-&gt;plid, q-&gt;blkcg_pols);</div><div class='ctx'> </div><div class='del'>-	/* if no policy is left, no need for blkgs - shoot them down */</div><div class='del'>-	if (bitmap_empty(q-&gt;blkcg_pols, BLKCG_MAX_POLS))</div><div class='del'>-		blkg_destroy_all(q);</div><div class='del'>-</div><div class='ctx'> 	list_for_each_entry(blkg, &amp;q-&gt;blkg_list, q_node) {</div><div class='ctx'> 		/* grab blkcg lock too while removing @pd from @blkg */</div><div class='ctx'> 		spin_lock(&amp;blkg-&gt;blkcg-&gt;lock);</div><div class='hunk'>@@ -1105,11 +1160,13 @@ EXPORT_SYMBOL_GPL(blkcg_deactivate_policy);</div><div class='ctx'>  */</div><div class='ctx'> int blkcg_policy_register(struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='add'>+	struct blkcg *blkcg;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(pol-&gt;pd_size &lt; sizeof(struct blkg_policy_data)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;blkcg_pol_register_mutex);</div><div class='ctx'> 	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* find an empty slot */</div><div class='hunk'>@@ -1118,19 +1175,49 @@ int blkcg_policy_register(struct blkcg_policy *pol)</div><div class='ctx'> 		if (!blkcg_policy[i])</div><div class='ctx'> 			break;</div><div class='ctx'> 	if (i &gt;= BLKCG_MAX_POLS)</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	/* register and update blkgs */</div><div class='add'>+	/* register @pol */</div><div class='ctx'> 	pol-&gt;plid = i;</div><div class='del'>-	blkcg_policy[i] = pol;</div><div class='add'>+	blkcg_policy[pol-&gt;plid] = pol;</div><div class='add'>+</div><div class='add'>+	/* allocate and install cpd's */</div><div class='add'>+	if (pol-&gt;cpd_size) {</div><div class='add'>+		list_for_each_entry(blkcg, &amp;all_blkcgs, all_blkcgs_node) {</div><div class='add'>+			struct blkcg_policy_data *cpd;</div><div class='add'>+</div><div class='add'>+			cpd = kzalloc(pol-&gt;cpd_size, GFP_KERNEL);</div><div class='add'>+			if (!cpd) {</div><div class='add'>+				mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+				goto err_free_cpds;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			blkcg-&gt;pd[pol-&gt;plid] = cpd;</div><div class='add'>+			cpd-&gt;plid = pol-&gt;plid;</div><div class='add'>+			pol-&gt;cpd_init_fn(blkcg);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* everything is in place, add intf files for the new policy */</div><div class='ctx'> 	if (pol-&gt;cftypes)</div><div class='ctx'> 		WARN_ON(cgroup_add_legacy_cftypes(&amp;blkio_cgrp_subsys,</div><div class='ctx'> 						  pol-&gt;cftypes));</div><div class='del'>-	ret = 0;</div><div class='del'>-out_unlock:</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_register_mutex);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_cpds:</div><div class='add'>+	if (pol-&gt;cpd_size) {</div><div class='add'>+		list_for_each_entry(blkcg, &amp;all_blkcgs, all_blkcgs_node) {</div><div class='add'>+			kfree(blkcg-&gt;pd[pol-&gt;plid]);</div><div class='add'>+			blkcg-&gt;pd[pol-&gt;plid] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	blkcg_policy[pol-&gt;plid] = NULL;</div><div class='add'>+err_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_register_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blkcg_policy_register);</div><div class='hunk'>@@ -1143,7 +1230,9 @@ EXPORT_SYMBOL_GPL(blkcg_policy_register);</div><div class='ctx'>  */</div><div class='ctx'> void blkcg_policy_unregister(struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='add'>+	struct blkcg *blkcg;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_register_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(blkcg_policy[pol-&gt;plid] != pol))</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -1152,9 +1241,19 @@ void blkcg_policy_unregister(struct blkcg_policy *pol)</div><div class='ctx'> 	if (pol-&gt;cftypes)</div><div class='ctx'> 		cgroup_rm_cftypes(pol-&gt;cftypes);</div><div class='ctx'> </div><div class='del'>-	/* unregister and update blkgs */</div><div class='add'>+	/* remove cpds and unregister */</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='add'>+</div><div class='add'>+	if (pol-&gt;cpd_size) {</div><div class='add'>+		list_for_each_entry(blkcg, &amp;all_blkcgs, all_blkcgs_node) {</div><div class='add'>+			kfree(blkcg-&gt;pd[pol-&gt;plid]);</div><div class='add'>+			blkcg-&gt;pd[pol-&gt;plid] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	blkcg_policy[pol-&gt;plid] = NULL;</div><div class='del'>-out_unlock:</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_register_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blkcg_policy_unregister);</div><div class='head'>diff --git a/block/blk-core.c b/block/blk-core.c<br/>index 03b5f8d77f37..627ed0c593fb 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-core.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-core.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-core.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-core.c</a></div><div class='hunk'>@@ -32,12 +32,12 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;trace/events/block.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='del'>-#include "blk-cgroup.h"</div><div class='ctx'> #include "blk-mq.h"</div><div class='ctx'> </div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_remap);</div><div class='hunk'>@@ -63,6 +63,31 @@ struct kmem_cache *blk_requestq_cachep;</div><div class='ctx'>  */</div><div class='ctx'> static struct workqueue_struct *kblockd_workqueue;</div><div class='ctx'> </div><div class='add'>+static void blk_clear_congested(struct request_list *rl, int sync)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_CGROUP_WRITEBACK</div><div class='add'>+	clear_wb_congested(rl-&gt;blkg-&gt;wb_congested, sync);</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * If !CGROUP_WRITEBACK, all blkg's map to bdi-&gt;wb and we shouldn't</div><div class='add'>+	 * flip its congestion state for events on other blkcgs.</div><div class='add'>+	 */</div><div class='add'>+	if (rl == &amp;rl-&gt;q-&gt;root_rl)</div><div class='add'>+		clear_wb_congested(rl-&gt;q-&gt;backing_dev_info.wb.congested, sync);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blk_set_congested(struct request_list *rl, int sync)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_CGROUP_WRITEBACK</div><div class='add'>+	set_wb_congested(rl-&gt;blkg-&gt;wb_congested, sync);</div><div class='add'>+#else</div><div class='add'>+	/* see blk_clear_congested() */</div><div class='add'>+	if (rl == &amp;rl-&gt;q-&gt;root_rl)</div><div class='add'>+		set_wb_congested(rl-&gt;q-&gt;backing_dev_info.wb.congested, sync);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void blk_queue_congestion_threshold(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	int nr;</div><div class='hunk'>@@ -285,6 +310,7 @@ inline void __blk_run_queue_uncond(struct request_queue *q)</div><div class='ctx'> 	q-&gt;request_fn(q);</div><div class='ctx'> 	q-&gt;request_fn_active--;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(__blk_run_queue_uncond);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __blk_run_queue - run a single device queue</div><div class='hunk'>@@ -621,8 +647,7 @@ struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id)</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;backing_dev_info.ra_pages =</div><div class='ctx'> 			(VM_MAX_READAHEAD * 1024) / PAGE_CACHE_SIZE;</div><div class='del'>-	q-&gt;backing_dev_info.state = 0;</div><div class='del'>-	q-&gt;backing_dev_info.capabilities = 0;</div><div class='add'>+	q-&gt;backing_dev_info.capabilities = BDI_CAP_CGROUP_WRITEBACK;</div><div class='ctx'> 	q-&gt;backing_dev_info.name = "block";</div><div class='ctx'> 	q-&gt;node = node_id;</div><div class='ctx'> </div><div class='hunk'>@@ -845,13 +870,8 @@ static void __freed_request(struct request_list *rl, int sync)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = rl-&gt;q;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * bdi isn't aware of blkcg yet.  As all async IOs end up root</div><div class='del'>-	 * blkcg anyway, just use root blkcg state.</div><div class='del'>-	 */</div><div class='del'>-	if (rl == &amp;q-&gt;root_rl &amp;&amp;</div><div class='del'>-	    rl-&gt;count[sync] &lt; queue_congestion_off_threshold(q))</div><div class='del'>-		blk_clear_queue_congested(q, sync);</div><div class='add'>+	if (rl-&gt;count[sync] &lt; queue_congestion_off_threshold(q))</div><div class='add'>+		blk_clear_congested(rl, sync);</div><div class='ctx'> </div><div class='ctx'> 	if (rl-&gt;count[sync] + 1 &lt;= q-&gt;nr_requests) {</div><div class='ctx'> 		if (waitqueue_active(&amp;rl-&gt;wait[sync]))</div><div class='hunk'>@@ -884,25 +904,25 @@ static void freed_request(struct request_list *rl, unsigned int flags)</div><div class='ctx'> int blk_update_nr_requests(struct request_queue *q, unsigned int nr)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_list *rl;</div><div class='add'>+	int on_thresh, off_thresh;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> 	q-&gt;nr_requests = nr;</div><div class='ctx'> 	blk_queue_congestion_threshold(q);</div><div class='add'>+	on_thresh = queue_congestion_on_threshold(q);</div><div class='add'>+	off_thresh = queue_congestion_off_threshold(q);</div><div class='ctx'> </div><div class='del'>-	/* congestion isn't cgroup aware and follows root blkcg for now */</div><div class='del'>-	rl = &amp;q-&gt;root_rl;</div><div class='del'>-</div><div class='del'>-	if (rl-&gt;count[BLK_RW_SYNC] &gt;= queue_congestion_on_threshold(q))</div><div class='del'>-		blk_set_queue_congested(q, BLK_RW_SYNC);</div><div class='del'>-	else if (rl-&gt;count[BLK_RW_SYNC] &lt; queue_congestion_off_threshold(q))</div><div class='del'>-		blk_clear_queue_congested(q, BLK_RW_SYNC);</div><div class='add'>+	blk_queue_for_each_rl(rl, q) {</div><div class='add'>+		if (rl-&gt;count[BLK_RW_SYNC] &gt;= on_thresh)</div><div class='add'>+			blk_set_congested(rl, BLK_RW_SYNC);</div><div class='add'>+		else if (rl-&gt;count[BLK_RW_SYNC] &lt; off_thresh)</div><div class='add'>+			blk_clear_congested(rl, BLK_RW_SYNC);</div><div class='ctx'> </div><div class='del'>-	if (rl-&gt;count[BLK_RW_ASYNC] &gt;= queue_congestion_on_threshold(q))</div><div class='del'>-		blk_set_queue_congested(q, BLK_RW_ASYNC);</div><div class='del'>-	else if (rl-&gt;count[BLK_RW_ASYNC] &lt; queue_congestion_off_threshold(q))</div><div class='del'>-		blk_clear_queue_congested(q, BLK_RW_ASYNC);</div><div class='add'>+		if (rl-&gt;count[BLK_RW_ASYNC] &gt;= on_thresh)</div><div class='add'>+			blk_set_congested(rl, BLK_RW_ASYNC);</div><div class='add'>+		else if (rl-&gt;count[BLK_RW_ASYNC] &lt; off_thresh)</div><div class='add'>+			blk_clear_congested(rl, BLK_RW_ASYNC);</div><div class='ctx'> </div><div class='del'>-	blk_queue_for_each_rl(rl, q) {</div><div class='ctx'> 		if (rl-&gt;count[BLK_RW_SYNC] &gt;= q-&gt;nr_requests) {</div><div class='ctx'> 			blk_set_rl_full(rl, BLK_RW_SYNC);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1012,12 +1032,7 @@ static struct request *__get_request(struct request_list *rl, int rw_flags,</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		/*</div><div class='del'>-		 * bdi isn't aware of blkcg yet.  As all async IOs end up</div><div class='del'>-		 * root blkcg anyway, just use root blkcg state.</div><div class='del'>-		 */</div><div class='del'>-		if (rl == &amp;q-&gt;root_rl)</div><div class='del'>-			blk_set_queue_congested(q, is_sync);</div><div class='add'>+		blk_set_congested(rl, is_sync);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1525,7 +1540,8 @@ bool bio_attempt_front_merge(struct request_queue *q, struct request *req,</div><div class='ctx'>  * Caller must ensure !blk_queue_nomerges(q) beforehand.</div><div class='ctx'>  */</div><div class='ctx'> bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,</div><div class='del'>-			    unsigned int *request_count)</div><div class='add'>+			    unsigned int *request_count,</div><div class='add'>+			    struct request **same_queue_rq)</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_plug *plug;</div><div class='ctx'> 	struct request *rq;</div><div class='hunk'>@@ -1545,8 +1561,16 @@ bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,</div><div class='ctx'> 	list_for_each_entry_reverse(rq, plug_list, queuelist) {</div><div class='ctx'> 		int el_ret;</div><div class='ctx'> </div><div class='del'>-		if (rq-&gt;q == q)</div><div class='add'>+		if (rq-&gt;q == q) {</div><div class='ctx'> 			(*request_count)++;</div><div class='add'>+			/*</div><div class='add'>+			 * Only blk-mq multiple hardware queues case checks the</div><div class='add'>+			 * rq in the same queue, there should be only one such</div><div class='add'>+			 * rq in a queue</div><div class='add'>+			 **/</div><div class='add'>+			if (same_queue_rq)</div><div class='add'>+				*same_queue_rq = rq;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (rq-&gt;q != q || !blk_rq_merge_ok(rq, bio))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1611,7 +1635,7 @@ static void blk_queue_bio(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	 * any locks.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!blk_queue_nomerges(q) &amp;&amp;</div><div class='del'>-	    blk_attempt_plug_merge(q, bio, &amp;request_count))</div><div class='add'>+	    blk_attempt_plug_merge(q, bio, &amp;request_count, NULL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='hunk'>@@ -1718,8 +1742,6 @@ static void handle_bad_sector(struct bio *bio)</div><div class='ctx'> 			bio-&gt;bi_rw,</div><div class='ctx'> 			(unsigned long long)bio_end_sector(bio),</div><div class='ctx'> 			(long long)(i_size_read(bio-&gt;bi_bdev-&gt;bd_inode) &gt;&gt; 9));</div><div class='del'>-</div><div class='del'>-	set_bit(BIO_EOF, &amp;bio-&gt;bi_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FAIL_MAKE_REQUEST</div><div class='hunk'>@@ -3034,21 +3056,20 @@ void blk_start_plug(struct blk_plug *plug)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If this is a nested plug, don't actually assign it.</div><div class='add'>+	 */</div><div class='add'>+	if (tsk-&gt;plug)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;plug-&gt;list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;plug-&gt;mq_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;plug-&gt;cb_list);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * If this is a nested plug, don't actually assign it. It will be</div><div class='del'>-	 * flushed on its own.</div><div class='add'>+	 * Store ordering should not be needed here, since a potential</div><div class='add'>+	 * preempt will imply a full memory barrier</div><div class='ctx'> 	 */</div><div class='del'>-	if (!tsk-&gt;plug) {</div><div class='del'>-		/*</div><div class='del'>-		 * Store ordering should not be needed here, since a potential</div><div class='del'>-		 * preempt will imply a full memory barrier</div><div class='del'>-		 */</div><div class='del'>-		tsk-&gt;plug = plug;</div><div class='del'>-	}</div><div class='add'>+	tsk-&gt;plug = plug;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(blk_start_plug);</div><div class='ctx'> </div><div class='hunk'>@@ -3195,10 +3216,11 @@ void blk_flush_plug_list(struct blk_plug *plug, bool from_schedule)</div><div class='ctx'> </div><div class='ctx'> void blk_finish_plug(struct blk_plug *plug)</div><div class='ctx'> {</div><div class='add'>+	if (plug != current-&gt;plug)</div><div class='add'>+		return;</div><div class='ctx'> 	blk_flush_plug_list(plug, false);</div><div class='ctx'> </div><div class='del'>-	if (plug == current-&gt;plug)</div><div class='del'>-		current-&gt;plug = NULL;</div><div class='add'>+	current-&gt;plug = NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(blk_finish_plug);</div><div class='ctx'> </div><div class='hunk'>@@ -3348,7 +3370,7 @@ EXPORT_SYMBOL(blk_post_runtime_resume);</div><div class='ctx'> int __init blk_dev_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	BUILD_BUG_ON(__REQ_NR_BITS &gt; 8 *</div><div class='del'>-			sizeof(((struct request *)0)-&gt;cmd_flags));</div><div class='add'>+			FIELD_SIZEOF(struct request, cmd_flags));</div><div class='ctx'> </div><div class='ctx'> 	/* used for unplugging and affects IO latency/throughput - HIGHPRI */</div><div class='ctx'> 	kblockd_workqueue = alloc_workqueue("kblockd",</div><div class='head'>diff --git a/block/blk-exec.c b/block/blk-exec.c<br/>index 9924725fa50d..3fec8a29d0fa 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-exec.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-exec.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-exec.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-exec.c</a></div><div class='hunk'>@@ -53,7 +53,6 @@ void blk_execute_rq_nowait(struct request_queue *q, struct gendisk *bd_disk,</div><div class='ctx'> 			   rq_end_io_fn *done)</div><div class='ctx'> {</div><div class='ctx'> 	int where = at_head ? ELEVATOR_INSERT_FRONT : ELEVATOR_INSERT_BACK;</div><div class='del'>-	bool is_pm_resume;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(irqs_disabled());</div><div class='ctx'> 	WARN_ON(rq-&gt;cmd_type == REQ_TYPE_FS);</div><div class='hunk'>@@ -70,12 +69,6 @@ void blk_execute_rq_nowait(struct request_queue *q, struct gendisk *bd_disk,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * need to check this before __blk_run_queue(), because rq can</div><div class='del'>-	 * be freed before that returns.</div><div class='del'>-	 */</div><div class='del'>-	is_pm_resume = rq-&gt;cmd_type == REQ_TYPE_PM_RESUME;</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(blk_queue_dying(q))) {</div><div class='hunk'>@@ -88,9 +81,6 @@ void blk_execute_rq_nowait(struct request_queue *q, struct gendisk *bd_disk,</div><div class='ctx'> </div><div class='ctx'> 	__elv_add_request(q, rq, where);</div><div class='ctx'> 	__blk_run_queue(q);</div><div class='del'>-	/* the queue is stopped so it won't be run */</div><div class='del'>-	if (is_pm_resume)</div><div class='del'>-		__blk_run_queue_uncond(q);</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_execute_rq_nowait);</div><div class='head'>diff --git a/block/blk-integrity.c b/block/blk-integrity.c<br/>index 79ffb4855af0..f548b64be092 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-integrity.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-integrity.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-integrity.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-integrity.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/backing-dev.h&gt;</div><div class='ctx'> #include &lt;linux/mempool.h&gt;</div><div class='ctx'> #include &lt;linux/bio.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='head'>diff --git a/block/blk-merge.c b/block/blk-merge.c<br/>index fd3fee81c23c..30a0d9f89017 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-merge.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-merge.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-merge.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-merge.c</a></div><div class='hunk'>@@ -589,7 +589,8 @@ bool blk_rq_merge_ok(struct request *rq, struct bio *bio)</div><div class='ctx'> 	    !blk_write_same_mergeable(rq-&gt;bio, bio))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (q-&gt;queue_flags &amp; (1 &lt;&lt; QUEUE_FLAG_SG_GAPS)) {</div><div class='add'>+	/* Only check gaps if the bio carries data */</div><div class='add'>+	if (q-&gt;queue_flags &amp; (1 &lt;&lt; QUEUE_FLAG_SG_GAPS) &amp;&amp; bio_has_data(bio)) {</div><div class='ctx'> 		struct bio_vec *bprev;</div><div class='ctx'> </div><div class='ctx'> 		bprev = &amp;rq-&gt;biotail-&gt;bi_io_vec[rq-&gt;biotail-&gt;bi_vcnt - 1];</div><div class='head'>diff --git a/block/blk-mq-cpumap.c b/block/blk-mq-cpumap.c<br/>index 5f13f4d0bcce..1e28ddb656b8 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-mq-cpumap.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-mq-cpumap.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-mq-cpumap.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-cpumap.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@ static int get_first_sibling(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ret;</div><div class='ctx'> </div><div class='del'>-	ret = cpumask_first(topology_thread_cpumask(cpu));</div><div class='add'>+	ret = cpumask_first(topology_sibling_cpumask(cpu));</div><div class='ctx'> 	if (ret &lt; nr_cpu_ids)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-mq-tag.c b/block/blk-mq-tag.c<br/>index be3290cc0644..9b6e28830b82 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-mq-tag.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-mq-tag.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-mq-tag.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-tag.c</a></div><div class='hunk'>@@ -438,6 +438,39 @@ static void bt_for_each(struct blk_mq_hw_ctx *hctx,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bt_tags_for_each(struct blk_mq_tags *tags,</div><div class='add'>+		struct blk_mq_bitmap_tags *bt, unsigned int off,</div><div class='add'>+		busy_tag_iter_fn *fn, void *data, bool reserved)</div><div class='add'>+{</div><div class='add'>+	struct request *rq;</div><div class='add'>+	int bit, i;</div><div class='add'>+</div><div class='add'>+	if (!tags-&gt;rqs)</div><div class='add'>+		return;</div><div class='add'>+	for (i = 0; i &lt; bt-&gt;map_nr; i++) {</div><div class='add'>+		struct blk_align_bitmap *bm = &amp;bt-&gt;map[i];</div><div class='add'>+</div><div class='add'>+		for (bit = find_first_bit(&amp;bm-&gt;word, bm-&gt;depth);</div><div class='add'>+		     bit &lt; bm-&gt;depth;</div><div class='add'>+		     bit = find_next_bit(&amp;bm-&gt;word, bm-&gt;depth, bit + 1)) {</div><div class='add'>+			rq = blk_mq_tag_to_rq(tags, off + bit);</div><div class='add'>+			fn(rq, data, reserved);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		off += (1 &lt;&lt; bt-&gt;bits_per_word);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blk_mq_all_tag_busy_iter(struct blk_mq_tags *tags, busy_tag_iter_fn *fn,</div><div class='add'>+		void *priv)</div><div class='add'>+{</div><div class='add'>+	if (tags-&gt;nr_reserved_tags)</div><div class='add'>+		bt_tags_for_each(tags, &amp;tags-&gt;breserved_tags, 0, fn, priv, true);</div><div class='add'>+	bt_tags_for_each(tags, &amp;tags-&gt;bitmap_tags, tags-&gt;nr_reserved_tags, fn, priv,</div><div class='add'>+			false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(blk_mq_all_tag_busy_iter);</div><div class='add'>+</div><div class='ctx'> void blk_mq_tag_busy_iter(struct blk_mq_hw_ctx *hctx, busy_iter_fn *fn,</div><div class='ctx'> 		void *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -580,6 +613,11 @@ struct blk_mq_tags *blk_mq_init_tags(unsigned int total_tags,</div><div class='ctx'> 	if (!tags)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	if (!zalloc_cpumask_var(&amp;tags-&gt;cpumask, GFP_KERNEL)) {</div><div class='add'>+		kfree(tags);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tags-&gt;nr_tags = total_tags;</div><div class='ctx'> 	tags-&gt;nr_reserved_tags = reserved_tags;</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-mq-tag.h b/block/blk-mq-tag.h<br/>index 90767b370308..75893a34237d 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-mq-tag.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-mq-tag.h</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-mq-tag.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq-tag.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ struct blk_mq_tags {</div><div class='ctx'> 	struct list_head page_list;</div><div class='ctx'> </div><div class='ctx'> 	int alloc_policy;</div><div class='add'>+	cpumask_var_t cpumask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-mq.c b/block/blk-mq.c<br/>index 594eea04266e..7d842db59699 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-mq.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-mq.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-mq.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-mq.c</a></div><div class='hunk'>@@ -89,7 +89,8 @@ static int blk_mq_queue_enter(struct request_queue *q, gfp_t gfp)</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 		ret = wait_event_interruptible(q-&gt;mq_freeze_wq,</div><div class='del'>-				!q-&gt;mq_freeze_depth || blk_queue_dying(q));</div><div class='add'>+				!atomic_read(&amp;q-&gt;mq_freeze_depth) ||</div><div class='add'>+				blk_queue_dying(q));</div><div class='ctx'> 		if (blk_queue_dying(q))</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -112,13 +113,10 @@ static void blk_mq_usage_counter_release(struct percpu_ref *ref)</div><div class='ctx'> </div><div class='ctx'> void blk_mq_freeze_queue_start(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	bool freeze;</div><div class='add'>+	int freeze_depth;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	freeze = !q-&gt;mq_freeze_depth++;</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	if (freeze) {</div><div class='add'>+	freeze_depth = atomic_inc_return(&amp;q-&gt;mq_freeze_depth);</div><div class='add'>+	if (freeze_depth == 1) {</div><div class='ctx'> 		percpu_ref_kill(&amp;q-&gt;mq_usage_counter);</div><div class='ctx'> 		blk_mq_run_hw_queues(q, false);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -143,13 +141,11 @@ EXPORT_SYMBOL_GPL(blk_mq_freeze_queue);</div><div class='ctx'> </div><div class='ctx'> void blk_mq_unfreeze_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	bool wake;</div><div class='add'>+	int freeze_depth;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	wake = !--q-&gt;mq_freeze_depth;</div><div class='del'>-	WARN_ON_ONCE(q-&gt;mq_freeze_depth &lt; 0);</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-	if (wake) {</div><div class='add'>+	freeze_depth = atomic_dec_return(&amp;q-&gt;mq_freeze_depth);</div><div class='add'>+	WARN_ON_ONCE(freeze_depth &lt; 0);</div><div class='add'>+	if (!freeze_depth) {</div><div class='ctx'> 		percpu_ref_reinit(&amp;q-&gt;mq_usage_counter);</div><div class='ctx'> 		wake_up_all(&amp;q-&gt;mq_freeze_wq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1237,6 +1233,38 @@ static struct request *blk_mq_map_request(struct request_queue *q,</div><div class='ctx'> 	return rq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int blk_mq_direct_issue_request(struct request *rq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct request_queue *q = rq-&gt;q;</div><div class='add'>+	struct blk_mq_hw_ctx *hctx = q-&gt;mq_ops-&gt;map_queue(q,</div><div class='add'>+			rq-&gt;mq_ctx-&gt;cpu);</div><div class='add'>+	struct blk_mq_queue_data bd = {</div><div class='add'>+		.rq = rq,</div><div class='add'>+		.list = NULL,</div><div class='add'>+		.last = 1</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For OK queue, we are done. For error, kill it. Any other</div><div class='add'>+	 * error (busy), just add it to our list as we previously</div><div class='add'>+	 * would have done</div><div class='add'>+	 */</div><div class='add'>+	ret = q-&gt;mq_ops-&gt;queue_rq(hctx, &amp;bd);</div><div class='add'>+	if (ret == BLK_MQ_RQ_QUEUE_OK)</div><div class='add'>+		return 0;</div><div class='add'>+	else {</div><div class='add'>+		__blk_mq_requeue_request(rq);</div><div class='add'>+</div><div class='add'>+		if (ret == BLK_MQ_RQ_QUEUE_ERROR) {</div><div class='add'>+			rq-&gt;errors = -EIO;</div><div class='add'>+			blk_mq_end_request(rq, rq-&gt;errors);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Multiple hardware queue variant. This will not use per-process plugs,</div><div class='ctx'>  * but will attempt to bypass the hctx queueing if we can go straight to</div><div class='hunk'>@@ -1248,6 +1276,9 @@ static void blk_mq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	const int is_flush_fua = bio-&gt;bi_rw &amp; (REQ_FLUSH | REQ_FUA);</div><div class='ctx'> 	struct blk_map_ctx data;</div><div class='ctx'> 	struct request *rq;</div><div class='add'>+	unsigned int request_count = 0;</div><div class='add'>+	struct blk_plug *plug;</div><div class='add'>+	struct request *same_queue_rq = NULL;</div><div class='ctx'> </div><div class='ctx'> 	blk_queue_bounce(q, &amp;bio);</div><div class='ctx'> </div><div class='hunk'>@@ -1256,6 +1287,10 @@ static void blk_mq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!is_flush_fua &amp;&amp; !blk_queue_nomerges(q) &amp;&amp;</div><div class='add'>+	    blk_attempt_plug_merge(q, bio, &amp;request_count, &amp;same_queue_rq))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	rq = blk_mq_map_request(q, bio, &amp;data);</div><div class='ctx'> 	if (unlikely(!rq))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1266,38 +1301,42 @@ static void blk_mq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 		goto run_queue;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	plug = current-&gt;plug;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the driver supports defer issued based on 'last', then</div><div class='ctx'> 	 * queue it up like normal since we can potentially save some</div><div class='ctx'> 	 * CPU this way.</div><div class='ctx'> 	 */</div><div class='del'>-	if (is_sync &amp;&amp; !(data.hctx-&gt;flags &amp; BLK_MQ_F_DEFER_ISSUE)) {</div><div class='del'>-		struct blk_mq_queue_data bd = {</div><div class='del'>-			.rq = rq,</div><div class='del'>-			.list = NULL,</div><div class='del'>-			.last = 1</div><div class='del'>-		};</div><div class='del'>-		int ret;</div><div class='add'>+	if (((plug &amp;&amp; !blk_queue_nomerges(q)) || is_sync) &amp;&amp;</div><div class='add'>+	    !(data.hctx-&gt;flags &amp; BLK_MQ_F_DEFER_ISSUE)) {</div><div class='add'>+		struct request *old_rq = NULL;</div><div class='ctx'> </div><div class='ctx'> 		blk_mq_bio_to_request(rq, bio);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * For OK queue, we are done. For error, kill it. Any other</div><div class='del'>-		 * error (busy), just add it to our list as we previously</div><div class='del'>-		 * would have done</div><div class='add'>+		 * we do limited pluging. If bio can be merged, do merge.</div><div class='add'>+		 * Otherwise the existing request in the plug list will be</div><div class='add'>+		 * issued. So the plug list will have one request at most</div><div class='ctx'> 		 */</div><div class='del'>-		ret = q-&gt;mq_ops-&gt;queue_rq(data.hctx, &amp;bd);</div><div class='del'>-		if (ret == BLK_MQ_RQ_QUEUE_OK)</div><div class='del'>-			goto done;</div><div class='del'>-		else {</div><div class='del'>-			__blk_mq_requeue_request(rq);</div><div class='del'>-</div><div class='del'>-			if (ret == BLK_MQ_RQ_QUEUE_ERROR) {</div><div class='del'>-				rq-&gt;errors = -EIO;</div><div class='del'>-				blk_mq_end_request(rq, rq-&gt;errors);</div><div class='del'>-				goto done;</div><div class='add'>+		if (plug) {</div><div class='add'>+			/*</div><div class='add'>+			 * The plug list might get flushed before this. If that</div><div class='add'>+			 * happens, same_queue_rq is invalid and plug list is empty</div><div class='add'>+			 **/</div><div class='add'>+			if (same_queue_rq &amp;&amp; !list_empty(&amp;plug-&gt;mq_list)) {</div><div class='add'>+				old_rq = same_queue_rq;</div><div class='add'>+				list_del_init(&amp;old_rq-&gt;queuelist);</div><div class='ctx'> 			}</div><div class='del'>-		}</div><div class='add'>+			list_add_tail(&amp;rq-&gt;queuelist, &amp;plug-&gt;mq_list);</div><div class='add'>+		} else /* is_sync */</div><div class='add'>+			old_rq = rq;</div><div class='add'>+		blk_mq_put_ctx(data.ctx);</div><div class='add'>+		if (!old_rq)</div><div class='add'>+			return;</div><div class='add'>+		if (!blk_mq_direct_issue_request(old_rq))</div><div class='add'>+			return;</div><div class='add'>+		blk_mq_insert_request(old_rq, false, true, true);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!blk_mq_merge_queue_io(data.hctx, data.ctx, rq, bio)) {</div><div class='hunk'>@@ -1310,7 +1349,6 @@ static void blk_mq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> run_queue:</div><div class='ctx'> 		blk_mq_run_hw_queue(data.hctx, !is_sync || is_flush_fua);</div><div class='ctx'> 	}</div><div class='del'>-done:</div><div class='ctx'> 	blk_mq_put_ctx(data.ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1322,16 +1360,11 @@ static void blk_sq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	const int is_sync = rw_is_sync(bio-&gt;bi_rw);</div><div class='ctx'> 	const int is_flush_fua = bio-&gt;bi_rw &amp; (REQ_FLUSH | REQ_FUA);</div><div class='del'>-	unsigned int use_plug, request_count = 0;</div><div class='add'>+	struct blk_plug *plug;</div><div class='add'>+	unsigned int request_count = 0;</div><div class='ctx'> 	struct blk_map_ctx data;</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If we have multiple hardware queues, just go directly to</div><div class='del'>-	 * one of those for sync IO.</div><div class='del'>-	 */</div><div class='del'>-	use_plug = !is_flush_fua &amp;&amp; !is_sync;</div><div class='del'>-</div><div class='ctx'> 	blk_queue_bounce(q, &amp;bio);</div><div class='ctx'> </div><div class='ctx'> 	if (bio_integrity_enabled(bio) &amp;&amp; bio_integrity_prep(bio)) {</div><div class='hunk'>@@ -1339,8 +1372,8 @@ static void blk_sq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (use_plug &amp;&amp; !blk_queue_nomerges(q) &amp;&amp;</div><div class='del'>-	    blk_attempt_plug_merge(q, bio, &amp;request_count))</div><div class='add'>+	if (!is_flush_fua &amp;&amp; !blk_queue_nomerges(q) &amp;&amp;</div><div class='add'>+	    blk_attempt_plug_merge(q, bio, &amp;request_count, NULL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rq = blk_mq_map_request(q, bio, &amp;data);</div><div class='hunk'>@@ -1358,21 +1391,18 @@ static void blk_sq_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	 * utilize that to temporarily store requests until the task is</div><div class='ctx'> 	 * either done or scheduled away.</div><div class='ctx'> 	 */</div><div class='del'>-	if (use_plug) {</div><div class='del'>-		struct blk_plug *plug = current-&gt;plug;</div><div class='del'>-</div><div class='del'>-		if (plug) {</div><div class='del'>-			blk_mq_bio_to_request(rq, bio);</div><div class='del'>-			if (list_empty(&amp;plug-&gt;mq_list))</div><div class='del'>-				trace_block_plug(q);</div><div class='del'>-			else if (request_count &gt;= BLK_MAX_REQUEST_COUNT) {</div><div class='del'>-				blk_flush_plug_list(plug, false);</div><div class='del'>-				trace_block_plug(q);</div><div class='del'>-			}</div><div class='del'>-			list_add_tail(&amp;rq-&gt;queuelist, &amp;plug-&gt;mq_list);</div><div class='del'>-			blk_mq_put_ctx(data.ctx);</div><div class='del'>-			return;</div><div class='add'>+	plug = current-&gt;plug;</div><div class='add'>+	if (plug) {</div><div class='add'>+		blk_mq_bio_to_request(rq, bio);</div><div class='add'>+		if (list_empty(&amp;plug-&gt;mq_list))</div><div class='add'>+			trace_block_plug(q);</div><div class='add'>+		else if (request_count &gt;= BLK_MAX_REQUEST_COUNT) {</div><div class='add'>+			blk_flush_plug_list(plug, false);</div><div class='add'>+			trace_block_plug(q);</div><div class='ctx'> 		}</div><div class='add'>+		list_add_tail(&amp;rq-&gt;queuelist, &amp;plug-&gt;mq_list);</div><div class='add'>+		blk_mq_put_ctx(data.ctx);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!blk_mq_merge_queue_io(data.hctx, data.ctx, rq, bio)) {</div><div class='hunk'>@@ -1508,7 +1538,6 @@ static struct blk_mq_tags *blk_mq_init_rq_map(struct blk_mq_tag_set *set,</div><div class='ctx'> 			i++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return tags;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='hunk'>@@ -1792,6 +1821,7 @@ static void blk_mq_map_swqueue(struct request_queue *q)</div><div class='ctx'> </div><div class='ctx'> 		hctx = q-&gt;mq_ops-&gt;map_queue(q, i);</div><div class='ctx'> 		cpumask_set_cpu(i, hctx-&gt;cpumask);</div><div class='add'>+		cpumask_set_cpu(i, hctx-&gt;tags-&gt;cpumask);</div><div class='ctx'> 		ctx-&gt;index_hw = hctx-&gt;nr_ctx;</div><div class='ctx'> 		hctx-&gt;ctxs[hctx-&gt;nr_ctx++] = ctx;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1968,7 +1998,7 @@ struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,</div><div class='ctx'> 		goto err_hctxs;</div><div class='ctx'> </div><div class='ctx'> 	setup_timer(&amp;q-&gt;timeout, blk_mq_rq_timer, (unsigned long) q);</div><div class='del'>-	blk_queue_rq_timeout(q, set-&gt;timeout ? set-&gt;timeout : 30000);</div><div class='add'>+	blk_queue_rq_timeout(q, set-&gt;timeout ? set-&gt;timeout : 30 * HZ);</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;nr_queues = nr_cpu_ids;</div><div class='ctx'> 	q-&gt;nr_hw_queues = set-&gt;nr_hw_queues;</div><div class='hunk'>@@ -2056,7 +2086,7 @@ void blk_mq_free_queue(struct request_queue *q)</div><div class='ctx'> /* Basically redo blk_mq_init_queue with queue frozen */</div><div class='ctx'> static void blk_mq_queue_reinit(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_ONCE(!q-&gt;mq_freeze_depth);</div><div class='add'>+	WARN_ON_ONCE(!atomic_read(&amp;q-&gt;mq_freeze_depth));</div><div class='ctx'> </div><div class='ctx'> 	blk_mq_sysfs_unregister(q);</div><div class='ctx'> </div><div class='hunk'>@@ -2173,6 +2203,12 @@ static int blk_mq_alloc_rq_maps(struct blk_mq_tag_set *set)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct cpumask *blk_mq_tags_cpumask(struct blk_mq_tags *tags)</div><div class='add'>+{</div><div class='add'>+	return tags-&gt;cpumask;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(blk_mq_tags_cpumask);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Alloc a tag set to be associated with one or more request queues.</div><div class='ctx'>  * May fail with EINVAL for various error conditions. May adjust the</div><div class='hunk'>@@ -2234,8 +2270,10 @@ void blk_mq_free_tag_set(struct blk_mq_tag_set *set)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; set-&gt;nr_hw_queues; i++) {</div><div class='del'>-		if (set-&gt;tags[i])</div><div class='add'>+		if (set-&gt;tags[i]) {</div><div class='ctx'> 			blk_mq_free_rq_map(set, set-&gt;tags[i], i);</div><div class='add'>+			free_cpumask_var(set-&gt;tags[i]-&gt;cpumask);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(set-&gt;tags);</div><div class='head'>diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c<br/>index 2b8fd302f677..6264b382d4d1 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-sysfs.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-sysfs.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-sysfs.c</a></div><div class='hunk'>@@ -6,11 +6,12 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/bio.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/backing-dev.h&gt;</div><div class='ctx'> #include &lt;linux/blktrace_api.h&gt;</div><div class='ctx'> #include &lt;linux/blk-mq.h&gt;</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='del'>-#include "blk-cgroup.h"</div><div class='ctx'> #include "blk-mq.h"</div><div class='ctx'> </div><div class='ctx'> struct queue_sysfs_entry {</div><div class='head'>diff --git a/block/blk-throttle.c b/block/blk-throttle.c<br/>index 5b9c6d5c3636..b23193518ac7 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-throttle.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk-throttle.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-throttle.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk-throttle.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='ctx'> #include &lt;linux/bio.h&gt;</div><div class='ctx'> #include &lt;linux/blktrace_api.h&gt;</div><div class='del'>-#include "blk-cgroup.h"</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> #include "blk.h"</div><div class='ctx'> </div><div class='ctx'> /* Max dispatch from a group in 1 round */</div><div class='head'>diff --git a/block/blk.h b/block/blk.h<br/>index 43b036185712..026d9594142b 100644<br/>--- a/<a href='/drm-misc/tree/block/blk.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/blk.h</a><br/>+++ b/<a href='/drm-misc/tree/block/blk.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/blk.h</a></div><div class='hunk'>@@ -78,7 +78,8 @@ bool bio_attempt_front_merge(struct request_queue *q, struct request *req,</div><div class='ctx'> bool bio_attempt_back_merge(struct request_queue *q, struct request *req,</div><div class='ctx'> 			    struct bio *bio);</div><div class='ctx'> bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,</div><div class='del'>-			    unsigned int *request_count);</div><div class='add'>+			    unsigned int *request_count,</div><div class='add'>+			    struct request **same_queue_rq);</div><div class='ctx'> </div><div class='ctx'> void blk_account_io_start(struct request *req, bool new_io);</div><div class='ctx'> void blk_account_io_completion(struct request *req, unsigned int bytes);</div><div class='hunk'>@@ -193,8 +194,6 @@ int blk_try_merge(struct request *rq, struct bio *bio);</div><div class='ctx'> </div><div class='ctx'> void blk_queue_congestion_threshold(struct request_queue *q);</div><div class='ctx'> </div><div class='del'>-void __blk_run_queue_uncond(struct request_queue *q);</div><div class='del'>-</div><div class='ctx'> int blk_dev_init(void);</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/block/bounce.c b/block/bounce.c<br/>index ed9dd8067120..b17311227c12 100644<br/>--- a/<a href='/drm-misc/tree/block/bounce.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/bounce.c</a><br/>+++ b/<a href='/drm-misc/tree/block/bounce.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/bounce.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/mempool.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/backing-dev.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/hash.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='hunk'>@@ -128,9 +129,6 @@ static void bounce_end_io(struct bio *bio, mempool_t *pool, int err)</div><div class='ctx'> 	struct bio_vec *bvec, *org_vec;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(BIO_EOPNOTSUPP, &amp;bio-&gt;bi_flags))</div><div class='del'>-		set_bit(BIO_EOPNOTSUPP, &amp;bio_orig-&gt;bi_flags);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * free up bounce indirect pages used</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c<br/>index 5da8e6e9ab4b..c62bb2e650b8 100644<br/>--- a/<a href='/drm-misc/tree/block/cfq-iosched.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/cfq-iosched.c</a><br/>+++ b/<a href='/drm-misc/tree/block/cfq-iosched.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/cfq-iosched.c</a></div><div class='hunk'>@@ -14,8 +14,8 @@</div><div class='ctx'> #include &lt;linux/rbtree.h&gt;</div><div class='ctx'> #include &lt;linux/ioprio.h&gt;</div><div class='ctx'> #include &lt;linux/blktrace_api.h&gt;</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> #include "blk.h"</div><div class='del'>-#include "blk-cgroup.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * tunables</div><div class='hunk'>@@ -67,6 +67,11 @@ static struct kmem_cache *cfq_pool;</div><div class='ctx'> #define sample_valid(samples)	((samples) &gt; 80)</div><div class='ctx'> #define rb_entry_cfqg(node)	rb_entry((node), struct cfq_group, rb_node)</div><div class='ctx'> </div><div class='add'>+/* blkio-related constants */</div><div class='add'>+#define CFQ_WEIGHT_MIN          10</div><div class='add'>+#define CFQ_WEIGHT_MAX          1000</div><div class='add'>+#define CFQ_WEIGHT_DEFAULT      500</div><div class='add'>+</div><div class='ctx'> struct cfq_ttime {</div><div class='ctx'> 	unsigned long last_end_request;</div><div class='ctx'> </div><div class='hunk'>@@ -212,6 +217,15 @@ struct cfqg_stats {</div><div class='ctx'> #endif	/* CONFIG_CFQ_GROUP_IOSCHED */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Per-cgroup data */</div><div class='add'>+struct cfq_group_data {</div><div class='add'>+	/* must be the first member */</div><div class='add'>+	struct blkcg_policy_data pd;</div><div class='add'>+</div><div class='add'>+	unsigned int weight;</div><div class='add'>+	unsigned int leaf_weight;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* This is per cgroup per device grouping structure */</div><div class='ctx'> struct cfq_group {</div><div class='ctx'> 	/* must be the first member */</div><div class='hunk'>@@ -446,16 +460,6 @@ CFQ_CFQQ_FNS(deep);</div><div class='ctx'> CFQ_CFQQ_FNS(wait_busy);</div><div class='ctx'> #undef CFQ_CFQQ_FNS</div><div class='ctx'> </div><div class='del'>-static inline struct cfq_group *pd_to_cfqg(struct blkg_policy_data *pd)</div><div class='del'>-{</div><div class='del'>-	return pd ? container_of(pd, struct cfq_group, pd) : NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct blkcg_gq *cfqg_to_blkg(struct cfq_group *cfqg)</div><div class='del'>-{</div><div class='del'>-	return pd_to_blkg(&amp;cfqg-&gt;pd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_CFQ_GROUP_IOSCHED) &amp;&amp; defined(CONFIG_DEBUG_BLK_CGROUP)</div><div class='ctx'> </div><div class='ctx'> /* cfqg stats flags */</div><div class='hunk'>@@ -600,6 +604,22 @@ static inline void cfqg_stats_update_avg_queue_size(struct cfq_group *cfqg) { }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='ctx'> </div><div class='add'>+static inline struct cfq_group *pd_to_cfqg(struct blkg_policy_data *pd)</div><div class='add'>+{</div><div class='add'>+	return pd ? container_of(pd, struct cfq_group, pd) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cfq_group_data</div><div class='add'>+*cpd_to_cfqgd(struct blkcg_policy_data *cpd)</div><div class='add'>+{</div><div class='add'>+	return cpd ? container_of(cpd, struct cfq_group_data, pd) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct blkcg_gq *cfqg_to_blkg(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	return pd_to_blkg(&amp;cfqg-&gt;pd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct blkcg_policy blkcg_policy_cfq;</div><div class='ctx'> </div><div class='ctx'> static inline struct cfq_group *blkg_to_cfqg(struct blkcg_gq *blkg)</div><div class='hunk'>@@ -607,6 +627,11 @@ static inline struct cfq_group *blkg_to_cfqg(struct blkcg_gq *blkg)</div><div class='ctx'> 	return pd_to_cfqg(blkg_to_pd(blkg, &amp;blkcg_policy_cfq));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct cfq_group_data *blkcg_to_cfqgd(struct blkcg *blkcg)</div><div class='add'>+{</div><div class='add'>+	return cpd_to_cfqgd(blkcg_to_cpd(blkcg, &amp;blkcg_policy_cfq));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline struct cfq_group *cfqg_parent(struct cfq_group *cfqg)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg_gq *pblkg = cfqg_to_blkg(cfqg)-&gt;parent;</div><div class='hunk'>@@ -1544,13 +1569,28 @@ static void cfqg_stats_init(struct cfqg_stats *stats)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cfq_cpd_init(const struct blkcg *blkcg)</div><div class='add'>+{</div><div class='add'>+	struct cfq_group_data *cgd =</div><div class='add'>+		cpd_to_cfqgd(blkcg-&gt;pd[blkcg_policy_cfq.plid]);</div><div class='add'>+</div><div class='add'>+	if (blkcg == &amp;blkcg_root) {</div><div class='add'>+		cgd-&gt;weight = 2 * CFQ_WEIGHT_DEFAULT;</div><div class='add'>+		cgd-&gt;leaf_weight = 2 * CFQ_WEIGHT_DEFAULT;</div><div class='add'>+	} else {</div><div class='add'>+		cgd-&gt;weight = CFQ_WEIGHT_DEFAULT;</div><div class='add'>+		cgd-&gt;leaf_weight = CFQ_WEIGHT_DEFAULT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void cfq_pd_init(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfq_group *cfqg = blkg_to_cfqg(blkg);</div><div class='add'>+	struct cfq_group_data *cgd = blkcg_to_cfqgd(blkg-&gt;blkcg);</div><div class='ctx'> </div><div class='ctx'> 	cfq_init_cfqg_base(cfqg);</div><div class='del'>-	cfqg-&gt;weight = blkg-&gt;blkcg-&gt;cfq_weight;</div><div class='del'>-	cfqg-&gt;leaf_weight = blkg-&gt;blkcg-&gt;cfq_leaf_weight;</div><div class='add'>+	cfqg-&gt;weight = cgd-&gt;weight;</div><div class='add'>+	cfqg-&gt;leaf_weight = cgd-&gt;leaf_weight;</div><div class='ctx'> 	cfqg_stats_init(&amp;cfqg-&gt;stats);</div><div class='ctx'> 	cfqg_stats_init(&amp;cfqg-&gt;dead_stats);</div><div class='ctx'> }</div><div class='hunk'>@@ -1673,13 +1713,27 @@ static int cfqg_print_leaf_weight_device(struct seq_file *sf, void *v)</div><div class='ctx'> </div><div class='ctx'> static int cfq_print_weight(struct seq_file *sf, void *v)</div><div class='ctx'> {</div><div class='del'>-	seq_printf(sf, "%u\n", css_to_blkcg(seq_css(sf))-&gt;cfq_weight);</div><div class='add'>+	struct blkcg *blkcg = css_to_blkcg(seq_css(sf));</div><div class='add'>+	struct cfq_group_data *cgd = blkcg_to_cfqgd(blkcg);</div><div class='add'>+	unsigned int val = 0;</div><div class='add'>+</div><div class='add'>+	if (cgd)</div><div class='add'>+		val = cgd-&gt;weight;</div><div class='add'>+</div><div class='add'>+	seq_printf(sf, "%u\n", val);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cfq_print_leaf_weight(struct seq_file *sf, void *v)</div><div class='ctx'> {</div><div class='del'>-	seq_printf(sf, "%u\n", css_to_blkcg(seq_css(sf))-&gt;cfq_leaf_weight);</div><div class='add'>+	struct blkcg *blkcg = css_to_blkcg(seq_css(sf));</div><div class='add'>+	struct cfq_group_data *cgd = blkcg_to_cfqgd(blkcg);</div><div class='add'>+	unsigned int val = 0;</div><div class='add'>+</div><div class='add'>+	if (cgd)</div><div class='add'>+		val = cgd-&gt;leaf_weight;</div><div class='add'>+</div><div class='add'>+	seq_printf(sf, "%u\n", val);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1690,6 +1744,7 @@ static ssize_t __cfqg_set_weight_device(struct kernfs_open_file *of,</div><div class='ctx'> 	struct blkcg *blkcg = css_to_blkcg(of_css(of));</div><div class='ctx'> 	struct blkg_conf_ctx ctx;</div><div class='ctx'> 	struct cfq_group *cfqg;</div><div class='add'>+	struct cfq_group_data *cfqgd;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = blkg_conf_prep(blkcg, &amp;blkcg_policy_cfq, buf, &amp;ctx);</div><div class='hunk'>@@ -1698,17 +1753,22 @@ static ssize_t __cfqg_set_weight_device(struct kernfs_open_file *of,</div><div class='ctx'> </div><div class='ctx'> 	ret = -EINVAL;</div><div class='ctx'> 	cfqg = blkg_to_cfqg(ctx.blkg);</div><div class='add'>+	cfqgd = blkcg_to_cfqgd(blkcg);</div><div class='add'>+	if (!cfqg || !cfqgd)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='ctx'> 	if (!ctx.v || (ctx.v &gt;= CFQ_WEIGHT_MIN &amp;&amp; ctx.v &lt;= CFQ_WEIGHT_MAX)) {</div><div class='ctx'> 		if (!is_leaf_weight) {</div><div class='ctx'> 			cfqg-&gt;dev_weight = ctx.v;</div><div class='del'>-			cfqg-&gt;new_weight = ctx.v ?: blkcg-&gt;cfq_weight;</div><div class='add'>+			cfqg-&gt;new_weight = ctx.v ?: cfqgd-&gt;weight;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			cfqg-&gt;dev_leaf_weight = ctx.v;</div><div class='del'>-			cfqg-&gt;new_leaf_weight = ctx.v ?: blkcg-&gt;cfq_leaf_weight;</div><div class='add'>+			cfqg-&gt;new_leaf_weight = ctx.v ?: cfqgd-&gt;leaf_weight;</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+err:</div><div class='ctx'> 	blkg_conf_finish(&amp;ctx);</div><div class='ctx'> 	return ret ?: nbytes;</div><div class='ctx'> }</div><div class='hunk'>@@ -1730,16 +1790,23 @@ static int __cfq_set_weight(struct cgroup_subsys_state *css, struct cftype *cft,</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg *blkcg = css_to_blkcg(css);</div><div class='ctx'> 	struct blkcg_gq *blkg;</div><div class='add'>+	struct cfq_group_data *cfqgd;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (val &lt; CFQ_WEIGHT_MIN || val &gt; CFQ_WEIGHT_MAX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	cfqgd = blkcg_to_cfqgd(blkcg);</div><div class='add'>+	if (!cfqgd) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!is_leaf_weight)</div><div class='del'>-		blkcg-&gt;cfq_weight = val;</div><div class='add'>+		cfqgd-&gt;weight = val;</div><div class='ctx'> 	else</div><div class='del'>-		blkcg-&gt;cfq_leaf_weight = val;</div><div class='add'>+		cfqgd-&gt;leaf_weight = val;</div><div class='ctx'> </div><div class='ctx'> 	hlist_for_each_entry(blkg, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='ctx'> 		struct cfq_group *cfqg = blkg_to_cfqg(blkg);</div><div class='hunk'>@@ -1749,15 +1816,16 @@ static int __cfq_set_weight(struct cgroup_subsys_state *css, struct cftype *cft,</div><div class='ctx'> </div><div class='ctx'> 		if (!is_leaf_weight) {</div><div class='ctx'> 			if (!cfqg-&gt;dev_weight)</div><div class='del'>-				cfqg-&gt;new_weight = blkcg-&gt;cfq_weight;</div><div class='add'>+				cfqg-&gt;new_weight = cfqgd-&gt;weight;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (!cfqg-&gt;dev_leaf_weight)</div><div class='del'>-				cfqg-&gt;new_leaf_weight = blkcg-&gt;cfq_leaf_weight;</div><div class='add'>+				cfqg-&gt;new_leaf_weight = cfqgd-&gt;leaf_weight;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cfq_set_weight(struct cgroup_subsys_state *css, struct cftype *cft,</div><div class='hunk'>@@ -4477,6 +4545,18 @@ out_free:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cfq_registered_queue(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct elevator_queue *e = q-&gt;elevator;</div><div class='add'>+	struct cfq_data *cfqd = e-&gt;elevator_data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Default to IOPS mode with no idling for SSDs</div><div class='add'>+	 */</div><div class='add'>+	if (blk_queue_nonrot(q))</div><div class='add'>+		cfqd-&gt;cfq_slice_idle = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * sysfs parts below --&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -4592,6 +4672,7 @@ static struct elevator_type iosched_cfq = {</div><div class='ctx'> 		.elevator_may_queue_fn =	cfq_may_queue,</div><div class='ctx'> 		.elevator_init_fn =		cfq_init_queue,</div><div class='ctx'> 		.elevator_exit_fn =		cfq_exit_queue,</div><div class='add'>+		.elevator_registered_fn =	cfq_registered_queue,</div><div class='ctx'> 	},</div><div class='ctx'> 	.icq_size	=	sizeof(struct cfq_io_cq),</div><div class='ctx'> 	.icq_align	=	__alignof__(struct cfq_io_cq),</div><div class='hunk'>@@ -4603,8 +4684,10 @@ static struct elevator_type iosched_cfq = {</div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='ctx'> static struct blkcg_policy blkcg_policy_cfq = {</div><div class='ctx'> 	.pd_size		= sizeof(struct cfq_group),</div><div class='add'>+	.cpd_size		= sizeof(struct cfq_group_data),</div><div class='ctx'> 	.cftypes		= cfq_blkcg_files,</div><div class='ctx'> </div><div class='add'>+	.cpd_init_fn		= cfq_cpd_init,</div><div class='ctx'> 	.pd_init_fn		= cfq_pd_init,</div><div class='ctx'> 	.pd_offline_fn		= cfq_pd_offline,</div><div class='ctx'> 	.pd_reset_stats_fn	= cfq_pd_reset_stats,</div><div class='head'>diff --git a/block/elevator.c b/block/elevator.c<br/>index 8985038f398c..84d63943f2de 100644<br/>--- a/<a href='/drm-misc/tree/block/elevator.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/elevator.c</a><br/>+++ b/<a href='/drm-misc/tree/block/elevator.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/elevator.c</a></div><div class='hunk'>@@ -35,11 +35,11 @@</div><div class='ctx'> #include &lt;linux/hash.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;trace/events/block.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='del'>-#include "blk-cgroup.h"</div><div class='ctx'> </div><div class='ctx'> static DEFINE_SPINLOCK(elv_list_lock);</div><div class='ctx'> static LIST_HEAD(elv_list);</div><div class='hunk'>@@ -806,6 +806,8 @@ int elv_register_queue(struct request_queue *q)</div><div class='ctx'> 		}</div><div class='ctx'> 		kobject_uevent(&amp;e-&gt;kobj, KOBJ_ADD);</div><div class='ctx'> 		e-&gt;registered = 1;</div><div class='add'>+		if (e-&gt;type-&gt;ops.elevator_registered_fn)</div><div class='add'>+			e-&gt;type-&gt;ops.elevator_registered_fn(q);</div><div class='ctx'> 	}</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='head'>diff --git a/block/genhd.c b/block/genhd.c<br/>index ea982eadaf63..59a1395eedac 100644<br/>--- a/<a href='/drm-misc/tree/block/genhd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/genhd.c</a><br/>+++ b/<a href='/drm-misc/tree/block/genhd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/genhd.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/kdev_t.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/backing-dev.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='head'>diff --git a/block/ioctl.c b/block/ioctl.c<br/>index 7d8befde2aca..8061eba42887 100644<br/>--- a/<a href='/drm-misc/tree/block/ioctl.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/block/ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/ioctl.c</a></div><div class='hunk'>@@ -150,21 +150,48 @@ static int blkpg_ioctl(struct block_device *bdev, struct blkpg_ioctl_arg __user</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int blkdev_reread_part(struct block_device *bdev)</div><div class='add'>+/*</div><div class='add'>+ * This is an exported API for the block driver, and will not</div><div class='add'>+ * acquire bd_mutex. This API should be used in case that</div><div class='add'>+ * caller has held bd_mutex already.</div><div class='add'>+ */</div><div class='add'>+int __blkdev_reread_part(struct block_device *bdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gendisk *disk = bdev-&gt;bd_disk;</div><div class='del'>-	int res;</div><div class='ctx'> </div><div class='ctx'> 	if (!disk_part_scan_enabled(disk) || bdev != bdev-&gt;bd_contains)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (!capable(CAP_SYS_ADMIN))</div><div class='ctx'> 		return -EACCES;</div><div class='del'>-	if (!mutex_trylock(&amp;bdev-&gt;bd_mutex))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	res = rescan_partitions(disk, bdev);</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;bdev-&gt;bd_mutex);</div><div class='add'>+</div><div class='add'>+	return rescan_partitions(disk, bdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__blkdev_reread_part);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is an exported API for the block driver, and will</div><div class='add'>+ * try to acquire bd_mutex. If bd_mutex has been held already</div><div class='add'>+ * in current context, please call __blkdev_reread_part().</div><div class='add'>+ *</div><div class='add'>+ * Make sure the held locks in current context aren't required</div><div class='add'>+ * in open()/close() handler and I/O path for avoiding ABBA deadlock:</div><div class='add'>+ * - bd_mutex is held before calling block driver's open/close</div><div class='add'>+ *   handler</div><div class='add'>+ * - reading partition table may submit I/O to the block device</div><div class='add'>+ */</div><div class='add'>+int blkdev_reread_part(struct block_device *bdev)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bdev-&gt;bd_mutex);</div><div class='add'>+	res = __blkdev_reread_part(bdev);</div><div class='ctx'> 	mutex_unlock(&amp;bdev-&gt;bd_mutex);</div><div class='add'>+</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(blkdev_reread_part);</div><div class='ctx'> </div><div class='ctx'> static int blk_ioctl_discard(struct block_device *bdev, uint64_t start,</div><div class='ctx'> 			     uint64_t len, int secure)</div><div class='head'>diff --git a/block/scsi_ioctl.c b/block/scsi_ioctl.c<br/>index 55b6f15dac90..dda653ce7b24 100644<br/>--- a/<a href='/drm-misc/tree/block/scsi_ioctl.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>block/scsi_ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/block/scsi_ioctl.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>block/scsi_ioctl.c</a></div><div class='hunk'>@@ -326,8 +326,8 @@ static int sg_io(struct request_queue *q, struct gendisk *bd_disk,</div><div class='ctx'> 			goto out_put_request;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = -EFAULT;</div><div class='del'>-	if (blk_fill_sghdr_rq(q, rq, hdr, mode))</div><div class='add'>+	ret = blk_fill_sghdr_rq(q, rq, hdr, mode);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto out_free_cdb;</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='head'>diff --git a/crypto/.gitignore b/crypto/.gitignore<br/>new file mode 100644<br/>index 000000000000..ee328374dba8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/.gitignore?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+*-asn1.[ch]</div><div class='head'>diff --git a/crypto/842.c b/crypto/842.c<br/>index b48f4f108c47..98e387efb8c8 100644<br/>--- a/<a href='/drm-misc/tree/crypto/842.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/842.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/842.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/842.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Cryptographic API for the 842 compression algorithm.</div><div class='add'>+ * Cryptographic API for the 842 software compression algorithm.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -11,173 +11,73 @@</div><div class='ctx'>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='add'>+ * Copyright (C) IBM Corporation, 2011-2015</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) IBM Corporation, 2011</div><div class='add'>+ * Original Authors: Robert Jennings &lt;rcj@linux.vnet.ibm.com&gt;</div><div class='add'>+ *                   Seth Jennings &lt;sjenning@linux.vnet.ibm.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * Authors: Robert Jennings &lt;rcj@linux.vnet.ibm.com&gt;</div><div class='del'>- *          Seth Jennings &lt;sjenning@linux.vnet.ibm.com&gt;</div><div class='add'>+ * Rewrite: Dan Streetman &lt;ddstreet@ieee.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This is the software implementation of compression and decompression using</div><div class='add'>+ * the 842 format.  This uses the software 842 library at lib/842/ which is</div><div class='add'>+ * only a reference implementation, and is very, very slow as compared to other</div><div class='add'>+ * software compressors.  You probably do not want to use this software</div><div class='add'>+ * compression.  If you have access to the PowerPC 842 compression hardware, you</div><div class='add'>+ * want to use the 842 hardware compression interface, which is at:</div><div class='add'>+ * drivers/crypto/nx/nx-842-crypto.c</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/nx842.h&gt;</div><div class='del'>-#include &lt;linux/lzo.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-</div><div class='del'>-static int nx842_uselzo;</div><div class='del'>-</div><div class='del'>-struct nx842_ctx {</div><div class='del'>-	void *nx842_wmem; /* working memory for 842/lzo */</div><div class='del'>-};</div><div class='add'>+#include &lt;linux/sw842.h&gt;</div><div class='ctx'> </div><div class='del'>-enum nx842_crypto_type {</div><div class='del'>-	NX842_CRYPTO_TYPE_842,</div><div class='del'>-	NX842_CRYPTO_TYPE_LZO</div><div class='add'>+struct crypto842_ctx {</div><div class='add'>+	char wmem[SW842_MEM_COMPRESS];	/* working memory for compress */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define NX842_SENTINEL 0xdeadbeef</div><div class='del'>-</div><div class='del'>-struct nx842_crypto_header {</div><div class='del'>-	unsigned int sentinel; /* debug */</div><div class='del'>-	enum nx842_crypto_type type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int nx842_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct nx842_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-	int wmemsize;</div><div class='del'>-</div><div class='del'>-	wmemsize = max_t(int, nx842_get_workmem_size(), LZO1X_MEM_COMPRESS);</div><div class='del'>-	ctx-&gt;nx842_wmem = kmalloc(wmemsize, GFP_NOFS);</div><div class='del'>-	if (!ctx-&gt;nx842_wmem)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void nx842_exit(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct nx842_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	kfree(ctx-&gt;nx842_wmem);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void nx842_reset_uselzo(unsigned long data)</div><div class='add'>+static int crypto842_compress(struct crypto_tfm *tfm,</div><div class='add'>+			      const u8 *src, unsigned int slen,</div><div class='add'>+			      u8 *dst, unsigned int *dlen)</div><div class='ctx'> {</div><div class='del'>-	nx842_uselzo = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEFINE_TIMER(failover_timer, nx842_reset_uselzo, 0, 0);</div><div class='del'>-</div><div class='del'>-static int nx842_crypto_compress(struct crypto_tfm *tfm, const u8 *src,</div><div class='del'>-			    unsigned int slen, u8 *dst, unsigned int *dlen)</div><div class='del'>-{</div><div class='del'>-	struct nx842_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-	struct nx842_crypto_header *hdr;</div><div class='del'>-	unsigned int tmp_len = *dlen;</div><div class='del'>-	size_t lzodlen; /* needed for lzo */</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	*dlen = 0;</div><div class='del'>-	hdr = (struct nx842_crypto_header *)dst;</div><div class='del'>-	hdr-&gt;sentinel = NX842_SENTINEL; /* debug */</div><div class='del'>-	dst += sizeof(struct nx842_crypto_header);</div><div class='del'>-	tmp_len -= sizeof(struct nx842_crypto_header);</div><div class='del'>-	lzodlen = tmp_len;</div><div class='del'>-</div><div class='del'>-	if (likely(!nx842_uselzo)) {</div><div class='del'>-		err = nx842_compress(src, slen, dst, &amp;tmp_len, ctx-&gt;nx842_wmem);</div><div class='del'>-</div><div class='del'>-		if (likely(!err)) {</div><div class='del'>-			hdr-&gt;type = NX842_CRYPTO_TYPE_842;</div><div class='del'>-			*dlen = tmp_len + sizeof(struct nx842_crypto_header);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* hardware failed */</div><div class='del'>-		nx842_uselzo = 1;</div><div class='add'>+	struct crypto842_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-		/* set timer to check for hardware again in 1 second */</div><div class='del'>-		mod_timer(&amp;failover_timer, jiffies + msecs_to_jiffies(1000));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* no hardware, use lzo */</div><div class='del'>-	err = lzo1x_1_compress(src, slen, dst, &amp;lzodlen, ctx-&gt;nx842_wmem);</div><div class='del'>-	if (err != LZO_E_OK)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	hdr-&gt;type = NX842_CRYPTO_TYPE_LZO;</div><div class='del'>-	*dlen = lzodlen + sizeof(struct nx842_crypto_header);</div><div class='del'>-	return 0;</div><div class='add'>+	return sw842_compress(src, slen, dst, dlen, ctx-&gt;wmem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx842_crypto_decompress(struct crypto_tfm *tfm, const u8 *src,</div><div class='del'>-			      unsigned int slen, u8 *dst, unsigned int *dlen)</div><div class='add'>+static int crypto842_decompress(struct crypto_tfm *tfm,</div><div class='add'>+				const u8 *src, unsigned int slen,</div><div class='add'>+				u8 *dst, unsigned int *dlen)</div><div class='ctx'> {</div><div class='del'>-	struct nx842_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-	struct nx842_crypto_header *hdr;</div><div class='del'>-	unsigned int tmp_len = *dlen;</div><div class='del'>-	size_t lzodlen; /* needed for lzo */</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	*dlen = 0;</div><div class='del'>-	hdr = (struct nx842_crypto_header *)src;</div><div class='del'>-</div><div class='del'>-	if (unlikely(hdr-&gt;sentinel != NX842_SENTINEL))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	src += sizeof(struct nx842_crypto_header);</div><div class='del'>-	slen -= sizeof(struct nx842_crypto_header);</div><div class='del'>-</div><div class='del'>-	if (likely(hdr-&gt;type == NX842_CRYPTO_TYPE_842)) {</div><div class='del'>-		err = nx842_decompress(src, slen, dst, &amp;tmp_len,</div><div class='del'>-			ctx-&gt;nx842_wmem);</div><div class='del'>-		if (err)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		*dlen = tmp_len;</div><div class='del'>-	} else if (hdr-&gt;type == NX842_CRYPTO_TYPE_LZO) {</div><div class='del'>-		lzodlen = tmp_len;</div><div class='del'>-		err = lzo1x_decompress_safe(src, slen, dst, &amp;lzodlen);</div><div class='del'>-		if (err != LZO_E_OK)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		*dlen = lzodlen;</div><div class='del'>-	} else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sw842_decompress(src, slen, dst, dlen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_alg alg = {</div><div class='ctx'> 	.cra_name		= "842",</div><div class='add'>+	.cra_driver_name	= "842-generic",</div><div class='add'>+	.cra_priority		= 100,</div><div class='ctx'> 	.cra_flags		= CRYPTO_ALG_TYPE_COMPRESS,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct nx842_ctx),</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto842_ctx),</div><div class='ctx'> 	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_init		= nx842_init,</div><div class='del'>-	.cra_exit		= nx842_exit,</div><div class='ctx'> 	.cra_u			= { .compress = {</div><div class='del'>-	.coa_compress		= nx842_crypto_compress,</div><div class='del'>-	.coa_decompress		= nx842_crypto_decompress } }</div><div class='add'>+	.coa_compress		= crypto842_compress,</div><div class='add'>+	.coa_decompress		= crypto842_decompress } }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init nx842_mod_init(void)</div><div class='add'>+static int __init crypto842_mod_init(void)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;failover_timer);</div><div class='ctx'> 	return crypto_register_alg(&amp;alg);</div><div class='ctx'> }</div><div class='add'>+module_init(crypto842_mod_init);</div><div class='ctx'> </div><div class='del'>-static void __exit nx842_mod_exit(void)</div><div class='add'>+static void __exit crypto842_mod_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	crypto_unregister_alg(&amp;alg);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(nx842_mod_init);</div><div class='del'>-module_exit(nx842_mod_exit);</div><div class='add'>+module_exit(crypto842_mod_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("842 Compression Algorithm");</div><div class='add'>+MODULE_DESCRIPTION("842 Software Compression Algorithm");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("842");</div><div class='add'>+MODULE_ALIAS_CRYPTO("842-generic");</div><div class='add'>+MODULE_AUTHOR("Dan Streetman &lt;ddstreet@ieee.org&gt;");</div><div class='head'>diff --git a/crypto/Kconfig b/crypto/Kconfig<br/>index 362905e7c841..b4cfc5754033 100644<br/>--- a/<a href='/drm-misc/tree/crypto/Kconfig?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/crypto/Kconfig?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/Kconfig</a></div><div class='hunk'>@@ -78,6 +78,10 @@ config CRYPTO_RNG2</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select CRYPTO_ALGAPI2</div><div class='ctx'> </div><div class='add'>+config CRYPTO_RNG_DEFAULT</div><div class='add'>+	tristate</div><div class='add'>+	select CRYPTO_DRBG_MENU</div><div class='add'>+</div><div class='ctx'> config CRYPTO_PCOMP</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select CRYPTO_PCOMP2</div><div class='hunk'>@@ -87,6 +91,23 @@ config CRYPTO_PCOMP2</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select CRYPTO_ALGAPI2</div><div class='ctx'> </div><div class='add'>+config CRYPTO_AKCIPHER2</div><div class='add'>+	tristate</div><div class='add'>+	select CRYPTO_ALGAPI2</div><div class='add'>+</div><div class='add'>+config CRYPTO_AKCIPHER</div><div class='add'>+	tristate</div><div class='add'>+	select CRYPTO_AKCIPHER2</div><div class='add'>+	select CRYPTO_ALGAPI</div><div class='add'>+</div><div class='add'>+config CRYPTO_RSA</div><div class='add'>+	tristate "RSA algorithm"</div><div class='add'>+	select CRYPTO_AKCIPHER</div><div class='add'>+	select MPILIB</div><div class='add'>+	select ASN1</div><div class='add'>+	help</div><div class='add'>+	  Generic implementation of the RSA public key algorithm.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_MANAGER</div><div class='ctx'> 	tristate "Cryptographic algorithm manager"</div><div class='ctx'> 	select CRYPTO_MANAGER2</div><div class='hunk'>@@ -100,6 +121,7 @@ config CRYPTO_MANAGER2</div><div class='ctx'> 	select CRYPTO_HASH2</div><div class='ctx'> 	select CRYPTO_BLKCIPHER2</div><div class='ctx'> 	select CRYPTO_PCOMP2</div><div class='add'>+	select CRYPTO_AKCIPHER2</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_USER</div><div class='ctx'> 	tristate "Userspace cryptographic algorithm configuration"</div><div class='hunk'>@@ -217,15 +239,39 @@ config CRYPTO_GCM</div><div class='ctx'> 	  Support for Galois/Counter Mode (GCM) and Galois Message</div><div class='ctx'> 	  Authentication Code (GMAC). Required for IPSec.</div><div class='ctx'> </div><div class='add'>+config CRYPTO_CHACHA20POLY1305</div><div class='add'>+	tristate "ChaCha20-Poly1305 AEAD support"</div><div class='add'>+	select CRYPTO_CHACHA20</div><div class='add'>+	select CRYPTO_POLY1305</div><div class='add'>+	select CRYPTO_AEAD</div><div class='add'>+	help</div><div class='add'>+	  ChaCha20-Poly1305 AEAD support, RFC7539.</div><div class='add'>+</div><div class='add'>+	  Support for the AEAD wrapper using the ChaCha20 stream cipher combined</div><div class='add'>+	  with the Poly1305 authenticator. It is defined in RFC7539 for use in</div><div class='add'>+	  IETF protocols.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_SEQIV</div><div class='ctx'> 	tristate "Sequence Number IV Generator"</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='ctx'> 	select CRYPTO_BLKCIPHER</div><div class='del'>-	select CRYPTO_RNG</div><div class='add'>+	select CRYPTO_NULL</div><div class='add'>+	select CRYPTO_RNG_DEFAULT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This IV generator generates an IV based on a sequence number by</div><div class='ctx'> 	  xoring it with a salt.  This algorithm is mainly useful for CTR</div><div class='ctx'> </div><div class='add'>+config CRYPTO_ECHAINIV</div><div class='add'>+	tristate "Encrypted Chain IV Generator"</div><div class='add'>+	select CRYPTO_AEAD</div><div class='add'>+	select CRYPTO_NULL</div><div class='add'>+	select CRYPTO_RNG_DEFAULT</div><div class='add'>+	default m</div><div class='add'>+	help</div><div class='add'>+	  This IV generator generates an IV based on the encryption of</div><div class='add'>+	  a sequence number xored with a salt.  This is the default</div><div class='add'>+	  algorithm for CBC.</div><div class='add'>+</div><div class='ctx'> comment "Block modes"</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CBC</div><div class='hunk'>@@ -415,6 +461,15 @@ config CRYPTO_GHASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  GHASH is message digest algorithm for GCM (Galois/Counter Mode).</div><div class='ctx'> </div><div class='add'>+config CRYPTO_POLY1305</div><div class='add'>+	tristate "Poly1305 authenticator algorithm"</div><div class='add'>+	help</div><div class='add'>+	  Poly1305 authenticator algorithm, RFC7539.</div><div class='add'>+</div><div class='add'>+	  Poly1305 is an authenticator algorithm designed by Daniel J. Bernstein.</div><div class='add'>+	  It is used for the ChaCha20-Poly1305 AEAD, specified in RFC7539 for use</div><div class='add'>+	  in IETF protocols. This is the portable C implementation of Poly1305.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_MD4</div><div class='ctx'> 	tristate "MD4 digest algorithm"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='hunk'>@@ -1145,6 +1200,19 @@ config CRYPTO_SALSA20_X86_64</div><div class='ctx'> 	  The Salsa20 stream cipher algorithm is designed by Daniel J.</div><div class='ctx'> 	  Bernstein &lt;djb@cr.yp.to&gt;. See &lt;http://cr.yp.to/snuffle.html&gt;</div><div class='ctx'> </div><div class='add'>+config CRYPTO_CHACHA20</div><div class='add'>+	tristate "ChaCha20 cipher algorithm"</div><div class='add'>+	select CRYPTO_BLKCIPHER</div><div class='add'>+	help</div><div class='add'>+	  ChaCha20 cipher algorithm, RFC7539.</div><div class='add'>+</div><div class='add'>+	  ChaCha20 is a 256-bit high-speed stream cipher designed by Daniel J.</div><div class='add'>+	  Bernstein and further specified in RFC7539 for use in IETF protocols.</div><div class='add'>+	  This is the portable C implementation of ChaCha20.</div><div class='add'>+</div><div class='add'>+	  See also:</div><div class='add'>+	  &lt;http://cr.yp.to/chacha/chacha-20080128.pdf&gt;</div><div class='add'>+</div><div class='ctx'> config CRYPTO_SEED</div><div class='ctx'> 	tristate "SEED cipher algorithm"</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='hunk'>@@ -1412,10 +1480,9 @@ config CRYPTO_LZO</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_842</div><div class='ctx'> 	tristate "842 compression algorithm"</div><div class='del'>-	depends on CRYPTO_DEV_NX_COMPRESS</div><div class='del'>-	# 842 uses lzo if the hardware becomes unavailable</div><div class='del'>-	select LZO_COMPRESS</div><div class='del'>-	select LZO_DECOMPRESS</div><div class='add'>+	select CRYPTO_ALGAPI</div><div class='add'>+	select 842_COMPRESS</div><div class='add'>+	select 842_DECOMPRESS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is the 842 algorithm.</div><div class='ctx'> </div><div class='hunk'>@@ -1439,7 +1506,6 @@ comment "Random Number Generation"</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_ANSI_CPRNG</div><div class='ctx'> 	tristate "Pseudo Random Number Generation for Cryptographic modules"</div><div class='del'>-	default m</div><div class='ctx'> 	select CRYPTO_AES</div><div class='ctx'> 	select CRYPTO_RNG</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1457,15 +1523,14 @@ menuconfig CRYPTO_DRBG_MENU</div><div class='ctx'> if CRYPTO_DRBG_MENU</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DRBG_HMAC</div><div class='del'>-	bool "Enable HMAC DRBG"</div><div class='add'>+	bool</div><div class='ctx'> 	default y</div><div class='ctx'> 	select CRYPTO_HMAC</div><div class='del'>-	help</div><div class='del'>-	  Enable the HMAC DRBG variant as defined in NIST SP800-90A.</div><div class='add'>+	select CRYPTO_SHA256</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DRBG_HASH</div><div class='ctx'> 	bool "Enable Hash DRBG"</div><div class='del'>-	select CRYPTO_HASH</div><div class='add'>+	select CRYPTO_SHA256</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable the Hash DRBG variant as defined in NIST SP800-90A.</div><div class='ctx'> </div><div class='hunk'>@@ -1477,11 +1542,21 @@ config CRYPTO_DRBG_CTR</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DRBG</div><div class='ctx'> 	tristate</div><div class='del'>-	default CRYPTO_DRBG_MENU if (CRYPTO_DRBG_HMAC || CRYPTO_DRBG_HASH || CRYPTO_DRBG_CTR)</div><div class='add'>+	default CRYPTO_DRBG_MENU</div><div class='ctx'> 	select CRYPTO_RNG</div><div class='add'>+	select CRYPTO_JITTERENTROPY</div><div class='ctx'> </div><div class='ctx'> endif	# if CRYPTO_DRBG_MENU</div><div class='ctx'> </div><div class='add'>+config CRYPTO_JITTERENTROPY</div><div class='add'>+	tristate "Jitterentropy Non-Deterministic Random Number Generator"</div><div class='add'>+	help</div><div class='add'>+	  The Jitterentropy RNG is a noise that is intended</div><div class='add'>+	  to provide seed to another RNG. The RNG does not</div><div class='add'>+	  perform any cryptographic whitening of the generated</div><div class='add'>+	  random numbers. This Jitterentropy RNG registers with</div><div class='add'>+	  the kernel crypto API and can be used by any caller.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_USER_API</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='hunk'>@@ -1512,6 +1587,15 @@ config CRYPTO_USER_API_RNG</div><div class='ctx'> 	  This option enables the user-spaces interface for random</div><div class='ctx'> 	  number generator algorithms.</div><div class='ctx'> </div><div class='add'>+config CRYPTO_USER_API_AEAD</div><div class='add'>+	tristate "User-space interface for AEAD cipher algorithms"</div><div class='add'>+	depends on NET</div><div class='add'>+	select CRYPTO_AEAD</div><div class='add'>+	select CRYPTO_USER_API</div><div class='add'>+	help</div><div class='add'>+	  This option enables the user-spaces interface for AEAD</div><div class='add'>+	  cipher algorithms.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_HASH_INFO</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/Makefile b/crypto/Makefile<br/>index 97b7d3ac87e7..a16a7e7f2d60 100644<br/>--- a/<a href='/drm-misc/tree/crypto/Makefile?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/crypto/Makefile?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/Makefile</a></div><div class='hunk'>@@ -21,12 +21,22 @@ obj-$(CONFIG_CRYPTO_BLKCIPHER2) += crypto_blkcipher.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_BLKCIPHER2) += chainiv.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_BLKCIPHER2) += eseqiv.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_ECHAINIV) += echainiv.o</div><div class='ctx'> </div><div class='ctx'> crypto_hash-y += ahash.o</div><div class='ctx'> crypto_hash-y += shash.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_HASH2) += crypto_hash.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_PCOMP2) += pcompress.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_AKCIPHER2) += akcipher.o</div><div class='add'>+</div><div class='add'>+$(obj)/rsakey-asn1.o: $(obj)/rsakey-asn1.c $(obj)/rsakey-asn1.h</div><div class='add'>+clean-files += rsakey-asn1.c rsakey-asn1.h</div><div class='add'>+</div><div class='add'>+rsa_generic-y := rsakey-asn1.o</div><div class='add'>+rsa_generic-y += rsa.o</div><div class='add'>+rsa_generic-y += rsa_helper.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_RSA) += rsa_generic.o</div><div class='ctx'> </div><div class='ctx'> cryptomgr-y := algboss.o testmgr.o</div><div class='ctx'> </div><div class='hunk'>@@ -58,6 +68,7 @@ obj-$(CONFIG_CRYPTO_XTS) += xts.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CTR) += ctr.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GCM) += gcm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CCM) += ccm.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20POLY1305) += chacha20poly1305.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_PCRYPT) += pcrypt.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CRYPTD) += cryptd.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MCRYPTD) += mcryptd.o</div><div class='hunk'>@@ -79,6 +90,8 @@ obj-$(CONFIG_CRYPTO_KHAZAD) += khazad.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ANUBIS) += anubis.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SEED) += seed.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SALSA20) += salsa20_generic.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20) += chacha20_generic.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305) += poly1305_generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEFLATE) += deflate.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ZLIB) += zlib.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MICHAEL_MIC) += michael_mic.o</div><div class='hunk'>@@ -91,9 +104,11 @@ obj-$(CONFIG_CRYPTO_LZ4) += lz4.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_LZ4HC) += lz4hc.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_842) += 842.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_RNG2) += rng.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_RNG2) += krng.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ANSI_CPRNG) += ansi_cprng.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DRBG) += drbg.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_JITTERENTROPY) += jitterentropy_rng.o</div><div class='add'>+CFLAGS_jitterentropy.o = -O0</div><div class='add'>+jitterentropy_rng-y := jitterentropy.o jitterentropy-kcapi.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH) += ghash-generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_USER_API) += af_alg.o</div><div class='head'>diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c<br/>index db201bca1581..b788f169cc98 100644<br/>--- a/<a href='/drm-misc/tree/crypto/ablkcipher.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/ablkcipher.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/ablkcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ablkcipher.c</a></div><div class='hunk'>@@ -454,7 +454,7 @@ static int crypto_init_givcipher_ops(struct crypto_tfm *tfm, u32 type,</div><div class='ctx'> 		      alg-&gt;setkey : setkey;</div><div class='ctx'> 	crt-&gt;encrypt = alg-&gt;encrypt;</div><div class='ctx'> 	crt-&gt;decrypt = alg-&gt;decrypt;</div><div class='del'>-	crt-&gt;givencrypt = alg-&gt;givencrypt;</div><div class='add'>+	crt-&gt;givencrypt = alg-&gt;givencrypt ?: no_givdecrypt;</div><div class='ctx'> 	crt-&gt;givdecrypt = alg-&gt;givdecrypt ?: no_givdecrypt;</div><div class='ctx'> 	crt-&gt;base = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	crt-&gt;ivsize = alg-&gt;ivsize;</div><div class='hunk'>@@ -586,6 +586,13 @@ static int crypto_givcipher_default(struct crypto_alg *alg, u32 type, u32 mask)</div><div class='ctx'> 	if (!tmpl)</div><div class='ctx'> 		goto kill_larval;</div><div class='ctx'> </div><div class='add'>+	if (tmpl-&gt;create) {</div><div class='add'>+		err = tmpl-&gt;create(tmpl, tb);</div><div class='add'>+		if (err)</div><div class='add'>+			goto put_tmpl;</div><div class='add'>+		goto ok;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	inst = tmpl-&gt;alloc(tb);</div><div class='ctx'> 	err = PTR_ERR(inst);</div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='hunk'>@@ -597,6 +604,7 @@ static int crypto_givcipher_default(struct crypto_alg *alg, u32 type, u32 mask)</div><div class='ctx'> 		goto put_tmpl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+ok:</div><div class='ctx'> 	/* Redo the lookup to use the instance we just registered. */</div><div class='ctx'> 	err = -EAGAIN;</div><div class='ctx'> </div><div class='hunk'>@@ -636,7 +644,7 @@ struct crypto_alg *crypto_lookup_skcipher(const char *name, u32 type, u32 mask)</div><div class='ctx'> </div><div class='ctx'> 	if ((alg-&gt;cra_flags &amp; CRYPTO_ALG_TYPE_MASK) ==</div><div class='ctx'> 	    CRYPTO_ALG_TYPE_GIVCIPHER) {</div><div class='del'>-		if ((alg-&gt;cra_flags ^ type ^ ~mask) &amp; CRYPTO_ALG_TESTED) {</div><div class='add'>+		if (~alg-&gt;cra_flags &amp; (type ^ ~mask) &amp; CRYPTO_ALG_TESTED) {</div><div class='ctx'> 			crypto_mod_put(alg);</div><div class='ctx'> 			alg = ERR_PTR(-ENOENT);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/crypto/aead.c b/crypto/aead.c<br/>index 222271070b49..07bf99773548 100644<br/>--- a/<a href='/drm-misc/tree/crypto/aead.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/aead.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/aead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/aead.c</a></div><div class='hunk'>@@ -12,7 +12,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/geniv.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -26,10 +27,20 @@</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='add'>+struct compat_request_ctx {</div><div class='add'>+	struct scatterlist src[2];</div><div class='add'>+	struct scatterlist dst[2];</div><div class='add'>+	struct scatterlist ivbuf[2];</div><div class='add'>+	struct scatterlist *ivsg;</div><div class='add'>+	struct aead_givcrypt_request subreq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int aead_null_givencrypt(struct aead_givcrypt_request *req);</div><div class='add'>+static int aead_null_givdecrypt(struct aead_givcrypt_request *req);</div><div class='add'>+</div><div class='ctx'> static int setkey_unaligned(struct crypto_aead *tfm, const u8 *key,</div><div class='ctx'> 			    unsigned int keylen)</div><div class='ctx'> {</div><div class='del'>-	struct aead_alg *aead = crypto_aead_alg(tfm);</div><div class='ctx'> 	unsigned long alignmask = crypto_aead_alignmask(tfm);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 *buffer, *alignbuffer;</div><div class='hunk'>@@ -42,47 +53,95 @@ static int setkey_unaligned(struct crypto_aead *tfm, const u8 *key,</div><div class='ctx'> </div><div class='ctx'> 	alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);</div><div class='ctx'> 	memcpy(alignbuffer, key, keylen);</div><div class='del'>-	ret = aead-&gt;setkey(tfm, alignbuffer, keylen);</div><div class='add'>+	ret = tfm-&gt;setkey(tfm, alignbuffer, keylen);</div><div class='ctx'> 	memset(alignbuffer, 0, keylen);</div><div class='ctx'> 	kfree(buffer);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen)</div><div class='add'>+int crypto_aead_setkey(struct crypto_aead *tfm,</div><div class='add'>+		       const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='del'>-	struct aead_alg *aead = crypto_aead_alg(tfm);</div><div class='ctx'> 	unsigned long alignmask = crypto_aead_alignmask(tfm);</div><div class='ctx'> </div><div class='add'>+	tfm = tfm-&gt;child;</div><div class='add'>+</div><div class='ctx'> 	if ((unsigned long)key &amp; alignmask)</div><div class='ctx'> 		return setkey_unaligned(tfm, key, keylen);</div><div class='ctx'> </div><div class='del'>-	return aead-&gt;setkey(tfm, key, keylen);</div><div class='add'>+	return tfm-&gt;setkey(tfm, key, keylen);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_aead_setkey);</div><div class='ctx'> </div><div class='ctx'> int crypto_aead_setauthsize(struct crypto_aead *tfm, unsigned int authsize)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *crt = crypto_aead_crt(tfm);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (authsize &gt; crypto_aead_alg(tfm)-&gt;maxauthsize)</div><div class='add'>+	if (authsize &gt; crypto_aead_maxauthsize(tfm))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (crypto_aead_alg(tfm)-&gt;setauthsize) {</div><div class='del'>-		err = crypto_aead_alg(tfm)-&gt;setauthsize(crt-&gt;base, authsize);</div><div class='add'>+	if (tfm-&gt;setauthsize) {</div><div class='add'>+		err = tfm-&gt;setauthsize(tfm-&gt;child, authsize);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	crypto_aead_crt(crt-&gt;base)-&gt;authsize = authsize;</div><div class='del'>-	crt-&gt;authsize = authsize;</div><div class='add'>+	tfm-&gt;child-&gt;authsize = authsize;</div><div class='add'>+	tfm-&gt;authsize = authsize;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_aead_setauthsize);</div><div class='ctx'> </div><div class='del'>-static unsigned int crypto_aead_ctxsize(struct crypto_alg *alg, u32 type,</div><div class='del'>-					u32 mask)</div><div class='add'>+struct aead_old_request {</div><div class='add'>+	struct scatterlist srcbuf[2];</div><div class='add'>+	struct scatterlist dstbuf[2];</div><div class='add'>+	struct aead_request subreq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int crypto_aead_reqsize(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	return alg-&gt;cra_ctxsize;</div><div class='add'>+	return tfm-&gt;reqsize + sizeof(struct aead_old_request);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_aead_reqsize);</div><div class='add'>+</div><div class='add'>+static int old_crypt(struct aead_request *req,</div><div class='add'>+		     int (*crypt)(struct aead_request *req))</div><div class='add'>+{</div><div class='add'>+	struct aead_old_request *nreq = aead_request_ctx(req);</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct scatterlist *src, *dst;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;old)</div><div class='add'>+		return crypt(req);</div><div class='add'>+</div><div class='add'>+	src = scatterwalk_ffwd(nreq-&gt;srcbuf, req-&gt;src, req-&gt;assoclen);</div><div class='add'>+	dst = req-&gt;src == req-&gt;dst ?</div><div class='add'>+	      src : scatterwalk_ffwd(nreq-&gt;dstbuf, req-&gt;dst, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(&amp;nreq-&gt;subreq, aead);</div><div class='add'>+	aead_request_set_callback(&amp;nreq-&gt;subreq, aead_request_flags(req),</div><div class='add'>+				  req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	aead_request_set_crypt(&amp;nreq-&gt;subreq, src, dst, req-&gt;cryptlen,</div><div class='add'>+			       req-&gt;iv);</div><div class='add'>+	aead_request_set_assoc(&amp;nreq-&gt;subreq, req-&gt;src, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	return crypt(&amp;nreq-&gt;subreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int old_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct old_aead_alg *alg = crypto_old_aead_alg(aead);</div><div class='add'>+</div><div class='add'>+	return old_crypt(req, alg-&gt;encrypt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int old_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct old_aead_alg *alg = crypto_old_aead_alg(aead);</div><div class='add'>+</div><div class='add'>+	return old_crypt(req, alg-&gt;decrypt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int no_givcrypt(struct aead_givcrypt_request *req)</div><div class='hunk'>@@ -90,32 +149,68 @@ static int no_givcrypt(struct aead_givcrypt_request *req)</div><div class='ctx'> 	return -ENOSYS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_init_aead_ops(struct crypto_tfm *tfm, u32 type, u32 mask)</div><div class='add'>+static int crypto_old_aead_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct aead_alg *alg = &amp;tfm-&gt;__crt_alg-&gt;cra_aead;</div><div class='del'>-	struct aead_tfm *crt = &amp;tfm-&gt;crt_aead;</div><div class='add'>+	struct old_aead_alg *alg = &amp;tfm-&gt;__crt_alg-&gt;cra_aead;</div><div class='add'>+	struct crypto_aead *crt = __crypto_aead_cast(tfm);</div><div class='ctx'> </div><div class='ctx'> 	if (max(alg-&gt;maxauthsize, alg-&gt;ivsize) &gt; PAGE_SIZE / 8)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	crt-&gt;setkey = tfm-&gt;__crt_alg-&gt;cra_flags &amp; CRYPTO_ALG_GENIV ?</div><div class='del'>-		      alg-&gt;setkey : setkey;</div><div class='del'>-	crt-&gt;encrypt = alg-&gt;encrypt;</div><div class='del'>-	crt-&gt;decrypt = alg-&gt;decrypt;</div><div class='del'>-	crt-&gt;givencrypt = alg-&gt;givencrypt ?: no_givcrypt;</div><div class='del'>-	crt-&gt;givdecrypt = alg-&gt;givdecrypt ?: no_givcrypt;</div><div class='del'>-	crt-&gt;base = __crypto_aead_cast(tfm);</div><div class='del'>-	crt-&gt;ivsize = alg-&gt;ivsize;</div><div class='add'>+	crt-&gt;setkey = alg-&gt;setkey;</div><div class='add'>+	crt-&gt;setauthsize = alg-&gt;setauthsize;</div><div class='add'>+	crt-&gt;encrypt = old_encrypt;</div><div class='add'>+	crt-&gt;decrypt = old_decrypt;</div><div class='add'>+	if (alg-&gt;ivsize) {</div><div class='add'>+		crt-&gt;givencrypt = alg-&gt;givencrypt ?: no_givcrypt;</div><div class='add'>+		crt-&gt;givdecrypt = alg-&gt;givdecrypt ?: no_givcrypt;</div><div class='add'>+	} else {</div><div class='add'>+		crt-&gt;givencrypt = aead_null_givencrypt;</div><div class='add'>+		crt-&gt;givdecrypt = aead_null_givdecrypt;</div><div class='add'>+	}</div><div class='add'>+	crt-&gt;child = __crypto_aead_cast(tfm);</div><div class='ctx'> 	crt-&gt;authsize = alg-&gt;maxauthsize;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void crypto_aead_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = __crypto_aead_cast(tfm);</div><div class='add'>+	struct aead_alg *alg = crypto_aead_alg(aead);</div><div class='add'>+</div><div class='add'>+	alg-&gt;exit(aead);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_aead_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = __crypto_aead_cast(tfm);</div><div class='add'>+	struct aead_alg *alg = crypto_aead_alg(aead);</div><div class='add'>+</div><div class='add'>+	if (crypto_old_aead_alg(aead)-&gt;encrypt)</div><div class='add'>+		return crypto_old_aead_init_tfm(tfm);</div><div class='add'>+</div><div class='add'>+	aead-&gt;setkey = alg-&gt;setkey;</div><div class='add'>+	aead-&gt;setauthsize = alg-&gt;setauthsize;</div><div class='add'>+	aead-&gt;encrypt = alg-&gt;encrypt;</div><div class='add'>+	aead-&gt;decrypt = alg-&gt;decrypt;</div><div class='add'>+	aead-&gt;child = __crypto_aead_cast(tfm);</div><div class='add'>+	aead-&gt;authsize = alg-&gt;maxauthsize;</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;exit)</div><div class='add'>+		aead-&gt;base.exit = crypto_aead_exit_tfm;</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;init)</div><div class='add'>+		return alg-&gt;init(aead);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_NET</div><div class='del'>-static int crypto_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+static int crypto_old_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_report_aead raead;</div><div class='del'>-	struct aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='add'>+	struct old_aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='ctx'> </div><div class='ctx'> 	strncpy(raead.type, "aead", sizeof(raead.type));</div><div class='ctx'> 	strncpy(raead.geniv, aead-&gt;geniv ?: "&lt;built-in&gt;", sizeof(raead.geniv));</div><div class='hunk'>@@ -133,6 +228,64 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='add'>+static int crypto_old_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void crypto_old_aead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='add'>+	__attribute__ ((unused));</div><div class='add'>+static void crypto_old_aead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct old_aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "type         : aead\n");</div><div class='add'>+	seq_printf(m, "async        : %s\n", alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC ?</div><div class='add'>+					     "yes" : "no");</div><div class='add'>+	seq_printf(m, "blocksize    : %u\n", alg-&gt;cra_blocksize);</div><div class='add'>+	seq_printf(m, "ivsize       : %u\n", aead-&gt;ivsize);</div><div class='add'>+	seq_printf(m, "maxauthsize  : %u\n", aead-&gt;maxauthsize);</div><div class='add'>+	seq_printf(m, "geniv        : %s\n", aead-&gt;geniv ?: "&lt;built-in&gt;");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct crypto_type crypto_aead_type = {</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='add'>+	.init_tfm = crypto_aead_init_tfm,</div><div class='add'>+#ifdef CONFIG_PROC_FS</div><div class='add'>+	.show = crypto_old_aead_show,</div><div class='add'>+#endif</div><div class='add'>+	.report = crypto_old_aead_report,</div><div class='add'>+	.lookup = crypto_lookup_aead,</div><div class='add'>+	.maskclear = ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV),</div><div class='add'>+	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.type = CRYPTO_ALG_TYPE_AEAD,</div><div class='add'>+	.tfmsize = offsetof(struct crypto_aead, base),</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_aead_type);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NET</div><div class='add'>+static int crypto_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_report_aead raead;</div><div class='add'>+	struct aead_alg *aead = container_of(alg, struct aead_alg, base);</div><div class='add'>+</div><div class='add'>+	strncpy(raead.type, "aead", sizeof(raead.type));</div><div class='add'>+	strncpy(raead.geniv, "&lt;none&gt;", sizeof(raead.geniv));</div><div class='add'>+</div><div class='add'>+	raead.blocksize = alg-&gt;cra_blocksize;</div><div class='add'>+	raead.maxauthsize = aead-&gt;maxauthsize;</div><div class='add'>+	raead.ivsize = aead-&gt;ivsize;</div><div class='add'>+</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_AEAD,</div><div class='add'>+		    sizeof(struct crypto_report_aead), &amp;raead))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='ctx'> static int crypto_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	return -ENOSYS;</div><div class='hunk'>@@ -143,7 +296,7 @@ static void crypto_aead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 	__attribute__ ((unused));</div><div class='ctx'> static void crypto_aead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='add'>+	struct aead_alg *aead = container_of(alg, struct aead_alg, base);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "type         : aead\n");</div><div class='ctx'> 	seq_printf(m, "async        : %s\n", alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC ?</div><div class='hunk'>@@ -151,18 +304,21 @@ static void crypto_aead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 	seq_printf(m, "blocksize    : %u\n", alg-&gt;cra_blocksize);</div><div class='ctx'> 	seq_printf(m, "ivsize       : %u\n", aead-&gt;ivsize);</div><div class='ctx'> 	seq_printf(m, "maxauthsize  : %u\n", aead-&gt;maxauthsize);</div><div class='del'>-	seq_printf(m, "geniv        : %s\n", aead-&gt;geniv ?: "&lt;built-in&gt;");</div><div class='add'>+	seq_printf(m, "geniv        : &lt;none&gt;\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct crypto_type crypto_aead_type = {</div><div class='del'>-	.ctxsize = crypto_aead_ctxsize,</div><div class='del'>-	.init = crypto_init_aead_ops,</div><div class='add'>+static const struct crypto_type crypto_new_aead_type = {</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='add'>+	.init_tfm = crypto_aead_init_tfm,</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='ctx'> 	.show = crypto_aead_show,</div><div class='ctx'> #endif</div><div class='ctx'> 	.report = crypto_aead_report,</div><div class='add'>+	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.type = CRYPTO_ALG_TYPE_AEAD,</div><div class='add'>+	.tfmsize = offsetof(struct crypto_aead, base),</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_aead_type);</div><div class='ctx'> </div><div class='ctx'> static int aead_null_givencrypt(struct aead_givcrypt_request *req)</div><div class='ctx'> {</div><div class='hunk'>@@ -174,33 +330,11 @@ static int aead_null_givdecrypt(struct aead_givcrypt_request *req)</div><div class='ctx'> 	return crypto_aead_decrypt(&amp;req-&gt;areq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_init_nivaead_ops(struct crypto_tfm *tfm, u32 type, u32 mask)</div><div class='del'>-{</div><div class='del'>-	struct aead_alg *alg = &amp;tfm-&gt;__crt_alg-&gt;cra_aead;</div><div class='del'>-	struct aead_tfm *crt = &amp;tfm-&gt;crt_aead;</div><div class='del'>-</div><div class='del'>-	if (max(alg-&gt;maxauthsize, alg-&gt;ivsize) &gt; PAGE_SIZE / 8)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	crt-&gt;setkey = setkey;</div><div class='del'>-	crt-&gt;encrypt = alg-&gt;encrypt;</div><div class='del'>-	crt-&gt;decrypt = alg-&gt;decrypt;</div><div class='del'>-	if (!alg-&gt;ivsize) {</div><div class='del'>-		crt-&gt;givencrypt = aead_null_givencrypt;</div><div class='del'>-		crt-&gt;givdecrypt = aead_null_givdecrypt;</div><div class='del'>-	}</div><div class='del'>-	crt-&gt;base = __crypto_aead_cast(tfm);</div><div class='del'>-	crt-&gt;ivsize = alg-&gt;ivsize;</div><div class='del'>-	crt-&gt;authsize = alg-&gt;maxauthsize;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_NET</div><div class='ctx'> static int crypto_nivaead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_report_aead raead;</div><div class='del'>-	struct aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='add'>+	struct old_aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='ctx'> </div><div class='ctx'> 	strncpy(raead.type, "nivaead", sizeof(raead.type));</div><div class='ctx'> 	strncpy(raead.geniv, aead-&gt;geniv, sizeof(raead.geniv));</div><div class='hunk'>@@ -229,7 +363,7 @@ static void crypto_nivaead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 	__attribute__ ((unused));</div><div class='ctx'> static void crypto_nivaead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='add'>+	struct old_aead_alg *aead = &amp;alg-&gt;cra_aead;</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "type         : nivaead\n");</div><div class='ctx'> 	seq_printf(m, "async        : %s\n", alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC ?</div><div class='hunk'>@@ -241,43 +375,215 @@ static void crypto_nivaead_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct crypto_type crypto_nivaead_type = {</div><div class='del'>-	.ctxsize = crypto_aead_ctxsize,</div><div class='del'>-	.init = crypto_init_nivaead_ops,</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='add'>+	.init_tfm = crypto_aead_init_tfm,</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='ctx'> 	.show = crypto_nivaead_show,</div><div class='ctx'> #endif</div><div class='ctx'> 	.report = crypto_nivaead_report,</div><div class='add'>+	.maskclear = ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV),</div><div class='add'>+	.maskset = CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV,</div><div class='add'>+	.type = CRYPTO_ALG_TYPE_AEAD,</div><div class='add'>+	.tfmsize = offsetof(struct crypto_aead, base),</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_nivaead_type);</div><div class='ctx'> </div><div class='ctx'> static int crypto_grab_nivaead(struct crypto_aead_spawn *spawn,</div><div class='ctx'> 			       const char *name, u32 type, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_alg *alg;</div><div class='add'>+	spawn-&gt;base.frontend = &amp;crypto_nivaead_type;</div><div class='add'>+	return crypto_grab_spawn(&amp;spawn-&gt;base, name, type, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aead_geniv_setkey(struct crypto_aead *tfm,</div><div class='add'>+			     const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_setkey(ctx-&gt;child, key, keylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aead_geniv_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_setauthsize(ctx-&gt;child, authsize);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compat_encrypt_complete2(struct aead_request *req, int err)</div><div class='add'>+{</div><div class='add'>+	struct compat_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct aead_givcrypt_request *subreq = &amp;rctx-&gt;subreq;</div><div class='add'>+	struct crypto_aead *geniv;</div><div class='add'>+</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	scatterwalk_map_and_copy(subreq-&gt;giv, rctx-&gt;ivsg, 0,</div><div class='add'>+				 crypto_aead_ivsize(geniv), 1);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kzfree(subreq-&gt;giv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compat_encrypt_complete(struct crypto_async_request *base, int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = base-&gt;data;</div><div class='add'>+</div><div class='add'>+	compat_encrypt_complete2(req, err);</div><div class='add'>+	aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int compat_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct compat_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct aead_givcrypt_request *subreq = &amp;rctx-&gt;subreq;</div><div class='add'>+	unsigned int ivsize = crypto_aead_ivsize(geniv);</div><div class='add'>+	struct scatterlist *src, *dst;</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	u8 *info;</div><div class='add'>+	__be64 seq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	type &amp;= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV);</div><div class='del'>-	type |= CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	mask |= CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV;</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	alg = crypto_alg_mod_lookup(name, type, mask);</div><div class='del'>-	if (IS_ERR(alg))</div><div class='del'>-		return PTR_ERR(alg);</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;ivsg = scatterwalk_ffwd(rctx-&gt;ivbuf, req-&gt;dst, req-&gt;assoclen);</div><div class='add'>+	info = PageHighMem(sg_page(rctx-&gt;ivsg)) ? NULL : sg_virt(rctx-&gt;ivsg);</div><div class='add'>+</div><div class='add'>+	if (!info) {</div><div class='add'>+		info = kmalloc(ivsize, req-&gt;base.flags &amp;</div><div class='add'>+				       CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL:</div><div class='add'>+								  GFP_ATOMIC);</div><div class='add'>+		if (!info)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		compl = compat_encrypt_complete;</div><div class='add'>+		data = req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;seq, req-&gt;iv + ivsize - sizeof(seq), sizeof(seq));</div><div class='add'>+</div><div class='add'>+	src = scatterwalk_ffwd(rctx-&gt;src, req-&gt;src, req-&gt;assoclen + ivsize);</div><div class='add'>+	dst = req-&gt;src == req-&gt;dst ?</div><div class='add'>+	      src : scatterwalk_ffwd(rctx-&gt;dst, rctx-&gt;ivsg, ivsize);</div><div class='add'>+</div><div class='add'>+	aead_givcrypt_set_tfm(subreq, ctx-&gt;child);</div><div class='add'>+	aead_givcrypt_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	aead_givcrypt_set_crypt(subreq, src, dst,</div><div class='add'>+				req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_givcrypt_set_assoc(subreq, req-&gt;src, req-&gt;assoclen);</div><div class='add'>+	aead_givcrypt_set_giv(subreq, info, be64_to_cpu(seq));</div><div class='add'>+</div><div class='add'>+	err = crypto_aead_givencrypt(subreq);</div><div class='add'>+	if (unlikely(PageHighMem(sg_page(rctx-&gt;ivsg))))</div><div class='add'>+		compat_encrypt_complete2(req, err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int compat_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct compat_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct aead_request *subreq = &amp;rctx-&gt;subreq.areq;</div><div class='add'>+	unsigned int ivsize = crypto_aead_ivsize(geniv);</div><div class='add'>+	struct scatterlist *src, *dst;</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;child);</div><div class='add'>+</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+</div><div class='add'>+	src = scatterwalk_ffwd(rctx-&gt;src, req-&gt;src, req-&gt;assoclen + ivsize);</div><div class='add'>+	dst = req-&gt;src == req-&gt;dst ?</div><div class='add'>+	      src : scatterwalk_ffwd(rctx-&gt;dst, req-&gt;dst,</div><div class='add'>+				     req-&gt;assoclen + ivsize);</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, src, dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_request_set_assoc(subreq, req-&gt;src, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(req-&gt;iv, req-&gt;src, req-&gt;assoclen, ivsize, 0);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_decrypt(subreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int compat_encrypt_first(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ctx-&gt;lock);</div><div class='add'>+	if (geniv-&gt;encrypt != compat_encrypt_first)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	geniv-&gt;encrypt = compat_encrypt;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;ctx-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return compat_encrypt(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aead_geniv_init_compat(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = __crypto_aead_cast(tfm);</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='add'>+</div><div class='add'>+	crypto_aead_set_reqsize(geniv, sizeof(struct compat_request_ctx));</div><div class='add'>+</div><div class='add'>+	err = aead_geniv_init(tfm);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;child = geniv-&gt;child;</div><div class='add'>+	geniv-&gt;child = geniv;</div><div class='ctx'> </div><div class='del'>-	err = crypto_init_spawn(&amp;spawn-&gt;base, alg, spawn-&gt;base.inst, mask);</div><div class='del'>-	crypto_mod_put(alg);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct crypto_instance *aead_geniv_alloc(struct crypto_template *tmpl,</div><div class='del'>-					 struct rtattr **tb, u32 type,</div><div class='del'>-					 u32 mask)</div><div class='add'>+static void aead_geniv_exit_compat(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = __crypto_aead_cast(tfm);</div><div class='add'>+	struct aead_geniv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+</div><div class='add'>+	crypto_free_aead(ctx-&gt;child);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aead_instance *aead_geniv_alloc(struct crypto_template *tmpl,</div><div class='add'>+				       struct rtattr **tb, u32 type, u32 mask)</div><div class='ctx'> {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	struct crypto_aead_spawn *spawn;</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='del'>-	struct crypto_alg *alg;</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	unsigned int ivsize;</div><div class='add'>+	unsigned int maxauthsize;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='hunk'>@@ -296,20 +602,25 @@ struct crypto_instance *aead_geniv_alloc(struct crypto_template *tmpl,</div><div class='ctx'> 	if (!inst)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	spawn = crypto_instance_ctx(inst);</div><div class='add'>+	spawn = aead_instance_ctx(inst);</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore async algorithms if necessary. */</div><div class='ctx'> 	mask |= crypto_requires_sync(algt-&gt;type, algt-&gt;mask);</div><div class='ctx'> </div><div class='del'>-	crypto_set_aead_spawn(spawn, inst);</div><div class='del'>-	err = crypto_grab_nivaead(spawn, name, type, mask);</div><div class='add'>+	crypto_set_aead_spawn(spawn, aead_crypto_instance(inst));</div><div class='add'>+	err = (algt-&gt;mask &amp; CRYPTO_ALG_GENIV) ?</div><div class='add'>+	      crypto_grab_nivaead(spawn, name, type, mask) :</div><div class='add'>+	      crypto_grab_aead(spawn, name, type, mask);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='del'>-	alg = crypto_aead_spawn_alg(spawn);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='add'>+</div><div class='add'>+	ivsize = crypto_aead_alg_ivsize(alg);</div><div class='add'>+	maxauthsize = crypto_aead_alg_maxauthsize(alg);</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='del'>-	if (!alg-&gt;cra_aead.ivsize)</div><div class='add'>+	if (ivsize &lt; sizeof(u64))</div><div class='ctx'> 		goto err_drop_alg;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -318,39 +629,64 @@ struct crypto_instance *aead_geniv_alloc(struct crypto_template *tmpl,</div><div class='ctx'> 	 * template name and double-check the IV generator.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (algt-&gt;mask &amp; CRYPTO_ALG_GENIV) {</div><div class='del'>-		if (strcmp(tmpl-&gt;name, alg-&gt;cra_aead.geniv))</div><div class='add'>+		if (!alg-&gt;base.cra_aead.encrypt)</div><div class='add'>+			goto err_drop_alg;</div><div class='add'>+		if (strcmp(tmpl-&gt;name, alg-&gt;base.cra_aead.geniv))</div><div class='ctx'> 			goto err_drop_alg;</div><div class='ctx'> </div><div class='del'>-		memcpy(inst-&gt;alg.cra_name, alg-&gt;cra_name, CRYPTO_MAX_ALG_NAME);</div><div class='del'>-		memcpy(inst-&gt;alg.cra_driver_name, alg-&gt;cra_driver_name,</div><div class='add'>+		memcpy(inst-&gt;alg.base.cra_name, alg-&gt;base.cra_name,</div><div class='ctx'> 		       CRYPTO_MAX_ALG_NAME);</div><div class='del'>-	} else {</div><div class='del'>-		err = -ENAMETOOLONG;</div><div class='del'>-		if (snprintf(inst-&gt;alg.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-			     "%s(%s)", tmpl-&gt;name, alg-&gt;cra_name) &gt;=</div><div class='del'>-		    CRYPTO_MAX_ALG_NAME)</div><div class='del'>-			goto err_drop_alg;</div><div class='del'>-		if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-			     "%s(%s)", tmpl-&gt;name, alg-&gt;cra_driver_name) &gt;=</div><div class='del'>-		    CRYPTO_MAX_ALG_NAME)</div><div class='del'>-			goto err_drop_alg;</div><div class='add'>+		memcpy(inst-&gt;alg.base.cra_driver_name,</div><div class='add'>+		       alg-&gt;base.cra_driver_name, CRYPTO_MAX_ALG_NAME);</div><div class='add'>+</div><div class='add'>+		inst-&gt;alg.base.cra_flags = CRYPTO_ALG_TYPE_AEAD |</div><div class='add'>+					   CRYPTO_ALG_GENIV;</div><div class='add'>+		inst-&gt;alg.base.cra_flags |= alg-&gt;base.cra_flags &amp;</div><div class='add'>+					    CRYPTO_ALG_ASYNC;</div><div class='add'>+		inst-&gt;alg.base.cra_priority = alg-&gt;base.cra_priority;</div><div class='add'>+		inst-&gt;alg.base.cra_blocksize = alg-&gt;base.cra_blocksize;</div><div class='add'>+		inst-&gt;alg.base.cra_alignmask = alg-&gt;base.cra_alignmask;</div><div class='add'>+		inst-&gt;alg.base.cra_type = &amp;crypto_aead_type;</div><div class='add'>+</div><div class='add'>+		inst-&gt;alg.base.cra_aead.ivsize = ivsize;</div><div class='add'>+		inst-&gt;alg.base.cra_aead.maxauthsize = maxauthsize;</div><div class='add'>+</div><div class='add'>+		inst-&gt;alg.base.cra_aead.setkey = alg-&gt;base.cra_aead.setkey;</div><div class='add'>+		inst-&gt;alg.base.cra_aead.setauthsize =</div><div class='add'>+			alg-&gt;base.cra_aead.setauthsize;</div><div class='add'>+		inst-&gt;alg.base.cra_aead.encrypt = alg-&gt;base.cra_aead.encrypt;</div><div class='add'>+		inst-&gt;alg.base.cra_aead.decrypt = alg-&gt;base.cra_aead.decrypt;</div><div class='add'>+</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_GENIV;</div><div class='del'>-	inst-&gt;alg.cra_flags |= alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='del'>-	inst-&gt;alg.cra_priority = alg-&gt;cra_priority;</div><div class='del'>-	inst-&gt;alg.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='del'>-	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='del'>-	inst-&gt;alg.cra_type = &amp;crypto_aead_type;</div><div class='add'>+	err = -ENAMETOOLONG;</div><div class='add'>+	if (snprintf(inst-&gt;alg.base.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "%s(%s)", tmpl-&gt;name, alg-&gt;base.cra_name) &gt;=</div><div class='add'>+	    CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		goto err_drop_alg;</div><div class='add'>+	if (snprintf(inst-&gt;alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "%s(%s)", tmpl-&gt;name, alg-&gt;base.cra_driver_name) &gt;=</div><div class='add'>+	    CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		goto err_drop_alg;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_flags = alg-&gt;base.cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='add'>+	inst-&gt;alg.base.cra_priority = alg-&gt;base.cra_priority;</div><div class='add'>+	inst-&gt;alg.base.cra_blocksize = alg-&gt;base.cra_blocksize;</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask = alg-&gt;base.cra_alignmask;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct aead_geniv_ctx);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.setkey = aead_geniv_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = aead_geniv_setauthsize;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize = alg-&gt;cra_aead.ivsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = alg-&gt;cra_aead.maxauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.geniv = alg-&gt;cra_aead.geniv;</div><div class='add'>+	inst-&gt;alg.ivsize = ivsize;</div><div class='add'>+	inst-&gt;alg.maxauthsize = maxauthsize;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.setkey = alg-&gt;cra_aead.setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = alg-&gt;cra_aead.setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt = alg-&gt;cra_aead.encrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt = alg-&gt;cra_aead.decrypt;</div><div class='add'>+	inst-&gt;alg.encrypt = compat_encrypt_first;</div><div class='add'>+	inst-&gt;alg.decrypt = compat_decrypt;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_init = aead_geniv_init_compat;</div><div class='add'>+	inst-&gt;alg.base.cra_exit = aead_geniv_exit_compat;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return inst;</div><div class='hunk'>@@ -364,9 +700,9 @@ err_free_inst:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(aead_geniv_alloc);</div><div class='ctx'> </div><div class='del'>-void aead_geniv_free(struct crypto_instance *inst)</div><div class='add'>+void aead_geniv_free(struct aead_instance *inst)</div><div class='ctx'> {</div><div class='del'>-	crypto_drop_aead(crypto_instance_ctx(inst));</div><div class='add'>+	crypto_drop_aead(aead_instance_ctx(inst));</div><div class='ctx'> 	kfree(inst);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(aead_geniv_free);</div><div class='hunk'>@@ -374,14 +710,17 @@ EXPORT_SYMBOL_GPL(aead_geniv_free);</div><div class='ctx'> int aead_geniv_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_instance *inst = (void *)tfm-&gt;__crt_alg;</div><div class='add'>+	struct crypto_aead *child;</div><div class='ctx'> 	struct crypto_aead *aead;</div><div class='ctx'> </div><div class='del'>-	aead = crypto_spawn_aead(crypto_instance_ctx(inst));</div><div class='del'>-	if (IS_ERR(aead))</div><div class='del'>-		return PTR_ERR(aead);</div><div class='add'>+	aead = __crypto_aead_cast(tfm);</div><div class='add'>+</div><div class='add'>+	child = crypto_spawn_aead(crypto_instance_ctx(inst));</div><div class='add'>+	if (IS_ERR(child))</div><div class='add'>+		return PTR_ERR(child);</div><div class='ctx'> </div><div class='del'>-	tfm-&gt;crt_aead.base = aead;</div><div class='del'>-	tfm-&gt;crt_aead.reqsize += crypto_aead_reqsize(aead);</div><div class='add'>+	aead-&gt;child = child;</div><div class='add'>+	aead-&gt;reqsize += crypto_aead_reqsize(child);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -389,7 +728,7 @@ EXPORT_SYMBOL_GPL(aead_geniv_init);</div><div class='ctx'> </div><div class='ctx'> void aead_geniv_exit(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	crypto_free_aead(tfm-&gt;crt_aead.base);</div><div class='add'>+	crypto_free_aead(__crypto_aead_cast(tfm)-&gt;child);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(aead_geniv_exit);</div><div class='ctx'> </div><div class='hunk'>@@ -443,6 +782,13 @@ static int crypto_nivaead_default(struct crypto_alg *alg, u32 type, u32 mask)</div><div class='ctx'> 	if (!tmpl)</div><div class='ctx'> 		goto kill_larval;</div><div class='ctx'> </div><div class='add'>+	if (tmpl-&gt;create) {</div><div class='add'>+		err = tmpl-&gt;create(tmpl, tb);</div><div class='add'>+		if (err)</div><div class='add'>+			goto put_tmpl;</div><div class='add'>+		goto ok;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	inst = tmpl-&gt;alloc(tb);</div><div class='ctx'> 	err = PTR_ERR(inst);</div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='hunk'>@@ -454,6 +800,7 @@ static int crypto_nivaead_default(struct crypto_alg *alg, u32 type, u32 mask)</div><div class='ctx'> 		goto put_tmpl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+ok:</div><div class='ctx'> 	/* Redo the lookup to use the instance we just registered. */</div><div class='ctx'> 	err = -EAGAIN;</div><div class='ctx'> </div><div class='hunk'>@@ -489,7 +836,7 @@ struct crypto_alg *crypto_lookup_aead(const char *name, u32 type, u32 mask)</div><div class='ctx'> 		return alg;</div><div class='ctx'> </div><div class='ctx'> 	if (alg-&gt;cra_type == &amp;crypto_aead_type) {</div><div class='del'>-		if ((alg-&gt;cra_flags ^ type ^ ~mask) &amp; CRYPTO_ALG_TESTED) {</div><div class='add'>+		if (~alg-&gt;cra_flags &amp; (type ^ ~mask) &amp; CRYPTO_ALG_TESTED) {</div><div class='ctx'> 			crypto_mod_put(alg);</div><div class='ctx'> 			alg = ERR_PTR(-ENOENT);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -505,62 +852,91 @@ EXPORT_SYMBOL_GPL(crypto_lookup_aead);</div><div class='ctx'> int crypto_grab_aead(struct crypto_aead_spawn *spawn, const char *name,</div><div class='ctx'> 		     u32 type, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_alg *alg;</div><div class='del'>-	int err;</div><div class='add'>+	spawn-&gt;base.frontend = &amp;crypto_aead_type;</div><div class='add'>+	return crypto_grab_spawn(&amp;spawn-&gt;base, name, type, mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_grab_aead);</div><div class='ctx'> </div><div class='del'>-	type &amp;= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV);</div><div class='del'>-	type |= CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	mask &amp;= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV);</div><div class='del'>-	mask |= CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+struct crypto_aead *crypto_alloc_aead(const char *alg_name, u32 type, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return crypto_alloc_tfm(alg_name, &amp;crypto_aead_type, type, mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_alloc_aead);</div><div class='ctx'> </div><div class='del'>-	alg = crypto_lookup_aead(name, type, mask);</div><div class='del'>-	if (IS_ERR(alg))</div><div class='del'>-		return PTR_ERR(alg);</div><div class='add'>+static int aead_prepare_alg(struct aead_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='del'>-	err = crypto_init_spawn(&amp;spawn-&gt;base, alg, spawn-&gt;base.inst, mask);</div><div class='del'>-	crypto_mod_put(alg);</div><div class='del'>-	return err;</div><div class='add'>+	if (max(alg-&gt;maxauthsize, alg-&gt;ivsize) &gt; PAGE_SIZE / 8)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	base-&gt;cra_type = &amp;crypto_new_aead_type;</div><div class='add'>+	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_AEAD;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_grab_aead);</div><div class='ctx'> </div><div class='del'>-struct crypto_aead *crypto_alloc_aead(const char *alg_name, u32 type, u32 mask)</div><div class='add'>+int crypto_register_aead(struct aead_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_tfm *tfm;</div><div class='add'>+	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	type &amp;= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV);</div><div class='del'>-	type |= CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	mask &amp;= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV);</div><div class='del'>-	mask |= CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+	err = aead_prepare_alg(alg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	for (;;) {</div><div class='del'>-		struct crypto_alg *alg;</div><div class='add'>+	return crypto_register_alg(base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_register_aead);</div><div class='ctx'> </div><div class='del'>-		alg = crypto_lookup_aead(alg_name, type, mask);</div><div class='del'>-		if (IS_ERR(alg)) {</div><div class='del'>-			err = PTR_ERR(alg);</div><div class='del'>-			goto err;</div><div class='del'>-		}</div><div class='add'>+void crypto_unregister_aead(struct aead_alg *alg)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_alg(&amp;alg-&gt;base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_unregister_aead);</div><div class='ctx'> </div><div class='del'>-		tfm = __crypto_alloc_tfm(alg, type, mask);</div><div class='del'>-		if (!IS_ERR(tfm))</div><div class='del'>-			return __crypto_aead_cast(tfm);</div><div class='add'>+int crypto_register_aeads(struct aead_alg *algs, int count)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='del'>-		crypto_mod_put(alg);</div><div class='del'>-		err = PTR_ERR(tfm);</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		ret = crypto_register_aead(&amp;algs[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-		if (err != -EAGAIN)</div><div class='del'>-			break;</div><div class='del'>-		if (signal_pending(current)) {</div><div class='del'>-			err = -EINTR;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (--i; i &gt;= 0; --i)</div><div class='add'>+		crypto_unregister_aead(&amp;algs[i]);</div><div class='ctx'> </div><div class='del'>-	return ERR_PTR(err);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_alloc_aead);</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_register_aeads);</div><div class='add'>+</div><div class='add'>+void crypto_unregister_aeads(struct aead_alg *algs, int count)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = count - 1; i &gt;= 0; --i)</div><div class='add'>+		crypto_unregister_aead(&amp;algs[i]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_unregister_aeads);</div><div class='add'>+</div><div class='add'>+int aead_register_instance(struct crypto_template *tmpl,</div><div class='add'>+			   struct aead_instance *inst)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = aead_prepare_alg(&amp;inst-&gt;alg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return crypto_register_instance(tmpl, aead_crypto_instance(inst));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(aead_register_instance);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Authenticated Encryption with Associated Data (AEAD)");</div><div class='head'>diff --git a/crypto/af_alg.c b/crypto/af_alg.c<br/>index f22cc56fd1b3..a8e7aa3e257b 100644<br/>--- a/<a href='/drm-misc/tree/crypto/af_alg.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/af_alg.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/af_alg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/af_alg.c</a></div><div class='hunk'>@@ -127,6 +127,7 @@ EXPORT_SYMBOL_GPL(af_alg_release);</div><div class='ctx'> </div><div class='ctx'> static int alg_bind(struct socket *sock, struct sockaddr *uaddr, int addr_len)</div><div class='ctx'> {</div><div class='add'>+	const u32 forbidden = CRYPTO_ALG_INTERNAL;</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='ctx'> 	struct sockaddr_alg *sa = (void *)uaddr;</div><div class='hunk'>@@ -151,7 +152,9 @@ static int alg_bind(struct socket *sock, struct sockaddr *uaddr, int addr_len)</div><div class='ctx'> 	if (IS_ERR(type))</div><div class='ctx'> 		return PTR_ERR(type);</div><div class='ctx'> </div><div class='del'>-	private = type-&gt;bind(sa-&gt;salg_name, sa-&gt;salg_feat, sa-&gt;salg_mask);</div><div class='add'>+	private = type-&gt;bind(sa-&gt;salg_name,</div><div class='add'>+			     sa-&gt;salg_feat &amp; ~forbidden,</div><div class='add'>+			     sa-&gt;salg_mask &amp; ~forbidden);</div><div class='ctx'> 	if (IS_ERR(private)) {</div><div class='ctx'> 		module_put(type-&gt;owner);</div><div class='ctx'> 		return PTR_ERR(private);</div><div class='hunk'>@@ -244,7 +247,7 @@ int af_alg_accept(struct sock *sk, struct socket *newsock)</div><div class='ctx'> 	if (!type)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	sk2 = sk_alloc(sock_net(sk), PF_ALG, GFP_KERNEL, &amp;alg_proto);</div><div class='add'>+	sk2 = sk_alloc(sock_net(sk), PF_ALG, GFP_KERNEL, &amp;alg_proto, 0);</div><div class='ctx'> 	err = -ENOMEM;</div><div class='ctx'> 	if (!sk2)</div><div class='ctx'> 		goto unlock;</div><div class='hunk'>@@ -324,7 +327,7 @@ static int alg_create(struct net *net, struct socket *sock, int protocol,</div><div class='ctx'> 		return -EPROTONOSUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='del'>-	sk = sk_alloc(net, PF_ALG, GFP_KERNEL, &amp;alg_proto);</div><div class='add'>+	sk = sk_alloc(net, PF_ALG, GFP_KERNEL, &amp;alg_proto, kern);</div><div class='ctx'> 	if (!sk)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/akcipher.c b/crypto/akcipher.c<br/>new file mode 100644<br/>index 000000000000..528ae6aa9bff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/akcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/akcipher.c</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+/*</div><div class='add'>+ * Public Key Encryption</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015, Intel Corporation</div><div class='add'>+ * Authors: Tadeusz Struk &lt;tadeusz.struk@intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the Free</div><div class='add'>+ * Software Foundation; either version 2 of the License, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/cryptouser.h&gt;</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='add'>+#include &lt;crypto/akcipher.h&gt;</div><div class='add'>+#include &lt;crypto/public_key.h&gt;</div><div class='add'>+#include "internal.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NET</div><div class='add'>+static int crypto_akcipher_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_report_akcipher rakcipher;</div><div class='add'>+</div><div class='add'>+	strncpy(rakcipher.type, "akcipher", sizeof(rakcipher.type));</div><div class='add'>+</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_AKCIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_akcipher), &amp;rakcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int crypto_akcipher_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void crypto_akcipher_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='add'>+	__attribute__ ((unused));</div><div class='add'>+</div><div class='add'>+static void crypto_akcipher_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	seq_puts(m, "type         : akcipher\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void crypto_akcipher_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *akcipher = __crypto_akcipher_tfm(tfm);</div><div class='add'>+	struct akcipher_alg *alg = crypto_akcipher_alg(akcipher);</div><div class='add'>+</div><div class='add'>+	alg-&gt;exit(akcipher);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_akcipher_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *akcipher = __crypto_akcipher_tfm(tfm);</div><div class='add'>+	struct akcipher_alg *alg = crypto_akcipher_alg(akcipher);</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;exit)</div><div class='add'>+		akcipher-&gt;base.exit = crypto_akcipher_exit_tfm;</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;init)</div><div class='add'>+		return alg-&gt;init(akcipher);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct crypto_type crypto_akcipher_type = {</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='add'>+	.init_tfm = crypto_akcipher_init_tfm,</div><div class='add'>+#ifdef CONFIG_PROC_FS</div><div class='add'>+	.show = crypto_akcipher_show,</div><div class='add'>+#endif</div><div class='add'>+	.report = crypto_akcipher_report,</div><div class='add'>+	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.type = CRYPTO_ALG_TYPE_AKCIPHER,</div><div class='add'>+	.tfmsize = offsetof(struct crypto_akcipher, base),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct crypto_akcipher *crypto_alloc_akcipher(const char *alg_name, u32 type,</div><div class='add'>+					      u32 mask)</div><div class='add'>+{</div><div class='add'>+	return crypto_alloc_tfm(alg_name, &amp;crypto_akcipher_type, type, mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_alloc_akcipher);</div><div class='add'>+</div><div class='add'>+int crypto_register_akcipher(struct akcipher_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='add'>+</div><div class='add'>+	base-&gt;cra_type = &amp;crypto_akcipher_type;</div><div class='add'>+	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_AKCIPHER;</div><div class='add'>+	return crypto_register_alg(base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_register_akcipher);</div><div class='add'>+</div><div class='add'>+void crypto_unregister_akcipher(struct akcipher_alg *alg)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_alg(&amp;alg-&gt;base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_unregister_akcipher);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Generic public key cipher type");</div><div class='head'>diff --git a/crypto/algapi.c b/crypto/algapi.c<br/>index d2627a3d4ed8..3c079b7f23f6 100644<br/>--- a/<a href='/drm-misc/tree/crypto/algapi.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/algapi.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/algapi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algapi.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/fips.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='hunk'>@@ -43,12 +44,9 @@ static inline int crypto_set_driver_name(struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> static inline void crypto_check_module_sig(struct module *mod)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_CRYPTO_FIPS</div><div class='del'>-	if (fips_enabled &amp;&amp; mod &amp;&amp; !mod-&gt;sig_ok)</div><div class='add'>+	if (fips_enabled &amp;&amp; mod &amp;&amp; !module_sig_ok(mod))</div><div class='ctx'> 		panic("Module %s signature verification failed in FIPS mode\n",</div><div class='del'>-		      mod-&gt;name);</div><div class='del'>-#endif</div><div class='del'>-	return;</div><div class='add'>+		      module_name(mod));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_check_alg(struct crypto_alg *alg)</div><div class='hunk'>@@ -614,6 +612,22 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_init_spawn2);</div><div class='ctx'> </div><div class='add'>+int crypto_grab_spawn(struct crypto_spawn *spawn, const char *name,</div><div class='add'>+		      u32 type, u32 mask)</div><div class='add'>+{</div><div class='add'>+	struct crypto_alg *alg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	alg = crypto_find_alg(name, spawn-&gt;frontend, type, mask);</div><div class='add'>+	if (IS_ERR(alg))</div><div class='add'>+		return PTR_ERR(alg);</div><div class='add'>+</div><div class='add'>+	err = crypto_init_spawn(spawn, alg, spawn-&gt;inst, mask);</div><div class='add'>+	crypto_mod_put(alg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_grab_spawn);</div><div class='add'>+</div><div class='ctx'> void crypto_drop_spawn(struct crypto_spawn *spawn)</div><div class='ctx'> {</div><div class='ctx'> 	if (!spawn-&gt;alg)</div><div class='hunk'>@@ -964,6 +978,13 @@ void crypto_xor(u8 *dst, const u8 *src, unsigned int size)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_xor);</div><div class='ctx'> </div><div class='add'>+unsigned int crypto_alg_extsize(struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	return alg-&gt;cra_ctxsize +</div><div class='add'>+	       (alg-&gt;cra_alignmask &amp; ~(crypto_tfm_ctx_alignment() - 1));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_alg_extsize);</div><div class='add'>+</div><div class='ctx'> static int __init crypto_algapi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	crypto_init_proc();</div><div class='head'>diff --git a/crypto/algif_aead.c b/crypto/algif_aead.c<br/>index 69abada22373..e0408a480d2f 100644<br/>--- a/<a href='/drm-misc/tree/crypto/algif_aead.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/algif_aead.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/algif_aead.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algif_aead.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'>  * any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/if_alg.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -71,7 +72,7 @@ static inline bool aead_sufficient_data(struct aead_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned as = crypto_aead_authsize(crypto_aead_reqtfm(&amp;ctx-&gt;aead_req));</div><div class='ctx'> </div><div class='del'>-	return (ctx-&gt;used &gt;= (ctx-&gt;aead_assoclen + (ctx-&gt;enc ? 0 : as)));</div><div class='add'>+	return ctx-&gt;used &gt;= ctx-&gt;aead_assoclen + as;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aead_put_sgl(struct sock *sk)</div><div class='hunk'>@@ -352,12 +353,8 @@ static int aead_recvmsg(struct socket *sock, struct msghdr *msg, size_t ignored,</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='ctx'> 	struct aead_ctx *ctx = ask-&gt;private;</div><div class='del'>-	unsigned bs = crypto_aead_blocksize(crypto_aead_reqtfm(&amp;ctx-&gt;aead_req));</div><div class='ctx'> 	unsigned as = crypto_aead_authsize(crypto_aead_reqtfm(&amp;ctx-&gt;aead_req));</div><div class='ctx'> 	struct aead_sg_list *sgl = &amp;ctx-&gt;tsgl;</div><div class='del'>-	struct scatterlist *sg = NULL;</div><div class='del'>-	struct scatterlist assoc[ALG_MAX_PAGES];</div><div class='del'>-	size_t assoclen = 0;</div><div class='ctx'> 	unsigned int i = 0;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='ctx'> 	unsigned long used = 0;</div><div class='hunk'>@@ -406,23 +403,13 @@ static int aead_recvmsg(struct socket *sock, struct msghdr *msg, size_t ignored,</div><div class='ctx'> 	if (!aead_sufficient_data(ctx))</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='add'>+	outlen = used;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The cipher operation input data is reduced by the associated data</div><div class='ctx'> 	 * length as this data is processed separately later on.</div><div class='ctx'> 	 */</div><div class='del'>-	used -= ctx-&gt;aead_assoclen;</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;enc) {</div><div class='del'>-		/* round up output buffer to multiple of block size */</div><div class='del'>-		outlen = ((used + bs - 1) / bs * bs);</div><div class='del'>-		/* add the size needed for the auth tag to be created */</div><div class='del'>-		outlen += as;</div><div class='del'>-	} else {</div><div class='del'>-		/* output data size is input without the authentication tag */</div><div class='del'>-		outlen = used - as;</div><div class='del'>-		/* round up output buffer to multiple of block size */</div><div class='del'>-		outlen = ((outlen + bs - 1) / bs * bs);</div><div class='del'>-	}</div><div class='add'>+	used -= ctx-&gt;aead_assoclen + (ctx-&gt;enc ? as : 0);</div><div class='ctx'> </div><div class='ctx'> 	/* convert iovecs of output buffers into scatterlists */</div><div class='ctx'> 	while (iov_iter_count(&amp;msg-&gt;msg_iter)) {</div><div class='hunk'>@@ -451,47 +438,11 @@ static int aead_recvmsg(struct socket *sock, struct msghdr *msg, size_t ignored,</div><div class='ctx'> 	if (usedpages &lt; outlen)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	sg_init_table(assoc, ALG_MAX_PAGES);</div><div class='del'>-	assoclen = ctx-&gt;aead_assoclen;</div><div class='del'>-	/*</div><div class='del'>-	 * Split scatterlist into two: first part becomes AD, second part</div><div class='del'>-	 * is plaintext / ciphertext. The first part is assigned to assoc</div><div class='del'>-	 * scatterlist. When this loop finishes, sg points to the start of the</div><div class='del'>-	 * plaintext / ciphertext.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; ctx-&gt;tsgl.cur; i++) {</div><div class='del'>-		sg = sgl-&gt;sg + i;</div><div class='del'>-		if (sg-&gt;length &lt;= assoclen) {</div><div class='del'>-			/* AD is larger than one page */</div><div class='del'>-			sg_set_page(assoc + i, sg_page(sg),</div><div class='del'>-				    sg-&gt;length, sg-&gt;offset);</div><div class='del'>-			assoclen -= sg-&gt;length;</div><div class='del'>-			if (i &gt;= ctx-&gt;tsgl.cur)</div><div class='del'>-				goto unlock;</div><div class='del'>-		} else if (!assoclen) {</div><div class='del'>-			/* current page is to start of plaintext / ciphertext */</div><div class='del'>-			if (i)</div><div class='del'>-				/* AD terminates at page boundary */</div><div class='del'>-				sg_mark_end(assoc + i - 1);</div><div class='del'>-			else</div><div class='del'>-				/* AD size is zero */</div><div class='del'>-				sg_mark_end(assoc);</div><div class='del'>-			break;</div><div class='del'>-		} else {</div><div class='del'>-			/* AD does not terminate at page boundary */</div><div class='del'>-			sg_set_page(assoc + i, sg_page(sg),</div><div class='del'>-				    assoclen, sg-&gt;offset);</div><div class='del'>-			sg_mark_end(assoc + i);</div><div class='del'>-			/* plaintext / ciphertext starts after AD */</div><div class='del'>-			sg-&gt;length -= assoclen;</div><div class='del'>-			sg-&gt;offset += assoclen;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	sg_mark_end(sgl-&gt;sg + sgl-&gt;cur - 1);</div><div class='ctx'> </div><div class='del'>-	aead_request_set_assoc(&amp;ctx-&gt;aead_req, assoc, ctx-&gt;aead_assoclen);</div><div class='del'>-	aead_request_set_crypt(&amp;ctx-&gt;aead_req, sg, ctx-&gt;rsgl[0].sg, used,</div><div class='del'>-			       ctx-&gt;iv);</div><div class='add'>+	aead_request_set_crypt(&amp;ctx-&gt;aead_req, sgl-&gt;sg, ctx-&gt;rsgl[0].sg,</div><div class='add'>+			       used, ctx-&gt;iv);</div><div class='add'>+	aead_request_set_ad(&amp;ctx-&gt;aead_req, ctx-&gt;aead_assoclen);</div><div class='ctx'> </div><div class='ctx'> 	err = af_alg_wait_for_completion(ctx-&gt;enc ?</div><div class='ctx'> 					 crypto_aead_encrypt(&amp;ctx-&gt;aead_req) :</div><div class='hunk'>@@ -563,7 +514,8 @@ static struct proto_ops algif_aead_ops = {</div><div class='ctx'> </div><div class='ctx'> static void *aead_bind(const char *name, u32 type, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	return crypto_alloc_aead(name, type, mask);</div><div class='add'>+	return crypto_alloc_aead(name, type | CRYPTO_ALG_AEAD_NEW,</div><div class='add'>+				 mask | CRYPTO_ALG_AEAD_NEW);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aead_release(void *private)</div><div class='head'>diff --git a/crypto/algif_rng.c b/crypto/algif_rng.c<br/>index 8109aaad2726..150c2b6480ed 100644<br/>--- a/<a href='/drm-misc/tree/crypto/algif_rng.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/algif_rng.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/algif_rng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/algif_rng.c</a></div><div class='hunk'>@@ -164,7 +164,7 @@ static int rng_setkey(void *private, const u8 *seed, unsigned int seedlen)</div><div class='ctx'> 	 * Check whether seedlen is of sufficient size is done in RNG</div><div class='ctx'> 	 * implementations.</div><div class='ctx'> 	 */</div><div class='del'>-	return crypto_rng_reset(private, (u8 *)seed, seedlen);</div><div class='add'>+	return crypto_rng_reset(private, seed, seedlen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct af_alg_type algif_type_rng = {</div><div class='head'>diff --git a/crypto/ansi_cprng.c b/crypto/ansi_cprng.c<br/>index 765fe7609348..eff337ce9003 100644<br/>--- a/<a href='/drm-misc/tree/crypto/ansi_cprng.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/ansi_cprng.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/ansi_cprng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ansi_cprng.c</a></div><div class='hunk'>@@ -20,8 +20,6 @@</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "internal.h"</div><div class='del'>-</div><div class='ctx'> #define DEFAULT_PRNG_KEY "0123456789abcdef"</div><div class='ctx'> #define DEFAULT_PRNG_KSZ 16</div><div class='ctx'> #define DEFAULT_BLK_SZ 16</div><div class='hunk'>@@ -281,11 +279,11 @@ static void free_prng_context(struct prng_context *ctx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int reset_prng_context(struct prng_context *ctx,</div><div class='del'>-			      unsigned char *key, size_t klen,</div><div class='del'>-			      unsigned char *V, unsigned char *DT)</div><div class='add'>+			      const unsigned char *key, size_t klen,</div><div class='add'>+			      const unsigned char *V, const unsigned char *DT)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	unsigned char *prng_key;</div><div class='add'>+	const unsigned char *prng_key;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ctx-&gt;prng_lock);</div><div class='ctx'> 	ctx-&gt;flags |= PRNG_NEED_RESET;</div><div class='hunk'>@@ -353,8 +351,9 @@ static void cprng_exit(struct crypto_tfm *tfm)</div><div class='ctx'> 	free_prng_context(crypto_tfm_ctx(tfm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cprng_get_random(struct crypto_rng *tfm, u8 *rdata,</div><div class='del'>-			    unsigned int dlen)</div><div class='add'>+static int cprng_get_random(struct crypto_rng *tfm,</div><div class='add'>+			    const u8 *src, unsigned int slen,</div><div class='add'>+			    u8 *rdata, unsigned int dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct prng_context *prng = crypto_rng_ctx(tfm);</div><div class='ctx'> </div><div class='hunk'>@@ -367,11 +366,12 @@ static int cprng_get_random(struct crypto_rng *tfm, u8 *rdata,</div><div class='ctx'>  *  V and KEY are required during reset, and DT is optional, detected</div><div class='ctx'>  *  as being present by testing the length of the seed</div><div class='ctx'>  */</div><div class='del'>-static int cprng_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='add'>+static int cprng_reset(struct crypto_rng *tfm,</div><div class='add'>+		       const u8 *seed, unsigned int slen)</div><div class='ctx'> {</div><div class='ctx'> 	struct prng_context *prng = crypto_rng_ctx(tfm);</div><div class='del'>-	u8 *key = seed + DEFAULT_BLK_SZ;</div><div class='del'>-	u8 *dt = NULL;</div><div class='add'>+	const u8 *key = seed + DEFAULT_BLK_SZ;</div><div class='add'>+	const u8 *dt = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (slen &lt; DEFAULT_PRNG_KSZ + DEFAULT_BLK_SZ)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -387,18 +387,20 @@ static int cprng_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRYPTO_FIPS</div><div class='del'>-static int fips_cprng_get_random(struct crypto_rng *tfm, u8 *rdata,</div><div class='del'>-			    unsigned int dlen)</div><div class='add'>+static int fips_cprng_get_random(struct crypto_rng *tfm,</div><div class='add'>+				 const u8 *src, unsigned int slen,</div><div class='add'>+				 u8 *rdata, unsigned int dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct prng_context *prng = crypto_rng_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	return get_prng_bytes(rdata, dlen, prng, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fips_cprng_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='add'>+static int fips_cprng_reset(struct crypto_rng *tfm,</div><div class='add'>+			    const u8 *seed, unsigned int slen)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rdata[DEFAULT_BLK_SZ];</div><div class='del'>-	u8 *key = seed + DEFAULT_BLK_SZ;</div><div class='add'>+	const u8 *key = seed + DEFAULT_BLK_SZ;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	struct prng_context *prng = crypto_rng_ctx(tfm);</div><div class='hunk'>@@ -424,40 +426,32 @@ out:</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg rng_algs[] = { {</div><div class='del'>-	.cra_name		= "stdrng",</div><div class='del'>-	.cra_driver_name	= "ansi_cprng",</div><div class='del'>-	.cra_priority		= 100,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_RNG,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct prng_context),</div><div class='del'>-	.cra_type		= &amp;crypto_rng_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_init		= cprng_init,</div><div class='del'>-	.cra_exit		= cprng_exit,</div><div class='del'>-	.cra_u			= {</div><div class='del'>-		.rng = {</div><div class='del'>-			.rng_make_random	= cprng_get_random,</div><div class='del'>-			.rng_reset		= cprng_reset,</div><div class='del'>-			.seedsize = DEFAULT_PRNG_KSZ + 2*DEFAULT_BLK_SZ,</div><div class='del'>-		}</div><div class='add'>+static struct rng_alg rng_algs[] = { {</div><div class='add'>+	.generate		= cprng_get_random,</div><div class='add'>+	.seed			= cprng_reset,</div><div class='add'>+	.seedsize		= DEFAULT_PRNG_KSZ + 2 * DEFAULT_BLK_SZ,</div><div class='add'>+	.base			=	{</div><div class='add'>+		.cra_name		= "stdrng",</div><div class='add'>+		.cra_driver_name	= "ansi_cprng",</div><div class='add'>+		.cra_priority		= 100,</div><div class='add'>+		.cra_ctxsize		= sizeof(struct prng_context),</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+		.cra_init		= cprng_init,</div><div class='add'>+		.cra_exit		= cprng_exit,</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef CONFIG_CRYPTO_FIPS</div><div class='ctx'> }, {</div><div class='del'>-	.cra_name		= "fips(ansi_cprng)",</div><div class='del'>-	.cra_driver_name	= "fips_ansi_cprng",</div><div class='del'>-	.cra_priority		= 300,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_RNG,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct prng_context),</div><div class='del'>-	.cra_type		= &amp;crypto_rng_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_init		= cprng_init,</div><div class='del'>-	.cra_exit		= cprng_exit,</div><div class='del'>-	.cra_u			= {</div><div class='del'>-		.rng = {</div><div class='del'>-			.rng_make_random	= fips_cprng_get_random,</div><div class='del'>-			.rng_reset		= fips_cprng_reset,</div><div class='del'>-			.seedsize = DEFAULT_PRNG_KSZ + 2*DEFAULT_BLK_SZ,</div><div class='del'>-		}</div><div class='add'>+	.generate		= fips_cprng_get_random,</div><div class='add'>+	.seed			= fips_cprng_reset,</div><div class='add'>+	.seedsize		= DEFAULT_PRNG_KSZ + 2 * DEFAULT_BLK_SZ,</div><div class='add'>+	.base			=	{</div><div class='add'>+		.cra_name		= "fips(ansi_cprng)",</div><div class='add'>+		.cra_driver_name	= "fips_ansi_cprng",</div><div class='add'>+		.cra_priority		= 300,</div><div class='add'>+		.cra_ctxsize		= sizeof(struct prng_context),</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+		.cra_init		= cprng_init,</div><div class='add'>+		.cra_exit		= cprng_exit,</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> } };</div><div class='hunk'>@@ -465,12 +459,12 @@ static struct crypto_alg rng_algs[] = { {</div><div class='ctx'> /* Module initalization */</div><div class='ctx'> static int __init prng_mod_init(void)</div><div class='ctx'> {</div><div class='del'>-	return crypto_register_algs(rng_algs, ARRAY_SIZE(rng_algs));</div><div class='add'>+	return crypto_register_rngs(rng_algs, ARRAY_SIZE(rng_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit prng_mod_fini(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_algs(rng_algs, ARRAY_SIZE(rng_algs));</div><div class='add'>+	crypto_unregister_rngs(rng_algs, ARRAY_SIZE(rng_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/asymmetric_keys/asymmetric_keys.h b/crypto/asymmetric_keys/asymmetric_keys.h<br/>index f97330886d58..3f5b537ab33e 100644<br/>--- a/<a href='/drm-misc/tree/crypto/asymmetric_keys/asymmetric_keys.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/asymmetric_keys/asymmetric_keys.h</a><br/>+++ b/<a href='/drm-misc/tree/crypto/asymmetric_keys/asymmetric_keys.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/asymmetric_keys.h</a></div><div class='hunk'>@@ -11,6 +11,9 @@</div><div class='ctx'> </div><div class='ctx'> extern struct asymmetric_key_id *asymmetric_key_hex_to_key_id(const char *id);</div><div class='ctx'> </div><div class='add'>+extern int __asymmetric_key_hex_to_key_id(const char *id,</div><div class='add'>+					  struct asymmetric_key_id *match_id,</div><div class='add'>+					  size_t hexlen);</div><div class='ctx'> static inline</div><div class='ctx'> const struct asymmetric_key_ids *asymmetric_key_ids(const struct key *key)</div><div class='ctx'> {</div><div class='head'>diff --git a/crypto/asymmetric_keys/asymmetric_type.c b/crypto/asymmetric_keys/asymmetric_type.c<br/>index bcbbbd794e1d..b0e4ed23d668 100644<br/>--- a/<a href='/drm-misc/tree/crypto/asymmetric_keys/asymmetric_type.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/asymmetric_keys/asymmetric_type.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/asymmetric_keys/asymmetric_type.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/asymmetric_type.c</a></div><div class='hunk'>@@ -104,6 +104,15 @@ static bool asymmetric_match_key_ids(</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* helper function can be called directly with pre-allocated memory */</div><div class='add'>+inline int __asymmetric_key_hex_to_key_id(const char *id,</div><div class='add'>+				   struct asymmetric_key_id *match_id,</div><div class='add'>+				   size_t hexlen)</div><div class='add'>+{</div><div class='add'>+	match_id-&gt;len = hexlen;</div><div class='add'>+	return hex2bin(match_id-&gt;data, id, hexlen);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * asymmetric_key_hex_to_key_id - Convert a hex string into a key ID.</div><div class='ctx'>  * @id: The ID as a hex string.</div><div class='hunk'>@@ -111,21 +120,20 @@ static bool asymmetric_match_key_ids(</div><div class='ctx'> struct asymmetric_key_id *asymmetric_key_hex_to_key_id(const char *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct asymmetric_key_id *match_id;</div><div class='del'>-	size_t hexlen;</div><div class='add'>+	size_t asciihexlen;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!*id)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='del'>-	hexlen = strlen(id);</div><div class='del'>-	if (hexlen &amp; 1)</div><div class='add'>+	asciihexlen = strlen(id);</div><div class='add'>+	if (asciihexlen &amp; 1)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='del'>-	match_id = kmalloc(sizeof(struct asymmetric_key_id) + hexlen / 2,</div><div class='add'>+	match_id = kmalloc(sizeof(struct asymmetric_key_id) + asciihexlen / 2,</div><div class='ctx'> 			   GFP_KERNEL);</div><div class='ctx'> 	if (!match_id)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	match_id-&gt;len = hexlen / 2;</div><div class='del'>-	ret = hex2bin(match_id-&gt;data, id, hexlen / 2);</div><div class='add'>+	ret = __asymmetric_key_hex_to_key_id(id, match_id, asciihexlen / 2);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		kfree(match_id);</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='head'>diff --git a/crypto/asymmetric_keys/pkcs7_key_type.c b/crypto/asymmetric_keys/pkcs7_key_type.c<br/>index 751f8fd7335d..3d13b042da73 100644<br/>--- a/<a href='/drm-misc/tree/crypto/asymmetric_keys/pkcs7_key_type.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/asymmetric_keys/pkcs7_key_type.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/asymmetric_keys/pkcs7_key_type.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/pkcs7_key_type.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #define pr_fmt(fmt) "PKCS7key: "fmt</div><div class='ctx'> #include &lt;linux/key.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/key-type.h&gt;</div><div class='ctx'> #include &lt;crypto/pkcs7.h&gt;</div><div class='ctx'> #include &lt;keys/user-type.h&gt;</div><div class='head'>diff --git a/crypto/asymmetric_keys/rsa.c b/crypto/asymmetric_keys/rsa.c<br/>index 459cf97a75e2..508b57b77474 100644<br/>--- a/<a href='/drm-misc/tree/crypto/asymmetric_keys/rsa.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/asymmetric_keys/rsa.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/asymmetric_keys/rsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/rsa.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ static int RSAVP1(const struct public_key *key, MPI s, MPI *_m)</div><div class='ctx'> /*</div><div class='ctx'>  * Integer to Octet String conversion [RFC3447 sec 4.1]</div><div class='ctx'>  */</div><div class='del'>-static int RSA_I2OSP(MPI x, size_t xLen, u8 **_X)</div><div class='add'>+static int RSA_I2OSP(MPI x, size_t xLen, u8 **pX)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned X_size, x_size;</div><div class='ctx'> 	int X_sign;</div><div class='hunk'>@@ -147,7 +147,7 @@ static int RSA_I2OSP(MPI x, size_t xLen, u8 **_X)</div><div class='ctx'> 		return -EBADMSG;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*_X = X;</div><div class='add'>+	*pX = X;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/asymmetric_keys/x509_public_key.c b/crypto/asymmetric_keys/x509_public_key.c<br/>index a6c42031628e..24f17e6c5904 100644<br/>--- a/<a href='/drm-misc/tree/crypto/asymmetric_keys/x509_public_key.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/asymmetric_keys/x509_public_key.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/asymmetric_keys/x509_public_key.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/asymmetric_keys/x509_public_key.c</a></div><div class='hunk'>@@ -28,17 +28,30 @@ static bool use_builtin_keys;</div><div class='ctx'> static struct asymmetric_key_id *ca_keyid;</div><div class='ctx'> </div><div class='ctx'> #ifndef MODULE</div><div class='add'>+static struct {</div><div class='add'>+	struct asymmetric_key_id id;</div><div class='add'>+	unsigned char data[10];</div><div class='add'>+} cakey;</div><div class='add'>+</div><div class='ctx'> static int __init ca_keys_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!str)		/* default system keyring */</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if (strncmp(str, "id:", 3) == 0) {</div><div class='del'>-		struct asymmetric_key_id *p;</div><div class='del'>-		p = asymmetric_key_hex_to_key_id(str + 3);</div><div class='del'>-		if (p == ERR_PTR(-EINVAL))</div><div class='del'>-			pr_err("Unparsable hex string in ca_keys\n");</div><div class='del'>-		else if (!IS_ERR(p))</div><div class='add'>+		struct asymmetric_key_id *p = &amp;cakey.id;</div><div class='add'>+		size_t hexlen = (strlen(str) - 3) / 2;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		if (hexlen == 0 || hexlen &gt; sizeof(cakey.data)) {</div><div class='add'>+			pr_err("Missing or invalid ca_keys id\n");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = __asymmetric_key_hex_to_key_id(str + 3, p, hexlen);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			pr_err("Unparsable ca_keys id hex string\n");</div><div class='add'>+		else</div><div class='ctx'> 			ca_keyid = p;	/* owner key 'id:xxxxxx' */</div><div class='ctx'> 	} else if (strcmp(str, "builtin") == 0) {</div><div class='ctx'> 		use_builtin_keys = true;</div><div class='head'>diff --git a/crypto/authenc.c b/crypto/authenc.c<br/>index 78fb16cab13f..3e852299afb4 100644<br/>--- a/<a href='/drm-misc/tree/crypto/authenc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/authenc.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/authenc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/authenc.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/authenc.h&gt;</div><div class='hunk'>@@ -570,13 +570,14 @@ static int crypto_authenc_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 			    crypto_ahash_alignmask(auth) + 1) +</div><div class='ctx'> 		      crypto_ablkcipher_ivsize(enc);</div><div class='ctx'> </div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct authenc_request_ctx) +</div><div class='del'>-				ctx-&gt;reqoff +</div><div class='del'>-				max_t(unsigned int,</div><div class='del'>-				crypto_ahash_reqsize(auth) +</div><div class='del'>-				sizeof(struct ahash_request),</div><div class='del'>-				sizeof(struct skcipher_givcrypt_request) +</div><div class='del'>-				crypto_ablkcipher_reqsize(enc));</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+		sizeof(struct authenc_request_ctx) +</div><div class='add'>+		ctx-&gt;reqoff +</div><div class='add'>+		max_t(unsigned int,</div><div class='add'>+			crypto_ahash_reqsize(auth) +</div><div class='add'>+			sizeof(struct ahash_request),</div><div class='add'>+			sizeof(struct skcipher_givcrypt_request) +</div><div class='add'>+			crypto_ablkcipher_reqsize(enc)));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/authencesn.c b/crypto/authencesn.c<br/>index 024bff2344fc..a3da6770bc9e 100644<br/>--- a/<a href='/drm-misc/tree/crypto/authencesn.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/authencesn.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/authencesn.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/authencesn.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/authenc.h&gt;</div><div class='hunk'>@@ -662,13 +662,14 @@ static int crypto_authenc_esn_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 			    crypto_ahash_alignmask(auth) + 1) +</div><div class='ctx'> 		      crypto_ablkcipher_ivsize(enc);</div><div class='ctx'> </div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct authenc_esn_request_ctx) +</div><div class='del'>-				ctx-&gt;reqoff +</div><div class='del'>-				max_t(unsigned int,</div><div class='del'>-				crypto_ahash_reqsize(auth) +</div><div class='del'>-				sizeof(struct ahash_request),</div><div class='del'>-				sizeof(struct skcipher_givcrypt_request) +</div><div class='del'>-				crypto_ablkcipher_reqsize(enc));</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+		sizeof(struct authenc_esn_request_ctx) +</div><div class='add'>+		ctx-&gt;reqoff +</div><div class='add'>+		max_t(unsigned int,</div><div class='add'>+			crypto_ahash_reqsize(auth) +</div><div class='add'>+			sizeof(struct ahash_request),</div><div class='add'>+			sizeof(struct skcipher_givcrypt_request) +</div><div class='add'>+			crypto_ablkcipher_reqsize(enc)));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/blkcipher.c b/crypto/blkcipher.c<br/>index 0122bec38564..11b981492031 100644<br/>--- a/<a href='/drm-misc/tree/crypto/blkcipher.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/blkcipher.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/blkcipher.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/blkcipher.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='head'>diff --git a/crypto/ccm.c b/crypto/ccm.c<br/>index 003bbbd21a2b..a4d1a5eda18b 100644<br/>--- a/<a href='/drm-misc/tree/crypto/ccm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/ccm.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/ccm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/ccm.c</a></div><div class='hunk'>@@ -453,9 +453,9 @@ static int crypto_ccm_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_tfm_alg_alignmask(tfm);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = align +</div><div class='del'>-				sizeof(struct crypto_ccm_req_priv_ctx) +</div><div class='del'>-				crypto_ablkcipher_reqsize(ctr);</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+		align + sizeof(struct crypto_ccm_req_priv_ctx) +</div><div class='add'>+		crypto_ablkcipher_reqsize(ctr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -729,10 +729,10 @@ static int crypto_rfc4309_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_aead_alignmask(aead);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct aead_request) +</div><div class='del'>-				ALIGN(crypto_aead_reqsize(aead),</div><div class='del'>-				      crypto_tfm_ctx_alignment()) +</div><div class='del'>-				align + 16;</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+		sizeof(struct aead_request) +</div><div class='add'>+		ALIGN(crypto_aead_reqsize(aead), crypto_tfm_ctx_alignment()) +</div><div class='add'>+		align + 16);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/crypto/chacha20_generic.c b/crypto/chacha20_generic.c<br/>new file mode 100644<br/>index 000000000000..fa42e708aa96<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/chacha20_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chacha20_generic.c</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+/*</div><div class='add'>+ * ChaCha20 256-bit cipher algorithm, RFC7539</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#define CHACHA20_NONCE_SIZE 16</div><div class='add'>+#define CHACHA20_KEY_SIZE   32</div><div class='add'>+#define CHACHA20_BLOCK_SIZE 64</div><div class='add'>+</div><div class='add'>+struct chacha20_ctx {</div><div class='add'>+	u32 key[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 rotl32(u32 v, u8 n)</div><div class='add'>+{</div><div class='add'>+	return (v &lt;&lt; n) | (v &gt;&gt; (sizeof(v) * 8 - n));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 le32_to_cpuvp(const void *p)</div><div class='add'>+{</div><div class='add'>+	return le32_to_cpup(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha20_block(u32 *state, void *stream)</div><div class='add'>+{</div><div class='add'>+	u32 x[16], *out = stream;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(x); i++)</div><div class='add'>+		x[i] = state[i];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 20; i += 2) {</div><div class='add'>+		x[0]  += x[4];    x[12] = rotl32(x[12] ^ x[0],  16);</div><div class='add'>+		x[1]  += x[5];    x[13] = rotl32(x[13] ^ x[1],  16);</div><div class='add'>+		x[2]  += x[6];    x[14] = rotl32(x[14] ^ x[2],  16);</div><div class='add'>+		x[3]  += x[7];    x[15] = rotl32(x[15] ^ x[3],  16);</div><div class='add'>+</div><div class='add'>+		x[8]  += x[12];   x[4]  = rotl32(x[4]  ^ x[8],  12);</div><div class='add'>+		x[9]  += x[13];   x[5]  = rotl32(x[5]  ^ x[9],  12);</div><div class='add'>+		x[10] += x[14];   x[6]  = rotl32(x[6]  ^ x[10], 12);</div><div class='add'>+		x[11] += x[15];   x[7]  = rotl32(x[7]  ^ x[11], 12);</div><div class='add'>+</div><div class='add'>+		x[0]  += x[4];    x[12] = rotl32(x[12] ^ x[0],   8);</div><div class='add'>+		x[1]  += x[5];    x[13] = rotl32(x[13] ^ x[1],   8);</div><div class='add'>+		x[2]  += x[6];    x[14] = rotl32(x[14] ^ x[2],   8);</div><div class='add'>+		x[3]  += x[7];    x[15] = rotl32(x[15] ^ x[3],   8);</div><div class='add'>+</div><div class='add'>+		x[8]  += x[12];   x[4]  = rotl32(x[4]  ^ x[8],   7);</div><div class='add'>+		x[9]  += x[13];   x[5]  = rotl32(x[5]  ^ x[9],   7);</div><div class='add'>+		x[10] += x[14];   x[6]  = rotl32(x[6]  ^ x[10],  7);</div><div class='add'>+		x[11] += x[15];   x[7]  = rotl32(x[7]  ^ x[11],  7);</div><div class='add'>+</div><div class='add'>+		x[0]  += x[5];    x[15] = rotl32(x[15] ^ x[0],  16);</div><div class='add'>+		x[1]  += x[6];    x[12] = rotl32(x[12] ^ x[1],  16);</div><div class='add'>+		x[2]  += x[7];    x[13] = rotl32(x[13] ^ x[2],  16);</div><div class='add'>+		x[3]  += x[4];    x[14] = rotl32(x[14] ^ x[3],  16);</div><div class='add'>+</div><div class='add'>+		x[10] += x[15];   x[5]  = rotl32(x[5]  ^ x[10], 12);</div><div class='add'>+		x[11] += x[12];   x[6]  = rotl32(x[6]  ^ x[11], 12);</div><div class='add'>+		x[8]  += x[13];   x[7]  = rotl32(x[7]  ^ x[8],  12);</div><div class='add'>+		x[9]  += x[14];   x[4]  = rotl32(x[4]  ^ x[9],  12);</div><div class='add'>+</div><div class='add'>+		x[0]  += x[5];    x[15] = rotl32(x[15] ^ x[0],   8);</div><div class='add'>+		x[1]  += x[6];    x[12] = rotl32(x[12] ^ x[1],   8);</div><div class='add'>+		x[2]  += x[7];    x[13] = rotl32(x[13] ^ x[2],   8);</div><div class='add'>+		x[3]  += x[4];    x[14] = rotl32(x[14] ^ x[3],   8);</div><div class='add'>+</div><div class='add'>+		x[10] += x[15];   x[5]  = rotl32(x[5]  ^ x[10],  7);</div><div class='add'>+		x[11] += x[12];   x[6]  = rotl32(x[6]  ^ x[11],  7);</div><div class='add'>+		x[8]  += x[13];   x[7]  = rotl32(x[7]  ^ x[8],   7);</div><div class='add'>+		x[9]  += x[14];   x[4]  = rotl32(x[4]  ^ x[9],   7);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(x); i++)</div><div class='add'>+		out[i] = cpu_to_le32(x[i] + state[i]);</div><div class='add'>+</div><div class='add'>+	state[12]++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha20_docrypt(u32 *state, u8 *dst, const u8 *src,</div><div class='add'>+			     unsigned int bytes)</div><div class='add'>+{</div><div class='add'>+	u8 stream[CHACHA20_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+	if (dst != src)</div><div class='add'>+		memcpy(dst, src, bytes);</div><div class='add'>+</div><div class='add'>+	while (bytes &gt;= CHACHA20_BLOCK_SIZE) {</div><div class='add'>+		chacha20_block(state, stream);</div><div class='add'>+		crypto_xor(dst, stream, CHACHA20_BLOCK_SIZE);</div><div class='add'>+		bytes -= CHACHA20_BLOCK_SIZE;</div><div class='add'>+		dst += CHACHA20_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+	if (bytes) {</div><div class='add'>+		chacha20_block(state, stream);</div><div class='add'>+		crypto_xor(dst, stream, bytes);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha20_init(u32 *state, struct chacha20_ctx *ctx, u8 *iv)</div><div class='add'>+{</div><div class='add'>+	static const char constant[16] = "expand 32-byte k";</div><div class='add'>+</div><div class='add'>+	state[0]  = le32_to_cpuvp(constant +  0);</div><div class='add'>+	state[1]  = le32_to_cpuvp(constant +  4);</div><div class='add'>+	state[2]  = le32_to_cpuvp(constant +  8);</div><div class='add'>+	state[3]  = le32_to_cpuvp(constant + 12);</div><div class='add'>+	state[4]  = ctx-&gt;key[0];</div><div class='add'>+	state[5]  = ctx-&gt;key[1];</div><div class='add'>+	state[6]  = ctx-&gt;key[2];</div><div class='add'>+	state[7]  = ctx-&gt;key[3];</div><div class='add'>+	state[8]  = ctx-&gt;key[4];</div><div class='add'>+	state[9]  = ctx-&gt;key[5];</div><div class='add'>+	state[10] = ctx-&gt;key[6];</div><div class='add'>+	state[11] = ctx-&gt;key[7];</div><div class='add'>+	state[12] = le32_to_cpuvp(iv +  0);</div><div class='add'>+	state[13] = le32_to_cpuvp(iv +  4);</div><div class='add'>+	state[14] = le32_to_cpuvp(iv +  8);</div><div class='add'>+	state[15] = le32_to_cpuvp(iv + 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha20_setkey(struct crypto_tfm *tfm, const u8 *key,</div><div class='add'>+			   unsigned int keysize)</div><div class='add'>+{</div><div class='add'>+	struct chacha20_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (keysize != CHACHA20_KEY_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ctx-&gt;key); i++)</div><div class='add'>+		ctx-&gt;key[i] = le32_to_cpuvp(key + i * sizeof(u32));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha20_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,</div><div class='add'>+			  struct scatterlist *src, unsigned int nbytes)</div><div class='add'>+{</div><div class='add'>+	struct blkcipher_walk walk;</div><div class='add'>+	u32 state[16];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	blkcipher_walk_init(&amp;walk, dst, src, nbytes);</div><div class='add'>+	err = blkcipher_walk_virt_block(desc, &amp;walk, CHACHA20_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	chacha20_init(state, crypto_blkcipher_ctx(desc-&gt;tfm), walk.iv);</div><div class='add'>+</div><div class='add'>+	while (walk.nbytes &gt;= CHACHA20_BLOCK_SIZE) {</div><div class='add'>+		chacha20_docrypt(state, walk.dst.virt.addr, walk.src.virt.addr,</div><div class='add'>+				 rounddown(walk.nbytes, CHACHA20_BLOCK_SIZE));</div><div class='add'>+		err = blkcipher_walk_done(desc, &amp;walk,</div><div class='add'>+					  walk.nbytes % CHACHA20_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (walk.nbytes) {</div><div class='add'>+		chacha20_docrypt(state, walk.dst.virt.addr, walk.src.virt.addr,</div><div class='add'>+				 walk.nbytes);</div><div class='add'>+		err = blkcipher_walk_done(desc, &amp;walk, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_alg alg = {</div><div class='add'>+	.cra_name		= "chacha20",</div><div class='add'>+	.cra_driver_name	= "chacha20-generic",</div><div class='add'>+	.cra_priority		= 100,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize		= 1,</div><div class='add'>+	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct chacha20_ctx),</div><div class='add'>+	.cra_alignmask		= sizeof(u32) - 1,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u			= {</div><div class='add'>+		.blkcipher = {</div><div class='add'>+			.min_keysize	= CHACHA20_KEY_SIZE,</div><div class='add'>+			.max_keysize	= CHACHA20_KEY_SIZE,</div><div class='add'>+			.ivsize		= CHACHA20_NONCE_SIZE,</div><div class='add'>+			.geniv		= "seqiv",</div><div class='add'>+			.setkey		= chacha20_setkey,</div><div class='add'>+			.encrypt	= chacha20_crypt,</div><div class='add'>+			.decrypt	= chacha20_crypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init chacha20_generic_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	return crypto_register_alg(&amp;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit chacha20_generic_mod_fini(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_alg(&amp;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(chacha20_generic_mod_init);</div><div class='add'>+module_exit(chacha20_generic_mod_fini);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("chacha20 cipher algorithm");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20-generic");</div><div class='head'>diff --git a/crypto/chacha20poly1305.c b/crypto/chacha20poly1305.c<br/>new file mode 100644<br/>index 000000000000..7b46ed799a64<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/chacha20poly1305.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chacha20poly1305.c</a></div><div class='hunk'>@@ -0,0 +1,695 @@</div><div class='add'>+/*</div><div class='add'>+ * ChaCha20-Poly1305 AEAD, RFC7539</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "internal.h"</div><div class='add'>+</div><div class='add'>+#define POLY1305_BLOCK_SIZE	16</div><div class='add'>+#define POLY1305_DIGEST_SIZE	16</div><div class='add'>+#define POLY1305_KEY_SIZE	32</div><div class='add'>+#define CHACHA20_KEY_SIZE	32</div><div class='add'>+#define CHACHA20_IV_SIZE	16</div><div class='add'>+#define CHACHAPOLY_IV_SIZE	12</div><div class='add'>+</div><div class='add'>+struct chachapoly_instance_ctx {</div><div class='add'>+	struct crypto_skcipher_spawn chacha;</div><div class='add'>+	struct crypto_ahash_spawn poly;</div><div class='add'>+	unsigned int saltlen;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct chachapoly_ctx {</div><div class='add'>+	struct crypto_ablkcipher *chacha;</div><div class='add'>+	struct crypto_ahash *poly;</div><div class='add'>+	/* key bytes we use for the ChaCha20 IV */</div><div class='add'>+	unsigned int saltlen;</div><div class='add'>+	u8 salt[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct poly_req {</div><div class='add'>+	/* zero byte padding for AD/ciphertext, as needed */</div><div class='add'>+	u8 pad[POLY1305_BLOCK_SIZE];</div><div class='add'>+	/* tail data with AD/ciphertext lengths */</div><div class='add'>+	struct {</div><div class='add'>+		__le64 assoclen;</div><div class='add'>+		__le64 cryptlen;</div><div class='add'>+	} tail;</div><div class='add'>+	struct scatterlist src[1];</div><div class='add'>+	struct ahash_request req; /* must be last member */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct chacha_req {</div><div class='add'>+	u8 iv[CHACHA20_IV_SIZE];</div><div class='add'>+	struct scatterlist src[1];</div><div class='add'>+	struct ablkcipher_request req; /* must be last member */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct chachapoly_req_ctx {</div><div class='add'>+	/* the key we generate for Poly1305 using Chacha20 */</div><div class='add'>+	u8 key[POLY1305_KEY_SIZE];</div><div class='add'>+	/* calculated Poly1305 tag */</div><div class='add'>+	u8 tag[POLY1305_DIGEST_SIZE];</div><div class='add'>+	/* length of data to en/decrypt, without ICV */</div><div class='add'>+	unsigned int cryptlen;</div><div class='add'>+	union {</div><div class='add'>+		struct poly_req poly;</div><div class='add'>+		struct chacha_req chacha;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void async_done_continue(struct aead_request *req, int err,</div><div class='add'>+				       int (*cont)(struct aead_request *))</div><div class='add'>+{</div><div class='add'>+	if (!err)</div><div class='add'>+		err = cont(req);</div><div class='add'>+</div><div class='add'>+	if (err != -EINPROGRESS &amp;&amp; err != -EBUSY)</div><div class='add'>+		aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_iv(u8 *iv, struct aead_request *req, u32 icb)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	__le32 leicb = cpu_to_le32(icb);</div><div class='add'>+</div><div class='add'>+	memcpy(iv, &amp;leicb, sizeof(leicb));</div><div class='add'>+	memcpy(iv + sizeof(leicb), ctx-&gt;salt, ctx-&gt;saltlen);</div><div class='add'>+	memcpy(iv + sizeof(leicb) + ctx-&gt;saltlen, req-&gt;iv,</div><div class='add'>+	       CHACHA20_IV_SIZE - sizeof(leicb) - ctx-&gt;saltlen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_verify_tag(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	u8 tag[sizeof(rctx-&gt;tag)];</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(tag, req-&gt;src, rctx-&gt;cryptlen, sizeof(tag), 0);</div><div class='add'>+	if (crypto_memneq(tag, rctx-&gt;tag, sizeof(tag)))</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_copy_tag(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;tag, req-&gt;dst, rctx-&gt;cryptlen,</div><div class='add'>+				 sizeof(rctx-&gt;tag), 1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_decrypt_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_verify_tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct chacha_req *creq = &amp;rctx-&gt;u.chacha;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chacha_iv(creq-&gt;iv, req, 1);</div><div class='add'>+</div><div class='add'>+	ablkcipher_request_set_callback(&amp;creq-&gt;req, aead_request_flags(req),</div><div class='add'>+					chacha_decrypt_done, req);</div><div class='add'>+	ablkcipher_request_set_tfm(&amp;creq-&gt;req, ctx-&gt;chacha);</div><div class='add'>+	ablkcipher_request_set_crypt(&amp;creq-&gt;req, req-&gt;src, req-&gt;dst,</div><div class='add'>+				     rctx-&gt;cryptlen, creq-&gt;iv);</div><div class='add'>+	err = crypto_ablkcipher_decrypt(&amp;creq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_verify_tag(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_tail_continue(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;cryptlen == req-&gt;cryptlen) /* encrypting */</div><div class='add'>+		return poly_copy_tag(req);</div><div class='add'>+</div><div class='add'>+	return chacha_decrypt(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_tail_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_tail_continue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_tail(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	__le64 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sg_init_table(preq-&gt;src, 1);</div><div class='add'>+	len = cpu_to_le64(req-&gt;assoclen);</div><div class='add'>+	memcpy(&amp;preq-&gt;tail.assoclen, &amp;len, sizeof(len));</div><div class='add'>+	len = cpu_to_le64(rctx-&gt;cryptlen);</div><div class='add'>+	memcpy(&amp;preq-&gt;tail.cryptlen, &amp;len, sizeof(len));</div><div class='add'>+	sg_set_buf(preq-&gt;src, &amp;preq-&gt;tail, sizeof(preq-&gt;tail));</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_tail_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src,</div><div class='add'>+				rctx-&gt;tag, sizeof(preq-&gt;tail));</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_finup(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_tail_continue(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_cipherpad_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_cipherpad(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	unsigned int padlen, bs = POLY1305_BLOCK_SIZE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	padlen = (bs - (rctx-&gt;cryptlen % bs)) % bs;</div><div class='add'>+	memset(preq-&gt;pad, 0, sizeof(preq-&gt;pad));</div><div class='add'>+	sg_init_table(preq-&gt;src, 1);</div><div class='add'>+	sg_set_buf(preq-&gt;src, &amp;preq-&gt;pad, padlen);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_cipherpad_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, padlen);</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_tail(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_cipher_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_cipherpad);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_cipher(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	struct scatterlist *crypt = req-&gt;src;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;cryptlen == req-&gt;cryptlen) /* encrypting */</div><div class='add'>+		crypt = req-&gt;dst;</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_cipher_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, crypt, NULL, rctx-&gt;cryptlen);</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_cipherpad(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_adpad_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_cipher);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_adpad(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	unsigned int padlen, bs = POLY1305_BLOCK_SIZE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	padlen = (bs - (req-&gt;assoclen % bs)) % bs;</div><div class='add'>+	memset(preq-&gt;pad, 0, sizeof(preq-&gt;pad));</div><div class='add'>+	sg_init_table(preq-&gt;src, 1);</div><div class='add'>+	sg_set_buf(preq-&gt;src, preq-&gt;pad, padlen);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_adpad_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, padlen);</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_cipher(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_ad_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_adpad);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_ad(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_ad_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, req-&gt;assoc, NULL, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_adpad(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_setkey_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_ad);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_setkey(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sg_init_table(preq-&gt;src, 1);</div><div class='add'>+	sg_set_buf(preq-&gt;src, rctx-&gt;key, sizeof(rctx-&gt;key));</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_setkey_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, sizeof(rctx-&gt;key));</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_ad(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_init_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_setkey);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_init(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(&amp;preq-&gt;req, aead_request_flags(req),</div><div class='add'>+				   poly_init_done, req);</div><div class='add'>+	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+</div><div class='add'>+	err = crypto_ahash_init(&amp;preq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_setkey(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly_genkey_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_init);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly_genkey(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct chacha_req *creq = &amp;rctx-&gt;u.chacha;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sg_init_table(creq-&gt;src, 1);</div><div class='add'>+	memset(rctx-&gt;key, 0, sizeof(rctx-&gt;key));</div><div class='add'>+	sg_set_buf(creq-&gt;src, rctx-&gt;key, sizeof(rctx-&gt;key));</div><div class='add'>+</div><div class='add'>+	chacha_iv(creq-&gt;iv, req, 0);</div><div class='add'>+</div><div class='add'>+	ablkcipher_request_set_callback(&amp;creq-&gt;req, aead_request_flags(req),</div><div class='add'>+					poly_genkey_done, req);</div><div class='add'>+	ablkcipher_request_set_tfm(&amp;creq-&gt;req, ctx-&gt;chacha);</div><div class='add'>+	ablkcipher_request_set_crypt(&amp;creq-&gt;req, creq-&gt;src, creq-&gt;src,</div><div class='add'>+				     POLY1305_KEY_SIZE, creq-&gt;iv);</div><div class='add'>+</div><div class='add'>+	err = crypto_ablkcipher_decrypt(&amp;creq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_init(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_encrypt_done(struct crypto_async_request *areq, int err)</div><div class='add'>+{</div><div class='add'>+	async_done_continue(areq-&gt;data, err, poly_genkey);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct chacha_req *creq = &amp;rctx-&gt;u.chacha;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chacha_iv(creq-&gt;iv, req, 1);</div><div class='add'>+</div><div class='add'>+	ablkcipher_request_set_callback(&amp;creq-&gt;req, aead_request_flags(req),</div><div class='add'>+					chacha_encrypt_done, req);</div><div class='add'>+	ablkcipher_request_set_tfm(&amp;creq-&gt;req, ctx-&gt;chacha);</div><div class='add'>+	ablkcipher_request_set_crypt(&amp;creq-&gt;req, req-&gt;src, req-&gt;dst,</div><div class='add'>+				     req-&gt;cryptlen, creq-&gt;iv);</div><div class='add'>+	err = crypto_ablkcipher_encrypt(&amp;creq-&gt;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return poly_genkey(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chachapoly_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;cryptlen = req-&gt;cryptlen;</div><div class='add'>+</div><div class='add'>+	/* encrypt call chain:</div><div class='add'>+	 * - chacha_encrypt/done()</div><div class='add'>+	 * - poly_genkey/done()</div><div class='add'>+	 * - poly_init/done()</div><div class='add'>+	 * - poly_setkey/done()</div><div class='add'>+	 * - poly_ad/done()</div><div class='add'>+	 * - poly_adpad/done()</div><div class='add'>+	 * - poly_cipher/done()</div><div class='add'>+	 * - poly_cipherpad/done()</div><div class='add'>+	 * - poly_tail/done/continue()</div><div class='add'>+	 * - poly_copy_tag()</div><div class='add'>+	 */</div><div class='add'>+	return chacha_encrypt(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chachapoly_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; POLY1305_DIGEST_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	rctx-&gt;cryptlen = req-&gt;cryptlen - POLY1305_DIGEST_SIZE;</div><div class='add'>+</div><div class='add'>+	/* decrypt call chain:</div><div class='add'>+	 * - poly_genkey/done()</div><div class='add'>+	 * - poly_init/done()</div><div class='add'>+	 * - poly_setkey/done()</div><div class='add'>+	 * - poly_ad/done()</div><div class='add'>+	 * - poly_adpad/done()</div><div class='add'>+	 * - poly_cipher/done()</div><div class='add'>+	 * - poly_cipherpad/done()</div><div class='add'>+	 * - poly_tail/done/continue()</div><div class='add'>+	 * - chacha_decrypt/done()</div><div class='add'>+	 * - poly_verify_tag()</div><div class='add'>+	 */</div><div class='add'>+	return poly_genkey(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chachapoly_setkey(struct crypto_aead *aead, const u8 *key,</div><div class='add'>+			     unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_aead_ctx(aead);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (keylen != ctx-&gt;saltlen + CHACHA20_KEY_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	keylen -= ctx-&gt;saltlen;</div><div class='add'>+	memcpy(ctx-&gt;salt, key + keylen, ctx-&gt;saltlen);</div><div class='add'>+</div><div class='add'>+	crypto_ablkcipher_clear_flags(ctx-&gt;chacha, CRYPTO_TFM_REQ_MASK);</div><div class='add'>+	crypto_ablkcipher_set_flags(ctx-&gt;chacha, crypto_aead_get_flags(aead) &amp;</div><div class='add'>+				    CRYPTO_TFM_REQ_MASK);</div><div class='add'>+</div><div class='add'>+	err = crypto_ablkcipher_setkey(ctx-&gt;chacha, key, keylen);</div><div class='add'>+	crypto_aead_set_flags(aead, crypto_ablkcipher_get_flags(ctx-&gt;chacha) &amp;</div><div class='add'>+			      CRYPTO_TFM_RES_MASK);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chachapoly_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	if (authsize != POLY1305_DIGEST_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chachapoly_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_instance *inst = (void *)tfm-&gt;__crt_alg;</div><div class='add'>+	struct chachapoly_instance_ctx *ictx = crypto_instance_ctx(inst);</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_ablkcipher *chacha;</div><div class='add'>+	struct crypto_ahash *poly;</div><div class='add'>+	unsigned long align;</div><div class='add'>+</div><div class='add'>+	poly = crypto_spawn_ahash(&amp;ictx-&gt;poly);</div><div class='add'>+	if (IS_ERR(poly))</div><div class='add'>+		return PTR_ERR(poly);</div><div class='add'>+</div><div class='add'>+	chacha = crypto_spawn_skcipher(&amp;ictx-&gt;chacha);</div><div class='add'>+	if (IS_ERR(chacha)) {</div><div class='add'>+		crypto_free_ahash(poly);</div><div class='add'>+		return PTR_ERR(chacha);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;chacha = chacha;</div><div class='add'>+	ctx-&gt;poly = poly;</div><div class='add'>+	ctx-&gt;saltlen = ictx-&gt;saltlen;</div><div class='add'>+</div><div class='add'>+	align = crypto_tfm_alg_alignmask(tfm);</div><div class='add'>+	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+				align + offsetof(struct chachapoly_req_ctx, u) +</div><div class='add'>+				max(offsetof(struct chacha_req, req) +</div><div class='add'>+				    sizeof(struct ablkcipher_request) +</div><div class='add'>+				    crypto_ablkcipher_reqsize(chacha),</div><div class='add'>+				    offsetof(struct poly_req, req) +</div><div class='add'>+				    sizeof(struct ahash_request) +</div><div class='add'>+				    crypto_ahash_reqsize(poly)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chachapoly_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	crypto_free_ahash(ctx-&gt;poly);</div><div class='add'>+	crypto_free_ablkcipher(ctx-&gt;chacha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_instance *chachapoly_alloc(struct rtattr **tb,</div><div class='add'>+						const char *name,</div><div class='add'>+						unsigned int ivsize)</div><div class='add'>+{</div><div class='add'>+	struct crypto_attr_type *algt;</div><div class='add'>+	struct crypto_instance *inst;</div><div class='add'>+	struct crypto_alg *chacha;</div><div class='add'>+	struct crypto_alg *poly;</div><div class='add'>+	struct ahash_alg *poly_ahash;</div><div class='add'>+	struct chachapoly_instance_ctx *ctx;</div><div class='add'>+	const char *chacha_name, *poly_name;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (ivsize &gt; CHACHAPOLY_IV_SIZE)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	algt = crypto_get_attr_type(tb);</div><div class='add'>+	if (IS_ERR(algt))</div><div class='add'>+		return ERR_CAST(algt);</div><div class='add'>+</div><div class='add'>+	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_AEAD) &amp; algt-&gt;mask)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	chacha_name = crypto_attr_alg_name(tb[1]);</div><div class='add'>+	if (IS_ERR(chacha_name))</div><div class='add'>+		return ERR_CAST(chacha_name);</div><div class='add'>+	poly_name = crypto_attr_alg_name(tb[2]);</div><div class='add'>+	if (IS_ERR(poly_name))</div><div class='add'>+		return ERR_CAST(poly_name);</div><div class='add'>+</div><div class='add'>+	poly = crypto_find_alg(poly_name, &amp;crypto_ahash_type,</div><div class='add'>+			       CRYPTO_ALG_TYPE_HASH,</div><div class='add'>+			       CRYPTO_ALG_TYPE_AHASH_MASK);</div><div class='add'>+	if (IS_ERR(poly))</div><div class='add'>+		return ERR_CAST(poly);</div><div class='add'>+</div><div class='add'>+	err = -ENOMEM;</div><div class='add'>+	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!inst)</div><div class='add'>+		goto out_put_poly;</div><div class='add'>+</div><div class='add'>+	ctx = crypto_instance_ctx(inst);</div><div class='add'>+	ctx-&gt;saltlen = CHACHAPOLY_IV_SIZE - ivsize;</div><div class='add'>+	poly_ahash = container_of(poly, struct ahash_alg, halg.base);</div><div class='add'>+	err = crypto_init_ahash_spawn(&amp;ctx-&gt;poly, &amp;poly_ahash-&gt;halg, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_inst;</div><div class='add'>+</div><div class='add'>+	crypto_set_skcipher_spawn(&amp;ctx-&gt;chacha, inst);</div><div class='add'>+	err = crypto_grab_skcipher(&amp;ctx-&gt;chacha, chacha_name, 0,</div><div class='add'>+				   crypto_requires_sync(algt-&gt;type,</div><div class='add'>+							algt-&gt;mask));</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_drop_poly;</div><div class='add'>+</div><div class='add'>+	chacha = crypto_skcipher_spawn_alg(&amp;ctx-&gt;chacha);</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	/* Need 16-byte IV size, including Initial Block Counter value */</div><div class='add'>+	if (chacha-&gt;cra_ablkcipher.ivsize != CHACHA20_IV_SIZE)</div><div class='add'>+		goto out_drop_chacha;</div><div class='add'>+	/* Not a stream cipher? */</div><div class='add'>+	if (chacha-&gt;cra_blocksize != 1)</div><div class='add'>+		goto out_drop_chacha;</div><div class='add'>+</div><div class='add'>+	err = -ENAMETOOLONG;</div><div class='add'>+	if (snprintf(inst-&gt;alg.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "%s(%s,%s)", name, chacha_name,</div><div class='add'>+		     poly_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		goto out_drop_chacha;</div><div class='add'>+	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "%s(%s,%s)", name, chacha-&gt;cra_driver_name,</div><div class='add'>+		     poly-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		goto out_drop_chacha;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD;</div><div class='add'>+	inst-&gt;alg.cra_flags |= (chacha-&gt;cra_flags |</div><div class='add'>+				poly-&gt;cra_flags) &amp; CRYPTO_ALG_ASYNC;</div><div class='add'>+	inst-&gt;alg.cra_priority = (chacha-&gt;cra_priority +</div><div class='add'>+				  poly-&gt;cra_priority) / 2;</div><div class='add'>+	inst-&gt;alg.cra_blocksize = 1;</div><div class='add'>+	inst-&gt;alg.cra_alignmask = chacha-&gt;cra_alignmask | poly-&gt;cra_alignmask;</div><div class='add'>+	inst-&gt;alg.cra_type = &amp;crypto_nivaead_type;</div><div class='add'>+	inst-&gt;alg.cra_aead.ivsize = ivsize;</div><div class='add'>+	inst-&gt;alg.cra_aead.maxauthsize = POLY1305_DIGEST_SIZE;</div><div class='add'>+	inst-&gt;alg.cra_ctxsize = sizeof(struct chachapoly_ctx) + ctx-&gt;saltlen;</div><div class='add'>+	inst-&gt;alg.cra_init = chachapoly_init;</div><div class='add'>+	inst-&gt;alg.cra_exit = chachapoly_exit;</div><div class='add'>+	inst-&gt;alg.cra_aead.encrypt = chachapoly_encrypt;</div><div class='add'>+	inst-&gt;alg.cra_aead.decrypt = chachapoly_decrypt;</div><div class='add'>+	inst-&gt;alg.cra_aead.setkey = chachapoly_setkey;</div><div class='add'>+	inst-&gt;alg.cra_aead.setauthsize = chachapoly_setauthsize;</div><div class='add'>+	inst-&gt;alg.cra_aead.geniv = "seqiv";</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	crypto_mod_put(poly);</div><div class='add'>+	return inst;</div><div class='add'>+</div><div class='add'>+out_drop_chacha:</div><div class='add'>+	crypto_drop_skcipher(&amp;ctx-&gt;chacha);</div><div class='add'>+err_drop_poly:</div><div class='add'>+	crypto_drop_ahash(&amp;ctx-&gt;poly);</div><div class='add'>+err_free_inst:</div><div class='add'>+	kfree(inst);</div><div class='add'>+out_put_poly:</div><div class='add'>+	inst = ERR_PTR(err);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_instance *rfc7539_alloc(struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	return chachapoly_alloc(tb, "rfc7539", 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_instance *rfc7539esp_alloc(struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	return chachapoly_alloc(tb, "rfc7539esp", 8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chachapoly_free(struct crypto_instance *inst)</div><div class='add'>+{</div><div class='add'>+	struct chachapoly_instance_ctx *ctx = crypto_instance_ctx(inst);</div><div class='add'>+</div><div class='add'>+	crypto_drop_skcipher(&amp;ctx-&gt;chacha);</div><div class='add'>+	crypto_drop_ahash(&amp;ctx-&gt;poly);</div><div class='add'>+	kfree(inst);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_template rfc7539_tmpl = {</div><div class='add'>+	.name = "rfc7539",</div><div class='add'>+	.alloc = rfc7539_alloc,</div><div class='add'>+	.free = chachapoly_free,</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct crypto_template rfc7539esp_tmpl = {</div><div class='add'>+	.name = "rfc7539esp",</div><div class='add'>+	.alloc = rfc7539esp_alloc,</div><div class='add'>+	.free = chachapoly_free,</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init chacha20poly1305_module_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_template(&amp;rfc7539_tmpl);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_template(&amp;rfc7539esp_tmpl);</div><div class='add'>+	if (err)</div><div class='add'>+		crypto_unregister_template(&amp;rfc7539_tmpl);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit chacha20poly1305_module_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_template(&amp;rfc7539esp_tmpl);</div><div class='add'>+	crypto_unregister_template(&amp;rfc7539_tmpl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(chacha20poly1305_module_init);</div><div class='add'>+module_exit(chacha20poly1305_module_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ChaCha20-Poly1305 AEAD");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20poly1305");</div><div class='add'>+MODULE_ALIAS_CRYPTO("rfc7539");</div><div class='add'>+MODULE_ALIAS_CRYPTO("rfc7539esp");</div><div class='head'>diff --git a/crypto/chainiv.c b/crypto/chainiv.c<br/>index 63c17d5992f7..b4340018c8d4 100644<br/>--- a/<a href='/drm-misc/tree/crypto/chainiv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/chainiv.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/chainiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/chainiv.c</a></div><div class='hunk'>@@ -80,44 +80,37 @@ unlock:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int chainiv_givencrypt_first(struct skcipher_givcrypt_request *req)</div><div class='add'>+static int chainiv_init_common(struct crypto_tfm *tfm, char iv[])</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ablkcipher *geniv = skcipher_givcrypt_reqtfm(req);</div><div class='del'>-	struct chainiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='add'>+	struct crypto_ablkcipher *geniv = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-	if (crypto_ablkcipher_crt(geniv)-&gt;givencrypt !=</div><div class='del'>-	    chainiv_givencrypt_first)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	crypto_ablkcipher_crt(geniv)-&gt;givencrypt = chainiv_givencrypt;</div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;iv,</div><div class='del'>-				   crypto_ablkcipher_ivsize(geniv));</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return chainiv_givencrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chainiv_init_common(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='ctx'> 	tfm-&gt;crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request);</div><div class='ctx'> </div><div class='del'>-	return skcipher_geniv_init(tfm);</div><div class='add'>+	if (iv) {</div><div class='add'>+		err = crypto_rng_get_bytes(crypto_default_rng, iv,</div><div class='add'>+					   crypto_ablkcipher_ivsize(geniv));</div><div class='add'>+		crypto_put_default_rng();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err ?: skcipher_geniv_init(tfm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int chainiv_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_ablkcipher *geniv = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	struct chainiv_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	char *iv;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	return chainiv_init_common(tfm);</div><div class='add'>+	iv = NULL;</div><div class='add'>+	if (!crypto_get_default_rng()) {</div><div class='add'>+		crypto_ablkcipher_crt(geniv)-&gt;givencrypt = chainiv_givencrypt;</div><div class='add'>+		iv = ctx-&gt;iv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return chainiv_init_common(tfm, iv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int async_chainiv_schedule_work(struct async_chainiv_ctx *ctx)</div><div class='hunk'>@@ -205,33 +198,6 @@ postpone:</div><div class='ctx'> 	return async_chainiv_postpone_request(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int async_chainiv_givencrypt_first(struct skcipher_givcrypt_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ablkcipher *geniv = skcipher_givcrypt_reqtfm(req);</div><div class='del'>-	struct async_chainiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (test_and_set_bit(CHAINIV_STATE_INUSE, &amp;ctx-&gt;state))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (crypto_ablkcipher_crt(geniv)-&gt;givencrypt !=</div><div class='del'>-	    async_chainiv_givencrypt_first)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	crypto_ablkcipher_crt(geniv)-&gt;givencrypt = async_chainiv_givencrypt;</div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;iv,</div><div class='del'>-				   crypto_ablkcipher_ivsize(geniv));</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	clear_bit(CHAINIV_STATE_INUSE, &amp;ctx-&gt;state);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return async_chainiv_givencrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void async_chainiv_do_postponed(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct async_chainiv_ctx *ctx = container_of(work,</div><div class='hunk'>@@ -263,14 +229,23 @@ static void async_chainiv_do_postponed(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static int async_chainiv_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_ablkcipher *geniv = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	struct async_chainiv_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	char *iv;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	crypto_init_queue(&amp;ctx-&gt;queue, 100);</div><div class='ctx'> 	INIT_WORK(&amp;ctx-&gt;postponed, async_chainiv_do_postponed);</div><div class='ctx'> </div><div class='del'>-	return chainiv_init_common(tfm);</div><div class='add'>+	iv = NULL;</div><div class='add'>+	if (!crypto_get_default_rng()) {</div><div class='add'>+		crypto_ablkcipher_crt(geniv)-&gt;givencrypt =</div><div class='add'>+			async_chainiv_givencrypt;</div><div class='add'>+		iv = ctx-&gt;iv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return chainiv_init_common(tfm, iv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_chainiv_exit(struct crypto_tfm *tfm)</div><div class='hunk'>@@ -288,21 +263,14 @@ static struct crypto_instance *chainiv_alloc(struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='ctx'> 	struct crypto_instance *inst;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='ctx'> 		return ERR_CAST(algt);</div><div class='ctx'> </div><div class='del'>-	err = crypto_get_default_rng();</div><div class='del'>-	if (err)</div><div class='del'>-		return ERR_PTR(err);</div><div class='del'>-</div><div class='ctx'> 	inst = skcipher_geniv_alloc(&amp;chainiv_tmpl, tb, 0, 0);</div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='del'>-		goto put_rng;</div><div class='del'>-</div><div class='del'>-	inst-&gt;alg.cra_ablkcipher.givencrypt = chainiv_givencrypt_first;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.cra_init = chainiv_init;</div><div class='ctx'> 	inst-&gt;alg.cra_exit = skcipher_geniv_exit;</div><div class='hunk'>@@ -312,9 +280,6 @@ static struct crypto_instance *chainiv_alloc(struct rtattr **tb)</div><div class='ctx'> 	if (!crypto_requires_sync(algt-&gt;type, algt-&gt;mask)) {</div><div class='ctx'> 		inst-&gt;alg.cra_flags |= CRYPTO_ALG_ASYNC;</div><div class='ctx'> </div><div class='del'>-		inst-&gt;alg.cra_ablkcipher.givencrypt =</div><div class='del'>-			async_chainiv_givencrypt_first;</div><div class='del'>-</div><div class='ctx'> 		inst-&gt;alg.cra_init = async_chainiv_init;</div><div class='ctx'> 		inst-&gt;alg.cra_exit = async_chainiv_exit;</div><div class='ctx'> </div><div class='hunk'>@@ -325,22 +290,12 @@ static struct crypto_instance *chainiv_alloc(struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return inst;</div><div class='del'>-</div><div class='del'>-put_rng:</div><div class='del'>-	crypto_put_default_rng();</div><div class='del'>-	goto out;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chainiv_free(struct crypto_instance *inst)</div><div class='del'>-{</div><div class='del'>-	skcipher_geniv_free(inst);</div><div class='del'>-	crypto_put_default_rng();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template chainiv_tmpl = {</div><div class='ctx'> 	.name = "chainiv",</div><div class='ctx'> 	.alloc = chainiv_alloc,</div><div class='del'>-	.free = chainiv_free,</div><div class='add'>+	.free = skcipher_geniv_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/cryptd.c b/crypto/cryptd.c<br/>index b0602ba03111..22ba81f76764 100644<br/>--- a/<a href='/drm-misc/tree/crypto/cryptd.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/cryptd.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/cryptd.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/cryptd.c</a></div><div class='hunk'>@@ -295,6 +295,23 @@ static void cryptd_blkcipher_exit_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	crypto_free_blkcipher(ctx-&gt;child);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int cryptd_init_instance(struct crypto_instance *inst,</div><div class='add'>+				struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "cryptd(%s)",</div><div class='add'>+		     alg-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		return -ENAMETOOLONG;</div><div class='add'>+</div><div class='add'>+	memcpy(inst-&gt;alg.cra_name, alg-&gt;cra_name, CRYPTO_MAX_ALG_NAME);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_priority = alg-&gt;cra_priority + 50;</div><div class='add'>+	inst-&gt;alg.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='add'>+	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void *cryptd_alloc_instance(struct crypto_alg *alg, unsigned int head,</div><div class='ctx'> 				   unsigned int tail)</div><div class='ctx'> {</div><div class='hunk'>@@ -308,17 +325,10 @@ static void *cryptd_alloc_instance(struct crypto_alg *alg, unsigned int head,</div><div class='ctx'> </div><div class='ctx'> 	inst = (void *)(p + head);</div><div class='ctx'> </div><div class='del'>-	err = -ENAMETOOLONG;</div><div class='del'>-	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "cryptd(%s)", alg-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+	err = cryptd_init_instance(inst, alg);</div><div class='add'>+	if (err)</div><div class='ctx'> 		goto out_free_inst;</div><div class='ctx'> </div><div class='del'>-	memcpy(inst-&gt;alg.cra_name, alg-&gt;cra_name, CRYPTO_MAX_ALG_NAME);</div><div class='del'>-</div><div class='del'>-	inst-&gt;alg.cra_priority = alg-&gt;cra_priority + 50;</div><div class='del'>-	inst-&gt;alg.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='del'>-	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='del'>-</div><div class='ctx'> out:</div><div class='ctx'> 	return p;</div><div class='ctx'> </div><div class='hunk'>@@ -654,6 +664,24 @@ out_put_alg:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int cryptd_aead_setkey(struct crypto_aead *parent,</div><div class='add'>+			      const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct cryptd_aead_ctx *ctx = crypto_aead_ctx(parent);</div><div class='add'>+	struct crypto_aead *child = ctx-&gt;child;</div><div class='add'>+</div><div class='add'>+	return crypto_aead_setkey(child, key, keylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryptd_aead_setauthsize(struct crypto_aead *parent,</div><div class='add'>+				   unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	struct cryptd_aead_ctx *ctx = crypto_aead_ctx(parent);</div><div class='add'>+	struct crypto_aead *child = ctx-&gt;child;</div><div class='add'>+</div><div class='add'>+	return crypto_aead_setauthsize(child, authsize);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void cryptd_aead_crypt(struct aead_request *req,</div><div class='ctx'> 			struct crypto_aead *child,</div><div class='ctx'> 			int err,</div><div class='hunk'>@@ -715,27 +743,26 @@ static int cryptd_aead_decrypt_enqueue(struct aead_request *req)</div><div class='ctx'> 	return cryptd_aead_enqueue(req, cryptd_aead_decrypt );</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cryptd_aead_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static int cryptd_aead_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);</div><div class='del'>-	struct aead_instance_ctx *ictx = crypto_instance_ctx(inst);</div><div class='add'>+	struct aead_instance *inst = aead_alg_instance(tfm);</div><div class='add'>+	struct aead_instance_ctx *ictx = aead_instance_ctx(inst);</div><div class='ctx'> 	struct crypto_aead_spawn *spawn = &amp;ictx-&gt;aead_spawn;</div><div class='del'>-	struct cryptd_aead_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct cryptd_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_aead *cipher;</div><div class='ctx'> </div><div class='ctx'> 	cipher = crypto_spawn_aead(spawn);</div><div class='ctx'> 	if (IS_ERR(cipher))</div><div class='ctx'> 		return PTR_ERR(cipher);</div><div class='ctx'> </div><div class='del'>-	crypto_aead_set_flags(cipher, CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='ctx'> 	ctx-&gt;child = cipher;</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct cryptd_aead_request_ctx);</div><div class='add'>+	crypto_aead_set_reqsize(tfm, sizeof(struct cryptd_aead_request_ctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cryptd_aead_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void cryptd_aead_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_aead_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct cryptd_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -744,57 +771,57 @@ static int cryptd_create_aead(struct crypto_template *tmpl,</div><div class='ctx'> 			      struct cryptd_queue *queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_instance_ctx *ctx;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='del'>-	struct crypto_alg *alg;</div><div class='del'>-	u32 type = CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	u32 mask = CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	const char *name;</div><div class='add'>+	u32 type = 0;</div><div class='add'>+	u32 mask = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	cryptd_check_internal(tb, &amp;type, &amp;mask);</div><div class='ctx'> </div><div class='del'>-	alg = crypto_get_attr_alg(tb, type, mask);</div><div class='del'>-        if (IS_ERR(alg))</div><div class='del'>-		return PTR_ERR(alg);</div><div class='add'>+	name = crypto_attr_alg_name(tb[1]);</div><div class='add'>+	if (IS_ERR(name))</div><div class='add'>+		return PTR_ERR(name);</div><div class='ctx'> </div><div class='del'>-	inst = cryptd_alloc_instance(alg, 0, sizeof(*ctx));</div><div class='del'>-	err = PTR_ERR(inst);</div><div class='del'>-	if (IS_ERR(inst))</div><div class='del'>-		goto out_put_alg;</div><div class='add'>+	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!inst)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ctx = crypto_instance_ctx(inst);</div><div class='add'>+	ctx = aead_instance_ctx(inst);</div><div class='ctx'> 	ctx-&gt;queue = queue;</div><div class='ctx'> </div><div class='del'>-	err = crypto_init_spawn(&amp;ctx-&gt;aead_spawn.base, alg, inst,</div><div class='del'>-			CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC);</div><div class='add'>+	crypto_set_aead_spawn(&amp;ctx-&gt;aead_spawn, aead_crypto_instance(inst));</div><div class='add'>+	err = crypto_grab_aead(&amp;ctx-&gt;aead_spawn, name, type, mask);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_inst;</div><div class='ctx'> </div><div class='del'>-	type = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;</div><div class='del'>-	if (alg-&gt;cra_flags &amp; CRYPTO_ALG_INTERNAL)</div><div class='del'>-		type |= CRYPTO_ALG_INTERNAL;</div><div class='del'>-	inst-&gt;alg.cra_flags = type;</div><div class='del'>-	inst-&gt;alg.cra_type = alg-&gt;cra_type;</div><div class='del'>-	inst-&gt;alg.cra_ctxsize = sizeof(struct cryptd_aead_ctx);</div><div class='del'>-	inst-&gt;alg.cra_init = cryptd_aead_init_tfm;</div><div class='del'>-	inst-&gt;alg.cra_exit = cryptd_aead_exit_tfm;</div><div class='del'>-	inst-&gt;alg.cra_aead.setkey      = alg-&gt;cra_aead.setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = alg-&gt;cra_aead.setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.geniv       = alg-&gt;cra_aead.geniv;</div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize      = alg-&gt;cra_aead.ivsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = alg-&gt;cra_aead.maxauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt     = cryptd_aead_encrypt_enqueue;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt     = cryptd_aead_decrypt_enqueue;</div><div class='del'>-	inst-&gt;alg.cra_aead.givencrypt  = alg-&gt;cra_aead.givencrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.givdecrypt  = alg-&gt;cra_aead.givdecrypt;</div><div class='add'>+	alg = crypto_spawn_aead_alg(&amp;ctx-&gt;aead_spawn);</div><div class='add'>+	err = cryptd_init_instance(aead_crypto_instance(inst), &amp;alg-&gt;base);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_drop_aead;</div><div class='ctx'> </div><div class='del'>-	err = crypto_register_instance(tmpl, inst);</div><div class='add'>+	inst-&gt;alg.base.cra_flags = CRYPTO_ALG_ASYNC |</div><div class='add'>+				   (alg-&gt;base.cra_flags &amp; CRYPTO_ALG_INTERNAL);</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct cryptd_aead_ctx);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.ivsize = crypto_aead_alg_ivsize(alg);</div><div class='add'>+	inst-&gt;alg.maxauthsize = crypto_aead_alg_maxauthsize(alg);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.init = cryptd_aead_init_tfm;</div><div class='add'>+	inst-&gt;alg.exit = cryptd_aead_exit_tfm;</div><div class='add'>+	inst-&gt;alg.setkey = cryptd_aead_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = cryptd_aead_setauthsize;</div><div class='add'>+	inst-&gt;alg.encrypt = cryptd_aead_encrypt_enqueue;</div><div class='add'>+	inst-&gt;alg.decrypt = cryptd_aead_decrypt_enqueue;</div><div class='add'>+</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		crypto_drop_spawn(&amp;ctx-&gt;aead_spawn.base);</div><div class='add'>+out_drop_aead:</div><div class='add'>+		crypto_drop_aead(&amp;ctx-&gt;aead_spawn);</div><div class='ctx'> out_free_inst:</div><div class='ctx'> 		kfree(inst);</div><div class='ctx'> 	}</div><div class='del'>-out_put_alg:</div><div class='del'>-	crypto_mod_put(alg);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -832,8 +859,8 @@ static void cryptd_free(struct crypto_instance *inst)</div><div class='ctx'> 		kfree(ahash_instance(inst));</div><div class='ctx'> 		return;</div><div class='ctx'> 	case CRYPTO_ALG_TYPE_AEAD:</div><div class='del'>-		crypto_drop_spawn(&amp;aead_ctx-&gt;aead_spawn.base);</div><div class='del'>-		kfree(inst);</div><div class='add'>+		crypto_drop_aead(&amp;aead_ctx-&gt;aead_spawn);</div><div class='add'>+		kfree(aead_instance(inst));</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='ctx'> 		crypto_drop_spawn(&amp;ctx-&gt;spawn);</div><div class='head'>diff --git a/crypto/crypto_null.c b/crypto/crypto_null.c<br/>index a20319132e33..941c9a434d50 100644<br/>--- a/<a href='/drm-misc/tree/crypto/crypto_null.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/crypto_null.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/crypto_null.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/crypto_null.c</a></div><div class='hunk'>@@ -25,6 +25,10 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='add'>+static DEFINE_MUTEX(crypto_default_null_skcipher_lock);</div><div class='add'>+static struct crypto_blkcipher *crypto_default_null_skcipher;</div><div class='add'>+static int crypto_default_null_skcipher_refcnt;</div><div class='add'>+</div><div class='ctx'> static int null_compress(struct crypto_tfm *tfm, const u8 *src,</div><div class='ctx'> 			 unsigned int slen, u8 *dst, unsigned int *dlen)</div><div class='ctx'> {</div><div class='hunk'>@@ -149,6 +153,41 @@ MODULE_ALIAS_CRYPTO("compress_null");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("digest_null");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("cipher_null");</div><div class='ctx'> </div><div class='add'>+struct crypto_blkcipher *crypto_get_default_null_skcipher(void)</div><div class='add'>+{</div><div class='add'>+	struct crypto_blkcipher *tfm;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;crypto_default_null_skcipher_lock);</div><div class='add'>+	tfm = crypto_default_null_skcipher;</div><div class='add'>+</div><div class='add'>+	if (!tfm) {</div><div class='add'>+		tfm = crypto_alloc_blkcipher("ecb(cipher_null)", 0, 0);</div><div class='add'>+		if (IS_ERR(tfm))</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		crypto_default_null_skcipher = tfm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_default_null_skcipher_refcnt++;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;crypto_default_null_skcipher_lock);</div><div class='add'>+</div><div class='add'>+	return tfm;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_get_default_null_skcipher);</div><div class='add'>+</div><div class='add'>+void crypto_put_default_null_skcipher(void)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;crypto_default_null_skcipher_lock);</div><div class='add'>+	if (!--crypto_default_null_skcipher_refcnt) {</div><div class='add'>+		crypto_free_blkcipher(crypto_default_null_skcipher);</div><div class='add'>+		crypto_default_null_skcipher = NULL;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;crypto_default_null_skcipher_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_put_default_null_skcipher);</div><div class='add'>+</div><div class='ctx'> static int __init crypto_null_mod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='head'>diff --git a/crypto/crypto_user.c b/crypto/crypto_user.c<br/>index 41dfe762b7fb..08ea2867fc8a 100644<br/>--- a/<a href='/drm-misc/tree/crypto/crypto_user.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/crypto_user.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/crypto_user.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/crypto_user.c</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;crypto/internal/rng.h&gt;</div><div class='add'>+#include &lt;crypto/akcipher.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='hunk'>@@ -110,6 +112,21 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int crypto_report_akcipher(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_report_akcipher rakcipher;</div><div class='add'>+</div><div class='add'>+	strncpy(rakcipher.type, "akcipher", sizeof(rakcipher.type));</div><div class='add'>+</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_AKCIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_akcipher), &amp;rakcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int crypto_report_one(struct crypto_alg *alg,</div><div class='ctx'> 			     struct crypto_user_alg *ualg, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='hunk'>@@ -154,6 +171,12 @@ static int crypto_report_one(struct crypto_alg *alg,</div><div class='ctx'> 			goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case CRYPTO_ALG_TYPE_AKCIPHER:</div><div class='add'>+		if (crypto_report_akcipher(skb, alg))</div><div class='add'>+			goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -450,13 +473,21 @@ static int crypto_add_alg(struct sk_buff *skb, struct nlmsghdr *nlh,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int crypto_del_rng(struct sk_buff *skb, struct nlmsghdr *nlh,</div><div class='add'>+			  struct nlattr **attrs)</div><div class='add'>+{</div><div class='add'>+	if (!netlink_capable(skb, CAP_NET_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+	return crypto_del_default_rng();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define MSGSIZE(type) sizeof(struct type)</div><div class='ctx'> </div><div class='ctx'> static const int crypto_msg_min[CRYPTO_NR_MSGTYPES] = {</div><div class='ctx'> 	[CRYPTO_MSG_NEWALG	- CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg),</div><div class='ctx'> 	[CRYPTO_MSG_DELALG	- CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg),</div><div class='ctx'> 	[CRYPTO_MSG_UPDATEALG	- CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg),</div><div class='del'>-	[CRYPTO_MSG_GETALG	- CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg),</div><div class='add'>+	[CRYPTO_MSG_DELRNG	- CRYPTO_MSG_BASE] = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy crypto_policy[CRYPTOCFGA_MAX+1] = {</div><div class='hunk'>@@ -476,6 +507,7 @@ static const struct crypto_link {</div><div class='ctx'> 	[CRYPTO_MSG_GETALG	- CRYPTO_MSG_BASE] = { .doit = crypto_report,</div><div class='ctx'> 						       .dump = crypto_dump_report,</div><div class='ctx'> 						       .done = crypto_dump_report_done},</div><div class='add'>+	[CRYPTO_MSG_DELRNG	- CRYPTO_MSG_BASE] = { .doit = crypto_del_rng },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int crypto_user_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)</div><div class='head'>diff --git a/crypto/drbg.c b/crypto/drbg.c<br/>index b69409cb7e6a..a7c23146b87f 100644<br/>--- a/<a href='/drm-misc/tree/crypto/drbg.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/drbg.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/drbg.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/drbg.c</a></div><div class='hunk'>@@ -98,6 +98,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/drbg.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************</div><div class='ctx'>  * Backend cipher definitions available to DRBG</div><div class='hunk'>@@ -190,6 +191,8 @@ static const struct drbg_core drbg_cores[] = {</div><div class='ctx'> #endif /* CONFIG_CRYPTO_DRBG_HMAC */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int drbg_uninstantiate(struct drbg_state *drbg);</div><div class='add'>+</div><div class='ctx'> /******************************************************************</div><div class='ctx'>  * Generic helper functions</div><div class='ctx'>  ******************************************************************/</div><div class='hunk'>@@ -235,7 +238,7 @@ static bool drbg_fips_continuous_test(struct drbg_state *drbg,</div><div class='ctx'> #ifdef CONFIG_CRYPTO_FIPS</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	/* skip test if we test the overall system */</div><div class='del'>-	if (drbg-&gt;test_data)</div><div class='add'>+	if (list_empty(&amp;drbg-&gt;test_data.list))</div><div class='ctx'> 		return true;</div><div class='ctx'> 	/* only perform test in FIPS mode */</div><div class='ctx'> 	if (0 == fips_enabled)</div><div class='hunk'>@@ -487,7 +490,7 @@ static int drbg_ctr_df(struct drbg_state *drbg,</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	memset(iv, 0, drbg_blocklen(drbg));</div><div class='del'>-	memset(temp, 0, drbg_statelen(drbg));</div><div class='add'>+	memset(temp, 0, drbg_statelen(drbg) + drbg_blocklen(drbg));</div><div class='ctx'> 	memset(pad, 0, drbg_blocklen(drbg));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1041,6 +1044,58 @@ static struct drbg_state_ops drbg_hash_ops = {</div><div class='ctx'>  * Functions common for DRBG implementations</div><div class='ctx'>  ******************************************************************/</div><div class='ctx'> </div><div class='add'>+static inline int __drbg_seed(struct drbg_state *drbg, struct list_head *seed,</div><div class='add'>+			      int reseed)</div><div class='add'>+{</div><div class='add'>+	int ret = drbg-&gt;d_ops-&gt;update(drbg, seed, reseed);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	drbg-&gt;seeded = true;</div><div class='add'>+	/* 10.1.1.2 / 10.1.1.3 step 5 */</div><div class='add'>+	drbg-&gt;reseed_ctr = 1;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drbg_async_seed(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct drbg_string data;</div><div class='add'>+	LIST_HEAD(seedlist);</div><div class='add'>+	struct drbg_state *drbg = container_of(work, struct drbg_state,</div><div class='add'>+					       seed_work);</div><div class='add'>+	unsigned int entropylen = drbg_sec_strength(drbg-&gt;core-&gt;flags);</div><div class='add'>+	unsigned char entropy[32];</div><div class='add'>+</div><div class='add'>+	BUG_ON(!entropylen);</div><div class='add'>+	BUG_ON(entropylen &gt; sizeof(entropy));</div><div class='add'>+	get_random_bytes(entropy, entropylen);</div><div class='add'>+</div><div class='add'>+	drbg_string_fill(&amp;data, entropy, entropylen);</div><div class='add'>+	list_add_tail(&amp;data.list, &amp;seedlist);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+</div><div class='add'>+	/* If nonblocking pool is initialized, deactivate Jitter RNG */</div><div class='add'>+	crypto_free_rng(drbg-&gt;jent);</div><div class='add'>+	drbg-&gt;jent = NULL;</div><div class='add'>+</div><div class='add'>+	/* Set seeded to false so that if __drbg_seed fails the</div><div class='add'>+	 * next generate call will trigger a reseed.</div><div class='add'>+	 */</div><div class='add'>+	drbg-&gt;seeded = false;</div><div class='add'>+</div><div class='add'>+	__drbg_seed(drbg, &amp;seedlist, true);</div><div class='add'>+</div><div class='add'>+	if (drbg-&gt;seeded)</div><div class='add'>+		drbg-&gt;reseed_threshold = drbg_max_requests(drbg);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+</div><div class='add'>+	memzero_explicit(entropy, entropylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Seeding or reseeding of the DRBG</div><div class='ctx'>  *</div><div class='hunk'>@@ -1055,9 +1110,9 @@ static struct drbg_state_ops drbg_hash_ops = {</div><div class='ctx'> static int drbg_seed(struct drbg_state *drbg, struct drbg_string *pers,</div><div class='ctx'> 		     bool reseed)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	unsigned char *entropy = NULL;</div><div class='del'>-	size_t entropylen = 0;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned char entropy[((32 + 16) * 2)];</div><div class='add'>+	unsigned int entropylen = drbg_sec_strength(drbg-&gt;core-&gt;flags);</div><div class='ctx'> 	struct drbg_string data1;</div><div class='ctx'> 	LIST_HEAD(seedlist);</div><div class='ctx'> </div><div class='hunk'>@@ -1068,31 +1123,45 @@ static int drbg_seed(struct drbg_state *drbg, struct drbg_string *pers,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (drbg-&gt;test_data &amp;&amp; drbg-&gt;test_data-&gt;testentropy) {</div><div class='del'>-		drbg_string_fill(&amp;data1, drbg-&gt;test_data-&gt;testentropy-&gt;buf,</div><div class='del'>-				 drbg-&gt;test_data-&gt;testentropy-&gt;len);</div><div class='add'>+	if (list_empty(&amp;drbg-&gt;test_data.list)) {</div><div class='add'>+		drbg_string_fill(&amp;data1, drbg-&gt;test_data.buf,</div><div class='add'>+				 drbg-&gt;test_data.len);</div><div class='ctx'> 		pr_devel("DRBG: using test entropy\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Gather entropy equal to the security strength of the DRBG.</div><div class='ctx'> 		 * With a derivation function, a nonce is required in addition</div><div class='ctx'> 		 * to the entropy. A nonce must be at least 1/2 of the security</div><div class='del'>-		 * strength of the DRBG in size. Thus, entropy * nonce is 3/2</div><div class='add'>+		 * strength of the DRBG in size. Thus, entropy + nonce is 3/2</div><div class='ctx'> 		 * of the strength. The consideration of a nonce is only</div><div class='ctx'> 		 * applicable during initial seeding.</div><div class='ctx'> 		 */</div><div class='del'>-		entropylen = drbg_sec_strength(drbg-&gt;core-&gt;flags);</div><div class='del'>-		if (!entropylen)</div><div class='del'>-			return -EFAULT;</div><div class='add'>+		BUG_ON(!entropylen);</div><div class='ctx'> 		if (!reseed)</div><div class='ctx'> 			entropylen = ((entropylen + 1) / 2) * 3;</div><div class='del'>-		pr_devel("DRBG: (re)seeding with %zu bytes of entropy\n",</div><div class='del'>-			 entropylen);</div><div class='del'>-		entropy = kzalloc(entropylen, GFP_KERNEL);</div><div class='del'>-		if (!entropy)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		BUG_ON((entropylen * 2) &gt; sizeof(entropy));</div><div class='add'>+</div><div class='add'>+		/* Get seed from in-kernel /dev/urandom */</div><div class='ctx'> 		get_random_bytes(entropy, entropylen);</div><div class='del'>-		drbg_string_fill(&amp;data1, entropy, entropylen);</div><div class='add'>+</div><div class='add'>+		if (!drbg-&gt;jent) {</div><div class='add'>+			drbg_string_fill(&amp;data1, entropy, entropylen);</div><div class='add'>+			pr_devel("DRBG: (re)seeding with %u bytes of entropy\n",</div><div class='add'>+				 entropylen);</div><div class='add'>+		} else {</div><div class='add'>+			/* Get seed from Jitter RNG */</div><div class='add'>+			ret = crypto_rng_get_bytes(drbg-&gt;jent,</div><div class='add'>+						   entropy + entropylen,</div><div class='add'>+						   entropylen);</div><div class='add'>+			if (ret) {</div><div class='add'>+				pr_devel("DRBG: jent failed with %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			drbg_string_fill(&amp;data1, entropy, entropylen * 2);</div><div class='add'>+			pr_devel("DRBG: (re)seeding with %u bytes of entropy\n",</div><div class='add'>+				 entropylen * 2);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	list_add_tail(&amp;data1.list, &amp;seedlist);</div><div class='ctx'> </div><div class='hunk'>@@ -1111,16 +1180,10 @@ static int drbg_seed(struct drbg_state *drbg, struct drbg_string *pers,</div><div class='ctx'> 		memset(drbg-&gt;C, 0, drbg_statelen(drbg));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = drbg-&gt;d_ops-&gt;update(drbg, &amp;seedlist, reseed);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+	ret = __drbg_seed(drbg, &amp;seedlist, reseed);</div><div class='ctx'> </div><div class='del'>-	drbg-&gt;seeded = true;</div><div class='del'>-	/* 10.1.1.2 / 10.1.1.3 step 5 */</div><div class='del'>-	drbg-&gt;reseed_ctr = 1;</div><div class='add'>+	memzero_explicit(entropy, entropylen * 2);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	kzfree(entropy);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1136,6 +1199,8 @@ static inline void drbg_dealloc_state(struct drbg_state *drbg)</div><div class='ctx'> 	kzfree(drbg-&gt;scratchpad);</div><div class='ctx'> 	drbg-&gt;scratchpad = NULL;</div><div class='ctx'> 	drbg-&gt;reseed_ctr = 0;</div><div class='add'>+	drbg-&gt;d_ops = NULL;</div><div class='add'>+	drbg-&gt;core = NULL;</div><div class='ctx'> #ifdef CONFIG_CRYPTO_FIPS</div><div class='ctx'> 	kzfree(drbg-&gt;prev);</div><div class='ctx'> 	drbg-&gt;prev = NULL;</div><div class='hunk'>@@ -1152,6 +1217,27 @@ static inline int drbg_alloc_state(struct drbg_state *drbg)</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='ctx'> 	unsigned int sb_size = 0;</div><div class='ctx'> </div><div class='add'>+	switch (drbg-&gt;core-&gt;flags &amp; DRBG_TYPE_MASK) {</div><div class='add'>+#ifdef CONFIG_CRYPTO_DRBG_HMAC</div><div class='add'>+	case DRBG_HMAC:</div><div class='add'>+		drbg-&gt;d_ops = &amp;drbg_hmac_ops;</div><div class='add'>+		break;</div><div class='add'>+#endif /* CONFIG_CRYPTO_DRBG_HMAC */</div><div class='add'>+#ifdef CONFIG_CRYPTO_DRBG_HASH</div><div class='add'>+	case DRBG_HASH:</div><div class='add'>+		drbg-&gt;d_ops = &amp;drbg_hash_ops;</div><div class='add'>+		break;</div><div class='add'>+#endif /* CONFIG_CRYPTO_DRBG_HASH */</div><div class='add'>+#ifdef CONFIG_CRYPTO_DRBG_CTR</div><div class='add'>+	case DRBG_CTR:</div><div class='add'>+		drbg-&gt;d_ops = &amp;drbg_ctr_ops;</div><div class='add'>+		break;</div><div class='add'>+#endif /* CONFIG_CRYPTO_DRBG_CTR */</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	drbg-&gt;V = kmalloc(drbg_statelen(drbg), GFP_KERNEL);</div><div class='ctx'> 	if (!drbg-&gt;V)</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -1181,87 +1267,14 @@ static inline int drbg_alloc_state(struct drbg_state *drbg)</div><div class='ctx'> 		if (!drbg-&gt;scratchpad)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_init(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	drbg_dealloc_state(drbg);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Strategy to avoid holding long term locks: generate a shadow copy of DRBG</div><div class='del'>- * and perform all operations on this shadow copy. After finishing, restore</div><div class='del'>- * the updated state of the shadow copy into original drbg state. This way,</div><div class='del'>- * only the read and write operations of the original drbg state must be</div><div class='del'>- * locked</div><div class='del'>- */</div><div class='del'>-static inline void drbg_copy_drbg(struct drbg_state *src,</div><div class='del'>-				  struct drbg_state *dst)</div><div class='del'>-{</div><div class='del'>-	if (!src || !dst)</div><div class='del'>-		return;</div><div class='del'>-	memcpy(dst-&gt;V, src-&gt;V, drbg_statelen(src));</div><div class='del'>-	memcpy(dst-&gt;C, src-&gt;C, drbg_statelen(src));</div><div class='del'>-	dst-&gt;reseed_ctr = src-&gt;reseed_ctr;</div><div class='del'>-	dst-&gt;seeded = src-&gt;seeded;</div><div class='del'>-	dst-&gt;pr = src-&gt;pr;</div><div class='del'>-#ifdef CONFIG_CRYPTO_FIPS</div><div class='del'>-	dst-&gt;fips_primed = src-&gt;fips_primed;</div><div class='del'>-	memcpy(dst-&gt;prev, src-&gt;prev, drbg_blocklen(src));</div><div class='del'>-#endif</div><div class='del'>-	/*</div><div class='del'>-	 * Not copied:</div><div class='del'>-	 * scratchpad is initialized drbg_alloc_state;</div><div class='del'>-	 * priv_data is initialized with call to crypto_init;</div><div class='del'>-	 * d_ops and core are set outside, as these parameters are const;</div><div class='del'>-	 * test_data is set outside to prevent it being copied back.</div><div class='del'>-	 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int drbg_make_shadow(struct drbg_state *drbg, struct drbg_state **shadow)</div><div class='del'>-{</div><div class='del'>-	int ret = -ENOMEM;</div><div class='del'>-	struct drbg_state *tmp = NULL;</div><div class='del'>-</div><div class='del'>-	tmp = kzalloc(sizeof(struct drbg_state), GFP_KERNEL);</div><div class='del'>-	if (!tmp)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* read-only data as they are defined as const, no lock needed */</div><div class='del'>-	tmp-&gt;core = drbg-&gt;core;</div><div class='del'>-	tmp-&gt;d_ops = drbg-&gt;d_ops;</div><div class='ctx'> </div><div class='del'>-	ret = drbg_alloc_state(tmp);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	drbg_copy_drbg(drbg, tmp);</div><div class='del'>-	/* only make a link to the test buffer, as we only read that data */</div><div class='del'>-	tmp-&gt;test_data = drbg-&gt;test_data;</div><div class='del'>-	spin_unlock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	*shadow = tmp;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	kzfree(tmp);</div><div class='add'>+	drbg_dealloc_state(drbg);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void drbg_restore_shadow(struct drbg_state *drbg,</div><div class='del'>-				struct drbg_state **shadow)</div><div class='del'>-{</div><div class='del'>-	struct drbg_state *tmp = *shadow;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	drbg_copy_drbg(tmp, drbg);</div><div class='del'>-	spin_unlock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	drbg_dealloc_state(tmp);</div><div class='del'>-	kzfree(tmp);</div><div class='del'>-	*shadow = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*************************************************************************</div><div class='ctx'>  * DRBG interface functions</div><div class='ctx'>  *************************************************************************/</div><div class='hunk'>@@ -1287,14 +1300,12 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 			 struct drbg_string *addtl)</div><div class='ctx'> {</div><div class='ctx'> 	int len = 0;</div><div class='del'>-	struct drbg_state *shadow = NULL;</div><div class='ctx'> 	LIST_HEAD(addtllist);</div><div class='del'>-	struct drbg_string timestamp;</div><div class='del'>-	union {</div><div class='del'>-		cycles_t cycles;</div><div class='del'>-		unsigned char char_cycles[sizeof(cycles_t)];</div><div class='del'>-	} now;</div><div class='ctx'> </div><div class='add'>+	if (!drbg-&gt;core) {</div><div class='add'>+		pr_devel("DRBG: not yet seeded\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> 	if (0 == buflen || !buf) {</div><div class='ctx'> 		pr_devel("DRBG: no output buffer provided\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1304,15 +1315,9 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	len = drbg_make_shadow(drbg, &amp;shadow);</div><div class='del'>-	if (len) {</div><div class='del'>-		pr_devel("DRBG: shadow copy cannot be generated\n");</div><div class='del'>-		return len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* 9.3.1 step 2 */</div><div class='ctx'> 	len = -EINVAL;</div><div class='del'>-	if (buflen &gt; (drbg_max_request_bytes(shadow))) {</div><div class='add'>+	if (buflen &gt; (drbg_max_request_bytes(drbg))) {</div><div class='ctx'> 		pr_devel("DRBG: requested random numbers too large %u\n",</div><div class='ctx'> 			 buflen);</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -1321,7 +1326,7 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 	/* 9.3.1 step 3 is implicit with the chosen DRBG */</div><div class='ctx'> </div><div class='ctx'> 	/* 9.3.1 step 4 */</div><div class='del'>-	if (addtl &amp;&amp; addtl-&gt;len &gt; (drbg_max_addtl(shadow))) {</div><div class='add'>+	if (addtl &amp;&amp; addtl-&gt;len &gt; (drbg_max_addtl(drbg))) {</div><div class='ctx'> 		pr_devel("DRBG: additional information string too long %zu\n",</div><div class='ctx'> 			 addtl-&gt;len);</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -1332,46 +1337,29 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 	 * 9.3.1 step 6 and 9 supplemented by 9.3.2 step c is implemented</div><div class='ctx'> 	 * here. The spec is a bit convoluted here, we make it simpler.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((drbg_max_requests(shadow)) &lt; shadow-&gt;reseed_ctr)</div><div class='del'>-		shadow-&gt;seeded = false;</div><div class='add'>+	if (drbg-&gt;reseed_threshold &lt; drbg-&gt;reseed_ctr)</div><div class='add'>+		drbg-&gt;seeded = false;</div><div class='ctx'> </div><div class='del'>-	/* allocate cipher handle */</div><div class='del'>-	len = shadow-&gt;d_ops-&gt;crypto_init(shadow);</div><div class='del'>-	if (len)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (shadow-&gt;pr || !shadow-&gt;seeded) {</div><div class='add'>+	if (drbg-&gt;pr || !drbg-&gt;seeded) {</div><div class='ctx'> 		pr_devel("DRBG: reseeding before generation (prediction "</div><div class='ctx'> 			 "resistance: %s, state %s)\n",</div><div class='ctx'> 			 drbg-&gt;pr ? "true" : "false",</div><div class='ctx'> 			 drbg-&gt;seeded ? "seeded" : "unseeded");</div><div class='ctx'> 		/* 9.3.1 steps 7.1 through 7.3 */</div><div class='del'>-		len = drbg_seed(shadow, addtl, true);</div><div class='add'>+		len = drbg_seed(drbg, addtl, true);</div><div class='ctx'> 		if (len)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		/* 9.3.1 step 7.4 */</div><div class='ctx'> 		addtl = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Mix the time stamp into the DRBG state if the DRBG is not in</div><div class='del'>-	 * test mode. If there are two callers invoking the DRBG at the same</div><div class='del'>-	 * time, i.e. before the first caller merges its shadow state back,</div><div class='del'>-	 * both callers would obtain the same random number stream without</div><div class='del'>-	 * changing the state here.</div><div class='del'>-	 */</div><div class='del'>-	if (!drbg-&gt;test_data) {</div><div class='del'>-		now.cycles = random_get_entropy();</div><div class='del'>-		drbg_string_fill(&amp;timestamp, now.char_cycles, sizeof(cycles_t));</div><div class='del'>-		list_add_tail(&amp;timestamp.list, &amp;addtllist);</div><div class='del'>-	}</div><div class='ctx'> 	if (addtl &amp;&amp; 0 &lt; addtl-&gt;len)</div><div class='ctx'> 		list_add_tail(&amp;addtl-&gt;list, &amp;addtllist);</div><div class='ctx'> 	/* 9.3.1 step 8 and 10 */</div><div class='del'>-	len = shadow-&gt;d_ops-&gt;generate(shadow, buf, buflen, &amp;addtllist);</div><div class='add'>+	len = drbg-&gt;d_ops-&gt;generate(drbg, buf, buflen, &amp;addtllist);</div><div class='ctx'> </div><div class='ctx'> 	/* 10.1.1.4 step 6, 10.1.2.5 step 7, 10.2.1.5.2 step 7 */</div><div class='del'>-	shadow-&gt;reseed_ctr++;</div><div class='add'>+	drbg-&gt;reseed_ctr++;</div><div class='ctx'> 	if (0 &gt;= len)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='hunk'>@@ -1391,7 +1379,7 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 	 * case somebody has a need to implement the test of 11.3.3.</div><div class='ctx'> 	 */</div><div class='ctx'> #if 0</div><div class='del'>-	if (shadow-&gt;reseed_ctr &amp;&amp; !(shadow-&gt;reseed_ctr % 4096)) {</div><div class='add'>+	if (drbg-&gt;reseed_ctr &amp;&amp; !(drbg-&gt;reseed_ctr % 4096)) {</div><div class='ctx'> 		int err = 0;</div><div class='ctx'> 		pr_devel("DRBG: start to perform self test\n");</div><div class='ctx'> 		if (drbg-&gt;core-&gt;flags &amp; DRBG_HMAC)</div><div class='hunk'>@@ -1410,8 +1398,6 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 			 * are returned when reusing this DRBG cipher handle</div><div class='ctx'> 			 */</div><div class='ctx'> 			drbg_uninstantiate(drbg);</div><div class='del'>-			drbg_dealloc_state(shadow);</div><div class='del'>-			kzfree(shadow);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			pr_devel("DRBG: self test successful\n");</div><div class='hunk'>@@ -1425,8 +1411,6 @@ static int drbg_generate(struct drbg_state *drbg,</div><div class='ctx'> 	 */</div><div class='ctx'> 	len = 0;</div><div class='ctx'> err:</div><div class='del'>-	shadow-&gt;d_ops-&gt;crypto_fini(shadow);</div><div class='del'>-	drbg_restore_shadow(drbg, &amp;shadow);</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1442,19 +1426,68 @@ static int drbg_generate_long(struct drbg_state *drbg,</div><div class='ctx'> 			      unsigned char *buf, unsigned int buflen,</div><div class='ctx'> 			      struct drbg_string *addtl)</div><div class='ctx'> {</div><div class='del'>-	int len = 0;</div><div class='add'>+	unsigned int len = 0;</div><div class='ctx'> 	unsigned int slice = 0;</div><div class='ctx'> 	do {</div><div class='del'>-		int tmplen = 0;</div><div class='add'>+		int err = 0;</div><div class='ctx'> 		unsigned int chunk = 0;</div><div class='ctx'> 		slice = ((buflen - len) / drbg_max_request_bytes(drbg));</div><div class='ctx'> 		chunk = slice ? drbg_max_request_bytes(drbg) : (buflen - len);</div><div class='del'>-		tmplen = drbg_generate(drbg, buf + len, chunk, addtl);</div><div class='del'>-		if (0 &gt;= tmplen)</div><div class='del'>-			return tmplen;</div><div class='del'>-		len += tmplen;</div><div class='add'>+		mutex_lock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+		err = drbg_generate(drbg, buf + len, chunk, addtl);</div><div class='add'>+		mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+		if (0 &gt; err)</div><div class='add'>+			return err;</div><div class='add'>+		len += chunk;</div><div class='ctx'> 	} while (slice &gt; 0 &amp;&amp; (len &lt; buflen));</div><div class='del'>-	return len;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drbg_schedule_async_seed(struct random_ready_callback *rdy)</div><div class='add'>+{</div><div class='add'>+	struct drbg_state *drbg = container_of(rdy, struct drbg_state,</div><div class='add'>+					       random_ready);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;drbg-&gt;seed_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int drbg_prepare_hrng(struct drbg_state *drbg)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* We do not need an HRNG in test mode. */</div><div class='add'>+	if (list_empty(&amp;drbg-&gt;test_data.list))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;drbg-&gt;seed_work, drbg_async_seed);</div><div class='add'>+</div><div class='add'>+	drbg-&gt;random_ready.owner = THIS_MODULE;</div><div class='add'>+	drbg-&gt;random_ready.func = drbg_schedule_async_seed;</div><div class='add'>+</div><div class='add'>+	err = add_random_ready_callback(&amp;drbg-&gt;random_ready);</div><div class='add'>+</div><div class='add'>+	switch (err) {</div><div class='add'>+	case 0:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -EALREADY:</div><div class='add'>+		err = 0;</div><div class='add'>+		/* fall through */</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		drbg-&gt;random_ready.func = NULL;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drbg-&gt;jent = crypto_alloc_rng("jitterentropy_rng", 0, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Require frequent reseeds until the seed source is fully</div><div class='add'>+	 * initialized.</div><div class='add'>+	 */</div><div class='add'>+	drbg-&gt;reseed_threshold = 50;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1477,32 +1510,12 @@ static int drbg_generate_long(struct drbg_state *drbg,</div><div class='ctx'> static int drbg_instantiate(struct drbg_state *drbg, struct drbg_string *pers,</div><div class='ctx'> 			    int coreref, bool pr)</div><div class='ctx'> {</div><div class='del'>-	int ret = -ENOMEM;</div><div class='add'>+	int ret;</div><div class='add'>+	bool reseed = true;</div><div class='ctx'> </div><div class='ctx'> 	pr_devel("DRBG: Initializing DRBG core %d with prediction resistance "</div><div class='ctx'> 		 "%s\n", coreref, pr ? "enabled" : "disabled");</div><div class='del'>-	drbg-&gt;core = &amp;drbg_cores[coreref];</div><div class='del'>-	drbg-&gt;pr = pr;</div><div class='del'>-	drbg-&gt;seeded = false;</div><div class='del'>-	switch (drbg-&gt;core-&gt;flags &amp; DRBG_TYPE_MASK) {</div><div class='del'>-#ifdef CONFIG_CRYPTO_DRBG_HMAC</div><div class='del'>-	case DRBG_HMAC:</div><div class='del'>-		drbg-&gt;d_ops = &amp;drbg_hmac_ops;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_CRYPTO_DRBG_HMAC */</div><div class='del'>-#ifdef CONFIG_CRYPTO_DRBG_HASH</div><div class='del'>-	case DRBG_HASH:</div><div class='del'>-		drbg-&gt;d_ops = &amp;drbg_hash_ops;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_CRYPTO_DRBG_HASH */</div><div class='del'>-#ifdef CONFIG_CRYPTO_DRBG_CTR</div><div class='del'>-	case DRBG_CTR:</div><div class='del'>-		drbg-&gt;d_ops = &amp;drbg_ctr_ops;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_CRYPTO_DRBG_CTR */</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	mutex_lock(&amp;drbg-&gt;drbg_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* 9.1 step 1 is implicit with the selected DRBG type */</div><div class='ctx'> </div><div class='hunk'>@@ -1514,22 +1527,52 @@ static int drbg_instantiate(struct drbg_state *drbg, struct drbg_string *pers,</div><div class='ctx'> </div><div class='ctx'> 	/* 9.1 step 4 is implicit in  drbg_sec_strength */</div><div class='ctx'> </div><div class='del'>-	ret = drbg_alloc_state(drbg);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (!drbg-&gt;core) {</div><div class='add'>+		drbg-&gt;core = &amp;drbg_cores[coreref];</div><div class='add'>+		drbg-&gt;pr = pr;</div><div class='add'>+		drbg-&gt;seeded = false;</div><div class='add'>+		drbg-&gt;reseed_threshold = drbg_max_requests(drbg);</div><div class='ctx'> </div><div class='del'>-	ret = -EFAULT;</div><div class='del'>-	if (drbg-&gt;d_ops-&gt;crypto_init(drbg))</div><div class='del'>-		goto err;</div><div class='del'>-	ret = drbg_seed(drbg, pers, false);</div><div class='del'>-	drbg-&gt;d_ops-&gt;crypto_fini(drbg);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err;</div><div class='add'>+		ret = drbg_alloc_state(drbg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		if (drbg-&gt;d_ops-&gt;crypto_init(drbg))</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = drbg_prepare_hrng(drbg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto free_everything;</div><div class='add'>+</div><div class='add'>+		if (IS_ERR(drbg-&gt;jent)) {</div><div class='add'>+			ret = PTR_ERR(drbg-&gt;jent);</div><div class='add'>+			drbg-&gt;jent = NULL;</div><div class='add'>+			if (fips_enabled || ret != -ENOENT)</div><div class='add'>+				goto free_everything;</div><div class='add'>+			pr_info("DRBG: Continuing without Jitter RNG\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reseed = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = drbg_seed(drbg, pers, reseed);</div><div class='add'>+</div><div class='add'>+	if (ret &amp;&amp; !reseed)</div><div class='add'>+		goto free_everything;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+	return ret;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	drbg_dealloc_state(drbg);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+free_everything:</div><div class='add'>+	mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+	drbg_uninstantiate(drbg);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1544,10 +1587,17 @@ err:</div><div class='ctx'>  */</div><div class='ctx'> static int drbg_uninstantiate(struct drbg_state *drbg)</div><div class='ctx'> {</div><div class='del'>-	spin_lock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='add'>+	if (drbg-&gt;random_ready.func) {</div><div class='add'>+		del_random_ready_callback(&amp;drbg-&gt;random_ready);</div><div class='add'>+		cancel_work_sync(&amp;drbg-&gt;seed_work);</div><div class='add'>+		crypto_free_rng(drbg-&gt;jent);</div><div class='add'>+		drbg-&gt;jent = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (drbg-&gt;d_ops)</div><div class='add'>+		drbg-&gt;d_ops-&gt;crypto_fini(drbg);</div><div class='ctx'> 	drbg_dealloc_state(drbg);</div><div class='ctx'> 	/* no scrubbing of test_data -- this shall survive an uninstantiate */</div><div class='del'>-	spin_unlock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1555,16 +1605,17 @@ static int drbg_uninstantiate(struct drbg_state *drbg)</div><div class='ctx'>  * Helper function for setting the test data in the DRBG</div><div class='ctx'>  *</div><div class='ctx'>  * @drbg DRBG state handle</div><div class='del'>- * @test_data test data to sets</div><div class='add'>+ * @data test data</div><div class='add'>+ * @len test data length</div><div class='ctx'>  */</div><div class='del'>-static inline void drbg_set_testdata(struct drbg_state *drbg,</div><div class='del'>-				     struct drbg_test_data *test_data)</div><div class='add'>+static void drbg_kcapi_set_entropy(struct crypto_rng *tfm,</div><div class='add'>+				   const u8 *data, unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (!test_data || !test_data-&gt;testentropy)</div><div class='del'>-		return;</div><div class='del'>-	spin_lock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='del'>-	drbg-&gt;test_data = test_data;</div><div class='del'>-	spin_unlock_bh(&amp;drbg-&gt;drbg_lock);</div><div class='add'>+	struct drbg_state *drbg = crypto_rng_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+	drbg_string_fill(&amp;drbg-&gt;test_data, data, len);</div><div class='add'>+	mutex_unlock(&amp;drbg-&gt;drbg_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /***************************************************************</div><div class='hunk'>@@ -1584,7 +1635,8 @@ static int drbg_init_hash_kernel(struct drbg_state *drbg)</div><div class='ctx'> </div><div class='ctx'> 	tfm = crypto_alloc_shash(drbg-&gt;core-&gt;backend_cra_name, 0, 0);</div><div class='ctx'> 	if (IS_ERR(tfm)) {</div><div class='del'>-		pr_info("DRBG: could not allocate digest TFM handle\n");</div><div class='add'>+		pr_info("DRBG: could not allocate digest TFM handle: %s\n",</div><div class='add'>+				drbg-&gt;core-&gt;backend_cra_name);</div><div class='ctx'> 		return PTR_ERR(tfm);</div><div class='ctx'> 	}</div><div class='ctx'> 	BUG_ON(drbg_blocklen(drbg) != crypto_shash_digestsize(tfm));</div><div class='hunk'>@@ -1635,7 +1687,8 @@ static int drbg_init_sym_kernel(struct drbg_state *drbg)</div><div class='ctx'> </div><div class='ctx'> 	tfm = crypto_alloc_cipher(drbg-&gt;core-&gt;backend_cra_name, 0, 0);</div><div class='ctx'> 	if (IS_ERR(tfm)) {</div><div class='del'>-		pr_info("DRBG: could not allocate cipher TFM handle\n");</div><div class='add'>+		pr_info("DRBG: could not allocate cipher TFM handle: %s\n",</div><div class='add'>+				drbg-&gt;core-&gt;backend_cra_name);</div><div class='ctx'> 		return PTR_ERR(tfm);</div><div class='ctx'> 	}</div><div class='ctx'> 	BUG_ON(drbg_blocklen(drbg) != crypto_cipher_blocksize(tfm));</div><div class='hunk'>@@ -1714,15 +1767,10 @@ static inline void drbg_convert_tfm_core(const char *cra_driver_name,</div><div class='ctx'> static int drbg_kcapi_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct drbg_state *drbg = crypto_tfm_ctx(tfm);</div><div class='del'>-	bool pr = false;</div><div class='del'>-	int coreref = 0;</div><div class='ctx'> </div><div class='del'>-	drbg_convert_tfm_core(crypto_tfm_alg_driver_name(tfm), &amp;coreref, &amp;pr);</div><div class='del'>-	/*</div><div class='del'>-	 * when personalization string is needed, the caller must call reset</div><div class='del'>-	 * and provide the personalization string as seed information</div><div class='del'>-	 */</div><div class='del'>-	return drbg_instantiate(drbg, NULL, coreref, pr);</div><div class='add'>+	mutex_init(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void drbg_kcapi_cleanup(struct crypto_tfm *tfm)</div><div class='hunk'>@@ -1734,65 +1782,49 @@ static void drbg_kcapi_cleanup(struct crypto_tfm *tfm)</div><div class='ctx'>  * Generate random numbers invoked by the kernel crypto API:</div><div class='ctx'>  * The API of the kernel crypto API is extended as follows:</div><div class='ctx'>  *</div><div class='del'>- * If dlen is larger than zero, rdata is interpreted as the output buffer</div><div class='del'>- * where random data is to be stored.</div><div class='del'>- *</div><div class='del'>- * If dlen is zero, rdata is interpreted as a pointer to a struct drbg_gen</div><div class='del'>- * which holds the additional information string that is used for the</div><div class='del'>- * DRBG generation process. The output buffer that is to be used to store</div><div class='del'>- * data is also pointed to by struct drbg_gen.</div><div class='add'>+ * src is additional input supplied to the RNG.</div><div class='add'>+ * slen is the length of src.</div><div class='add'>+ * dst is the output buffer where random data is to be stored.</div><div class='add'>+ * dlen is the length of dst.</div><div class='ctx'>  */</div><div class='del'>-static int drbg_kcapi_random(struct crypto_rng *tfm, u8 *rdata,</div><div class='del'>-			     unsigned int dlen)</div><div class='add'>+static int drbg_kcapi_random(struct crypto_rng *tfm,</div><div class='add'>+			     const u8 *src, unsigned int slen,</div><div class='add'>+			     u8 *dst, unsigned int dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct drbg_state *drbg = crypto_rng_ctx(tfm);</div><div class='del'>-	if (0 &lt; dlen) {</div><div class='del'>-		return drbg_generate_long(drbg, rdata, dlen, NULL);</div><div class='del'>-	} else {</div><div class='del'>-		struct drbg_gen *data = (struct drbg_gen *)rdata;</div><div class='del'>-		struct drbg_string addtl;</div><div class='del'>-		/* catch NULL pointer */</div><div class='del'>-		if (!data)</div><div class='del'>-			return 0;</div><div class='del'>-		drbg_set_testdata(drbg, data-&gt;test_data);</div><div class='add'>+	struct drbg_string *addtl = NULL;</div><div class='add'>+	struct drbg_string string;</div><div class='add'>+</div><div class='add'>+	if (slen) {</div><div class='ctx'> 		/* linked list variable is now local to allow modification */</div><div class='del'>-		drbg_string_fill(&amp;addtl, data-&gt;addtl-&gt;buf, data-&gt;addtl-&gt;len);</div><div class='del'>-		return drbg_generate_long(drbg, data-&gt;outbuf, data-&gt;outlen,</div><div class='del'>-					  &amp;addtl);</div><div class='add'>+		drbg_string_fill(&amp;string, src, slen);</div><div class='add'>+		addtl = &amp;string;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return drbg_generate_long(drbg, dst, dlen, addtl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Reset the DRBG invoked by the kernel crypto API</div><div class='del'>- * The reset implies a full re-initialization of the DRBG. Similar to the</div><div class='del'>- * generate function of drbg_kcapi_random, this function extends the</div><div class='del'>- * kernel crypto API interface with struct drbg_gen</div><div class='add'>+ * Seed the DRBG invoked by the kernel crypto API</div><div class='ctx'>  */</div><div class='del'>-static int drbg_kcapi_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='add'>+static int drbg_kcapi_seed(struct crypto_rng *tfm,</div><div class='add'>+			   const u8 *seed, unsigned int slen)</div><div class='ctx'> {</div><div class='ctx'> 	struct drbg_state *drbg = crypto_rng_ctx(tfm);</div><div class='ctx'> 	struct crypto_tfm *tfm_base = crypto_rng_tfm(tfm);</div><div class='ctx'> 	bool pr = false;</div><div class='del'>-	struct drbg_string seed_string;</div><div class='add'>+	struct drbg_string string;</div><div class='add'>+	struct drbg_string *seed_string = NULL;</div><div class='ctx'> 	int coreref = 0;</div><div class='ctx'> </div><div class='del'>-	drbg_uninstantiate(drbg);</div><div class='ctx'> 	drbg_convert_tfm_core(crypto_tfm_alg_driver_name(tfm_base), &amp;coreref,</div><div class='ctx'> 			      &amp;pr);</div><div class='ctx'> 	if (0 &lt; slen) {</div><div class='del'>-		drbg_string_fill(&amp;seed_string, seed, slen);</div><div class='del'>-		return drbg_instantiate(drbg, &amp;seed_string, coreref, pr);</div><div class='del'>-	} else {</div><div class='del'>-		struct drbg_gen *data = (struct drbg_gen *)seed;</div><div class='del'>-		/* allow invocation of API call with NULL, 0 */</div><div class='del'>-		if (!data)</div><div class='del'>-			return drbg_instantiate(drbg, NULL, coreref, pr);</div><div class='del'>-		drbg_set_testdata(drbg, data-&gt;test_data);</div><div class='del'>-		/* linked list variable is now local to allow modification */</div><div class='del'>-		drbg_string_fill(&amp;seed_string, data-&gt;addtl-&gt;buf,</div><div class='del'>-				 data-&gt;addtl-&gt;len);</div><div class='del'>-		return drbg_instantiate(drbg, &amp;seed_string, coreref, pr);</div><div class='add'>+		drbg_string_fill(&amp;string, seed, slen);</div><div class='add'>+		seed_string = &amp;string;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return drbg_instantiate(drbg, seed_string, coreref, pr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /***************************************************************</div><div class='hunk'>@@ -1811,7 +1843,6 @@ static int drbg_kcapi_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='ctx'>  */</div><div class='ctx'> static inline int __init drbg_healthcheck_sanity(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_CRYPTO_FIPS</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> #define OUTBUFLEN 16</div><div class='ctx'> 	unsigned char buf[OUTBUFLEN];</div><div class='hunk'>@@ -1839,6 +1870,8 @@ static inline int __init drbg_healthcheck_sanity(void)</div><div class='ctx'> 	if (!drbg)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;drbg-&gt;drbg_mutex);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * if the following tests fail, it is likely that there is a buffer</div><div class='ctx'> 	 * overflow as buf is much smaller than the requested or provided</div><div class='hunk'>@@ -1877,37 +1910,33 @@ static inline int __init drbg_healthcheck_sanity(void)</div><div class='ctx'> outbuf:</div><div class='ctx'> 	kzfree(drbg);</div><div class='ctx'> 	return rc;</div><div class='del'>-#else /* CONFIG_CRYPTO_FIPS */</div><div class='del'>-	return 0;</div><div class='del'>-#endif /* CONFIG_CRYPTO_FIPS */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg drbg_algs[22];</div><div class='add'>+static struct rng_alg drbg_algs[22];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fill the array drbg_algs used to register the different DRBGs</div><div class='ctx'>  * with the kernel crypto API. To fill the array, the information</div><div class='ctx'>  * from drbg_cores[] is used.</div><div class='ctx'>  */</div><div class='del'>-static inline void __init drbg_fill_array(struct crypto_alg *alg,</div><div class='add'>+static inline void __init drbg_fill_array(struct rng_alg *alg,</div><div class='ctx'> 					  const struct drbg_core *core, int pr)</div><div class='ctx'> {</div><div class='ctx'> 	int pos = 0;</div><div class='del'>-	static int priority = 100;</div><div class='add'>+	static int priority = 200;</div><div class='ctx'> </div><div class='del'>-	memset(alg, 0, sizeof(struct crypto_alg));</div><div class='del'>-	memcpy(alg-&gt;cra_name, "stdrng", 6);</div><div class='add'>+	memcpy(alg-&gt;base.cra_name, "stdrng", 6);</div><div class='ctx'> 	if (pr) {</div><div class='del'>-		memcpy(alg-&gt;cra_driver_name, "drbg_pr_", 8);</div><div class='add'>+		memcpy(alg-&gt;base.cra_driver_name, "drbg_pr_", 8);</div><div class='ctx'> 		pos = 8;</div><div class='ctx'> 	} else {</div><div class='del'>-		memcpy(alg-&gt;cra_driver_name, "drbg_nopr_", 10);</div><div class='add'>+		memcpy(alg-&gt;base.cra_driver_name, "drbg_nopr_", 10);</div><div class='ctx'> 		pos = 10;</div><div class='ctx'> 	}</div><div class='del'>-	memcpy(alg-&gt;cra_driver_name + pos, core-&gt;cra_name,</div><div class='add'>+	memcpy(alg-&gt;base.cra_driver_name + pos, core-&gt;cra_name,</div><div class='ctx'> 	       strlen(core-&gt;cra_name));</div><div class='ctx'> </div><div class='del'>-	alg-&gt;cra_priority = priority;</div><div class='add'>+	alg-&gt;base.cra_priority = priority;</div><div class='ctx'> 	priority++;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If FIPS mode enabled, the selected DRBG shall have the</div><div class='hunk'>@@ -1915,17 +1944,16 @@ static inline void __init drbg_fill_array(struct crypto_alg *alg,</div><div class='ctx'> 	 * it is selected.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fips_enabled)</div><div class='del'>-		alg-&gt;cra_priority += 200;</div><div class='del'>-</div><div class='del'>-	alg-&gt;cra_flags		= CRYPTO_ALG_TYPE_RNG;</div><div class='del'>-	alg-&gt;cra_ctxsize 	= sizeof(struct drbg_state);</div><div class='del'>-	alg-&gt;cra_type		= &amp;crypto_rng_type;</div><div class='del'>-	alg-&gt;cra_module		= THIS_MODULE;</div><div class='del'>-	alg-&gt;cra_init		= drbg_kcapi_init;</div><div class='del'>-	alg-&gt;cra_exit		= drbg_kcapi_cleanup;</div><div class='del'>-	alg-&gt;cra_u.rng.rng_make_random	= drbg_kcapi_random;</div><div class='del'>-	alg-&gt;cra_u.rng.rng_reset	= drbg_kcapi_reset;</div><div class='del'>-	alg-&gt;cra_u.rng.seedsize	= 0;</div><div class='add'>+		alg-&gt;base.cra_priority += 200;</div><div class='add'>+</div><div class='add'>+	alg-&gt;base.cra_ctxsize 	= sizeof(struct drbg_state);</div><div class='add'>+	alg-&gt;base.cra_module	= THIS_MODULE;</div><div class='add'>+	alg-&gt;base.cra_init	= drbg_kcapi_init;</div><div class='add'>+	alg-&gt;base.cra_exit	= drbg_kcapi_cleanup;</div><div class='add'>+	alg-&gt;generate		= drbg_kcapi_random;</div><div class='add'>+	alg-&gt;seed		= drbg_kcapi_seed;</div><div class='add'>+	alg-&gt;set_ent		= drbg_kcapi_set_entropy;</div><div class='add'>+	alg-&gt;seedsize		= 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init drbg_init(void)</div><div class='hunk'>@@ -1958,12 +1986,12 @@ static int __init drbg_init(void)</div><div class='ctx'> 		drbg_fill_array(&amp;drbg_algs[i], &amp;drbg_cores[j], 1);</div><div class='ctx'> 	for (j = 0; ARRAY_SIZE(drbg_cores) &gt; j; j++, i++)</div><div class='ctx'> 		drbg_fill_array(&amp;drbg_algs[i], &amp;drbg_cores[j], 0);</div><div class='del'>-	return crypto_register_algs(drbg_algs, (ARRAY_SIZE(drbg_cores) * 2));</div><div class='add'>+	return crypto_register_rngs(drbg_algs, (ARRAY_SIZE(drbg_cores) * 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit drbg_exit(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_algs(drbg_algs, (ARRAY_SIZE(drbg_cores) * 2));</div><div class='add'>+	crypto_unregister_rngs(drbg_algs, (ARRAY_SIZE(drbg_cores) * 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(drbg_init);</div><div class='hunk'>@@ -1984,3 +2012,4 @@ MODULE_DESCRIPTION("NIST SP800-90A Deterministic Random Bit Generator (DRBG) "</div><div class='ctx'> 		   CRYPTO_DRBG_HASH_STRING</div><div class='ctx'> 		   CRYPTO_DRBG_HMAC_STRING</div><div class='ctx'> 		   CRYPTO_DRBG_CTR_STRING);</div><div class='add'>+MODULE_ALIAS_CRYPTO("stdrng");</div><div class='head'>diff --git a/crypto/echainiv.c b/crypto/echainiv.c<br/>new file mode 100644<br/>index 000000000000..b6e43dc61356<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/echainiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/echainiv.c</a></div><div class='hunk'>@@ -0,0 +1,312 @@</div><div class='add'>+/*</div><div class='add'>+ * echainiv: Encrypted Chain IV Generator</div><div class='add'>+ *</div><div class='add'>+ * This generator generates an IV based on a sequence number by xoring it</div><div class='add'>+ * with a salt and then encrypting it with the same key as used to encrypt</div><div class='add'>+ * the plain text.  This algorithm requires that the block size be equal</div><div class='add'>+ * to the IV size.  It is mainly useful for CBC.</div><div class='add'>+ *</div><div class='add'>+ * This generator can only be used by algorithms where authentication</div><div class='add'>+ * is performed after encryption (i.e., authenc).</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Herbert Xu &lt;herbert@gondor.apana.org.au&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the Free</div><div class='add'>+ * Software Foundation; either version 2 of the License, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/geniv.h&gt;</div><div class='add'>+#include &lt;crypto/null.h&gt;</div><div class='add'>+#include &lt;crypto/rng.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX_IV_SIZE 16</div><div class='add'>+</div><div class='add'>+struct echainiv_ctx {</div><div class='add'>+	/* aead_geniv_ctx must be first the element */</div><div class='add'>+	struct aead_geniv_ctx geniv;</div><div class='add'>+	struct crypto_blkcipher *null;</div><div class='add'>+	u8 salt[] __attribute__ ((aligned(__alignof__(u32))));</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(u32 [MAX_IV_SIZE / sizeof(u32)], echainiv_iv);</div><div class='add'>+</div><div class='add'>+/* We don't care if we get preempted and read/write IVs from the next CPU. */</div><div class='add'>+static void echainiv_read_iv(u8 *dst, unsigned size)</div><div class='add'>+{</div><div class='add'>+	u32 *a = (u32 *)dst;</div><div class='add'>+	u32 __percpu *b = echainiv_iv;</div><div class='add'>+</div><div class='add'>+	for (; size &gt;= 4; size -= 4) {</div><div class='add'>+		*a++ = this_cpu_read(*b);</div><div class='add'>+		b++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void echainiv_write_iv(const u8 *src, unsigned size)</div><div class='add'>+{</div><div class='add'>+	const u32 *a = (const u32 *)src;</div><div class='add'>+	u32 __percpu *b = echainiv_iv;</div><div class='add'>+</div><div class='add'>+	for (; size &gt;= 4; size -= 4) {</div><div class='add'>+		this_cpu_write(*b, *a);</div><div class='add'>+		a++;</div><div class='add'>+		b++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void echainiv_encrypt_complete2(struct aead_request *req, int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	struct crypto_aead *geniv;</div><div class='add'>+	unsigned int ivsize;</div><div class='add'>+</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	ivsize = crypto_aead_ivsize(geniv);</div><div class='add'>+</div><div class='add'>+	echainiv_write_iv(subreq-&gt;iv, ivsize);</div><div class='add'>+</div><div class='add'>+	if (req-&gt;iv != subreq-&gt;iv)</div><div class='add'>+		memcpy(req-&gt;iv, subreq-&gt;iv, ivsize);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (req-&gt;iv != subreq-&gt;iv)</div><div class='add'>+		kzfree(subreq-&gt;iv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void echainiv_encrypt_complete(struct crypto_async_request *base,</div><div class='add'>+					 int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = base-&gt;data;</div><div class='add'>+</div><div class='add'>+	echainiv_encrypt_complete2(req, err);</div><div class='add'>+	aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int echainiv_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct echainiv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	u8 *info;</div><div class='add'>+	unsigned int ivsize = crypto_aead_ivsize(geniv);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='add'>+</div><div class='add'>+	compl = echainiv_encrypt_complete;</div><div class='add'>+	data = req;</div><div class='add'>+	info = req-&gt;iv;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;src != req-&gt;dst) {</div><div class='add'>+		struct blkcipher_desc desc = {</div><div class='add'>+			.tfm = ctx-&gt;null,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		err = crypto_blkcipher_encrypt(</div><div class='add'>+			&amp;desc, req-&gt;dst, req-&gt;src,</div><div class='add'>+			req-&gt;assoclen + req-&gt;cryptlen);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!IS_ALIGNED((unsigned long)info,</div><div class='add'>+				 crypto_aead_alignmask(geniv) + 1))) {</div><div class='add'>+		info = kmalloc(ivsize, req-&gt;base.flags &amp;</div><div class='add'>+				       CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL:</div><div class='add'>+								  GFP_ATOMIC);</div><div class='add'>+		if (!info)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		memcpy(info, req-&gt;iv, ivsize);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;dst, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, info);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen + ivsize);</div><div class='add'>+</div><div class='add'>+	crypto_xor(info, ctx-&gt;salt, ivsize);</div><div class='add'>+	scatterwalk_map_and_copy(info, req-&gt;dst, req-&gt;assoclen, ivsize, 1);</div><div class='add'>+	echainiv_read_iv(info, ivsize);</div><div class='add'>+</div><div class='add'>+	err = crypto_aead_encrypt(subreq);</div><div class='add'>+	echainiv_encrypt_complete2(req, err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int echainiv_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct echainiv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	unsigned int ivsize = crypto_aead_ivsize(geniv);</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize + crypto_aead_authsize(geniv))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='add'>+</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen + ivsize);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(req-&gt;iv, req-&gt;src, req-&gt;assoclen, ivsize, 0);</div><div class='add'>+	if (req-&gt;src != req-&gt;dst)</div><div class='add'>+		scatterwalk_map_and_copy(req-&gt;iv, req-&gt;dst,</div><div class='add'>+					 req-&gt;assoclen, ivsize, 1);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_decrypt(subreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int echainiv_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = __crypto_aead_cast(tfm);</div><div class='add'>+	struct echainiv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;ctx-&gt;geniv.lock);</div><div class='add'>+</div><div class='add'>+	crypto_aead_set_reqsize(geniv, sizeof(struct aead_request));</div><div class='add'>+</div><div class='add'>+	err = crypto_get_default_rng();</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='add'>+				   crypto_aead_ivsize(geniv));</div><div class='add'>+	crypto_put_default_rng();</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;null = crypto_get_default_null_skcipher();</div><div class='add'>+	err = PTR_ERR(ctx-&gt;null);</div><div class='add'>+	if (IS_ERR(ctx-&gt;null))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = aead_geniv_init(tfm);</div><div class='add'>+	if (err)</div><div class='add'>+		goto drop_null;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;geniv.child = geniv-&gt;child;</div><div class='add'>+	geniv-&gt;child = geniv;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+drop_null:</div><div class='add'>+	crypto_put_default_null_skcipher();</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void echainiv_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct echainiv_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	crypto_free_aead(ctx-&gt;geniv.child);</div><div class='add'>+	crypto_put_default_null_skcipher();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int echainiv_aead_create(struct crypto_template *tmpl,</div><div class='add'>+				struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct crypto_aead_spawn *spawn;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	inst = aead_geniv_alloc(tmpl, tb, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(inst))</div><div class='add'>+		return PTR_ERR(inst);</div><div class='add'>+</div><div class='add'>+	spawn = aead_instance_ctx(inst);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;base.cra_aead.encrypt)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (inst-&gt;alg.ivsize &amp; (sizeof(u32) - 1) ||</div><div class='add'>+	    inst-&gt;alg.ivsize &gt; MAX_IV_SIZE)</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.encrypt = echainiv_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = echainiv_decrypt;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_init = echainiv_init;</div><div class='add'>+	inst-&gt;alg.base.cra_exit = echainiv_exit;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask |= __alignof__(u32) - 1;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct echainiv_ctx);</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize += inst-&gt;alg.ivsize;</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+free_inst:</div><div class='add'>+	aead_geniv_free(inst);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void echainiv_free(struct crypto_instance *inst)</div><div class='add'>+{</div><div class='add'>+	aead_geniv_free(aead_instance(inst));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_template echainiv_tmpl = {</div><div class='add'>+	.name = "echainiv",</div><div class='add'>+	.create = echainiv_aead_create,</div><div class='add'>+	.free = echainiv_free,</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init echainiv_module_init(void)</div><div class='add'>+{</div><div class='add'>+	return crypto_register_template(&amp;echainiv_tmpl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit echainiv_module_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_template(&amp;echainiv_tmpl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(echainiv_module_init);</div><div class='add'>+module_exit(echainiv_module_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Encrypted Chain IV Generator");</div><div class='add'>+MODULE_ALIAS_CRYPTO("echainiv");</div><div class='head'>diff --git a/crypto/eseqiv.c b/crypto/eseqiv.c<br/>index f116fae766f8..16dda72fc4f8 100644<br/>--- a/<a href='/drm-misc/tree/crypto/eseqiv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/eseqiv.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/eseqiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/eseqiv.c</a></div><div class='hunk'>@@ -146,35 +146,13 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int eseqiv_givencrypt_first(struct skcipher_givcrypt_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ablkcipher *geniv = skcipher_givcrypt_reqtfm(req);</div><div class='del'>-	struct eseqiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-	if (crypto_ablkcipher_crt(geniv)-&gt;givencrypt != eseqiv_givencrypt_first)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	crypto_ablkcipher_crt(geniv)-&gt;givencrypt = eseqiv_givencrypt;</div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='del'>-				   crypto_ablkcipher_ivsize(geniv));</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return eseqiv_givencrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int eseqiv_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ablkcipher *geniv = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	struct eseqiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='ctx'> 	unsigned long alignmask;</div><div class='ctx'> 	unsigned int reqsize;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -198,7 +176,15 @@ static int eseqiv_init(struct crypto_tfm *tfm)</div><div class='ctx'> 	tfm-&gt;crt_ablkcipher.reqsize = reqsize +</div><div class='ctx'> 				      sizeof(struct ablkcipher_request);</div><div class='ctx'> </div><div class='del'>-	return skcipher_geniv_init(tfm);</div><div class='add'>+	err = 0;</div><div class='add'>+	if (!crypto_get_default_rng()) {</div><div class='add'>+		crypto_ablkcipher_crt(geniv)-&gt;givencrypt = eseqiv_givencrypt;</div><div class='add'>+		err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='add'>+					   crypto_ablkcipher_ivsize(geniv));</div><div class='add'>+		crypto_put_default_rng();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err ?: skcipher_geniv_init(tfm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template eseqiv_tmpl;</div><div class='hunk'>@@ -208,20 +194,14 @@ static struct crypto_instance *eseqiv_alloc(struct rtattr **tb)</div><div class='ctx'> 	struct crypto_instance *inst;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = crypto_get_default_rng();</div><div class='del'>-	if (err)</div><div class='del'>-		return ERR_PTR(err);</div><div class='del'>-</div><div class='ctx'> 	inst = skcipher_geniv_alloc(&amp;eseqiv_tmpl, tb, 0, 0);</div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='del'>-		goto put_rng;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='ctx'> 	if (inst-&gt;alg.cra_ablkcipher.ivsize != inst-&gt;alg.cra_blocksize)</div><div class='ctx'> 		goto free_inst;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ablkcipher.givencrypt = eseqiv_givencrypt_first;</div><div class='del'>-</div><div class='ctx'> 	inst-&gt;alg.cra_init = eseqiv_init;</div><div class='ctx'> 	inst-&gt;alg.cra_exit = skcipher_geniv_exit;</div><div class='ctx'> </div><div class='hunk'>@@ -234,21 +214,13 @@ out:</div><div class='ctx'> free_inst:</div><div class='ctx'> 	skcipher_geniv_free(inst);</div><div class='ctx'> 	inst = ERR_PTR(err);</div><div class='del'>-put_rng:</div><div class='del'>-	crypto_put_default_rng();</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void eseqiv_free(struct crypto_instance *inst)</div><div class='del'>-{</div><div class='del'>-	skcipher_geniv_free(inst);</div><div class='del'>-	crypto_put_default_rng();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct crypto_template eseqiv_tmpl = {</div><div class='ctx'> 	.name = "eseqiv",</div><div class='ctx'> 	.alloc = eseqiv_alloc,</div><div class='del'>-	.free = eseqiv_free,</div><div class='add'>+	.free = skcipher_geniv_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/fips.c b/crypto/fips.c<br/>index 553970081c62..9d627c1cf8bc 100644<br/>--- a/<a href='/drm-misc/tree/crypto/fips.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/fips.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/fips.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/fips.c</a></div><div class='hunk'>@@ -10,7 +10,12 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "internal.h"</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/fips.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/sysctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> int fips_enabled;</div><div class='ctx'> EXPORT_SYMBOL_GPL(fips_enabled);</div><div class='hunk'>@@ -25,3 +30,49 @@ static int fips_enable(char *str)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __setup("fips=", fips_enable);</div><div class='add'>+</div><div class='add'>+static struct ctl_table crypto_sysctl_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.procname       = "fips_enabled",</div><div class='add'>+		.data           = &amp;fips_enabled,</div><div class='add'>+		.maxlen         = sizeof(int),</div><div class='add'>+		.mode           = 0444,</div><div class='add'>+		.proc_handler   = proc_dointvec</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ctl_table crypto_dir_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.procname       = "crypto",</div><div class='add'>+		.mode           = 0555,</div><div class='add'>+		.child          = crypto_sysctl_table</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ctl_table_header *crypto_sysctls;</div><div class='add'>+</div><div class='add'>+static void crypto_proc_fips_init(void)</div><div class='add'>+{</div><div class='add'>+	crypto_sysctls = register_sysctl_table(crypto_dir_table);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void crypto_proc_fips_exit(void)</div><div class='add'>+{</div><div class='add'>+	unregister_sysctl_table(crypto_sysctls);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init fips_init(void)</div><div class='add'>+{</div><div class='add'>+	crypto_proc_fips_init();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit fips_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_proc_fips_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(fips_init);</div><div class='add'>+module_exit(fips_exit);</div><div class='head'>diff --git a/crypto/gcm.c b/crypto/gcm.c<br/>index 2e403f6138c1..7d32d4720564 100644<br/>--- a/<a href='/drm-misc/tree/crypto/gcm.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/gcm.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/gcm.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/gcm.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/hash.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='hunk'>@@ -39,7 +40,6 @@ struct crypto_rfc4106_ctx {</div><div class='ctx'> </div><div class='ctx'> struct crypto_rfc4543_instance_ctx {</div><div class='ctx'> 	struct crypto_aead_spawn aead;</div><div class='del'>-	struct crypto_skcipher_spawn null;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_rfc4543_ctx {</div><div class='hunk'>@@ -49,25 +49,22 @@ struct crypto_rfc4543_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_rfc4543_req_ctx {</div><div class='del'>-	u8 auth_tag[16];</div><div class='del'>-	u8 assocbuf[32];</div><div class='del'>-	struct scatterlist cipher[1];</div><div class='del'>-	struct scatterlist payload[2];</div><div class='del'>-	struct scatterlist assoc[2];</div><div class='ctx'> 	struct aead_request subreq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_gcm_ghash_ctx {</div><div class='ctx'> 	unsigned int cryptlen;</div><div class='ctx'> 	struct scatterlist *src;</div><div class='del'>-	void (*complete)(struct aead_request *req, int err);</div><div class='add'>+	int (*complete)(struct aead_request *req, u32 flags);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_gcm_req_priv_ctx {</div><div class='add'>+	u8 iv[16];</div><div class='ctx'> 	u8 auth_tag[16];</div><div class='ctx'> 	u8 iauth_tag[16];</div><div class='del'>-	struct scatterlist src[2];</div><div class='del'>-	struct scatterlist dst[2];</div><div class='add'>+	struct scatterlist src[3];</div><div class='add'>+	struct scatterlist dst[3];</div><div class='add'>+	struct scatterlist sg;</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx ghash_ctx;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct ahash_request ahreq;</div><div class='hunk'>@@ -80,7 +77,12 @@ struct crypto_gcm_setkey_result {</div><div class='ctx'> 	struct completion completion;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void *gcm_zeroes;</div><div class='add'>+static struct {</div><div class='add'>+	u8 buf[16];</div><div class='add'>+	struct scatterlist sg;</div><div class='add'>+} *gcm_zeroes;</div><div class='add'>+</div><div class='add'>+static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc);</div><div class='ctx'> </div><div class='ctx'> static inline struct crypto_gcm_req_priv_ctx *crypto_gcm_reqctx(</div><div class='ctx'> 	struct aead_request *req)</div><div class='hunk'>@@ -120,15 +122,13 @@ static int crypto_gcm_setkey(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> </div><div class='ctx'> 	crypto_ablkcipher_clear_flags(ctr, CRYPTO_TFM_REQ_MASK);</div><div class='ctx'> 	crypto_ablkcipher_set_flags(ctr, crypto_aead_get_flags(aead) &amp;</div><div class='del'>-				   CRYPTO_TFM_REQ_MASK);</div><div class='del'>-</div><div class='add'>+					 CRYPTO_TFM_REQ_MASK);</div><div class='ctx'> 	err = crypto_ablkcipher_setkey(ctr, key, keylen);</div><div class='add'>+	crypto_aead_set_flags(aead, crypto_ablkcipher_get_flags(ctr) &amp;</div><div class='add'>+				    CRYPTO_TFM_RES_MASK);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	crypto_aead_set_flags(aead, crypto_ablkcipher_get_flags(ctr) &amp;</div><div class='del'>-				       CRYPTO_TFM_RES_MASK);</div><div class='del'>-</div><div class='ctx'> 	data = kzalloc(sizeof(*data) + crypto_ablkcipher_reqsize(ctr),</div><div class='ctx'> 		       GFP_KERNEL);</div><div class='ctx'> 	if (!data)</div><div class='hunk'>@@ -163,7 +163,7 @@ static int crypto_gcm_setkey(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> 			      CRYPTO_TFM_RES_MASK);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	kfree(data);</div><div class='add'>+	kzfree(data);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -186,35 +186,46 @@ static int crypto_gcm_setauthsize(struct crypto_aead *tfm,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto_gcm_init_crypt(struct ablkcipher_request *ablk_req,</div><div class='del'>-				  struct aead_request *req,</div><div class='del'>-				  unsigned int cryptlen)</div><div class='add'>+static void crypto_gcm_init_common(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_gcm_ctx *ctx = crypto_aead_ctx(aead);</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='del'>-	struct scatterlist *dst;</div><div class='ctx'> 	__be32 counter = cpu_to_be32(1);</div><div class='add'>+	struct scatterlist *sg;</div><div class='ctx'> </div><div class='ctx'> 	memset(pctx-&gt;auth_tag, 0, sizeof(pctx-&gt;auth_tag));</div><div class='del'>-	memcpy(req-&gt;iv + 12, &amp;counter, 4);</div><div class='add'>+	memcpy(pctx-&gt;iv, req-&gt;iv, 12);</div><div class='add'>+	memcpy(pctx-&gt;iv + 12, &amp;counter, 4);</div><div class='ctx'> </div><div class='del'>-	sg_init_table(pctx-&gt;src, 2);</div><div class='add'>+	sg_init_table(pctx-&gt;src, 3);</div><div class='ctx'> 	sg_set_buf(pctx-&gt;src, pctx-&gt;auth_tag, sizeof(pctx-&gt;auth_tag));</div><div class='del'>-	scatterwalk_sg_chain(pctx-&gt;src, 2, req-&gt;src);</div><div class='add'>+	sg = scatterwalk_ffwd(pctx-&gt;src + 1, req-&gt;src, req-&gt;assoclen);</div><div class='add'>+	if (sg != pctx-&gt;src + 1)</div><div class='add'>+		scatterwalk_sg_chain(pctx-&gt;src, 2, sg);</div><div class='ctx'> </div><div class='del'>-	dst = pctx-&gt;src;</div><div class='ctx'> 	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		sg_init_table(pctx-&gt;dst, 2);</div><div class='add'>+		sg_init_table(pctx-&gt;dst, 3);</div><div class='ctx'> 		sg_set_buf(pctx-&gt;dst, pctx-&gt;auth_tag, sizeof(pctx-&gt;auth_tag));</div><div class='del'>-		scatterwalk_sg_chain(pctx-&gt;dst, 2, req-&gt;dst);</div><div class='del'>-		dst = pctx-&gt;dst;</div><div class='add'>+		sg = scatterwalk_ffwd(pctx-&gt;dst + 1, req-&gt;dst, req-&gt;assoclen);</div><div class='add'>+		if (sg != pctx-&gt;dst + 1)</div><div class='add'>+			scatterwalk_sg_chain(pctx-&gt;dst, 2, sg);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void crypto_gcm_init_crypt(struct aead_request *req,</div><div class='add'>+				  unsigned int cryptlen)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct crypto_gcm_ctx *ctx = crypto_aead_ctx(aead);</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='add'>+	struct ablkcipher_request *ablk_req = &amp;pctx-&gt;u.abreq;</div><div class='add'>+	struct scatterlist *dst;</div><div class='add'>+</div><div class='add'>+	dst = req-&gt;src == req-&gt;dst ? pctx-&gt;src : pctx-&gt;dst;</div><div class='ctx'> </div><div class='ctx'> 	ablkcipher_request_set_tfm(ablk_req, ctx-&gt;ctr);</div><div class='ctx'> 	ablkcipher_request_set_crypt(ablk_req, pctx-&gt;src, dst,</div><div class='ctx'> 				     cryptlen + sizeof(pctx-&gt;auth_tag),</div><div class='del'>-				     req-&gt;iv);</div><div class='add'>+				     pctx-&gt;iv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int gcm_remain(unsigned int len)</div><div class='hunk'>@@ -224,41 +235,31 @@ static inline unsigned int gcm_remain(unsigned int len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_len_done(struct crypto_async_request *areq, int err);</div><div class='del'>-static void gcm_hash_final_done(struct crypto_async_request *areq, int err);</div><div class='ctx'> </div><div class='ctx'> static int gcm_hash_update(struct aead_request *req,</div><div class='del'>-			   struct crypto_gcm_req_priv_ctx *pctx,</div><div class='ctx'> 			   crypto_completion_t compl,</div><div class='ctx'> 			   struct scatterlist *src,</div><div class='del'>-			   unsigned int len)</div><div class='add'>+			   unsigned int len, u32 flags)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct ahash_request *ahreq = &amp;pctx-&gt;u.ahreq;</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_callback(ahreq, aead_request_flags(req),</div><div class='del'>-				   compl, req);</div><div class='add'>+	ahash_request_set_callback(ahreq, flags, compl, req);</div><div class='ctx'> 	ahash_request_set_crypt(ahreq, src, NULL, len);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(ahreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gcm_hash_remain(struct aead_request *req,</div><div class='del'>-			   struct crypto_gcm_req_priv_ctx *pctx,</div><div class='ctx'> 			   unsigned int remain,</div><div class='del'>-			   crypto_completion_t compl)</div><div class='add'>+			   crypto_completion_t compl, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_request *ahreq = &amp;pctx-&gt;u.ahreq;</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(ahreq, aead_request_flags(req),</div><div class='del'>-				   compl, req);</div><div class='del'>-	sg_init_one(pctx-&gt;src, gcm_zeroes, remain);</div><div class='del'>-	ahash_request_set_crypt(ahreq, pctx-&gt;src, NULL, remain);</div><div class='del'>-</div><div class='del'>-	return crypto_ahash_update(ahreq);</div><div class='add'>+	return gcm_hash_update(req, compl, &amp;gcm_zeroes-&gt;sg, remain, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gcm_hash_len(struct aead_request *req,</div><div class='del'>-			struct crypto_gcm_req_priv_ctx *pctx)</div><div class='add'>+static int gcm_hash_len(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct ahash_request *ahreq = &amp;pctx-&gt;u.ahreq;</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> 	u128 lengths;</div><div class='hunk'>@@ -266,76 +267,41 @@ static int gcm_hash_len(struct aead_request *req,</div><div class='ctx'> 	lengths.a = cpu_to_be64(req-&gt;assoclen * 8);</div><div class='ctx'> 	lengths.b = cpu_to_be64(gctx-&gt;cryptlen * 8);</div><div class='ctx'> 	memcpy(pctx-&gt;iauth_tag, &amp;lengths, 16);</div><div class='del'>-	sg_init_one(pctx-&gt;src, pctx-&gt;iauth_tag, 16);</div><div class='del'>-	ahash_request_set_callback(ahreq, aead_request_flags(req),</div><div class='del'>-				   gcm_hash_len_done, req);</div><div class='del'>-	ahash_request_set_crypt(ahreq, pctx-&gt;src,</div><div class='del'>-				NULL, sizeof(lengths));</div><div class='add'>+	sg_init_one(&amp;pctx-&gt;sg, pctx-&gt;iauth_tag, 16);</div><div class='add'>+	ahash_request_set_callback(ahreq, flags, gcm_hash_len_done, req);</div><div class='add'>+	ahash_request_set_crypt(ahreq, &amp;pctx-&gt;sg,</div><div class='add'>+				pctx-&gt;iauth_tag, sizeof(lengths));</div><div class='ctx'> </div><div class='del'>-	return crypto_ahash_update(ahreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gcm_hash_final(struct aead_request *req,</div><div class='del'>-			  struct crypto_gcm_req_priv_ctx *pctx)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *ahreq = &amp;pctx-&gt;u.ahreq;</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(ahreq, aead_request_flags(req),</div><div class='del'>-				   gcm_hash_final_done, req);</div><div class='del'>-	ahash_request_set_crypt(ahreq, NULL, pctx-&gt;iauth_tag, 0);</div><div class='del'>-</div><div class='del'>-	return crypto_ahash_final(ahreq);</div><div class='add'>+	return crypto_ahash_finup(ahreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_final_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_len_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> </div><div class='del'>-	if (!err)</div><div class='del'>-		crypto_xor(pctx-&gt;auth_tag, pctx-&gt;iauth_tag, 16);</div><div class='del'>-</div><div class='del'>-	gctx-&gt;complete(req, err);</div><div class='add'>+	return gctx-&gt;complete(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gcm_hash_final_done(struct crypto_async_request *areq, int err)</div><div class='add'>+static void gcm_hash_len_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_final_done(req, err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __gcm_hash_len_done(struct aead_request *req, int err)</div><div class='del'>-{</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='del'>-</div><div class='del'>-	if (!err) {</div><div class='del'>-		err = gcm_hash_final(req, pctx);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__gcm_hash_final_done(req, err);</div><div class='del'>-}</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-static void gcm_hash_len_done(struct crypto_async_request *areq, int err)</div><div class='del'>-{</div><div class='del'>-	struct aead_request *req = areq-&gt;data;</div><div class='add'>+	err = gcm_hash_len_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_len_done(req, err);</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_crypt_remain_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_crypt_remain_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='del'>-</div><div class='del'>-	if (!err) {</div><div class='del'>-		err = gcm_hash_len(req, pctx);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__gcm_hash_len_done(req, err);</div><div class='add'>+	return gcm_hash_len(req, flags) ?:</div><div class='add'>+	       gcm_hash_len_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_crypt_remain_done(struct crypto_async_request *areq,</div><div class='hunk'>@@ -343,55 +309,58 @@ static void gcm_hash_crypt_remain_done(struct crypto_async_request *areq,</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_crypt_remain_done(req, err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_hash_crypt_remain_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_crypt_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_crypt_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> 	unsigned int remain;</div><div class='ctx'> </div><div class='del'>-	if (!err) {</div><div class='del'>-		remain = gcm_remain(gctx-&gt;cryptlen);</div><div class='del'>-		BUG_ON(!remain);</div><div class='del'>-		err = gcm_hash_remain(req, pctx, remain,</div><div class='del'>-				      gcm_hash_crypt_remain_done);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='add'>+	remain = gcm_remain(gctx-&gt;cryptlen);</div><div class='add'>+	if (remain)</div><div class='add'>+		return gcm_hash_remain(req, remain,</div><div class='add'>+				       gcm_hash_crypt_remain_done, flags) ?:</div><div class='add'>+		       gcm_hash_crypt_remain_continue(req, flags);</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_crypt_remain_done(req, err);</div><div class='add'>+	return gcm_hash_crypt_remain_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_crypt_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_crypt_done(req, err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_hash_crypt_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_assoc_remain_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_assoc_remain_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='del'>-	crypto_completion_t compl;</div><div class='del'>-	unsigned int remain = 0;</div><div class='del'>-</div><div class='del'>-	if (!err &amp;&amp; gctx-&gt;cryptlen) {</div><div class='del'>-		remain = gcm_remain(gctx-&gt;cryptlen);</div><div class='del'>-		compl = remain ? gcm_hash_crypt_done :</div><div class='del'>-			gcm_hash_crypt_remain_done;</div><div class='del'>-		err = gcm_hash_update(req, pctx, compl,</div><div class='del'>-				      gctx-&gt;src, gctx-&gt;cryptlen);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (remain)</div><div class='del'>-		__gcm_hash_crypt_done(req, err);</div><div class='del'>-	else</div><div class='del'>-		__gcm_hash_crypt_remain_done(req, err);</div><div class='add'>+	if (gctx-&gt;cryptlen)</div><div class='add'>+		return gcm_hash_update(req, gcm_hash_crypt_done,</div><div class='add'>+				       gctx-&gt;src, gctx-&gt;cryptlen, flags) ?:</div><div class='add'>+		       gcm_hash_crypt_continue(req, flags);</div><div class='add'>+</div><div class='add'>+	return gcm_hash_crypt_remain_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_assoc_remain_done(struct crypto_async_request *areq,</div><div class='hunk'>@@ -399,146 +368,120 @@ static void gcm_hash_assoc_remain_done(struct crypto_async_request *areq,</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_assoc_remain_done(req, err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_hash_assoc_remain_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_assoc_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_assoc_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	unsigned int remain;</div><div class='ctx'> </div><div class='del'>-	if (!err) {</div><div class='del'>-		remain = gcm_remain(req-&gt;assoclen);</div><div class='del'>-		BUG_ON(!remain);</div><div class='del'>-		err = gcm_hash_remain(req, pctx, remain,</div><div class='del'>-				      gcm_hash_assoc_remain_done);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='add'>+	remain = gcm_remain(req-&gt;assoclen);</div><div class='add'>+	if (remain)</div><div class='add'>+		return gcm_hash_remain(req, remain,</div><div class='add'>+				       gcm_hash_assoc_remain_done, flags) ?:</div><div class='add'>+		       gcm_hash_assoc_remain_continue(req, flags);</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_assoc_remain_done(req, err);</div><div class='add'>+	return gcm_hash_assoc_remain_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_assoc_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_assoc_done(req, err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_hash_assoc_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __gcm_hash_init_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_hash_init_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='del'>-	crypto_completion_t compl;</div><div class='del'>-	unsigned int remain = 0;</div><div class='del'>-</div><div class='del'>-	if (!err &amp;&amp; req-&gt;assoclen) {</div><div class='del'>-		remain = gcm_remain(req-&gt;assoclen);</div><div class='del'>-		compl = remain ? gcm_hash_assoc_done :</div><div class='del'>-			gcm_hash_assoc_remain_done;</div><div class='del'>-		err = gcm_hash_update(req, pctx, compl,</div><div class='del'>-				      req-&gt;assoc, req-&gt;assoclen);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='add'>+	if (req-&gt;assoclen)</div><div class='add'>+		return gcm_hash_update(req, gcm_hash_assoc_done,</div><div class='add'>+				       req-&gt;src, req-&gt;assoclen, flags) ?:</div><div class='add'>+		       gcm_hash_assoc_continue(req, flags);</div><div class='ctx'> </div><div class='del'>-	if (remain)</div><div class='del'>-		__gcm_hash_assoc_done(req, err);</div><div class='del'>-	else</div><div class='del'>-		__gcm_hash_assoc_remain_done(req, err);</div><div class='add'>+	return gcm_hash_assoc_remain_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_hash_init_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='ctx'> </div><div class='del'>-	__gcm_hash_init_done(req, err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_hash_init_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gcm_hash(struct aead_request *req,</div><div class='del'>-		    struct crypto_gcm_req_priv_ctx *pctx)</div><div class='add'>+static int gcm_hash(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct ahash_request *ahreq = &amp;pctx-&gt;u.ahreq;</div><div class='del'>-	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='del'>-	struct crypto_gcm_ctx *ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='del'>-	unsigned int remain;</div><div class='del'>-	crypto_completion_t compl;</div><div class='del'>-	int err;</div><div class='add'>+	struct crypto_gcm_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(ahreq, ctx-&gt;ghash);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_callback(ahreq, aead_request_flags(req),</div><div class='del'>-				   gcm_hash_init_done, req);</div><div class='del'>-	err = crypto_ahash_init(ahreq);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	remain = gcm_remain(req-&gt;assoclen);</div><div class='del'>-	compl = remain ? gcm_hash_assoc_done : gcm_hash_assoc_remain_done;</div><div class='del'>-	err = gcm_hash_update(req, pctx, compl, req-&gt;assoc, req-&gt;assoclen);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	if (remain) {</div><div class='del'>-		err = gcm_hash_remain(req, pctx, remain,</div><div class='del'>-				      gcm_hash_assoc_remain_done);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-	remain = gcm_remain(gctx-&gt;cryptlen);</div><div class='del'>-	compl = remain ? gcm_hash_crypt_done : gcm_hash_crypt_remain_done;</div><div class='del'>-	err = gcm_hash_update(req, pctx, compl, gctx-&gt;src, gctx-&gt;cryptlen);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	if (remain) {</div><div class='del'>-		err = gcm_hash_remain(req, pctx, remain,</div><div class='del'>-				      gcm_hash_crypt_remain_done);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-	err = gcm_hash_len(req, pctx);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	err = gcm_hash_final(req, pctx);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	ahash_request_set_callback(ahreq, flags, gcm_hash_init_done, req);</div><div class='add'>+	return crypto_ahash_init(ahreq) ?:</div><div class='add'>+	       gcm_hash_init_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gcm_enc_copy_hash(struct aead_request *req,</div><div class='del'>-			      struct crypto_gcm_req_priv_ctx *pctx)</div><div class='add'>+static int gcm_enc_copy_hash(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='ctx'> 	u8 *auth_tag = pctx-&gt;auth_tag;</div><div class='ctx'> </div><div class='del'>-	scatterwalk_map_and_copy(auth_tag, req-&gt;dst, req-&gt;cryptlen,</div><div class='add'>+	crypto_xor(auth_tag, pctx-&gt;iauth_tag, 16);</div><div class='add'>+	scatterwalk_map_and_copy(auth_tag, req-&gt;dst,</div><div class='add'>+				 req-&gt;assoclen + req-&gt;cryptlen,</div><div class='ctx'> 				 crypto_aead_authsize(aead), 1);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gcm_enc_hash_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_encrypt_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='add'>+	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> </div><div class='del'>-	if (!err)</div><div class='del'>-		gcm_enc_copy_hash(req, pctx);</div><div class='add'>+	gctx-&gt;src = sg_next(req-&gt;src == req-&gt;dst ? pctx-&gt;src : pctx-&gt;dst);</div><div class='add'>+	gctx-&gt;cryptlen = req-&gt;cryptlen;</div><div class='add'>+	gctx-&gt;complete = gcm_enc_copy_hash;</div><div class='ctx'> </div><div class='del'>-	aead_request_complete(req, err);</div><div class='add'>+	return gcm_hash(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_encrypt_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> </div><div class='del'>-	if (!err) {</div><div class='del'>-		err = gcm_hash(req, pctx);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-		else if (!err) {</div><div class='del'>-			crypto_xor(pctx-&gt;auth_tag, pctx-&gt;iauth_tag, 16);</div><div class='del'>-			gcm_enc_copy_hash(req, pctx);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gcm_encrypt_continue(req, 0);</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -546,34 +489,19 @@ static int crypto_gcm_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct ablkcipher_request *abreq = &amp;pctx-&gt;u.abreq;</div><div class='del'>-	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	crypto_gcm_init_crypt(abreq, req, req-&gt;cryptlen);</div><div class='del'>-	ablkcipher_request_set_callback(abreq, aead_request_flags(req),</div><div class='del'>-					gcm_encrypt_done, req);</div><div class='del'>-</div><div class='del'>-	gctx-&gt;src = req-&gt;dst;</div><div class='del'>-	gctx-&gt;cryptlen = req-&gt;cryptlen;</div><div class='del'>-	gctx-&gt;complete = gcm_enc_hash_done;</div><div class='del'>-</div><div class='del'>-	err = crypto_ablkcipher_encrypt(abreq);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = gcm_hash(req, pctx);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	u32 flags = aead_request_flags(req);</div><div class='ctx'> </div><div class='del'>-	crypto_xor(pctx-&gt;auth_tag, pctx-&gt;iauth_tag, 16);</div><div class='del'>-	gcm_enc_copy_hash(req, pctx);</div><div class='add'>+	crypto_gcm_init_common(req);</div><div class='add'>+	crypto_gcm_init_crypt(req, req-&gt;cryptlen);</div><div class='add'>+	ablkcipher_request_set_callback(abreq, flags, gcm_encrypt_done, req);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return crypto_ablkcipher_encrypt(abreq) ?:</div><div class='add'>+	       gcm_encrypt_continue(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_gcm_verify(struct aead_request *req,</div><div class='del'>-			     struct crypto_gcm_req_priv_ctx *pctx)</div><div class='add'>+static int crypto_gcm_verify(struct aead_request *req)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='ctx'> 	u8 *auth_tag = pctx-&gt;auth_tag;</div><div class='ctx'> 	u8 *iauth_tag = pctx-&gt;iauth_tag;</div><div class='hunk'>@@ -581,78 +509,57 @@ static int crypto_gcm_verify(struct aead_request *req,</div><div class='ctx'> 	unsigned int cryptlen = req-&gt;cryptlen - authsize;</div><div class='ctx'> </div><div class='ctx'> 	crypto_xor(auth_tag, iauth_tag, 16);</div><div class='del'>-	scatterwalk_map_and_copy(iauth_tag, req-&gt;src, cryptlen, authsize, 0);</div><div class='add'>+	scatterwalk_map_and_copy(iauth_tag, req-&gt;src,</div><div class='add'>+				 req-&gt;assoclen + cryptlen, authsize, 0);</div><div class='ctx'> 	return crypto_memneq(iauth_tag, auth_tag, authsize) ? -EBADMSG : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gcm_decrypt_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='del'>-	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='del'>-		err = crypto_gcm_verify(req, pctx);</div><div class='add'>+		err = crypto_gcm_verify(req);</div><div class='ctx'> </div><div class='ctx'> 	aead_request_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gcm_dec_hash_done(struct aead_request *req, int err)</div><div class='add'>+static int gcm_dec_hash_continue(struct aead_request *req, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='ctx'> 	struct ablkcipher_request *abreq = &amp;pctx-&gt;u.abreq;</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> </div><div class='del'>-	if (!err) {</div><div class='del'>-		ablkcipher_request_set_callback(abreq, aead_request_flags(req),</div><div class='del'>-						gcm_decrypt_done, req);</div><div class='del'>-		crypto_gcm_init_crypt(abreq, req, gctx-&gt;cryptlen);</div><div class='del'>-		err = crypto_ablkcipher_decrypt(abreq);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			return;</div><div class='del'>-		else if (!err)</div><div class='del'>-			err = crypto_gcm_verify(req, pctx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	aead_request_complete(req, err);</div><div class='add'>+	crypto_gcm_init_crypt(req, gctx-&gt;cryptlen);</div><div class='add'>+	ablkcipher_request_set_callback(abreq, flags, gcm_decrypt_done, req);</div><div class='add'>+	return crypto_ablkcipher_decrypt(abreq) ?: crypto_gcm_verify(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_gcm_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='ctx'> 	struct crypto_gcm_req_priv_ctx *pctx = crypto_gcm_reqctx(req);</div><div class='del'>-	struct ablkcipher_request *abreq = &amp;pctx-&gt;u.abreq;</div><div class='ctx'> 	struct crypto_gcm_ghash_ctx *gctx = &amp;pctx-&gt;ghash_ctx;</div><div class='ctx'> 	unsigned int authsize = crypto_aead_authsize(aead);</div><div class='ctx'> 	unsigned int cryptlen = req-&gt;cryptlen;</div><div class='del'>-	int err;</div><div class='add'>+	u32 flags = aead_request_flags(req);</div><div class='ctx'> </div><div class='del'>-	if (cryptlen &lt; authsize)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	cryptlen -= authsize;</div><div class='ctx'> </div><div class='del'>-	gctx-&gt;src = req-&gt;src;</div><div class='del'>-	gctx-&gt;cryptlen = cryptlen;</div><div class='del'>-	gctx-&gt;complete = gcm_dec_hash_done;</div><div class='del'>-</div><div class='del'>-	err = gcm_hash(req, pctx);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	crypto_gcm_init_common(req);</div><div class='ctx'> </div><div class='del'>-	ablkcipher_request_set_callback(abreq, aead_request_flags(req),</div><div class='del'>-					gcm_decrypt_done, req);</div><div class='del'>-	crypto_gcm_init_crypt(abreq, req, cryptlen);</div><div class='del'>-	err = crypto_ablkcipher_decrypt(abreq);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	gctx-&gt;src = sg_next(pctx-&gt;src);</div><div class='add'>+	gctx-&gt;cryptlen = cryptlen;</div><div class='add'>+	gctx-&gt;complete = gcm_dec_hash_continue;</div><div class='ctx'> </div><div class='del'>-	return crypto_gcm_verify(req, pctx);</div><div class='add'>+	return gcm_hash(req, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_gcm_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static int crypto_gcm_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst = (void *)tfm-&gt;__crt_alg;</div><div class='del'>-	struct gcm_instance_ctx *ictx = crypto_instance_ctx(inst);</div><div class='del'>-	struct crypto_gcm_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct aead_instance *inst = aead_alg_instance(tfm);</div><div class='add'>+	struct gcm_instance_ctx *ictx = aead_instance_ctx(inst);</div><div class='add'>+	struct crypto_gcm_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_ablkcipher *ctr;</div><div class='ctx'> 	struct crypto_ahash *ghash;</div><div class='ctx'> 	unsigned long align;</div><div class='hunk'>@@ -670,14 +577,14 @@ static int crypto_gcm_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	ctx-&gt;ctr = ctr;</div><div class='ctx'> 	ctx-&gt;ghash = ghash;</div><div class='ctx'> </div><div class='del'>-	align = crypto_tfm_alg_alignmask(tfm);</div><div class='add'>+	align = crypto_aead_alignmask(tfm);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = align +</div><div class='del'>-		offsetof(struct crypto_gcm_req_priv_ctx, u) +</div><div class='add'>+	crypto_aead_set_reqsize(tfm,</div><div class='add'>+		align + offsetof(struct crypto_gcm_req_priv_ctx, u) +</div><div class='ctx'> 		max(sizeof(struct ablkcipher_request) +</div><div class='ctx'> 		    crypto_ablkcipher_reqsize(ctr),</div><div class='ctx'> 		    sizeof(struct ahash_request) +</div><div class='del'>-		    crypto_ahash_reqsize(ghash));</div><div class='add'>+		    crypto_ahash_reqsize(ghash)));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -686,53 +593,59 @@ err_free_hash:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto_gcm_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void crypto_gcm_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_gcm_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_gcm_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_ahash(ctx-&gt;ghash);</div><div class='ctx'> 	crypto_free_ablkcipher(ctx-&gt;ctr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *crypto_gcm_alloc_common(struct rtattr **tb,</div><div class='del'>-						       const char *full_name,</div><div class='del'>-						       const char *ctr_name,</div><div class='del'>-						       const char *ghash_name)</div><div class='add'>+static int crypto_gcm_create_common(struct crypto_template *tmpl,</div><div class='add'>+				    struct rtattr **tb,</div><div class='add'>+				    const char *full_name,</div><div class='add'>+				    const char *ctr_name,</div><div class='add'>+				    const char *ghash_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='add'>+	struct aead_instance *inst;</div><div class='ctx'> 	struct crypto_alg *ctr;</div><div class='ctx'> 	struct crypto_alg *ghash_alg;</div><div class='del'>-	struct ahash_alg *ghash_ahash_alg;</div><div class='add'>+	struct hash_alg_common *ghash;</div><div class='ctx'> 	struct gcm_instance_ctx *ctx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='del'>-		return ERR_CAST(algt);</div><div class='add'>+		return PTR_ERR(algt);</div><div class='ctx'> </div><div class='ctx'> 	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_AEAD) &amp; algt-&gt;mask)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ghash_alg = crypto_find_alg(ghash_name, &amp;crypto_ahash_type,</div><div class='ctx'> 				    CRYPTO_ALG_TYPE_HASH,</div><div class='ctx'> 				    CRYPTO_ALG_TYPE_AHASH_MASK);</div><div class='ctx'> 	if (IS_ERR(ghash_alg))</div><div class='del'>-		return ERR_CAST(ghash_alg);</div><div class='add'>+		return PTR_ERR(ghash_alg);</div><div class='add'>+</div><div class='add'>+	ghash = __crypto_hash_alg_common(ghash_alg);</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='ctx'> 	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='ctx'> 	if (!inst)</div><div class='ctx'> 		goto out_put_ghash;</div><div class='ctx'> </div><div class='del'>-	ctx = crypto_instance_ctx(inst);</div><div class='del'>-	ghash_ahash_alg = container_of(ghash_alg, struct ahash_alg, halg.base);</div><div class='del'>-	err = crypto_init_ahash_spawn(&amp;ctx-&gt;ghash, &amp;ghash_ahash_alg-&gt;halg,</div><div class='del'>-				      inst);</div><div class='add'>+	ctx = aead_instance_ctx(inst);</div><div class='add'>+	err = crypto_init_ahash_spawn(&amp;ctx-&gt;ghash, ghash,</div><div class='add'>+				      aead_crypto_instance(inst));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='del'>-	crypto_set_skcipher_spawn(&amp;ctx-&gt;ctr, inst);</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (ghash-&gt;digestsize != 16)</div><div class='add'>+		goto err_drop_ghash;</div><div class='add'>+</div><div class='add'>+	crypto_set_skcipher_spawn(&amp;ctx-&gt;ctr, aead_crypto_instance(inst));</div><div class='ctx'> 	err = crypto_grab_skcipher(&amp;ctx-&gt;ctr, ctr_name, 0,</div><div class='ctx'> 				   crypto_requires_sync(algt-&gt;type,</div><div class='ctx'> 							algt-&gt;mask));</div><div class='hunk'>@@ -751,33 +664,38 @@ static struct crypto_instance *crypto_gcm_alloc_common(struct rtattr **tb,</div><div class='ctx'> 		goto out_put_ctr;</div><div class='ctx'> </div><div class='ctx'> 	err = -ENAMETOOLONG;</div><div class='del'>-	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+	if (snprintf(inst-&gt;alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='ctx'> 		     "gcm_base(%s,%s)", ctr-&gt;cra_driver_name,</div><div class='ctx'> 		     ghash_alg-&gt;cra_driver_name) &gt;=</div><div class='ctx'> 	    CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		goto out_put_ctr;</div><div class='ctx'> </div><div class='del'>-	memcpy(inst-&gt;alg.cra_name, full_name, CRYPTO_MAX_ALG_NAME);</div><div class='del'>-</div><div class='del'>-	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	inst-&gt;alg.cra_flags |= ctr-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='del'>-	inst-&gt;alg.cra_priority = ctr-&gt;cra_priority;</div><div class='del'>-	inst-&gt;alg.cra_blocksize = 1;</div><div class='del'>-	inst-&gt;alg.cra_alignmask = ctr-&gt;cra_alignmask | (__alignof__(u64) - 1);</div><div class='del'>-	inst-&gt;alg.cra_type = &amp;crypto_aead_type;</div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize = 16;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = 16;</div><div class='del'>-	inst-&gt;alg.cra_ctxsize = sizeof(struct crypto_gcm_ctx);</div><div class='del'>-	inst-&gt;alg.cra_init = crypto_gcm_init_tfm;</div><div class='del'>-	inst-&gt;alg.cra_exit = crypto_gcm_exit_tfm;</div><div class='del'>-	inst-&gt;alg.cra_aead.setkey = crypto_gcm_setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = crypto_gcm_setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt = crypto_gcm_encrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt = crypto_gcm_decrypt;</div><div class='add'>+	memcpy(inst-&gt;alg.base.cra_name, full_name, CRYPTO_MAX_ALG_NAME);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_flags = (ghash-&gt;base.cra_flags | ctr-&gt;cra_flags) &amp;</div><div class='add'>+				   CRYPTO_ALG_ASYNC;</div><div class='add'>+	inst-&gt;alg.base.cra_priority = (ghash-&gt;base.cra_priority +</div><div class='add'>+				       ctr-&gt;cra_priority) / 2;</div><div class='add'>+	inst-&gt;alg.base.cra_blocksize = 1;</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask = ghash-&gt;base.cra_alignmask |</div><div class='add'>+				       ctr-&gt;cra_alignmask;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct crypto_gcm_ctx);</div><div class='add'>+	inst-&gt;alg.ivsize = 12;</div><div class='add'>+	inst-&gt;alg.maxauthsize = 16;</div><div class='add'>+	inst-&gt;alg.init = crypto_gcm_init_tfm;</div><div class='add'>+	inst-&gt;alg.exit = crypto_gcm_exit_tfm;</div><div class='add'>+	inst-&gt;alg.setkey = crypto_gcm_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = crypto_gcm_setauthsize;</div><div class='add'>+	inst-&gt;alg.encrypt = crypto_gcm_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = crypto_gcm_decrypt;</div><div class='add'>+</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_put_ctr;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='add'>+out_put_ghash:</div><div class='ctx'> 	crypto_mod_put(ghash_alg);</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='ctx'> out_put_ctr:</div><div class='ctx'> 	crypto_drop_skcipher(&amp;ctx-&gt;ctr);</div><div class='hunk'>@@ -785,12 +703,10 @@ err_drop_ghash:</div><div class='ctx'> 	crypto_drop_ahash(&amp;ctx-&gt;ghash);</div><div class='ctx'> err_free_inst:</div><div class='ctx'> 	kfree(inst);</div><div class='del'>-out_put_ghash:</div><div class='del'>-	inst = ERR_PTR(err);</div><div class='del'>-	goto out;</div><div class='add'>+	goto out_put_ghash;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *crypto_gcm_alloc(struct rtattr **tb)</div><div class='add'>+static int crypto_gcm_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	const char *cipher_name;</div><div class='ctx'> 	char ctr_name[CRYPTO_MAX_ALG_NAME];</div><div class='hunk'>@@ -798,17 +714,18 @@ static struct crypto_instance *crypto_gcm_alloc(struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	cipher_name = crypto_attr_alg_name(tb[1]);</div><div class='ctx'> 	if (IS_ERR(cipher_name))</div><div class='del'>-		return ERR_CAST(cipher_name);</div><div class='add'>+		return PTR_ERR(cipher_name);</div><div class='ctx'> </div><div class='ctx'> 	if (snprintf(ctr_name, CRYPTO_MAX_ALG_NAME, "ctr(%s)", cipher_name) &gt;=</div><div class='ctx'> 	    CRYPTO_MAX_ALG_NAME)</div><div class='del'>-		return ERR_PTR(-ENAMETOOLONG);</div><div class='add'>+		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='ctx'> 	if (snprintf(full_name, CRYPTO_MAX_ALG_NAME, "gcm(%s)", cipher_name) &gt;=</div><div class='ctx'> 	    CRYPTO_MAX_ALG_NAME)</div><div class='del'>-		return ERR_PTR(-ENAMETOOLONG);</div><div class='add'>+		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='del'>-	return crypto_gcm_alloc_common(tb, full_name, ctr_name, "ghash");</div><div class='add'>+	return crypto_gcm_create_common(tmpl, tb, full_name,</div><div class='add'>+					ctr_name, "ghash");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_gcm_free(struct crypto_instance *inst)</div><div class='hunk'>@@ -817,17 +734,18 @@ static void crypto_gcm_free(struct crypto_instance *inst)</div><div class='ctx'> </div><div class='ctx'> 	crypto_drop_skcipher(&amp;ctx-&gt;ctr);</div><div class='ctx'> 	crypto_drop_ahash(&amp;ctx-&gt;ghash);</div><div class='del'>-	kfree(inst);</div><div class='add'>+	kfree(aead_instance(inst));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template crypto_gcm_tmpl = {</div><div class='ctx'> 	.name = "gcm",</div><div class='del'>-	.alloc = crypto_gcm_alloc,</div><div class='add'>+	.create = crypto_gcm_create,</div><div class='ctx'> 	.free = crypto_gcm_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *crypto_gcm_base_alloc(struct rtattr **tb)</div><div class='add'>+static int crypto_gcm_base_create(struct crypto_template *tmpl,</div><div class='add'>+				  struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	const char *ctr_name;</div><div class='ctx'> 	const char *ghash_name;</div><div class='hunk'>@@ -835,22 +753,23 @@ static struct crypto_instance *crypto_gcm_base_alloc(struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	ctr_name = crypto_attr_alg_name(tb[1]);</div><div class='ctx'> 	if (IS_ERR(ctr_name))</div><div class='del'>-		return ERR_CAST(ctr_name);</div><div class='add'>+		return PTR_ERR(ctr_name);</div><div class='ctx'> </div><div class='ctx'> 	ghash_name = crypto_attr_alg_name(tb[2]);</div><div class='ctx'> 	if (IS_ERR(ghash_name))</div><div class='del'>-		return ERR_CAST(ghash_name);</div><div class='add'>+		return PTR_ERR(ghash_name);</div><div class='ctx'> </div><div class='ctx'> 	if (snprintf(full_name, CRYPTO_MAX_ALG_NAME, "gcm_base(%s,%s)",</div><div class='ctx'> 		     ctr_name, ghash_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='del'>-		return ERR_PTR(-ENAMETOOLONG);</div><div class='add'>+		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='del'>-	return crypto_gcm_alloc_common(tb, full_name, ctr_name, ghash_name);</div><div class='add'>+	return crypto_gcm_create_common(tmpl, tb, full_name,</div><div class='add'>+					ctr_name, ghash_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template crypto_gcm_base_tmpl = {</div><div class='ctx'> 	.name = "gcm_base",</div><div class='del'>-	.alloc = crypto_gcm_base_alloc,</div><div class='add'>+	.create = crypto_gcm_base_create,</div><div class='ctx'> 	.free = crypto_gcm_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='hunk'>@@ -911,7 +830,7 @@ static struct aead_request *crypto_rfc4106_crypt(struct aead_request *req)</div><div class='ctx'> 	aead_request_set_callback(subreq, req-&gt;base.flags, req-&gt;base.complete,</div><div class='ctx'> 				  req-&gt;base.data);</div><div class='ctx'> 	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst, req-&gt;cryptlen, iv);</div><div class='del'>-	aead_request_set_assoc(subreq, req-&gt;assoc, req-&gt;assoclen);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='ctx'> </div><div class='ctx'> 	return subreq;</div><div class='ctx'> }</div><div class='hunk'>@@ -930,11 +849,11 @@ static int crypto_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> 	return crypto_aead_decrypt(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_rfc4106_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static int crypto_rfc4106_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst = (void *)tfm-&gt;__crt_alg;</div><div class='del'>-	struct crypto_aead_spawn *spawn = crypto_instance_ctx(inst);</div><div class='del'>-	struct crypto_rfc4106_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct aead_instance *inst = aead_alg_instance(tfm);</div><div class='add'>+	struct crypto_aead_spawn *spawn = aead_instance_ctx(inst);</div><div class='add'>+	struct crypto_rfc4106_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_aead *aead;</div><div class='ctx'> 	unsigned long align;</div><div class='ctx'> </div><div class='hunk'>@@ -946,126 +865,120 @@ static int crypto_rfc4106_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_aead_alignmask(aead);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct aead_request) +</div><div class='del'>-				ALIGN(crypto_aead_reqsize(aead),</div><div class='del'>-				      crypto_tfm_ctx_alignment()) +</div><div class='del'>-				align + 16;</div><div class='add'>+	crypto_aead_set_reqsize(</div><div class='add'>+		tfm,</div><div class='add'>+		sizeof(struct aead_request) +</div><div class='add'>+		ALIGN(crypto_aead_reqsize(aead), crypto_tfm_ctx_alignment()) +</div><div class='add'>+		align + 12);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto_rfc4106_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void crypto_rfc4106_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_rfc4106_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_rfc4106_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *crypto_rfc4106_alloc(struct rtattr **tb)</div><div class='add'>+static int crypto_rfc4106_create(struct crypto_template *tmpl,</div><div class='add'>+				 struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='add'>+	struct aead_instance *inst;</div><div class='ctx'> 	struct crypto_aead_spawn *spawn;</div><div class='del'>-	struct crypto_alg *alg;</div><div class='add'>+	struct aead_alg *alg;</div><div class='ctx'> 	const char *ccm_name;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='del'>-		return ERR_CAST(algt);</div><div class='add'>+		return PTR_ERR(algt);</div><div class='ctx'> </div><div class='ctx'> 	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_AEAD) &amp; algt-&gt;mask)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ccm_name = crypto_attr_alg_name(tb[1]);</div><div class='ctx'> 	if (IS_ERR(ccm_name))</div><div class='del'>-		return ERR_CAST(ccm_name);</div><div class='add'>+		return PTR_ERR(ccm_name);</div><div class='ctx'> </div><div class='ctx'> 	inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL);</div><div class='ctx'> 	if (!inst)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spawn = crypto_instance_ctx(inst);</div><div class='del'>-	crypto_set_aead_spawn(spawn, inst);</div><div class='add'>+	spawn = aead_instance_ctx(inst);</div><div class='add'>+	crypto_set_aead_spawn(spawn, aead_crypto_instance(inst));</div><div class='ctx'> 	err = crypto_grab_aead(spawn, ccm_name, 0,</div><div class='ctx'> 			       crypto_requires_sync(algt-&gt;type, algt-&gt;mask));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_inst;</div><div class='ctx'> </div><div class='del'>-	alg = crypto_aead_spawn_alg(spawn);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* We only support 16-byte blocks. */</div><div class='del'>-	if (alg-&gt;cra_aead.ivsize != 16)</div><div class='add'>+	/* Underlying IV size must be 12. */</div><div class='add'>+	if (crypto_aead_alg_ivsize(alg) != 12)</div><div class='ctx'> 		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> 	/* Not a stream cipher? */</div><div class='del'>-	if (alg-&gt;cra_blocksize != 1)</div><div class='add'>+	if (alg-&gt;base.cra_blocksize != 1)</div><div class='ctx'> 		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> 	err = -ENAMETOOLONG;</div><div class='del'>-	if (snprintf(inst-&gt;alg.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "rfc4106(%s)", alg-&gt;cra_name) &gt;= CRYPTO_MAX_ALG_NAME ||</div><div class='del'>-	    snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "rfc4106(%s)", alg-&gt;cra_driver_name) &gt;=</div><div class='add'>+	if (snprintf(inst-&gt;alg.base.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "rfc4106(%s)", alg-&gt;base.cra_name) &gt;=</div><div class='add'>+	    CRYPTO_MAX_ALG_NAME ||</div><div class='add'>+	    snprintf(inst-&gt;alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "rfc4106(%s)", alg-&gt;base.cra_driver_name) &gt;=</div><div class='ctx'> 	    CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		goto out_drop_alg;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	inst-&gt;alg.cra_flags |= alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='del'>-	inst-&gt;alg.cra_priority = alg-&gt;cra_priority;</div><div class='del'>-	inst-&gt;alg.cra_blocksize = 1;</div><div class='del'>-	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='del'>-	inst-&gt;alg.cra_type = &amp;crypto_nivaead_type;</div><div class='add'>+	inst-&gt;alg.base.cra_flags |= alg-&gt;base.cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='add'>+	inst-&gt;alg.base.cra_priority = alg-&gt;base.cra_priority;</div><div class='add'>+	inst-&gt;alg.base.cra_blocksize = 1;</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask = alg-&gt;base.cra_alignmask;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize = 8;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = 16;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct crypto_rfc4106_ctx);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ctxsize = sizeof(struct crypto_rfc4106_ctx);</div><div class='add'>+	inst-&gt;alg.ivsize = 8;</div><div class='add'>+	inst-&gt;alg.maxauthsize = crypto_aead_alg_maxauthsize(alg);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_init = crypto_rfc4106_init_tfm;</div><div class='del'>-	inst-&gt;alg.cra_exit = crypto_rfc4106_exit_tfm;</div><div class='add'>+	inst-&gt;alg.init = crypto_rfc4106_init_tfm;</div><div class='add'>+	inst-&gt;alg.exit = crypto_rfc4106_exit_tfm;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.setkey = crypto_rfc4106_setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = crypto_rfc4106_setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt = crypto_rfc4106_encrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt = crypto_rfc4106_decrypt;</div><div class='add'>+	inst-&gt;alg.setkey = crypto_rfc4106_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = crypto_rfc4106_setauthsize;</div><div class='add'>+	inst-&gt;alg.encrypt = crypto_rfc4106_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = crypto_rfc4106_decrypt;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.geniv = "seqiv";</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='ctx'> out_drop_alg:</div><div class='ctx'> 	crypto_drop_aead(spawn);</div><div class='ctx'> out_free_inst:</div><div class='ctx'> 	kfree(inst);</div><div class='del'>-	inst = ERR_PTR(err);</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_rfc4106_free(struct crypto_instance *inst)</div><div class='ctx'> {</div><div class='del'>-	crypto_drop_spawn(crypto_instance_ctx(inst));</div><div class='del'>-	kfree(inst);</div><div class='add'>+	crypto_drop_aead(crypto_instance_ctx(inst));</div><div class='add'>+	kfree(aead_instance(inst));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template crypto_rfc4106_tmpl = {</div><div class='ctx'> 	.name = "rfc4106",</div><div class='del'>-	.alloc = crypto_rfc4106_alloc,</div><div class='add'>+	.create = crypto_rfc4106_create,</div><div class='ctx'> 	.free = crypto_rfc4106_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_rfc4543_req_ctx *crypto_rfc4543_reqctx(</div><div class='del'>-	struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	unsigned long align = crypto_aead_alignmask(crypto_aead_reqtfm(req));</div><div class='del'>-</div><div class='del'>-	return (void *)PTR_ALIGN((u8 *)aead_request_ctx(req), align + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int crypto_rfc4543_setkey(struct crypto_aead *parent, const u8 *key,</div><div class='ctx'> 				 unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -1100,83 +1013,35 @@ static int crypto_rfc4543_setauthsize(struct crypto_aead *parent,</div><div class='ctx'> 	return crypto_aead_setauthsize(ctx-&gt;child, authsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto_rfc4543_done(struct crypto_async_request *areq, int err)</div><div class='del'>-{</div><div class='del'>-	struct aead_request *req = areq-&gt;data;</div><div class='del'>-	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_rfc4543_req_ctx *rctx = crypto_rfc4543_reqctx(req);</div><div class='del'>-</div><div class='del'>-	if (!err) {</div><div class='del'>-		scatterwalk_map_and_copy(rctx-&gt;auth_tag, req-&gt;dst,</div><div class='del'>-					 req-&gt;cryptlen,</div><div class='del'>-					 crypto_aead_authsize(aead), 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	aead_request_complete(req, err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct aead_request *crypto_rfc4543_crypt(struct aead_request *req,</div><div class='del'>-						 bool enc)</div><div class='add'>+static int crypto_rfc4543_crypt(struct aead_request *req, bool enc)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='ctx'> 	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(aead);</div><div class='del'>-	struct crypto_rfc4543_req_ctx *rctx = crypto_rfc4543_reqctx(req);</div><div class='add'>+	struct crypto_rfc4543_req_ctx *rctx = aead_request_ctx(req);</div><div class='ctx'> 	struct aead_request *subreq = &amp;rctx-&gt;subreq;</div><div class='del'>-	struct scatterlist *src = req-&gt;src;</div><div class='del'>-	struct scatterlist *cipher = rctx-&gt;cipher;</div><div class='del'>-	struct scatterlist *payload = rctx-&gt;payload;</div><div class='del'>-	struct scatterlist *assoc = rctx-&gt;assoc;</div><div class='ctx'> 	unsigned int authsize = crypto_aead_authsize(aead);</div><div class='del'>-	unsigned int assoclen = req-&gt;assoclen;</div><div class='del'>-	struct page *srcp;</div><div class='del'>-	u8 *vsrc;</div><div class='ctx'> 	u8 *iv = PTR_ALIGN((u8 *)(rctx + 1) + crypto_aead_reqsize(ctx-&gt;child),</div><div class='ctx'> 			   crypto_aead_alignmask(ctx-&gt;child) + 1);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;src != req-&gt;dst) {</div><div class='add'>+		err = crypto_rfc4543_copy_src_to_dst(req, enc);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(iv, ctx-&gt;nonce, 4);</div><div class='ctx'> 	memcpy(iv + 4, req-&gt;iv, 8);</div><div class='ctx'> </div><div class='del'>-	/* construct cipher/plaintext */</div><div class='del'>-	if (enc)</div><div class='del'>-		memset(rctx-&gt;auth_tag, 0, authsize);</div><div class='del'>-	else</div><div class='del'>-		scatterwalk_map_and_copy(rctx-&gt;auth_tag, src,</div><div class='del'>-					 req-&gt;cryptlen - authsize,</div><div class='del'>-					 authsize, 0);</div><div class='del'>-</div><div class='del'>-	sg_init_one(cipher, rctx-&gt;auth_tag, authsize);</div><div class='del'>-</div><div class='del'>-	/* construct the aad */</div><div class='del'>-	srcp = sg_page(src);</div><div class='del'>-	vsrc = PageHighMem(srcp) ? NULL : page_address(srcp) + src-&gt;offset;</div><div class='del'>-</div><div class='del'>-	sg_init_table(payload, 2);</div><div class='del'>-	sg_set_buf(payload, req-&gt;iv, 8);</div><div class='del'>-	scatterwalk_crypto_chain(payload, src, vsrc == req-&gt;iv + 8, 2);</div><div class='del'>-	assoclen += 8 + req-&gt;cryptlen - (enc ? 0 : authsize);</div><div class='del'>-</div><div class='del'>-	if (req-&gt;assoc-&gt;length == req-&gt;assoclen) {</div><div class='del'>-		sg_init_table(assoc, 2);</div><div class='del'>-		sg_set_page(assoc, sg_page(req-&gt;assoc), req-&gt;assoc-&gt;length,</div><div class='del'>-			    req-&gt;assoc-&gt;offset);</div><div class='del'>-	} else {</div><div class='del'>-		BUG_ON(req-&gt;assoclen &gt; sizeof(rctx-&gt;assocbuf));</div><div class='del'>-</div><div class='del'>-		scatterwalk_map_and_copy(rctx-&gt;assocbuf, req-&gt;assoc, 0,</div><div class='del'>-					 req-&gt;assoclen, 0);</div><div class='del'>-</div><div class='del'>-		sg_init_table(assoc, 2);</div><div class='del'>-		sg_set_buf(assoc, rctx-&gt;assocbuf, req-&gt;assoclen);</div><div class='del'>-	}</div><div class='del'>-	scatterwalk_crypto_chain(assoc, payload, 0, 2);</div><div class='del'>-</div><div class='ctx'> 	aead_request_set_tfm(subreq, ctx-&gt;child);</div><div class='del'>-	aead_request_set_callback(subreq, req-&gt;base.flags, crypto_rfc4543_done,</div><div class='del'>-				  req);</div><div class='del'>-	aead_request_set_crypt(subreq, cipher, cipher, enc ? 0 : authsize, iv);</div><div class='del'>-	aead_request_set_assoc(subreq, assoc, assoclen);</div><div class='del'>-</div><div class='del'>-	return subreq;</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				  req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       enc ? 0 : authsize, iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen + req-&gt;cryptlen -</div><div class='add'>+				    subreq-&gt;cryptlen);</div><div class='add'>+</div><div class='add'>+	return enc ? crypto_aead_encrypt(subreq) : crypto_aead_decrypt(subreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc)</div><div class='hunk'>@@ -1184,7 +1049,8 @@ static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc)</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='ctx'> 	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(aead);</div><div class='ctx'> 	unsigned int authsize = crypto_aead_authsize(aead);</div><div class='del'>-	unsigned int nbytes = req-&gt;cryptlen - (enc ? 0 : authsize);</div><div class='add'>+	unsigned int nbytes = req-&gt;assoclen + req-&gt;cryptlen -</div><div class='add'>+			      (enc ? 0 : authsize);</div><div class='ctx'> 	struct blkcipher_desc desc = {</div><div class='ctx'> 		.tfm = ctx-&gt;null,</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1194,49 +1060,20 @@ static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc)</div><div class='ctx'> </div><div class='ctx'> static int crypto_rfc4543_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_rfc4543_req_ctx *rctx = crypto_rfc4543_reqctx(req);</div><div class='del'>-	struct aead_request *subreq;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		err = crypto_rfc4543_copy_src_to_dst(req, true);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	subreq = crypto_rfc4543_crypt(req, true);</div><div class='del'>-	err = crypto_aead_encrypt(subreq);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	scatterwalk_map_and_copy(rctx-&gt;auth_tag, req-&gt;dst, req-&gt;cryptlen,</div><div class='del'>-				 crypto_aead_authsize(aead), 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return crypto_rfc4543_crypt(req, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_rfc4543_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		err = crypto_rfc4543_copy_src_to_dst(req, false);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	req = crypto_rfc4543_crypt(req, false);</div><div class='del'>-</div><div class='del'>-	return crypto_aead_decrypt(req);</div><div class='add'>+	return crypto_rfc4543_crypt(req, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_rfc4543_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static int crypto_rfc4543_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst = (void *)tfm-&gt;__crt_alg;</div><div class='del'>-	struct crypto_rfc4543_instance_ctx *ictx = crypto_instance_ctx(inst);</div><div class='add'>+	struct aead_instance *inst = aead_alg_instance(tfm);</div><div class='add'>+	struct crypto_rfc4543_instance_ctx *ictx = aead_instance_ctx(inst);</div><div class='ctx'> 	struct crypto_aead_spawn *spawn = &amp;ictx-&gt;aead;</div><div class='del'>-	struct crypto_rfc4543_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_aead *aead;</div><div class='ctx'> 	struct crypto_blkcipher *null;</div><div class='ctx'> 	unsigned long align;</div><div class='hunk'>@@ -1246,7 +1083,7 @@ static int crypto_rfc4543_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	if (IS_ERR(aead))</div><div class='ctx'> 		return PTR_ERR(aead);</div><div class='ctx'> </div><div class='del'>-	null = crypto_spawn_blkcipher(&amp;ictx-&gt;null.base);</div><div class='add'>+	null = crypto_get_default_null_skcipher();</div><div class='ctx'> 	err = PTR_ERR(null);</div><div class='ctx'> 	if (IS_ERR(null))</div><div class='ctx'> 		goto err_free_aead;</div><div class='hunk'>@@ -1256,10 +1093,11 @@ static int crypto_rfc4543_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_aead_alignmask(aead);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct crypto_rfc4543_req_ctx) +</div><div class='del'>-				ALIGN(crypto_aead_reqsize(aead),</div><div class='del'>-				      crypto_tfm_ctx_alignment()) +</div><div class='del'>-				align + 16;</div><div class='add'>+	crypto_aead_set_reqsize(</div><div class='add'>+		tfm,</div><div class='add'>+		sizeof(struct crypto_rfc4543_req_ctx) +</div><div class='add'>+		ALIGN(crypto_aead_reqsize(aead), crypto_tfm_ctx_alignment()) +</div><div class='add'>+		align + 12);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1268,107 +1106,98 @@ err_free_aead:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto_rfc4543_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void crypto_rfc4543_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_rfc4543_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='del'>-	crypto_free_blkcipher(ctx-&gt;null);</div><div class='add'>+	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *crypto_rfc4543_alloc(struct rtattr **tb)</div><div class='add'>+static int crypto_rfc4543_create(struct crypto_template *tmpl,</div><div class='add'>+				struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='add'>+	struct aead_instance *inst;</div><div class='ctx'> 	struct crypto_aead_spawn *spawn;</div><div class='del'>-	struct crypto_alg *alg;</div><div class='add'>+	struct aead_alg *alg;</div><div class='ctx'> 	struct crypto_rfc4543_instance_ctx *ctx;</div><div class='ctx'> 	const char *ccm_name;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='del'>-		return ERR_CAST(algt);</div><div class='add'>+		return PTR_ERR(algt);</div><div class='ctx'> </div><div class='ctx'> 	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_AEAD) &amp; algt-&gt;mask)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ccm_name = crypto_attr_alg_name(tb[1]);</div><div class='ctx'> 	if (IS_ERR(ccm_name))</div><div class='del'>-		return ERR_CAST(ccm_name);</div><div class='add'>+		return PTR_ERR(ccm_name);</div><div class='ctx'> </div><div class='ctx'> 	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='ctx'> 	if (!inst)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ctx = crypto_instance_ctx(inst);</div><div class='add'>+	ctx = aead_instance_ctx(inst);</div><div class='ctx'> 	spawn = &amp;ctx-&gt;aead;</div><div class='del'>-	crypto_set_aead_spawn(spawn, inst);</div><div class='add'>+	crypto_set_aead_spawn(spawn, aead_crypto_instance(inst));</div><div class='ctx'> 	err = crypto_grab_aead(spawn, ccm_name, 0,</div><div class='ctx'> 			       crypto_requires_sync(algt-&gt;type, algt-&gt;mask));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_inst;</div><div class='ctx'> </div><div class='del'>-	alg = crypto_aead_spawn_alg(spawn);</div><div class='del'>-</div><div class='del'>-	crypto_set_skcipher_spawn(&amp;ctx-&gt;null, inst);</div><div class='del'>-	err = crypto_grab_skcipher(&amp;ctx-&gt;null, "ecb(cipher_null)", 0,</div><div class='del'>-				   CRYPTO_ALG_ASYNC);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_drop_alg;</div><div class='del'>-</div><div class='del'>-	crypto_skcipher_spawn_alg(&amp;ctx-&gt;null);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* We only support 16-byte blocks. */</div><div class='del'>-	if (alg-&gt;cra_aead.ivsize != 16)</div><div class='del'>-		goto out_drop_ecbnull;</div><div class='add'>+	/* Underlying IV size must be 12. */</div><div class='add'>+	if (crypto_aead_alg_ivsize(alg) != 12)</div><div class='add'>+		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> 	/* Not a stream cipher? */</div><div class='del'>-	if (alg-&gt;cra_blocksize != 1)</div><div class='del'>-		goto out_drop_ecbnull;</div><div class='add'>+	if (alg-&gt;base.cra_blocksize != 1)</div><div class='add'>+		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> 	err = -ENAMETOOLONG;</div><div class='del'>-	if (snprintf(inst-&gt;alg.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "rfc4543(%s)", alg-&gt;cra_name) &gt;= CRYPTO_MAX_ALG_NAME ||</div><div class='del'>-	    snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "rfc4543(%s)", alg-&gt;cra_driver_name) &gt;=</div><div class='add'>+	if (snprintf(inst-&gt;alg.base.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "rfc4543(%s)", alg-&gt;base.cra_name) &gt;=</div><div class='add'>+	    CRYPTO_MAX_ALG_NAME ||</div><div class='add'>+	    snprintf(inst-&gt;alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='add'>+		     "rfc4543(%s)", alg-&gt;base.cra_driver_name) &gt;=</div><div class='ctx'> 	    CRYPTO_MAX_ALG_NAME)</div><div class='del'>-		goto out_drop_ecbnull;</div><div class='add'>+		goto out_drop_alg;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD;</div><div class='del'>-	inst-&gt;alg.cra_flags |= alg-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='del'>-	inst-&gt;alg.cra_priority = alg-&gt;cra_priority;</div><div class='del'>-	inst-&gt;alg.cra_blocksize = 1;</div><div class='del'>-	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='del'>-	inst-&gt;alg.cra_type = &amp;crypto_nivaead_type;</div><div class='add'>+	inst-&gt;alg.base.cra_flags = alg-&gt;base.cra_flags &amp; CRYPTO_ALG_ASYNC;</div><div class='add'>+	inst-&gt;alg.base.cra_priority = alg-&gt;base.cra_priority;</div><div class='add'>+	inst-&gt;alg.base.cra_blocksize = 1;</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask = alg-&gt;base.cra_alignmask;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize = 8;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = 16;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct crypto_rfc4543_ctx);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ctxsize = sizeof(struct crypto_rfc4543_ctx);</div><div class='add'>+	inst-&gt;alg.ivsize = 8;</div><div class='add'>+	inst-&gt;alg.maxauthsize = crypto_aead_alg_maxauthsize(alg);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_init = crypto_rfc4543_init_tfm;</div><div class='del'>-	inst-&gt;alg.cra_exit = crypto_rfc4543_exit_tfm;</div><div class='add'>+	inst-&gt;alg.init = crypto_rfc4543_init_tfm;</div><div class='add'>+	inst-&gt;alg.exit = crypto_rfc4543_exit_tfm;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.setkey = crypto_rfc4543_setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = crypto_rfc4543_setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt = crypto_rfc4543_encrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt = crypto_rfc4543_decrypt;</div><div class='add'>+	inst-&gt;alg.setkey = crypto_rfc4543_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = crypto_rfc4543_setauthsize;</div><div class='add'>+	inst-&gt;alg.encrypt = crypto_rfc4543_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = crypto_rfc4543_decrypt;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.geniv = "seqiv";</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_drop_alg;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='del'>-out_drop_ecbnull:</div><div class='del'>-	crypto_drop_skcipher(&amp;ctx-&gt;null);</div><div class='ctx'> out_drop_alg:</div><div class='ctx'> 	crypto_drop_aead(spawn);</div><div class='ctx'> out_free_inst:</div><div class='ctx'> 	kfree(inst);</div><div class='del'>-	inst = ERR_PTR(err);</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1377,14 +1206,13 @@ static void crypto_rfc4543_free(struct crypto_instance *inst)</div><div class='ctx'> 	struct crypto_rfc4543_instance_ctx *ctx = crypto_instance_ctx(inst);</div><div class='ctx'> </div><div class='ctx'> 	crypto_drop_aead(&amp;ctx-&gt;aead);</div><div class='del'>-	crypto_drop_skcipher(&amp;ctx-&gt;null);</div><div class='ctx'> </div><div class='del'>-	kfree(inst);</div><div class='add'>+	kfree(aead_instance(inst));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template crypto_rfc4543_tmpl = {</div><div class='ctx'> 	.name = "rfc4543",</div><div class='del'>-	.alloc = crypto_rfc4543_alloc,</div><div class='add'>+	.create = crypto_rfc4543_create,</div><div class='ctx'> 	.free = crypto_rfc4543_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='hunk'>@@ -1393,10 +1221,12 @@ static int __init crypto_gcm_module_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	gcm_zeroes = kzalloc(16, GFP_KERNEL);</div><div class='add'>+	gcm_zeroes = kzalloc(sizeof(*gcm_zeroes), GFP_KERNEL);</div><div class='ctx'> 	if (!gcm_zeroes)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	sg_init_one(&amp;gcm_zeroes-&gt;sg, gcm_zeroes-&gt;buf, sizeof(gcm_zeroes-&gt;buf));</div><div class='add'>+</div><div class='ctx'> 	err = crypto_register_template(&amp;crypto_gcm_base_tmpl);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/crypto/internal.h b/crypto/internal.h<br/>index bd39bfc92eab..00e42a3ed814 100644<br/>--- a/<a href='/drm-misc/tree/crypto/internal.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/internal.h</a><br/>+++ b/<a href='/drm-misc/tree/crypto/internal.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/internal.h</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> #include &lt;linux/rwsem.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/fips.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Crypto notification events. */</div><div class='ctx'> enum {</div><div class='hunk'>@@ -103,6 +102,8 @@ int crypto_register_notifier(struct notifier_block *nb);</div><div class='ctx'> int crypto_unregister_notifier(struct notifier_block *nb);</div><div class='ctx'> int crypto_probing_notify(unsigned long val, void *v);</div><div class='ctx'> </div><div class='add'>+unsigned int crypto_alg_extsize(struct crypto_alg *alg);</div><div class='add'>+</div><div class='ctx'> static inline struct crypto_alg *crypto_alg_get(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_inc(&amp;alg-&gt;cra_refcnt);</div><div class='head'>diff --git a/crypto/jitterentropy-kcapi.c b/crypto/jitterentropy-kcapi.c<br/>new file mode 100644<br/>index 000000000000..b32d834144cd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/jitterentropy-kcapi.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/jitterentropy-kcapi.c</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+/*</div><div class='add'>+ * Non-physical true random number generator based on timing jitter --</div><div class='add'>+ * Linux Kernel Crypto API specific code</div><div class='add'>+ *</div><div class='add'>+ * Copyright Stephan Mueller &lt;smueller@chronox.de&gt;, 2015</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions</div><div class='add'>+ * are met:</div><div class='add'>+ * 1. Redistributions of source code must retain the above copyright</div><div class='add'>+ *    notice, and the entire permission notice in its entirety,</div><div class='add'>+ *    including the disclaimer of warranties.</div><div class='add'>+ * 2. Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *    documentation and/or other materials provided with the distribution.</div><div class='add'>+ * 3. The name of the author may not be used to endorse or promote</div><div class='add'>+ *    products derived from this software without specific prior</div><div class='add'>+ *    written permission.</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this product may be distributed under the terms of</div><div class='add'>+ * the GNU General Public License, in which case the provisions of the GPL2 are</div><div class='add'>+ * required INSTEAD OF the above restrictions.  (This clause is</div><div class='add'>+ * necessary due to a potential bad interaction between the GPL and</div><div class='add'>+ * the restrictions contained in a BSD-style copyright.)</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED</div><div class='add'>+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES</div><div class='add'>+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ALL OF</div><div class='add'>+ * WHICH ARE HEREBY DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE</div><div class='add'>+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='add'>+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT</div><div class='add'>+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR</div><div class='add'>+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF</div><div class='add'>+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE</div><div class='add'>+ * USE OF THIS SOFTWARE, EVEN IF NOT ADVISED OF THE POSSIBILITY OF SUCH</div><div class='add'>+ * DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/fips.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;crypto/internal/rng.h&gt;</div><div class='add'>+</div><div class='add'>+struct rand_data;</div><div class='add'>+int jent_read_entropy(struct rand_data *ec, unsigned char *data,</div><div class='add'>+		      unsigned int len);</div><div class='add'>+int jent_entropy_init(void);</div><div class='add'>+struct rand_data *jent_entropy_collector_alloc(unsigned int osr,</div><div class='add'>+					       unsigned int flags);</div><div class='add'>+void jent_entropy_collector_free(struct rand_data *entropy_collector);</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Helper function</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+__u64 jent_rol64(__u64 word, unsigned int shift)</div><div class='add'>+{</div><div class='add'>+	return rol64(word, shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *jent_zalloc(unsigned int len)</div><div class='add'>+{</div><div class='add'>+	return kzalloc(len, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jent_zfree(void *ptr)</div><div class='add'>+{</div><div class='add'>+	kzfree(ptr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int jent_fips_enabled(void)</div><div class='add'>+{</div><div class='add'>+	return fips_enabled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jent_panic(char *s)</div><div class='add'>+{</div><div class='add'>+	panic(s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jent_memcpy(void *dest, const void *src, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	memcpy(dest, src, n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jent_get_nstime(__u64 *out)</div><div class='add'>+{</div><div class='add'>+	struct timespec ts;</div><div class='add'>+	__u64 tmp = 0;</div><div class='add'>+</div><div class='add'>+	tmp = random_get_entropy();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If random_get_entropy does not return a value (which is possible on,</div><div class='add'>+	 * for example, MIPS), invoke __getnstimeofday</div><div class='add'>+	 * hoping that there are timers we can work with.</div><div class='add'>+	 *</div><div class='add'>+	 * The list of available timers can be obtained from</div><div class='add'>+	 * /sys/devices/system/clocksource/clocksource0/available_clocksource</div><div class='add'>+	 * and are registered with clocksource_register()</div><div class='add'>+	 */</div><div class='add'>+	if ((0 == tmp) &amp;&amp;</div><div class='add'>+	   (0 == __getnstimeofday(&amp;ts))) {</div><div class='add'>+		tmp = ts.tv_sec;</div><div class='add'>+		tmp = tmp &lt;&lt; 32;</div><div class='add'>+		tmp = tmp | ts.tv_nsec;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*out = tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Kernel crypto API interface</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+struct jitterentropy {</div><div class='add'>+	spinlock_t jent_lock;</div><div class='add'>+	struct rand_data *entropy_collector;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int jent_kcapi_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct jitterentropy *rng = crypto_tfm_ctx(tfm);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rng-&gt;entropy_collector = jent_entropy_collector_alloc(1, 0);</div><div class='add'>+	if (!rng-&gt;entropy_collector)</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;rng-&gt;jent_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jent_kcapi_cleanup(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct jitterentropy *rng = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;rng-&gt;jent_lock);</div><div class='add'>+	if (rng-&gt;entropy_collector)</div><div class='add'>+		jent_entropy_collector_free(rng-&gt;entropy_collector);</div><div class='add'>+	rng-&gt;entropy_collector = NULL;</div><div class='add'>+	spin_unlock(&amp;rng-&gt;jent_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jent_kcapi_random(struct crypto_rng *tfm,</div><div class='add'>+			     const u8 *src, unsigned int slen,</div><div class='add'>+			     u8 *rdata, unsigned int dlen)</div><div class='add'>+{</div><div class='add'>+	struct jitterentropy *rng = crypto_rng_ctx(tfm);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;rng-&gt;jent_lock);</div><div class='add'>+	ret = jent_read_entropy(rng-&gt;entropy_collector, rdata, dlen);</div><div class='add'>+	spin_unlock(&amp;rng-&gt;jent_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jent_kcapi_reset(struct crypto_rng *tfm,</div><div class='add'>+			    const u8 *seed, unsigned int slen)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rng_alg jent_alg = {</div><div class='add'>+	.generate		= jent_kcapi_random,</div><div class='add'>+	.seed			= jent_kcapi_reset,</div><div class='add'>+	.seedsize		= 0,</div><div class='add'>+	.base			= {</div><div class='add'>+		.cra_name               = "jitterentropy_rng",</div><div class='add'>+		.cra_driver_name        = "jitterentropy_rng",</div><div class='add'>+		.cra_priority           = 100,</div><div class='add'>+		.cra_ctxsize            = sizeof(struct jitterentropy),</div><div class='add'>+		.cra_module             = THIS_MODULE,</div><div class='add'>+		.cra_init               = jent_kcapi_init,</div><div class='add'>+		.cra_exit               = jent_kcapi_cleanup,</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init jent_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = jent_entropy_init();</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_info("jitterentropy: Initialization failed with host not compliant with requirements: %d\n", ret);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+	return crypto_register_rng(&amp;jent_alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit jent_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_rng(&amp;jent_alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(jent_mod_init);</div><div class='add'>+module_exit(jent_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='add'>+MODULE_AUTHOR("Stephan Mueller &lt;smueller@chronox.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Non-physical True Random Number Generator based on CPU Jitter");</div><div class='add'>+MODULE_ALIAS_CRYPTO("jitterentropy_rng");</div><div class='head'>diff --git a/crypto/jitterentropy.c b/crypto/jitterentropy.c<br/>new file mode 100644<br/>index 000000000000..acf44b2d2d1d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/jitterentropy.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/jitterentropy.c</a></div><div class='hunk'>@@ -0,0 +1,787 @@</div><div class='add'>+/*</div><div class='add'>+ * Non-physical true random number generator based on timing jitter --</div><div class='add'>+ * Jitter RNG standalone code.</div><div class='add'>+ *</div><div class='add'>+ * Copyright Stephan Mueller &lt;smueller@chronox.de&gt;, 2015</div><div class='add'>+ *</div><div class='add'>+ * Design</div><div class='add'>+ * ======</div><div class='add'>+ *</div><div class='add'>+ * See http://www.chronox.de/jent.html</div><div class='add'>+ *</div><div class='add'>+ * License</div><div class='add'>+ * =======</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions</div><div class='add'>+ * are met:</div><div class='add'>+ * 1. Redistributions of source code must retain the above copyright</div><div class='add'>+ *    notice, and the entire permission notice in its entirety,</div><div class='add'>+ *    including the disclaimer of warranties.</div><div class='add'>+ * 2. Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *    documentation and/or other materials provided with the distribution.</div><div class='add'>+ * 3. The name of the author may not be used to endorse or promote</div><div class='add'>+ *    products derived from this software without specific prior</div><div class='add'>+ *    written permission.</div><div class='add'>+ *</div><div class='add'>+ * ALTERNATIVELY, this product may be distributed under the terms of</div><div class='add'>+ * the GNU General Public License, in which case the provisions of the GPL2 are</div><div class='add'>+ * required INSTEAD OF the above restrictions.  (This clause is</div><div class='add'>+ * necessary due to a potential bad interaction between the GPL and</div><div class='add'>+ * the restrictions contained in a BSD-style copyright.)</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED</div><div class='add'>+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES</div><div class='add'>+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ALL OF</div><div class='add'>+ * WHICH ARE HEREBY DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE</div><div class='add'>+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='add'>+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT</div><div class='add'>+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR</div><div class='add'>+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF</div><div class='add'>+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE</div><div class='add'>+ * USE OF THIS SOFTWARE, EVEN IF NOT ADVISED OF THE POSSIBILITY OF SUCH</div><div class='add'>+ * DAMAGE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This Jitterentropy RNG is based on the jitterentropy library</div><div class='add'>+ * version 1.1.0 provided at http://www.chronox.de/jent.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef __OPTIMIZE__</div><div class='add'>+ #error "The CPU Jitter random number generator must not be compiled with optimizations. See documentation. Use the compiler switch -O0 for compiling jitterentropy.c."</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+typedef	unsigned long long	__u64;</div><div class='add'>+typedef	long long		__s64;</div><div class='add'>+typedef	unsigned int		__u32;</div><div class='add'>+#define NULL    ((void *) 0)</div><div class='add'>+</div><div class='add'>+/* The entropy pool */</div><div class='add'>+struct rand_data {</div><div class='add'>+	/* all data values that are vital to maintain the security</div><div class='add'>+	 * of the RNG are marked as SENSITIVE. A user must not</div><div class='add'>+	 * access that information while the RNG executes its loops to</div><div class='add'>+	 * calculate the next random value. */</div><div class='add'>+	__u64 data;		/* SENSITIVE Actual random number */</div><div class='add'>+	__u64 old_data;		/* SENSITIVE Previous random number */</div><div class='add'>+	__u64 prev_time;	/* SENSITIVE Previous time stamp */</div><div class='add'>+#define DATA_SIZE_BITS ((sizeof(__u64)) * 8)</div><div class='add'>+	__u64 last_delta;	/* SENSITIVE stuck test */</div><div class='add'>+	__s64 last_delta2;	/* SENSITIVE stuck test */</div><div class='add'>+	unsigned int stuck:1;	/* Time measurement stuck */</div><div class='add'>+	unsigned int osr;	/* Oversample rate */</div><div class='add'>+	unsigned int stir:1;		/* Post-processing stirring */</div><div class='add'>+	unsigned int disable_unbias:1;	/* Deactivate Von-Neuman unbias */</div><div class='add'>+#define JENT_MEMORY_BLOCKS 64</div><div class='add'>+#define JENT_MEMORY_BLOCKSIZE 32</div><div class='add'>+#define JENT_MEMORY_ACCESSLOOPS 128</div><div class='add'>+#define JENT_MEMORY_SIZE (JENT_MEMORY_BLOCKS*JENT_MEMORY_BLOCKSIZE)</div><div class='add'>+	unsigned char *mem;	/* Memory access location with size of</div><div class='add'>+				 * memblocks * memblocksize */</div><div class='add'>+	unsigned int memlocation; /* Pointer to byte in *mem */</div><div class='add'>+	unsigned int memblocks;	/* Number of memory blocks in *mem */</div><div class='add'>+	unsigned int memblocksize; /* Size of one memory block in bytes */</div><div class='add'>+	unsigned int memaccessloops; /* Number of memory accesses per random</div><div class='add'>+				      * bit generation */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Flags that can be used to initialize the RNG */</div><div class='add'>+#define JENT_DISABLE_STIR (1&lt;&lt;0) /* Disable stirring the entropy pool */</div><div class='add'>+#define JENT_DISABLE_UNBIAS (1&lt;&lt;1) /* Disable the Von-Neuman Unbiaser */</div><div class='add'>+#define JENT_DISABLE_MEMORY_ACCESS (1&lt;&lt;2) /* Disable memory access for more</div><div class='add'>+					   * entropy, saves MEMORY_SIZE RAM for</div><div class='add'>+					   * entropy collector */</div><div class='add'>+</div><div class='add'>+/* -- error codes for init function -- */</div><div class='add'>+#define JENT_ENOTIME		1 /* Timer service not available */</div><div class='add'>+#define JENT_ECOARSETIME	2 /* Timer too coarse for RNG */</div><div class='add'>+#define JENT_ENOMONOTONIC	3 /* Timer is not monotonic increasing */</div><div class='add'>+#define JENT_EMINVARIATION	4 /* Timer variations too small for RNG */</div><div class='add'>+#define JENT_EVARVAR		5 /* Timer does not produce variations of</div><div class='add'>+				   * variations (2nd derivation of time is</div><div class='add'>+				   * zero). */</div><div class='add'>+#define JENT_EMINVARVAR		6 /* Timer variations of variations is tooi</div><div class='add'>+				   * small. */</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Helper functions</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+void jent_get_nstime(__u64 *out);</div><div class='add'>+__u64 jent_rol64(__u64 word, unsigned int shift);</div><div class='add'>+void *jent_zalloc(unsigned int len);</div><div class='add'>+void jent_zfree(void *ptr);</div><div class='add'>+int jent_fips_enabled(void);</div><div class='add'>+void jent_panic(char *s);</div><div class='add'>+void jent_memcpy(void *dest, const void *src, unsigned int n);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Update of the loop count used for the next round of</div><div class='add'>+ * an entropy collection.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec entropy collector struct -- may be NULL</div><div class='add'>+ * @bits is the number of low bits of the timer to consider</div><div class='add'>+ * @min is the number of bits we shift the timer value to the right at</div><div class='add'>+ *	the end to make sure we have a guaranteed minimum value</div><div class='add'>+ *</div><div class='add'>+ * @return Newly calculated loop counter</div><div class='add'>+ */</div><div class='add'>+static __u64 jent_loop_shuffle(struct rand_data *ec,</div><div class='add'>+			       unsigned int bits, unsigned int min)</div><div class='add'>+{</div><div class='add'>+	__u64 time = 0;</div><div class='add'>+	__u64 shuffle = 0;</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	unsigned int mask = (1&lt;&lt;bits) - 1;</div><div class='add'>+</div><div class='add'>+	jent_get_nstime(&amp;time);</div><div class='add'>+	/*</div><div class='add'>+	 * mix the current state of the random number into the shuffle</div><div class='add'>+	 * calculation to balance that shuffle a bit more</div><div class='add'>+	 */</div><div class='add'>+	if (ec)</div><div class='add'>+		time ^= ec-&gt;data;</div><div class='add'>+	/*</div><div class='add'>+	 * we fold the time value as much as possible to ensure that as many</div><div class='add'>+	 * bits of the time stamp are included as possible</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; (DATA_SIZE_BITS / bits) &gt; i; i++) {</div><div class='add'>+		shuffle ^= time &amp; mask;</div><div class='add'>+		time = time &gt;&gt; bits;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We add a lower boundary value to ensure we have a minimum</div><div class='add'>+	 * RNG loop count.</div><div class='add'>+	 */</div><div class='add'>+	return (shuffle + (1&lt;&lt;min));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Noise sources</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * CPU Jitter noise source -- this is the noise source based on the CPU</div><div class='add'>+ *			      execution time jitter</div><div class='add'>+ *</div><div class='add'>+ * This function folds the time into one bit units by iterating</div><div class='add'>+ * through the DATA_SIZE_BITS bit time value as follows: assume our time value</div><div class='add'>+ * is 0xabcd</div><div class='add'>+ * 1st loop, 1st shift generates 0xd000</div><div class='add'>+ * 1st loop, 2nd shift generates 0x000d</div><div class='add'>+ * 2nd loop, 1st shift generates 0xcd00</div><div class='add'>+ * 2nd loop, 2nd shift generates 0x000c</div><div class='add'>+ * 3rd loop, 1st shift generates 0xbcd0</div><div class='add'>+ * 3rd loop, 2nd shift generates 0x000b</div><div class='add'>+ * 4th loop, 1st shift generates 0xabcd</div><div class='add'>+ * 4th loop, 2nd shift generates 0x000a</div><div class='add'>+ * Now, the values at the end of the 2nd shifts are XORed together.</div><div class='add'>+ *</div><div class='add'>+ * The code is deliberately inefficient and shall stay that way. This function</div><div class='add'>+ * is the root cause why the code shall be compiled without optimization. This</div><div class='add'>+ * function not only acts as folding operation, but this function's execution</div><div class='add'>+ * is used to measure the CPU execution time jitter. Any change to the loop in</div><div class='add'>+ * this function implies that careful retesting must be done.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec entropy collector struct -- may be NULL</div><div class='add'>+ * @time time stamp to be folded</div><div class='add'>+ * @loop_cnt if a value not equal to 0 is set, use the given value as number of</div><div class='add'>+ *	     loops to perform the folding</div><div class='add'>+ *</div><div class='add'>+ * Output:</div><div class='add'>+ * @folded result of folding operation</div><div class='add'>+ *</div><div class='add'>+ * @return Number of loops the folding operation is performed</div><div class='add'>+ */</div><div class='add'>+static __u64 jent_fold_time(struct rand_data *ec, __u64 time,</div><div class='add'>+			    __u64 *folded, __u64 loop_cnt)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	__u64 j = 0;</div><div class='add'>+	__u64 new = 0;</div><div class='add'>+#define MAX_FOLD_LOOP_BIT 4</div><div class='add'>+#define MIN_FOLD_LOOP_BIT 0</div><div class='add'>+	__u64 fold_loop_cnt =</div><div class='add'>+		jent_loop_shuffle(ec, MAX_FOLD_LOOP_BIT, MIN_FOLD_LOOP_BIT);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * testing purposes -- allow test app to set the counter, not</div><div class='add'>+	 * needed during runtime</div><div class='add'>+	 */</div><div class='add'>+	if (loop_cnt)</div><div class='add'>+		fold_loop_cnt = loop_cnt;</div><div class='add'>+	for (j = 0; j &lt; fold_loop_cnt; j++) {</div><div class='add'>+		new = 0;</div><div class='add'>+		for (i = 1; (DATA_SIZE_BITS) &gt;= i; i++) {</div><div class='add'>+			__u64 tmp = time &lt;&lt; (DATA_SIZE_BITS - i);</div><div class='add'>+</div><div class='add'>+			tmp = tmp &gt;&gt; (DATA_SIZE_BITS - 1);</div><div class='add'>+			new ^= tmp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	*folded = new;</div><div class='add'>+	return fold_loop_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Memory Access noise source -- this is a noise source based on variations in</div><div class='add'>+ *				 memory access times</div><div class='add'>+ *</div><div class='add'>+ * This function performs memory accesses which will add to the timing</div><div class='add'>+ * variations due to an unknown amount of CPU wait states that need to be</div><div class='add'>+ * added when accessing memory. The memory size should be larger than the L1</div><div class='add'>+ * caches as outlined in the documentation and the associated testing.</div><div class='add'>+ *</div><div class='add'>+ * The L1 cache has a very high bandwidth, albeit its access rate is  usually</div><div class='add'>+ * slower than accessing CPU registers. Therefore, L1 accesses only add minimal</div><div class='add'>+ * variations as the CPU has hardly to wait. Starting with L2, significant</div><div class='add'>+ * variations are added because L2 typically does not belong to the CPU any more</div><div class='add'>+ * and therefore a wider range of CPU wait states is necessary for accesses.</div><div class='add'>+ * L3 and real memory accesses have even a wider range of wait states. However,</div><div class='add'>+ * to reliably access either L3 or memory, the ec-&gt;mem memory must be quite</div><div class='add'>+ * large which is usually not desirable.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec Reference to the entropy collector with the memory access data -- if</div><div class='add'>+ *     the reference to the memory block to be accessed is NULL, this noise</div><div class='add'>+ *     source is disabled</div><div class='add'>+ * @loop_cnt if a value not equal to 0 is set, use the given value as number of</div><div class='add'>+ *	     loops to perform the folding</div><div class='add'>+ *</div><div class='add'>+ * @return Number of memory access operations</div><div class='add'>+ */</div><div class='add'>+static unsigned int jent_memaccess(struct rand_data *ec, __u64 loop_cnt)</div><div class='add'>+{</div><div class='add'>+	unsigned char *tmpval = NULL;</div><div class='add'>+	unsigned int wrap = 0;</div><div class='add'>+	__u64 i = 0;</div><div class='add'>+#define MAX_ACC_LOOP_BIT 7</div><div class='add'>+#define MIN_ACC_LOOP_BIT 0</div><div class='add'>+	__u64 acc_loop_cnt =</div><div class='add'>+		jent_loop_shuffle(ec, MAX_ACC_LOOP_BIT, MIN_ACC_LOOP_BIT);</div><div class='add'>+</div><div class='add'>+	if (NULL == ec || NULL == ec-&gt;mem)</div><div class='add'>+		return 0;</div><div class='add'>+	wrap = ec-&gt;memblocksize * ec-&gt;memblocks;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * testing purposes -- allow test app to set the counter, not</div><div class='add'>+	 * needed during runtime</div><div class='add'>+	 */</div><div class='add'>+	if (loop_cnt)</div><div class='add'>+		acc_loop_cnt = loop_cnt;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (ec-&gt;memaccessloops + acc_loop_cnt); i++) {</div><div class='add'>+		tmpval = ec-&gt;mem + ec-&gt;memlocation;</div><div class='add'>+		/*</div><div class='add'>+		 * memory access: just add 1 to one byte,</div><div class='add'>+		 * wrap at 255 -- memory access implies read</div><div class='add'>+		 * from and write to memory location</div><div class='add'>+		 */</div><div class='add'>+		*tmpval = (*tmpval + 1) &amp; 0xff;</div><div class='add'>+		/*</div><div class='add'>+		 * Addition of memblocksize - 1 to pointer</div><div class='add'>+		 * with wrap around logic to ensure that every</div><div class='add'>+		 * memory location is hit evenly</div><div class='add'>+		 */</div><div class='add'>+		ec-&gt;memlocation = ec-&gt;memlocation + ec-&gt;memblocksize - 1;</div><div class='add'>+		ec-&gt;memlocation = ec-&gt;memlocation % wrap;</div><div class='add'>+	}</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Start of entropy processing logic</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Stuck test by checking the:</div><div class='add'>+ *	1st derivation of the jitter measurement (time delta)</div><div class='add'>+ *	2nd derivation of the jitter measurement (delta of time deltas)</div><div class='add'>+ *	3rd derivation of the jitter measurement (delta of delta of time deltas)</div><div class='add'>+ *</div><div class='add'>+ * All values must always be non-zero.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec Reference to entropy collector</div><div class='add'>+ * @current_delta Jitter time delta</div><div class='add'>+ *</div><div class='add'>+ * @return</div><div class='add'>+ *	0 jitter measurement not stuck (good bit)</div><div class='add'>+ *	1 jitter measurement stuck (reject bit)</div><div class='add'>+ */</div><div class='add'>+static void jent_stuck(struct rand_data *ec, __u64 current_delta)</div><div class='add'>+{</div><div class='add'>+	__s64 delta2 = ec-&gt;last_delta - current_delta;</div><div class='add'>+	__s64 delta3 = delta2 - ec-&gt;last_delta2;</div><div class='add'>+</div><div class='add'>+	ec-&gt;last_delta = current_delta;</div><div class='add'>+	ec-&gt;last_delta2 = delta2;</div><div class='add'>+</div><div class='add'>+	if (!current_delta || !delta2 || !delta3)</div><div class='add'>+		ec-&gt;stuck = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * This is the heart of the entropy generation: calculate time deltas and</div><div class='add'>+ * use the CPU jitter in the time deltas. The jitter is folded into one</div><div class='add'>+ * bit. You can call this function the "random bit generator" as it</div><div class='add'>+ * produces one random bit per invocation.</div><div class='add'>+ *</div><div class='add'>+ * WARNING: ensure that -&gt;prev_time is primed before using the output</div><div class='add'>+ *	    of this function! This can be done by calling this function</div><div class='add'>+ *	    and not using its result.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @entropy_collector Reference to entropy collector</div><div class='add'>+ *</div><div class='add'>+ * @return One random bit</div><div class='add'>+ */</div><div class='add'>+static __u64 jent_measure_jitter(struct rand_data *ec)</div><div class='add'>+{</div><div class='add'>+	__u64 time = 0;</div><div class='add'>+	__u64 data = 0;</div><div class='add'>+	__u64 current_delta = 0;</div><div class='add'>+</div><div class='add'>+	/* Invoke one noise source before time measurement to add variations */</div><div class='add'>+	jent_memaccess(ec, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get time stamp and calculate time delta to previous</div><div class='add'>+	 * invocation to measure the timing variations</div><div class='add'>+	 */</div><div class='add'>+	jent_get_nstime(&amp;time);</div><div class='add'>+	current_delta = time - ec-&gt;prev_time;</div><div class='add'>+	ec-&gt;prev_time = time;</div><div class='add'>+</div><div class='add'>+	/* Now call the next noise sources which also folds the data */</div><div class='add'>+	jent_fold_time(ec, current_delta, &amp;data, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check whether we have a stuck measurement. The enforcement</div><div class='add'>+	 * is performed after the stuck value has been mixed into the</div><div class='add'>+	 * entropy pool.</div><div class='add'>+	 */</div><div class='add'>+	jent_stuck(ec, current_delta);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Von Neuman unbias as explained in RFC 4086 section 4.2. As shown in the</div><div class='add'>+ * documentation of that RNG, the bits from jent_measure_jitter are considered</div><div class='add'>+ * independent which implies that the Von Neuman unbias operation is applicable.</div><div class='add'>+ * A proof of the Von-Neumann unbias operation to remove skews is given in the</div><div class='add'>+ * document "A proposal for: Functionality classes for random number</div><div class='add'>+ * generators", version 2.0 by Werner Schindler, section 5.4.1.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @entropy_collector Reference to entropy collector</div><div class='add'>+ *</div><div class='add'>+ * @return One random bit</div><div class='add'>+ */</div><div class='add'>+static __u64 jent_unbiased_bit(struct rand_data *entropy_collector)</div><div class='add'>+{</div><div class='add'>+	do {</div><div class='add'>+		__u64 a = jent_measure_jitter(entropy_collector);</div><div class='add'>+		__u64 b = jent_measure_jitter(entropy_collector);</div><div class='add'>+</div><div class='add'>+		if (a == b)</div><div class='add'>+			continue;</div><div class='add'>+		if (1 == a)</div><div class='add'>+			return 1;</div><div class='add'>+		else</div><div class='add'>+			return 0;</div><div class='add'>+	} while (1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Shuffle the pool a bit by mixing some value with a bijective function (XOR)</div><div class='add'>+ * into the pool.</div><div class='add'>+ *</div><div class='add'>+ * The function generates a mixer value that depends on the bits set and the</div><div class='add'>+ * location of the set bits in the random number generated by the entropy</div><div class='add'>+ * source. Therefore, based on the generated random number, this mixer value</div><div class='add'>+ * can have 2**64 different values. That mixer value is initialized with the</div><div class='add'>+ * first two SHA-1 constants. After obtaining the mixer value, it is XORed into</div><div class='add'>+ * the random number.</div><div class='add'>+ *</div><div class='add'>+ * The mixer value is not assumed to contain any entropy. But due to the XOR</div><div class='add'>+ * operation, it can also not destroy any entropy present in the entropy pool.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @entropy_collector Reference to entropy collector</div><div class='add'>+ */</div><div class='add'>+static void jent_stir_pool(struct rand_data *entropy_collector)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * to shut up GCC on 32 bit, we have to initialize the 64 variable</div><div class='add'>+	 * with two 32 bit variables</div><div class='add'>+	 */</div><div class='add'>+	union c {</div><div class='add'>+		__u64 u64;</div><div class='add'>+		__u32 u32[2];</div><div class='add'>+	};</div><div class='add'>+	/*</div><div class='add'>+	 * This constant is derived from the first two 32 bit initialization</div><div class='add'>+	 * vectors of SHA-1 as defined in FIPS 180-4 section 5.3.1</div><div class='add'>+	 */</div><div class='add'>+	union c constant;</div><div class='add'>+	/*</div><div class='add'>+	 * The start value of the mixer variable is derived from the third</div><div class='add'>+	 * and fourth 32 bit initialization vector of SHA-1 as defined in</div><div class='add'>+	 * FIPS 180-4 section 5.3.1</div><div class='add'>+	 */</div><div class='add'>+	union c mixer;</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Store the SHA-1 constants in reverse order to make up the 64 bit</div><div class='add'>+	 * value -- this applies to a little endian system, on a big endian</div><div class='add'>+	 * system, it reverses as expected. But this really does not matter</div><div class='add'>+	 * as we do not rely on the specific numbers. We just pick the SHA-1</div><div class='add'>+	 * constants as they have a good mix of bit set and unset.</div><div class='add'>+	 */</div><div class='add'>+	constant.u32[1] = 0x67452301;</div><div class='add'>+	constant.u32[0] = 0xefcdab89;</div><div class='add'>+	mixer.u32[1] = 0x98badcfe;</div><div class='add'>+	mixer.u32[0] = 0x10325476;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DATA_SIZE_BITS; i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * get the i-th bit of the input random number and only XOR</div><div class='add'>+		 * the constant into the mixer value when that bit is set</div><div class='add'>+		 */</div><div class='add'>+		if ((entropy_collector-&gt;data &gt;&gt; i) &amp; 1)</div><div class='add'>+			mixer.u64 ^= constant.u64;</div><div class='add'>+		mixer.u64 = jent_rol64(mixer.u64, 1);</div><div class='add'>+	}</div><div class='add'>+	entropy_collector-&gt;data ^= mixer.u64;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Generator of one 64 bit random number</div><div class='add'>+ * Function fills rand_data-&gt;data</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec Reference to entropy collector</div><div class='add'>+ */</div><div class='add'>+static void jent_gen_entropy(struct rand_data *ec)</div><div class='add'>+{</div><div class='add'>+	unsigned int k = 0;</div><div class='add'>+</div><div class='add'>+	/* priming of the -&gt;prev_time value */</div><div class='add'>+	jent_measure_jitter(ec);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		__u64 data = 0;</div><div class='add'>+</div><div class='add'>+		if (ec-&gt;disable_unbias == 1)</div><div class='add'>+			data = jent_measure_jitter(ec);</div><div class='add'>+		else</div><div class='add'>+			data = jent_unbiased_bit(ec);</div><div class='add'>+</div><div class='add'>+		/* enforcement of the jent_stuck test */</div><div class='add'>+		if (ec-&gt;stuck) {</div><div class='add'>+			/*</div><div class='add'>+			 * We only mix in the bit considered not appropriate</div><div class='add'>+			 * without the LSFR. The reason is that if we apply</div><div class='add'>+			 * the LSFR and we do not rotate, the 2nd bit with LSFR</div><div class='add'>+			 * will cancel out the first LSFR application on the</div><div class='add'>+			 * bad bit.</div><div class='add'>+			 *</div><div class='add'>+			 * And we do not rotate as we apply the next bit to the</div><div class='add'>+			 * current bit location again.</div><div class='add'>+			 */</div><div class='add'>+			ec-&gt;data ^= data;</div><div class='add'>+			ec-&gt;stuck = 0;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Fibonacci LSFR with polynom of</div><div class='add'>+		 *  x^64 + x^61 + x^56 + x^31 + x^28 + x^23 + 1 which is</div><div class='add'>+		 *  primitive according to</div><div class='add'>+		 *   http://poincare.matf.bg.ac.rs/~ezivkovm/publications/primpol1.pdf</div><div class='add'>+		 * (the shift values are the polynom values minus one</div><div class='add'>+		 * due to counting bits from 0 to 63). As the current</div><div class='add'>+		 * position is always the LSB, the polynom only needs</div><div class='add'>+		 * to shift data in from the left without wrap.</div><div class='add'>+		 */</div><div class='add'>+		ec-&gt;data ^= data;</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 63) &amp; 1);</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 60) &amp; 1);</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 55) &amp; 1);</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 30) &amp; 1);</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 27) &amp; 1);</div><div class='add'>+		ec-&gt;data ^= ((ec-&gt;data &gt;&gt; 22) &amp; 1);</div><div class='add'>+		ec-&gt;data = jent_rol64(ec-&gt;data, 1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We multiply the loop value with -&gt;osr to obtain the</div><div class='add'>+		 * oversampling rate requested by the caller</div><div class='add'>+		 */</div><div class='add'>+		if (++k &gt;= (DATA_SIZE_BITS * ec-&gt;osr))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;stir)</div><div class='add'>+		jent_stir_pool(ec);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * The continuous test required by FIPS 140-2 -- the function automatically</div><div class='add'>+ * primes the test if needed.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * 0 if FIPS test passed</div><div class='add'>+ * &lt; 0 if FIPS test failed</div><div class='add'>+ */</div><div class='add'>+static void jent_fips_test(struct rand_data *ec)</div><div class='add'>+{</div><div class='add'>+	if (!jent_fips_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* prime the FIPS test */</div><div class='add'>+	if (!ec-&gt;old_data) {</div><div class='add'>+		ec-&gt;old_data = ec-&gt;data;</div><div class='add'>+		jent_gen_entropy(ec);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ec-&gt;data == ec-&gt;old_data)</div><div class='add'>+		jent_panic("jitterentropy: Duplicate output detected\n");</div><div class='add'>+</div><div class='add'>+	ec-&gt;old_data = ec-&gt;data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Entry function: Obtain entropy for the caller.</div><div class='add'>+ *</div><div class='add'>+ * This function invokes the entropy gathering logic as often to generate</div><div class='add'>+ * as many bytes as requested by the caller. The entropy gathering logic</div><div class='add'>+ * creates 64 bit per invocation.</div><div class='add'>+ *</div><div class='add'>+ * This function truncates the last 64 bit entropy value output to the exact</div><div class='add'>+ * size specified by the caller.</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ * @ec Reference to entropy collector</div><div class='add'>+ * @data pointer to buffer for storing random data -- buffer must already</div><div class='add'>+ *	 exist</div><div class='add'>+ * @len size of the buffer, specifying also the requested number of random</div><div class='add'>+ *	in bytes</div><div class='add'>+ *</div><div class='add'>+ * @return 0 when request is fulfilled or an error</div><div class='add'>+ *</div><div class='add'>+ * The following error codes can occur:</div><div class='add'>+ *	-1	entropy_collector is NULL</div><div class='add'>+ */</div><div class='add'>+int jent_read_entropy(struct rand_data *ec, unsigned char *data,</div><div class='add'>+		      unsigned int len)</div><div class='add'>+{</div><div class='add'>+	unsigned char *p = data;</div><div class='add'>+</div><div class='add'>+	if (!ec)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	while (0 &lt; len) {</div><div class='add'>+		unsigned int tocopy;</div><div class='add'>+</div><div class='add'>+		jent_gen_entropy(ec);</div><div class='add'>+		jent_fips_test(ec);</div><div class='add'>+		if ((DATA_SIZE_BITS / 8) &lt; len)</div><div class='add'>+			tocopy = (DATA_SIZE_BITS / 8);</div><div class='add'>+		else</div><div class='add'>+			tocopy = len;</div><div class='add'>+		jent_memcpy(p, &amp;ec-&gt;data, tocopy);</div><div class='add'>+</div><div class='add'>+		len -= tocopy;</div><div class='add'>+		p += tocopy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***************************************************************************</div><div class='add'>+ * Initialization logic</div><div class='add'>+ ***************************************************************************/</div><div class='add'>+</div><div class='add'>+struct rand_data *jent_entropy_collector_alloc(unsigned int osr,</div><div class='add'>+					       unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	struct rand_data *entropy_collector;</div><div class='add'>+</div><div class='add'>+	entropy_collector = jent_zalloc(sizeof(struct rand_data));</div><div class='add'>+	if (!entropy_collector)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!(flags &amp; JENT_DISABLE_MEMORY_ACCESS)) {</div><div class='add'>+		/* Allocate memory for adding variations based on memory</div><div class='add'>+		 * access</div><div class='add'>+		 */</div><div class='add'>+		entropy_collector-&gt;mem = jent_zalloc(JENT_MEMORY_SIZE);</div><div class='add'>+		if (!entropy_collector-&gt;mem) {</div><div class='add'>+			jent_zfree(entropy_collector);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		entropy_collector-&gt;memblocksize = JENT_MEMORY_BLOCKSIZE;</div><div class='add'>+		entropy_collector-&gt;memblocks = JENT_MEMORY_BLOCKS;</div><div class='add'>+		entropy_collector-&gt;memaccessloops = JENT_MEMORY_ACCESSLOOPS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* verify and set the oversampling rate */</div><div class='add'>+	if (0 == osr)</div><div class='add'>+		osr = 1; /* minimum sampling rate is 1 */</div><div class='add'>+	entropy_collector-&gt;osr = osr;</div><div class='add'>+</div><div class='add'>+	entropy_collector-&gt;stir = 1;</div><div class='add'>+	if (flags &amp; JENT_DISABLE_STIR)</div><div class='add'>+		entropy_collector-&gt;stir = 0;</div><div class='add'>+	if (flags &amp; JENT_DISABLE_UNBIAS)</div><div class='add'>+		entropy_collector-&gt;disable_unbias = 1;</div><div class='add'>+</div><div class='add'>+	/* fill the data pad with non-zero values */</div><div class='add'>+	jent_gen_entropy(entropy_collector);</div><div class='add'>+</div><div class='add'>+	return entropy_collector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jent_entropy_collector_free(struct rand_data *entropy_collector)</div><div class='add'>+{</div><div class='add'>+	jent_zfree(entropy_collector-&gt;mem);</div><div class='add'>+	entropy_collector-&gt;mem = NULL;</div><div class='add'>+	jent_zfree(entropy_collector);</div><div class='add'>+	entropy_collector = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int jent_entropy_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	__u64 delta_sum = 0;</div><div class='add'>+	__u64 old_delta = 0;</div><div class='add'>+	int time_backwards = 0;</div><div class='add'>+	int count_var = 0;</div><div class='add'>+	int count_mod = 0;</div><div class='add'>+</div><div class='add'>+	/* We could perform statistical tests here, but the problem is</div><div class='add'>+	 * that we only have a few loop counts to do testing. These</div><div class='add'>+	 * loop counts may show some slight skew and we produce</div><div class='add'>+	 * false positives.</div><div class='add'>+	 *</div><div class='add'>+	 * Moreover, only old systems show potentially problematic</div><div class='add'>+	 * jitter entropy that could potentially be caught here. But</div><div class='add'>+	 * the RNG is intended for hardware that is available or widely</div><div class='add'>+	 * used, but not old systems that are long out of favor. Thus,</div><div class='add'>+	 * no statistical tests.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We could add a check for system capabilities such as clock_getres or</div><div class='add'>+	 * check for CONFIG_X86_TSC, but it does not make much sense as the</div><div class='add'>+	 * following sanity checks verify that we have a high-resolution</div><div class='add'>+	 * timer.</div><div class='add'>+	 */</div><div class='add'>+	/*</div><div class='add'>+	 * TESTLOOPCOUNT needs some loops to identify edge systems. 100 is</div><div class='add'>+	 * definitely too little.</div><div class='add'>+	 */</div><div class='add'>+#define TESTLOOPCOUNT 300</div><div class='add'>+#define CLEARCACHE 100</div><div class='add'>+	for (i = 0; (TESTLOOPCOUNT + CLEARCACHE) &gt; i; i++) {</div><div class='add'>+		__u64 time = 0;</div><div class='add'>+		__u64 time2 = 0;</div><div class='add'>+		__u64 folded = 0;</div><div class='add'>+		__u64 delta = 0;</div><div class='add'>+		unsigned int lowdelta = 0;</div><div class='add'>+</div><div class='add'>+		jent_get_nstime(&amp;time);</div><div class='add'>+		jent_fold_time(NULL, time, &amp;folded, 1&lt;&lt;MIN_FOLD_LOOP_BIT);</div><div class='add'>+		jent_get_nstime(&amp;time2);</div><div class='add'>+</div><div class='add'>+		/* test whether timer works */</div><div class='add'>+		if (!time || !time2)</div><div class='add'>+			return JENT_ENOTIME;</div><div class='add'>+		delta = time2 - time;</div><div class='add'>+		/*</div><div class='add'>+		 * test whether timer is fine grained enough to provide</div><div class='add'>+		 * delta even when called shortly after each other -- this</div><div class='add'>+		 * implies that we also have a high resolution timer</div><div class='add'>+		 */</div><div class='add'>+		if (!delta)</div><div class='add'>+			return JENT_ECOARSETIME;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * up to here we did not modify any variable that will be</div><div class='add'>+		 * evaluated later, but we already performed some work. Thus we</div><div class='add'>+		 * already have had an impact on the caches, branch prediction,</div><div class='add'>+		 * etc. with the goal to clear it to get the worst case</div><div class='add'>+		 * measurements.</div><div class='add'>+		 */</div><div class='add'>+		if (CLEARCACHE &gt; i)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* test whether we have an increasing timer */</div><div class='add'>+		if (!(time2 &gt; time))</div><div class='add'>+			time_backwards++;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Avoid modulo of 64 bit integer to allow code to compile</div><div class='add'>+		 * on 32 bit architectures.</div><div class='add'>+		 */</div><div class='add'>+		lowdelta = time2 - time;</div><div class='add'>+		if (!(lowdelta % 100))</div><div class='add'>+			count_mod++;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * ensure that we have a varying delta timer which is necessary</div><div class='add'>+		 * for the calculation of entropy -- perform this check</div><div class='add'>+		 * only after the first loop is executed as we need to prime</div><div class='add'>+		 * the old_data value</div><div class='add'>+		 */</div><div class='add'>+		if (i) {</div><div class='add'>+			if (delta != old_delta)</div><div class='add'>+				count_var++;</div><div class='add'>+			if (delta &gt; old_delta)</div><div class='add'>+				delta_sum += (delta - old_delta);</div><div class='add'>+			else</div><div class='add'>+				delta_sum += (old_delta - delta);</div><div class='add'>+		}</div><div class='add'>+		old_delta = delta;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * we allow up to three times the time running backwards.</div><div class='add'>+	 * CLOCK_REALTIME is affected by adjtime and NTP operations. Thus,</div><div class='add'>+	 * if such an operation just happens to interfere with our test, it</div><div class='add'>+	 * should not fail. The value of 3 should cover the NTP case being</div><div class='add'>+	 * performed during our test run.</div><div class='add'>+	 */</div><div class='add'>+	if (3 &lt; time_backwards)</div><div class='add'>+		return JENT_ENOMONOTONIC;</div><div class='add'>+	/* Error if the time variances are always identical */</div><div class='add'>+	if (!delta_sum)</div><div class='add'>+		return JENT_EVARVAR;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Variations of deltas of time must on average be larger</div><div class='add'>+	 * than 1 to ensure the entropy estimation</div><div class='add'>+	 * implied with 1 is preserved</div><div class='add'>+	 */</div><div class='add'>+	if (delta_sum &lt;= 1)</div><div class='add'>+		return JENT_EMINVARVAR;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that we have variations in the time stamp below 10 for at</div><div class='add'>+	 * least 10% of all checks -- on some platforms, the counter</div><div class='add'>+	 * increments in multiples of 100, but not always</div><div class='add'>+	 */</div><div class='add'>+	if ((TESTLOOPCOUNT/10 * 9) &lt; count_mod)</div><div class='add'>+		return JENT_ECOARSETIME;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/crypto/krng.c b/crypto/krng.c<br/>deleted file mode 100644<br/>index 0224841b6579..000000000000<br/>--- a/<a href='/drm-misc/tree/crypto/krng.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/krng.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * RNG implementation using standard kernel RNG.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2008 Herbert Xu &lt;herbert@gondor.apana.org.au&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * any later version.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/rng.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='del'>-</div><div class='del'>-static int krng_get_random(struct crypto_rng *tfm, u8 *rdata, unsigned int dlen)</div><div class='del'>-{</div><div class='del'>-	get_random_bytes(rdata, dlen);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int krng_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct crypto_alg krng_alg = {</div><div class='del'>-	.cra_name		= "stdrng",</div><div class='del'>-	.cra_driver_name	= "krng",</div><div class='del'>-	.cra_priority		= 200,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_RNG,</div><div class='del'>-	.cra_ctxsize		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_rng_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_u			= {</div><div class='del'>-		.rng = {</div><div class='del'>-			.rng_make_random	= krng_get_random,</div><div class='del'>-			.rng_reset		= krng_reset,</div><div class='del'>-			.seedsize		= 0,</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Module initalization */</div><div class='del'>-static int __init krng_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_alg(&amp;krng_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit krng_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_alg(&amp;krng_alg);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(krng_mod_init);</div><div class='del'>-module_exit(krng_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("Kernel Random Number Generator");</div><div class='del'>-MODULE_ALIAS_CRYPTO("stdrng");</div><div class='del'>-MODULE_ALIAS_CRYPTO("krng");</div><div class='head'>diff --git a/crypto/md5.c b/crypto/md5.c<br/>index 36f5e5b103f3..33d17e9a8702 100644<br/>--- a/<a href='/drm-misc/tree/crypto/md5.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/md5.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/md5.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/md5.c</a></div><div class='hunk'>@@ -51,10 +51,10 @@ static int md5_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mctx-&gt;hash[0] = 0x67452301;</div><div class='del'>-	mctx-&gt;hash[1] = 0xefcdab89;</div><div class='del'>-	mctx-&gt;hash[2] = 0x98badcfe;</div><div class='del'>-	mctx-&gt;hash[3] = 0x10325476;</div><div class='add'>+	mctx-&gt;hash[0] = MD5_H0;</div><div class='add'>+	mctx-&gt;hash[1] = MD5_H1;</div><div class='add'>+	mctx-&gt;hash[2] = MD5_H2;</div><div class='add'>+	mctx-&gt;hash[3] = MD5_H3;</div><div class='ctx'> 	mctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/crypto/pcompress.c b/crypto/pcompress.c<br/>index 7140fe70c7af..7a13b4088857 100644<br/>--- a/<a href='/drm-misc/tree/crypto/pcompress.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/pcompress.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/pcompress.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/pcompress.c</a></div><div class='hunk'>@@ -38,11 +38,6 @@ static int crypto_pcomp_init(struct crypto_tfm *tfm, u32 type, u32 mask)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int crypto_pcomp_extsize(struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return alg-&gt;cra_ctxsize;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int crypto_pcomp_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -77,7 +72,7 @@ static void crypto_pcomp_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct crypto_type crypto_pcomp_type = {</div><div class='del'>-	.extsize	= crypto_pcomp_extsize,</div><div class='add'>+	.extsize	= crypto_alg_extsize,</div><div class='ctx'> 	.init		= crypto_pcomp_init,</div><div class='ctx'> 	.init_tfm	= crypto_pcomp_init_tfm,</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='head'>diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c<br/>index c305d4112735..45e7d5155672 100644<br/>--- a/<a href='/drm-misc/tree/crypto/pcrypt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/pcrypt.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/pcrypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/pcrypt.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -60,8 +61,8 @@ static struct padata_pcrypt pdecrypt;</div><div class='ctx'> static struct kset           *pcrypt_kset;</div><div class='ctx'> </div><div class='ctx'> struct pcrypt_instance_ctx {</div><div class='del'>-	struct crypto_spawn spawn;</div><div class='del'>-	unsigned int tfm_count;</div><div class='add'>+	struct crypto_aead_spawn spawn;</div><div class='add'>+	atomic_t tfm_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct pcrypt_aead_ctx {</div><div class='hunk'>@@ -122,14 +123,6 @@ static void pcrypt_aead_serial(struct padata_priv *padata)</div><div class='ctx'> 	aead_request_complete(req-&gt;base.data, padata-&gt;info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pcrypt_aead_giv_serial(struct padata_priv *padata)</div><div class='del'>-{</div><div class='del'>-	struct pcrypt_request *preq = pcrypt_padata_request(padata);</div><div class='del'>-	struct aead_givcrypt_request *req = pcrypt_request_ctx(preq);</div><div class='del'>-</div><div class='del'>-	aead_request_complete(req-&gt;areq.base.data, padata-&gt;info);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void pcrypt_aead_done(struct crypto_async_request *areq, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req = areq-&gt;data;</div><div class='hunk'>@@ -175,7 +168,7 @@ static int pcrypt_aead_encrypt(struct aead_request *req)</div><div class='ctx'> 				  pcrypt_aead_done, req);</div><div class='ctx'> 	aead_request_set_crypt(creq, req-&gt;src, req-&gt;dst,</div><div class='ctx'> 			       req-&gt;cryptlen, req-&gt;iv);</div><div class='del'>-	aead_request_set_assoc(creq, req-&gt;assoc, req-&gt;assoclen);</div><div class='add'>+	aead_request_set_ad(creq, req-&gt;assoclen);</div><div class='ctx'> </div><div class='ctx'> 	err = pcrypt_do_parallel(padata, &amp;ctx-&gt;cb_cpu, &amp;pencrypt);</div><div class='ctx'> 	if (!err)</div><div class='hunk'>@@ -217,7 +210,7 @@ static int pcrypt_aead_decrypt(struct aead_request *req)</div><div class='ctx'> 				  pcrypt_aead_done, req);</div><div class='ctx'> 	aead_request_set_crypt(creq, req-&gt;src, req-&gt;dst,</div><div class='ctx'> 			       req-&gt;cryptlen, req-&gt;iv);</div><div class='del'>-	aead_request_set_assoc(creq, req-&gt;assoc, req-&gt;assoclen);</div><div class='add'>+	aead_request_set_ad(creq, req-&gt;assoclen);</div><div class='ctx'> </div><div class='ctx'> 	err = pcrypt_do_parallel(padata, &amp;ctx-&gt;cb_cpu, &amp;pdecrypt);</div><div class='ctx'> 	if (!err)</div><div class='hunk'>@@ -226,182 +219,134 @@ static int pcrypt_aead_decrypt(struct aead_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pcrypt_aead_givenc(struct padata_priv *padata)</div><div class='del'>-{</div><div class='del'>-	struct pcrypt_request *preq = pcrypt_padata_request(padata);</div><div class='del'>-	struct aead_givcrypt_request *req = pcrypt_request_ctx(preq);</div><div class='del'>-</div><div class='del'>-	padata-&gt;info = crypto_aead_givencrypt(req);</div><div class='del'>-</div><div class='del'>-	if (padata-&gt;info == -EINPROGRESS)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	padata_do_serial(padata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcrypt_aead_givencrypt(struct aead_givcrypt_request *req)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct aead_request *areq = &amp;req-&gt;areq;</div><div class='del'>-	struct pcrypt_request *preq = aead_request_ctx(areq);</div><div class='del'>-	struct aead_givcrypt_request *creq = pcrypt_request_ctx(preq);</div><div class='del'>-	struct padata_priv *padata = pcrypt_request_padata(preq);</div><div class='del'>-	struct crypto_aead *aead = aead_givcrypt_reqtfm(req);</div><div class='del'>-	struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(aead);</div><div class='del'>-	u32 flags = aead_request_flags(areq);</div><div class='del'>-</div><div class='del'>-	memset(padata, 0, sizeof(struct padata_priv));</div><div class='del'>-</div><div class='del'>-	padata-&gt;parallel = pcrypt_aead_givenc;</div><div class='del'>-	padata-&gt;serial = pcrypt_aead_giv_serial;</div><div class='del'>-</div><div class='del'>-	aead_givcrypt_set_tfm(creq, ctx-&gt;child);</div><div class='del'>-	aead_givcrypt_set_callback(creq, flags &amp; ~CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='del'>-				   pcrypt_aead_done, areq);</div><div class='del'>-	aead_givcrypt_set_crypt(creq, areq-&gt;src, areq-&gt;dst,</div><div class='del'>-				areq-&gt;cryptlen, areq-&gt;iv);</div><div class='del'>-	aead_givcrypt_set_assoc(creq, areq-&gt;assoc, areq-&gt;assoclen);</div><div class='del'>-	aead_givcrypt_set_giv(creq, req-&gt;giv, req-&gt;seq);</div><div class='del'>-</div><div class='del'>-	err = pcrypt_do_parallel(padata, &amp;ctx-&gt;cb_cpu, &amp;pencrypt);</div><div class='del'>-	if (!err)</div><div class='del'>-		return -EINPROGRESS;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcrypt_aead_init_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static int pcrypt_aead_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu, cpu_index;</div><div class='del'>-	struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);</div><div class='del'>-	struct pcrypt_instance_ctx *ictx = crypto_instance_ctx(inst);</div><div class='del'>-	struct pcrypt_aead_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct aead_instance *inst = aead_alg_instance(tfm);</div><div class='add'>+	struct pcrypt_instance_ctx *ictx = aead_instance_ctx(inst);</div><div class='add'>+	struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_aead *cipher;</div><div class='ctx'> </div><div class='del'>-	ictx-&gt;tfm_count++;</div><div class='del'>-</div><div class='del'>-	cpu_index = ictx-&gt;tfm_count % cpumask_weight(cpu_online_mask);</div><div class='add'>+	cpu_index = (unsigned int)atomic_inc_return(&amp;ictx-&gt;tfm_count) %</div><div class='add'>+		    cpumask_weight(cpu_online_mask);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;cb_cpu = cpumask_first(cpu_online_mask);</div><div class='ctx'> 	for (cpu = 0; cpu &lt; cpu_index; cpu++)</div><div class='ctx'> 		ctx-&gt;cb_cpu = cpumask_next(ctx-&gt;cb_cpu, cpu_online_mask);</div><div class='ctx'> </div><div class='del'>-	cipher = crypto_spawn_aead(crypto_instance_ctx(inst));</div><div class='add'>+	cipher = crypto_spawn_aead(&amp;ictx-&gt;spawn);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(cipher))</div><div class='ctx'> 		return PTR_ERR(cipher);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;child = cipher;</div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct pcrypt_request)</div><div class='del'>-		+ sizeof(struct aead_givcrypt_request)</div><div class='del'>-		+ crypto_aead_reqsize(cipher);</div><div class='add'>+	crypto_aead_set_reqsize(tfm, sizeof(struct pcrypt_request) +</div><div class='add'>+				     sizeof(struct aead_request) +</div><div class='add'>+				     crypto_aead_reqsize(cipher));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pcrypt_aead_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void pcrypt_aead_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct pcrypt_aead_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *pcrypt_alloc_instance(struct crypto_alg *alg)</div><div class='add'>+static int pcrypt_init_instance(struct crypto_instance *inst,</div><div class='add'>+				struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst;</div><div class='del'>-	struct pcrypt_instance_ctx *ctx;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='del'>-	if (!inst) {</div><div class='del'>-		inst = ERR_PTR(-ENOMEM);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = -ENAMETOOLONG;</div><div class='ctx'> 	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='ctx'> 		     "pcrypt(%s)", alg-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='del'>-		goto out_free_inst;</div><div class='add'>+		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(inst-&gt;alg.cra_name, alg-&gt;cra_name, CRYPTO_MAX_ALG_NAME);</div><div class='ctx'> </div><div class='del'>-	ctx = crypto_instance_ctx(inst);</div><div class='del'>-	err = crypto_init_spawn(&amp;ctx-&gt;spawn, alg, inst,</div><div class='del'>-				CRYPTO_ALG_TYPE_MASK);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_free_inst;</div><div class='del'>-</div><div class='ctx'> 	inst-&gt;alg.cra_priority = alg-&gt;cra_priority + 100;</div><div class='ctx'> 	inst-&gt;alg.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	inst-&gt;alg.cra_alignmask = alg-&gt;cra_alignmask;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return inst;</div><div class='del'>-</div><div class='del'>-out_free_inst:</div><div class='del'>-	kfree(inst);</div><div class='del'>-	inst = ERR_PTR(err);</div><div class='del'>-	goto out;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *pcrypt_alloc_aead(struct rtattr **tb,</div><div class='del'>-						 u32 type, u32 mask)</div><div class='add'>+static int pcrypt_create_aead(struct crypto_template *tmpl, struct rtattr **tb,</div><div class='add'>+			      u32 type, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst;</div><div class='del'>-	struct crypto_alg *alg;</div><div class='add'>+	struct pcrypt_instance_ctx *ctx;</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	const char *name;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	name = crypto_attr_alg_name(tb[1]);</div><div class='add'>+	if (IS_ERR(name))</div><div class='add'>+		return PTR_ERR(name);</div><div class='add'>+</div><div class='add'>+	inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!inst)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ctx = aead_instance_ctx(inst);</div><div class='add'>+	crypto_set_aead_spawn(&amp;ctx-&gt;spawn, aead_crypto_instance(inst));</div><div class='add'>+</div><div class='add'>+	err = crypto_grab_aead(&amp;ctx-&gt;spawn, name, 0, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_inst;</div><div class='ctx'> </div><div class='del'>-	alg = crypto_get_attr_alg(tb, type, (mask &amp; CRYPTO_ALG_TYPE_MASK));</div><div class='del'>-	if (IS_ERR(alg))</div><div class='del'>-		return ERR_CAST(alg);</div><div class='add'>+	alg = crypto_spawn_aead_alg(&amp;ctx-&gt;spawn);</div><div class='add'>+	err = pcrypt_init_instance(aead_crypto_instance(inst), &amp;alg-&gt;base);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_drop_aead;</div><div class='ctx'> </div><div class='del'>-	inst = pcrypt_alloc_instance(alg);</div><div class='del'>-	if (IS_ERR(inst))</div><div class='del'>-		goto out_put_alg;</div><div class='add'>+	inst-&gt;alg.ivsize = crypto_aead_alg_ivsize(alg);</div><div class='add'>+	inst-&gt;alg.maxauthsize = crypto_aead_alg_maxauthsize(alg);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;</div><div class='del'>-	inst-&gt;alg.cra_type = &amp;crypto_aead_type;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct pcrypt_aead_ctx);</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.ivsize = alg-&gt;cra_aead.ivsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.geniv = alg-&gt;cra_aead.geniv;</div><div class='del'>-	inst-&gt;alg.cra_aead.maxauthsize = alg-&gt;cra_aead.maxauthsize;</div><div class='add'>+	inst-&gt;alg.init = pcrypt_aead_init_tfm;</div><div class='add'>+	inst-&gt;alg.exit = pcrypt_aead_exit_tfm;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ctxsize = sizeof(struct pcrypt_aead_ctx);</div><div class='add'>+	inst-&gt;alg.setkey = pcrypt_aead_setkey;</div><div class='add'>+	inst-&gt;alg.setauthsize = pcrypt_aead_setauthsize;</div><div class='add'>+	inst-&gt;alg.encrypt = pcrypt_aead_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = pcrypt_aead_decrypt;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_init = pcrypt_aead_init_tfm;</div><div class='del'>-	inst-&gt;alg.cra_exit = pcrypt_aead_exit_tfm;</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_drop_aead;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.setkey = pcrypt_aead_setkey;</div><div class='del'>-	inst-&gt;alg.cra_aead.setauthsize = pcrypt_aead_setauthsize;</div><div class='del'>-	inst-&gt;alg.cra_aead.encrypt = pcrypt_aead_encrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.decrypt = pcrypt_aead_decrypt;</div><div class='del'>-	inst-&gt;alg.cra_aead.givencrypt = pcrypt_aead_givencrypt;</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='del'>-out_put_alg:</div><div class='del'>-	crypto_mod_put(alg);</div><div class='del'>-	return inst;</div><div class='add'>+out_drop_aead:</div><div class='add'>+	crypto_drop_aead(&amp;ctx-&gt;spawn);</div><div class='add'>+out_free_inst:</div><div class='add'>+	kfree(inst);</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *pcrypt_alloc(struct rtattr **tb)</div><div class='add'>+static int pcrypt_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='del'>-		return ERR_CAST(algt);</div><div class='add'>+		return PTR_ERR(algt);</div><div class='ctx'> </div><div class='ctx'> 	switch (algt-&gt;type &amp; algt-&gt;mask &amp; CRYPTO_ALG_TYPE_MASK) {</div><div class='ctx'> 	case CRYPTO_ALG_TYPE_AEAD:</div><div class='del'>-		return pcrypt_alloc_aead(tb, algt-&gt;type, algt-&gt;mask);</div><div class='add'>+		return pcrypt_create_aead(tmpl, tb, algt-&gt;type, algt-&gt;mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ERR_PTR(-EINVAL);</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pcrypt_free(struct crypto_instance *inst)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcrypt_instance_ctx *ctx = crypto_instance_ctx(inst);</div><div class='ctx'> </div><div class='del'>-	crypto_drop_spawn(&amp;ctx-&gt;spawn);</div><div class='add'>+	crypto_drop_aead(&amp;ctx-&gt;spawn);</div><div class='ctx'> 	kfree(inst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -516,7 +461,7 @@ static void pcrypt_fini_padata(struct padata_pcrypt *pcrypt)</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template pcrypt_tmpl = {</div><div class='ctx'> 	.name = "pcrypt",</div><div class='del'>-	.alloc = pcrypt_alloc,</div><div class='add'>+	.create = pcrypt_create,</div><div class='ctx'> 	.free = pcrypt_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='head'>diff --git a/crypto/poly1305_generic.c b/crypto/poly1305_generic.c<br/>new file mode 100644<br/>index 000000000000..387b5c887a80<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/poly1305_generic.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/poly1305_generic.c</a></div><div class='hunk'>@@ -0,0 +1,321 @@</div><div class='add'>+/*</div><div class='add'>+ * Poly1305 authenticator algorithm, RFC7539</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ *</div><div class='add'>+ * Based on public domain code by Andrew Moon and Daniel J. Bernstein.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#define POLY1305_BLOCK_SIZE	16</div><div class='add'>+#define POLY1305_KEY_SIZE	32</div><div class='add'>+#define POLY1305_DIGEST_SIZE	16</div><div class='add'>+</div><div class='add'>+struct poly1305_desc_ctx {</div><div class='add'>+	/* key */</div><div class='add'>+	u32 r[5];</div><div class='add'>+	/* finalize key */</div><div class='add'>+	u32 s[4];</div><div class='add'>+	/* accumulator */</div><div class='add'>+	u32 h[5];</div><div class='add'>+	/* partial buffer */</div><div class='add'>+	u8 buf[POLY1305_BLOCK_SIZE];</div><div class='add'>+	/* bytes used in partial buffer */</div><div class='add'>+	unsigned int buflen;</div><div class='add'>+	/* r key has been set */</div><div class='add'>+	bool rset;</div><div class='add'>+	/* s key has been set */</div><div class='add'>+	bool sset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u64 mlt(u64 a, u64 b)</div><div class='add'>+{</div><div class='add'>+	return a * b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 sr(u64 v, u_char n)</div><div class='add'>+{</div><div class='add'>+	return v &gt;&gt; n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 and(u32 v, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return v &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 le32_to_cpuvp(const void *p)</div><div class='add'>+{</div><div class='add'>+	return le32_to_cpup(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly1305_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+	memset(dctx-&gt;h, 0, sizeof(dctx-&gt;h));</div><div class='add'>+	dctx-&gt;buflen = 0;</div><div class='add'>+	dctx-&gt;rset = false;</div><div class='add'>+	dctx-&gt;sset = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly1305_setkey(struct crypto_shash *tfm,</div><div class='add'>+			   const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	/* Poly1305 requires a unique key for each tag, which implies that</div><div class='add'>+	 * we can't set it on the tfm that gets accessed by multiple users</div><div class='add'>+	 * simultaneously. Instead we expect the key as the first 32 bytes in</div><div class='add'>+	 * the update() call. */</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly1305_setrkey(struct poly1305_desc_ctx *dctx, const u8 *key)</div><div class='add'>+{</div><div class='add'>+	/* r &amp;= 0xffffffc0ffffffc0ffffffc0fffffff */</div><div class='add'>+	dctx-&gt;r[0] = (le32_to_cpuvp(key +  0) &gt;&gt; 0) &amp; 0x3ffffff;</div><div class='add'>+	dctx-&gt;r[1] = (le32_to_cpuvp(key +  3) &gt;&gt; 2) &amp; 0x3ffff03;</div><div class='add'>+	dctx-&gt;r[2] = (le32_to_cpuvp(key +  6) &gt;&gt; 4) &amp; 0x3ffc0ff;</div><div class='add'>+	dctx-&gt;r[3] = (le32_to_cpuvp(key +  9) &gt;&gt; 6) &amp; 0x3f03fff;</div><div class='add'>+	dctx-&gt;r[4] = (le32_to_cpuvp(key + 12) &gt;&gt; 8) &amp; 0x00fffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void poly1305_setskey(struct poly1305_desc_ctx *dctx, const u8 *key)</div><div class='add'>+{</div><div class='add'>+	dctx-&gt;s[0] = le32_to_cpuvp(key +  0);</div><div class='add'>+	dctx-&gt;s[1] = le32_to_cpuvp(key +  4);</div><div class='add'>+	dctx-&gt;s[2] = le32_to_cpuvp(key +  8);</div><div class='add'>+	dctx-&gt;s[3] = le32_to_cpuvp(key + 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int poly1305_blocks(struct poly1305_desc_ctx *dctx,</div><div class='add'>+				    const u8 *src, unsigned int srclen,</div><div class='add'>+				    u32 hibit)</div><div class='add'>+{</div><div class='add'>+	u32 r0, r1, r2, r3, r4;</div><div class='add'>+	u32 s1, s2, s3, s4;</div><div class='add'>+	u32 h0, h1, h2, h3, h4;</div><div class='add'>+	u64 d0, d1, d2, d3, d4;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!dctx-&gt;sset)) {</div><div class='add'>+		if (!dctx-&gt;rset &amp;&amp; srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='add'>+			poly1305_setrkey(dctx, src);</div><div class='add'>+			src += POLY1305_BLOCK_SIZE;</div><div class='add'>+			srclen -= POLY1305_BLOCK_SIZE;</div><div class='add'>+			dctx-&gt;rset = true;</div><div class='add'>+		}</div><div class='add'>+		if (srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='add'>+			poly1305_setskey(dctx, src);</div><div class='add'>+			src += POLY1305_BLOCK_SIZE;</div><div class='add'>+			srclen -= POLY1305_BLOCK_SIZE;</div><div class='add'>+			dctx-&gt;sset = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r0 = dctx-&gt;r[0];</div><div class='add'>+	r1 = dctx-&gt;r[1];</div><div class='add'>+	r2 = dctx-&gt;r[2];</div><div class='add'>+	r3 = dctx-&gt;r[3];</div><div class='add'>+	r4 = dctx-&gt;r[4];</div><div class='add'>+</div><div class='add'>+	s1 = r1 * 5;</div><div class='add'>+	s2 = r2 * 5;</div><div class='add'>+	s3 = r3 * 5;</div><div class='add'>+	s4 = r4 * 5;</div><div class='add'>+</div><div class='add'>+	h0 = dctx-&gt;h[0];</div><div class='add'>+	h1 = dctx-&gt;h[1];</div><div class='add'>+	h2 = dctx-&gt;h[2];</div><div class='add'>+	h3 = dctx-&gt;h[3];</div><div class='add'>+	h4 = dctx-&gt;h[4];</div><div class='add'>+</div><div class='add'>+	while (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='add'>+</div><div class='add'>+		/* h += m[i] */</div><div class='add'>+		h0 += (le32_to_cpuvp(src +  0) &gt;&gt; 0) &amp; 0x3ffffff;</div><div class='add'>+		h1 += (le32_to_cpuvp(src +  3) &gt;&gt; 2) &amp; 0x3ffffff;</div><div class='add'>+		h2 += (le32_to_cpuvp(src +  6) &gt;&gt; 4) &amp; 0x3ffffff;</div><div class='add'>+		h3 += (le32_to_cpuvp(src +  9) &gt;&gt; 6) &amp; 0x3ffffff;</div><div class='add'>+		h4 += (le32_to_cpuvp(src + 12) &gt;&gt; 8) | hibit;</div><div class='add'>+</div><div class='add'>+		/* h *= r */</div><div class='add'>+		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +</div><div class='add'>+		     mlt(h3, s2) + mlt(h4, s1);</div><div class='add'>+		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +</div><div class='add'>+		     mlt(h3, s3) + mlt(h4, s2);</div><div class='add'>+		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +</div><div class='add'>+		     mlt(h3, s4) + mlt(h4, s3);</div><div class='add'>+		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +</div><div class='add'>+		     mlt(h3, r0) + mlt(h4, s4);</div><div class='add'>+		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +</div><div class='add'>+		     mlt(h3, r1) + mlt(h4, r0);</div><div class='add'>+</div><div class='add'>+		/* (partial) h %= p */</div><div class='add'>+		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);</div><div class='add'>+		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);</div><div class='add'>+		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);</div><div class='add'>+		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);</div><div class='add'>+		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);</div><div class='add'>+		h1 += h0 &gt;&gt; 26;       h0 = h0 &amp; 0x3ffffff;</div><div class='add'>+</div><div class='add'>+		src += POLY1305_BLOCK_SIZE;</div><div class='add'>+		srclen -= POLY1305_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dctx-&gt;h[0] = h0;</div><div class='add'>+	dctx-&gt;h[1] = h1;</div><div class='add'>+	dctx-&gt;h[2] = h2;</div><div class='add'>+	dctx-&gt;h[3] = h3;</div><div class='add'>+	dctx-&gt;h[4] = h4;</div><div class='add'>+</div><div class='add'>+	return srclen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly1305_update(struct shash_desc *desc,</div><div class='add'>+			   const u8 *src, unsigned int srclen)</div><div class='add'>+{</div><div class='add'>+	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int bytes;</div><div class='add'>+</div><div class='add'>+	if (unlikely(dctx-&gt;buflen)) {</div><div class='add'>+		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='add'>+		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='add'>+		src += bytes;</div><div class='add'>+		srclen -= bytes;</div><div class='add'>+		dctx-&gt;buflen += bytes;</div><div class='add'>+</div><div class='add'>+		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='add'>+			poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='add'>+					POLY1305_BLOCK_SIZE, 1 &lt;&lt; 24);</div><div class='add'>+			dctx-&gt;buflen = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='add'>+		bytes = poly1305_blocks(dctx, src, srclen, 1 &lt;&lt; 24);</div><div class='add'>+		src += srclen - bytes;</div><div class='add'>+		srclen = bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(srclen)) {</div><div class='add'>+		dctx-&gt;buflen = srclen;</div><div class='add'>+		memcpy(dctx-&gt;buf, src, srclen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+{</div><div class='add'>+	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+	__le32 *mac = (__le32 *)dst;</div><div class='add'>+	u32 h0, h1, h2, h3, h4;</div><div class='add'>+	u32 g0, g1, g2, g3, g4;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u64 f = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!dctx-&gt;sset))</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+</div><div class='add'>+	if (unlikely(dctx-&gt;buflen)) {</div><div class='add'>+		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='add'>+		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='add'>+		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='add'>+		poly1305_blocks(dctx, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* fully carry h */</div><div class='add'>+	h0 = dctx-&gt;h[0];</div><div class='add'>+	h1 = dctx-&gt;h[1];</div><div class='add'>+	h2 = dctx-&gt;h[2];</div><div class='add'>+	h3 = dctx-&gt;h[3];</div><div class='add'>+	h4 = dctx-&gt;h[4];</div><div class='add'>+</div><div class='add'>+	h2 += (h1 &gt;&gt; 26);     h1 = h1 &amp; 0x3ffffff;</div><div class='add'>+	h3 += (h2 &gt;&gt; 26);     h2 = h2 &amp; 0x3ffffff;</div><div class='add'>+	h4 += (h3 &gt;&gt; 26);     h3 = h3 &amp; 0x3ffffff;</div><div class='add'>+	h0 += (h4 &gt;&gt; 26) * 5; h4 = h4 &amp; 0x3ffffff;</div><div class='add'>+	h1 += (h0 &gt;&gt; 26);     h0 = h0 &amp; 0x3ffffff;</div><div class='add'>+</div><div class='add'>+	/* compute h + -p */</div><div class='add'>+	g0 = h0 + 5;</div><div class='add'>+	g1 = h1 + (g0 &gt;&gt; 26);             g0 &amp;= 0x3ffffff;</div><div class='add'>+	g2 = h2 + (g1 &gt;&gt; 26);             g1 &amp;= 0x3ffffff;</div><div class='add'>+	g3 = h3 + (g2 &gt;&gt; 26);             g2 &amp;= 0x3ffffff;</div><div class='add'>+	g4 = h4 + (g3 &gt;&gt; 26) - (1 &lt;&lt; 26); g3 &amp;= 0x3ffffff;</div><div class='add'>+</div><div class='add'>+	/* select h if h &lt; p, or h + -p if h &gt;= p */</div><div class='add'>+	mask = (g4 &gt;&gt; ((sizeof(u32) * 8) - 1)) - 1;</div><div class='add'>+	g0 &amp;= mask;</div><div class='add'>+	g1 &amp;= mask;</div><div class='add'>+	g2 &amp;= mask;</div><div class='add'>+	g3 &amp;= mask;</div><div class='add'>+	g4 &amp;= mask;</div><div class='add'>+	mask = ~mask;</div><div class='add'>+	h0 = (h0 &amp; mask) | g0;</div><div class='add'>+	h1 = (h1 &amp; mask) | g1;</div><div class='add'>+	h2 = (h2 &amp; mask) | g2;</div><div class='add'>+	h3 = (h3 &amp; mask) | g3;</div><div class='add'>+	h4 = (h4 &amp; mask) | g4;</div><div class='add'>+</div><div class='add'>+	/* h = h % (2^128) */</div><div class='add'>+	h0 = (h0 &gt;&gt;  0) | (h1 &lt;&lt; 26);</div><div class='add'>+	h1 = (h1 &gt;&gt;  6) | (h2 &lt;&lt; 20);</div><div class='add'>+	h2 = (h2 &gt;&gt; 12) | (h3 &lt;&lt; 14);</div><div class='add'>+	h3 = (h3 &gt;&gt; 18) | (h4 &lt;&lt;  8);</div><div class='add'>+</div><div class='add'>+	/* mac = (h + s) % (2^128) */</div><div class='add'>+	f = (f &gt;&gt; 32) + h0 + dctx-&gt;s[0]; mac[0] = cpu_to_le32(f);</div><div class='add'>+	f = (f &gt;&gt; 32) + h1 + dctx-&gt;s[1]; mac[1] = cpu_to_le32(f);</div><div class='add'>+	f = (f &gt;&gt; 32) + h2 + dctx-&gt;s[2]; mac[2] = cpu_to_le32(f);</div><div class='add'>+	f = (f &gt;&gt; 32) + h3 + dctx-&gt;s[3]; mac[3] = cpu_to_le32(f);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct shash_alg poly1305_alg = {</div><div class='add'>+	.digestsize	= POLY1305_DIGEST_SIZE,</div><div class='add'>+	.init		= poly1305_init,</div><div class='add'>+	.update		= poly1305_update,</div><div class='add'>+	.final		= poly1305_final,</div><div class='add'>+	.setkey		= poly1305_setkey,</div><div class='add'>+	.descsize	= sizeof(struct poly1305_desc_ctx),</div><div class='add'>+	.base		= {</div><div class='add'>+		.cra_name		= "poly1305",</div><div class='add'>+		.cra_driver_name	= "poly1305-generic",</div><div class='add'>+		.cra_priority		= 100,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_alignmask		= sizeof(u32) - 1,</div><div class='add'>+		.cra_blocksize		= POLY1305_BLOCK_SIZE,</div><div class='add'>+		.cra_module		= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init poly1305_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	return crypto_register_shash(&amp;poly1305_alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit poly1305_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_shash(&amp;poly1305_alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(poly1305_mod_init);</div><div class='add'>+module_exit(poly1305_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Poly1305 authenticator");</div><div class='add'>+MODULE_ALIAS_CRYPTO("poly1305");</div><div class='add'>+MODULE_ALIAS_CRYPTO("poly1305-generic");</div><div class='head'>diff --git a/crypto/proc.c b/crypto/proc.c<br/>index 4ffe73b51612..2cc10c96d753 100644<br/>--- a/<a href='/drm-misc/tree/crypto/proc.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/proc.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/proc.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/proc.c</a></div><div class='hunk'>@@ -20,47 +20,8 @@</div><div class='ctx'> #include &lt;linux/rwsem.h&gt;</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/sysctl.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_FIPS</div><div class='del'>-static struct ctl_table crypto_sysctl_table[] = {</div><div class='del'>-	{</div><div class='del'>-		.procname       = "fips_enabled",</div><div class='del'>-		.data           = &amp;fips_enabled,</div><div class='del'>-		.maxlen         = sizeof(int),</div><div class='del'>-		.mode           = 0444,</div><div class='del'>-		.proc_handler   = proc_dointvec</div><div class='del'>-	},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ctl_table crypto_dir_table[] = {</div><div class='del'>-	{</div><div class='del'>-		.procname       = "crypto",</div><div class='del'>-		.mode           = 0555,</div><div class='del'>-		.child          = crypto_sysctl_table</div><div class='del'>-	},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ctl_table_header *crypto_sysctls;</div><div class='del'>-</div><div class='del'>-static void crypto_proc_fips_init(void)</div><div class='del'>-{</div><div class='del'>-	crypto_sysctls = register_sysctl_table(crypto_dir_table);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void crypto_proc_fips_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (crypto_sysctls)</div><div class='del'>-		unregister_sysctl_table(crypto_sysctls);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define crypto_proc_fips_init()</div><div class='del'>-#define crypto_proc_fips_exit()</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void *c_start(struct seq_file *m, loff_t *pos)</div><div class='ctx'> {</div><div class='ctx'> 	down_read(&amp;crypto_alg_sem);</div><div class='hunk'>@@ -148,11 +109,9 @@ static const struct file_operations proc_crypto_ops = {</div><div class='ctx'> void __init crypto_init_proc(void)</div><div class='ctx'> {</div><div class='ctx'> 	proc_create("crypto", 0, NULL, &amp;proc_crypto_ops);</div><div class='del'>-	crypto_proc_fips_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __exit crypto_exit_proc(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_proc_fips_exit();</div><div class='ctx'> 	remove_proc_entry("crypto", NULL);</div><div class='ctx'> }</div><div class='head'>diff --git a/crypto/rng.c b/crypto/rng.c<br/>index e0a25c2456de..b81cffb13bab 100644<br/>--- a/<a href='/drm-misc/tree/crypto/rng.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/rng.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/rng.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rng.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * RNG operations.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2008 Neil Horman &lt;nhorman@tuxdriver.com&gt;</div><div class='add'>+ * Copyright (c) 2015 Herbert Xu &lt;herbert@gondor.apana.org.au&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  * under the terms of the GNU General Public License as published by the Free</div><div class='hunk'>@@ -24,12 +25,19 @@</div><div class='ctx'> #include &lt;linux/cryptouser.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "internal.h"</div><div class='add'>+</div><div class='ctx'> static DEFINE_MUTEX(crypto_default_rng_lock);</div><div class='ctx'> struct crypto_rng *crypto_default_rng;</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_default_rng);</div><div class='ctx'> static int crypto_default_rng_refcnt;</div><div class='ctx'> </div><div class='del'>-static int rngapi_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='add'>+static inline struct crypto_rng *__crypto_rng_cast(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return container_of(tfm, struct crypto_rng, base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int crypto_rng_reset(struct crypto_rng *tfm, const u8 *seed, unsigned int slen)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *buf = NULL;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -43,21 +51,23 @@ static int rngapi_reset(struct crypto_rng *tfm, u8 *seed, unsigned int slen)</div><div class='ctx'> 		seed = buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = crypto_rng_alg(tfm)-&gt;rng_reset(tfm, seed, slen);</div><div class='add'>+	err = crypto_rng_alg(tfm)-&gt;seed(tfm, seed, slen);</div><div class='ctx'> </div><div class='del'>-	kfree(buf);</div><div class='add'>+	kzfree(buf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_rng_reset);</div><div class='ctx'> </div><div class='del'>-static int crypto_init_rng_ops(struct crypto_tfm *tfm, u32 type, u32 mask)</div><div class='add'>+static int crypto_rng_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct rng_alg *alg = &amp;tfm-&gt;__crt_alg-&gt;cra_rng;</div><div class='del'>-	struct rng_tfm *ops = &amp;tfm-&gt;crt_rng;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ops-&gt;rng_gen_random = alg-&gt;rng_make_random;</div><div class='del'>-	ops-&gt;rng_reset = rngapi_reset;</div><div class='add'>+static unsigned int seedsize(struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct rng_alg *ralg = container_of(alg, struct rng_alg, base);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ralg-&gt;seedsize;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NET</div><div class='hunk'>@@ -67,7 +77,7 @@ static int crypto_rng_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	strncpy(rrng.type, "rng", sizeof(rrng.type));</div><div class='ctx'> </div><div class='del'>-	rrng.seedsize = alg-&gt;cra_rng.seedsize;</div><div class='add'>+	rrng.seedsize = seedsize(alg);</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put(skb, CRYPTOCFGA_REPORT_RNG,</div><div class='ctx'> 		    sizeof(struct crypto_report_rng), &amp;rrng))</div><div class='hunk'>@@ -89,24 +99,27 @@ static void crypto_rng_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> static void crypto_rng_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	seq_printf(m, "type         : rng\n");</div><div class='del'>-	seq_printf(m, "seedsize     : %u\n", alg-&gt;cra_rng.seedsize);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int crypto_rng_ctxsize(struct crypto_alg *alg, u32 type,</div><div class='del'>-				       u32 mask)</div><div class='del'>-{</div><div class='del'>-	return alg-&gt;cra_ctxsize;</div><div class='add'>+	seq_printf(m, "seedsize     : %u\n", seedsize(alg));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct crypto_type crypto_rng_type = {</div><div class='del'>-	.ctxsize = crypto_rng_ctxsize,</div><div class='del'>-	.init = crypto_init_rng_ops,</div><div class='add'>+static const struct crypto_type crypto_rng_type = {</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='add'>+	.init_tfm = crypto_rng_init_tfm,</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='ctx'> 	.show = crypto_rng_show,</div><div class='ctx'> #endif</div><div class='ctx'> 	.report = crypto_rng_report,</div><div class='add'>+	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='add'>+	.type = CRYPTO_ALG_TYPE_RNG,</div><div class='add'>+	.tfmsize = offsetof(struct crypto_rng, base),</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_rng_type);</div><div class='add'>+</div><div class='add'>+struct crypto_rng *crypto_alloc_rng(const char *alg_name, u32 type, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return crypto_alloc_tfm(alg_name, &amp;crypto_rng_type, type, mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_alloc_rng);</div><div class='ctx'> </div><div class='ctx'> int crypto_get_default_rng(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -142,13 +155,82 @@ EXPORT_SYMBOL_GPL(crypto_get_default_rng);</div><div class='ctx'> void crypto_put_default_rng(void)</div><div class='ctx'> {</div><div class='ctx'> 	mutex_lock(&amp;crypto_default_rng_lock);</div><div class='del'>-	if (!--crypto_default_rng_refcnt) {</div><div class='del'>-		crypto_free_rng(crypto_default_rng);</div><div class='del'>-		crypto_default_rng = NULL;</div><div class='del'>-	}</div><div class='add'>+	crypto_default_rng_refcnt--;</div><div class='ctx'> 	mutex_unlock(&amp;crypto_default_rng_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_put_default_rng);</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_CRYPTO_RNG) || defined(CONFIG_CRYPTO_RNG_MODULE)</div><div class='add'>+int crypto_del_default_rng(void)</div><div class='add'>+{</div><div class='add'>+	int err = -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;crypto_default_rng_lock);</div><div class='add'>+	if (crypto_default_rng_refcnt)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	crypto_free_rng(crypto_default_rng);</div><div class='add'>+	crypto_default_rng = NULL;</div><div class='add'>+</div><div class='add'>+	err = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;crypto_default_rng_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_del_default_rng);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int crypto_register_rng(struct rng_alg *alg)</div><div class='add'>+{</div><div class='add'>+	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;seedsize &gt; PAGE_SIZE / 8)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	base-&gt;cra_type = &amp;crypto_rng_type;</div><div class='add'>+	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='add'>+	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_RNG;</div><div class='add'>+</div><div class='add'>+	return crypto_register_alg(base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_register_rng);</div><div class='add'>+</div><div class='add'>+void crypto_unregister_rng(struct rng_alg *alg)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_alg(&amp;alg-&gt;base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_unregister_rng);</div><div class='add'>+</div><div class='add'>+int crypto_register_rngs(struct rng_alg *algs, int count)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		ret = crypto_register_rng(algs + i);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	for (--i; i &gt;= 0; --i)</div><div class='add'>+		crypto_unregister_rng(algs + i);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_register_rngs);</div><div class='add'>+</div><div class='add'>+void crypto_unregister_rngs(struct rng_alg *algs, int count)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = count - 1; i &gt;= 0; --i)</div><div class='add'>+		crypto_unregister_rng(algs + i);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_unregister_rngs);</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Random Number Generator");</div><div class='head'>diff --git a/crypto/rsa.c b/crypto/rsa.c<br/>new file mode 100644<br/>index 000000000000..752af0656f2e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/rsa.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsa.c</a></div><div class='hunk'>@@ -0,0 +1,315 @@</div><div class='add'>+/* RSA asymmetric public-key algorithm [RFC3447]</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015, Intel Corporation</div><div class='add'>+ * Authors: Tadeusz Struk &lt;tadeusz.struk@intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public Licence</div><div class='add'>+ * as published by the Free Software Foundation; either version</div><div class='add'>+ * 2 of the Licence, or (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;crypto/internal/rsa.h&gt;</div><div class='add'>+#include &lt;crypto/internal/akcipher.h&gt;</div><div class='add'>+#include &lt;crypto/akcipher.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RSAEP function [RFC3447 sec 5.1.1]</div><div class='add'>+ * c = m^e mod n;</div><div class='add'>+ */</div><div class='add'>+static int _rsa_enc(const struct rsa_key *key, MPI c, MPI m)</div><div class='add'>+{</div><div class='add'>+	/* (1) Validate 0 &lt;= m &lt; n */</div><div class='add'>+	if (mpi_cmp_ui(m, 0) &lt; 0 || mpi_cmp(m, key-&gt;n) &gt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* (2) c = m^e mod n */</div><div class='add'>+	return mpi_powm(c, m, key-&gt;e, key-&gt;n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RSADP function [RFC3447 sec 5.1.2]</div><div class='add'>+ * m = c^d mod n;</div><div class='add'>+ */</div><div class='add'>+static int _rsa_dec(const struct rsa_key *key, MPI m, MPI c)</div><div class='add'>+{</div><div class='add'>+	/* (1) Validate 0 &lt;= c &lt; n */</div><div class='add'>+	if (mpi_cmp_ui(c, 0) &lt; 0 || mpi_cmp(c, key-&gt;n) &gt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* (2) m = c^d mod n */</div><div class='add'>+	return mpi_powm(m, c, key-&gt;d, key-&gt;n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RSASP1 function [RFC3447 sec 5.2.1]</div><div class='add'>+ * s = m^d mod n</div><div class='add'>+ */</div><div class='add'>+static int _rsa_sign(const struct rsa_key *key, MPI s, MPI m)</div><div class='add'>+{</div><div class='add'>+	/* (1) Validate 0 &lt;= m &lt; n */</div><div class='add'>+	if (mpi_cmp_ui(m, 0) &lt; 0 || mpi_cmp(m, key-&gt;n) &gt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* (2) s = m^d mod n */</div><div class='add'>+	return mpi_powm(s, m, key-&gt;d, key-&gt;n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RSAVP1 function [RFC3447 sec 5.2.2]</div><div class='add'>+ * m = s^e mod n;</div><div class='add'>+ */</div><div class='add'>+static int _rsa_verify(const struct rsa_key *key, MPI m, MPI s)</div><div class='add'>+{</div><div class='add'>+	/* (1) Validate 0 &lt;= s &lt; n */</div><div class='add'>+	if (mpi_cmp_ui(s, 0) &lt; 0 || mpi_cmp(s, key-&gt;n) &gt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* (2) m = s^e mod n */</div><div class='add'>+	return mpi_powm(m, s, key-&gt;e, key-&gt;n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct rsa_key *rsa_get_key(struct crypto_akcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	return akcipher_tfm_ctx(tfm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsa_enc(struct akcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);</div><div class='add'>+	const struct rsa_key *pkey = rsa_get_key(tfm);</div><div class='add'>+	MPI m, c = mpi_alloc(0);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sign;</div><div class='add'>+</div><div class='add'>+	if (!c)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!pkey-&gt;n || !pkey-&gt;e)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_free_c;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req-&gt;dst_len &lt; mpi_get_size(pkey-&gt;n)) {</div><div class='add'>+		req-&gt;dst_len = mpi_get_size(pkey-&gt;n);</div><div class='add'>+		ret = -EOVERFLOW;</div><div class='add'>+		goto err_free_c;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	m = mpi_read_raw_data(req-&gt;src, req-&gt;src_len);</div><div class='add'>+	if (!m) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_c;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = _rsa_enc(pkey, c, m);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_m;</div><div class='add'>+</div><div class='add'>+	ret = mpi_read_buffer(c, req-&gt;dst, req-&gt;dst_len, &amp;req-&gt;dst_len, &amp;sign);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_m;</div><div class='add'>+</div><div class='add'>+	if (sign &lt; 0) {</div><div class='add'>+		ret = -EBADMSG;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_free_m:</div><div class='add'>+	mpi_free(m);</div><div class='add'>+err_free_c:</div><div class='add'>+	mpi_free(c);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsa_dec(struct akcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);</div><div class='add'>+	const struct rsa_key *pkey = rsa_get_key(tfm);</div><div class='add'>+	MPI c, m = mpi_alloc(0);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sign;</div><div class='add'>+</div><div class='add'>+	if (!m)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!pkey-&gt;n || !pkey-&gt;d)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req-&gt;dst_len &lt; mpi_get_size(pkey-&gt;n)) {</div><div class='add'>+		req-&gt;dst_len = mpi_get_size(pkey-&gt;n);</div><div class='add'>+		ret = -EOVERFLOW;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	c = mpi_read_raw_data(req-&gt;src, req-&gt;src_len);</div><div class='add'>+	if (!c) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = _rsa_dec(pkey, m, c);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_c;</div><div class='add'>+</div><div class='add'>+	ret = mpi_read_buffer(m, req-&gt;dst, req-&gt;dst_len, &amp;req-&gt;dst_len, &amp;sign);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_c;</div><div class='add'>+</div><div class='add'>+	if (sign &lt; 0) {</div><div class='add'>+		ret = -EBADMSG;</div><div class='add'>+		goto err_free_c;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_free_c:</div><div class='add'>+	mpi_free(c);</div><div class='add'>+err_free_m:</div><div class='add'>+	mpi_free(m);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsa_sign(struct akcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);</div><div class='add'>+	const struct rsa_key *pkey = rsa_get_key(tfm);</div><div class='add'>+	MPI m, s = mpi_alloc(0);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sign;</div><div class='add'>+</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!pkey-&gt;n || !pkey-&gt;d)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_free_s;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req-&gt;dst_len &lt; mpi_get_size(pkey-&gt;n)) {</div><div class='add'>+		req-&gt;dst_len = mpi_get_size(pkey-&gt;n);</div><div class='add'>+		ret = -EOVERFLOW;</div><div class='add'>+		goto err_free_s;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	m = mpi_read_raw_data(req-&gt;src, req-&gt;src_len);</div><div class='add'>+	if (!m) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_s;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = _rsa_sign(pkey, s, m);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_m;</div><div class='add'>+</div><div class='add'>+	ret = mpi_read_buffer(s, req-&gt;dst, req-&gt;dst_len, &amp;req-&gt;dst_len, &amp;sign);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_m;</div><div class='add'>+</div><div class='add'>+	if (sign &lt; 0) {</div><div class='add'>+		ret = -EBADMSG;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_free_m:</div><div class='add'>+	mpi_free(m);</div><div class='add'>+err_free_s:</div><div class='add'>+	mpi_free(s);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsa_verify(struct akcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);</div><div class='add'>+	const struct rsa_key *pkey = rsa_get_key(tfm);</div><div class='add'>+	MPI s, m = mpi_alloc(0);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sign;</div><div class='add'>+</div><div class='add'>+	if (!m)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!pkey-&gt;n || !pkey-&gt;e)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req-&gt;dst_len &lt; mpi_get_size(pkey-&gt;n)) {</div><div class='add'>+		req-&gt;dst_len = mpi_get_size(pkey-&gt;n);</div><div class='add'>+		ret = -EOVERFLOW;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s = mpi_read_raw_data(req-&gt;src, req-&gt;src_len);</div><div class='add'>+	if (!s) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_m;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = _rsa_verify(pkey, m, s);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_s;</div><div class='add'>+</div><div class='add'>+	ret = mpi_read_buffer(m, req-&gt;dst, req-&gt;dst_len, &amp;req-&gt;dst_len, &amp;sign);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_s;</div><div class='add'>+</div><div class='add'>+	if (sign &lt; 0) {</div><div class='add'>+		ret = -EBADMSG;</div><div class='add'>+		goto err_free_s;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_free_s:</div><div class='add'>+	mpi_free(s);</div><div class='add'>+err_free_m:</div><div class='add'>+	mpi_free(m);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rsa_setkey(struct crypto_akcipher *tfm, const void *key,</div><div class='add'>+		      unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct rsa_key *pkey = akcipher_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return rsa_parse_key(pkey, key, keylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rsa_exit_tfm(struct crypto_akcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct rsa_key *pkey = akcipher_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	rsa_free_key(pkey);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct akcipher_alg rsa = {</div><div class='add'>+	.encrypt = rsa_enc,</div><div class='add'>+	.decrypt = rsa_dec,</div><div class='add'>+	.sign = rsa_sign,</div><div class='add'>+	.verify = rsa_verify,</div><div class='add'>+	.setkey = rsa_setkey,</div><div class='add'>+	.exit = rsa_exit_tfm,</div><div class='add'>+	.base = {</div><div class='add'>+		.cra_name = "rsa",</div><div class='add'>+		.cra_driver_name = "rsa-generic",</div><div class='add'>+		.cra_priority = 100,</div><div class='add'>+		.cra_module = THIS_MODULE,</div><div class='add'>+		.cra_ctxsize = sizeof(struct rsa_key),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rsa_init(void)</div><div class='add'>+{</div><div class='add'>+	return crypto_register_akcipher(&amp;rsa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rsa_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_akcipher(&amp;rsa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(rsa_init);</div><div class='add'>+module_exit(rsa_exit);</div><div class='add'>+MODULE_ALIAS_CRYPTO("rsa");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("RSA generic algorithm");</div><div class='head'>diff --git a/crypto/rsa_helper.c b/crypto/rsa_helper.c<br/>new file mode 100644<br/>index 000000000000..3e8e0a9e5a8e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/rsa_helper.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsa_helper.c</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+/*</div><div class='add'>+ * RSA key extract helper</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015, Intel Corporation</div><div class='add'>+ * Authors: Tadeusz Struk &lt;tadeusz.struk@intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the Free</div><div class='add'>+ * Software Foundation; either version 2 of the License, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/fips.h&gt;</div><div class='add'>+#include &lt;crypto/internal/rsa.h&gt;</div><div class='add'>+#include "rsakey-asn1.h"</div><div class='add'>+</div><div class='add'>+int rsa_get_n(void *context, size_t hdrlen, unsigned char tag,</div><div class='add'>+	      const void *value, size_t vlen)</div><div class='add'>+{</div><div class='add'>+	struct rsa_key *key = context;</div><div class='add'>+</div><div class='add'>+	key-&gt;n = mpi_read_raw_data(value, vlen);</div><div class='add'>+</div><div class='add'>+	if (!key-&gt;n)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* In FIPS mode only allow key size 2K &amp; 3K */</div><div class='add'>+	if (fips_enabled &amp;&amp; (mpi_get_size(key-&gt;n) != 256 ||</div><div class='add'>+			     mpi_get_size(key-&gt;n) != 384)) {</div><div class='add'>+		pr_err("RSA: key size not allowed in FIPS mode\n");</div><div class='add'>+		mpi_free(key-&gt;n);</div><div class='add'>+		key-&gt;n = NULL;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rsa_get_e(void *context, size_t hdrlen, unsigned char tag,</div><div class='add'>+	      const void *value, size_t vlen)</div><div class='add'>+{</div><div class='add'>+	struct rsa_key *key = context;</div><div class='add'>+</div><div class='add'>+	key-&gt;e = mpi_read_raw_data(value, vlen);</div><div class='add'>+</div><div class='add'>+	if (!key-&gt;e)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rsa_get_d(void *context, size_t hdrlen, unsigned char tag,</div><div class='add'>+	      const void *value, size_t vlen)</div><div class='add'>+{</div><div class='add'>+	struct rsa_key *key = context;</div><div class='add'>+</div><div class='add'>+	key-&gt;d = mpi_read_raw_data(value, vlen);</div><div class='add'>+</div><div class='add'>+	if (!key-&gt;d)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* In FIPS mode only allow key size 2K &amp; 3K */</div><div class='add'>+	if (fips_enabled &amp;&amp; (mpi_get_size(key-&gt;d) != 256 ||</div><div class='add'>+			     mpi_get_size(key-&gt;d) != 384)) {</div><div class='add'>+		pr_err("RSA: key size not allowed in FIPS mode\n");</div><div class='add'>+		mpi_free(key-&gt;d);</div><div class='add'>+		key-&gt;d = NULL;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_mpis(struct rsa_key *key)</div><div class='add'>+{</div><div class='add'>+	mpi_free(key-&gt;n);</div><div class='add'>+	mpi_free(key-&gt;e);</div><div class='add'>+	mpi_free(key-&gt;d);</div><div class='add'>+	key-&gt;n = NULL;</div><div class='add'>+	key-&gt;e = NULL;</div><div class='add'>+	key-&gt;d = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rsa_free_key() - frees rsa key allocated by rsa_parse_key()</div><div class='add'>+ *</div><div class='add'>+ * @rsa_key:	struct rsa_key key representation</div><div class='add'>+ */</div><div class='add'>+void rsa_free_key(struct rsa_key *key)</div><div class='add'>+{</div><div class='add'>+	free_mpis(key);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rsa_free_key);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rsa_parse_key() - extracts an rsa key from BER encoded buffer</div><div class='add'>+ *		     and stores it in the provided struct rsa_key</div><div class='add'>+ *</div><div class='add'>+ * @rsa_key:	struct rsa_key key representation</div><div class='add'>+ * @key:	key in BER format</div><div class='add'>+ * @key_len:	length of key</div><div class='add'>+ *</div><div class='add'>+ * Return:	0 on success or error code in case of error</div><div class='add'>+ */</div><div class='add'>+int rsa_parse_key(struct rsa_key *rsa_key, const void *key,</div><div class='add'>+		  unsigned int key_len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	free_mpis(rsa_key);</div><div class='add'>+	ret = asn1_ber_decoder(&amp;rsakey_decoder, rsa_key, key, key_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	free_mpis(rsa_key);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rsa_parse_key);</div><div class='head'>diff --git a/crypto/rsakey.asn1 b/crypto/rsakey.asn1<br/>new file mode 100644<br/>index 000000000000..3c7b5df7b428<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/crypto/rsakey.asn1?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/rsakey.asn1</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+RsaKey ::= SEQUENCE {</div><div class='add'>+	n INTEGER ({ rsa_get_n }),</div><div class='add'>+	e INTEGER ({ rsa_get_e }),</div><div class='add'>+	d INTEGER ({ rsa_get_d })</div><div class='add'>+}</div><div class='head'>diff --git a/crypto/scatterwalk.c b/crypto/scatterwalk.c<br/>index 3bd749c7bb70..ea5815c5e128 100644<br/>--- a/<a href='/drm-misc/tree/crypto/scatterwalk.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/scatterwalk.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/scatterwalk.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/scatterwalk.c</a></div><div class='hunk'>@@ -54,7 +54,11 @@ static void scatterwalk_pagedone(struct scatter_walk *walk, int out,</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> </div><div class='ctx'> 		page = sg_page(walk-&gt;sg) + ((walk-&gt;offset - 1) &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		if (!PageSlab(page))</div><div class='add'>+		/* Test ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE first as</div><div class='add'>+		 * PageSlab cannot be optimised away per se due to</div><div class='add'>+		 * use of volatile pointer.</div><div class='add'>+		 */</div><div class='add'>+		if (ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE &amp;&amp; !PageSlab(page))</div><div class='ctx'> 			flush_dcache_page(page);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -104,22 +108,18 @@ void scatterwalk_map_and_copy(void *buf, struct scatterlist *sg,</div><div class='ctx'> 			      unsigned int start, unsigned int nbytes, int out)</div><div class='ctx'> {</div><div class='ctx'> 	struct scatter_walk walk;</div><div class='del'>-	unsigned int offset = 0;</div><div class='add'>+	struct scatterlist tmp[2];</div><div class='ctx'> </div><div class='ctx'> 	if (!nbytes)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (;;) {</div><div class='del'>-		scatterwalk_start(&amp;walk, sg);</div><div class='del'>-</div><div class='del'>-		if (start &lt; offset + sg-&gt;length)</div><div class='del'>-			break;</div><div class='add'>+	sg = scatterwalk_ffwd(tmp, sg, start);</div><div class='ctx'> </div><div class='del'>-		offset += sg-&gt;length;</div><div class='del'>-		sg = sg_next(sg);</div><div class='del'>-	}</div><div class='add'>+	if (sg_page(sg) == virt_to_page(buf) &amp;&amp;</div><div class='add'>+	    sg-&gt;offset == offset_in_page(buf))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	scatterwalk_advance(&amp;walk, start - offset);</div><div class='add'>+	scatterwalk_start(&amp;walk, sg);</div><div class='ctx'> 	scatterwalk_copychunks(buf, &amp;walk, nbytes, out);</div><div class='ctx'> 	scatterwalk_done(&amp;walk, out, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -146,3 +146,26 @@ int scatterwalk_bytes_sglen(struct scatterlist *sg, int num_bytes)</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(scatterwalk_bytes_sglen);</div><div class='add'>+</div><div class='add'>+struct scatterlist *scatterwalk_ffwd(struct scatterlist dst[2],</div><div class='add'>+				     struct scatterlist *src,</div><div class='add'>+				     unsigned int len)</div><div class='add'>+{</div><div class='add'>+	for (;;) {</div><div class='add'>+		if (!len)</div><div class='add'>+			return src;</div><div class='add'>+</div><div class='add'>+		if (src-&gt;length &gt; len)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		len -= src-&gt;length;</div><div class='add'>+		src = sg_next(src);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sg_init_table(dst, 2);</div><div class='add'>+	sg_set_page(dst, sg_page(src), src-&gt;length - len, src-&gt;offset + len);</div><div class='add'>+	scatterwalk_crypto_chain(dst, sg_next(src), 0, 2);</div><div class='add'>+</div><div class='add'>+	return dst;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(scatterwalk_ffwd);</div><div class='head'>diff --git a/crypto/seqiv.c b/crypto/seqiv.c<br/>index b7bb9a2f4a31..122c56e3491b 100644<br/>--- a/<a href='/drm-misc/tree/crypto/seqiv.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/seqiv.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/seqiv.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/seqiv.c</a></div><div class='hunk'>@@ -13,9 +13,11 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/geniv.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/rng.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -24,11 +26,25 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='add'>+struct seqniv_request_ctx {</div><div class='add'>+	struct scatterlist dst[2];</div><div class='add'>+	struct aead_request subreq;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct seqiv_ctx {</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	u8 salt[] __attribute__ ((aligned(__alignof__(u32))));</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct seqiv_aead_ctx {</div><div class='add'>+	/* aead_geniv_ctx must be first the element */</div><div class='add'>+	struct aead_geniv_ctx geniv;</div><div class='add'>+	struct crypto_blkcipher *null;</div><div class='add'>+	u8 salt[] __attribute__ ((aligned(__alignof__(u32))));</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void seqiv_free(struct crypto_instance *inst);</div><div class='add'>+</div><div class='ctx'> static void seqiv_complete2(struct skcipher_givcrypt_request *req, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct ablkcipher_request *subreq = skcipher_givcrypt_reqctx(req);</div><div class='hunk'>@@ -81,6 +97,77 @@ static void seqiv_aead_complete(struct crypto_async_request *base, int err)</div><div class='ctx'> 	aead_givcrypt_complete(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void seqiv_aead_encrypt_complete2(struct aead_request *req, int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	struct crypto_aead *geniv;</div><div class='add'>+</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	memcpy(req-&gt;iv, subreq-&gt;iv, crypto_aead_ivsize(geniv));</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kzfree(subreq-&gt;iv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqiv_aead_encrypt_complete(struct crypto_async_request *base,</div><div class='add'>+					int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = base-&gt;data;</div><div class='add'>+</div><div class='add'>+	seqiv_aead_encrypt_complete2(req, err);</div><div class='add'>+	aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqniv_aead_encrypt_complete2(struct aead_request *req, int err)</div><div class='add'>+{</div><div class='add'>+	unsigned int ivsize = 8;</div><div class='add'>+	u8 data[20];</div><div class='add'>+</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Swap IV and ESP header back to correct order. */</div><div class='add'>+	scatterwalk_map_and_copy(data, req-&gt;dst, 0, req-&gt;assoclen + ivsize, 0);</div><div class='add'>+	scatterwalk_map_and_copy(data + ivsize, req-&gt;dst, 0, req-&gt;assoclen, 1);</div><div class='add'>+	scatterwalk_map_and_copy(data, req-&gt;dst, req-&gt;assoclen, ivsize, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqniv_aead_encrypt_complete(struct crypto_async_request *base,</div><div class='add'>+					int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = base-&gt;data;</div><div class='add'>+</div><div class='add'>+	seqniv_aead_encrypt_complete2(req, err);</div><div class='add'>+	aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqniv_aead_decrypt_complete2(struct aead_request *req, int err)</div><div class='add'>+{</div><div class='add'>+	u8 data[4];</div><div class='add'>+</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Move ESP header back to correct location. */</div><div class='add'>+	scatterwalk_map_and_copy(data, req-&gt;dst, 16, req-&gt;assoclen - 8, 0);</div><div class='add'>+	scatterwalk_map_and_copy(data, req-&gt;dst, 8, req-&gt;assoclen - 8, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqniv_aead_decrypt_complete(struct crypto_async_request *base,</div><div class='add'>+					 int err)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = base-&gt;data;</div><div class='add'>+</div><div class='add'>+	seqniv_aead_decrypt_complete2(req, err);</div><div class='add'>+	aead_request_complete(req, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void seqiv_geniv(struct seqiv_ctx *ctx, u8 *info, u64 seq,</div><div class='ctx'> 			unsigned int ivsize)</div><div class='ctx'> {</div><div class='hunk'>@@ -186,160 +273,477 @@ static int seqiv_aead_givencrypt(struct aead_givcrypt_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int seqiv_givencrypt_first(struct skcipher_givcrypt_request *req)</div><div class='add'>+static int seqniv_aead_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ablkcipher *geniv = skcipher_givcrypt_reqtfm(req);</div><div class='del'>-	struct seqiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='del'>-	int err = 0;</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct seqniv_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct aead_request *subreq = &amp;rctx-&gt;subreq;</div><div class='add'>+	struct scatterlist *dst;</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	unsigned int ivsize = 8;</div><div class='add'>+	u8 buf[20] __attribute__ ((aligned(__alignof__(u32))));</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-	if (crypto_ablkcipher_crt(geniv)-&gt;givencrypt != seqiv_givencrypt_first)</div><div class='del'>-		goto unlock;</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	crypto_ablkcipher_crt(geniv)-&gt;givencrypt = seqiv_givencrypt;</div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='del'>-				   crypto_ablkcipher_ivsize(geniv));</div><div class='add'>+	/* ESP AD is at most 12 bytes (ESN). */</div><div class='add'>+	if (req-&gt;assoclen &gt; 12)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;lock);</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='ctx'> </div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	compl = seqniv_aead_encrypt_complete;</div><div class='add'>+	data = req;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;src != req-&gt;dst) {</div><div class='add'>+		struct blkcipher_desc desc = {</div><div class='add'>+			.tfm = ctx-&gt;null,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		err = crypto_blkcipher_encrypt(&amp;desc, req-&gt;dst, req-&gt;src,</div><div class='add'>+					       req-&gt;assoclen + req-&gt;cryptlen);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return seqiv_givencrypt(req);</div><div class='add'>+	dst = scatterwalk_ffwd(rctx-&gt;dst, req-&gt;dst, ivsize);</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, dst, dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	memcpy(buf, req-&gt;iv, ivsize);</div><div class='add'>+	crypto_xor(buf, ctx-&gt;salt, ivsize);</div><div class='add'>+	memcpy(req-&gt;iv, buf, ivsize);</div><div class='add'>+</div><div class='add'>+	/* Swap order of IV and ESP AD for ICV generation. */</div><div class='add'>+	scatterwalk_map_and_copy(buf + ivsize, req-&gt;dst, 0, req-&gt;assoclen, 0);</div><div class='add'>+	scatterwalk_map_and_copy(buf, req-&gt;dst, 0, req-&gt;assoclen + ivsize, 1);</div><div class='add'>+</div><div class='add'>+	err = crypto_aead_encrypt(subreq);</div><div class='add'>+	seqniv_aead_encrypt_complete2(req, err);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int seqiv_aead_givencrypt_first(struct aead_givcrypt_request *req)</div><div class='add'>+static int seqiv_aead_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_aead *geniv = aead_givcrypt_reqtfm(req);</div><div class='del'>-	struct seqiv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='del'>-	int err = 0;</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	u8 *info;</div><div class='add'>+	unsigned int ivsize = 8;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;lock);</div><div class='del'>-	if (crypto_aead_crt(geniv)-&gt;givencrypt != seqiv_aead_givencrypt_first)</div><div class='del'>-		goto unlock;</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	crypto_aead_crt(geniv)-&gt;givencrypt = seqiv_aead_givencrypt;</div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='del'>-				   crypto_aead_ivsize(geniv));</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;lock);</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+	info = req-&gt;iv;</div><div class='ctx'> </div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	if (req-&gt;src != req-&gt;dst) {</div><div class='add'>+		struct blkcipher_desc desc = {</div><div class='add'>+			.tfm = ctx-&gt;null,</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	return seqiv_aead_givencrypt(req);</div><div class='add'>+		err = crypto_blkcipher_encrypt(&amp;desc, req-&gt;dst, req-&gt;src,</div><div class='add'>+					       req-&gt;assoclen + req-&gt;cryptlen);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!IS_ALIGNED((unsigned long)info,</div><div class='add'>+				 crypto_aead_alignmask(geniv) + 1))) {</div><div class='add'>+		info = kmalloc(ivsize, req-&gt;base.flags &amp;</div><div class='add'>+				       CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL:</div><div class='add'>+								  GFP_ATOMIC);</div><div class='add'>+		if (!info)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		memcpy(info, req-&gt;iv, ivsize);</div><div class='add'>+		compl = seqiv_aead_encrypt_complete;</div><div class='add'>+		data = req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;dst, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, info);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen + ivsize);</div><div class='add'>+</div><div class='add'>+	crypto_xor(info, ctx-&gt;salt, ivsize);</div><div class='add'>+	scatterwalk_map_and_copy(info, req-&gt;dst, req-&gt;assoclen, ivsize, 1);</div><div class='add'>+</div><div class='add'>+	err = crypto_aead_encrypt(subreq);</div><div class='add'>+	if (unlikely(info != req-&gt;iv))</div><div class='add'>+		seqiv_aead_encrypt_complete2(req, err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqniv_aead_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct seqniv_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct aead_request *subreq = &amp;rctx-&gt;subreq;</div><div class='add'>+	struct scatterlist *dst;</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	unsigned int ivsize = 8;</div><div class='add'>+	u8 buf[20];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize + crypto_aead_authsize(geniv))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='add'>+</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;assoclen &gt; 12)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	else if (req-&gt;assoclen &gt; 8) {</div><div class='add'>+		compl = seqniv_aead_decrypt_complete;</div><div class='add'>+		data = req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req-&gt;src != req-&gt;dst) {</div><div class='add'>+		struct blkcipher_desc desc = {</div><div class='add'>+			.tfm = ctx-&gt;null,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		err = crypto_blkcipher_encrypt(&amp;desc, req-&gt;dst, req-&gt;src,</div><div class='add'>+					       req-&gt;assoclen + req-&gt;cryptlen);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Move ESP AD forward for ICV generation. */</div><div class='add'>+	scatterwalk_map_and_copy(buf, req-&gt;dst, 0, req-&gt;assoclen + ivsize, 0);</div><div class='add'>+	memcpy(req-&gt;iv, buf + req-&gt;assoclen, ivsize);</div><div class='add'>+	scatterwalk_map_and_copy(buf, req-&gt;dst, ivsize, req-&gt;assoclen, 1);</div><div class='add'>+</div><div class='add'>+	dst = scatterwalk_ffwd(rctx-&gt;dst, req-&gt;dst, ivsize);</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, dst, dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	err = crypto_aead_decrypt(subreq);</div><div class='add'>+	if (req-&gt;assoclen &gt; 8)</div><div class='add'>+		seqniv_aead_decrypt_complete2(req, err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqiv_aead_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *geniv = crypto_aead_reqtfm(req);</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	crypto_completion_t compl;</div><div class='add'>+	void *data;</div><div class='add'>+	unsigned int ivsize = 8;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; ivsize + crypto_aead_authsize(geniv))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;geniv.child);</div><div class='add'>+</div><div class='add'>+	compl = req-&gt;base.complete;</div><div class='add'>+	data = req-&gt;base.data;</div><div class='add'>+</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags, compl, data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen - ivsize, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen + ivsize);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(req-&gt;iv, req-&gt;src, req-&gt;assoclen, ivsize, 0);</div><div class='add'>+	if (req-&gt;src != req-&gt;dst)</div><div class='add'>+		scatterwalk_map_and_copy(req-&gt;iv, req-&gt;dst,</div><div class='add'>+					 req-&gt;assoclen, ivsize, 1);</div><div class='add'>+</div><div class='add'>+	return crypto_aead_decrypt(subreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int seqiv_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ablkcipher *geniv = __crypto_ablkcipher_cast(tfm);</div><div class='ctx'> 	struct seqiv_ctx *ctx = crypto_ablkcipher_ctx(geniv);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	tfm-&gt;crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request);</div><div class='ctx'> </div><div class='del'>-	return skcipher_geniv_init(tfm);</div><div class='add'>+	err = 0;</div><div class='add'>+	if (!crypto_get_default_rng()) {</div><div class='add'>+		crypto_ablkcipher_crt(geniv)-&gt;givencrypt = seqiv_givencrypt;</div><div class='add'>+		err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='add'>+					   crypto_ablkcipher_ivsize(geniv));</div><div class='add'>+		crypto_put_default_rng();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err ?: skcipher_geniv_init(tfm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int seqiv_aead_init(struct crypto_tfm *tfm)</div><div class='add'>+static int seqiv_old_aead_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *geniv = __crypto_aead_cast(tfm);</div><div class='ctx'> 	struct seqiv_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	tfm-&gt;crt_aead.reqsize = sizeof(struct aead_request);</div><div class='add'>+	crypto_aead_set_reqsize(__crypto_aead_cast(tfm),</div><div class='add'>+				sizeof(struct aead_request));</div><div class='add'>+	err = 0;</div><div class='add'>+	if (!crypto_get_default_rng()) {</div><div class='add'>+		geniv-&gt;givencrypt = seqiv_aead_givencrypt;</div><div class='add'>+		err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='add'>+					   crypto_aead_ivsize(geniv));</div><div class='add'>+		crypto_put_default_rng();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return aead_geniv_init(tfm);</div><div class='add'>+	return err ?: aead_geniv_init(tfm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_template seqiv_tmpl;</div><div class='del'>-</div><div class='del'>-static struct crypto_instance *seqiv_ablkcipher_alloc(struct rtattr **tb)</div><div class='add'>+static int seqiv_aead_init_common(struct crypto_tfm *tfm, unsigned int reqsize)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst;</div><div class='add'>+	struct crypto_aead *geniv = __crypto_aead_cast(tfm);</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_aead_ctx(geniv);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	inst = skcipher_geniv_alloc(&amp;seqiv_tmpl, tb, 0, 0);</div><div class='add'>+	spin_lock_init(&amp;ctx-&gt;geniv.lock);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(inst))</div><div class='add'>+	crypto_aead_set_reqsize(geniv, sizeof(struct aead_request));</div><div class='add'>+</div><div class='add'>+	err = crypto_get_default_rng();</div><div class='add'>+	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (inst-&gt;alg.cra_ablkcipher.ivsize &lt; sizeof(u64)) {</div><div class='del'>-		skcipher_geniv_free(inst);</div><div class='del'>-		inst = ERR_PTR(-EINVAL);</div><div class='add'>+	err = crypto_rng_get_bytes(crypto_default_rng, ctx-&gt;salt,</div><div class='add'>+				   crypto_aead_ivsize(geniv));</div><div class='add'>+	crypto_put_default_rng();</div><div class='add'>+	if (err)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ablkcipher.givencrypt = seqiv_givencrypt_first;</div><div class='add'>+	ctx-&gt;null = crypto_get_default_null_skcipher();</div><div class='add'>+	err = PTR_ERR(ctx-&gt;null);</div><div class='add'>+	if (IS_ERR(ctx-&gt;null))</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_init = seqiv_init;</div><div class='del'>-	inst-&gt;alg.cra_exit = skcipher_geniv_exit;</div><div class='add'>+	err = aead_geniv_init(tfm);</div><div class='add'>+	if (err)</div><div class='add'>+		goto drop_null;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_ctxsize += inst-&gt;alg.cra_ablkcipher.ivsize;</div><div class='add'>+	ctx-&gt;geniv.child = geniv-&gt;child;</div><div class='add'>+	geniv-&gt;child = geniv;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+drop_null:</div><div class='add'>+	crypto_put_default_null_skcipher();</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqiv_aead_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return seqiv_aead_init_common(tfm, sizeof(struct aead_request));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqniv_aead_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return seqiv_aead_init_common(tfm, sizeof(struct seqniv_request_ctx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seqiv_aead_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct seqiv_aead_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	crypto_free_aead(ctx-&gt;geniv.child);</div><div class='add'>+	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *seqiv_aead_alloc(struct rtattr **tb)</div><div class='add'>+static int seqiv_ablkcipher_create(struct crypto_template *tmpl,</div><div class='add'>+				   struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_instance *inst;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	inst = aead_geniv_alloc(&amp;seqiv_tmpl, tb, 0, 0);</div><div class='add'>+	inst = skcipher_geniv_alloc(tmpl, tb, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='del'>-		goto out;</div><div class='add'>+		return PTR_ERR(inst);</div><div class='ctx'> </div><div class='del'>-	if (inst-&gt;alg.cra_aead.ivsize &lt; sizeof(u64)) {</div><div class='del'>-		aead_geniv_free(inst);</div><div class='del'>-		inst = ERR_PTR(-EINVAL);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (inst-&gt;alg.cra_ablkcipher.ivsize &lt; sizeof(u64))</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_init = seqiv_init;</div><div class='add'>+	inst-&gt;alg.cra_exit = skcipher_geniv_exit;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_ctxsize += inst-&gt;alg.cra_ablkcipher.ivsize;</div><div class='add'>+	inst-&gt;alg.cra_ctxsize += sizeof(struct seqiv_ctx);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_alignmask |= __alignof__(u32) - 1;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_aead.givencrypt = seqiv_aead_givencrypt_first;</div><div class='add'>+	err = crypto_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_inst;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_init = seqiv_aead_init;</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+free_inst:</div><div class='add'>+	skcipher_geniv_free(inst);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqiv_old_aead_create(struct crypto_template *tmpl,</div><div class='add'>+				 struct aead_instance *aead)</div><div class='add'>+{</div><div class='add'>+	struct crypto_instance *inst = aead_crypto_instance(aead);</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (inst-&gt;alg.cra_aead.ivsize &lt; sizeof(u64))</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.cra_init = seqiv_old_aead_init;</div><div class='ctx'> 	inst-&gt;alg.cra_exit = aead_geniv_exit;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.cra_ctxsize = inst-&gt;alg.cra_aead.ivsize;</div><div class='add'>+	inst-&gt;alg.cra_ctxsize += sizeof(struct seqiv_ctx);</div><div class='add'>+</div><div class='add'>+	err = crypto_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_inst;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+free_inst:</div><div class='add'>+	aead_geniv_free(aead);</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_instance *seqiv_alloc(struct rtattr **tb)</div><div class='add'>+static int seqiv_aead_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct crypto_aead_spawn *spawn;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	inst = aead_geniv_alloc(tmpl, tb, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(inst))</div><div class='add'>+		return PTR_ERR(inst);</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask |= __alignof__(u32) - 1;</div><div class='add'>+</div><div class='add'>+	if (inst-&gt;alg.base.cra_aead.encrypt)</div><div class='add'>+		return seqiv_old_aead_create(tmpl, inst);</div><div class='add'>+</div><div class='add'>+	spawn = aead_instance_ctx(inst);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;base.cra_aead.encrypt)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (inst-&gt;alg.ivsize != sizeof(u64))</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.encrypt = seqiv_aead_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = seqiv_aead_decrypt;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_init = seqiv_aead_init;</div><div class='add'>+	inst-&gt;alg.base.cra_exit = seqiv_aead_exit;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct seqiv_aead_ctx);</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize += inst-&gt;alg.base.cra_aead.ivsize;</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+free_inst:</div><div class='add'>+	aead_geniv_free(inst);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqiv_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_attr_type *algt;</div><div class='del'>-	struct crypto_instance *inst;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	algt = crypto_get_attr_type(tb);</div><div class='ctx'> 	if (IS_ERR(algt))</div><div class='del'>-		return ERR_CAST(algt);</div><div class='del'>-</div><div class='del'>-	err = crypto_get_default_rng();</div><div class='del'>-	if (err)</div><div class='del'>-		return ERR_PTR(err);</div><div class='add'>+		return PTR_ERR(algt);</div><div class='ctx'> </div><div class='ctx'> 	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_AEAD) &amp; CRYPTO_ALG_TYPE_MASK)</div><div class='del'>-		inst = seqiv_ablkcipher_alloc(tb);</div><div class='add'>+		err = seqiv_ablkcipher_create(tmpl, tb);</div><div class='ctx'> 	else</div><div class='del'>-		inst = seqiv_aead_alloc(tb);</div><div class='add'>+		err = seqiv_aead_create(tmpl, tb);</div><div class='ctx'> </div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seqniv_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	struct aead_instance *inst;</div><div class='add'>+	struct crypto_aead_spawn *spawn;</div><div class='add'>+	struct aead_alg *alg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	inst = aead_geniv_alloc(tmpl, tb, 0, 0);</div><div class='add'>+	err = PTR_ERR(inst);</div><div class='ctx'> 	if (IS_ERR(inst))</div><div class='del'>-		goto put_rng;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.cra_alignmask |= __alignof__(u32) - 1;</div><div class='del'>-	inst-&gt;alg.cra_ctxsize += sizeof(struct seqiv_ctx);</div><div class='add'>+	spawn = aead_instance_ctx(inst);</div><div class='add'>+	alg = crypto_spawn_aead_alg(spawn);</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;base.cra_aead.encrypt)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (inst-&gt;alg.ivsize != sizeof(u64))</div><div class='add'>+		goto free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.encrypt = seqniv_aead_encrypt;</div><div class='add'>+	inst-&gt;alg.decrypt = seqniv_aead_decrypt;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_init = seqniv_aead_init;</div><div class='add'>+	inst-&gt;alg.base.cra_exit = seqiv_aead_exit;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.base.cra_alignmask |= __alignof__(u32) - 1;</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize = sizeof(struct seqiv_aead_ctx);</div><div class='add'>+	inst-&gt;alg.base.cra_ctxsize += inst-&gt;alg.ivsize;</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	err = aead_register_instance(tmpl, inst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_inst;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return inst;</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='del'>-put_rng:</div><div class='del'>-	crypto_put_default_rng();</div><div class='add'>+free_inst:</div><div class='add'>+	aead_geniv_free(inst);</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -348,24 +752,46 @@ static void seqiv_free(struct crypto_instance *inst)</div><div class='ctx'> 	if ((inst-&gt;alg.cra_flags ^ CRYPTO_ALG_TYPE_AEAD) &amp; CRYPTO_ALG_TYPE_MASK)</div><div class='ctx'> 		skcipher_geniv_free(inst);</div><div class='ctx'> 	else</div><div class='del'>-		aead_geniv_free(inst);</div><div class='del'>-	crypto_put_default_rng();</div><div class='add'>+		aead_geniv_free(aead_instance(inst));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_template seqiv_tmpl = {</div><div class='ctx'> 	.name = "seqiv",</div><div class='del'>-	.alloc = seqiv_alloc,</div><div class='add'>+	.create = seqiv_create,</div><div class='add'>+	.free = seqiv_free,</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct crypto_template seqniv_tmpl = {</div><div class='add'>+	.name = "seqniv",</div><div class='add'>+	.create = seqniv_create,</div><div class='ctx'> 	.free = seqiv_free,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init seqiv_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	return crypto_register_template(&amp;seqiv_tmpl);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_template(&amp;seqiv_tmpl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = crypto_register_template(&amp;seqniv_tmpl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_undo_niv;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+out_undo_niv:</div><div class='add'>+	crypto_unregister_template(&amp;seqiv_tmpl);</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit seqiv_module_exit(void)</div><div class='ctx'> {</div><div class='add'>+	crypto_unregister_template(&amp;seqniv_tmpl);</div><div class='ctx'> 	crypto_unregister_template(&amp;seqiv_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -375,3 +801,4 @@ module_exit(seqiv_module_exit);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Sequence Number IV Generator");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("seqiv");</div><div class='add'>+MODULE_ALIAS_CRYPTO("seqniv");</div><div class='head'>diff --git a/crypto/shash.c b/crypto/shash.c<br/>index 47c713954bf3..ecb1e3d39bf0 100644<br/>--- a/<a href='/drm-misc/tree/crypto/shash.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/shash.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/shash.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/shash.c</a></div><div class='hunk'>@@ -520,11 +520,6 @@ static int crypto_shash_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int crypto_shash_extsize(struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return alg-&gt;cra_ctxsize;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_NET</div><div class='ctx'> static int crypto_shash_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='hunk'>@@ -564,7 +559,7 @@ static void crypto_shash_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> static const struct crypto_type crypto_shash_type = {</div><div class='ctx'> 	.ctxsize = crypto_shash_ctxsize,</div><div class='del'>-	.extsize = crypto_shash_extsize,</div><div class='add'>+	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init = crypto_init_shash_ops,</div><div class='ctx'> 	.init_tfm = crypto_shash_init_tfm,</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='head'>diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c<br/>index 1a2800107fc8..9f6f10b498ba 100644<br/>--- a/<a href='/drm-misc/tree/crypto/tcrypt.c?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/tcrypt.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/tcrypt.c?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/tcrypt.c</a></div><div class='hunk'>@@ -22,8 +22,10 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/hash.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/fips.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -34,7 +36,6 @@</div><div class='ctx'> #include &lt;linux/timex.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include "tcrypt.h"</div><div class='del'>-#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Need slab memory for testing (size in number of pages).</div><div class='hunk'>@@ -257,12 +258,12 @@ static void sg_init_aead(struct scatterlist *sg, char *xbuf[XBUFSIZE],</div><div class='ctx'> 		rem = buflen % PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sg_init_table(sg, np);</div><div class='add'>+	sg_init_table(sg, np + 1);</div><div class='ctx'> 	np--;</div><div class='ctx'> 	for (k = 0; k &lt; np; k++)</div><div class='del'>-		sg_set_buf(&amp;sg[k], xbuf[k], PAGE_SIZE);</div><div class='add'>+		sg_set_buf(&amp;sg[k + 1], xbuf[k], PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	sg_set_buf(&amp;sg[k], xbuf[k], rem);</div><div class='add'>+	sg_set_buf(&amp;sg[k + 1], xbuf[k], rem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void test_aead_speed(const char *algo, int enc, unsigned int secs,</div><div class='hunk'>@@ -276,7 +277,6 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,</div><div class='ctx'> 	const char *key;</div><div class='ctx'> 	struct aead_request *req;</div><div class='ctx'> 	struct scatterlist *sg;</div><div class='del'>-	struct scatterlist *asg;</div><div class='ctx'> 	struct scatterlist *sgout;</div><div class='ctx'> 	const char *e;</div><div class='ctx'> 	void *assoc;</div><div class='hunk'>@@ -308,11 +308,10 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,</div><div class='ctx'> 	if (testmgr_alloc_buf(xoutbuf))</div><div class='ctx'> 		goto out_nooutbuf;</div><div class='ctx'> </div><div class='del'>-	sg = kmalloc(sizeof(*sg) * 8 * 3, GFP_KERNEL);</div><div class='add'>+	sg = kmalloc(sizeof(*sg) * 9 * 2, GFP_KERNEL);</div><div class='ctx'> 	if (!sg)</div><div class='ctx'> 		goto out_nosg;</div><div class='del'>-	asg = &amp;sg[8];</div><div class='del'>-	sgout = &amp;asg[8];</div><div class='add'>+	sgout = &amp;sg[9];</div><div class='ctx'> </div><div class='ctx'> 	tfm = crypto_alloc_aead(algo, 0, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -338,7 +337,6 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,</div><div class='ctx'> 		do {</div><div class='ctx'> 			assoc = axbuf[0];</div><div class='ctx'> 			memset(assoc, 0xff, aad_size);</div><div class='del'>-			sg_init_one(&amp;asg[0], assoc, aad_size);</div><div class='ctx'> </div><div class='ctx'> 			if ((*keysize + *b_size) &gt; TVMEMSIZE * PAGE_SIZE) {</div><div class='ctx'> 				pr_err("template (%u) too big for tvmem (%lu)\n",</div><div class='hunk'>@@ -374,14 +372,17 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sg_init_aead(&amp;sg[0], xbuf,</div><div class='add'>+			sg_init_aead(sg, xbuf,</div><div class='ctx'> 				    *b_size + (enc ? authsize : 0));</div><div class='ctx'> </div><div class='del'>-			sg_init_aead(&amp;sgout[0], xoutbuf,</div><div class='add'>+			sg_init_aead(sgout, xoutbuf,</div><div class='ctx'> 				    *b_size + (enc ? authsize : 0));</div><div class='ctx'> </div><div class='add'>+			sg_set_buf(&amp;sg[0], assoc, aad_size);</div><div class='add'>+			sg_set_buf(&amp;sgout[0], assoc, aad_size);</div><div class='add'>+</div><div class='ctx'> 			aead_request_set_crypt(req, sg, sgout, *b_size, iv);</div><div class='del'>-			aead_request_set_assoc(req, asg, aad_size);</div><div class='add'>+			aead_request_set_ad(req, aad_size);</div><div class='ctx'> </div><div class='ctx'> 			if (secs)</div><div class='ctx'> 				ret = test_aead_jiffies(req, enc, *b_size,</div><div class='hunk'>@@ -808,7 +809,7 @@ static int test_ahash_jiffies(struct ahash_request *req, int blen,</div><div class='ctx'> </div><div class='ctx'> 	for (start = jiffies, end = start + secs * HZ, bcount = 0;</div><div class='ctx'> 	     time_before(jiffies, end); bcount++) {</div><div class='del'>-		ret = crypto_ahash_init(req);</div><div class='add'>+		ret = do_one_ahash_op(req, crypto_ahash_init(req));</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		for (pcount = 0; pcount &lt; blen; pcount += plen) {</div><div class='hunk'>@@ -877,7 +878,7 @@ static int test_ahash_cycles(struct ahash_request *req, int blen,</div><div class='ctx'> </div><div class='ctx'> 	/* Warm-up run. */</div><div class='ctx'> 	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		ret = crypto_ahash_init(req);</div><div class='add'>+		ret = do_one_ahash_op(req, crypto_ahash_init(req));</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		for (pcount = 0; pcount &lt; blen; pcount += plen) {</div><div class='hunk'>@@ -896,7 +897,7 @@ static int test_ahash_cycles(struct ahash_request *req, int blen,</div><div class='ctx'> </div><div class='ctx'> 		start = get_cycles();</div><div class='ctx'> </div><div class='del'>-		ret = crypto_ahash_init(req);</div><div class='add'>+		ret = do_one_ahash_op(req, crypto_ahash_init(req));</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		for (pcount = 0; pcount &lt; blen; pcount += plen) {</div><div class='hunk'>@@ -1761,6 +1762,11 @@ static int do_test(const char *alg, u32 type, u32 mask, int m)</div><div class='ctx'> 				NULL, 0, 16, 8, aead_speed_template_20);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case 212:</div><div class='add'>+		test_aead_speed("rfc4309(ccm(aes))", ENCRYPT, sec,</div><div class='add'>+				NULL, 0, 16, 8, aead_speed_template_19);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case 300:</div><div class='ctx'> 		if (alg) {</div><div class='ctx'> 			test_hash_speed(alg, sec, generic_hash_speed_template);</div><div class='head'>diff --git a/crypto/tcrypt.h b/crypto/tcrypt.h<br/>index 6c7e21a09f78..6cc1b856871b 100644<br/>--- a/<a href='/drm-misc/tree/crypto/tcrypt.h?id=fbce23a0b95763dfc4961ce6240e055c39f497ed'>crypto/tcrypt.h</a><br/>+++ b/<a href='/drm-misc/tree/crypto/tcrypt.h?id=527c465a3c8716d93201ae34b7fc52679610596d'>crypto/tcrypt.h</a></div>